WorldWideScience

Sample records for hardware commissioning completion

  1. Short Circuit Tests First Step of LHC Hardware Commissioning Completion

    CERN Document Server

    Barbero-Soto, E; Bordry, Frederick; Casas Lino, M P; Coelingh, G J; Cumer, G; Dahlerup-Petersen, K; Guillaume, J C; Inigo-Golfin, J; Montabonnet, V; Nisbet, D; Pojer, M; Principe, R; Rodríguez-Mateos, F; Saban, R; Schmidt, R; Thiesen, H; Vergara-Fernández, A; Zerlauth, M; Castaneda Serra, A; Romera Ramirez, I

    2008-01-01

    For the two counter rotating beams in the Large Hadron Collider (LHC) about 8000 magnets (main dipole and quadrupole magnets, corrector magnets, separation dipoles, matching section quadrupoles etc.) are powered in about 1500 superconducting electrical circuits. The magnets are powered by power converters that have been designed for the LHC with a current between 60 and 13000A. Between October 2005 and September 2007 the so-called Short Circuit Tests were carried-out in 15 underground zones where the power converters of the superconducting circuits are placed. The tests aimed to qualify the normal conducting equipments of the circuits such as power converters and normal conducting high current cables. The correct operation of interlock and energy extraction systems was validated. The infrastructure systems including AC distribution, water and air cooling and the control systems was also commissioned. In this paper the results of the two year test campaign are summarized with particular attention to problems e...

  2. LEIR commissioning successfully completed

    CERN Multimedia

    2006-01-01

    An important milestone has been passed in the preparation of the injector complex to supply ions to the LHC experiments. The LEIR lead-ion beam, seen on one of the control screens just before the PS injection region. The Low-Energy Ion Ring - LEIR for short - has passed its first tests with flying colours. On 12 May, the ring that will accumulate lead ions for the LHC was shut down after seven months of tests (see Bulletin 44/2005). 'The commissioning phase was a resounding success,' enthuses a satisfied Michel Chanel, head of the LEIR construction project. After several months of fine-tuning, the LEIR team has achieved its aim of producing the kind of beam required for first lead-ion collisions in the LHC in 2008. This involved creating bunches containing 230 million ions, in line with the specifications for those first beams. This success can be put down to the machine's outstanding design and components. 'It's a great achivement by all the teams involved in the machine's construction,' underlines Christian...

  3. Public inquiry related to the request by EDF of a definitive stopping and complete dismantling of the hardware storage installation of the Monts d'Arree nuclear power plant (INB n.162). Opinion and conclusions of the inquiry commission

    International Nuclear Information System (INIS)

    2010-03-01

    After a recall of the project of stopping and dismantling of the hardware storage installation (INB n.162) which had been created after the stopping and dismantling of the Monts d'Arree heavy water nuclear reactor (INB n.28), this report analyzes the results of the public inquiry, and highlights the arguments of those in favour of this project and those opposed to it. Then, it states the Inquiry Commission's opinion which addresses the request for a national public debate, the project justification, the inquiry file, the site radiological status, the site radiological control during works, the impacts of dismantling, the various risks (for the population and the workers, in terms of fire risks), the issue of radioactive wastes, economic aspects (costs, jobs, local economy, tourism and site image), and site reconversion

  4. Hardware Commissioning of the LHC Quality Assurance, follow-up and storing of the test results

    CERN Document Server

    Barbero, E

    2005-01-01

    During the commissioning of the LHC technical systems [1] (the so-called Hardware Commissioning) a large number of test sequences and procedures will be applied to the different systems and components of the accelerator. All the information related to the coordination of the Hardware Commissioning will be structured and managed towards the final objective of integrating all the data produced in the Manufacturing and Test Folders (MTF) [2] at both equipment level (i.e. individual system tests) and commissioning level (i.e.Hardware Commissioning). The MTF for Hardware Commissioning will be mainly used to archive the results of the tests (i.e. status, parameters and waveforms) which will be used later as reference during the operation with beam. Also it is an indispensable tool for monitoring the progress of the different tests and ensuring the proper follow-up of the procedures described in the engineering specifications; in this way, the Quality Assurance process will be completed. This paper describes the spe...

  5. The Hardware Topological Trigger of ATLAS: Commissioning and Operations

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00226165; The ATLAS collaboration

    2018-01-01

    The Level-1 trigger is the first rate-reducing step in the ATLAS trigger system with an output rate of 100 kHz and decision latency smaller than 2.5 μs. It consists of a calorimeter trigger, muon trigger and a central trigger processor. To improve the physics potential reach in ATLAS, during the LHC shutdown after Run 1, the Level-1 trigger system was upgraded at hardware, firmware and software level. In particular, a new electronics sub-system was introduced in the real-time data processing path: the Topological Processor System (L1Topo). It consists of a single AdvancedCTA shelf equipped with two Level-1 topological processor blades. For individual blades, real-time information from calorimeter and muon Level-1 trigger systems, is processed by four individual state-of-the-art FPGAs. It needs to deal with a large input bandwidth of up to 6 Tb/s, optical connectivity and low processing latency on the real-time data path. The L1Topo firmware apply measurements of angles between jets and/or leptons and several...

  6. Java Tool Framework for Automation of Hardware Commissioning and Maintenance Procedures

    International Nuclear Information System (INIS)

    Ho, J C; Fisher, J M; Gordon, J B; Lagin, L J; West, S L

    2007-01-01

    The National Ignition Facility (NIF) is a 192-beam laser system designed to study high energy density physics. Each beam line contains a variety of line replaceable units (LRUs) that contain optics, stepping motors, sensors and other devices to control and diagnose the laser. During commissioning and subsequent maintenance of the laser, LRUs undergo a qualification process using the Integrated Computer Control System (ICCS) to verify and calibrate the equipment. The commissioning processes are both repetitive and tedious when we use remote manual computer controls, making them ideal candidates for software automation. Maintenance and Commissioning Tool (MCT) software was developed to improve the efficiency of the qualification process. The tools are implemented in Java, leveraging ICCS services and CORBA to communicate with the control devices. The framework provides easy-to-use mechanisms for handling configuration data, task execution, task progress reporting, and generation of commissioning test reports. The tool framework design and application examples will be discussed

  7. Hardware-in-the-Loop environment for testing and commissioning of space controllers; Hardware-in-the-Loop Umgebung zum Test und zur Inbetriebnahme von Raumreglern

    Energy Technology Data Exchange (ETDEWEB)

    Adlhoch, Alexander; Becker, Martin [Hochschule Biberach (Germany). Inst. fuer Gebaeude- und Energiesysteme

    2012-07-01

    The energy-efficient and optimal functioning of room controllers in terms of indoor air climates is influenced mainly by the control algorithm and the optimal adjustment of the parameters of controllers used in terms of space requirements. In the practical operation, deficits in the function or parameters of the controller are hardly or only with great effort metrological detectable, but have a significant impact on the energy consumption and / or the indoor climate comfort. In a hardware-in-the-loop (HIL) environment, room controllers can be examined in terms of the function under defined conditions, and different controllers can be evaluated comparatively. It is also possible to adjust the parameters of the controller before the commissioning. The HiL environment presented in the contribution under consideration consists of a model of the controlled system, a hardware coupler and a real controller to be tested. Among the spatial models, it can be selected from a plurality of different types of space which in turn can be assigned by means of different spatial parameters and environmental models. These combinations enable a replication of a test scenario corresponding to the later application. The hardware coupler provides a selection of physical inputs and outputs as well as interfaces to different bus systems (for example KNX, LON, EnOcean) for connecting different types of controllers. The construction and operation of a HIL test stand for space controller is presented based on first practical control tests. At this, the focus is on the suitability of this test environment for a variety of different controllers as well as development assistance and assistance for the adjustment of parameters. The HiL environments developed in the joint research project HiL RHK1 for the testing of space controllers, controllers for HVAC systems and refrigeration technology controllers have been developed so that the HiL environments can be coupled to a multi-HIL environment. This

  8. The contract for the completion and commissioning of Cernavoda NPP - Unit

    International Nuclear Information System (INIS)

    2001-01-01

    On May 18, 2001 the commercial contract for the completion and commissioning of the Cernavoda NPP Unit 2 has been signed by Nuclearelectrica National Company (SNN SA) and its partners, AECL-Canada and ANSALDO-Italy. This contract represents a continuation of the cooperation with AECL-Canada (the owner of the licence and the designer of the nuclear part of Cernavoda NPP Unit1) and ANSALDO-Italy (the designer of the conventional part of Cernavoda NPP Unit1). The completion is scheduled to last for 54 months (4.5 years) since the date the contract takes effect and the nuclear reactor start-up (the first criticality) is scheduled for the 49 th month. The total negotiated cost for the completion was estimated to amount to 689 million dollars, against the 750 million dollars initially estimated. The works at the site will be managed by an integrated staff team of specialized personnel form AECL-Canada (111 positions), ANSALDO-Italy (72 positions) and Romania (1200 positions)

  9. 78 FR 13887 - Notice of Inventory Completion: Washington State Parks and Recreation Commission, Olympia, WA

    Science.gov (United States)

    2013-03-01

    ... Washington State Parks and Recreation Commission at the address below by April 1, 2013. ADDRESSES: Alicia... contact Alicia Woods, Washington State Parks and Recreation Commission, PO Box 42650, Olympia, WA 98504...

  10. Completed installations and the individual commissioning of the KSTAR MG system

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Chang-Hwan, E-mail: kch2004@nfri.re.kr [National Fusion Research Institute, 169-148 Gwahangno, Yusung-gu, Daejeon 305-333 (Korea, Republic of); Eom, Dae-young; Lee, Woo-Jin; Kong, Jong-Dea; Joung, Nam-Young; Kim, Yang-Soo; Kwon, Myeun [National Fusion Research Institute, 169-148 Gwahangno, Yusung-gu, Daejeon 305-333 (Korea, Republic of); Jang, Eun; Han, Chul-Woo; Lee, Sel-Ki; Kim, Gwang-Seon; Maeng, Jae-Hoon [Vitzrotech Co., Ltd, 605-2 Seonggok-dong, Danwon-gu, Ansan, Gyeonggi-do 425-833 (Korea, Republic of)

    2014-04-15

    Highlights: • All components of the MG system were made from each professional supplier and installed completely in the NFRI site. • The building and the overhead crane which need to install the MG system, were built in two sections. One is for the bearing, rotor and stator and the other section is for the VVVF and excitation system. • The dummy coil testing will commence in July 2013 and the comprehensive performance test of MG will be tested from August when the MPS commissioning is processing with superconducting coil. - Abstract: Peak power of 200 MVA is required in order to achieve the goal within a long pulse scenario for the final operation of the Korean Superconducting Tokamak Advanced Research (KSTAR). The available grid power is only 100 MVA at the National Fusion Research Institute (NFRI) site. Motor generator (MG) was considered as a method of resolving such problems. The design of the KSTAR MG system was completed in July 2010 and individual devices were produced by relevant manufacturers. The installation of individual devices was completed in December 2012. Specifically, the stator and rotor were assembled at the site due to their large size and weight. The bearings, variable voltage variable frequency (VVVF) and excitation systems were transported and installed on site after being manufactured externally. The building used for MG installation was built in 2011. With the building designed for ease of installation, an overhead crane was designed to allow access to the loading bay. In this paper, we discuss the installation of the MG system and the construction of the building suitable for installation of individual devices. In addition, performance on the test results of individual devices is also discussed.

  11. 78 FR 44594 - Notice of Inventory Completion: Washington State Parks and Recreation Commission, Olympia, WA

    Science.gov (United States)

    2013-07-24

    ..., 2013. ADDRESSES: Alicia Woods, Washington State Parks and Recreation Commission, PO Box 42650, Olympia, WA 98504-2650, telephone (360) 902- 0939, email Alicia[email protected] . SUPPLEMENTARY INFORMATION... to Alicia Woods, Washington State Parks and Recreation Commission, PO Box 42650, Olympia, WA 98504...

  12. 77 FR 48535 - Notice of Inventory Completion: Washington State Parks and Recreation Commission, Olympia, WA

    Science.gov (United States)

    2012-08-14

    ...: Alicia Woods, Washington State Parks and Recreation Commission, P.O. Box 42650, Olympia, WA 98504-2650... it satisfies the criteria in 43 CFR 10.11(c)(1) should contact Alicia Woods, Washington State Parks...

  13. 77 FR 61782 - Notice of Inventory Completion: Washington State Parks and Recreation Commission, Olympia, WA

    Science.gov (United States)

    2012-10-11

    ... Washington State Parks and Recreation Commission at the address below by November 13, 2012. ADDRESSES: Alicia... affiliated with the human remains should contact Alicia Woods, Washington State Parks and Recreation...

  14. Tools for a simulation supported commissioning of the automation of HVAC plants. Hardware-in-the-loop in building automation; Werkzeuge fuer eine simulationsgestuetzte Inbetriebnahme der Automation von RLT- Anlagen. Hardware-in-the-Loop in der Gebaeudeautomation

    Energy Technology Data Exchange (ETDEWEB)

    Richter, Andreas; Sokollik, Frank [Hochschule Merseburg (Germany). Fachbereich Informatik und Kommunikationssysteme

    2012-07-01

    Hardware-in-the-loop (HiL) is a method for testing and validating technical automation solutions based on virtual processes in a simulation environment. Applied to the automation of the interior air supply systems, preceded commissioning tests of the controller at a simulated system can be performed. These tests can be used for example to find logic errors in the program development, or to adjust the parameters of a controller. The adjustment of the parameters can be performed independent of the seasons by modifying the ambient climatic conditions. The parameters of the plants can be tested under dynamic conditions. The control mode can be visualized by starting up of load conditions at dynamic HVAC components and optimized if necessary. Within BMBF funded projects, a HiL solution was developed in a.NET environment. The coupling of simulation and control takes place via the bus systems CAN and BACnet. The elements of the simulation of air conditioners are implemented object-oriented in the programming language C, and are based on the solution of dynamic mass and energy balances. The features of HIL are implemented in a multi-client architecture. This includes primarily the simulation and communication. Other feature are implemented: import of virtual systems from a CAE system, adjustment of parameters of the simulation using structured sets of parameters, features for a distributed simulation of complex systems in the network, a tool for the dimensioning of controllers, chart and visualization features.

  15. SU-E-T-435: Development and Commissioning of a Complete System for In-Vivo Dosimetry and Range Verification in Proton Therapy

    Energy Technology Data Exchange (ETDEWEB)

    Samuel, D [Universite catholique de Louvain, Louvain-la-neuve, BW (Belgium); Testa, M; Park, Y [Massachusetts General Hospital, Boston, MA (United States); Schneider, R; Moteabbed, M [General Hospital, Boston, MA (United States); Janssens, G; Prieels, D [Ion Beam Applications, Louvain-la-neuve, Brabant Wallon (Belgium); Orban de Xivry, J [Universite catholique de Louvain, Louvain-la-neuve, BW (Belgium); Lu, H [Massachusetts General Hospital and Harvard Medical School, Boston, MA (United States); Bentefour, E

    2014-06-01

    Purpose: In-vivo dose and beam range verification in proton therapy could play significant roles in proton treatment validation and improvements. Invivo beam range verification, in particular, could enable new treatment techniques one of which, for example, could be the use of anterior fields for prostate treatment instead of opposed lateral fields as in current practice. We have developed and commissioned an integrated system with hardware, software and workflow protocols, to provide a complete solution, simultaneously for both in-vivo dosimetry and range verification for proton therapy. Methods: The system uses a matrix of diodes, up to 12 in total, but separable into three groups for flexibility in application. A special amplifier was developed to capture extremely small signals from very low proton beam current. The software was developed within iMagX, a general platform for image processing in radiation therapy applications. The range determination exploits the inherent relationship between the internal range modulation clock of the proton therapy system and the radiological depth at the point of measurement. The commissioning of the system, for in-vivo dosimetry and for range verification was separately conducted using anthropomorphic phantom. EBT films and TLDs were used for dose comparisons and range scan of the beam distal fall-off was used as ground truth for range verification. Results: For in-vivo dose measurement, the results were in agreement with TLD and EBT films and were within 3% from treatment planning calculations. For range verification, a precision of 0.5mm is achieved in homogeneous phantoms, and a precision of 2mm for anthropomorphic pelvic phantom, except at points with significant range mixing. Conclusion: We completed the commissioning of our system for in-vivo dosimetry and range verification in proton therapy. The results suggest that the system is ready for clinical trials on patient.

  16. SU-E-T-435: Development and Commissioning of a Complete System for In-Vivo Dosimetry and Range Verification in Proton Therapy

    International Nuclear Information System (INIS)

    Samuel, D; Testa, M; Park, Y; Schneider, R; Moteabbed, M; Janssens, G; Prieels, D; Orban de Xivry, J; Lu, H; Bentefour, E

    2014-01-01

    Purpose: In-vivo dose and beam range verification in proton therapy could play significant roles in proton treatment validation and improvements. Invivo beam range verification, in particular, could enable new treatment techniques one of which, for example, could be the use of anterior fields for prostate treatment instead of opposed lateral fields as in current practice. We have developed and commissioned an integrated system with hardware, software and workflow protocols, to provide a complete solution, simultaneously for both in-vivo dosimetry and range verification for proton therapy. Methods: The system uses a matrix of diodes, up to 12 in total, but separable into three groups for flexibility in application. A special amplifier was developed to capture extremely small signals from very low proton beam current. The software was developed within iMagX, a general platform for image processing in radiation therapy applications. The range determination exploits the inherent relationship between the internal range modulation clock of the proton therapy system and the radiological depth at the point of measurement. The commissioning of the system, for in-vivo dosimetry and for range verification was separately conducted using anthropomorphic phantom. EBT films and TLDs were used for dose comparisons and range scan of the beam distal fall-off was used as ground truth for range verification. Results: For in-vivo dose measurement, the results were in agreement with TLD and EBT films and were within 3% from treatment planning calculations. For range verification, a precision of 0.5mm is achieved in homogeneous phantoms, and a precision of 2mm for anthropomorphic pelvic phantom, except at points with significant range mixing. Conclusion: We completed the commissioning of our system for in-vivo dosimetry and range verification in proton therapy. The results suggest that the system is ready for clinical trials on patient

  17. 78 FR 50099 - Notice of Inventory Completion: Washington State Parks and Recreation Commission, Olympia, WA

    Science.gov (United States)

    2013-08-16

    ... at the address in this notice by September 16, 2013. ADDRESSES: Alicia Woods, Washington State Parks... Alicia[email protected] . SUPPLEMENTARY INFORMATION: Notice is here given in accordance with the Native... request Alicia Woods, Washington State Parks and Recreation Commission, PO Box 42650, Olympia, WA 98504...

  18. 78 FR 44593 - Notice of Inventory Completion: Washington State Parks and Recreation Commission, Olympia, WA

    Science.gov (United States)

    2013-07-24

    ...: Alicia Woods, Washington State Parks and Recreation Commission, PO Box 42650, Olympia, WA 98504-2650, telephone (360) 902- 0939, email Alicia[email protected] . SUPPLEMENTARY INFORMATION: Notice is here given... written request with information in support of the request to Alicia Woods, Washington State Parks and...

  19. The Commissioning of the LHC Technical Systems

    CERN Document Server

    Saban, R; Baggiolini, V; Ballarino, A; Barbero-Soto, E; Bellesia, B; Bordry, Frederick; Bozzini, D; Casas-Lino, M-P; Chareyre, V; Claudet, S; Coelingh, G-J; Dahlerup-Petersen, K; Denz, R; Fehér, S; Flora, R; Gruwé, M; Kain, V; Kirby, G; Koratzinos, M; Lauckner, R; Le Naour, S; Mess, K-H; Millet, F; Montabonnet, V; Nisbet, D; Perea-Solano, B; Pojer, M; Principe, R; Rabehl, R; Rijllart, A; Redaelli, S; Rodríguez-Mateos, F; Schmidt, R; Serio, L; Siemko, A; Solfaroli-Camillocci, M; Thiesen, H; Venturini, W; Vergara-Fernandez, A; Verweij, A; Zerlauth, M

    2007-01-01

    The LHC is an accelerator with unprecedented complexity where the energy stored in magnets and the beams exceeds other accelerators by one-to-two orders of magnitude. To ensure a safe and efficient machine start-up without being plagued by technical problems, a phase of "hardware commissioning" was introduced: a thorough commissioning of technical systems without beam. This activity started in June 2005 with the commissioning of individual systems, followed by operating a full sector, one eighth of the machine; the commissioning is expected to last until spring 2008 when commissioning with beam will start. The LHC architecture allows the commissioning of each of the eight sectors independently from the others, before the installation of other sectors is complete. An important effort went into the definition of the programme and the organization of the coordination in the field, as well as in the preparation of the tools to record and analyze test results. This paper discusses the experience with this approach...

  20. Hardware malware

    CERN Document Server

    Krieg, Christian

    2013-01-01

    In our digital world, integrated circuits are present in nearly every moment of our daily life. Even when using the coffee machine in the morning, or driving our car to work, we interact with integrated circuits. The increasing spread of information technology in virtually all areas of life in the industrialized world offers a broad range of attack vectors. So far, mainly software-based attacks have been considered and investigated, while hardware-based attacks have attracted comparatively little interest. The design and production process of integrated circuits is mostly decentralized due to

  1. Embedded Hardware

    CERN Document Server

    Ganssle, Jack G; Eady, Fred; Edwards, Lewin; Katz, David J; Gentile, Rick

    2007-01-01

    The Newnes Know It All Series takes the best of what our authors have written to create hard-working desk references that will be an engineer's first port of call for key information, design techniques and rules of thumb. Guaranteed not to gather dust on a shelf!. Circuit design using microcontrollers is both a science and an art. This book covers it all. It details all of the essential theory and facts to help an engineer design a robust embedded system. Processors, memory, and the hot topic of interconnects (I/O) are completely covered. Our authors bring a wealth of experience and ideas; thi

  2. LHC Commissioning and First Operation

    OpenAIRE

    Myers, S

    2010-01-01

    A description is given of the repair of the LHC after the accident of September 2008. The LHC hardware and beam commissioning and initial operation are reviewed both in terms of beam and hardware performance. The implemented machine protection measures and their impact on LHC operation are presented.

  3. COMMISSIONING AND DETECTOR PERFORMANCE GROUPS (DPG)

    CERN Multimedia

    D. Acosta

    Point 5 commissioning activities Since the last CMS week there has been little global commissioning activities: the first mid week global run aiming to assess the status of the hardware and DAQ software after the winter maintenance and developments has taken place two weeks ago involving all subdetectors but tracker and pixel whose hardware is still being actively worked on. The local commissioning restarted once the cooling became available again the third week of January. Below are detailed the main activities which have taken place so far. DAQ The activity of the central DAQ group during pause of global runs was focused on various items. The commissioning of the 900 new PCs which will be used to run the HLT processes has been almost completed. It is planned to use these PCs in the first global run at the start of March. In addition the location of various server PCs which host essential functionalities to get the private ".cms" network going, has been re-organized to allow to implemen...

  4. Introduction to Hardware Security

    Directory of Open Access Journals (Sweden)

    Yier Jin

    2015-10-01

    Full Text Available Hardware security has become a hot topic recently with more and more researchers from related research domains joining this area. However, the understanding of hardware security is often mixed with cybersecurity and cryptography, especially cryptographic hardware. For the same reason, the research scope of hardware security has never been clearly defined. To help researchers who have recently joined in this area better understand the challenges and tasks within the hardware security domain and to help both academia and industry investigate countermeasures and solutions to solve hardware security problems, we will introduce the key concepts of hardware security as well as its relations to related research topics in this survey paper. Emerging hardware security topics will also be clearly depicted through which the future trend will be elaborated, making this survey paper a good reference for the continuing research efforts in this area.

  5. ROS Installation and Commissioning

    CERN Multimedia

    Gorini, B

    The ATLAS Readout group (a sub-group of TDAQ) has now completed the installation and commissioning of all of the Readout System (ROS) units. Event data from ATLAS is initially handled by detector specific hardware and software, but following a Level 1 Accept the data passes from the detector specific Readout Drivers (RODs) to the ROS, the first stage of the central ATLAS DAQ. Within the final ATLAS TDAQ system the ROS stores the data and on request makes it available to the Level 2 Trigger (L2) processors and to the Event Builder (EB) as required. The ROS is implemented as a large number of PCs housing custom built cards (ROBINs) and running custom multi-threaded software. Each ROBIN card (shown below) contains buffer memories to store the data, plus a field programmable gate array ( FPGA ) and an embedded PowerPC processor for management of the memories and data requests, and is implemented as a 64-bit 66 MHz PCI card. Both the software and the ROBIN cards have been designed and developed by the Readout g...

  6. Open Hardware Business Models

    Directory of Open Access Journals (Sweden)

    Edy Ferreira

    2008-04-01

    Full Text Available In the September issue of the Open Source Business Resource, Patrick McNamara, president of the Open Hardware Foundation, gave a comprehensive introduction to the concept of open hardware, including some insights about the potential benefits for both companies and users. In this article, we present the topic from a different perspective, providing a classification of market offers from companies that are making money with open hardware.

  7. Open Hardware Business Models

    OpenAIRE

    Edy Ferreira

    2008-01-01

    In the September issue of the Open Source Business Resource, Patrick McNamara, president of the Open Hardware Foundation, gave a comprehensive introduction to the concept of open hardware, including some insights about the potential benefits for both companies and users. In this article, we present the topic from a different perspective, providing a classification of market offers from companies that are making money with open hardware.

  8. Implicational (semilinear) logics III: completeness properties

    Czech Academy of Sciences Publication Activity Database

    Cintula, Petr; Noguera, Carles

    2018-01-01

    Roč. 57, 3-4 (2018), s. 391-420 ISSN 0933-5846 R&D Projects: GA ČR GA13-14654S EU Projects: European Commission(XE) 689176 - SYSMICS Institutional support: RVO:67985807 ; RVO:67985556 Keywords : abstract algebraic logic * protoalgebraic logics * implicational logics * disjunctional logics * semilinear logics * non-classical logics * completeness theorems * rational completeness Subject RIV: BA - General Mathematics; BA - General Mathematics (UTIA-B) OBOR OECD: Computer science s, information science , bioinformathics (hardware development to be 2.2, social aspect to be 5.8) Impact factor: 0.394, year: 2016

  9. Implicational (semilinear) logics III: completeness properties

    Czech Academy of Sciences Publication Activity Database

    Cintula, Petr; Noguera, Carles

    2018-01-01

    Roč. 57, 3-4 (2018), s. 391-420 ISSN 0933-5846 R&D Projects: GA ČR GA13-14654S EU Projects: European Commission(XE) 689176 - SYSMICS Institutional support: RVO:67985807 ; RVO:67985556 Keywords : abstract algebraic logic * protoalgebraic logics * implicational logics * disjunctional logics * semilinear logics * non-classical logics * completeness theorems * rational completeness Subject RIV: BA - General Mathematics; BA - General Mathematics (UTIA-B) OBOR OECD: Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8) Impact factor: 0.394, year: 2016

  10. Commissioning of the CEBAF cryomodules

    International Nuclear Information System (INIS)

    Drury, M.; Lee, T.; Marshall, J.; Preble, J.; Saulter, Q.; Schneider, W.; Spata, M.; Wiseman, M.

    1993-01-01

    When complete, the Continuous Electron Beam Accelerator Facility will house a 4 GeV recirculating linear accelerator containing 42 1/4 cryomodules arrayed in two antiparallel linacs and an injector. Currently, over half of the cryomodules have been installed. Each cryomodule contains eight superconducting niobium 5-cell rf cavities that operate at 1.497 GHz. A cryomodule must provide an energy gain of 20 MeV to the 200 μA beam. The resultant dynamic heat load must be less than 45 W. The cavity parameters that are measured during the commissioning process include the external Q's of the cavity ports, the unloaded Q (Q 0 ) of the cavity as a function of accelerating gradient, and the maximum operating gradient of the cavity. The sensitivity of the resonant frequency to changes in pressure and gradient is also measured. Finally, the mechanical tuners are cycled and characterized. In all cases, the performance of CEBAF cryomodules has exceeded the design requirements. A portable test stand allows local control of the rf system and provides automated data acquisition. This paper describes the cryomodule commissioning hardware, software, and measurements

  11. Compressor Load Stand: Commissioning and Control Strategies

    National Research Council Canada - National Science Library

    Causey, Andrew

    1998-01-01

    .... The purpose of this research project was to commission this load stand, which includes setting up the hardware, setting up a control system, a data acquisition system, and an automatic test sequence system...

  12. Commissioning for the European XFEL facility

    Science.gov (United States)

    Nölle, D.

    2017-06-01

    The European XFEL is a 4th generation light source based on the Self Amplified Spontaneous Emission (SASE) FreeElectron-Laser concept. It is currently being commissioned in North- Germany. The core installation is a 17.5 GeV superconducting accelerator driving 3 SASE lines with photon energies from 1 to beyond 20 keV range with a maximum of 27.000 pulses per second. The international facility is organized as a limited liability company with shareholders from the contributing countries. DESY has taken over the leadership of the accelerator construction consortium, and will be in charge of the operation of the accelerator complex. The facility was set up with contributions from the 11 shareholder countries, either being hardware systems and/or staff or cash contributions. The construction is almost complete, and the commissioning phase has started by the end of 2015. This contribution will report the status of the accelerator complex with emphasis on the commissioning of the accelerator and an outlook to the commissioning of the SASE 1 FEL line.

  13. Open Hardware at CERN

    CERN Multimedia

    CERN Knowledge Transfer Group

    2015-01-01

    CERN is actively making its knowledge and technology available for the benefit of society and does so through a variety of different mechanisms. Open hardware has in recent years established itself as a very effective way for CERN to make electronics designs and in particular printed circuit board layouts, accessible to anyone, while also facilitating collaboration and design re-use. It is creating an impact on many levels, from companies producing and selling products based on hardware designed at CERN, to new projects being released under the CERN Open Hardware Licence. Today the open hardware community includes large research institutes, universities, individual enthusiasts and companies. Many of the companies are actively involved in the entire process from design to production, delivering services and consultancy and even making their own products available under open licences.

  14. Hardware description languages

    Science.gov (United States)

    Tucker, Jerry H.

    1994-01-01

    Hardware description languages are special purpose programming languages. They are primarily used to specify the behavior of digital systems and are rapidly replacing traditional digital system design techniques. This is because they allow the designer to concentrate on how the system should operate rather than on implementation details. Hardware description languages allow a digital system to be described with a wide range of abstraction, and they support top down design techniques. A key feature of any hardware description language environment is its ability to simulate the modeled system. The two most important hardware description languages are Verilog and VHDL. Verilog has been the dominant language for the design of application specific integrated circuits (ASIC's). However, VHDL is rapidly gaining in popularity.

  15. Hardware protection through obfuscation

    CERN Document Server

    Bhunia, Swarup; Tehranipoor, Mark

    2017-01-01

    This book introduces readers to various threats faced during design and fabrication by today’s integrated circuits (ICs) and systems. The authors discuss key issues, including illegal manufacturing of ICs or “IC Overproduction,” insertion of malicious circuits, referred as “Hardware Trojans”, which cause in-field chip/system malfunction, and reverse engineering and piracy of hardware intellectual property (IP). The authors provide a timely discussion of these threats, along with techniques for IC protection based on hardware obfuscation, which makes reverse-engineering an IC design infeasible for adversaries and untrusted parties with any reasonable amount of resources. This exhaustive study includes a review of the hardware obfuscation methods developed at each level of abstraction (RTL, gate, and layout) for conventional IC manufacturing, new forms of obfuscation for emerging integration strategies (split manufacturing, 2.5D ICs, and 3D ICs), and on-chip infrastructure needed for secure exchange o...

  16. ZEUS hardware control system

    Science.gov (United States)

    Loveless, R.; Erhard, P.; Ficenec, J.; Gather, K.; Heath, G.; Iacovacci, M.; Kehres, J.; Mobayyen, M.; Notz, D.; Orr, R.; Orr, R.; Sephton, A.; Stroili, R.; Tokushuku, K.; Vogel, W.; Whitmore, J.; Wiggers, L.

    1989-12-01

    The ZEUS collaboration is building a system to monitor, control and document the hardware of the ZEUS detector. This system is based on a network of VAX computers and microprocessors connected via ethernet. The database for the hardware values will be ADAMO tables; the ethernet connection will be DECNET, TCP/IP, or RPC. Most of the documentation will also be kept in ADAMO tables for easy access by users.

  17. ZEUS hardware control system

    International Nuclear Information System (INIS)

    Loveless, R.; Erhard, P.; Ficenec, J.; Gather, K.; Heath, G.; Iacovacci, M.; Kehres, J.; Mobayyen, M.; Notz, D.; Orr, R.; Sephton, A.; Stroili, R.; Tokushuku, K.; Vogel, W.; Whitmore, J.; Wiggers, L.

    1989-01-01

    The ZEUS collaboration is building a system to monitor, control and document the hardware of the ZEUS detector. This system is based on a network of VAX computers and microprocessors connected via ethernet. The database for the hardware values will be ADAMO tables; the ethernet connection will be DECNET, TCP/IP, or RPC. Most of the documentation will also be kept in ADAMO tables for easy access by users. (orig.)

  18. Commissioning MMS

    Science.gov (United States)

    Wood, Paul; Gramling, Cheryl; Stone, John; Smith, Patrick; Reiter, Jenifer

    2016-01-01

    This paper discusses commissioning of NASAs Magnetospheric MultiScale (MMS) Mission. The mission includes four identical spacecraft with a large, complex set of instrumentation. The planning for and execution of commissioning for this mission is described. The paper concludes by discussing lessons learned.

  19. Hardware Objects for Java

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Thalinger, Christian; Korsholm, Stephan

    2008-01-01

    Java, as a safe and platform independent language, avoids access to low-level I/O devices or direct memory access. In standard Java, low-level I/O it not a concern; it is handled by the operating system. However, in the embedded domain resources are scarce and a Java virtual machine (JVM) without...... an underlying middleware is an attractive architecture. When running the JVM on bare metal, we need access to I/O devices from Java; therefore we investigate a safe and efficient mechanism to represent I/O devices as first class Java objects, where device registers are represented by object fields. Access...... to those registers is safe as Java’s type system regulates it. The access is also fast as it is directly performed by the bytecodes getfield and putfield. Hardware objects thus provide an object-oriented abstraction of low-level hardware devices. As a proof of concept, we have implemented hardware objects...

  20. Computer hardware fault administration

    Science.gov (United States)

    Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.; Smith, Brian E.

    2010-09-14

    Computer hardware fault administration carried out in a parallel computer, where the parallel computer includes a plurality of compute nodes. The compute nodes are coupled for data communications by at least two independent data communications networks, where each data communications network includes data communications links connected to the compute nodes. Typical embodiments carry out hardware fault administration by identifying a location of a defective link in the first data communications network of the parallel computer and routing communications data around the defective link through the second data communications network of the parallel computer.

  1. Commissioning of the LHC

    CERN Multimedia

    CERN. Geneva

    2007-01-01

    The LHC construction is now approaching the end and it is now time to prepare for commissioning with beam. The behavior of a proton storage ring is much different to that of LEP, which profited from strong radiation damping to keep the beam stable. Our last experience with a hadron collider at CERN goes back more than 15 years when the proton-antiproton collider last operated. Ppbar taught us a lot about the machine physics of bunched beam proton storage rings and was essential input for the design of the LHC. After a short presentation of where we stand today with machine installation and hardware commissioning, I will discuss the main machine physics issues that will have to be dealt with in the LHC.

  2. The VMTG Hardware Description

    CERN Document Server

    Puccio, B

    1998-01-01

    The document describes the hardware features of the CERN Master Timing Generator. This board is the common platform for the transmission of General Timing Machine required by the CERN accelerators. In addition, the paper shows the various jumper options to customise the card which is compliant to the VMEbus standard.

  3. The LASS hardware processor

    International Nuclear Information System (INIS)

    Kunz, P.F.

    1976-01-01

    The problems of data analysis with hardware processors are reviewed and a description is given of a programmable processor. This processor, the 168/E, has been designed for use in the LASS multi-processor system; it has an execution speed comparable to the IBM 370/168 and uses the subset of IBM 370 instructions appropriate to the LASS analysis task. (Auth.)

  4. CERN Neutrino Platform Hardware

    CERN Document Server

    Nelson, Kevin

    2017-01-01

    My summer research was broadly in CERN's neutrino platform hardware efforts. This project had two main components: detector assembly and data analysis work for ICARUS. Specifically, I worked on assembly for the ProtoDUNE project and monitored the safety of ICARUS as it was transported to Fermilab by analyzing the accelerometer data from its move.

  5. RRFC hardware operation manual

    International Nuclear Information System (INIS)

    Abhold, M.E.; Hsue, S.T.; Menlove, H.O.; Walton, G.

    1996-05-01

    The Research Reactor Fuel Counter (RRFC) system was developed to assay the 235 U content in spent Material Test Reactor (MTR) type fuel elements underwater in a spent fuel pool. RRFC assays the 235 U content using active neutron coincidence counting and also incorporates an ion chamber for gross gamma-ray measurements. This manual describes RRFC hardware, including detectors, electronics, and performance characteristics

  6. Commission 1

    African Journals Online (AJOL)

    state" to provide the Commission with information on the measures that they have ...... policies and identify the gaps in ensuring the full realisation of socio- economic .... Boulle L, Harris Band Hoexter C Constitutional and Administrative Law.

  7. Joint Commission

    Science.gov (United States)

    ... for the latest publication of The Joint Commission Journal on Quality and Patient Safety (JQPS). . How We Work Process improvement program breeds quality culture, empowers staff An article in Quality Progress, June ...

  8. Hardware Accelerated Simulated Radiography

    International Nuclear Information System (INIS)

    Laney, D; Callahan, S; Max, N; Silva, C; Langer, S; Frank, R

    2005-01-01

    We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulation codes, and understanding experimental data. The techniques presented take advantage of 32 bit floating point texture capabilities to obtain validated solutions to the radiative transport equation for X-rays. An unsorted hexahedron projection algorithm is presented for curvilinear hexahedra that produces simulated radiographs in the absorption-only regime. A sorted tetrahedral projection algorithm is presented that simulates radiographs of emissive materials. We apply the tetrahedral projection algorithm to the simulation of experimental diagnostics for inertial confinement fusion experiments on a laser at the University of Rochester. We show that the hardware accelerated solution is faster than the current technique used by scientists

  9. Sterilization of space hardware.

    Science.gov (United States)

    Pflug, I. J.

    1971-01-01

    Discussion of various techniques of sterilization of space flight hardware using either destructive heating or the action of chemicals. Factors considered in the dry-heat destruction of microorganisms include the effects of microbial water content, temperature, the physicochemical properties of the microorganism and adjacent support, and nature of the surrounding gas atmosphere. Dry-heat destruction rates of microorganisms on the surface, between mated surface areas, or buried in the solid material of space vehicle hardware are reviewed, along with alternative dry-heat sterilization cycles, thermodynamic considerations, and considerations of final sterilization-process design. Discussed sterilization chemicals include ethylene oxide, formaldehyde, methyl bromide, dimethyl sulfoxide, peracetic acid, and beta-propiolactone.

  10. Hardware characteristic and application

    International Nuclear Information System (INIS)

    Gu, Dong Hyeon

    1990-03-01

    The contents of this book are system board on memory, performance, system timer system click and specification, coprocessor such as programing interface and hardware interface, power supply on input and output, protection for DC output, Power Good signal, explanation on 84 keyboard and 101/102 keyboard,BIOS system, 80286 instruction set and 80287 coprocessor, characters, keystrokes and colors, communication and compatibility of IBM personal computer on application direction, multitasking and code for distinction of system.

  11. LHC Report: The shutdown work nearing completion

    CERN Multimedia

    CERN Bulletin

    2011-01-01

    The work planned for the LHC injector chain during the winter shutdown is nearing completion. The PS Booster (PSB) and PS will be closed to access next week, and the control of machine access will be transferred to the CERN Control Centre in preparation for the resumption of machine operation. Hardware tests are being performed in all the machines.   Tests are under way in the LHC tunnel. The technical teams are putting the finishing touches to the work planned for the winter shutdown. At the Linac2, the PS Booster and the PS, work will be completed next week and hardware tests will be carried out soon after. POPS, the new powering system for the PS, will be commissioned for the first time in the coming days after the necessary preliminary tests have been carried out. At the SPS, various magnets have been replaced over recent weeks and the performance tests on the main power supply and other hardware tests will be able to start shortly. After that, the machine will be ready for operation with b...

  12. Digital Hardware Design Teaching: An Alternative Approach

    Science.gov (United States)

    Benkrid, Khaled; Clayton, Thomas

    2012-01-01

    This article presents the design and implementation of a complete review of undergraduate digital hardware design teaching in the School of Engineering at the University of Edinburgh. Four guiding principles have been used in this exercise: learning-outcome driven teaching, deep learning, affordability, and flexibility. This has identified…

  13. Preparing accelerator systems for the RHIC sextant commissioning

    International Nuclear Information System (INIS)

    Trbojevic, D.; Pilat, F.; Ahrens, L.

    1997-01-01

    The Relativistic Heavy Ion Collider (RHIC) construction is progressing steadily towards completion in 1999 when beams will circulate in both collider rings. One of the major tests of the RHIC project was the commissioning of the first sextant with gold ion beams in early 1997. This is a report on preparation of the RHIC accelerator systems for the first sextant test. It includes beam position monitors, timing, injection correction through the magnetic septum and kickers, current transformers, flags and the ionization beam profile monitors, beam loss monitors, beam and quench permit link system, power supply controls, and the configuration database system. The software and hardware development and coordination of the different systems before commissioning were regularly checked during bi-weekly, and (later) weekly, progress report meetings

  14. A Scalable Approach for Hardware Semiformal Verification

    OpenAIRE

    Grimm, Tomas; Lettnin, Djones; Hübner, Michael

    2018-01-01

    The current verification flow of complex systems uses different engines synergistically: virtual prototyping, formal verification, simulation, emulation and FPGA prototyping. However, none is able to verify a complete architecture. Furthermore, hybrid approaches aiming at complete verification use techniques that lower the overall complexity by increasing the abstraction level. This work focuses on the verification of complex systems at the RT level to handle the hardware peculiarities. Our r...

  15. COMPUTER HARDWARE MARKING

    CERN Multimedia

    Groupe de protection des biens

    2000-01-01

    As part of the campaign to protect CERN property and for insurance reasons, all computer hardware belonging to the Organization must be marked with the words 'PROPRIETE CERN'.IT Division has recently introduced a new marking system that is both economical and easy to use. From now on all desktop hardware (PCs, Macintoshes, printers) issued by IT Division with a value equal to or exceeding 500 CHF will be marked using this new system.For equipment that is already installed but not yet marked, including UNIX workstations and X terminals, IT Division's Desktop Support Service offers the following services free of charge:Equipment-marking wherever the Service is called out to perform other work (please submit all work requests to the IT Helpdesk on 78888 or helpdesk@cern.ch; for unavoidable operational reasons, the Desktop Support Service will only respond to marking requests when these coincide with requests for other work such as repairs, system upgrades, etc.);Training of personnel designated by Division Leade...

  16. Foundations of hardware IP protection

    CERN Document Server

    Torres, Lionel

    2017-01-01

    This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection against hardware Trojan, use of secure element, ultra-lightweight cryptography, and digital rights management. This book serves as a single-source reference to design space exploration of hardware security and IP protection. · Provides readers with a comprehensive overview of hardware intellectual property (IP) security, describing threat models and presenting means of protection, from integrated circuit layout to digital rights management of IP; · Enables readers to transpose techniques fundamental to digital rights management (DRM) to the realm of hardware IP security; · Introduce designers to the concept of salutar...

  17. Open hardware for open science

    CERN Multimedia

    CERN Bulletin

    2011-01-01

    Inspired by the open source software movement, the Open Hardware Repository was created to enable hardware developers to share the results of their R&D activities. The recently published CERN Open Hardware Licence offers the legal framework to support this knowledge and technology exchange.   Two years ago, a group of electronics designers led by Javier Serrano, a CERN engineer, working in experimental physics laboratories created the Open Hardware Repository (OHR). This project was initiated in order to facilitate the exchange of hardware designs across the community in line with the ideals of “open science”. The main objectives include avoiding duplication of effort by sharing results across different teams that might be working on the same need. “For hardware developers, the advantages of open hardware are numerous. For example, it is a great learning tool for technologies some developers would not otherwise master, and it avoids unnecessary work if someone ha...

  18. Hardware implementation of the ORNL fissile mass flow monitor

    International Nuclear Information System (INIS)

    McEvers, J.; Sumner, J.; Jones, R.; Ferrell, R.; Martin, C.; Uckan, T.; March-Leuba, J.

    1998-01-01

    This paper provides an overall description of the implementation of the Oak Ridge National Laboratory (ORNL) Fissile Mass Flow Monitor, which is part of a Blend Down Monitoring System (BDMS) developed by the US Department of Energy (DOE). The Fissile Mass Flow Monitor is designed to measure the mass flow of fissile material through a gaseous or liquid process stream. It consists of a source-modulator assembly, a detector assembly, and a cabinet that houses all control, data acquisition, and supporting electronics equipment. The development of this flow monitor was first funded by DOE/NE in September 95, and an initial demonstration by ORNL was described in previous INMM meetings. This methodology was chosen by DOE/NE for implementation in November 1996, and the hardware/software development is complete. Successful BDMS installation and operation of the complete BDMS has been demonstrated in the Paducah Gaseous Diffusion Plant (PGDP), which is operated by Lockheed Martin Utility Services, Inc. for the US Enrichment Corporation and regulated by the Nuclear Regulatory Commission. Equipment for two BDMS units has been shipped to the Russian Federation

  19. The LHC from commissioning to operation

    CERN Document Server

    Lamont, M

    2011-01-01

    In 2011 the LHC moved from commissioning into the physics production phase with the aim of accumulating 1 fb-1 by the end of the year. The progress from commissioning to operation is described. Emphasis is put on the beam performance, but also on the performance of the different hardware systems. The role of collimation and machine protection is discussed, in view of the very high stored beam and magnet energy.

  20. Hardware Support for Embedded Java

    DEFF Research Database (Denmark)

    Schoeberl, Martin

    2012-01-01

    The general Java runtime environment is resource hungry and unfriendly for real-time systems. To reduce the resource consumption of Java in embedded systems, direct hardware support of the language is a valuable option. Furthermore, an implementation of the Java virtual machine in hardware enables...... worst-case execution time analysis of Java programs. This chapter gives an overview of current approaches to hardware support for embedded and real-time Java....

  1. HARDWARE TROJAN IDENTIFICATION AND DETECTION

    OpenAIRE

    Samer Moein; Fayez Gebali; T. Aaron Gulliver; Abdulrahman Alkandari

    2017-01-01

    ABSTRACT The majority of techniques developed to detect hardware trojans are based on specific attributes. Further, the ad hoc approaches employed to design methods for trojan detection are largely ineffective. Hardware trojans have a number of attributes which can be used to systematically develop detection techniques. Based on this concept, a detailed examination of current trojan detection techniques and the characteristics of existing hardware trojans is presented. This is used to dev...

  2. Hardware assisted hypervisor introspection.

    Science.gov (United States)

    Shi, Jiangyong; Yang, Yuexiang; Tang, Chuan

    2016-01-01

    In this paper, we introduce hypervisor introspection, an out-of-box way to monitor the execution of hypervisors. Similar to virtual machine introspection which has been proposed to protect virtual machines in an out-of-box way over the past decade, hypervisor introspection can be used to protect hypervisors which are the basis of cloud security. Virtual machine introspection tools are usually deployed either in hypervisor or in privileged virtual machines, which might also be compromised. By utilizing hardware support including nested virtualization, EPT protection and #BP, we are able to monitor all hypercalls belongs to the virtual machines of one hypervisor, include that of privileged virtual machine and even when the hypervisor is compromised. What's more, hypercall injection method is used to simulate hypercall-based attacks and evaluate the performance of our method. Experiment results show that our method can effectively detect hypercall-based attacks with some performance cost. Lastly, we discuss our furture approaches of reducing the performance cost and preventing the compromised hypervisor from detecting the existence of our introspector, in addition with some new scenarios to apply our hypervisor introspection system.

  3. LHCb: Hardware Data Injector

    CERN Multimedia

    Delord, V; Neufeld, N

    2009-01-01

    The LHCb High Level Trigger and Data Acquisition system selects about 2 kHz of events out of the 1 MHz of events, which have been selected previously by the first-level hardware trigger. The selected events are consolidated into files and then sent to permanent storage for subsequent analysis on the Grid. The goal of the upgrade of the LHCb readout is to lift the limitation to 1 MHz. This means speeding up the DAQ to 40 MHz. Such a DAQ system will certainly employ 10 Gigabit or technologies and might also need new networking protocols: a customized TCP or proprietary solutions. A test module is being presented, which integrates in the existing LHCb infrastructure. It is a 10-Gigabit traffic generator, flexible enough to generate LHCb's raw data packets using dummy data or simulated data. These data are seen as real data coming from sub-detectors by the DAQ. The implementation is based on an FPGA using 10 Gigabit Ethernet interface. This module is integrated in the experiment control system. The architecture, ...

  4. Hardware for soft computing and soft computing for hardware

    CERN Document Server

    Nedjah, Nadia

    2014-01-01

    Single and Multi-Objective Evolutionary Computation (MOEA),  Genetic Algorithms (GAs), Artificial Neural Networks (ANNs), Fuzzy Controllers (FCs), Particle Swarm Optimization (PSO) and Ant colony Optimization (ACO) are becoming omnipresent in almost every intelligent system design. Unfortunately, the application of the majority of these techniques is complex and so requires a huge computational effort to yield useful and practical results. Therefore, dedicated hardware for evolutionary, neural and fuzzy computation is a key issue for designers. With the spread of reconfigurable hardware such as FPGAs, digital as well as analog hardware implementations of such computation become cost-effective. The idea behind this book is to offer a variety of hardware designs for soft computing techniques that can be embedded in any final product. Also, to introduce the successful application of soft computing technique to solve many hard problem encountered during the design of embedded hardware designs. Reconfigurable em...

  5. FY1995 evolvable hardware chip; 1995 nendo shinkasuru hardware chip

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-03-01

    This project aims at the development of 'Evolvable Hardware' (EHW) which can adapt its hardware structure to the environment to attain better hardware performance, under the control of genetic algorithms. EHW is a key technology to explore the new application area requiring real-time performance and on-line adaptation. 1. Development of EHW-LSI for function level hardware evolution, which includes 15 DSPs in one chip. 2. Application of the EHW to the practical industrial applications such as data compression, ATM control, digital mobile communication. 3. Two patents : (1) the architecture and the processing method for programmable EHW-LSI. (2) The method of data compression for loss-less data, using EHW. 4. The first international conference for evolvable hardware was held by authors: Intl. Conf. on Evolvable Systems (ICES96). It was determined at ICES96 that ICES will be held every two years between Japan and Europe. So the new society has been established by us. (NEDO)

  6. BROOKHAVEN: Booster commissioned

    Energy Technology Data Exchange (ETDEWEB)

    Bleser, Ed

    1992-03-15

    The construction and first commissioning phase of the Booster synchrotron to inject into Brookhaven's veteran Alternating Gradient Synchrotron (AGS) were completed last year. Scheduled to come into operation this year, the new Booster will extend the research capabilities AGS, and with its ability to accelerate partially stripped heavy ions will play an essential role in the chain of accelerators serving the Relativistic Heavy Ion Collider (RHIC)

  7. Secure coupling of hardware components

    NARCIS (Netherlands)

    Hoepman, J.H.; Joosten, H.J.M.; Knobbe, J.W.

    2011-01-01

    A method and a system for securing communication between at least a first and a second hardware components of a mobile device is described. The method includes establishing a first shared secret between the first and the second hardware components during an initialization of the mobile device and,

  8. Computer hardware for radiologists: Part I

    Directory of Open Access Journals (Sweden)

    Indrajit I

    2010-01-01

    Full Text Available Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM, Picture Archiving and Communication System (PACS, Radiology information system (RIS technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU, the chipset, the random access memory (RAM, the memory modules, bus, storage drives, and ports. The personnel computer (PC has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs. The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called "buses". The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute "programs". A Pentium® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration.

  9. Computer hardware for radiologists: Part I

    International Nuclear Information System (INIS)

    Indrajit, IK; Alam, A

    2010-01-01

    Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM), Picture Archiving and Communication System (PACS), Radiology information system (RIS) technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU), the chipset, the random access memory (RAM), the memory modules, bus, storage drives, and ports. The personnel computer (PC) has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs). The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called “buses”. The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute “programs”. A Pentium ® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM) is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration

  10. COMMISSIONING AND DETECTOR PERFORMANCE GROUPS

    CERN Document Server

    T. Camporesi

    P5 Commissioning activities The commissioning effort at the pit has made major progress since the last CMS week concerning the installation and operation of the off-detector electronics in USC. The progress has been much slower in the experi¬mental cavern due to the delay in the deployment of the infrastructure which should eventually allow safe powering-up of the front ends. Nevertheless, temporary power connections have allowed operation of slices of subdetectors at any given time. HF, HE, ECAL, DTs, RPCs and CSCs have carried out local commissioning tests with these temporary services. The status of hardware deployment in USC and on the towers/balconies is represented in the detailed table below.   Table 1: Status of installation of off-detector electronics. FEDs are detector dependent hardware modules which perform the first ‘colla¬tion’ of front-end data and send it to Central-data for event building. Tracker, ECAL, HCAL have their front end electronics mo...

  11. COMMISSIONING AND DETECTOR PERFORMANCE GROUPS

    CERN Multimedia

    T. Camporesi

    The central commissioning activities have concentrated mostly in the Service cavern. Since early February the central DAQ has been ready to accept connections from FEDs from the various partitions. This has triggered a campaign from all subdetectors to install their readout crates in USC55. Systematic tests of the connections between FEDs and Central DAQ have been scheduled and to date more than 70% of all FED connections have been successfully tested from almost all subdetectors. In March the Level 1 trigger team started deployment of their hardware followed by a campaign of testing the connections between Trigger primitive generators and the corresponding LV1 hardware (Regional Calorimeter Trigger and Global Muon Trigger). The functionality tests are continuing to date by pattern tests of increasing complexity. In April the central DAQ was ready to start FED system tests, which amounts to testing the data reading and trans¬fer-ability from the FEDs to the Filter Units (with or without an actual ...

  12. COMMISSIONING AND DETECTOR PERFORMANCE GROUPS (DPG)

    CERN Multimedia

    Tiziano Camporesi

    Pit commissioning activities The last 4 months have seen various major achievements in hardware commissioning, global data taking, readiness of the DPGs to deal with LHC data flows and alignment and calibration workflows. Since February, the global commissioning has been characterized on the one side by more and more of the final CMS detector becoming available for global readout and triggering and on the other side by consolidation of many of the central software infrastructure and of most of the services infrastructure. The reliability of services like cooling, power, gas has markedly improved with respect to what we observed in the second half of 2007.   Of particular note are the delivery of all low voltage power supplies, the commissioning of the final power distribution, the progressive commissioning ( still ongoing)  of the Detector Safety System and of the associated DCS early warning and alarm system. On the detector side, while already we are used to seeing all of HCAL being exe...

  13. NDAS Hardware Translation Layer Development

    Science.gov (United States)

    Nazaretian, Ryan N.; Holladay, Wendy T.

    2011-01-01

    The NASA Data Acquisition System (NDAS) project is aimed to replace all DAS software for NASA s Rocket Testing Facilities. There must be a software-hardware translation layer so the software can properly talk to the hardware. Since the hardware from each test stand varies, drivers for each stand have to be made. These drivers will act more like plugins for the software. If the software is being used in E3, then the software should point to the E3 driver package. If the software is being used at B2, then the software should point to the B2 driver package. The driver packages should also be filled with hardware drivers that are universal to the DAS system. For example, since A1, A2, and B2 all use the Preston 8300AU signal conditioners, then the driver for those three stands should be the same and updated collectively.

  14. Hardware for dynamic quantum computing.

    Science.gov (United States)

    Ryan, Colm A; Johnson, Blake R; Ristè, Diego; Donovan, Brian; Ohki, Thomas A

    2017-10-01

    We describe the hardware, gateware, and software developed at Raytheon BBN Technologies for dynamic quantum information processing experiments on superconducting qubits. In dynamic experiments, real-time qubit state information is fed back or fed forward within a fraction of the qubits' coherence time to dynamically change the implemented sequence. The hardware presented here covers both control and readout of superconducting qubits. For readout, we created a custom signal processing gateware and software stack on commercial hardware to convert pulses in a heterodyne receiver into qubit state assignments with minimal latency, alongside data taking capability. For control, we developed custom hardware with gateware and software for pulse sequencing and steering information distribution that is capable of arbitrary control flow in a fraction of superconducting qubit coherence times. Both readout and control platforms make extensive use of field programmable gate arrays to enable tailored qubit control systems in a reconfigurable fabric suitable for iterative development.

  15. COMMISSIONING AND DETECTOR PERFORMANCE GROUPS

    CERN Multimedia

    D. Acosta

    The commissioning effort is presently addressing two main areas: the commissioning of the hardware components at the pit and the coordination of the activities of the newly constituted Detector Performance groups (DPGs). At point 5, a plan regarding the service cavern and the commissioning of the connections of the off-detector electronics (for the data collection line and trigger primitive generation) to the central DAQ and the central Trigger has been defined. This activity was started early February and will continue until May. It began with Tracker electronics followed so far by HCAL and CSC. The goal is to have by May every detector commission, as much as possible, their data transfer paths from FED to Central DAQ as well as their trigger setups between TPGs and Global Level 1 trigger. The next focus is on connections of front-ends to the service cavern. This depends strongly on the installations of services. Presently the only detector which has its link fibers connected to the off-detector electr...

  16. FY1995 evolvable hardware chip; 1995 nendo shinkasuru hardware chip

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-03-01

    This project aims at the development of 'Evolvable Hardware' (EHW) which can adapt its hardware structure to the environment to attain better hardware performance, under the control of genetic algorithms. EHW is a key technology to explore the new application area requiring real-time performance and on-line adaptation. 1. Development of EHW-LSI for function level hardware evolution, which includes 15 DSPs in one chip. 2. Application of the EHW to the practical industrial applications such as data compression, ATM control, digital mobile communication. 3. Two patents : (1) the architecture and the processing method for programmable EHW-LSI. (2) The method of data compression for loss-less data, using EHW. 4. The first international conference for evolvable hardware was held by authors: Intl. Conf. on Evolvable Systems (ICES96). It was determined at ICES96 that ICES will be held every two years between Japan and Europe. So the new society has been established by us. (NEDO)

  17. Commissioning the SNO+ Detector

    Science.gov (United States)

    Caden, E.; Coulter, I.; SNO+ Collaboration

    2017-09-01

    SNO+ is a multipurpose liquid scintillator neutrino experiment based at SNOLAB in Sudbury, Ontario, Canada. The experiment’s main physics goal is a search for neutrinoless double beta decay in Tellurium-130, but SNO+ will also study low energy solar neutrinos, geo- and reactor-antineutrinos, among other topics. We are reusing much of the hardware from the original SNO experiment, but significant work has taken place to transform the heavy water detector into a liquid scintillator detector. We present upgrades and improvements to the read-out electronics and trigger system to handle the higher data rates expected by a scintillator experiment. We show the successful installation and testing of a hold-down rope net for the acrylic vessel to counter-act the buoyancy of organic liquid scintillator. We also describe the new scintillator process plant and cover gas systems that have been constructed to achieve the purification necessary to meet our physics goals. We are currently commissioning the experiment with ultra-pure water in preparation for filling with scintillator in early 2017 and present the current status of this work.

  18. Hardware Development Process for Human Research Facility Applications

    Science.gov (United States)

    Bauer, Liz

    2000-01-01

    The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. The source of hardware requirements is the science community and HRF program. The HRF Science Working Group, consisting of SCientists from various medical disciplines, defined a basic set of equipment with functional requirements. This established the performance requirements of the hardware. HRF program requirements focus on making the hardware safe and operational in a space environment. This includes structural, thermal, human factors, and material requirements. Science and HRF program requirements are defined in a hardware requirements document which includes verification methods. Once the hardware is fabricated, requirements are verified by inspection, test, analysis, or demonstration. All data is compiled and reviewed to certify the hardware for flight. Obviously, the basis for all hardware development activities is requirement definition. Full and complete requirement definition is ideal prior to initiating the hardware development. However, this is generally not the case, but the hardware team typically has functional inputs as a guide. The first step is for engineers to conduct market research based on the functional inputs provided by scientists. CommerCially available products are evaluated against the science requirements as

  19. A Hardware Lab Anywhere At Any Time

    Directory of Open Access Journals (Sweden)

    Tobias Schubert

    2004-12-01

    Full Text Available Scientific technical courses are an important component in any student's education. These courses are usually characterised by the fact that the students execute experiments in special laboratories. This leads to extremely high costs and a reduction in the maximum number of possible participants. From this traditional point of view, it doesn't seem possible to realise the concepts of a Virtual University in the context of sophisticated technical courses since the students must be "on the spot". In this paper we introduce the so-called Mobile Hardware Lab which makes student participation possible at any time and from any place. This lab nevertheless transfers a feeling of being present in a laboratory. This is accomplished with a special Learning Management System in combination with hardware components which correspond to a fully equipped laboratory workstation that are lent out to the students for the duration of the lab. The experiments are performed and solved at home, then handed in electronically. Judging and marking are also both performed electronically. Since 2003 the Mobile Hardware Lab is now offered in a completely web based form.

  20. The ATLAS Inner Detector commissioning and calibration

    CERN Document Server

    Aad, G.; Abdallah, J.; Abdelalim, A.A.; Abdesselam, A.; Abdinov, O.; Abi, B.; Abolins, M.; Abramowicz, H.; Abreu, H.; Acharya, B.S.; Adams, D.L.; Addy, T.N.; Adelman, J.; Adorisio, C.; Adragna, P.; Adye, T.; Aefsky, S.; Aguilar-Saavedra, J.A.; Aharrouche, M.; Ahlen, S.P.; Ahles, F.; Ahmad, A.; Ahsan, M.; Aielli, G.; Akdogan, T.; Akesson, T.P.A.; Akimoto, G.; Akimov, A.V.; Aktas, A.; Alam, M.S.; Alam, M.A.; Albert, J.; Albrand, S.; Aleksa, M.; Aleksandrov, I.N.; Alexa, C.; Alexander, G.; Alexandre, G.; Alexopoulos, T.; Alhroob, M.; Aliev, M.; Alimonti, G.; Alison, J.; Aliyev, M.; Allport, P.P.; Allwood-Spiers, S.E.; Almond, J.; Aloisio, A.; Alon, R.; Alonso, A.; Alviggi, M.G.; Amako, K.; Amelung, C.; Amorim, A.; Amoros, G.; Amram, N.; Anastopoulos, C.; Andeen, T.; Anders, C.F.; Anderson, K.J.; Andreazza, A.; Andrei, V.; Anduaga, X.S.; Angerami, A.; Anghinolfi, F.; Anjos, N.; Annovi, A.; Antonaki, A.; Antonelli, M.; Antonelli, S.; Antos, J.; Antunovic, B.; Anulli, F.; Aoun, S.; Arabidze, G.; Aracena, I.; Arai, Y.; Arce, A.T.H.; Archambault, J.P.; Arfaoui, S.; Arguin, J-F.; Argyropoulos, T.; Arik, M.; Armbruster, A.J.; Arnaez, O.; Arnault, C.; Artamonov, A.; Arutinov, D.; Asai, M.; Asai, S.; Asfandiyarov, R.; Ask, S.; Asman, B.; Asner, D.; Asquith, L.; Assamagan, K.; Astbury, A.; Astvatsatourov, A.; Atoian, G.; Auerbach, B.; Augsten, K.; Aurousseau, M.; Austin, N.; Avolio, G.; Avramidou, R.; Axen, D.; Ay, C.; Azuelos, G.; Azuma, Y.; Baak, M.A.; Bach, A.M.; Bachacou, H.; Bachas, K.; Backes, M.; Badescu, E.; Bagnaia, P.; Bai, Y.; Bain, T.; Baines, J.T.; Baker, O.K.; Baker, M.D.; Baker, S.; Baltasar Dos, F.Santos Pedrosa; Banas, E.; Banerjee, P.; Banerjee, S.; Banfi, D.; Bangert, A.; Bansal, V.; Baranov, S.P.; Baranov, S.; Barashkou, A.; Barber, T.; Barberio, E.L.; Barberis, D.; Barbero, M.; Bardin, D.Y.; Barillari, T.; Barisonzi, M.; Barklow, T.; Barlow, N.; Barnett, B.M.; Barnett, R.M.; Baroncelli, A.; Barr, A.J.; Barreiro, F.; Guimara, J.Barreiro; Barrillon, P.; Bartoldus, R.; Bartsch, D.; Bates, R.L.; Batkova, L.; Batley, J.R.; Battaglia, A.; Battistin, M.; Bauer, F.; Bawa, H.S.; Bazalova, M.; Beare, B.; Beau, T.; Beauchemin, P.H.; Beccherle, R.; Bechtle, P.; Beck, G.A.; Beck, H.P.; Beckingham, M.; Becks, K.H.; Beddall, A.J.; Beddall, A.; Bednyakov, V.A.; Bee, C.; Begel, M.; Behar Harpaz, S.; Behera, P.K.; Beimforde, M.; Belanger-Champagne, C.; Bell, P.J.; Bell, W.H.; Bella, G.; Bellagamba, L.; Bellina, F.; Bellomo, M.; Belloni, A.; Belotskiy, K.; Beltramello, O.; Ben Ami, S.; Benary, O.; Benchekroun, D.; Bendel, M.; Benedict, B.H.; Benekos, N.; Benhammou, Y.; Benincasa, G.P.; Benjamin, D.P.; Benoit, M.; Bensinger, J.R.; Benslama, K.; Bentvelsen, S.; Beretta, M.; Berge, D.; Bergeaas Kuutmann, E.; Berger, N.; Berghaus, F.; Berglund, E.; Beringer, J.; Bernat, P.; Bernhard, R.; Bernius, C.; Berry, T.; Bertin, A.; Besana, M.I.; Besson, N.; Bethke, S.; Bianchi, R.M.; Bianco, M.; Biebel, O.; Biesiada, J.; Biglietti, M.; Bilokon, H.; Bindi, M.; Binet, S.; Bingul, A.; Bini, C.; Biscarat, C.; Bitenc, U.; Black, K.M.; Blair, R.E.; Blanchard, J-B.; Blanchot, G.; Blocker, C.; Blondel, A.; Blum, W.; Blumenschein, U.; Bobbink, G.J.; Bocci, A.; Boehler, M.; Boek, J.; Boelaert, N.; Boser, S.; Bogaerts, J.A.; Bohm, C.; Bohm, J.; Boisvert, V.; Bold, T.; Boldea, V.; Bondarenko, V.G.; Bondioli, M.; Boonekamp, M.; Bordoni, S.; Borer, C.; Borisov, A.; Borissov, G.; Borjanovic, I.; Borroni, S.; Bos, K.; Boscherini, D.; Bosman, M.; Boterenbrood, H.; Bouchami, J.; Boudreau, J.; Bouhova-Thacker, E.V.; Boulahouache, C.; Bourdarios, C.; Boveia, A.; Boyd, J.; Boyko, I.R.; Bozovic-Jelisavcic, I.; Bracinik, J.; Braem, A.; Branchini, P.; Brandenburg, G.W.; Brandt, A.; Brandt, G.; Brandt, O.; Bratzler, U.; Brau, B.; Brau, J.E.; Braun, H.M.; Brelier, B.; Bremer, J.; Brenner, R.; Bressler, S.; Britton, D.; Brochu, F.M.; Brock, I.; Brock, R.; Brodet, E.; Bromberg, C.; Brooijmans, G.; Brooks, W.K.; Brown, G.; Bruckman de Renstrom, P.A.; Bruncko, D.; Bruneliere, R.; Brunet, S.; Bruni, A.; Bruni, G.; Bruschi, M.; Bucci, F.; Buchanan, J.; Buchholz, P.; Buckley, A.G.; Budagov, I.A.; Budick, B.; Buscher, V.; Bugge, L.; Bulekov, O.; Bunse, M.; Buran, T.; Burckhart, H.; Burdin, S.; Burgess, T.; Burke, S.; Busato, E.; Bussey, P.; Buszello, C.P.; Butin, F.; Butler, B.; Butler, J.M.; Buttar, C.M.; Butterworth, J.M.; Byatt, T.; Caballero, J.; Urban, S.Cabrera; Caforio, D.; Cakir, O.; Calafiura, P.; Calderini, G.; Calfayan, P.; Calkins, R.; Caloba, L.P.; Calvet, D.; Camarri, P.; Cameron, D.; Campana, S.; Campanelli, M.; Canale, V.; Canelli, F.; Canepa, A.; Cantero, J.; Capasso, L.; Capeans Garrido, M.D.M.; Caprini, I.; Caprini, M.; Capua, M.; Caputo, R.; Caramarcu, C.; Cardarelli, R.; Carli, T.; Carlino, G.; Carminati, L.; Caron, B.; Caron, S.; Carrillo Montoya, G.D.; Carron Montero, S.; Carter, A.A.; Carter, J.R.; Carvalho, J.; Casadei, D.; Casado, M.P.; Cascella, M.; Castaneda Hernadez, A.M.; Castaneda-Miranda, E.; Castillo Gimenez, V.; Castro, N.F.; Cataldi, G.; Catinaccio, A.; Catmore, J.R.; Cattai, A.; Cattani, G.; Caughron, S.; Cauz, D.; Cavalleri, P.; Cavalli, D.; Cavalli-Sforza, M.; Cavasinni, V.; Ceradini, F.; Cerqueira, A.S.; Cerri, A.; Cerrito, L.; Cerutti, F.; Cetin, S.A.; Chafaq, A.; Chakraborty, D.; Chan, K.; Chapman, J.D.; Chapman, J.W.; Chareyre, E.; Charlton, D.G.; Chavda, V.; Cheatham, S.; Chekanov, S.; Chekulaev, S.V.; Chelkov, G.A.; Chen, H.; Chen, S.; Chen, X.; Cheplakov, A.; Chepurnov, V.F.; Cherkaoui El, R.Moursli; Tcherniatine, V.; Chesneanu, D.; Cheu, E.; Cheung, S.L.; Chevalier, L.; Chevallier, F.; Chiarella, V.; Chiefari, G.; Chikovani, L.; Childers, J.T.; Chilingarov, A.; Chiodini, G.; Chizhov, V.; Choudalakis, G.; Chouridou, S.; Christidi, I.A.; Christov, A.; Chromek-Burckhart, D.; Chu, M.L.; Chudoba, J.; Ciapetti, G.; Ciftci, A.K.; Ciftci, R.; Cinca, D.; Cindro, V.; Ciobotaru, M.D.; Ciocca, C.; Ciocio, A.; Cirilli, M.; Citterio, M.; Clark, A.; Clark, P.J.; Cleland, W.; Clemens, J.C.; Clement, B.; Clement, C.; Coadou, Y.; Cobal, M.; Coccaro, A.; Cochran, J.; Coggeshall, J.; Cogneras, E.; Colijn, A.P.; Collard, C.; Collins, N.J.; Collins-Tooth, C.; Collot, J.; Colon, G.; Muino, P.Conde; Coniavitis, E.; Conidi, M.C.; Consonni, M.; Constantinescu, S.; Conta, C.; Conventi, F.; Cooke, M.; Cooper, B.D.; Cooper-Sarkar, A.M.; Cooper-Smith, N.J.; Copic, K.; Cornelissen, T.; Corradi, M.; Corriveau, F.; Corso-Radu, A.; Cortes-Gonzalez, A.; Cortiana, G.; Costa, G.; Costa, M.J.; Costanzo, D.; Costin, T.; Cote, D.; Coura Torres, R.; Courneyea, L.; Cowan, G.; Cowden, C.; Cox, B.E.; Cranmer, K.; Cranshaw, J.; Cristinziani, M.; Crosetti, G.; Crupi, R.; Crepe-Renaudin, S.; Cuenca Almenar, C.; Cuhadar Donszelmann, T.; Curatolo, M.; Curtis, C.J.; Cwetanski, P.; Czyczula, Z.; D'Auria, S.; D'Onofrio, M.; D'Orazio, A.; Da Via, C.; Dabrowski, W.; Dai, T.; Dallapiccola, C.; Dam, M.; Danielsson, H.O.; Dannheim, D.; Dao, V.; Darbo, G.; Darlea, G.L.; Davey, W.; Davidek, T.; Davidson, N.; Davidson, R.; Davies, M.; Davison, A.R.; Dawson, I.; Daya, R.K.; De, K.; de Asmundis, R.; De Castro, S.; De Castro, P.E.Faria Salgado; De Cecco, S.; de Graat, J.; De Groot, N.; de Jong, P.; De Mora, L.; De Oliveira, M.Branco; De Pedis, D.; De Salvo, A.; De Sanctis, U.; De Santo, A.; De Vivie De Regie, J.B.; De Zorzi, G.; Dean, S.; Dedovich, D.V.; Degenhardt, J.; Dehchar, M.; Del Papa, C.; Del Peso, J.; Del Prete, T.; Dell'Acqua, A.; Dell'Asta, L.; Della Pietra, M.; della Volpe, D.; Delmastro, M.; Delsart, P.A.; Deluca, C.; Demers, S.; Demichev, M.; Demirkoz, B.; Deng, J.; Deng, W.; Denisov, S.P.; Derkaoui, J.E.; Derue, F.; Dervan, P.; Desch, K.; Deviveiros, P.O.; Dewhurst, A.; DeWilde, B.; Dhaliwal, S.; Dhullipudi, R.; Di Ciaccio, A.; Di Ciaccio, L.; Di Domenico, A.; Di Girolamo, A.; Di Girolamo, B.; Di Luise, S.; Di Mattia, A.; Di Nardo, R.; Di Simone, A.; Di Sipio, R.; Diaz, M.A.; Diblen, F.; Diehl, E.B.; Dietrich, J.; Dietzsch, T.A.; Diglio, S.; Dindar Yagci, K.; Dingfelder, D.J.; Dionisi, C.; Dita, P.; Dita, S.; Dittus, F.; Djama, F.; Djilkibaev, R.; Djobava, T.; Vale, M.A.B.do; Do Valle, A.Wemans; Doan, T.K.O.; Dobos, D.; Dobson, E.; Dobson, M.; Doglioni, C.; Doherty, T.; Dolejsi, J.; Dolenc, I.; Dolezal, Z.; Dolgoshein, B.A.; Dohmae, T.; Donega, M.; Donini, J.; Dopke, J.; Doria, A.; Dos Anjos, A.; Dotti, A.; Dova, M.T.; Doxiadis, A.; Doyle, A.T.; Drasal, Z.; Dris, M.; Dubbert, J.; Duchovni, E.; Duckeck, G.; Dudarev, A.; Dudziak, F.; Duhrssen, M.; Duflot, L.; Dufour, M-A.; Dunford, M.; Duran Yildiz, H.; Dushkin, A.; Duxfield, R.; Dwuznik, M.; Duren, M.; Ebenstein, W.L.; Ebke, J.; Eckweiler, S.; Edmonds, K.; Edwards, C.A.; Egorov, K.; Ehrenfeld, W.; Ehrich, T.; Eifert, T.; Eigen, G.; Einsweiler, K.; Eisenhandler, E.; Ekelof, T.; El Kacimi, M.; Ellert, M.; Elles, S.; Ellinghaus, F.; Ellis, K.; Ellis, N.; Elmsheuser, J.; Elsing, M.; Emeliyanov, D.; Engelmann, R.; Engl, A.; Epp, B.; Eppig, A.; Erdmann, J.; Ereditato, A.; Eriksson, D.; Ermoline, I.; Ernst, J.; Ernst, M.; Ernwein, J.; Errede, D.; Errede, S.; Ertel, E.; Escalier, M.; Escobar, C.; Espinal Curull, X.; Esposito, B.; Etienvre, A.I.; Etzion, E.; Evans, H.; Fabbri, L.; Fabre, C.; Facius, K.; Fakhrutdinov, R.M.; Falciano, S.; Fang, Y.; Fanti, M.; Farbin, A.; Farilla, A.; Farley, J.; Farooque, T.; Farrington, S.M.; Farthouat, P.; Fassnacht, P.; Fassouliotis, D.; Fatholahzadeh, B.; Fayard, L.; Fayette, F.; Febbraro, R.; Federic, P.; Fedin, O.L.; Fedorko, W.; Feligioni, L.; Felzmann, C.U.; Feng, C.; Feng, E.J.; Fenyuk, A.B.; Ferencei, J.; Ferland, J.; Fernandes, B.; Fernando, W.; Ferrag, S.; Ferrando, J.; Ferrara, V.; Ferrari, A.; Ferrari, P.; Ferrari, R.; Ferrer, A.; Ferrer, M.L.; Ferrere, D.; Ferretti, C.; Fiascaris, M.; Fiedler, F.; Filipcic, A.; Filippas, A.; Filthaut, F.; Fincke-Keeler, M.; Fiolhais, M.C.N.; Fiorini, L.; Firan, A.; Fischer, G.; Fisher, M.J.; Flechl, M.; Fleck, I.; Fleckner, J.; Fleischmann, P.; Fleischmann, S.; Flick, T.; Flores Castillo, L.R.; Flowerdew, M.J.; Fonseca Martin, T.; Formica, A.; Forti, A.; Fortin, D.; Fournier, D.; Fowler, A.J.; Fowler, K.; Fox, H.; Francavilla, P.; Franchino, S.; Francis, D.; Franklin, M.; Franz, S.; Fraternali, M.; Fratina, S.; Freestone, J.; French, S.T.; Froeschl, R.; Froidevaux, D.; Frost, J.A.; Fukunaga, C.; Fullana Torregrosa, E.; Fuster, J.; Gabaldon, C.; Gabizon, O.; Gadfort, T.; Gadomski, S.; Gagliardi, G.; Gagnon, P.; Galea, C.; Gallas, E.J.; Gallo, V.; Gallop, B.J.; Gallus, P.; Galyaev, E.; Gan, K.K.; Gao, Y.S.; Gaponenko, A.; Garcia-Sciveres, M.; Garcia, C.; Navarro, J.E.Garcia; Gardner, R.W.; Garelli, N.; Garitaonandia, H.; Garonne, V.; Gatti, C.; Gaudio, G.; Gauzzi, P.; Gavrilenko, I.L.; Gay, C.; Gaycken, G.; Gazis, E.N.; Ge, P.; Gee, C.N.P.; Geich-Gimbel, Ch.; Gellerstedt, K.; Gemme, C.; Genest, M.H.; Gentile, S.; Georgatos, F.; George, S.; Gershon, A.; Ghazlane, H.; Ghodbane, N.; Giacobbe, B.; Giagu, S.; Giakoumopoulou, V.; Giangiobbe, V.; Gianotti, F.; Gibbard, B.; Gibson, A.; Gibson, S.M.; Gilbert, L.M.; Gilchriese, M.; Gilewsky, V.; Gingrich, D.M.; Ginzburg, J.; Giokaris, N.; Giordani, M.P.; Giordano, R.; Giorgi, F.M.; Giovannini, P.; Giraud, P.F.; Girtler, P.; Giugni, D.; Giusti, P.; Gjelsten, B.K.; Gladilin, L.K.; Glasman, C.; Glazov, A.; Glitza, K.W.; Glonti, G.L.; Godfrey, J.; Godlewski, J.; Goebel, M.; Gopfert, T.; Goeringer, C.; Gossling, C.; Gottfert, T.; Goggi, V.; Goldfarb, S.; Goldin, D.; Golling, T.; Gomes, A.; Gomez Fajardo, L.S.; Goncalo, R.; Gonella, L.; Gong, C.; Gonzalez de la Hoz, S.; Gonzalez Silva, M.L.; Gonzalez-Sevilla, S.; Goodson, J.J.; Goossens, L.; Gordon, H.A.; Gorelov, I.; Gorfine, G.; Gorini, B.; Gorini, E.; Gorisek, A.; Gornicki, E.; Gosdzik, B.; Gosselink, M.; Gostkin, M.I.; Gough Eschrich, I.; Gouighri, M.; Goujdami, D.; Goulette, M.P.; Goussiou, A.G.; Goy, C.; Grabowska-Bold, I.; Grafstrom, P.; Grahn, K-J.; Grancagnolo, S.; Grassi, V.; Gratchev, V.; Grau, N.; Gray, H.M.; Gray, J.A.; Graziani, E.; Green, B.; Greenshaw, T.; Greenwood, Z.D.; Gregor, I.M.; Grenier, P.; Griesmayer, E.; Griffiths, J.; Grigalashvili, N.; Grillo, A.A.; Grimm, K.; Grinstein, S.; Grishkevich, Y.V.; Groh, M.; Groll, M.; Gross, E.; Grosse-Knetter, J.; Groth-Jensen, J.; Grybel, K.; Guicheney, C.; Guida, A.; Guillemin, T.; Guler, H.; Gunther, J.; Guo, B.; Gusakov, Y.; Gutierrez, A.; Gutierrez, P.; Guttman, N.; Gutzwiller, O.; Guyot, C.; Gwenlan, C.; Gwilliam, C.B.; Haas, A.; Haas, S.; Haber, C.; Hadavand, H.K.; Hadley, D.R.; Haefner, P.; Hartel, R.; Hajduk, Z.; Hakobyan, H.; Haller, J.; Hamacher, K.; Hamilton, A.; Hamilton, S.; Han, L.; Hanagaki, K.; Hance, M.; Handel, C.; Hanke, P.; Hansen, J.R.; Hansen, J.B.; Hansen, J.D.; Hansen, P.H.; Hansl-Kozanecka, T.; Hansson, P.; Hara, K.; Hare, G.A.; Harenberg, T.; Harrington, R.D.; Harris, O.M.; Harrison, K.; Hartert, J.; Hartjes, F.; Harvey, A.; Hasegawa, S.; Hasegawa, Y.; Hashemi, K.; Hassani, S.; Haug, S.; Hauschild, M.; Hauser, R.; Havranek, M.; Hawkes, C.M.; Hawkings, R.J.; Hayakawa, T.; Hayward, H.S.; Haywood, S.J.; Head, S.J.; Hedberg, V.; Heelan, L.; Heim, S.; Heinemann, B.; Heisterkamp, S.; Helary, L.; Heller, M.; Hellman, S.; Helsens, C.; Hemperek, T.; Henderson, R.C.W.; Henke, M.; Henrichs, A.; Henriques Correia, A.M.; Henrot-Versille, S.; Hensel, C.; Henss, T.; Hernandez Jimenez, Y.; Hershenhorn, A.D.; Herten, G.; Hertenberger, R.; Hervas, L.; Hessey, N.P.; Higon-Rodriguez, E.; Hill, J.C.; Hiller, K.H.; Hillert, S.; Hillier, S.J.; Hinchliffe, I.; Hines, E.; Hirose, M.; Hirsch, F.; Hirschbuehl, D.; Hobbs, J.; Hod, N.; Hodgkinson, M.C.; Hodgson, P.; Hoecker, A.; Hoeferkamp, M.R.; Hoffman, J.; Hoffmann, D.; Hohlfeld, M.; Holy, T.; Holzbauer, J.L.; Homma, Y.; Horazdovsky, T.; Hori, T.; Horn, C.; Horner, S.; Horvat, S.; Hostachy, J-Y.; Hou, S.; Hoummada, A.; Howe, T.; Hrivnac, J.; Hryn'ova, T.; Hsu, P.J.; Hsu, S.C.; Huang, G.S.; Hubacek, Z.; Hubaut, F.; Huegging, F.; Huffman, T.B.; Hughes, E.W.; Hughes, G.; Hurwitz, M.; Husemann, U.; Huseynov, N.; Huston, J.; Huth, J.; Iacobucci, G.; Iakovidis, G.; Ibragimov, I.; Iconomidou-Fayard, L.; Idarraga, J.; Iengo, P.; Igonkina, O.; Ikegami, Y.; Ikeno, M.; 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Schwienhorst, R.; Schwierz, R.; Schwindling, J.; Scott, W.G.; Searcy, J.; Sedykh, E.; Segura, E.; Seidel, S.C.; Seiden, A.; Seifert, F.; Seixas, J.M.; Sekhniaidze, G.; Seliverstov, D.M.; Sellden, B.; Semprini-Cesari, N.; Serfon, C.; Serin, L.; Seuster, R.; Severini, H.; Sevior, M.E.; Sfyrla, A.; Shabalina, E.; Shamim, M.; Shan, L.Y.; Shank, J.T.; Shao, Q.T.; Shapiro, M.; Shatalov, P.B.; Shaw, K.; Sherman, D.; Sherwood, P.; Shibata, A.; Shimojima, M.; Shin, T.; Shmeleva, A.; Shochet, M.J.; Shupe, M.A.; Sicho, P.; Sidoti, A.; Siegert, F.; Siegrist, J.; Sijacki, Dj.; Silbert, O.; Silva, J.; Silver, Y.; Silverstein, D.; Silverstein, S.B.; Simak, V.; Simic, Lj.; Simion, S.; Simmons, B.; Simonyan, M.; Sinervo, P.; Sinev, N.B.; Sipica, V.; Siragusa, G.; Sisakyan, A.N.; Sivoklokov, S.Yu.; Sjoelin, J.; Sjursen, T.B.; Skovpen, K.; Skubic, P.; Slater, M.; Slavicek, T.; Sliwa, K.; Sloper, J.; Sluka, T.; Smakhtin, V.; Smirnov, S.Yu.; Smirnov, Y.; Smirnova, L.N.; Smirnova, O.; Smith, B.C.; Smith, D.; Smith, K.M.; Smizanska, M.; Smolek, K.; Snesarev, A.A.; Snow, S.W.; Snow, J.; Snuverink, J.; Snyder, S.; Soares, M.; Sobie, R.; Sodomka, J.; Soffer, A.; Solans, C.A.; Solar, M.; Solc, J.; Solfaroli Camillocci, E.; Solodkov, A.A.; Solovyanov, O.V.; Soluk, R.; Sondericker, J.; Sopko, V.; Sopko, B.; Sosebee, M.; Soukharev, A.; Spagnolo, S.; Spano, F.; Spencer, E.; Spighi, R.; Spigo, G.; Spila, F.; Spiwoks, R.; Spousta, M.; Spreitzer, T.; Spurlock, B.; Denis, R.D.St.; Stahl, T.; Stahlman, J.; Stamen, R.; Stancu, S.N.; Stanecka, E.; Stanek, R.W.; Stanescu, C.; Stapnes, S.; Starchenko, E.A.; Stark, J.; Staroba, P.; Starovoitov, P.; Stastny, J.; Stavina, P.; Steele, G.; Steinbach, P.; Steinberg, P.; Stekl, I.; Stelzer, B.; Stelzer, H.J.; Stelzer-Chilton, O.; Stenzel, H.; Stevenson, K.; Stewart, G.; Stockton, M.C.; Stoerig, K.; Stoicea, G.; Stonjek, S.; Strachota, P.; Stradling, A.R.; Straessner, A.; Strandberg, J.; Strandberg, S.; Strandlie, A.; Strauss, M.; Strizenec, P.; Strohmer, R.; Strom, D.M.; Stroynowski, R.; Strube, J.; Stugu, B.; Sturm, P.; Soh, D.A.; Su, D.; Sugaya, Y.; Sugimoto, T.; Suhr, C.; Suk, M.; Sulin, V.V.; Sultansoy, S.; Sumida, T.; Sun, X.H.; Sundermann, J.E.; Suruliz, K.; Sushkov, S.; Susinno, G.; Sutton, M.R.; Suzuki, T.; Suzuki, Y.; Sykora, I.; Sykora, T.; Szymocha, T.; Sanchez, J.; Ta, D.; Tackmann, K.; Taffard, A.; Tafirout, R.; Taga, A.; Takahashi, Y.; Takai, H.; Takashima, R.; Takeda, H.; Takeshita, T.; Talby, M.; Talyshev, A.; Tamsett, M.C.; Tanaka, J.; Tanaka, R.; Tanaka, S.; Tanaka, S.; Tapprogge, S.; Tardif, D.; Tarem, S.; Tarrade, F.; Tartarelli, G.F.; Tas, P.; Tasevsky, M.; Tassi, E.; Tatarkhanov, M.; Taylor, C.; Taylor, F.E.; Taylor, G.N.; Taylor, R.P.; Taylor, W.; Teixeira-Dias, P.; Ten Kate, H.; Teng, P.K.; Tennenbaum-Katan, Y.D.; Terada, S.; Terashi, K.; Terron, J.; Terwort, M.; Testa, M.; Teuscher, R.J.; Therhaag, J.; Thioye, M.; Thoma, S.; Thomas, J.P.; Thompson, E.N.; Thompson, P.D.; Thompson, P.D.; Thompson, R.J.; Thompson, A.S.; Thomson, E.; Thun, R.P.; Tic, T.; Tikhomirov, V.O.; Tikhonov, Y.A.; Tipton, P.; Tique Aires, F.J.Viegas; Tisserant, S.; Toczek, B.; Todorov, T.; Todorova-Nova, S.; Toggerson, B.; Tojo, J.; Tokar, S.; Tokushuku, K.; Tollefson, K.; Tomasek, L.; Tomasek, M.; Tomoto, M.; Tompkins, L.; Toms, K.; Tonoyan, A.; Topfel, C.; Topilin, N.D.; Torchiani, I.; Torrence, E.; Pastor, E.Torro; Toth, J.; Touchard, F.; Tovey, D.R.; Trefzger, T.; Tremblet, L.; Tricoli, A.; Trigger, I.M.; Trincaz-Duvoid, S.; Trinh, T.N.; Tripiana, M.F.; Triplett, N.; Trischuk, W.; Trivedi, A.; Trocme, B.; Troncon, C.; Trzupek, A.; Tsarouchas, C.; Tseng, J.C-L.; Tsiakiris, M.; Tsiareshka, P.V.; Tsionou, D.; Tsipolitis, G.; Tsiskaridze, V.; Tskhadadze, E.G.; Tsukerman, I.I.; Tsulaia, V.; Tsung, J.W.; Tsuno, S.; Tsybychev, D.; Tuggle, J.M.; Turecek, D.; Turk Cakir, I.; Turlay, E.; Tuts, P.M.; Twomey, M.S.; Tylmad, M.; Tyndel, M.; Uchida, K.; Ueda, I.; Ueno, R.; Ugland, M.; Uhlenbrock, M.; Uhrmacher, M.; Ukegawa, F.; Unal, G.; Undrus, A.; Unel, G.; Unno, Y.; Urbaniec, D.; Urkovsky, E.; Urquijo, P.; Urrejola, P.; Usai, G.; Uslenghi, M.; Vacavant, L.; Vacek, V.; Vachon, B.; Vahsen, S.; Valente, P.; Valentinetti, S.; Valkar, S.; Valladolid Gallego, E.; Vallecorsa, S.; Valls Ferrer, J.A.; Van Berg, R.; van der Graaf, H.; van der Kraaij, E.; van der Poel, E.; van der Ster, D.; van Eldik, N.; van Gemmeren, P.; van Kesteren, Z.; van Vulpen, I.; Vandelli, W.; Vaniachine, A.; Vankov, P.; Vannucci, F.; Vari, R.; Varnes, E.W.; Varouchas, D.; Vartapetian, A.; Varvell, K.E.; Vasilyeva, L.; Vassilakopoulos, V.I.; Vazeille, F.; Vellidis, C.; Veloso, F.; Veneziano, S.; Ventura, A.; Ventura, D.; Venturi, M.; Venturi, N.; Vercesi, V.; Verducci, M.; Verkerke, W.; Vermeulen, J.C.; Vetterli, M.C.; Vichou, I.; Vickey, T.; Viehhauser, G.H.A.; Villa, M.; Villani, E.G.; Villaplana Perez, M.; Vilucchi, E.; Vincter, M.G.; Vinek, E.; Vinogradov, V.B.; Viret, S.; Virzi, J.; Vitale, A.; Vitells, O.; Vivarelli, I.; Vives Vaque, F.; Vlachos, S.; Vlasak, M.; Vlasov, N.; Vogel, A.; Vokac, P.; Volpi, M.; von der Schmitt, H.; von Loeben, J.; von Radziewski, H.; von Toerne, E.; Vorobel, V.; Vorwerk, V.; Vos, M.; Voss, R.; Voss, T.T.; Vossebeld, J.H.; Vranjes, N.; Vranjes Milosavljevic, M.; Vrba, V.; Vreeswijk, M.; Vu Anh, T.; Vudragovic, D.; Vuillermet, R.; Vukotic, I.; Wagner, P.; Walbersloh, J.; Walder, J.; Walker, R.; Walkowiak, W.; Wall, R.; Wang, C.; Wang, H.; Wang, J.; Wang, S.M.; Warburton, A.; Ward, C.P.; Warsinsky, M.; Wastie, R.; Watkins, P.M.; Watson, A.T.; Watson, M.F.; Watts, G.; Watts, S.; Waugh, A.T.; Waugh, B.M.; Weber, M.D.; Weber, M.; Weber, M.S.; Weber, P.; Weidberg, A.R.; Weingarten, J.; Weiser, C.; Wellenstein, H.; Wells, P.S.; Wen, M.; Wenaus, T.; Wendler, S.; Wengler, T.; Wenig, S.; Wermes, N.; Werner, M.; Werner, P.; Werth, M.; Werthenbach, U.; Wessels, M.; Whalen, K.; White, A.; White, M.J.; White, S.; Whitehead, S.R.; Whiteson, D.; Whittington, D.; Wicek, F.; Wicke, D.; Wickens, F.J.; Wiedenmann, W.; Wielers, M.; Wienemann, P.; Wiglesworth, C.; Wiik, L.A.M.; Wildauer, A.; Wildt, M.A.; Wilkens, H.G.; Williams, E.; Williams, H.H.; Willocq, S.; Wilson, J.A.; Wilson, M.G.; Wilson, A.; Wingerter-Seez, I.; Winklmeier, F.; Wittgen, M.; Wolter, M.W.; Wolters, H.; Wosiek, B.K.; Wotschack, J.; Woudstra, M.J.; Wraight, K.; Wright, C.; Wright, D.; Wrona, B.; Wu, S.L.; Wu, X.; Wulf, E.; Wynne, B.M.; Xaplanteris, L.; Xella, S.; Xie, S.; Xu, D.; Xu, N.; Yamada, M.; Yamamoto, A.; Yamamoto, K.; Yamamoto, S.; Yamamura, T.; Yamaoka, J.; Yamazaki, T.; Yamazaki, Y.; Yan, Z.; Yang, H.; Yang, U.K.; Yang, Z.; Yao, W-M.; Yao, Y.; Yasu, Y.; Ye, J.; Ye, S.; Yilmaz, M.; Yoosoofmiya, R.; Yorita, K.; Yoshida, R.; Young, C.; Youssef, S.P.; Yu, D.; Yu, J.; Yuan, L.; Yurkewicz, A.; Zaidan, R.; Zaitsev, A.M.; Zajacova, Z.; Zambrano, V.; Zanello, L.; Zaytsev, A.; Zeitnitz, C.; Zeller, M.; Zemla, A.; Zendler, C.; Zenin, O.; Zenis, T.; Zenonos, Z.; Zenz, S.; Zerwas, D.; della Porta, G.Zevi; Zhan, Z.; Zhang, H.; Zhang, J.; Zhang, Q.; Zhang, X.; Zhao, L.; Zhao, T.; Zhao, Z.; Zhemchugov, A.; Zhong, J.; Zhou, B.; Zhou, N.; Zhou, Y.; Zhu, C.G.; Zhu, H.; Zhu, Y.; Zhuang, X.; Zhuravlov, V.; Zimmermann, R.; Zimmermann, S.; Zimmermann, S.; Ziolkowski, M.; Zivkovic, L.; Zobernig, G.; Zoccoli, A.; zur Nedden, M.

    2010-01-01

    The ATLAS Inner Detector is a composite tracking system consisting of silicon pixels, silicon strips and straw tubes in a 2 T magnetic field. Its installation was completed in August 2008 and the detector took part in data- taking with single LHC beams and cosmic rays. The initial detector operation, hardware commissioning and in-situ calibrations are described. Tracking performance has been measured with 7.6 million cosmic-ray events, collected using a tracking trigger and reconstructed with modular pattern-recognition and fitting software. The intrinsic hit efficiency and tracking trigger efficiencies are close to 100%. Lorentz angle measurements for both electrons and holes, specific energy-loss calibration and transition radiation turn-on measurements have been performed. Different alignment techniques have been used to reconstruct the detector geometry. After the initial alignment, a transverse impact parameter resolution of 22.1+/-0.9 {\\mu}m and a relative momentum resolution {\\sigma}p/p = (4.83+/-0.16)...

  1. Raspberry Pi hardware projects 1

    CERN Document Server

    Robinson, Andrew

    2013-01-01

    Learn how to take full advantage of all of Raspberry Pi's amazing features and functions-and have a blast doing it! Congratulations on becoming a proud owner of a Raspberry Pi, the credit-card-sized computer! If you're ready to dive in and start finding out what this amazing little gizmo is really capable of, this ebook is for you. Taken from the forthcoming Raspberry Pi Projects, Raspberry Pi Hardware Projects 1 contains three cool hardware projects that let you have fun with the Raspberry Pi while developing your Raspberry Pi skills. The authors - PiFace inventor, Andrew Robinson and Rasp

  2. Hardware standardization for embedded systems

    International Nuclear Information System (INIS)

    Sharma, M.K.; Kalra, Mohit; Patil, M.B.; Mohanty, Ashutos; Ganesh, G.; Biswas, B.B.

    2010-01-01

    Reactor Control Division (RCnD) has been one of the main designers of safety and safety related systems for power reactors. These systems have been built using in-house developed hardware. Since the present set of hardware was designed long ago, a need was felt to design a new family of hardware boards. A Working Group on Electronics Hardware Standardization (WG-EHS) was formed with an objective to develop a family of boards, which is general purpose enough to meet the requirements of the system designers/end users. RCnD undertook the responsibility of design, fabrication and testing of boards for embedded systems. VME and a proprietary I/O bus were selected as the two system buses. The boards have been designed based on present day technology and components. The intelligence of these boards has been implemented on FPGA/CPLD using VHDL. This paper outlines the various boards that have been developed with a brief description. (author)

  3. Commodity hardware and software summary

    International Nuclear Information System (INIS)

    Wolbers, S.

    1997-04-01

    A review is given of the talks and papers presented in the Commodity Hardware and Software Session at the CHEP97 conference. An examination of the trends leading to the consideration of PC's for HEP is given, and a status of the work that is being done at various HEP labs and Universities is given

  4. BIOLOGICALLY INSPIRED HARDWARE CELL ARCHITECTURE

    DEFF Research Database (Denmark)

    2010-01-01

    Disclosed is a system comprising: - a reconfigurable hardware platform; - a plurality of hardware units defined as cells adapted to be programmed to provide self-organization and self-maintenance of the system by means of implementing a program expressed in a programming language defined as DNA...... language, where each cell is adapted to communicate with one or more other cells in the system, and where the system further comprises a converter program adapted to convert keywords from the DNA language to a binary DNA code; where the self-organisation comprises that the DNA code is transmitted to one...... or more of the cells, and each of the one or more cells is adapted to determine its function in the system; where if a fault occurs in a first cell and the first cell ceases to perform its function, self-maintenance is performed by that the system transmits information to the cells that the first cell has...

  5. Hardware-Accelerated Simulated Radiography

    International Nuclear Information System (INIS)

    Laney, D; Callahan, S; Max, N; Silva, C; Langer, S.; Frank, R

    2005-01-01

    We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulation codes, and understanding experimental data. The techniques presented take advantage of 32-bit floating point texture capabilities to obtain solutions to the radiative transport equation for X-rays. The hardware accelerated solutions are accurate enough to enable scientists to explore the experimental design space with greater efficiency than the methods currently in use. An unsorted hexahedron projection algorithm is presented for curvilinear hexahedral meshes that produces simulated radiographs in the absorption-only regime. A sorted tetrahedral projection algorithm is presented that simulates radiographs of emissive materials. We apply the tetrahedral projection algorithm to the simulation of experimental diagnostics for inertial confinement fusion experiments on a laser at the University of Rochester

  6. The principles of computer hardware

    CERN Document Server

    Clements, Alan

    2000-01-01

    Principles of Computer Hardware, now in its third edition, provides a first course in computer architecture or computer organization for undergraduates. The book covers the core topics of such a course, including Boolean algebra and logic design; number bases and binary arithmetic; the CPU; assembly language; memory systems; and input/output methods and devices. It then goes on to cover the related topics of computer peripherals such as printers; the hardware aspects of the operating system; and data communications, and hence provides a broader overview of the subject. Its readable, tutorial-based approach makes it an accessible introduction to the subject. The book has extensive in-depth coverage of two microprocessors, one of which (the 68000) is widely used in education. All chapters in the new edition have been updated. Major updates include: powerful software simulations of digital systems to accompany the chapters on digital design; a tutorial-based introduction to assembly language, including many exam...

  7. Commissioning the GTA accelerator

    International Nuclear Information System (INIS)

    Sander, O.R.; Atkins, W.H.; Bolme, G.O.; Bowling, S.; Brown, S.; Cole, R.; Gilpatrick, J.D.; Garnett, R.; Guy, F.W.; Ingalls, W.B.; Johnson, K.F.; Kerstiens, D.; Little, C.; Lohsen, R.A.; Lloyd, S.; Lysenko, W.P.; Mottershead, C.T.; Neuschaefer, G.; Power, J.; Rusthoi, D.P.; Sandoval, D.P.; Stevens, R.R.; Vaughn, G.; Wadlinger, E.A.; Connolly, R.; Weiss, R.; Saadatmand, K.

    1992-01-01

    The Ground Test Accelerator (GTA) is being used to resolve the physics and engineering issues related to accelerating, focusing, and steering a high-brightness, high-current H - beam and then neutralizing it. The goal is to produce a 24 MeV, 50 mA device with a 2% duty factor. Specific features of the GTA -- injector, beam optics, rf linac structures, diagnostics, control and rf power systems are described. The first four steps in commissioning have been completed. The RFQ predicted and measured performances are in good agreement; however, the transmission is lower than specifications. Input emittance is larger than design specifications and increases the effects of image charge and multipoles. Displacement of steering magnets in either the horizontal or vertical plane caused beam displacements in both planes. It is suspected that quadrupole rotation is the cause of the coupled motion. 9 figs., 5 tabs., 11 refs

  8. SSCL Commissioning and Operations

    International Nuclear Information System (INIS)

    1992-01-01

    The SSC, with an energy of 20 TeV/Beam, requires a sequence of individual accelerators of increasing energy in the injector chain. These are the Linac, Low Energy Booster, Medium Energy Booster, and High Energy Booster. Each accelerator system must be completed in sequence in order to provide beam to the next higher energy accelerator. The collider itself is comprised of ten sectors, each of which in terms of superconducting magnet bending strength, is equivalent to two HEB injectors. The completion of all injectors and collider sectors is required before stored beams can circulate in preparation for colliding beam operation. Four experimental halls are planned for the detector systems. Each major detector will be assembled in one of the halls by a world-wide collaboration of scientists. In addition, above ground facilities provide shops and test facilities for accelerator technical systems, superconducting magnet and materials research and development, and for detector assembly and operations. The purpose of this report is to present a plan for the sequential commissioning and operation of these individual accelerators and other technical facilities of the SSC. A central objective of this plan is to describe the activities at the SSCL that are not included as part of the construction project TPC, even though they occur during the overall project construction time-frame. Examples of such activities include the operation of general laboratory facilities and services not specifically related to construction, the operating costs for the individual accelerators in the injector chain once these facilities have been commissioned, and the costs of SSCL physics research groups. The Department of Energy has provided the following decision with regard to these operations categories for the SSCL

  9. Hunting for hardware changes in data centres

    International Nuclear Information System (INIS)

    Coelho dos Santos, M; Steers, I; Szebenyi, I; Xafi, A; Barring, O; Bonfillou, E

    2012-01-01

    With many servers and server parts the environment of warehouse sized data centres is increasingly complex. Server life-cycle management and hardware failures are responsible for frequent changes that need to be managed. To manage these changes better a project codenamed “hardware hound” focusing on hardware failure trending and hardware inventory has been started at CERN. By creating and using a hardware oriented data set - the inventory - with detailed information on servers and their parts as well as tracking changes to this inventory, the project aims at, for example, being able to discover trends in hardware failure rates.

  10. Fast image processing on parallel hardware

    International Nuclear Information System (INIS)

    Bittner, U.

    1988-01-01

    Current digital imaging modalities in the medical field incorporate parallel hardware which is heavily used in the stage of image formation like the CT/MR image reconstruction or in the DSA real time subtraction. In order to image post-processing as efficient as image acquisition, new software approaches have to be found which take full advantage of the parallel hardware architecture. This paper describes the implementation of two-dimensional median filter which can serve as an example for the development of such an algorithm. The algorithm is analyzed by viewing it as a complete parallel sort of the k pixel values in the chosen window which leads to a generalization to rank order operators and other closely related filters reported in literature. A section about the theoretical base of the algorithm gives hints for how to characterize operations suitable for implementations on pipeline processors and the way to find the appropriate algorithms. Finally some results that computation time and usefulness of medial filtering in radiographic imaging are given

  11. Construction and commissioning of the national synchrotron light source

    International Nuclear Information System (INIS)

    Galayda, J.N.; Blume, M.

    1985-01-01

    The road from conception to completion of a large facility like the National Synchrotron Light Source (NSLS) is a long and tortuous one. More than fifteen years have passed since the first discussions of a synchrotron radiation source at BNL, and there have been many twists and turns in the process. In putting together an accelerator project like this, there are many critical skills that must be assembled, and budgets, schedules and organizations must be properly examined. The lessons learned in design and commissioning of the NSLS rings may be summarized as follows: (1) the damped emittances expected of a Chasman-Green lattice are attainable at high current, if ion trapping problems can be circumvented; (2) there have been no unexpected effects from the rather strong sextupoles required to correct the chromaticities in this type of lattice; (3) the most important beam instabilities are coupled-bunch, and can be counteracted; and (4) commissioning the NSLS rings was mostly an effort to bring the hardware into conformation with the original ring design; achievement of the specified magnetic fields, injection timing, vacuum, RF voltages, etc. led to ring performance which was easily good enough to begin operation

  12. Startup and commissioning of pressurized water reactors

    International Nuclear Information System (INIS)

    Albert, L.J.; Gilbert, C.F.

    1983-05-01

    A critical phase of plant development is the test, startup, and commissioning period. The effort expended prior to commissioning has a definite effect on the reliability and continuing availability of the plant during its life. This paper describes a test, startup, and commissioning program for a pressurized water reactor (PWR) plant. This program commences with the completion of construction and continues through the turnover of equipment/systems to the owner's startup/ commissioning group. The paper addresses the organization of the test/startup group, planning and scheduling, test procedures and initial testing, staffing and certification of the test group, training of operators, and turnover to the owner

  13. Commissioning (Phases 4, 4A, 4B)

    National Research Council Canada - National Science Library

    Schofield, Andrew

    1997-01-01

    Phase 4 marked the completion of ANS&A's commitments under the BAA, as the new large centrifuge at the Waterways Experiment Station was commissioned and a series of research experiments were undertaken to demonstrate the breadth of new...

  14. Qualification of software and hardware

    International Nuclear Information System (INIS)

    Gossner, S.; Schueller, H.; Gloee, G.

    1987-01-01

    The qualification of on-line process control equipment is subdivided into three areas: 1) materials and structural elements; 2) on-line process-control components and devices; 3) electrical systems (reactor protection and confinement system). Microprocessor-aided process-control equipment are difficult to verify for failure-free function owing to the complexity of the functional structures of the hardware and to the variety of the software feasible for microprocessors. Hence, qualification will make great demands on the inspecting expert. (DG) [de

  15. Commissioning of the LHC Beam Transfer Line TI 8

    International Nuclear Information System (INIS)

    Uythoven, J.A.; Arduini, G.; Goddard, B.; Jacquet, D.; Kain, V.; Lamont, M.; Mertens, V.; Spinks, A.; Wenninger, J.; Chao, Y.-C.

    2005-01-01

    The first of the two LHC transfer lines was commissioned in autumn 2004. Beam reached an absorber block located some 2.5 km downstream of the SPS extraction point at the first shot, without the need of any threading. The hardware preparation and commissioning phase will be summarized, followed by a description of the beam tests and their results regarding optics and other line parameters, including the experience gained with beam instrumentation, the control system and the machine protection equipment

  16. Door Hardware and Installations; Carpentry: 901894.

    Science.gov (United States)

    Dade County Public Schools, Miami, FL.

    The curriculum guide outlines a course designed to provide instruction in the selection, preparation, and installation of hardware for door assemblies. The course is divided into five blocks of instruction (introduction to doors and hardware, door hardware, exterior doors and jambs, interior doors and jambs, and a quinmester post-test) totaling…

  17. Travel Software using GPU Hardware

    CERN Document Server

    Szalwinski, Chris M; Dimov, Veliko Atanasov; CERN. Geneva. ATS Department

    2015-01-01

    Travel is the main multi-particle tracking code being used at CERN for the beam dynamics calculations through hadron and ion linear accelerators. It uses two routines for the calculation of space charge forces, namely, rings of charges and point-to-point. This report presents the studies to improve the performance of Travel using GPU hardware. The studies showed that the performance of Travel with the point-to-point simulations of space-charge effects can be speeded up at least 72 times using current GPU hardware. Simple recompilation of the source code using an Intel compiler can improve performance at least 4 times without GPU support. The limited memory of the GPU is the bottleneck. Two algorithms were investigated on this point: repeated computation and tiling. The repeating computation algorithm is simpler and is the currently recommended solution. The tiling algorithm was more complicated and degraded performance. Both build and test instructions for the parallelized version of the software are inclu...

  18. Commissioning of closed loop controls at CPP, HWP, Manuguru (Paper No. 3.5)

    International Nuclear Information System (INIS)

    Basu, Sukumar; Narasimham, P.L.

    1992-01-01

    The captive power plant (CPP) for Heavy Water Plant, Manuguru is equipped with 3x265 T/hr steam capacity boilers. The control system is built around ASEA master hardware for sequence interlocks, closed loop control, and data acquisition functions. This paper describes the configuration of the system hardware, the steps carried out during commissioning of closed loop controls in distributed digital control systems and also the problems faced during the commissioning of closed loops. (author). 3 figs

  19. The LISA Pathfinder interferometry-hardware and system testing

    Energy Technology Data Exchange (ETDEWEB)

    Audley, H; Danzmann, K; MarIn, A Garcia; Heinzel, G; Monsky, A; Nofrarias, M; Steier, F; Bogenstahl, J [Albert-Einstein-Institut, Max-Planck-Institut fuer Gravitationsphysik und Universitaet Hannover, 30167 Hannover (Germany); Gerardi, D; Gerndt, R; Hechenblaikner, G; Johann, U; Luetzow-Wentzky, P; Wand, V [EADS Astrium GmbH, Friedrichshafen (Germany); Antonucci, F [Dipartimento di Fisica, Universita di Trento and INFN, Gruppo Collegato di Trento, 38050 Povo, Trento (Italy); Armano, M [European Space Astronomy Centre, European Space Agency, Villanueva de la Canada, 28692 Madrid (Spain); Auger, G; Binetruy, P [APC UMR7164, Universite Paris Diderot, Paris (France); Benedetti, M [Dipartimento di Ingegneria dei Materiali e Tecnologie Industriali, Universita di Trento and INFN, Gruppo Collegato di Trento, Mesiano, Trento (Italy); Boatella, C, E-mail: antonio.garcia@aei.mpg.de [CNES, DCT/AQ/EC, 18 Avenue Edouard Belin, 31401 Toulouse, Cedex 9 (France)

    2011-05-07

    Preparations for the LISA Pathfinder mission have reached an exciting stage. Tests of the engineering model (EM) of the optical metrology system have recently been completed at the Albert Einstein Institute, Hannover, and flight model tests are now underway. Significantly, they represent the first complete integration and testing of the space-qualified hardware and are the first tests on an optical system level. The results and test procedures of these campaigns will be utilized directly in the ground-based flight hardware tests, and subsequently during in-flight operations. In addition, they allow valuable testing of the data analysis methods using the MATLAB-based LTP data analysis toolbox. This paper presents an overview of the results from the EM test campaign that was successfully completed in December 2009.

  20. Hardware Support for Fine-Grain Multi-Threading in LEON3

    Czech Academy of Sciences Publication Activity Database

    Daněk, Martin; Kafka, Leoš; Kohout, Lukáš; Sýkora, Jaroslav

    2011-01-01

    Roč. 4, č. 1 (2011), s. 27-34 ISSN 1844-9689 R&D Projects: GA MŠk 7E08013 Grant - others:European Commission(BE) FP7-ICT-215216 Keywords : multithreading * microthreading * SPARC * microarchitecture * FPGA Subject RIV: JC - Computer Hardware ; Software http://library.utia.cas.cz/separaty/2011/ZS/danek-0380861.pdf

  1. Hardware Support for Dynamic Languages

    DEFF Research Database (Denmark)

    Schleuniger, Pascal; Karlsson, Sven; Probst, Christian W.

    2011-01-01

    In recent years, dynamic programming languages have enjoyed increasing popularity. For example, JavaScript has become one of the most popular programming languages on the web. As the complexity of web applications is growing, compute-intensive workloads are increasingly handed off to the client...... side. While a lot of effort is put in increasing the performance of web browsers, we aim for multicore systems with dedicated cores to effectively support dynamic languages. We have designed Tinuso, a highly flexible core for experimentation that is optimized for high performance when implemented...... on FPGA. We composed a scalable multicore configuration where we study how hardware support for software speculation can be used to increase the performance of dynamic languages....

  2. Commissioning of the Silicon Strip Detector (SSD) of ALICE

    NARCIS (Netherlands)

    Christakoglou, P.; Botje, M.A.J.; Mischke, A.; van Leeuwen, M.

    2009-01-01

    The latest results from the commissioning of the SSD with cosmics are presented in this paper. The hardware status of the detector, the front-end electronics, cooling, data acquisition and issues related to the on-line monitoring are shown. In addition, the procedures implemented and followed to

  3. Safe LHC beam commissioning

    International Nuclear Information System (INIS)

    Uythoven, J.; Schmidt, R.

    2007-01-01

    Due to the large amount of energy stored in magnets and beams, safety operation of the LHC is essential. The commissioning of the LHC machine protection system will be an integral part of the general LHC commissioning program. A brief overview of the LHC Machine Protection System will be given, identifying the main components: the Beam Interlock System, the Beam Dumping System, the Collimation System, the Beam Loss Monitoring System and the Quench Protection System. An outline is given of the commissioning strategy of these systems during the different commissioning phases of the LHC: without beam, injection and the different phases with stored beam depending on beam intensity and energy. (author)

  4. Regulatory Commission of Alaska

    Science.gov (United States)

    Map Help Regulatory Commission of Alaska Login Forgot Password Arrow Image Forgot password? View Cart login Procedures for Requesting Login For Consumers General Information Telephone Electric Natural Gas

  5. Guidelines for residential commissioning

    Energy Technology Data Exchange (ETDEWEB)

    Wray, Craig P.; Walker, Iain S.; Sherman, Max H.

    2003-01-31

    Currently, houses do not perform optimally or even as many codes and forecasts predict, largely because they are field assembled and there is no consistent process to identify problems or to correct them. Residential commissioning is a solution to this problem. This guide is the culmination of a 30-month project that began in September 1999. The ultimate objective of the project is to increase the number of houses that undergo commissioning, which will improve the quality, comfort, and safety of homes for California citizens. The project goal is to lay the groundwork for a residential commissioning industry in California focused on end-use energy and non-energy issues. As such, we intend this guide to be a beginning and not an end. Our intent is that the guide will lead to the programmatic integration of commissioning with other building industry processes, which in turn will provide more value to a single site visit for people such as home energy auditors and raters, home inspectors, and building performance contractors. Project work to support the development of this guide includes: a literature review and annotated bibliography, which facilitates access to 469 documents related to residential commissioning published over the past 20 years (Wray et al. 2000), an analysis of the potential benefits one can realistically expect from commissioning new and existing California houses (Matson et al. 2002), and an assessment of 107 diagnostic tools for evaluating residential commissioning metrics (Wray et al. 2002). In this guide, we describe the issues that non-experts should consider in developing a commissioning program to achieve the benefits we have identified. We do this by providing specific recommendations about: how to structure the commissioning process, which diagnostics to use, and how to use them to commission new and existing houses. Using examples, we also demonstrate the potential benefits of applying the recommended whole-house commissioning approach to

  6. Commission on Legal Matters

    CERN Multimedia

    Staff Association

    2016-01-01

    What is a commission within the Staff Association (SA)? A commission is a working group of the CERN Staff Council, led by a staff representative. The commission is composed mainly of staff representatives, but interested members of the SA can apply to participate in the work of a commission. What is the commission on legal matters? The commission on legal matters works on texts governing the employment conditions of staff (Employed Members of Personnel and Associated Members of Personnel). This covers legal documents such as the Staff Rules and Regulations, administrative and operational circulars, as well as any other document relating to employment conditions. How is the work organised in this commission? The revision process of the text is generally done along following lines: The HR department, and its legal experts, proposes new texts or modifications to existing texts. A schedule for the study of these texts is established each year and this calendar by the commission to plan its work. The new or modi...

  7. Constructing Hardware in a Scale Embedded Language

    Energy Technology Data Exchange (ETDEWEB)

    2014-08-21

    Chisel is a new open-source hardware construction language developed at UC Berkeley that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages. Chisel is embedded in the Scala programming language, which raises the level of hardware design abstraction by providing concepts including object orientation, functional programming, parameterized types, and type inference. From the same source, Chisel can generate a high-speed C++-based cycle-accurate software simulator, or low-level Verilog designed to pass on to standard ASIC or FPGA tools for synthesis and place and route.

  8. Open-source hardware for medical devices.

    Science.gov (United States)

    Niezen, Gerrit; Eslambolchilar, Parisa; Thimbleby, Harold

    2016-04-01

    Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device.

  9. Hardware Resource Allocation for Hardware/Software Partitioning in the LYCOS System

    DEFF Research Database (Denmark)

    Grode, Jesper Nicolai Riis; Knudsen, Peter Voigt; Madsen, Jan

    1998-01-01

    as a designer's/design tool's aid to generate good hardware allocations for use in hardware/software partitioning. The algorithm has been implemented in a tool under the LYCOS system. The results show that the allocations produced by the algorithm come close to the best allocations obtained by exhaustive search.......This paper presents a novel hardware resource allocation technique for hardware/software partitioning. It allocates hardware resources to the hardware data-path using information such as data-dependencies between operations in the application, and profiling information. The algorithm is useful...

  10. LHC: Construction and Commissioning Status

    CERN Document Server

    Evans, Lyndon R

    2007-01-01

    The installation of the Large Hadron Collider at CERN is now approaching completion. All magnets are installed with the exception of a few inner triplet quadrupoles. The first of the eight machine sectors is cold and power tests are proceeding. Two other sectors are ready for cool down and interconnect work is proceeding at a satisfactory pace in the other five sectors. In view of a number of accumulated delays, the original plan for partial commissioning of the machine and a low energy pilot run at the end of 2007 will now have to be abandoned. Instead, the full commissioning of the machine to top energy in a single step will start once the injector chain becomes available in spring 2008.

  11. The Lhc beam commissioning

    International Nuclear Information System (INIS)

    Redarelli, S.; Bailey, R.

    2008-01-01

    The plans for the Lhc proton beam commissioning are presented. A staged commissioning approach is proposed to satisfy the request of the Lhc experiments while minimizing the machine complexity in early commissioning phases. Machine protection and collimation aspects will be tackled progressively as the performance will be pushed to higher beam intensities. The key parameters are the number of bunches, k b , the proton intensity pe bunch, N, and the β in the various interaction points. All together these parameters determine the total beam power and the complexity of the machine. We will present the proposed trade off between the evolution of these parameters and the Lhc luminosity performance.

  12. Computer hardware description languages - A tutorial

    Science.gov (United States)

    Shiva, S. G.

    1979-01-01

    The paper introduces hardware description languages (HDL) as useful tools for hardware design and documentation. The capabilities and limitations of HDLs are discussed along with the guidelines needed in selecting an appropriate HDL. The directions for future work are provided and attention is given to the implementation of HDLs in microcomputers.

  13. An evaluation of Skylab habitability hardware

    Science.gov (United States)

    Stokes, J.

    1974-01-01

    For effective mission performance, participants in space missions lasting 30-60 days or longer must be provided with hardware to accommodate their personal needs. Such habitability hardware was provided on Skylab. Equipment defined as habitability hardware was that equipment composing the food system, water system, sleep system, waste management system, personal hygiene system, trash management system, and entertainment equipment. Equipment not specifically defined as habitability hardware but which served that function were the Wardroom window, the exercise equipment, and the intercom system, which was occasionally used for private communications. All Skylab habitability hardware generally functioned as intended for the three missions, and most items could be considered as adequate concepts for future flights of similar duration. Specific components were criticized for their shortcomings.

  14. Comparative Modal Analysis of Sieve Hardware Designs

    Science.gov (United States)

    Thompson, Nathaniel

    2012-01-01

    The CMTB Thwacker hardware operates as a testbed analogue for the Flight Thwacker and Sieve components of CHIMRA, a device on the Curiosity Rover. The sieve separates particles with a diameter smaller than 150 microns for delivery to onboard science instruments. The sieving behavior of the testbed hardware should be similar to the Flight hardware for the results to be meaningful. The elastodynamic behavior of both sieves was studied analytically using the Rayleigh Ritz method in conjunction with classical plate theory. Finite element models were used to determine the mode shapes of both designs, and comparisons between the natural frequencies and mode shapes were made. The analysis predicts that the performance of the CMTB Thwacker will closely resemble the performance of the Flight Thwacker within the expected steady state operating regime. Excitations of the testbed hardware that will mimic the flight hardware were recommended, as were those that will improve the efficiency of the sieving process.

  15. The Danish Welfare Commission

    DEFF Research Database (Denmark)

    Gjerding, Allan Næs

    2006-01-01

    on public services, and install economic incentives for the behaviour of private households. The paper then digs into the proposals of the commission that are broadly grouped into five policy target areas con-cerning (1) the ageing of the population, (2) the incentives for labour market participation, (3......The paper deals with the main report of the Danish Welfare Commission and the one-hundred-and-nine proposals on the structure of the future Danish welfare state that the com-mission has put forward. Following upon a brief review of the discussion on the work of the Danish Welfare Commission......) competitiveness in the global economy, (4) behavioural regulation of the use of public bene-fits and services, and (5) management within tight budgets of an increasing demand on health and care. Finally, the concluding section sums up the discussion and elaborates on the debate on the Welfare Commission’s work...

  16. Commissioning for Humidified Buildings

    National Research Council Canada - National Science Library

    Deal, Brian

    1998-01-01

    .... Although proper commissioning procedures have been noted to reduce the potential for approximately 70 percent of these claims, no standards exist for the control of moisture migration in building...

  17. Nuclear Regulatory Commission Issuances

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1996-12-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors Decisions (DD), and the Decisions on Petitions for Rulemaking (DPRM).

  18. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1993-08-01

    This report includes the issuances received during the specified period from the commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors; Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  19. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1992-03-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  20. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1991-09-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  1. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1994-03-01

    This report includes the issuances received during the specified period from Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  2. Nuclear Regulatory Commission Issuances

    International Nuclear Information System (INIS)

    1996-12-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors Decisions (DD), and the Decisions on Petitions for Rulemaking (DPRM)

  3. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1991-10-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  4. Nuclear Regulatory Commission issuances

    Energy Technology Data Exchange (ETDEWEB)

    1994-03-01

    This report includes the issuances received during the specified period from Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors` Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM).

  5. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1991-11-01

    This report includes the issuances received during the specified period from the Commission (CLl), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  6. Nuclear Regulatory Commission Issuances

    International Nuclear Information System (INIS)

    1994-02-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Director's Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  7. Nuclear Regulatory Commission Issuance

    International Nuclear Information System (INIS)

    1994-01-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (AU), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  8. Nuclear Regulatory Commission Issuances

    International Nuclear Information System (INIS)

    1994-05-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  9. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1991-07-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  10. COMMISSIONING AND DETECTOR PERFORMANCE GROUPS

    CERN Multimedia

    D. Acosta

    The global commissioning campaign begins this year with a series of weekly two-day global runs of limited participation until mid-March. The aim of these runs varies week-to-week, but includes the commissioning the calorimeter triggers, the muon track-finder triggers in the DT/CSC overlap, the PLL locking ranges, and generally accumulating data either for HCAL noise characterization or detector studies with cosmic muons. In mid-March a full Global Run is scheduled with all components participating, followed in April by a Cosmic Run with the aim of collecting statistics over a couple weeks with the installed Tracker and other subsystems. The ultimate milestone is the Cosmic Run At Four Tesla (CRAFT), with a completed CMS closed and the solenoid energized for data-taking during June. The Detector Performance Groups start the year with the focus to prepare for LHC collisions, and the associated challenges (CSA08) and global commissioning exercises (CRAFT) along the way. New this year is the addition of the Tri...

  11. Transmission delays in hardware clock synchronization

    Science.gov (United States)

    Shin, Kang G.; Ramanathan, P.

    1988-01-01

    Various methods, both with software and hardware, have been proposed to synchronize a set of physical clocks in a system. Software methods are very flexible and economical but suffer an excessive time overhead, whereas hardware methods require no time overhead but are unable to handle transmission delays in clock signals. The effects of nonzero transmission delays in synchronization have been studied extensively in the communication area in the absence of malicious or Byzantine faults. The authors show that it is easy to incorporate the ideas from the communication area into the existing hardware clock synchronization algorithms to take into account the presence of both malicious faults and nonzero transmission delays.

  12. FPS-RAM: Fast Prefix Search RAM-Based Hardware for Forwarding Engine

    Science.gov (United States)

    Zaitsu, Kazuya; Yamamoto, Koji; Kuroda, Yasuto; Inoue, Kazunari; Ata, Shingo; Oka, Ikuo

    Ternary content addressable memory (TCAM) is becoming very popular for designing high-throughput forwarding engines on routers. However, TCAM has potential problems in terms of hardware and power costs, which limits its ability to deploy large amounts of capacity in IP routers. In this paper, we propose new hardware architecture for fast forwarding engines, called fast prefix search RAM-based hardware (FPS-RAM). We designed FPS-RAM hardware with the intent of maintaining the same search performance and physical user interface as TCAM because our objective is to replace the TCAM in the market. Our RAM-based hardware architecture is completely different from that of TCAM and has dramatically reduced the costs and power consumption to 62% and 52%, respectively. We implemented FPS-RAM on an FPGA to examine its lookup operation.

  13. Commissioning the Linac Coherent Light Source injector

    Directory of Open Access Journals (Sweden)

    R. Akre

    2008-03-01

    Full Text Available The Linac Coherent Light Source is a SASE x-ray free-electron laser (FEL project presently under construction at SLAC [J. Arthur et al., SLAC-R-593, 2002.]. The injector section, from drive laser and rf photocathode gun through first bunch compressor chicane, was installed in the fall of 2006. The initial system commissioning with an electron beam was completed in August of 2007, with the goal of a 1.2-micron emittance in a 1-nC bunch demonstrated. The second phase of commissioning, including second bunch compressor and full linac, is planned for 2008, with FEL commissioning in 2009. We report experimental results and experience gained in the first phase of commissioning, including the photocathode drive laser, rf gun, photocathode, S-band and X-band rf systems, first bunch compressor, and the various beam diagnostics.

  14. APRON: A Cellular Processor Array Simulation and Hardware Design Tool

    Science.gov (United States)

    Barr, David R. W.; Dudek, Piotr

    2009-12-01

    We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

  15. APRON: A Cellular Processor Array Simulation and Hardware Design Tool

    Directory of Open Access Journals (Sweden)

    David R. W. Barr

    2009-01-01

    Full Text Available We present a software environment for the efficient simulation of cellular processor arrays (CPAs. This software (APRON is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

  16. Using EPICS enabled industrial hardware for upgrading control systems

    International Nuclear Information System (INIS)

    Bjorkland, Eric A.; Veeramani, Arun; Debelle, Thierry

    2009-01-01

    Los Alamos National Laboratory has been working with National Instruments (NI) and Cosy lab to implement EPICS Input Output Controller (IOC) software that runs directly on NI CompactRIO Real Time Controller (RTC) and communicates with NI LabVIEW through a shared memory interface. In this presentation, we will discuss our current progress in upgrading the control system at the Los Alamos Neutron Science Centre (LANSCE) and what we have learned about integrating CompactRIO into large experimental physics facilities. We will also discuss the implications of using Channel Access Server for LabVIEW which will enable more commercial hardware platforms to be used in upgrading existing facilities or in commissioning new ones.

  17. Hardware-in-the-Loop Testing

    Data.gov (United States)

    Federal Laboratory Consortium — RTC has a suite of Hardware-in-the Loop facilities that include three operational facilities that provide performance assessment and production acceptance testing of...

  18. Hardware device binding and mutual authentication

    Science.gov (United States)

    Hamlet, Jason R; Pierson, Lyndon G

    2014-03-04

    Detection and deterrence of device tampering and subversion by substitution may be achieved by including a cryptographic unit within a computing device for binding multiple hardware devices and mutually authenticating the devices. The cryptographic unit includes a physically unclonable function ("PUF") circuit disposed in or on the hardware device, which generates a binding PUF value. The cryptographic unit uses the binding PUF value during an enrollment phase and subsequent authentication phases. During a subsequent authentication phase, the cryptographic unit uses the binding PUF values of the multiple hardware devices to generate a challenge to send to the other device, and to verify a challenge received from the other device to mutually authenticate the hardware devices.

  19. Implementation of Hardware Accelerators on Zynq

    DEFF Research Database (Denmark)

    Toft, Jakob Kenn

    of the ARM Cortex-9 processor featured on the Zynq SoC, with regard to execution time, power dissipation and energy consumption. The implementation of the hardware accelerators were successful. Use of the Monte Carlo processor resulted in a significant increase in performance. The Telco hardware accelerator......In the recent years it has become obvious that the performance of general purpose processors are having trouble meeting the requirements of high performance computing applications of today. This is partly due to the relatively high power consumption, compared to the performance, of general purpose...... processors, which has made hardware accelerators an essential part of several datacentres and the worlds fastest super-computers. In this work, two different hardware accelerators were implemented on a Xilinx Zynq SoC platform mounted on the ZedBoard platform. The two accelerators are based on two different...

  20. Nuclear Regulatory Commission Issuances

    International Nuclear Information System (INIS)

    1992-01-01

    This is the thirty-sixth volume of issuances (1-396) of the Nuclear Regulatory Commission and its Atomic Safety and Licensing Boards, Administrative Law Judges, and Office Directors. It covers the period from July 1, 1992-December 31, 1992. Atomic Safety and Licensing Boards are authorized by Section 191 of the Atomic Energy Act of 1954. These Boards, comprised of three members conduct adjudicatory hearings on applications to construct and operate nuclear power plants and related facilities and issue initial decisions which, subject to internal review and appellate procedures, become the final Commission action with respect to those applications. Boards are drawn from the Atomic Safety and Licensing Board Panel, comprised of lawyers, nuclear physicists and engineers, environmentalists, chemists, and economists. The Atomic Energy Commission first established Licensing Boards in 1962 and the Panel in 1967

  1. IDEAS and App Development Internship in Hardware and Software Design

    Science.gov (United States)

    Alrayes, Rabab D.

    2016-01-01

    In this report, I will discuss the tasks and projects I have completed while working as an electrical engineering intern during the spring semester of 2016 at NASA Kennedy Space Center. In the field of software development, I completed tasks for the G-O Caching Mobile App and the Asbestos Management Information System (AMIS) Web App. The G-O Caching Mobile App was written in HTML, CSS, and JavaScript on the Cordova framework, while the AMIS Web App is written in HTML, CSS, JavaScript, and C# on the AngularJS framework. My goals and objectives on these two projects were to produce an app with an eye-catching and intuitive User Interface (UI), which will attract more employees to participate; to produce a fully-tested, fully functional app which supports workforce engagement and exploration; to produce a fully-tested, fully functional web app that assists technicians working in asbestos management. I also worked in hardware development on the Integrated Display and Environmental Awareness System (IDEAS) wearable technology project. My tasks on this project were focused in PCB design and camera integration. My goals and objectives for this project were to successfully integrate fully functioning custom hardware extenders on the wearable technology headset to minimize the size of hardware on the smart glasses headset for maximum user comfort; to successfully integrate fully functioning camera onto the headset. By the end of this semester, I was able to successfully develop four extender boards to minimize hardware on the headset, and assisted in integrating a fully-functioning camera into the system.

  2. Cooperative communications hardware, channel and PHY

    CERN Document Server

    Dohler, Mischa

    2010-01-01

    Facilitating Cooperation for Wireless Systems Cooperative Communications: Hardware, Channel & PHY focuses on issues pertaining to the PHY layer of wireless communication networks, offering a rigorous taxonomy of this dispersed field, along with a range of application scenarios for cooperative and distributed schemes, demonstrating how these techniques can be employed. The authors discuss hardware, complexity and power consumption issues, which are vital for understanding what can be realized at the PHY layer, showing how wireless channel models differ from more traditional

  3. Designing Secure Systems on Reconfigurable Hardware

    OpenAIRE

    Huffmire, Ted; Brotherton, Brett; Callegari, Nick; Valamehr, Jonathan; White, Jeff; Kastner, Ryan; Sherwood, Ted

    2008-01-01

    The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integrate many functions onto a single device. Since embedded designers often have no choice but to use soft IP cores obtained from third parties, the cores operate at different trust levels, resulting in mixed trust designs. The goal of this project is to evaluate recently proposed security primitives for reconfigurab...

  4. IDD Archival Hardware Architecture and Workflow

    Energy Technology Data Exchange (ETDEWEB)

    Mendonsa, D; Nekoogar, F; Martz, H

    2008-10-09

    This document describes the functionality of every component in the DHS/IDD archival and storage hardware system shown in Fig. 1. The document describes steps by step process of image data being received at LLNL then being processed and made available to authorized personnel and collaborators. Throughout this document references will be made to one of two figures, Fig. 1 describing the elements of the architecture and the Fig. 2 describing the workflow and how the project utilizes the available hardware.

  5. Software for Managing Inventory of Flight Hardware

    Science.gov (United States)

    Salisbury, John; Savage, Scott; Thomas, Shirman

    2003-01-01

    The Flight Hardware Support Request System (FHSRS) is a computer program that relieves engineers at Marshall Space Flight Center (MSFC) of most of the non-engineering administrative burden of managing an inventory of flight hardware. The FHSRS can also be adapted to perform similar functions for other organizations. The FHSRS affords a combination of capabilities, including those formerly provided by three separate programs in purchasing, inventorying, and inspecting hardware. The FHSRS provides a Web-based interface with a server computer that supports a relational database of inventory; electronic routing of requests and approvals; and electronic documentation from initial request through implementation of quality criteria, acquisition, receipt, inspection, storage, and final issue of flight materials and components. The database lists both hardware acquired for current projects and residual hardware from previous projects. The increased visibility of residual flight components provided by the FHSRS has dramatically improved the re-utilization of materials in lieu of new procurements, resulting in a cost savings of over $1.7 million. The FHSRS includes subprograms for manipulating the data in the database, informing of the status of a request or an item of hardware, and searching the database on any physical or other technical characteristic of a component or material. The software structure forces normalization of the data to facilitate inquiries and searches for which users have entered mixed or inconsistent values.

  6. A hardware overview of the RHIC LLRF platform

    International Nuclear Information System (INIS)

    Hayes, T.; Smith, K.S.

    2011-01-01

    The RHIC Low Level RF (LLRF) platform is a flexible, modular system designed around a carrier board with six XMC daughter sites. The carrier board features a Xilinx FPGA with an embedded, hard core Power PC that is remotely reconfigurable. It serves as a front end computer (FEC) that interfaces with the RHIC control system. The carrier provides high speed serial data paths to each daughter site and between daughter sites as well as four generic external fiber optic links. It also distributes low noise clocks and serial data links to all daughter sites and monitors temperature, voltage and current. To date, two XMC cards have been designed: a four channel high speed ADC and a four channel high speed DAC. The new LLRF hardware was used to replace the old RHIC LLRF system for the 2009 run. For the 2010 run, the RHIC RF system operation was dramatically changed with the introduction of accelerating both beams in a new, common cavity instead of each ring having independent cavities. The flexibility of the new system was beneficial in allowing the low level system to be adapted to support this new configuration. This hardware was also used in 2009 to provide LLRF for the newly commissioned Electron Beam Ion Source.

  7. PCI hardware support in LIA-2 control system

    International Nuclear Information System (INIS)

    Bolkhovityanov, D.; Cheblakov, P.

    2012-01-01

    The control system of the LIA-2 accelerator is built on cPCI crates with *86- compatible processor boards running Linux. Slow electronics is connected via CAN-bus, while fast electronics (4 MHz and 200 MHz fast ADCs and 200 MHz timers) are implemented as cPCI/PMC modules. Several ways to drive PCI control electronics in Linux were examined. Finally a user-space drivers approach was chosen. These drivers communicate with hardware via a small kernel module, which provides access to PCI BARs and to interrupt handling. This module was named USPCI (User-Space PCI access). This approach dramatically simplifies creation of drivers, as opposed to kernel drivers, and provides high reliability (because only a tiny and thoroughly-debugged piece of code runs in kernel). LIA-2 accelerator was successfully commissioned, and the solution chosen has proven adequate and very easy to use. Besides, USPCI turned out to be a handy tool for examination and debugging of PCI devices direct from command-line. In this paper available approaches to work with PCI control hardware in Linux are considered, and USPCI architecture is described. (authors)

  8. Commissioning of ATLAS

    CERN Document Server

    Thomas, J

    2008-01-01

    The status of the commissioning of the ATLAS experiment as of May 2008 is presented. The subdetector integration in recent milestone weeks is described, especially the cosmic commissioning in milestone week M6, focussing on combined running and track analysis of the muon detector and inner detector. The liquid argon and tile calorimeters have achieved near-full operation, and are integrated with the calorimeter trigger. The High-Level-Trigger infrastructure is installed and algorithms tested in technical runs. Problems with the inner detector cooling compressors are being fixed.

  9. ATF2 Commissioning

    Energy Technology Data Exchange (ETDEWEB)

    Seryi, A.; /SLAC; Christian, G.; /KLTE-ATOMKI; Parker, B.; /BNL; Schulte, D.; Delahaye, J.-P.; Tomas, R.; Zimmermann, F.; /CERN; Wolski, A.; Elsen, E.; /Cockcroft Inst. /DESY; Sanuki, T.; /Tohoku U.; Gianfelice-Wendt, E.; Ross, M.; Wendt, M.; /Fermilab; Takahashi, T.; /Hiroshima U.; Bai, S.; Gao, J.; /Beijing, Inst. High Energy Phys.; Bolzon, B.; Geffroy, N.; Jeremie, A.; /Annecy, LAPP; Apsimon, R.; Burrows, P.; /Oxford U., JAI /Kyoto U., Inst. Chem. Res. /Kyungpook Natl. U. /Orsay, LAL /Phang Accelerator Lab /Royal Holloway, U. of London /SLAC /Daresbury /University Coll. London /Manchester U. /Univ. of Tokyo U.

    2009-10-30

    ATF2 is a final-focus test beam line that aims to focus the low-emittance beam from the ATF damping ring to a beam size of about 37 nm, and at the same time to demonstrate nm beam stability, using numerous advanced beam diagnostics and feedback tools. The construction has been finished at the end of 2008 and the beam commissioning of ATF2 has started in December of 2008. ATF2 is constructed and commissioned by ATF international collaborations with strong US, Asian and European participation.

  10. ATF2 COMMISSIONING

    CERN Document Server

    Seryi, A; Parker, B; Schulte, D; Delahaye, J P; Tomas, R; Zimmermann, F; Wolski, A; Elsen, E; Sanuki, T; Gianfelice-Wendt, E; Ross, M; Wendt, M; Takahashi, T; Bai, S; Gao, J; Bolzon, B; Geffroy, N; Jeremie, A; Apsimon, R; Burrows, P; Constance, B; Perry, C; Resta-Lopez, J; Swinson, C; Araki, S; Aryshev, A; Hayano, H; Honda, Y; Kubo, K; Kume, T; Kuroda, S; Masuzawa, M; Naito, T; Okugi, T; Sugahara, R; Tauchi, T; Terunuma, N; Urakawa, J; Yokoya, K; Iwashita, Y; Sugimoto, T; Heo, A Y; Kim, E S; Kim, H S; Bambade, P; Renier, Y; Rimbault, C; Huang, J Y; Kim, S H; Park, Y J; Hwang, W H; Blair, G; Boogert, S; Karataev, P; Molloy, S; Amann, J; Bellomo, P; Lam, B; McCormick, D; Nelson, J; Paterson, E; Pivi, M; Raubenheimer, T; Spencer, C; Wang, M H; White, G; Wittmer, W; Woodley, M; Yan, Y; Zhou, F; Angal-Kalinin, D; Jones, J; Lyapin, A; Scarfe, A; Kamiya, Y; Komamiya, S; Oroku, M; Suehara, T; Yamanaka, T

    2010-01-01

    ATF2 is a final-focus test beam line that aims to focus the low-emittance beam from the ATF damping ring to a beam size of about 37 nm, and at the same time to demonstrate nm beam stability, using numerous advanced beam diagnostics and feedback tools. The construction has been finished at the end of 2008 and the beam commissioning of ATF2 has started in December of 2008. ATF2 is constructed and commissioned by ATF international collaborations with strong US, Asian and European participation.

  11. 78 FR 32295 - Commission Meeting

    Science.gov (United States)

    2013-05-29

    ... SUSQUEHANNA RIVER BASIN COMMISSION Commission Meeting AGENCY: Susquehanna River Basin Commission. ACTION: Notice. SUMMARY: The Susquehanna River Basin Commission will hold its regular business meeting on... business meeting are contained in the Supplementary Information section of this notice. DATES: June 20...

  12. 77 FR 10599 - Commission Meeting

    Science.gov (United States)

    2012-02-22

    ... SUSQUEHANNA RIVER BASIN COMMISSION Commission Meeting AGENCY: Susquehanna River Basin Commission. ACTION: Notice. SUMMARY: The Susquehanna River Basin Commission will hold its regular business meeting on... business meeting are contained in the Supplementary Information section of this notice. DATES: March 15...

  13. 78 FR 12412 - Commission Meeting

    Science.gov (United States)

    2013-02-22

    ... SUSQUEHANNA RIVER BASIN COMMISSION Commission Meeting AGENCY: Susquehanna River Basin Commission. ACTION: Notice. SUMMARY: The Susquehanna River Basin Commission will hold its regular business meeting on... business meeting are contained in the Supplementary Information section of this notice. DATES: March 21...

  14. 77 FR 28420 - Commission Meeting

    Science.gov (United States)

    2012-05-14

    ... SUSQUEHANNA RIVER BASIN COMMISSION Commission Meeting AGENCY: Susquehanna River Basin Commission. ACTION: Notice. SUMMARY: The Susquehanna River Basin Commission will hold its regular business meeting on... meeting are contained in the Supplementary Information section of this notice. DATES: June 7, 2012, at 9...

  15. 78 FR 52601 - Commission Meeting

    Science.gov (United States)

    2013-08-23

    ... SUSQUEHANNA RIVER BASIN COMMISSION Commission Meeting AGENCY: Susquehanna River Basin Commission. ACTION: Notice. SUMMARY: The Susquehanna River Basin Commission will hold its regular business meeting on... meeting are contained in the Supplementary Information section of this notice. DATES: September 19, 2013...

  16. 77 FR 70204 - Commission Meeting

    Science.gov (United States)

    2012-11-23

    ... SUSQUEHANNA RIVER BASIN COMMISSION Commission Meeting AGENCY: Susquehanna River Basin Commission. ACTION: Notice. SUMMARY: The Susquehanna River Basin Commission will hold its regular business meeting on... meeting are contained in the SUPPLEMENTARY INFORMATION section of this notice. DATES: December 14, 2012...

  17. 78 FR 69517 - Commission Meeting

    Science.gov (United States)

    2013-11-19

    ... SUSQUEHANNA RIVER BASIN COMMISSION Commission Meeting AGENCY: Susquehanna River Basin Commission. ACTION: Notice. SUMMARY: The Susquehanna River Basin Commission will hold its regular business meeting on... meeting are contained in the Supplementary Information section of this notice. DATES: December 12, 2013...

  18. 77 FR 52106 - Commission Meeting

    Science.gov (United States)

    2012-08-28

    ... SUSQUEHANNA RIVER BASIN COMMISSION Commission Meeting AGENCY: Susquehanna River Basin Commission. ACTION: Notice. SUMMARY: The Susquehanna River Basin Commission will hold its regular business meeting on... business meeting are contained in the Supplementary Information section of this notice. DATES: September 20...

  19. Appalachian Regional Commission: 1982 Annual Report.

    Science.gov (United States)

    Appalachian Regional Commission, Washington, DC.

    Fiscal year 1982 was transitional for the Appalachian Regional Commission (ARC), as it was the last year of the broad economic development program and a year of reduced funding and new limits on programs. In 1981, Congress had requested that ARC prepare a plan for completion of the Appalachian highway system and for a 3 to 5 year ARC finish-up…

  20. Nuclear regulatory commission issuances

    International Nuclear Information System (INIS)

    1989-01-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  1. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1982-01-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking

  2. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1986-07-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  3. Nuclear Regulatory Commission Issuances

    International Nuclear Information System (INIS)

    1994-10-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM). The summaries and headnotes preceding the opinions reported herein are not to be deemed a part of those opinions or have any independent legal significance

  4. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1997-09-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Decisions on Petitions for Rulemaking (DPRM). The summaries and headnotes preceding the opinions reported herein are not to be deemed a part of those opinions or have any independent legal significance

  5. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1991-05-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  6. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1989-11-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Danials of Petitions for Rulemaking (DPRM)

  7. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1989-09-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  8. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1987-01-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  9. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1990-02-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  10. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1991-02-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  11. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1982-04-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Director's Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  12. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1981-12-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking

  13. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1987-03-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  14. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1988-05-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  15. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1989-06-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  16. Nuclear regulatory commission issuances

    International Nuclear Information System (INIS)

    1990-07-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  17. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1997-11-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Decisions on Petitions for Rulemaking (DPRM). The summaries and headnotes preceding the opinions reported herein are not to be deemed a part of those opinions or have any independent legal significance

  18. DESY: HERA commissioning

    International Nuclear Information System (INIS)

    Anon.

    1992-01-01

    The commissioning of the world's first electron-proton collider - the 6.3 kilometre HERA ring at the DESY Laboratory in Hamburg - last year was the result of more than a decade of careful planning, design and construction

  19. Nuclear Regulatory Commission Issuances

    International Nuclear Information System (INIS)

    1986-12-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  20. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1991-03-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  1. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1988-01-01

    This report includes the issuance received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  2. Nuclear Regulatory Commission issuances

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-09-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors` Decisions (DD), and the Decisions on Petitions for Rulemaking (DPRM). The summaries and headnotes preceding the opinions reported herein are not to be deemed a part of those opinions or have any independent legal significance.

  3. Nuclear Regulatory Commission Issuances

    International Nuclear Information System (INIS)

    1988-10-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  4. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1988-04-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  5. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1991-01-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  6. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1990-04-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  7. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1988-06-01

    This report includes the issuances received during the specified period from the commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  8. Nuclear Regulatory Commission Issuances

    International Nuclear Information System (INIS)

    1981-12-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  9. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1987-02-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  10. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1982-02-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking

  11. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1990-01-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety And Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  12. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1985-04-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  13. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1990-09-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judges (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  14. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1982-08-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  15. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1988-08-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM)

  16. SPS completes LS1 activities

    CERN Multimedia

    Katarina Anthony

    2014-01-01

    On 27 June, the SPS closed its doors to the LS1 engineers, bringing to an end almost 17 months of activities. The machine now enters the hardware-testing phase in preparation for an October restart.   Photo 1: The SPS transfer tunnel, TT10, reinforced with steal beams. Having completed their LS1 activities right on schedule (to the day!), the SPS team is now preparing the machine for its restart. Over the next eight weeks, hardware tests of the SPS dipole and quadrupole power converters will be underway, led by the TE-EPC (Electrical Power Converters) team. "OP start-up test activities will also be running in parallel, utilising the off hours when EPC is not using the machine," says David McFarlane, the SPS technical coordinator from the Engineering Department. "The primary beam testing phase will start at the beginning of September, once hardware tests and DSO safety tests have been completed." It has been a long journey to this point, with several major...

  17. VEG-01: Veggie Hardware Verification Testing

    Science.gov (United States)

    Massa, Gioia; Newsham, Gary; Hummerick, Mary; Morrow, Robert; Wheeler, Raymond

    2013-01-01

    The Veggie plant/vegetable production system is scheduled to fly on ISS at the end of2013. Since much of the technology associated with Veggie has not been previously tested in microgravity, a hardware validation flight was initiated. This test will allow data to be collected about Veggie hardware functionality on ISS, allow crew interactions to be vetted for future improvements, validate the ability of the hardware to grow and sustain plants, and collect data that will be helpful to future Veggie investigators as they develop their payloads. Additionally, food safety data on the lettuce plants grown will be collected to help support the development of a pathway for the crew to safely consume produce grown on orbit. Significant background research has been performed on the Veggie plant growth system, with early tests focusing on the development of the rooting pillow concept, and the selection of fertilizer, rooting medium and plant species. More recent testing has been conducted to integrate the pillow concept into the Veggie hardware and to ensure that adequate water is provided throughout the growth cycle. Seed sanitation protocols have been established for flight, and hardware sanitation between experiments has been studied. Methods for shipping and storage of rooting pillows and the development of crew procedures and crew training videos for plant activities on-orbit have been established. Science verification testing was conducted and lettuce plants were successfully grown in prototype Veggie hardware, microbial samples were taken, plant were harvested, frozen, stored and later analyzed for microbial growth, nutrients, and A TP levels. An additional verification test, prior to the final payload verification testing, is desired to demonstrate similar growth in the flight hardware and also to test a second set of pillows containing zinnia seeds. Issues with root mat water supply are being resolved, with final testing and flight scheduled for later in 2013.

  18. From Open Source Software to Open Source Hardware

    OpenAIRE

    Viseur , Robert

    2012-01-01

    Part 2: Lightning Talks; International audience; The open source software principles progressively give rise to new initiatives for culture (free culture), data (open data) or hardware (open hardware). The open hardware is experiencing a significant growth but the business models and legal aspects are not well known. This paper is dedicated to the economics of open hardware. We define the open hardware concept and determine intellectual property tools we can apply to open hardware, with a str...

  19. Flight Hardware Virtualization for On-Board Science Data Processing

    Data.gov (United States)

    National Aeronautics and Space Administration — Utilize Hardware Virtualization technology to benefit on-board science data processing by investigating new real time embedded Hardware Virtualization solutions and...

  20. Non-fuel bearing hardware melting technology

    International Nuclear Information System (INIS)

    Newman, D.F.

    1993-01-01

    Battelle has developed a portable hardware melter concept that would allow spent fuel rod consolidation operations at commercial nuclear power plants to provide significantly more storage space for other spent fuel assemblies in existing pool racks at lower cost. Using low pressure compaction, the non-fuel bearing hardware (NFBH) left over from the removal of spent fuel rods from the stainless steel end fittings and the Zircaloy guide tubes and grid spacers still occupies 1/3 to 2/5 of the volume of the consolidated fuel rod assemblies. Melting the non-fuel bearing hardware reduces its volume by a factor 4 from that achievable with low-pressure compaction. This paper describes: (1) the configuration and design features of Battelle's hardware melter system that permit its portability, (2) the system's throughput capacity, (3) the bases for capital and operating estimates, and (4) the status of NFBH melter demonstration to reduce technical risks for implementation of the concept. Since all NFBH handling and processing operations would be conducted at the reactor site, costs for shipping radioactive hardware to and from a stationary processing facility for volume reduction are avoided. Initial licensing, testing, and installation in the field would follow the successful pattern achieved with rod consolidation technology

  1. Combining high productivity with high performance on commodity hardware

    DEFF Research Database (Denmark)

    Skovhede, Kenneth

    -like compiler for translating CIL bytecode on the CELL-BE. I then introduce a bytecode converter that transforms simple loops in Java bytecode to GPGPU capable code. I then introduce the numeric library for the Common Intermediate Language, NumCIL. I can then utilizing the vector programming model from Num......CIL and map this to the Bohrium framework. The result is a complete system that gives the user a choice of high-level languages with no explicit parallelism, yet seamlessly performs efficient execution on a number of hardware setups....

  2. Hardware interface unit for control of shuttle RMS vibrations

    Science.gov (United States)

    Lindsay, Thomas S.; Hansen, Joseph M.; Manouchehri, Davoud; Forouhar, Kamran

    1994-01-01

    Vibration of the Shuttle Remote Manipulator System (RMS) increases the time for task completion and reduces task safety for manipulator-assisted operations. If the dynamics of the manipulator and the payload can be physically isolated, performance should improve. Rockwell has developed a self contained hardware unit which interfaces between a manipulator arm and payload. The End Point Control Unit (EPCU) is built and is being tested at Rockwell and at the Langley/Marshall Coupled, Multibody Spacecraft Control Research Facility in NASA's Marshall Space Flight Center in Huntsville, Alabama.

  3. A Hardware Abstraction Layer in Java

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Korsholm, Stephan; Kalibera, Tomas

    2011-01-01

    Embedded systems use specialized hardware devices to interact with their environment, and since they have to be dependable, it is attractive to use a modern, type-safe programming language like Java to develop programs for them. Standard Java, as a platform-independent language, delegates access...... to devices, direct memory access, and interrupt handling to some underlying operating system or kernel, but in the embedded systems domain resources are scarce and a Java Virtual Machine (JVM) without an underlying middleware is an attractive architecture. The contribution of this article is a proposal...... for Java packages with hardware objects and interrupt handlers that interface to such a JVM. We provide implementations of the proposal directly in hardware, as extensions of standard interpreters, and finally with an operating system middleware. The latter solution is mainly seen as a migration path...

  4. Hardware Acceleration of Adaptive Neural Algorithms.

    Energy Technology Data Exchange (ETDEWEB)

    James, Conrad D. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2017-11-01

    As tradit ional numerical computing has faced challenges, researchers have turned towards alternative computing approaches to reduce power - per - computation metrics and improve algorithm performance. Here, we describe an approach towards non - conventional computing that strengthens the connection between machine learning and neuroscience concepts. The Hardware Acceleration of Adaptive Neural Algorithms (HAANA) project ha s develop ed neural machine learning algorithms and hardware for applications in image processing and cybersecurity. While machine learning methods are effective at extracting relevant features from many types of data, the effectiveness of these algorithms degrades when subjected to real - world conditions. Our team has generated novel neural - inspired approa ches to improve the resiliency and adaptability of machine learning algorithms. In addition, we have also designed and fabricated hardware architectures and microelectronic devices specifically tuned towards the training and inference operations of neural - inspired algorithms. Finally, our multi - scale simulation framework allows us to assess the impact of microelectronic device properties on algorithm performance.

  5. MFTF supervisory control and diagnostics system hardware

    International Nuclear Information System (INIS)

    Butner, D.N.

    1979-01-01

    The Supervisory Control and Diagnostics System (SCDS) for the Mirror Fusion Test Facility (MFTF) is a multiprocessor minicomputer system designed so that for most single-point failures, the hardware may be quickly reconfigured to provide continued operation of the experiment. The system is made up of nine Perkin-Elmer computers - a mixture of 8/32's and 7/32's. Each computer has ports on a shared memory system consisting of two independent shared memory modules. Each processor can signal other processors through hardware external to the shared memory. The system communicates with the Local Control and Instrumentation System, which consists of approximately 65 microprocessors. Each of the six system processors has facilities for communicating with a group of microprocessors; the groups consist of from four to 24 microprocessors. There are hardware switches so that if an SCDS processor communicating with a group of microprocessors fails, another SCDS processor takes over the communication

  6. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1982-03-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety and Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions For Rulemaking (DPRM). The summaries and headnotes preceding the opinions reported herein are not to be deemed a part of those opinions or to have any independent legal significance

  7. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1989-08-01

    This report includes the issuances received during the specified period from the Commission (CLI), the Atomic Safety nd Licensing Appeal Boards (ALAB), the Atomic Safety and Licensing Boards (LBP), the Administrative Law Judge (ALJ), the Directors' Decisions (DD), and the Denials of Petitions for Rulemaking (DPRM). The summaries and headnotes preceding the opinions reported herein are not to be deemed a part of those opinions or have any independent legal significance

  8. Nuclear Regulatory Commission issuances

    International Nuclear Information System (INIS)

    1996-04-01

    This report includes the issuances received during the April 1996 reporting period from the Commission, the Atomic Safety and Licensing Boards, the Administrative Law Judges, the Directors' Decisions, and the Decisions on Petitions for Rulemaking. Included are issuances pertaining to: (1) Yankee Nuclear Power Station, (2) Georgia Tech Research Reactor, (3) River Bend Station, (4) Millstone Unit 1, (5) Thermo-Lag fire barrier material, and (6) Louisiana Energy Services

  9. Nuclear Regulatory Commission issuances

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1996-04-01

    This report includes the issuances received during the April 1996 reporting period from the Commission, the Atomic Safety and Licensing Boards, the Administrative Law Judges, the Directors` Decisions, and the Decisions on Petitions for Rulemaking. Included are issuances pertaining to: (1) Yankee Nuclear Power Station, (2) Georgia Tech Research Reactor, (3) River Bend Station, (4) Millstone Unit 1, (5) Thermo-Lag fire barrier material, and (6) Louisiana Energy Services.

  10. Commission on Social Security

    CERN Multimedia

    Staff Association

    2010-01-01

    A commission studying past, present, and future social stakes ! For many years we have been hearing about the problems of funding of health insurance benefits in our different Member States. At CERN we are not totally immune from this problem.  To start with, let us recall that we have a mutual-benefit scheme which covers everyone for the consequences of the uncertainties in life (illness and accidents). The rules of our scheme are established by CERN in the framework of a sub-group of the Standing Concertation Committee, the CERN Health Insurance Scheme Board (CHISB), which is also in charge of managing the scheme.  The work of the “ProtSoc” (Protection Sociale – Social Security) commission, as we like to call it at the Staff Association, is to help your representatives on the CHISB, by preparing together with them the subjects and positions to be put forward and defended. This commission, which groups together the staff delegates who wish to invest their ...

  11. Hardware Accelerated Sequence Alignment with Traceback

    Directory of Open Access Journals (Sweden)

    Scott Lloyd

    2009-01-01

    in a timely manner. Known methods to accelerate alignment on reconfigurable hardware only address sequence comparison, limit the sequence length, or exhibit memory and I/O bottlenecks. A space-efficient, global sequence alignment algorithm and architecture is presented that accelerates the forward scan and traceback in hardware without memory and I/O limitations. With 256 processing elements in FPGA technology, a performance gain over 300 times that of a desktop computer is demonstrated on sequence lengths of 16000. For greater performance, the architecture is scalable to more processing elements.

  12. Quantum neuromorphic hardware for quantum artificial intelligence

    Science.gov (United States)

    Prati, Enrico

    2017-08-01

    The development of machine learning methods based on deep learning boosted the field of artificial intelligence towards unprecedented achievements and application in several fields. Such prominent results were made in parallel with the first successful demonstrations of fault tolerant hardware for quantum information processing. To which extent deep learning can take advantage of the existence of a hardware based on qubits behaving as a universal quantum computer is an open question under investigation. Here I review the convergence between the two fields towards implementation of advanced quantum algorithms, including quantum deep learning.

  13. Human Centered Hardware Modeling and Collaboration

    Science.gov (United States)

    Stambolian Damon; Lawrence, Brad; Stelges, Katrine; Henderson, Gena

    2013-01-01

    In order to collaborate engineering designs among NASA Centers and customers, to in clude hardware and human activities from multiple remote locations, live human-centered modeling and collaboration across several sites has been successfully facilitated by Kennedy Space Center. The focus of this paper includes innovative a pproaches to engineering design analyses and training, along with research being conducted to apply new technologies for tracking, immersing, and evaluating humans as well as rocket, vehic le, component, or faci lity hardware utilizing high resolution cameras, motion tracking, ergonomic analysis, biomedical monitoring, wor k instruction integration, head-mounted displays, and other innovative human-system integration modeling, simulation, and collaboration applications.

  14. Gentilly 2: design, construction and commissioning

    International Nuclear Information System (INIS)

    Amyot, Paul; Michel, Benoit.

    1982-06-01

    Construction of the Gentilly 2 power station is essentially complete, and commissioning is proceeding. The main activities during the 1981-82 period have been the completion of the construction and overall testing of the major systems. One cause of delay in the project in 1981 was the discovery of damage to the tubesheet of a steam generator. An internal manhole cover support in the steam generator head had become loose and had caused damage to the tube-to-tubesheet welds. Repairs to the welds were completed in Feb. 1982 after an extensive development program to qualify the welding procedure. Overall project life will be slightly more than 9 years

  15. A Message-Passing Hardware/Software Cosimulation Environment for Reconfigurable Computing Systems

    Directory of Open Access Journals (Sweden)

    Manuel Saldaña

    2009-01-01

    Full Text Available High-performance reconfigurable computers (HPRCs provide a mix of standard processors and FPGAs to collectively accelerate applications. This introduces new design challenges, such as the need for portable programming models across HPRCs and system-level verification tools. To address the need for cosimulating a complete heterogeneous application using both software and hardware in an HPRC, we have created a tool called the Message-passing Simulation Framework (MSF. We have used it to simulate and develop an interface enabling an MPI-based approach to exchange data between X86 processors and hardware engines inside FPGAs. The MSF can also be used as an application development tool that enables multiple FPGAs in simulation to exchange messages amongst themselves and with X86 processors. As an example, we simulate a LINPACK benchmark hardware core using an Intel-FSB-Xilinx-FPGA platform to quickly prototype the hardware, to test the communications. and to verify the benchmark results.

  16. Enabling Open Hardware through FOSS tools

    CERN Multimedia

    CERN. Geneva

    2016-01-01

    Software developers often take open file formats and tools for granted. When you publish code on github, you do not ask yourself if somebody will be able to open it and modify it. We need the same freedom in the open hardware world, to make it truly accessible for everyone.

  17. Hardware and layout aspects affecting maintainability

    International Nuclear Information System (INIS)

    Jayaraman, V.N.; Surendar, Ch.

    1977-01-01

    It has been found from maintenance experience at the Rajasthan Atomic Power Station that proper hardware and instrumentation layout can reduce maintenance and down-time on the related equipment. The problems faced in this connection and how they were solved is narrated. (M.G.B.)

  18. CAMAC high energy physics electronics hardware

    International Nuclear Information System (INIS)

    Kolpakov, I.F.

    1977-01-01

    CAMAC hardware for high energy physics large spectrometers and control systems is reviewed as is the development of CAMAC modules at the High Energy Laboratory, JINR (Dubna). The total number of crates used at the Laboratory is 179. The number of CAMAC modules of 120 different types exceeds 1700. The principles of organization and the structure of developed CAMAC systems are described. (author)

  19. Design of hardware accelerators for demanding applications.

    NARCIS (Netherlands)

    Jozwiak, L.; Jan, Y.

    2010-01-01

    This paper focuses on mastering the architecture development of hardware accelerators. It presents the results of our analysis of the main issues that have to be addressed when designing accelerators for modern demanding applications, when using as an example the accelerator design for LDPC decoding

  20. Building Correlators with Many-Core Hardware

    NARCIS (Netherlands)

    van Nieuwpoort, R.V.

    2010-01-01

    Radio telescopes typically consist of multiple receivers whose signals are cross-correlated to filter out noise. A recent trend is to correlate in software instead of custom-built hardware, taking advantage of the flexibility that software solutions offer. Examples include e-VLBI and LOFAR. However,

  1. Environmental Control System Software & Hardware Development

    Science.gov (United States)

    Vargas, Daniel Eduardo

    2017-01-01

    ECS hardware: (1) Provides controlled purge to SLS Rocket and Orion spacecraft. (2) Provide mission-focused engineering products and services. ECS software: (1) NASA requires Compact Unique Identifiers (CUIs); fixed-length identifier used to identify information items. (2) CUI structure; composed of nine semantic fields that aid the user in recognizing its purpose.

  2. The fast Amsterdam multiprocessor (FAMP) system hardware

    International Nuclear Information System (INIS)

    Hertzberger, L.O.; Kieft, G.; Kisielewski, B.; Wiggers, L.W.; Engster, C.; Koningsveld, L. van

    1981-01-01

    The architecture of a multiprocessor system is described that will be used for on-line filter and second stage trigger applications. The system is based on the MC 68000 microprocessor from Motorola. Emphasis is paid to hardware aspects, in particular the modularity, processor communication and interfacing, whereas the system software and the applications will be described in separate articles. (orig.)

  3. Remote hardware-reconfigurable robotic camera

    Science.gov (United States)

    Arias-Estrada, Miguel; Torres-Huitzil, Cesar; Maya-Rueda, Selene E.

    2001-10-01

    In this work, a camera with integrated image processing capabilities is discussed. The camera is based on an imager coupled to an FPGA device (Field Programmable Gate Array) which contains an architecture for real-time computer vision low-level processing. The architecture can be reprogrammed remotely for application specific purposes. The system is intended for rapid modification and adaptation for inspection and recognition applications, with the flexibility of hardware and software reprogrammability. FPGA reconfiguration allows the same ease of upgrade in hardware as a software upgrade process. The camera is composed of a digital imager coupled to an FPGA device, two memory banks, and a microcontroller. The microcontroller is used for communication tasks and FPGA programming. The system implements a software architecture to handle multiple FPGA architectures in the device, and the possibility to download a software/hardware object from the host computer into its internal context memory. System advantages are: small size, low power consumption, and a library of hardware/software functionalities that can be exchanged during run time. The system has been validated with an edge detection and a motion processing architecture, which will be presented in the paper. Applications targeted are in robotics, mobile robotics, and vision based quality control.

  4. Nuclear Regulatory Commission information digest

    International Nuclear Information System (INIS)

    1990-03-01

    The Nuclear Regulatory Commission information digest provides summary information regarding the US Nuclear Regulatory Commission, its regulatory responsibilities, and areas licensed by the commission. This is an annual publication for the general use of the NRC Staff and is available to the public. The digest is divided into two parts: the first presents an overview of the US Nuclear Regulatory Commission and the second provides data on NRC commercial nuclear reactor licensees and commercial nuclear power reactors worldwide

  5. A Guide to Building Commissioning

    Energy Technology Data Exchange (ETDEWEB)

    Baechler, Michael C.

    2011-09-01

    Commissioning is the process of verifying that a building's heating, ventilation, and air conditioning (HVAC) and lighting systems perform correctly and efficiently. Without commissioning, system and equipment problems can result in higher than necessary utility bills and unexpected and costly equipment repairs. This report reviews the benefits of commissioning, why it is a requirement for Leadership in Energy and Environmental Design (LEED) certification, and why building codes are gradually adopting commissioning activities into code.

  6. Discussion: European Commission policy

    International Nuclear Information System (INIS)

    Coldwell, R.

    1993-01-01

    This paper documents the debate which arose following two papers presented to a seminar run by the Centre for the Study of Regulated Industries, on 11th November 1992, on European Commission (EC) energy policies. The issues raised cover how an internal market for electricity and natural gas will be implemented under a proposed EC directive, bearing in mind the level of opposition from a number of Member States. How this Directive will apply to vertically integrated structures, such as Scottish Electricity Industry, is also considered. (UK)

  7. Commissioning of the SCT

    International Nuclear Information System (INIS)

    Hayward, Helen

    2010-01-01

    In September 2008, the large hadron collider (LHC) at CERN was switched on with successful tests of circulating beam in both directions of the ring. The ATLAS semiconductor tracker (SCT) has been installed in the ATLAS cavern since summer 2007 and then integrated with the rest of the ATLAS subdetectors, in preparation for this event. After the SCT was assembled on the surface, the process of being commissioned using cosmic ray events began, and continued after the SCT was installed in the cavern with the rest of the ATLAS detector. Performance results will be given for the recent cosmic runs.

  8. LISA Pathfinder: hardware tests and their input to the mission

    Science.gov (United States)

    Audley, Heather

    The Laser Interferometer Space Antenna (LISA) is a joint ESA-NASA mission for the first space-borne gravitational wave detector. LISA aims to detect sources in the 0.1mHz to 1Hz range, which include supermassive black holes and galactic binary stars. Core technologies required for the LISA mission, including drag-free test mass control, picometre interferometry and micro-Newton thrusters, cannot be tested on-ground. Therefore, a precursor satellite, LISA Pathfinder, has been developed as a technology demonstration mission. The preparations for the LISA Pathfinder mission have reached an exciting stage. Tests of the engineering model of the optical metrology system have recently been completed at the Albert Einstein Institute, Hannover, and flight model tests are now underway. Significantly, they represent the first complete integration and testing of the space-qualified hardware and are the first tests on system level. The results and test procedures of these campaigns will be utilised directly in the ground-based flight hardware tests, and subsequently within in-flight operations. In addition, they allow valuable testing of the data analysis methods using the MatLab based LTP data analysis toolbox. This contribution presents an overview of the test campaigns calibration, control and perfor-mance results, focusing on the implications for the Experimental Master Plan which provides the basis for the in-flight operations and procedures.

  9. Atomic Energy Commission Act, 1963

    International Nuclear Information System (INIS)

    1963-01-01

    Promulgated in 1963, the Atomic Energy Commission Act (204) established and vested in the Ghana Atomic Energy Commission the sole responsibility for all matters relating to the peaceful uses of atomic energy in the country. Embodied in the Act are provisions relating to the powers, duties, rights and liabilities of the Commission. (EAA)

  10. Fine-grain reconfigurable platform: FPGA hardware design and software toolset development

    International Nuclear Information System (INIS)

    Pappas, I; Kalenteridis, V; Vassiliadis, N; Pournara, H; Siozios, K; Koutroumpezis, G; Tatas, K; Nikolaidis, S; Siskos, S; Soudris, D J; Thanailakis, A

    2005-01-01

    A complete system for the implementation of digital logic in a fine-grain reconfigurable platform is introduced. The system is composed of two parts. The fine-grain reconfigurable hardware platform (FPGA) on which the logic is implemented and the set of CAD tools for mapping logic to the FPGA platform. A novel energy-efficient FPGA architecture is presented (CLB, interconnect network, configuration hardware) and simulated in STM 0.18 μm CMOS technology. Concerning the tool flow, each tool can operate as a standalone program as well as part of a complete design framework, composed by existing and new tools

  11. Fine-grain reconfigurable platform: FPGA hardware design and software toolset development

    Energy Technology Data Exchange (ETDEWEB)

    Pappas, I [Electronics and Computers Div., Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki (Greece); Kalenteridis, V [Electronics and Computers Div., Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki (Greece); Vassiliadis, N [Electronics and Computers Div., Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki (Greece); Pournara, H [Electronics and Computers Div., Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki (Greece); Siozios, K [VLSI Design and Testing Center, Department of Electrical and Computer Engineering, Democritus University of Thrace, 67100 Xanthi (Greece); Koutroumpezis, G [VLSI Design and Testing Center, Department of Electrical and Computer Engineering, Democritus University of Thrace, 67100 Xanthi (Greece); Tatas, K [VLSI Design and Testing Center, Department of Electrical and Computer Engineering, Democritus University of Thrace, 67100 Xanthi (Greece); Nikolaidis, S [Electronics and Computers Div., Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki (Greece); Siskos, S [Electronics and Computers Div., Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki (Greece); Soudris, D J [VLSI Design and Testing Center, Department of Electrical and Computer Engineering, Democritus University of Thrace, 67100 Xanthi (Greece); Thanailakis, A [Electronics and Computers Div., Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki (Greece)

    2005-01-01

    A complete system for the implementation of digital logic in a fine-grain reconfigurable platform is introduced. The system is composed of two parts. The fine-grain reconfigurable hardware platform (FPGA) on which the logic is implemented and the set of CAD tools for mapping logic to the FPGA platform. A novel energy-efficient FPGA architecture is presented (CLB, interconnect network, configuration hardware) and simulated in STM 0.18 {mu}m CMOS technology. Concerning the tool flow, each tool can operate as a standalone program as well as part of a complete design framework, composed by existing and new tools.

  12. Operation and Monitoring of the CMS Regional Calorimeter Trigger Hardware

    CERN Document Server

    Klabbers, P

    2008-01-01

    The electronics for the Regional Calorimeter Trigger (RCT) of the Compact Muon Solenoid Experiment (CMS) have been produced, tested, and installed. The RCT hardware consists of one clock distribution crate and 18 double-sided crates containing custom boards, ASICs, and backplanes. The RCT receives 8-bit energies and a data quality bit from the HCAL and ECAL Trigger Primitive Generators (TPGs) and sends it to the CMS Global Calorimeter Trigger (GCT) after processing. Integration tests with the TPG and GCT subsystems have been successful. Installation is complete and the RCT is integrated into the Level-1 Trigger chain. Data taking has begun using detector noise, cosmic rays, proton-beam debris, and beamhalo muons. The operation and configuration of the RCT is a completely automated process. The tools to monitor, operate, and debug the RCT are mature and will be described in detail, as well as the results from data taking with the RCT.

  13. Horizontal mergers and weak and strong competition commissions

    Directory of Open Access Journals (Sweden)

    Ristić Bojan

    2014-01-01

    Full Text Available In this paper we analyse the horizontal merger of companies in an already concentrated industry. The participants in mergers are obliged to submit notification to the Competition Commission but they also have the option of rejecting the merger. At the time of the notification submission the participants do not know whether the Commission is strong or weak, and they can complain to the Court if the Commission prohibits the merger. We model the strategic interaction between Participants and Commission in a dynamic game of incomplete information and determine weak perfect Bayesian equilibria. The main finding of our paper is that Participants will base their decision to submit notification on their belief in a weak Commission decision and will almost completely ignore the possibility of a strong Commission decision. We also provide a detailed examination of one case from Serbian regulatory practice, which coincides with the results of our game theoretical model.

  14. Commission 4: Ephemerides

    Science.gov (United States)

    Kaplan, George H.; Hohenkerk, Catherine Y.; Fukushima, Toshio; Arlot, Jean-Eudes; Bangert, John A.; Bell, Steven A.; Folkner, William M.; Lara, Martin; Pitjeva, Elena V.; Urban, Sean E.; Vondrák, Jan

    2012-04-01

    The Commission 4 Organizing Committee began its work for the 2009-2012 triennium by revising the commission's terms of reference, which serve as our ``mission statement.'' The new terms of reference are:(a)Maintain cooperation and collaboration between the national offices providing ephemerides, prediction of phenomena, astronomical reference data, and navigational almanacs.(b)Encourage agreement on the bases (reference systems, time scales, models, and constants) of astronomical ephemerides and reference data in the various countries. Promote improvements to the usability and accuracy of astronomical ephemerides, and provide information comparing computational methods, models, and results to ensure the accuracy of data provided.(c)Maintain databases, available on the Internet to the national ephemeris offices and qualified researchers, containing observations of all types on which the ephemerides are based. Promote the continued importance of observations needed to improve the ephemerides, and encourage prompt availability of these observations, especially those from space missions, to the science community.(d)Encourage the development of software and web sites that provide astronomical ephemerides, prediction of phenomena, and astronomical reference data to the scientific community and public.Promote the development of explanatory material that fosters better understanding of the use and bases of ephemerides and related data.

  15. Preparation of physics commissioning of Mochovce units 3 and 4

    International Nuclear Information System (INIS)

    Sedlacek, M.; Chrapciak, V.

    2010-01-01

    The Project 'Mochovce Units 3 and 4 Completion' started in 2009 and it will be finished in 2013. VUJE, Inc. is one of the five main Project contractors for the Nuclear Island and it is responsible, inter alia, for Mochovce Units 3 and 4 commissioning. The commissioning of Units 3 and 4 includes the stages of Physics Commissioning and Power Commissioning. This paper deals with the preparation of Mochovce Units 3 and 4 Physics Commissioning. In the paper there is presented a preparation of some commissioning documents, e.g. 'Quality Assurance Programme', 'Commissioning Programme', 'Stage Programme for Physics Commissioning', 'Test working programmes', 'Neutron-physics characteristics for Physics and Power Commissioning', etc. The scope of Physics Commissioning is presented by list of tests. For assessment of tests results so-called three-level acceptance criteria will be applied: realization, design and safety criteria. In the paper there are also presented computer codes, which will be used for neutron-physics characteristics calculation and the fuel loading scheme for the reactor core of Mochovce Unit 3. (Authors)

  16. Commissioning and Operational Experience in Power Reactor Fuel Reprocessing Plant

    Energy Technology Data Exchange (ETDEWEB)

    Pradhan, S., E-mail: spradhan@barctara.gov.in [Tarapur Based Reprocessing Plant, Bhabha Atomic Research Centre, Tarapur (India)

    2014-10-15

    After completing design, construction, commissioning, operation and maintenance experience of the reprocessing plants at Tarapur, Mumbai and Kalpakkam a new reprocessing plant is commissioned and put into operation at BARC, Tarapur since 2011. Subsequent to construction clearance, commissioning of the plant is taken in many steps with simultaneous review by design and safety committees. In spite of vast experience, all the staff was retrained in various aspects of process and utility operations and in operation of innovative changes incorporated in the design. Operating personnel are licensed through an elaborate procedure consisting of various check lists followed by personnel interview. Commissioning systems were divided in sub-systems. Sub-systems were commissioned independently and later integrated testing was carried out. For commissioning, extreme operating conditions were identified in consultation with designers and detailed commissioning procedures were made accordingly. Commissioning was done in different conditions to ensure safety, smooth operation and maintainability. Few modifications were carried out based on commissioning experience. Technical specifications for operation of the plant are made in consultation with designers and reviewed by safety committees. Operation of the plant was carried out after successful commissioning trials with Deep Depleted Uranium (DDU). Emergency operating procedures for each design basis accident were made. Performance of various systems, subsystems are quite satisfactory and the plant has given very good capacity factor. (author)

  17. Fuel cell hardware-in-loop

    Energy Technology Data Exchange (ETDEWEB)

    Moore, R.M.; Randolf, G.; Virji, M. [University of Hawaii, Hawaii Natural Energy Institute (United States); Hauer, K.H. [Xcellvision (Germany)

    2006-11-08

    Hardware-in-loop (HiL) methodology is well established in the automotive industry. One typical application is the development and validation of control algorithms for drive systems by simulating the vehicle plus the vehicle environment in combination with specific control hardware as the HiL component. This paper introduces the use of a fuel cell HiL methodology for fuel cell and fuel cell system design and evaluation-where the fuel cell (or stack) is the unique HiL component that requires evaluation and development within the context of a fuel cell system designed for a specific application (e.g., a fuel cell vehicle) in a typical use pattern (e.g., a standard drive cycle). Initial experimental results are presented for the example of a fuel cell within a fuel cell vehicle simulation under a dynamic drive cycle. (author)

  18. Hardware and software status of QCDOC

    International Nuclear Information System (INIS)

    Boyle, P.A.; Chen, D.; Christ, N.H.; Clark, M.; Cohen, S.D.; Cristian, C.; Dong, Z.; Gara, A.; Joo, B.; Jung, C.; Kim, C.; Levkova, L.; Liao, X.; Liu, G.; Mawhinney, R.D.; Ohta, S.; Petrov, K.; Wettig, T.; Yamaguchi, A.

    2004-01-01

    QCDOC is a massively parallel supercomputer whose processing nodes are based on an application-specific integrated circuit (ASIC). This ASIC was custom-designed so that crucial lattice QCD kernels achieve an overall sustained performance of 50% on machines with several 10,000 nodes. This strong scalability, together with low power consumption and a price/performance ratio of $1 per sustained MFlops, enable QCDOC to attack the most demanding lattice QCD problems. The first ASICs became available in June of 2003, and the testing performed so far has shown all systems functioning according to specification. We review the hardware and software status of QCDOC and present performance figures obtained in real hardware as well as in simulation

  19. Advanced hardware design for error correcting codes

    CERN Document Server

    Coussy, Philippe

    2015-01-01

    This book provides thorough coverage of error correcting techniques. It includes essential basic concepts and the latest advances on key topics in design, implementation, and optimization of hardware/software systems for error correction. The book’s chapters are written by internationally recognized experts in this field. Topics include evolution of error correction techniques, industrial user needs, architectures, and design approaches for the most advanced error correcting codes (Polar Codes, Non-Binary LDPC, Product Codes, etc). This book provides access to recent results, and is suitable for graduate students and researchers of mathematics, computer science, and engineering. • Examines how to optimize the architecture of hardware design for error correcting codes; • Presents error correction codes from theory to optimized architecture for the current and the next generation standards; • Provides coverage of industrial user needs advanced error correcting techniques.

  20. Hardware Design of a Smart Meter

    OpenAIRE

    Ganiyu A. Ajenikoko; Anthony A. Olaomi

    2014-01-01

    Smart meters are electronic measurement devices used by utilities to communicate information for billing customers and operating their electric systems. This paper presents the hardware design of a smart meter. Sensing and circuit protection circuits are included in the design of the smart meter in which resistors are naturally a fundamental part of the electronic design. Smart meters provides a route for energy savings, real-time pricing, automated data collection and elimina...

  1. Optimization Strategies for Hardware-Based Cofactorization

    Science.gov (United States)

    Loebenberger, Daniel; Putzka, Jens

    We use the specific structure of the inputs to the cofactorization step in the general number field sieve (GNFS) in order to optimize the runtime for the cofactorization step on a hardware cluster. An optimal distribution of bitlength-specific ECM modules is proposed and compared to existing ones. With our optimizations we obtain a speedup between 17% and 33% of the cofactorization step of the GNFS when compared to the runtime of an unoptimized cluster.

  2. Particle Transport Simulation on Heterogeneous Hardware

    CERN Multimedia

    CERN. Geneva

    2014-01-01

    CPUs and GPGPUs. About the speaker Vladimir Koylazov is CTO and founder of Chaos Software and one of the original developers of the V-Ray raytracing software. Passionate about 3D graphics and programming, Vlado is the driving force behind Chaos Group's software solutions. He participated in the implementation of algorithms for accurate light simulations and support for different hardware platforms, including CPU and GPGPU, as well as distributed calculat...

  3. High exposure rate hardware ALARA plan

    International Nuclear Information System (INIS)

    Nellesen, A.L.

    1996-10-01

    This as low as reasonably achievable review provides a description of the engineering and administrative controls used to manage personnel exposure and to control contamination levels and airborne radioactivity concentrations. HERH waste is hardware found in the N-Fuel Storage Basin, which has a contact dose rate greater than 1 R/hr and used filters. This waste will be collected in the fuel baskets at various locations in the basins

  4. Safety Commission databases support

    CERN Document Server

    Petit, S; CERN. Geneva. TS Department

    2005-01-01

    A collaboration project between the Safety Commission (SC) and the Controls, Safety and Engineering databases group (TS/CSE) started last year. The aim of this collaboration is to transfer several SC applications from their local environments onto the D7i-MTF EDMS framework, for which the TS/CSE group is responsible. Different domains of activity and projects have been defined in the areas of equipment management, safety inspections, accidents and risks management. Priorities have been established in collaboration with SC. This paper presents the new Safety Inspections Management system (SIM) which will be put in production before the summer 2005 and reviews the constraints of both the users and the development and operational framework that needed to be taken into account. The technical solutions adopted to assure a successful production start-up and operation of the SIM system are described. Progress on other on-going projects and plans for the next year are also reported.

  5. GP commissioning in England.

    Science.gov (United States)

    Charlton, Rodger

    2013-02-01

    The NHS, yet again, is in transition with an emphasis on groups of general practitioners (GPs) (clinical commissioning groups) making decisions on which specialist services should be chosen for patients requiring referral from primary care. It is an area of new terminology with a new language and further change for all working in the NHS and the all-important interface between primary and secondary care, and its impact on teamwork. There are many drivers including choice, efficiency, franchising of services, coordination and leadership in an enormous organisation, but not least reducing costs and keeping to a budget. There are many logistical issues and ethical anxieties, and only time will inform patients, practitioners, stakeholders and politicians as to its success.

  6. Trends in computer hardware and software.

    Science.gov (United States)

    Frankenfeld, F M

    1993-04-01

    Previously identified and current trends in the development of computer systems and in the use of computers for health care applications are reviewed. Trends identified in a 1982 article were increasing miniaturization and archival ability, increasing software costs, increasing software independence, user empowerment through new software technologies, shorter computer-system life cycles, and more rapid development and support of pharmaceutical services. Most of these trends continue today. Current trends in hardware and software include the increasing use of reduced instruction-set computing, migration to the UNIX operating system, the development of large software libraries, microprocessor-based smart terminals that allow remote validation of data, speech synthesis and recognition, application generators, fourth-generation languages, computer-aided software engineering, object-oriented technologies, and artificial intelligence. Current trends specific to pharmacy and hospitals are the withdrawal of vendors of hospital information systems from the pharmacy market, improved linkage of information systems within hospitals, and increased regulation by government. The computer industry and its products continue to undergo dynamic change. Software development continues to lag behind hardware, and its high cost is offsetting the savings provided by hardware.

  7. Software error masking effect on hardware faults

    International Nuclear Information System (INIS)

    Choi, Jong Gyun; Seong, Poong Hyun

    1999-01-01

    Based on the Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL), in this work, a simulation model for fault injection is developed to estimate the dependability of the digital system in operational phase. We investigated the software masking effect on hardware faults through the single bit-flip and stuck-at-x fault injection into the internal registers of the processor and memory cells. The fault location reaches all registers and memory cells. Fault distribution over locations is randomly chosen based on a uniform probability distribution. Using this model, we have predicted the reliability and masking effect of an application software in a digital system-Interposing Logic System (ILS) in a nuclear power plant. We have considered four the software operational profiles. From the results it was found that the software masking effect on hardware faults should be properly considered for predicting the system dependability accurately in operation phase. It is because the masking effect was formed to have different values according to the operational profile

  8. Instrument hardware and software upgrades at IPNS

    International Nuclear Information System (INIS)

    Worlton, Thomas; Hammonds, John; Mikkelson, D.; Mikkelson, Ruth; Porter, Rodney; Tao, Julian; Chatterjee, Alok

    2006-01-01

    IPNS is in the process of upgrading their time-of-flight neutron scattering instruments with improved hardware and software. The hardware upgrades include replacing old VAX Qbus and Multibus-based data acquisition systems with new systems based on VXI and VME. Hardware upgrades also include expanded detector banks and new detector electronics. Old VAX Fortran-based data acquisition and analysis software is being replaced with new software as part of the ISAW project. ISAW is written in Java for ease of development and portability, and is now used routinely for data visualization, reduction, and analysis on all upgraded instruments. ISAW provides the ability to process and visualize the data from thousands of detector pixels, each having thousands of time channels. These operations can be done interactively through a familiar graphical user interface or automatically through simple scripts. Scripts and operators provided by end users are automatically included in the ISAW menu structure, along with those distributed with ISAW, when the application is started

  9. Development of a hardware-in-loop attitude control simulator for a CubeSat satellite

    Science.gov (United States)

    Tapsawat, Wittawat; Sangpet, Teerawat; Kuntanapreeda, Suwat

    2018-01-01

    Attitude control is an important part in satellite on-orbit operation. It greatly affects the performance of satellites. Testing of an attitude determination and control subsystem (ADCS) is very challenging since it might require attitude dynamics and space environment in the orbit. This paper develops a low-cost hardware-in-loop (HIL) simulator for testing an ADCS of a CubeSat satellite. The simulator consists of a numerical simulation part, a hardware part, and a HIL interface hardware unit. The numerical simulation part includes orbital dynamics, attitude dynamics and Earth’s magnetic field. The hardware part is the real ADCS board of the satellite. The simulation part outputs satellite’s angular velocity and geomagnetic field information to the HIL interface hardware. Then, based on this information, the HIL interface hardware generates I2C signals mimicking the signals of the on-board rate-gyros and magnetometers and consequently outputs the signals to the ADCS board. The ADCS board reads the rate-gyro and magnetometer signals, calculates control signals, and drives the attitude actuators which are three magnetic torquers (MTQs). The responses of the MTQs sensed by a separated magnetometer are feedback to the numerical simulation part completing the HIL simulation loop. Experimental studies are conducted to demonstrate the feasibility and effectiveness of the simulator.

  10. Digital Hardware Realization of Forward and Inverse Kinematics for a Five-Axis Articulated Robot Arm

    Directory of Open Access Journals (Sweden)

    Bui Thi Hai Linh

    2015-01-01

    Full Text Available When robot arm performs a motion control, it needs to calculate a complicated algorithm of forward and inverse kinematics which consumes much CPU time and certainty slows down the motion speed of robot arm. Therefore, to solve this issue, the development of a hardware realization of forward and inverse kinematics for an articulated robot arm is investigated. In this paper, the formulation of the forward and inverse kinematics for a five-axis articulated robot arm is derived firstly. Then, the computations algorithm and its hardware implementation are described. Further, very high speed integrated circuits hardware description language (VHDL is applied to describe the overall hardware behavior of forward and inverse kinematics. Additionally, finite state machine (FSM is applied for reducing the hardware resource usage. Finally, for verifying the correctness of forward and inverse kinematics for the five-axis articulated robot arm, a cosimulation work is constructed by ModelSim and Simulink. The hardware of the forward and inverse kinematics is run by ModelSim and a test bench which generates stimulus to ModelSim and displays the output response is taken in Simulink. Under this design, the forward and inverse kinematics algorithms can be completed within one microsecond.

  11. Curriculum for Commissioning Energy Efficient Buildings

    Energy Technology Data Exchange (ETDEWEB)

    Webster, Lia [Portland Energy Conservation, Inc., OR (United States)

    2012-12-27

    In July 2010, the U.S. Department of Energy (DOE) awarded funding to PECI to develop training curriculum in commercial energy auditing and building commissioning. This program was created in response to the high demand for auditing and commissioning services in the U.S. commercial buildings market and to bridge gaps and barriers in existing training programs. Obstacles addressed included: lack of focus on entry level candidates; prohibitive cost and time required for training; lack of hands-on training; trainings that focus on certifications & process overviews; and lack of comprehensive training. PECI organized several other industry players to create a co-funded project sponsored by DOE, PECI, New York State Energy and Research Development Authority (NYSERDA), California Energy Commission (CEC), Northwest Energy Efficiency Alliance (NEEA) and California Commissioning Collaborative (CCC). After awarded, PECI teamed with another DOE awardee, New Jersey Institute of Technology (NJIT), to work collaboratively to create one comprehensive program featuring two training tracks. NJIT’s Center for Building Knowledge is a research and training institute affiliated with the College of Architecture and Design, and provided e-learning and video enhancements. This project designed and developed two training programs with a comprehensive, energy-focused curriculum to prepare new entrants to become energy auditors or commissioning authorities (CxAs). The following are the key elements of the developed trainings, which is depicted graphically in Figure 1: • Online classes are self-paced, and can be completed anywhere, any time • Commissioning Authority track includes 3 online modules made up of 24 courses delivered in 104 individual lessons, followed by a 40 hour hands-on lab. Total time required is between 75 and 100 hours, depending on the pace of the independent learner. • Energy Auditor track includes 3 online modules made up of 18 courses delivered in 72 individual

  12. Hardware for dynamic quantum computing experiments: Part I

    Science.gov (United States)

    Johnson, Blake; Ryan, Colm; Riste, Diego; Donovan, Brian; Ohki, Thomas

    Static, pre-defined control sequences routinely achieve high-fidelity operation on superconducting quantum processors. Efforts toward dynamic experiments depending on real-time information have mostly proceeded through hardware duplication and triggers, requiring a combinatorial explosion in the number of channels. We provide a hardware efficient solution to dynamic control with a complete platform of specialized FPGA-based control and readout electronics; these components enable arbitrary control flow, low-latency feedback and/or feedforward, and scale far beyond single-qubit control and measurement. We will introduce the BBN Arbitrary Pulse Sequencer 2 (APS2) control system and the X6 QDSP readout platform. The BBN APS2 features: a sequencer built around implementing short quantum gates, a sequence cache to allow long sequences with branching structures, subroutines for code re-use, and a trigger distribution module to capture and distribute steering information. The X6 QDSP features a single-stage DSP pipeline that combines demodulation with arbitrary integration kernels, and multiple taps to inspect data flow for debugging and calibration. We will show system performance when putting it all together, including a latency budget for feedforward operations. This research was funded by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), through the Army Research Office Contract No. W911NF-10-1-0324.

  13. The hardware track finder processor in CMS at CERN

    International Nuclear Information System (INIS)

    Kluge, A.

    1997-07-01

    The work covers the design of the Track Finder Processor in the high energy experiment CMS at CERN/Geneva. The task of this processor is to identify muons and to measure their transverse momentum. The Track Finder makes it possible to determine the physical relevance of each high energetic collision and to forward only interesting data to the data analysis units. Data of more than two hundred thousand detector cells are used to determine the location of muons and to measure their transverse momentum. Each 25 ns a new data set is generated. Measurement of location and transverse momentum of the muons can be terminated within 350 ns by using an ASIC. The classical method in high energy physics experiments is to employ a pattern comparison method. The predefined patterns are compared to the found patterns. The high number of data channels and the complex requirements to the spatial detector resolution do not permit to employ a pattern comparison method. A so called track following algorithm was designed, which is able to assemble complete tracks through the whole detector starting from single track segments. Instead of storing a high number of track patterns the problem is brought back to the algorithm level. Comprehensive simulations, employing the hardware simulation language VHDL, were conducted in order to optimize the algorithm and its hardware implementation. A FPGA (field program able gate array)-prototype was designed. A feasibility study to implement the track finder processor employing ASICs was conducted. (author)

  14. RF control hardware design for CYCIAE-100 cyclotron

    Energy Technology Data Exchange (ETDEWEB)

    Yin, Zhiguo, E-mail: bitbearAT@hotmail.com; Fu, Xiaoliang; Ji, Bin; Zhao, Zhenlu; Zhang, Tianjue; Li, Pengzhan; Wei, Junyi; Xing, Jiansheng; Wang, Chuan

    2015-11-21

    The Beijing Radioactive Ion-beam Facility project is being constructed by BRIF division of China Institute of Atomic Energy. In this project, a 100 MeV high intensity compact proton cyclotron is built for multiple applications. The first successful beam extraction of CYCIAE-100 cyclotron was done in the middle of 2014. The extracted proton beam energy is 100 MeV and the beam current is more than 20 μA. The RF system of the CYCIAE-100 cyclotron includes two half-wavelength cavities, two 100 kW tetrode amplifiers and power transmission line systems (all above are independent from each other) and two sets of Low Level RF control crates. Each set of LLRF control includes an amplitude control unit, a tuning control unit, a phase control unit, a local Digital Signal Process control unit and an Advanced RISC Machines based EPICS IOC unit. These two identical LLRF control crates share one common reference clock and take advantages of modern digital technologies (e.g. DSP and Direct Digital Synthesizer) to achieve closed loop voltage and phase regulations of the dee-voltage. In the beam commission, the measured dee-voltage stability of RF system is better than 0.1% and phase stability is better than 0.03°. The hardware design of the LLRF system will be reviewed in this paper.

  15. A Virtual Commissioning Learning Platform

    DEFF Research Database (Denmark)

    Mortensen, Steffen; Madsen, Ole

    2018-01-01

    The introduction of reconfigurable manufacturing systems (RMS), Industry 4.0 and the associated technologies requires the establishment of new competencies. Towards that goal, Aalborg University (AAU) has developed an Industry 4.0 learning factory, the AAU Smart Production Lab. The AAU Smart...... Production Lab integrates a number of Industry 4.0 technologies for learning and research purposes. One of the many techniques is virtual commissioning. Virtual commissioning uses a virtual plant model and real controllers (PLCs) enabling a full emulation of the manufacturing system for verification. Virtual...... commissioning can lower the commissioning time up to 63%, allowing faster time to market. However, virtual commission is still missing industrial impact one of the reasons being lack of competencies and integration experiences. The paper presents the setup of the virtual commissioning learning platform...

  16. Model Commissioning Plan and Guide Specifications

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-03-01

    The objectives of Model Commissioning Plan and Guide Specifications are to ensure that the design team applies commissioning concepts to the design and prepares commissioning specifications and a commission plan for inclusion in the bid construction documents.

  17. Cleanup Verification Package for the 118-F-7, 100-F Miscellaneous Hardware Storage Vault

    International Nuclear Information System (INIS)

    Appel, M.J.

    2006-01-01

    This cleanup verification package documents completion of remedial action for the 118-F-7, 100-F Miscellaneous Hardware Storage Vault. The site consisted of an inactive solid waste storage vault used for temporary storage of slightly contaminated reactor parts that could be recovered and reused for the 100-F Area reactor operations

  18. Cleanup Verification Package for the 118-F-7, 100-F Miscellaneous Hardware Storage Vault

    Energy Technology Data Exchange (ETDEWEB)

    M. J. Appel

    2006-11-02

    This cleanup verification package documents completion of remedial action for the 118-F-7, 100-F Miscellaneous Hardware Storage Vault. The site consisted of an inactive solid waste storage vault used for temporary storage of slightly contaminated reactor parts that could be recovered and reused for the 100-F Area reactor operations.

  19. The NUCLARR databank: Human reliability and hardware failure data for the nuclear power industry

    International Nuclear Information System (INIS)

    Reece, W.J.

    1993-01-01

    Under the sponsorship of the US Nuclear Regulatory Commission (NRC), the Nuclear Computerized Library for Assessing Reactor Reliability (NUCLARR) was developed to provide human reliability and hardware failure data to analysts in the nuclear power industry. This IBM-compatible databank is contained on a set of floppy diskettes which include data files and a menu-driven system for locating, reviewing, sorting, and retrieving the data. NUCLARR contains over 2500 individual data records, drawn from more, than 60 sources. The system is upgraded annually, to include additional human error and hardware component failure data and programming enhancements (i.e., increased user-friendliness). NUCLARR is available from the NRC through project staff at the INEL

  20. Liberalism, authority, and bioethics commissions.

    Science.gov (United States)

    MacDougall, D Robert

    2013-12-01

    Bioethicists working on national ethics commissions frequently think of themselves as advisors to the government, but distance themselves from any claims to actual authority. Governments however may find it beneficial to appear to defer to the authority of these commissions when designing laws and policies, and might appoint such commissions for exactly this reason. Where does the authority for setting laws and policies come from? This question is best answered from within a normative political philosophy. This paper explains the locus of moral authority as understood within one family of normative political theories--liberal political theories--and argues that most major "liberal" commentators have understood both the source and scope of ethics commissions' authority in a manner at odds with liberalism, rightly interpreted. The author argues that reexamining the implications of liberalism for bioethics commissions would mean changing what are considered valid criticisms of such commissions and also changing the content of national bioethics commission mandates. The author concludes that bioethicists who participate in such commissions ought to carefully examine their own views about the normative limits of governmental authority because such limits have important implications for the contribution that bioethicists can legitimately make to government commissions.

  1. Commissioning of NSLS-II

    Energy Technology Data Exchange (ETDEWEB)

    Willeke, F.

    2015-05-03

    NSLS-II, the new 3rd generation light source at BNL was designed for a brightness of 1022 photons s-1mm-2mrad-2 (0.1%BW)-1. It was constructed between 2009 and 2014. The storage ring was commissioned in April 2014 which was followed by insertion device and beamline commissioning in the fall of 2014. All ambitious design parameters of the facility have already been achieved except for commissioning the full beam intensity of 500mA which requires more RF installation. This paper reports on the results of commissioning.

  2. Hardware implementation of a GFSR pseudo-random number generator

    Science.gov (United States)

    Aiello, G. R.; Budinich, M.; Milotti, E.

    1989-12-01

    We describe the hardware implementation of a pseudo-random number generator of the "Generalized Feedback Shift Register" (GFSR) type. After brief theoretical considerations we describe two versions of the hardware, the tests done and the performances achieved.

  3. National Knowledge Commission

    Science.gov (United States)

    Pitroda, Sam

    2007-04-01

    India's National Knowledge Commission (NKC) established by the prime minister is focused on building institutions and infrastructure in Education, Science and Technology, Innovation etc. to meet the challenges of the knowledge economy in the 21st century and increase India's competitive advantage in the global market. India today stands poised to reap the benefits of a rapidly growing economy and a major demographic advantage, with 550 million young people below the age of 25 years, the largest in the world. The NKC is focused on five critical areas of knowledge related to access, concepts, creation, applications and services. This includes a variety of subject areas such as language, translations, libraries, networks, portals, affirmative action, distance learning, intellectual property, Entrepreneurship, application in Agriculture, health, small and medium scale industries, e-governance etc. One of the keys to this effort is to build a national broadband gigabit of networks of 500 nodes to connect universities, Libraries, Laboratories, Hospitals, Agriculture institutions etc. to share resources and collaborate on multidisciplinary activities. This presentation will introduce the NKC, discuss methodology, subject areas, specific recommendation and outline a plan to build knowledge networks and specifics on network architecture, applications, and utilities.

  4. Post commissioning noise study

    International Nuclear Information System (INIS)

    Heraud, P.

    2008-01-01

    This presentation described a wind farm post-commissioning study conducted at a wind farm owned by Helimax Energy Inc. The farm was located in a partly-forested, partly cultivated region in Quebec that featured gently rolling hills. Over 600 dwellings were located within 2 km of the wind farm, and 44 dwellings were within the wind farm's boundaries. The noise impact assessments were conducted at various points near the wind farm. The wind farm was designed using an International Standards Organization (ISO) noise propagation model and a 40 dBA to provide adequate setbacks. The study was conducted using 10 days of continuous measurements at selected points of a wind farm. Points of reception included points from 650 m to 800 m. Noise over 2 km was not thought to be contributed by the wind turbine. The nearest dwelling was 512 m from one of the farm's wind turbines. The study also considered ground factor, temperature, relative humidity, and the height of the receptors. Quebec noise level limits are 40 dBA at night, and 45 dBA during the day. Noise level limits are independent of wind speed. Measured noise contributions over 40 dBA were not observed during the measurement program. The wind turbines were only audible for 1 night out of the 30 night study period. It was concluded that the ISO noise propagation model is a reliable tool for conducting noise impact assessments. tabs., figs

  5. Open Source Hardware for DIY Environmental Sensing

    Science.gov (United States)

    Aufdenkampe, A. K.; Hicks, S. D.; Damiano, S. G.; Montgomery, D. S.

    2014-12-01

    The Arduino open source electronics platform has been very popular within the DIY (Do It Yourself) community for several years, and it is now providing environmental science researchers with an inexpensive alternative to commercial data logging and transmission hardware. Here we present the designs for our latest series of custom Arduino-based dataloggers, which include wireless communication options like self-meshing radio networks and cellular phone modules. The main Arduino board uses a custom interface board to connect to various research-grade sensors to take readings of turbidity, dissolved oxygen, water depth and conductivity, soil moisture, solar radiation, and other parameters. Sensors with SDI-12 communications can be directly interfaced to the logger using our open Arduino-SDI-12 software library (https://github.com/StroudCenter/Arduino-SDI-12). Different deployment options are shown, like rugged enclosures to house the loggers and rigs for mounting the sensors in both fresh water and marine environments. After the data has been collected and transmitted by the logger, the data is received by a mySQL-PHP stack running on a web server that can be accessed from anywhere in the world. Once there, the data can be visualized on web pages or served though REST requests and Water One Flow (WOF) services. Since one of the main benefits of using open source hardware is the easy collaboration between users, we are introducing a new web platform for discussion and sharing of ideas and plans for hardware and software designs used with DIY environmental sensors and data loggers.

  6. Computer hardware for radiologists: Part 2

    Directory of Open Access Journals (Sweden)

    Indrajit I

    2010-01-01

    Full Text Available Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU, chipset, random access memory (RAM, and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. "Storage drive" is a term describing a "memory" hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. "Drive interfaces" connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular "input/output devices" used commonly with computers are the printer, monitor, mouse, and keyboard. The "bus" is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated ISA bus. "Ports" are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the ′ever increasing′ digital future.

  7. Computer hardware for radiologists: Part 2

    International Nuclear Information System (INIS)

    Indrajit, IK; Alam, A

    2010-01-01

    Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. “Storage drive” is a term describing a “memory” hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. “Drive interfaces” connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular “input/output devices” used commonly with computers are the printer, monitor, mouse, and keyboard. The “bus” is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. “Ports” are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the ‘ever increasing’ digital future

  8. The Impact of Flight Hardware Scavenging on Space Logistics

    Science.gov (United States)

    Oeftering, Richard C.

    2011-01-01

    For a given fixed launch vehicle capacity the logistics payload delivered to the moon may be only roughly 20 percent of the payload delivered to the International Space Station (ISS). This is compounded by the much lower flight frequency to the moon and thus low availability of spares for maintenance. This implies that lunar hardware is much more scarce and more costly per kilogram than ISS and thus there is much more incentive to preserve hardware. The Constellation Lunar Surface System (LSS) program is considering ways of utilizing hardware scavenged from vehicles including the Altair lunar lander. In general, the hardware will have only had a matter of hours of operation yet there may be years of operational life remaining. By scavenging this hardware the program, in effect, is treating vehicle hardware as part of the payload. Flight hardware may provide logistics spares for system maintenance and reduce the overall logistics footprint. This hardware has a wide array of potential applications including expanding the power infrastructure, and exploiting in-situ resources. Scavenging can also be seen as a way of recovering the value of, literally, billions of dollars worth of hardware that would normally be discarded. Scavenging flight hardware adds operational complexity and steps must be taken to augment the crew s capability with robotics, capabilities embedded in flight hardware itself, and external processes. New embedded technologies are needed to make hardware more serviceable and scavengable. Process technologies are needed to extract hardware, evaluate hardware, reconfigure or repair hardware, and reintegrate it into new applications. This paper also illustrates how scavenging can be used to drive down the cost of the overall program by exploiting the intrinsic value of otherwise discarded flight hardware.

  9. Management of cladding hulls and fuel hardware

    International Nuclear Information System (INIS)

    1985-01-01

    The reprocessing of spent fuel from power reactors based on chop-leach technology produces a solid waste product of cladding hulls and other metallic residues. This report describes the current situation in the management of fuel cladding hulls and hardware. Information is presented on the material composition of such waste together with the heating effects due to neutron-induced activation products and fuel contamination. As no country has established a final disposal route and the corresponding repository, this report also discusses possible disposal routes and various disposal options under consideration at present

  10. Open Hardware for CERN's accelerator control systems

    International Nuclear Information System (INIS)

    Bij, E van der; Serrano, J; Wlostowski, T; Cattin, M; Gousiou, E; Sanchez, P Alvarez; Boccardi, A; Voumard, N; Penacoba, G

    2012-01-01

    The accelerator control systems at CERN will be upgraded and many electronics modules such as analog and digital I/O, level converters and repeaters, serial links and timing modules are being redesigned. The new developments are based on the FPGA Mezzanine Card, PCI Express and VME64x standards while the Wishbone specification is used as a system on a chip bus. To attract partners, the projects are developed in an 'Open' fashion. Within this Open Hardware project new ways of working with industry are being evaluated and it has been proven that industry can be involved at all stages, from design to production and support.

  11. Hardware for computing the integral image

    OpenAIRE

    Fernández-Berni, J.; Rodríguez-Vázquez, Ángel; Río, Rocío del; Carmona-Galán, R.

    2015-01-01

    La presente invención, según se expresa en el enunciado de esta memoria descriptiva, consiste en hardware de señal mixta para cómputo de la imagen integral en el plano focal mediante una agrupación de celdas básicas de sensado-procesamiento cuya interconexión puede ser reconfigurada mediante circuitería periférica que hace posible una implementación muy eficiente de una tarea de procesamiento muy útil en visión artificial como es el cálculo de la imagen integral en escenarios tales como monit...

  12. Development of Hardware Dual Modality Tomography System

    Directory of Open Access Journals (Sweden)

    R. M. Zain

    2009-06-01

    Full Text Available The paper describes the hardware development and performance of the Dual Modality Tomography (DMT system. DMT consists of optical and capacitance sensors. The optical sensors consist of 16 LEDs and 16 photodiodes. The Electrical Capacitance Tomography (ECT electrode design use eight electrode plates as the detecting sensor. The digital timing and the control unit have been developing in order to control the light projection of optical emitters, switching the capacitance electrodes and to synchronize the operation of data acquisition. As a result, the developed system is able to provide a maximum 529 set data per second received from the signal conditioning circuit to the computer.

  13. Fast Gridding on Commodity Graphics Hardware

    DEFF Research Database (Denmark)

    Sørensen, Thomas Sangild; Schaeffter, Tobias; Noe, Karsten Østergaard

    2007-01-01

    is the far most time consuming of the three steps (Table 1). Modern graphics cards (GPUs) can be utilised as a fast parallel processor provided that algorithms are reformulated in a parallel solution. The purpose of this work is to test the hypothesis, that a non-cartesian reconstruction can be efficiently...... implemented on graphics hardware giving a significant speedup compared to CPU based alternatives. We present a novel GPU implementation of the convolution step that overcomes the problems of memory bandwidth that has limited the speed of previous GPU gridding algorithms [2]....

  14. Reconfigurable Hardware for Compressing Hyperspectral Image Data

    Science.gov (United States)

    Aranki, Nazeeh; Namkung, Jeffrey; Villapando, Carlos; Kiely, Aaron; Klimesh, Matthew; Xie, Hua

    2010-01-01

    High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of

  15. List search hardware for interpretive software

    CERN Document Server

    Altaber, Jacques; Mears, B; Rausch, R

    1979-01-01

    Interpreted languages, e.g. BASIC, are simple to learn, easy to use, quick to modify and in general 'user-friendly'. However, a critically time consuming process during interpretation is that of list searching. A special microprogrammed device for fast list searching has therefore been developed at the SPS Division of CERN. It uses bit- sliced hardware. Fast algorithms perform search, insert and delete of a six-character name and its value in a list of up to 1000 pairs. The prototype shows retrieval times of the order of 10-30 microseconds. (11 refs).

  16. Hardware trigger processor for the MDT system

    CERN Document Server

    AUTHOR|(SzGeCERN)757787; The ATLAS collaboration; Hazen, Eric; Butler, John; Black, Kevin; Gastler, Daniel Edward; Ntekas, Konstantinos; Taffard, Anyes; Martinez Outschoorn, Verena; Ishino, Masaya; Okumura, Yasuyuki

    2017-01-01

    We are developing a low-latency hardware trigger processor for the Monitored Drift Tube system in the Muon spectrometer. The processor will fit candidate Muon tracks in the drift tubes in real time, improving significantly the momentum resolution provided by the dedicated trigger chambers. We present a novel pure-FPGA implementation of a Legendre transform segment finder, an associative-memory alternative implementation, an ARM (Zynq) processor-based track fitter, and compact ATCA carrier board architecture. The ATCA architecture is designed to allow a modular, staged approach to deployment of the system and exploration of alternative technologies.

  17. Static Scheduling of Periodic Hardware Tasks with Precedence and Deadline Constraints on Reconfigurable Hardware Devices

    Directory of Open Access Journals (Sweden)

    Ikbel Belaid

    2011-01-01

    Full Text Available Task graph scheduling for reconfigurable hardware devices can be defined as finding a schedule for a set of periodic tasks with precedence, dependence, and deadline constraints as well as their optimal allocations on the available heterogeneous hardware resources. This paper proposes a new methodology comprising three main stages. Using these three main stages, dynamic partial reconfiguration and mixed integer programming, pipelined scheduling and efficient placement are achieved and enable parallel computing of the task graph on the reconfigurable devices by optimizing placement/scheduling quality. Experiments on an application of heterogeneous hardware tasks demonstrate an improvement of resource utilization of 12.45% of the available reconfigurable resources corresponding to a resource gain of 17.3% compared to a static design. The configuration overhead is reduced to 2% of the total running time. Due to pipelined scheduling, the task graph spanning is minimized by 4% compared to sequential execution of the graph.

  18. Is Hardware Removal Recommended after Ankle Fracture Repair?

    Directory of Open Access Journals (Sweden)

    Hong-Geun Jung

    2016-01-01

    Full Text Available The indications and clinical necessity for routine hardware removal after treating ankle or distal tibia fracture with open reduction and internal fixation are disputed even when hardware-related pain is insignificant. Thus, we determined the clinical effects of routine hardware removal irrespective of the degree of hardware-related pain, especially in the perspective of patients’ daily activities. This study was conducted on 80 consecutive cases (78 patients treated by surgery and hardware removal after bony union. There were 56 ankle and 24 distal tibia fractures. The hardware-related pain, ankle joint stiffness, discomfort on ambulation, and patient satisfaction were evaluated before and at least 6 months after hardware removal. Pain score before hardware removal was 3.4 (range 0 to 6 and decreased to 1.3 (range 0 to 6 after removal. 58 (72.5% patients experienced improved ankle stiffness and 65 (81.3% less discomfort while walking on uneven ground and 63 (80.8% patients were satisfied with hardware removal. These results suggest that routine hardware removal after ankle or distal tibia fracture could ameliorate hardware-related pain and improves daily activities and patient satisfaction even when the hardware-related pain is minimal.

  19. ISS Logistics Hardware Disposition and Metrics Validation

    Science.gov (United States)

    Rogers, Toneka R.

    2010-01-01

    I was assigned to the Logistics Division of the International Space Station (ISS)/Spacecraft Processing Directorate. The Division consists of eight NASA engineers and specialists that oversee the logistics portion of the Checkout, Assembly, and Payload Processing Services (CAPPS) contract. Boeing, their sub-contractors and the Boeing Prime contract out of Johnson Space Center, provide the Integrated Logistics Support for the ISS activities at Kennedy Space Center. Essentially they ensure that spares are available to support flight hardware processing and the associated ground support equipment (GSE). Boeing maintains a Depot for electrical, mechanical and structural modifications and/or repair capability as required. My assigned task was to learn project management techniques utilized by NASA and its' contractors to provide an efficient and effective logistics support infrastructure to the ISS program. Within the Space Station Processing Facility (SSPF) I was exposed to Logistics support components, such as, the NASA Spacecraft Services Depot (NSSD) capabilities, Mission Processing tools, techniques and Warehouse support issues, required for integrating Space Station elements at the Kennedy Space Center. I also supported the identification of near-term ISS Hardware and Ground Support Equipment (GSE) candidates for excessing/disposition prior to October 2010; and the validation of several Logistics Metrics used by the contractor to measure logistics support effectiveness.

  20. CASIS Fact Sheet: Hardware and Facilities

    Science.gov (United States)

    Solomon, Michael R.; Romero, Vergel

    2016-01-01

    Vencore is a proven information solutions, engineering, and analytics company that helps our customers solve their most complex challenges. For more than 40 years, we have designed, developed and delivered mission-critical solutions as our customers' trusted partner. The Engineering Services Contract, or ESC, provides engineering and design services to the NASA organizations engaged in development of new technologies at the Kennedy Space Center. Vencore is the ESC prime contractor, with teammates that include Stinger Ghaffarian Technologies, Sierra Lobo, Nelson Engineering, EASi, and Craig Technologies. The Vencore team designs and develops systems and equipment to be used for the processing of space launch vehicles, spacecraft, and payloads. We perform flight systems engineering for spaceflight hardware and software; develop technologies that serve NASA's mission requirements and operations needs for the future. Our Flight Payload Support (FPS) team at Kennedy Space Center (KSC) provides engineering, development, and certification services as well as payload integration and management services to NASA and commercial customers. Our main objective is to assist principal investigators (PIs) integrate their science experiments into payload hardware for research aboard the International Space Station (ISS), commercial spacecraft, suborbital vehicles, parabolic flight aircrafts, and ground-based studies. Vencore's FPS team is AS9100 certified and a recognized implementation partner for the Center for Advancement of Science in Space (CASIS

  1. ARM assembly language with hardware experiments

    CERN Document Server

    Elahi, Ata

    2015-01-01

    This book provides a hands-on approach to learning ARM assembly language with the use of a TI microcontroller. The book starts with an introduction to computer architecture and then discusses number systems and digital logic. The text covers ARM Assembly Language, ARM Cortex Architecture and its components, and Hardware Experiments using TILM3S1968. Written for those interested in learning embedded programming using an ARM Microcontroller. ·         Introduces number systems and signal transmission methods   ·         Reviews logic gates, registers, multiplexers, decoders and memory   ·         Provides an overview and examples of ARM instruction set   ·         Uses using Keil development tools for writing and debugging ARM assembly language Programs   ·         Hardware experiments using a Mbed NXP LPC1768 microcontroller; including General Purpose Input/Output (GPIO) configuration, real time clock configuration, binary input to 7-segment display, creating ...

  2. Introduction to Hardware Security and Trust

    CERN Document Server

    Wang, Cliff

    2012-01-01

    The emergence of a globalized, horizontal semiconductor business model raises a set of concerns involving the security and trust of the information systems on which modern society is increasingly reliant for mission-critical functionality. Hardware-oriented security and trust issues span a broad range including threats related to the malicious insertion of Trojan circuits designed, e.g.,to act as a ‘kill switch’ to disable a chip, to integrated circuit (IC) piracy,and to attacks designed to extract encryption keys and IP from a chip. This book provides the foundations for understanding hardware security and trust, which have become major concerns for national security over the past decade.  Coverage includes security and trust issues in all types of electronic devices and systems such as ASICs, COTS, FPGAs, microprocessors/DSPs, and embedded systems.  This serves as an invaluable reference to the state-of-the-art research that is of critical significance to the security of,and trust in, modern society�...

  3. Nuclear Regulatory Commission Information Digest, 1991 edition

    International Nuclear Information System (INIS)

    Olive, K.L.

    1991-03-01

    The Nuclear Regulatory Commission Information Digest provides a summary of information about the US Nuclear Regulatory Commission (NRC), NRC's regulatory responsibilities, and the areas NRC licenses. This digest is a compilation of NRC-related data and is designed to provide a quick reference to major facts about the agency and the industry it regulates. In general, the data cover 1975 through 1990, with exceptions noted. For operating US commercial nuclear power reactors, information on generating capacity and average capacity factor is obtained from Monthly Operating Reports submitted to the NRC directly by the licensee. This information is reviewed for consistency only. No independent validation and/or verification is performed by the NRC. For detailed and complete information about tables and figures, refer to the source publications. This digest is published annually for the general use of the NRC staff and is available to the public. 30 figs., 12 tabs

  4. Commission 31: Time

    Science.gov (United States)

    Matsakis, Demetrios; Defraigne, Pascale; Hosokawa, M.; Leschiutta, S.; Petit, G.; Zhai, Z.-C.

    2007-03-01

    The most intensely discussed and controversial issue in time keeping has been the proposal before the International Telecommunications Union (ITU) to redefine Coordinated Universal Time (UTC) so as to replace leap seconds by leap hours. Should this proposal be adopted, the practice of inserting leap seconds would cease after a specific date. Should the Earth's rotation continue to de-accelerate at its historical rate, the next discontinuity in UTC would be an hour inserted several centuries from now. Advocates of this proposal cite the need to synchronize satellite and other systems, such as GPS, Galileo, and GLONASS, which did not exist and were not envisioned when the current system was adopted. They note that leap second insertions can be and have been incorrectly implemented or accounted for. Such errors have to date had localized impact, but they could cause serious mishaps involving loss of life. For example, some GPS receivers have been known to fail simply because there was no leap second after a long enough interval, other GPS receivers failed because the leap second information was broadcast more than three months in advance, and some commercial software used for internet time-transfer Network Time Protocol (NTP) could either discard all data received after a leap second or interpret it as a frequency change. The ambiguity associated with the extra second could also disrupt financial accounting and certain forms of encryption. Those opposed to the proposal question the need for a change, and also point out the costs of adjusting to the proposed change and its inconvenience to amateur astronomers and others who rely upon astronomical calculations published in advance. Reports have been circulated that the cost of checking and correcting software to accommodate the new definition of UTC would be many millions of dollars for some systems. In October 2005 American Astronomical Society asked the ITU for a year's time to study the issue. This commission has

  5. 15 MW HArdware-in-the-loop Grid Simulation Project

    Energy Technology Data Exchange (ETDEWEB)

    Rigas, Nikolaos [Clemson Univ., SC (United States); Fox, John Curtiss [Clemson Univ., SC (United States); Collins, Randy [Clemson Univ., SC (United States); Tuten, James [Clemson Univ., SC (United States); Salem, Thomas [Clemson Univ., SC (United States); McKinney, Mark [Clemson Univ., SC (United States); Hadidi, Ramtin [Clemson Univ., SC (United States); Gislason, Benjamin [Clemson Univ., SC (United States); Boessneck, Eric [Clemson Univ., SC (United States); Leonard, Jesse [Clemson Univ., SC (United States)

    2014-10-31

    The 15MW Hardware-in-the-loop (HIL) Grid Simulator project was to (1) design, (2) construct and (3) commission a state-of-the-art grid integration testing facility for testing of multi-megawatt devices through a ‘shared facility’ model open to all innovators to promote the rapid introduction of new technology in the energy market to lower the cost of energy delivered. The 15 MW HIL Grid Simulator project now serves as the cornerstone of the Duke Energy Electric Grid Research, Innovation and Development (eGRID) Center. This project leveraged the 24 kV utility interconnection and electrical infrastructure of the US DOE EERE funded WTDTF project at the Clemson University Restoration Institute in North Charleston, SC. Additionally, the project has spurred interest from other technology sectors, including large PV inverter and energy storage testing and several leading edge research proposals dealing with smart grid technologies, grid modernization and grid cyber security. The key components of the project are the power amplifier units capable of providing up to 20MW of defined power to the research grid. The project has also developed a one of a kind solution to performing fault ride-through testing by combining a reactive divider network and a large power converter into a hybrid method. This unique hybrid method of performing fault ride-through analysis will allow for the research team at the eGRID Center to investigate the complex differences between the alternative methods of performing fault ride-through evaluations and will ultimately further the science behind this testing. With the final goal of being able to perform HIL experiments and demonstration projects, the eGRID team undertook a significant challenge with respect to developing a control system that is capable of communicating with several different pieces of equipment with different communication protocols in real-time. The eGRID team developed a custom fiber optical network that is based upon FPGA

  6. The work of the international commission on radiological protection

    International Nuclear Information System (INIS)

    Clarke, R.H.

    1996-01-01

    ICRP was established in 1928 as the International X-ray and Radium Protection Committee. In 1950 the name was changed to reflect the wider scope of radiological protection. The present membership of the Main Commission and its four committees was established in July 1993 for the period 1993-1997. Their programmes of work are now nearing completion with the Committees having met four times and their progress is summarised. The Main Commission meets in November 1996, when one of the main topics will be the election of the new Commission and members of the four Committees for the period 1997-2001

  7. OpenMM 4: A Reusable, Extensible, Hardware Independent Library for High Performance Molecular Simulation.

    Science.gov (United States)

    Eastman, Peter; Friedrichs, Mark S; Chodera, John D; Radmer, Randall J; Bruns, Christopher M; Ku, Joy P; Beauchamp, Kyle A; Lane, Thomas J; Wang, Lee-Ping; Shukla, Diwakar; Tye, Tony; Houston, Mike; Stich, Timo; Klein, Christoph; Shirts, Michael R; Pande, Vijay S

    2013-01-08

    OpenMM is a software toolkit for performing molecular simulations on a range of high performance computing architectures. It is based on a layered architecture: the lower layers function as a reusable library that can be invoked by any application, while the upper layers form a complete environment for running molecular simulations. The library API hides all hardware-specific dependencies and optimizations from the users and developers of simulation programs: they can be run without modification on any hardware on which the API has been implemented. The current implementations of OpenMM include support for graphics processing units using the OpenCL and CUDA frameworks. In addition, OpenMM was designed to be extensible, so new hardware architectures can be accommodated and new functionality (e.g., energy terms and integrators) can be easily added.

  8. Event-driven processing for hardware-efficient neural spike sorting

    Science.gov (United States)

    Liu, Yan; Pereira, João L.; Constandinou, Timothy G.

    2018-02-01

    Objective. The prospect of real-time and on-node spike sorting provides a genuine opportunity to push the envelope of large-scale integrated neural recording systems. In such systems the hardware resources, power requirements and data bandwidth increase linearly with channel count. Event-based (or data-driven) processing can provide here a new efficient means for hardware implementation that is completely activity dependant. In this work, we investigate using continuous-time level-crossing sampling for efficient data representation and subsequent spike processing. Approach. (1) We first compare signals (synthetic neural datasets) encoded with this technique against conventional sampling. (2) We then show how such a representation can be directly exploited by extracting simple time domain features from the bitstream to perform neural spike sorting. (3) The proposed method is implemented in a low power FPGA platform to demonstrate its hardware viability. Main results. It is observed that considerably lower data rates are achievable when using 7 bits or less to represent the signals, whilst maintaining the signal fidelity. Results obtained using both MATLAB and reconfigurable logic hardware (FPGA) indicate that feature extraction and spike sorting accuracies can be achieved with comparable or better accuracy than reference methods whilst also requiring relatively low hardware resources. Significance. By effectively exploiting continuous-time data representation, neural signal processing can be achieved in a completely event-driven manner, reducing both the required resources (memory, complexity) and computations (operations). This will see future large-scale neural systems integrating on-node processing in real-time hardware.

  9. Handbook of hardware/software codesign

    CERN Document Server

    Teich, Jürgen

    2017-01-01

    This handbook presents fundamental knowledge on the hardware/software (HW/SW) codesign methodology. Contributing expert authors look at key techniques in the design flow as well as selected codesign tools and design environments, building on basic knowledge to consider the latest techniques. The book enables readers to gain real benefits from the HW/SW codesign methodology through explanations and case studies which demonstrate its usefulness. Readers are invited to follow the progress of design techniques through this work, which assists readers in following current research directions and learning about state-of-the-art techniques. Students and researchers will appreciate the wide spectrum of subjects that belong to the design methodology from this handbook. .

  10. Battery Management System Hardware Concepts: An Overview

    Directory of Open Access Journals (Sweden)

    Markus Lelie

    2018-03-01

    Full Text Available This paper focuses on the hardware aspects of battery management systems (BMS for electric vehicle and stationary applications. The purpose is giving an overview on existing concepts in state-of-the-art systems and enabling the reader to estimate what has to be considered when designing a BMS for a given application. After a short analysis of general requirements, several possible topologies for battery packs and their consequences for the BMS’ complexity are examined. Four battery packs that were taken from commercially available electric vehicles are shown as examples. Later, implementation aspects regarding measurement of needed physical variables (voltage, current, temperature, etc. are discussed, as well as balancing issues and strategies. Finally, safety considerations and reliability aspects are investigated.

  11. EPICS: Allen-Bradley hardware reference manual

    International Nuclear Information System (INIS)

    Nawrocki, G.

    1993-01-01

    This manual covers the following hardware: Allen-Bradley 6008 -- SV VMEbus I/O scanner; Allen-Bradley universal I/O chassis 1771-A1B, -A2B, -A3B, and -A4B; Allen-Bradley power supply module 1771-P4S; Allen-Bradley 1771-ASB remote I/O adapter module; Allen-Bradley 1771-IFE analog input module; Allen-Bradley 1771-OFE analog output module; Allen-Bradley 1771-IG(D) TTL input module; Allen-Bradley 1771-OG(d) TTL output; Allen-Bradley 1771-IQ DC selectable input module; Allen-Bradley 1771-OW contact output module; Allen-Bradley 1771-IBD DC (10--30V) input module; Allen-Bradley 1771-OBD DC (10--60V) output module; Allen-Bradley 1771-IXE thermocouple/millivolt input module; and the Allen-Bradley 2705 RediPANEL push button module

  12. Locating hardware faults in a parallel computer

    Science.gov (United States)

    Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.; Smith, Brian E.

    2010-04-13

    Locating hardware faults in a parallel computer, including defining within a tree network of the parallel computer two or more sets of non-overlapping test levels of compute nodes of the network that together include all the data communications links of the network, each non-overlapping test level comprising two or more adjacent tiers of the tree; defining test cells within each non-overlapping test level, each test cell comprising a subtree of the tree including a subtree root compute node and all descendant compute nodes of the subtree root compute node within a non-overlapping test level; performing, separately on each set of non-overlapping test levels, an uplink test on all test cells in a set of non-overlapping test levels; and performing, separately from the uplink tests and separately on each set of non-overlapping test levels, a downlink test on all test cells in a set of non-overlapping test levels.

  13. Theorem Proving in Intel Hardware Design

    Science.gov (United States)

    O'Leary, John

    2009-01-01

    For the past decade, a framework combining model checking (symbolic trajectory evaluation) and higher-order logic theorem proving has been in production use at Intel. Our tools and methodology have been used to formally verify execution cluster functionality (including floating-point operations) for a number of Intel products, including the Pentium(Registered TradeMark)4 and Core(TradeMark)i7 processors. Hardware verification in 2009 is much more challenging than it was in 1999 - today s CPU chip designs contain many processor cores and significant firmware content. This talk will attempt to distill the lessons learned over the past ten years, discuss how they apply to today s problems, outline some future directions.

  14. Hardware implementation of stochastic spiking neural networks.

    Science.gov (United States)

    Rosselló, Josep L; Canals, Vincent; Morro, Antoni; Oliver, Antoni

    2012-08-01

    Spiking Neural Networks, the last generation of Artificial Neural Networks, are characterized by its bio-inspired nature and by a higher computational capacity with respect to other neural models. In real biological neurons, stochastic processes represent an important mechanism of neural behavior and are responsible of its special arithmetic capabilities. In this work we present a simple hardware implementation of spiking neurons that considers this probabilistic nature. The advantage of the proposed implementation is that it is fully digital and therefore can be massively implemented in Field Programmable Gate Arrays. The high computational capabilities of the proposed model are demonstrated by the study of both feed-forward and recurrent networks that are able to implement high-speed signal filtering and to solve complex systems of linear equations.

  15. Communication Estimation for Hardware/Software Codesign

    DEFF Research Database (Denmark)

    Knudsen, Peter Voigt; Madsen, Jan

    1998-01-01

    This paper presents a general high level estimation model of communication throughput for the implementation of a given communication protocol. The model, which is part of a larger model that includes component price, software driver object code size and hardware driver area, is intended...... to be general enough to be able to capture the characteristics of a wide range of communication protocols and yet to be sufficiently detailed as to allow the designer or design tool to efficiently explore tradeoffs between throughput, bus widths, burst/non-burst transfers and data packing strategies. Thus...... it provides a basis for decision making with respect to communication protocols/components and communication driver design in the initial design space exploration phase of a co-synthesis process where a large number of possibilities must be examined and where fast estimators are therefore necessary. The fill...

  16. The double Chooz hardware trigger system

    Energy Technology Data Exchange (ETDEWEB)

    Cucoanes, Andi; Beissel, Franz; Reinhold, Bernd; Roth, Stefan; Stahl, Achim; Wiebusch, Christopher [RWTH Aachen (Germany)

    2008-07-01

    The double Chooz neutrino experiment aims to improve the present knowledge on {theta}{sub 13} mixing angle using two similar detectors placed at {proportional_to}280 m and respectively 1 km from the Chooz power plant reactor cores. The detectors measure the disappearance of reactor antineutrinos. The hardware trigger has to be very efficient for antineutrinos as well as for various types of background events. The triggering condition is based on discriminated PMT sum signals and the multiplicity of groups of PMTs. The talk gives an outlook to the double Chooz experiment and explains the requirements of the trigger system. The resulting concept and its performance is shown as well as first results from a prototype system.

  17. DAQ INSTALLATION IN USC COMPLETED

    CERN Multimedia

    A. Racz

    After one year of work at P5 in the underground control rooms (USC55-S1&S2), the DAQ installation in USC55 is completed. The first half of 2006 was dedicated to the DAQ infrastructures installation (private cable trays, rack equipment for a very dense cabling, connection to services i.e. water, power, network). The second half has been spent to install the custom made electronics (FRLs and FMMs) and place all the inter-rack cables/fibers connecting all sub-systems to central DAQ (more details are given in the internal pages). The installation has been carried out by DAQ group members, coming from the hardware and software side as well. The pictures show the very nice team spirit !

  18. European Commission policies

    International Nuclear Information System (INIS)

    Coldwell, R.

    1993-01-01

    This debate discusses the debate surrounding the proposed European Community (EC) Directive on the completion of the internal energy market for natural gas and electric power. The context in which the liberalisation program is proposed is described for electricity, considering political issues, international ownership patterns and trade between Eastern and Western Europe. The author then argues for Member States to be consistent and fair, bearing in mind existing variations in liberalisation of national energy markets. Finally the components of the directive are examined. The United Kingdom, with its already liberalised electricity industry has much to gain from the Directive, while other countries which oppose it, are seen as protecting the vested interests of their own utilities. (UK)

  19. 1990 Recommendations of the International Commission on Radiological Protection adopted by the Commission in November 1990

    International Nuclear Information System (INIS)

    1991-01-01

    This publication represents a completely new set of basic recommendations, outdating ICRP Publication 26. They aim to: a) take account of new biological information and of trends in setting safety standards; b) improve the presentation of the recommendations: c) maintain as much stability in the recommendations as is consistent with the new information. The recommendations cover quantities, biological aspects, the conceptual framework of radiological protection, proposed and continuing practices (occupational, medical and public exposure) and implementation of the Commission's Recommendations. (UK)

  20. Automated Execution and Tracking of the LHC Commissioning Tests

    CERN Document Server

    Fuchsberger, K; Galetzka, M; Gorbonosov, R; Pojer, M; Solfaroli Camillocci, M; Zerlauth, M

    2012-01-01

    To ensure the correct operation and prevent system failures, which can lead to equipment damage in the worst case, all critical systems in the Large Hadron Collider (LHC), among them the superconducting circuits, have to be tested thoroughly during dedicated commissioning phases after each intervention. In view of the around 7,000 individual tests to be performed each year after a Christmas stop, a lot of effort was already put into the automation of these tests at the beginning of LHC hardware commissioning in 2005, to assure the dependable execution and analysis of these tests. To further increase the productivity during the commissioning campaigns and to enforce a more consistent workflow, the development of a dedicated testing framework was launched. This new framework is designed to schedule and track the automated tests for all systems of the LHC and will also be extendable, e.g., to beam commissioning tests. This is achieved by re-using different, already existing execution frameworks. In this paper, w...

  1. Measurement and evaluation systems for NPP commissioning

    International Nuclear Information System (INIS)

    Elko, Marek

    2006-01-01

    Standard core monitoring and information systems are designed with an emphasis on normal operation of nuclear power plant. Their purpose is to provide necessary support for reactor operators and other operating personnel during the fuel cycle. After each fuel reloading, and to the larger extent during the plant commissioning, a variety of start-up tests need to be carried out and evaluated. Sampling periods, accuracy and communication delays of standard systems are not always suitable for test performance and evaluation. For technical and safety reasons, the access to standard monitoring and information systems is very limited. Non-Standard Measurement and Evaluation Systems are highly specialized devices designed with an emphasis on start-up tests performance and evaluation. They are capable of high frequency sampling, processing and communication of hundreds of technological signals with required accuracy and low communication delay. All technological signals needed for the test performance and evaluation are collected from various systems, concentrated in one system and fully accessible to a test leader, a reactor physicist or other users. In addition, Non-Standard Measurement and Evaluation Systems can perform other tasks like data storing and presentation, data distribution to other systems or external computers via network, reactivity calculations, etc. Structure of such systems can vary, but generally it is a mixture of two basic concepts: a mobile system and a stationary system. A basic description of hardware structure and software equipment of Non-Standard Measurement and Evaluation Systems is given in the paper (Authors)

  2. 2D to 3D conversion implemented in different hardware

    Science.gov (United States)

    Ramos-Diaz, Eduardo; Gonzalez-Huitron, Victor; Ponomaryov, Volodymyr I.; Hernandez-Fragoso, Araceli

    2015-02-01

    Conversion of available 2D data for release in 3D content is a hot topic for providers and for success of the 3D applications, in general. It naturally completely relies on virtual view synthesis of a second view given by original 2D video. Disparity map (DM) estimation is a central task in 3D generation but still follows a very difficult problem for rendering novel images precisely. There exist different approaches in DM reconstruction, among them manually and semiautomatic methods that can produce high quality DMs but they demonstrate hard time consuming and are computationally expensive. In this paper, several hardware implementations of designed frameworks for an automatic 3D color video generation based on 2D real video sequence are proposed. The novel framework includes simultaneous processing of stereo pairs using the following blocks: CIE L*a*b* color space conversions, stereo matching via pyramidal scheme, color segmentation by k-means on an a*b* color plane, and adaptive post-filtering, DM estimation using stereo matching between left and right images (or neighboring frames in a video), adaptive post-filtering, and finally, the anaglyph 3D scene generation. Novel technique has been implemented on DSP TMS320DM648, Matlab's Simulink module over a PC with Windows 7, and using graphic card (NVIDIA Quadro K2000) demonstrating that the proposed approach can be applied in real-time processing mode. The time values needed, mean Similarity Structural Index Measure (SSIM) and Bad Matching Pixels (B) values for different hardware implementations (GPU, Single CPU, and DSP) are exposed in this paper.

  3. Commissioning plans for SSC linac

    International Nuclear Information System (INIS)

    Hurd, J.W.; Aprile, R.L.; Chang, C.R.; Crist, C.E.; Cutler, R.I.; Funk, L.W.; Guy, F.W.; Leifeste, G.T.; Raparia, D.; Saadatmand, K.; Sethi, R.C.; Swenson, D.A.; Tooker, J.; Yao, C.G.

    1992-01-01

    Presented are the general description of the SSC linac and the plans for commissioning. Sections of the linac are installed, tested, and beam commissioned in a serial approach. A specialized set of diagnostics is used to characterize the beam through each section. In addition to the standard diagnostic set, plans call for the use of a bunch shape monitor and x-ray spectrometer. Streak camera and digital imaging diagnostics will be developed. The commissioning plan is folded into the general linac project schedule to show the relation between delivery, staging, installation, conditioning, and actual commissioning with beam. These plans form the basis for coordination between the various organizations responsible for different elements of the linac including the technical components, infrastructure, and temporary staging and operation facilities. (Author) 2 figs., 17 refs

  4. 78 FR 76218 - Rural Call Completion

    Science.gov (United States)

    2013-12-17

    ... calls to rural areas, and enforce restrictions against blocking, choking, reducing, or restricting calls... to alert the Commission of systemic problems receiving calls from a particular originating long... associated with completing calls to rural areas. These rules will also enhance our ability to enforce...

  5. Nuclear Regulatory Commission Information Digest: 1993 edition

    International Nuclear Information System (INIS)

    1993-03-01

    The Nuclear Regulatory Commission Information Digest (digest) provides a summary of information about the U.S. Nuclear Regulatory Commission (NRC), NRC's regulatory responsibilities, the activities NRC licenses, and general information on domestic and worldwide nuclear energy. The digest, published annually, is a compilation of nuclear- and NRC-related data and is designed to provide a quick reference to major facts about the agency and the industry it regulates. In general, the data cover 1975 through 1992, with exceptions noted. Information on generating capacity and average capacity factor for operating U.S. commercial nuclear power reactors is obtained from monthly operating reports that are submitted directly to the NRC by the licensee. This information is reviewed by the NRC for consistency only and no independent validation and/or verification is performed. Comments and/or suggestions on the data presented are welcomed and should be directed to Karen Olive, United States Nuclear Regulatory Commission, Office of the Controller, Division of Budget and Analysis, Washington, D.C. 20555. For detailed and complete information about tables and figures, refer to the source publications

  6. NSLS-II commissioning and operation

    Energy Technology Data Exchange (ETDEWEB)

    Wang, G., E-mail: gwang@bnl.gov; Shaftan, T.; Bassi, G.; Bengtsson, J.; Blednykh, A.; Blum, E.; Cheng, W.; Choi, J.; Davidsaver, M.; Doom, L.; Fliller, R.; Ganetis, G.; Guo, W.; Hidaka, Y.; Kramer, S.; Li, Y.; Podobedov, B.; Qian, K.; Rose, J.; Seletskiy, S. [Brookhaven National Laboratory, Upton, NY 11973 (United States); and others

    2016-07-27

    The National Synchrotron Light Source II at Brookhaven National Lab is a third-generation synchrotron radiation facility that has been commissioned in 2014. The facility is based on a 3 GeV electron storage ring, which will circulate 500 mA of beam current at 1 nm rad horizontal emittance. The storage ring is 792 meters in circumference and will accommodate more than 60 beamlines in the final built-out. The beamline sources range from insertion-devices located in straight sections, bending magnets or three-pole-wigglers configured in multiple branches. The NSLS-II storage ring commissioning was successfully completed in July 2014 and the facility delivered the first user light on October 23, 2014. Currently the storage ring reached 300 mA beam current and achieved 1 nm rad of horizontal emittance with 3 sets of Damping Wigglers. At this point six NSLS-II project beamlines are routinely taking photons with beam current at 150 mA. This paper reviews the NSLS-II accelerator design and commissioning experience.

  7. CEBAF Cryomodule Commissioning in the South Linac

    International Nuclear Information System (INIS)

    M. Drury; H. Lankford; T. Lee; J. Marshall; J. Preble; Q. Saulter; W. Schneider; Michael Spata; Mark Wiseman

    1993-01-01

    When complete, the Continuous Electron Beam Accelerator Facility will house a 4 GeV recirculating linear accelerator containing 42 1/4 cryomodules arrayed in two antiparallel linacs and an injector. Currently, 38 1/4 cryomodules have been installed. Each cryomodule contains eight superconducting niobium 5-cell rf cavities that operate at 1.497 GHz[1]. A cryomodule must provide an energy gain of 20 MeV to the 200 mu-A beam[2]. The resultant dynamic heat load must be less than 45 W. The cavity parameters that are measured during the commissioning process include the external Q's (Q(sub ext)) of the cavity ports, the unloaded Q (Q(sub 0)) of the cavity as a function of accelerating gradient, and the maximum operating gradient of the cavity[3]. Finally, the mechanical tuners are cycled and characterized. A portable test stand allows local control of the rf system and provides automated data acquisition. During the period from April 1993 through September 1993, 16 of the 20 cryomodules installed in the South Linac were commissioned. All cryomodules tested in the South Linac meet or exceed the CEBAF specifications. This paper describes the results of the commissioning of the first 10 cryomodules in the South Linac

  8. Virtual commissioning of automated micro-optical assembly

    Science.gov (United States)

    Schlette, Christian; Losch, Daniel; Haag, Sebastian; Zontar, Daniel; Roßmann, Jürgen; Brecher, Christian

    2015-02-01

    In this contribution, we present a novel approach to enable virtual commissioning for process developers in micro-optical assembly. Our approach aims at supporting micro-optics experts to effectively develop assisted or fully automated assembly solutions without detailed prior experience in programming while at the same time enabling them to easily implement their own libraries of expert schemes and algorithms for handling optical components. Virtual commissioning is enabled by a 3D simulation and visualization system in which the functionalities and properties of automated systems are modeled, simulated and controlled based on multi-agent systems. For process development, our approach supports event-, state- and time-based visual programming techniques for the agents and allows for their kinematic motion simulation in combination with looped-in simulation results for the optical components. First results have been achieved for simply switching the agents to command the real hardware setup after successful process implementation and validation in the virtual environment. We evaluated and adapted our system to meet the requirements set by industrial partners-- laser manufacturers as well as hardware suppliers of assembly platforms. The concept is applied to the automated assembly of optical components for optically pumped semiconductor lasers and positioning of optical components for beam-shaping

  9. Hardware descriptions of the I and C systems for NPP

    International Nuclear Information System (INIS)

    Lee, Cheol Kwon; Oh, In Suk; Park, Joo Hyun; Kim, Dong Hoon; Han, Jae Bok; Shin, Jae Whal; Kim, Young Bak

    2003-09-01

    The hardware specifications for I and C Systems of SNPP(Standard Nuclear Power Plant) are reviewed in order to acquire the hardware requirement and specification of KNICS (Korea Nuclear Instrumentation and Control System). In the study, we investigated hardware requirements, hardware configuration, hardware specifications, man-machine hardware requirements, interface requirements with the other system, and data communication requirements that are applicable to SNP. We reviewed those things of control systems, protection systems, monitoring systems, information systems, and process instrumentation systems. Through the study, we described the requirements and specifications of digital systems focusing on a microprocessor and a communication interface, and repeated it for analog systems focusing on the manufacturing companies. It is expected that the experience acquired from this research will provide vital input for the development of the KNICS

  10. Expert System analysis of non-fuel assembly hardware and spent fuel disassembly hardware: Its generation and recommended disposal

    International Nuclear Information System (INIS)

    Williamson, D.A.

    1991-01-01

    Almost all of the effort being expended on radioactive waste disposal in the United States is being focused on the disposal of spent Nuclear Fuel, with little consideration for other areas that will have to be disposed of in the same facilities. one area of radioactive waste that has not been addressed adequately because it is considered a secondary part of the waste issue is the disposal of the various Non-Fuel Bearing Components of the reactor core. These hardware components fall somewhat arbitrarily into two categories: Non-Fuel Assembly (NFA) hardware and Spent Fuel Disassembly (SFD) hardware. This work provides a detailed examination of the generation and disposal of NFA hardware and SFD hardware by the nuclear utilities of the United States as it relates to the Civilian Radioactive Waste Management Program. All available sources of data on NFA and SFD hardware are analyzed with particular emphasis given to the Characteristics Data Base developed by Oak Ridge National Laboratory and the characterization work performed by Pacific Northwest Laboratories and Rochester Gas ampersand Electric. An Expert System developed as a portion of this work is used to assist in the prediction of quantities of NFA hardware and SFD hardware that will be generated by the United States' utilities. Finally, the hardware waste management practices of the United Kingdom, France, Germany, Sweden, and Japan are studied for possible application to the disposal of domestic hardware wastes. As a result of this work, a general classification scheme for NFA and SFD hardware was developed. Only NFA and SFD hardware constructed of zircaloy and experiencing a burnup of less than 70,000 MWD/MTIHM and PWR control rods constructed of stainless steel are considered Low-Level Waste. All other hardware is classified as Greater-ThanClass-C waste

  11. Why Open Source Hardware matters and why you should care

    OpenAIRE

    Gürkaynak, Frank K.

    2017-01-01

    Open source hardware is currently where open source software was about 30 years ago. The idea is well received by enthusiasts, there is interest and the open source hardware has gained visible momentum recently, with several well-known universities including UC Berkeley, Cambridge and ETH Zürich actively working on large projects involving open source hardware, attracting the attention of companies big and small. But it is still not quite there yet. In this talk, based on my experience on the...

  12. Support for NUMA hardware in HelenOS

    OpenAIRE

    Horký, Vojtěch

    2011-01-01

    The goal of this master thesis is to extend HelenOS operating system with the support for ccNUMA hardware. The text of the thesis contains a brief introduction to ccNUMA hardware, an overview of NUMA features and relevant features of HelenOS (memory management, scheduling, etc.). The thesis analyses various design decisions of the implementation of NUMA support -- introducing the hardware topology into the kernel data structures, propagating this information to user space, thread affinity to ...

  13. Reliable software for unreliable hardware a cross layer perspective

    CERN Document Server

    Rehman, Semeen; Henkel, Jörg

    2016-01-01

    This book describes novel software concepts to increase reliability under user-defined constraints. The authors’ approach bridges, for the first time, the reliability gap between hardware and software. Readers will learn how to achieve increased soft error resilience on unreliable hardware, while exploiting the inherent error masking characteristics and error (stemming from soft errors, aging, and process variations) mitigations potential at different software layers. · Provides a comprehensive overview of reliability modeling and optimization techniques at different hardware and software levels; · Describes novel optimization techniques for software cross-layer reliability, targeting unreliable hardware.

  14. Environmental Friendly Coatings and Corrosion Prevention For Flight Hardware Project

    Science.gov (United States)

    Calle, Luz

    2014-01-01

    Identify, test and develop qualification criteria for environmentally friendly corrosion protective coatings and corrosion preventative compounds (CPC's) for flight hardware an ground support equipment.

  15. [Hardware Implementation of Numerical Simulation Function of Hodgkin-Huxley Model Neurons Action Potential Based on Field Programmable Gate Array].

    Science.gov (United States)

    Wang, Jinlong; Lu, Mai; Hu, Yanwen; Chen, Xiaoqiang; Pan, Qiangqiang

    2015-12-01

    Neuron is the basic unit of the biological neural system. The Hodgkin-Huxley (HH) model is one of the most realistic neuron models on the electrophysiological characteristic description of neuron. Hardware implementation of neuron could provide new research ideas to clinical treatment of spinal cord injury, bionics and artificial intelligence. Based on the HH model neuron and the DSP Builder technology, in the present study, a single HH model neuron hardware implementation was completed in Field Programmable Gate Array (FPGA). The neuron implemented in FPGA was stimulated by different types of current, the action potential response characteristics were analyzed, and the correlation coefficient between numerical simulation result and hardware implementation result were calculated. The results showed that neuronal action potential response of FPGA was highly consistent with numerical simulation result. This work lays the foundation for hardware implementation of neural network.

  16. Open Hardware For CERN's Accelerator Control Systems

    CERN Document Server

    van der Bij, E; Ayass, M; Boccardi, A; Cattin, M; Gil Soriano, C; Gousiou, E; Iglesias Gonsálvez, S; Penacoba Fernandez, G; Serrano, J; Voumard, N; Wlostowski, T

    2011-01-01

    The accelerator control systems at CERN will be renovated and many electronics modules will be redesigned as the modules they will replace cannot be bought anymore or use obsolete components. The modules used in the control systems are diverse: analog and digital I/O, level converters and repeaters, serial links and timing modules. Overall around 120 modules are supported that are used in systems such as beam instrumentation, cryogenics and power converters. Only a small percentage of the currently used modules are commercially available, while most of them had been specifically designed at CERN. The new developments are based on VITA and PCI-SIG standards such as FMC (FPGA Mezzanine Card), PCI Express and VME64x using transition modules. As system-on-chip interconnect, the public domain Wishbone specification is used. For the renovation, it is considered imperative to have for each board access to the full hardware design and its firmware so that problems could quickly be resolved by CERN engineers or its ...

  17. Magnetic qubits as hardware for quantum computers

    International Nuclear Information System (INIS)

    Tejada, J.; Chudnovsky, E.; Barco, E. del

    2000-01-01

    We propose two potential realisations for quantum bits based on nanometre scale magnetic particles of large spin S and high anisotropy molecular clusters. In case (1) the bit-value basis states vertical bar-0> and vertical bar-1> are the ground and first excited spin states S z = S and S-1, separated by an energy gap given by the ferromagnetic resonance (FMR) frequency. In case (2), when there is significant tunnelling through the anisotropy barrier, the qubit states correspond to the symmetric, vertical bar-0>, and antisymmetric, vertical bar-1>, combinations of the two-fold degenerate ground state S z = ± S. In each case the temperature of operation must be low compared to the energy gap, Δ, between the states vertical bar-0> and vertical bar-1>. The gap Δ in case (2) can be controlled with an external magnetic field perpendicular to the easy axis of the molecular cluster. The states of different molecular clusters and magnetic particles may be entangled by connecting them by superconducting lines with Josephson switches, leading to the potential for quantum computing hardware. (author)

  18. Magnetic qubits as hardware for quantum computers

    Energy Technology Data Exchange (ETDEWEB)

    Tejada, J.; Chudnovsky, E.; Barco, E. del [and others

    2000-07-01

    We propose two potential realisations for quantum bits based on nanometre scale magnetic particles of large spin S and high anisotropy molecular clusters. In case (1) the bit-value basis states vertical bar-0> and vertical bar-1> are the ground and first excited spin states S{sub z} = S and S-1, separated by an energy gap given by the ferromagnetic resonance (FMR) frequency. In case (2), when there is significant tunnelling through the anisotropy barrier, the qubit states correspond to the symmetric, vertical bar-0>, and antisymmetric, vertical bar-1>, combinations of the two-fold degenerate ground state S{sub z} = {+-} S. In each case the temperature of operation must be low compared to the energy gap, {delta}, between the states vertical bar-0> and vertical bar-1>. The gap {delta} in case (2) can be controlled with an external magnetic field perpendicular to the easy axis of the molecular cluster. The states of different molecular clusters and magnetic particles may be entangled by connecting them by superconducting lines with Josephson switches, leading to the potential for quantum computing hardware. (author)

  19. Nanorobot Hardware Architecture for Medical Defense

    Directory of Open Access Journals (Sweden)

    Luiz C. Kretly

    2008-05-01

    Full Text Available This work presents a new approach with details on the integrated platform and hardware architecture for nanorobots application in epidemic control, which should enable real time in vivo prognosis of biohazard infection. The recent developments in the field of nanoelectronics, with transducers progressively shrinking down to smaller sizes through nanotechnology and carbon nanotubes, are expected to result in innovative biomedical instrumentation possibilities, with new therapies and efficient diagnosis methodologies. The use of integrated systems, smart biosensors, and programmable nanodevices are advancing nanoelectronics, enabling the progressive research and development of molecular machines. It should provide high precision pervasive biomedical monitoring with real time data transmission. The use of nanobioelectronics as embedded systems is the natural pathway towards manufacturing methodology to achieve nanorobot applications out of laboratories sooner as possible. To demonstrate the practical application of medical nanorobotics, a 3D simulation based on clinical data addresses how to integrate communication with nanorobots using RFID, mobile phones, and satellites, applied to long distance ubiquitous surveillance and health monitoring for troops in conflict zones. Therefore, the current model can also be used to prevent and save a population against the case of some targeted epidemic disease.

  20. Hardware upgrade for A2 data acquisition

    Energy Technology Data Exchange (ETDEWEB)

    Ostrick, Michael; Gradl, Wolfgang; Otte, Peter-Bernd; Neiser, Andreas; Steffen, Oliver; Wolfes, Martin; Koerner, Tito [Institut fuer Kernphysik, Mainz (Germany); Collaboration: A2-Collaboration

    2014-07-01

    The A2 Collaboration uses an energy tagged photon beam which is produced via bremsstrahlung off the MAMI electron beam. The detector system consists of Crystal Ball and TAPS and covers almost the whole solid angle. A frozen-spin polarized target allows to perform high precision measurements of polarization observables in meson photo-production. During the last summer, a major upgrade of the data acquisition system was performed, both on the hardware and the software side. The goal of this upgrade was increased reliability of the system and an improvement in the data rate to disk. By doubling the number of readout CPUs and employing special VME crates with a split backplane, the number of bus accesses per readout cycle and crate was cut by a factor of two, giving almost a factor of two gain in the readout rate. In the course of the upgrade, we also switched most of the detector control system to using the distributed control system EPICS. For the upgraded control system, some new tools were developed to make full use of the capabilities of this decentralised slow control and monitoring system. The poster presents some of the major contributions to this project.

  1. Commissioning and Validation of the ATLAS Level-1 Topological Trigger in Run 2

    CERN Document Server

    Zheng, Daniel; The ATLAS collaboration

    2017-01-01

    The ATLAS experiment has introduced and recently commissioned a completely new hardware sub-system of its first-level trigger: the topological processor (L1Topo). L1Topo consist of two AdvancedTCA blades mounting state-of-the-art FPGA processors, providing high input bandwidth (up to 4 Gb/s) and low latency data processing (200 ns). L1Topo is able to select collision events by applying kinematic and topological requirements on candidate objects (energy clusters, jets, and muons) measured by calorimeters and muon sub-detectors. Results from data recorded using the L1Topo trigger will be presented. These results demonstrate a significantly improved background event rejection, thus allowing for rate reduction with minimal efficiency loss. This improvement has been shown for several physics processes leading to low-$p_T$ leptons, including $H\\rightarrow\\tau \\tau$ and $J/\\psi \\rightarrow \\mu \\mu$. In addition to describing the L1Topo trigger system, we will discuss the use of an accurate L1Topo simulation as a pow...

  2. PROMOTER COMMISSION LEGISLATIVE AND EXTERNAL REPRESENTATIVE OF THE UNION

    Directory of Open Access Journals (Sweden)

    Nely Militaru

    2014-11-01

    Full Text Available Commission was established by the Treaty establishing the Economic Community of Coal and Osel – signed in Paris in 1951, entered into force next year –as the High Authority supranational institution with discretionary decisionmaking powers in optics of this treaty. Also known as “guardian of the treaties” Commission by its member, who exercise their functions in complete independence, is an institution that promotes the general interest of the Union (art. 17 par.TEU. Commission oversees therefore application of Union law. In this capacity, especially in terms of the competence of the legislative proposal, the Commission by calling upon specialists and experts from EU Member States harmonize with the national interest.

  3. National Capital Planning Commission Meeting Transcripts

    Data.gov (United States)

    National Capital Planning Commission — Transcripts of the monthly (with the exception of August) National Capital Planning Commission meeting transcripts are provided for research to confirm actions taken...

  4. 75 FR 11166 - Joint Meeting of the Nuclear Regulatory Commission and the Federal Energy Regulatory Commission...

    Science.gov (United States)

    2010-03-10

    ... the Nuclear Regulatory Commission and the Federal Energy Regulatory Commission; Notice of Joint Meeting of the Nuclear Regulatory Commission and the Federal Energy Regulatory Commission March 2, 2010. The Federal Energy Regulatory Commission (FERC) and the Nuclear Regulatory Commission (NRC) will hold...

  5. Commission Conditions d'emploi

    CERN Multimedia

    Staff Association

    2017-01-01

    Au CERN, nous avons la formidable possibilité d’imaginer nos CONDITIONS D’EMPLOIS. Rendez-vous compte ! Nous avons le pouvoir de proposer des idées et de les défendre pour avoir des conditions d’emplois qui soient les plus attractives possibles pour le personnel en place et à venir. ---------------- L’Association du personnel du CERN, tout le monde connait ou en a entendu parler. Ce qui est moins connu, ce sont les diverses commissions internes qui traitent des sujets propres à défendre les intérêts du personnel. Les publications dans notre journal, l’Echo, sont un des moyens à notre disposition pour vous faire découvrir chacune des commissions internes de l’Association du personnel (voir Echo n°242 sur la commission juridique, et Echo n°255 sur la commission des cas particuliers). Commission Conditions d&...

  6. National Bioethics Commissions as Educators.

    Science.gov (United States)

    Lee, Lisa M

    2017-05-01

    As has become tradition, executive directors of United States' presidential bioethics committees offer reflections about their experience shortly after the orderly shutdown of the commission staff. After the records are filed according to government records regulations; after all the staff members, who are hired into temporary positions that must be renewed every two years, have secured permanent employment; after preparations are made to ensure that the next commission staff (should there be one) has a budget and standard operating procedures in order to begin its work in a timely manner; after the lights are turned out for the last time, the executive director makes the final climb up the stairs into the sunlight and reflects on the whirlwind. There is much about my work with the Presidential Commission for the Study of Bioethical Issues that deserves comment, but one aspect of the commission that has been especially valuable to me is its work to educate the nation on bioethical issues. This is, moreover, a contribution in which the commission staff was central, and it is one that, as an ethics educator myself, I will cherish deeply. © 2017 The Hastings Center.

  7. Completely continuous and weakly completely continuous abstract ...

    Indian Academy of Sciences (India)

    An algebra A is called right completely continuous (right weakly completely continuous) ... Moreover, some applications of these results in group algebras are .... A linear subspace S(G) of L1(G) is said to be a Segal algebra, if it satisfies the.

  8. 17 CFR 300.302 - Mechanics of closeout or completion.

    Science.gov (United States)

    2010-04-01

    ... 17 Commodity and Securities Exchanges 3 2010-04-01 2010-04-01 false Mechanics of closeout or completion. 300.302 Section 300.302 Commodity and Securities Exchanges SECURITIES AND EXCHANGE COMMISSION... Completion of Open Contractual Commitments § 300.302 Mechanics of closeout or completion. (a) The closeout or...

  9. Speed test results and hardware/software study of computational speed problem, appendix D

    Science.gov (United States)

    1984-01-01

    The HP9845C is a desktop computer which is tested and evaluated for processing speed. A study was made to determine the availability and approximate cost of computers and/or hardware accessories necessary to meet the 20 ms sample period speed requirements. Additional requirements were that the control algorithm could be programmed in a high language and that the machine have sufficient storage to store the data from a complete experiment.

  10. Preparation and procedures of pre-commissioning on DECY-13 cyclotron

    International Nuclear Information System (INIS)

    Silakhuddin

    2016-01-01

    A preparation and procedures for pre-commissioning of DECY-13 Cyclotron have been discussed and the steps for these have been arranged. Pre-commissioning is a testing stage of individual subsystems when all subsystems have been integrated into a cyclotron system. The discussion was taken from references, the next the readiness of devices was studied and then the preparation and procedures of the pre-commissioning were arranged. The results of the discussion are that for doing the pre-commissioning of the cyclotron DECY-13 still requires the completion of RF-dee subsystem and some components for testing are still to be completed. (author)

  11. FPGA BASED HARDWARE KEY FOR TEMPORAL ENCRYPTION

    Directory of Open Access Journals (Sweden)

    B. Lakshmi

    2010-09-01

    Full Text Available In this paper, a novel encryption scheme with time based key technique on an FPGA is presented. Time based key technique ensures right key to be entered at right time and hence, vulnerability of encryption through brute force attack is eliminated. Presently available encryption systems, suffer from Brute force attack and in such a case, the time taken for breaking a code depends on the system used for cryptanalysis. The proposed scheme provides an effective method in which the time is taken as the second dimension of the key so that the same system can defend against brute force attack more vigorously. In the proposed scheme, the key is rotated continuously and four bits are drawn from the key with their concatenated value representing the delay the system has to wait. This forms the time based key concept. Also the key based function selection from a pool of functions enhances the confusion and diffusion to defend against linear and differential attacks while the time factor inclusion makes the brute force attack nearly impossible. In the proposed scheme, the key scheduler is implemented on FPGA that generates the right key at right time intervals which is then connected to a NIOS – II processor (a virtual microcontroller which is brought out from Altera FPGA that communicates with the keys to the personal computer through JTAG (Joint Test Action Group communication and the computer is used to perform encryption (or decryption. In this case the FPGA serves as hardware key (dongle for data encryption (or decryption.

  12. Bayesian Estimation and Inference using Stochastic Hardware

    Directory of Open Access Journals (Sweden)

    Chetan Singh Thakur

    2016-03-01

    Full Text Available In this paper, we present the implementation of two types of Bayesian inference problems to demonstrate the potential of building probabilistic algorithms in hardware using single set of building blocks with the ability to perform these computations in real time. The first implementation, referred to as the BEAST (Bayesian Estimation and Stochastic Tracker, demonstrates a simple problem where an observer uses an underlying Hidden Markov Model (HMM to track a target in one dimension. In this implementation, sensors make noisy observations of the target position at discrete time steps. The tracker learns the transition model for target movement, and the observation model for the noisy sensors, and uses these to estimate the target position by solving the Bayesian recursive equation online. We show the tracking performance of the system and demonstrate how it can learn the observation model, the transition model, and the external distractor (noise probability interfering with the observations. In the second implementation, referred to as the Bayesian INference in DAG (BIND, we show how inference can be performed in a Directed Acyclic Graph (DAG using stochastic circuits. We show how these building blocks can be easily implemented using simple digital logic gates. An advantage of the stochastic electronic implementation is that it is robust to certain types of noise, which may become an issue in integrated circuit (IC technology with feature sizes in the order of tens of nanometers due to their low noise margin, the effect of high-energy cosmic rays and the low supply voltage. In our framework, the flipping of random individual bits would not affect the system performance because information is encoded in a bit stream.

  13. Commissioning of the ATLAS Experiment

    CERN Document Server

    AUTHOR|(CDS)2069446

    2008-01-01

    The status of the commissioning of the ATLAS experiment as of May 2008 is presented. The subdetector integration in recent milestone weeks is described, especially the cosmic commissioning in milestone week M6, focusing on simultaneous running and combined track analysis of the muon detector and inner detector. The liquid argon and tile calorimeters have achieved near-full operation, and are integrated with the calorimeter trigger. The High-Level-Trigger infrastructure is installed and algorithms tested in technical runs. Problems with the inner detector cooling compressors are being fixed.

  14. Surrogacy commissioning fathers and HIV

    OpenAIRE

    Jordaan, D W

    2014-01-01

    Surrogacy is not regulated by a single legal instrument only, nor is confirmation of a surrogacy agreement by the High Court an unqualified green light for the surrogacy process to proceed. In the context of the HIV status of the commissioning father, whose gametes are to be used for the conception of the child in pursuance of a surrogacy agreement, the intended in vitro fertilisation of the surrogate mother may only take place on condition that the commissioning father, and his semen, have b...

  15. Sharing open hardware through ROP, the robotic open platform

    NARCIS (Netherlands)

    Lunenburg, J.; Soetens, R.P.T.; Schoenmakers, F.; Metsemakers, P.M.G.; van de Molengraft, M.J.G.; Steinbuch, M.; Behnke, S.; Veloso, M.; Visser, A.; Xiong, R.

    2014-01-01

    The robot open source software community, in particular ROS, drastically boosted robotics research. However, a centralized place to exchange open hardware designs does not exist. Therefore we launched the Robotic Open Platform (ROP). A place to share and discuss open hardware designs. Among others

  16. Sharing open hardware through ROP, the Robotic Open Platform

    NARCIS (Netherlands)

    Lunenburg, J.J.M.; Soetens, R.P.T.; Schoenmakers, Ferry; Metsemakers, P.M.G.; Molengraft, van de M.J.G.; Steinbuch, M.

    2013-01-01

    The robot open source software community, in particular ROS, drastically boosted robotics research. However, a centralized place to exchange open hardware designs does not exist. Therefore we launched the Robotic Open Platform (ROP). A place to share and discuss open hardware designs. Among others

  17. The role of the visual hardware system in rugby performance ...

    African Journals Online (AJOL)

    This study explores the importance of the 'hardware' factors of the visual system in the game of rugby. A group of professional and club rugby players were tested and the results compared. The results were also compared with the established norms for elite athletes. The findings indicate no significant difference in hardware ...

  18. Hardware packet pacing using a DMA in a parallel computer

    Science.gov (United States)

    Chen, Dong; Heidelberger, Phillip; Vranas, Pavlos

    2013-08-13

    Method and system for hardware packet pacing using a direct memory access controller in a parallel computer which, in one aspect, keeps track of a total number of bytes put on the network as a result of a remote get operation, using a hardware token counter.

  19. Hardware/software virtualization for the reconfigurable multicore platform.

    NARCIS (Netherlands)

    Ferger, M.; Al Kadi, M.; Hübner, M.; Koedam, M.L.P.J.; Sinha, S.S.; Goossens, K.G.W.; Marchesan Almeida, Gabriel; Rodrigo Azambuja, J.; Becker, Juergen

    2012-01-01

    This paper presents the Flex Tiles approach for the virtualization of hardware and software for a reconfigurable multicore architecture. The approach enables the virtualization of a dynamic tile-based hardware architecture consisting of processing tiles connected via a network-on-chip and a

  20. Flexible hardware design for RSA and Elliptic Curve Cryptosystems

    NARCIS (Netherlands)

    Batina, L.; Bruin - Muurling, G.; Örs, S.B.; Okamoto, T.

    2004-01-01

    This paper presents a scalable hardware implementation of both commonly used public key cryptosystems, RSA and Elliptic Curve Cryptosystem (ECC) on the same platform. The introduced hardware accelerator features a design which can be varied from very small (less than 20 Kgates) targeting wireless

  1. Hardware and software for image acquisition in nuclear medicine

    International Nuclear Information System (INIS)

    Fideles, E.L.; Vilar, G.; Silva, H.S.

    1992-01-01

    A system for image acquisition and processing in nuclear medicine is presented, including the hardware and software referring to acquisition. The hardware is consisted of an analog-digital conversion card, developed in wire-wape. Its function is digitate the analogic signs provided by gamma camera. The acquisitions are made in list or frame mode. (C.G.C.)

  2. Hardware Abstraction and Protocol Optimization for Coded Sensor Networks

    DEFF Research Database (Denmark)

    Nistor, Maricica; Roetter, Daniel Enrique Lucani; Barros, João

    2015-01-01

    The design of the communication protocols in wireless sensor networks (WSNs) often neglects several key characteristics of the sensor's hardware, while assuming that the number of transmitted bits is the dominating factor behind the system's energy consumption. A closer look at the hardware speci...

  3. Increased risk for complications following removal of hardware in patients with liver disease, pilon or pelvic fractures: A regression analysis.

    Science.gov (United States)

    Brown, Bryan D; Steinert, Justin N; Stelzer, John W; Yoon, Richard S; Langford, Joshua R; Koval, Kenneth J

    2017-12-01

    Indications for removing orthopedic hardware on an elective basis varies widely. Although viewed as a relatively benign procedure, there is a lack of data regarding overall complication rates after fracture fixation. The purpose of this study is to determine the overall short-term complication rate for elective removal of orthopedic hardware after fracture fixation and to identify associated risk factors. Adult patients indicated for elective hardware removal after fracture fixation between July 2012 and July 2016 were screened for inclusion. Inclusion criteria included patients with hardware related pain and/or impaired cosmesis with complete medical and radiographic records and at least 3-month follow-up. Exclusion criteria were those patients indicated for hardware removal for a diagnosis of malunion, non-union, and/or infection. Data collected included patient age, gender, anatomic location of hardware removed, body mass index, ASA score, and comorbidities. Overall complications, as well as complications requiring revision surgery were recorded. Statistical analysis was performed with SPSS 20.0, and included univariate and multivariate regression analysis. 391 patients (418 procedures) were included for analysis. Overall complication rates were 8.4%, with a 3.6% revision surgery rate. Univariate regression analysis revealed that patients who had liver disease were at significant risk for complication (p=0.001) and revision surgery (p=0.036). Multivariate regression analysis showed that: 1) patients who had liver disease were at significant risk of overall complication (p=0.001) and revision surgery (p=0.039); 2) Removal of hardware following fixation for a pilon had significantly increased risk for complication (p=0.012), but not revision surgery (p=0.43); and 3) Removal of hardware for pelvic fixation had a significantly increased risk for revision surgery (p=0.017). Removal of hardware following fracture fixation is not a risk-free procedure. Patients with

  4. A Practical Introduction to HardwareSoftware Codesign

    CERN Document Server

    Schaumont, Patrick R

    2013-01-01

    This textbook provides an introduction to embedded systems design, with emphasis on integration of custom hardware components with software. The key problem addressed in the book is the following: how can an embedded systems designer strike a balance between flexibility and efficiency? The book describes how combining hardware design with software design leads to a solution to this important computer engineering problem. The book covers four topics in hardware/software codesign: fundamentals, the design space of custom architectures, the hardware/software interface and application examples. The book comes with an associated design environment that helps the reader to perform experiments in hardware/software codesign. Each chapter also includes exercises and further reading suggestions. Improvements in this second edition include labs and examples using modern FPGA environments from Xilinx and Altera, which make the material applicable to a greater number of courses where these tools are already in use.  Mo...

  5. HiCAT Software Infrastructure: Safe hardware control with object oriented Python

    Science.gov (United States)

    Moriarty, Christopher; Brooks, Keira; Soummer, Remi

    2018-01-01

    High contrast imaging for Complex Aperture Telescopes (HiCAT) is a testbed designed to demonstrate coronagraphy and wavefront control for segmented on-axis space telescopes such as envisioned for LUVOIR. To limit the air movements in the testbed room, software interfaces for several different hardware components were developed to completely automate operations. When developing software interfaces for many different pieces of hardware, unhandled errors are commonplace and can prevent the software from properly closing a hardware resource. Some fragile components (e.g. deformable mirrors) can be permanently damaged because of this. We present an object oriented Python-based infrastructure to safely automate hardware control and optical experiments. Specifically, conducting high-contrast imaging experiments while monitoring humidity and power status along with graceful shutdown processes even for unexpected errors. Python contains a construct called a “context manager” that allows you define code to run when a resource is opened or closed. Context managers ensure that a resource is properly closed, even when unhandled errors occur. Harnessing the context manager design, we also use Python’s multiprocessing library to monitor humidity and power status without interrupting the experiment. Upon detecting a safety problem, the master process sends an event to the child process that triggers the context managers to gracefully close any open resources. This infrastructure allows us to queue up several experiments and safely operate the testbed without a human in the loop.

  6. UniBoard: generic hardware for radio astronomy signal processing

    Science.gov (United States)

    Hargreaves, J. E.

    2012-09-01

    UniBoard is a generic high-performance computing platform for radio astronomy, developed as a Joint Research Activity in the RadioNet FP7 Programme. The hardware comprises eight Altera Stratix IV Field Programmable Gate Arrays (FPGAs) interconnected by a high speed transceiver mesh. Each FPGA is connected to two DDR3 memory modules and three external 10Gbps ports. In addition, a total of 128 low voltage differential input lines permit connection to external ADC cards. The DSP capability of the board exceeds 644E9 complex multiply-accumulate operations per second. The first production run of eight boards was distributed to partners in The Netherlands, France, Italy, UK, China and Korea in May 2011, with a further production runs completed in December 2011 and early 2012. The function of the board is determined by the firmware loaded into its FPGAs. Current applications include beamformers, correlators, digital receivers, RFI mitigation for pulsar astronomy, and pulsar gating and search machines The new UniBoard based correlator for the European VLBI network (EVN) uses an FX architecture with half the resources of the board devoted to station based processing: delay and phase correction and channelization, and half to the correlation function. A single UniBoard can process a 64MHz band from 32 stations, 2 polarizations, sampled at 8 bit. Adding more UniBoards can expand the total bandwidth of the correlator. The design is able to process both prerecorded and real time (eVLBI) data.

  7. 47 CFR 1.1528 - Commission review.

    Science.gov (United States)

    2010-10-01

    ... 47 Telecommunication 1 2010-10-01 2010-10-01 false Commission review. 1.1528 Section 1.1528... Commission review. Either the applicant or Bureau counsel may seek Commission review of the initial decision on the application, or the Commission may decide to review the decision on its own initiative, in...

  8. Commissioning Leibstadt nuclear power plant

    International Nuclear Information System (INIS)

    Roeder, A.; Degen, R.; Nedelko, U.

    1985-01-01

    This paper describes the experience and benefits obtained from the use of temporary oil fired boilers of sufficient capacity to allow commissioning and no-load tests to be carried out on the turbine-generator months ahead of steam being available from the NSSS. The successful result at Leibstadt may be a model for other plants

  9. Hardware replacements and software tools for digital control computers

    International Nuclear Information System (INIS)

    Walker, R.A.P.; Wang, B-C.; Fung, J.

    1996-01-01

    Technological obsolescence is an on-going challenge for all computer use. By design, and to some extent good fortune, AECL has had a good track record with respect to the march of obsolescence in CANDU digital control computer technology. Recognizing obsolescence as a fact of life, AECL has undertaken a program of supporting the digital control technology of existing CANDU plants. Other AECL groups are developing complete replacement systems for the digital control computers, and more advanced systems for the digital control computers of the future CANDU reactors. This paper presents the results of the efforts of AECL's DCC service support group to replace obsolete digital control computer and related components and to provide friendlier software technology related to the maintenance and use of digital control computers in CANDU. These efforts are expected to extend the current lifespan of existing digital control computers through their mandated life. This group applied two simple rules; the product, whether new or replacement should have a generic basis, and the products should be applicable to both existing CANDU plants and to 'repeat' plant designs built using current design guidelines. While some exceptions do apply, the rules have been met. The generic requirement dictates that the product should not be dependent on any brand technology, and should back-fit to and interface with any such technology which remains in the control design. The application requirement dictates that the product should have universal use and be user friendly to the greatest extent possible. Furthermore, both requirements were designed to anticipate user involvement, modifications and alternate user defined applications. The replacements for hardware components such as paper tape reader/punch, moving arm disk, contact scanner and Ramtek are discussed. The development of these hardware replacements coincide with the development of a gateway system for selected CANDU digital control

  10. Monitoring Particulate Matter with Commodity Hardware

    Science.gov (United States)

    Holstius, David

    Health effects attributed to outdoor fine particulate matter (PM 2.5) rank it among the risk factors with the highest health burdens in the world, annually accounting for over 3.2 million premature deaths and over 76 million lost disability-adjusted life years. Existing PM2.5 monitoring infrastructure cannot, however, be used to resolve variations in ambient PM2.5 concentrations with adequate spatial and temporal density, or with adequate coverage of human time-activity patterns, such that the needs of modern exposure science and control can be met. Small, inexpensive, and portable devices, relying on newly available off-the-shelf sensors, may facilitate the creation of PM2.5 datasets with improved resolution and coverage, especially if many such devices can be deployed concurrently with low system cost. Datasets generated with such technology could be used to overcome many important problems associated with exposure misclassification in air pollution epidemiology. Chapter 2 presents an epidemiological study of PM2.5 that used data from ambient monitoring stations in the Los Angeles basin to observe a decrease of 6.1 g (95% CI: 3.5, 8.7) in population mean birthweight following in utero exposure to the Southern California wildfires of 2003, but was otherwise limited by the sparsity of the empirical basis for exposure assessment. Chapter 3 demonstrates technical potential for remedying PM2.5 monitoring deficiencies, beginning with the generation of low-cost yet useful estimates of hourly and daily PM2.5 concentrations at a regulatory monitoring site. The context (an urban neighborhood proximate to a major goods-movement corridor) and the method (an off-the-shelf sensor costing approximately USD $10, combined with other low-cost, open-source, readily available hardware) were selected to have special significance among researchers and practitioners affiliated with contemporary communities of practice in public health and citizen science. As operationalized by

  11. Hardware math for the 6502 microprocessor

    Science.gov (United States)

    Kissel, R.; Currie, J.

    1985-01-01

    A floating-point arithmetic unit is described which is being used in the Ground Facility of Large Space Structures Control Verification (GF/LSSCV). The experiment uses two complete inertial measurement units and a set of three gimbal torquers in a closed loop to control the structural vibrations in a flexible test article (beam). A 6502 (8-bit) microprocessor controls four AMD 9511A floating-point arithmetic units to do all the computation in 20 milliseconds.

  12. Automatic analysis at the commissioning of the LHC superconducting electrical circuits

    International Nuclear Information System (INIS)

    Reymond, H.; Andreassen, O.O.; Charrondiere, C.; Rijllart, A.; Zerlauth, M.

    2012-01-01

    Since the beginning of 2010 the LHC has been operating in a routinely manner, starting with a commissioning phase and then an operation for physics phase. The commissioning of the superconducting electrical circuits requires rigorous test procedures before entering into operation. To maximize the beam operation time of the LHC, these tests should be done as fast as procedures allow. A full commissioning need 12000 tests and is required after circuits have been warmed above liquid nitrogen temperature. Below this temperature, after an end of year break of two months, commissioning needs about 6000 tests. As the manual analysis of the tests takes a major part of the commissioning time, we automated existing analysis tools. We present here how these LabVIEW TM applications were automated, the evaluation of the gain in commissioning time and reduction of experts on night shift observed during the LHC hardware commissioning campaign of 2011 compared to 2010. We end with an outlook at what can be further optimized. (authors)

  13. Automatic Analysis at the Commissioning of the LHC Superconducting Electrical Circuits

    CERN Document Server

    Reymond, H; Charrondiere, C; Rijllart, A; Zerlauth, M

    2011-01-01

    Since the beginning of 2010 the LHC has been operating in a routinely manner, starting with a commissioning phase and then an operation for physics phase. The commissioning of the superconducting electrical circuits requires rigorous test procedures before entering into operation. To maximize the beam operation time of the LHC, these tests should be done as fast as procedures allow. A full commissioning need 12000 tests and is required after circuits have been warmed above liquid nitrogen temperature. Below this temperature, after an end of year break of two months, commissioning needs about 6000 tests. As the manual analysis of the tests takes a major part of the commissioning time, we automated existing analysis tools. We present here how these LabVIEW™ applications were automated, the evaluation of the gain in commissioning time and reduction of experts on night shift observed during the LHC hardware commissioning campaign of 2011 compared to 2010. We end with an outlook at what can be further optimized.

  14. Targeting multiple heterogeneous hardware platforms with OpenCL

    Science.gov (United States)

    Fox, Paul A.; Kozacik, Stephen T.; Humphrey, John R.; Paolini, Aaron; Kuller, Aryeh; Kelmelis, Eric J.

    2014-06-01

    The OpenCL API allows for the abstract expression of parallel, heterogeneous computing, but hardware implementations have substantial implementation differences. The abstractions provided by the OpenCL API are often insufficiently high-level to conceal differences in hardware architecture. Additionally, implementations often do not take advantage of potential performance gains from certain features due to hardware limitations and other factors. These factors make it challenging to produce code that is portable in practice, resulting in much OpenCL code being duplicated for each hardware platform being targeted. This duplication of effort offsets the principal advantage of OpenCL: portability. The use of certain coding practices can mitigate this problem, allowing a common code base to be adapted to perform well across a wide range of hardware platforms. To this end, we explore some general practices for producing performant code that are effective across platforms. Additionally, we explore some ways of modularizing code to enable optional optimizations that take advantage of hardware-specific characteristics. The minimum requirement for portability implies avoiding the use of OpenCL features that are optional, not widely implemented, poorly implemented, or missing in major implementations. Exposing multiple levels of parallelism allows hardware to take advantage of the types of parallelism it supports, from the task level down to explicit vector operations. Static optimizations and branch elimination in device code help the platform compiler to effectively optimize programs. Modularization of some code is important to allow operations to be chosen for performance on target hardware. Optional subroutines exploiting explicit memory locality allow for different memory hierarchies to be exploited for maximum performance. The C preprocessor and JIT compilation using the OpenCL runtime can be used to enable some of these techniques, as well as to factor in hardware

  15. Hardware Implementation of a Bilateral Subtraction Filter

    Science.gov (United States)

    Huertas, Andres; Watson, Robert; Villalpando, Carlos; Goldberg, Steven

    2009-01-01

    A bilateral subtraction filter has been implemented as a hardware module in the form of a field-programmable gate array (FPGA). In general, a bilateral subtraction filter is a key subsystem of a high-quality stereoscopic machine vision system that utilizes images that are large and/or dense. Bilateral subtraction filters have been implemented in software on general-purpose computers, but the processing speeds attainable in this way even on computers containing the fastest processors are insufficient for real-time applications. The present FPGA bilateral subtraction filter is intended to accelerate processing to real-time speed and to be a prototype of a link in a stereoscopic-machine- vision processing chain, now under development, that would process large and/or dense images in real time and would be implemented in an FPGA. In terms that are necessarily oversimplified for the sake of brevity, a bilateral subtraction filter is a smoothing, edge-preserving filter for suppressing low-frequency noise. The filter operation amounts to replacing the value for each pixel with a weighted average of the values of that pixel and the neighboring pixels in a predefined neighborhood or window (e.g., a 9 9 window). The filter weights depend partly on pixel values and partly on the window size. The present FPGA implementation of a bilateral subtraction filter utilizes a 9 9 window. This implementation was designed to take advantage of the ability to do many of the component computations in parallel pipelines to enable processing of image data at the rate at which they are generated. The filter can be considered to be divided into the following parts (see figure): a) An image pixel pipeline with a 9 9- pixel window generator, b) An array of processing elements; c) An adder tree; d) A smoothing-and-delaying unit; and e) A subtraction unit. After each 9 9 window is created, the affected pixel data are fed to the processing elements. Each processing element is fed the pixel value for

  16. Hardware Realization of Chaos Based Symmetric Image Encryption

    KAUST Repository

    Barakat, Mohamed L.

    2012-06-01

    This thesis presents a novel work on hardware realization of symmetric image encryption utilizing chaos based continuous systems as pseudo random number generators. Digital implementation of chaotic systems results in serious degradations in the dynamics of the system. Such defects are illuminated through a new technique of generalized post proceeding with very low hardware cost. The thesis further discusses two encryption algorithms designed and implemented as a block cipher and a stream cipher. The security of both systems is thoroughly analyzed and the performance is compared with other reported systems showing a superior results. Both systems are realized on Xilinx Vetrix-4 FPGA with a hardware and throughput performance surpassing known encryption systems.

  17. Dynamically-Loaded Hardware Libraries (HLL) Technology for Audio Applications

    DEFF Research Database (Denmark)

    Esposito, A.; Lomuscio, A.; Nunzio, L. Di

    2016-01-01

    In this work, we apply hardware acceleration to embedded systems running audio applications. We present a new framework, Dynamically-Loaded Hardware Libraries or HLL, to dynamically load hardware libraries on reconfigurable platforms (FPGAs). Provided a library of application-specific processors......, we load on-the-fly the specific processor in the FPGA, and we transfer the execution from the CPU to the FPGA-based accelerator. The proposed architecture provides excellent flexibility with respect to the different audio applications implemented, high quality audio, and an energy efficient solution....

  18. Acceleration of Meshfree Radial Point Interpolation Method on Graphics Hardware

    International Nuclear Information System (INIS)

    Nakata, Susumu

    2008-01-01

    This article describes a parallel computational technique to accelerate radial point interpolation method (RPIM)-based meshfree method using graphics hardware. RPIM is one of the meshfree partial differential equation solvers that do not require the mesh structure of the analysis targets. In this paper, a technique for accelerating RPIM using graphics hardware is presented. In the method, the computation process is divided into small processes suitable for processing on the parallel architecture of the graphics hardware in a single instruction multiple data manner.

  19. Hardware support for collecting performance counters directly to memory

    Science.gov (United States)

    Gara, Alan; Salapura, Valentina; Wisniewski, Robert W.

    2012-09-25

    Hardware support for collecting performance counters directly to memory, in one aspect, may include a plurality of performance counters operable to collect one or more counts of one or more selected activities. A first storage element may be operable to store an address of a memory location. A second storage element may be operable to store a value indicating whether the hardware should begin copying. A state machine may be operable to detect the value in the second storage element and trigger hardware copying of data in selected one or more of the plurality of performance counters to the memory location whose address is stored in the first storage element.

  20. Aspects of system modelling in Hardware/Software partitioning

    DEFF Research Database (Denmark)

    Knudsen, Peter Voigt; Madsen, Jan

    1996-01-01

    This paper addresses fundamental aspects of system modelling and partitioning algorithms in the area of Hardware/Software Codesign. Three basic system models for partitioning are presented and the consequences of partitioning according to each of these are analyzed. The analysis shows...... the importance of making a clear distinction between the model used for partitioning and the model used for evaluation It also illustrates the importance of having a realistic hardware model such that hardware sharing can be taken into account. Finally, the importance of integrating scheduling and allocation...

  1. Spaceflight hardware for conducting plant growth experiments in space: the early years 1960-2000

    Science.gov (United States)

    Porterfield, D. M.; Neichitailo, G. S.; Mashinski, A. L.; Musgrave, M. E.

    2003-01-01

    The best strategy for supporting long-duration space missions is believed to be bioregenerative life support systems (BLSS). An integral part of a BLSS is a chamber supporting the growth of higher plants that would provide food, water, and atmosphere regeneration for the human crew. Such a chamber will have to be a complete plant growth system, capable of providing lighting, water, and nutrients to plants in microgravity. Other capabilities include temperature, humidity, and atmospheric gas composition controls. Many spaceflight experiments to date have utilized incomplete growth systems (typically having a hydration system but lacking lighting) to study tropic and metabolic changes in germinating seedlings and young plants. American, European, and Russian scientists have also developed a number of small complete plant growth systems for use in spaceflight research. Currently we are entering a new era of experimentation and hardware development as a result of long-term spaceflight opportunities available on the International Space Station. This is already impacting development of plant growth hardware. To take full advantage of these new opportunities and construct innovative systems, we must understand the results of past spaceflight experiments and the basic capabilities of the diverse plant growth systems that were used to conduct these experiments. The objective of this paper is to describe the most influential pieces of plant growth hardware that have been used for the purpose of conducting scientific experiments during the first 40 years of research. c2002 COSPAR. Published by Elsevier Science Ltd. All rights reserved.

  2. The CMS Trigger Supervisor: Control and Hardware Monitoring System of the CMS Level-1 Trigger at CERN

    CERN Document Server

    Ildefons Magrans de Abril

    2008-01-01

    The experiments CMS (Compact Muon Solenoid) and ATLAS (A Toroidal LHC ApparatuS) at the LargeHadron Collider (LHC) are the greatest exponents of the rising complexity in High Energy Physics (HEP) datahandling instrumentation. Tens of millions of readout channels, tens of thousands of hardware boards and thesame order of connections are figures of merit. However, the hardware volume is not the only complexitydimension, the unprecedented large number of research institutes and scientists that form the internationalcollaborations, and the long design, development, commissioning and operational phases are additional factorsthat must be taken into account.The Level-1 (L1) trigger decision loop is an excellent example of these difficulties. This system is based on apipelined logic destined to analyze without deadtime the data from each LHC bunch crossing occurring every25_ns, using special coarsely segmented trigger data from the detectors. The L1 trigger is responsible forreducing the rate of accepted crossings to...

  3. The initial criticality and nuclear commissioning test program at HANARO

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Choong-Sung; Seo, Chul-Gyo; Jun, Byung-Jin [Korea Atomic Energy Research Institute, Dukjin-Dong 150, Yusung-Ku, Taejon, 305-353 (Korea, Republic of)

    1995-07-01

    The construction of the Korea Multipurpose Research Reactor - HANARO of 3MW, developed by Korea Atomic Energy Research Institute, was completed at the beginning of this year. The first fuel loading began on February 2 1995, and initial criticality was achieved on February 8, when the core had four 18-element assemblies and thirteen 36-element assemblies. The critical control rod position was 600.8 mm which represents excess reactivity of 0.71 $. Currently the nuclear commissioning test is on going under the zero power range. This paper describes the initial criticality approach of the HANARO, and its nuclear commissioning test program. (author)

  4. Technical management on commissioning test of nuclear heating reactor

    International Nuclear Information System (INIS)

    Zhang Yajun; Su Qingshan

    1999-01-01

    The commissioning is the last construction stage of a nuclear heating project. The commissioning quality will directly affect on the safe operation and availability of the heating reactor. The author presents the whole test process until the completion of the test report from the point of test documents, including the preparation and execution of the test, the management of the various unexpected events during the test. And it will be emphatically discussed that the managing procedures of the various unexpected events during the test, including temporary control change, setpoint change, unexpected events and design change

  5. State Energy Commission of Western Australia. 1985 annual report

    Energy Technology Data Exchange (ETDEWEB)

    1985-01-01

    The report reviews the operations and achievements of the Commission during 1984/85, and also outlines plans aimed at providing reliable and cost-effective energy supplies in Western Australia in the future. The Commission completed the 1984/85 financial year with an operating surplus of 4.3 m dollars. This compared with a surplus of 4.4 m dollars for the previous year. A full set of financial statements, certified by the Auditor General of Western Australia as being properly drawn up and fairly presented, appears in the back of the report.

  6. Guidance on future art commissioning.

    Science.gov (United States)

    2009-05-01

    Delegates at Building Better Healthcare's recent "National Patient Environment and the Arts Conference 2009" in London heard how national public arts think tank ixia has appointed Bristol-based arts and wellbeing development agency Willis Newson to write "concise and convincing guidance" on commissioning art for new healthcare facilities. A key message, during a joint presentation, was that integrating artwork into hospitals and other healthcare premises requires the earliest possible consideration to reap the maximum rewards.

  7. COMMISSIONING AND DETECTOR PERFORMANCE GROUPS (DPG)

    CERN Document Server

    D. Acosta

    Run coordination and DPG The activities of the DPGs in the last six months have included the completion of publications (and many internal notes) on the data collected during CRAFT08 exercise, continuation of these studies with CRAFT09 data, and finally the first workflows and prompt feedback on 2009 LHC beam data. The level of readiness of the DPG prompt feedback groups is quite high, as first results from the early November “beam splash” data were shown to CMS within 24 hours of the first LHC beam. Moreover, results from the first collisions at 900 GeV were presented publicly three days afterward on November 26th. The CRAFT09 cosmic data taking period provided an opportunity to commission the calibration and alignment workflows on large data samples using the same software release series intended for the first LHC data, and to demonstrate routine operation of alignment and calibration workflows under production conditions. Significantly, the "prompt calibration loop" wa...

  8. The commissioning of the BRISOL facility

    Energy Technology Data Exchange (ETDEWEB)

    Tang, B., E-mail: tangb364@126.com; Cui, B.; Chen, L.; Huang, Q.; Ma, R.; Ma, Y.; Ma, X.; Zhang, T.; Jiang, W.

    2016-06-01

    The Beijing Radioactive ion beam facility Isotope Separator On-Line (BRISOL) is a radioactive ion beam facility based on a 100 MeV cyclotron providing 100 μA proton beam bombarding a thick target to produce radioactive nuclei, which are transferred into an ion source to produce a singly-charged ion beam. The construction and installation of BRISOL was completed in March 2014. The commissioning of the BRISOL facility with stable beams has been carried out in the last year. The ion source, the separator and the beam-line were tested with a {sup 39}K{sup +} stable beam. The tests and the current status of the BRISOL facility will be presented in this paper.

  9. Commissioning results of the HZB quadrupole resonator

    CERN Document Server

    Kleindienst, Raphael; Knobloch, Jens; Kugeler, Oliver

    2015-01-01

    Recent cavity results with niobium have demonstrated the necessity of a good understanding of both the BCS and residual resistance. For a complete picture and comparison with theory, it is essential that one can measure the RF properties as a function of field, temperature, frequency and ambient magnetic field. Standard cavity measurements are limited in their ability to change all parameters freely and in a controlled manner. On the other hand, most sample measurement setups operate at fairly high frequency, where the surface resistance is always BCS dominated. The quadrupole resonator, originally developed at CERN, is ideally suited for characterization of samples at typical cavity RF frequencies. We report on a modified version of the QPR with improved RF figures of merit for high-field operation. Experimental challenges in the commissioning run and alternate designs for simpler sample changes are shown alongside measurement results of a large grain niobium sample.

  10. COMMISSIONING AND DETECTOR PERFORMANCE GROUPS

    CERN Document Server

    T. Camporesi

    The major progress made during the last months has been in the consolidation of services for the +endcaps and three barrel wheels (YB+2, YB+1 and YB0): all subdetectors have now final power connections (including Detector Safety protection), the gas systems have been commissioned for all gas detectors (the recirculation is not yet activated for the RPC though) and detector cooling has also been commissioned. Their integration with final services is the necessary condition for being able to operate larger fractions the detector. Recent weeks have seen full HCAL, more than 50% of EB and full wheels of DTs and CSC being operated using final services. This has not yet translated into major progress of global integration due to major interruptions of central services, which have not allowed the necessary debugging and commissioning time to all the subdetec¬tors and central activities like DAQ and trigger. Moreover the running in of the final central services has introduced instabilities related to the co...

  11. Report of the disarmament commission

    International Nuclear Information System (INIS)

    1991-07-01

    At its forty-fifth session, the General Assembly adopted resolution 45/62 B of 4 December 1990, entitled ''Report of the Disarmament Commission'', by which the Assembly, inter alia: notes that no consensus could be reached on specific recommendations for the item regarding various aspects of the arms race, particularly the nuclear-arms race and nuclear disarmament, as well as a general approach to negotiations on nuclear and conventional disarmament; Working Group II on agenda item 5 of the United Nations Disarmament Commission, entitled ''Process of nuclear disarmament in the framework of international peace and security, with the objective of the elimination of nuclear weapons'', held 11 meetings during the 1991 substantive session of the Disarmament Commission which were preceded by a number of rounds of informal consultations conducted by the Chairman. A structure of work which would serve as a guideline for the work of the Group, while at the same time maintaining the general nature of the desired approach was agreed to by the Group; it included the following four items: 1. The relationship between the process of nuclear disarmament and international peace and security; 2. Review of the steps taken in the process of nuclear disarmament; 3. Strengthening the process of nuclear disarmament, necessary conditions, and mechanisms required for it; 4. The role of the United Nations system in the process of nuclear disarmament with the objective of the elimination of nuclear weapons

  12. Test system design for Hardware-in-Loop evaluation of PEM fuel cells and auxiliaries

    Energy Technology Data Exchange (ETDEWEB)

    Randolf, Guenter; Moore, Robert M. [Hawaii Natural Energy Institute, University of Hawaii, Honolulu, HI (United States)

    2006-07-14

    In order to evaluate the dynamic behavior of proton exchange membrane (PEM) fuel cells and their auxiliaries, the dynamic capability of the test system must exceed the dynamics of the fastest component within the fuel cell or auxiliary component under test. This criterion is even more critical when a simulated component of the fuel cell system (e.g., the fuel cell stack) is replaced by hardware and Hardware-in-Loop (HiL) methodology is employed. This paper describes the design of a very fast dynamic test system for fuel cell transient research and HiL evaluation. The integration of the real time target (which runs the simulation), the test stand PC (that controls the operation of the test stand), and the programmable logic controller (PLC), for safety and low-level control tasks, into one single integrated unit is successfully completed. (author)

  13. Hardware design of a submerged buoy system based on electromagnetic inductive coupling

    Directory of Open Access Journals (Sweden)

    Song Dalei

    2016-01-01

    Full Text Available This paper mainly introduces the hardware design of a new type of ocean buoy for multi-scale marine dynamic process. The buoy system can collect a number of real-time marine environment data and then transmit all the data back to the landing site through wireless module. The authors mainly designed the hardware circuit of the buoy system, including data collection system, data communication system, data storage system. Due to the buoy system will complete the marine observation work continuously for at least a month, so we add the low power consumption function which can realize the intermittent work for the data collection system. This paper also introduces the electromagnetic induction coupling technology of underwater sensors, the sea surface communication network technology, etc. The system can also extends to the ecological regional anomaly monitoring and the early warning of disaster weather.

  14. Unit Commissioning of “Belene” NPP (Bulgaria)

    International Nuclear Information System (INIS)

    2009-01-01

    This presentations gives detailed information about the following topics about commissioning: principles of NPP commissioning; phases of NPP commissioning; organization of commissioning activities; duties and responsibilities of the parties for carrying out unit commissioning activities; responsibility and obligations of the sides during commissioning of power unit; documentation required for power unit commissioning; quality assurance for commissioning activities

  15. Generation of Embedded Hardware/Software from SystemC

    Directory of Open Access Journals (Sweden)

    Dominique Houzet

    2006-08-01

    Full Text Available Designers increasingly rely on reusing intellectual property (IP and on raising the level of abstraction to respect system-on-chip (SoC market characteristics. However, most hardware and embedded software codes are recoded manually from system level. This recoding step often results in new coding errors that must be identified and debugged. Thus, shorter time-to-market requires automation of the system synthesis from high-level specifications. In this paper, we propose a design flow intended to reduce the SoC design cost. This design flow unifies hardware and software using a single high-level language. It integrates hardware/software (HW/SW generation tools and an automatic interface synthesis through a custom library of adapters. We have validated our interface synthesis approach on a hardware producer/consumer case study and on the design of a given software radiocommunication application.

  16. Generation of Embedded Hardware/Software from SystemC

    Directory of Open Access Journals (Sweden)

    Ouadjaout Salim

    2006-01-01

    Full Text Available Designers increasingly rely on reusing intellectual property (IP and on raising the level of abstraction to respect system-on-chip (SoC market characteristics. However, most hardware and embedded software codes are recoded manually from system level. This recoding step often results in new coding errors that must be identified and debugged. Thus, shorter time-to-market requires automation of the system synthesis from high-level specifications. In this paper, we propose a design flow intended to reduce the SoC design cost. This design flow unifies hardware and software using a single high-level language. It integrates hardware/software (HW/SW generation tools and an automatic interface synthesis through a custom library of adapters. We have validated our interface synthesis approach on a hardware producer/consumer case study and on the design of a given software radiocommunication application.

  17. Hardware device to physical structure binding and authentication

    Science.gov (United States)

    Hamlet, Jason R.; Stein, David J.; Bauer, Todd M.

    2013-08-20

    Detection and deterrence of device tampering and subversion may be achieved by including a cryptographic fingerprint unit within a hardware device for authenticating a binding of the hardware device and a physical structure. The cryptographic fingerprint unit includes an internal physically unclonable function ("PUF") circuit disposed in or on the hardware device, which generate an internal PUF value. Binding logic is coupled to receive the internal PUF value, as well as an external PUF value associated with the physical structure, and generates a binding PUF value, which represents the binding of the hardware device and the physical structure. The cryptographic fingerprint unit also includes a cryptographic unit that uses the binding PUF value to allow a challenger to authenticate the binding.

  18. Hardware Realization of Chaos Based Symmetric Image Encryption

    KAUST Repository

    Barakat, Mohamed L.

    2012-01-01

    This thesis presents a novel work on hardware realization of symmetric image encryption utilizing chaos based continuous systems as pseudo random number generators. Digital implementation of chaotic systems results in serious degradations

  19. Hardware Implementation Of Line Clipping A lgorithm By Using FPGA

    Directory of Open Access Journals (Sweden)

    Amar Dawod

    2013-04-01

    Full Text Available The computer graphics system performance is increasing faster than any other computing application. Algorithms for line clipping against convex polygons and lines have been studied for a long time and many research papers have been published so far. In spite of the latest graphical hardware development and significant increase of performance the clipping is still a bottleneck of any graphical system. So its implementation in hardware is essential for real time applications. In this paper clipping operation is discussed and a hardware implementation of the line clipping algorithm is presented and finally formulated and tested using Field Programmable Gate Arrays (FPGA. The designed hardware unit consists of two parts : the first is positional code generator unit and the second is the clipping unit. Finally it is worth mentioning that the  designed unit is capable of clipping (232524 line segments per second.       

  20. Performance comparison between ISCSI and other hardware and software solutions

    CERN Document Server

    Gug, M

    2003-01-01

    We report on our investigations on some technologies that can be used to build disk servers and networks of disk servers using commodity hardware and software solutions. It focuses on the performance that can be achieved by these systems and gives measured figures for different configurations. It is divided into two parts : iSCSI and other technologies and hardware and software RAID solutions. The first part studies different technologies that can be used by clients to access disk servers using a gigabit ethernet network. It covers block access technologies (iSCSI, hyperSCSI, ENBD). Experimental figures are given for different numbers of clients and servers. The second part compares a system based on 3ware hardware RAID controllers, a system using linux software RAID and IDE cards and a system mixing both hardware RAID and software RAID. Performance measurements for reading and writing are given for different RAID levels.

  1. Hardware Realization of Chaos-based Symmetric Video Encryption

    KAUST Repository

    Ibrahim, Mohamad A.

    2013-01-01

    This thesis reports original work on hardware realization of symmetric video encryption using chaos-based continuous systems as pseudo-random number generators. The thesis also presents some of the serious degradations caused by digitally

  2. Improvement of hardware basic testing : Identification and development of a scripted automation tool that will support hardware basic testing

    OpenAIRE

    Rask, Ulf; Mannestig, Pontus

    2002-01-01

    In the ever-increasing development pace, circuits and hardware are no exception. Hardware designs grow and circuits gets more complex at the same time as the market pressure lowers the expected time-to-market. In this rush, verification methods often lag behind. Hardware manufacturers must be aware of the importance of total verification if they want to avoid quality flaws and broken deadlines which in the long run will lead to delayed time-to-market, bad publicity and a decreasing market sha...

  3. Basics of spectroscopic instruments. Hardware of NMR spectrometer

    International Nuclear Information System (INIS)

    Sato, Hajime

    2009-01-01

    NMR is a powerful tool for structure analysis of small molecules, natural products, biological macromolecules, synthesized polymers, samples from material science and so on. Magnetic Resonance Imaging (MRI) is applicable to plants and animals Because most of NMR experiments can be done by an automation mode, one can forget hardware of NMR spectrometers. It would be good to understand features and performance of NMR spectrometers. Here I present hardware of a modern NMR spectrometer which is fully equipped with digital technology. (author)

  4. Memory Based Machine Intelligence Techniques in VLSI hardware

    OpenAIRE

    James, Alex Pappachen

    2012-01-01

    We briefly introduce the memory based approaches to emulate machine intelligence in VLSI hardware, describing the challenges and advantages. Implementation of artificial intelligence techniques in VLSI hardware is a practical and difficult problem. Deep architectures, hierarchical temporal memories and memory networks are some of the contemporary approaches in this area of research. The techniques attempt to emulate low level intelligence tasks and aim at providing scalable solutions to high ...

  5. Utilizing IXP1200 hardware and software for packet filtering

    OpenAIRE

    Lindholm, Jeffery L.

    2004-01-01

    As network processors have advanced in speed and efficiency they have become more and more complex in both hardware and software configurations. Intel's IXP1200 is one of these new network processors that has been given to different universities worldwide to conduct research on. The goal of this thesis is to take the first step in starting that research by providing a stable system that can provide a reliable platform for further research. This thesis introduces the fundamental hardware of In...

  6. Security challenges and opportunities in adaptive and reconfigurable hardware

    OpenAIRE

    Costan, Victor Marius; Devadas, Srinivas

    2011-01-01

    We present a novel approach to building hardware support for providing strong security guarantees for computations running in the cloud (shared hardware in massive data centers), while maintaining the high performance and low cost that make cloud computing attractive in the first place. We propose augmenting regular cloud servers with a Trusted Computation Base (TCB) that can securely perform high-performance computations. Our TCB achieves cost savings by spreading functionality across two pa...

  7. Review of Maxillofacial Hardware Complications and Indications for Salvage

    OpenAIRE

    Hernandez Rosa, Jonatan; Villanueva, Nathaniel L.; Sanati-Mehrizy, Paymon; Factor, Stephanie H.; Taub, Peter J.

    2015-01-01

    From 2002 to 2006, more than 117,000 facial fractures were recorded in the U.S. National Trauma Database. These fractures are commonly treated with open reduction and internal fixation. While in place, the hardware facilitates successful bony union. However, when postoperative complications occur, the plates may require removal before bony union. Indications for salvage versus removal of the maxillofacial hardware are not well defined. A literature review was performed to identify instances w...

  8. Testing Microgravity Flight Hardware Concepts on the NASA KC-135

    Science.gov (United States)

    Motil, Susan M.; Harrivel, Angela R.; Zimmerli, Gregory A.

    2001-01-01

    This paper provides an overview of utilizing the NASA KC-135 Reduced Gravity Aircraft for the Foam Optics and Mechanics (FOAM) microgravity flight project. The FOAM science requirements are summarized, and the KC-135 test-rig used to test hardware concepts designed to meet the requirements are described. Preliminary results regarding foam dispensing, foam/surface slip tests, and dynamic light scattering data are discussed in support of the flight hardware development for the FOAM experiment.

  9. Accelerator Technology: Injection and Extraction Related Hardware: Kickers and Septa

    CERN Document Server

    Barnes, M J; Mertens, V

    2013-01-01

    This document is part of Subvolume C 'Accelerators and Colliders' of Volume 21 'Elementary Particles' of Landolt-Börnstein - Group I 'Elementary Particles, Nuclei and Atoms'. It contains the the Section '8.7 Injection and Extraction Related Hardware: Kickers and Septa' of the Chapter '8 Accelerator Technology' with the content: 8.7 Injection and Extraction Related Hardware: Kickers and Septa 8.7.1 Fast Pulsed Systems (Kickers) 8.7.2 Electrostatic and Magnetic Septa

  10. Learning Machines Implemented on Non-Deterministic Hardware

    OpenAIRE

    Gupta, Suyog; Sindhwani, Vikas; Gopalakrishnan, Kailash

    2014-01-01

    This paper highlights new opportunities for designing large-scale machine learning systems as a consequence of blurring traditional boundaries that have allowed algorithm designers and application-level practitioners to stay -- for the most part -- oblivious to the details of the underlying hardware-level implementations. The hardware/software co-design methodology advocated here hinges on the deployment of compute-intensive machine learning kernels onto compute platforms that trade-off deter...

  11. Hardware control system using modular software under RSX-11D

    International Nuclear Information System (INIS)

    Kittell, R.S.; Helland, J.A.

    1978-01-01

    A modular software system used to control extensive hardware is described. The development, operation, and experience with this software are discussed. Included are the methods employed to implement this system while taking advantage of the Real-Time features of RSX-11D. Comparisons are made between this system and an earlier nonmodular system. The controlled hardware includes magnet power supplies, stepping motors, DVM's, and multiplexors, and is interfaced through CAMAC. 4 figures

  12. Alaska Public Offices Commission, Department of Administration, State of

    Science.gov (United States)

    Visiting Alaska State Employees State of Alaska Department of Administration Alaska Public Offices Commission Alaska Department of Administration, Alaska Public Offices Commission APOC Home Commission Filer ; AO's Contact Us Administration > Alaska Public Offices Commission Alaska Public Offices Commission

  13. MRI monitoring of focused ultrasound sonications near metallic hardware.

    Science.gov (United States)

    Weber, Hans; Ghanouni, Pejman; Pascal-Tenorio, Aurea; Pauly, Kim Butts; Hargreaves, Brian A

    2018-07-01

    To explore the temperature-induced signal change in two-dimensional multi-spectral imaging (2DMSI) for fast thermometry near metallic hardware to enable MR-guided focused ultrasound surgery (MRgFUS) in patients with implanted metallic hardware. 2DMSI was optimized for temperature sensitivity and applied to monitor focus ultrasound surgery (FUS) sonications near metallic hardware in phantoms and ex vivo porcine muscle tissue. Further, we evaluated its temperature sensitivity for in vivo muscle in patients without metallic hardware. In addition, we performed a comparison of temperature sensitivity between 2DMSI and conventional proton-resonance-frequency-shift (PRFS) thermometry at different distances from metal devices and different signal-to-noise ratios (SNR). 2DMSI thermometry enabled visualization of short ultrasound sonications near metallic hardware. Calibration using in vivo muscle yielded a constant temperature sensitivity for temperatures below 43 °C. For an off-resonance coverage of ± 6 kHz, we achieved a temperature sensitivity of 1.45%/K, resulting in a minimum detectable temperature change of ∼2.5 K for an SNR of 100 with a temporal resolution of 6 s per frame. The proposed 2DMSI thermometry has the potential to allow MR-guided FUS treatments of patients with metallic hardware and therefore expand its reach to a larger patient population. Magn Reson Med 80:259-271, 2018. © 2017 International Society for Magnetic Resonance in Medicine. © 2017 International Society for Magnetic Resonance in Medicine.

  14. Hardware Middleware for Person Tracking on Embedded Distributed Smart Cameras

    Directory of Open Access Journals (Sweden)

    Ali Akbar Zarezadeh

    2012-01-01

    Full Text Available Tracking individuals is a prominent application in such domains like surveillance or smart environments. This paper provides a development of a multiple camera setup with jointed view that observes moving persons in a site. It focuses on a geometry-based approach to establish correspondence among different views. The expensive computational parts of the tracker are hardware accelerated via a novel system-on-chip (SoC design. In conjunction with this vision application, a hardware object request broker (ORB middleware is presented as the underlying communication system. The hardware ORB provides a hardware/software architecture to achieve real-time intercommunication among multiple smart cameras. Via a probing mechanism, a performance analysis is performed to measure network latencies, that is, time traversing the TCP/IP stack, in both software and hardware ORB approaches on the same smart camera platform. The empirical results show that using the proposed hardware ORB as client and server in separate smart camera nodes will considerably reduce the network latency up to 100 times compared to the software ORB.

  15. Compiling quantum circuits to realistic hardware architectures using temporal planners

    Science.gov (United States)

    Venturelli, Davide; Do, Minh; Rieffel, Eleanor; Frank, Jeremy

    2018-04-01

    To run quantum algorithms on emerging gate-model quantum hardware, quantum circuits must be compiled to take into account constraints on the hardware. For near-term hardware, with only limited means to mitigate decoherence, it is critical to minimize the duration of the circuit. We investigate the application of temporal planners to the problem of compiling quantum circuits to newly emerging quantum hardware. While our approach is general, we focus on compiling to superconducting hardware architectures with nearest neighbor constraints. Our initial experiments focus on compiling Quantum Alternating Operator Ansatz (QAOA) circuits whose high number of commuting gates allow great flexibility in the order in which the gates can be applied. That freedom makes it more challenging to find optimal compilations but also means there is a greater potential win from more optimized compilation than for less flexible circuits. We map this quantum circuit compilation problem to a temporal planning problem, and generated a test suite of compilation problems for QAOA circuits of various sizes to a realistic hardware architecture. We report compilation results from several state-of-the-art temporal planners on this test set. This early empirical evaluation demonstrates that temporal planning is a viable approach to quantum circuit compilation.

  16. Hardware-in-the-loop simulation of the EAST PF converter for PF control system upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Xiaojiao, E-mail: chenxj@ipp.ac.cn [Institute of Plasma Physics, Chinese Academy of Science (ASIPP), P.O. Box 1126, Hefei, Anhui Province 230031 (China); Chinese University of Science and Technology, Hefei, Anhui Province 230022 (China); Fu, Peng [Institute of Plasma Physics, Chinese Academy of Science (ASIPP), P.O. Box 1126, Hefei, Anhui Province 230031 (China); Chinese University of Science and Technology, Hefei, Anhui Province 230022 (China); Huang, Liansheng, E-mail: huangls@ipp.ac.cn [Institute of Plasma Physics, Chinese Academy of Science (ASIPP), P.O. Box 1126, Hefei, Anhui Province 230031 (China); Gao, Ge; He, Shiying [Institute of Plasma Physics, Chinese Academy of Science (ASIPP), P.O. Box 1126, Hefei, Anhui Province 230031 (China)

    2016-11-15

    Highlights: • The hardware in the loop simulation of the EAST PF system is presented. • The control functions and the protection logic have been tested and verified. • The major faults could be avoided and commissioning time could be saved on site. - Abstract: The EAST poloidal field (PF) control system was upgraded in 2015 and the new system has been in use for the 2015 EAST campaign. This paper presents the implementation of a hardware-in-the-loop (HIL) simulation platform of the EAST PF converter system based on the RT-LAB simulation environment, which was used to improve and evaluate the performance of the real controller. The EAST PF power supply system and its operational modes are presented in this paper. The experiments on HIL simulation platform show that the control algorithms and the over current protection of the controller meet the design requirements well. In addition, the effectiveness of the designed control system has been verified by actual application during the EAST campaign at 2015 for six months.

  17. Hardware-in-the-loop simulation of the EAST PF converter for PF control system upgrade

    International Nuclear Information System (INIS)

    Chen, Xiaojiao; Fu, Peng; Huang, Liansheng; Gao, Ge; He, Shiying

    2016-01-01

    Highlights: • The hardware in the loop simulation of the EAST PF system is presented. • The control functions and the protection logic have been tested and verified. • The major faults could be avoided and commissioning time could be saved on site. - Abstract: The EAST poloidal field (PF) control system was upgraded in 2015 and the new system has been in use for the 2015 EAST campaign. This paper presents the implementation of a hardware-in-the-loop (HIL) simulation platform of the EAST PF converter system based on the RT-LAB simulation environment, which was used to improve and evaluate the performance of the real controller. The EAST PF power supply system and its operational modes are presented in this paper. The experiments on HIL simulation platform show that the control algorithms and the over current protection of the controller meet the design requirements well. In addition, the effectiveness of the designed control system has been verified by actual application during the EAST campaign at 2015 for six months.

  18. Identification of single-shell tank in-tank hardware obstructions to retrieval at Hanford Site Tank Farms

    International Nuclear Information System (INIS)

    Ballou, R.A.

    1994-10-01

    Two retrieval technologies, one of which uses robot-deployed end effectors, will be demonstrated on the first single-shell tank (SST) waste to be retrieved at the Hanford Site. A significant impediment to the success of this technology in completing the Hanford retrieval mission is the presence of unique tank contents called in-tank hardware (ITH). In-tank hardware includes installed and discarded equipment and various other materials introduced into the tank. This paper identifies those items of ITH that will most influence retrieval operations in the arm-based demonstration project and in follow-on tank operations within the SST farms

  19. National Capital Planning Commission Library contents

    Data.gov (United States)

    National Capital Planning Commission — The National Capital Planning Commission library catalog is a compilation of titles, authors, years of publication and topics of books, reports and NCPC publications.

  20. Powers and Duties of Corporate Affairs Commission

    African Journals Online (AJOL)

    Mofasony

    POWERS AND DUTIES OF THE CORPORATE AFFAIRS. COMMISSION ... The Registrar-General is the Chief Executive of the Commission and is saddled .... Federal Board of Inland Revenue Department of the Ministry of Finance v). Register ...

  1. Atomic Energy Commission Act, 2000 (Act 588)

    International Nuclear Information System (INIS)

    2000-01-01

    Act 588 of the Republic of Ghana entitled, Atomic Energy Commission Act, 2000, amends and consolidates the Atomic Energy Commission Act, 204 of 1963 relating to the establishment of the Atomic Energy Commission. Act 588 makes provision for the Ghana Atomic Energy Commission to establish more institutes for the purpose of research in furtherance of its functions and also promote the commercialization of its research and development results. (E.A.A.)

  2. Bioethics commission to review gene patenting

    Energy Technology Data Exchange (ETDEWEB)

    Rothenburg, L.

    1995-12-01

    In October, in an unexpected development, U.S. President Bill Clinton created a national ethics advisory board, the National Bioethics Advisory Commission (NBAC, Washington, DC), to study both research ethics and the management and use of genetic information. Of particular interest to biotechnology companies and researchers is the fact that the commission`s brief encompasses issues about human gene patenting, a subject not contained in earlier proposals for the commission.

  3. The Industry Commission inquiry into charitable organisations.

    Science.gov (United States)

    Suter, K

    1996-01-01

    The Industry Commission has carried out Australia's largest inquiry into charities. It was, from the point of view of charities, an unsatisfactory operation, all the more so since it was not clear why the task had been given to the commission. This article examines the commission's work in three ways: the overall relationship between government and charities; the commission's proposed major reforms; and the minor reforms.

  4. Atomic Energy Commission (Amendment) Law, 1993

    International Nuclear Information System (INIS)

    1993-02-01

    The Atomic Energy Commission (Amendment) Law, 1993 (P.N.D.C.L. 308) seeks to amend the Atomic Energy Commission Act of 1963 (Act 204) so as to provide for the establishment of a Radiation Protection Board and other institutes under the Ghana Atomic Energy Commission. The Law further repeats the Atomic Energy Commission (Amendment) Law of 1982 (P.N.D.C.L. 37). (EAA)

  5. Nuclear Regulatory Commission 1989 Information Digest

    International Nuclear Information System (INIS)

    1989-03-01

    The Nuclear Regulatory Commission 1989 Information Digest provides summary information regarding the US Nuclear Regulatory Commission, its regulatory responsibilities, and areas licensed by the Commission. This is the first of an annual publication for the general use of the NRC staff and is available to the public. The Digest is divided into two parts: the first presents an overview of the US Nuclear Regulatory Commission and the second provides data on NRC commercial nuclear reactor licensees and commercial nuclear power reactors worldwide

  6. Biometric Identifiers and Border Security: 9/11 Commission Recommendations and Related Issues

    National Research Council Canada - National Science Library

    Morgan, Daniel; Krouse, William

    2005-01-01

    In its final report, the 9/11 Commission concluded that funding and completing a "biometric entry-exit screening system" for travelers to and from the United States is essential to U.S. national security...

  7. Commissioning Instrument for the GTC

    Science.gov (United States)

    Cuevas, S.; Sánchez, B.; Bringas, V.; Espejo, C.; Flores, R.; Chapa, O.; Lara, G.; Chavolla, A.; Anguiano, G.; Arciniega, S.; Dorantes, A.; González, J. L.; Montoya, J. M.; Toral, R.; Hernández, H.; Nava, R.; Devaney, N.; Castro, J.; Cavaller-Marqués, L.

    2005-12-01

    During the GTC integration phase, the Commissioning Instrument (CI) will be a diagnostic tool for performance verification. The CI features four operation modes: imaging, pupil imaging, Curvature WFS, and high resolution Shack-Hartmann WFS. This instrument was built by the Instituto de Astronomía UNAM and the Centro de Ingeniería y Desarrollo Industrial (CIDESI) under GRANTECAN contract after a public bid. In this paper we made a general instrument overview and we show some of the performance final results obtained when the Factory Acceptance tests previous to its transport to La Palma.

  8. 17 CFR 201.57 - Commission review.

    Science.gov (United States)

    2010-04-01

    ... 17 Commodity and Securities Exchanges 2 2010-04-01 2010-04-01 false Commission review. 201.57... Regulations Pertaining to the Equal Access to Justice Act § 201.57 Commission review. In accordance with the... Division of the Commission may seek review of the initial decision on the fee application, or the...

  9. NSLS-II injector commissioning and initial operation

    Energy Technology Data Exchange (ETDEWEB)

    Bacha, B.; Blum, E.; Bassi, B.; Bengtsson, J.; Blednykh, A.; Buda, S.; Cheng, W.; Choi, J.; Cuppolo, J.; D Alsace, R.; Davidsaver, M.; DeLong, J.; Doom, L.; Durfee, d.; fliller, R.; Fulkerson, M.; Ganetis, G.; Gao, F.; Gardner, C.; Guo, W.; Heese, R.; Hidaka, Y.; Hu, Y.; Johanson, M.; Kosciuk, B.; Kowalski, S.; Dramer, S.; Krinsky, S.; Li, Y.; Louie, W.; Maggipinto, M.; Marino, P.; Mead, J.; Oliva, G.; Padrazo, D.; Pedersen, K.; Podobedov, B.; Rainer, R.; Rose, J.; Santana, M.; Seletskiy, S.; Shaftan, T.; Singh, O.; Singh, P.; Smalyuk, V.; Smith, R.; Summers, T.; Tagger, J.; Tian, Y.; Wahl, W.; Wang, G.; Weiner, G.; Willeke, F.; Yang, L.; Yang, X.; Zeitler, E.; Zitvogel, E.; Zuhoski, P.

    2015-05-03

    The injector for the National Synchrotron Light Source II (NSLS-II) storage ring consists of a 3 GeV booster synchrotron and a 200 MeV S-band linac. The linac was designed to produce either a single bunch with a charge of 0.5 nC of electrons or a train of bunches up to 300 ns long containing a total charge of 15 nC. The booster was designed to accelerate up to 15 nC each cycle in a train of bunches up to 300 ns long. Linac commissioning was completed in April 2012. Booster commissioning was started in November 2013 and completed in March 2014. All of the significant design goals were satisfied including beam emittance, energy spread, and transport efficiency. While the maximum booster charge accelerated was only 10 nC, this has proven to be more than sufficient for storage ring commissioning and operation. The injector has operated reliably during storage ring operation since then. Results will be presented showing measurements of linac and booster operating parameters achieved during commissioning and initial operation. Operating experience and reliability during the first year of NSLS-II operation will be discussed.

  10. QCAPUF: QCA-based physically unclonable function as a hardware security primitive

    Science.gov (United States)

    Abutaleb, M. M.

    2018-04-01

    Physically unclonable functions (PUFs) are increasingly used as innovative security primitives to provide the hardware authentication and identification as well as the secret key generation based on unique and random variations in identically fabricated devices. Security and low power have appeared to become two crucial necessities to modern designs. As an emerging nanoelectronic technology, a quantum-dot cellular automata (QCA) can achieve ultra-low power consumption as well as an extremely small area for implementing digital designs. However, there are various classes of permanent defects that can happen during the manufacture of QCA devices. The recent extensive research has been focused on how to eliminate errors in QCA structures resulting from fabrication variances. By a completely different vision, to turn this disadvantage into an advantage, this paper presents a novel QCA-based PUF (QCAPUF) architecture to exploit the unique physical characteristics of fabricated QCA cells in order to produce different hardware fingerprint instances. This architecture is composed of proposed logic and interconnect blocks that have critical vulnerabilities and perform unexpected logical operations. The behaviour of QCAPUF is thoroughly analysed through physical relations and simulations. Results confirm that the proposed QCAPUF has state of the art PUF characteristics in the QCA technology. This paper will serve as a basis for further research into QCA-based hardware security primitives and applications.

  11. Flight Hardware Virtualization for On-Board Science Data Processing Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Utilize Hardware Virtualization technology to benefit on-board science data processing by investigating new real time embedded Hardware Virtualization solutions and...

  12. GOSH! A roadmap for open-source science hardware

    CERN Multimedia

    Stefania Pandolfi

    2016-01-01

    The goal of the Gathering for Open Science Hardware (GOSH! 2016), held from 2 to 5 March 2016 at IdeaSquare, was to lay the foundations of the open-source hardware for science movement.   The participants in the GOSH! 2016 meeting gathered in IdeaSquare. (Image: GOSH Community) “Despite advances in technology, many scientific innovations are held back because of a lack of affordable and customisable hardware,” says François Grey, a professor at the University of Geneva and coordinator of Citizen Cyberlab – a partnership between CERN, the UN Institute for Training and Research and the University of Geneva – which co-organised the GOSH! 2016 workshop. “This scarcity of accessible science hardware is particularly obstructive for citizen science groups and humanitarian organisations that don’t have the same economic means as a well-funded institution.” Instead, open sourcing science hardware co...

  13. Fast DRR splat rendering using common consumer graphics hardware

    International Nuclear Information System (INIS)

    Spoerk, Jakob; Bergmann, Helmar; Wanschitz, Felix; Dong, Shuo; Birkfellner, Wolfgang

    2007-01-01

    Digitally rendered radiographs (DRR) are a vital part of various medical image processing applications such as 2D/3D registration for patient pose determination in image-guided radiotherapy procedures. This paper presents a technique to accelerate DRR creation by using conventional graphics hardware for the rendering process. DRR computation itself is done by an efficient volume rendering method named wobbled splatting. For programming the graphics hardware, NVIDIAs C for Graphics (Cg) is used. The description of an algorithm used for rendering DRRs on the graphics hardware is presented, together with a benchmark comparing this technique to a CPU-based wobbled splatting program. Results show a reduction of rendering time by about 70%-90% depending on the amount of data. For instance, rendering a volume of 2x10 6 voxels is feasible at an update rate of 38 Hz compared to 6 Hz on a common Intel-based PC using the graphics processing unit (GPU) of a conventional graphics adapter. In addition, wobbled splatting using graphics hardware for DRR computation provides higher resolution DRRs with comparable image quality due to special processing characteristics of the GPU. We conclude that DRR generation on common graphics hardware using the freely available Cg environment is a major step toward 2D/3D registration in clinical routine

  14. Advanced photoinjector experiment photogun commissioning results

    Directory of Open Access Journals (Sweden)

    F. Sannibale

    2012-10-01

    Full Text Available The Advanced Photoinjector Experiment (APEX at the Lawrence Berkeley National Laboratory is dedicated to the development of a high-brightness high-repetition rate (MHz-class electron injector for x-ray free-electron laser (FEL and other applications where high repetition rates and high brightness are simultaneously required. The injector is based on a new concept rf gun utilizing a normal-conducting (NC cavity resonating in the VHF band at 186 MHz, and operating in continuous wave (cw mode in conjunction with high quantum efficiency photocathodes capable of delivering the required charge at MHz repetition rates with available laser technology. The APEX activities are staged in three phases. In phase 0, the NC cw gun is built and tested to demonstrate the major milestones to validate the gun design and performance. Also, starting in phase 0 and continuing in phase I, different photocathodes are tested at the gun energy and at full repetition rate for validating candidate materials to operate in a high-repetition rate FEL. In phase II, a room-temperature pulsed linac is added for accelerating the beam at several tens of MeV to reduce space charge effects and allow the measurement of the brightness of the beam from the gun when integrated in an injector scheme. The installation of the phase 0 beam line and the commissioning of the VHF gun are completed, phase I components are under fabrication, and initial design and specification of components and layout for phase II are under way. This paper presents the phase 0 commissioning results with emphasis on the experimental milestones that have successfully demonstrated the APEX gun capability of operating at the required performance.

  15. Phase C commissioning-Cernavoda Unit 2

    International Nuclear Information System (INIS)

    Munro, Robert

    2007-01-01

    Phase C commissioning program includes over 500 individual tests and checks which are carefully planned and scheduled at the correct power level. Some of the major tests are the following: - heat transport thermosyphoning test at 3% Full Power (FP); - dual computer failure test at 15% FP; - turbine overspeed test and generator first synchronization; - load rejection tests at 25, 50, 75 and 100% FP; - loss of Class IV Power test at 25% FP; - shutdown system (SDS nr. 1 and SDS nr. 2) tests at >60% FP; - condensate extraction and boiler feedwater pump trip tests at 100% FP; - power cycling through reactor setback from 100 to 10 and back to 100% FP; - condenser steam discharge valve tests with reactor at 100% FP and turbine at 60% output; - low pressure and high pressure heater box-up tests at 100% FP. Progress through the Phase C program is controlled at six specific Commissioning Control Points (CCPs) which meet the Romanian Regulatory Authority (CNCAN) and Management requirements. These CCPs are the following: PI - Approval for Power increase to 5% FP; PP1 - Approval for Power increase to 25% FP; PP2 - Approval for Power increase to 50% FP; PP3 - Approval for Power increase to 75% FP; PP4 - Approval for Power increase to 100% FP. Prior to releasing each of these CCPs both Management and CNCAN complete an assessment of the 'Readiness' to proceed to the next power plateau. The readiness includes a review of the plant material condition, results of previous tests, documentation status, and operability maintainability issues. (author)

  16. Qinshan CANDU commissioning - a successful partnership

    International Nuclear Information System (INIS)

    Alikhan, S.; Thomson, J.; Jun, G.; Guoyuan, J.

    2004-01-01

    The Qinshan CANDU Nuclear Power Plant consists of 2 x 728 MWe CANDU 6 units, built in Zhejiang Province, China, by the Third Qinshan Nuclear Power Company (TQNPC) as the owner and Atomic Energy of Canada Limited (AECL) as the main contractor. The Contract between China National Nuclear Corporation (CNNC) and AECL was signed in November 1996 and became effective on February 12, 1997 with scheduled completion dates of February 12, 2003 for Unit 1 and November 12, 2003 for Unit 2. Unit 1 was declared in-service on December 31, 2002, 43 days ahead of schedule and Unit 2 was declared in service on July 20, 2003, 115 days ahead of schedule. The successful partnership between AECL, Bechtel, Hitachi and TQNPC working as a team is the key to this success. Total commissioning period from first energization of the system service transformer to in-service for both units was 20.7 months, which is significantly better than the experience at other comparable CANDU 6 units. It has clearly demonstrated the benefits of building two units together, about 6 months apart, to achieve optimum utilization of resources already mobilized for the first unit; the second unit is commissioned with less than 40% of the effort required for the first unit. Since in-service to the end of March 2004, Unit 1 has operated at a gross capacity factor of 93% and Unit 2 at 82.5%, including loss of production for one month in August 2003 to repair the failure of turbine LP blades tie-wire. (author)

  17. Advanced photoinjector experiment photogun commissioning results

    Science.gov (United States)

    Sannibale, F.; Filippetto, D.; Papadopoulos, C. F.; Staples, J.; Wells, R.; Bailey, B.; Baptiste, K.; Corlett, J.; Cork, C.; De Santis, S.; Dimaggio, S.; Doolittle, L.; Doyle, J.; Feng, J.; Garcia Quintas, D.; Huang, G.; Huang, H.; Kramasz, T.; Kwiatkowski, S.; Lellinger, R.; Moroz, V.; Norum, W. E.; Padmore, H.; Pappas, C.; Portmann, G.; Vecchione, T.; Vinco, M.; Zolotorev, M.; Zucca, F.

    2012-10-01

    The Advanced Photoinjector Experiment (APEX) at the Lawrence Berkeley National Laboratory is dedicated to the development of a high-brightness high-repetition rate (MHz-class) electron injector for x-ray free-electron laser (FEL) and other applications where high repetition rates and high brightness are simultaneously required. The injector is based on a new concept rf gun utilizing a normal-conducting (NC) cavity resonating in the VHF band at 186 MHz, and operating in continuous wave (cw) mode in conjunction with high quantum efficiency photocathodes capable of delivering the required charge at MHz repetition rates with available laser technology. The APEX activities are staged in three phases. In phase 0, the NC cw gun is built and tested to demonstrate the major milestones to validate the gun design and performance. Also, starting in phase 0 and continuing in phase I, different photocathodes are tested at the gun energy and at full repetition rate for validating candidate materials to operate in a high-repetition rate FEL. In phase II, a room-temperature pulsed linac is added for accelerating the beam at several tens of MeV to reduce space charge effects and allow the measurement of the brightness of the beam from the gun when integrated in an injector scheme. The installation of the phase 0 beam line and the commissioning of the VHF gun are completed, phase I components are under fabrication, and initial design and specification of components and layout for phase II are under way. This paper presents the phase 0 commissioning results with emphasis on the experimental milestones that have successfully demonstrated the APEX gun capability of operating at the required performance.

  18. Latino College Completion: Hawaii

    Science.gov (United States)

    Excelencia in Education (NJ1), 2012

    2012-01-01

    In 2009, Excelencia in Education launched the Ensuring America's Future initiative to inform, organize, and engage leaders in a tactical plan to increase Latino college completion. An executive summary of Latino College Completion in 50 states synthesizes information on 50 state factsheets and builds on the national benchmarking guide. Each…

  19. Latino College Completion: Pennsylvania

    Science.gov (United States)

    Excelencia in Education (NJ1), 2012

    2012-01-01

    In 2009, Excelencia in Education launched the Ensuring America's Future initiative to inform, organize, and engage leaders in a tactical plan to increase Latino college completion. An executive summary of Latino College Completion in 50 states synthesizes information on 50 state factsheets and builds on the national benchmarking guide. Each…

  20. Molr - A delegation framework for accelerator commissioning

    CERN Document Server

    Valliappan, Nachiappan

    2017-01-01

    Accelerator commissioning is the process of preparing an accelerator for beam operations. A typical commissioning period at CERN involves running thousands of tests on many complex systems and machinery to ensure smooth beam operations and correct functioning of the machine protection systems. AccTesting is a software framework which helps orchestrate the commissioning of CERN’s accelerators and it’s equipment systems. This involves running and managing tests provided by various commissioning tools and analyzing their outcomes. Currently, AccTesting only supports a specific set of commissioning tools. In this project, we aim to widen the spectrum of commissioning tools supported by AccTesting by developing a generic and programmable integration framework called Molr, which would enable the integration of more commissioning tools with AccTesting. In this report, we summarize the work done during the summer student project and lay out a brief overview of the current status and next steps for Molr.

  1. Completeness, supervenience and ontology

    International Nuclear Information System (INIS)

    Maudlin, Tim W E

    2007-01-01

    In 1935, Einstein, Podolsky and Rosen raised the issue of the completeness of the quantum description of a physical system. What they had in mind is whether or not the quantum description is informationally complete, in that all physical features of a system can be recovered from it. In a collapse theory such as the theory of Ghirardi, Rimini and Weber, the quantum wavefunction is informationally complete, and this has often been taken to suggest that according to that theory the wavefunction is all there is. If we distinguish the ontological completeness of a description from its informational completeness, we can see that the best interpretations of the GRW theory must postulate more physical ontology than just the wavefunction

  2. Completeness, supervenience and ontology

    Energy Technology Data Exchange (ETDEWEB)

    Maudlin, Tim W E [Department of Philosophy, Rutgers University, 26 Nichol Avenue, New Brunswick, NJ 08901-1411 (United States)

    2007-03-23

    In 1935, Einstein, Podolsky and Rosen raised the issue of the completeness of the quantum description of a physical system. What they had in mind is whether or not the quantum description is informationally complete, in that all physical features of a system can be recovered from it. In a collapse theory such as the theory of Ghirardi, Rimini and Weber, the quantum wavefunction is informationally complete, and this has often been taken to suggest that according to that theory the wavefunction is all there is. If we distinguish the ontological completeness of a description from its informational completeness, we can see that the best interpretations of the GRW theory must postulate more physical ontology than just the wavefunction.

  3. Construction and Commissioning of PAL-XFEL Facility

    Directory of Open Access Journals (Sweden)

    In Soo Ko

    2017-05-01

    Full Text Available The construction of Pohang Accelerator Laboratory X-ray Free-Electron Laser (PAL-XFEL, a 0.1-nm hard X-ray free-electron laser (FEL facility based on a 10-GeV S-band linear accelerator (LINAC, is achieved in Pohang, Korea by the end of 2016. The construction of the 1.11 km-long building was completed by the end of 2014, and the installation of the 10-GeV LINAC and undulators started in January 2015. The installation of the 10-GeV LINAC, together with the undulators and beamlines, was completed by the end of 2015. The commissioning began in April 2016, and the first lasing of the hard X-ray FEL line was achieved on 14 June 2016. The progress of the PAL-XFEL construction and its commission are reported here.

  4. An Open Hardware seismic data recorder - a solid basis for citizen science

    Science.gov (United States)

    Mertl, Stefan

    2015-04-01

    "Ruwai" is a 24-Bit Open Hardware seismic data recorder. It is built up of four stackable printed circuit boards fitting the Arduino Mega 2560 microcontroller prototyping platform. An interface to the BeagleBone Black single-board computer enables extensive data storage, -processing and networking capabilities. The four printed circuit boards provide a uBlox Lea-6T GPS module and real-time clock (GPS Timing shield), an Texas Instruments ADS1274 24-Bit analog to digital converter (ADC main shield), an analog input section with a Texas Instruments PGA281 programmable gain amplifier and an analog anti-aliasing filter (ADC analog interface pga) and the power conditioning based on 9-36V DC input (power supply shield). The Arduino Mega 2560 is used for controlling the hardware components, timestamping sampled data using the GPS timing information and transmitting the data to the BeagleBone Black single-board computer. The BeagleBone Black provides local data storage, wireless mesh networking using the optimized link state routing daemon and differential GNSS positioning using the RTKLIB software. The complete hardware and software is published under free software - or open hardware licenses and only free software (e.g. KiCad) was used for the development to facilitate the reusability of the design and increases the sustainability of the project. "Ruwai" was developed within the framework of the "Community Environmental Observation Network (CEON)" (http://www.mertl-research.at/ceon/) which was supported by the Internet Foundation Austria (IPA) within the NetIdee 2013 call.

  5. Hardware Realization of Chaos-based Symmetric Video Encryption

    KAUST Repository

    Ibrahim, Mohamad A.

    2013-05-01

    This thesis reports original work on hardware realization of symmetric video encryption using chaos-based continuous systems as pseudo-random number generators. The thesis also presents some of the serious degradations caused by digitally implementing chaotic systems. Subsequently, some techniques to eliminate such defects, including the ultimately adopted scheme are listed and explained in detail. Moreover, the thesis describes original work on the design of an encryption system to encrypt MPEG-2 video streams. Information about the MPEG-2 standard that fits this design context is presented. Then, the security of the proposed system is exhaustively analyzed and the performance is compared with other reported systems, showing superiority in performance and security. The thesis focuses more on the hardware and the circuit aspect of the system’s design. The system is realized on Xilinx Vetrix-4 FPGA with hardware parameters and throughput performance surpassing conventional encryption systems.

  6. Hardware and software maintenance strategies for upgrading vintage computers

    International Nuclear Information System (INIS)

    Wang, B.C.; Buijs, W.J.; Banting, R.D.

    1992-01-01

    The paper focuses on the maintenance of the computer hardware and software for digital control computers (DCC). Specific design and problems related to various maintenance strategies are reviewed. A foundation was required for a reliable computer maintenance and upgrading program to provide operation of the DCC with high availability and reliability for 40 years. This involved a carefully planned and executed maintenance and upgrading program, involving complementary hardware and software strategies. The computer system was designed on a modular basis, with large sections easily replaceable, to facilitate maintenance and improve availability of the system. Advances in computer hardware have made it possible to replace DCC peripheral devices with reliable, inexpensive, and widely available components from PC-based systems (PC = personal computer). By providing a high speed link from the DCC to a PC, it is now possible to use many commercial software packages to process data from the plant. 1 fig

  7. Asymmetric Hardware Distortions in Receive Diversity Systems: Outage Performance Analysis

    KAUST Repository

    Javed, Sidrah; Amin, Osama; Ikki, Salama S.; Alouini, Mohamed-Slim

    2017-01-01

    This paper studies the impact of asymmetric hardware distortion (HWD) on the performance of receive diversity systems using linear and switched combining receivers. The asymmetric attribute of the proposed model motivates the employment of improper Gaussian signaling (IGS) scheme rather than the traditional proper Gaussian signaling (PGS) scheme. The achievable rate performance is analyzed for the ideal and non-ideal hardware scenarios using PGS and IGS transmission schemes for different combining receivers. In addition, the IGS statistical characteristics are optimized to maximize the achievable rate performance. Moreover, the outage probability performance of the receive diversity systems is analyzed yielding closed form expressions for both PGS and IGS based transmission schemes. HWD systems that employ IGS is proven to efficiently combat the self interference caused by the HWD. Furthermore, the obtained analytic expressions are validated through Monte-Carlo simulations. Eventually, non-ideal hardware transceivers degradation and IGS scheme acquired compensation are quantified through suitable numerical results.

  8. Hardware controls for the STAR experiment at RHIC

    International Nuclear Information System (INIS)

    Reichhold, D.; Bieser, F.; Bordua, M.; Cherney, M.; Chrin, J.; Dunlop, J.C.; Ferguson, M.I.; Ghazikhanian, V.; Gross, J.; Harper, G.; Howe, M.; Jacobson, S.; Klein, S.R.; Kravtsov, P.; Lewis, S.; Lin, J.; Lionberger, C.; LoCurto, G.; McParland, C.; McShane, T.; Meier, J.; Sakrejda, I.; Sandler, Z.; Schambach, J.; Shi, Y.; Willson, R.; Yamamoto, E.; Zhang, W.

    2003-01-01

    The STAR detector sits in a high radiation area when operating normally; therefore it was necessary to develop a robust system to remotely control all hardware. The STAR hardware controls system monitors and controls approximately 14,000 parameters in the STAR detector. Voltages, currents, temperatures, and other parameters are monitored. Effort has been minimized by the adoption of experiment-wide standards and the use of pre-packaged software tools. The system is based on the Experimental Physics and Industrial Control System (EPICS) . VME processors communicate with subsystem-based sensors over a variety of field busses, with High-level Data Link Control (HDLC) being the most prevalent. Other features of the system include interfaces to accelerator and magnet control systems, a web-based archiver, and C++-based communication between STAR online, run control and hardware controls and their associated databases. The system has been designed for easy expansion as new detector elements are installed in STAR

  9. Plutonium Protection System (PPS). Volume 2. Hardware description. Final report

    International Nuclear Information System (INIS)

    Miyoshi, D.S.

    1979-05-01

    The Plutonium Protection System (PPS) is an integrated safeguards system developed by Sandia Laboratories for the Department of Energy, Office of Safeguards and Security. The system is designed to demonstrate and test concepts for the improved safeguarding of plutonium. Volume 2 of the PPS final report describes the hardware elements of the system. The major areas containing hardware elements are the vault, where plutonium is stored, the packaging room, where plutonium is packaged into Container Modules, the Security Operations Center, which controls movement of personnel, the Material Accountability Center, which maintains the system data base, and the Material Operations Center, which monitors the operating procedures in the system. References are made to documents in which details of the hardware items can be found

  10. Asymmetric Hardware Distortions in Receive Diversity Systems: Outage Performance Analysis

    KAUST Repository

    Javed, Sidrah

    2017-02-22

    This paper studies the impact of asymmetric hardware distortion (HWD) on the performance of receive diversity systems using linear and switched combining receivers. The asymmetric attribute of the proposed model motivates the employment of improper Gaussian signaling (IGS) scheme rather than the traditional proper Gaussian signaling (PGS) scheme. The achievable rate performance is analyzed for the ideal and non-ideal hardware scenarios using PGS and IGS transmission schemes for different combining receivers. In addition, the IGS statistical characteristics are optimized to maximize the achievable rate performance. Moreover, the outage probability performance of the receive diversity systems is analyzed yielding closed form expressions for both PGS and IGS based transmission schemes. HWD systems that employ IGS is proven to efficiently combat the self interference caused by the HWD. Furthermore, the obtained analytic expressions are validated through Monte-Carlo simulations. Eventually, non-ideal hardware transceivers degradation and IGS scheme acquired compensation are quantified through suitable numerical results.

  11. Commissioning of the Fresno, California, Retrofit Unoccupied Test House

    Energy Technology Data Exchange (ETDEWEB)

    Stecher, D. [IBACOS, Inc., Pittsburgh, PA (United States); Imm, C. [IBACOS, Inc., Pittsburgh, PA (United States)

    2013-06-01

    Commissioning of instrumentation and limited short-term testing have been completed on a retrofit unoccupied test house in Fresno, California. This house is intended to be used as a laboratory in which several different methods of space conditioning distribution will be evaluated. This report provides background on the project, including specifications of the house and models used in its development, along with models to be evaluated through its operation.

  12. Commissioning of the ion beam buncher and cooler for LEBIT

    Energy Technology Data Exchange (ETDEWEB)

    Sun, T.; Bollen, G.; Ringle, R.; Schury, P. [Michigan State University, NSCL, East Lansing, MI (United States); Michigan State University, Department of Physics and Astronomy, East Lansing, MI (United States); Schwarz, S.; Lawton, D. [Michigan State University, NSCL, East Lansing, MI (United States)

    2005-09-01

    A radiofrequency-quadrupole ion accumulator and buncher has been set-up for the low-energy-beam and ion-trap (LEBIT) facility, which is in its final commissioning phase at the NSCL/MSU. The buncher is a cryogenic system with separated cooling and accumulation stages, optimized for excellent beam quality and high performance. The completed set-up of the LEBIT ion buncher is presented as well as first experimental results on pulse forming and beam properties. (orig.)

  13. Commissioning of the ion beam buncher and cooler for LEBIT

    International Nuclear Information System (INIS)

    Sun, T.; Bollen, G.; Ringle, R.; Schury, P.; Schwarz, S.; Lawton, D.

    2005-01-01

    A radiofrequency-quadrupole ion accumulator and buncher has been set-up for the low-energy-beam and ion-trap (LEBIT) facility, which is in its final commissioning phase at the NSCL/MSU. The buncher is a cryogenic system with separated cooling and accumulation stages, optimized for excellent beam quality and high performance. The completed set-up of the LEBIT ion buncher is presented as well as first experimental results on pulse forming and beam properties. (orig.)

  14. SERPUKHOV: UNK transfer beamline commissioned

    International Nuclear Information System (INIS)

    Anon.

    1994-01-01

    At the end of the 1000 hour February-March run of the 70 GeV proton synchrotron at the Institute for High Energy Physics (IHEP), Serpukhov, near Moscow, the new 2.7-kilometre UNK Beam Transfer Line (BTL) was commissioned with proton beam. BTL will eventually transfer beam from the existing U70 proton accelerator to the first stage of the UNK (UNK-1, now under construction) where it will be accelerated in the 21- kilometre ring up to 600 GeV. BTL was designed for proton energies between 60 and 70 GeV, momentum spread ± 2 x 10 -3 and beam emittance 2 mm.mrad, with systems for fast ejection, beam transfer and injection into UNK-1

  15. Commissioning and operation of DRAGON

    International Nuclear Information System (INIS)

    Engel, Sabine

    2003-01-01

    The new DRAGON (Detector of Recoils And Gammas Of Nuclear reactions) facility, located at the TRIUMF-ISAC radioactive beams laboratory in Vancouver, Canada, has initiated its experimental program. Recently DRAGON was used for initial studies of the 21 Na(p,γ) 22 Mg reaction. This facility was designed to measure absolutely the rates of radiative proton and alpha capture reactions of astrophysical interest to a precision of ±20%, using inverse kinematics. To fully understand the optics and operational parameters of the facility along with the transmission particularly of the reaction recoils, systematic studies of various configurations are in progress using stable beams along with measurements of well-known resonance reactions. The status of these commissioning studies is presented

  16. Commissioning and operation of DRAGON

    CERN Document Server

    Engel, S

    2003-01-01

    The new DRAGON (Detector of Recoils And Gammas Of Nuclear reactions) facility, located at the TRIUMF-ISAC radioactive beams laboratory in Vancouver, Canada, has initiated its experimental program. Recently DRAGON was used for initial studies of the sup 2 sup 1 Na(p,gamma) sup 2 sup 2 Mg reaction. This facility was designed to measure absolutely the rates of radiative proton and alpha capture reactions of astrophysical interest to a precision of +-20%, using inverse kinematics. To fully understand the optics and operational parameters of the facility along with the transmission particularly of the reaction recoils, systematic studies of various configurations are in progress using stable beams along with measurements of well-known resonance reactions. The status of these commissioning studies is presented.

  17. Division A Commission 31: Time

    Science.gov (United States)

    Hosokawa, Mizuhiko; Arias, Elisa Felicitas; Manchester, Richard; Tuckey, Philip; Matsakis, Demetrios; Zhang, Shougang; Zharov, Vladimir

    2016-04-01

    Time is an essential element of fundamental astronomy. In recent years there have been many time-related issues, in scientific and technological aspects as well as in conventions and definitions. At the Commission 31 (Time) business meeting at the XXIX General Assembly, recent progress and many topics, including Pulsar Time Scales WG and Future UTC WG activities, were reviewed and discussed. In this report, we will review the progress of these topics in the past three years. There are many remarkable topics, such as Time scales, Atomic clock development, Time transfer, Future UTC and future redefinition of the second. Among them, scientific highlights are the progress of pulsar time scales and the optical frequency standards. On the other hand, as the social convention, change in the definition of UTC and the second is important.

  18. Optimized hardware design for the divertor remote handling control system

    Energy Technology Data Exchange (ETDEWEB)

    Saarinen, Hannu [Tampere University of Technology, Korkeakoulunkatu 6, 33720 Tampere (Finland)], E-mail: hannu.saarinen@tut.fi; Tiitinen, Juha; Aha, Liisa; Muhammad, Ali; Mattila, Jouni; Siuko, Mikko; Vilenius, Matti [Tampere University of Technology, Korkeakoulunkatu 6, 33720 Tampere (Finland); Jaervenpaeae, Jorma [VTT Systems Engineering, Tekniikankatu 1, 33720 Tampere (Finland); Irving, Mike; Damiani, Carlo; Semeraro, Luigi [Fusion for Energy, Josep Pla 2, Torres Diagonal Litoral B3, 08019 Barcelona (Spain)

    2009-06-15

    A key ITER maintenance activity is the exchange of the divertor cassettes. One of the major focuses of the EU Remote Handling (RH) programme has been the study and development of the remote handling equipment necessary for divertor exchange. The current major step in this programme involves the construction of a full scale physical test facility, namely DTP2 (Divertor Test Platform 2), in which to demonstrate and refine the RH equipment designs for ITER using prototypes. The major objective of the DTP2 project is the proof of concept studies of various RH devices, but is also important to define principles for standardizing control hardware and methods around the ITER maintenance equipment. This paper focuses on describing the control system hardware design optimization that is taking place at DTP2. Here there will be two RH movers, namely the Cassette Multifuctional Mover (CMM), Cassette Toroidal Mover (CTM) and assisting water hydraulic force feedback manipulators (WHMAN) located aboard each Mover. The idea here is to use common Real Time Operating Systems (RTOS), measurement and control IO-cards etc. for all maintenance devices and to standardize sensors and control components as much as possible. In this paper, new optimized DTP2 control system hardware design and some initial experimentation with the new DTP2 RH control system platform are presented. The proposed new approach is able to fulfil the functional requirements for both Mover and Manipulator control systems. Since the new control system hardware design has reduced architecture there are a number of benefits compared to the old approach. The simplified hardware solution enables the use of a single software development environment and a single communication protocol. This will result in easier maintainability of the software and hardware, less dependence on trained personnel, easier training of operators and hence reduced the development costs of ITER RH.

  19. Electrical, electronics, and digital hardware essentials for scientists and engineers

    CERN Document Server

    Lipiansky, Ed

    2012-01-01

    A practical guide for solving real-world circuit board problems Electrical, Electronics, and Digital Hardware Essentials for Scientists and Engineers arms engineers with the tools they need to test, evaluate, and solve circuit board problems. It explores a wide range of circuit analysis topics, supplementing the material with detailed circuit examples and extensive illustrations. The pros and cons of various methods of analysis, fundamental applications of electronic hardware, and issues in logic design are also thoroughly examined. The author draws on more than tw

  20. Automating an EXAFS facility: hardware and software considerations

    International Nuclear Information System (INIS)

    Georgopoulos, P.; Sayers, D.E.; Bunker, B.; Elam, T.; Grote, W.A.

    1981-01-01

    The basic design considerations for computer hardware and software, applicable not only to laboratory EXAFS facilities, but also to synchrotron installations, are reviewed. Uniformity and standardization of both hardware configurations and program packages for data collection and analysis are heavily emphasized. Specific recommendations are made with respect to choice of computers, peripherals, and interfaces, and guidelines for the development of software packages are set forth. A description of two working computer-interfaced EXAFS facilities is presented which can serve as prototypes for future developments. 3 figures

  1. Surface moisture measurement system hardware acceptance test report

    Energy Technology Data Exchange (ETDEWEB)

    Ritter, G.A., Westinghouse Hanford

    1996-05-28

    This document summarizes the results of the hardware acceptance test for the Surface Moisture Measurement System (SMMS). This test verified that the mechanical and electrical features of the SMMS functioned as designed and that the unit is ready for field service. The bulk of hardware testing was performed at the 306E Facility in the 300 Area and the Fuels and Materials Examination Facility in the 400 Area. The SMMS was developed primarily in support of Tank Waste Remediation System (TWRS) Safety Programs for moisture measurement in organic and ferrocyanide watch list tanks.

  2. Hardware Evaluation of the Horizontal Exercise Fixture with Weight Stack

    Science.gov (United States)

    Newby, Nate; Leach, Mark; Fincke, Renita; Sharp, Carwyn

    2009-01-01

    HEF with weight stack seems to be a very sturdy and reliable exercise device that should function well in a bed rest training setting. A few improvements should be made to both the hardware and software to improve usage efficiency, but largely, this evaluation has demonstrated HEF's robustness. The hardware offers loading to muscles, bones, and joints, potentially sufficient to mitigate the loss of muscle mass and bone mineral density during long-duration bed rest campaigns. With some minor modifications, the HEF with weight stack equipment provides the best currently available means of performing squat, heel raise, prone row, bench press, and hip flexion/extension exercise in a supine orientation.

  3. Computer organization and design the hardware/software interface

    CERN Document Server

    Hennessy, John L

    1994-01-01

    Computer Organization and Design: The Hardware/Software Interface presents the interaction between hardware and software at a variety of levels, which offers a framework for understanding the fundamentals of computing. This book focuses on the concepts that are the basis for computers.Organized into nine chapters, this book begins with an overview of the computer revolution. This text then explains the concepts and algorithms used in modern computer arithmetic. Other chapters consider the abstractions and concepts in memory hierarchies by starting with the simplest possible cache. This book di

  4. Carbonate fuel cell endurance: Hardware corrosion and electrolyte management status

    Energy Technology Data Exchange (ETDEWEB)

    Yuh, C.; Johnsen, R.; Farooque, M.; Maru, H.

    1993-01-01

    Endurance tests of carbonate fuel cell stacks (up to 10,000 hours) have shown that hardware corrosion and electrolyte losses can be reasonably controlled by proper material selection and cell design. Corrosion of stainless steel current collector hardware, nickel clad bipolar plate and aluminized wet seal show rates within acceptable limits. Electrolyte loss rate to current collector surface has been minimized by reducing exposed current collector surface area. Electrolyte evaporation loss appears tolerable. Electrolyte redistribution has been restrained by proper design of manifold seals.

  5. Carbonate fuel cell endurance: Hardware corrosion and electrolyte management status

    Energy Technology Data Exchange (ETDEWEB)

    Yuh, C.; Johnsen, R.; Farooque, M.; Maru, H.

    1993-05-01

    Endurance tests of carbonate fuel cell stacks (up to 10,000 hours) have shown that hardware corrosion and electrolyte losses can be reasonably controlled by proper material selection and cell design. Corrosion of stainless steel current collector hardware, nickel clad bipolar plate and aluminized wet seal show rates within acceptable limits. Electrolyte loss rate to current collector surface has been minimized by reducing exposed current collector surface area. Electrolyte evaporation loss appears tolerable. Electrolyte redistribution has been restrained by proper design of manifold seals.

  6. Integrated circuit authentication hardware Trojans and counterfeit detection

    CERN Document Server

    Tehranipoor, Mohammad; Zhang, Xuehui

    2013-01-01

    This book describes techniques to verify the authenticity of integrated circuits (ICs). It focuses on hardware Trojan detection and prevention and counterfeit detection and prevention. The authors discuss a variety of detection schemes and design methodologies for improving Trojan detection techniques, as well as various attempts at developing hardware Trojans in IP cores and ICs. While describing existing Trojan detection methods, the authors also analyze their effectiveness in disclosing various types of Trojans, and demonstrate several architecture-level solutions. 

  7. Hardware-assisted software clock synchronization for homogeneous distributed systems

    Science.gov (United States)

    Ramanathan, P.; Kandlur, Dilip D.; Shin, Kang G.

    1990-01-01

    A clock synchronization scheme that strikes a balance between hardware and software solutions is proposed. The proposed is a software algorithm that uses minimal additional hardware to achieve reasonably tight synchronization. Unlike other software solutions, the guaranteed worst-case skews can be made insensitive to the maximum variation of message transit delay in the system. The scheme is particularly suitable for large partially connected distributed systems with topologies that support simple point-to-point broadcast algorithms. Examples of such topologies include the hypercube and the mesh interconnection structures.

  8. Complete Ureteral Avulsion

    Directory of Open Access Journals (Sweden)

    V. Gupta

    2005-01-01

    Full Text Available Complete avulsion of the ureter is one of the most serious complications of ureteroscopy. It requires open or laparoscopic intervention for repair. This case report emphasizes its management and presents recommendations for prevention in current urological practice.

  9. TreeBASIS Feature Descriptor and Its Hardware Implementation

    Directory of Open Access Journals (Sweden)

    Spencer Fowers

    2014-01-01

    Full Text Available This paper presents a novel feature descriptor called TreeBASIS that provides improvements in descriptor size, computation time, matching speed, and accuracy. This new descriptor uses a binary vocabulary tree that is computed using basis dictionary images and a test set of feature region images. To facilitate real-time implementation, a feature region image is binary quantized and the resulting quantized vector is passed into the BASIS vocabulary tree. A Hamming distance is then computed between the feature region image and the effectively descriptive basis dictionary image at a node to determine the branch taken and the path the feature region image takes is saved as a descriptor. The TreeBASIS feature descriptor is an excellent candidate for hardware implementation because of its reduced descriptor size and the fact that descriptors can be created and features matched without the use of floating point operations. The TreeBASIS descriptor is more computationally and space efficient than other descriptors such as BASIS, SIFT, and SURF. Moreover, it can be computed entirely in hardware without the support of a CPU for additional software-based computations. Experimental results and a hardware implementation show that the TreeBASIS descriptor compares well with other descriptors for frame-to-frame homography computation while requiring fewer hardware resources.

  10. Hardware Algorithms For Tile-Based Real-Time Rendering

    NARCIS (Netherlands)

    Crisu, D.

    2012-01-01

    In this dissertation, we present the GRAphics AcceLerator (GRAAL) framework for developing embedded tile-based rasterization hardware for mobile devices, meant to accelerate real-time 3-D graphics (OpenGL compliant) applications. The goal of the framework is a low-cost, low-power, high-performance

  11. Hardware and software techniques for boiler operation and management

    Energy Technology Data Exchange (ETDEWEB)

    Kobayashi, Hiroshi (Hirakawa Iron Works, Ltd., Osaka (Japan))

    1989-04-01

    A study was conducted on the requirements for easy-operable boiler from the view points of hardware and software technologies. Relation among efficiency, energy-saving, and economics, and control of total emission regarding low NOx operation, were explained, with suggestion of orientation to developed necessary hard- and soft- ware for the realization. 8 figs.

  12. Chip-Multiprocessor Hardware Locks for Safety-Critical Java

    DEFF Research Database (Denmark)

    Strøm, Torur Biskopstø; Puffitsch, Wolfgang; Schoeberl, Martin

    2013-01-01

    and may void a task set's schedulability. In this paper we present a hardware locking mechanism to reduce the synchronization overhead. The solution is implemented for the chip-multiprocessor version of the Java Optimized Processor in the context of safety-critical Java. The implementation is compared...

  13. PACE: A dynamic programming algorithm for hardware/software partitioning

    DEFF Research Database (Denmark)

    Knudsen, Peter Voigt; Madsen, Jan

    1996-01-01

    This paper presents the PACE partitioning algorithm which is used in the LYCOS co-synthesis system for partitioning control/dataflow graphs into hardware and software parts. The algorithm is a dynamic programming algorithm which solves both the problem of minimizing system execution time...

  14. A selective logging mechanism for hardware transactional memory systems

    OpenAIRE

    Lupon Navazo, Marc; Magklis, Grigorios; González Colás, Antonio María

    2011-01-01

    Log-based Hardware Transactional Memory (HTM) systems offer an elegant solution to handle speculative data that overflow transactional L1 caches. By keeping the pre-transactional values on a software-resident log, speculative values can be safely moved across the memory hierarchy, without requiring expensive searches on L1 misses or commits.

  15. Hardware, Languages, and Architectures for Defense Against Hostile Operating Systems

    Science.gov (United States)

    2015-05-14

    complex instruction sets. The scale of this problem is multiplied by the diversity of hardware platforms in deployment today. We developed a novel approach...www.seclab.cs.sunysb.edu/seclab/lbc/. Professor King has been invited to and has given lectures at the NSA, Sandia, DARPA, Intel, Microsoft, Samsung

  16. Hardware prototype with component specification and usage description

    NARCIS (Netherlands)

    Azam, Tre; Aswat, Soyeb; Klemke, Roland; Sharma, Puneet; Wild, Fridolin

    2017-01-01

    Following on from D3.1 and the final selection of sensors, in this D3.2 report we present the first version of the experience capturing hardware prototype design and API architecture taking into account the current limitations of the Hololens not being available until early next month in time for

  17. Efficient Architecture for Spike Sorting in Reconfigurable Hardware

    Directory of Open Access Journals (Sweden)

    Sheng-Ying Lai

    2013-11-01

    Full Text Available This paper presents a novel hardware architecture for fast spike sorting. The architecture is able to perform both the feature extraction and clustering in hardware. The generalized Hebbian algorithm (GHA and fuzzy C-means (FCM algorithm are used for feature extraction and clustering, respectively. The employment of GHA allows efficient computation of principal components for subsequent clustering operations. The FCM is able to achieve near optimal clustering for spike sorting. Its performance is insensitive to the selection of initial cluster centers. The hardware implementations of GHA and FCM feature low area costs and high throughput. In the GHA architecture, the computation of different weight vectors share the same circuit for lowering the area costs. Moreover, in the FCM hardware implementation, the usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. To show the effectiveness of the circuit, the proposed architecture is physically implemented by field programmable gate array (FPGA. It is embedded in a System-on-Chip (SOC platform for performance measurement. Experimental results show that the proposed architecture is an efficient spike sorting design for attaining high classification correct rate and high speed computation.

  18. Efficient Architecture for Spike Sorting in Reconfigurable Hardware

    Science.gov (United States)

    Hwang, Wen-Jyi; Lee, Wei-Hao; Lin, Shiow-Jyu; Lai, Sheng-Ying

    2013-01-01

    This paper presents a novel hardware architecture for fast spike sorting. The architecture is able to perform both the feature extraction and clustering in hardware. The generalized Hebbian algorithm (GHA) and fuzzy C-means (FCM) algorithm are used for feature extraction and clustering, respectively. The employment of GHA allows efficient computation of principal components for subsequent clustering operations. The FCM is able to achieve near optimal clustering for spike sorting. Its performance is insensitive to the selection of initial cluster centers. The hardware implementations of GHA and FCM feature low area costs and high throughput. In the GHA architecture, the computation of different weight vectors share the same circuit for lowering the area costs. Moreover, in the FCM hardware implementation, the usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. To show the effectiveness of the circuit, the proposed architecture is physically implemented by field programmable gate array (FPGA). It is embedded in a System-on-Chip (SOC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient spike sorting design for attaining high classification correct rate and high speed computation. PMID:24189331

  19. Another way of doing RSA cryptography in hardware

    NARCIS (Netherlands)

    Batina, L.; Bruin - Muurling, G.; Honary, B.

    2001-01-01

    In this paper we describe an efficient and secure hardware implementation of the RSA cryptosystem. Modular exponentiation is based on Montgomery’s method without any modular reduction achieving the optimal bound. The presented systolic array architecture is scalable in severalparameters which makes

  20. Foundations of digital signal processing theory, algorithms and hardware design

    CERN Document Server

    Gaydecki, Patrick

    2005-01-01

    An excellent introductory text, this book covers the basic theoretical, algorithmic and real-time aspects of digital signal processing (DSP). Detailed information is provided on off-line, real-time and DSP programming and the reader is effortlessly guided through advanced topics such as DSP hardware design, FIR and IIR filter design and difference equation manipulation.

  1. Hardware Descriptive Languages: An Efficient Approach to Device ...

    African Journals Online (AJOL)

    Contemporarily, owing to astronomical advancements in the very large scale integration (VLSI) market segments, hardware engineers are now focusing on how to develop their new digital system designs in programmable languages like very high speed integrated circuit hardwaredescription language (VHDL) and Verilog ...

  2. Detecting System of Nested Hardware Virtual Machine Monitor

    Directory of Open Access Journals (Sweden)

    Artem Vladimirovich Iuzbashev

    2015-03-01

    Full Text Available Method of nested hardware virtual machine monitor detection was proposed in this work. The method is based on HVM timing attack. In case of HVM presence in system, the number of different instruction sequences execution time values will increase. We used this property as indicator in our detection.

  3. CT image reconstruction system based on hardware implementation

    International Nuclear Information System (INIS)

    Silva, Hamilton P. da; Evseev, Ivan; Schelin, Hugo R.; Paschuk, Sergei A.; Milhoretto, Edney; Setti, Joao A.P.; Zibetti, Marcelo; Hormaza, Joel M.; Lopes, Ricardo T.

    2009-01-01

    Full text: The timing factor is very important for medical imaging systems, which can nowadays be synchronized by vital human signals, like heartbeats or breath. The use of hardware implemented devices in such a system has advantages considering the high speed of information treatment combined with arbitrary low cost on the market. This article refers to a hardware system which is based on electronic programmable logic called FPGA, model Cyclone II from ALTERA Corporation. The hardware was implemented on the UP3 ALTERA Kit. A partially connected neural network with unitary weights was programmed. The system was tested with 60 topographic projections, 100 points in each, of the Shepp and Logan phantom created by MATLAB. The main restriction was found to be the memory size available on the device: the dynamic range of reconstructed image was limited to 0 65535. Also, the normalization factor must be observed in order to do not saturate the image during the reconstruction and filtering process. The test shows a principal possibility to build CT image reconstruction systems for any reasonable amount of input data by arranging the parallel work of the hardware units like we have tested. However, further studies are necessary for better understanding of the error propagation from topographic projections to reconstructed image within the implemented method. (author)

  4. Lab at Home: Hardware Kits for a Digital Design Lab

    Science.gov (United States)

    Oliver, J. P.; Haim, F.

    2009-01-01

    An innovative laboratory methodology for an introductory digital design course is presented. Instead of having traditional lab experiences, where students have to come to school classrooms, a "lab at home" concept is proposed. Students perform real experiments in their own homes, using hardware kits specially developed for this purpose. They…

  5. 3D IBFV : Hardware-Accelerated 3D Flow Visualization

    NARCIS (Netherlands)

    Telea, Alexandru; Wijk, Jarke J. van

    2003-01-01

    We present a hardware-accelerated method for visualizing 3D flow fields. The method is based on insertion, advection, and decay of dye. To this aim, we extend the texture-based IBFV technique for 2D flow visualization in two main directions. First, we decompose the 3D flow visualization problem in a

  6. Enabling Self-Organization in Embedded Systems with Reconfigurable Hardware

    Directory of Open Access Journals (Sweden)

    Christophe Bobda

    2009-01-01

    Full Text Available We present a methodology based on self-organization to manage resources in networked embedded systems based on reconfigurable hardware. Two points are detailed in this paper, the monitoring system used to analyse the system and the Local Marketplaces Global Symbiosis (LMGS concept defined for self-organization of dynamically reconfigurable nodes.

  7. Generalized Distance Transforms and Skeletons in Graphics Hardware

    NARCIS (Netherlands)

    Strzodka, R.; Telea, A.

    2004-01-01

    We present a framework for computing generalized distance transforms and skeletons of two-dimensional objects using graphics hardware. Our method is based on the concept of footprint splatting. Combining different splats produces weighted distance transforms for different metrics, as well as the

  8. 3D IBFV : hardware-accelerated 3D flow visualization

    NARCIS (Netherlands)

    Telea, A.C.; Wijk, van J.J.

    2003-01-01

    We present a hardware-accelerated method for visualizing 3D flow fields. The method is based on insertion, advection, and decay of dye. To this aim, we extend the texture-based IBFV technique presented by van Wijk (2001) for 2D flow visualization in two main directions. First, we decompose the 3D

  9. Smart Home Hardware-in-the-Loop Testing

    Energy Technology Data Exchange (ETDEWEB)

    Pratt, Annabelle

    2017-07-12

    This presentation provides a high-level overview of NREL's smart home hardware-in-the-loop testing. It was presented at the Fourth International Workshop on Grid Simulator Testing of Energy Systems and Wind Turbine Powertrains, held April 25-26, 2017, hosted by NREL and Clemson University at the Energy Systems Integration Facility in Golden, Colorado.

  10. Motion compensation in digital subtraction angiography using graphics hardware.

    Science.gov (United States)

    Deuerling-Zheng, Yu; Lell, Michael; Galant, Adam; Hornegger, Joachim

    2006-07-01

    An inherent disadvantage of digital subtraction angiography (DSA) is its sensitivity to patient motion which causes artifacts in the subtraction images. These artifacts could often reduce the diagnostic value of this technique. Automated, fast and accurate motion compensation is therefore required. To cope with this requirement, we first examine a method explicitly designed to detect local motions in DSA. Then, we implement a motion compensation algorithm by means of block matching on modern graphics hardware. Both methods search for maximal local similarity by evaluating a histogram-based measure. In this context, we are the first who have mapped an optimizing search strategy on graphics hardware while paralleling block matching. Moreover, we provide an innovative method for creating histograms on graphics hardware with vertex texturing and frame buffer blending. It turns out that both methods can effectively correct the artifacts in most case, as the hardware implementation of block matching performs much faster: the displacements of two 1024 x 1024 images can be calculated at 3 frames/s with integer precision or 2 frames/s with sub-pixel precision. Preliminary clinical evaluation indicates that the computation with integer precision could already be sufficient.

  11. Hardware availability calculations and results of the IFMIF accelerator facility

    International Nuclear Information System (INIS)

    Bargalló, Enric; Arroyo, Jose Manuel; Abal, Javier; Beauvais, Pierre-Yves; Gobin, Raphael; Orsini, Fabienne; Weber, Moisés; Podadera, Ivan; Grespan, Francesco; Fagotti, Enrico; De Blas, Alfredo; Dies, Javier; Tapia, Carlos; Mollá, Joaquín; Ibarra, Ángel

    2014-01-01

    Highlights: • IFMIF accelerator facility hardware availability analyses methodology is described. • Results of the individual hardware availability analyses are shown for the reference design. • Accelerator design improvements are proposed for each system. • Availability results are evaluated and compared with the requirements. - Abstract: Hardware availability calculations have been done individually for each system of the deuteron accelerators of the International Fusion Materials Irradiation Facility (IFMIF). The principal goal of these analyses is to estimate the availability of the systems, compare it with the challenging IFMIF requirements and find new paths to improve availability performances. Major unavailability contributors are highlighted and possible design changes are proposed in order to achieve the hardware availability requirements established for each system. In this paper, such possible improvements are implemented in fault tree models and the availability results are evaluated. The parallel activity on the design and construction of the linear IFMIF prototype accelerator (LIPAc) provides detailed design information for the RAMI (reliability, availability, maintainability and inspectability) analyses and allows finding out the improvements that the final accelerator could have. Because of the R and D behavior of the LIPAc, RAMI improvements could be the major differences between the prototype and the IFMIF accelerator design

  12. Hardware availability calculations and results of the IFMIF accelerator facility

    Energy Technology Data Exchange (ETDEWEB)

    Bargalló, Enric, E-mail: enric.bargallo-font@upc.edu [Fusion Energy Engineering Laboratory (FEEL), Technical University of Catalonia (UPC), Barcelona (Spain); Arroyo, Jose Manuel [Laboratorio Nacional de Fusión por Confinamiento Magnético – CIEMAT, Madrid (Spain); Abal, Javier [Fusion Energy Engineering Laboratory (FEEL), Technical University of Catalonia (UPC), Barcelona (Spain); Beauvais, Pierre-Yves; Gobin, Raphael; Orsini, Fabienne [Commissariat à l’Energie Atomique, Saclay (France); Weber, Moisés; Podadera, Ivan [Laboratorio Nacional de Fusión por Confinamiento Magnético – CIEMAT, Madrid (Spain); Grespan, Francesco; Fagotti, Enrico [Istituto Nazionale di Fisica Nucleare, Legnaro (Italy); De Blas, Alfredo; Dies, Javier; Tapia, Carlos [Fusion Energy Engineering Laboratory (FEEL), Technical University of Catalonia (UPC), Barcelona (Spain); Mollá, Joaquín; Ibarra, Ángel [Laboratorio Nacional de Fusión por Confinamiento Magnético – CIEMAT, Madrid (Spain)

    2014-10-15

    Highlights: • IFMIF accelerator facility hardware availability analyses methodology is described. • Results of the individual hardware availability analyses are shown for the reference design. • Accelerator design improvements are proposed for each system. • Availability results are evaluated and compared with the requirements. - Abstract: Hardware availability calculations have been done individually for each system of the deuteron accelerators of the International Fusion Materials Irradiation Facility (IFMIF). The principal goal of these analyses is to estimate the availability of the systems, compare it with the challenging IFMIF requirements and find new paths to improve availability performances. Major unavailability contributors are highlighted and possible design changes are proposed in order to achieve the hardware availability requirements established for each system. In this paper, such possible improvements are implemented in fault tree models and the availability results are evaluated. The parallel activity on the design and construction of the linear IFMIF prototype accelerator (LIPAc) provides detailed design information for the RAMI (reliability, availability, maintainability and inspectability) analyses and allows finding out the improvements that the final accelerator could have. Because of the R and D behavior of the LIPAc, RAMI improvements could be the major differences between the prototype and the IFMIF accelerator design.

  13. Combining hardware and simulation for datacenter scaling studies

    DEFF Research Database (Denmark)

    Ruepp, Sarah Renée; Pilimon, Artur; Thrane, Jakob

    2017-01-01

    and simulation to illustrate the scalability and performance of datacenter networks. We simulate a Datacenter network and interconnect it with real world traffic generation hardware. Analysis of the introduced packet conversion and virtual queueing delays shows that the conversion efficiency is at the order...

  14. Hiding State in CλaSH Hardware Descriptions

    NARCIS (Netherlands)

    Gerards, Marco Egbertus Theodorus; Baaij, C.P.R.; Kuper, Jan; Kooijman, Matthijs

    Synchronous hardware can be modelled as a mapping from input and state to output and a new state, such mappings are referred to as transition functions. It is natural to use a functional language to implement transition functions. The CaSH compiler is capable of translating transition functions to

  15. Towards Shop Floor Hardware Reconfiguration for Industrial Collaborative Robots

    DEFF Research Database (Denmark)

    Schou, Casper; Madsen, Ole

    2016-01-01

    In this paper we propose a roadmap for hardware reconfiguration of industrial collaborative robots. As a flexible resource, the collaborative robot will often need transitioning to a new task. Our goal is, that this transitioning should be done by the shop floor operators, not highly specialized...

  16. Parallel asynchronous hardware implementation of image processing algorithms

    Science.gov (United States)

    Coon, Darryl D.; Perera, A. G. U.

    1990-01-01

    Research is being carried out on hardware for a new approach to focal plane processing. The hardware involves silicon injection mode devices. These devices provide a natural basis for parallel asynchronous focal plane image preprocessing. The simplicity and novel properties of the devices would permit an independent analog processing channel to be dedicated to every pixel. A laminar architecture built from arrays of the devices would form a two-dimensional (2-D) array processor with a 2-D array of inputs located directly behind a focal plane detector array. A 2-D image data stream would propagate in neuron-like asynchronous pulse-coded form through the laminar processor. No multiplexing, digitization, or serial processing would occur in the preprocessing state. High performance is expected, based on pulse coding of input currents down to one picoampere with noise referred to input of about 10 femtoamperes. Linear pulse coding has been observed for input currents ranging up to seven orders of magnitude. Low power requirements suggest utility in space and in conjunction with very large arrays. Very low dark current and multispectral capability are possible because of hardware compatibility with the cryogenic environment of high performance detector arrays. The aforementioned hardware development effort is aimed at systems which would integrate image acquisition and image processing.

  17. Tomographic image reconstruction and rendering with texture-mapping hardware

    International Nuclear Information System (INIS)

    Azevedo, S.G.; Cabral, B.K.; Foran, J.

    1994-07-01

    The image reconstruction problem, also known as the inverse Radon transform, for x-ray computed tomography (CT) is found in numerous applications in medicine and industry. The most common algorithm used in these cases is filtered backprojection (FBP), which, while a simple procedure, is time-consuming for large images on any type of computational engine. Specially-designed, dedicated parallel processors are commonly used in medical CT scanners, whose results are then passed to graphics workstation for rendering and analysis. However, a fast direct FBP algorithm can be implemented on modern texture-mapping hardware in current high-end workstation platforms. This is done by casting the FBP algorithm as an image warping operation with summing. Texture-mapping hardware, such as that on the Silicon Graphics Reality Engine (TM), shows around 600 times speedup of backprojection over a CPU-based implementation (a 100 Mhz R4400 in this case). This technique has the further advantages of flexibility and rapid programming. In addition, the same hardware can be used for both image reconstruction and for volumetric rendering. The techniques can also be used to accelerate iterative reconstruction algorithms. The hardware architecture also allows more complex operations than straight-ray backprojection if they are required, including fan-beam, cone-beam, and curved ray paths, with little or no speed penalties

  18. Hardware realization of an SVM algorithm implemented in FPGAs

    Science.gov (United States)

    Wiśniewski, Remigiusz; Bazydło, Grzegorz; Szcześniak, Paweł

    2017-08-01

    The paper proposes a technique of hardware realization of a space vector modulation (SVM) of state function switching in matrix converter (MC), oriented on the implementation in a single field programmable gate array (FPGA). In MC the SVM method is based on the instantaneous space-vector representation of input currents and output voltages. The traditional computation algorithms usually involve digital signal processors (DSPs) which consumes the large number of power transistors (18 transistors and 18 independent PWM outputs) and "non-standard positions of control pulses" during the switching sequence. Recently, hardware implementations become popular since computed operations may be executed much faster and efficient due to nature of the digital devices (especially concurrency). In the paper, we propose a hardware algorithm of SVM computation. In opposite to the existing techniques, the presented solution applies COordinate Rotation DIgital Computer (CORDIC) method to solve the trigonometric operations. Furthermore, adequate arithmetic modules (that is, sub-devices) used for intermediate calculations, such as code converters or proper sectors selectors (for output voltages and input current) are presented in detail. The proposed technique has been implemented as a design described with the use of Verilog hardware description language. The preliminary results of logic implementation oriented on the Xilinx FPGA (particularly, low-cost device from Artix-7 family from Xilinx was used) are also presented.

  19. Towards automated construction of dependable software/hardware systems

    Energy Technology Data Exchange (ETDEWEB)

    Yakhnis, A.; Yakhnis, V. [Pioneer Technologies & Rockwell Science Center, Albuquerque, NM (United States)

    1997-11-01

    This report contains viewgraphs on the automated construction of dependable computer architecture systems. The outline of this report is: examples of software/hardware systems; dependable systems; partial delivery of dependability; proposed approach; removing obstacles; advantages of the approach; criteria for success; current progress of the approach; and references.

  20. Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems (Habilitation)

    NARCIS (Netherlands)

    Ziener, Daniel

    2017-01-01

    In this treatise,  my research on methods to improve efficiency, reliability, and security of reconfigurable hardware systems, i.e., FPGAs, through partial dynamic reconfiguration is outlined. The efficiency of reconfigurable systems can be improved by loading optimized data paths on-the-fly on an

  1. Evaluation of In-House versus Contract Computer Hardware Maintenance

    International Nuclear Information System (INIS)

    Wright, H.P.

    1981-09-01

    The issue of In-House versus Contract Computer Hardware Maintenance is one which every organization who uses computers must resolve. This report discusses the advantages and disadvantages of both approaches to computer maintenance, the costs involved (based on the current AGNS computer inventory), and the AGNS maintenance experience to date. A recommendation on an appropriate approach for AGNS is made

  2. Hardware Approach for Real Time Machine Stereo Vision

    Directory of Open Access Journals (Sweden)

    Michael Tornow

    2006-02-01

    Full Text Available Image processing is an effective tool for the analysis of optical sensor information for driver assistance systems and controlling of autonomous robots. Algorithms for image processing are often very complex and costly in terms of computation. In robotics and driver assistance systems, real-time processing is necessary. Signal processing algorithms must often be drastically modified so they can be implemented in the hardware. This task is especially difficult for continuous real-time processing at high speeds. This article describes a hardware-software co-design for a multi-object position sensor based on a stereophotogrammetric measuring method. In order to cover a large measuring area, an optimized algorithm based on an image pyramid is implemented in an FPGA as a parallel hardware solution for depth map calculation. Object recognition and tracking are then executed in real-time in a processor with help of software. For this task a statistical cluster method is used. Stabilization of the tracking is realized through use of a Kalman filter. Keywords: stereophotogrammetry, hardware-software co-design, FPGA, 3-d image analysis, real-time, clustering and tracking.

  3. Hardware Design Considerations for Edge-Accelerated Stereo Correspondence Algorithms

    Directory of Open Access Journals (Sweden)

    Christos Ttofis

    2012-01-01

    Full Text Available Stereo correspondence is a popular algorithm for the extraction of depth information from a pair of rectified 2D images. Hence, it has been used in many computer vision applications that require knowledge about depth. However, stereo correspondence is a computationally intensive algorithm and requires high-end hardware resources in order to achieve real-time processing speed in embedded computer vision systems. This paper presents an overview of the use of edge information as a means to accelerate hardware implementations of stereo correspondence algorithms. The presented approach restricts the stereo correspondence algorithm only to the edges of the input images rather than to all image points, thus resulting in a considerable reduction of the search space. The paper highlights the benefits of the edge-directed approach by applying it to two stereo correspondence algorithms: an SAD-based fixed-support algorithm and a more complex adaptive support weight algorithm. Furthermore, we present design considerations about the implementation of these algorithms on reconfigurable hardware and also discuss issues related to the memory structures needed, the amount of parallelism that can be exploited, the organization of the processing blocks, and so forth. The two architectures (fixed-support based versus adaptive-support weight based are compared in terms of processing speed, disparity map accuracy, and hardware overheads, when both are implemented on a Virtex-5 FPGA platform.

  4. Detection of hardware backdoor through microcontroller read time ...

    African Journals Online (AJOL)

    The objective of this work, christened “HABA” (Hardware Backdoor Aware) is to collect data samples of series of read time of microcontroller embedded on military grade equipments and correlate it with previously stored expected behavior read time samples so as to detect abnormality or otherwise. I was motivated by the ...

  5. Hardware Transactional Memory Optimization Guidelines, Applied to Ordered Maps

    DEFF Research Database (Denmark)

    Bonnichsen, Lars Frydendal; Probst, Christian W.; Karlsson, Sven

    2015-01-01

    efficiently requires reasoning about those differences. In this paper we present 5 guidelines for applying hardware transactional memory efficiently, and apply the guidelines to BT-trees, a concurrent ordered map. Evaluating BT-trees on standard benchmarks shows that they are up to 5.3 times faster than...

  6. Nuclear Regulatory Commission issuances, October 1993

    International Nuclear Information System (INIS)

    1993-10-01

    This document contains a Commission issuance in which the Commission denies the petitioners' motion to quash or modify a subpoena issued by the NRC staff in the course of an investigation to determine if the petitioners' have violated NRC regulations and to determine if safety-related problems exist at NRC-licensed facilities. The pertinent regulations and the Commission's Memorandum and Order are included

  7. Large Hadron Collider commissioning and first operation.

    Science.gov (United States)

    Myers, S

    2012-02-28

    A history of the commissioning and the very successful early operation of the Large Hadron Collider (LHC) is described. The accident that interrupted the first commissioning, its repair and the enhanced protection system put in place are fully described. The LHC beam commissioning and operational performance are reviewed for the period from 2010 to mid-2011. Preliminary plans for operation and future upgrades for the LHC are given for the short and medium term.

  8. A Staged Approach to LHC Commissioning

    CERN Document Server

    Lamont, M; Brüning, Oliver Sim; Collier, P; Lauckner, R; Schmidt, R

    2006-01-01

    Effective commissioning of the LHC with beam will demand very good preparation; all concerned subsystems will need to be well-prepared and thoroughly tested before first beam. To clarify the demands on the systems involved the objectives of the commissioning phases are presented, along with a breakdown of the phases and the essential prerequisites for each. The nature of the interdependencies between the various systems is highlighted; in particular the need for a well-planned commissioning of the machine protection system.

  9. Federal Energy Regulatory Commission (FERC) Regions

    Data.gov (United States)

    Department of Homeland Security — Federal Energy Regulatory Commission (FERC) Regions. FERC is an independent agency that regulates the interstate transmission of electricity, natural gas, and oil....

  10. Commissioning of the nuclear power plant

    International Nuclear Information System (INIS)

    Furtado, P.M.; Rolf, F.

    1984-01-01

    Nuclear Power Plant Angra 2, located at Itaorna Beach-Angra dos Reis is the first plant of the Brazilian-German Agreement to be commissioned. The Nuclear Power Plant is a pressurized water reactor rated at 3765 Mw thermal/1325 Mw electrical. For commissioning purpose the plant is divided into 110 systems. Plant commissioning objective is to demonstrate the safe and correct operation of each plan component, system and of the whole plant in agreement with design conditions, licensing requirements and contractual obligations. This work gives a description of plant commissioning objectives, activities their time sequence, and documentation. (Author) [pt

  11. Flight Hardware Packaging Design for Stringent EMC Radiated Emission Requirements

    Science.gov (United States)

    Lortz, Charlene L.; Huang, Chi-Chien N.; Ravich, Joshua A.; Steiner, Carl N.

    2013-01-01

    This packaging design approach can help heritage hardware meet a flight project's stringent EMC radiated emissions requirement. The approach requires only minor modifications to a hardware's chassis and mainly concentrates on its connector interfaces. The solution is to raise the surface area where the connector is mounted by a few millimeters using a pedestal, and then wrapping with conductive tape from the cable backshell down to the surface-mounted connector. This design approach has been applied to JPL flight project subsystems. The EMC radiated emissions requirements for flight projects can vary from benign to mission critical. If the project's EMC requirements are stringent, the best approach to meet EMC requirements would be to design an EMC control program for the project early on and implement EMC design techniques starting with the circuit board layout. This is the ideal scenario for hardware that is built from scratch. Implementation of EMC radiated emissions mitigation techniques can mature as the design progresses, with minimal impact to the design cycle. The real challenge exists for hardware that is planned to be flown following a built-to-print approach, in which heritage hardware from a past project with a different set of requirements is expected to perform satisfactorily for a new project. With acceptance of heritage, the design would already be established (circuit board layout and components have already been pre-determined), and hence any radiated emissions mitigation techniques would only be applicable at the packaging level. The key is to take a heritage design with its known radiated emissions spectrum and repackage, or modify its chassis design so that it would have a better chance of meeting the new project s radiated emissions requirements.

  12. Analog Exercise Hardware to Implement a High Intensity Exercise Program During Bed Rest

    Science.gov (United States)

    Loerch, Linda; Newby, Nate; Ploutz-Snyder, Lori

    2012-01-01

    Background: In order to evaluate novel countermeasure protocols in a space flight analog prior to validation on the International Space Station (ISS), NASA's Human Research Program (HRP) is sponsoring a multi-investigator bedrest campaign that utilizes a combination of commercial and custom-made exercise training hardware to conduct daily resistive and aerobic exercise protocols. This paper will describe these pieces of hardware and how they are used to support current bedrest studies at NASA's Flight Analog Research Unit in Galveston, TX. Discussion: To implement candidate exercise countermeasure studies during extended bed rest studies the following analog hardware are being utilized: Stand alone Zero-Gravity Locomotion Simulator (sZLS) -- a custom built device by NASA, the sZLS allows bedrest subjects to remain supine as they run on a vertically-oriented treadmill (0-15 miles/hour). The treadmill includes a pneumatic subject loading device to provide variable body loading (0-100%) and a harness to keep the subject in contact with the motorized treadmill to provide a ground reaction force at their feet that is quantified by a Kistler Force Plate. Supine Cycle Ergometer -- a commercially available supine cycle ergometer (Lode, Groningen, Netherlands) is used for all cycle ergometer sessions. The ergometer has adjustable shoulder supports and handgrips to help stabilize the subject during exercise. Horizontal Squat Device (HSD) -- a custom built device by Quantum Fitness Corp (Stafford, TX), the HSD allows for squat exercises to be performed while lying in a supine position. The HSD can provide 0 to 600 pounds of force in selectable 5 lb increments, and allows hip translation in both the vertical and horizontal planes. Prone Leg Curl -- a commercially available prone leg curl machine (Cybex International Inc., Medway, MA) is used to complete leg curl exercises. Horizontal Leg Press -- a commercially available horizontal leg press (Quantum Fitness Corporation) is

  13. Completeness of Lyapunov Abstraction

    DEFF Research Database (Denmark)

    Wisniewski, Rafal; Sloth, Christoffer

    2013-01-01

    the vector field, which allows the generation of a complete abstraction. To compute the functions that define the subdivision of the state space in an algorithm, we formulate a sum of squares optimization problem. This optimization problem finds the best subdivisioning functions, with respect to the ability......This paper addresses the generation of complete abstractions of polynomial dynamical systems by timed automata. For the proposed abstraction, the state space is divided into cells by sublevel sets of functions. We identify a relation between these functions and their directional derivatives along...

  14. COMMISSIONING AND DETECTOR PERFORMANCE GROUPS (DPG)

    CERN Multimedia

    Darin Acosta

    Since the last CMS week we have continued the regular mid week global runs and conducted the first CRUZET this year at the beginning of June. The fact that the tracker was not available yet due to the cooling plant refurbishing has limited the scope of these global runs. The focus has been on verifying the robustness of the various subsystem data acquisition chains under realistic LHC-like trigger conditions. In the last few weeks we have been able to take runs of many hours at a Level-1 trigger rate of 90 kHz with less than 10% deadtime. As usual a lot of issues have been found and dealt with, and the firmware of the various subsystems have all been upgraded/fixed. Worth reporting is the fact that now both endcaps are read-out completely (including the RPC on the negative side) and the local commissioning of the preshower detector has been steadily progressing, with the last firmware fixes in hand to be able to join the global run campaign. The Pixel system has been part of 3 global runs already and has pr...

  15. Real Estate Agent Commission Disputes

    Directory of Open Access Journals (Sweden)

    Anida Duarte

    2015-06-01

    Full Text Available The purpose of this study was to examine the relationship among Procuring Cause Law, real estate agent years of experience, and real estate commission disputes. A pilot survey was conducted in the southwestern United States among real estate agents, realtor(s, and brokers. After testing the hypothesis, the decision was made to fail to reject the hypothesis and conclude that real estate agent experience and not Procuring Cause Law produced favorable outcomes in disputes. As a result, the following recommendations were made: (a Agency seller and buyer’s agreements should be used in each transaction to avoid disputes, (b proper expectations and guidelines should be reviewed prior to starting any real estate transaction, (c a checklist may assist in the assurance that all valuable information is reviewed, (d agents could benefit from fully understanding Procuring Cause Law and sharing this information with their clients, (e state and national regulatory requirements of the law could be modified for easier understanding and use, and (f consumers who willfully violate the law could be subject to monetary penalties.

  16. Completion of the Heysham 2 peripheral manipulator

    International Nuclear Information System (INIS)

    Shipp, R.; Ewen, R.O.

    1996-01-01

    The in-service inspection strategy for the AGR power station at Heysham 2 envisaged a suite of five manipulators to be used for inserting TRIUMPH television cameras into the reactor vessel. Prior to power raising, four of the five had been successfully commissioned and have been in regular use during the subsequent statutory outages. The final device, the Peripheral Manipulator (PM), was eventually completed prior to the 1994 outage and has been successfully deployed on reactor for both the 1994 and 1995 outages. The paper describes the design of the manipulator, its operation and scope of use in the Heysham 2 reactors. (Author)

  17. Construction completion report

    International Nuclear Information System (INIS)

    1990-01-01

    This Construction Completion Report documents the major construction projects at the Waste Isolation Pilot Plant (WIPP) site and related information on contracts, schedules, and other areas which affected construction. This report is not intended to be an exhaustive detailed analysis of construction, but is a general overview and summary of the WIPP construction. 10 refs., 29 figs

  18. Complete Rerouting Protection

    DEFF Research Database (Denmark)

    Stidsen, Thomas K.; Kjærulff, Peter

    2005-01-01

    In this paper we present a new protection method: Complete Rerouting. This is the most capacity e cient protection method for circuit switched networks and it is, to the best of our knowledge, the first time it has been described. We implement a column generation algorithm and test the performance...

  19. Complete French Teach Yourself

    CERN Document Server

    Graham, Gaelle

    2010-01-01

    The best-selling complete course for a fun and effective way to learn French. This ISBN is for the paperback book. The corresponding audio support (ISBN: 9781444100068) is also available. The book and audio support can also be purchased as a pack (ISBN: 9781444100051).

  20. Completeness of Lyapunov Abstraction

    Directory of Open Access Journals (Sweden)

    Rafael Wisniewski

    2013-08-01

    Full Text Available In this work, we continue our study on discrete abstractions of dynamical systems. To this end, we use a family of partitioning functions to generate an abstraction. The intersection of sub-level sets of the partitioning functions defines cells, which are regarded as discrete objects. The union of cells makes up the state space of the dynamical systems. Our construction gives rise to a combinatorial object - a timed automaton. We examine sound and complete abstractions. An abstraction is said to be sound when the flow of the time automata covers the flow lines of the dynamical systems. If the dynamics of the dynamical system and the time automaton are equivalent, the abstraction is complete. The commonly accepted paradigm for partitioning functions is that they ought to be transversal to the studied vector field. We show that there is no complete partitioning with transversal functions, even for particular dynamical systems whose critical sets are isolated critical points. Therefore, we allow the directional derivative along the vector field to be non-positive in this work. This considerably complicates the abstraction technique. For understanding dynamical systems, it is vital to study stable and unstable manifolds and their intersections. These objects appear naturally in this work. Indeed, we show that for an abstraction to be complete, the set of critical points of an abstraction function shall contain either the stable or unstable manifold of the dynamical system.