WorldWideScience

Sample records for ground check circuit

  1. 30 CFR 75.902-1 - Maximum voltage ground check circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Maximum voltage ground check circuits. 75.902-1... Alternating Current Circuits § 75.902-1 Maximum voltage ground check circuits. The maximum voltage used for such ground check circuits shall not exceed 40 volts....

  2. 30 CFR 75.803-1 - Maximum voltage ground check circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Maximum voltage ground check circuits. 75.803-1 Section 75.803-1 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT OF LABOR COAL MINE... § 75.803-1 Maximum voltage ground check circuits. The maximum voltage used for ground check...

  3. 30 CFR 77.803 - Fail safe ground check circuits on high-voltage resistance grounded systems.

    Science.gov (United States)

    2010-07-01

    ... circuits on high-voltage resistance grounded systems. On and after September 30, 1971, all high-voltage, resistance grounded systems shall include a fail safe ground check circuit or other no less effective device... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Fail safe ground check circuits on...

  4. 30 CFR 77.902-1 - Fail safe ground check circuits; maximum voltage.

    Science.gov (United States)

    2010-07-01

    ... voltage. 77.902-1 Section 77.902-1 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT OF... OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits § 77.902-1 Fail safe ground check circuits; maximum voltage. The maximum voltage used for ground check circuits under §...

  5. 30 CFR 75.902 - Low- and medium-voltage ground check monitor circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Low- and medium-voltage ground check monitor... Medium-Voltage Alternating Current Circuits § 75.902 Low- and medium-voltage ground check monitor circuits. On or before September 30, 1970, low- and medium-voltage resistance grounded systems shall...

  6. 30 CFR 77.902 - Low- and medium-voltage ground check monitor circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Low- and medium-voltage ground check monitor... OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits § 77.902 Low- and medium-voltage ground check monitor circuits. On and after September 30, 1971, three-phase low- and...

  7. 30 CFR 77.803-1 - Fail safe ground check circuits; maximum voltage.

    Science.gov (United States)

    2010-07-01

    ... voltage. 77.803-1 Section 77.803-1 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT OF... OF UNDERGROUND COAL MINES Surface High-Voltage Distribution § 77.803-1 Fail safe ground check circuits; maximum voltage. The maximum voltage used for ground check circuits under § 77.803 shall...

  8. 30 CFR 75.803 - Fail safe ground check circuits on high-voltage resistance grounded systems.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Fail safe ground check circuits on high-voltage resistance grounded systems. 75.803 Section 75.803 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... High-Voltage Distribution § 75.803 Fail safe ground check circuits on high-voltage resistance...

  9. 30 CFR 77.902-3 - Attachment of ground conductors and ground check wires to equipment frames; use of separate...

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Attachment of ground conductors and ground check wires to equipment frames; use of separate connections. 77.902-3 Section 77.902-3 Mineral...-Voltage Alternating Current Circuits § 77.902-3 Attachment of ground conductors and ground check wires...

  10. Equivalence Checking of Hierarchical Combinational Circuits

    DEFF Research Database (Denmark)

    Williams, Poul Frederick; Hulgaard, Henrik; Andersen, Henrik Reif

    1999-01-01

    This paper presents a method for verifying that two hierarchical combinational circuits implement the same Boolean functions. The key new feature of the method is its ability to exploit the modularity of circuits to reuse results obtained from one part of the circuits in other parts. We demonstrate...... our method on large adder and multiplier circuits....

  11. Symbolic Model Checking for Sequential Circuit Verification

    Science.gov (United States)

    1993-07-15

    umI4A8807, and in paut by the Semiconductor Research Corporation under Contract 92cW~-294. The fourti author was supported by an AT&T Bell Laboamtories Ph.D...found late in the design phase of a digital circuit are a major cause of unexpected delays in realising the circuit in hardware. As a result, interest in...block diagram of the stack. It consists of an array of d cells, each cell consisting of a control part, a data part and a completion tree. The data

  12. Equivalence Checking of Combinational Circuits using Boolean Expression Diagrams

    DEFF Research Database (Denmark)

    Hulgaard, Henrik; Williams, Poul Frederick; Andersen, Henrik Reif

    1999-01-01

    The combinational logic-level equivalence problem is to determine whether two given combinational circuits implement the same Boolean function. This problem arises in a number of CAD applications, for example when checking the correctness of incremental design changes (performed either manually...... similarities between the two circuits that are compared. These properties make BEDs suitable for verifying the equivalence of combinational circuits. BEDs can be seen as an intermediate representation between circuits (which are compact) and OBDDs (which are canonical).Based on a large number of combinational...... or by a design automation tool).This paper introduces a data structure called Boolean Expression Diagrams (BEDs) and two algorithms for transforming a BED into a Reduced Ordered Binary Decision Diagram (OBDD). BEDs are capable of representing any Boolean circuit in linear space and can exploit structural...

  13. Grounding and shielding circuits and interference

    CERN Document Server

    Morrison, Ralph

    2016-01-01

    Applies basic field behavior in circuit design and demonstrates how it relates to grounding and shielding requirements and techniques in circuit design This book connects the fundamentals of electromagnetic theory to the problems of interference in all types of electronic design. The text covers power distribution in facilities, mixing of analog and digital circuitry, circuit board layout at high clock rates, and meeting radiation and susceptibility standards. The author examines the grounding and shielding requirements and techniques in circuit design and applies basic physics to circuit behavior. The sixth edition of this book has been updated with new material added throughout the chapters where appropriate. The presentation of the book has also been rearranged in order to reflect the current trends in the field.

  14. Ground Bounce Noise Reduction in Vlsi Circuits

    Directory of Open Access Journals (Sweden)

    Vipin Kumar Sharma

    2015-12-01

    Full Text Available : Scaling of devices in CMOS technology leads to increase in parameter like Ground bounce noise, Leakage current, average power dissipation and short channel effect. FinFET are the promising substitute to replace CMOS. Ground bounce noise is produced when power gating circuit goes from SLEEP to ACTIVE mode transition. FinFET based designs are compared with MOSFET based designs on basis of different parameter like Ground bounce noise, leakage current and average power dissipation. HSPICE is the software tool used for simulation and circuit design.

  15. Grounding devices of electrical equipment's installation and check to maintain

    Institute of Scientific and Technical Information of China (English)

    王鹏

    2009-01-01

    At this stage in real life,the incidents of electricity are increasing,the main reason is that the subjective sense is weak,non-importance,especially the operation and maintenance is more neglected,and even there is no sense in this area.In this paper,based on electrical equipment grounding system for use in practice,simple introdusing grounding device of electrical equipment's installation and maintenance checks.

  16. Grounded coplanar waveguide defected ground structure enabled mulitlayered passive circuits

    Science.gov (United States)

    Schlieter, Daniel Benjamin

    Passive circuits are essential to microwave and millimeter-wave (mm-wave) frequency design, especially as new commercial applications emerge for complementary metal-oxide semiconductor (CMOS) integrated circuits. However, it is challenging to design distributed passive circuits for CMOS due to the substrate loss and thin dielectric layers of the back-end-of-line (BEOL). Furthermore, distributed passive circuits need to be adapted for compactness and integration while overcoming these challenges and maintaining high performance. Grounded coplanar waveguide defected ground structures meet this need for compact and integrable passive circuits by utilizing the top and bottom ground planes of the transmission line to implement circuit elements. Defected ground structures (DGS) are distributed elements realized by etching specific patterns into the ground planes of transmission lines. These structures can be used in conjunction with the center conductor of planar transmission lines to reduce circuit size and/or improve performance. By implementing DGS in grounded coplanar waveguide (GCPW) multiple resonances and higher impedances can be achieved. The resonant-based GCPW DGS are more compact than their microstrip and CPW counterparts and fit well into the vertical technology of back-end-of-line CMOS. This research demonstrates up to 80% size reduction at 5.8GHz by realizing spiral-shaped DGS in GCPW and applying the resulting GCPW DGS unit cell to a dual-behavior band-pass filter. The filter has been scaled to 60GHz and realized in a 130nm CMOS process by using floating metal strips to reduce the impact of the lossy silicon substrate. The impedance-based GCPW DGS, called EG-GCPW, have up to a 20:1 impedance ratio on Rogers RT/DuroidRTM 5880 and an impedance ratio of 15:1 on a benzocyclobutene post-CMOS process. These high impedance ratios increased the power division ratio of an unequal Wilkinson power divider to 7:1 and reduced the size of a stepped impedance low

  17. Ground-based complex for checking the optical system

    Science.gov (United States)

    Grebenyuk, V.; Boreiko, V.; Dmitrotsa, A.; Gorbunov, N.; Khrenov, B.; Klimov, P.; Lavrova, M.; Popescu, E. M.; Sabirov, B.; Tkachenko, A.; Tkachev, L.; Volvach, A.; Yashin, I.

    2016-09-01

    The purpose TUS space experiment is to study cosmic rays of ultrahigh energies produced by extensive air showers from space. The concentrator is located on satellite, made in the form of the Fresnel mirror towards the earth's atmosphere, the focus of which is a photodetector. The angle of view of the mirror is ±4.5° that for a given height of the orbit corresponds to the area 80 × 80 km2 on ground. The ground complex consisting of a number of stations, to check the optical system of the experiment is created, (their location and the amount will be determined after the launch of the satellite based on its actual orbit).

  18. 30 CFR 75.902-4 - Attachment of ground conductors and ground check wires to equipment frames; use of separate...

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Attachment of ground conductors and ground check wires to equipment frames; use of separate connections. 75.902-4 Section 75.902-4 Mineral... § 75.902-4 Attachment of ground conductors and ground check wires to equipment frames; use of...

  19. Enhancing the Performance of Microstrip Circuit Using Defected Ground Structure

    OpenAIRE

    Devesh Kumar Mahor; Atal Verma; Veerendra Singh Jadaun; Pavan Kumar Sharma

    2012-01-01

    This paper focuses how to enhance the  performance  of  microstrip circuits using DGS. A DGS is a defected ground    structure where  the ground plane metal  of  a  microstrip  circuit  is intentially modified  to  enhance   performance.        Finally, the main application of DGS in microwave technology  fields  are summarized and the evolution trend of DGS is given.  

  20. A New Defected Ground Structure for Different Microstrip Circuit Applications

    Directory of Open Access Journals (Sweden)

    S. Das

    2007-04-01

    Full Text Available In this paper, a microstrip transmission line combined with a new U-headed dumb-bell defected ground structure (DGS is investigated. The proposed DGS of two U-shape slots connected by a thin transverse slot is placed in the ground plane of a microstrip line. A finite cutoff frequency and attenuation pole is observed and thus, the equivalent circuit of the DGS unit can be represented by a parallel LC resonant circuit in series with the transmission line. A two-cell DGS microstrip line yields a better lowpass filtering characteristics. The simulation is carried out by the MoM based IE3D software and in the experimental measurements a vector network analyzer is used. The effects of the transverse slot width and the distance between arms of the U-slot on the filter response curve are studied. This DGS is utilized for different microstrip circuit applications. The DGS is placed in the ground of a capacitive loaded microstrip line and a very low cutoff frequency is obtained. The DGS is adopted under the coupled lines of a parallel line coupler and an improvement in coupling coefficient is noticed. The proposed DGS is also incorporated in the ground plane under the feed lines and the coupled lines of a bandpass filter to improve separately the stopband and passband performances.

  1. Cross-check for completeness: exploring a novel use of Leximancer in a Grounded Theory study

    OpenAIRE

    Harwood, I.A.; Gapp, R.; Stewart, H.

    2015-01-01

    This paper investigates the potential for Leximancer software to actively support the Grounded Theory (GT) analyst in assessing the ‘completeness’ of their study. The case study takes an existing GT study and retrospectively analyzes the data with Leximancer. The Leximancer output showed encouraging similarities to the main themes emerging from the GT analysis; but not sufficiently at the selective coding level to justifiably claim a definitive cross-check for overall theoretical saturation. ...

  2. Logic Circuit Equivalence Checking Using Haar Spectral Coefficients and Partial BDDs

    Directory of Open Access Journals (Sweden)

    M. A. Thornton

    2002-01-01

    Full Text Available A probabilistic equivalence checking method is developed based on the use of partial Haar Spectral Diagrams (HSDs. Partial HSDs are defined and used to represent a subset of Haar spectral coefficients for two Boolean functions. The resulting coefficients are then used to compute and to iteratively refine the probability that two functions are equivalent. This problem has applications in both logic synthesis and verification. The method described here can be useful for the case where two candidate functions require extreme amounts of memory for a complete BDD representation. Experimental results are provided to validate the effectiveness of this approach.

  3. [Physical work capacity of electronics workers (the assembling and checking of printed circuit boards)].

    Science.gov (United States)

    Khadzhiolova, I; Mincheva, L; Nakasheva, E; Diankova, M

    1984-01-01

    The physical capacity for work of electronic workers that assembly and check up the printed was determined. The physical capacity for work of the female assembly-workers is assessed to be moderate and that of the operators-very good. A reduction of the maximum oxygen consumption with 0.375 ml/kg per year was established in the female assembly-workers, in the age group 21-40. The results obtained are discussed in connection with the unfavourable effect of the reduced motor activity during work, taken as base for the elaboration of measures for the improvement of the physical capacity for work.

  4. 30 CFR 77.802 - Protection of high-voltage circuits; neutral grounding resistors; disconnecting devices.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Protection of high-voltage circuits; neutral... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Surface High-Voltage Distribution § 77.802 Protection of high-voltage circuits; neutral grounding resistors; disconnecting devices. High-voltage...

  5. Expert System for the Tornado Ground-Based Check-Out System,

    Science.gov (United States)

    demonstrator, supporting the TORNADO check-out system, has been developed and tested. The expert system , called TORRES (TORNADO Radar Readiness Expert ...flight. The expert system is also able to exclude errors, that were generated by other systems capable of changing the state of the radar system and... System ), supports debriefing staff with various levels of experience. The scope of the error detection encompasses the TORNADO Terrain Following and

  6. Finite Ground Coplanar (FGC) Waveguide: Characteristics and Advantages Evaluated for Radiofrequency and Wireless Communication Circuits

    Science.gov (United States)

    Ponchak, George E.

    1999-01-01

    Researchers in NASA Lewis Research Center s Electron Device Technology Branch are developing transmission lines for radiofrequency and wireless circuits that are more efficient, smaller, and make lower cost circuits possible. Traditionally, radiofrequency and wireless circuits have employed a microstrip or coplanar waveguide to interconnect the various electrical elements that comprise a circuit. Although a coplanar waveguide (CPW) is widely viewed as better than a microstrip for most applications, it too has problems. To solve these problems, NASA Lewis and the University of Michigan developed a new version of a coplanar waveguide with electrically narrow ground planes. Through extensive numerical modeling and experimental measurements, we have characterized the propagation constant of the FGC waveguide, the lumped and distributed circuit elements integrated in the FGC waveguide, and the coupling between parallel transmission lines. Although the attenuation per unit length is higher for the FGC waveguide because of higher conductor loss, the attenuation is comparable when the ground plane width is twice the center conductor width as shown in the following graph. An upper limit to the line width is derived from observations that when the total line width is greater than ld/2, spurious resonances due to the parallel plate waveguide mode are established. Thus, the ground plane width must be less than ld/4 where ld is the wavelength in the dielectric. Since the center conductor width S is typically less than l/10 to maintain good transverse electromagnetic mode characteristics, it follows that a ground plane width of B = 2S would also be electrically narrow. Thus, we can now treat the ground strips of the FGC waveguide the same way that the center conductor is treated.

  7. Coupling Between Microstrip Lines With Finite Width Ground Plane Embedded in Thin Film Circuits

    Science.gov (United States)

    Ponchak, George E.; Dalton, Edan; Tentzeris, Manos M.; Papapolymerou, John

    2003-01-01

    Three-dimensional (3D) interconnects built upon multiple layers of polyimide are required for constructing 3D circuits on CMOS (low resistivity) Si wafers, GaAs, and ceramic substrates. Thin film microstrip lines (TFMS) with finite width ground planes embedded in the polyimide are often used. However, the closely spaced TFMS lines a r e susceptible to high levels of coupling, which degrades circuit performance. In this paper, Finite Difference Time Domain (FDTD) analysis and experimental measurements a r e used to show that the ground planes must be connected by via holes to reduce coupling in both the forward and backward directions. Furthermore, it is shown that coupled microstrip lines establish a slotline type mode between the two ground planes and a dielectric waveguide type mode, and that the via holes recommended here eliminate these two modes.

  8. A reliable ground bounce noise reduction technique for nanoscale CMOS circuits

    Science.gov (United States)

    Sharma, Vijay Kumar; Pattanaik, Manisha

    2015-11-01

    Power gating is the most effective method to reduce the standby leakage power by adding header/footer high-VTH sleep transistors between actual and virtual power/ground rails. When a power gating circuit transitions from sleep mode to active mode, a large instantaneous charge current flows through the sleep transistors. Ground bounce noise (GBN) is the high voltage fluctuation on real ground rail during sleep mode to active mode transitions of power gating circuits. GBN disturbs the logic states of internal nodes of circuits. A novel and reliable power gating structure is proposed in this article to reduce the problem of GBN. The proposed structure contains low-VTH transistors in place of high-VTH footer. The proposed power gating structure not only reduces the GBN but also improves other performance metrics. A large mitigation of leakage power in both modes eliminates the need of high-VTH transistors. A comprehensive and comparative evaluation of proposed technique is presented in this article for a chain of 5-CMOS inverters. The simulation results are compared to other well-known GBN reduction circuit techniques at 22 nm predictive technology model (PTM) bulk CMOS model using HSPICE tool. Robustness against process, voltage and temperature (PVT) variations is estimated through Monte-Carlo simulations.

  9. An Overview of Defected Ground Structure with Practical Application of Defected Ground Structure Bandpass Filter in Energy Harvester Circuit

    Directory of Open Access Journals (Sweden)

    M.T. Khan

    2014-08-01

    Full Text Available The aim of the study is to practically implement the Defected Ground Structure (DGS based microstrip bandpass filter in an energy harvester circuit. DGS is widely used to bring about an enhancement in the characteristics of microwave circuits. The study of DGS is derived from the concept of Photonic/electromagnetic Band Gap (PBG structures but it is easier to design and fabricate and has an easier equivalent LC resonator circuit. In this study, DGS has been reviewed from all aspects such as comparing it with PBG, discussing in detail its unit, its structure and property according to various shapes and designs and its several advantages in microstrip filters. Although DGS has various advantages in the area of microwave power amplifier, Wilkinson power divider, microwave antennas, couplers, etc., it is extensively used in the design of microwave filter to achieve stopband effects, slow-wave effects, frequency adjustment etc. Finally a DGS based bandpass filter working at 900 MHz has been designed, fabricated and tested for implementation in an Energy Harvester circuit.

  10. Research and design of LPC1768 data check and encryption circuit%LPC1768数据校验加密电路研究与设计

    Institute of Scientific and Technical Information of China (English)

    怀洋; 邵琼玲; 张志宝

    2014-01-01

    Integrity and safety of network communication information are more and more important for users. To explore check and encryption of network communication information by the way of circuit,the data check and encryption circuit,DC/DC circuit,TTL to USB conversion circuit,Ethernet communication circuit were designed,and USB interface communication program,checking data program,encrypting data program,Ethernet communication program were developed on the basis of LPC1768 chip,AMS1117 chip,CH340G chip and KSZ8041NL chip. Through the simulation of BD and communication informa⁃tion,the check,encryption and decryption of simulation information,as well as the testing of USB interface communication and network communication were accomplished. In the whole process,integrity and safety of the simulation information were en⁃sured. Therefore,the circuit has a certain practical application value.%网络通信信息的完整性和安全性对于用户来说越来越重要,为探究以硬件电路方式校验、加密网络通信信息,基于LPC1768芯片、AMS1117芯片、CH340G芯片和KSZ8041NL芯片,设计了数据校验加密电路、DC/DC电路、TTL转USB电路、以太网通信电路,开发了USB接口通信程序、数据校验程序、数据加密程序、以太网通信程序。以模拟北斗和通信信息为例,实现了对模拟信息的校验、加密、解密以及USB接口通信和网络通信测试工作。在整个过程中,保证了模拟信息的完整性、安全性,所设计电路具有一定的实际应用价值。

  11. Halo Observations from the Ground and from Space: Further Checks on the Sprite Polarity Paradox

    Science.gov (United States)

    Williams, E.; Kuo, C.; Bor, J.; Satori, G.; Newsome, R. T.; Boldi, R. A.; Downes, E.; Saba, M. M.; Taylor, M. J.; Chen, A. B.; Lyons, W. A.

    2009-12-01

    In continuing efforts to verify the hypothesis that halos produced by negative polarity ground flashes provide a resolution to the ‘sprite polarity paradox’ and are caused by the fast initial charge transfer in the lightning return stroke, additional halo observations are considered from the ground and from space. The ground-based observations include standard frame-rate video cameras, a high-time resolution (40 microsec)) photometer (called PIPER), the National Lightning Detection Network (NLDN), and ELF charge moment observations from Nagycenk Observatory in Hungary. The space-based observations are measurements from the limb-viewing ISUAL satellite. The observations in support of the hypothesis are: (1) charge moments of the same magnitude required for sprites are evident for ‘negative’ halos, (2) negative halos outnumber positive halos in both ISUAL and PIPER observations, (3) short (working hypothesis are (1) ISUAL peak lightning brightnesses are no larger for negative than for positive halo-parent lightning flashes, (2) NLDN peak currents for brighter ‘positive’ halos are not notably larger than for dimmer ‘negative’ flashes, and (3) ELF measurements of charge moments for negative flashes tend to be greater than for positive flashes. An additional similarity between ground- and space-based observations is the tendency for halos to be produced by single-stroke negative flashes, a distinct departure from the statistics of stroke multiplicity for all negative flashes with large peak current. The reason for the polarity asymmetry in the parent lightning flash, at the origin of the sprite polarity asymmetry, remains an open question.

  12. Problems and possibilities of astronauts—Ground communication content analysis validity check

    Science.gov (United States)

    Kanas, Nick; Gushin, Vadim; Yusupova, Anna

    The analysis of space crew's communication with mission control (MC) is the standard operational procedure of the psychological support group in the Institute for Biomedical problems, Russia. For more than 20 years it is used for the monitoring of the behavioral health of Russian crewmembers in space. We apply quantitative speech content analysis to reveal relationship dynamics within the group and between the crew and MC. We suggest that the features of individual communicative style reflect psychological emotional status and individuality of communicator, his coping strategy, fixed by POMS. Moreover, the appearance of certain psychological complexities would become apparent both in POMS profile change and in communicative style change. As a result of the validity check we arrived to a new objective method of crews' dynamic psychological monitoring. This method would not take any of astronauts' time, would not need any on-board equipment, and at the same time it is based on real performance in space, i.e. astronauts communication with MC.

  13. 30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. Trailing cables for medium-voltage circuits shall include grounding conductors, a ground check...

  14. Capital switching and the role of ground rent: 2 Switching between circuits and switching between submarkets

    OpenAIRE

    R J King

    1989-01-01

    In the first paper of this series of three, Harvey's 'circuits of capital' argument was discussed, and was linked first to ground rent theory, and second to forms of social change and crisis in advanced, Western-style economies. In the present paper these various theoretical insights are used to reflect upon the urban housing market in Melbourne from the 1930s to the 1980s. It is concluded (1) that average rent (average annual cost relative to wages), and thereby housing-related accumulation,...

  15. Global consistency check of AIRS and IASI total CO2 column concentrations using WDCGG ground-based measurements

    Science.gov (United States)

    Diao, Anyuan; Shu, Jiong; Song, Ci; Gao, Wei

    2017-03-01

    This article describes a global consistency check of CO2 satellite retrieval products from the Atmospheric Infrared Sounder (AIRS) and Infrared Atmospheric Sounding Interferometer (IASI) using statistical analysis and data from the World Data Centre for Greenhouse Gases (WDCGG). We use the correlation coefficient (r), relative difference (RD), root mean square errors (RMSE), and mean bias error (MBE) as evaluation indicators for this study. Statistical results show that a linear positive correlation between AIRS/IASI and WDCGG data occurs for most regions around the world. Temporal and spatial variations of these statistical quantities reflect obvious differences between satellite-derived and ground-based data based on geographic position, especially for stations near areas of intense human activities in the Northern Hemisphere. It is noteworthy that there appears to be a very weak correlation between AIRS/IASI data and ten groundbased observation stations in Europe, Asia, and North America. These results indicate that retrieval products from the two satellite-based instruments studied should be used with great caution.

  16. Near-Field Characterization of a Printed Circuit Board in the Presence of a Finite-sized Metallic Ground Plane

    DEFF Research Database (Denmark)

    Franek, Ondrej; Sørensen, Morten; Ebert, Hans

    2012-01-01

    Model of a generic printed circuit board (PCB) in a presence of a finite-sized metallic ground plane is introduced as a commonly occurring scenario of electronic module whose electromagnetic fields are disturbed by a nearby object. Finite-difference time-domain simulations are performed...

  17. Current-Mode CCII+ Based Oscillator Circuits using a Conventional and a Modified Wien-Bridge with All Capacitors Grounded

    Directory of Open Access Journals (Sweden)

    J. Bajer

    2011-04-01

    Full Text Available The paper deals with a pair of current-mode sine-wave oscillator circuits. Both these circuits are implemented using positive second-generation current conveyors (CCII+. The principle of the first oscillator is based on a conventional Wien-bridge network. However, this implementation suffers from the use of a floating capacitor, which can be unacceptable in the case of on-chip integration. This drawback is solved in the second variant via a slight modification of the Wien-bridge network, which then allows the use of all capacitors grounded. The modified circuit version was manufactured by means of the socalled diamond transistors, which play the role of CCII+ active building blocks. The circuit behavior was analyzed theoretically, with particular emphasis on the identification of real effects and their elimination, and subsequently verified experimentally. The experimental results are included in the paper.

  18. Residential magnetic field: Accounting for external sources and residential grounding circuits

    Energy Technology Data Exchange (ETDEWEB)

    Barrow, D.A.

    1989-06-14

    A project to characterize the sources of magnetic fields in residential locations was established as part of Ontario Hydro's program to assess the risks, if any, posed by fields due to the electric power system. In this report, a simple model for the strength of the magnetic field at 60 Hz found inside houses is developed to account for the house wiring, and for sources external to the house. In the model the house wiring is reduced to a single circuit carrying the net current on the service drop to the house and the service grounding current. All sources external to the house are combined and represented as a single ambient field assumed to be spatially uniform throughout the volume of the house. This model and a measurmement procedure were tested on 5 houses in locations inside the houses remote from appliances, which were not included in the model. In the main, good agreement was found between actual measured field strengths and those predicted by the model. 4 refs., 10 figs., 6 tabs.

  19. Evaluation of the performance of the IQ-Check kits and the USDA Microbiology Laboratory Guidebook methods for detection of Shiga toxin-producing Escherichia coli (STEC) and STEC and Salmonella simultaneously in ground beef.

    Science.gov (United States)

    Baranzoni, G M; Fratamico, P M; Boccia, F; Bagi, L K; Kim, G-H; Anastasio, A; Pepe, T

    2017-03-01

    To evaluate the performance of the IQ-Check kits and the USDA Microbiology Laboratory Guidebook (MLG) methods for detection of the top seven Shiga toxin-producing Escherichia coli (STEC) (O157:H7, O26, O45, O103, O111, O121 and O145) in ground beef and both STEC and Salmonella in co-inoculated samples. Ground beef samples inoculated with ~10 CFU of STEC or both STEC and Salmonella Typhimurium were stored at 4°C for 72 h, followed by screening with the IQ-Check and BAX System kit (MLG) methods that employ different enrichment media. STEC and S. Typhimurium were detected after 12 and 18 h and their presence was confirmed by colony isolation. Both methods were able to detect STEC in ground beef after 12 h of enrichment in samples inoculated with low levels of the pathogen. STEC and S. Typhimurium can be detected and isolated in co-inoculated ground beef samples. The IQ-Check methods are comparable to the MLG methods for detection of STEC and simultaneous detection of STEC and S. Typhimurium in seeded ground beef after a short enrichment time, thus the IQ-Check method can be useful for the food industry for rapid detection of these pathogens. Published 2016. This article has been contributed to by US Government employees and their work is in the public domain in the USA.

  20. Guidelines of the Design of Electropyrotechnic Firing Circuit for Unmanned Flight and Ground Test Projects

    Science.gov (United States)

    Gonzalez, Guillermo A.; Lucy, Melvin H.; Massie, Jeffrey J.

    2013-01-01

    The NASA Langley Research Center, Engineering Directorate, Electronic System Branch, is responsible for providing pyrotechnic support capabilities to Langley Research Center unmanned flight and ground test projects. These capabilities include device selection, procurement, testing, problem solving, firing system design, fabrication and testing; ground support equipment design, fabrication and testing; checkout procedures and procedure?s training to pyro technicians. This technical memorandum will serve as a guideline for the design, fabrication and testing of electropyrotechnic firing systems. The guidelines will discuss the entire process beginning with requirements definition and ending with development and execution.

  1. Evaluation of the performance of the IQ-check kits and the USDA microbiology laboratory guidebook methods for detection of Shiga Toxin-Producing E. coli (STEC) and STEC and Salmonella simultaneously in ground beef

    Science.gov (United States)

    Aims: To evaluate the performance of the IQ-Check kits and the USDA Microbiology Laboratory Guidebook (MLG) methods for detection of the top 7 Shiga toxin-producing E. coli (STEC) (O157:H7, O26, O45, O103, O111, O121, and O145) in ground beef and both STEC and Salmonella in co-inoculated samples. M...

  2. Check Verbraucherpolitik und Verbraucherbeteiligung

    DEFF Research Database (Denmark)

    Hagen, Kornelia; Micklitz, Hans-W.; Oehler, Andreas;

    2013-01-01

    The paper discusses the opportunities for an empirically grounded decision support system as an instrument for independent and scientifically based consumer policy consulting. To date, consumer policy is dominated by the information paradigm and the leitbild of the rational, sovereign...... and information-seeking consumer. Yet, both everyday practice and research in behavioural economics show that this view lacks empirical ground. In fact, there are different consumer types and different forms of rationalities at work. Effective consumer policy making should be based on the empirically revealed...... an empirically based “Check Consumer Policy and Consumer Participation” as a systematic decision and evaluation tool for policy makers. This check should be independent from the government and should be grounded on an empirical view of the consumer. Consumer policy tools should be tested with real consumers...

  3. Dry Etching of GaAs to Fabricate Via-Hole Grounds in Monolithic Microwave Integrated Circuits

    Directory of Open Access Journals (Sweden)

    D.S. Rawal

    2009-07-01

    Full Text Available This study investigates the dry etching of 60 mm dia, 200 mm deep holes for fabrication of through substrate via holes for grounding monolithic microwave integrated circuits (MMICs, on 3-inch dia semiinsulating GaAs wafer using RIE and ICP processes with CFC and non-CFC gas chemistry, respectively. The effect of various process parameters on GaAs etch rate and resultant etch profile was investigated. Two kinds of masks, photoresist and Ni, were used to etch GaAs and performance was compared by investigating effect on etch rate, etch depth, etch profile, and surface morphology. The etch profile, etch depth, and surface morphology of as-etched samples were characterised by scanning electron microscopy. The desired 200 mm deep strawberry profile was obtained at 40 mTorr for both RIE and ICP processes with an etch rate of ~1.3 mm/min and ~4 mm/min respectively. Ni metal mask was used for RIE process due to poor photoresist selectivity, whereas ICP process utilised photoresist as mask. The vias were then metallised by depositing a thin seed layer of Ti/Au (1000 Å using radio frequency sputtering and Au (~5 mm electroplated to connect the frontside pad and back side ground plane. The typical parasitic inductance offered by these via for RIE and ICP processes was ~76 pH and 83 pH respectively, which is well within the acceptable limits. The developed process was finally integrated to in-house MMIC production line.Defence Science Journal, 2009, 59(4, pp.363-370, DOI:http://dx.doi.org/10.14429/dsj.59.1535

  4. New methods of concurrent checking

    CERN Document Server

    Goessel, Michael; Sogomonyan, Egor; Marienfeld, Daniel

    2008-01-01

    Written by a team of two leading experts and two very successful young former PhD students, New Methods of Concurrent Checking describes new methods of concurrent checking, such as partial duplication, use of output dependencies, complementary circuits, self-dual parity, self-dual duplication and others. A special chapter demonstrates how the new general methods of concurrent checking can be more specifically applied to regular structures to obtain optimum results. This is exemplified for all types of adders up to 64 bits with a level of detail never before presented in the literature. The cle

  5. Copper extraction from coarsely ground printed circuit boards using moderate thermophilic bacteria in a rotating-drum reactor

    Energy Technology Data Exchange (ETDEWEB)

    Rodrigues, Michael L.M., E-mail: mitchel.marques@yahoo.com.br [Bio& Hydrometallurgy Laboratory, Department of Metallurgical and Materials Engineering, Universidade Federal de Ouro Preto, Campus Morro do Cruzeiro, Ouro Preto, MG 35400-000 (Brazil); Leão, Versiane A., E-mail: versiane@demet.em.ufop.br [Bio& Hydrometallurgy Laboratory, Department of Metallurgical and Materials Engineering, Universidade Federal de Ouro Preto, Campus Morro do Cruzeiro, Ouro Preto, MG 35400-000 (Brazil); Gomes, Otavio [Centre for Mineral Technology – CETEM, Av Pedro Calmon, 900, 21941-908 Rio de Janeiro (Brazil); Lambert, Fanny; Bastin, David; Gaydardzhiev, Stoyan [Mineral Processing and Recycling, University of Liege, SartTilman, 4000 Liege (Belgium)

    2015-07-15

    Highlights: • Copper bioleaching from PCB (20 mm) by moderate thermophiles was demonstrated. • Larger PCB sheets enable a cost reduction due to the elimination of fine grinding. • Crushing generated cracks in PCB increasing the copper extraction. • A pre-treatment step was necessary to remove the lacquer coating. • High copper extractions (85%) were possible with pulp density of up to 25.0 g/L. - Abstract: The current work reports on a new approach for copper bioleaching from Printed Circuit Board (PCB) by moderate thermophiles in a rotating-drum reactor. Initially leaching of PCB was carried out in shake flasks to assess the effects of particle size (−208 μm + 147 μm), ferrous iron concentration (1.25–10.0 g/L) and pH (1.5–2.5) on copper leaching using mesophile and moderate thermophile microorganisms. Only at a relatively low solid content (10.0 g/L) complete copper extraction was achieved from the particle size investigated. Conversely, high copper extractions were possible from coarse-ground PCB (20 mm-long) working with increased solids concentration (up to 25.0 g/L). Because there was as the faster leaching kinetics at 50 °C Sulfobacillus thermosulfidooxidans was selected for experiments in a rotating-drum reactor with the coarser-sized PCB sheets. Under optimal conditions, copper extraction reached 85%, in 8 days and microscopic observations by SEM–EDS of the on non-leached and leached material suggested that metal dissolution from the internal layers was restricted by the fact that metal surface was not entirely available and accessible for the solution in the case of the 20 mm-size sheets.

  6. GATING CIRCUITS

    Science.gov (United States)

    Merrill, L.C.

    1958-10-14

    Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

  7. Detecting the single line to ground short circuit fault in the submarine’s power system using the artificial neural network

    Directory of Open Access Journals (Sweden)

    Behniafar Ali

    2013-01-01

    Full Text Available The electric marine instruments are newly inserted in the trade and industry, for which the existence of an equipped and reliable power system is necessitated. One of the features of such a power system is that it cannot have an earth system causing the protection relays not to be able to detect the single line to ground short circuit fault. While on the other hand, the occurrence of another similar fault at the same time can lead to the double line fault and thereby the tripping of relays and shortening of vital loads. This in turn endangers the personals' security and causes the loss of military plans. From the above considerations, it is inferred that detecting the single line to ground fault in the marine instruments is of a special importance. In this way, this paper intends to detect the single line to ground fault in the power systems of the marine instruments using the wavelet transform and Multi-Layer Perceptron (MLP neural network. In the numerical analysis, several different types of short circuit faults are simulated on several marine power systems and the proposed approach is applied to detect the single line to ground fault. The results are of a high quality and preciseness and perfectly demonstrate the effectiveness of the proposed approach.

  8. Piezoelectric drive circuit

    Science.gov (United States)

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  9. Get Your Cholesterol Checked

    Science.gov (United States)

    ... Checked Print This Topic En español Get Your Cholesterol Checked Browse Sections The Basics Overview Cholesterol Test ... How often do I need to get my cholesterol checked? The general recommendation is to get your ...

  10. The circuit designer's companion

    CERN Document Server

    Williams, Tim

    2013-01-01

    The Circuit Designer's Companion covers the theoretical aspects and practices in analogue and digital circuit design. Electronic circuit design involves designing a circuit that will fulfill its specified function and designing the same circuit so that every production model of it will fulfill its specified function, and no other undesired and unspecified function.This book is composed of nine chapters and starts with a review of the concept of grounding, wiring, and printed circuits. The subsequent chapters deal with the passive and active components of circuitry design. These topics are foll

  11. Regular health checks

    DEFF Research Database (Denmark)

    Grønhøj Larsen, Christian; Jørgensen, Karsten Juhl; Gøtzsche, Peter C

    2012-01-01

    To investigate whether Danish providers of general health checks present a balanced account of possible benefits and harms on their websites and whether the health checks are evidence-based.......To investigate whether Danish providers of general health checks present a balanced account of possible benefits and harms on their websites and whether the health checks are evidence-based....

  12. Automating checks of plan check automation.

    Science.gov (United States)

    Halabi, Tarek; Lu, Hsiao-Ming

    2014-07-08

    While a few physicists have designed new plan check automation solutions for their clinics, fewer, if any, managed to adapt existing solutions. As complex and varied as the systems they check, these programs must gain the full confidence of those who would run them on countless patient plans. The present automation effort, planCheck, therefore focuses on versatility and ease of implementation and verification. To demonstrate this, we apply planCheck to proton gantry, stereotactic proton gantry, stereotactic proton fixed beam (STAR), and IMRT treatments.

  13. Special requisites for ground switch operation of parallel circuits of strongly connected transmission lines; Requisitos especiais de manobra para chaves de terra de circuitos paralelos de linhas de transmissao fortemente acoplados

    Energy Technology Data Exchange (ETDEWEB)

    Amon Filho, J.; Kastrup Filho, O.; Franca, W.J. [FURNAS, Rio de Janeiro, RJ (Brazil)

    1993-12-31

    This work aims to present results of a qualitative and quantitative analysis of the problem concerning the ground switch turn off operation of transmission lines parallel circuits involving computer simulations and field tests, being such tests compared to standards and constant criteria of the technical specifications of such ground switches. The so far achieved conclusions indicate that the arc resistors installed in the ground switches have been satisfactory solving the problem of the interruption of induced currents by those ground switches. 7 refs., 2 figs., 3 tabs.

  14. Production mask composition checking flow

    Science.gov (United States)

    Ma, Shou-Yuan; Yang, Chuen-Huei; Tsai, Joe; Wang, Alice; Lin, Roger; Lee, Rachel; Deng, Erwin; Lin, Ling-Chieh; Liao, Hung-Yueh; Tsai, Jenny; Bowhill, Amanda; Vu, Hien; Russell, Gordon

    2016-05-01

    The mask composition checking flow is an evolution of the traditional mask rule check (MRC). In order to differentiate the flow from MRC, we call it Mask Data Correctness Check (MDCC). The mask house does MRC only to identify process limitations including writing, etching, metrology, etc. There still exist many potential errors that could occur when the frame, main circuit and dummies all together form a whole reticle. The MDCC flow combines the design rule check (DRC) and MRC concepts to adapt to the complex patterns in today's wafer production technologies. Although photomask data has unique characteristics, the MRC tool in Calibre® MDP can easily achieve mask composition by using the Extended MEBES job deck (EJB) format. In EJB format, we can customize the combination of any input layers in an IC design layout format, such as OASIS. Calibre MDP provides section-based processing for many standard verification rule format (SVRF) commands that support DRC-like checks on mask data. Integrating DRC-like checking with EJB for layer composition, we actually perform reticle-level DRC, which is the essence of MDCC. The flow also provides an early review environment before the photomask pattern files are available. Furthermore, to incorporate the MDCC in our production flow, runtime is one of the most important indexes we consider. When the MDCC is included in the tape-out flow, the runtime impact is very limited. Calibre, with its multi-threaded processes and good scalability, is the key to achieving acceptable runtime. In this paper, we present real case runtime data for 28nm and 14nm technology nodes, and prove the practicability of placing MDCC into mass production.

  15. Direct Model Checking Matrix Algorithm

    Institute of Scientific and Technical Information of China (English)

    Zhi-Hong Tao; Hans Kleine Büning; Li-Fu Wang

    2006-01-01

    During the last decade, Model Checking has proven its efficacy and power in circuit design, network protocol analysis and bug hunting. Recent research on automatic verification has shown that no single model-checking technique has the edge over all others in all application areas. So, it is very difficult to determine which technique is the most suitable for a given model. It is thus sensible to apply different techniques to the same model. However, this is a very tedious and time-consuming task, for each algorithm uses its own description language. Applying Model Checking in software design and verification has been proved very difficult. Software architectures (SA) are engineering artifacts that provide high-level and abstract descriptions of complex software systems. In this paper a Direct Model Checking (DMC) method based on Kripke Structure and Matrix Algorithm is provided. Combined and integrated with domain specific software architecture description languages (ADLs), DMC can be used for computing consistency and other critical properties.

  16. Checking Java Programs

    CERN Document Server

    Darwin, Ian

    2007-01-01

    This Short Cut tells you about tools that will improve the quality of your Java code, using checking above and beyond what the standard tools do, including: Using javac options, JUnit and assertions Making your IDE work harder Checking your source code with PMD Checking your compiled code (.class files) with FindBugs Checking your program's run-time behavior with Java PathFinder

  17. A Novel Nanometric Reversible Signed Divider with Overflow Checking Capability

    Directory of Open Access Journals (Sweden)

    Faraz Dastan

    2012-03-01

    Full Text Available One of the best approaches for designing future computers is that we use reversible logic. Reversible logic circuits have lower power consumption than the common circuits, used in computers nowadays. In this study we propose a new reversible division circuit. This reversible division circuit is signed divider and has an overflow checking capability. Among the designed and proposed reversible division circuits, our proposed division circuit is the first reversible signed divider with overflow checking capability which has been designed. In this circuit we use some reversible components like reversible parallel adder, reversible left-shift register, reversible multiplexer, reversible n-bit register and reversible n-bit register with parallel load line. In this paper all the scales are in the nanometric area.

  18. Checking a printed board

    CERN Multimedia

    1977-01-01

    An 'Interactive Printed Circuit Board Design System' has been developed by a company in a Member-State. Printed circuits are now produced at the SB's surface treatment workshop using a digitized photo-plotter.

  19. Check dams effects on sediment transport in steep slope flume

    Science.gov (United States)

    Piton, Guillaume; Recking, Alain

    2014-05-01

    Depending on many influences (geology, relief, hydrology, land use, etc.) some mountainous watershed are prone to cause casualties and facilities damages. Large amounts of sediments episodically released by torrents are often the biggest problem in torrent related hazard mitigation. Series of transversal structures as check dams and ground sills are often used in the panel of risk mitigation technics. A large literature exits on check dams and it mainly concerns engineering design, e.g. toe scouring, stability stress diagram, changes in upper and lower reaches equilibrium slopes. Check dams in steep slope rivers constitute fixed points in the bed profile and prevent general bed incision. However their influence on sediment transport once they are filled is not yet clear. Two flume test campaigns, synthetize in Table 1, were performed to investigate this question: Table 1 : experiment plan Run (duration) Ref1 (50h)CD1a (30h)CD1b (30h)Ref2 (92h)CD2 (18h) Solid feeding discharge (g.s^-1) 44 44 44 60 60 Number of check dams none 1 3 none 2 A nearly 5-m-long, 10-cm-wide and 12%-steep flume was used. The water discharge was set to 0,55 l/s in all runs. A mixture of poorly sorted natural sediments with diameters between 0.8 and 40 mm was used. An open solid-discharge-feeding circuit kept the inlet sediment flux constant during all experiments. As both feeding rates did not present variation, changes in outlet solid discharge were assumed to be due to bed variations in the bed storage. We observed strong fluctuations of solid flux and slope in each reaches of all runs between: (i) steep aggradating armoured bed and (ii) less steep and finer bed releasing bedload sheets during erosion events and inducing bedload pulses. All experiments showed consistent results: transported volume associated with erosion event decreased with the length between two subsequent check dams. Solid transversal structures shorten the upstream erosion-propagation and avoid downstream change in the

  20. Symbolic model checking APSL

    Institute of Scientific and Technical Information of China (English)

    Wanwei LIU; Ji WANG; Huowang CHEN; Xiaodong MA; Zhaofei WANG

    2009-01-01

    Property specification language (PSL) is a specification language which has been accepted as an industrial standard. In PSL, SEREs are used as additional formula constructs. In this paper, we present a variant of PSL, namely APSL, which replaces SEREs with finite automata. APSL and PSL are of the exactly same expressiveness. Then, we extend the LTL symbolic model checking algorithm to that of APSL, and then present a tableau based APSL verification technique, which can be easily implemented via the BDD based symbolic approach. Moreover, we implement an extension of NuSMV, and this adapted version supports symbolic model checking of APSL. Experimental results show that this variant of PSL can be efficiently verified. Henceforth, symbolic model checking PSL can be carried out by a transformation from PSL to APSL and symbolic model checking APSL.

  1. Goat production check list

    DEFF Research Database (Denmark)

    Henriksen, Jørgen; Nielsen, Mette Benedicte Olaf; Madsen, Jørgen

    2009-01-01

    This check list, financed by DanChurchAid, highlights all issues should be carefully investigated before investing in distribution of goats and in interventions to assist poor rural communities to improve their livelihood through goat production.......This check list, financed by DanChurchAid, highlights all issues should be carefully investigated before investing in distribution of goats and in interventions to assist poor rural communities to improve their livelihood through goat production....

  2. Goat production check list

    DEFF Research Database (Denmark)

    Henriksen, Jørgen; Nielsen, Mette Benedicte Olaf; Madsen, Jørgen

    2009-01-01

    This check list, financed by DanChurchAid, highlights all issues should be carefully investigated before investing in distribution of goats and in interventions to assist poor rural communities to improve their livelihood through goat production.......This check list, financed by DanChurchAid, highlights all issues should be carefully investigated before investing in distribution of goats and in interventions to assist poor rural communities to improve their livelihood through goat production....

  3. Parallel Software Model Checking

    Science.gov (United States)

    2015-01-08

    JAN 2015 2. REPORT TYPE N/A 3. DATES COVERED 4. TITLE AND SUBTITLE Parallel Software Model Checking 5a. CONTRACT NUMBER 5b. GRANT NUMBER...AND ADDRESS(ES) Software Engineering Institute Carnegie Mellon University Pittsburgh, PA 15213 8. PERFORMING ORGANIZATION REPORT NUMBER 9...3: ∧ ≥ 10 ∧ ≠ 10 ⇒ : Parallel Software Model Checking Team Members Sagar Chaki, Arie Gurfinkel

  4. Algebraic circuits

    CERN Document Server

    Lloris Ruiz, Antonio; Parrilla Roure, Luis; García Ríos, Antonio

    2014-01-01

    This book presents a complete and accurate study of algebraic circuits, digital circuits whose performance can be associated with any algebraic structure. The authors distinguish between basic algebraic circuits, such as Linear Feedback Shift Registers (LFSRs) and cellular automata, and algebraic circuits, such as finite fields or Galois fields. The book includes a comprehensive review of representation systems, of arithmetic circuits implementing basic and more complex operations, and of the residue number systems (RNS). It presents a study of basic algebraic circuits such as LFSRs and cellular automata as well as a study of circuits related to Galois fields, including two real cryptographic applications of Galois fields.

  5. A PSL Bounded Model Checking Method

    Institute of Scientific and Technical Information of China (English)

    YU Lei; ZHAO Zongtao

    2012-01-01

    SAT-based bounded model checking (BMC) is introduced as an important complementary technique to OBDD-based symbolic model checking, and is an efficient verification method for parallel and reactive systems. However, until now the properties verified by bounded model checking are very finite. Temporal logic PSL is a property specification language (IEEE-1850) describing parallel systems and is divided into two parts, i.e. the linear time logic FL and the branch time logic OBE. In this paper, the specification checked by BMC is extended to PSL and its algorithm is also proposed. Firstly, define the bounded semantics of PSL, and then reduce the bounded semantics into SAT by translating PSL specification formula and the state transition relation of the system to the propositional formula A and B, respectively. Finally, verify the satisfiability of the conjunction propositional formula of A and B. The algorithm results in the translation of the existential model checking of the temporal logic PSL into the satisfiability problem of propositional formula. An example of a queue controlling circuit is used to interpret detailedly the executing procedure of the algorithm.

  6. CMM Interim Check (U)

    Energy Technology Data Exchange (ETDEWEB)

    Montano, Joshua Daniel [Los Alamos National Lab. (LANL), Los Alamos, NM (United States)

    2015-03-23

    Coordinate Measuring Machines (CMM) are widely used in industry, throughout the Nuclear Weapons Complex and at Los Alamos National Laboratory (LANL) to verify part conformance to design definition. Calibration cycles for CMMs at LANL are predominantly one year in length. Unfortunately, several nonconformance reports have been generated to document the discovery of a certified machine found out of tolerance during a calibration closeout. In an effort to reduce risk to product quality two solutions were proposed – shorten the calibration cycle which could be costly, or perform an interim check to monitor the machine’s performance between cycles. The CMM interim check discussed makes use of Renishaw’s Machine Checking Gauge. This off-the-shelf product simulates a large sphere within a CMM’s measurement volume and allows for error estimation. Data was gathered, analyzed, and simulated from seven machines in seventeen different configurations to create statistical process control run charts for on-the-floor monitoring.

  7. 30 CFR 56.12053 - Circuits powered from trolley wires.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuits powered from trolley wires. 56.12053... § 56.12053 Circuits powered from trolley wires. Ground wires for lighting circuits powered from trolley wires shall be connected securely to the ground-return circuit....

  8. 30 CFR 57.12053 - Circuits powered from trolley wires.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuits powered from trolley wires. 57.12053... Electricity Surface and Underground § 57.12053 Circuits powered from trolley wires. Ground wires for lighting circuits powered from trolley wires shall be connected securely to the ground return circuit. Surface Only...

  9. Interest Check List.

    Science.gov (United States)

    Bureau of Employment Security (DOL), Washington, DC.

    The original edition of the Department of Labor Interest Check List aims at helping students decide what kinds of work they would like and lists activities that are found in a broad range of industries and occupations. The student is advised to read each of approximately 175 items and indicate how he feels about the activity described by placing a…

  10. Checking BEBC superconducting magnet

    CERN Multimedia

    1974-01-01

    The superconducting coils of the magnet for the 3.7 m Big European Bubble Chamber (BEBC) had to be checked, see Annual Report 1974, p. 60. The photo shows a dismantled pancake. By December 1974 the magnet reached again the field design value of 3.5 T.

  11. Device, system and method for a sensing electrical circuit

    Science.gov (United States)

    Vranish, John M. (Inventor)

    2009-01-01

    The invention relates to a driven ground electrical circuit. A driven ground is a current-measuring ground termination to an electrical circuit with the current measured as a vector with amplification. The driven ground module may include an electric potential source V.sub.S driving an electric current through an impedance (load Z) to a driven ground. Voltage from the source V.sub.S excites the minus terminal of an operational amplifier inside the driven ground which, in turn, may react by generating an equal and opposite voltage to drive the net potential to approximately zero (effectively ground). A driven ground may also be a means of passing information via the current passing through one grounded circuit to another electronic circuit as input. It may ground one circuit, amplify the information carried in its current and pass this information on as input to the next circuit.

  12. Partial model checking

    DEFF Research Database (Denmark)

    Andersen, Henrik Reif

    1995-01-01

    A major obstacle in applying finite-state model checking to the verification of large systems is the combinatorial explosion of the state space arising when many loosely coupled parallel processes are considered. The problem also known as the state-explosion problem has been attacked from various...... sides. This paper presents a new approach based on partial model checking where parts of the concurrent system are gradually removed while transforming the specification accordingly. When the intermediate specifications constructed in this manner can be kept small, the state-explosion problem is avoided....... Experimental results with a prototype implemented in Standard ML, shows that for Milner's Scheduler-an often used benchmark-this approach improves on the published results on binary decision diagrams and is comparable to results obtained using generalized decision diagrams. Specifications are expressed...

  13. Model Checking Feature Interactions

    DEFF Research Database (Denmark)

    Le Guilly, Thibaut; Olsen, Petur; Pedersen, Thomas;

    2015-01-01

    This paper presents an offline approach to analyzing feature interactions in embedded systems. The approach consists of a systematic process to gather the necessary information about system components and their models. The model is first specified in terms of predicates, before being refined to t...... to timed automata. The consistency of the model is verified at different development stages, and the correct linkage between the predicates and their semantic model is checked. The approach is illustrated on a use case from home automation....

  14. Check, check, double check: checking the autopilot causes distrust : Experimental studies on the effects of compulsive perseveration

    NARCIS (Netherlands)

    Dek, E.C.P.

    2015-01-01

    Obsessive-compulsive disorder (OCD) is characterized by persistent doubt. The majority of patients with OCD engage in repeated checking to reduce these feelings of uncertainty. However, numerous studies demonstrated that repetitive behavior ironically increases uncertainty: perseverative checking in

  15. Instruments used to measure or check {alpha}, {beta}, {gamma} activity and neutron emission in the course of processing ore or irradiated fuel; Appareils de mesure ou de controle {alpha}, {beta}, {gamma}, n, des circuits des usines de traitement du minerai ou du combustible irradie

    Energy Technology Data Exchange (ETDEWEB)

    Blanc, A.; Brunet, M.; Kermagoret, M.; Labeyrie, J.; Roux, G.; Vasseur, J.; Weil, J. [Commissariat a l' Energie Atomique, Saclay (France). Centre d' Etudes Nucleaires

    1959-07-01

    One of the methods checking ores in the course of treatment is the rapid quantitative determination of thorium. This measurement is carried out by means of a scintillation instrument which shows the {beta} and {alpha} coincidences of ThC and ThC'. The treatment of irradiated fuel is accompanied by a large number of radioactive checks relative to the performance of the fixation and elution operations of uranium in the ion exchangers, to the concentration of radioactivity of effluent sent from the plant into watercourses. The operations of fixation and elution of the uranium are checked automatically by an instrument which takes a sample of 5 cm{sup 3} of solution, evaporates it and measures its activity every 10 or 20 minutes. Plutonium concentrations are measured: - in the presence of strong {beta} {gamma} activities, by means of rotating cylinder detectors; - in the presence of weak {beta} {gamma} activities, by means of {alpha} detectors scanning a constant level liquid surface; - by means of fission chambers relatively insensitive to {gamma}. Fission product concentrations are measured by chambers, counters or scintillators, according to the amount of {gamma} activity present. Finally, the activity of effluent to be emptied into watercourses is checked by means of a scintillation instrument, which measures the {alpha} activity on the one hand, and on the other hand the {beta} {gamma} activity of residue from a 100 cm{sup 3} sample taken and evaporated in 20 minutes. (author) [French] Parmi les controles relatifs au minerai en cours de traitement, figure le dosage rapide de thorium. Cette mesure est realisee au moyen d'un appareillage a scintillation qui met en evidence la coincidence des emissions {beta} et {alpha} du ThC et du ThC'. Le traitement des combustibles irradies s'accompagne d'un grand nombre de controles radioactifs portant sur le fonctionnement des operations de fixation et d'elution de l'uranium dans les

  16. Equivalent circuit models for ac impedance data analysis

    Science.gov (United States)

    Danford, M. D.

    1990-01-01

    A least-squares fitting routine has been developed for the analysis of ac impedance data. It has been determined that the checking of the derived equations for a particular circuit with a commercially available electronics circuit program is essential. As a result of the investigation described, three equivalent circuit models were selected for use in the analysis of ac impedance data.

  17. Conditional Model Checking

    CERN Document Server

    Beyer, Dirk; Keremoglu, M Erkan; Wendler, Philipp

    2011-01-01

    Software model checking, as an undecidable problem, has three possible outcomes: (1) the program satisfies the specification, (2) the program does not satisfy the specification, and (3) the model checker fails. The third outcome usually manifests itself in a space-out, time-out, or one component of the verification tool giving up; in all of these failing cases, significant computation is performed by the verification tool before the failure, but no result is reported. We propose to reformulate the model-checking problem as follows, in order to have the verification tool report a summary of the performed work even in case of failure: given a program and a specification, the model checker returns a condition P ---usually a state predicate--- such that the program satisfies the specification under the condition P ---that is, as long as the program does not leave states in which P is satisfied. We are of course interested in model checkers that return conditions P that are as weak as possible. Instead of outcome ...

  18. Strategy optimization for mask rule check in wafer fab

    Science.gov (United States)

    Yang, Chuen Huei; Lin, Shaina; Lin, Roger; Wang, Alice; Lee, Rachel; Deng, Erwin

    2015-07-01

    Photolithography process is getting more and more sophisticated for wafer production following Moore's law. Therefore, for wafer fab, consolidated and close cooperation with mask house is a key to achieve silicon wafer success. However, generally speaking, it is not easy to preserve such partnership because many engineering efforts and frequent communication are indispensable. The inattentive connection is obvious in mask rule check (MRC). Mask houses will do their own MRC at job deck stage, but the checking is only for identification of mask process limitation including writing, etching, inspection, metrology, etc. No further checking in terms of wafer process concerned mask data errors will be implemented after data files of whole mask are composed in mask house. There are still many potential data errors even post-OPC verification has been done for main circuits. What mentioned here are the kinds of errors which will only occur as main circuits combined with frame and dummy patterns to form whole reticle. Therefore, strategy optimization is on-going in UMC to evaluate MRC especially for wafer fab concerned errors. The prerequisite is that no impact on mask delivery cycle time even adding this extra checking. A full-mask checking based on job deck in gds or oasis format is necessary in order to secure acceptable run time. Form of the summarized error report generated by this checking is also crucial because user friendly interface will shorten engineers' judgment time to release mask for writing. This paper will survey the key factors of MRC in wafer fab.

  19. Bounded Model Checking of CTL

    Institute of Scientific and Technical Information of China (English)

    Zhi-Hong Tao; Cong-Hua Zhou; Zhong Chen; Li-Fu Wang

    2007-01-01

    Bounded Model Checking has been recently introduced as an efficient verification method for reactive systems.This technique reduces model checking of linear temporal logic to propositional satisfiability.In this paper we first present how quantified Boolean decision procedures can replace BDDs.We introduce a bounded model checking procedure for temporal logic CTL* which reduces model checking to the satisfiability of quantified Boolean formulas.Our new technique avoids the space blow up of BDDs, and extends the concept of bounded model checking.

  20. Checking Security Policy Compliance

    CERN Document Server

    Gowadia, Vaibhav; Kudo, Michiharu

    2008-01-01

    Ensuring compliance of organizations to federal regulations is a growing concern. This paper presents a framework and methods to verify whether an implemented low-level security policy is compliant to a high-level security policy. Our compliance checking framework is based on organizational and security metadata to support refinement of high-level concepts to implementation specific instances. Our work uses the results of refinement calculus to express valid refinement patterns and their properties. Intuitively, a low-level security policy is compliant to a high-level security policy if there is a valid refinement path from the high-level security policy to the low-level security policy. Our model is capable of detecting violations of security policies, failures to meet obligations, and capability and modal conflicts.

  1. Resonance circuits for adiabatic circuits

    Directory of Open Access Journals (Sweden)

    C. Schlachta

    2003-01-01

    Full Text Available One of the possible techniques to reduces the power consumption in digital CMOS circuits is to slow down the charge transport. This slowdown can be achieved by introducing an inductor in the charging path. Additionally, the inductor can act as an energy storage element, conserving the energy that is normally dissipated during discharging. Together with the parasitic capacitances from the circuit a LCresonant circuit is formed.

  2. 基于ISA总线的氧活化测井地面系统接口电路设计%Design of ISA-based interface circuit for the ground system of oxygen activation logging

    Institute of Scientific and Technical Information of China (English)

    李长星; 胡振华; 王波

    2014-01-01

    针对实际应用的需要,设计了一种基于工业控制ISA总线的地面接口系统。着重介绍氧活化测井仪工作原理、地面系统的硬件接口电路原理;重点研究中子氧活化水流测井仪的地面系统接口设计,通过单片机实现数据与命令间收发及通信协议的解释;采用软硬结合的方法实现PCM编码。接口采用ISA总线设计,该设计应用于地面系统与不同仪器的快速配接,实验证明该系统具有良好的兼容性及高可靠性。%To meet the need of practical applications,a ground interface system based on industrial controlled ISA bus is designed. The working principles of the oxygen activation tool and hardware interface circuit of the ground interface system are elaborated. The design of ground system interface of the neutron oxygen activation water flow logger is focused on. The explana-tion of communication protocol and transceiving of the dates and commands is realized by MCU,and PCM coding is realized by combination of hardware and software. The interface is designed by ISA bus. The design is applied in fast matching of the ground equipment system and different instruments,and has good compatibility and high reliability.

  3. Model Checking as Static Analysis

    DEFF Research Database (Denmark)

    Zhang, Fuyuan

    Both model checking and static analysis are prominent approaches to detecting software errors. Model Checking is a successful formal method for verifying properties specified in temporal logics with respect to transition systems. Static analysis is also a powerful method for validating program...... properties which can predict safe approximations to program behaviors. In this thesis, we have developed several static analysis based techniques to solve model checking problems, aiming at showing the link between static analysis and model checking. We focus on logical approaches to static analysis......-calculus can be encoded as the intended model of SFP. Our research results have strengthened the link between model checking and static analysis. This provides a theoretical foundation for developing a unied tool for both model checking and static analysis techniques....

  4. The program of the analysis crosstalk in circuits PCB

    Directory of Open Access Journals (Sweden)

    Sirotко V. K.

    2008-12-01

    Full Text Available The brief review of existing programs of the analysis of electromagnetic compatibility for circuits PCB is given. Advantages of the developed program of the analysis are shown. The description of the developed method of a reduction of equivalent circuits for circuits PCB is given. This method provides fast and exact calculation crosstalk for circuits PCB of a high-speed digital equipment. Data on some checks of the program are given, confirming its high speed and sufficient accuracy.

  5. 31 CFR 103.29 - Purchases of bank checks and drafts, cashier's checks, money orders and traveler's checks.

    Science.gov (United States)

    2010-07-01

    ..., cashier's checks, money orders and traveler's checks. 103.29 Section 103.29 Money and Finance: Treasury... orders and traveler's checks. (a) No financial institution may issue or sell a bank check or draft, cashier's check, money order or traveler's check for $3,000 or more in currency unless it maintains...

  6. Compositional and Quantitative Model Checking

    DEFF Research Database (Denmark)

    Larsen, Kim Guldstrand

    2010-01-01

    This paper gives a survey of a composition model checking methodology and its succesfull instantiation to the model checking of networks of finite-state, timed, hybrid and probabilistic systems with respect; to suitable quantitative versions of the modal mu-calculus [Koz82]. The method is based...

  7. Transaction management with integrity checking

    DEFF Research Database (Denmark)

    Martinenghi, Davide; Christiansen, Henning

    2005-01-01

    , which are difficult to maintain and error prone. Two important aspects must be taken care of. 1.~It is too time consuming to check integrity constraints from scratch after each update, so simplified checks before each update should be used relying on the assumption that the current state is consistent...

  8. Property Differencing for Incremental Checking

    Science.gov (United States)

    Yang, Guowei; Khurshid, Sarfraz; Person, Suzette; Rungta, Neha

    2014-01-01

    This paper introduces iProperty, a novel approach that facilitates incremental checking of programs based on a property di erencing technique. Speci cally, iProperty aims to reduce the cost of checking properties as they are initially developed and as they co-evolve with the program. The key novelty of iProperty is to compute the di erences between the new and old versions of expected properties to reduce the number and size of the properties that need to be checked during the initial development of the properties. Furthermore, property di erencing is used in synergy with program behavior di erencing techniques to optimize common regression scenarios, such as detecting regression errors or checking feature additions for conformance to new expected properties. Experimental results in the context of symbolic execution of Java programs annotated with properties written as assertions show the e ectiveness of iProperty in utilizing change information to enable more ecient checking.

  9. GLITCH ANALYSIS AND REDUCTION IN DIGITAL CIRCUITS

    Directory of Open Access Journals (Sweden)

    Ronak Shah

    2016-08-01

    Full Text Available Hazard in digital circuits is unnecessary transitions due to gate propagation delay in that circuit. Hazards occur due to uneven delay offered in the path of the various ongoing signals. One of the important reasons for power dissipation in CMOS circuits is the switching activity .This include activities such as spurious pulses, called glitches. Power optimization techniques that concentrate on the reduction of switching power dissipation of a given circuit are called glitch reduction techniques. In this paper, we analyse various Glitch reduction techniques such as Hazard filtering Technique, Balanced Path Technique, Multiple Threshold Technique and Gate Freezing Technique. We also measure the parameters such as noise and delay of the circuits on application of various techniques to check the reliability of different circuits in various situations.

  10. 负荷端变压器和接地过渡阻抗对短路故障仿真的影响%Influence of load-side transformers and grounding impedance on short-circuit fault simulation

    Institute of Scientific and Technical Information of China (English)

    夏成军; 黄冬燕; 代文良; 邱桂华

    2011-01-01

    Combining with C-phase short-circuit fault case of a regional power grid and taking advantage of electrical wiring diagram and action sequence of protection device in this fault, this paper firstly models PSCAD/EMTDC to calculate the error between simulation outputs and the actual system response, and then analyzes the main error sources. To determine whether and how the simplified model will impact on the simulation results, component models on zero sequence current path and their parameters are adjusted to reduce the error and make the simulation result more realistic from two aspects of load-side transformers and grounding resistance, providing reference basis to increase the validity of short-circuit fault simulation based on PSCAD/EMTDC and to guide scientific modeling.%在结合某地区电网C相短路故障实例,根据电网电气接线图及该事故中继电保护装置的动作时序在PSCAD/EMTDC中初步建立仿真模型,计算仿真值与现场实测数据的误差,并分析主要误差来源.围绕建模过程中对模型的简化处理是否会对仿真结果造成影响以及影响的程度如何这一问题,着重从负荷端变压器和接地过渡阻抗两个角度出发,通过修正零序电流通路上的元件模型及其参数,减小了误差,使仿真结果逼近实测值,为进一步研究影响仿真准确度的因素打下基础.

  11. Controllable circuit

    DEFF Research Database (Denmark)

    2010-01-01

    A switch-mode power circuit comprises a controllable element and a control unit. The controllable element is configured to control a current in response to a control signal supplied to the controllable element. The control unit is connected to the controllable element and provides the control...

  12. Model Checking Algorithms for CTMDPs

    DEFF Research Database (Denmark)

    Buchholz, Peter; Hahn, Ernst Moritz; Hermanns, Holger

    2011-01-01

    Continuous Stochastic Logic (CSL) can be interpreted over continuoustime Markov decision processes (CTMDPs) to specify quantitative properties of stochastic systems that allow some external control. Model checking CSL formulae over CTMDPs requires then the computation of optimal control strategie...

  13. Model Checking Algorithms for CTMDPs

    DEFF Research Database (Denmark)

    Buchholz, Peter; Hahn, Ernst Moritz; Hermanns, Holger

    2011-01-01

    Continuous Stochastic Logic (CSL) can be interpreted over continuoustime Markov decision processes (CTMDPs) to specify quantitative properties of stochastic systems that allow some external control. Model checking CSL formulae over CTMDPs requires then the computation of optimal control strategie...

  14. Treasury Check Verification Query (TCVQ)

    Data.gov (United States)

    Social Security Administration — The TCVQ system determines the SSN of an individual whose check has been returned to a local field office. The FO is able to request this information via the TCVQ...

  15. Coverage Metrics for Model Checking

    Science.gov (United States)

    Penix, John; Visser, Willem; Norvig, Peter (Technical Monitor)

    2001-01-01

    When using model checking to verify programs in practice, it is not usually possible to achieve complete coverage of the system. In this position paper we describe ongoing research within the Automated Software Engineering group at NASA Ames on the use of test coverage metrics to measure partial coverage and provide heuristic guidance for program model checking. We are specifically interested in applying and developing coverage metrics for concurrent programs that might be used to support certification of next generation avionics software.

  16. Gyrator-type circuits replace ungrounded inductors

    Science.gov (United States)

    Deboo, G. J.

    1968-01-01

    Gyrator circuits using only transistors, capacitors, and resistors which can replace both grounded and ungrounded inductors have been developed to permit complete microminiaturization of circuitry by integration of the components.

  17. Electronically Tunable Sinusoidal Oscillator Circuit

    Directory of Open Access Journals (Sweden)

    Sudhanshu Maheshwari

    2012-01-01

    Full Text Available This paper presents a novel electronically tunable third-order sinusoidal oscillator synthesized from a simple topology, employing current-mode blocks. The circuit is realized using the active element: Current Controlled Conveyors (CCCIIs and grounded passive components. The new circuit enjoys the advantages of noninteractive electronically tunable frequency of oscillation, use of grounded passive components, and the simultaneous availability of three sinusoidal voltage outputs. Bias current generation scheme is given for the active elements used. The circuit exhibits good high frequency performance. Nonideal and parasitic study has also been carried out. Wide range frequency tuning is shown with the bias current. The proposed theory is verified through extensive PSPICE simulations using 0.25 μm CMOS process parameters.

  18. Automatization and familiarity in repeated checking

    NARCIS (Netherlands)

    Dek, Eliane C P; van den Hout, Marcel A.; Giele, Catharina L.; Engelhard, Iris M.

    2014-01-01

    Repeated checking paradoxically increases memory uncertainty. This study investigated the underlying mechanism of this effect. We hypothesized that as a result of repeated checking, familiarity with stimuli increases, and automatization of the checking procedure occurs, which should result in decrea

  19. Experimental investigation of the check valve behaviour when the flow is reversing

    Directory of Open Access Journals (Sweden)

    Himr D.

    2017-01-01

    Full Text Available Check valve in a pipeline is supposed to prevent the reverse flow and to allow the flow in the positive direction. The construction of check valves follows these requirements, but the check valve must not cause pressure pulsations in transients. It means when the fluid is accelerating or decelerating. The article describes an experimental investigation of a swing check valve when the flow is changing its direction. The check valve was placed in an experimental circuit, where the pressure on the upstream and downstream side of the valve was measured and the current value of flow rate was determined. The goal was to simulate conditions in the real system, where the check valve slam had been observed.

  20. Model Checking Linearizability via Refinement

    Science.gov (United States)

    Liu, Yang; Chen, Wei; Liu, Yanhong A.; Sun, Jun

    Linearizability is an important correctness criterion for implementations of concurrent objects. Automatic checking of linearizability is challenging because it requires checking that 1) all executions of concurrent operations be serializable, and 2) the serialized executions be correct with respect to the sequential semantics. This paper describes a new method to automatically check linearizability based on refinement relations from abstract specifications to concrete implementations. Our method avoids the often difficult task of determining linearization points in implementations, but can also take advantage of linearization points if they are given. The method exploits model checking of finite state systems specified as concurrent processes with shared variables. Partial order reduction is used to effectively reduce the search space. The approach is built into a toolset that supports a rich set of concurrent operators. The tool has been used to automatically check a variety of implementations of concurrent objects, including the first algorithms for the mailbox problem and scalable NonZero indicators. Our system was able to find all known and injected bugs in these implementations.

  1. Program Analysis as Model Checking

    DEFF Research Database (Denmark)

    Olesen, Mads Chr.

    and abstract interpretation. Model checking views the program as a finite automaton and tries to prove logical properties over the automaton model, or present a counter-example if not possible — with a focus on precision. Abstract interpretation translates the program semantics into abstract semantics...... problems as the other by a reformulation. This thesis argues that there is even a convergence on the practical level, and that a generalisation of the formalism of timed automata into lattice automata captures key aspects of both methods; indeed model checking timed automata can be formulated in terms...... of an abstract interpretation. For the generalisation to lattice automata to have benefit it is important that efficient tools exist. This thesis presents multi-core tools for efficient and scalable reachability and Büchi emptiness checking of timed/lattice automata. Finally, a number of case studies...

  2. Analog and VLSI circuits

    CERN Document Server

    Chen, Wai-Kai

    2009-01-01

    Featuring hundreds of illustrations and references, this book provides the information on analog and VLSI circuits. It focuses on analog integrated circuits, presenting the knowledge on monolithic device models, analog circuit cells, high performance analog circuits, RF communication circuits, and PLL circuits.

  3. PV Systems Reliability Final Technical Report: Ground Fault Detection

    Energy Technology Data Exchange (ETDEWEB)

    Lavrova, Olga [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Flicker, Jack David [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Johnson, Jay [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2016-01-01

    We have examined ground faults in PhotoVoltaic (PV) arrays and the efficacy of fuse, current detection (RCD), current sense monitoring/relays (CSM), isolation/insulation (Riso) monitoring, and Ground Fault Detection and Isolation (GFID) using simulations based on a Simulation Program with Integrated Circuit Emphasis SPICE ground fault circuit model, experimental ground faults installed on real arrays, and theoretical equations.

  4. Transaction management with integrity checking

    DEFF Research Database (Denmark)

    Martinenghi, Davide; Christiansen, Henning

    2005-01-01

    Database integrity constraints, understood as logical conditions that must hold for any database state, are not fully supported by current database technology. It is typically up to the database designer and application programmer to enforce integrity via triggers or tests at the application level......, which are difficult to maintain and error prone. Two important aspects must be taken care of. 1.~It is too time consuming to check integrity constraints from scratch after each update, so simplified checks before each update should be used relying on the assumption that the current state is consistent...

  5. Low-Density Parity-Check Codes for High Data Rate Receivers Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Low-Density Parity-Check (LDPC) Forward Error Correction (FEC) schemes are excellent tools in optimizing telemetry data integrity within the limited space to ground...

  6. Circuit Connectors

    Science.gov (United States)

    1979-01-01

    The U-shaped wire devices in the upper photo are Digi-Klipsm; aids to compact packaging of electrical and electronic devices. They serve as connectors linking the circuitry of one circuit board with another in multi-board systems. Digi-Klips were originally developed for Goddard Space Flight Center to meet a need for lightweight, reliable connectors to replace hand-wired connections formerly used in spacecraft. They are made of beryllium copper wire, noted for its excellent conductivity and its spring-like properties, which assure solid electrical contact over a long period of time.

  7. Compositional and Quantitative Model Checking

    DEFF Research Database (Denmark)

    Larsen, Kim Guldstrand

    2010-01-01

    on the existence of a quotient construction, allowing a property phi of a parallel system phi/A to be transformed into a sufficient and necessary quotient-property yolA to be satisfied by the component 13. Given a model checking problem involving a network Pi I and a property yo, the method gradually move (by...

  8. Model checking of component connectors

    NARCIS (Netherlands)

    Izadi, Mohammad

    2011-01-01

    We present a framework for automata theoretic model checking of coordination systems specified in Reo coordination language. To this goal, we introduce Buchi automata of records (BAR) and their augmented version (ABAR) as an operational modeling formalism that covers several intended forms of behavi

  9. Reducing Lookups for Invariant Checking

    DEFF Research Database (Denmark)

    Thomsen, Jakob Grauenkjær; Clausen, Christian; Andersen, Kristoffer Just;

    2013-01-01

    This paper helps reduce the cost of invariant checking in cases where access to data is expensive. Assume that a set of variables satisfy a given invariant and a request is received to update a subset of them. We reduce the set of variables to inspect, in order to verify that the invariant is sti...

  10. Airport Ground Staff Scheduling

    DEFF Research Database (Denmark)

    Clausen, Tommy

    travels safely and efficiently through the airport. When an aircraft lands, a significant number of tasks must be performed by different groups of ground crew, such as fueling, baggage handling and cleaning. These tasks must be complete before the aircraft is able to depart, as well as check......-in and security services. These tasks are collectively known as ground handling, and are the major source of activity with airports. The business environments of modern airports are becoming increasingly competitive, as both airports themselves and their ground handling operations are changing to private...... ownership. As airports are in competition to attract airline routes, efficient and reliable ground handling operations are imperative for the viability and continued growth of both airports and airlines. The increasing liberalization of the ground handling market prompts ground handling operators...

  11. LOGIC CIRCUIT

    Science.gov (United States)

    Strong, G.H.; Faught, M.L.

    1963-12-24

    A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

  12. 27 CFR 70.101 - Bad checks.

    Science.gov (United States)

    2010-04-01

    ... 27 Alcohol, Tobacco Products and Firearms 2 2010-04-01 2010-04-01 false Bad checks. 70.101 Section....101 Bad checks. If any check or money order in payment of any amount receivable under Title 26 of the... appropriate TTB officer that such check was tendered in good faith and that such person had reasonable...

  13. Collective of mechatronics circuit

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1987-02-15

    This book is composed of three parts, which deals with mechatronics system about sensor, circuit and motor. The contents of the first part are photo sensor of collector for output, locating detection circuit with photo interrupts, photo sensor circuit with CdS cell and lamp, interface circuit with logic and LED and temperature sensor circuit. The second part deals with oscillation circuit with crystal, C-R oscillation circuit, F-V converter, timer circuit, stability power circuit, DC amp and DC-DC converter. The last part is comprised of bridge server circuit, deformation bridge server, controlling circuit of DC motor, controlling circuit with IC for PLL and driver circuit of stepping motor and driver circuit of Brushless.

  14. Commutation circuit for an HVDC circuit breaker

    Science.gov (United States)

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  15. Analog circuit design designing dynamic circuit response

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    This second volume, Designing Dynamic Circuit Response builds upon the first volume Designing Amplifier Circuits by extending coverage to include reactances and their time- and frequency-related behavioral consequences.

  16. Document analysis with neural net circuits

    Science.gov (United States)

    Graf, Hans Peter

    1994-01-01

    Document analysis is one of the main applications of machine vision today and offers great opportunities for neural net circuits. Despite more and more data processing with computers, the number of paper documents is still increasing rapidly. A fast translation of data from paper into electronic format is needed almost everywhere, and when done manually, this is a time consuming process. Markets range from small scanners for personal use to high-volume document analysis systems, such as address readers for the postal service or check processing systems for banks. A major concern with present systems is the accuracy of the automatic interpretation. Today's algorithms fail miserably when noise is present, when print quality is poor, or when the layout is complex. A common approach to circumvent these problems is to restrict the variations of the documents handled by a system. In our laboratory, we had the best luck with circuits implementing basic functions, such as convolutions, that can be used in many different algorithms. To illustrate the flexibility of this approach, three applications of the NET32K circuit are described in this short viewgraph presentation: locating address blocks, cleaning document images by removing noise, and locating areas of interest in personal checks to improve image compression. Several of the ideas realized in this circuit that were inspired by neural nets, such as analog computation with a low resolution, resulted in a chip that is well suited for real-world document analysis applications and that compares favorably with alternative, 'conventional' circuits.

  17. Analog circuit design designing waveform processing circuits

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    The fourth volume in the set Designing Waveform-Processing Circuits builds on the previous 3 volumes and presents a variety of analog non-amplifier circuits, including voltage references, current sources, filters, hysteresis switches and oscilloscope trigger and sweep circuitry, function generation, absolute-value circuits, and peak detectors.

  18. Communication, concepts and grounding.

    Science.gov (United States)

    van der Velde, Frank

    2015-02-01

    This article discusses the relation between communication and conceptual grounding. In the brain, neurons, circuits and brain areas are involved in the representation of a concept, grounding it in perception and action. In terms of grounding we can distinguish between communication within the brain and communication between humans or between humans and machines. In the first form of communication, a concept is activated by sensory input. Due to grounding, the information provided by this communication is not just determined by the sensory input but also by the outgoing connection structure of the conceptual representation, which is based on previous experiences and actions. The second form of communication, that between humans or between humans and machines, is influenced by the first form. In particular, a more successful interpersonal communication might require forms of situated cognition and interaction in which the entire representations of grounded concepts are involved.

  19. 25 CFR 11.421 - Bad checks.

    Science.gov (United States)

    2010-04-01

    ... 25 Indians 1 2010-04-01 2010-04-01 false Bad checks. 11.421 Section 11.421 Indians BUREAU OF... Criminal Offenses § 11.421 Bad checks. (a) A person who issues or passes a check or similar sight order for..., and the issuer failed to make good within 10 days after receiving notice of that refusal....

  20. Timing analysis by model checking

    Science.gov (United States)

    Naydich, Dimitri; Guaspari, David

    2000-01-01

    The safety of modern avionics relies on high integrity software that can be verified to meet hard real-time requirements. The limits of verification technology therefore determine acceptable engineering practice. To simplify verification problems, safety-critical systems are commonly implemented under the severe constraints of a cyclic executive, which make design an expensive trial-and-error process highly intolerant of change. Important advances in analysis techniques, such as rate monotonic analysis (RMA), have provided a theoretical and practical basis for easing these onerous restrictions. But RMA and its kindred have two limitations: they apply only to verifying the requirement of schedulability (that tasks meet their deadlines) and they cannot be applied to many common programming paradigms. We address both these limitations by applying model checking, a technique with successful industrial applications in hardware design. Model checking algorithms analyze finite state machines, either by explicit state enumeration or by symbolic manipulation. Since quantitative timing properties involve a potentially unbounded state variable (a clock), our first problem is to construct a finite approximation that is conservative for the properties being analyzed-if the approximation satisfies the properties of interest, so does the infinite model. To reduce the potential for state space explosion we must further optimize this finite model. Experiments with some simple optimizations have yielded a hundred-fold efficiency improvement over published techniques.

  1. Solid-state circuits

    CERN Document Server

    Pridham, G J

    2013-01-01

    Solid-State Circuits provides an introduction to the theory and practice underlying solid-state circuits, laying particular emphasis on field effect transistors and integrated circuits. Topics range from construction and characteristics of semiconductor devices to rectification and power supplies, low-frequency amplifiers, sine- and square-wave oscillators, and high-frequency effects and circuits. Black-box equivalent circuits of bipolar transistors, physical equivalent circuits of bipolar transistors, and equivalent circuits of field effect transistors are also covered. This volume is divided

  2. Simple Autonomous Chaotic Circuits

    Science.gov (United States)

    Piper, Jessica; Sprott, J.

    2010-03-01

    Over the last several decades, numerous electronic circuits exhibiting chaos have been proposed. Non-autonomous circuits with as few as two components have been developed. However, the operation of such circuits relies on the non-ideal behavior of the devices used, and therefore the circuit equations can be quite complex. In this paper, we present two simple autonomous chaotic circuits using only opamps and linear passive components. The circuits each use one opamp as a comparator, to provide a signum nonlinearity. The chaotic behavior is robust, and independent of nonlinearities in the passive components. Moreover, the circuit equations are among the algebraically simplest chaotic systems yet constructed.

  3. Circuit analysis for dummies

    CERN Document Server

    Santiago, John

    2013-01-01

    Circuits overloaded from electric circuit analysis? Many universities require that students pursuing a degree in electrical or computer engineering take an Electric Circuit Analysis course to determine who will ""make the cut"" and continue in the degree program. Circuit Analysis For Dummies will help these students to better understand electric circuit analysis by presenting the information in an effective and straightforward manner. Circuit Analysis For Dummies gives you clear-cut information about the topics covered in an electric circuit analysis courses to help

  4. Current limiter circuit system

    Energy Technology Data Exchange (ETDEWEB)

    Witcher, Joseph Brandon; Bredemann, Michael V.

    2017-09-05

    An apparatus comprising a steady state sensing circuit, a switching circuit, and a detection circuit. The steady state sensing circuit is connected to a first, a second and a third node. The first node is connected to a first device, the second node is connected to a second device, and the steady state sensing circuit causes a scaled current to flow at the third node. The scaled current is proportional to a voltage difference between the first and second node. The switching circuit limits an amount of current that flows between the first and second device. The detection circuit is connected to the third node and the switching circuit. The detection circuit monitors the scaled current at the third node and controls the switching circuit to limit the amount of the current that flows between the first and second device when the scaled current is greater than a desired level.

  5. Solenoid-Simulation Circuit

    Science.gov (United States)

    Simon, R. A.

    1986-01-01

    Electrical properties of solenoids imitated for tests of control circuits. Simulation circuit imitates voltage and current responses of two engine-controlling solenoids. Used in tests of programs of digital engine-control circuits, also provides electronic interface with circuits imitating electrical properties of pressure sensors and linear variable-differential transformers. Produces voltages, currents, delays, and discrete turnon and turnoff signals representing operation of solenoid in engine-control relay. Many such circuits used simulating overall engine circuitry.

  6. Quantum Effects of Mesoscopic Inductance and Capacity Coupling Circuits

    Institute of Scientific and Technical Information of China (English)

    LIU Jian-Xin; AN Zhan-Yuan; SONG Yong-Hua

    2006-01-01

    Using the quantum theory for a mesoscopic circuit based on the discretenes of electric charges, the finitedifference Schrodinger equation of the non-dissipative mesoscopic inductance and capacity coupling circuit is achieved.The Coulomb blockade effect, which is caused by the discreteness of electric charges, is studied. Appropriately choose the components in the circuits, the finite-difference Schrodinger equation can be divided into two Mathieu equations in p representation. With the WKBJ method, the currents quantum fluctuations in the ground states of the two circuits are calculated. The results show that the currents quantum zero-point fluctuations of the two circuits are exist and correlated.

  7. Analysis on Zero Sequence Current Distribution Characteristic of Grounding Faults Occurred in Double-Circuit Transmission Lines on The Same Tower%同塔双回线路接地故障零序电流分布特性分析

    Institute of Scientific and Technical Information of China (English)

    曾耿晖; 蔡泽祥; 陈桥平; 刘为雄

    2011-01-01

    The distribution regularity of zero-sequence current, which appears during external and internal grounding faults occurred in double-circuit transmission lines on the same tower under different operation modes, different zero-sequence mutual inductance and different fault locations, is analyzed. For external grounding faults, the impact of different zero-sequence impedance of double-circuit transmission lines on the same tower is mainly considered; for internal grounding faults, the impacts of zero-sequence mutual inductances and fault locations under following conditions are considered: parallel operation of both transmission lines; one transmission line is energized and in the stand-by state while the other one is artificially grounded for the maintenance. The effects of "zero-sequence magnetic assist" and "zero-sequence degaussing", which are caused by the flowing of zero-sequence currents of both transmission lines on the same tower in the same direction and by those in the opposite direction respectively, lead to variation of distribution regularity of zero-sequence currents, and in extreme circumstance the out-of-limit of the first zone of zero-sequence over-current protection may occur. Based on practical calculation examples of Guangdong power grid, the setting measures are put forward to avoid the out-of-limit of the first zone of zero-sequence over-current protection for double-circuit transmission lines on the same tower. It is also proposed that in the setting of the first zone of zero-sequence over-current protection for double-circuit transmission lines on the same tower, the comprehensive effects of operation modes of double-circuit transmission lines on the same tower, the extent of zero-sequence mutual induction and fault locations should be taken into account to avoid the malfunction of the first zone of zero-sequence over-current protection of adjacent healthy transmission lines due to the affect of mutual induction while grounding

  8. 49 CFR 236.107 - Ground tests.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Ground tests. 236.107 Section 236.107...: All Systems Inspections and Tests; All Systems § 236.107 Ground tests. (a) Except as provided in paragraph (b) of this section, a test for grounds on each energy bus furnishing power to circuits,...

  9. Anonymity control in electronic check systems

    Institute of Scientific and Technical Information of China (English)

    Ma Chunguang; Yang Yixian; Hu Zhengming

    2005-01-01

    Electronic check systems, as one of electronic payment systems, are more desirable than other electronic cash systems. In the system, only a single check is used to pay any price that is not more than the face value. The main problem in check systems is to design an efficient refund mechanism that makes refund checks undistinguished from initial checks during payment and deposit. The problem of anonymity control also called fairness is also an important issue in check systems. All check systems yet are unconditional anonymity that opens the door to misuse for crime such as laundering and blackmailing. In this paper, the notion of anonymity revocation is introduced to electronic check system for the first time, and a model of fair electronic check system is proposed. An efficient fair online electronic check system with reusable refund is presented. In the system, a passive trustee is employed to revoke the anonymity of un-honest users. Moreover, the system solves the reusability problem of refunds thanks to the RSA-based partially signature. The system is efficient and meets all basic security requirements.

  10. Hidden circuits and argumentation

    Science.gov (United States)

    Leinonen, Risto; Kesonen, Mikko H. P.; Hirvonen, Pekka E.

    2016-11-01

    Despite the relevance of DC circuits in everyday life and schools, they have been shown to cause numerous learning difficulties at various school levels. In the course of this article, we present a flexible method for teaching DC circuits at lower secondary level. The method is labelled as hidden circuits, and the essential idea underlying hidden circuits is in hiding the actual wiring of DC circuits, but to make their behaviour evident for pupils. Pupils are expected to find out the wiring of the circuit which should enhance their learning of DC circuits. We present two possible ways to utilise hidden circuits in a classroom. First, they can be used to test and enhance pupils’ conceptual understanding when pupils are expected to find out which one of the offered circuit diagram options corresponds to the actual circuit shown. This method aims to get pupils to evaluate the circuits holistically rather than locally, and as a part of that aim this method highlights any learning difficulties of pupils. Second, hidden circuits can be used to enhance pupils’ argumentation skills with the aid of argumentation sheet that illustrates the main elements of an argument. Based on the findings from our co-operating teachers and our own experiences, hidden circuits offer a flexible and motivating way to supplement teaching of DC circuits.

  11. Checking for Optimal Solutions in Some NP-Complete Problems

    Science.gov (United States)

    Bauer, Michel; Orland, Henri

    2005-09-01

    For some weighted NP-complete problems, checking whether a proposed solution is optimal is a nontrivial task. Such is the case for the traveling salesman problem, or the spin-glass problem in three dimensions. In this Letter, we consider the weighted tripartite matching problem, a well known NP-complete problem. We write mean-field finite temperature equations for this model and derive their zero temperature limit. We show that any solution of the zero temperature equations provides an exact absolute ground state of the system. As a consequence, we propose a criterion which can be checked in polynomial time, and such that given a putative optimal solution, if the criterion is satisfied, then the solution is indeed optimal. This criterion is generalized to a class of variants of the multiple traveling salesmen problems.

  12. Ground State Spin Logic

    CERN Document Server

    Whitfield, J D; Biamonte, J D

    2012-01-01

    Designing and optimizing cost functions and energy landscapes is a problem encountered in many fields of science and engineering. These landscapes and cost functions can be embedded and annealed in experimentally controllable spin Hamiltonians. Using an approach based on group theory and symmetries, we examine the embedding of Boolean logic gates into the ground state subspace of such spin systems. We describe parameterized families of diagonal Hamiltonians and symmetry operations which preserve the ground state subspace encoding the truth tables of Boolean formulas. The ground state embeddings of adder circuits are used to illustrate how gates are combined and simplified using symmetry. Our work is relevant for experimental demonstrations of ground state embeddings found in both classical optimization as well as adiabatic quantum optimization.

  13. Intuitive analog circuit design

    CERN Document Server

    Thompson, Marc

    2013-01-01

    Intuitive Analog Circuit Design outlines ways of thinking about analog circuits and systems that let you develop a feel for what a good, working analog circuit design should be. This book reflects author Marc Thompson's 30 years of experience designing analog and power electronics circuits and teaching graduate-level analog circuit design, and is the ideal reference for anyone who needs a straightforward introduction to the subject. In this book, Dr. Thompson describes intuitive and ""back-of-the-envelope"" techniques for designing and analyzing analog circuits, including transistor amplifi

  14. Compositional encoding for bounded model checking

    Institute of Scientific and Technical Information of China (English)

    Jun SUN; Yang LIU; Jin Song DONG; Jing SUN

    2008-01-01

    Verification techniques like SAT-based bounded model checking have been successfully applied to a variety of system models. Applying bounded model checking to compositional process algebras is, however, a highly non-trivial task. One challenge is that the number of system states for process algebra models is not statically known, whereas exploring the full state space is computa-tionally expensive. This paper presents a compositional encoding of hierarchical processes as SAT problems and then applies state-of-the-art SAT solvers for bounded model checking. The encoding avoids exploring the full state space for complex systems so as to deal with state space explosion. We developed an automated analyzer which combines complementing model checking tech-niques (I.e., bounded model checking and explicit on-the-fly model checking) to validate system models against event-based temporal properties. The experiment results show the analyzer handles large systems.

  15. Advanced microbial check valve development

    Science.gov (United States)

    Colombo, G. V.; Greenley, D. R.

    1980-01-01

    A flight certified assembly identified as a Microbial Check Valve (MCV) was developed and tested. The MCV is a canister packed with an iodinated anionic exchange resin. The device is used to destroy organisms in a water stream as the water passes through the device. The device is equally effective for fluid flow in either direction and its primary method of organism removal is killing rather than filtering. The MCV was successfully developed for the space shuttle to: disinfect fuel cell water; and prevent back contamination of the stored potable water supply. One version of the device consists of a high residual iodinated resin bed that imparts approximately 2 ppm of iodine to the fuel cell water as it flows to the potable water tanks. A second version of the device consists of a low residual iodinated resin bed. One of these low residual beds is located at each use port in the potable water system for the dual purpose of removing some iodine from the potable water as it is dispensed and also to prevent back contamination of the potable supply.

  16. Heteroscedasticity checks for regression models

    Institute of Scientific and Technical Information of China (English)

    2001-01-01

    For checking on heteroscedasticity in regression models, a unified approach is proposed to constructing test statistics in parametric and nonparametric regression models. For nonparametric regression, the test is not affected sensitively by the choice of smoothing parameters which are involved in estimation of the nonparametric regression function. The limiting null distribution of the test statistic remains the same in a wide range of the smoothing parameters. When the covariate is one-dimensional, the tests are, under some conditions, asymptotically distribution-free. In the high-dimensional cases, the validity of bootstrap approximations is investigated. It is shown that a variant of the wild bootstrap is consistent while the classical bootstrap is not in the general case, but is applicable if some extra assumption on conditional variance of the squared error is imposed. A simulation study is performed to provide evidence of how the tests work and compare with tests that have appeared in the literature. The approach may readily be extended to handle partial linear, and linear autoregressive models.

  17. Check valve slam analysis in pumping station

    Science.gov (United States)

    Himr, D.; Habán, V.; Dokoupil, P.

    2016-03-01

    Pumping station supplies water for technological process. The check valve in the station was replaced with a new one. The regular test of black out discovered the high pressure pulsations accompanied with noticeable pipeline movement of discharge pipe. It was caused by late check valve closing, probably, when the back flow reached the highest possible velocity. This statement was supported with analysis of results of pressure measurement near the check valve and with a numerical simulation of the flow in the pipeline system.

  18. Features of compulsive checking behavior mediated by nucleus accumbens and orbital frontal cortex.

    Science.gov (United States)

    Dvorkin, Anna; Silva, Charmaine; McMurran, Thomas; Bisnaire, Liane; Foster, Jane; Szechtman, Henry

    2010-11-01

    The quinpirole sensitization model of obsessive-compulsive disorder was used to investigate the functional role that brain regions implicated in a neuroanatomical circuit of obsessive-compulsive disorder may play in compulsive checking behavior. Following repeated injections of saline or quinpirole (0.5mg/kg, twice per week, ×8 injections) to induce compulsive checking, rats received N-methyl-d-aspartate lesions of the nucleus accumbens core (NAc), orbital frontal cortex (OFC) and basolateral amygdala, or sham lesions. When retested at 17days post-surgery, the results showed effects of NAc and OFC but not basolateral amygdala lesion. NAc lesions affected measures indicative of the amount of checking behavior, whereas OFC lesions affected indices of staying away from checking. The pattern of results suggested that the functional roles of the NAc and OFC in checking behavior are to control the vigor of motor performance and focus on goal-directed activity, respectively. Furthermore, similarities in behavior between quinpirole sham rats and saline NAc lesion rats suggested that quinpirole may drive the vigor of checking by inhibition of NAc neurons, and that the NAc may be a site for the negative feedback control of checking.

  19. QuickChecking Static Analysis Properties

    DEFF Research Database (Denmark)

    Midtgaard, Jan; Møller, Anders

    2015-01-01

    A static analysis can check programs for potential errors. A natural question that arises is therefore: who checks the checker? Researchers have given this question varying attention, ranging from basic testing techniques, informal monotonicity arguments, thorough pen-and-paper soundness proofs......, to verified fixed point checking. In this paper we demonstrate how quickchecking can be useful for testing a range of static analysis properties with limited effort. We show how to check a range of algebraic lattice properties, to help ensure that an implementation follows the formal specification...

  20. 14 CFR 91.1093 - Initial and transition training and checking: Check pilots (aircraft), check pilots (simulator).

    Science.gov (United States)

    2010-01-01

    ... OPERATING RULES GENERAL OPERATING AND FLIGHT RULES Fractional Ownership Operations Program Management § 91... preceding 24 months, that person satisfactorily conducts a proficiency or competency check under the..., and emergency procedures to ensure competence to conduct the pilot flight checks required by...

  1. Electrical Circuits and Water Analogies

    Science.gov (United States)

    Smith, Frederick A.; Wilson, Jerry D.

    1974-01-01

    Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)

  2. Heteroscedasticity checks for regression models

    Institute of Scientific and Technical Information of China (English)

    ZHU; Lixing

    2001-01-01

    [1]Carroll, R. J., Ruppert, D., Transformation and Weighting in Regression, New York: Chapman and Hall, 1988.[2]Cook, R. D., Weisberg, S., Diagnostics for heteroscedasticity in regression, Biometrika, 1988, 70: 1—10.[3]Davidian, M., Carroll, R. J., Variance function estimation, J. Amer. Statist. Assoc., 1987, 82: 1079—1091.[4]Bickel, P., Using residuals robustly I: Tests for heteroscedasticity, Ann. Statist., 1978, 6: 266—291.[5]Carroll, R. J., Ruppert, D., On robust tests for heteroscedasticity, Ann. Statist., 1981, 9: 205—209.[6]Eubank, R. L., Thomas, W., Detecting heteroscedasticity in nonparametric regression, J. Roy. Statist. Soc., Ser. B, 1993, 55: 145—155.[7]Diblasi, A., Bowman, A., Testing for constant variance in a linear model, Statist. and Probab. Letters, 1997, 33: 95—103.[8]Dette, H., Munk, A., Testing heteoscedasticity in nonparametric regression, J. R. Statist. Soc. B, 1998, 60: 693—708.[9]Müller, H. G., Zhao, P. L., On a semi-parametric variance function model and a test for heteroscedasticity, Ann. Statist., 1995, 23: 946—967.[10]Stute, W., Manteiga, G., Quindimil, M. P., Bootstrap approximations in model checks for regression, J. Amer. Statist. Asso., 1998, 93: 141—149.[11]Stute, W., Thies, G., Zhu, L. X., Model checks for regression: An innovation approach, Ann. Statist., 1998, 26: 1916—1939.[12]Shorack, G. R., Wellner, J. A., Empirical Processes with Applications to Statistics, New York: Wiley, 1986.[13]Efron, B., Bootstrap methods: Another look at the jackknife, Ann. Statist., 1979, 7: 1—26.[14]Wu, C. F. J., Jackknife, bootstrap and other re-sampling methods in regression analysis, Ann. Statist., 1986, 14: 1261—1295.[15]H rdle, W., Mammen, E., Comparing non-parametric versus parametric regression fits, Ann. Statist., 1993, 21: 1926—1947.[16]Liu, R. Y., Bootstrap procedures under some non-i.i.d. models, Ann. Statist., 1988, 16: 1696—1708.[17

  3. Circuits on Cylinders

    DEFF Research Database (Denmark)

    Hansen, Kristoffer Arnsfelt; Miltersen, Peter Bro; Vinay, V

    2006-01-01

    We consider the computational power of constant width polynomial size cylindrical circuits and nondeterministic branching programs. We show that every function computed by a Pi2 o MOD o AC0 circuit can also be computed by a constant width polynomial size cylindrical nondeterministic branching...... program (or cylindrical circuit) and that every function computed by a constant width polynomial size cylindrical circuit belongs to ACC0....

  4. Electric circuits essentials

    CERN Document Server

    REA, Editors of

    2012-01-01

    REA's Essentials provide quick and easy access to critical information in a variety of different fields, ranging from the most basic to the most advanced. As its name implies, these concise, comprehensive study guides summarize the essentials of the field covered. Essentials are helpful when preparing for exams, doing homework and will remain a lasting reference source for students, teachers, and professionals. Electric Circuits I includes units, notation, resistive circuits, experimental laws, transient circuits, network theorems, techniques of circuit analysis, sinusoidal analysis, polyph

  5. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2010-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte

  6. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2011-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte

  7. Load testing circuit

    DEFF Research Database (Denmark)

    2009-01-01

    A load testing circuit a circuit tests the load impedance of a load connected to an amplifier. The load impedance includes a first terminal and a second terminal, the load testing circuit comprising a signal generator providing a test signal of a defined bandwidth to the first terminal of the load...

  8. Short-circuit logic

    NARCIS (Netherlands)

    Bergstra, J.A.; Ponse, A.

    2010-01-01

    Short-circuit evaluation denotes the semantics of propositional connectives in which the second argument is only evaluated if the first argument does not suffice to determine the value of the expression. In programming, short-circuit evaluation is widely used. A short-circuit logic is a variant of p

  9. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, Simon Minze; Vertregt, Maarten

    2011-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte

  10. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, Simon Minze; Vertregt, Maarten

    2010-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte

  11. A SCM Reality Check

    DEFF Research Database (Denmark)

    Zachariassen, Frederik

    2008-01-01

    Purpose of this paper Drawing on meta-theoretical discussions in the discipline of management accounting, this paper seeks to discuss the notion of reality in SCM and logistics research, as this important discussion is currently missing. Four dimensions (facts, logic, values and communication......) and their impact on research are discussed in order to show the erroneous aspects of conducting research from three or less of the dimensions. Design/methodology/approach The paper is theoretical grounded. A literature review of ten top journals in SCM/logistics was carried out in order to explore previous...... discussions on reality in the SCM/logistics discipline. A SCM related paper was selected in order to illustrate the problematic aspects of not integrating all four dimensions in SCM/logistics related research. Findings As the SCM/logistics discipline is primarily founded in objectivistic approaches...

  12. Automatization and familiarity in repeated checking

    NARCIS (Netherlands)

    Dek, E.C.P.|info:eu-repo/dai/nl/313959552; van den Hout, M.A.|info:eu-repo/dai/nl/070445354; Giele, C.L.|info:eu-repo/dai/nl/318754460; Engelhard, I.M.|info:eu-repo/dai/nl/239681533

    2015-01-01

    Repetitive, compulsive-like checking of an object leads to reductions in memory confidence, vividness, and detail. Experimental research suggests that this is caused by increased familiarity with perceptual characteristics of the stimulus and automatization of the checking procedure (Dek, van den Ho

  13. Software tool for physics chart checks.

    Science.gov (United States)

    Li, H Harold; Wu, Yu; Yang, Deshan; Mutic, Sasa

    2014-01-01

    Physics chart check has long been a central quality assurance (QC) measure in radiation oncology. The purpose of this work is to describe a software tool that aims to accomplish simplification, standardization, automation, and forced functions in the process. Nationally recognized guidelines, including American College of Radiology and American Society for Radiation Oncology guidelines and technical standards, and the American Association of Physicists in Medicine Task Group reports were identified, studied, and summarized. Meanwhile, the reported events related to physics chart check service were analyzed using an event reporting and learning system. A number of shortfalls in the chart check process were identified. To address these problems, a software tool was designed and developed under Microsoft. Net in C# to hardwire as many components as possible at each stage of the process. The software consists of the following 4 independent modules: (1) chart check management; (2) pretreatment and during treatment chart check assistant; (3) posttreatment chart check assistant; and (4) quarterly peer-review management. The users were a large group of physicists in the author's radiation oncology clinic. During over 1 year of use the tool has proven very helpful in chart checking management, communication, documentation, and maintaining consistency. The software tool presented in this work aims to assist physicists at each stage of the physics chart check process. The software tool is potentially useful for any radiation oncology clinics that are either in the process of pursuing or maintaining the American College of Radiology accreditation.

  14. 7 CFR 58.243 - Checking quality.

    Science.gov (United States)

    2010-01-01

    ... Procedures § 58.243 Checking quality. All milk, milk products and dry milk products shall be subject to... aid to quality control in addition to the regular routine analysis made on the finished products. ... 7 Agriculture 3 2010-01-01 2010-01-01 false Checking quality. 58.243 Section 58.243...

  15. 32 CFR 635.6 - Name checks.

    Science.gov (United States)

    2010-07-01

    ... military police records may be released under the provisions of AR 340-21 to authorized personnel for valid... with AR 340-21. (b) Checks will be accomplished by a review of the COPS MPRS. Information will be... police reports filed worldwide. Authorized users of COPS MPRS can conduct name checks for...

  16. Tractor Mechanic Check Sheets for Modules.

    Science.gov (United States)

    Clemson Univ., SC. Vocational Education Media Center.

    Forms for student self-checks and the instructor's final checklist (student evaluation) are provided for use with thirty-three learning modules on maintaining and servicing fuel and electrical systems in tractor mechanics. The student self-check asks the students questions about their understanding of the modules' content. The instructor's…

  17. SPEED ROLLER STAND MEASUREMENT SYSTEM CHECKING TECHNIQUE

    OpenAIRE

    Zybtsev, Y.; I. Marmut

    2011-01-01

    The study has shown that the accuracy of brakes checking by inertial stands depends upon the applied methods of measurement of braking parameters (stand slowing down, braking distance, brakes triggering time, current speed) as well as the methods of metrological checking of measuring system canals.

  18. Reversible Logic Circuit Synthesis

    CERN Document Server

    Shende, V V; Markov, I L; Prasad, A K; Hayes, John P.; Markov, Igor L.; Prasad, Aditya K.; Shende, Vivek V.

    2002-01-01

    Reversible, or information-lossless, circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement for quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line-pairs (temporary storage channels). We propose new constructions for reversible circuits composed of NOT, Controlled-NOT, and TOFFOLI gates (the CNT gate library) based on permutation theory. A new algorithm is given to synthesize optimal reversible circuits using an arbitrary gate library. We also describe much faster heuristic algorithms. We also pursue applications of the proposed techniques to the synthesis of quantum circuits.

  19. 14 CFR 91.1089 - Qualifications: Check pilots (aircraft) and check pilots (simulator).

    Science.gov (United States)

    2010-01-01

    ... 14 Aeronautics and Space 2 2010-01-01 2010-01-01 false Qualifications: Check pilots (aircraft) and check pilots (simulator). 91.1089 Section 91.1089 Aeronautics and Space FEDERAL AVIATION ADMINISTRATION... RULES Fractional Ownership Operations Program Management § 91.1089 Qualifications: Check...

  20. Exact Threshold Circuits

    DEFF Research Database (Denmark)

    Hansen, Kristoffer Arnsfelt; Podolskii, Vladimir V.

    2010-01-01

    We initiate a systematic study of constant depth Boolean circuits built using exact threshold gates. We consider both unweighted and weighted exact threshold gates and introduce corresponding circuit classes. We next show that this gives a hierarchy of classes that seamlessly interleave with the ......We initiate a systematic study of constant depth Boolean circuits built using exact threshold gates. We consider both unweighted and weighted exact threshold gates and introduce corresponding circuit classes. We next show that this gives a hierarchy of classes that seamlessly interleave...... with the well-studied corresponding hierarchies defined using ordinary threshold gates. A major open problem in Boolean circuit complexity is to provide an explicit super-polynomial lower bound for depth two threshold circuits. We identify the class of depth two exact threshold circuits as a natural subclass...

  1. Feedback in analog circuits

    CERN Document Server

    Ochoa, Agustin

    2016-01-01

    This book describes a consistent and direct methodology to the analysis and design of analog circuits with particular application to circuits containing feedback. The analysis and design of circuits containing feedback is generally presented by either following a series of examples where each circuit is simplified through the use of insight or experience (someone else’s), or a complete nodal-matrix analysis generating lots of algebra. Neither of these approaches leads to gaining insight into the design process easily. The author develops a systematic approach to circuit analysis, the Driving Point Impedance and Signal Flow Graphs (DPI/SFG) method that does not require a-priori insight to the circuit being considered and results in factored analysis supporting the design function. This approach enables designers to account fully for loading and the bi-directional nature of elements both in the feedback path and in the amplifier itself, properties many times assumed negligible and ignored. Feedback circuits a...

  2. 46 CFR 183.376 - Grounded distribution systems (neutral grounded).

    Science.gov (United States)

    2010-10-01

    ... propulsion, power, lighting, or distribution system having a neutral bus or conductor must have the neutral..., circuit breaker, or fuse in the neutral conductor of the bus-tie feeder connecting the emergency... that aluminum grounding conductors must not be used....

  3. Enriched MU-Calculi Module Checking

    CERN Document Server

    Ferrante, Alessandro; Parente, Mimmo

    2008-01-01

    The model checking problem for open systems has been intensively studied in the literature, for both finite-state (module checking) and infinite-state (pushdown module checking) systems, with respect to Ctl and Ctl*. In this paper, we further investigate this problem with respect to the Mu-calculus enriched with nominals and graded modalities (hybrid graded Mu-calculus), in both the finite-state and infinite-state settings. Using an automata-theoretic approach, we show that hybrid graded Mu-calculus module checking is solvable in exponential time, while hybrid graded Mu-calculus pushdown module checking is solvable in double-exponential time. These results are also tight since they match the known lower bounds for Ctl. We also investigate the module checking problem with respect to the hybrid graded Mu-calculus enriched with inverse programs (Fully enriched Mu-calculus): by showing a reduction from the domino problem, we show its undecidability. We conclude with a short overview of the model checking problem ...

  4. Engineering Abstractions in Model Checking and Testing

    DEFF Research Database (Denmark)

    Achenbach, Michael; Ostermann, Klaus

    2009-01-01

    Abstractions are used in model checking to tackle problems like state space explosion or modeling of IO. The application of these abstractions in real software development processes, however, lacks engineering support. This is one reason why model checking is not widely used in practice yet...... and testing is still state of the art in falsification. We show how user-defined abstractions can be integrated into a Java PathFinder setting with tools like AspectJ or Javassist and discuss implications of remaining weaknesses of these tools. We believe that a principled engineering approach to designing...... and implementing abstractions will improve the applicability of model checking in practice....

  5. QuickChecking Static Analysis Properties

    DEFF Research Database (Denmark)

    Midtgaard, Jan; Møller, Anders

    2015-01-01

    , to verified fixed point checking. In this paper we demonstrate how quickchecking can be useful for testing a range of static analysis properties with limited effort. We show how to check a range of algebraic lattice properties, to help ensure that an implementation follows the formal specification...... of a lattice. Moreover, we offer a number of generic, type-safe combinators to check transfer functions and operators on lattices, to help ensure that these are, e.g., monotone, strict, or invariant. We substantiate our claims by quickchecking a type analysis for the Lua programming language...

  6. Symbolic Analysis of OTRAs-Based Circuits

    Directory of Open Access Journals (Sweden)

    C. Sánchez-López

    2011-04-01

    Full Text Available A new nullor-based model to describe the behavior of Operational Transresistance Amplifiers (OTRAs is introduced.The new model is composed of four nullors and three grounded resistors. As a consequence, standard nodal analysiscan be applied to compute fully-symbolic small-signal characteristics of OTRA-based analog circuits, and the nullorbasedOTRAs model can be used in CAD tools. In this manner, the fully-symbolic transfer functions of severalapplication circuits, such as filters and oscillators can easily be approximated.

  7. Resonant circuit model for efficient metamaterial absorber.

    Science.gov (United States)

    Sellier, Alexandre; Teperik, Tatiana V; de Lustrac, André

    2013-11-04

    The resonant absorption in a planar metamaterial is studied theoretically. We present a simple physical model describing this phenomenon in terms of equivalent resonant circuit. We discuss the role of radiative and dissipative damping of resonant mode supported by a metamaterial in the formation of absorption spectra. We show that the results of rigorous calculations of Maxwell equations can be fully retrieved with simple model describing the system in terms of equivalent resonant circuit. This simple model allows us to explain the total absorption effect observed in the system on a common physical ground by referring it to the impedance matching condition at the resonance.

  8. Health Check Tools: MedlinePlus

    Science.gov (United States)

    ... and Teen (Centers for Disease Control and Prevention) Osteoporosis Check Up On Your Bones (National Institute of ... Eye Discharge (DSHI Systems) Eye Redness (DSHI Systems) Pregnancy and Nutrition Daily Food Plan for Moms (Department ...

  9. CMM Interim Check Design of Experiments (U)

    Energy Technology Data Exchange (ETDEWEB)

    Montano, Joshua Daniel [Los Alamos National Lab. (LANL), Los Alamos, NM (United States)

    2015-07-29

    Coordinate Measuring Machines (CMM) are widely used in industry, throughout the Nuclear Weapons Complex and at Los Alamos National Laboratory (LANL) to verify part conformance to design definition. Calibration cycles for CMMs at LANL are predominantly one year in length and include a weekly interim check to reduce risk. The CMM interim check makes use of Renishaw’s Machine Checking Gauge which is an off-the-shelf product simulates a large sphere within a CMM’s measurement volume and allows for error estimation. As verification on the interim check process a design of experiments investigation was proposed to test a couple of key factors (location and inspector). The results from the two-factor factorial experiment proved that location influenced results more than the inspector or interaction.

  10. Check List: Are You a Gifted Principal?

    Science.gov (United States)

    Taylor, Vicki L.

    1984-01-01

    An 18-item check list is provided for principals to evaluate themselves relative to encouraging gifts and talents of their most able students. Suggestions are given in the areas of educational needs, specialized materials, and counseling. (MC)

  11. A Check List for the Reading Teacher.

    Science.gov (United States)

    Gemake, Josephine S.

    1979-01-01

    Presents a check list created by teachers to be used as an evaluation instrument in observations of reading laboratories in the New York City area. Reflects their ideas about the essential components of a remedial reading program. (FL)

  12. Computational fact checking from knowledge networks

    CERN Document Server

    Ciampaglia, Giovanni Luca; Rocha, Luis M; Bollen, Johan; Menczer, Filippo; Flammini, Alessandro

    2015-01-01

    Traditional fact checking by expert journalists cannot keep up with the enormous volume of information that is now generated online. Computational fact checking may significantly enhance our ability to evaluate the veracity of dubious information. Here we show that the complexities of human fact checking can be approximated quite well by finding the shortest path between concept nodes under properly defined semantic proximity metrics on knowledge graphs. Framed as a network problem this approach is feasible with efficient computational techniques. We evaluate this approach by examining tens of thousands of claims related to history, entertainment, geography, and biographical information using a public knowledge graph extracted from Wikipedia. Statements independently known to be true consistently receive higher support via our method than do false ones. These findings represent a significant step toward scalable computational fact-checking methods that may one day mitigate the spread of harmful misinformation...

  13. Notification: Purchase Card and Convenience Check Audit

    Science.gov (United States)

    Project #OA-FY13-0116, April 11, 2013. The U.S. Environmental Protection Agency, Office of Inspector General, is beginning the fieldwork phase of its audit of the agency’s purchase card and convenience check programs.

  14. Regenerative feedback resonant circuit

    Science.gov (United States)

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  15. Analog circuit design

    CERN Document Server

    Dobkin, Bob

    2012-01-01

    Analog circuit and system design today is more essential than ever before. With the growth of digital systems, wireless communications, complex industrial and automotive systems, designers are being challenged to develop sophisticated analog solutions. This comprehensive source book of circuit design solutions aids engineers with elegant and practical design techniques that focus on common analog challenges. The book's in-depth application examples provide insight into circuit design and application solutions that you can apply in today's demanding designs. <

  16. Parallelizing quantum circuit synthesis

    OpenAIRE

    Di Matteo, Olivia; Mosca, Michele

    2016-01-01

    Quantum circuit synthesis is the process in which an arbitrary unitary operation is decomposed into a sequence of gates from a universal set, typically one which a quantum computer can implement both efficiently and fault-tolerantly. As physical implementations of quantum computers improve, the need is growing for tools which can effectively synthesize components of the circuits and algorithms they will run. Existing algorithms for exact, multi-qubit circuit synthesis scale exponentially in t...

  17. Analog circuits cookbook

    CERN Document Server

    Hickman, Ian

    2013-01-01

    Analog Circuits Cookbook presents articles about advanced circuit techniques, components and concepts, useful IC for analog signal processing in the audio range, direct digital synthesis, and ingenious video op-amp. The book also includes articles about amplitude measurements on RF signals, linear optical imager, power supplies and devices, and RF circuits and techniques. Professionals and students of electrical engineering will find the book informative and useful.

  18. Perceived social presence reduces fact-checking

    OpenAIRE

    Jun, Youjung; Meng, Rachel; Johar, Gita Venkataramani

    2017-01-01

    The dissemination of unverified content (e.g., ���fake��� news) is a societal problem with influence that can acquire tremendous reach when propagated through social networks. This article examines how evaluating information in a social context affects fact-checking behavior. Across eight experiments, people fact-checked less often when they evaluated claims in a collective (e.g., group or social media) compared with an individual setting. Inducing momentary vigilance increased the rate of fa...

  19. Automated quality checks on repeat prescribing.

    OpenAIRE

    Rogers, Jeremy E; Wroe, Christopher J; Roberts, Angus; Swallow, Angela; Stables, David; Cantrill, Judith A; Rector, Alan L.

    2003-01-01

    BACKGROUND: Good clinical practice in primary care includes periodic review of repeat prescriptions. Markers of prescriptions that may need review have been described, but manually checking all repeat prescriptions against the markers would be impractical. AIM: To investigate the feasibility of computerising the application of repeat prescribing quality checks to electronic patient records in United Kingdom (UK) primary care. DESIGN OF STUDY: Software performance test against benchmark manual...

  20. Semantic Importance Sampling for Statistical Model Checking

    Science.gov (United States)

    2015-01-16

    approach called Statistical Model Checking (SMC) [16], which relies on Monte - Carlo -based simulations to solve this verification task more scalably...Conclusion Statistical model checking (SMC) is a prominent approach for rigorous analysis of stochastic systems using Monte - Carlo simulations. In this... Monte - Carlo simulations, for computing the bounded probability that a specific event occurs during a stochastic system’s execution. Estimating the

  1. Electronic devices and circuits

    CERN Document Server

    Pridham, Gordon John

    1968-01-01

    Electronic Devices and Circuits, Volume 1 deals with the design and applications of electronic devices and circuits such as passive components, diodes, triodes and transistors, rectification and power supplies, amplifying circuits, electronic instruments, and oscillators. These topics are supported with introductory network theory and physics. This volume is comprised of nine chapters and begins by explaining the operation of resistive, inductive, and capacitive elements in direct and alternating current circuits. The theory for some of the expressions quoted in later chapters is presented. Th

  2. CMOS circuits manual

    CERN Document Server

    Marston, R M

    1995-01-01

    CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu

  3. Circuits and filters handbook

    CERN Document Server

    Chen, Wai-Kai

    2003-01-01

    A bestseller in its first edition, The Circuits and Filters Handbook has been thoroughly updated to provide the most current, most comprehensive information available in both the classical and emerging fields of circuits and filters, both analog and digital. This edition contains 29 new chapters, with significant additions in the areas of computer-aided design, circuit simulation, VLSI circuits, design automation, and active and digital filters. It will undoubtedly take its place as the engineer's first choice in looking for solutions to problems encountered in the design, analysis, and behavi

  4. Timergenerator circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Timer/Generator Circuits Manual is an 11-chapter text that deals mainly with waveform generator techniques and circuits. Each chapter starts with an explanation of the basic principles of its subject followed by a wide range of practical circuit designs. This work presents a total of over 300 practical circuits, diagrams, and tables.Chapter 1 outlines the basic principles and the different types of generator. Chapters 2 to 9 deal with a specific type of waveform generator, including sine, square, triangular, sawtooth, and special waveform generators pulse. These chapters also include pulse gen

  5. Security electronics circuits manual

    CERN Document Server

    MARSTON, R M

    1998-01-01

    Security Electronics Circuits Manual is an invaluable guide for engineers and technicians in the security industry. It will also prove to be a useful guide for students and experimenters, as well as providing experienced amateurs and DIY enthusiasts with numerous ideas to protect their homes, businesses and properties.As with all Ray Marston's Circuits Manuals, the style is easy-to-read and non-mathematical, with the emphasis firmly on practical applications, circuits and design ideas. The ICs and other devices used in the practical circuits are modestly priced and readily available ty

  6. MOS integrated circuit design

    CERN Document Server

    Wolfendale, E

    2013-01-01

    MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

  7. Printed circuit board industry.

    Science.gov (United States)

    LaDou, Joseph

    2006-05-01

    The printed circuit board is the platform upon which microelectronic components such as semiconductor chips and capacitors are mounted. It provides the electrical interconnections between components and is found in virtually all electronics products. Once considered low technology, the printed circuit board is evolving into a high-technology product. Printed circuit board manufacturing is highly complicated, requiring large equipment investments and over 50 process steps. Many of the high-speed, miniaturized printed circuit boards are now manufactured in cleanrooms with the same health and safety problems posed by other microelectronics manufacturing. Asia produces three-fourths of the world's printed circuit boards. In Asian countries, glycol ethers are the major solvents used in the printed circuit board industry. Large quantities of hazardous chemicals such as formaldehyde, dimethylformamide, and lead are used by the printed circuit board industry. For decades, chemically intensive and often sloppy manufacturing processes exposed tens of thousands of workers to a large number of chemicals that are now known to be reproductive toxicants and carcinogens. The printed circuit board industry has exposed workers to high doses of toxic metals, solvents, acids, and photolithographic chemicals. Only recently has there been any serious effort to diminish the quantity of lead distributed worldwide by the printed circuit board industry. Billions of electronics products have been discarded in every region of the world. This paper summarizes recent regulatory and enforcement efforts.

  8. WE-E-BRB-10: DosCheck - an Electronic Chart Checking Tool for Dosimetrists.

    Science.gov (United States)

    Yang, D; Wu, Y; Yaddanapudi, S; Moore, K; Pierbuxg, B; Brame, S; Mutic, S

    2012-06-01

    In addition to treatment planning, dosimetrists have to prepare documentation and manually enter data in treatment management system (TMS) which did not transfer or setup automatically. The required documents and data are dependent on the disease site, treatment machine and clinical workflow. Errors and inconsistencies can cause redundant work, treatment delays and potentially treatment errors. To address these issues, an electronic checking software tool, DosCheck was clinically implemented to check the existence of necessary documentations and the integrity of manually-entered data. The purpose of this software is to reduce the frequency of human errors and to improve efficiency. DosCheck reads data and documents from 1) TMS, 2) Pinnacle TPS, and 3) DICOM plan files stored in a DICOM-RT PACS. It processes documents in Word and PDF format, treatment plan data in Pinnacle native format and DICOM format, and Mosaiq data in database records. The software cross-checks data accuracy and consistency by following rules that are pre-defined according to the clinical requirements and treatment sties. It interacts with dosimetrists and presents instantaneous results via graphical user interface. DosCheck has been implemented in C#. It performs a full check for a patient with 20 seconds. It has been clinically commissioned and is used daily by all dosimetrists at our institution. Retrospective analysis shows that DosCheck identifies 30% to 40% of previously reported dosimetrist human errors. Additional ∼30% errors are checked by other tools that could be integrated DosCheck in the near future. As an electronic data checking tool, DosCheck can obtain and process data and documents from multiple clinical computer systems in the radiation oncology department, and perform checks according to clinical rules. It is able to improve the accuracy and efficiency of clinical data and document process, and therefore to reduce any potential inconsistencies and errors. © 2012 American

  9. Synchronizing Hyperchaotic Circuits

    DEFF Research Database (Denmark)

    Tamasevicius, Arunas; Cenys, Antanas; Namajunas, Audrius

    1997-01-01

    Regarding possible applications to secure communications the technique of synchronizing hyperchaotic circuits with a single dynamical variable is discussed. Several specific examples including the fourth-order circuits with two positive Lyapunov exponents as well as the oscillator with a delay line...... characterized by multiple positive Lyapunov exponents are reviewd....

  10. Genetic circuit design automation.

    Science.gov (United States)

    Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

    2016-04-01

    Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization.

  11. A Virtual Circuits Lab

    Science.gov (United States)

    Vick, Matthew E.

    2010-01-01

    The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…

  12. Moderate-Density Parity-Check Codes

    CERN Document Server

    Ouzan, Samuel

    2009-01-01

    We propose a new type of short to moderate block-length, linear error-correcting codes, called moderate-density parity-check (MDPC) codes. The number of ones of the parity-check matrix of the codes presented is typically higher than the number of ones of the parity-check matrix of low-density parity-check (LDPC) codes. But, still lower than those of the parity-check matrix of classical block codes. The proposed MDPC codes are cyclic and are designed by constructing idempotents using cyclotomic cosets. The construction is simple and allows finding short block-length, high-rate codes with good minimum distance. Inspired by some recent iterative soft-input soft-output (SISO) decoders used in a context of classical block codes, we propose a low complexity, efficient, iterative decoder called Auto-Diversity (AD) decoder. AD decoder is based on belief propagation (BP) decoder and takes advantage of the fundamental property of automorphism group of the constructed cyclic code.

  13. Grounded theory.

    Science.gov (United States)

    Harris, Tina

    2015-04-29

    Grounded theory is a popular research approach in health care and the social sciences. This article provides a description of grounded theory methodology and its key components, using examples from published studies to demonstrate practical application. It aims to demystify grounded theory for novice nurse researchers, by explaining what it is, when to use it, why they would want to use it and how to use it. It should enable nurse researchers to decide if grounded theory is an appropriate approach for their research, and to determine the quality of any grounded theory research they read.

  14. Conductive surge testing of circuits and systems

    Science.gov (United States)

    Richman, P.

    1980-01-01

    Techniques are given for conductive surge testing of powered electronic equipment. The correct definitions of common and normal mode are presented. Testing requires not only spike-surge generators with a suitable range of open-circuit voltage and short-circuit current waveshapes, but also appropriate means, termed couplers, for connecting test surges to the equipment under test. Key among coupler design considerations is minimization of fail positives resulting from reduction in delivered surge energy due to the coupler. Back-filters and the lines on which they are necessary, are considered as well as ground-fault and ground potential rise. A method for monitoring delivered and resulting surge waves is mentioned.

  15. Simple system for locating ground loops.

    Science.gov (United States)

    Bellan, P M

    2007-06-01

    A simple low-cost system for rapid identification of the cables causing ground loops in complex instrumentation configurations is described. The system consists of an exciter module that generates a 100 kHz ground loop current and a detector module that determines which cable conducts this test current. Both the exciter and detector are magnetically coupled to the ground circuit so there is no physical contact to the instrumentation system under test.

  16. Approximate circuits for increased reliability

    Energy Technology Data Exchange (ETDEWEB)

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-08-18

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  17. Approximate circuits for increased reliability

    Energy Technology Data Exchange (ETDEWEB)

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-12-22

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  18. Static Checking of Interrupt-driven Software

    DEFF Research Database (Denmark)

    Brylow, Dennis; Damgaard, Niels; Palsberg, Jens

    2001-01-01

    in a few seconds on a standard PC. Our tool is one of the first to give an efficient and useful static analysis of assembly code. It enables increased confidence in correctness, significantly reduced testing requirements, and support for maintenance throughout the system life-cycle....... require extensive brute-force testing, making development and maintenance costly. This is particularly true for system components that are written in assembly language. Static checking has the potential of alleviating these problems, but until now there has been little tool support for programming...... fundamental safety and liveness properties. Our approach is based on a known algorithm for model checking of pushdown systems, and produces a control-flow graph annotated with information about time, space, safety, and liveness. Each benchmark is approximately 1000 lines of code, and the checking is done...

  19. Checking Timed Automata for Linear Duration Properties

    Institute of Scientific and Technical Information of China (English)

    赵建华

    2000-01-01

    It is proved in this paper that checking a timed automaton M with respect to a linear duration property D can be done by investigating only the integral timed states of M. An equivalence relation is introduced in this paper to divide the infinite number of integral timed states into finite number of equivalence classes. Based on this, a method is proposed for checking whether M satisfies D. In some cases, the number of equivalence classes is too large for a computer to manipulate. A technique for reducing the search-space for checking linear duration property is also described. This technique is more suitable for the case in this paper than those in the literature because most of those techniques are designed for reachability analysis.

  20. Glovebox pressure relief and check valve

    Energy Technology Data Exchange (ETDEWEB)

    Blaedel, K.L.

    1986-03-17

    This device is a combined pressure relief valve and check valve providing overpressure protection and preventing back flow into an inert atmosphere enclosure. The pressure relief is embodied by a submerged vent line in a mercury reservior, the releif pressure being a function of the submerged depth. The pressure relief can be vented into an exhaust system and the relieving pressure is only slightly influenced by the varying pressure in the exhaust system. The check valve is embodied by a ball which floats on the mercury column and contacts a seat whenever vacuum exists within the glovebox enclosure. Alternatively, the check valve is embodied by a vertical column of mercury, the maximum back pressure being a function of the height of the column of mercury.

  1. HCH for Checking Containment of XPath Fragment

    Institute of Scientific and Technical Information of China (English)

    Jian-Hua Feng; Yu-Guo Liao; Yong Zhang

    2007-01-01

    XPath is ubiquitous in XML applications for navigating XML trees and selecting a set of element nodes. In XPath query processing, one of the most important issues is how to efficiently check containment relationship between two XPath expressions. To get out of the intricacy and complexity caused by numerous XPath features, we investigate this issue on a frequently used fragment of XPath expressions that consists of node tests, the child axis (/), the descendant axis (//), branches ([]) and label wildcards (*). Prior work has shown that homomorphism technology can be used for containment checking. However, homomorphism is the sufficient but not necessary condition for containment. For special classes of this fragment, the homomorphism algorithm returns false negatives. To address this problem, this paper proposes two containment techniques, conditioned homomorphism and hidden conditioned homomorphism, and then presents sound algorithms for checking containment. Experimental results confirm the practicability and efficiency of the proposed algorithms.

  2. Graded CTL Model Checking for Test Generation

    CERN Document Server

    Napoli, Margherita

    2011-01-01

    Recently there has been a great attention from the scientific community towards the use of the model-checking technique as a tool for test generation in the simulation field. This paper aims to provide a useful mean to get more insights along these lines. By applying recent results in the field of graded temporal logics, we present a new efficient model-checking algorithm for Hierarchical Finite State Machines (HSM), a well established symbolism long and widely used for representing hierarchical models of discrete systems. Performing model-checking against specifications expressed using graded temporal logics has the peculiarity of returning more counterexamples within a unique run. We think that this can greatly improve the efficacy of automatically getting test cases. In particular we verify two different models of HSM against branching time temporal properties.

  3. Check In / Check Out. The Public Space as an Internet of Things

    NARCIS (Netherlands)

    van t Hof, C.C.G.; van Est, R.; Daemen, F.

    2011-01-01

    Mobile phones, public transport smart cards, security cameras and GPS systems in our car - we are surrounded by digital devices. They track us, guide us, help us, and control us. The book Check In / Check Out. The Public Space as an Internet of Things shows us how our digital and physical worlds are

  4. The Effects of Check-In/Check-Out on Kindergarten Students in an Urban Setting

    Science.gov (United States)

    Sobalvarro, Adriana; Graves, Scott L., Jr.; Hughes, Tammy

    2016-01-01

    The purpose of this project was to investigate the effectiveness of Check-in/Check-out (CICO), a targeted behavioral intervention, on reducing the problem behaviors of kindergarten students in an urban setting. Participants were referred by their teacher for exhibiting disruptive classroom behaviors, which resulted in classroom removal. Results…

  5. Check In / Check Out. The Public Space as an Internet of Things

    NARCIS (Netherlands)

    van t Hof, C.C.G.; van Est, R.; Daemen, F.

    2011-01-01

    Mobile phones, public transport smart cards, security cameras and GPS systems in our car - we are surrounded by digital devices. They track us, guide us, help us, and control us. The book Check In / Check Out. The Public Space as an Internet of Things shows us how our digital and physical worlds are

  6. Can i just check...? Effects of edit check questions on measurement error and survey estimates

    NARCIS (Netherlands)

    Lugtig, Peter; Jäckle, Annette

    2014-01-01

    Household income is difficult to measure, since it requires the collection of information about all potential income sources for each member of a household.Weassess the effects of two types of edit check questions on measurement error and survey estimates: within-wave edit checks use responses to

  7. Adaptable Assertion Checking for Scientific Software Components

    Energy Technology Data Exchange (ETDEWEB)

    Dahlgren, T L; Devanbu, P T

    2004-03-12

    We present a proposal for lowering the overhead of interface contract checking for science and engineering applications. Run-time enforcement of assertions is a well-known technique for improving the quality of software; however, the performance penalty is often too high for their retention during deployment, especially for long-running applications that depend upon iterative operations. With an efficient adaptive approach the benefits of run-time checking can continue to accrue with minimal overhead. Examples from scientific software interfaces being developed in the high performance computing research community will be used to measure the efficiency and effectiveness of this approach.

  8. Consistency Checking of Web Service Contracts

    DEFF Research Database (Denmark)

    Cambronero, M. Emilia; Okika, Joseph C.; Ravn, Anders Peter

    2008-01-01

    Behavioural properties are analyzed for web service contracts formulated in Business Process Execution Language (BPEL) and Choreography Description Language (CDL). The key result reported is an automated technique to check consistency between protocol aspects of the contracts. The contracts...... are abstracted to (timed) automata and from there a simulation is set up, which is checked using automated tools for analyzing networks of finite state processes. Here we use the Concurrency Work Bench. The proposed techniques are illustrated with a case study that include otherwise difficult to analyze fault...

  9. A Method for Model Checking Feature Interactions

    DEFF Research Database (Denmark)

    Pedersen, Thomas; Le Guilly, Thibaut; Ravn, Anders Peter;

    2015-01-01

    This paper presents a method to check for feature interactions in a system assembled from independently developed concurrent processes as found in many reactive systems. The method combines and refines existing definitions and adds a set of activities. The activities describe how to populate the ...... the definitions with models to ensure that all interactions are captured. The method is illustrated on a home automation example with model checking as analysis tool. In particular, the modelling formalism is timed automata and the analysis uses UPPAAL to find interactions....

  10. "Check, Change What You Need to Change and/or Keep What You Want": An Art Therapy Neurobiological-Based Trauma Protocol

    Science.gov (United States)

    Hass-Cohen, Noah; Clyde Findlay, Joanna; Carr, Richard; Vanderlan, Jessica

    2014-01-01

    The Check ("Check, Change What You Need To Change and/or Keep What You Want") art therapy protocol is a sequence of directives for treating trauma that is grounded in neurobiological theory and designed to facilitate trauma narrative processing, autobiographical coherency, and the rebalancing of dysregulated responses to psychosocial…

  11. "Check, Change What You Need to Change and/or Keep What You Want": An Art Therapy Neurobiological-Based Trauma Protocol

    Science.gov (United States)

    Hass-Cohen, Noah; Clyde Findlay, Joanna; Carr, Richard; Vanderlan, Jessica

    2014-01-01

    The Check ("Check, Change What You Need To Change and/or Keep What You Want") art therapy protocol is a sequence of directives for treating trauma that is grounded in neurobiological theory and designed to facilitate trauma narrative processing, autobiographical coherency, and the rebalancing of dysregulated responses to psychosocial…

  12. Plasmonic Nanoguides and Circuits

    CERN Document Server

    Bozhevolnyi, Sergey

    2008-01-01

    Modern communication systems dealing with huge amounts of data at ever increasing speed try to utilize the best aspects of electronic and optical circuits. Electronic circuits are tiny but their operation speed is limited, whereas optical circuits are extremely fast but their sizes are limited by diffraction. Waveguide components utilizing surface plasmon (SP) modes were found to combine the huge optical bandwidth and compactness of electronics, and plasmonics thereby began to be considered as the next chip-scale technology. In this book, the authors concentrate on the SP waveguide configurati

  13. Optoelectronics circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Optoelectronics Circuits Manual covers the basic principles and characteristics of the best known types of optoelectronic devices, as well as the practical applications of many of these optoelectronic devices. The book describes LED display circuits and LED dot- and bar-graph circuits and discusses the applications of seven-segment displays, light-sensitive devices, optocouplers, and a variety of brightness control techniques. The text also tackles infrared light-beam alarms and multichannel remote control systems. The book provides practical user information and circuitry and illustrations.

  14. Circuit analysis with Multisim

    CERN Document Server

    Baez-Lopez, David

    2011-01-01

    This book is concerned with circuit simulation using National Instruments Multisim. It focuses on the use and comprehension of the working techniques for electrical and electronic circuit simulation. The first chapters are devoted to basic circuit analysis.It starts by describing in detail how to perform a DC analysis using only resistors and independent and controlled sources. Then, it introduces capacitors and inductors to make a transient analysis. In the case of transient analysis, it is possible to have an initial condition either in the capacitor voltage or in the inductor current, or bo

  15. Modern TTL circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Modern TTL Circuits Manual provides an introduction to the basic principles of Transistor-Transistor Logic (TTL). This book outlines the major features of the 74 series of integrated circuits (ICs) and introduces the various sub-groups of the TTL family.Organized into seven chapters, this book begins with an overview of the basics of digital ICs. This text then examines the symbology and mathematics of digital logic. Other chapters consider a variety of topics, including waveform generator circuitry, clocked flip-flop and counter circuits, special counter/dividers, registers, data latches, com

  16. Pragmatic circuits frequency domain

    CERN Document Server

    Eccles, William

    2006-01-01

    Pragmatic Circuits: Frequency Domain goes through the Laplace transform to get from the time domain to topics that include the s-plane, Bode diagrams, and the sinusoidal steady state. This second of three volumes ends with a-c power, which, although it is just a special case of the sinusoidal steady state, is an important topic with unique techniques and terminology. Pragmatic Circuits: Frequency Domain is focused on the frequency domain. In other words, time will no longer be the independent variable in our analysis. The two other volumes in the Pragmatic Circuits series include titles on DC

  17. Gallium Arsenide Domino Circuit

    Science.gov (United States)

    Yang, Long; Long, Stephen I.

    1990-01-01

    Advantages include reduced power and high speed. Experimental gallium arsenide field-effect-transistor (FET) domino circuit replicated in large numbers for use in dynamic-logic systems. Name of circuit denotes mode of operation, which logic signals propagate from each stage to next when successive stages operated at slightly staggered clock cycles, in manner reminiscent of dominoes falling in a row. Building block of domino circuit includes input, inverter, and level-shifting substages. Combinational logic executed in input substage. During low half of clock cycle, result of logic operation transmitted to following stage.

  18. Troubleshooting analog circuits

    CERN Document Server

    Pease, Robert A

    1991-01-01

    Troubleshooting Analog Circuits is a guidebook for solving product or process related problems in analog circuits. The book also provides advice in selecting equipment, preventing problems, and general tips. The coverage of the book includes the philosophy of troubleshooting; the modes of failure of various components; and preventive measures. The text also deals with the active components of analog circuits, including diodes and rectifiers, optically coupled devices, solar cells, and batteries. The book will be of great use to both students and practitioners of electronics engineering. Other

  19. Monolithic microwave integrated circuits

    Science.gov (United States)

    Pucel, R. A.

    Monolithic microwave integrated circuits (MMICs), a new microwave technology which is expected to exert a profound influence on microwave circuit designs for future military systems as well as for the commercial and consumer markets, is discussed. The book contains an historical discussion followed by a comprehensive review presenting the current status in the field. The general topics of the volume are: design considerations, materials and processing considerations, monolithic circuit applications, and CAD, measurement, and packaging techniques. All phases of MMIC technology are covered, from design to testing.

  20. Printed circuit board impedance matching step for microwave (millimeter wave) devices

    Science.gov (United States)

    Pao, Hsueh-Yuan; Aguirre, Jerardo; Sargis, Paul

    2013-10-01

    An impedance matching ground plane step, in conjunction with a quarter wave transformer section, in a printed circuit board provides a broadband microwave matching transition from board connectors or other elements that require thin substrates to thick substrate (>quarter wavelength) broadband microwave (millimeter wave) devices. A method of constructing microwave and other high frequency electrical circuits on a substrate of uniform thickness, where the circuit is formed of a plurality of interconnected elements of different impedances that individually require substrates of different thicknesses, by providing a substrate of uniform thickness that is a composite or multilayered substrate; and forming a pattern of intermediate ground planes or impedance matching steps interconnected by vias located under various parts of the circuit where components of different impedances are located so that each part of the circuit has a ground plane substrate thickness that is optimum while the entire circuit is formed on a substrate of uniform thickness.

  1. Model Checking Degrees of Belief in a System of Agents

    Science.gov (United States)

    Raimondi, Franco; Primero, Giuseppe; Rungta, Neha

    2014-01-01

    Reasoning about degrees of belief has been investigated in the past by a number of authors and has a number of practical applications in real life. In this paper we present a unified framework to model and verify degrees of belief in a system of agents. In particular, we describe an extension of the temporal-epistemic logic CTLK and we introduce a semantics based on interpreted systems for this extension. In this way, degrees of beliefs do not need to be provided externally, but can be derived automatically from the possible executions of the system, thereby providing a computationally grounded formalism. We leverage the semantics to (a) construct a model checking algorithm, (b) investigate its complexity, (c) provide a Java implementation of the model checking algorithm, and (d) evaluate our approach using the standard benchmark of the dining cryptographers. Finally, we provide a detailed case study: using our framework and our implementation, we assess and verify the situational awareness of the pilot of Air France 447 flying in off-nominal conditions.

  2. 110 kV双回线路管型复合材料杆避雷线架设与接地方案研究%Erection Scheme of Overhead Grounding Wire on Composite Material Pole and Its Grounding for 110 kV Double Circuit Overhead Transmission Lines

    Institute of Scientific and Technical Information of China (English)

    李志军; 陈维江; 戴敏; 李志政; 李汉明; 邓世聪

    2014-01-01

    我国学者尝试在雷电活动强烈、污秽严重地区的110 kV架空线路应用复合材料绝缘杆,以提高相对地空气间隙距离和爬电距离。然而绝缘水平的提高,复合材料杆还是否需要架设避雷线以及避雷线接地引下线,是防雷面临的关键技术问题之一。针对典型110 kV复合材料杆,对比研究未架设避雷线的复合材料杆与架设避雷线的同电压等级、相同导线高度铁塔线路的雷电性能,考虑2种杆塔线路引雷能力、雷电冲击绝缘强度以及建弧率等因素的差异,发现:2种杆塔线路引雷能力间的差异可以忽略;未架设避雷线的复合材料杆雷电冲击绝缘强度是铁塔的3.5倍,建弧率为铁塔的53%,但是反击耐雷水平仅为24.5 kA,雷击跳闸率高达1.13次/(100 km⋅a),均明显劣于铁塔。据此,推荐110 kV复合材料杆架设避雷线。然后,对比估算避雷线不同接地方案下雷电性能的差异发现:避雷线若不经引下线接地,则复合材料杆雷电性能明显劣于铁塔,但若经引下线逐杆接地,则雷电性能显著优于铁塔。因此,提出避雷线应逐杆接地。综上所述,110 kV 复合材料杆线路防雷接地方案应当采用架设避雷线,且通过金属引下线逐杆接地的设计。%It is attempted for Chinese scholars to apply insulation pole composed of composite material in the erection of 110 kV overhead transmission lines located at the regions with strong lightning activity and/or serious pollution to enhance the phase-to-ground air gap distance and creepage distance effectively. However, with the enhancement of insulation level whether the overhead ground wire should be erected on the composite material pole as well as its grounding downlead should be equipped are key problems that the lightning protection technology has to be faced with. As to the composite material pole for 110 kV transmission lines, the lightning

  3. Grounded cognition.

    Science.gov (United States)

    Barsalou, Lawrence W

    2008-01-01

    Grounded cognition rejects traditional views that cognition is computation on amodal symbols in a modular system, independent of the brain's modal systems for perception, action, and introspection. Instead, grounded cognition proposes that modal simulations, bodily states, and situated action underlie cognition. Accumulating behavioral and neural evidence supporting this view is reviewed from research on perception, memory, knowledge, language, thought, social cognition, and development. Theories of grounded cognition are also reviewed, as are origins of the area and common misperceptions of it. Theoretical, empirical, and methodological issues are raised whose future treatment is likely to affect the growth and impact of grounded cognition.

  4. Printed circuit for ATLAS

    CERN Multimedia

    Laurent Guiraud

    1999-01-01

    A printed circuit board made by scientists in the ATLAS collaboration for the transition radiaton tracker (TRT). This will read data produced when a high energy particle crosses the boundary between two materials with different electrical properties.

  5. Latching overcurrent circuit breaker

    Science.gov (United States)

    Moore, M. L.

    1970-01-01

    Circuit breaker consists of a preset current amplitude sensor, and a lamp-photo-resistor combination in a feedback arrangement which energizes a power switching relay. The ac input power is removed from the load at predetermined current amplitudes.

  6. High temperature circuit breaker

    Science.gov (United States)

    Edwards, R. N.; Travis, E. F.

    1970-01-01

    Alternating current circuit breaker is suitable for reliable long-term service at 1000 deg F in the vacuum conditions of outer space. Construction materials are resistant to nuclear radiation and vacuum welding. Service test conditions and results are given.

  7. Model Checking as Static Analysis: Revisited

    DEFF Research Database (Denmark)

    Zhang, Fuyuan; Nielson, Flemming; Nielson, Hanne Riis

    2012-01-01

    We show that the model checking problem of the μ-calculus can be viewed as an instance of static analysis. We propose Succinct Fixed Point Logic (SFP) within our logical approach to static analysis as an extension of Alternation-free Least Fixed Logic (ALFP). We generalize the notion...

  8. Incremental Integrity Checking: Limitations and Possibilities

    DEFF Research Database (Denmark)

    Christiansen, Henning; Martinenghi, Davide

    2005-01-01

    to query containment, we show that no procedure exists that always returns the best incremental test (aka simplification of integrity constraints), and this according to any reasonable criterion measuring the checking effort. In spite of this theoretical limitation, we develop an effective procedure...

  9. Posterior Predictive Model Checking in Bayesian Networks

    Science.gov (United States)

    Crawford, Aaron

    2014-01-01

    This simulation study compared the utility of various discrepancy measures within a posterior predictive model checking (PPMC) framework for detecting different types of data-model misfit in multidimensional Bayesian network (BN) models. The investigated conditions were motivated by an applied research program utilizing an operational complex…

  10. Software Model Checking for Verifying Distributed Algorithms

    Science.gov (United States)

    2014-10-28

    Verification procedure is an intelligent exhaustive search of the state space of the design Model Checking 6 Verifying Synchronous Distributed App...Distributed App Sagar Chaki, June 11, 2014 © 2014 Carnegie Mellon University Tool Usage Project webpage (http://mcda.googlecode.com) • Tutorial

  11. Inkjet 3D printed check microvalve

    Science.gov (United States)

    Walczak, Rafał; Adamski, Krzysztof; Lizanets, Danylo

    2017-04-01

    3D printing enables fast and relatively easy fabrication of various microfluidic structures including microvalves. A check microvalve is the simplest valve enabling control of the fluid flow in microchannels. Proper operation of the check valve is ensured by a movable element that tightens the valve seat during backward flow and enables free flow for forward pressure. Thus, knowledge of the mechanical properties of the movable element is crucial for optimal design and operation of the valve. In this paper, we present for the first time the results of investigations on basic mechanical properties of the building material used in multijet 3D printing. Specified mechanical properties were used in the design and fabrication of two types of check microvalve—with deflecting or hinge-fixed microflap—with 200 µm and 300 µm thickness. Results of numerical simulation and experimental data of the microflap deflection were obtained and compared. The valves were successfully 3D printed and characterised. Opening/closing characteristics of the microvalve for forward and backward pressures were determined. Thus, proper operation of the check microvalve so developed was confirmed.

  12. 25 CFR 141.19 - Check cashing.

    Science.gov (United States)

    2010-04-01

    ... INDIAN AFFAIRS, DEPARTMENT OF THE INTERIOR FINANCIAL ACTIVITIES BUSINESS PRACTICES ON THE NAVAJO, HOPI AND ZUNI RESERVATIONS General Business Practices § 141.19 Check cashing. (a) A reservation business... order. A reservation business may not give scrip, credit or other substitute for U.S. currency...

  13. A Method for Model Checking Feature Interactions

    DEFF Research Database (Denmark)

    Pedersen, Thomas; Le Guilly, Thibaut; Ravn, Anders Peter

    2015-01-01

    This paper presents a method to check for feature interactions in a system assembled from independently developed concurrent processes as found in many reactive systems. The method combines and refines existing definitions and adds a set of activities. The activities describe how to populate the ...

  14. Model checking Quasi Birth Death processes

    NARCIS (Netherlands)

    Remke, A.K.I.

    2004-01-01

    Quasi-Birth Death processes (QBDs) are a special class of infinite state CTMCs that combines a large degree of modeling expressiveness with efficient solution methods. This work adapts the well-known stochastic logic CSL for use on QBDs as CSL and presents model checking algorithms for so-called lev

  15. Check list of European Hymenomycetous Heterobasidiae

    NARCIS (Netherlands)

    Donk, M.A.

    1966-01-01

    With this check list an attempt is made to account for the recorded European species of those Basidiomycetes that Patouillard called the “Hétérobasidies”, excluding, however, the Uredinales and Ustilaginales. Therefore, it covers the Septobasidiales, Tremellales (comprising the Auriculariineae and T

  16. Inadequate preanesthesia equipment checks in a simulator.

    Science.gov (United States)

    Armstrong-Brown, A; Devitt, J H; Kurrek, M; Cohen, M

    2000-10-01

    To assess how completely anesthesiologists check their machinery and equipment before use, and to determine what influence seniority, age and type of practice may have on checking practices. One hundred and twenty anesthesiologists were videotaped during a simulated anesthesia session. Each participant was scored by an assessor according to the number of items checked prior to the induction of anesthesia. A checklist of 20 items derived from well-publicized, international standards was used. Participants were grouped according to their type of practice. Overall, mean scores were low. The ideal score was 20. There were no differences among university anesthesiologists (mean score 10.1, standard deviation 4.3), community anesthesiologists (7.5 +/- 4.3) and anesthesia residents (9.0 +/- 3.8). Each of these groups scored, on average, better than medical students (3.6 +/- 3.7) (P 0.1) nor number of years in practice (r = -0.18, P > 0.1) correlated with score. Our study suggests that the equipment-checking practices of anesthesiologists require considerable improvement when compared with national and international standards. Possible reasons for this are discussed and some remedial suggestions are made.

  17. Efficient CSL Model Checking Using Stratification

    DEFF Research Database (Denmark)

    Zhang, Lijun; Jansen, David N.; Nielson, Flemming;

    2012-01-01

    For continuous-time Markov chains, the model-checking problem with respect to continuous-time stochastic logic (CSL) has been introduced and shown to be decidable by Aziz, Sanwal, Singhal and Brayton in 1996 [ 1, 2]. Their proof can be turned into an approximation algorithm with worse than expone...

  18. Automata-Based CSL Model Checking

    DEFF Research Database (Denmark)

    Zhang, Lijun; Jansen, David N.; Nielson, Flemming;

    2011-01-01

    For continuous-time Markov chains, the model-checking problem with respect to continuous-time stochastic logic (CSL) has been introduced and shown to be decidable by Aziz, Sanwal, Singhal and Brayton in 1996. The presented decision procedure, however, has exponential complexity. In this paper, we...

  19. Model checking timed automata : techniques and applications

    NARCIS (Netherlands)

    Hendriks, Martijn.

    2006-01-01

    Model checking is a technique to automatically analyse systems that have been modeled in a formal language. The timed automaton framework is such a formal language. It is suitable to model many realistic problems in which time plays a central role. Examples are distributed algorithms, protocols, emb

  20. Model Checking Software Systems: A Case Study.

    Science.gov (United States)

    1995-03-10

    gained. We suggest a radically different tack: model checking. The two formal objects compared are a finite state machine model of the software...simply terminates. 3.1.1. State Machine Model Let’s consider a simplified model with just one client, one server, and one file. The top graph

  1. Anchor Stress Checking of Security Injection Tank

    Institute of Scientific and Technical Information of China (English)

    2011-01-01

    The intention of the calculating is to check the anchor stresses of the security injection tank to know whether the stress is satisfied the code requirements on the basis of all the reaction forces gained in the static, seismic and thermal stress results.

  2. Statistical Model Checking for Stochastic Hybrid Systems

    DEFF Research Database (Denmark)

    David, Alexandre; Du, Dehui; Larsen, Kim Guldstrand

    2012-01-01

    This paper presents novel extensions and applications of the UPPAAL-SMC model checker. The extensions allow for statistical model checking of stochastic hybrid systems. We show how our race-based stochastic semantics extends to networks of hybrid systems, and indicate the integration technique ap...

  3. Type checking with open type functions

    DEFF Research Database (Denmark)

    Schrijvers, Tom; Jones, Simon Peyton; Chakravarty, Manual

    2008-01-01

    We report on an extension of Haskell with open type-level functions and equality constraints that unifies earlier work on GADTs, functional dependencies, and associated types. The contribution of the paper is that we identify and characterise the key technical challenge of entailment checking; an...

  4. Model checking the HAVi leader election protocol

    NARCIS (Netherlands)

    Romijn, J.M.T.

    1999-01-01

    The HAVi specification proposes an architecture for audio/video interoperability in home networks. Part of the HAVi specification is a distributed leader election protocol. We have modelled this leader election protocol in Promela and Lotos and have checked several properties with the tools Spin a

  5. Overriding Faulty Circuit Breakers

    Science.gov (United States)

    Robbins, Richard L.; Pierson, Thomas E.

    1987-01-01

    Retainer keeps power on in emergency. Simple mechanical device attaches to failed aircraft-type push/pull circuit breaker to restore electrical power temporarily until breaker replaced. Device holds push/pull button in closed position; unnecessary for crewmember to hold button in position by continual finger pressure. Sleeve and plug hold button in, overriding mechanical failure in circuit breaker. Windows in sleeve show button position.

  6. 12 CFR 229.51 - General provisions governing substitute checks.

    Science.gov (United States)

    2010-01-01

    ... which a bank has provided the warranties described in § 229.52 is the legal equivalent of an original... indorsements applied by parties that previously handled the check in any form (including the original check, a substitute check, or another paper or electronic representation of such original check or substitute...

  7. 14 CFR 121.315 - Cockpit check procedure.

    Science.gov (United States)

    2010-01-01

    ... 14 Aeronautics and Space 3 2010-01-01 2010-01-01 false Cockpit check procedure. 121.315 Section... Cockpit check procedure. (a) Each certificate holder shall provide an approved cockpit check procedure for... for items to be checked. (c) The approved procedures must be readily usable in the cockpit of...

  8. Heterogeneous photonic integrated circuits

    Science.gov (United States)

    Fang, Alexander W.; Fish, Gregory; Hall, Eric

    2012-01-01

    Photonic Integrated Circuits (PICs) have been dichotomized into circuits with high passive content (silica and silicon PLCs) and high active content (InP tunable lasers and transceivers) due to the trade-off in material characteristics used within these two classes. This has led to restrictions in the adoption of PICs to systems in which only one of the two classes of circuits are required to be made on a singular chip. Much work has been done to create convergence in these two classes by either engineering the materials to achieve the functionality of both device types on a single platform, or in epitaxial growth techniques to transfer one material to the next, but have yet to demonstrate performance equal to that of components fabricated in their native substrates. Advances in waferbonding techniques have led to a new class of heterogeneously integrated photonic circuits that allow for the concurrent use of active and passive materials within a photonic circuit, realizing components on a transferred substrate that have equivalent performance as their native substrate. In this talk, we review and compare advances made in heterogeneous integration along with demonstrations of components and circuits enabled by this technology.

  9. Quality Checking for Multi-GNSS Data

    Science.gov (United States)

    Soehne, Wolfgang; Mervart, Leos; Ruelke, Axel; Stuerze, Andrea; Weber, Georg

    2015-04-01

    Quality checking of GNSS observations has a long tradition within the international GNSS community. For example, the RINEX files provided by the International GNSS Service (IGS) and IAG sub-commissions dealing with GNSS have been routinely checked with the tool teqc (Translation, Editing and Quality Checking (Estey & Meertens, 1999)). Data Centres like the regional GNSS data centre at the Federal Agency for Cartography and Geodesy (BKG) are relying on such tools. With upcoming new GNSS like BeiDou or Galileo and new regional systems like QZSS or IRNSS and growing number of Satellite-Based Augmentation Systems (SBAS), new signals and frequencies, and new formats like RTCM-MSM and RINEX 3 the need for flexible quality checking tools is arising. The IGS is keeping the pace with his initiative on multi-GNSS (MGEX) which is focusing on the use of the GNSS beyond the established GPS and GLONASS and with the establishment of a new working group on data quality control. Together with the Technical University of Prague (CTU) BKG has been developing the tool BKG Ntrip Client (BNC). Initially started as a tool for providing real-time navigational and observational data and derived products to the user BNC has been subsequently extended, e.g. by precise point positioning (PPP) and by post-processing capabilities. In the near past special features for editing and quality control have been established, e.g. for multipath analyses (MP) and signal-to-noise ratio (SNR). In this presentation, we will demonstrate the various features of BNC for quality control. Examples especially for multi-GNSS data will be shown. Potential usage for the open GNSS community will be outlined. Some proposals for a unified ASCII output to facilitate usage of different software tools on quality checking will finalize the presentation.

  10. The Dynamic Checking of Complex Real Time System

    Institute of Scientific and Technical Information of China (English)

    YU Chao; HUANG Benwen; WU Guoqing

    2006-01-01

    The paper presents an dynamic execution model of complex real-time software based on requirement description model RTRSM, and then propose a checking method based on configuration covering and its corresponding algorithm. This checking method can check the execution situations between parallel elements in a dynamic execution step of real-time software systems. It also can check all the states and transitions which assure the completeness of checking. In the end, related theorem is proofed.

  11. Circuit simulation: some humbling thoughts

    Energy Technology Data Exchange (ETDEWEB)

    Wendt, Manfred; /Fermilab

    2006-01-01

    A short, very personal note on circuit simulation is presented. It does neither include theoretical background on circuit simulation, nor offers an overview of available software, but just gives some general remarks for a discussion on circuit simulator needs in context to the design and development of accelerator beam instrumentation circuits and systems.

  12. Low latency asynchronous interface circuits

    Energy Technology Data Exchange (ETDEWEB)

    Sadowski, Greg

    2017-06-20

    In one form, a logic circuit includes an asynchronous logic circuit, a synchronous logic circuit, and an interface circuit coupled between the asynchronous logic circuit and the synchronous logic circuit. The asynchronous logic circuit has a plurality of asynchronous outputs for providing a corresponding plurality of asynchronous signals. The synchronous logic circuit has a plurality of synchronous inputs corresponding to the plurality of asynchronous outputs, a stretch input for receiving a stretch signal, and a clock output for providing a clock signal. The synchronous logic circuit provides the clock signal as a periodic signal but prolongs a predetermined state of the clock signal while the stretch signal is active. The asynchronous interface detects whether metastability could occur when latching any of the plurality of the asynchronous outputs of the asynchronous logic circuit using said clock signal, and activates the stretch signal while the metastability could occur.

  13. 32 CFR Attachment A to Subpart B... - Standard A-National Agency Check With Local Agency Checks and Credit Check (NACLC)

    Science.gov (United States)

    2010-07-01

    ... Access Programs by sect. 4.4 of Executive Order 12958) (60 FR 19825, 3 CFR 1995 Comp., p. 333); (2) “L... Agency Checks and Credit Check (NACLC) A Attachment A to Subpart B of Part 147 National Defense..., Subpt. B, Att. A Attachment A to Subpart B of Part 147—Standard A—National Agency Check With...

  14. Effective electromagnetic shielding in multilayer printed circuit boards

    Science.gov (United States)

    Wiles, K. G.; Moe, J. L.

    Multilayer printed circuit boards have proven to be recurrent abettors of electromagnetic coupling problems created by the incessantly faster response times in integrated circuit technologies. Coupling within multilayer boards has not only inhibited meeting certain EMI requirements but has also precipitated 'self-inflicted' malfunctions commonly experienced during development of avionic systems. A recent avionic system, interfacing two asynchronous processors through a fourteen-layer motherboard, permitted coupling through ground plane connector apertures of sufficient amplitude and duration as to cause unintentional intercommunication and system malfunctions. The coupling mechanism and ground plane modifications which reduced this coupling by 40 dB and eliminated the incompatibility are discussed in this paper

  15. Check-Up Checklist: Things to Do Before Your Next Check-Up

    Science.gov (United States)

    ... Be Safe on Halloween Be Smoke-Free Check Alarm Batteries Know Your Family History Keep Foods Safe ... or skin changes? Are you having pain, dizziness, fatigue, problems with urine or stool, or menstrual cycle ...

  16. A semiconductor laser excitation circuit

    Energy Technology Data Exchange (ETDEWEB)

    Kaadzunari, O.; Masaty, K.

    1984-03-27

    A semiconductor laser excitation circuit is patented that is designed for operation in a pulsed mode with a high pulse repetition frequency. This circuit includes, in addition to a semiconductor laser, a high speed photodetector, a reference voltage source, a comparator, and a pulse oscillator and modulator. If the circuit is built using standard silicon integrated circuits, its speed amounts to several hundred megahertz, if it is constructed using gallium arsenide integrated circuits, its speed is several gigahertz.

  17. Perceived social presence reduces fact-checking.

    Science.gov (United States)

    Jun, Youjung; Meng, Rachel; Johar, Gita Venkataramani

    2017-06-06

    Today's media landscape affords people access to richer information than ever before, with many individuals opting to consume content through social channels rather than traditional news sources. Although people frequent social platforms for a variety of reasons, we understand little about the consequences of encountering new information in these contexts, particularly with respect to how content is scrutinized. This research tests how perceiving the presence of others (as on social media platforms) affects the way that individuals evaluate information-in particular, the extent to which they verify ambiguous claims. Eight experiments using incentivized real effort tasks found that people are less likely to fact-check statements when they feel that they are evaluating them in the presence of others compared with when they are evaluating them alone. Inducing vigilance immediately before evaluation increased fact-checking under social settings.

  18. Check-Operators and Quantum Spectral Curves

    Science.gov (United States)

    Mironov, Andrei; Morozov, Alexei

    2017-06-01

    We review the basic properties of effective actions of families of theories (i.e., the actions depending on additional non-perturbative moduli along with perturbative couplings), and their description in terms of operators (called check-operators), which act on the moduli space. It is this approach that led to constructing the (quantum) spectral curves and what is now nicknamed the EO/AMM topological recursion. We explain how the non-commutative algebra of check-operators is related to the modular kernels and how symplectic (special) geometry emerges from it in the classical (Seiberg-Witten) limit, where the quantum integrable structures turn into the well studied classical integrability. As time goes, these results turn applicable to more and more theories of physical importance, supporting the old idea that many universality classes of low-energy effective theories contain matrix model representatives.

  19. Model Checking with Probabilistic Tabled Logic Programming

    CERN Document Server

    Gorlin, Andrey; Smolka, Scott A

    2012-01-01

    We present a formulation of the problem of probabilistic model checking as one of query evaluation over probabilistic logic programs. To the best of our knowledge, our formulation is the first of its kind, and it covers a rich class of probabilistic models and probabilistic temporal logics. The inference algorithms of existing probabilistic logic-programming systems are well defined only for queries with a finite number of explanations. This restriction prohibits the encoding of probabilistic model checkers, where explanations correspond to executions of the system being model checked. To overcome this restriction, we propose a more general inference algorithm that uses finite generative structures (similar to automata) to represent families of explanations. The inference algorithm computes the probability of a possibly infinite set of explanations directly from the finite generative structure. We have implemented our inference algorithm in XSB Prolog, and use this implementation to encode probabilistic model...

  20. Clamp force and alignment checking device

    Energy Technology Data Exchange (ETDEWEB)

    Spicer, John Patrick; Cai, Wayne W.; Chakraborty, Debejyo; Mink, Keith

    2017-04-11

    A check fixture measures a total clamp force applied by a welder device. The welder device includes a welding horn having a plurality of weld pads and welding anvil having a plurality of weld pads. The check fixture includes a base member operatively supporting a plurality of force sensors. The base member and the force sensors are received between the weld pads of the welding horn and the anvil pads of the welding anvil. Each force sensor is configured to measure an individual clamp force applied thereto by corresponding weld and anvil pads when the base member is received between the welding horn and the welding anvil and the welder device is in the clamped position. The individual clamp forces are used to determine whether the weld and/or anvil pads are worn or misaligned.

  1. Model Checking the Remote Agent Planner

    Science.gov (United States)

    Khatib, Lina; Muscettola, Nicola; Havelund, Klaus; Norvig, Peter (Technical Monitor)

    2001-01-01

    This work tackles the problem of using Model Checking for the purpose of verifying the HSTS (Scheduling Testbed System) planning system. HSTS is the planner and scheduler of the remote agent autonomous control system deployed in Deep Space One (DS1). Model Checking allows for the verification of domain models as well as planning entries. We have chosen the real-time model checker UPPAAL for this work. We start by motivating our work in the introduction. Then we give a brief description of HSTS and UPPAAL. After that, we give a sketch for the mapping of HSTS models into UPPAAL and we present samples of plan model properties one may want to verify.

  2. The Mind Grows Circuits

    CERN Document Server

    Panigrahy, Rina

    2012-01-01

    There is a vast supply of prior art that study models for mental processes. Some studies in psychology and philosophy approach it from an inner perspective in terms of experiences and percepts. Others such as neurobiology or connectionist-machines approach it externally by viewing the mind as complex circuit of neurons where each neuron is a primitive binary circuit. In this paper, we also model the mind as a place where a circuit grows, starting as a collection of primitive components at birth and then builds up incrementally in a bottom up fashion. A new node is formed by a simple composition of prior nodes when we undergo a repeated experience that can be described by that composition. Unlike neural networks, however, these circuits take "concepts" or "percepts" as inputs and outputs. Thus the growing circuits can be likened to a growing collection of lambda expressions that are built on top of one another in an attempt to compress the sensory input as a heuristic to bound its Kolmogorov Complexity.

  3. Speed checks on the CERN site

    CERN Multimedia

    2007-01-01

    In view of the significant number of speeding incidents that have been reported, CERN will shortly start to carry out speed checks on the site. The radar used for this purpose will show drivers the speed measured. The disciplinary measures taken against those exceeding the authorised limit (generally 50 k.p.h.) will include a ban from driving on the site for a minimum of one month. Maximilian Metzger
Secretary-General

  4. Water system microbial check valve development

    Science.gov (United States)

    Colombo, G. V.; Greenley, D. R.; Putnam, D. F.

    1978-01-01

    A residual iodine microbial check valve (RIMCV) assembly was developed and tested. The assembly is designed to be used in the space shuttle potable water system. The RIMCV is based on an anion exchange resin that is supersaturated with an iodine solution. This system causes a residual to be present in the effluent water which provides continuing bactericidal action. A flight prototype design was finalized and five units were manufactured and delivered.

  5. Statistical Model Checking for Stochastic Hybrid Systems

    DEFF Research Database (Denmark)

    David, Alexandre; Du, Dehui; Larsen, Kim Guldstrand

    2012-01-01

    This paper presents novel extensions and applications of the UPPAAL-SMC model checker. The extensions allow for statistical model checking of stochastic hybrid systems. We show how our race-based stochastic semantics extends to networks of hybrid systems, and indicate the integration technique...... applied for implementing this semantics in the UPPAAL-SMC simulation engine. We report on two applications of the resulting tool-set coming from systems biology and energy aware buildings....

  6. Model checking the HAVi leader election protocol

    OpenAIRE

    Romijn, J.M.T.

    1999-01-01

    The HAVi specification proposes an architecture for audio/video interoperability in home networks. Part of the HAVi specification is a distributed leader election protocol. We have modelled this leader election protocol in Promela and Lotos and have checked several properties with the tools Spin and Xtl (from the Caesar/Aldebaran package). It turns out that the protocol does not meet some safety properties and that there are situations in which the protocol may never converge to designate a l...

  7. Living MedsCheck: Learning how to deliver MedsCheck in community practice in Ontario.

    Science.gov (United States)

    Grindrod, Kelly; Sanghera, Niki; Rahmaan, Israa; Roy, Meghna; Tritt, Michael

    2013-01-01

    To share the experiences of graduating students as they learn to deliver a new medication review service in community pharmacies in Ontario, Canada. Four graduating pharmacy students volunteered in different community pharmacies to learn how to navigate a new provincial program called MedsCheck, which pays pharmacists to do medication reviews. Each student selected his or her own practice site, including 2 independent community pharmacies, a grocery store chain pharmacy and a hospital outpatient pharmacy. To help the students learn to deliver the new MedsCheck services, a faculty mentor met with them on a weekly basis. To reflect on doing MedsChecks in the "real world" and to elicit feedback from the online community, each student blogged about his or her experiences. All 4 students felt that peer mentoring improved their ability to deliver MedsCheck services. They also identified a number of barriers to delivering the MedsChecks and helped each other try to overcome the barriers. MedsCheck is a new service in Ontario and is not easily implemented in the current pharmacy model of practice. Peer mentoring is a helpful way to share successes and overcome barriers to delivery. Can Pharm J 2013;146:33-38.

  8. Novel circuits for energizing manganin stress gauges

    Science.gov (United States)

    Tasker, Douglas G.

    2017-01-01

    This paper describes the design of a novel MOSFET pulsed constant current supplies for low impedance Manganin stress gauges. The design emphasis has been on high accuracy, low noise, simple, low cost, disposable supplies that can be used to energize multiple gauges in explosive or shock experiments. The Manganin gauges used to measure stresses in detonating explosive experiments have typical resistances of 50 mΩ and are energized with pulsed currents of 50 A. Conventional pulsed, constant current supplies for these gauges are high voltage devices with outputs as high as 500 V. Common problems with the use of high voltage supplies at explosive firing sites are: erroneous signals caused by ground loops; overdrive of oscilloscopes on gauge failure; gauge signal crosstalk; cost; and errors due to changing load impedances. The new circuit corrects these issues. It is an 18-V circuit, powered by 9-V alkaline batteries, and features an optically isolated trigger, and single-point grounding. These circuits have been successfully tested at the Los Alamos National Laboratory in explosive experiments. [LA-UR-15-24819

  9. Ground Wars

    DEFF Research Database (Denmark)

    Nielsen, Rasmus Kleis

    Political campaigns today are won or lost in the so-called ground war--the strategic deployment of teams of staffers, volunteers, and paid part-timers who work the phones and canvass block by block, house by house, voter by voter. Ground Wars provides an in-depth ethnographic portrait of two...... infrastructures that utilize large databases with detailed individual-level information for targeting voters, and armies of dedicated volunteers and paid part-timers. Nielsen challenges the notion that political communication in America must be tightly scripted, controlled, and conducted by a select coterie...... of professionals. Yet he also quashes the romantic idea that canvassing is a purer form of grassroots politics. In today's political ground wars, Nielsen demonstrates, even the most ordinary-seeming volunteer knocking at your door is backed up by high-tech targeting technologies and party expertise. Ground Wars...

  10. Chaotic memristive circuit: equivalent circuit realization and dynamical analysis

    Institute of Scientific and Technical Information of China (English)

    Bao Bo-Cheng; Xu Jian-Ping; Zhou Guo-Hua; Ma Zheng-Hua; Zou Ling

    2011-01-01

    In this paper,a practical equivalent circuit of an active flux-controlled memristor characterized by smooth piecewise-quadratic nonlinearity is designed and an experimental chaotic memristive circuit is implemented.The chaotic memristive circuit has an equilibrium set and its stability is dependent on the initial state of the memristor.The initial state-dependent and the circuit parameter-dependent dynamics of the chaotic memristive circuit are investigated via phase portraits,bifurcation diagrams and Lyapunov exponents.Both experimental and simulation results validate the proposed equivalent circuit realization of the active flux-controlled memristor.

  11. Primer printed circuit boards

    CERN Document Server

    Argyle, Andrew

    2009-01-01

    Step-by-step instructions for making your own PCBs at home. Making your own printed circuit board (PCB) might seem a daunting task, but once you master the steps, it's easy to attain professional-looking results. Printed circuit boards, which connect chips and other components, are what make almost all modern electronic devices possible. PCBs are made from sheets of fiberglass clad with copper, usually in multiplelayers. Cut a computer motherboard in two, for instance, and you'll often see five or more differently patterned layers. Making boards at home is relatively easy

  12. Current Conveyor Equivalent Circuits

    Directory of Open Access Journals (Sweden)

    Tejmal S. Rathore

    2012-02-01

    Full Text Available An equivalence between a class of (current conveyor CC II+ and CC II- circuits is established. CC IIequivalent circuit uses one extra element. However, under certain condition, the extra element can be eliminated. As an illustration of the application of this equivalence, minimal first and second order all-pass filters are derived. Incertain cases, it is possible to compensate the effect of the input resistor of CC at port X. At the end, an open problem of realizing an Nth order (N > 2 minimal all-pass filter is stated.

  13. Circuit design for reliability

    CERN Document Server

    Cao, Yu; Wirth, Gilson

    2015-01-01

    This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.

  14. Inrush Current Control Circuit

    Science.gov (United States)

    Cole, Steven W. (Inventor)

    2002-01-01

    An inrush current control circuit having an input terminal connected to a DC power supply and an output terminal connected to a load capacitor limits the inrush current that charges up the load capacitor during power up of a system. When the DC power supply applies a DC voltage to the input terminal, the inrush current control circuit produces a voltage ramp at the load capacitor instead of an abrupt DC voltage. The voltage ramp results in a constant low level current to charge up the load capacitor, greatly reducing the current drain on the DC power supply.

  15. Electronic circuits fundamentals & applications

    CERN Document Server

    Tooley, Mike

    2015-01-01

    Electronics explained in one volume, using both theoretical and practical applications.New chapter on Raspberry PiCompanion website contains free electronic tools to aid learning for students and a question bank for lecturersPractical investigations and questions within each chapter help reinforce learning Mike Tooley provides all the information required to get to grips with the fundamentals of electronics, detailing the underpinning knowledge necessary to appreciate the operation of a wide range of electronic circuits, including amplifiers, logic circuits, power supplies and oscillators. The

  16. Bounded Model Checking and Inductive Verification of Hybrid Discrete-Continuous Systems

    DEFF Research Database (Denmark)

    Becker, Bernd; Behle, Markus; Eisenbrand, Fritz

    2004-01-01

    We present a concept to signicantly advance the state of the art for bounded model checking (BMC) and inductive verication (IV) of hybrid discrete-continuous systems. Our approach combines the expertise of partners coming from dierent domains, like hybrid systems modeling and digital circuit...... verication, bounded plan- ning and heuristic search, combinatorial optimization and integer programming. Af- ter sketching the overall verication ow we present rst results indicating that the combination and tight integration of dierent verication engines is a rst step to pave the way to fully automated BMC...

  17. DDCC-Based Quadrature Oscillator with Grounded Capacitors and Resistors

    Directory of Open Access Journals (Sweden)

    Montree Kumngern

    2009-01-01

    Full Text Available A new voltage-mode quadrature oscillator using two differential difference current conveyors (DDCCs, two grounded capacitors, and three grounded resistors is presented. The proposed oscillator provides the following advantages: the oscillation condition and oscillation frequency are orthogonally controlled; the oscillation frequency is controlled through a single grounded resistor; the use of only grounded capacitors and resistors makes the proposed circuit ideal for IC implementation; low passive and active sensitivities. Simulation results verifying the theoretical analysis are also included.

  18. ESD analog circuits and design

    CERN Document Server

    Voldman, Steven H

    2014-01-01

    A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design.  It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect pres

  19. Bioluminescent bioreporter integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Simpson, Michael L. (Knoxville, TN); Sayler, Gary S. (Blaine, TN); Paulus, Michael J. (Knoxville, TN)

    2000-01-01

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.

  20. Superconducting Quantum Circuits

    NARCIS (Netherlands)

    Majer, J.B.

    2002-01-01

    This thesis describes a number of experiments with superconducting cir- cuits containing small Josephson junctions. The circuits are made out of aluminum islands which are interconnected with a very thin insulating alu- minum oxide layer. The connections form a Josephson junction. The current trough

  1. Quantum secure circuit evaluation

    Institute of Scientific and Technical Information of China (English)

    CHEN Huanhuan; LI Bin; ZHUANG Zhenquan

    2004-01-01

    In order to solve the problem of classical secure circuit evaluation, this paper proposes a quantum approach. In this approach, the method of inserting redundant entangled particles and quantum signature has been employed to strengthen the security of the system. Theoretical analysis shows that our solution is secure against classical and quantum attacks.

  2. Novel Grounded Capacitor All-Pass and Notch Filters Using Current Conveyors and Differential Amplifier

    Directory of Open Access Journals (Sweden)

    R. Saraswat

    2003-01-01

    Full Text Available Three circuits each realizing second-order all-pass/notch filter transfer functions are reported. All circuits use grounded capacitors and are suitable for IC implementation. These circuits offer the advantages of high input impedance and low output impedance and are superior to all earlier realisations.

  3. Statistical Model Checking for Biological Systems

    DEFF Research Database (Denmark)

    David, Alexandre; Larsen, Kim Guldstrand; Legay, Axel

    2014-01-01

    Statistical Model Checking (SMC) is a highly scalable simulation-based verification approach for testing and estimating the probability that a stochastic system satisfies a given linear temporal property. The technique has been applied to (discrete and continuous time) Markov chains, stochastic...... proved very useful for identifying interesting properties of biological systems. Our aim is to offer the best of the two worlds: optimal domain specific interfaces and formalisms suited to biology combined with powerful SMC analysis techniques for stochastic and hybrid systems. This goal is obtained...

  4. Outage maintenance checks on large generator windings

    Energy Technology Data Exchange (ETDEWEB)

    Nindra, B.; Jeney, S.I.; Slobodinsky, Y. [National Electric Coil, Columbus, OH (United States)

    1995-12-31

    In the present days of austerity, more constraints and pressures are being brought on the maintenance engineers to certify the generators for their reliability and life extension. The outages are shorter and intervals between the outages are becoming longer. The annual outages were very common when utilities had no regulatory constraints and also had standby capacities. Furthermore, due to lean and mean budgets, outage maintenance programs are being pursued more aggressively, so that longer interval outages can be achieved to ensure peak generator performance. This paper will discuss various visual checks, electrical tests and recommended fixes to achieve the above mentioned objectives, in case any deficiencies are found.

  5. Political and judicial checks on corruption

    DEFF Research Database (Denmark)

    Alt, James E.; Lassen, David Dreyer

    2008-01-01

    This paper investigates the effects of checks and balances on corruption. Within a presidential system, effective separation of powers is achieved under a divided government, with the executive and legislative branches being controlled by different political parties. When government is unified......, no effective separation exists even within a presidential system, but, we argue, can be partially restored by having an accountable judiciary. Our empirical findings show that a divided government and elected, rather than appointed, state supreme court judges are associated with lower corruption and...

  6. Optimal database locks for efficient integrity checking

    DEFF Research Database (Denmark)

    Martinenghi, Davide

    2004-01-01

    In concurrent database systems, correctness of update transactions refers to the equivalent effects of the execution schedule and some serial schedule over the same set of transactions. Integrity constraints add further semantic requirements to the correctness of the database states reached upon...... the execution of update transactions. Several methods for efficient integrity checking and enforcing exist. We show in this paper how to apply one such method to automatically extend update transactions with locks and simplified consistency tests on the locked entities. All schedules produced in this way...

  7. Checking MSC Specifications for Timing Inconsistency

    Institute of Scientific and Technical Information of China (English)

    LI Xuandong(李宣东); TAN Wenkai(谭文凯); ZHENG Guoliang(郑国梁)

    2002-01-01

    Message sequence chart (MSC) is a graphical and textual language for the description and specification of the interactions between system components. MSC specifica tions allow convenient expression of multiple scenarios, and offer an intuitive and visual way of describing design requirements. Like any other aspect of the specification and design process, MSCs are amenable to errors, and their analysis is important. In this paper, the verification problem of MSC specification for timing inconsistency is studied, which means that no execu tion scenario described by an MSC specification is timing consistent. An algorithm is developed to check MSC specifications for timing inconsistency.

  8. Non intrusive check valve diagnostics at Bruce A

    Energy Technology Data Exchange (ETDEWEB)

    Marsch, S.P. [Ontario Hydro, Bruce Nuclear Generating Station A, Tiverton, ON (Canada)

    1997-07-01

    Bruce A purchased non intrusive check valve diagnostic equipment in 1995 to ensure operability and availability of critical check valves in the Station. Diagnostics can be used to locate and monitor check valve degradation modes. Bruce A initiated a pilot program targeting check valves with flow through them and ones that completed open or close cycles. Approaches to determine how to confirm operability of passive check valves using non intrusive techniques were explored. A sample population of seventy-three check valves was selected to run the pilot program on prior to complete implementation. The pilot program produced some significant results and some inconclusive results. The program revealed a major finding that check valve performance modeling is required to ensure continuous operability of check valves. (author)

  9. Non intrusive check valve diagnostics at Bruce A

    Energy Technology Data Exchange (ETDEWEB)

    Marsch, S.P. [Ontario Hydro, Bruce Nuclear Generating Station A, Tiverton, ON (Canada)

    1997-07-01

    Bruce A purchased non intrusive check valve diagnostic equipment in 1995 to ensure operability and availability of critical check valves in the Station. Diagnostics can be used to locate and monitor check valve degradation modes. Bruce A initiated a pilot program targeting check valves with flow through them and ones that completed open or close cycles. Approaches to determine how to confirm operability of passive check valves using non intrusive techniques were explored. A sample population of seventy-three check valves was selected to run the pilot program on prior to complete implementation. The pilot program produced some significant results and some inconclusive results. The program revealed a major finding that check valve performance modeling is required to ensure continuous operability of check valves. (author)

  10. A Little Training Helps Couples Ease into Skin Cancer Checks

    Science.gov (United States)

    ... html A Little Training Helps Couples Ease Into Skin Cancer Checks Study finds the potentially life-saving routine ... 14, 2016 WEDNESDAY, Dec. 14, 2016 (HealthDay News) -- Skin cancer checks between couples don't have to be ...

  11. 14 CFR 61.58 - Pilot-in-command proficiency check: Operation of aircraft requiring more than one pilot flight...

    Science.gov (United States)

    2010-01-01

    ... 14 Aeronautics and Space 2 2010-01-01 2010-01-01 false Pilot-in-command proficiency check: Operation of aircraft requiring more than one pilot flight crewmember. 61.58 Section 61.58 Aeronautics and...: PILOTS, FLIGHT INSTRUCTORS, AND GROUND INSTRUCTORS General § 61.58 Pilot-in-command proficiency...

  12. Resistor Combinations for Parallel Circuits.

    Science.gov (United States)

    McTernan, James P.

    1978-01-01

    To help simplify both teaching and learning of parallel circuits, a high school electricity/electronics teacher presents and illustrates the use of tables of values for parallel resistive circuits in which total resistances are whole numbers. (MF)

  13. 30 CFR 75.705-10 - Tying into energized high-voltage surface circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Tying into energized high-voltage surface....705-10 Tying into energized high-voltage surface circuits. If the work of forming an additional circuit by tying into an energized high-voltage surface line is performed from the ground, any...

  14. 30 CFR 77.704-10 - Tying into energized high-voltage surface circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Tying into energized high-voltage surface... AREAS OF UNDERGROUND COAL MINES Grounding § 77.704-10 Tying into energized high-voltage surface circuits. If the work of forming an additional circuit by tying into an energized high-voltage surface line...

  15. Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

    Science.gov (United States)

    1975-01-01

    Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

  16. Found Poems, Member Checking and Crises of Representation

    Science.gov (United States)

    Reilly, Rosemary C.

    2013-01-01

    In order to establish veracity, qualitative researchers frequently rely on member checks to insure credibility by giving participants opportunities to correct errors, challenge interpretations and assess results; however, member checks are not without drawbacks. This paper describes an innovative approach to conducting member checks. Six members…

  17. Spell Checking: Making Writing Meaningful in the Inclusive Classroom.

    Science.gov (United States)

    Ashton, Tamarah M.

    1999-01-01

    This article describes the CHECK procedure for teaching students with learning disabilities skills in the actual operation of a computer spell-check. Students are urged to check the beginning sound, hunt for correct consonants, examine the vowels, make changes, and keep repeating the process. (CR)

  18. 30 CFR 77.309 - Visual check of system equipment.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Visual check of system equipment. 77.309... COAL MINES Thermal Dryers § 77.309 Visual check of system equipment. Frequent visual checks shall be made by the operator of the thermal dryer system control station, or by some other competent person,...

  19. Preventive Maintenance Checks and Services (PMCS). Do We Check Too Much and Maintain Too Little

    Science.gov (United States)

    1990-03-26

    They were similar to the trucks and tractors that many soldiers had back home on the farms . Since the U.S. was predominantly a rural society then, the...of an item requiring before-operation checks would render the :t m - iot mission-capable. Currently there are over 200 PMCS checks on the new Abrams...ensure that we are maintaining our vehicles in a go-to-war condition and that we are doing it the smart way. Our system requires significant changes

  20. Model Checking over Paraconsistent Temporal Logic

    Institute of Scientific and Technical Information of China (English)

    CHEN Dong-huo; WANG Lin-zhang; CUI Jia-lin

    2008-01-01

    Classical logic cannot be used to effectively reason about concurrent systems with inconsistencies (inconsistencies often occur, especially in the early stage of the development, when large and complex concurrent systems are developed). In this paper, we propose the use of a guasi-classical temporal logic (QCTL) for supporting the verification of temporal properties of such systems even where the consistent model is not available. Our models are paraKripke structures ( extended standard Kripke structures), in which both a formula and its negation are satisfied in a same state, and properties to be verified are expressed by QCTL with paraKripke structures semantics. We introduce a novel notion of paraKripke models, which grasps the paraconsistent character of the entailment relation of QCTL. Furthermore, we explore the methodology of model checking over QCTL, and describe the detailed algorithm of implementing QCTL model checker. In the sequel, a simple example is presented, showing how to exploit the proposed model checking technique to verify the temporal properties of inconsistent concurrent systems.

  1. Model-Based Trace-Checking

    CERN Document Server

    Howard, Y; Gravell, A; Ferreira, C; Augusto, J C

    2011-01-01

    Trace analysis can be a useful way to discover problems in a program under test. Rather than writing a special purpose trace analysis tool, this paper proposes that traces can usefully be analysed by checking them against a formal model using a standard model-checker or else an animator for executable specifications. These techniques are illustrated using a Travel Agent case study implemented in J2EE. We added trace beans to this code that write trace information to a database. The traces are then extracted and converted into a form suitable for analysis by Spin, a popular model-checker, and Pro-B, a model-checker and animator for the B notation. This illustrates the technique, and also the fact that such a system can have a variety of models, in different notations, that capture different features. These experiments have demonstrated that model-based trace-checking is feasible. Future work is focussed on scaling up the approach to larger systems by increasing the level of automation.

  2. Applying GPS to check horizontal control quality

    Directory of Open Access Journals (Sweden)

    Jakub Vincent

    2004-03-01

    Full Text Available GPS technologies can also be used for check quality in available horizontal point set with coordinates CJ of the frame S-JTSK. When survey and setting-out tasks should be performed in certain area, one can found in it allways some points of the fundamental and detail state controls. To use these points for some actual aims, it is necessary to investigate their compatibility (among the point mark positions and the point coordinate of control points. This can be done using GPS surveying that may be at the same time employed to determine the new point in the relevant area.Principle of quality investigatingf an existing control is founded on determination of point coordinates CJt from GPS measurements. Then, based on discrepancies among the "official" netpoint coordinates CJ and coordinates CJt "given by GPS", it can be estimated the degree and the real compatibility dislocations in the network structure of the existing points.Realisation procedure for the introduced investigation is demonstrated on GPS checking (by SOKKIA STRATUS receivers horizontal control for reconstruction of a railway bridge on river Bodrog in East Slovakia.It can be shown from the results in Table 3, that points P3 and P7 are useless due to their incompatibility (inconsistency in the inspected point set. For other 7 points (Table 7 the average measure of incompatibility reads 9.8 mm that make possible applying these points for precise setting-out

  3. Model Checking of Boolean Process Models

    CERN Document Server

    Schneider, Christoph

    2011-01-01

    In the field of Business Process Management formal models for the control flow of business processes have been designed since more than 15 years. Which methods are best suited to verify the bulk of these models? The first step is to select a formal language which fixes the semantics of the models. We adopt the language of Boolean systems as reference language for Boolean process models. Boolean systems form a simple subclass of coloured Petri nets. Their characteristics are low tokens to model explicitly states with a subsequent skipping of activations and arbitrary logical rules of type AND, XOR, OR etc. to model the split and join of the control flow. We apply model checking as a verification method for the safeness and liveness of Boolean systems. Model checking of Boolean systems uses the elementary theory of propositional logic, no modal operators are needed. Our verification builds on a finite complete prefix of a certain T-system attached to the Boolean system. It splits the processes of the Boolean sy...

  4. The LMT circuit and SPICE

    DEFF Research Database (Denmark)

    Lindberg, Erik; Murali, K.; Tamacevicius, Arunas

    2006-01-01

    The state equations of the LMT circuit are modeled as a dedicated analogue computer circuit and solved by means of PSpice. The nonlinear part of the system is studied. Problems with the PSpice program are presented.......The state equations of the LMT circuit are modeled as a dedicated analogue computer circuit and solved by means of PSpice. The nonlinear part of the system is studied. Problems with the PSpice program are presented....

  5. Behavioral synthesis of asynchronous circuits

    DEFF Research Database (Denmark)

    Nielsen, Sune Fallgaard

    2005-01-01

    This thesis presents a method for behavioral synthesis of asynchronous circuits, which aims at providing a synthesis flow which uses and tranfers methods from synchronous circuits to asynchronous circuits. We move the synchronous behavioral synthesis abstraction into the asynchronous handshake...... is idle. This reduces unnecessary switching activity in the individual functional units and therefore the energy consumption of the entire circuit. A collection of behavioral synthesis algorithms have been developed allowing the designer to perform time and power constrained design space exploration...

  6. Diode, transistor & fet circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Diode, Transistor and FET Circuits Manual is a handbook of circuits based on discrete semiconductor components such as diodes, transistors, and FETS. The book also includes diagrams and practical circuits. The book describes basic and special diode characteristics, heat wave-rectifier circuits, transformers, filter capacitors, and rectifier ratings. The text also presents practical applications of associated devices, for example, zeners, varicaps, photodiodes, or LEDs, as well as it describes bipolar transistor characteristics. The transistor can be used in three basic amplifier configuration

  7. Statistical circuit design for yield improvement in CMOS circuits

    Science.gov (United States)

    Kamath, H. J.; Purviance, J. E.; Whitaker, S. R.

    1990-01-01

    This paper addresses the statistical design of CMOS integrated circuits for improved parametric yield. The work uses the Monte Carlo technique of circuit simulation to obtain an unbiased estimation of the yield. A simple graphical analysis tool, the yield factor histogram, is presented. The yield factor histograms are generated by a new computer program called SPICENTER. Using the yield factor histograms, the most sensitive circuit parameters are noted, and their nominal values are changed to improve the yield. Two basic CMOS example circuits, one analog and one digital, are chosen and their designs are 'centered' to illustrate the use of the yield factor histograms for statistical circuit design.

  8. Macroscopic Quantum Criticality in a Circuit QED

    CERN Document Server

    Wang, Y D; Nori, F; Quan, H T; Sun, C P; Liu, Yu-xi; Nori, Franco

    2006-01-01

    Cavity quantum electrodynamic (QED) is studied for two strongly-coupled charge qubits interacting with a single-mode quantized field, which is provided by a on-chip transmission line resonator. We analyze the dressed state structure of this superconducting circuit QED system and the selection rules of electromagnetic-induced transitions between any two of these dressed states. Its macroscopic quantum criticality, in the form of ground state level crossing, is also analyzed, resulting from competition between the Ising-type inter-qubit coupling and the controllable on-site potentials.

  9. Circuit Bodging: Atari Punk Console

    NARCIS (Netherlands)

    Allen, B.

    2009-01-01

    Circuit bodging is back! Maxwell is proud to present small, simple, but ultimately lovable little circuits to build for your own, personal pleasure. In this edition we are featuring: The Atari Punk Console. The Atari Punk Console (or APC) is a 555 timer IC based noise maker circuit. The original was

  10. Circuit Bodging: Atari Punk Console

    NARCIS (Netherlands)

    Allen, B.

    2009-01-01

    Circuit bodging is back! Maxwell is proud to present small, simple, but ultimately lovable little circuits to build for your own, personal pleasure. In this edition we are featuring: The Atari Punk Console. The Atari Punk Console (or APC) is a 555 timer IC based noise maker circuit. The original was

  11. Selective Manipulation of Neural Circuits.

    Science.gov (United States)

    Park, Hong Geun; Carmel, Jason B

    2016-04-01

    Unraveling the complex network of neural circuits that form the nervous system demands tools that can manipulate specific circuits. The recent evolution of genetic tools to target neural circuits allows an unprecedented precision in elucidating their function. Here we describe two general approaches for achieving circuit specificity. The first uses the genetic identity of a cell, such as a transcription factor unique to a circuit, to drive expression of a molecule that can manipulate cell function. The second uses the spatial connectivity of a circuit to achieve specificity: one genetic element is introduced at the origin of a circuit and the other at its termination. When the two genetic elements combine within a neuron, they can alter its function. These two general approaches can be combined to allow manipulation of neurons with a specific genetic identity by introducing a regulatory gene into the origin or termination of the circuit. We consider the advantages and disadvantages of both these general approaches with regard to specificity and efficacy of the manipulations. We also review the genetic techniques that allow gain- and loss-of-function within specific neural circuits. These approaches introduce light-sensitive channels (optogenetic) or drug sensitive channels (chemogenetic) into neurons that form specific circuits. We compare these tools with others developed for circuit-specific manipulation and describe the advantages of each. Finally, we discuss how these tools might be applied for identification of the neural circuits that mediate behavior and for repair of neural connections.

  12. Reliability improvement of electronic circuits based on physical failure mechanisms in components

    NARCIS (Netherlands)

    Brombacher, A.C.; Boer, de H.A.; Bennion, M.; Fennema, P.H.; Hermann, O.E.

    1991-01-01

    Traditionally the position of reliability analysis in the design and production process of electronic circuits is a position of reliability verification. A completed design is checked on reliability aspects and either rejected or accepted for production. This paper describes a method to model physic

  13. FGMOS Based Voltage-Controlled Grounded Resistor

    Directory of Open Access Journals (Sweden)

    R. Pandey

    2010-09-01

    Full Text Available This paper proposes a new floating gate MOSFET (FGMOS based voltage-controlled grounded resistor. In the proposed circuit FGMOS operating in the ohmic region is linearized by another conventional MOSFET operating in the saturation region. The major advantages of FGMOS based voltage-controlled grounded resistor (FGVCGR are simplicity, low total harmonic distortion (THD, and low power consumption. A simple application of this FGVCGR as a tunable high-pass filter is also suggested. The proposed circuits operate at the supply voltages of +/-0.75 V. The circuits are designed and simulated using SPICE in 0.25-µm CMOS technology. The simulation results of FGVCGR demonstrate a THD of 0.28% for the input signal 0.32 Vpp at 45 kHz, and a maximum power consumption of 254 µW.

  14. Power Gating Based Ground Bounce Noise Reduction

    Directory of Open Access Journals (Sweden)

    M. Uma Maheswari

    2014-08-01

    Full Text Available As low power circuits are most popular the decrease in supply voltage leads to increase in leakage power with respect to the technology scaling. So for removing this kind of leakages and to provide a better power efficiency many power gating techniques are used. But the leakage due to ground connection to the active part of the circuit is very high rather than all other leakages. As it is mainly due to the back EMF of the ground connection it was called it as ground bounce noise. To reduce this noise different methodologies are designed. In this paper the design of such an efficient technique related to ground bounce noise reduction using power gating circuits and comparing the results using DSCH and Microwind low power tools. In this paper the analysis of adders such as full adders using different types of power gated circuits using low power VLSI design techniques and to present the comparison results between different power gating methods.

  15. LC-Circuit Calorimetry

    CERN Document Server

    Bossen, Olaf

    2011-01-01

    We present a new type of calorimeter in which we couple an unknown heat capacity with the aid of Peltier elements to an electrical circuit. The use of an electrical inductance and an amplifier in the circuit allows us to achieve autonomous oscillations, and the measurement of the corresponding resonance frequency makes it possible to accurately measure the heat capacity with an intrinsic statistical error that decreases as ~t^{-3/2} with measuring time t, as opposed to a corresponding error ~t^{-1/2} in the conventional alternating current (a.c.) method to measure heat capacities. We have built a demonstration experiment to show the feasibility of the new technique, and we have tested it on a gadolinium sample at its transition to the ferromagnetic state.

  16. Neuromorphic silicon neuron circuits

    Directory of Open Access Journals (Sweden)

    Giacomo eIndiveri

    2011-05-01

    Full Text Available Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance based Hodgkin-Huxley models to bi-dimensional generalized adaptive Integrate and Fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips.

  17. Cartography of serotonergic circuits.

    Science.gov (United States)

    Sparta, Dennis R; Stuber, Garret D

    2014-08-06

    Serotonin is an essential neuromodulator, but the precise circuit connectivity that regulates serotonergic neurons has not been well defined. Using rabies virus tracing strategies Weissbourd et al. (2014) and Pollak Dorocic et al. (2014) in this issue of Neuron and Ogawa et al. (2014) in Cell Reports provide a comprehensive map of the inputs to serotonergic neurons, highlighting the complexity and diversity of potential upstream cellular regulators. Copyright © 2014 Elsevier Inc. All rights reserved.

  18. Requirements Specifications Checking of Embedded Real-Time Software

    Institute of Scientific and Technical Information of China (English)

    WU Guoqing(毋国庆); SHU Fengdi(舒风笛); WANG Min(王敏); CHEN Weiqing(陈伟清)

    2002-01-01

    After introducing the overview of our requirements description model HRFSM,the paper presents a dynamic software execution model (DERTS) of embedded real-time software, which can integrate control flow, data flow and time. Based on DERTS, a checking method is also presented. It consists of three kinds of checking and can check the consistency and completeness of the requirement specifications of embedded real-time software. Besides providing information helpful to improve the efficiency of analyzing and checking specifications,the checking method is flexible, and easy to understand and to use for the analyst.

  19. Inkjet deposited circuit components

    Science.gov (United States)

    Bidoki, S. M.; Nouri, J.; Heidari, A. A.

    2010-05-01

    All-printed electronics as a means of achieving ultra-low-cost electronic circuits has attracted great interest in recent years. Inkjet printing is one of the most promising techniques by which the circuit components can be ultimately drawn (i.e. printed) onto the substrate in one step. Here, the inkjet printing technique was used to chemically deposit silver nanoparticles (10-200 nm) simply by ejection of silver nitrate and reducing solutions onto different substrates such as paper, PET plastic film and textile fabrics. The silver patterns were tested for their functionality to work as circuit components like conductor, resistor, capacitor and inductor. Different levels of conductivity were achieved simply by changing the printing sequence, inks ratio and concentration. The highest level of conductivity achieved by an office thermal inkjet printer (300 dpi) was 5.54 × 105 S m-1 on paper. Inkjet deposited capacitors could exhibit a capacitance of more than 1.5 nF (parallel plate 45 × 45 mm2) and induction coils displayed an inductance of around 400 µH (planar coil 10 cm in diameter). Comparison of electronic performance of inkjet deposited components to the performance of conventionally etched items makes the technique highly promising for fabricating different printed electronic devices.

  20. Digital integrated circuits

    Science.gov (United States)

    Polasek, P.; Halamik, J.

    1984-05-01

    The term semicustom designed integrated circuits denotes integrated circuits of an all purpose character in which the production of chips is completed by using one to three custom design stencil type exposure masks. This involves in most cases interconnecting masks that are used to devise the circuit function desired by the customer. Silicon plates with an all purpose gate matrix are produced up to the interconnection level and can be kept at this phase in storage, after which a customer's specific demands can be met very expediently. All purpose logic fields containing 200 logic gates on a chip and an all purpose chip to be expanded to 1,000 logic gates are discussed. The technology facilitates the devising of fast gates with a delay of approximately 5 ns and power dissipation of 1 mW. In assembly it will be possible to make use of the entire assortment of the currently used casings with 16, 18, 20, 24, 28 and 40 outlets. In addition to the development of the mentioned technology, a general methodology for design of the mentioned gate fields is currently under way.

  1. Transformer Winding Deformation Profile using Modified Electrical Equivalent Circuit

    Directory of Open Access Journals (Sweden)

    M. Arul Sathya

    2015-02-01

    Full Text Available This study presents a generalized methodology to predict the transformer winding deformation profile through Sweep Frequency Response Analysis using Finite Element Method based Magneto Structural Analysis and proposed modified equivalent circuit. Monitoring and diagnosis of fault in any power apparatus is necessary to increase the quality life of the apparatus. In general all the power transformers are designed to withstand the mechanical forces due to short circuit faults. However, mechanical forces may exceed the specified limits during severe incidents leading to winding deformation. Winding deformation is one of the causes for the power transformer outages. In the present work, deformation profile of the winding for different short circuit currents are computed using Finite Element Method based Magneto-structural analysis. The change in circuit parameters of the deformed windings are computed using Finite Element Method based field analyses and the corresponding Sweep Frequency Responses are obtained using the modified electrical equivalent circuit. From the change in resonance frequencies, the displacement profile of the winding can be predicted which will be useful for design engineers to check the withstand capability of transformer.

  2. Improved Integrity Constraints Checking in Distributed Databases by Exploiting Local Checking

    Institute of Scientific and Technical Information of China (English)

    Ali A.Alwan; Hamidah Ibrahim; Nur Izura Udzir

    2009-01-01

    Most of the previous studies concerning checking the integrity constraints in distributed database derive simplified forms of the initial integrity constraints with the sufficiency property, since the sufficient test is known to be cheaper than the complete test and its initial integrity constraint as it involves less data to be transferred across the network and can always be evaluated at the target site (single site). Their studies are limited as they depend strictly on the assumption that an update operation will be executed at a site where the relation specified in the update operation is located, which is not always true. Hence, the sufficient test, which is proven to be local test by previous study, is no longer appropriate. This paper proposes an approach to checking integrity constraints in a distributed database by utilizing as much as possible the local information stored at the target site. The proposed approach derives support tests as an alternative to the existing complete and sufficient tests proposed by previous researchers with the intention to increase the number of local checking regardless the location of the submitted update operation. Several analyses have been performed to evaluate the proposed approach, and the results show that support tests can benefit the distributed database, where local constraint checking can be achieved.

  3. Checking in: An Analysis of the (Lack of) Body Checking in Women's Ice Hockey

    Science.gov (United States)

    Weaving, Charlene; Roberts, Samuel

    2012-01-01

    Despite the growing popularity of women's ice hockey in North America, players continue to face limitations because of the prohibition of body checking. In this paper, we argue from a liberal feminist philosophical perspective that this prohibition reinforces existing traditional stereotypes of female athletes. Because the women's game does not…

  4. Can I Just Check...? Effects of Edit Check Questions on Measurement Error and Survey Estimates

    Directory of Open Access Journals (Sweden)

    Lugtig Peter

    2014-03-01

    Full Text Available Household income is difficult to measure, since it requires the collection of information about all potential income sources for each member of a household.Weassess the effects of two types of edit check questions on measurement error and survey estimates: within-wave edit checks use responses to questions earlier in the same interview to query apparent inconsistencies in responses; dependent interviewing uses responses from prior interviews to query apparent inconsistencies over time.Weuse data from three waves of the British Household Panel Survey (BHPS to assess the effects of edit checks on estimates, and data from an experimental study carried out in the context of the BHPS, where survey responses were linked to individual administrative records, to assess the effects on measurement error. The findings suggest that interviewing methods without edit checks underestimate non-labour household income in the lower tail of the income distribution. The effects on estimates derived from total household income, such as poverty rates or transition rates into and out of poverty, are small.

  5. Changes to the shuttle circuits

    CERN Multimedia

    GS Department

    2011-01-01

    To fit with passengers expectation, there will be some changes to the shuttle circuits as from Monday 10 October. See details on http://cern.ch/ShuttleService (on line on 7 October). Circuit No. 5 is cancelled as circuit No. 1 also stops at Bldg. 33. In order to guarantee shorter travel times, circuit No. 1 will circulate on Meyrin site only and circuit No. 2, with departures from Bldg. 33 and 500, on Prévessin site only. Site Services Section

  6. Power system with an integrated lubrication circuit

    Science.gov (United States)

    Hoff, Brian D.; Akasam, Sivaprasad; Algrain, Marcelo C.; Johnson, Kris W.; Lane, William H.

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  7. Body checking and avoidance in ethnically diverse female college students.

    Science.gov (United States)

    White, Emily K; Warren, Cortney S

    2013-09-01

    Although body checking and avoidance behaviors are common in women with eating disorders, minimal research has examined the nature or correlates of these behaviors in ethnically diverse female college students without eating disorders. Self-identified European American (n=268), Asian American (n=163), Latina (n=146), and African American (n=73) women completed self-report measures of body checking and avoidance, thin-ideal internalization, eating pathology, and clinical impairment. Results indicated that European and Asian American women reported significantly more body checking and avoidance than African American and Latina women. Generally, correlates of body checking and avoidance were consistent across ethnic groups: Regression analyses indicated that type of ethnicity predicted body checking and avoidance; and ethnicity, body checking, and body avoidance predicted eating pathology and clinical impairment. These associations suggest that body checking and avoidance are not benign behaviors in diverse nonclinical women.

  8. The Mars Science Laboratory Organic Check Material

    Science.gov (United States)

    Conrad, Pamela G.; Eigenbrode, J. E.; Mogensen, C. T.; VonderHeydt, M. O.; Glavin, D. P.; Mahaffy, P. M.; Johnson, J. A.

    2011-01-01

    The Organic Check Material (OCM) has been developed for use on the Mars Science Laboratory mission to serve as a sample standard for verification of organic cleanliness and characterization of potential sample alteration as a function of the sample acquisition and portioning process on the Curiosity rover. OCM samples will be acquired using the same procedures for drilling, portioning and delivery as are used to study martian samples with The Sample Analysis at Mars (SAM) instrument suite during MSL surface operations. Because the SAM suite is highly sensitive to organic molecules, the mission can better verify the cleanliness of Curiosity's sample acquisition hardware if a known material can be processed through SAM and compared with the results obtained from martian samples.

  9. Photogrammetric approach to automated checking of DTMs

    DEFF Research Database (Denmark)

    Potucková, Marketa

    2005-01-01

    Geometrically accurate digital terrain models (DTMs) are essential for orthoimage production and many other applications. Collecting reference data or visual inspection are reliable but time consuming and therefore expensive methods for finding errors in DTMs. In this paper, a photogrammetric...... approach to automated checking and improving of DTMs is evaluated. Corresponding points in two overlapping orthoimages are found by means of area based matching. Provided the image orientation is correct, discovered displacements correspond to DTM errors. Improvements of the method regarding its...... reliability are discussed. Thresholds for image matching parameters are applied. A topographic database can be used for eliminating areas where mismatches might occur. Experimental results based on coloured aerial images at the scale of 1:25 000 and DTM derived from 5 m contour lines are reported....

  10. Advanced techniques for efficient data integrity checking

    DEFF Research Database (Denmark)

    Martinenghi, Davide

    Integrity constraint checking, understood as the verification of data correctness and well-formedness conditions that must be satisfied in any state of a database, is not fully supported by current database technology. In a typical scenario, a database is required to comply with given semantic...... criteria (the integrity constraints) and to maintain the compliance each time data are updated. Since the introduction of the SQL2 standard, the SQL language started supporting assertions, which allow one to define general data consistency requirements expressing arbitrarily complex “business rules......” that may go beyond predefined constraints such as primary keys and foreign keys. General integrity constraints are, however, far from being widely available in commercial systems; in fact, their usage is commonly not encouraged, since the database management system would not be able to provide...

  11. Conformant Planning via Symbolic Model Checking

    CERN Document Server

    Cimatti, A; 10.1613/jair.774

    2011-01-01

    We tackle the problem of planning in nondeterministic domains, by presenting a new approach to conformant planning. Conformant planning is the problem of finding a sequence of actions that is guaranteed to achieve the goal despite the nondeterminism of the domain. Our approach is based on the representation of the planning domain as a finite state automaton. We use Symbolic Model Checking techniques, in particular Binary Decision Diagrams, to compactly represent and efficiently search the automaton. In this paper we make the following contributions. First, we present a general planning algorithm for conformant planning, which applies to fully nondeterministic domains, with uncertainty in the initial condition and in action effects. The algorithm is based on a breadth-first, backward search, and returns conformant plans of minimal length, if a solution to the planning problem exists, otherwise it terminates concluding that the problem admits no conformant solution. Second, we provide a symbolic representation ...

  12. Model Checking JAVA Programs Using Java Pathfinder

    Science.gov (United States)

    Havelund, Klaus; Pressburger, Thomas

    2000-01-01

    This paper describes a translator called JAVA PATHFINDER from JAVA to PROMELA, the "programming language" of the SPIN model checker. The purpose is to establish a framework for verification and debugging of JAVA programs based on model checking. This work should be seen in a broader attempt to make formal methods applicable "in the loop" of programming within NASA's areas such as space, aviation, and robotics. Our main goal is to create automated formal methods such that programmers themselves can apply these in their daily work (in the loop) without the need for specialists to manually reformulate a program into a different notation in order to analyze the program. This work is a continuation of an effort to formally verify, using SPIN, a multi-threaded operating system programmed in Lisp for the Deep-Space 1 spacecraft, and of previous work in applying existing model checkers and theorem provers to real applications.

  13. Automated Environment Generation for Software Model Checking

    Science.gov (United States)

    Tkachuk, Oksana; Dwyer, Matthew B.; Pasareanu, Corina S.

    2003-01-01

    A key problem in model checking open systems is environment modeling (i.e., representing the behavior of the execution context of the system under analysis). Software systems are fundamentally open since their behavior is dependent on patterns of invocation of system components and values defined outside the system but referenced within the system. Whether reasoning about the behavior of whole programs or about program components, an abstract model of the environment can be essential in enabling sufficiently precise yet tractable verification. In this paper, we describe an approach to generating environments of Java program fragments. This approach integrates formally specified assumptions about environment behavior with sound abstractions of environment implementations to form a model of the environment. The approach is implemented in the Bandera Environment Generator (BEG) which we describe along with our experience using BEG to reason about properties of several non-trivial concurrent Java programs.

  14. Statically checked documentation with design patterns

    DEFF Research Database (Denmark)

    Cornils, Aino; Hedin, Görel

    2000-01-01

    Over the past years, along with the increase in popularity of design patterns, some problems with the use of design patterns have been identified. The so-called tracing problem describes the difficulty in documenting software systems using design patterns. Initial approaches to solving the tracing...... problem have focused on guidelines for documenting design pattern roles and rules within a system, but experience has shown that both in the initial design, and especially in later code revisions, it is all too easy for code and documentation to diverge, rendering the documentation misleading. The authors...... present a flexible and extensible tool which enables designers to use design patterns in a safe and efficient way, which checks the design pattern rules, and which semi-automatically documents, and maintains the documentation of a software system...

  15. Statistical Model Checking for Product Lines

    DEFF Research Database (Denmark)

    ter Beek, Maurice H.; Legay, Axel; Lluch Lafuente, Alberto

    2016-01-01

    average cost of products (in terms of the attributes of the products’ features) and the probability of features to be (un)installed at runtime. The product lines must be modelled in QFLan, which extends the probabilistic feature-oriented language PFLan with novel quantitative constraints among features......We report on the suitability of statistical model checking for the analysis of quantitative properties of product line models by an extended treatment of earlier work by the authors. The type of analysis that can be performed includes the likelihood of specific product behaviour, the expected...... and on behaviour and with advanced feature installation options. QFLan is a rich process-algebraic specification language whose operational behaviour interacts with a store of constraints, neatly separating product configuration from product behaviour. The resulting probabilistic configurations and probabilistic...

  16. Probabilistic Model--Checking of Quantum Protocols

    CERN Document Server

    Gay, S; Papanikolaou, N; Gay, Simon; Nagarajan, Rajagopal; Papanikolaou, Nikolaos

    2005-01-01

    We establish fundamental and general techniques for formal verification of quantum protocols. Quantum protocols are novel communication schemes involving the use of quantum-mechanical phenomena for representation, storage and transmission of data. As opposed to quantum computers, quantum communication systems can and have been implemented using present-day technology; therefore, the ability to model and analyse such systems rigorously is of primary importance. While current analyses of quantum protocols use a traditional mathematical approach and require considerable understanding of the underlying physics, we argue that automated verification techniques provide an elegant alternative. We demonstrate these techniques through the use of PRISM, a probabilistic model-checking tool. Our approach is conceptually simpler than existing proofs, and allows us to disambiguate protocol definitions and assess their properties. It also facilitates detailed analyses of actual implemented systems. We illustrate our techniqu...

  17. Type Checking with XML Schema in XACT

    DEFF Research Database (Denmark)

    Kirkegaard, Christian; Møller, Anders

    ACT is an extension of Java for making type-safe XML transformations. Unlike other approaches, XACT provides a programming model based on XML templates and XPath together with a type checker based on data-flow analysis. We show how to extend the data-flow analysis technique used in the XACT system...... to support XML Schema as type formalism. The technique is able to model advanced features, such as type derivations and overloaded local element declarations, and also datatypes of attribute values and character data. Moreover, we introduce optional type annotations to improve modularity of the type checking....... The resulting system supports a flexible style of programming XML transformations and provides static guarantees of validity of the generated XML data....

  18. low crosstalk packaging design for Josephson logic circuits

    Energy Technology Data Exchange (ETDEWEB)

    Aoki, K.; Tazoh, Y.; Yoshikiyo, H.

    1985-03-01

    Theoretical and experimental studies are accomplished for inductive crosstalk noise reductions at Josephson chip-to-card connectors. This noise is induced by large AC power and high switching speed signal currents. The crosstalk mechanism was analyzed using a Partial Element Equivalent Circuits Model. Ground inductance causes not only crosstalk noise between connectors but also ground fluctuation noise inside the chip. This ground noise is large enough to cause false logic operations. Test chips and cards with improved connectors were produced for an experimental evaluation. Power crosstalk noise was measured using Josephson sampling circuits fabricated on the chip. The crosstalk noise - signal level ratio was less than 2.5%, when 250 MHz, 50 mA power currents were supplied. Crosstalk noise between neighboring signal connectors was also reduced to negligible level, including the worst case. These results favorably agree with calculations. This low crosstalk packaging design can be applied to high speed Josephson logic systems.

  19. Memristor based startup circuit for self biased circuits

    Science.gov (United States)

    Das, Mangal; Singh, Amit Kumar; Rathi, Amit; Singhal, Sonal

    2016-04-01

    This paper presents the design of a Memristor based startup circuit for self biased circuits. Memristor has many advantages over conventional CMOS devices such as low leakage current at nanometer scale, easy to manufacture. In this work the switching characteristics of memristor is utilized. First the theoretical equations describing the switching behavior of memristor are investigated. To prove the switching capability of Memristor, a startup circuit based on memristor is proposed which uses series combination of Memristor and capacitor. Proposed circuit is compared with the previously reported MOSFET based startup circuits. Comparison of different circuits was done to validate the results. Simulation results show that memristor based circuit can attain on (I = 12.94 µA) to off state (I = 1 .2 µA) in 25 ns while the MOSFET based startup circuits take on (I = 14.19 µA) to off state (I = 1.4 µA) in more than 90 ns. The benefit comes in terms of area because the number of components used in the circuit are lesser than the conventional startup circuits.

  20. Quantum Encoder and Decoder for Secret Key Distribution with Check Bits

    Directory of Open Access Journals (Sweden)

    T. Godhavari

    2013-12-01

    Full Text Available The focus of this study is to develop a novel method of encoding the qubits and use as secret key in public key cryptography. In BB 84 protocol, 50% of the random number (generated at source is used as secret key and the remaining bits are used as “check bits”. The check bits are used to detect the presence of eve as well as the nature of quantum channels. In this protocol, random qubits are encoded using different type of polarizations like horizontal, veritical and diagonal. In the proposed quantum encoder, basic quantum gates are used to encode the random secret key along with the check bits. Quantum key distribution, (a cryptographic mechanism relies on the inherent randomness of quantum mechanics and serves as an option to replace techniques made vulnerable by quantum computing. However, it is still subject to clever forms of eavesdropping and poses a significant challenge to implementation. To study the challenges, quantum circuits are first simulated using QCAD.

  1. Influences of Resistor-Type Superconducting Fault Current Limiter on Power System Transient Stability with Asymmetrical Short-Circuit Faults

    Institute of Scientific and Technical Information of China (English)

    Xue-Ping Gu; Zhi-Long Yang

    2008-01-01

    The transient stability of a single machine to infinite-busbar power system with resistor- type superconducting fault current limiters (SFCL) is analyzed under asymmetrical short-circuit fault conditions. The SFCL is considered to introduce a resistance into the three-phase circuits when faults occur. Based on the power-angle curves for different short-circuit conditions of the single-line to ground, double-line to ground and line to line short-circuit faults, the influences of the SFCLs on transient stability are analyzed in detail. The time-domain simulation of transient stability is carried out to verify the analytical results.

  2. Effect of stimulus check size on multifocal visual evoked potentials.

    Science.gov (United States)

    Balachandran, Chandra; Klistorner, Alexander I; Graham, Stuart L

    2003-03-01

    In this study we examined the effects of varying stimulus check size on multifocal visual evoked potential (VEP). We also evaluated the currently used cortical scaling of stimulus segments. The ObjectiVision multifocal objective perimeter stimulates the eye with random check patterns at 56 cortically scaled segments within the visual field extending to a radius of 26 degrees. All cortically scaled segments have equal number of checks, which gradually increase in size from the center to the periphery, proportional to the size of the segment. Stimuli with 9, 16, 25, 36 and 49 checks/segment were tested on 10 eyes belonging to 10 normal subjects. The check size varied inversely with number of checks per segment. VEP was recorded using bipolar occipital cross electrodes (7 min/eye), the amplitude and latency of responses obtained were compared with the check size at different eccentricities. Our findings suggest that the existing setting with 16 checks/segment subtending 26' to 140' from center to periphery, is the most effective amongst all the check sizes. Decreasing the check size prolongs the latency in the central field only. Cortical scaling of segments generates responses of the same order of magnitude throughout the field, but could be improved slightly to enhance the signal from the outer two rings.

  3. Electric circuits problem solver

    CERN Document Server

    REA, Editors of

    2012-01-01

    Each Problem Solver is an insightful and essential study and solution guide chock-full of clear, concise problem-solving gems. All your questions can be found in one convenient source from one of the most trusted names in reference solution guides. More useful, more practical, and more informative, these study aids are the best review books and textbook companions available. Nothing remotely as comprehensive or as helpful exists in their subject anywhere. Perfect for undergraduate and graduate studies.Here in this highly useful reference is the finest overview of electric circuits currently av

  4. Linear integrated circuits

    CERN Document Server

    Carr, Joseph

    1996-01-01

    The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa

  5. Optoelectronics circuits manual

    CERN Document Server

    Marston, R M

    1999-01-01

    This manual is a useful single-volume guide specifically aimed at the practical design engineer, technician, and experimenter, as well as the electronics student and amateur. It deals with the subject in an easy to read, down to earth, and non-mathematical yet comprehensive manner, explaining the basic principles and characteristics of the best known devices, and presenting the reader with many practical applications and over 200 circuits. Most of the ICs and other devices used are inexpensive and readily available types, with universally recognised type numbers.The second edition

  6. Nano integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Yoon, Yung Sup

    2004-02-15

    This book contains nine chapters, which are introduction of manufacture of semiconductor chip, oxidation such as Dry-oxidation, wet oxidation, oxidation model and oxide film, diffusion like diffusion process, diffusion equation, diffusion coefficient and diffusion system, ion implantation, including ion distribution, channeling, multiimplantation and masking and its system, sputtering such as CVD and PVD, lithography, wet etch and dry etch, interconnection and flattening like metal-silicon connection, silicide, multiple layer metal process and flattening, an integrated circuit process, including MOSFET and CMOS.

  7. Photonic Integrated Circuits

    Science.gov (United States)

    Krainak, Michael; Merritt, Scott

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  8. Electronic logic circuits

    CERN Document Server

    Gibson, J

    2013-01-01

    Most branches of organizing utilize digital electronic systems. This book introduces the design of such systems using basic logic elements as the components. The material is presented in a straightforward manner suitable for students of electronic engineering and computer science. The book is also of use to engineers in related disciplines who require a clear introduction to logic circuits. This third edition has been revised to encompass the most recent advances in technology as well as the latest trends in components and notation. It includes a wide coverage of application specific integrate

  9. Electronics circuits and systems

    CERN Document Server

    Bishop, Owen

    2011-01-01

    The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Ea

  10. Electronics circuits and systems

    CERN Document Server

    Bishop, Owen

    2007-01-01

    The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Each chapter ends with a set

  11. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    Science.gov (United States)

    Clark, Lawrence T.; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  12. A correspondence between type checking via reduction and type checking via evaluation

    DEFF Research Database (Denmark)

    Sergey, Ilya; Clark, Dave

    2012-01-01

    We describe a derivational approach to proving the equivalence of different representations of a type system. Different ways of representing type assignments are convenient for particular applications such as reasoning or implementation, but some kind of correspondence between them should be proven....... In this paper we address two such semantics for type checking: one, due to Kuan et al., in the form of a term rewriting system and the other in the form of a traditional set of derivation rules. By employing a set of techniques investigated by Danvy et al., we mechanically derive the correspondence between...... a reduction-based semantics for type checking and a traditional one in the form of derivation rules, implemented as a recursive descent. The correspondence is established through a series of semantics-preserving functional program transformations....

  13. Symbolic transition graph and its early bisimulation checking algorithms for the π-calculus

    Institute of Scientific and Technical Information of China (English)

    李舟军; 陈火旺; 王兵山

    1999-01-01

    Symbolic transition graph is proposed as an intuitive and compact semantic model for the π-calculus processes.Various versions (strong/weak, ground/symbolic) of early operational semantics are given to such graphs. Based on them the corresponding versions of early bisimulation equivalences and observation congruence are defined. The notions of symbolic observation graph and symbolic congruence graph are also introduced, and followed by two theorems ensuring the elimination of τ-cycles and τ-edges. Finally algorithms for checking strong/weak early bisimulation equivalences and observation congruence are presented together with their correctness proofs. These results fuse and generalize the strong bisimulation checking algorithm for value-passing processes and the verification technique for weak bisimulation of pure-CCS to the finite control π-calculus.

  14. Communication Satellite Payload Special Check out Equipment (SCOE) for Satellite Testing

    Science.gov (United States)

    Subhani, Noman

    2016-07-01

    This paper presents Payload Special Check out Equipment (SCOE) for the test and measurement of communication satellite Payload at subsystem and system level. The main emphasis of this paper is to demonstrate the principle test equipment, instruments and the payload test matrix for an automatic test control. Electrical Ground Support Equipment (EGSE)/ Special Check out Equipment (SCOE) requirements, functions and architecture for C-band and Ku-band payloads are presented in details along with their interface with satellite during different phases of satellite testing. It provides test setup, in a single rack cabinet that can easily be moved from payload assembly and integration environment to thermal vacuum chamber all the way to launch site (for pre-launch test and verification).

  15. From Collective Adaptive Systems to Human Centric Computation and Back: Spatial Model Checking for Medical Imaging

    Directory of Open Access Journals (Sweden)

    Gina Belmonte

    2016-07-01

    Full Text Available Recent research on formal verification for Collective Adaptive Systems (CAS pushed advancements in spatial and spatio-temporal model checking, and as a side result provided novel image analysis methodologies, rooted in logical methods for topological spaces. Medical Imaging (MI is a field where such technologies show potential for ground-breaking innovation. In this position paper, we present a preliminary investigation centred on applications of spatial model checking to MI. The focus is shifted from pure logics to a mixture of logical, statistical and algorithmic approaches, driven by the logical nature intrinsic to the specification of the properties of interest in the field. As a result, novel operators are introduced, that could as well be brought back to the setting of CAS.

  16. 'Grounded' Politics

    DEFF Research Database (Denmark)

    Schmidt, Garbi

    2012-01-01

    play within one particular neighbourhood: Nørrebro in the Danish capital, Copenhagen. The article introduces the concept of grounded politics to analyse how groups of Muslim immigrants in Nørrebro use the space, relationships and history of the neighbourhood for identity political statements....... The article further describes how national political debates over the Muslim presence in Denmark affect identity political manifestations within Nørrebro. By using Duncan Bell’s concept of mythscape (Bell, 2003), the article shows how some political actors idealize Nørrebro’s past to contest the present...

  17. 49 CFR 236.13 - Spring switch; selection of signal control circuits through circuit controller.

    Science.gov (United States)

    2010-10-01

    ... circuits through circuit controller. 236.13 Section 236.13 Transportation Other Regulations Relating to...; selection of signal control circuits through circuit controller. The control circuits of signals governing... circuit controller, or through the contacts of relay repeating the position of such circuit...

  18. Quasi-Linear Circuit

    Science.gov (United States)

    Bradley, William; Bird, Ross; Eldred, Dennis; Zook, Jon; Knowles, Gareth

    2013-01-01

    This work involved developing spacequalifiable switch mode DC/DC power supplies that improve performance with fewer components, and result in elimination of digital components and reduction in magnetics. This design is for missions where systems may be operating under extreme conditions, especially at elevated temperature levels from 200 to 300 degC. Prior art for radiation-tolerant DC/DC converters has been accomplished utilizing classical magnetic-based switch mode converter topologies; however, this requires specific shielding and component de-rating to meet the high-reliability specifications. It requires complex measurement and feedback components, and will not enable automatic re-optimization for larger changes in voltage supply or electrical loading condition. The innovation is a switch mode DC/DC power supply that eliminates the need for processors and most magnetics. It can provide a well-regulated voltage supply with a gain of 1:100 step-up to 8:1 step down, tolerating an up to 30% fluctuation of the voltage supply parameters. The circuit incorporates a ceramic core transformer in a manner that enables it to provide a well-regulated voltage output without use of any processor components or magnetic transformers. The circuit adjusts its internal parameters to re-optimize its performance for changes in supply voltage, environmental conditions, or electrical loading at the output

  19. Automated Design of Quantum Circuits

    Science.gov (United States)

    Williams, Colin P.; Gray, Alexander G.

    2000-01-01

    In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in terms of a sequence of quantum gate operations. To date, such designs have either been found by hand or by exhaustive enumeration of all possible circuit topologies. In this paper we propose an automated approach to quantum circuit design using search heuristics based on principles abstracted from evolutionary genetics, i.e. using a genetic programming algorithm adapted specially for this problem. We demonstrate the method on the task of discovering quantum circuit designs for quantum teleportation. We show that to find a given known circuit design (one which was hand-crafted by a human), the method considers roughly an order of magnitude fewer designs than naive enumeration. In addition, the method finds novel circuit designs superior to those previously known.

  20. Large-scale circuit simulation

    Science.gov (United States)

    Wei, Y. P.

    1982-12-01

    The simulation of VLSI (Very Large Scale Integration) circuits falls beyond the capabilities of conventional circuit simulators like SPICE. On the other hand, conventional logic simulators can only give the results of logic levels 1 and 0 with the attendent loss of detail in the waveforms. The aim of developing large-scale circuit simulation is to bridge the gap between conventional circuit simulation and logic simulation. This research is to investigate new approaches for fast and relatively accurate time-domain simulation of MOS (Metal Oxide Semiconductors), LSI (Large Scale Integration) and VLSI circuits. New techniques and new algorithms are studied in the following areas: (1) analysis sequencing (2) nonlinear iteration (3) modified Gauss-Seidel method (4) latency criteria and timestep control scheme. The developed methods have been implemented into a simulation program PREMOS which could be used as a design verification tool for MOS circuits.

  1. Integrated circuit cooled turbine blade

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Ching-Pang; Jiang, Nan; Um, Jae Y.; Holloman, Harry; Koester, Steven

    2017-08-29

    A turbine rotor blade includes at least two integrated cooling circuits that are formed within the blade that include a leading edge circuit having a first cavity and a second cavity and a trailing edge circuit that includes at least a third cavity located aft of the second cavity. The trailing edge circuit flows aft with at least two substantially 180-degree turns at the tip end and the root end of the blade providing at least a penultimate cavity and a last cavity. The last cavity is located along a trailing edge of the blade. A tip axial cooling channel connects to the first cavity of the leading edge circuit and the penultimate cavity of the trailing edge circuit. At least one crossover hole connects the penultimate cavity to the last cavity substantially near the tip end of the blade.

  2. Check Six Begins on the Ground: Responding to the Evolving Ground Threat to U.S. Air Force Bases.

    Science.gov (United States)

    1995-01-01

    V, Chicago, 111.: University of Chicago Press, 1953. Crichton -Stuart, Michael , G Patrol, London: William Kimber, 1958. Davin, D. M., Crete...base-defense operations. We wish to ex- press special thanks to Col Michael Rader, Lt Col Vevoris, Maj Peterson, Capt Angelosanto, and Capt Chris

  3. Analyzing Interoperability of Protocols Using Model Checking

    Institute of Scientific and Technical Information of China (English)

    WUPeng

    2005-01-01

    In practical terms, protocol interoperability testing is still laborious and error-prone with little effect, even for those products that have passed conformance testing. Deadlock and unsymmetrical data communication are familiar in interoperability testing, and it is always very hard to trace their causes. The previous work has not provided a coherent way to analyze why the interoperability was broken among protocol implementations under test. In this paper, an alternative approach is presented to analyzing these problems from a viewpoint of implementation structures. Sequential and concurrent structures are both representative implementation structures, especially in event-driven development model. Our research mainly discusses the influence of sequential and concurrent structures on interoperability, with two instructive conclusions: (a) a sequential structure may lead to deadlock; (b) a concurrent structure may lead to unsymmetrical data communication. Therefore, implementation structures carry weight on interoperability, which may not gain much attention before. To some extent, they are decisive on the result of interoperability testing. Moreover, a concurrent structure with a sound task-scheduling strategy may contribute to the interoperability of a protocol implementation. Herein model checking technique is introduced into interoperability analysis for the first time. As the paper shows, it is an effective way to validate developers' selections on implementation structures or strategies.

  4. Check-up examination: recommendations in adults.

    Science.gov (United States)

    Virgini, Vanessa; Meindl-Fridez, Claudine; Battegay, Edouard; Zimmerli, Lukas U

    2015-01-01

    Check-up examinations, or periodic health examinations (PHEs), have gained in importance during the last decades and are nowadays among the most common reasons for consultations in primary care settings. The aim of PHEs is to identify risk factors and early signs of disease, but also to prevent future illness by early intervention. Therefore, each PHE should include counselling, immunisation and physical examination according to the patient's age and gender. However, deciding whether to screen a patient and choosing the most appropriate screening method can be challenging for general practitioners. The U.S. Preventive Service Task Force (USPSTF) provides updated recommendations on different existing preventive care measures based on relevant literature review. The aim of this review is to provide an updated statement of recommendations regarding preventive care measures based mostly on the guidelines derived from the USPSTF and the Swiss Medical Board. Among the major updates, there is no recommendation anymore to routinely screen for breast cancer and prostate cancer in asymptomatic adults. Since 2013, however, the USPSTF recommends annual screening for lung cancer with low-dose CT in patients aged 55 to 80 years with a smoking history of ≥30 pack years. During PHEs, the physician should be alert to the patients' hidden agendas, which are the reason for one third of all consultations in primary care.

  5. Effective ambiguity checking in biosequence analysis

    Directory of Open Access Journals (Sweden)

    Giegerich Robert

    2005-06-01

    Full Text Available Abstract Background Ambiguity is a problem in biosequence analysis that arises in various analysis tasks solved via dynamic programming, and in particular, in the modeling of families of RNA secondary structures with stochastic context free grammars. Several types of analysis are invalidated by the presence of ambiguity. As this problem inherits undecidability (as we show here from the namely problem for context free languages, there is no complete algorithmic solution to the problem of ambiguity checking. Results We explain frequently observed sources of ambiguity, and show how to avoid them. We suggest four testing procedures that may help to detect ambiguity when present, including a just-in-time test that permits to work safely with a potentially ambiguous grammar. We introduce, for the special case of stochastic context free grammars and RNA structure modeling, an automated partial procedure for proving non-ambiguity. It is used to demonstrate non-ambiguity for several relevant grammars. Conclusion Our mechanical proof procedure and our testing methods provide a powerful arsenal of methods to ensure non-ambiguity.

  6. CFD analysis of a ball check microvalve

    Science.gov (United States)

    Cǎlimǎnescu, Ioan; Dumitrache, Constantin L.; Grigorescu, Lucian

    2015-02-01

    The microvalves with balls as seen before are used in many applications and their behaviour in terms of fluid dynamics mainly at their opening time (when as demonstrated the ball is bouncing up and down altering the flow parameters) is of a paramount importance. The present study is focused on a micro check ball valve circulating a fluid air-like (with the same constant proprieties). The CFD model is taking into account a transitory zone of functioning from zero time when the pressure inside a "tank" is reaching the opening pressure of the valve, to the final step 0.05 seconds when the ball is stabilizing after bouncing up and down. The geometry of the valve with dimensions in μm is given below (the model is comprising a "slice" of 5 μm thickness extracted from the entire valve. In this paper by using advanced numeric techniques, the behavior of the valve in its transitory opening stage was studied with credible and useful results for further optimisation studies.

  7. Analyzing Mode Confusion via Model Checking

    Science.gov (United States)

    Luettgen, Gerald; Carreno, Victor

    1999-01-01

    Mode confusion is one of the most serious problems in aviation safety. Today's complex digital flight decks make it difficult for pilots to maintain awareness of the actual states, or modes, of the flight deck automation. NASA Langley leads an initiative to explore how formal techniques can be used to discover possible sources of mode confusion. As part of this initiative, a flight guidance system was previously specified as a finite Mealy automaton, and the theorem prover PVS was used to reason about it. The objective of the present paper is to investigate whether state-exploration techniques, especially model checking, are better able to achieve this task than theorem proving and also to compare several verification tools for the specific application. The flight guidance system is modeled and analyzed in Murphi, SMV, and Spin. The tools are compared regarding their system description language, their practicality for analyzing mode confusion, and their capabilities for error tracing and for animating diagnostic information. It turns out that their strengths are complementary.

  8. CMOS Nonlinear Signal Processing Circuits

    OpenAIRE

    2010-01-01

    The chapter describes various nonlinear signal processing CMOS circuits, including a high reliable WTA/LTA, simple MED cell, and low-voltage arbitrary order extractor. We focus the discussion on CMOS analog circuit design with reliable, programmable capability, and low voltage operation. It is a practical problem when the multiple identical cells are required to match and realized within a single chip using a conventional process. Thus, the design of high-reliable circuit is indeed needed. Th...

  9. Analog electronic neural network circuits

    Energy Technology Data Exchange (ETDEWEB)

    Graf, H.P.; Jackel, L.D. (AT and T Bell Labs., Holmdel, NJ (USA))

    1989-07-01

    The large interconnectivity and moderate precision required in neural network models present new opportunities for analog computing. This paper discusses analog circuits for a variety of problems such as pattern matching, optimization, and learning. Most of the circuits build so far are relatively small, exploratory designs. The most mature circuits are those for template matching. Chips performing this function are now being applied to pattern recognition problems.

  10. Transistor switching and sequential circuits

    CERN Document Server

    Sparkes, John J

    1969-01-01

    Transistor Switching and Sequential Circuits presents the basic ideas involved in the construction of computers, instrumentation, pulse communication systems, and automation. This book discusses the design procedure for sequential circuits. Organized into two parts encompassing eight chapters, this book begins with an overview of the ways on how to generate the types of waveforms needed in digital circuits, principally ramps, square waves, and delays. This text then considers the behavior of some simple circuits, including the inverter, the emitter follower, and the long-tailed pair. Other cha

  11. Unstable oscillators based hyperchaotic circuit

    DEFF Research Database (Denmark)

    Murali, K.; Tamasevicius, A.; G. Mykolaitis, A.;

    1999-01-01

    A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations in the circ......A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations...

  12. Verifying Multi-Agent Systems via Unbounded Model Checking

    Science.gov (United States)

    Kacprzak, M.; Lomuscio, A.; Lasica, T.; Penczek, W.; Szreter, M.

    2004-01-01

    We present an approach to the problem of verification of epistemic properties in multi-agent systems by means of symbolic model checking. In particular, it is shown how to extend the technique of unbounded model checking from a purely temporal setting to a temporal-epistemic one. In order to achieve this, we base our discussion on interpreted systems semantics, a popular semantics used in multi-agent systems literature. We give details of the technique and show how it can be applied to the well known train, gate and controller problem. Keywords: model checking, unbounded model checking, multi-agent systems

  13. A Circuit to Demonstrate Phase Relationships in "RLC" Circuits

    Science.gov (United States)

    Sokol, P. E.; Warren, G.; Zheng, B.; Smith, P.

    2013-01-01

    We have developed a circuit to demonstrate the phase relationships between resistive and reactive elements in series "RLC" circuits. We utilize a differential amplifier to allow the phases of the three elements and the current to be simultaneously displayed on an inexpensive four channel oscilloscope. We have included a novel circuit…

  14. 25 CFR 115.704 - May we accept for deposit into a trust account retirement checks/payments or pension fund checks...

    Science.gov (United States)

    2010-04-01

    ... checks/payments or pension fund checks/payments even though those funds are not specified in § 115.702... May we accept for deposit into a trust account retirement checks/payments or pension fund checks.../payments or pension fund checks/payments or any funds from sources that are not identified in the table in...

  15. VLSI circuits implementing computational models of neocortical circuits.

    Science.gov (United States)

    Wijekoon, Jayawan H B; Dudek, Piotr

    2012-09-15

    This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling.

  16. A Comparative Parametric Analysis of the Ground Fault Current Distribution on Overhead Transmission Lines

    OpenAIRE

    VINTAN, M.

    2016-01-01

    The ground fault current distribution in an effectively grounded power network is affected by various factors, such as: tower footing impedances, spans lengths, configuration and parameters of overhead ground wires and power conductors, soil resistivity etc. In this paper, we comparatively analyze, using different models, the ground fault current distribution in a single circuit transmission line with one ground wire. A parametric comparative analysis was done in order to stud...

  17. Modeling cortical circuits.

    Energy Technology Data Exchange (ETDEWEB)

    Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon

    2010-09-01

    The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.

  18. Memristor Circuits and Systems

    KAUST Repository

    Zidan, Mohammed A.

    2015-05-01

    Current CMOS-based technologies are facing design challenges related to the continuous scaling down of the minimum feature size, according to Moore’s law. Moreover, conventional computing architecture is no longer an effective way of fulfilling modern applications demands, such as big data analysis, pattern recognition, and vector processing. Therefore, there is an exigent need to shift to new technologies, at both the architecture and the device levels. Recently, memristor devices and structures attracted attention for being promising candidates for this job. Memristor device adds a new dimension for designing novel circuits and systems. In addition, high-density memristor-based crossbar is widely considered to be the essential element for future memory and bio-inspired computing systems. However, numerous challenges need to be addressed before the memristor genuinely replaces current memory and computing technologies, which is the motivation behind this research effort. In order to address the technology challenges, we begin by fabricating and modeling the memristor device. The devices fabricated at our local clean room enriched our understanding of the memristive phenomenon and enabled the experimental testing for our memristor-based circuits. Moreover, our proposed mathematical modeling for memristor behavior is an essential element for the theoretical circuit design stage. Designing and addressing the challenges of memristor systems with practical complexity, however, requires an extra step, which takes the form of a reliable and modular simulation platform. We, therefore, built a new simulation platform for the resistive crossbar, which can simulate realistic size arrays filled with real memory data. In addition, this simulation platform includes various crossbar nonidealities in order to obtain accurate simulation results. Consequently, we were able to address the significant challenges facing the high density memristor crossbar, as the building block for

  19. A dishwasher for circuits

    CERN Multimedia

    Rosaria Marraffino

    2014-01-01

    You have always been told that electronic devices fear water. However, at the Surface Mount Devices (SMD) Workshop here at CERN all the electronic assemblies are cleaned with a machine that looks like a… dishwasher.   The circuit dishwasher. Credit: Clara Nellist.  If you think the image above shows a dishwasher, you wouldn’t be completely wrong. Apart from the fact that the whole pumping system and the case itself are made entirely from stainless steel and chemical resistant materials, and the fact that it washes electrical boards instead of dishes… it works exactly like a dishwasher. It’s a professional machine (mainly used in the pharmaceutical industry) designed to clean everything that can be washed with a water-based chemical soap. This type of treatment increases the lifetime of the electronic boards and therefore the LHC's reliability by preventing corrosion problems in the severe radiation and ozone environment of the LHC tunn...

  20. Basic electronic circuits

    CERN Document Server

    Buckley, P M

    1980-01-01

    In the past, the teaching of electricity and electronics has more often than not been carried out from a theoretical and often highly academic standpoint. Fundamentals and basic concepts have often been presented with no indication of their practical appli­ cations, and all too frequently they have been illustrated by artificially contrived laboratory experiments bearing little relationship to the outside world. The course comes in the form of fourteen fairly open-ended constructional experiments or projects. Each experiment has associated with it a construction exercise and an explanation. The basic idea behind this dual presentation is that the student can embark on each circuit following only the briefest possible instructions and that an open-ended approach is thereby not prejudiced by an initial lengthy encounter with the theory behind the project; this being a sure way to dampen enthusiasm at the outset. As the investigation progresses, questions inevitably arise. Descriptions of the phenomena encounte...

  1. Diamond Integrated Optomechanical Circuits

    CERN Document Server

    Rath, Patrik; Nebel, Christoph; Wild, Christoph; Pernice, Wolfram H P

    2013-01-01

    Diamond offers unique material advantages for the realization of micro- and nanomechanical resonators due to its high Young's modulus, compatibility with harsh environments and superior thermal properties. At the same time, the wide electronic bandgap of 5.45eV makes diamond a suitable material for integrated optics because of broadband transparency and the absence of free-carrier absorption commonly encountered in silicon photonics. Here we take advantage of both to engineer full-scale optomechanical circuits in diamond thin films. We show that polycrystalline diamond films fabricated by chemical vapour deposition provide a convenient waferscale substrate for the realization of high quality nanophotonic devices. Using free-standing nanomechanical resonators embedded in on-chip Mach-Zehnder interferometers, we demonstrate efficient optomechanical transduction via gradient optical forces. Fabricated diamond resonators reproducibly show high mechanical quality factors up to 11,200. Our low cost, wideband, carri...

  2. Resilience of the quantum Rabi model in circuit QED

    Science.gov (United States)

    E Manucharyan, Vladimir; Baksic, Alexandre; Ciuti, Cristiano

    2017-07-01

    In circuit quantum electrodynamics (circuit QED), an artificial ‘circuit atom’ can couple to a quantized microwave radiation much stronger than its real atomic counterpart. The celebrated quantum Rabi model describes the simplest interaction of a two-level system with a single-mode boson field. When the coupling is large enough, the bare multilevel structure of a realistic circuit atom cannot be ignored even if the circuit is strongly anharmonic. We explored this situation theoretically for flux (fluxonium) and charge (Cooper pair box) type multi-level circuits tuned to their respective flux/charge degeneracy points. We identified which spectral features of the quantum Rabi model survive and which are renormalized for large coupling. Despite significant renormalization of the low-energy spectrum in the fluxonium case, the key quantum Rabi feature—nearly-degenerate vacuum consisting of an atomic state entangled with a multi-photon field—appears in both types of circuits when the coupling is sufficiently large. Like in the quantum Rabi model, for very large couplings the entanglement spectrum is dominated by only two, nearly equal eigenvalues, in spite of the fact that a large number of bare atomic states are actually involved in the atom-resonator ground state. We interpret the emergence of the two-fold degeneracy of the vacuum of both circuits as an environmental suppression of flux/charge tunneling due to their dressing by virtual low-/high-impedance photons in the resonator. For flux tunneling, the dressing is nothing else than the shunting of a Josephson atom with a large capacitance of the resonator. Suppression of charge tunneling is a manifestation of the dynamical Coulomb blockade of transport in tunnel junctions connected to resistive leads.

  3. Liability of Banking Institutions for the Payment of Forged or Altered Checks in Colombia

    Directory of Open Access Journals (Sweden)

    Jorge Alberto Padilla Sánchez

    2017-07-01

    Full Text Available We face a trend to turn liability of financial institutions to strict liability for breach of their contractual obligations, trend that has been extended by the Colombian judicial activity to situations that do not have legal grounds, under the pretext of protecting the financial consumer as a subject of special protection by the law. Perhaps one of the most emblematic cases of this trend is the responsibility of banking institutions for payment of counterfeit or adulterated checks, which does have a legal mandate that allows distinguish it from the general system of responsibility of such entities.

  4. Comminution circuits for compact itabirites

    Directory of Open Access Journals (Sweden)

    Pedro Ferreira Pinto

    Full Text Available Abstract In the beneficiation of compact Itabirites, crushing and grinding account for major operational and capital costs. As such, the study and development of comminution circuits have a fundamental importance for feasibility and optimization of compact Itabirite beneficiation. This work makes a comparison between comminution circuits for compact Itabirites from the Iron Quadrangle. The circuits developed are: a crushing and ball mill circuit (CB, a SAG mill and ball mill circuit (SAB and a single stage SAG mill circuit (SSSAG. For the SAB circuit, the use of pebble crushing is analyzed (SABC. An industrial circuit for 25 million tons of run of mine was developed for each route from tests on a pilot scale (grinding and industrial scale. The energy consumption obtained for grinding in the pilot tests was compared with that reported by Donda and Bond. The SSSAG route had the lowest energy consumption, 11.8kWh/t and the SAB route had the highest energy consumption, 15.8kWh/t. The CB and SABC routes had a similar energy consumption of 14.4 kWh/t and 14.5 kWh/t respectively.

  5. Sequential Polarity-Reversing Circuit

    Science.gov (United States)

    Labaw, Clayton C.

    1994-01-01

    Proposed circuit reverses polarity of electric power supplied to bidirectional dc motor, reversible electro-mechanical actuator, or other device operating in direction depending on polarity. Circuit reverses polarity each time power turned on, without need for additional polarity-reversing or direction signals and circuitry to process them.

  6. Logic Circuit Design Selected Methods

    CERN Document Server

    Vingron, Shimon P

    2012-01-01

        In three main divisions the  book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have  no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard.         The design of combinational circuits is discussed in an orthodox manner using normal forms and in an unorthodox manner using set-theoretical evaluation formulas relying heavily on Karnaugh maps. The latter approach allows for a new design technique called composition.          Latches are covered very extensively. Their memory functions are expressed mathematically in a time-independent manner allowing the use of (normal, non-temporal) Boolean logic in their calculation. The theory of latches is then used as the basis for calculating asynchronous circuits.         Asynchronous circuits are specified in a tree-representation, eac...

  7. Enhancement of Linear Circuit Program

    DEFF Research Database (Denmark)

    Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian

    1996-01-01

    In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interface...

  8. Short-circuit impedance measurement

    DEFF Research Database (Denmark)

    Pedersen, Knud Ole Helgesen; Nielsen, Arne Hejde; Poulsen, Niels Kjølstad

    2003-01-01

    Methods for estimating the short-circuit impedance in the power grid are investigated for various voltage levels and situations. The short-circuit impedance is measured, preferably from naturally occurring load changes in the grid, and it is shown that such a measurement system faces different...

  9. Dive In to Aquatic Circuits.

    Science.gov (United States)

    Goldfarb, Joseph M.

    1995-01-01

    The article presents a method for swimming teachers and coaches to stave off workout boredom in their students by using a circuit in the pool. After explaining how to set up a training circuit, the article describes sample stations and notes important safety precautions. (SM)

  10. Enhancement of Linear Circuit Program

    DEFF Research Database (Denmark)

    Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian

    1996-01-01

    In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interfac...

  11. Accurate Switched-Voltage voltage averaging circuit

    OpenAIRE

    金光, 一幸; 松本, 寛樹

    2006-01-01

    Abstract ###This paper proposes an accurate Switched-Voltage (SV) voltage averaging circuit. It is presented ###to compensated for NMOS missmatch error at MOS differential type voltage averaging circuit. ###The proposed circuit consists of a voltage averaging and a SV sample/hold (S/H) circuit. It can ###operate using nonoverlapping three phase clocks. Performance of this circuit is verified by PSpice ###simulations.

  12. 46 CFR 169.670 - Circuit breakers.

    Science.gov (United States)

    2010-10-01

    ... 46 Shipping 7 2010-10-01 2010-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST... Gross Tons § 169.670 Circuit breakers. Each circuit breaker must be of the manually reset type designed... the circuit without damage to the circuit breaker....

  13. 31 CFR 240.11 - Treasury Check Offset.

    Science.gov (United States)

    2010-07-01

    ... 31 Money and Finance: Treasury 2 2010-07-01 2010-07-01 false Treasury Check Offset. 240.11 Section 240.11 Money and Finance: Treasury Regulations Relating to Money and Finance (Continued) FISCAL SERVICE, DEPARTMENT OF THE TREASURY FINANCIAL MANAGEMENT SERVICE INDORSEMENT AND PAYMENT OF CHECKS...

  14. Dynamic State Space Partitioning for External Memory Model Checking

    DEFF Research Database (Denmark)

    Evangelista, Sami; Kristensen, Lars Michael

    2009-01-01

    We describe a dynamic partitioning scheme usable by model checking techniques that divide the state space into partitions, such as most external memory and distributed model checking algorithms. The goal of the scheme is to reduce the number of transitions that link states belonging to different...

  15. BACKGROUND ELIMINATION IN BANK CHECKS USING GREYSCALE MORPHOLOGY

    NARCIS (Netherlands)

    Shetty, S.; Shridhar, M.; Houle, G.

    2004-01-01

    In this paper we propose a new method of background elimination in personal bank checks to facilitate machine recognition of user entered information. One of the key problems that affect the extraction of user entered information is the wide diversity of the backgrounds of checks. They have differen

  16. 31 CFR 10.31 - Negotiation of taxpayer checks.

    Science.gov (United States)

    2010-07-01

    ... 31 Money and Finance: Treasury 1 2010-07-01 2010-07-01 false Negotiation of taxpayer checks. 10.31 Section 10.31 Money and Finance: Treasury Office of the Secretary of the Treasury PRACTICE BEFORE THE... § 10.31 Negotiation of taxpayer checks. A practitioner who prepares tax returns may not endorse...

  17. 16 CFR 240.12 - Checking customer's use of payments.

    Science.gov (United States)

    2010-01-01

    ... 16 Commercial Practices 1 2010-01-01 2010-01-01 false Checking customer's use of payments. 240.12 Section 240.12 Commercial Practices FEDERAL TRADE COMMISSION GUIDES AND TRADE PRACTICE RULES GUIDES FOR ADVERTISING ALLOWANCES AND OTHER MERCHANDISING PAYMENTS AND SERVICES § 240.12 Checking customer's use...

  18. 19 CFR 111.41 - Endorsement of checks.

    Science.gov (United States)

    2010-04-01

    ... 19 Customs Duties 1 2010-04-01 2010-04-01 false Endorsement of checks. 111.41 Section 111.41 Customs Duties U.S. CUSTOMS AND BORDER PROTECTION, DEPARTMENT OF HOMELAND SECURITY; DEPARTMENT OF THE TREASURY CUSTOMS BROKERS Duties and Responsibilities of Customs Brokers § 111.41 Endorsement of checks....

  19. Development of a stainless steel check valve for cryogenic applications

    NARCIS (Netherlands)

    Veenstra, T.T.; Venhorst, G.C.F.; Burger, J.F.; Holland, H.J.; Brake, ter H.J.M.; Sirbi, A.; Rogalla, H.

    2007-01-01

    This paper describes the development of a check valve for use in a sorption compressor that will drive a 10 mW 4.5 K Joule–Thomson cryocooler. For the check valve extremely low backflow rates are tolerable at an operating temperature of the valve of 50 K. To fulfill these requirements, the sealing m

  20. U.T.E.S. Interest Check List.

    Science.gov (United States)

    Manpower Administration (DOL), Washington, DC.

    The revised Oregon metro edition of the U.T.E.S. interest check list for intermediate education aims at helping students decide what kinds of work they would like and lists activities that are found in a broad range of industries and occupations in the nation. Specific instructions advise the student that the check list is not a test and that…

  1. 26 CFR 301.6657-1 - Bad checks.

    Science.gov (United States)

    2010-04-01

    ... 26 Internal Revenue 18 2010-04-01 2010-04-01 false Bad checks. 301.6657-1 Section 301.6657-1... Additions to the Tax and Additional Amounts § 301.6657-1 Bad checks. (a) In general. Except as provided in... district director that it was tendered in good faith with reasonable cause to believe that it would be...

  2. Strategic Planning through Model Checking of ATL Formulae

    NARCIS (Netherlands)

    Jamroga, W.J.; Rutkowski, L.; Siekmann, J.; Tadeusiewicz, R.; Zadeh, L.A.

    2004-01-01

    Model checking of temporal logic has already been proposed for automatic planning. In this paper, we introduce a simple adaptation of the ATL model checking algorithm that returns a strategy to achieve given goal. We point out that the algorithm generalizes minimaxing, and that ATL models generalize

  3. Check-up Measurement (update). Deliverable D5.22

    NARCIS (Netherlands)

    Holtzer, A.C.G.; Giessen, A.M.D. van der; Djurica, M.

    2015-01-01

    This deliverable D5.22 presents the GEN6 check-up measurement. It describes the most prominent outcomes of the GEN6 project up to this point in time. The check-up measurement helps to focus the monitoring towards the most relevant achievements of the project, such that an efficient and well-targeted

  4. Modern Trends in Airport Self Check-in Kiosks

    Directory of Open Access Journals (Sweden)

    Jarmila Sabatová

    2016-10-01

    Full Text Available Due to maintain the flow of the check-in process of air passengers, it is essential that services that ensure this process have been carried as quickly and effectively. One of the major current problems in this area is the efficiency of clearance of a large number of passengers over the check-in counters. By the gradual development of so-called self check-in services eventually delegate some activities in check-in process to passengers and the entire clearance process to speed up. In this article the authors deal with current state of the use of self check-in services in the world and predict the expected evolution of these services in the future. Subsequently, the authors present a new design of self-service kiosk and graphical user interface (GUI of application such self-service check-in kiosk based on the analysis of the functions and features of similar solutions available on the market and with considering all currently known IATA requirements and the criteria relating to disabled passengers in order to lighten the load check-in counters and thereby accelerated the clearance of the passenger at the airport. The aim of the authors was to create a cost competitive solution offering such new features and services that do not offer other solutions, with an emphasis on improving the efficiency of the check-in process of passengers at the airport.

  5. 76 FR 16861 - Availability of Funds and Collection of Checks

    Science.gov (United States)

    2011-03-25

    ... proposed rule. \\29\\ See Regulation CC Sec. 229.20 and EFA Act Sec. 608. A state's funds-availability law...: Background Regulation CC (12 CFR part 229) implements the Expedited Funds Availability Act (EFA Act) and the Check Clearing for the 21st Century Act (Check 21 Act).\\1\\ The Board implemented the EFA Act in...

  6. Not Just right experiences as ironic result of perseverative checking

    NARCIS (Netherlands)

    van Dis, E.A.M.; van den Hout, M.A.

    2016-01-01

    Objective: patients with obsessive-compulsive disorder (ocD) typically report to have “not just right experiences” (NJRE). up till now it is unclear which behavioral ocD features may give rise to NJREs. We used an induced checking paradigm to experimentally study whether perseverative checking

  7. Checking Consistency of Pedigree Information is NP-complete

    DEFF Research Database (Denmark)

    Aceto, Luca; Hansen, Jens A.; Ingolfsdottir, Anna

    Consistency checking is a fundamental computational problem in genetics. Given a pedigree and information on the genotypes of some of the individuals in it, the aim of consistency checking is to determine whether these data are consistent with the classic Mendelian laws of inheritance. This probl...

  8. Quinpirole and 8-OH-DPAT induce compulsive checking behavior in male rats by acting on different functional parts of an OCD neurocircuit.

    Science.gov (United States)

    Alkhatib, Ahmad H; Dvorkin-Gheva, Anna; Szechtman, Henry

    2013-02-01

    This study investigated whether the serotonin 5-HT1A receptor agonist 8-hydroxy-2-(di-n-propylamino) tetralin (8-OH-DPAT) can induce compulsive checking in a large open field, as does the dopamine D2/D3 receptor agonist quinpirole. To induce compulsive checking, male rats were exposed to eight injections of either 8-OH-DPAT (1 mg/kg), quinpirole (0.2 mg/kg), or saline. Subsequently, to assess cross-sensitization, rats received an acute challenge of 8-OH-DPAT or quinpirole. The results showed that treatment with 8-OH-DPAT induces compulsive checking and may have a stronger effect on this behavior compared with quinpirole. However, there was no cross-sensitization between 8-OH-DPAT and quinpirole on measures of compulsive checking and locomotion. Moreover, the spatial distribution of locomotor paths in 8-OH-DPAT animals was more confined and invariant than in quinpirole rats; their rate of locomotor sensitization was also faster than that in quinpirole animals. Thus, although 8-OH-DPAT and quinpirole can induce compulsive checking in a large open field, the results suggest that they do so differently. It is suggested that 8-OH-DPAT and quinpirole probably produce compulsive behavior by acting on different parts of a security motivation circuit underlying obsessive-compulsive disorder. Quinpirole may induce compulsive checking behavior by directly driving dopaminergic activity mediating the motivational drive to check. Conversely, 8-OH-DPAT may perpetuate the activated motivational state by inhibiting the serotonergic-negative feedback signals that normally deactivate the obsessive-compulsive disorder circuit.

  9. Statistical Model Checking of Rich Models and Properties

    DEFF Research Database (Denmark)

    Poulsen, Danny Bøgsted

    in undecidability issues for the traditional model checking approaches. Statistical model checking has proven itself a valuable supplement to model checking and this thesis is concerned with extending this software validation technique to stochastic hybrid systems. The thesis consists of two parts: the first part......Software is in increasing fashion embedded within safety- and business critical processes of society. Errors in these embedded systems can lead to human casualties or severe monetary loss. Model checking technology has proven formal methods capable of finding and correcting errors in software....... However, software is approaching the boundary in terms of the complexity and size that model checking can handle. Furthermore, software systems are nowadays more frequently interacting with their environment hence accurately modelling such systems requires modelling the environment as well - resulting...

  10. Using hospital pharmacy technicians to check unit dose carts.

    Science.gov (United States)

    Spooner, S H; Emerson, P K

    1994-05-01

    This study was undertaken to evaluate the accuracy of technicians checking unit dose carts as compared with pharmacists checking unit dose carts. The final (after check) fill in both arms of the study was evaluated for accuracy on the same five criteria: 1) correct drug, 2) correct dose, 3) correct dosage form, 4) correct quantity, and 5) expiration date. In the technician arm, 7571 doses were checked with 10 errors, giving a 99.76% (1 error in 420) accuracy. In the pharmacist arm of the study, 3116 doses were checked with 34 total errors, giving a 98.91% (1 error in 92) accuracy. The results of this study indicate that technicians would have as high if not a higher accuracy rate than pharmacists. Using pharmacy technicians in this role should continue the same level of care by maintaining a high accuracy in medication dispensing and provide greater economic benefit to the organization by using technical rather than professional personnel.

  11. Counterexample-Preserving Reduction for Symbolic Model Checking

    Directory of Open Access Journals (Sweden)

    Wanwei Liu

    2014-01-01

    Full Text Available The cost of LTL model checking is highly sensitive to the length of the formula under verification. We observe that, under some specific conditions, the input LTL formula can be reduced to an easier-to-handle one before model checking. In such reduction, these two formulae need not to be logically equivalent, but they share the same counterexample set w.r.t the model. In the case that the model is symbolically represented, the condition enabling such reduction can be detected with a lightweight effort (e.g., with SAT-solving. In this paper, we tentatively name such technique “counterexample-preserving reduction” (CePRe, for short, and the proposed technique is evaluated by conducting comparative experiments of BDD-based model checking, bounded model checking, and property directed reachability-(IC3 based model checking.

  12. Photodiode circuits for retinal prostheses.

    Science.gov (United States)

    Loudin, J D; Cogan, S F; Mathieson, K; Sher, A; Palanker, D V

    2011-10-01

    Photodiode circuits show promise for the development of high-resolution retinal prostheses. While several of these systems have been constructed and some even implanted in humans, existing descriptions of the complex optoelectronic interaction between light, photodiode, and the electrode/electrolyte load are limited. This study examines this interaction in depth with theoretical calculations and experimental measurements. Actively biased photoconductive and passive photovoltaic circuits are investigated, with the photovoltaic circuits consisting of one or more diodes connected in series, and the photoconductive circuits consisting of a single diode in series with a pulsed bias voltage. Circuit behavior and charge injection levels were markedly different for platinum and sputtered iridium-oxide film (SIROF) electrodes. Photovoltaic circuits were able to deliver 0.038 mC/cm(2) (0.75 nC/phase) per photodiode with 50- μm platinum electrodes, and 0.54-mC/cm(2) (11 nC/phase) per photodiode with 50-μ m SIROF electrodes driven with 0.5-ms pulses of light at 25 Hz. The same pulses applied to photoconductive circuits with the same electrodes were able to deliver charge injections as high as 0.38 and 7.6 mC/cm(2) (7.5 and 150 nC/phase), respectively. We demonstrate photovoltaic stimulation of rabbit retina in-vitro, with 0.5-ms pulses of 905-nm light using peak irradiance of 1 mW/mm(2). Based on the experimental data, we derive electrochemical and optical safety limits for pixel density and charge injection in various circuits. While photoconductive circuits offer smaller pixels, photovoltaic systems do not require an external bias voltage. Both classes of circuits show promise for the development of high-resolution optoelectronic retinal prostheses.

  13. Packaging printed circuit boards: A production application of interactive graphics

    Science.gov (United States)

    Perrill, W. A.

    1975-01-01

    The structure and use of an Interactive Graphics Packaging Program (IGPP), conceived to apply computer graphics to the design of packaging electronic circuits onto printed circuit boards (PCB), were described. The intent was to combine the data storage and manipulative power of the computer with the imaginative, intuitive power of a human designer. The hardware includes a CDC 6400 computer and two CDC 777 terminals with CRT screens, light pens, and keyboards. The program is written in FORTRAN 4 extended with the exception of a few functions coded in COMPASS (assembly language). The IGPP performs four major functions for the designer: (1) data input and display, (2) component placement (automatic or manual), (3) conductor path routing (automatic or manual), and (4) data output. The most complex PCB packaged to date measured 16.5 cm by 19 cm and contained 380 components, two layers of ground planes and four layers of conductors mixed with ground planes.

  14. 12 CFR Appendix A to Part 229 - Routing Number Guide to Next-Day Availability Checks and Local Checks

    Science.gov (United States)

    2010-01-01

    ... Checks and Local Checks A Appendix A to Part 229 Banks and Banking FEDERAL RESERVE SYSTEM (CONTINUED... Association. The routing number takes two forms: a fractional form and a nine-digit form. A paying bank... bank. B. The first four digits of the nine-digit routing number (and the denominator of the fractional...

  15. Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

    OpenAIRE

    石橋, 孝昭

    2012-01-01

    This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

  16. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area of any coal mine shall be protected by suitable circuit breakers of adequate interrupting...

  17. Performance analysis of electrical circuits /PANE/

    Science.gov (United States)

    Johnson, K. L.; Steinberg, L. L.

    1968-01-01

    Automated statistical and worst case computer program has been designed to perform dc and ac steady circuit analyses. The program determines the worst case circuit performance by solving circuit equations.

  18. Evolution of Quantum State for Mesoscopic Circuits with Dissipation

    Institute of Scientific and Technical Information of China (English)

    WAN Hua-Ming; LUO Hai-Mei; WANG Yi-Fan

    2005-01-01

    Based on the maximum entropy principle, we present a density matrix of mesoscopic RLC circuit to make it possible to analyze the connection of the initial condition with temperature. Our results show that the quantum state evolution is closely related to the initial condition, and that the system evolves to generalized coherent state if it is in ground state initially, and evolves to squeezed state if it is in excited state initially.

  19. Electronically Tunable Quadrature Oscillator Using Translinear Conveyors and Grounded Capacitors

    OpenAIRE

    Sudhanshu Maheshwari

    2003-01-01

    A new electronically tunable current-mode sinusoidal oscillator with three quadrature outputs is presented. The proposed circuit employs three translinear conveyors and two grounded capacitors to realize three quadrature outputs with independent frequency control. The circuit requires no resistors and the frequency of the oscillator can be varied over a wide range by external current control. RSPICE simulation results using the bipolar implementation of translinear conveyors are given to s...

  20. Grounded Capacitor Oscillators Using A Single Operational Transconductance Amplifier

    OpenAIRE

    Muhammad Taher Abuelma'atti; Muhammad Haroon Khan

    1996-01-01

    New oscillator circuits using operational transconductance amplifiers (OTAs) are presented. Each circuit uses a single OTA and grounded capacitors. The feasibility of obtaining oscillators with independent control of frequency and oscillation is considered. Also, the feasibility of exploiting, to advantage, the frequency dependence of the OTA-transconductance is considered. This may result in OTA-based RC oscillators using only one externally-connected capacitor.

  1. Variational integrators for electric circuits

    Energy Technology Data Exchange (ETDEWEB)

    Ober-Blöbaum, Sina, E-mail: sinaob@math.upb.de [Computational Dynamics and Optimal Control, University of Paderborn (Germany); Tao, Molei [Courant Institute of Mathematical Sciences, New York University (United States); Cheng, Mulin [Applied and Computational Mathematics, California Institute of Technology (United States); Owhadi, Houman; Marsden, Jerrold E. [Control and Dynamical Systems, California Institute of Technology (United States); Applied and Computational Mathematics, California Institute of Technology (United States)

    2013-06-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator.

  2. Design, Implementation and Evaluation of a Pump-Controlled Circuit for Single Rod Actuators

    Directory of Open Access Journals (Sweden)

    Ahmed Imam

    2017-02-01

    Full Text Available Pump-controlled hydraulic circuits are more efficient than valve-controlled circuits, as they eliminate the energy losses due to flow throttling in valves and require less cooling effort. Presently existing pump-controlled solutions for single rod cylinders encounter an undesirable performance during certain operating conditions. This paper investigates the performance issues in common pump-controlled circuits for the single rod actuators. Detailed analysis is conducted that identifies these regions in a load-velocity plane and the factors affecting them. The findings are validated by experimental results. A new design is then proposed that employs a limited throttling valve alongside two pilot operated check valves for differential flow compensation to improve the performance. The valve is of the flow control type and is chosen to have a throttling effect over critical regions; it has the least throttling over other operating regions, thus maintaining efficiency. Experimental work demonstrates improved performance in a full operating range of the actuator as compared to a circuit that uses only the pilot-operated check valves. This circuit is energy efficient and capable of recuperating energy.

  3. Generating Squeezed States in Solid State Circuits

    Institute of Scientific and Technical Information of China (English)

    REN Xin-An; WEN Yi-Huo; ZHANG Li-You; LONG Gui-Lu

    2008-01-01

    We propose a scheme for generating squeezed states in solid state circuits which consist a superconducting transmission line resonator (STLR), a superconducting Cooper-pair box (CPB) and a nanoelectromechanical resonator (NMR). The nonlinear interaction between the STLR and the CPB can be implemented by setting the external biased flux of the CPB at some certain points. The interaction Hamiltonian between the STLR and the NMR is derived by performing Fr 5hlich transformation on the total Hamiltonian of the combined system. Just by adiabatically keeping the CPB at the ground state, we get the standard parametric down-conversion Hamiltonian, and the squeezed states of the STLR can be easily generated, which is similar to the three-wave mixing in quantum optics.

  4. Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits

    Science.gov (United States)

    Russinoff, David M.

    1995-01-01

    We present a mathematical definition of hardware description language (HDL) that admits a semantics-preserving translation to a subset of VHDL. Our HDL includes the basic VHDL propagation delay mechanisms and gate-level circuit descriptions. We also develop formal procedures for deriving and verifying concise behavioral specifications of combinational and sequential devices. The HDL and the specification procedures have been formally encoded in the computational logic of Boyer and Moore, which provides a LISP implementation as well as a facility for mechanical proof-checking. As an application, we design, specify, and verify a circuit that achieves asynchronous communication by means of the biphase mark protocol.

  5. Overpulse railgun energy recovery circuit

    Energy Technology Data Exchange (ETDEWEB)

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  6. Counterpulse railgun energy recovery circuit

    Energy Technology Data Exchange (ETDEWEB)

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  7. The Maplin electronic circuits handbook

    CERN Document Server

    Tooley, Michael

    2015-01-01

    The Maplin Electronic Circuits Handbook provides pertinent data, formula, explanation, practical guidance, theory and practical guidance in the design, testing, and construction of electronic circuits. This book discusses the developments in electronics technology techniques.Organized into 11 chapters, this book begins with an overview of the common types of passive component. This text then provides the reader with sufficient information to make a correct selection of passive components for use in the circuits. Other chapters consider the various types of the most commonly used semiconductor

  8. Secure integrated circuits and systems

    CERN Document Server

    Verbauwhede, Ingrid MR

    2010-01-01

    On any advanced integrated circuit or 'system-on-chip' there is a need for security. In many applications the actual implementation has become the weakest link in security rather than the algorithms or protocols. The purpose of the book is to give the integrated circuits and systems designer an insight into the basics of security and cryptography from the implementation point of view. As a designer of integrated circuits and systems it is important to know both the state-of-the-art attacks as well as the countermeasures. Optimizing for security is different from optimizations for speed, area,

  9. Determining Covers in Combinational Circuits

    Directory of Open Access Journals (Sweden)

    Ljubomir Cvetkovic

    2011-05-01

    Full Text Available In this paper we propose a procedure for determining 0- or 1-cover of an arbitrary line in a combinational circuit. When determining a cover we do not need Boolean expression for the line; only the circuit structure is used. Within the proposed procedure we use the tools of the cube theory, in particular, some operations defined on cubes. The procedure can be applied for determining 0- and 1- covers of output lines in programmable logic devices. Basically, this procedure is a method for the analysis of a combinational circuit.

  10. Check dam and polyacrylamide performance under simulated stormwater runoff.

    Science.gov (United States)

    Kang, Jihoon; McCaleb, Melanie M; McLaughlin, Richard A

    2013-11-15

    High levels of turbidity and fine suspended sediments are often found in stormwater discharges from construction sites even when best management practices (BMPs) for sediment control are in place. This study evaluated turbidity reduction by three check dam types: 1) rock check dam representing a standard BMP, 2) excelsior wattle representing a fiber check dam (FCD), and 3) rock check dam wrapped with excelsior erosion control blanket (rock + excelsior ECB) representing an alternative FCD. Three check dams (all same type) were installed in a lined, 24-m ditch on a 5-7% slope and three consecutive simulated stormwater flows were run in the ditch. Additional tests were performed by adding granular polyacrylamide (PAM) on the check dams in the same manner using two sediment sources differing in clay content. Without PAM treatment, significantly higher effluent turbidity (>900 nephelometric turbidity units (NTU)) exited the ditch with rock check dams than with excelsior wattles or rock + excelsior ECBs (dam types was in the order of excelsior wattle > rock + excelsior ECB > rock check dam, indicating better water pooling behind the wattle. The PAM treatment reduced turbidity substantially (>75% relative to no PAM treatment) for all check dam types and it was very effective in excelsior wattles (<57 NTU) and rock + excelsior ECBs (<90 NTU) even during the third storm event. This study demonstrates that the passive treatment of runoff with PAM on FCDs (or rock + excelsior ECB) in construction site ditches can be very effective for sediment retention and turbidity reduction.

  11. PREREQUISITE PROGRAMMES IN OWN CHECKS IN STATUTORY AND VOLUNTARY LEGISLATION

    Directory of Open Access Journals (Sweden)

    E. Guidi

    2012-08-01

    Full Text Available Prerequisite Programmes approach is a requirement for implementing a correct own check plan. This new approach, born according to the European Legislation, is completely recognized by third Nation Authorities and private Inspection and Accreditation Bodies. This method is the basis to verify if an own check system is under control and to verify if corrective actions are built up to warrant hygienic production standards. The present work demonstrate that a correct own check plan is built up only by a Pre Requisites Program approach. The new UNI EN ISO 22000:2005 standard describe this concept specifying the difference between PRP and CCP.

  12. Towards an automated checked baggage inspection system augmented with robots

    Science.gov (United States)

    DeDonato, Matthew P.; Dimitrov, Velin; Padır, Taskin

    2014-05-01

    We present a novel system for enhancing the efficiency and accuracy of checked baggage screening process at airports. The system requirements address the identification and retrieval of objects of interest that are prohibited in a checked luggage. The automated testbed is comprised of a Baxter research robot designed by Rethink Robotics for luggage and object manipulation, and a down-looking overhead RGB-D sensor for inspection and detection. We discuss an overview of current system implementations, areas of opportunity for improvements, robot system integration challenges, details of the proposed software architecture and experimental results from a case study for identifying various kinds of lighters in checked bags.

  13. Implementing Model-Check for Employee and Management Satisfaction

    Science.gov (United States)

    Jones, Corey; LaPha, Steven

    2013-01-01

    This presentation will discuss methods to which ModelCheck can be implemented to not only improve model quality, but also satisfy both employees and management through different sets of quality checks. This approach allows a standard set of modeling practices to be upheld throughout a company, with minimal interaction required by the end user. The presenter will demonstrate how to create multiple ModelCheck standards, preventing users from evading the system, and how it can improve the quality of drawings and models.

  14. CADAT integrated circuit mask analysis

    Science.gov (United States)

    1981-01-01

    CADAT System Mask Analysis Program (MAPS2) is automated software tool for analyzing integrated-circuit mask design. Included in MAPS2 functions are artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation.

  15. Circuit design on plastic foils

    CERN Document Server

    Raiteri, Daniele; Roermund, Arthur H M

    2015-01-01

    This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics.  The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing.   • Discusses implications of problems associated with large-area electronics and compares them to standard silicon; • Provides the basis for understanding physics and modeling of disordered material; • Includes guidelines to quickly setup the basic CAD tools enabling efficient and reliable designs; • Illustrates practical solutions to cope with hard/soft faults, variability, mismatch, aging and bias stress at architecture, circuit, layout, and device levels.

  16. Chaos Control for Chua's Circuits

    Science.gov (United States)

    Tôrres, L. A. B.; Aguirre, L. A.; Palhares, R. M.; Mendes, E. M. A. M.

    The practical implementation of Chua's circuit control methods is discussed in this chapter. In order to better address this subject, an inductorless Chua's circuit realization is first presented, followed by practical issues related to data analysis, mathematical modelling, and dynamical characterization associated to this electronic chaotic oscillator. As a consequence of the investigation of different control strategies applied to Chua's circuit, a tradeoff among control objective, control energy, and model complexity is devised, which quite naturally leads to a principle that seems to be of general nature: the Information Transmission Via Control (ITVC) for nonlinear oscillators. The main purpose of the present chapter is to serve as an introductory guide to the universe of Chua's circuit control, synchronization, and mathematical modelling.

  17. Logic circuits from zero forcing

    CERN Document Server

    Burgarth, Daniel; Hogben, Leslie; Severini, Simone; Young, Michael

    2011-01-01

    We design logical circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity.

  18. Ground Fault Overvoltage With Inverter-Interfaced Distributed Energy Resources

    Energy Technology Data Exchange (ETDEWEB)

    Ropp, Michael; Hoke, Anderson; Chakraborty, Sudipta; Schutz, Dustin; Mouw, Chris; Nelson, Austin; McCarty, Michael; Wang, Trudie; Sorenson, Adam

    2017-04-01

    Ground Fault Overvoltage can occur in situations in which a four-wire distribution circuit is energized by an ungrounded voltage source during a single phase to ground fault. The phenomenon is well-documented with ungrounded synchronous machines, but there is considerable discussion about whether inverters cause this phenomenon, and consequently whether inverters require effective grounding. This paper examines the overvoltages that can be supported by inverters during single phase to ground faults via theory, simulation and experiment, identifies the relevant physical mechanisms, quantifies expected levels of overvoltage, and makes recommendations for optimal mitigation.

  19. Spinal sensory circuits in motion

    OpenAIRE

    2016-01-01

    International audience; The role of sensory feedback in shaping locomotion has been long debated. Recent advances in genetics and behavior analysis revealed the importance of proprioceptive pathways in spinal circuits. The mechanisms underlying peripheral mechanosensation enabled to unravel the networks that feedback to spinal circuits in order to modulate locomotion. Sensory inputs to the vertebrate spinal cord were long thought to originate from the periphery. Recent studies challenge this ...

  20. Optimizing Transmission Line Matching Circuits

    OpenAIRE

    Novak, S.

    1996-01-01

    When designing transmission line matching circuits, there exist often overlooked, additional, not much used, degree of choice in the selection of the transmission line impedance. In this work are presented results of CAD analysis for the two element transmission line matching networks, demonstrating that selecting matching circuits transmission lines with higher impedance, than usually used 50 or 75 ohms, can in most cases substantially decrease the physical dimension of the final matching ci...

  1. Automatic Verification of Biochemical Network Using Model Checking Method%基于模型校核的生化网络自动辨别方法

    Institute of Scientific and Technical Information of China (English)

    Jinkyung Kim; Younghee Lee; Il Moon

    2008-01-01

    This study focuses on automatic searching and verifying methods for the reachability, transition logics and hierarchical structure in all possible paths of biological processes using model checking. The automatic search and verification for alternative paths within complex and large networks in biological process can provide a consid-erable amount of solutions, which is difficult to handle manually. Model checking is an automatic method for veri-fying if a circuit or a condition, expressed as a concurrent transition system, satisfies a set of properties expressed ina temporal logic, such as computational tree logic (CTL). This article represents that model checking is feasible in biochemical network verification and it shows certain advantages over simulation for querying and searching of special behavioral properties in biochemical processes.

  2. Neural Circuits on a Chip

    Directory of Open Access Journals (Sweden)

    Md. Fayad Hasan

    2016-09-01

    Full Text Available Neural circuits are responsible for the brain’s ability to process and store information. Reductionist approaches to understanding the brain include isolation of individual neurons for detailed characterization. When maintained in vitro for several days or weeks, dissociated neurons self-assemble into randomly connected networks that produce synchronized activity and are capable of learning. This review focuses on efforts to control neuronal connectivity in vitro and construct living neural circuits of increasing complexity and precision. Microfabrication-based methods have been developed to guide network self-assembly, accomplishing control over in vitro circuit size and connectivity. The ability to control neural connectivity and synchronized activity led to the implementation of logic functions using living neurons. Techniques to construct and control three-dimensional circuits have also been established. Advances in multiple electrode arrays as well as genetically encoded, optical activity sensors and transducers enabled highly specific interfaces to circuits composed of thousands of neurons. Further advances in on-chip neural circuits may lead to better understanding of the brain.

  3. Monitoring Blood Sugar: The Importance of Checking Blood Sugar Levels

    Science.gov (United States)

    ... to Be Smart About Social Media Monitoring Blood Sugar KidsHealth > For Parents > Monitoring Blood Sugar Print A ... Tests Record Keeping The Importance of Checking Blood Sugar Levels Besides helping to keep blood sugar levels ( ...

  4. Developments of the in-check platform for diagnostic applications

    Science.gov (United States)

    Palmieri, Michele; Alessi, Enrico; Conoci, Sabrina; Marchi, Mauro; Panvini, Gaetano

    2008-02-01

    In-Check is STMicroelectronics proprietary platform for molecular diagnostics. In-Check lays its foundations on the monolithic integration of microelectronics and micromachining technology MEMS, with microfluidic and optical features, bio-chemical surface functionalization and molecular biology. It comprises a core lab-on-chip device, control and reading instrumentation, a complete suite of software modules, and application protocols. Leveraging on such capabilities, In-Check enables fast, highly sensitive and specific, multi-analytical capability of nucleic acid analysis. The platform provides a unique combination of nucleic acid amplification, by polymerase-chain-reaction and target identification and typing by DNA microarray. These integrated biological functionalities together with top quality standard and process control are key features for a platform to be accepted by the highly demanding modern medical diagnostic. This paper describes recent developments of In-Check and some core biological characterizations.

  5. An Item Factor Analysis of the Mooney Problem Check List

    Science.gov (United States)

    Stewart, David W.; Deiker, Thomas

    1976-01-01

    Explores the factor structure of the Mooney Problem Check List (MPCL) at the junior and senior high school level by undertaking a large obverse factor analysis of item responses in three adolescent criterion groups. (Author/DEP)

  6. Checking Patient's Drug History May Help Curb Opioid Abuse

    Science.gov (United States)

    ... a legitimate prescription," said study co-author Colleen Carey. She's an assistant professor of policy analysis and ... by law to check them before writing prescriptions, Carey and her colleagues noted in a university news ...

  7. Cyclic Redundancy Checking (CRC) Accelerator for Embedded Processor Datapaths

    National Research Council Canada - National Science Library

    Abdul Rehman Buzdar; Liguo Sun; Rao Kashif; Muhammad Waqar Azhar; Muhammad Imran Khan

    2017-01-01

    We present the integration of a multimode Cyclic Redundancy Checking (CRC) accelerator unit with an embedded processor datapath to enhance the processor performance in terms of execution time and energy efficiency...

  8. Exercise: When to Check with Your Doctor First

    Science.gov (United States)

    Healthy Lifestyle Fitness Keeping physically active is key to a healthy lifestyle. But sometimes it's best to check with ... 11, 2016 Original article: http://www.mayoclinic.org/healthy-lifestyle/fitness/in-depth/exercise/art-20047414 . Mayo Clinic Footer ...

  9. Monitoring Blood Sugar: The Importance of Checking Blood Sugar Levels

    Science.gov (United States)

    ... Feeding Your 1- to 2-Year-Old Monitoring Blood Sugar KidsHealth > For Parents > Monitoring Blood Sugar A ... Other Tests Record Keeping The Importance of Checking Blood Sugar Levels Besides helping to keep blood sugar ...

  10. Performance of Compiler-Assisted Memory Safety Checking

    Science.gov (United States)

    2014-08-01

    Performance of Compiler -Assisted Memory Safety Checking David Keaton Robert C. Seacord August 2014 TECHNICAL NOTE CMU/SEI-2014-TN...014 | vii Abstract Buffer overflows affect a large installed base of C code. This technical note describes the criteria for deploying a compiler ...describes a modification to the LLVM compiler to enable hoisting bounds checks from loops and functions. This proof-of-concept prototype has been used

  11. Model checking biological systems described using ambient calculus

    DEFF Research Database (Denmark)

    Mardare, Radu Iulian; Priami, Corrado; Qualia, Paola;

    2005-01-01

    Model checking biological systems described using ambient calculus. In Proc. of the second International Workshop on Computational Methods in Systems Biology (CMSB04), Lecture Notes in Bioinformatics 3082:85-103, Springer, 2005.......Model checking biological systems described using ambient calculus. In Proc. of the second International Workshop on Computational Methods in Systems Biology (CMSB04), Lecture Notes in Bioinformatics 3082:85-103, Springer, 2005....

  12. Robust Sequential Circuits Design Technique for Low Voltage and High Noise Scenarios

    Directory of Open Access Journals (Sweden)

    Garcia-Leyva Lancelot

    2016-01-01

    In this paper we introduce an innovative input and output data redundancy principle for sequential block circuits, the responsible to keep the state of the system, showing its efficiency in front of other robust technique approaches. The methodology is totally different from the Von Neumann approaches, because element are not replicated N times, but instead, they check the coherence of redundant input data no allowing data propagation in case of discrepancy. This mechanism does not require voting devices.

  13. Combination Approach of FEM and Circuit System in IR Drop Analysis and Its Applications

    Institute of Scientific and Technical Information of China (English)

    TANG Zhanghong; YUAN Jiansheng

    2008-01-01

    A method was developed to solve the combined system of the current field and the circuit. The "super-node" was used to transform the matdx for conventional nodal analyses of a circuit system from non-positive definite to positive definite. Then, a positive definite matdx for the overall system was obtained by combining the matrix from the circuit nodal analysis method and the matrix resulted from finite element method (FEM) formulation to solve the FEM fields. This approach has been successfully applied to simulate the electrical potential and current distributions on each metal layer of printed circuit boards (PCBs) and in-tegrated circuit (IC) packages for a given power supply. The simulation results can then be used to analyze the properties of the PCBs and IC packages such as the port resistances and IR drops. The results can also be used to optimize PCB and IC package designs, such as by adjusting the power/ground distribution networks.

  14. An Extended Ontology Model and Ontology Checking Based on Description Logics

    Institute of Scientific and Technical Information of China (English)

    王洪伟; 蒋馥; 吴家春

    2004-01-01

    Ontology is defined as an explicit specification of a conceptualization. In this paper, an extended ontology model was constructed using description logics, which is a 5-tuples including term set, individual set, term definition set, instantiation assertion set and term restriction set. Based on the extended model, the issue on ontology checking was studied with the conclusion that the four kinds of term checking, including term satisfiability checking, term subsumption checking, term equivalence checking and term disjointness checking, can be reduced to the satisfiability checking, and satisfiability checking can be transformed into instantiation consistence checking.

  15. Experimental and Analytical Study on the Lift Check Valve

    Energy Technology Data Exchange (ETDEWEB)

    Kim, J. H.; Song, C. S.; Kim, H. S.; Hong, S. C. [Korea Institute of Machinery and Materials, Daejeon (Korea, Republic of); Lee, W. H. [Samshin Limited Co., Chonan (Korea, Republic of)

    2009-10-15

    In general, the check valve mounted on the flow line is used for the purpose of protecting the pump and the related facility, making the flow path, and maintaining the pressure boundary during the operation mode change in steam power plant and nuclear power plant. Fig. 1 shows the example of check valve in nuclear power plant. Especially, the check valve mounted on safety feed system and nuclear safety system is operated to open state and has a role of acquiring enough fluid such as safety feed and auxiliary feed water in the Design Basis Accident. And the check valve is operated with enough sealing and with protecting steam hammer in normal operational mode. For this purpose, the check valve can be open easily and be maintained in the open state in case of small flow velocity. In this research, the experimental and analytical study on the check vale was performed. The flow coefficient and closure time were compared between the experimental and the analytical result by numerical simulation. The validation of the analytical method was performed.

  16. Automated survey of 8000 plan checks at eight facilities.

    Science.gov (United States)

    Halabi, Tarek; Lu, Hsiao-Ming; Bernard, Damian A; Chu, James C H; Kirk, Michael C; Hamilton, Russell J; Lei, Yu; Driewer, Joseph

    2016-09-01

    To identify policy and system related weaknesses in treatment planning and plan check work-flows. The authors' web deployed plan check automation solution, PlanCheck, which works with all major planning and record and verify systems (demonstrated here for mosaiq only), allows them to compute violation rates for a large number of plan checks across many facilities without requiring the manual data entry involved with incident filings. Workflows and failure modes are heavily influenced by the type of record and verify system used. Rather than tackle multiple record and verify systems at once, the authors restricted the present survey to mosaiq facilities. Violations were investigated by sending inquiries to physicists running the program. Frequent violations included inadequate tracking in the record and verify system of total and prescription doses. Infrequent violations included incorrect setting of patient orientation in the record and verify system. Peaks in the distribution, over facilities, of violation frequencies pointed to suboptimal policies at some of these facilities. Correspondence with physicists often revealed incomplete knowledge of settings at their facility necessary to perform thorough plan checks. The survey leads to the identification of specific and important policy and system deficiencies that include: suboptimal timing of initial plan checks, lack of communication or agreement on conventions surrounding prescription definitions, and lack of automation in the transfer of some parameters.

  17. Improved Bounded Model Checking for the Universal Fragment of CTL

    Institute of Scientific and Technical Information of China (English)

    Liang Xu; Wei Chen; Yan-Yan Xu; Wen-Hui Zhang

    2009-01-01

    SAT-based bounded model checking (BMC) has been introduced as a complementary technique to BDD-based symbolic model checking in recent years, and a lot of successful work has been done in this direction. The approach was first introduced by A. Biere et al. in checking linear temporal logic (LTL) formulae and then also adapted to check formulae of the universal fragment of computation tree logic (ACTL) by W. Penczek et al. As the efficiency of model checking is still an important issue, we present an improved BMC approach for ACTL based on Penczek's method. We consider two aspects of the approach. One is reduction of the number of variables and transitions in the k-model by distinguishing the temporal operator EX from the others. The other is simplification of the transformation of formulae by using uniform path encoding instead of a disjunction of all paths needed in the k-model. With these improvements, for an ACTI, formula, the length of the final encoding of the formula in the worst case is reduced. The improved approach is implemented in the tool BMV and is compared with the original one by applying both to two well known examples, mutual exclusion and dining philosophers. The comparison shows the advantages of the improved approach with respect to the efficiency of model checking.

  18. Difference-Equation/Flow-Graph Circuit Analysis

    Science.gov (United States)

    Mcvey, I. M.

    1988-01-01

    Numerical technique enables rapid, approximate analyses of electronic circuits containing linear and nonlinear elements. Practiced in variety of computer languages on large and small computers; for circuits simple enough, programmable hand calculators used. Although some combinations of circuit elements make numerical solutions diverge, enables quick identification of divergence and correction of circuit models to make solutions converge.

  19. Multi-Layer E-Textile Circuits

    Science.gov (United States)

    Dunne, Lucy E.; Bibeau, Kaila; Mulligan, Lucie; Frith, Ashton; Simon, Cory

    2012-01-01

    Stitched e-textile circuits facilitate wearable, flexible, comfortable wearable technology. However, while stitched methods of e-textile circuits are common, multi-layer circuit creation remains a challenge. Here, we present methods of stitched multi-layer circuit creation using accessible tools and techniques.

  20. 30 CFR 56.6403 - Branch circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Branch circuits. 56.6403 Section 56.6403... Blasting § 56.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate the circuits to be used....

  1. Supplementary First-Order All-Pass Filters with Two Grounded Passive Elements Using FDCCII

    Directory of Open Access Journals (Sweden)

    K. Pal

    2011-06-01

    Full Text Available In this study, two novel first-order all-pass filters are proposed using only one grounded resistor and one grounded capacitor along with a fully differential current conveyor (FDCCII. There is no element-matching restriction. The presented all-pass filter circuits can be made electronically tunable due to the electronic resistors. Furthermore, the presented circuits enjoy high-input impedance for easy cascadability. The theoretical results are verified with SPICE simulations.

  2. High Input Impedance Voltage-Mode Universal Biquadratic Filters With Three Inputs Using Three CCs and Grounding Capacitors

    Directory of Open Access Journals (Sweden)

    J. W. Horng

    2012-04-01

    Full Text Available Two current conveyors (CCs based high input impedance voltage-mode universal biquadratic filters each with three input terminals and one output terminal are presented. The first circuit is composed of three differential voltage current conveyors (DVCCs, two grounded capacitors and four resistors. The second circuit is composed of two DVCCs, one differential difference current conveyor (DDCC, two grounded capacitors and four grounded resistors. The proposed circuits can realize all the standard filter functions, namely, lowpass, bandpass, highpass, notch and allpass filters by the selections of different input voltage terminals. The proposed circuits offer the features of high input impedance, using only grounded capacitors and low active and passive sensitivities. Moreover, the x ports of the DVCCs (or DDCC in the proposed circuits are connected directly to resistors. This design offers the feature of a direct incorporation of the parasitic resistance at the x terminal of the DVCC (DDCC, Rx, as a part of the main resistance.

  3. Distance protection of multiple-circuit shared tower transmission lines with different voltages. Part II: Fault loop impedance

    DEFF Research Database (Denmark)

    Silva, Filipe Miguel Faria da; Bak, Claus Leth

    2017-01-01

    Multiple-circuit transmission lines combining different voltage levels in one tower present extra challenges when setting a protection philosophy, as faults between voltage levels are possible. In this paper, the fault loop impedance of combined faults is compared with the fault loop impedance...... of single-phase-to-ground faults at the higher voltage level of the multiple-circuit line and it is demonstrated that they are similar for high short-circuit powers; however, the fault loop impedance of a combined fault may increase substantially as the short-circuit power of the system decreases......-phase-to-ground faults are also capable of protecting the line against combined faults, being only advisable to increase the resistive limit of the protection zone if the network has lower short-circuit power. If the length of the line at lower voltage level is less than of the lien at higher voltage level...

  4. Comparison between four piezoelectric energy harvesting circuits

    Institute of Scientific and Technical Information of China (English)

    Jinhao QIU; Hao JIANG; Hongli JI; Kongjun ZHU

    2009-01-01

    This paper investigates and compares the efficiencies of four different interfaces for vibration-based energy harvesting systems. Among those four circuits, two circuits adopt the synchronous switching technique, in which the circuit is switched synchronously with the vibration. In this study, a simple source-less trigger circuit used to control the synchronized switch is proposed and two interface circuits of energy harvesting systems are designed based on the trigger circuit. To validate the effectiveness of the proposed circuits, an experimental system was established and the power harvested by those circuits from a vibration beam was measured. Experimental results show that the two new circuits can increase the harvested power by factors 2.6 and 7, respectively, without consuming extra power in the circuits.

  5. Using Combinational Circuits for Control Purposes

    Directory of Open Access Journals (Sweden)

    Maher A. Nabulsi

    2009-01-01

    Full Text Available Problem statement: Combinational circuits are used in computers for generating binary control decisions and for providing digital components for data processing. Approach: The use of combinational circuits and logic gates to control other circuits was discussed. Different systems that use logic gates, multiplexers, decoders and encoders to control different circuits were presented. This study presented a design and implementation of some combinational circuits such as a decoder, an encoder, a multiplexer, a bus system and read/write memory operations. Results: When we connected some types of combinational circuits to the inputs/outputs of digital circuit, these combinational circuits can help us to manage and flow a different types of control signals through a large digital circuit. Conclusion: Many combinational circuits had a good function which can be used for controlling different parts of any digital system and they produce a suitable way to transfer a control signals between different digital components of any large digital system.

  6. Instrumentation and test gear circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Instrumentation and Test Gear Circuits Manual provides diagrams, graphs, tables, and discussions of several types of practical circuits. The practical circuits covered in this book include attenuators, bridges, scope trace doublers, timebases, and digital frequency meters. Chapter 1 discusses the basic instrumentation and test gear principles. Chapter 2 deals with the design of passive attenuators, and Chapter 3 with passive and active filter circuits. The subsequent chapters tackle 'bridge' circuits, analogue and digital metering techniques and circuitry, signal and waveform generation, and p

  7. 30 CFR 75.601-1 - Short circuit protection; ratings and settings of circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... of circuit breakers. 75.601-1 Section 75.601-1 Mineral Resources MINE SAFETY AND HEALTH... Trailing Cables § 75.601-1 Short circuit protection; ratings and settings of circuit breakers. Circuit breakers providing short circuit protection for trailing cables shall be set so as not to exceed...

  8. 49 CFR 236.5 - Design of control circuits on closed circuit principle.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Design of control circuits on closed circuit..., AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on closed circuit principle. All control circuits the functioning of which affects safety of train...

  9. 30 CFR 77.506 - Electric equipment and circuits; overload and short-circuit protection.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload and short-circuit protection. 77.506 Section 77.506 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... circuits; overload and short-circuit protection. Automatic circuit-breaking devices or fuses of the...

  10. 30 CFR 77.800 - High-voltage circuits; circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable...

  11. Logic circuits from zero forcing.

    Science.gov (United States)

    Burgarth, Daniel; Giovannetti, Vittorio; Hogben, Leslie; Severini, Simone; Young, Michael

    We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity. Moreover, in the light of applications of zero forcing in quantum mechanics, the link with Boolean functions may suggest a new directions in quantum control theory and in the study of engineered quantum spin systems. It is an open technical problem to verify whether there is a link between zero forcing and computation with contact circuits.

  12. Introduction to lethal circuit transformations

    Science.gov (United States)

    Fišer, Petr; Schmidt, Jan

    2015-12-01

    Logic optimization is a process that takes a logic circuit description (Boolean network) as an input and tries to refine it, to reduce its size and/or depth. An ideal optimization process should be able to devise an optimum implementation of a network in a reasonable time, given any circuit structure at the input. However, there are cases where it completely fails to produce even near-optimum solutions. Such cases are typically induced by non-standard circuit structure modifications. Surprisingly enough, such deviated structures are frequently present in standard benchmark sets too. We may only wonder whether it is an intention of the benchmarks creators, or just an unlucky coincidence. Even though synthesis tools should be primarily well suited for practical circuits, there is no guarantee that, e.g., a higher-level synthesis process will not generate such unlucky structures. Here we present examples of circuit transformations that lead to failure of most of state-of-the-art logic synthesis and optimization processes, both academic and commercial, and suggest actions to mitigate the disturbing effects.

  13. Dynamical compensation in physiological circuits.

    Science.gov (United States)

    Karin, Omer; Swisa, Avital; Glaser, Benjamin; Dor, Yuval; Alon, Uri

    2016-11-08

    Biological systems can maintain constant steady-state output despite variation in biochemical parameters, a property known as exact adaptation. Exact adaptation is achieved using integral feedback, an engineering strategy that ensures that the output of a system robustly tracks its desired value. However, it is unclear how physiological circuits also keep their output dynamics precise-including the amplitude and response time to a changing input. Such robustness is crucial for endocrine and neuronal homeostatic circuits because they need to provide a precise dynamic response in the face of wide variation in the physiological parameters of their target tissues; how such circuits compensate their dynamics for unavoidable natural fluctuations in parameters is unknown. Here, we present a design principle that provides the desired robustness, which we call dynamical compensation (DC). We present a class of circuits that show DC by means of a nonlinear feedback loop in which the regulated variable controls the functional mass of the controlling endocrine or neuronal tissue. This mechanism applies to the control of blood glucose by insulin and explains several experimental observations on insulin resistance. We provide evidence that this mechanism may also explain compensation and organ size control in other physiological circuits.

  14. Optimization of reversible sequential circuits

    CERN Document Server

    Sayem, Abu Sadat Md

    2010-01-01

    In recent years reversible logic has been considered as an important issue for designing low power digital circuits. It has voluminous applications in the present rising nanotechnology such as DNA computing, Quantum Computing, low power VLSI and quantum dot automata. In this paper we have proposed optimized design of reversible sequential circuits in terms of number of gates, delay and hardware complexity. We have designed the latches with a new reversible gate and reduced the required number of gates, garbage outputs, and delay and hardware complexity. As the number of gates and garbage outputs increase the complexity of reversible circuits, this design will significantly enhance the performance. We have proposed reversible D-latch and JK latch which are better than the existing designs available in literature.

  15. Chua's Circuit: Control and Synchronization

    Science.gov (United States)

    Irimiciuc, Stefan-Andrei; Vasilovici, Ovidiu; Dimitriu, Dan-Gheorghe

    Chaos-based data encryption is one of the most reliable methods used in secure communications. This implies a good control of a chaotic system and a good synchronization between the involved systems. Here, experimental results are shown on the control and synchronization of Chua's circuits. The control of the chaotic circuit was achieved by using the switching method. The influence of the control signal characteristics (amplitude, frequency and shape) on the system's states was also investigated. The synchronization of two similar chaotic circuits was studied, emphasizing the importance of the chaotic state characteristics of the Master system in respect to those of Slave system. It was shown that the synchronization does not depend on the chaotic state type, neither on the dimension (x, y or z) used for synchronization.

  16. Additive Manufacturing of Hybrid Circuits

    Science.gov (United States)

    Sarobol, Pylin; Cook, Adam; Clem, Paul G.; Keicher, David; Hirschfeld, Deidre; Hall, Aaron C.; Bell, Nelson S.

    2016-07-01

    There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects. Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. Finally, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.

  17. Vertically Integrated Circuits at Fermilab

    Energy Technology Data Exchange (ETDEWEB)

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  18. Nuclear sensor signal processing circuit

    Science.gov (United States)

    Kallenbach, Gene A.; Noda, Frank T.; Mitchell, Dean J.; Etzkin, Joshua L.

    2007-02-20

    An apparatus and method are disclosed for a compact and temperature-insensitive nuclear sensor that can be calibrated with a non-hazardous radioactive sample. The nuclear sensor includes a gamma ray sensor that generates tail pulses from radioactive samples. An analog conditioning circuit conditions the tail-pulse signals from the gamma ray sensor, and a tail-pulse simulator circuit generates a plurality of simulated tail-pulse signals. A computer system processes the tail pulses from the gamma ray sensor and the simulated tail pulses from the tail-pulse simulator circuit. The nuclear sensor is calibrated under the control of the computer. The offset is adjusted using the simulated tail pulses. Since the offset is set to zero or near zero, the sensor gain can be adjusted with a non-hazardous radioactive source such as, for example, naturally occurring radiation and potassium chloride.

  19. Deployment of check-in nodes in complex networks

    Science.gov (United States)

    Jiang, Zhong-Yuan; Ma, Jian-Feng

    2017-01-01

    In many real complex networks such as the city road networks and highway networks, vehicles often have to pass through some specially functioned nodes to receive check-in like services such as gas supplement at gas stations. Based on existing network structures, to guarantee every shortest path including at least a check-in node, the location selection of all check-in nodes is very essential and important to make vehicles to easily visit these check-in nodes, and it is still remains an open problem in complex network studies. In this work, we aim to find possible solutions for this problem. We first convert it into a set cover problem which is NP-complete and propose to employ the greedy algorithm to achieve an approximate result. Inspired by heuristic information of network structure, we discuss other four check-in node location deployment methods including high betweenness first (HBF), high degree first (HDF), random and low degree first (LDF). Finally, we compose extensive simulations in classical scale-free networks, random networks and real network models, and the results can well confirm the effectiveness of the greedy algorithm. This work has potential applications into many real networks.

  20. Intelligent Data Visualization for Cross-Checking Spacecraft System Diagnosis

    Science.gov (United States)

    Ong, James C.; Remolina, Emilio; Breeden, David; Stroozas, Brett A.; Mohammed, John L.

    2012-01-01

    Any reasoning system is fallible, so crew members and flight controllers must be able to cross-check automated diagnoses of spacecraft or habitat problems by considering alternate diagnoses and analyzing related evidence. Cross-checking improves diagnostic accuracy because people can apply information processing heuristics, pattern recognition techniques, and reasoning methods that the automated diagnostic system may not possess. Over time, cross-checking also enables crew members to become comfortable with how the diagnostic reasoning system performs, so the system can earn the crew s trust. We developed intelligent data visualization software that helps users cross-check automated diagnoses of system faults more effectively. The user interface displays scrollable arrays of timelines and time-series graphs, which are tightly integrated with an interactive, color-coded system schematic to show important spatial-temporal data patterns. Signal processing and rule-based diagnostic reasoning automatically identify alternate hypotheses and data patterns that support or rebut the original and alternate diagnoses. A color-coded matrix display summarizes the supporting or rebutting evidence for each diagnosis, and a drill-down capability enables crew members to quickly view graphs and timelines of the underlying data. This system demonstrates that modest amounts of diagnostic reasoning, combined with interactive, information-dense data visualizations, can accelerate system diagnosis and cross-checking.

  1. The use of check valve performance data to support new concepts (probabilistic risk assessment, condition monitoring) for check valve program

    Energy Technology Data Exchange (ETDEWEB)

    Hart, K.A.; Gower, D.

    1996-12-01

    The concept of developing an integrated check valve database based on the Nuclear Power Reliability Data System (NPRDS) data was presented at the last Symposium. The Nuclear Industry Check Valve Group (NIC), working in cooperation with the Oak Ridge National Laboratory (ORNL), has completed an operational database of check valve performance from 1984 to the present. NIC has committed to the nuclear industry to periodically update the data and maintain this information accessible. As the new concepts of probabilistic risk analysis and condition monitoring are integrated into the American Society of Mechanical Engineers (ASME) Code, a critical element will be performance data. From check valve performance data, feasible failure modes and rates can be established. When a failure rate or frequency of failures can be established based on a significant enough population (sampling), a more solid foundation for focusing resources and determining appropriate frequencies and testing can be determined. The presentation will give the updated status of the NIC Check Valve Performance Database covering (1) methodology used to combine the original ORNL data; (2) process/controls established for continuing update and refinement of the data; (3) discussion of how this data is being utilized by (a) OM-22 for condition monitoring, and (b) risk-based inservice testing work of Westinghouse Owners` Group; and (4) results/trends of data evaluations. At the 1994 Symposium, ORNL provided an update as of 1991 to their original work of 1984 -1990 which they had performed to characterize check valve degradations and failures in the nuclear industry. These characterizations will be updated to 1995 and additional reviews provided to give insight into the current condition and trends of check valve performance.

  2. Endogenous money, circuits and financialization

    OpenAIRE

    Malcolm Sawyer

    2013-01-01

    This paper locates the endogenous money approach in a circuitist framework. It argues for the significance of the credit creation process for the evolution of the economy and the absence of any notion of ‘neutrality of money’. Clearing banks are distinguished from other financial institutions as the providers of initial finance in a circuit whereas other financial institutions operate in a final finance circuit. Financialization is here viewed in terms of the growth of financial assets an...

  3. Circuit modeling for electromagnetic compatibility

    CERN Document Server

    Darney, Ian B

    2013-01-01

    Very simply, electromagnetic interference (EMI) costs money, reduces profits, and generally wreaks havoc for circuit designers in all industries. This book shows how the analytic tools of circuit theory can be used to simulate the coupling of interference into, and out of, any signal link in the system being reviewed. The technique is simple, systematic and accurate. It enables the design of any equipment to be tailored to meet EMC requirements. Every electronic system consists of a number of functional modules interconnected by signal links and power supply lines. Electromagnetic interference

  4. Simplified design of filter circuits

    CERN Document Server

    Lenk, John

    1999-01-01

    Simplified Design of Filter Circuits, the eighth book in this popular series, is a step-by-step guide to designing filters using off-the-shelf ICs. The book starts with the basic operating principles of filters and common applications, then moves on to describe how to design circuits by using and modifying chips available on the market today. Lenk's emphasis is on practical, simplified approaches to solving design problems.Contains practical designs using off-the-shelf ICsStraightforward, no-nonsense approachHighly illustrated with manufacturer's data sheets

  5. Embedded systems circuits and programming

    CERN Document Server

    Sanchez, Julio

    2012-01-01

    During the development of an engineered product, developers often need to create an embedded system--a prototype--that demonstrates the operation/function of the device and proves its viability. Offering practical tools for the development and prototyping phases, Embedded Systems Circuits and Programming provides a tutorial on microcontroller programming and the basics of embedded design. The book focuses on several development tools and resources: Standard and off-the-shelf components, such as input/output devices, integrated circuits, motors, and programmable microcontrollers The implementat

  6. Integrated circuits for multimedia applications

    DEFF Research Database (Denmark)

    Vandi, Luca

    2007-01-01

    This work presents several key aspects in the design of RF integrated circuits for portable multimedia devices. One chapter is dedicated to the application of negative-feedback topologies to receiver frontends. A novel feedback technique suitable for common multiplier-based mixers is described......, and it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt...

  7. Fermionic models with superconducting circuits

    Energy Technology Data Exchange (ETDEWEB)

    Las Heras, Urtzi; Garcia-Alvarez, Laura; Mezzacapo, Antonio; Lamata, Lucas [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); Solano, Enrique [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); IKERBASQUE, Basque Foundation for Science, Bilbao (Spain)

    2015-12-01

    We propose a method for the efficient quantum simulation of fermionic systems with superconducting circuits. It consists in the suitable use of Jordan-Wigner mapping, Trotter decomposition, and multiqubit gates, be with the use of a quantum bus or direct capacitive couplings. We apply our method to the paradigmatic cases of 1D and 2D Fermi-Hubbard models, involving couplings with nearest and next-nearest neighbours. Furthermore, we propose an optimal architecture for this model and discuss the benchmarking of the simulations in realistic circuit quantum electrodynamics setups. (orig.)

  8. Circuit, Thermal and Cost Characteristics of Impulse Magnetizing Circuits

    Institute of Scientific and Technical Information of China (English)

    2000-01-01

    This paper describes the development of circuit, thermal and cost model for a capacitor discharge impulse megnetizer and compares simulations to measurements from an actual system. We used a cost structure consisting of five major subsystems for cost modeling. Especially, we estimated the potential for cost reductions impulse magnetizer as a function of time using the learning curve.

  9. Relaxation Based Electrical Simulation for VLSI Circuits

    Directory of Open Access Journals (Sweden)

    S. Rajkumar

    2012-06-01

    Full Text Available Electrical circuit simulation was one of the first CAD tools developed for IC design. The conventional circuit simulators like SPICE and ASTAP were designed initially for the cost effective analysis of circuits containing a few hundred transistors or less. A number of approaches have been used to improve the performances of congenital circuit simulators for the analysis of large circuits. Thereafter relaxation methods was proposed to provide more accurate waveforms than standard circuit simulators with up to two orders of magnitude speed improvement for large circuits. In this paper we have tried to highlights recently used waveform and point relaxation techniques for simulation of VLSI circuits. We also propose a simple parallelization technique and experimentally demonstrate that we can solve digital circuits with tens of million transistors in a few hours.

  10. An Approach to Simplify Reversible Logic Circuits

    Directory of Open Access Journals (Sweden)

    Pabitra Roy

    2012-09-01

    Full Text Available Energy loss is one of the major problems in traditional irreversible circuits. For every bit of information loss kTln2 joules of heat is lost. In order to reduce the energy loss the concept of reversible logic circuits are introduced. Here we have described an algorithm for simplifying the reversible logic circuit and hence reduction of circuit cost and energy. The algorithm considers sub_circuit with respect to their number of lines and contiguous gates. The resulting sub_circuits are re-synthesized with smaller equivalent implementation. The process continues until circuit cost reaches good enough for Application or until a given computation budget has been exhausted. The circuit is constructed by NOT, CNOT and Toffoli gates only. By applying the algorithm and using the equivalent implementation we will get significant reduction of circuit cost and hence energy.

  11. Retropath: automated pipeline for embedded metabolic circuits.

    Science.gov (United States)

    Carbonell, Pablo; Parutto, Pierre; Baudier, Claire; Junot, Christophe; Faulon, Jean-Loup

    2014-08-15

    Metabolic circuits are a promising alternative to other conventional genetic circuits as modular parts implementing functionalities required for synthetic biology applications. To date, metabolic design has been mainly focused on production circuits. Emergent applications such as smart therapeutics, however, require circuits that enable sensing and regulation. Here, we present RetroPath, an automated pipeline for embedded metabolic circuits that explores the circuit design space from a given set of specifications and selects the best circuits to implement based on desired constraints. Synthetic biology circuits embedded in a chassis organism that are capable of controlling the production, processing, sensing, and the release of specific molecules were enumerated in the metabolic space through a standard procedure. In that way, design and implementation of applications such as therapeutic circuits that autonomously diagnose and treat disease, are enabled, and their optimization is streamlined.

  12. A Microcomputer-Based Program for Printing Check Plots of Integrated Circuits Specified in Caltech Intermediate Form.

    Science.gov (United States)

    1984-12-01

    The major work of plot- ting one page is done with a call to do_page. dopage is passed a matrix which is the top level transformation for transforming...was passed to proc call from the calling procedure (either proc_call or dopage ). This new transformation matrix is first applied to the symbol...PARSECIF.REL, *BLDFILE.REL, MAIN.REL, and CLIB.REL .- *CONTENTS: * do 9xcom 4.5.2.6 * do-box 4.5.2.1 * do grid 4.5.1 * dopage 4.5.2 * do round 4.5.2.3 * do

  13. A Common Integrated Circuit Design Rule Checking%通用集成电路设计规则检查

    Institute of Scientific and Technical Information of China (English)

    冯国臣; 胡国元

    2001-01-01

    文章介绍了利用SUN工作站上Cadence中的Dracula工具进行集成电路设计规则检查(DRC)的全过程;较详细地介绍了DRC文件的编写、运行及输出结果的查看,并给出了实例.

  14. WFC3 SMOV Proposals 11423/ 11543: IR FSM and Lamp Checks

    Science.gov (United States)

    Baggett, S.

    2009-11-01

    This report summarizes the results obtained from the SMOV IR FSM (Filter Select Mecha- nism) and internal lamp check proposals, programs designed to verify the operability of the IR filter wheel and the health of the primary and backup IR internal lamps. A tungsten flatfield was taken in each filter of the wheel, excluding the grisms. The wheel performed as expected and all data were successfully acquired. The resulting flatfield features, e.g the scratches, areas of lower QE, bad and unresponsive pixels, were similar to those seen in ground testing. However, some flatfields (F098M, F130N, F132N, and F167N) showed what appear to be glints and reflections at the few percent level or less, possibly caused by a light leak around the diffuser paddle used to acquire the internal flatfields. The output flux of both lamps is 6-10% higher than it was on the ground, likely due to the lamps run- ning hotter in the space environment than they did in the thermal vacuum test chamber. The relative output of the primary to spare lamp is the same as it was on the ground, to within 1-2%. On a more general note, the behavior of the early reads in the IR multiaccum files could benefit from a closer investigation: there appears to be a significant non-lin- earity in sequences where the first two reads are taken within 5 seconds or less of each other.

  15. A Spatialization-based Method for Checking and Updating Metadata

    Institute of Scientific and Technical Information of China (English)

    2005-01-01

    In this paper the application of spatialization technology on metadata quality check and updating was discussed. A new method based on spatialization was proposed for checking and updating metadata to overcome the deficiency of text based methods with the powerful functions of spatial query and analysis provided by GIS software. This method employs the technology of spatialization to transform metadata into a coordinate space and the functions of spatial analysis in GIS to check and update spatial metadata in a visual environment. The basic principle and technical flow of this method were explained in detail, and an example of implementation using ArcMap of GIS software was illustrated with a metadata set of digital raster maps. The result shows the new method with the support of interaction of graph and text is much more intuitive and convenient than the ordinary text based method, and can fully utilize the functions of GIS spatial query and analysis with more accuracy and efficiency.

  16. Model Checking-Based Testing of Web Applications

    Institute of Scientific and Technical Information of China (English)

    ZENG Hongwei; MIAO Huaikou

    2007-01-01

    A formal model representing the navigation behavior of a Web application as the Kripke structure is proposed and an approach that applies model checking to test case generation is presented. The Object Relation Diagram as the object model is employed to describe the object structure of a Web application design and can be translated into the behavior model. A key problem of model checking-based test generation for a Web application is how to construct a set of trap properties that intend to cause the violations of model checking against the behavior model and output of counterexamples used to construct the test sequences.We give an algorithm that derives trap properties from the object model with respect to node and edge coverage criteria.

  17. Field trials of the Baby Check score card in hospital.

    Science.gov (United States)

    Thornton, A J; Morley, C J; Cole, T J; Green, S J; Walker, K A; Rennie, J M

    1991-01-01

    The Baby Check score card was used by junior paediatric doctors to assess 262 babies under 6 months old presenting to hospital. The duty registrar and two consultants independently graded the severity of each baby's illness without knowledge of the Baby Check score. The registrars assessed the babies at presentation while the consultants reviewed the notes. The consultants and registrars agreed about the need for hospital admission only about 75% of the time. The score's sensitivity and predictive values were similar to those of the registrars' grading. The score's specificity was 87%. Babies with serious diagnosis scored high, while minor illnesses scored low. The predictive value for requiring hospital admission increased with the score, rising to 100% for scores of 20 or more. The appropriate use of Baby Check should improve the detection of serious illness. It could also reduce the number of babies admitted with minor illness, without putting them at increased risk.

  18. Effects of monetary reward and punishment on information checking behaviour.

    Science.gov (United States)

    Li, Simon Y W; Cox, Anna L; Or, Calvin; Blandford, Ann

    2016-03-01

    Two experiments were conducted to examine whether checking one's own work can be motivated by monetary reward and punishment. Participants were randomly assigned to one of three conditions: a flat-rate payment for completing the task (Control); payment increased for error-free performance (Reward); payment decreased for error performance (Punishment). Experiment 1 (N = 90) was conducted with liberal arts students, using a general data-entry task. Experiment 2 (N = 90) replicated Experiment 1 with clinical students and a safety-critical 'cover story' for the task. In both studies, Reward and Punishment resulted in significantly fewer errors, more frequent and longer checking, than Control. No such differences were obtained between the Reward and Punishment conditions. It is concluded that error consequences in terms of monetary reward and punishment can result in more accurate task performance and more rigorous checking behaviour than errors without consequences. However, whether punishment is more effective than reward, or vice versa, remains inconclusive.

  19. CheckMATE 2: From the model to the limit

    CERN Document Server

    Dercks, Daniel; Kim, Jong Soo; Rolbiecki, Krzysztof; Tattersall, Jamie; Weber, Torsten

    2016-01-01

    We present the latest developments to the CheckMATE program that allows models of new physics to be easily tested against the recent LHC data. To achieve this goal, the core of CheckMATE now contains over 60 LHC analyses of which 12 are from the 13 TeV run. The main new feature is that CheckMATE 2 now integrates the Monte Carlo event generation via Madgraph and Pythia 8. This allows users to go directly from a SLHA file or UFO model to the result of whether a model is allowed or not. In addition, the integration of the event generation leads to a significant increase in the speed of the program. Many other improvements have also been made, including the possibility to now combine signal regions to give a total likelihood for a model.

  20. Schedulability of Herschel revisited using statistical model checking

    DEFF Research Database (Denmark)

    David, Alexandre; Larsen, Kim Guldstrand; Legay, Axel

    2015-01-01

    Schedulability analysis is a main concern for several embedded applications due to their safety-critical nature. The classical method of response time analysis provides an efficient technique used in industrial practice. However, the method is based on conservative assumptions related to execution...... to obtain some guarantee on the (un)schedulability of the model even in the presence of undecidability. Two methods are considered: symbolic model checking and statistical model checking. Since the model uses stop-watches, the reachability problem becomes undecidable so we are using an over......-approximation technique. We can safely conclude that the system is schedulable for varying values of BCET. For the cases where deadlines are violated, we use polyhedra to try to confirm the witnesses. Our alternative method to confirm non-schedulability uses statistical model-checking (SMC) to generate counter...