WorldWideScience

Sample records for front-end bale loaders

  1. Front End Loader Operator. Open Pit Mining Job Training Series.

    Science.gov (United States)

    Savilow, Bill

    This training outline for front end loader operators, one in a series of eight outlines, is designed primarily for company training foremen or supervisors and for trainers to use as an industry-wide guideline for heavy equipment operator training in open pit mining in British Columbia. Intended as a guide for preparation of lesson plans both for…

  2. Align the Front End First.

    Science.gov (United States)

    Perry, Jim

    1995-01-01

    Discussion of management styles and front-end analysis focuses on a review of Douglas McGregor's theories. Topics include Theories X, Y, and Z; leadership skills; motivational needs of employees; intrinsic and extrinsic rewards; and faulty implementation of instructional systems design processes. (LRW)

  3. The upgraded Tevatron front end

    International Nuclear Information System (INIS)

    Glass, M.; Zagel, J.; Smith, P.; Marsh, W.; Smolucha, J.

    1990-01-01

    We are replacing the computers which support the CAMAC crates in the Fermilab accelerator control system. We want a significant performance increase, but we still want to be able to service scores of different varieties of CAMAC cards in a manner essentially transparent to console applications software. Our new architecture is based on symmetric multiprocessing. Several processors on the same bus, each running identical software, work simultaneously at satisfying different pieces of a console's request for data. We dynamically adjust the load between the processors. We can obtain more processing power by simply plugging in more processor cards and rebooting. We describe in this paper what we believe to be the interesting architectural features of the new front-end computers. We also note how we use some of the advanced features of the Multibus TM II bus and the Intel 80386 processor design to achieve reliability and expandability of both hardware and software. (orig.)

  4. Muon front end for the neutrino factory

    Directory of Open Access Journals (Sweden)

    C. T. Rogers

    2013-04-01

    Full Text Available In the neutrino factory, muons are produced by firing high-energy protons onto a target to produce pions. The pions decay to muons and pass through a capture channel known as the muon front end, before acceleration to 12.6 GeV. The muon front end comprises a variable frequency rf system for longitudinal capture and an ionization cooling channel. In this paper we detail recent improvements in the design of the muon front end.

  5. Muon front end for the neutrino factory

    CERN Document Server

    Rogers, C T; Prior, G; Gilardoni, S; Neuffer, D; Snopok, P; Alekou, A; Pasternak, J

    2013-01-01

    In the neutrino factory, muons are produced by firing high-energy protons onto a target to produce pions. The pions decay to muons and pass through a capture channel known as the muon front end, before acceleration to 12.6 GeV. The muon front end comprises a variable frequency rf system for longitudinal capture and an ionization cooling channel. In this paper we detail recent improvements in the design of the muon front end.

  6. SPD very front end electronics

    International Nuclear Information System (INIS)

    Luengo, S.; Gascon, D.; Comerma, A.; Garrido, L.; Riera, J.; Tortella, S.; Vilasis, X.

    2006-01-01

    The Scintillator Pad Detector (SPD) is part of the LHCb calorimetry system [D. Breton, The front-end electronics for LHCb calorimeters, Tenth International Conference on Calorimetry in Particle Physics, CALOR, Pasadena, 2002] that provides high-energy hadron, electron and photon candidates for the first level trigger. The SPD is designed to distinguish electrons from photons. It consists of a plastic scintillator layer, divided into about 6000 cells of different size to obtain better granularity near the beam [S. Amato, et al., LHCb technical design report, CERN/LHCC/2000-0036, 2000]. Charged particles will produce, and photons will not, ionization in the scintillator. This ionization generates a light pulse that is collected by a WaveLength Shifting (WLS) fiber that is coiled inside the scintillator cell. The light is transmitted through a clear fiber to the readout system that is placed at the periphery of the detector. Due to space constraints, and in order to reduce costs, these 6000 cells are divided in groups using a MAPMT [Z. Ajaltouni, et al., Nucl. Instr. and Meth. A 504 (2003) 9] of 64 channels that provides information to the VFE readout electronics. The SPD signal has rather large statistical fluctuations because of the low number (20-30) of photoelectrons per MIP. Therefore the signal is integrated over the whole bunch crossing length of 25 ns in order to have the maximum value. Since in average about 85% of the SPD signal is within 25 ns, 15% of a sample is subtracted from the following one using an operational amplifier. The SPD VFE readout system that will be presented consists of the following components. A specific ASIC [D. Gascon, et al., Discriminator ASIC for the VFE SPD of the LHCb Calorimeter, LHCB Technical Note, LHCB 2004-xx] integrates the signal, makes the signal-tail subtraction, and compares the level obtained to a programmable threshold (to distinguish electrons from photons). A FPGA programmes the ASIC threshold and the value for

  7. RPC performance vs. front-end electronics

    International Nuclear Information System (INIS)

    Cardarelli, R.; Aielli, G.; Camarri, P.; Di Ciaccio, A.; Di Stante, L.; Liberti, B.; Pastori, E.; Santonico, R.; Zerbini, A.

    2012-01-01

    Moving the amplification from the gas to the front-end electronics was a milestone in the development of Resistive Plate Chambers. Here we discuss the historical evolution of RPCs and we show the results obtained with newly developed front-end electronics with threshold in the fC range.

  8. End-Users, Front Ends and Librarians.

    Science.gov (United States)

    Bourne, Donna E.

    1989-01-01

    The increase in end-user searching, the advantages and limitations of front ends, and the role of the librarian in end-user searching are discussed. It is argued that librarians need to recognize that front ends can be of benefit to themselves and patrons, and to assume the role of advisors and educators for end-users. (37 references) (CLB)

  9. Managing Controversies in the Fuzzy Front End

    DEFF Research Database (Denmark)

    Christiansen, John K.; Gasparin, Marta

    2016-01-01

    This research investigates the controversies that emerge in the fuzzy front end (FFE) and how they are closed so the innovation process can move on. The fuzzy front has been characterized in the literature as a very critical phase, but controversies in the FFE have not been studied before....... The analysis investigates the microprocesses around the controversies that emerge during the fuzzy front end of four products. Five different types of controversies are identified: profit, production, design, brand and customers/market. Each controversy represents a threat, but also an opportunity to search...

  10. RF front-end world class designs

    CERN Document Server

    Love, Janine

    2009-01-01

    All the design and development inspiration and direction a harware engineer needs in one blockbuster book! Janine Love site editor for RF Design Line,columnist, and author has selected the very best RF design material from the Newnes portfolio and has compiled it into this volume. The result is a book covering the gamut of RF front end design from antenna and filter design fundamentals to optimized layout techniques with a strong pragmatic emphasis. In addition to specific design techniques and practices, this book also discusses various approaches to solving RF front end design problems and h

  11. THREE PERSPECTIVES ON MANAGING FRONT END INNOVATION

    DEFF Research Database (Denmark)

    Jensen, Anna Rose Vagn; Clausen, Christian; Gish, Liv

    2018-01-01

    as a complementary perspective. The paper combines a literature review with an empirical examination of the application of these multiple perspectives across three cases of front end of innovation (FEI) management in mature product developing companies. While the process models represent the dominant, albeit rather...... to represent an emergent approach in managing FEI where process models, knowledge strategies and objects become integrated elements in more advanced navigational strategies for key players.......This paper presents three complementary perspectives on the management of front end innovation: A process model perspective, a knowledge perspective and a translational perspective. While the first two perspectives are well established in literature, we offer the translation perspective...

  12. Prototype ALICE front-end card

    CERN Multimedia

    Maximilien Brice

    2004-01-01

    This circuit board is a prototype 48-channel front end digitizer card for the ALICE time projection chamber (TPC), which takes electrical signals from the wire sensors in the TPC and shapes the data before converting the analogue signal to digital data. A total of 4356 cards will be required to process the data from the ALICE TPC, the largest of this type of detector in the world.

  13. Functional description of APS beamline front ends

    International Nuclear Information System (INIS)

    Kuzay, T.

    1993-02-01

    Traditional synchrotron sources were designed to produce bending magnet radiation and have proven to be an essential scientific tool. Currently, a new generation of synchrotron sources is being built that will be able to accommodate a large number of insertion device (ID) and high quality bending magnet (BM) sources. One example is the 7-GeV Advanced Photon Source (APS) now under construction at Argonne National Laboratory. The research and development effort at the APS is designed to fully develop the potential of this new generation of synchrotron sources. Of the 40 straight sections in the APS storage ring, 34 will be available for IDs. The remaining six sections are reserved for the storage ring hardware and diagnostics. Although the ring incorporates 80 BMs, only 40 of them can be used to extract radiation. The accelerator hardware shadows five of these 40 bending magnets, so the maximum number of BM sources on the lattice is 35. Generally, a photon beamline consists of four functional sections. The first section is the ID or the BM, which provides the radiation source. The second section, which is immediately outside the storage ring but inside a concrete shielding tunnel, is the front end, which is designed to control, define, and/or confine the x-ray beam. In the case of the APS, the front ends are designed to confine the photon beam. The third section, just outside the concrete shielding tunnel and on the experimental floor, is the first optics enclosure, which contains optics to filter and monochromatize the photon beam. The fourth section of a beamline consists of beam transports, additional optics, and experiment stations to do the scientific investigations. This document describes only the front ends of the APS beamlines

  14. The ALICE TPC front end electronics

    CERN Document Server

    Musa, L; Bialas, N; Bramm, R; Campagnolo, R; Engster, Claude; Formenti, F; Bonnes, U; Esteve-Bosch, R; Frankenfeld, Ulrich; Glässel, P; Gonzales, C; Gustafsson, Hans Åke; Jiménez, A; Junique, A; Lien, J; Lindenstruth, V; Mota, B; Braun-Munzinger, P; Oeschler, H; Österman, L; Renfordt, R E; Ruschmann, G; Röhrich, D; Schmidt, H R; Stachel, J; Soltveit, A K; Ullaland, K

    2004-01-01

    In this paper we present the front end electronics for the time projection chamber (TPC) of the ALICE experiment. The system, which consists of about 570000 channels, is based on two basic units: (a) an analogue ASIC (PASA) that incorporates the shaping-amplifier circuits for 16 channels; (b) a mixed-signal ASIC (ALTRO) that integrates 16 channels, each consisting of a 10-bit 25-MSPS ADC, the baseline subtraction, tail cancellation filter, zero suppression and multi-event buffer. The complete readout chain is contained in front end cards (FEC), with 128 channels each, connected to the detector by means of capton cables. A number of FECs (up to 25) are controlled by a readout control unit (RCU), which interfaces the FECs to the data acquisition (DAQ), the trigger, and the detector control system (DCS) . A function of the final electronics (1024 channels) has been characterized in a test that incorporates a prototype of the ALICE TPC as well as many other components of the final set-up. The tests show that the ...

  15. Managing Controversies in the Fuzzy Front End

    DEFF Research Database (Denmark)

    Christiansen, John K.; Gasparin, Marta

    2016-01-01

    . The analysis investigates the microprocesses around the controversies that emerge during the fuzzy front end of four products. Five different types of controversies are identified: profit, production, design, brand and customers/market. Each controversy represents a threat, but also an opportunity to search...... for new solutions in the unpredictable non-linear processes. The study uses an ethnographic approach using qualitative data from interviews, company documents, external communication and marketing material, minutes of meetings, informal conversations and observations. The analysis of four FFE processes...... demonstrates how the fuzzy front requires managers to deal with controversies that emerge from many different places and involve both human and non-human actors. Closing the controversies requires managers to take account of the situation, identify the problem that needs to be addressed, and initiate a search...

  16. The CMS Tracker Readout Front End Driver

    CERN Document Server

    Foudas, C.; Ballard, D.; Church, I.; Corrin, E.; Coughlan, J.A.; Day, C.P.; Freeman, E.J.; Fulcher, J.; Gannon, W.J.F.; Hall, G.; Halsall, R.N.J.; Iles, G.; Jones, J.; Leaver, J.; Noy, M.; Pearson, M.; Raymond, M.; Reid, I.; Rogers, G.; Salisbury, J.; Taghavi, S.; Tomalin, I.R.; Zorba, O.

    2004-01-01

    The Front End Driver, FED, is a 9U 400mm VME64x card designed for reading out the Compact Muon Solenoid, CMS, silicon tracker signals transmitted by the APV25 analogue pipeline Application Specific Integrated Circuits. The FED receives the signals via 96 optical fibers at a total input rate of 3.4 GB/sec. The signals are digitized and processed by applying algorithms for pedestal and common mode noise subtraction. Algorithms that search for clusters of hits are used to further reduce the input rate. Only the cluster data along with trigger information of the event are transmitted to the CMS data acquisition system using the S-LINK64 protocol at a maximum rate of 400 MB/sec. All data processing algorithms on the FED are executed in large on-board Field Programmable Gate Arrays. Results on the design, performance, testing and quality control of the FED are presented and discussed.

  17. The PHENIX Drift Chamber Front End Electroncs

    Science.gov (United States)

    Pancake, C.; Velkovska, J.; Pantuev, V.; Fong, D.; Hemmick, T.

    1998-04-01

    The PHENIX Drift Chamber (DC) is designed to operate in the high particle flux environment of the Relativistic Heavy Ion Collider and provide high resolution track measurements. It is segmented into 80 keystones with 160 readout channels each. The Front End Electronics (FEE) developed to meet the demanding operating conditions and the large number of readout channels of the DC will be discussed. It is based on two application specific integrated circuits: the ASD8 and the TMC-PHX1. The ASD8 chip contains 8 channels of bipolar amplifier-shaper-discriminator with 6 ns shaping time and ≈ 20 ns pulse width, which satisfies the two track resolution requirements. The TMC-PHX1 chip is a high-resolution multi-hit Time-to-Digital Converter. The outputs from the ASD8 are digitized in the Time Memory Cell (TMC) every (clock period)/32 or 0.78 ns (at 40 MHz), which gives the intrinsic time resolution of the system. A 256 words deep dual port memory keeps 6.4 μs time history of data at 40 MHz clock. Each DC keystone is supplied with 4 ASD8/TMC boards and one FEM board, which performs the readout of the TMC-PHX1's, buffers and formats the data to be transmitted over the Glink. The slow speed control communication between the FEM and the system is carried out over ARCNET. The full readout chain and the data aquisition system are being tested.

  18. MMIC front-ends for optical communication systems

    DEFF Research Database (Denmark)

    Petersen, Anders Kongstad

    1993-01-01

    Two different types of optical front-end MMIC amplifiers for a 2.5-Gb/s coherent heterodyne optical receiver are presented. A bandwidth of 6-12 GHz has been obtained for a tuned front-end and 3-13 GHz for a distributed front-end. An input noise current density of 5-15 pA/√Hz has been obtained for...

  19. The upgraded CDF front end electronics for calorimetry

    Energy Technology Data Exchange (ETDEWEB)

    Drake, G.; Frei, D.; Hahn, S.R.; Nelson, C.A.; Segler, S.L.; Stuermer, W.

    1991-11-01

    The front end electronics used in the calorimetry of the CDF detector has been upgraded to meet system requirements for higher expected luminosity. A fast digitizer utilizing a 2 {mu}Sec, 16 bit ADC has been designed and built. Improvements to the front end trigger circuitry have been implemented, including the production of 900 new front end modules. Operational experience with the previous system is presented, with discussion of the problems and performance goals.

  20. The upgraded CDF front end electronics for calorimetry

    International Nuclear Information System (INIS)

    Drake, G.; Frei, D.; Hahn, S.R.; Nelson, C.A.; Segler, S.L.; Stuermer, W.

    1991-11-01

    The front end electronics used in the calorimetry of the CDF detector has been upgraded to meet system requirements for higher expected luminosity. A fast digitizer utilizing a 2 μSec, 16 bit ADC has been designed and built. Improvements to the front end trigger circuitry have been implemented, including the production of 900 new front end modules. Operational experience with the previous system is presented, with discussion of the problems and performance goals

  1. FACILITATING RADICAL FRONT-END INNOVATION THROUGH TARGETED HR PRACTICES

    DEFF Research Database (Denmark)

    Aagaard, Annabeth

    2017-01-01

    This study examines how radical front end innovation can be actively facilitated through selected and targeted HR practices and bundles of HR practices. The empirical field is an explorative case study of front end innovation and HR practices in the pharmaceutical industry, with an in-depth case ...

  2. MMIC tuned front-end for a coherent optical receiver

    DEFF Research Database (Denmark)

    Petersen, Anders Kongstad; Jagd, A. M.; Ebskamp, F.

    1993-01-01

    A low-noise transformer tuned optical front-end for a coherent optical receiver is described. The front-end is based on a GaInAs/InP p-i-n photodiode and a full custom designed GaAs monolithic microwave integrated circuit (MMIC). The measured equivalent input noise current density is between 5-16 p...

  3. Digital front-end module (DFEM) series; Digital front end module (DFEM) series

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2000-03-01

    The digital front-end module (DFEM) is a module in which the processes ranging from the reception of digitally modulated radiofrequencies to the output of digital IF (Intermediate Frequency) signals or data streams are integrated. Beginning with a module for the MCNS (Multimedia Cable Network System) cable modem which was the first module in this business field approved by the Cable Labs, U.S., Toshiba has developed a series of DFEMs for various digital media for satellites, ground waves, and CATV (Cable Television) systems. The series is characterized by (1) the serialization of DFEMs compatible with various digital modulation techniques such as 8 PSK (Phase Shift Keying), OFDM (Orthogonal Frequency Division Multiplexing), and 256 QAM (Quadrature Amplitude Modulation), (2) easy connection with digital circuits thanks to the high shielding effect, and (3) the achievement of smaller size, higher performance, and lower power consumption. (translated by NEDO)

  4. Adaptive RF front-ends for hand-held applications

    CERN Document Server

    van Bezooijen, Andre; van Roermund, Arthur

    2010-01-01

    The RF front-end - antenna combination is a vital part of a mobile phone because its performance is very relevant to the link quality between hand-set and cellular network base-stations. The RF front-end performance suffers from changes in operating environment, like hand-effects, that are often unpredictable. ""Adaptive RF Front-Ends for Hand-Held Applications"" presents an analysis on the impact of fluctuating environmental parameters. In order to overcome undesired behavior two different adaptive control methods are treated that make RF frond-ends more resilient: adaptive impedance control,

  5. Idea management in support of pharmaceutical front end innovation

    DEFF Research Database (Denmark)

    Aagaard, Annabeth

    2012-01-01

    The pharmaceutical industry faces continuing pressures from rising R&D costs and depreciating value of patents, as patent lives is eroded by testing procedures and pressures from public authorities to cut health care costs. These challenges have increased the focus on shortening development times......, which again put pressure on the efficiency of front end innovation (FEI). In the attempt to overcome these various challenges pharmaceutical companies are looking for new models to support FEI. This paper explores in what way idea management can be applied as a tool in facilitation of front end...... innovation in practice. First I show through a literature study, how idea management and front end innovation are related and may support each other. Hereafter I apply an exploratory case study of front end innovation in eight medium to large pharmaceutical companies in examination of how idea management...

  6. Fast front-end electronics for COMPASS MWPCs

    CERN Document Server

    Colantoni, M L; Ferrero, A; Frolov, V; Grasso, A; Heinz, S; Maggiora, A; Maggiora, M G; Panzieri, D; Popov, A; Tchalyshev, V

    2000-01-01

    In the COMPASS experiment, under construction at CERN, about 23000 channels of MWPCs will be used. The very high rate of the muon and hadron beams, and the consequently high trigger rate, require front- end electronics with innovative conceptual design. A new MWPC front- end electronics that fulfills the main COMPASS requirement to have a fast DAQ with a minimum dead-time has been designed. The general concept of the front-end cards is described; the comparative tests of two front-end chips, and different fast gas mixtures, are also shown. The commissioning of the experiment will start in the summer 2000, and production running, using the muon beam, is foreseen for the year 2001. (8 refs).

  7. Front-end electronics development for the SSC

    International Nuclear Information System (INIS)

    Levi, M.

    1990-12-01

    This is a status report on electronics development undertaken by the Front-End Electronics Collaboration. The overall goal of the collaboration remains the development by 1992 of complete, architecturally compatible, front end electronic systems for calorimeter, wire drift chamber, and silicon strip readout. We report here a few highlights to give a brief overview of the work underway. Performance requirements and capabilities, selected architectures, circuit designs and test results are presented. 13 refs., 21 figs., 1 tab

  8. An Alternative Front End Analysis Strategy for Complex Systems

    Science.gov (United States)

    2014-12-01

    missile ( ABM ) system . Patriot is employed in the field through a battalion echelon organizational structure. The line battery is the basic building...Research Report 1981 An Alternative Front End Analysis Strategy for Complex Systems M. Glenn Cobb U.S. Army Research Institute...NUMBER W5J9CQ11D0003 An Alternative Front End Analysis Strategy for Complex Systems 5b. PROGRAM ELEMENT NUMBER 633007 6

  9. Radiation hardness on very front-end for SPD

    International Nuclear Information System (INIS)

    Cano, Xavier; Graciani, Ricardo; Gascon, David; Garrido, Lluis; Bota, Sebastia; Herms, Atila; Comerma, Albert; Riera, Jordi

    2005-01-01

    The calorimeter front-end electronics of the LHCb experiment will be located in a region, which is not protected from radiation. Therefore, all the electronics must be qualified to stand some defined radiation levels. The procedure, measurements and results of an irradiation test for every component of the very front-end SPD detector, which is part of the LHCb calorimeter are presented here. All the tested components, except a custom made ASIC, are commercially available

  10. Indico front-end: From spaghetti to lasagna

    CERN Multimedia

    CERN. Geneva

    2017-01-01

    We will present how we transitioned from legacy spaghetti UI code to a more coherent, easier to understand and maintain ecosystem of front-end technologies and facilities with a strong emphasis in reusable components. In particular, we will share with you: 1) how we use Sass to maintain our home-baked CSS, 2) how we survive in 2017 without front-end Javascript frameworks, and 3) how we use template macros and WTForms for generating consistent HTML transparently.

  11. Feedback from operational experience in front-end transportation

    International Nuclear Information System (INIS)

    Mondonel, J.L.; Parison, C.

    1998-01-01

    Transport forms an integral part of the nuclear fuel cycle, representing the strategic link between each stage of the cycle. In a way there is a transport cycle that parallels the nuclear fuel cycle. This concerns particularly the front-end of the cycle whose steps - mining conversion, enrichment and fuel fabrication - require numerous transports. Back-end shipments involve a handful of countries, but front-end transports involve all five continents, and many exotic countries. All over Europe such transports are routinely performed with an excellent safety track record. Transnucleaire dominates the French nuclear transportation market and carries out both front and back-end transports. For instance in 1996 more than 28,400 front-end packages were transported as well as more than 3,600 back-end packages. However front-end transport is now a business undergoing much change. A nuclear transportation company must now cope with an evolving picture including new technical requirements, new transportation schemes and new business conditions. This paper describes the latest evolutions in terms of front-end transportation and the way this activity is carried out by Transnucleaire, and goes on to discuss future prospects. (authors)

  12. Concepts for a Muon Accelerator Front-End

    Energy Technology Data Exchange (ETDEWEB)

    Stratakis, Diktys [Fermilab; Berg, Scott [Brookhaven; Neuffer, David [Fermilab

    2017-03-16

    We present a muon capture front-end scheme for muon based applications. In this Front-End design, a proton bunch strikes a target and creates secondary pions that drift into a capture channel, decaying into muons. A series of rf cavities forms the resulting muon beams into a series of bunches of differerent energies, aligns the bunches to equal central energies, and initiates ionization cooling. We also discuss the design of a chicane system for the removal of unwanted secondary particles from the muon capture region and thus reduce activation of the machine. With the aid of numerical simulations we evaluate the performance of this Front-End scheme as well as study its sensitivity against key parameters such as the type of target, the number of rf cavities and the gas pressure of the channel.

  13. CMOS front-end electronics for radiation sensors

    CERN Document Server

    AUTHOR|(CDS)2071026

    2015-01-01

    This book offers a comprehensive treatment of front-end electronics for radiation detection. It discusses the fundamental principles of signal processing for radiation detectors and describes circuits at the level of functional building blocks, omitting transistor-level implementation. It also covers important system-level topics commonly found in the world of front-end electronics for radiation sensors. The book develops the topics in detail, with a constant focus on practical problems. It also provides real implementation examples that offer insights and stimuli for more experienced engineers already working in the field.

  14. HINS Linac front end focusing system R&D

    Energy Technology Data Exchange (ETDEWEB)

    Apollinari, G.; Carcagno, R.H.; Dimarco, J.; Huang, Y.; Kashikhin, V.V.; Orris, D.F.; Page, T.M.; Rabehl, R.; Sylvester, C.; Tartaglia, M.A.; Terechkine, I.; /Fermilab /Argonne

    2008-08-01

    This report summarizes current status of an R&D program to develop a focusing system for the front end of a superconducting RF linac. Superconducting solenoids will be used as focusing lenses in the low energy accelerating sections of the front end. The development of focusing lenses for the first accelerating section is in the production stage, and lens certification activities are in preparation at FNAL. The report contains information about the focusing lens design and performance, including solenoid, dipole corrector, and power leads, and about cryogenic system design and performance. It also describes the lens magnetic axis position measurement technique and discusses scope of an acceptance/certification process.

  15. HINS Linac front end focusing system R and D

    International Nuclear Information System (INIS)

    Apollinari, G.; Carcagno, R.H.; Dimarco, J.; Huang, Y.; Kashikhin, V.V.; Orris, D.F.; Page, T.M.; Rabehl, R.; Sylvester, C.; Tartaglia, M.A.; Terechkine, I.; Fermilab; Argonne

    2008-01-01

    This report summarizes current status of an R and D program to develop a focusing system for the front end of a superconducting RF linac. Superconducting solenoids will be used as focusing lenses in the low energy accelerating sections of the front end. The development of focusing lenses for the first accelerating section is in the production stage, and lens certification activities are in preparation at FNAL. The report contains information about the focusing lens design and performance, including solenoid, dipole corrector, and power leads, and about cryogenic system design and performance. It also describes the lens magnetic axis position measurement technique and discusses scope of an acceptance/certification process

  16. REASONING IN THE FUZZY FRONT END OF INNOVATION:

    DEFF Research Database (Denmark)

    Haase, Louise Møller; Laursen, Linda Nhu

    2018-01-01

    in the fuzzy front end is the reasoning process: innovation teams are faced with open-ended, ill-defined problems, where they need to make decisions about an unknown future but have only incomplete, ambiguous and contradicting insights available. We study the reasoning of experts, how they frame to make sense...... of all the insights and create a basis for decision-making in relation to a new project. Based on case studies of five innovative products from various industries, we propose a Product DNA model for understanding the reasoning in the fuzzy front end of innovation. The Product DNA Model explains how...... experts reason and what direct their reasoning....

  17. Front-end electronics for the upgraded GMRT

    International Nuclear Information System (INIS)

    Raut, Anil N; Bhalerao, Vilas; Kumar, A Praveen

    2013-01-01

    This paper first describes briefly the existing front-end receiver in use at the GMRT observatory and then details the ongoing development of next generation receiver systems for the upgraded GMRT. It covers the design of the new, two stage, room temperature, low noise amplifiers with better noise performance and matching, and improved dynamic range that are being implemented for the 130–260 MHz, 250–500 MHz and 550–900 MHz bands of the upgraded GMRT front-end systems.

  18. PACE3 - front-end chip for the CMS Preshower

    CERN Multimedia

    Aspel, Paul

    2003-01-01

    This is PACE3 which is the front-end chip for the CMS Preshower. In fact PACE3 is the combination of two ASICs called Delta3 and PACEAM3. Delta3 is on the left and PACEAM3 is on the right. The two ASICs are bonded together and then packaged within a single 196 pin fpBGA package.

  19. Front end readout electronics for the CMS hadron calorimeter

    CERN Document Server

    Shaw, Terri M

    2002-01-01

    The front-end electronics for the CMS Hadron Calorimeter provides digitized data at the beam interaction rate of 40 MHz. Analog signals provided by hybrid photodiodes (HPDs) or photomultiplier tubes (PMTs) are digitized and the data is sent off board through serialized fiber optic links running at 1600 Mbps. In order to maximize the input signal, the front-end electronics are housed on the detector in close proximity to the scintillating fibers or phototubes. To fit the electronics into available space, custom crates, backplanes and cooling methods have had to be developed. During the expected ten-year lifetime, the front-end readout electronics will exist in an environment where radiation levels approach 330 rads and the neutron fluence will be 1.3E11 n/cm sup 2. For this reason, the design approach relies heavily upon custom radiation tolerant ASICs. This paper will present the system architecture of the front-end readout crates and describe their results with early prototypes.

  20. Front end readout electronics for the CMS hadron calorimeter

    International Nuclear Information System (INIS)

    Terri M. Shaw et al.

    2002-01-01

    The front-end electronics for the CMS Hadron Calorimeter provides digitized data at the beam interaction rate of 40 MHz. Analog signals provided by hybrid photodiodes (HPDs) or photomultiplier tubes (PMTs) are digitized and the data is sent off board through serialized fiber optic links running at 1600 Mbps. In order to maximize the input signal, the front-end electronics are housed on the detector in close proximity to the scintillating fibers or phototubes. To fit the electronics into available space, custom crates, backplanes and cooling methods have had to be developed. During the expected ten-year lifetime, the front-end readout electronics will exist in an environment where radiation levels approach 330 rads and the neutron fluence will be 1.3E11 n/cm 2 . For this reason, the design approach relies heavily upon custom radiation tolerant ASICs. This paper will present the system architecture of the front-end readout crates and describe their results with early prototypes

  1. Calibration method for direct conversion receiver front-ends

    Directory of Open Access Journals (Sweden)

    R. Müller

    2008-05-01

    Full Text Available Technology induced process tolerances in analog circuits cause device characteristics different from specification. For direct conversion receiver front-ends a system level calibration method is presented. The malfunctions of the devices are compensated by tuning dominant circuit parameters. Thereto optimization techniques are applied which use measurement values and special evaluation functions.

  2. A socio-internactive framework for the fuzzy front end

    NARCIS (Netherlands)

    Smulders, Frido E.; van den Broek, Egon; van der Voort, Mascha C.; Fernandes, A.; Teixeira, A.; Natal Jorge, R.

    2007-01-01

    This paper aims to illustrate that the dominating rational-analytic perspective on the Fuzzy Front End (FFE) of innovation could benefit by a complementary socio-interactive perspective that addresses the social processes during the FFE. We have developed a still fledgling socio-interactive

  3. Novel Front-end Electronics for Time Projection Chamber Detectors

    CERN Document Server

    García García, Eduardo José

    This work has been carried out in the European Organization for Nuclear Research (CERN) and it was supported by the European Union as part of the research and development towards the European detector the (EUDET) project, specifically for the International Linear Collider (ILC). In particle physics there are several different categories of particle detectors. The presented design is focused on a particular kind of tracking detector called Time Projection Chamber (TPC). The TPC provides a three dimensional image of electrically charged particles crossing a gaseous volume. The thesis includes a study of the requirements for future TPC detectors summarizing the parameters that the front-end readout electronics must fulfill. In addition, these requirements are compared with respect to the readouts used in existing TPC detectors. It is concluded that none of the existing front-end readout designs fulfill the stringent requirements. The main requirements for future TPC detectors are high integration, an increased n...

  4. Front-end electronics for multichannel semiconductor detector systems

    CERN Document Server

    Grybos, P

    2010-01-01

    Front-end electronics for multichannel semiconductor detektor systems Volume 08, EuCARD Editorial Series on Accelerator Science and Technology The monograph is devoted to many different aspects related to front-end electronics for semiconductor detector systems, namely: − designing and testing silicon position sensitive detectors for HEP experiments and X-ray imaging applications, − designing and testing of multichannel readout electronics for semiconductor detectors used in X-ray imaging applications, especially for noise minimization, fast signal processing, crosstalk reduction and good matching performance, − optimization of semiconductor detection systems in respect to the effects of radiation damage. The monograph is the result mainly of the author's experience in the above-mentioned areas and it is an attempt of a comprehensive presentation of issues related to the position sensitive detection system working in a single photon counting mode and intended to X-ray imaging applications. The structure...

  5. Flexible Frequency Discrimination Subsystems for Reconfigurable Radio Front Ends

    Directory of Open Access Journals (Sweden)

    Carey-Smith Bruce E

    2005-01-01

    Full Text Available The required flexibility of the software-defined radio front end may currently be met with better overall performance by employing tunable narrowband circuits rather than pursuing a truly wideband approach. A key component of narrowband transceivers is appropriate filtering to reduce spurious spectral content in the transmitter and limit out-of-band interference in the receiver. In this paper, recent advances in flexible, frequency-selective, circuit components applicable to reconfigurable SDR front ends are reviewed. The paper contains discussion regarding the filtering requirements in the SDR context and the use of intelligent, adaptive control to provide environment-aware frequency discrimination. Wide tuning-range frequency-selective circuit elements are surveyed including bandpass and bandstop filters and narrowband tunable antennas. The suitability of these elements to the mobile wireless SDR environment is discussed.

  6. Pixel front-end development in 65 nm CMOS technology

    International Nuclear Information System (INIS)

    Havránek, M; Hemperek, T; Kishishita, T; Krüger, H; Wermes, N

    2014-01-01

    Luminosity upgrade of the LHC (HL-LHC) imposes severe constraints on the detector tracking systems in terms of radiation hardness and capability to cope with higher hit rates. One possible way of keeping track with increasing luminosity is the usage of more advanced technologies. Ultra deep sub-micron CMOS technologies allow a design of complex and high speed electronics with high integration density. In addition, these technologies are inherently radiation hard. We present a prototype of analog pixel front-end integrated circuit designed in 65 nm CMOS technology with applications oriented towards the ATLAS Pixel Detector upgrade. The aspects of ultra deep sub-micron design and performance of the analog pixel front-end circuits will be discussed

  7. Test of ATLAS RPCs Front-End electronics

    International Nuclear Information System (INIS)

    Aielli, G.; Camarri, P.; Cardarelli, R.; Di Ciaccio, A.; Di Stante, L.; Liberti, B.; Paoloni, A.; Pastori, E.; Santonico, R.

    2003-01-01

    The Front-End Electronics performing the ATLAS RPCs readout is a full custom 8 channels GaAs circuit, which integrates in a single die both the analog and digital signal processing. The die is bonded on the Front-End board which is completely closed inside the detector Faraday cage. About 50 000 FE boards are foreseen for the experiment. The complete functionality of the FE boards will be certificated before the detector assembly. We describe here the systematic test devoted to check the dynamic functionality of each single channel and the selection criteria applied. It measures and registers all relevant electronics parameters to build up a complete database for the experiment. The statistical results from more than 1100 channels are presented

  8. High Dynamic Range Cognitive Radio Front Ends: Architecture to Evaluation

    Science.gov (United States)

    Ashok, Arun; Subbiah, Iyappan; Varga, Gabor; Schrey, Moritz; Heinen, Stefan

    2016-07-01

    Advent of TV white space digitization has released frequencies from 470 MHz to 790 MHz to be utilized opportunistically. The secondary user can utilize these so called TV spaces in the absence of primary users. The most important challenge for this coexistence is mutual interference. While the strong TV stations can completely saturate the receiver of the cognitive radio (CR), the cognitive radio spurious tones can disturb other primary users and white space devices. The aim of this paper is to address the challenges for enabling cognitive radio applications in WLAN and LTE. In this process, architectural considerations for the design of cognitive radio front ends are discussed. With high-IF converters, faster and flexible implementation of CR enabled WLAN and LTE are shown. The effectiveness of the architecture is shown by evaluating the CR front ends for compliance of standards namely 802.11b/g (WLAN) and 3GPP TS 36.101 (LTE).

  9. Single Event Upsets in the ATLAS IBL Front End ASICs

    CERN Document Server

    Rozanov, Alexander; The ATLAS collaboration

    2018-01-01

    During operation at instantaneous luminosities of up to 2.1 10^{34} cm^{-2} s^{-1} the front end chips of the ATLAS innermost pixel layer (IBL) experienced single event upsets affecting its global registers as well as the settings for the individual pixels, causing, among other things loss of occupancy, noisy pixels, and silent pixels. A quantitative analysis of the single event upsets as well as the operational issues and mitigation techniques will be presented.

  10. Frequency to Voltage Converter Analog Front-End Prototype

    Science.gov (United States)

    Mata, Carlos; Raines, Matthew

    2012-01-01

    The frequency to voltage converter analog front end evaluation prototype (F2V AFE) is an evaluation board designed for comparison of different methods of accurately extracting the frequency of a sinusoidal input signal. A configurable input stage is routed to one or several of five separate, configurable filtering circuits, and then to a configurable output stage. Amplifier selection and gain, filter corner frequencies, and comparator hysteresis and voltage reference are all easily configurable through the use of jumpers and potentiometers.

  11. Progress with the SNS front-end systems

    International Nuclear Information System (INIS)

    Keller, R.; Abraham, W.; Ayers, J.J.; Cheng, D.W.; Cull, P.; DiGennaro, R.; Doolittle, L.; Gough, R.A.; Greer, J.B.; Hoff, M.D.; Leung, K.N.; Lewis, S.; Lionberger, C.; MacGill, R.; Minamihara, Y.; Monroy, M.; Oshatz, D.; Pruyn, J.; Ratti, A.; Reijonen, J.; Schenkel, T.; Staples, J.W.; Syversrud, D.; Thomae, R.; Virostek, S.; Yourd, R.

    2001-01-01

    The Front-End Systems (FES) of the Spallation Neutron Source (SNS) project have been described in detail elsewhere [1]. They comprise an rf-driven H - ion source, electrostatic LEBT, four-vane RFQ, and an elaborate MEBT. These systems are planned to be delivered to the SNS facility in Oak Ridge in June 2002. This paper discusses the latest design features, the status of development work, component fabrication and procurements, and experimental results with the first commissioned beamline elements

  12. An analog integrated front-end amplifier for neural applications

    OpenAIRE

    Zhou, Zhijun; Warr, Paul

    2017-01-01

    The front-end amplifier forms the critical element for signal detection and pre-processing within neural monitoring systems. It determines not only the fidelity of the biosignal, but also impacts power consumption and detector size. In this paper, a combined feedback loop-controlled approach is proposed to neutralize for the input leakage currents generated by low noise amplifiers when in integrated circuit form, alongside signal leakage into the input bias network. Significantly, this loop t...

  13. Front-end data processing the SLD data acquisition system

    International Nuclear Information System (INIS)

    Nielsen, B.S.

    1986-07-01

    The data acquisition system for the SLD detector will make extensive use of parallel at the front-end level. Fastbus acquisition modules are being built with powerful processing capabilities for calibration, data reduction and further pre-processing of the large amount of analog data handled by each module. This paper describes the read-out electronics chain and data pre-processing system adapted for most of the detector channels, exemplified by the central drift chamber waveform digitization and processing system

  14. A Full Front End Chain for Drift Chambers

    Energy Technology Data Exchange (ETDEWEB)

    Chiarello, G. [Istituto Nazionale di Fisica Nucleare, Lecce (Italy); Università del Salento, Lecce (Italy); Corvaglia, A.; Grancagnolo, F. [Istituto Nazionale di Fisica Nucleare, Lecce (Italy); Panareo, M. [Istituto Nazionale di Fisica Nucleare, Lecce (Italy); Università del Salento, Lecce (Italy); Pepino, A., E-mail: aurora.pepino@le.infn.it [Istituto Nazionale di Fisica Nucleare, Lecce (Italy); Università del Salento, Lecce (Italy); Primiceri, P. [Istituto Nazionale di Fisica Nucleare, Lecce (Italy); Tassielli, G. [Istituto Nazionale di Fisica Nucleare, Lecce (Italy); Fermilab, Batavia, Illinois (United States); Università Marconi, Roma (Italy)

    2014-03-01

    We developed a high performance full chain for drift chamber signals processing. The Front End electronics is a multistage amplifier board based on high performance commercial devices. In addition a fast readout algorithm for Cluster Counting and Timing purposes has been implemented on a Xilinx-Virtex 4 core FPGA. The algorithm analyzes and stores data coming from a Helium based drift tube and represents the outcome of balancing between efficiency and high speed performance.

  15. MDT-ASD, CMOS front-end for ATLAS MDT

    CERN Document Server

    Posch, C; Oliver, J

    2007-01-01

    This document serves as the main reference and user`s manual for the read-out chip of the Monitored Drift Tubes in the ATLAS Muon Spectrometer. The eight-channel front-end ASIC is referred to as MDT-ASD. The document contains the requirements and complete specifications, a detailed description of the design with characteristics of all sub-circuits and building blocks, a comprehensive section on functionality and performance test results, and a complete bibliography.

  16. Redesigned front end for the upgrade at CHESS

    International Nuclear Information System (INIS)

    Headrick, R.L.; Smolenski, K.W.

    1996-01-01

    We will report on beamline front-end upgrades for the 24-pole wiggler beamlines at CHESS. A new design for primary x-ray beamstops based on a tapered, water-cooled copper block has been implemented and installed in the CHESS F beamline. The design uses a horizontally tapered open-quote open-quote V close-quote close-quote shape to reduce the power density on the internal surfaces and internal water channels in the block to provide efficient water cooling. Upstream of the beam stops, we have installed a new photoelectron style beam position monitor with separate monitoring of the wiggler and dipole vertical beam positions and with micron-level sensitivity. The monitor close-quote s internal surfaces are designed to absorb the full x-ray power in case of beam missteering, and the uncooled photoelectron collecting plates are not visible to the x-ray beam. A graphite prefilter has been installed to protect the beryllium windows that separate the front end from the x-ray optics downstream. The redesigned front end is required by the upgrade of the Cornell storage ring, now in progress, which will allow stored electron and positron currents of 300 mA by 1996, and 500 mA by 1998. At 500 mA, the wiggler power output will be over 32 kW. copyright 1996 American Institute of Physics

  17. The control system for the CMS tracker front-end

    CERN Document Server

    Drouhin, F; Ljuslin, C; Maazouzi, C; Marchiero, A; Marinelli, N; Paillard, C; Siegrist, P; Tsirou, A L; Verdini, P G; Walsham, P; Zghiche, A

    2002-01-01

    The CMS Tracker uses complex, programmable embedded electronics for the readout of the Silicon sensors, for the control of the working point of the optical transmitters, for the phase adjustment of the 40 MHz LHC clock and for the monitoring of the voltages, currents and temperatures. In order to establish reliable, noise-free communication with the outside world the control chain has been designed to operate over a ribbon of optical fibers. The optical links, the Front End Controller board that carries their support electronics, the Clocking and Control Unit module receiving the signals over the high-speed link and fanning them out to the front- ends have recently become available. A multi-layered software architecture to handle these devices, and the front-ends, in a way transparent to the end-user, interfaced to an Oracle database for the retrieval of the parameters to be downloaded with the intent of building and operating a small-scale prototype of the control system for the CMS Tracker. The paper descri...

  18. Optimized capture section for a muon accelerator front end

    Directory of Open Access Journals (Sweden)

    Hisham Kamal Sayed

    2014-07-01

    Full Text Available In a muon accelerator complex, a target is bombarded by a multi-MW proton beam to produce pions, which decay into the muons which are thereafter bunched, cooled, and accelerated. The front end of the complex captures those pions, then manipulates their phase space, and that of the muons into which they decay, to maximize the number of muons within the acceptance of the downstream systems. The secondary pion beam produced at the target is captured by a high field target solenoid that tapers down to a constant field throughout the rest of the front end. In this study we enhance the useful muon flux by introducing a new design of the longitudinal profile of the solenoid field at, and downstream of, the target. We find that the useful muon flux exiting the front end is larger when the field at the target is higher, the distance over which the field tapers down is shorter, and the field at the end of the taper is higher. We describe how the solenoid field profile impacts the transverse and longitudinal phase space of the beam and thereby leads to these dependencies.

  19. TRANSFORMASI ARSITEKTUR BALE DAJA

    Directory of Open Access Journals (Sweden)

    A.A. Oka Saraswati

    2008-01-01

    Full Text Available Bale Daja is a building sited in kaja (northerly direction which is defined in accordance to local terms. Kaja or Daja has been tied with a hilly (mountainous area, lining along Bali’s east to west axis. To those reside on the southern part of this line, northerly is insequence with the actual north direction. However, those stand on the opposite side have their notherly pointing to the actual south direction. Bale Daja has various inherent functions. These include its usages as a sleeping area, space for giving birth, quarantine area for female teenagers, and storage for valuable family belongings. In a long run, these usages have been expanded to incorporate further functions of a building for sleeping, numerous domestic activities, chatting, offering preparation, reading and writing manuscripts, welcoming guests, and meeting with both local and government officers. According to a thorough investigation, there are seven types of Bale Daja found. In several cases within its development, a Bale Daja has been completed with one or more additional uses of a toilet, a modern working space, and a room dedicated for watching television. Such type of a Bale Daja is usually accessed through its sides with windows and wide openings attached. These changes are also accompanied by the use of newly available building materials. This writing examines the development of Bale Daja viewed from Balinese Traditional Architecture principles through transformation, both-and phenomenon and resultant of complexity. The recent transformation of a Bale Daja shows a trend in which traditional value systems and architectural guidelines remain highly regarded in practice. Thus, such an architectural development demonstrates a capacity to accommodate social development taking place within its society Abstract in Bahasa Indonesia: Bale daja merupakan bale yang mengikuti perletakan sesuai dengan arah mata angin dalam penyebutan masyarakat setempat. Kaja atau daja

  20. CODA : Compact front-end analog ASIC for silicon detectors

    International Nuclear Information System (INIS)

    Chandratre, V.B.; Sardesai, S.V.; Kataria, S.K.

    2004-01-01

    The paper presents the design of a front-end signal processing ASIC to be used with Silicon detectors having full depletion capacitance up to 40 pf. The ASIC channel consists of a charge amplifier, a shaper amplifier (CR-RC 3 ) and a comparator. There is provision for changing gain and polarity. The circuit has an estimated power dissipation of 16 mw. The ASIC is fabricated in 1.2 um CMOS technology. The 0pf noise is ∼400e. The chip has an area of 3 by 4 mm is packaged in 48 pin CLCC and COB option (Chip on Board). (author)

  1. Instrument Front-Ends at Fermilab During Run II

    Energy Technology Data Exchange (ETDEWEB)

    Meyer, Thomas; Slimmer, David; Voy, Duane; /Fermilab

    2011-07-13

    The optimization of an accelerator relies on the ability to monitor the behavior of the beam in an intelligent and timely fashion. The use of processor-driven front-ends allowed for the deployment of smart systems in the field for improved data collection and analysis during Run II. This paper describes the implementation of the two main systems used: National Instruments LabVIEW running on PCs, and WindRiver's VxWorks real-time operating system running in a VME crate processor.

  2. Instrument front-ends at Fermilab during Run II

    International Nuclear Information System (INIS)

    Meyer, T; Slimmer, D; Voy, D

    2011-01-01

    The optimization of an accelerator relies on the ability to monitor the behavior of the beam in an intelligent and timely fashion. The use of processor-driven front-ends allowed for the deployment of smart systems in the field for improved data collection and analysis during Run II. This paper describes the implementation of the two main systems used: National Instruments LabVIEW running on PCs, and WindRiver's VxWorks real-time operating system running in a VME crate processor.

  3. Instrument Front-Ends at Fermilab During Run II

    International Nuclear Information System (INIS)

    Meyer, Thomas; Slimmer, David; Voy, Duane

    2011-01-01

    The optimization of an accelerator relies on the ability to monitor the behavior of the beam in an intelligent and timely fashion. The use of processor-driven front-ends allowed for the deployment of smart systems in the field for improved data collection and analysis during Run II. This paper describes the implementation of the two main systems used: National Instruments LabVIEW running on PCs, and WindRiver's VxWorks real-time operating system running in a VME crate processor.

  4. Instrument front-ends at Fermilab during Run II

    Science.gov (United States)

    Meyer, T.; Slimmer, D.; Voy, D.

    2011-11-01

    The optimization of an accelerator relies on the ability to monitor the behavior of the beam in an intelligent and timely fashion. The use of processor-driven front-ends allowed for the deployment of smart systems in the field for improved data collection and analysis during Run II. This paper describes the implementation of the two main systems used: National Instruments LabVIEW running on PCs, and WindRiver's VxWorks real-time operating system running in a VME crate processor. Work supported by Fermi Research Alliance, LLC under Contract No. DE-AC02-07CH11359 with the United States Department of Energy.

  5. A multitasking, multisinked, multiprocessor data acquisition front end

    International Nuclear Information System (INIS)

    Fox, R.; Au, R.; Molen, A.V.

    1989-01-01

    The authors have developed a generalized data acquisition front end system which is based on MC68020 processors running a commercial real time kernel (rhoSOS), and implemented primarily in a high level language (C). This system has been attached to the back end on-line computing system at NSCL via our high performance ETHERNET protocol. Data may be simultaneously sent to any number of back end systems. Fixed fraction sampling along links to back end computing is also supported. A nonprocedural program generator simplifies the development of experiment specific code

  6. PMF: the front end electronic of the ALFA detector

    CERN Document Server

    Barrillon, P; Cheikali, C; Cuisy, D; Gaspard, M; Fournier, D; Heller, M; Iwanski, W; Lavigne, B; de La Taille, C; Puzo, P; Socha, J-L

    2008-01-01

    The front end electronic (PMF) of the future ATLAS luminometer is described here. It is composed by a MAPMT and a compact stack of three PCBs which deliver the high voltage, route and readout the output signals. The third board contains a FPGA and MAROC, a 64 channels ASIC which can correct the non uniformity of the MAPMT channels gain thanks to a variable gain preamplifier. Its main role is to shape and discriminate the input signals at 1/3 photo-electron and produce 64 trigger outputs. Laboratory tests performed on prototype and pre-series PMFs have showed performances in good agreement with the requirements.

  7. Structuring front-end innovation activities throughout strategic product planning

    Directory of Open Access Journals (Sweden)

    Thaisa Rodrigues

    Full Text Available Abstract Strategic product planning (SPP for new product development (NPD in the front-end of innovation (FEI is a great challenge for managers and practitioners. This article analyzes the structuring process of FEI activities during SPP. A research was carried out with 78 industries from both food and furniture in Brazil. Our study revealed that FEI activities are structured in an intricate network with a high level of complexity and interdependence. The large amount of activities and the complexity in structuring them denote that companies are concerned to reduce uncertainties and risks intensifying the planning phase.

  8. New RPC front-end electronics for hades

    CERN Document Server

    Gil, Alejandro; Cabanelas, P; Díaz, J; Garzón, J A; González-Díaz, D; König, W; Lange, J S; Marín, J; Montes, N; Skott, P; Traxler, M

    2007-01-01

    Time-of-flight (TOF) detectors are mainly used for both particle identification and triggering. Resistive Plate Chamber (RPC) detectors are becoming widely used because of their excellent TOF capabilities and reduced cost. The new ESTRELA* RPC wall, which is being installed in the HADES detector at Darmstadt GSI, will contain 1024 RPC modules, covering an active area of around 7 m2. It has excellent TOF and good charge resolutions. Its Front-End electronics is based on a 8-layer Mother-Board providing impedance matched paths for the output signals of each of the eight 4-channel Daughter-Boards to the TDC.

  9. Front-end electronics for the CMS preshower detector

    CERN Document Server

    Go, A; Barney, D; Bloch, P; Peisert, Anna; Löfstedt, B; Reynaud, S; Borkar, S; Lalwani, S

    2002-01-01

    The front-end readout system PACE2 for the CMS preshower detector consists of two chips: Delta is a 32 channel preamplifier and shaper that provides low noise, charge to voltage readout for large capacitive silicon sensors over a large dynamic range (up to 400 MIPs); PACE-AM contains a 32-channel wide, 160-cell deep, analog memory with a 32 to 1 multiplexer for serial readout. These chips are designed in .8 mu m BiCMOS DMILL radiation tolerant technology. The performance in terms of dynamic range, linearity, noise, peaking time and memory uniformity are presented. (4 refs).

  10. Performance of Front-End Readout System for PHENIX RICH

    International Nuclear Information System (INIS)

    Oyama, K.; Hamagaki, H.; Nishimura, S.; Shigaki, K.; Hayano, R.S.; Hibino, M.; Kametani, S.; Kikuchi, J.; Matsumoto, T.; Sakaguchi, T.; Ebisu, K.; Hara, H.; Tanaka, Y.; Ushiroda, T.; Moscone, C.G.; Wintenberg, A.L.; Young, G.R.

    1999-01-01

    A front-end electronics system has been developed for the Ring Imaging Cerenkov (RICH) detector of the PHENIX experiment at the Relativistic Heavy Ion Collider (RHIC), Brookhaven National Laboratory (BNL). A high speed custom back-plane with source synchronous bus architecture, a full custom analog ASIC, and board modules with FPGA's and CPLD's were developed for high performance real time data acquisition. The transfer rate of the back-lane has reached 640 MB/s with 128 bits data bus. Total transaction time is estimated to be less than 30 micros per event. The design specifications and test results of the system are presented in this paper

  11. AiGERM: A logic programming front end for GERM

    Science.gov (United States)

    Hashim, Safaa H.

    1990-01-01

    AiGerm (Artificially Intelligent Graphical Entity Relation Modeler) is a relational data base query and programming language front end for MCC (Mission Control Center)/STP's (Space Test Program) Germ (Graphical Entity Relational Modeling) system. It is intended as an add-on component of the Germ system to be used for navigating very large networks of information. It can also function as an expert system shell for prototyping knowledge-based systems. AiGerm provides an interface between the programming language and Germ.

  12. APPLICATION OF OBJECT ORIENTED PROGRAMMING TECHNIQUES IN FRONT END COMPUTERS

    International Nuclear Information System (INIS)

    SKELLY, J.F.

    1997-01-01

    The Front End Computer (FEC) environment imposes special demands on software, beyond real time performance and robustness. FEC software must manage a diverse inventory of devices with individualistic timing requirements and hardware interfaces. It must implement network services which export device access to the control system at large, interpreting a uniform network communications protocol into the specific control requirements of the individual devices. Object oriented languages provide programming techniques which neatly address these challenges, and also offer benefits in terms of maintainability and flexibility. Applications are discussed which exhibit the use of inheritance, multiple inheritance and inheritance trees, and polymorphism to address the needs of FEC software

  13. Modern design of a fast front-end computer

    Science.gov (United States)

    Šoštarić, Z.; Anic̈ić, D.; Sekolec, L.; Su, J.

    1994-12-01

    Front-end computers (FEC) at Paul Scherrer Institut provide access to accelerator CAMAC-based sensors and actuators by way of a local area network. In the scope of the new generation FEC project, a front-end is regarded as a collection of services. The functionality of one such service is described in terms of Yourdon's environment, behaviour, processor and task models. The computational model (software representation of the environment) of the service is defined separately, using the information model of the Shlaer-Mellor method, and Sather OO language. In parallel with the analysis and later with the design, a suite of test programmes was developed to evaluate the feasibility of different computing platforms for the project and a set of rapid prototypes was produced to resolve different implementation issues. The past and future aspects of the project and its driving forces are presented. Justification of the choice of methodology, platform and requirement, is given. We conclude with a description of the present state, priorities and limitations of our project.

  14. Underwater fiber-wireless communication with a passive front end

    Science.gov (United States)

    Xu, Jing; Sun, Bin; Lyu, Weichao; Kong, Meiwei; Sarwar, Rohail; Han, Jun; Zhang, Wei; Deng, Ning

    2017-11-01

    We propose and experimentally demonstrate a novel concept on underwater fiber-wireless (Fi-Wi) communication system with a fully passive wireless front end. A low-cost step-index (SI) plastic optical fiber (POF) together with a passive collimating lens at the front end composes the underwater Fi-Wi architecture. We have achieved a 1.71-Gb/s transmission at a mean BER of 4.97 × 10-3 (1.30 × 10-3 when using power loading) over a 50-m SI-POF and 2-m underwater wireless channel using orthogonal frequency division multiplexing (OFDM). Although the wireless part is very short, it actually plays a crucial role in practical underwater implementation, especially in deep sea. Compared with the wired solution (e.g. using a 52-m POF cable without the UWOC part), the proposed underwater Fi-Wi scheme can save optical wet-mate connectors that are sophisticated, very expensive and difficult to install in deep ocean. By combining high-capacity robust POF with the mobility and ubiquity of underwater wireless optical communication (UWOC), the proposed underwater Fi-Wi technology will find wide application in ocean exploration.

  15. Front end support systems for the Advanced Photon Source

    International Nuclear Information System (INIS)

    Barraza, J.; Shu, D.; Kuzay, T.M.

    1993-01-01

    The support system designs for the Advanced Photon Source (APS) front ends are complete and will be installed in 1994. These designs satisfy the positioning and alignment requirements of the front end components installed inside the storage ring tunnel, including the photon beam position monitors, fixed masks, photon and safety shutters, filters, windows, and differential pumps. Other components include beam transport pipes and ion pumps. The designs comprise 3-point kinematic mounts and single axis supports to satisfy various multi-direction positioning requirements from course to ultra-precise. The confined space inside the storage ring tunnel has posed engineering challenges in the design of these devices, considering some components weigh as much as 500 kg. These challenges include designing for mobility during commissioning and initial alignment, mechanical and thermal stability, and precise low profile vertical and horizontal positioning. As a result, novel stages and kinematic mounts have emerged with modular and standard designs. This paper will discuss the diverse group of support systems, including specifications and performance data of the prototypes

  16. TDC for the front end architecture in the PANDA MVD

    Energy Technology Data Exchange (ETDEWEB)

    Riccardi, Alberto; Brinkmann, Kai Thomas; Di Pietro, Valentino [II Physikalisches Institut Justus-Liebig-Universitaet Giessen, Giessen (Germany); Garbolino, Sara; Rivetti, Angelo; Rolo, Manuel [INFN Sezione di Torino, Torino (Italy); Collaboration: PANDA-Collaboration

    2014-07-01

    In nuclear detectors the information on the energy of the particle is usually obtained by measuring the amplitude of the signal delivered by the sensor. The low voltage power supply used in modern deep submicron technologies constrains the maximum dynamic range of the ADC. So we can obtain the energy information with time-based techniques, in which the energy is associated with the duration of the signal through the Time over Threshold method. This work is focused on the PANDA Micro Vertex Detector and explores the possibility of applying a time-based readout approach for the microstrip sensors. In PANDA, the strip system must cope with hit rates up to 50 kHz per channel. Therefore, the front-end output must be relatively short. This implies that the clock resolution is not enough to measure the signal duration, so it is necessary to use a Time to Digital Converter. The front-end and the TDC structure are designed in a 0.11μm CMOS process. The TDC chosen is based on an analog clock interpolator because it combines good time resolution with a fairly simple implementation and low power consumption. In the presentation the architectures are described and the challenges associated to its implementation discussed.

  17. FRONT-END ASIC FOR A SILICON COMPTON TELESCOPE.

    Energy Technology Data Exchange (ETDEWEB)

    DE GERONIMO,G.; FRIED, J.; FROST, E.; PHLIPS, B.; VERNON, E.; WULF, E.A.

    2007-10-27

    We describe a front-end application specific integrated circuit (ASIC) developed for a silicon Compton telescope. Composed of 32 channels, it reads out signals in both polarities from each side of a Silicon strip sensor, 2 mm thick 27 cm long, characterized by a strip capacitance of 30 pF. Each front-end channel provides low-noise charge amplification, shaping with a stabilized baseline, discrimination, and peak detection with an analog memory. The channels can process events simultaneously, and the read out is sparsified. The charge amplifier makes uses a dual-cascode configuration and dual-polarity adaptive reset, The low-hysteresis discriminator and the multi-phase peak detector process signals with a dynamic range in excess of four hundred. An equivalent noise charge (ENC) below 200 electrons was measured at 30 pF, with a slope of about 4.5 electrons/pF at a peaking time of 4 {micro}s. With a total dissipated power of 5 mW the channel covers an energy range up to 3.2 MeV.

  18. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Science.gov (United States)

    2010-07-01

    ... § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process vents... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Batch front-end process vents-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY...

  19. Managing Front-End Innovation through Idea Markets at Novozymes

    DEFF Research Database (Denmark)

    Lauto, Giancarlo; Valentin, Finn; Hatzack, Frank

    2013-01-01

    Online collaboration is a powerful tool for boosting idea generation in large corporations. However, management may experience an overload of proposals from employees. To improve front-end innovation, the Danish industrial biotech company Novozymes implemented an internal idea competition in which...... a relatively small number of highly motivated participants screened their colleagues' inventions through an "idea market." The idea competition fulfilled its goals of generating two ideas with high growth potential within a short time, uncovering and recombining old proposals that inventors had not previously...... been able to advance in the organization and focusing managerial attention on the selection process. The campaign is an effective tool to recombine existing knowledge that had not been utilized. The process demonstrated that asking participants to comment on proposals improves idea generation...

  20. The Role of Devices in Staging Front End Innovation

    DEFF Research Database (Denmark)

    Clausen, Christian; Yoshinaka, Yutaka

    2009-01-01

    and parcel of the innovative process. The paper is grounded empirically in insight derived from industry practices and compares practices to current literature on the manage-ment of innovation, which portray Front End In-novation as a mere process of search and selection of product ideas. The paper examines...... into realisations. Inputs from different knowledge domains must be grappled with, both in terms of needing to be elucidated as well as synthesized, in the engineering design process. The paper argues that the existing research may be seen as a response to perceived difficulties in dealing with uncertain conditions...... or market and technological opportunities in the innovative process. In this respect, models are not neutral but offer certain framings, contribute translations and act as sensemaking devices....

  1. Front-end readout system for PHENIX RICH

    International Nuclear Information System (INIS)

    Tanaka, Y.; Hara, H.; Ebisu, K.; Hibino, M.; Kametani, S.; Kikuchi, J.; Wintenberg, A.L.; Walker, J.W.; Franck, S.; Moscone, C.; Jones, J.P.; Young, G.R.; Matsumoto, T.; Sakaguchi, T.; Oyama, K.; Hamagaki, H.

    2000-01-01

    A front-end readout system with a custom backplane and custom circuit modules has been developed for the RICH subsystem of the PHENIX experiment. The design specifications and test results of the backplane and the modules are presented in this paper. In the module design, flexibility for modification is maximized through the use of Complex Programmable Logic Devices. In the backplane design, a source-synchronous bus architecture is adopted for the data and control bus. The transfer speed of the backplane has reached 640 Mbyte/s with a 128-bit data bus. Total transaction time is estimated to be less than 30 μs per event when this system is used in the experiment. This result indicates that the performance satisfies the data-rate requirement of the PHENIX experiment

  2. Shielding design for the front end of the CERN SPL.

    Science.gov (United States)

    Magistris, Matteo; Silari, Marco; Vincke, Helmut

    2005-01-01

    CERN is designing a 2.2-GeV Superconducting Proton Linac (SPL) with a beam power of 4 MW, to be used for the production of a neutrino superbeam. The SPL front end will initially accelerate 2 x 10(14) negative hydrogen ions per second up to an energy of 120 MeV. The FLUKA Monte Carlo code was employed for shielding design. The proposed shielding is a combined iron-concrete structure, which also takes into consideration the required RF wave-guide ducts and access labyrinths to the machine. Two beam-loss scenarios were investigated: (1) constant beam loss of 1 Wm(-1) over the whole accelerator length and (2) full beam loss occurring at various locations. A comparison with results based on simplified approaches is also presented.

  3. PMF: The front end electronic of the ALFA detector

    Energy Technology Data Exchange (ETDEWEB)

    Barrillon, P., E-mail: barrillo@lal.in2p3.f [Laboratoire de l' Accelerateur Lineaire, 91898 Orsay (France); Blin, S.; Cheikali, C.; Cuisy, D.; Gaspard, M.; Fournier, D.; Heller, M. [Laboratoire de l' Accelerateur Lineaire, 91898 Orsay (France); Iwanski, W. [Institute of Nuclear Physics PAN, Radzikowskiego 152, 31-342 Cracow (Poland); Lavigne, B.; De la Taille, C.; Puzo, P.; Socha, J-L. [Laboratoire de l' Accelerateur Lineaire, 91898 Orsay (France)

    2010-11-01

    The front end electronic (PMF) of the future ATLAS luminometer is described here. It is composed of a MAPMT and a compact stack of three PCBs, which deliver high voltage, route and read out of the output signals. The third board contains an FPGA and MAROC, a 64-channel ASIC, which can correct the non-uniformity of the MAPMT channels gain, thanks to a variable gain preamplifier. Its main role is to shape and discriminate the input signals at 1/3 photo-electron and produce 64 trigger outputs. Laboratory tests performed on prototype and pre-series PMFs have showed performances in good agreement with the requirements and have fulfilled the approval criteria for the final production of all elements.

  4. PMF: the front end electronic of the ALFA detector

    CERN Document Server

    Barrillon, P; Cheikali, C; Cuisy, D; Gaspard, M; Fournier, D; Heller, M; Iwanski, W; Lavigne, B; de La Taille, C; Puzo, P; Socha, J-L

    2010-01-01

    The front end electronic (PMF) of the future ATLAS luminometer is described here. It is composed of a MAPMT and a compact stack of three PCBs, which deliver high voltage, route and read out of the output signals. The third board contains an FPGA and MAROC, a 64-channel ASIC, which can correct the non-uniformity of the MAPMT channels gain, thanks to a variable gain preamplifier. Its main role is to shape and discriminate the input signals at 1/3 photo-electron and produce 64 trigger outputs. Laboratory tests performed on prototype and pre-series PMFs have showed performances in good agreement with the requirements and have fulfilled the approval criteria for the final production of all elements.

  5. Front-end electronics for H.E.P

    International Nuclear Information System (INIS)

    Hrisoho, A.

    1990-07-01

    A simplified description of the front-end electronics used for High Energy Physics Detectors is given. A brief analysis of the speed limitation due to the time necessary for the detector charge transfer is given, which depends as well of the detector behaviour as of the preamplifier configuration. A description of the sample electronic circuits like differentiation, integration, pole zero circuit and preamplifier are given. Noise analysis is carried out to derive the relations for the equivalent noise signal for the measuring device with some description of practical noise measuring. The shaping of the signals to obtain an optimization for the noise is considered and some hints for shaping amplifier design, with a description of the noise weightling function for normal and time variant shaping are given

  6. Gravitational Reference Sensor Front-End Electronics Simulator for LISA

    International Nuclear Information System (INIS)

    Meshksar, Neda; Ferraioli, Luigi; Mance, Davor; Zweifel, Peter; Giardini, Domenico; Ten Pierick, Jan

    2017-01-01

    At the ETH Zurich we are developing a modular simulator that provides a realistic simulation of the Front End Electronics (FEE) for LISA Gravitational Reference Sensor (GRS). It is based on the GRS FEE-simulator already implemented for LISA Pathfinder. It considers, in particular, the non-linearity and the critical details of hardware, such as the non-linear multiplicative noise caused by voltage reference instability, test mass charging and detailed actuation and sensing algorithms. We present the simulation modules, considering the above-mentioned features. Based on the ETH GRS FEE-simulator for LISA Pathfinder we aim to develop a modular simulator that provides a realistic simulation of GRS FEE for LISA. (paper)

  7. Electronic front-end for LHCb electromagnetic and hadronic calorimeters

    International Nuclear Information System (INIS)

    Beigbeder, Ch.

    2000-11-01

    The electronic front-end of the LHCb electromagnetic and hadronic calorimeters will be described. It consists of a 9U 32 channel board, each channel including shaper-integrator, 12 bit ADC and look-up tables allowing to code the transverse energy information both for readout and for the Level 0 trigger. The readout information is stored in a fixed latency followed by a derandomizer. The trigger information is processed further on the board by FPGA, performing channel addition and comparison to extract the highest transverse energy local cluster for further processing. The system is fully synchronous and allows to extract candidates for calorimetric trigger at every 40 MHz clock cycle. The operation and characteristics (noise, linearity etc.) of a prototype board will be described. (author)

  8. Cryogenic receiver front-end with sharp skirt characteristics

    Energy Technology Data Exchange (ETDEWEB)

    Narahashi, S [RF Technology Laboratory, Wireless Laboratories, NTT DoCoMo, Inc, Yokosuka, Kanagawa 239-8536 (Japan); Satoh, K [RF Technology Laboratory, Wireless Laboratories, NTT DoCoMo, Inc, Yokosuka, Kanagawa 239-8536 (Japan); Kawai, K [RF Technology Laboratory, Wireless Laboratories, NTT DoCoMo, Inc, Yokosuka, Kanagawa 239-8536 (Japan); Koizumi, D [RF Technology Laboratory, Wireless Laboratories, NTT DoCoMo, Inc, Yokosuka, Kanagawa 239-8536 (Japan); Nojima, T [Graduate School of Information Science and Technology, Hokkaido University, Sapporo, Hokkaido 060-0808 (Japan)

    2006-05-15

    This paper presents an experimental cryogenic receiver front-end (CRFE) with sharp skirt characteristics for mobile base stations. The CRFE comprises a high-temperature superconducting filter, a cryogenic low-noise amplifier, and a highly reliable cryostat that is very compact. The major characteristics of the proposed CRFE measured at 70 K are a centre frequency of 1.95 GHz, passband width of 20 MHz, sharp selectivity of 20 dB/100 kHz, 1.4 dB ripple, 31.3 dB average passband gain, and average passband equivalent noise temperature of 47.9 K. The CRFE weighs 19 kg and occupies 35 l. Random failure of the cryostat is also evaluated by a continuous operation test using four identical ones simultaneously. The cryostat used in the CRFE has a high reliability level of over five years of continuous maintenance-free operation.

  9. Highly integrated front-end electronics for spaceborne fluxgate sensors

    International Nuclear Information System (INIS)

    Magnes, W; Valavanoglou, A; Hagen, C; Jernej, I; Baumjohann, W; Oberst, M; Hauer, H; Neubauer, H; Pierce, D; Means, J; Falkner, P

    2008-01-01

    Scientific instruments for challenging and cost-optimized space missions have to reduce their resource requirements while keeping the high performance levels of conventional instruments. In this context the development of an instrument front-end ASIC (0.35 µm CMOS from austriamicrosystems) for magnetic field sensors based on the fluxgate principle was undertaken. It is based on the combination of the conventional readout electronics of a fluxgate magnetometer with the control loop of a sigma-delta modulator for a direct digitization of the magnetic field. The analogue part is based on a modified 2–2 cascaded sigma-delta modulator. The digital part includes a primary (128 Hz output) and secondary decimation filter (2, 4, 8,..., 64 Hz output) as well as a serial synchronous interface. The chip area is 20 mm 2 and the total power consumption is 60 mW. It has been demonstrated that the overall functionality and performance of the magnetometer front-end ASIC (MFA) is sufficient for scientific applications in space. Noise performance (SNR of 89 dB with a bandwidth of 30 Hz) and offset stability ( −1 MFA temperature, −1 is acceptable. Only a cross-tone phenomenon must be avoided in future designs even though it is possible to mitigate the effect to a level that is tolerable. The MFA stays within its parameters up to 170 krad of total ionizing dose and it keeps full functionality up to more than 300 krad. The threshold for latch-ups is 14 MeV cm 2 mg −1

  10. A software-radio front-end for microwave applications

    Directory of Open Access Journals (Sweden)

    M. Streifinger

    2003-01-01

    Full Text Available In modern communication, sensor and signal processing systems digitisation methods are gaining importance. They allow for building software configurable systems and provide better stability and reproducibility. Moreover digital front-ends cover a wider range of applications and have better performance compared with analog ones. The quest for new architectures in radio frequency front-ends is a clear consequence of the ever increasing number of different standards and the resulting task to provide a platform which covers as many standards as possible. At microwave frequencies, in particular at frequencies beyond 10 GHz, no direct sampling receivers are available yet. A look at the roadmap of the development of commercial analog-to-digital-converters (ADC shows clearly, that they can neither be expected in near future. We present a novel architecture, which is capable of direct sampling of band-limited signals at frequencies beyond 10 GHz by means of an over-sampling technique. The wellknown Nyquist criterion states that wide-band digitisation of an RF-signal with a maximum frequency ƒ requires a minimum sampling rate of 2 · ƒ . But for a band-limited signal of bandwidth B the demands for the minimum sampling rate of the ADC relax to the value 2 · B. Employing a noise-forming sigma-delta ADC architecture even with a 1-bit-ADC a signal-to-noise ratio sufficient for many applications can be achieved. The key component of this architecture is the sample-and-hold switch. The required bandwidth of this switch must be well above 2 · ƒ . We designed, fabricated and characterized a preliminary demonstrator for the ISM-band at 2.4 GHz employing silicon Schottky diodes as a switch and SiGe-based MMICs as impedance transformers and comparators. Simulated and measured results will be presented.

  11. Storing biomass in round bales

    Energy Technology Data Exchange (ETDEWEB)

    Summer, H.R.; Hellwig, R.E.; Monroe, G.E.

    1984-09-01

    Biomass fuels, in the form of crop residues, were stored outside in large round bales. The influence of rainfall on bale mass and the change in apparent average moisture content (A.A.M.C) was studied. Covering the bales with large sheets of polyethylene was found to be the most effective way of reducing moisture penetration.

  12. Compact Receiver Front Ends for Submillimeter-Wave Applications

    Science.gov (United States)

    Mehdi, Imran; Chattopadhyay, Goutam; Schlecht, Erich T.; Lin, Robert H.; Sin, Seth; Peralta, Alejandro; Lee, Choonsup; Gill, John J.; Gulkis, Samuel; Thomas, Bertrand C.

    2012-01-01

    The current generation of submillimeter-wave instruments is relatively mass and power-hungry. The receiver front ends (RFEs) of a submillimeter instrument form the heart of the instrument, and any mass reduction achieved in this subsystem is propagated through the instrument. In the current implementation, the RFE consists of different blocks for the mixer and LO circuits. The motivation for this work is to reduce the mass of the RFE by integrating the mixer and LO circuits in one waveguide block. The mixer and its associated LO chips will all be packaged in a single waveguide package. This will reduce the mass of the RFE and also provide a number of other advantages. By bringing the mixer and LO circuits close together, losses in the waveguide will be reduced. Moreover, the compact nature of the block will allow for better thermal control of the block, which is important in order to reduce gain fluctuations. A single waveguide block with a 600- GHz RFE functionality (based on a subharmonically pumped Schottky diode pair) has been demonstrated. The block is about 3x3x3 cubic centimeters. The block combines the mixer and multiplier chip in a single package. 3D electromagnetic simulations were carried out to design the waveguide circuit around the mixer and multiplier chip. The circuit is optimized to provide maximum output power and maximum bandwidth. An integrated submillimeter front end featuring a 520-600-GHz sub-harmonic mixer and a 260-300-GHz frequency tripler in a single cavity was tested. Both devices used GaAs MMIC membrane planar Schottky diode technology. The sub-harmonic mixer/tripler circuit has been tested using conventional metal-machined blocks. Measurement results on the metal block give best DSB (double sideband) mixer noise temperature of 2,360 K and conversion losses of 7.7 dB at 520 GHz. The LO input power required to pump the integrated tripler/sub-harmonic mixer is between 30 and 50 mW.

  13. Toward 5G software defined radio receiver front-ends

    CERN Document Server

    Spiridon, Silvian

    2016-01-01

    This book introduces a new intuitive design methodology for the optimal design path for next-generation software defined radio front-ends (SDRXs). The methodology described empowers designers to "attack" the multi-standard environment in a parallel way rather than serially, providing a critical tool for any design methodology targeting 5G circuits and systems. Throughout the book the SDRX design follows the key wireless standards of the moment (i.e., GSM, WCDMA, LTE, Bluetooth, WLAN), since a receiver compatible with these standards is the most likely candidate for the first design iteration in a 5G deployment. The author explains the fundamental choice the designer has to make regarding the optimal channel selection: how much of the blockers/interferers will be filtered in the analog domain and how much will remain to be filtered in the digital domain. The system-level analysis the author describes entails the direct sampling architecture is treated as a particular case of mixer-based direct conversion archi...

  14. Front-end electronics for the Muon Portal project

    Energy Technology Data Exchange (ETDEWEB)

    Garozzo, S.; Marano, D.; Bonanno, G.; Grillo, A.; Romeo, G.; Timpanaro, M.C. [INAF, Osservatorio Astrofisico di Catania, Via S. Sofia 78, I-95123 Catania (Italy); Lo Presti, D.; Riggi, F.; Russo, V.; Bonanno, D.; La Rocca, P.; Longhitano, F.; Bongiovanni, D.G. [Università di Catania, Dipartimento di Fisica e Astronomia, and INFN, Sezione di Catania, Via S. Sofia 64, I-95123 Catania (Italy); Fallica, G.; Valvo, G. [ST-Microelectronics, Stradale V Primosole 50, Catania (Italy)

    2016-10-11

    The Muon Portal Project was born as a joint initiative between Italian research and industrial partners, aimed at the construction of a real-size working detector prototype to inspect the content of traveling containers by means of secondary cosmic-ray muon radiation and recognize potentially dangerous hidden materials. The tomographic image is obtained by reconstructing the incoming and outgoing muon trajectories when crossing the inspected volume, employing two tracker planes located above and below the container under inspection. In this paper, the design and development of the front-end electronics of the Muon Portal detector is presented, with particular emphasis being devoted to the photo-sensor devices detecting the scintillation light and to the read-out circuitry which is in charge of processing and digitizing the analog pulse signals. In addition, the remote control system, mechanical housing, and thermal cooling system of all structural blocks of the Muon Portal tracker are also discussed, demonstrating the effectiveness and functionality of the adopted design.

  15. Neural networks in front-end processing and control

    International Nuclear Information System (INIS)

    Lister, J.B.; Schnurrenberger, H.; Staeheli, N.; Stockhammer, N.; Duperrex, P.A.; Moret, J.M.

    1992-01-01

    Research into neural networks has gained a large following in recent years. In spite of the long term timescale of this Artificial Intelligence research, the tools which the community is developing can already find useful applications to real practical problems in experimental research. One of the main advantages of the parallel algorithms being developed in AI is the structural simplicity of the required hardware implementation, and the simple nature of the calculations involved. This makes these techniques ideal for problems in which both speed and data volume reduction are important, the case for most front-end processing tasks. In this paper the authors illustrate the use of a particular neural network known as the Multi-Layer Perceptron as a method for solving several different tasks, all drawn from the field of Tokamak research. The authors also briefly discuss the use of the Multi-Layer Perceptron as a non-linear controller in a feedback loop. The authors outline the type of problem which can be usefully addressed by these techniques, even before the large-scale parallel processing hardware currently under development becomes cheaply available. The authors also present some of the difficulties encountered in applying these networks

  16. Results of the SNS front end commissioning at Berkeley Lab

    International Nuclear Information System (INIS)

    Ratti, A.; Ayers, J.J.; Doolittle, L.; Greer, J.B.; Keller, R.; Lewis, S.; Lionberger, C.; Monroy, M.; Pruyn, J.; Staples, J.W.; Syversrude, D.; Thomae, R.; Virostek, S.; Aleksandrov, A.; Shea, T.; SNS Accelerator Physics Group; SNS Beam Diagnostics Collaboration

    2002-01-01

    The Front-End Systems (FES) for the Spallation Neutron Source (SNS) project comprise an rf-driven H - ion source, an electrostatic 2-lens LEBT, a 2.5 MeV RFQ, followed by a 14-quadrupole, 4-rebuncher MEBT including traveling-wave fast choppers. The nominal 2.5 MeV H - beam has a current of 38 mA at a repetition rate of 60 Hz and 1 ms pulse length, for a macro duty-factor of 6%, and is chopped at a rate of approximately 1 MHz with a mini duty-factor of 68%. The normalized rms beam emittance at the MEBT exit, matching the first tank of a 402.5 MHz Alvarez linac, is measured to be approximately 0.3 π mm mrad. Diagnostic elements include wire scanners, BPMs, fast current monitors, a slit-harp emittance device and RFQ field monitoring probes. The results of the beam commissioning and the operation of the RFQ and diagnostic instrumentation are reported. The entire FES was shut down at LBNL at the end of May 2002 and will be recommissioned at ORNL prior to installation of the drift-tube linac

  17. Front-end electronics and trigger systems - status and challenges

    International Nuclear Information System (INIS)

    Spieler, Helmuth G; Spieler, Helmuth G

    2007-01-01

    The past quarter century has brought about a revolution in front-end electronics for large-scale detector systems. Custom integrated circuits specifically tailored to the requirements of large detector systems have provided unprecedented performance and enabled systems that once were deemed impossible. The evolution of integrated circuit readouts in strip detectors is summarized, the present status described, and challenges posed by the sLHC and ILC are discussed. Performance requirements increase, but key considerations remain as in the past: power dissipation, material, and services. Smaller CMOS feature sizes will not provide the required electronic noise at lower power, but will improve digital power efficiency. Significant improvements appear to be practical in more efficient power distribution. Enhanced digital electronics have provided powerful trigger processors that greatly improve the trigger efficiency. In data readout systems they also improve data throughput, while reducing power requirements. Concurrently with new developments in high energy physics, detector systems for cosmology and astrophysics have made great strides. As an example, a large-scale readout for superconducting bolometer arrays is described

  18. Front end design of smartphone-based mobile health

    Science.gov (United States)

    Zhang, Changfan; He, Lingsong; Gao, Zhiqiang; Ling, Cong; Du, Jianhao

    2015-02-01

    Mobile health has been a new trend all over the world with the rapid development of intelligent terminals and mobile internet. It can help patients monitor health in-house and is convenient for doctors to diagnose remotely. Smart-phone-based mobile health has big advantages in cost and data sharing. Front end design of it mainly focuses on two points: one is implementation of medical sensors aimed at measuring kinds of medical signal; another is acquisition of medical signal from sensors to smart phone. In this paper, the above two aspects were both discussed. First, medical sensor implementation was proposed to refer to mature measurement solutions with ECG (electrocardiograph) sensor design taken for example. And integrated chip using can simplify design. Then second, typical data acquisition architecture of smart phones, namely Bluetooth and MIC (microphone)-based architecture, were compared. Bluetooth architecture should be equipped with an acquisition card; MIC design uses sound card of smart phone instead. Smartphone-based virtual instrument app design corresponding to above acquisition architecture was discussed. In experiments, Bluetooth and MIC architecture were used to acquire blood pressure and ECG data respectively. The results showed that Bluetooth design can guarantee high accuracy during the acquisition and transmission process, and MIC design is competitive because of low cost and convenience.

  19. Solid-State Photomultiplier with Integrated Front End Electronics

    Science.gov (United States)

    Christian, James; Stapels, Christopher; Johnson, Erik; Mukhopadhyay, Sharmistha; Jie Chen, Xiao; Miskimen, Rory

    2009-10-01

    The instrumentation cost of physics experiments has been reduced per channel, by the use of solid-state detectors, but these cost-effective techniques have not been translated to scintillation-based detectors. When considering photodetectors, the cost per channel is determined by the use of high-voltage, analog-to-digital converters, BNC cables, and any other ancillary devices. The overhead associated with device operation limits the number of channels for the detector system, while potentially limiting the scope of physics that can be explored. The PRIMEX experiment at JLab, which is being designed to measure the radiative widths of the η and η' pseudo-scalar mesons for a more comprehensive understanding of QCD at low energies, is an example where CMOS solid-state photomultipliers (SSPMs) can be implemented. The ubiquitous nature of CMOS allows for on-chip signal processing to provide front-end electronics within the detector package. We present the results of the device development for the PRIMEX calorimeter, discussing the characteristics of SSPMs, the potential cost savings, and experimental results of on-chip signal processing.

  20. Neural networks in front-end processing and control

    International Nuclear Information System (INIS)

    Lister, J.B.; Schnurrenberger, H.; Staeheli, N.; Stockhammer, N.; Duperrex, P.A.; Moret, J.M.

    1991-07-01

    Research into neural networks has gained a large following in recent years. In spite of the long term timescale of this Artificial Intelligence research, the tools which the community is developing can already find useful applications to real practical problems in experimental research. One of the main advantages of the parallel algorithms being developed in AI is the structural simplicity of the required hardware implementation, and the simple nature of the calculations involved. This makes these techniques ideal for problems in which both speed and data volume reduction are important, the case for most front-end processing tasks. In this paper we illustrate the use of a particular neural network known as the Multi-Layer Perceptron as a method for solving several different tasks, all drawn from the field of Tokamak research. We also briefly discuss the use of the Multi-Layer Perceptron as a non-linear controller in a feedback loop. We outline the type of problem which can be usefully addressed by these techniques, even before the large-scale parallel processing hardware currently under development becomes cheaply available. We also present some of the difficulties encountered in applying these networks. (author) 13 figs., 9 refs

  1. Front-end electronics for the ALICE calorimeters

    CERN Document Server

    Wang, Ya-Ping; Muller, Hans; Cai, Xu; Zhou, Daicui; Yin, Zhong-Bao; Awes, Terry C.; Wang, Dong

    2010-01-01

    The ALICE calorimeters PHOS and EMCal are based on Avalanche Photo-Diode (APD) photosensors with Charge Sensitive Preamplifiers (CSP) for readout of the scintillating elements. The amplified signals are read out via 32-channel shaper/digitizer front-end electronics (FEE) with 14-bit effective dynamic range. The electronics is based on second order shapers with dual gain for each channel, getting digitized by ALTRO chips. Each APD channel is equipped with an individual 10-bit APD gain adjustment and 2×2 channel clusters generate a 100 ns shaped analog sums output (Fast OR) for the associated Trigger Region Units (TRU). The Fast OR signals are generated by first order shapers with a dynamic range of 12-bit given by the ADC in the TRU cards. Board controller firmware in the FPGA provides local monitoring and configuration of all parameters via the ALICE DCS system. The signal to noise ratio for MIP at 215 MeV is not, vert, similar7 per channel with a noise level of 30 MeV at room temperature for a dynamic range...

  2. The LHCb front-end electronics and data acquisition system

    CERN Document Server

    Jost, B

    2000-01-01

    The LHCb experiment is the most recently approved of the four experiments under construction at CERN's LHC accelerator. It is a special purpose experiment designed to precisely measure the CP violation parameters in the B-B system and to study rare B-decays. Triggering poses special problems since the interesting events containing B-mesons are immersed in a large background of inelastic p-p reactions. We therefore decided to implement a four-level triggering scheme. The LHCb data acquisition (DAQ) system will have to cope with an average trigger rate of 40 kHz, after two levels of hardware triggers, and an average event size of 100 kB. Thus, an event-building network which can sustain an average bandwidth of 4 GB /s is required. A powerful software trigger farm will have to be installed to reduce the rate from 40 kHz to 100 Hz of events written for permanent storage. In this paper we will outline the general architectures of the front-end electronics and of the trigger and DAQ system and the readout protocols...

  3. Fiber laser front end for high energy petawatt laser systems

    International Nuclear Information System (INIS)

    Dawson, J W; Messerly, M J; Phan, H; Mitchell, S; Drobshoff, A; Beach, R J; Siders, C; Lucianetti, A; Crane, J K; Barty, C J

    2006-01-01

    We are developing a fiber laser front end suitable for high energy petawatt laser systems on large glass lasers such as NIF. The front end includes generation of the pulses in a fiber mode-locked oscillator, amplification and pulse cleaning, stretching of the pulses to >3ns, dispersion trimming, timing, fiber transport of the pulses to the main laser bay and amplification of the pulses to an injection energy of 150 (micro)J. We will discuss current status of our work including data from packaged components. Design detail such as how the system addresses pulse contrast, dispersion trimming and pulse width adjustment and impact of B-integral on the pulse amplification will be discussed. A schematic of the fiber laser system we are constructing is shown in figure 1 below. A 40MHz packaged mode-locked fiber oscillator produces ∼1nJ pulses which are phase locked to a 10MHz reference clock. These pulses are down selected to 100kHz and then amplified while still compressed. The amplified compressed pulses are sent through a non-linear polarization rotation based pulse cleaner to remove background amplified spontaneous emission (ASE). The pulses are then stretched by a chirped fiber Bragg grating (CFBG) and then sent through a splitter. The splitter splits the signal into two beams. (From this point we follow only one beam as the other follows an identical path.) The pulses are sent through a pulse tweaker that trims dispersion imbalances between the final large optics compressor and the CFBG. The pulse tweaker also permits the dispersion of the system to be adjusted for the purpose of controlling the final pulse width. Fine scale timing between the two beam lines can also be adjusted in the tweaker. A large mode area photonic crystal single polarization fiber is used to transport the pulses from the master oscillator room to the main laser bay. The pulses are then amplified a two stage fiber amplifier to 150mJ. These pulses are then launched into the main amplifier

  4. Realization of Miniaturized Multi-/Wideband Microwave Front-Ends

    Science.gov (United States)

    Al Shamaileh, Khair A.

    The ever-growing demand toward designing microwave front-end components with enhanced access to the radio spectrum (e.g., multi-/wideband functionality) and improved physical features (e.g., miniaturized circuitry, ease and cost of fabrication) is becoming more paramount than ever before. This dissertation proposes new design methodologies, simulations, and experimental validations of passive front-ends (i.e., antennas, couplers, dividers) at microwave frequencies. The presented design concepts optimize both electrical and physical characteristics without degrading the intended performance. The developed designs are essential to the upcoming wireless technologies. The first proposed component is a compact ultra-wideband (UWB) Wilkinson power divider (WPD). The design procedure is accomplished by replacing the uniform transmission lines in each arm of the conventional single-frequency divider with impedance-varying profiles governed by a truncated Fourier series. While such non-uniform transmission lines (NTLs) are obtained through the even-mode analysis, three isolation resistors are optimized in the odd-mode circuit to achieve proper isolation and output ports matching over the frequency range of interest. The proposed design methodology is systematic, and results in single-layered and compact structures. For verification purposes, an equal split WPD is designed, simulated, and measured. The obtained results show that the input and output ports matching as well as the isolation between the output ports are below --10 dB; whereas the transmission parameters vary between --3.2 dB and --5 dB across the 3.1--10.6 GHz band. The designed divider is expected to find applications in UWB antenna diversity, multiple-input-multiple-output (MIMO) schemes, and antenna arrays feeding networks. The second proposed component is a wideband multi-way Bagley power divider (BPD). Wideband functionality is achieved by replacing the single-frequency matching uniform microstrip lines in

  5. Sustainability in the front-end of innovation at design agencies

    NARCIS (Netherlands)

    Storaker, A.; Wever, R.; Dewulf, K.; Blankenburg, D.

    2013-01-01

    In the two last decades a considerable amount of research has been conducted on the Front End of Innovation. This is the stage of the product development process where the design brief is formulated. This phase is argued to be crucial to the success of the final product. While the Front End of

  6. Ultra-wideband wireless receiver front-end for high-speed indoor applications

    Directory of Open Access Journals (Sweden)

    Zhe-Yang Huang

    2014-12-01

    Full Text Available Low-noise, ultra-wideband (UWB wireless receiver front-end circuits were presented in this study. A two-stage common-source low-noise amplifier with wideband input impedance matching network, an active-balun and a double-balanced down-conversion mixer were adopted in the UWB wireless receiver front-end. The proposed wireless receiver front-end circuits were implemented in 0.18 μm radio-frequency-CMOS process. The maximum down-conversion power gain of the front-end is 25.8 dB; minimum single-sideband noise figure of the front-end is 4.9 dB over complete UWB band ranging from 3.1 to 10.6 GHz. Power consumption including buffers is 39.2 mW.

  7. Programmer's guide to FFE: a fast front-end data-acquisition program

    International Nuclear Information System (INIS)

    Million, D.L.

    1983-05-01

    The Large Coil Test Facility project of the Fusion Energy Division has a data acquisition system which includes a large host computer and several small, peripheral front-end computers. The front-end processors handle details of data acquisition under the control of the host and pass data back to the host for storage. Some of the front ends are known as fast front ends and are required to collect a maximum of 64,000 samples each second. This speed and other hardware constraints resulted in a need for a stand-alone, assembly language task which could be downline loaded from the host system into the fast front ends. FFE (Fast Front End) was written to satisfy this need. It was written in the PDP-11 MACRO-11 assembly language for an LSI-11/23 processor. After the host loads the task into the front end, it controls the data acquisition process with a series of commands and parameters. This Programmer's Guide describes the structure and operation of FFE in detail from a programming point of view. A companion User's guide provides more information on the use of the program from the host system

  8. Terahertz performance of quasioptical front-ends with a hotelectron bolometer

    International Nuclear Information System (INIS)

    Semenov, A; Richter, H; Guenther, B; Huebers, H-W; Karamarkovic, J

    2006-01-01

    We present terahertz performance of quasioptical front-ends consisting of a hotelectron bolometer imbedded in a planar feed antenna and integrated with an immersion lens. The impedance and radiation pattern of the log-spiral and double-slot planar feeds are evaluated using the method of moments; the collimating action of the lens is modelled using the physical optics. The total efficiency of the front-ends is computed taking into account frequency dependent impedance of the bolometer. Measured performance of the front-ends qualifies the simulation technique as a reliable tool for the design of terahertz receivers

  9. Wide-band low-noise distributed front-end for multi-gigabit CPFSK receivers

    DEFF Research Database (Denmark)

    Petersen, Anders Kongstad; Ebskamp, F; Pedersen, Rune Johan Skullerud

    1994-01-01

    In this paper a distributed optical front-end amplifier for a coherent optical CPFSK receiver is presented. The measured average input noise current density is 20 pA/√(Hz) in a 3-13 GHz bandwidth. This is the lowest value reported for a distributed optical front-end in this frequency range....... The front-end is tested in a system set-up at a bit rate of 2.5 Gbit/s and a receiver sensitivity of -41.5 dBm is achieved at a 10-9 bit error rate...

  10. A THEORETICAL MODEL OF SUPPORTING OPEN SOURCE FRONT END INNOVATION THROUGH IDEA MANAGEMENT

    DEFF Research Database (Denmark)

    Aagaard, Annabeth

    2013-01-01

    to overcome these various challenges companies are looking for new models to support FEI. This theoretical paper explores in what way idea management may be applied as a tool in facilitation of front end innovation and how this facilitation may be captured in a conceptual model. First, I show through...... a literature study, how idea management and front end innovation are related and how they may support each other. Secondly, I present a theoretical model of how idea management may be applied in support of the open source front end of new product innovations. Thirdly, I present different venues of further...... exploration of active facilitation of open source front end innovation through idea management....

  11. Single-current-sensor-based active front-end-converter-fed four ...

    Indian Academy of Sciences (India)

    Joseph Kiran Banda

    Keywords. Field-oriented control; vector control of induction motor; active front end converter; power factor correction .... sinusoidal three-phase input currents applied to the stator. ... with necessary feed-forward terms are employed to control.

  12. Front end designs for the 7-GeV advanced photon source

    International Nuclear Information System (INIS)

    Shu, D.; Barraza, J.; Sanchez, T.; Nielsen, R.W.; Collins, J.T.; Kuzay, T.M.

    1992-01-01

    The conceptual designs for the insertion device (ID) and bending magnet (BM) front ends have been completed for the 7-GeV Advanced Photon Source (APS) under construction at Argonne National Laboratory. These designs satisfy the generic front end functions. However, the high power and high heat fluxes imposed by the X-ray sources of the 7-GeV APS have presented various design engineering challenges for the front end. Consideration of such challenges and their solutions have led to novel and advanced features including modularized systems, enhanced heat transfer concepts in the fixed mask and the photon shutter designs, a radiation safety philosophy based on multiple photon shutters for a fail-safe operation, a sub-micron resolution beam position monitor for beam monitoring and ring feedback information, and minimal beam filtering concepts to deliver maximized beam power and spectra to the experimenters. The criteria and special features of the front end design are discussed in this paper

  13. A digital Front-End and Readout MIcrosystem for calorimetry at LHC

    CERN Multimedia

    2002-01-01

    % RD-16 A Digital Front-End and Readout Microsystem for Calorimetry at LHC \\\\ \\\\Front-end signal processing for calorimetric detectors is essential in order to achieve adequate selectivity in the trigger function of an LHC experiment, with data identification and compaction before readout being required in the harsh, high rate environment of a high luminosity hadron machine. Other crucial considerations are the extremely wide dynamic range and bandwidth requirements, as well as the volume of data to be transferred to following stages of the trigger and readout system. These requirements are best met by an early digitalization of the detector information, followed by integrated digital signal processing and buffering functions covering the trigger latencies.\\\\ \\\\The FERMI (Front-End Readout MIcrosystem) is a digital implementation of the front-end and readout electronic chain for calorimeters. It is based on dynamic range compression, high speed A to D converters, a fully programmable pipeline/digital filter c...

  14. RF Front End Based on MEMS Components for Miniaturized Digital EVA Radio, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — In this SBIR project, AlphaSense, Inc. and the Carnegie Mellon University propose to develop a RF receiver front end based on CMOS-MEMS components for miniaturized...

  15. Installation and testing of the 112 boards for the front-end electronics.

    CERN Multimedia

    2006-01-01

    Installation and testing of the 112 boards for the front-end electronics. 28 boards are interconnected to a TPC type Readout Controller Unit trought the horizontal bus strips. The blue tubes are for the circulating cooling water.

  16. Optical Parametric Chirped-Pulse Amplifier as the Front End for the OMEGA EP Laser Chain

    International Nuclear Information System (INIS)

    Bagnoud, V.; Begishev, I.A.; Guardalben, M.J.; Keegan, J.; Puth, J.; Waxer, L.J.; Zuegel, J.D.

    2004-01-01

    A 145-mJ optical parametric amplifier has been developed as a front-end source prototype for the OEMGA EP laser chain. The system definition is presented together with experimental results that show 30% conversion efficiency

  17. The Contribution of Innovation Strategy Development and Implementation in Active Facilitation of Pharmaceutical Front End Innovation

    DEFF Research Database (Denmark)

    Aagaard, Annabeth

    2012-01-01

    Front end innovation (FEI) represents the first building blocks of product development, but is often regarded as a weak link in innovation literature. Various theorists emphasize that a firm’s innovation can benefit substantially by improving the front end of innovation process (Reinertsen, 1999,......-oriented longitudinal case study of a Danish pharmaceutical company. The findings and key learnings from the study are presented as propositions of how innovation strategies can be applied to actively facilitate FEI and with measurable results.......Front end innovation (FEI) represents the first building blocks of product development, but is often regarded as a weak link in innovation literature. Various theorists emphasize that a firm’s innovation can benefit substantially by improving the front end of innovation process (Reinertsen, 1999...

  18. A high performance Front End Electronics for drift chamber readout in MEG experiment upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Chiarello, G. [Dipartimento di Matematica e Fisica “Ennio De Giorgi” – Universitá del Salento, Via Arnesano, Lecce (Italy); Istituto Nazionale di Fisica Nucleare Sez. Lecce, Via Arnesano, Lecce (Italy); Chiri, C.; Corvaglia, A.; Grancagnolo, F. [Istituto Nazionale di Fisica Nucleare Sez. Lecce, Via Arnesano, Lecce (Italy); Panareo, M. [Dipartimento di Matematica e Fisica “Ennio De Giorgi” – Universitá del Salento, Via Arnesano, Lecce (Italy); Istituto Nazionale di Fisica Nucleare Sez. Lecce, Via Arnesano, Lecce (Italy); Pepino, A., E-mail: aurora.pepino@le.infn.it [Dipartimento di Matematica e Fisica “Ennio De Giorgi” – Universitá del Salento, Via Arnesano, Lecce (Italy); Istituto Nazionale di Fisica Nucleare Sez. Lecce, Via Arnesano, Lecce (Italy); Pinto, C.; Tassielli, G. [Dipartimento di Matematica e Fisica “Ennio De Giorgi” – Universitá del Salento, Via Arnesano, Lecce (Italy); Istituto Nazionale di Fisica Nucleare Sez. Lecce, Via Arnesano, Lecce (Italy)

    2016-07-11

    Front End (FE) Electronics plays an essential role in Drift Chambers (DC) for time resolution and, therefore, spatial resolution. The use of cluster timing techniques, by measuring the timing of all the individual ionization clusters after the first one, may enable to reach resolutions even below 100 μm in the measurement of the impact parameter. To this purpose, a Front End Electronics with a wide bandwidth and low noise is mandatory in order to acquire and amplify the drift chamber signals.

  19. Front end embedded microprocessors in the JET computer-based control system, past, present and future

    International Nuclear Information System (INIS)

    Steed, C.A.; VanderBeken, H.; Browne, M.L.; Fullard, K.; Reed, K.; Tilley, M.; Schmidt, V.

    1987-01-01

    A brief history of the use of Front End Microprocessors in the JET Control and Data Acquisition System (CODAS) is presented. The present expansion in their use from 2 or 3 in 1983 to 27 now, is covered along with the reasoning behind their present usage. Finally, their future planned use in the area of remote handling is discussed and the authors present views on the use of front end processing in future large distributed control systems are presented

  20. A 500μW 5Mbps ULP super-regenerative RF front-end

    NARCIS (Netherlands)

    Vidojkovic, M.; Rampu, S.; Imamura, K.; Harpe, P.; Dolmans, G.; Groot, H. de

    2010-01-01

    This paper presents an ultra low power super-regenerative RF front-end for wireless body area network (WBAN) applications. The RF front-end operates in the 2.36-2.4 GHz medical BAN and 2.4-2.485 GHz ISM bands, and consumes 500 μW. It supports OOK modulation at high data rates ranging from 1-5 Mbps.

  1. Integrated X-band FMCW front-end in SiGe BiCMOS

    NARCIS (Netherlands)

    Suijker, Erwin; de Boer, Lex; Visser, Guido; van Dijk, Raymond; Poschmann, Michael; van Vliet, Frank Edward

    2010-01-01

    An integrated X-band FMCW front-end is reported. The front-end unites the core functionality of an FMCW transmitter and receiver in a 0.25 μm SiGe BiCMOS process. The chip integrates a PLL for the carrier generation, and single-side band and image-reject mixers for up- and down-conversion of the

  2. A study on the front-end VME system of BEPC II

    International Nuclear Information System (INIS)

    Wang Chunhong

    2004-01-01

    The front-end VME system is not only the heart of the control system, but also a real-time system. This paper describes the component of the front-end VME (Versa Module Eurocard) system including control computer and some related I/O modules. Particularly, the authors present a best solution for the problems about Vx-Works kernel and BSP running on MVME5100. This is a fundamental setup of the BEPC II control system. (author)

  3. The hybridized front end electronics of the Central Drift Chamber in the Stanford Linear Collider Detector

    International Nuclear Information System (INIS)

    Lo, C.C.; Kirsten, F.A.; Nakamura, M.

    1987-10-01

    In order to accommodate the high packaging density requirements for the front end electronics of the Central Drift Chamber (CDC) in the SLAC Linear Collider Detector (SLD), the CDC front end electronics has been hybridized. The hybrid package contains eight channels of amplifiers together with all the associated circuits for calibration, event recognition and power economy switching functions. A total of 1280 such hybrids are used in the CDC

  4. Radiological and environmental surveillance in front-end fuel cycle facilities

    International Nuclear Information System (INIS)

    Khan, A.H.; Sahoo, S.K.; Tripathi, R.M.

    2004-01-01

    This paper describes the occupational and environmental radiological safety measures associated with the operations of front end nuclear fuel cycle. Radiological monitoring in the facilities is important to ensure safe working environment, protection of workers against exposure to radiation and comply with regulatory limits of exposure. The radiation exposure of workers in different units of the front end nuclear fuels cycle facilities operated by IREL, UCIL and NFC and environmental monitoring results are summarised

  5. A high performance Front End Electronics for drift chamber readout in MEG experiment upgrade

    International Nuclear Information System (INIS)

    Chiarello, G.; Chiri, C.; Corvaglia, A.; Grancagnolo, F.; Panareo, M.; Pepino, A.; Pinto, C.; Tassielli, G.

    2016-01-01

    Front End (FE) Electronics plays an essential role in Drift Chambers (DC) for time resolution and, therefore, spatial resolution. The use of cluster timing techniques, by measuring the timing of all the individual ionization clusters after the first one, may enable to reach resolutions even below 100 μm in the measurement of the impact parameter. To this purpose, a Front End Electronics with a wide bandwidth and low noise is mandatory in order to acquire and amplify the drift chamber signals.

  6. General design of the layout for new undulator-only beamline front ends

    International Nuclear Information System (INIS)

    Shu Deming; Ramanathan, Mohan; Kuzay, Tuncer M.

    2001-01-01

    A great majority of the Advanced Photon Source (APS) users have chosen an undulator as the only source for their insertion device beamline. Compared with a wiggler source, the undulator source has a much smaller horizontal divergence, providing us with an opportunity to optimize the beamline front-end design further. In this paper, the particular designs and specifications, as well as the optical and bremsstrahlung ray-tracing analysis of the new APS front ends for undulator-only operation are presented

  7. Control and Interlocking System for Bending Magnet Front-end at Indus-2

    Science.gov (United States)

    Kane, Sanjeev R.; Garg, Chander Kant; Nandedkar, R. V.

    2007-01-01

    We present control and interlock system developed for Indus-2 bending magnet front-end. The paper describes in detail the control of various signals associated with the front-end and the interlocking scheme implemented for the installed front-end. The number of signals associated with each front-end is ˜ 75. A control system is designed for monitoring temperature, pressure, airflow, water flow and control of vacuum gauges, fast shutter, water cooled shutter, safety shutter, pneumatic gate valves, sputter ion pump power supplies, beam position monitor etc. Two independent signals are generated for critical components that are used for software interlock and hard-wired interlock. The front-end control system is VME based and window 2000/XP workstation as an operator console. The CPU used is Motorola 68000-processor board of the VME bus having OS-9 real time operating system. One VME crate serves a cluster of 2-3 front ends. The communication between the VME and the workstation is linked over RS232 serial communication. The sputter ion power supplies are connected over isolated RS485 network. Critical protection features are implemented so that no single failure can render the system unsafe. This is implemented by providing two independent chains of protection (1) Hard wired in which relay logic is used and (2) Software. A Graphical User Interface (GUI) is developed using Lab view Version 7.0.

  8. Control and Interlocking System for Bending Magnet Front-end at Indus-2

    International Nuclear Information System (INIS)

    Kane, Sanjeev R.; Garg, Chander Kant; Nandedkar, R. V.

    2007-01-01

    We present control and interlock system developed for Indus-2 bending magnet front-end. The paper describes in detail the control of various signals associated with the front-end and the interlocking scheme implemented for the installed front-end. The number of signals associated with each front-end is ∼ 75. A control system is designed for monitoring temperature, pressure, airflow, water flow and control of vacuum gauges, fast shutter, water cooled shutter, safety shutter, pneumatic gate valves, sputter ion pump power supplies, beam position monitor etc. Two independent signals are generated for critical components that are used for software interlock and hard-wired interlock. The front-end control system is VME based and window 2000/XP workstation as an operator console. The CPU used is Motorola 68000-processor board of the VME bus having OS-9 real time operating system. One VME crate serves a cluster of 2-3 front ends. The communication between the VME and the workstation is linked over RS232 serial communication. The sputter ion power supplies are connected over isolated RS485 network. Critical protection features are implemented so that no single failure can render the system unsafe. This is implemented by providing two independent chains of protection (1) Hard wired in which relay logic is used and (2) Software. A Graphical User Interface (GUI) is developed using Lab view Version 7.0

  9. Implementasi Analog Front End Pada Sensor Kapasitif Untuk Pengaturan Kelembaban Menggunakan Mikrokontroller STM32

    Directory of Open Access Journals (Sweden)

    Rendy Setiawan

    2017-01-01

    Full Text Available Sensor kapasitif merupakan jenis sensor yang mengubah stimulus fisik menjadi perubahan kapasitansi. Pada sensor kapasitif, adanya stray capacitance atau kapasitansi parasitik pada sensor dapat menyebabkan kesalahan dalam pengukuran. Dalam aplikasi pengaturan kelembaban, dibutuhkan sistem pengukuran kelembaban dengan kesalahan minimum untuk mendapatkan nilai setting point dengan galat minimum. Maka diperlukan implementasi analog front end yang dapat meminimalisir kesalahan akibat stray capacitance pada sensor kapasitif untuk pengukuran kelembaban relatif. Pada sistem pengukuran sensor kapasitif ini, sensor dieksitasi dengan sinyal AC yang dihasilkan oleh generator sinyal pada frekuensi 10 KHz, kemudian diimplementasikan analog front end untuk mengondisikan sinyal dari sensor. Keluaran dari analog front end dikonversi menjadi sinyal DC menggunakan demodulator sinkron dan filter low pass lalu dikonversi menjadi data digital menggunakan ADC di mikrokontroller STM32. Hasil pengukuran yang didapatkan dengan implementasi analog front end kemudian kemudian gunakan untuk mengatur kelembaban pada sebuah plant growth chamber. Berdasarkan hasil dari pengujian, rangkaian analog front end dapat mengompensasi stray capacitance dengan kesalahan pembacaan nilai kapasitansi maksimal sebesar 4.2% pada kondisi stray capacitance sebesar 236,6pF, 174,3pF dan 115,7pF. Implementasi analog front end pada pengaturan kelembaban menghasilkan galat pada setting point maksimal sebesar 8.8% untuk nilai RH 75% dan 33%.

  10. High Dynamic Range RF Front End with Noise Cancellation and Linearization for WiMAX Receivers

    Directory of Open Access Journals (Sweden)

    J.-M. Wu

    2012-06-01

    Full Text Available This research deals with verification of the high dynamic range for a heterodyne radio frequency (RF front end. A 2.6 GHz RF front end is designed and implemented in a hybrid microwave integrated circuit (HMIC for worldwide interoperability for microwave access (WiMAX receivers. The heterodyne RF front end consists of a low-noise amplifier (LNA with noise cancellation, an RF bandpass filter (BPF, a downconverter with linearization, and an intermediate frequency (IF BPF. A noise canceling technique used in the low-noise amplifier eliminates a thermal noise and then reduces the noise figure (NF of the RF front end by 0.9 dB. Use of a downconverter with diode linearizer also compensates for gain compression, which increases the input-referred third-order intercept point (IIP3 of the RF front end by 4.3 dB. The proposed method substantially increases the spurious-free dynamic range (DRf of the RF front end by 3.5 dB.

  11. Measures of the Environmental Footprint of the Front End of the Nuclear Fuel Cycle

    International Nuclear Information System (INIS)

    Carlsen, Brett; Tavrides, Emily; Schneider, Erich

    2010-01-01

    Previous estimates of environmental impacts associated with the front end of the nuclear fuel cycle have focused primarily on energy consumption and CO2 emissions. Results have varied widely. Section 2 of this report provides a summary of historical estimates. This study revises existing empirical correlations and their underlying assumptions to fit to a more complete set of existing data. This study also addresses land transformation, water withdrawals, and occupational and public health impacts associated with the processes of the front end of the once-through nuclear fuel cycle. These processes include uranium mining, milling, refining, conversion, enrichment, and fuel fabrication. Metrics are developed to allow environmental impacts to be summed across the full set of front end processes, including transportation and disposition of the resulting depleted uranium.

  12. Measures of the Environmental Footprint of the Front End of the Nuclear Fuel Cycle

    Energy Technology Data Exchange (ETDEWEB)

    Brett Carlsen; Emily Tavrides; Erich Schneider

    2010-08-01

    Previous estimates of environmental impacts associated with the front end of the nuclear fuel cycle have focused primarily on energy consumption and CO2 emissions. Results have varied widely. Section 2 of this report provides a summary of historical estimates. This study revises existing empirical correlations and their underlying assumptions to fit to a more complete set of existing data. This study also addresses land transformation, water withdrawals, and occupational and public health impacts associated with the processes of the front end of the once-through nuclear fuel cycle. These processes include uranium mining, milling, refining, conversion, enrichment, and fuel fabrication. Metrics are developed to allow environmental impacts to be summed across the full set of front end processes, including transportation and disposition of the resulting depleted uranium.

  13. Report on the value engineering workshop on APS beamline front ends

    International Nuclear Information System (INIS)

    Kuzay, T.

    1993-01-01

    A formal value engineering evaluation process was developed to address the front end components of the beamlines for the Advanced Photon Source (APS). This process (described in Section 2) involved an information phase, a creative phase, a judgment phase, a development phase, and a recommendation phase. Technical experts from other national laboratories and industry were invited to a two-day Value Engineering Workshop on November 5-6, 1992. The results of this Workshop are described in Section 4. Following the Workshop, various actions by the APS staff led to the redesign of the front end components, which are presented in Sections 5 and 6. The cost benefit analysis is presented in Section 7. It is important of realize that an added benefit of the Workshop was to obtain numerous design evaluations and enhancements of the front end components by experts in the field. As the design work proceeds to Title II completion, the APS staff is including many of these suggestions

  14. Trends in the design of front-end systems for room temperature solid state detectors

    International Nuclear Information System (INIS)

    Manfredi, Pier F.; Re, Valerio

    2003-01-01

    The paper discusses the present trends in the design of low-noise front-end systems for room temperature semiconductor detectors. The technological advancement provided by submicron CMOS and BiCMOS processes is examined from several points of view. The noise performances are a fundamental issue in most detector applications and suitable attention is devoted to them for the purpose of judging whether or not the present processes supersede the solutions featuring a field-effect transistor as a front-end element. However, other considerations are also important in judging how well a monolithic technology suits the front-end design. Among them, the way a technology lends itself to the realization of additional functions, for instance, the charge reset in a charge-sensitive loop or the time-variant filters featuring the special weighting functions that may be requested in some applications of CdTe or CZT detectors

  15. Measurement of Design Process Front-End – Radical Innovation Approach

    DEFF Research Database (Denmark)

    Berg, Pekka; Pihlajamaa, Jussi; Hansen, Poul H. Kyvsgård

    2014-01-01

    The overall structure and the main characteristics of the future product are all decided in the front-end phase, which then strongly affects subsequent new product development activities. Recent studies indicate that these early front-end activities represent the most troublesome phase...... of the innovation process, and at the same time one of the greatest opportunities to improve the overall innovation capability of a company. In this paper dealing with the criteria we concentrate only for the objectives viewpoint and leave the attributes discussion to the future research. Two most crucial questions...... the innovation activities front end contains five assessment viewpoints as follows; input, process, output (including impacts), social environment and structural environment. Based on the results from our first managerial implications in three Finnish manufacturing companies we argue, that the developed model...

  16. Analog front end circuit design of CSNS beam loss monitor system

    International Nuclear Information System (INIS)

    Xiao Shuai; Guo Xian; Tian Jianmin; Zeng Lei; Xu Taoguang; Fu Shinian

    2013-01-01

    The China Spallation Neutron Source (CSNS) beam loss monitor system uses gas ionization chamber to detect beam losses. The output signals from ionization chamber need to be processed in the analog front end circuit, which has been designed and developed independently. The way of transimpedance amplifier was used to achieve current-voltage (I-V) conversion measurement of signal with low repetition rate, low duty cycle and low amplitude. The analog front end circuit also realized rapid response to the larger beam loss in order to protect the safe operation of the accelerator equipment. The testing results show that the analog front end circuit meets the requirements of beam loss monitor system. (authors)

  17. Vacuum tests of a beamline front-end mock-up at the Advanced Photon Source

    International Nuclear Information System (INIS)

    Liu, C.; Nielsen, R.W.; Kruy, T.L.; Shu, D.; Kuzay, T.M.

    1994-01-01

    A-mock-up has been constructed to test the functioning and performance of the Advanced Photon Source (APS) front ends. The mock-up consists of all components of the APS insertion-device beamline front end with a differential pumping system. Primary vacuum tests have been performed and compared with finite element vacuum calculations. Pressure distribution measurements using controlled leaks demonstrate a better than four decades of pressure difference between the two ends of the mock-up. The measured pressure profiles are consistent with results of finite element analyses of the system. The safety-control systems are also being tested. A closing time of ∼20 ms for the photon shutter and ∼7 ms for the fast closing valve have been obtained. Experiments on vacuum protection systems indicate that the front end is well protected in case of a vacuum breach

  18. The DIALOG Chip in the Front-End Electronics of the LHCb Muon Detector

    CERN Document Server

    Cadeddu, S; Lai, A

    2004-01-01

    We present a custom integrated circuit, named DIALOG, which is a fundamental building block in the front-end architecture of the LHCb Muon detector. DIALOG is realized in IBM 0.25 um technology, using radiation hardening layout techniques. DIALOG integrates important tools for detector time alignment procedures and time alignment monitoring on the front- end system. In particular, it integrates 16 programmable delays, which can be regulated in steps of 1 ns. Many other features, necessary for the Muon trigger operation and for a safe front-end monitoring are integrated: DIALOG generates the information used by the trigger as a combination of its 16 inputs from the Amplifier-Shaper-Discriminator (ASD) chips, it generates the thresholds of the ASD, it monitors the rate of all its input channels. We describe the circuit architecture, its internal blocks and its main modes of operation.

  19. BGO front-end electronics and signal processing in the MXGS instrument for the ASIM mission

    DEFF Research Database (Denmark)

    Skogseide, Yngve; Cenkeramaddi, Linga Reddy; Genov, Georgi

    2012-01-01

    This paper presents the Bismuth Germanate Oxide (BGO) front-end electronics design and signal processing in Modular X- and Gamma ray sensor (MXGS) instrument onboard the Atmosphere Space Interaction Monitor (ASIM) mission, funded by the European Space Agency. University of Bergen is responsible...... for the design and development of the detector layers and readout electronics for the MXGS instrument. The principal objective of the instrument is to detect Terrestrial Gamma ray Flashes (TGFs), which are related to thunderstorm activity. The digital pulse processing scheme used in the MXGS BGO detector gives...... it a significantly higher rate capability than what has been achieved in other instruments used in the study of terrestrial gamma flashes. The front-end electronics for the BGO detector layer in MXGS system also uses fewer components compared to conventional analog front-ends for BGO detectors, thereby increasing...

  20. A tunable RF Front-End with Narrowband Antennas for Mobile Devices

    DEFF Research Database (Denmark)

    Bahramzy, Pevand; Olesen, Poul; Madsen, Peter

    2015-01-01

    desensitization due to the Tx signal. The filters and antennas demonstrate tunability across multiple bands. System validation is detailed for LTE band I. Frequency response, as well as linearity measurements of the complete Tx and Rx front-end chains, show that the system requirements are fulfilled.......In conventional full-duplex radio communication systems, the transmitter (Tx) is active at the same time as the receiver (Rx). The isolation between the Tx and the Rx is ensured by duplex filters. However, an increasing number of long-term evolution (LTE) bands crave multiband operation. Therefore......, a new front-end architecture, addressing the increasing number of LTE bands, as well as multiple standards, is presented. In such an architecture, the Tx and Rx chains are separated throughout the front-end. Addition of bands is solved by making the antennas and filters tunable. Banks of duplex filters...

  1. MUON POLARIZATION EFFECTS IN THE FRONT END OF THE NEUTRINO FACTORY

    International Nuclear Information System (INIS)

    FERNOW, R.C.; GALLARDO, J.C.; FUKUI, Y.

    2000-01-01

    The authors summarize the methods used for simulation of polarization effects in the front end of a possible neutrino factory. They first discuss the helicity of muons in the pion decay process. They find that, neglecting acceptance considerations, the average helicity asymptotically approaches a magnitude of 0.185 at large pion momenta. Next they describe the methods used for tracking the spin through the complicated electromagnetic field configurations in the front end of the neutrino factory, including rf phase rotation and ionization cooling channels. Various depolarizing effects in matter are then considered, including multiple Coulomb scattering and elastic scattering from atomic electrons. Finally, they include all these effects in a simulation of a 480 m long, double phase rotation front end scenario

  2. Hybrid circuit prototypes for the CMS Tracker upgrade front-end electronics

    International Nuclear Information System (INIS)

    Blanchot, G; Honma, A; Kovacs, M; Braga, D; Raymond, M

    2013-01-01

    New high-density interconnect hybrid circuits are under development for the CMS tracker modules at the HL-LHC. These hybrids will provide module connectivity between flip-chip front-end ASICs, strip sensors and a service board for the data transmission and powering. Rigid organic-based substrate prototypes and also a flexible hybrid design have been built, containing up to eight front-end flip chip ASICs. A description of the function of the hybrid circuit in the tracker, the first prototype designs, results of some electrical and mechanical properties from the prototypes, and examples of the integration of the hybrids into detector modules are presented

  3. Development of front-end electronics for LumiCal detector in CMOS 130 nm technology

    CERN Document Server

    Firlej, M; Idzik, M; Moron, J; Swientek, K; Terlecki, P

    2015-01-01

    front-end electronics for luminosity detector at future Linear Collider are presented. The 8-channel prototype was designed and fabricated in a 130 nm CMOS technology. Each channel comprises a charge sensitive preamplifier with pole-zero cancellation circuit and a CR-RC shaper with 50 ns peaking time. The measurements results confirm full functionality of the prototype and compliance with the requirements imposed by the detector specification. The power consumption of the front-end is in the range 0.6–1.5 mW per channel and the noise ENC around 900 e− at 10 pF input capacitance.

  4. Tuned Optical Front-End MMIC Amplifiers for a Coherent Optical Receiver

    DEFF Research Database (Denmark)

    Petersen, Anders Kongstad; Jagd, A M

    1992-01-01

    Two low noise tuned optical front-end GaAs MESFET MMIC amplifiers for a coherent optical CPFSK (Continuous Phase Frequency Shift Keying) receiver are presented. The receiver operates at 2.5 Gbit/s at an IF of approx. 9 GHz. The front-ends are based on full-custom designed MMICs and a commercially...... available GaInAs/InP pin photo diode. The procedure for measuring the transimpedance and the equivalent input noise current density is outlined in this paper and demonstrated using one of the MMICs. The MMICs were fabricated using the Plessey F20 process by GEC-Marconi through the ESPRIT programme EUROCHIP...

  5. Control of SiC Based Front-End Rectifier under Unbalanced Supply Voltage

    DEFF Research Database (Denmark)

    Maheshwari, Ramkrishan; Trintis, Ionut; Gohil, Ghanshyamsinh Vijaysinh

    2015-01-01

    A voltage source converter is used as a front end converter typically. In this paper, a converter which is realized using SiC MOSFET is considered. Due to SiC MOSFET, a switching frequency more than 50 kHz can be achieved. This can help increasing the current control loop bandwidth, which is not ...... together with a positive-sequence current controller for the front-end rectifier. A gain in the feedforward term can be changed to control the negative-sequence current. Simulation results are presented to verify the theory....

  6. EBR-II Cover Gas Cleanup System upgrade distributed control and front end computer systems

    International Nuclear Information System (INIS)

    Carlson, R.B.

    1992-01-01

    The Experimental Breeder Reactor II (EBR-II) Cover Gas Cleanup System (CGCS) control system was upgraded in 1991 to improve control and provide a graphical operator interface. The upgrade consisted of a main control computer, a distributed control computer, a front end input/output computer, a main graphics interface terminal, and a remote graphics interface terminal. This paper briefly describes the Cover Gas Cleanup System and the overall control system; gives reasons behind the computer system structure; and then gives a detailed description of the distributed control computer, the front end computer, and how these computers interact with the main control computer. The descriptions cover both hardware and software

  7. Biomass round bales infield aggregation logistic scenarios

    Science.gov (United States)

    Biomass bales often need to be aggregated (collected into groups and transported) to a field-edge stack for temporary storage for feedlots or processing facilities. Aggregating the bales with the least total distance involved is a goal of producers and bale handlers. Several logistics scenarios for ...

  8. Microwave bale moisture sensing: Field trial

    Science.gov (United States)

    A microwave moisture measurement technique was developed for moisture sensing of cotton bales after the bale press. The technique measures the propagation delay of a microwave signal that is transmitted through the cotton bale. This research conducted a field trial to test the sensor in a commercial...

  9. Microwave bale moisture sensing: Field trial continued

    Science.gov (United States)

    A microwave moisture measurement technique was developed at the USDA, ARS Cotton Production and Processing Research Unit for moisture sensing of cotton bales after the bale press. The technique measures the propagation delay of a microwave signal that is transmitted through the cotton bale. This res...

  10. Effects of delayed wrapping of baled silage

    Science.gov (United States)

    Use of baled silage allows greater flexibility for harvest management when weather does not allow drying and harvesting forage as dry hay. However, timely wrapping on the day of baling can be difficult if significant numbers of bales need to be wrapped, or if a mechanical breakdown occurs. Researc...

  11. Compact Front-end Prototype for Next Generation RFI-rejecting Polarimetric L-band Radiometer

    DEFF Research Database (Denmark)

    Jensen, Brian Sveistrup; Søbjærg, Sten Schmidl; Skou, Niels

    2009-01-01

    Realizing the need for lower noise figure and smaller physical size in todays higly sensitive radiometers, this paper presents a new compact analog front-end (AFE) for use with the existing L-band (1400-1427 MHz) radiometer designed and operated by the Technical University of Denmark. Using subha...

  12. Front-end Electronics for Unattended Measurement (FEUM). Prototype Test Plan

    Energy Technology Data Exchange (ETDEWEB)

    Conrad, Ryan C.; Morris, Scott J.; Smith, Leon E.; Keller, Daniel T.

    2015-09-16

    The IAEA has requested that PNNL perform an initial set of tests on front-end electronics for unattended measurement (FEUM) prototypes. The FEUM prototype test plan details the tests to be performed, the criteria for evaluation, and the procedures used to execute the tests.

  13. Optical Module Front-End for a Neutrino Underwater Telescope PMT interface

    CERN Document Server

    Lo Presti, D; Caponetto, L

    2007-01-01

    A proposal for a new system to capture signals in the Optical Module (OM) of an Underwater Neutrino Telescope is described. It concentrates on the problem of power consumption in relation to precision. In particular, a solution for the interface between the photomultiplier (PMT) and the front-end electronics is presented.

  14. FELIX: a high-throughput network approach for interfacing to front end electronics for ATLAS upgrades

    NARCIS (Netherlands)

    Anderson, J.; Borga, A.; Boterenbrood, H.; Chen, H.; Chen, K.; Drake, G.; Francis, D.; Gorini, B.; Lanni, F.; Lehmann Miotto, G.; Levinson, L.; Narevicius, J.; Plessl, C.; Roich, A.; Ryu, S.; Schreuder, F.; Schumacher, J.; Vandelli, W.; Vermeulen, J.; Zhang, J.

    2015-01-01

    The ATLAS experiment at CERN is planning full deployment of a new unified optical link technology for connecting detector front end electronics on the timescale of the LHC Run 4 (2025). It is estimated that roughly 8000 GBT (GigaBit Transceiver) links, with transfer rates up to 10.24 Gbps, will

  15. Accurate Prediction of Transimpedances and Equivalent Input Noise Current Densities of Tuned Optical Receiver Front Ends

    DEFF Research Database (Denmark)

    Liu, Qing Zhong

    1991-01-01

    Novel analytical expressions have been derived for calculating transimpedances and equivalent input noise current densities of five tuned optical receiver front ends based on PIN diode and MESFETs or HEMTs. Miller's capacitance, which has been omitted in previous studies, has been taken...

  16. Performance of the front-end electronics of the ANTARES neutrino telescope

    NARCIS (Netherlands)

    Aguilar, J. A.; Al Samarai, I.; Albert, A.; Anghinolfi, M.; Anton, G.; Anvar, S.; Ardid, M.; Jesus, A. C. Assis; Astraatmadja, T.; Aubert, J-J; Auer, R.; Baret, B.; Basa, S.; Bazzotti, M.; Bertin, V.; Biagi, S.; Bigongiari, C.; Bou-Cabo, M.; Bouwhuis, M. C.; Brown, A.; Brunner, J.; Busto, J.; Camarena, F.; Capone, A.; Caponetto, L.; Carloganu, C.; Carminati, G.; Carr, J.; Castorina, E.; Cavasinni, V.; Cecchini, S.; Chaleil, Th; Charvis, [No Value; Chiarusi, T.; Sen, N. Chon; Circella, M.; Costantini, H.; Cottini, N.; Coyle, P.; Curtil, C.; De Bonis, G.; de Botton, N.; Dekeyser, I.; Delagnes, E.; Deschamps, A.; Distefano, C.; Donzaud, C.; Dornic, D.; Drouhin, D.; Druillole, F.; Eberl, T.; Emanuele, U.; Ernenwein, J-P; Escoffier, S.; Falchini, E.; Fehr, F.; Feinstein, F.; Flaminio, V.; Fopma, J.; Fratini, K.; Fritsch, U.; Fuda, J-L; Gay, P.; Giacomelli, G.; Gomez-Gonzalez, J. P.; Graf, K.; Guillard, G.; Halladjian, G.; Hallewell, G.; Hoffmann, C.; van Haren, H.; Heijboer, A. J.; Hello, Y.; Hernandez-Rey, J. J.; Herold, B.; Hoessl, J.; de Jong, M.; Kalantar-Nayestanaki, N.; Kalekin, O.; Kappes, A.; Katz, U.; Kooijman, P.; Kopper, C.; Kouchner, A.; Kretschmer, W.; Lachartre, D.; Lafoux, H.; Lahmann, R.; Lamare, P.; Lambard, G.; Larosa, G.; Laschinsky, H.; Le Provost, H.; Le Van Suu, A.; Lefevre, D.; Legou, T.; Lelaizant, G.; Lim, G.; Lo Presti, D.; Loehner, H.; Loucatos, S.; Lucarelli, F.; Mangano, S.; Marcelin, M.; Margiotta, A.; Martinez-Mora, J. A.; Mazure, A.; Monmarthe, E.; Montaruli, T.; Morganti, M.; Moscoso, L.; Motz, H.; Naumann, C.; Neff, M.; Olivetto, Ch; Ostasch, R.; Palioselitis, D.; Pavala, G. E.; Payre, P.; Petrovic, J.; Piattelli, P.; Picot-Clemente, N.; Picq, C.; Pineau, J-P; Poinsignon, J.; Popa, V.; Pradier, T.; Presani, E.; Racca, C.; Radu, A.; Reed, C.; Rethore, F.; Riccobene, G.; Richardt, C.; Rujoiu, M.; Russo, G. V.; Salesa, F.; Sapienza, P.; Schoeck, F.; Schuller, J. P.; Shanidze, R.; Simeone, F.; Spurio, M.; Steijger, J. J. M.; Stolarczyk, Th.; Tamburini, C.; Tasca, L.; Toscano, S.; Vallage, B.; Van Elewyck, V.; Vannoni, G.; Vecchi, M.; Vernin, P.; Wijnker, G.; de Wolf, E.; Yepes, H.; Zaborov, D.; Zornoza, J. D.; Zuniga, J.

    2010-01-01

    ANTARES is a high-energy neutrino telescope installed in the Mediterranean Sea at a depth of 2475 m. It consists of a three-dimensional array of optical modules, each containing a large photomultiplier tube. A total of 2700 front-end ASICs named analogue ring samplers (ARS) process the phototube

  17. Systematic Approach to Formulate PSS Development Project Proposals in the Fuzzy Front End

    DEFF Research Database (Denmark)

    Barquet, Ana Paula B.; Pigosso, Daniela Cristina Antelmi; Rozenfeld, Henrique

    2013-01-01

    be considered by companies during this definition. The systematization of PSS attributes may help increase the knowledge about different PSS projects that can emerge in the front end, thus leading to the discovery of opportunities that are not apparent in the existing business models and give rise to new ideas...

  18. Calibration and performance test of the Very-Front-End electronics for the CMS electromagnetic calorimeter

    Energy Technology Data Exchange (ETDEWEB)

    Blaha, J. [Czech Technical University in Prague, CTU, Praha (Czech Republic); Institut de Physique Nucleaire de Lyon - IN2P3/CNRS and Universite Claude Bernard Lyon 1, Villeurbanne (France)], E-mail: j.blaha@ipnl.in2p3.fr; Cartiglia, N. [Instituto Nazionale di Fisica Nucleare, INFN, Torino (Italy); Combaret, C. [Czech Technical University in Prague, CTU, Praha (Czech Republic); Fay, J. [Institut de Physique Nucleaire de Lyon - IN2P3/CNRS and Universite Claude Bernard Lyon 1, Villeurbanne (France); Lustermann, W. [Eidgenossische Technische Hoschschule, ETH, Zuerich (Switzerland); Maurelli, G. [Institut de Physique Nucleaire de Lyon - IN2P3/CNRS and Universite Claude Bernard Lyon 1, Villeurbanne (France); Nardulli, A. [Eidgenossische Technische Hoschschule, ETH, Zuerich (Switzerland); Obertino, M. [Instituto Nazionale di Fisica Nucleare, INFN, Torino (Italy)

    2007-10-15

    The Very-Front-End cards processing signal from photodetectors of the CMS electromagnetic calorimeter, have been put through extensive test program to guarantee their functionality and reliability. The characteristics of the VFE cards designed for the calorimeter barrel are presented. The results confirm the high quality of the cards production and show that the specifications are fully reached.

  19. Calibration and performance test of the Very-Front-End electronics for the CMS electromagnetic calorimeter

    International Nuclear Information System (INIS)

    Blaha, J.; Cartiglia, N.; Combaret, C.; Fay, J.; Lustermann, W.; Maurelli, G.; Nardulli, A.; Obertino, M.

    2007-01-01

    The Very-Front-End cards processing signal from photodetectors of the CMS electromagnetic calorimeter, have been put through extensive test program to guarantee their functionality and reliability. The characteristics of the VFE cards designed for the calorimeter barrel are presented. The results confirm the high quality of the cards production and show that the specifications are fully reached

  20. A Serializer ASIC at 5 Gbps for Detector Front-end Electronics Readout

    CERN Document Server

    Gong, D; The ATLAS collaboration; Liu, T; Xiang, A; Ye, J

    2010-01-01

    High speed and ultra low power serial data transmission over fiber optics plays an essential roll in detector front-end electronics readout for experiments at the LHC. The ATLAS Liquid Argon Calorimeter front-end readout upgrade for the sLHC calls for an optical link system with a data bandwidth of 100 Gbps per each front-end board (FEB), a factor of 62 increase compared with the present optical link system. The transmitter of this optical link will have to withstand the radiation environment where the front-end crates are situated, and stay within the current power dissipation budget limited by the present FEB cooling capacity. To meet these challenges, we developed a 16:1 serializer based on a commercial 0.25 μm silicon-on-sapphire (SOS) CMOS technology. This serializer, designed to work at 5 Gbps, is a key component in an optical link system. Test results of this ASIC will be reported. A system design for the 100 Gbps optical link system will also be presented, with discussions about key components identi...

  1. Front end power dissipation minimization and optimal transmission rate for wireless receivers

    NARCIS (Netherlands)

    Heuvel, van den J.H.C.; Wu, Y.; Baltus, P.G.M.; Linnartz, J.P.M.G.; Roermund, van A.H.M.

    2014-01-01

    Most wireless battery-operated devices spend more energy receiving than transmitting. Hence, minimizing the power dissipation in the receiver front end, which, in many cases, is the prominent power consuming part of the receiver, is an important challenge. This paper addresses this challenge by

  2. Structure and thermal analysis of the water cooling mask at NSRL front end

    International Nuclear Information System (INIS)

    Zhao Feiyun; Xu Chaoyin; Wang Qiuping; Wang Naxiu

    2003-01-01

    A water cooling mask is an important part of the front end, usually used for absorbing high power density synchrotron radiation to protect the apparatus from being destroyed by heat load. This paper presents the structure of the water cooling mask and the thermal analysis results of the mask block at NSRL using Program ANSYS5.5

  3. Receiver Front-End Circuits for Future Generations of Wireless Communications

    NARCIS (Netherlands)

    Sanduleanu, M.A.T.; Vidojkovic - Andjelovic, M.; Vidojkovic, V.; Roermund, van A.H.M.; Tasic, A.

    2007-01-01

    In this paper, new receiver concepts and CMOS circuits for future wireless communications standards are introduced. Tradeoffs between technology, performance and circuit choices of the RF front-end circuits are discussed. In particular, power consumption, noise figure and linearity trade-offs in

  4. Social Networks in the Front End: The Organizational Life of an Idea

    NARCIS (Netherlands)

    R.C. Kijkuit (Bob)

    2007-01-01

    textabstractAn effective front end (FE) of the new product development (NPD) process is important for innovative performance in companies. To date the NPD literature has mainly focused on the selection process of ideas and very little on the processes that take place before selection. This study

  5. 2 MV injector as the Elise front-end and as an experimental facility

    International Nuclear Information System (INIS)

    Yu, S.S.; Eylon, S.; Henestroza, E.; Peters, C.; Reginato, L.; Tauschwitz, A.; Grote, D.; Deadrick, F.

    1996-01-01

    We report on progress in the preparation of the 2 MV injector at LBNL as the front end of Elise and as a multipurpose experimental facility for heavy ion fusion beam dynamics studies. Recent advances in the performance and understanding of the injector are described, and some of the ongoing experimental activities are summarized. (orig.)

  6. Commissioning and Operation of the FNAL Front end Injection Line and Ion Sources.

    Energy Technology Data Exchange (ETDEWEB)

    Karns, Patrick R. [Indiana Univ., Bloomington, IN (United States)

    2015-09-01

    This thesis documents the efforts made in commissioning and operating the RFQ Injection Line (RIL) as a replacement for the Cockcroft Walton front end. The Low Energy Beam Transport (LEBT) was assembled and tested with multiwire position and emittance monitor measurements. The Radio Frequency Quadrupole (RFQ) commissioning was completed with the same measurements as well as output beam energy measurements that showed it initially accelerated beam only to 700 keV, which was 50 keV lower than the design energy. Working with the manufacturer solutions were found and instituted to continue testing. The Medium Energy Beam Transport (MEBT) was then connected as the RIL was installed as the new front end of Linac. Testing gave way to operation when the new front end was used as the source of all High Energy Physics (HEP) beam for Fermi National Accelerator Laboratory (FNAL). The magnetron ion source that provides the H- beam for the front end required several changes and eventual upgrades to operate well; such as new source operating points for vacuum pressure and cesium admixture, and new materials for critical source components. Further research was conducted on the cathode geometry and nitrogen doping of the hydrogen gas as well as using solid state switches for the extractor system high voltage.

  7. Magnet Misalignment Studies for the Front-end of the Neutrino Factory

    CERN Document Server

    Prior, G; Stratakis, D; Neuffer, D; Snopok, P; Rogers, C

    2013-01-01

    In the Neutrino Factory front-end the muon beam coming from the interaction of a high-power (4 MW) proton beam on a mercury jet target is transformed through a buncher, a phase rotator and an ionization cooling channel before entering the downstream acceleration system. The muon front-end channel is densely packed with solenoid magnets, normal conducting radio-frequency cavities and absorber windows for the cooling section. The tolerance to the misalignment of the different components has to be determined in order on one hand to set the limits beyond which the performance of the front-end channel would be degraded; on the other hand to optimize the design and assembly of the front-end cells such that the component alignment can be checked and corrected for where crucial for the performance of the channel. In this paper we show the results of some of the simulations of the frontend channel performance where the magnetic field direction has been altered compared to the baseline.

  8. Quantitative Analysis of the Civilian Bilateral Cooperation in Front-End of the Nuclear Fuel Cycle

    Energy Technology Data Exchange (ETDEWEB)

    Nguyen, Viet Phuong; Yim, Man-Sung [Korea Advanced Institute of Science and Technology, Daejeon (Korea, Republic of)

    2015-05-15

    A substantial part of such cooperation is related to the front-end of the nuclear fuel cycle, which encompasses the processes that help manufacturing nuclear fuel, including mining and milling of natural uranium, refining and chemical conversion, enrichment (in case of fuels for Pressurized Water Reactor PWR), and fuel fabrication. Traditionally, the supply of natural uranium was dominated by Canada and Australia, whereas enrichment services have been mostly provided by companies from Western states or Russia, which are also the main customers of such services. However, Kazakhstan and African countries like Niger, Namibia, and Malawi have emerged as important suppliers in the international uranium market and recent forecasts show that China will soon become a major player in the front-end market as both consumer and service provider. In this paper, the correlation between bilateral civil nuclear cooperation in front-end of the nuclear fuel cycle and the political and economic relationship among countries was examined through a dataset of bilateral nuclear cooperation in the post-Cold War era, from 1990 to 2011. Such finding has implication on not only the nonproliferation research but also the necessary reinforcement of export control regimes like such as the Nuclear Suppliers Group. Further improvement of this dataset and the regression method are also needed in order to increase the robustness of the findings as well as to cover the whole scope of the nuclear fuel cycle, including both front-end and back-end activities.

  9. Front-end multiplexing—applied to SQUID multiplexing: Athena X-IFU and QUBIC experiments

    Science.gov (United States)

    Prele, D.

    2015-08-01

    As we have seen for digital camera market and a sensor resolution increasing to "megapixels", all the scientific and high-tech imagers (whatever the wave length - from radio to X-ray range) tends also to always increases the pixels number. So the constraints on front-end signals transmission increase too. An almost unavoidable solution to simplify integration of large arrays of pixels is front-end multiplexing. Moreover, "simple" and "efficient" techniques allow integration of read-out multiplexers in the focal plane itself. For instance, CCD (Charge Coupled Device) technology has boost number of pixels in digital camera. Indeed, this is exactly a planar technology which integrates both the sensors and a front-end multiplexed readout. In this context, front-end multiplexing techniques will be discussed for a better understanding of their advantages and their limits. Finally, the cases of astronomical instruments in the millimeter and in the X-ray ranges using SQUID (Superconducting QUantum Interference Device) will be described.

  10. Front-end multiplexing—applied to SQUID multiplexing: Athena X-IFU and QUBIC experiments

    International Nuclear Information System (INIS)

    Prele, D.

    2015-01-01

    As we have seen for digital camera market and a sensor resolution increasing to 'megapixels', all the scientific and high-tech imagers (whatever the wave length - from radio to X-ray range) tends also to always increases the pixels number. So the constraints on front-end signals transmission increase too. An almost unavoidable solution to simplify integration of large arrays of pixels is front-end multiplexing. Moreover, 'simple' and 'efficient' techniques allow integration of read-out multiplexers in the focal plane itself. For instance, CCD (Charge Coupled Device) technology has boost number of pixels in digital camera. Indeed, this is exactly a planar technology which integrates both the sensors and a front-end multiplexed readout. In this context, front-end multiplexing techniques will be discussed for a better understanding of their advantages and their limits. Finally, the cases of astronomical instruments in the millimeter and in the X-ray ranges using SQUID (Superconducting QUantum Interference Device) will be described

  11. InP DHBT MMICs for millimeter-wave front-ends

    DEFF Research Database (Denmark)

    Johansen, Tom Keinicke; Hadziabdic, Dzenan; Krozer, Viktor

    2009-01-01

    In this paper, we show advanced MMIC's using InP DHBT technology. In particular, we demonstrate front-end circuits covering a broad frequency range from Q-band to E-band. Realizations of power amplifiers, quadrature VCOs, and sub-harmonic mixers, are presented and experimental results are discussed....

  12. Front-End ASICs for 3-D Ultrasound : From Beamforming to Digitization

    NARCIS (Netherlands)

    Chen, C.

    2018-01-01

    This thesis describes the analysis, design and evaluation of front-end application-specific integrated circuits (ASICs) for 3-D medical ultrasound imaging, with the focus on the receive electronics. They are specifically designed for next-generation miniature 3-D ultrasound devices, such as

  13. A wideband high-linearity RF receiver front-end in CMOS

    NARCIS (Netherlands)

    Arkesteijn, V.J.; Klumperink, Eric A.M.; Nauta, Bram

    This paper presents a wideband high-linearity RF receiver-front-end, implemented in standard 0.18 μm CMOS technology. The design employs a noise-canceling LNA in combination with two passive mixers, followed by lowpass-filtering and amplification at IF. The achieved bandwidth is >2 GHz, with a noise

  14. Putting the use of intuition for fuzzy front end decision making on the research agenda

    NARCIS (Netherlands)

    Eling, K.; Langerak, F.

    2011-01-01

    Decision making literature suggests that intuitive decision making is more appropriate than the established rational decision making approaches to handle the specific information processing needs of the fuzzy front end (FFE) of new product development. However, these earlier studies cannot be

  15. Fast CMOS binary front-end for silicon strip detectors at LHC experiments

    CERN Document Server

    Kaplon, Jan

    2004-01-01

    We present the design and the test results of a front-end circuit developed in a 0.25 mu m CMOS technology. The aim of this work is to study the performance of a deep submicron process in applications for fast binary front-end for silicon strip detectors. The channel comprises a fast transimpedance preamplifier working with an active feedback loop, two stages of the amplifier-integrator circuits providing 22 ns peaking time and two-stage differential discriminator. Particular effort has been made to minimize the current and the power consumption of the preamplifier, while keeping the required noise and timing performance. For a detector capacitance of 20 pF noise below 1500 e/sup -/ ENC has been achieved for 300 mu A bias current in the input transistor, which is comparable with levels achieved in the past for a front-end using bipolar input transistor. The total supply current of the front-end is 600 mu A and the power dissipation is 1.5 mW per channel. The offset spread of the comparator is below 3 mV rms.

  16. Using intuition in fuzzy front-end decision-making : a conceptual framework

    NARCIS (Netherlands)

    Eling, K.; Griffin, A.; Langerak, F.

    2014-01-01

    The goal of decision-making during the execution of the fuzzy front end (FFE) is to develop a creative new product concept. Although intuitive decision-making has been found to increase new product creativity, the theoretical knowledge base as to why and under which conditions intuition use during

  17. Predictive Duty Cycle Control of Three-Phase Active-Front-End Rectifiers

    DEFF Research Database (Denmark)

    Song, Zhanfeng; Tian, Yanjun; Chen, Wei

    2016-01-01

    This paper proposed an on-line optimizing duty cycle control approach for three-phase active-front-end rectifiers, aiming to obtain the optimal control actions under different operating conditions. Similar to finite control set model predictive control strategy, a cost function previously...

  18. Front-End Types. Automotive Mechanics. Steering & Suspension. Instructor's Guide [and] Student Guide.

    Science.gov (United States)

    Spignesi, B.

    This instructional package, one in a series of individualized instructional units on automotive steering and suspension, consists of a student guide and an instructor guide dealing with automobile front-end types. Covered in the module are three common types of passenger car front suspension systems and their major components as well as two types…

  19. Design and performance Assessment of an Airborne Ice Sounding Radar Front-End

    DEFF Research Database (Denmark)

    Hernández, Carlos Cilla; Krozer, Viktor; Vidkjær, Jens

    2008-01-01

    The paper describes the design and experimental performance assessment of the RF front-end of an airborne P-band ice sounding radar. The ice sounder design features newly developed components at a centre frequency of 435 MHz, such as, antenna 20% bandwidth at RL ≪ 13 dB, compact high power in...

  20. System-Level Design of an Integrated Receiver Front End for a Wireless Ultrasound Probe

    DEFF Research Database (Denmark)

    di Ianni, Tommaso; Hemmsen, Martin Christian; Llimos Muntal, Pere

    2016-01-01

    In this paper, a system-level design is presented for an integrated receive circuit for a wireless ultrasound probe, which includes analog front ends and beamformation modules. This paper focuses on the investigation of the effects of architectural design choices on the image quality. The point...

  1. The ICARUS Front-end Preamplifier Working at Liquid Argon Temperature

    CERN Document Server

    Baibussinov, B; Casagrande, F; Cennini, P; Centro, S; Curioni, A; Meng, G; Picchi, P; Pietropaolo, F; Rubbia, C; Sergiampietri, F; Ventura, S

    2011-01-01

    We describe characteristics and performance of the low-noise front-end preamplifier used in the ICARUS 50-litre liquid Argon Time Projection Chamber installed in the CERN West Area Neutrino Facility during the 1997-98 neutrino runs. The preamplifiers were designed to work immersed in ultra-pure liquid Argon at a temperature of 87K.

  2. The front-end amplifier for the silicon microstrip sensors of the PANDA MVD

    Energy Technology Data Exchange (ETDEWEB)

    Di Pietro, Valentino; Brinkmann, Kai-Thomas; Riccardi, Alberto [II. Physikalisches Institut, JLU Giessen (Germany); Rivetti, Angelo; Rolo, Manuel [INFN Sezione di Torino (Italy)

    2015-07-01

    The most common readout systems designed for the nuclear physics detectors are based on amplitude measurements. The information that needs to be preserved is the charge delivered by a particle hitting the sensor. The electronic chain employed in these cases is made from two main building blocks: front-end amplifier and ADC. One of the issues associated with the implementation of such an architecture in scaled CMOS technologies is the dynamic range, because the charge information is extrapolated through the sampling of the peak of the front-end output signal. It is therefore interesting to explore the possibility of using time-based architectures offering better performances from that point of view. In fact, in these topologies the linearity between the charge and the signal duration can be maintained even if some building blocks in the chain saturate. The main drawback is the loss in resolution since a duration measurement involves the difference between two time measurements. This work will present the design of a front-end optimized for fast Time-over-Threshold applications. The circuit has been developed for the microstrip detectors of the PANDA experiment. The key features of the front-end amplifier are illustrated and both schematic level, and post-layout simulations are discussed.

  3. Design of analog front-ends for the RD53 demonstrator chip

    CERN Document Server

    Gaioni, L; Nodari, B; Manghisoni, M; Re, V; Traversi, G; Barbero, M B; Fougeron, D; Gensolen, F; Godiot, S; Menouni, M; Pangaud, P; Rozanov, A; Wang, A; Bomben, M; Calderini, G; Crescioli, F; Le Dortz, O; Marchiori, G; Dzahini, D; Rarbi, F E; Gaglione, R; Gonella, L; Hemperek, T; Huegging, F; Karagounis, M; Kishishita, T; Krueger, H; Rymaszewski, P; Wermes, N; Ciciriello, F; Corsi, F; Marzocca, C; De Robertis, G; Loddo, F; Licciulli, F; Andreazza, A; Liberali, V; Shojaii, S; Stabile, A; Bagatin, M; Bisello, D; Mattiazzo, S; Ding, L; Gerardin, S; Giubilato, P; Neviani, A; Paccagnella, A; Vogrig, D; Wyss, J; Bacchetta, N; Della Casa, G; Demaria, N; Mazza, G; Rivetti, A; Da Rocha Rolo, M D; Comotti, D; Ratti, L; Vacchi, C; Beccherle, R; Bellazzini, R; Magazzu, G; Minuti, M; Morsani, F; Palla, F; Poulios, S; Fanucci, L; Rizzi, A; Saponara, S; Androsov, K; Bilei, G M; Menichelli, M; Conti, E; Marconi, S; Passeri, D; Placidi, P; Monteil, E; Pacher, L; Paternò, A; Gajanana, D; Gromov, V; Hessey, N; Kluit, R; Zivkovic, V; Havranek, M; Janoska, Z; Marcisovsky, M; Neue, G; Tomasek, L; Kafka, V; Sicho, P; Vrba, V; Vila, I; Lopez-Morillo, E; Aguirre, M A; Palomo, F R; Muñoz, F; Abbaneo, D; Christiansen, J; Dannheim, D; Dobos, D; Linssen, L; Pernegger, H; Valerio, P; Alipour Tehrani, N; Bell, S; Prydderch, M L; Thomas, S; Christian, D C; Fahim, F; Hoff, J; Lipton, R; Liu, T; Zimmerman, T; Garcia-Sciveres, M; Gnani, D; Mekkaoui, A; Gorelov, I; Hoeferkamp, M; Seidel, S; Toms, K; De Witt, J N; Grillo, A

    2017-01-01

    The RD53 collaboration is developing a large scale pixel front-end chip, which will be a tool to evaluate the performance of 65 nm CMOS technology in view of its application to the readout of the innermost detector layers of ATLAS and CMS at the HL-LHC. Experimental results of the characterization of small prototypes will be discussed in the frame of the design work that is currently leading to the development of the large scale demonstrator chip RD53A to be submitted in early 2017. The paper is focused on the analog processors developed in the framework of the RD53 collaboration, including three time over threshold front-ends, designed by INFN Torino and Pavia, University of Bergamo and LBNL and a zero dead time front-end based on flash ADC designed by a joint collaboration between the Fermilab and INFN. The paper will also discuss the radiation tolerance features of the front-end channels, which were exposed to up to 800 Mrad of total ionizing dose to reproduce the system operation in the actual experiment.

  4. The fuzziness of the fuzzy front end : the influence of non-technical factors

    NARCIS (Netherlands)

    Kiewiet, Derk Jan; van Engelen, Jo; Achterkamp, Marjolein; Chen, J; Xu, QR; Wu, XB

    2007-01-01

    The Fuzzy Front End (FFE) can be considered the most challenging part of the innovation process where large opportunities are to be found for an organization. Because of the inherently creative and non-routine characteristics of the FFE, only a small number of formal techniques are available to

  5. Fuzzy decision support for tools selection in the core front end activities of new product development

    NARCIS (Netherlands)

    Achiche, S.; Appio, F.; McAloone, T.; Di Minin, Alberto

    2012-01-01

    The innovation process may be divided into three main parts: the front end (FE), the new product development (NPD) process, and the commercialization. Every NPD process has a FE in which products and projects are defined. However, companies tend to begin the stages of FE without a clear definition

  6. Quantitative Analysis of the Civilian Bilateral Cooperation in Front-End of the Nuclear Fuel Cycle

    International Nuclear Information System (INIS)

    Nguyen, Viet Phuong; Yim, Man-Sung

    2015-01-01

    A substantial part of such cooperation is related to the front-end of the nuclear fuel cycle, which encompasses the processes that help manufacturing nuclear fuel, including mining and milling of natural uranium, refining and chemical conversion, enrichment (in case of fuels for Pressurized Water Reactor PWR), and fuel fabrication. Traditionally, the supply of natural uranium was dominated by Canada and Australia, whereas enrichment services have been mostly provided by companies from Western states or Russia, which are also the main customers of such services. However, Kazakhstan and African countries like Niger, Namibia, and Malawi have emerged as important suppliers in the international uranium market and recent forecasts show that China will soon become a major player in the front-end market as both consumer and service provider. In this paper, the correlation between bilateral civil nuclear cooperation in front-end of the nuclear fuel cycle and the political and economic relationship among countries was examined through a dataset of bilateral nuclear cooperation in the post-Cold War era, from 1990 to 2011. Such finding has implication on not only the nonproliferation research but also the necessary reinforcement of export control regimes like such as the Nuclear Suppliers Group. Further improvement of this dataset and the regression method are also needed in order to increase the robustness of the findings as well as to cover the whole scope of the nuclear fuel cycle, including both front-end and back-end activities

  7. Parameters-adjustable front-end controller in digital nuclear measurement system

    International Nuclear Information System (INIS)

    Hao Dejian; Zhang Ruanyu; Yan Yangyang; Wang Peng; Tang Changjian

    2013-01-01

    Background: One digitizer is used to implement a digital nuclear measurement for the acquisition of nuclear information. Purpose: A principle and method of a parameter-adjustable front-end controller is presented for the sake of reducing the quantitative errors while getting the maximum ENOB (effective number of bits) of ADC (analog-to-digital converter) during waveform digitizing, as well as reducing the losing counts. Methods: First of all, the quantitative relationship among the radiation count rate (n), the amplitude of input signal (V in ), the conversion scale of ADC (±V) and the amplification factor (A) was derived. Secondly, the hardware and software of the front-end controller were designed to fulfill matching the output of different detectors, adjusting the amplification linearly through the control of channel switching, and setting of digital potentiometer by CPLD (Complex Programmable Logic Device). Results: (1) Through the measurement of γ-ray of Am-241 under our digital nuclear measurement set-up with CZT detector, it was validated that the amplitude of output signal of detectors of RC feedback type could be amplified linearly with adjustable amplification by the front-end controller. (2) Through the measurement of X-ray spectrum of Fe-5.5 under our digital nuclear measurement set-up with Si-PIN detector, it was validated that the front-end controller was suitable for the switch resetting type detectors, by which high precision measurement under various count rates could be fulfilled. Conclusion: The principle and method of the parameter-adjustable front-end controller presented in this paper is correct and feasible. (authors)

  8. Next generation of optical front-ends for numerical services - 15387

    International Nuclear Information System (INIS)

    Fullenbaum, M.; Durieux, A.; Dubroca, G.; Fuss, P.

    2015-01-01

    Visual Inspection and surveillance technology means in environments exhibiting high levels of gamma and neutron radiation are nowadays fulfilled through the use of analog tubes. The images are thus acquired with analog devices whose vast majority relies on 1 and 2/3 inch imaging formats and deliver native analog images. There is a growing demand for real time image processing and distribution through Ethernet services for quicker and seamless process integration throughout many sectors. This will call for the inception of solid state sensor (CCD, CMOS) to generate numerical native images as the first step and building block towards end to end numerical processing (ICT), assuming these sensors can be hardened or protected in the field of the nuclear industry. On the one hand, these sensor sizes will be significantly reduced (by a factor of 2-3) versus those of the tubes, and on the other hand, one will also be presented with the opportunity of increased spatial resolution, stemming from the high pixel count of the solid state technology, for implementation of new or better services or of enhanced pieces of information for decision making purposes. In order to reap the benefits of such sensors, new optical front-ends will have to be designed. Over and beyond the mere aspects of matching the reduced sensor size to the size of the scenes at stake, optical performances of these front-end will also bear an impact on the whole optical chain applications. As an example, detection and tracking needs will be different from a performance standpoint and the overall performances will have to be balanced out in between the optical front-end, the image format, the image processing software capability, processing speed,...just to name a few. In this paper we will review and explain the missing gaps in order to switch to a full numerical optical chain by focusing on the optical front-end and the associated cost trade-offs. Finally, we will conclude by clearly stating the best

  9. FELIX: The New Approach for Interfacing to Front-end Electronics for the ATLAS Experiment

    CERN Document Server

    AUTHOR|(SzGeCERN)754725; The ATLAS collaboration; Anderson, John Thomas; Borga, Andrea; Boterenbrood, Hendrik; Chen, Hucheng; Chen, Kai; Drake, Gary; Donszelmann, Mark; Francis, David; Gorini, Benedetto; Guest, Daniel; Lanni, Francesco; Lehmann Miotto, Giovanna; Levinson, Lorne; Roich, Alexander; Schreuder, Frans Philip; Schumacher, J\\"orn; Vandelli, Wainer; Zhang, Jinlong

    2016-01-01

    From the ATLAS Phase-I upgrade and onward, new or upgraded detectors and trigger systems will be interfaced to the data acquisition, detector control and timing (TTC) systems by the Front-End Link eXchange (FELIX). FELIX is the core of the new ATLAS Trigger/DAQ architecture. Functioning as a router between custom serial links and a commodity network, FELIX is implemented by server PCs with commodity network interfaces and PCIe cards with large FPGAs and many high speed serial fiber transceivers. By separating data transport from data manipulation, the latter can be done by software in commodity servers attached to the network. Replacing traditional point-to-point links between Front-end components and the DAQ system by a switched network, FELIX provides scaling, flexibility uniformity and upgradability and reduces the diversity of custom hardware solutions in favour of software.

  10. An ASIC implementation of digital front-end electronics for a high resolution PET scanner

    International Nuclear Information System (INIS)

    Newport, D.F.; Young, J.W.

    1993-01-01

    AN Application Specific Integrated Circuit (ASIC) has been designed and fabricated which implements many of the current functions found in the digital front-end electronics for a high resolution Positron Emission Tomography (PET) scanner. The ASIC performs crystal selection, energy qualification, time correction, and event counting functions for block technology high resolution PET scanners. Digitized x and y position, event energy, and time information are used by the ASIC to determine block crystal number, qualify the event based on energy, and correct the event time. In addition, event counting and block dead time calculations are performed for system dead time corrections. A loadable sequencer for controlling the analog front-end electronics is also implemented. The ASIC is implemented in a 37,000 gate, 1.0 micron CMOS gate-array and is capable of handling 4 million events/second while reducing parts count, cost, and power consumption over current board-level designs

  11. FEREAD: Front End Readout software for the Fermilab PAN-DA data acquisition system

    International Nuclear Information System (INIS)

    Dorries, T.; Haire, M.; Moore, C.; Pordes, R.; Votava, M.

    1989-05-01

    The FEREAD system provides a multi-tasking framework for controlling the execution of experiment specific front end readout processes. It supports initializing the front end data acquisition hardware, queueing and processing readout activation signals, cleaning up at the end of data acquisition, and transferring configuration parameters and statistical data between a ''Host'' computer and the readout processes. FEREAD is implemented as part of the PAN-DA software system and is designed to run on any Motorola 68k based processor board. It has been ported to the FASTBUS General Purpose Master (GPM) interface board and the VME MVME133A processor board using the pSOS/Microtec environment. 12 refs., 2 figs

  12. Development of front-end electronics and TDC LSI for the ATLAS MDT

    CERN Document Server

    Arai, Y

    2000-01-01

    Architecture of the front-end electronics for the ATLAS muon precision chamber (MDT) is presented. Especially, test results of a prototype TDC chip are described in detail. The chip was fabricated in a 0.3 mu m CMOS gate-array technology. Measurements of critical elements of the chip such as the PLL, and data buffering circuits demonstrated adequate performance. The effect of gamma-ray irradiation, using a /sup 60/Co source, and neutron irradiation, were also examined. The test results revealed radiation tolerance adequate for the operation of the circuits in the environment of the ATLAS MDT. Mounting of the front-end electronics to the MDT is scheduled to start in the year 2001. (10 refs).

  13. Front-end module readout and control electronics for the PHENIX Multiplicity Vertex Detector

    International Nuclear Information System (INIS)

    Ericson, M.N.; Allen, M.D.; Boissevain, J.

    1997-11-01

    Front-end module (FEM) readout and control are implemented as modular, high-density, reprogrammable functions in the PHENIX Multiplicity Vertex Detector. FEM control is performed by the heap manager, an FPGA-based circuit in the FEM unit. Each FEM has 256 channels of front-end electronics, readout, and control, all located on an MCM. Data readout, formatting, and control are performed by the heap manager along with 4 interface units that reside outside the MVD detector cylinder. This paper discusses the application of a generic heap manager and the addition of 4 interface module types to meet the specific control and data readout needs of the MVD. Unit functioning, interfaces, timing, data format, and communication rates will be discussed in detail. In addition, subsystem issues regarding mode control, serial architecture and functions, error handling, and FPGA implementation and programming will be presented

  14. Robust Spectrum Sensing Demonstration Using a Low-Cost Front-End Receiver

    Directory of Open Access Journals (Sweden)

    Daniele Borio

    2015-01-01

    Full Text Available Spectrum Sensing (SS is an important function in Cognitive Radio (CR to detect primary users. The design of SS algorithms is one of the most challenging tasks in CR and requires innovative hardware and software solutions to enhance detection probability and minimize low false alarm probability. Although several SS algorithms have been developed in the specialized literature, limited work has been done to practically demonstrate the feasibility of this function on platforms with significant computational and hardware constraints. In this paper, SS is demonstrated using a low cost TV tuner as agile front-end for sensing a large portion of the Ultra-High Frequency (UHF spectrum. The problems encountered and the limitations imposed by the front-end are analysed along with the solutions adopted. Finally, the spectrum sensor developed is implemented on an Android device and SS implementation is demonstrated using a smartphone.

  15. A VLSI front-end circuit for microstrip silicon detectors for medical imaging applications

    International Nuclear Information System (INIS)

    Beccherle, R.; Cisternino, A.; Guerra, A. Del; Folli, M.; Marchesini, R.; Bisogni, M.G.; Ceccopieri, A.; Rosso, V.; Stefanini, A.; Tripiccione, R.; Kipnis, I.

    1999-01-01

    An analog CMOS-Integrated Circuit has been developed as Front-End for a double-sided microstrip silicon detector. The IC processes and discriminates signals in the 5-30 keV energy range. Main features are low noise and precise timing information. Low noise is achieved by optimizing the cascoded integrator with the 8 pF detector capacitance and by using an inherently low noise 1.2 μm CMOS technology. Timing information is provided by a double discriminator architecture. The output of the circuit is a digital pulse. The leading edge is determined by a fixed threshold discriminator, while the trailing edge is provided by a zero crossing discriminator. In this paper we first describe the architecture of the Front-End chip. We then present the performance of the chip prototype in terms of noise, minimum discrimination threshold and time resolution

  16. Microwave integrated circuit radiometer front-ends for the Push Broom Microwave Radiometer

    Science.gov (United States)

    Harrington, R. F.; Hearn, C. P.

    1982-01-01

    Microwave integrated circuit front-ends for the L-band, S-band and C-band stepped frequency null-balanced noise-injection Dicke-switched radiometer to be installed in the NASA Langley airborne prototype Push Broom Microwave Radiometer (PBMR) are described. These front-ends were developed for the fixed frequency of 1.413 GHz and the variable frequencies of 1.8-2.8 GHz and 3.8-5.8 GHz. Measurements of the noise temperature of these units were made at 55.8 C, and the results of these tests are given. While the overall performance was reasonable, improvements need to be made in circuit losses and noise temperatures, which in the case of the C-band were from 1000 to 1850 K instead of the 500 K specified. Further development of the prototypes is underway to improve performance and extend the frequency range.

  17. Status of the Warm Front End of PIP-II Injector Test

    Energy Technology Data Exchange (ETDEWEB)

    Shemyakin, Alexander [Fermilab; Alvarez, Matthew [Fermilab; Andrews, Richard [Fermilab; Baffes, Curtis [Fermilab; Carneiro, Jean-Paul [Fermilab; Chen, Alex [Fermilab; Derwent, Paul [Fermilab; Edelen, Jonathan [Fermilab; Frolov, Daniil [Fermilab; Hanna, Bruce [Fermilab; Prost, Lionel [Fermilab; Saewert, Gregory [Fermilab; Saini, Arun [Fermilab; Scarpine, Victor [Fermilab; Sista, V. Lalitha [Fermilab; Steimel, Jim [Fermilab; Sun, Ding [Fermilab; Warner, Arden [Fermilab

    2017-05-01

    The Proton Improvement Plan II (PIP-II) at Fermilab is a program of upgrades to the injection complex. At its core is the design and construction of a CW-compatible, pulsed H⁻ SRF linac. To validate the concept of the front-end of such machine, a test accelerator known as PIP-II Injector Test is under construction. It includes a 10 mA DC, 30 keV H⁻ ion source, a 2 m-long Low Energy Beam Transport (LEBT), a 2.1 MeV CW RFQ, followed by a Medium Energy Beam Transport (MEBT) that feeds the first of 2 cryomodules increasing the beam energy to about 25 MeV, and a High Energy Beam Transport section (HEBT) that takes the beam to a dump. The ion source, LEBT, RFQ, and initial version of the MEBT have been built, installed, and commissioned. This report presents the overall status of the warm front end.

  18. Development and Demonstration of a Magnesium-Intensive Vehicle Front-End Substructure

    Energy Technology Data Exchange (ETDEWEB)

    Logan, Stephen D. [United States Automotive Materials Partnership LLC, Southfield, MI (United States); Forsmark, Joy H. [United States Automotive Materials Partnership LLC, Southfield, MI (United States); Osborne, Richard [United States Automotive Materials Partnership LLC, Southfield, MI (United States)

    2016-07-01

    This project is the final phase (designated Phase III) of an extensive, nine-year effort with the objectives of developing a knowledge base and enabling technologies for the design, fabrication and performance evaluation of magnesium-intensive automotive front-end substructures intended to partially or completely replace all-steel comparators, providing a weight savings approaching 50% of the baseline. Benefits of extensive vehicle weight reduction in terms of fuel economy increase, extended vehicle range, vehicle performance and commensurate reductions in greenhouse gas emissions are well known. An exemplary vehicle substructure considered by the project is illustrated in Figure 1, along with the exterior vehicle appearance. This unibody front-end “substructure” is one physical objective of the ultimate design and engineering aspects established at the outset of the larger collective effort.

  19. Microwave Photonic Architecture for Direction Finding of LPI Emitters: Front End Analog Circuit Design and Component Characterization

    Science.gov (United States)

    2016-09-01

    into two parts. The design, development, and testing efforts of the front-end microwave photonics circuit design and the system integration with the...miniature microwave - photonic phase-sampling DF technique is investigated in this thesis. This front-end design uses a combination of integrated optical...NAVAL POSTGRADUATE SCHOOL MONTEREY, CALIFORNIA THESIS Approved for public release. Distribution is unlimited. MICROWAVE

  20. Production of the front-end boards of the LHCb muon system

    CERN Document Server

    Bonivento, W; Auriemma, G

    2008-01-01

    This note describes the production of the front end boards CARDIAC, for the 1368 MWPC, and CARDIAC-GEM, for the 12 triple-GEM chambers, of the LHCb muon system. The PCB structure and component layout and the production issues, such as component soldering, quality assurance at the company and delivery rates, are described. The performance of these boards will be the subject of a future publication.

  1. Test system for the production of the Atlas Tile Calorimeter front-end electronics

    International Nuclear Information System (INIS)

    Calvet, David

    2004-01-01

    The Atlas hadronic Tile Calorimeter front-end electronics is fully included in the so-called 'super-drawers'. The 256 super-drawers needed for the entire calorimeter are assembled and extensively tested in Clermont-Ferrand before being sent to CERN to be inserted in the calorimeter modules. A mobile system has been developed to perform a complete test of the super-drawers during their insertion

  2. Deep sub-micron FD-SOI for front-end application

    International Nuclear Information System (INIS)

    Ikeda, H.; Arai, Y.; Hara, K.; Hayakawa, H.; Hirose, K.; Ikegami, Y.; Ishino, H.; Kasaba, Y.; Kawasaki, T.; Kohriki, T.; Martin, E.; Miyake, H.; Mochizuki, A.; Tajima, H.; Tajima, O.; Takahashi, T.; Takashima, T.; Terada, S.; Tomita, H.; Tsuboyama, T.

    2007-01-01

    In order to confirm benefits of a deep sub-micron FD-SOI and to identify possible issues concerning front-end circuits with the FD-SOI, we have submitted a small design to Oki Electric Industry Co., Ltd. via the multi-chip project service of VDEC, the University of Tokyo. The initial test results and future plans for development are presented

  3. Design and characterization of integrated front-end transistors in a micro-strip detector technology

    International Nuclear Information System (INIS)

    Simi, G.; Angelini, C.; Batignani, G.; Bettarini, S.; Bondioli, M.; Boscardin, M.; Bosisio, L.; Dalla Betta, G.-F.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Morganti, M.; U. Pignatel, G.; Ratti, L.; Re, V.; Rizzo, G.; Speziali, V.; Zorzi, N.

    2002-01-01

    We present the developments in a research program aimed at the realization of silicon micro-strip detectors with front-end electronics integrated in a high resistivity substrate to be used in high-energy physics, space and medical/industrial imaging applications. We report on the fabrication process developed at IRST (Trento, Italy), the characterization of the basic wafer parameters and measurements of the relevant working characteristics of the integrated transistors and related test structures

  4. The front-end (Level-0) electronics interface module for the LHCb RICH detectors

    Energy Technology Data Exchange (ETDEWEB)

    Adinolfi, M. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Bibby, J.H. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Brisbane, S. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Gibson, V. [Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge CB3 0HE (United Kingdom); Harnew, N. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Jones, M. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Libby, J. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom)]. E-mail: j.libby1@physics.ox.ac.uk; Powell, A. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Newby, C. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Rotolo, N. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Smale, N. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Somerville, L.; Sullivan, P.; Topp-Jorgensen, S. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Wotton, S. [Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge CB3 0HE (United Kingdom); Wyllie, K. [CERN, CH-1211, Geneva 23 (Switzerland)

    2007-03-11

    The front-end (Level-0) electronics interface module for the LHCb Ring Imaging Cherenkov (RICH) detectors is described. This module integrates the novel hybrid photon detectors (HPDs), which instrument the RICH detectors, to the LHCb trigger, data acquisition (DAQ) and control systems. The system operates at 40 MHz with a first-level trigger rate of 1 MHz. The module design is presented and results are given for both laboratory and beam tests.

  5. Understanding Managers Decision Making Process for Tools Selection in the Core Front End of Innovation

    DEFF Research Database (Denmark)

    Appio, Francesco P.; Achiche, Sofiane; McAloone, Tim C.

    2011-01-01

    New product development (NPD) describes the process of bringing a new product or service to the market. The Fuzzy Front End (FFE) of Innovation is the term describing the activities happening before the product development phase of NPD. In the FFE of innovation, several tools are used to facilita...... hypotheses are tested. A preliminary version of a theoretical model depicting the decision process of managers during tools selection in the FFE is proposed. The theoretical model is built from the constructed hypotheses....

  6. Front-end data processing using the bit-sliced microprocessor

    International Nuclear Information System (INIS)

    Machen, D.R.

    1979-01-01

    A state-of-the-art computing device, based upon the high-speed bit-sliced microprocessor, was developed into hardware for front-end data processing in both control and experiment applications at the Los Alamos Scientific Laboratory. The CAMAC Instrumentation Standard provides the framework for the high-speed hardware, allowing data acquisition and processing to take place at the data source in a CAMAC crate. 5 figures

  7. Rabbit System. Low cost, high reliability front end electronics featuring 16 bit dynamic range

    International Nuclear Information System (INIS)

    Drake, G.; Droege, T.F.; Nelson, C.A. Jr.; Turner, K.J.; Ohska, T.K.

    1985-10-01

    A new crate-based front end system has been built which features low cost, compact packaging, command capability, 16 bit dynamic range digitization, and a high degree of redundancy. The crate can contain a variety of instrumentation modules, and is designed to be situated close to the detector. The system is suitable for readout of a large number of channels via parallel multiprocessor data acquisition

  8. Beamline front end for in-vacuum short period undulator at the photon factory storage ring

    Energy Technology Data Exchange (ETDEWEB)

    Miyauchi, Hiroshi, E-mail: hiroshi.miyauchi@kek.jp [Accelerator Laboratory, High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Department of Accelerator Science, School of High Energy Accelerator Science, SOKENDAI (The Graduate University for Advanced Studies), 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Tahara, Toshihiro, E-mail: ttahara@post.kek.jp; Asaoka, Seiji, E-mail: seiji.asaoka@kek.jp [Accelerator Laboratory, High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan)

    2016-07-27

    The straight-section upgrade project of the Photon Factory created four new short straight sections capable of housing in-vacuum short period undulators. The first to fourth short period undulators SGU#17, SGU#03, SGU#01 and SGU#15 were installed at the 2.5-GeV Photon Factory storage ring in 2005, 2006, 2009 and 2013, respectively. The beamline front end for SGU#15 is described in this paper.

  9. Preliminary cleaning tests on candidate materials for APS beamline and front end UHV components

    International Nuclear Information System (INIS)

    Nielsen, R.; Kuzay, T.M.

    1992-01-01

    Comparative cleaning tests have been done on four candidate materials for use in APS beamline and front-end vacuum components. These materials are 304 SS, 304L SS, OFHC copper, and Glidcop* (Cu-Al 2 O 3 )- Samples of each material were prepared and cleaned using two different methods. After cleaning, the sample surfaces were analyzed using ESCA (Electron Spectography for Chemical Analysis). Uncleaned samples were used as a reference. The cleaning methods and surface analysis results are further discussed

  10. AMIC: an expandable integrated analog front-end for light distribution moments analysis

    OpenAIRE

    SPAGGIARI, MICHELE; Herrero Bosch, Vicente; Lerche, Christoph Werner; Aliaga Varea, Ramón José; Monzó Ferrer, José María; Gadea Gironés, Rafael

    2011-01-01

    In this article we introduce AMIC (Analog Moments Integrated Circuit), a novel analog Application Specific Integrated Circuit (ASIC) front-end for Positron Emission Tomography (PET) applications. Its working principle is based on mathematical analysis of light distribution through moments calculation. Each moment provides useful information about light distribution, such as energy, position, depth of interaction, skewness (deformation due to border effect) etc. A current buffer delivers a cop...

  11. A differential low-voltage high gain current-mode integrated RF receiver front-end

    Energy Technology Data Exchange (ETDEWEB)

    Wang Chunhua; Ma Minglin; Sun Jingru; Du Sichun; Guo Xiaorong; He Haizhen, E-mail: wch1227164@sina.com [School of Information Science and Technology, Hunan University, Changsha 410082 (China)

    2011-02-15

    A differential low-voltage high gain current-mode integrated RF front end for an 802.11b WLAN is proposed. It contains a differential transconductance low noise amplifier (G{sub m}-LNA) and a differential current-mode down converted mixer. The single terminal of the G{sub m}-LNA contains just one MOS transistor, two capacitors and two inductors. The gate-source shunt capacitors, C{sub x1} and C{sub x2}, can not only reduce the effects of gate-source C{sub gs} on resonance frequency and input-matching impedance, but they also enable the gate inductance L{sub g1,2} to be selected at a very small value. The current-mode mixer is composed of four switched current mirrors. Adjusting the ratio of the drain channel sizes of the switched current mirrors can increase the gain of the mixer and accordingly increase the gain of RF receiver front-end. The RF front-end operates under 1 V supply voltage. The receiver RFIC was fabricated using a chartered 0.18 {mu}m CMOS process. The integrated RF receiver front-end has a measured power conversion gain of 17.48 dB and an input referred third-order intercept point (IIP3) of -7.02 dBm. The total noise figure is 4.5 dB and the power is only 14 mW by post-simulations. (semiconductor integrated circuits)

  12. The front-end (Level-0) electronics interface module for the LHCb RICH detectors

    International Nuclear Information System (INIS)

    Adinolfi, M.; Bibby, J.H.; Brisbane, S.; Gibson, V.; Harnew, N.; Jones, M.; Libby, J.; Powell, A.; Newby, C.; Rotolo, N.; Smale, N.; Somerville, L.; Sullivan, P.; Topp-Jorgensen, S.; Wotton, S.; Wyllie, K.

    2007-01-01

    The front-end (Level-0) electronics interface module for the LHCb Ring Imaging Cherenkov (RICH) detectors is described. This module integrates the novel hybrid photon detectors (HPDs), which instrument the RICH detectors, to the LHCb trigger, data acquisition (DAQ) and control systems. The system operates at 40 MHz with a first-level trigger rate of 1 MHz. The module design is presented and results are given for both laboratory and beam tests

  13. Web-based DAQ systems: connecting the user and electronics front-ends

    Science.gov (United States)

    Lenzi, Thomas

    2016-12-01

    Web technologies are quickly evolving and are gaining in computational power and flexibility, allowing for a paradigm shift in the field of Data Acquisition (DAQ) systems design. Modern web browsers offer the possibility to create intricate user interfaces and are able to process and render complex data. Furthermore, new web standards such as WebSockets allow for fast real-time communication between the server and the user with minimal overhead. Those improvements make it possible to move the control and monitoring operations from the back-end servers directly to the user and to the front-end electronics, thus reducing the complexity of the data acquisition chain. Moreover, web-based DAQ systems offer greater flexibility, accessibility, and maintainability on the user side than traditional applications which often lack portability and ease of use. As proof of concept, we implemented a simplified DAQ system on a mid-range Spartan6 Field Programmable Gate Array (FPGA) development board coupled to a digital front-end readout chip. The system is connected to the Internet and can be accessed from any web browser. It is composed of custom code to control the front-end readout and of a dual soft-core Microblaze processor to communicate with the client.

  14. Radiological and environmental safety in front-end fuel cycle facilities

    International Nuclear Information System (INIS)

    Puranik, V.D.

    2011-01-01

    The front end nuclear fuel cycle comprises of mining and processing of beach mineral sands along the southern coast of Kerala, Tamilnadu and Orissa, mining and processing of uranium ore in Singhbhum-East in Jharkhand and refining and fuel fabrication at Hyderabad. The Health Physics Units (HPUs)/Environmental Survey Laboratories (ESLs) set up at each site from inception of operation to carry out regular in-plant, personnel monitoring and environmental surveillance to ensure safe working conditions, evaluate radiation exposure of workers, ensure compliance with statutory norms, help in keeping the environmental releases well within the limits and advise appropriate control measures. This paper describes the occupational and environmental radiological safety measures associated with the operations of front end of nuclear fuel cycle. Radiological monitoring in these facilities is important to ensure safe working environment, protection of workers against exposure to radiation and comply with regulatory limits of exposure. The radiation exposure of workers in different units of the front end nuclear fuels cycle facilities operated by IREL, UCIL and NFC and environmental monitoring results are summarised in this paper

  15. Towards an Intelligent Acoustic Front End for Automatic Speech Recognition: Built-in Speaker Normalization

    Directory of Open Access Journals (Sweden)

    Umit H. Yapanel

    2008-08-01

    Full Text Available A proven method for achieving effective automatic speech recognition (ASR due to speaker differences is to perform acoustic feature speaker normalization. More effective speaker normalization methods are needed which require limited computing resources for real-time performance. The most popular speaker normalization technique is vocal-tract length normalization (VTLN, despite the fact that it is computationally expensive. In this study, we propose a novel online VTLN algorithm entitled built-in speaker normalization (BISN, where normalization is performed on-the-fly within a newly proposed PMVDR acoustic front end. The novel algorithm aspect is that in conventional frontend processing with PMVDR and VTLN, two separating warping phases are needed; while in the proposed BISN method only one single speaker dependent warp is used to achieve both the PMVDR perceptual warp and VTLN warp simultaneously. This improved integration unifies the nonlinear warping performed in the front end and reduces simultaneously. This improved integration unifies the nonlinear warping performed in the front end and reduces computational requirements, thereby offering advantages for real-time ASR systems. Evaluations are performed for (i an in-car extended digit recognition task, where an on-the-fly BISN implementation reduces the relative word error rate (WER by 24%, and (ii for a diverse noisy speech task (SPINE 2, where the relative WER improvement was 9%, both relative to the baseline speaker normalization method.

  16. VME as a front-end electronics system in high energy physics experiments

    International Nuclear Information System (INIS)

    Ohska, T.K.

    1990-01-01

    It is only a few years since the VME became a standard system, yet the VME system is already so much more popular than other systems. The VME system was developed for industrial applications and not for the scientific research, and high energy physics field is a tiny market when compared with the industrial market. Considerations made here indicate that the VME system would be a good one for a rear-end system, but would not be a good candidate for front-end electronics in physics experiments. Furthermore, there is a fear that the VXI bus could become popular in this field of instrumentation since the VXI system is backed up by major suppliers of instrumentation in the high energy physics field. VXI would not be an adequate system for front-end electronics, yet advertised to be one. It would be worse to see the VXI system to become a standard system for high energy physics instrumentation than the VME system to be one. The VXI system would do a mediocre job so that people might be misled to think that the VXI system can be used as front-end system. (N.K.)

  17. Front-end DAQ strategy and implementation for the KLOE-2 experiment

    Science.gov (United States)

    Branchini, P.; Budano, A.; Balla, A.; Beretta, M.; Ciambrone, P.; De Lucia, E.; D'Uffizi, A.; Marciniewski, P.

    2013-04-01

    A new front-end data acquisition (DAQ) system has been conceived for the data collection of the new detectors which will be installed by the KLOE2 collaboration. This system consists of a general purpose FPGA based DAQ module and a VME board hosting up to 16 optical links. The DAQ module has been built around a Virtex-4 FPGA and it is able to acquire up to 1024 different channels distributed over 16 front-end slave cards. Each module is a general interface board (GIB) which performs also first level data concentration tasks. The GIB has an optical interface, a RS-232, an USB and a Gigabit Ethernet Interface. The optical interface will be used for DAQ purposes while the Gigabit Ethernet interface for monitoring tasks and debug. Two new detectors exploit this strategy to collect data. Optical links are used to deliver data to the VME board which performs data concentration tasks. The return optical link from the board to the GIB is used to initialize the front-end cards. The VME interface of the module implements the VME 2eSST protocol in order to sustain a peak data rate of up to 320 MB/s. At the moment the system is working at the Frascati National Laboratory (LNF).

  18. Web-based DAQ systems: connecting the user and electronics front-ends

    International Nuclear Information System (INIS)

    Lenzi, Thomas

    2016-01-01

    Web technologies are quickly evolving and are gaining in computational power and flexibility, allowing for a paradigm shift in the field of Data Acquisition (DAQ) systems design. Modern web browsers offer the possibility to create intricate user interfaces and are able to process and render complex data. Furthermore, new web standards such as WebSockets allow for fast real-time communication between the server and the user with minimal overhead. Those improvements make it possible to move the control and monitoring operations from the back-end servers directly to the user and to the front-end electronics, thus reducing the complexity of the data acquisition chain. Moreover, web-based DAQ systems offer greater flexibility, accessibility, and maintainability on the user side than traditional applications which often lack portability and ease of use. As proof of concept, we implemented a simplified DAQ system on a mid-range Spartan6 Field Programmable Gate Array (FPGA) development board coupled to a digital front-end readout chip. The system is connected to the Internet and can be accessed from any web browser. It is composed of custom code to control the front-end readout and of a dual soft-core Microblaze processor to communicate with the client.

  19. Front-end DAQ strategy and implementation for the KLOE-2 experiment

    International Nuclear Information System (INIS)

    Branchini, P; Budano, A; Balla, A; Beretta, M; Ciambrone, P; Lucia, E De; D'Uffizi, A; Marciniewski, P

    2013-01-01

    A new front-end data acquisition (DAQ) system has been conceived for the data collection of the new detectors which will be installed by the KLOE2 collaboration. This system consists of a general purpose FPGA based DAQ module and a VME board hosting up to 16 optical links. The DAQ module has been built around a Virtex-4 FPGA and it is able to acquire up to 1024 different channels distributed over 16 front-end slave cards. Each module is a general interface board (GIB) which performs also first level data concentration tasks. The GIB has an optical interface, a RS-232, an USB and a Gigabit Ethernet Interface. The optical interface will be used for DAQ purposes while the Gigabit Ethernet interface for monitoring tasks and debug. Two new detectors exploit this strategy to collect data. Optical links are used to deliver data to the VME board which performs data concentration tasks. The return optical link from the board to the GIB is used to initialize the front-end cards. The VME interface of the module implements the VME 2eSST protocol in order to sustain a peak data rate of up to 320 MB/s. At the moment the system is working at the Frascati National Laboratory (LNF).

  20. 45 Gb/s low complexity optical front-end for soft-decision LDPC decoders.

    Science.gov (United States)

    Sakib, Meer Nazmus; Moayedi, Monireh; Gross, Warren J; Liboiron-Ladouceur, Odile

    2012-07-30

    In this paper a low complexity and energy efficient 45 Gb/s soft-decision optical front-end to be used with soft-decision low-density parity-check (LDPC) decoders is demonstrated. The results show that the optical front-end exhibits a net coding gain of 7.06 and 9.62 dB for post forward error correction bit error rate of 10(-7) and 10(-12) for long block length LDPC(32768,26803) code. The performance over a hard decision front-end is 1.9 dB for this code. It is shown that the soft-decision circuit can also be used as a 2-bit flash type analog-to-digital converter (ADC), in conjunction with equalization schemes. At bit rate of 15 Gb/s using RS(255,239), LDPC(672,336), (672, 504), (672, 588), and (1440, 1344) used with a 6-tap finite impulse response (FIR) equalizer will result in optical power savings of 3, 5, 7, 9.5 and 10.5 dB, respectively. The 2-bit flash ADC consumes only 2.71 W at 32 GSamples/s. At 45 GSamples/s the power consumption is estimated to be 4.95 W.

  1. Resource intensities of the front end of the nuclear fuel cycle

    International Nuclear Information System (INIS)

    Schneider, E.; Phathanapirom, U.; Eggert, R.; Collins, J.

    2013-01-01

    This paper presents resource intensities, including direct and embodied energy consumption, land and water use, associated with the processes comprising the front end of the nuclear fuel cycle. These processes include uranium extraction, conversion, enrichment, fuel fabrication and depleted uranium de-conversion. To the extent feasible, these impacts are calculated based on data reported by operating facilities, with preference given to more recent data based on current technologies and regulations. All impacts are normalized per GWh of electricity produced. Uranium extraction is seen to be the most resource intensive front end process. Combined, the energy consumed by all front end processes is equal to less than 1% of the electricity produced by the uranium in a nuclear reactor. Land transformation and water withdrawals are calculated at 8.07 m 2 /GWh(e) and 1.37x10 5 l/GWh(e), respectively. Both are dominated by the requirements of uranium extraction, which accounts for over 70% of land use and nearly 90% of water use

  2. Anode front-end electronics for the cathode strip chambers of the CMS Endcap Muon detector

    International Nuclear Information System (INIS)

    Ferguson, T.; Bondar, N.; Golyash, A.; Sedov, V.; Terentiev, N.; Vorobiev, I.

    2005-01-01

    The front-end electronics system for the anode signals of the CMS Endcap Muon cathode strip chambers has about 183,000 channels. The purposes of the anode front-end electronics are to acquire precise muon timing information for bunch crossing number identification at the Level-1 muon trigger system and to provide a coarse radial position of the muon track. Each anode channel consists of an input protection network, amplifier, shaper, constant-fraction discriminator, and a programmable delay. The essential parts of the electronics include a 16-channel amplifier-shaper-discriminator ASIC CMP16 and a 16-channel ASIC D16G providing programmable time delay. The ASIC CMP16 was optimized for the large cathode chamber size (up to 3x2.5 m 2 ) and for the large input capacitance (up to 200 pF). The ASIC combines low power consumption (30 mW/channel) with good time resolution (2-3 ns). The delay ASIC D16G makes possible the alignment of signals with an accuracy of 2.2 ns. This paper presents the anode front-end electronics structure and results of the preproduction and the mass production tests, including radiation resistance and reliability tests. The special set of test equipment, techniques, and corresponding software developed and used in the test procedures are also described

  3. Towards an Intelligent Acoustic Front End for Automatic Speech Recognition: Built-in Speaker Normalization

    Directory of Open Access Journals (Sweden)

    Yapanel UmitH

    2008-01-01

    Full Text Available A proven method for achieving effective automatic speech recognition (ASR due to speaker differences is to perform acoustic feature speaker normalization. More effective speaker normalization methods are needed which require limited computing resources for real-time performance. The most popular speaker normalization technique is vocal-tract length normalization (VTLN, despite the fact that it is computationally expensive. In this study, we propose a novel online VTLN algorithm entitled built-in speaker normalization (BISN, where normalization is performed on-the-fly within a newly proposed PMVDR acoustic front end. The novel algorithm aspect is that in conventional frontend processing with PMVDR and VTLN, two separating warping phases are needed; while in the proposed BISN method only one single speaker dependent warp is used to achieve both the PMVDR perceptual warp and VTLN warp simultaneously. This improved integration unifies the nonlinear warping performed in the front end and reduces simultaneously. This improved integration unifies the nonlinear warping performed in the front end and reduces computational requirements, thereby offering advantages for real-time ASR systems. Evaluations are performed for (i an in-car extended digit recognition task, where an on-the-fly BISN implementation reduces the relative word error rate (WER by 24%, and (ii for a diverse noisy speech task (SPINE 2, where the relative WER improvement was 9%, both relative to the baseline speaker normalization method.

  4. Front-end electronics for accurate energy measurement of double beta decays

    International Nuclear Information System (INIS)

    Gil, A.; Díaz, J.; Gómez-Cadenas, J.J.; Herrero, V.; Rodriguez, J.; Serra, L.; Toledo, J.; Esteve, R.; Monzó, J.M.; Monrabal, F.; Yahlali, N.

    2012-01-01

    NEXT, a double beta decay experiment that will operate in Canfranc Underground Laboratory (Spain), aims at measuring the neutrinoless double-β decay of the 136Xe isotope using a TPC filled with enriched Xenon gas at high pressure operated in electroluminescence mode. One technological challenge of the experiment is to achieve resolution better than 1% in the energy measurement using a plane of UV sensitive photomultipliers readout with appropriate custom-made front-end electronics. The front-end is designed to be sensitive to the single photo-electron to detect the weak primary scintillation light produced in the chamber, and also to be able to cope with the electroluminescence signal (several hundred times higher and with a duration of microseconds). For efficient primary scintillation detection and precise energy measurement of the electroluminescent signals the front-end electronics features low noise and adequate amplification. The signal shaping provided allows the digitization of the signals at a frequency as low as 40 MHz.

  5. Design and simulation of front end power converter for a microgrid with fuel cells and solar power sources

    Science.gov (United States)

    Jeevargi, Chetankumar; Lodhi, Anuj; Sateeshkumar, Allu; Elangovan, D.; Arunkumar, G.

    2017-11-01

    The need for Renewable Energy Sources (RES) is increasing due to increased demand for the supply of power and it is also environment friendly.In the recent few years, the cost of generation of the power from the RES has been decreased. This paper aims to design the front end power converter which is required for integrating the fuel cells and solar power sources to the micro grid. The simulation of the designed front end converter is carried out in the PSIM 9.1.1 software. The results show that the designed front end power converter is sufficient for integrating the micro grid with fuel cells and solar power sources.

  6. First test results from the Front-End Board with Cyclone V as a test high-resolution platform for the Auger-Beyond-2015 Front End Electronics

    Energy Technology Data Exchange (ETDEWEB)

    Szadkowski, Zbigniew [University of Lodz, Department of Physics and Applied Informatics, Faculty of High-Energy Astrophysics, 90-236 Lodz, Pomorska 149, (Poland)

    2015-07-01

    The paper presents the first results from the Front- End Board (FEB) with the biggest Cyclone{sup R} V E FPGA 5CEFA9F31I7N, supporting 8 channels sampled up to 250 MSps at 14-bit resolution. Considered sampling for the SD is 120 MSps, however, the FEB has been developed with external anti-aliasing filters to keep a maximal flexibility. Six channels are targeted to the SD, two the rest for other experiments like: Auger Engineering Radio Array and additional muon counters. More channels and higher sampling generate larger size of registered events. We used the standard radio channel for a radio transmission from the detectors to the Central Data Acquisition Station (CDAS) to avoid at present a significant modification of a software in both sides: the detector and the CDAS (planned in a future for a final design). Seven FEBs have been deployed in the test detectors on a dedicated Engineering Array in a hexagon. Several variants of the FPGA code were tested for 120, 160, 200 and even 240 MSps DAQ. Tests confirmed a stability and reliability of the FEB design in real pampas conditions with more than 40 deg. C daily temperature variation and a strong sun exposition with a limited power budget only from a single solar panel. (authors)

  7. LHCb: Test Station for the LHCb Muon Front-End Electronic

    CERN Multimedia

    Polycarpo, E

    2005-01-01

    The LHCb Muon Group has developed the CMOS ASIC CARIOCA to readout its Multiwire Proportional Chambers (MWPC) and GEM detectors, using a rad-hard IBM 0.25um process. Each ASIC holds 8 identical current-mode ASDB channels with individual input thresholds. The Muon detector contains around 120000 physical channels, requiring production of 20000 front-end chips, roughly. CARIOCA has been developed to process MWPC cathode and anode signals and two different versions have been implemented to overcome the requirement of MWP and GEM chambers operation. The test station has been devised to accomplish bipolar tests and to measure characteristics of both CARIOCA versions.

  8. Parallel and pipelined front-end for multi-element silicon detectors in scanning electron microscopy

    International Nuclear Information System (INIS)

    Boulin, C.; Epstein, A.

    1992-01-01

    This paper discusses a silicon quadrant detector (128 elements) implemented as an electron detector in a Scanning Transmission Electron Microscope. As the electron beam scans over the sample, electrons are counted during each pixel. The authors developed an ASIC for the multichannel counting system. The digital front-end carries out the readout of all elements, in four groups, and uses these data to compute linear combinations to generate up to eight simultaneous images. For the preprocessing the authors implemented a parallel and pipelined system. Dedicated software tools were developed to generate the programs for all the processors. These tools are transparently accessed by the user via a user friendly interface

  9. Investigation of characteristics and radiation hardness of the Beetle 1.0 front-end chip

    CERN Document Server

    Van Bakel, N; Jans, E; Klous, S; Verkooijen, H

    2001-01-01

    Noise characteristics of the Beetle 1.0 front-end chip have been investigated as a function of input capacitance. Values for the equivalent noise charge and ballastic deficit have been extracted. Amplification and pulse shape have been studied by varying the bias settings over a wide range. Results are compared with simulations that include realistic impedances at the input and output. The chip has been subjected to 10 Mrad of radiation. Subsequently, its behaviour is measured again and compared to that preceeding the irradiation. Observed radiation damage effects are discussed.

  10. Simulation of wind power with front-end converter into interconnected grid system

    Directory of Open Access Journals (Sweden)

    Sharad W. Mohod

    2009-09-01

    Full Text Available In the growing electricity supply industry and open access market for electricity worldwide, renewable sources are getting added into the grid system. This affects the grid power quality. To assess the impact on grid due to wind energy integration, the knowledge of electrical characteristic of wind turbine and associated control equipments are required. The paper presents a simulation set-up for wind turbine in MATLAB / SIMULINK, with front end converter and interconnected system. The presented control scheme provides the wind power flow to the grid through a converter. The injected power in the system at the point of common coupling is ensured within the power quality norms.

  11. Overview of the front end electronics for the Atlas LAR calorimeter

    International Nuclear Information System (INIS)

    Rescia, S.

    1997-11-01

    Proposed experiments for the Large Hadron Collider (LHC) set new demands on calorimeter readout electronics. The very high energy and large luminosity of the collider call for a large number of high speed, large dynamic range readout channels which have to be carefully synchronized. The ATLAS liquid argon collaboration, after more than 5 years of R and D developments has now finalized the architecture of its front end and read-out electronics, which have been written down in its Technical Design Report (TDR). An overview is presented

  12. The Front End Electronics of the Scintillator Pad Detector of LHCb Calorimeter

    CERN Document Server

    Gascon, David; Bota, S; Comerma, A; Diéguez, A; Garrido, L; Gaspar, A; Graciani, R; Graciani, E; Herms, A; Llorens, M; Luengo, S; Picatoste, E; Riera, J; Rosselló, M; Ruiz, H; Tortella, S; Vilasís, X

    2007-01-01

    In this paper the Front End electronics of the Scintillator Pad Detector (SPD) is outlined. The SPD is a sub-system of the Calorimeter of the LHCb experiment designed to discriminate between charged and neutral particles for the first level trigger. The system design is presented, describing its different functionalities implemented through three different cards and several ASICs. These functionalities are signal processing and digitization, data transmission, interface with control and timing systems of the experiment, low voltage power supply distribution and monitoring. Special emphasis is placed on installation and commissioning subjects such as cabling, grounding, shielding and power distribution.

  13. A front-end ASIC for ionising radiation monitoring with femto-amp capabilities

    International Nuclear Information System (INIS)

    Voulgari, E.; Noy, M.; Anghinolfi, F.; Perrin, D.; Krummenacher, F.; Kayal, M.

    2016-01-01

    An ultra-low leakage current Application Specific Integrated Circuit (ASIC) called Utopia (Ultralow Picoammeter) has been designed and fabricated in AMS 0.35 μm CMOS, in order to be used as the front-end for ionising radiation monitoring at CERN. It is based on the topology of a Current to Frequency Converter (CFC) through charge balancing and demonstrates a wide dynamic range of 8.5 decades without range changing. Due to a design aimed at minimising input leakage currents, input currents as low as 01 fA can be measured

  14. A new wire chamber front-end system, based on the ASD-8 B chip

    International Nuclear Information System (INIS)

    Kruesemann, B.A.M.; Bassini, R.; Ellinghaus, F.; Frekers, D.; Hagemann, M.; Hannen, V.M.; Heynitz, H. von; Heyse, J.; Rakers, S.; Sohlbach, H.; Woertche, H.J.

    1999-01-01

    The Focal-Plane Polarimeter (FPP) for the Big-Bite Spectrometer van den Berg (Nucl. Instr. and Meth. B 99 (1995) 637ff) at the KVI requires the read-out of four large-area MWPCs and two VDCs with 3872 wires in total. The EUROSUPERNOVA collaboration (SNOVA) developed a digital 16 channel preamplifier front-end board, housing two amplifier-shaper-discriminatorchips ASD-8 B. The main features of this board are a fast single-wire readout, a high integration density, a low power consumption and compatibility to common instrumentation standards. The board represents the first successfully running application of the ASD-8 for wire chamber readout. (author)

  15. Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

    International Nuclear Information System (INIS)

    Kim, D.; Rinella, G. Aglieri; Cavicchioli, C.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kofarago, M.; Kugathasan, T.; Mager, M.; Chanlek, N.; Collu, A.; Degerli, Y.; Flouzat, C.; Guilloux, F.; Dorokhov, A.; Gajanana, D.; Gao, C.; Kwon, Y.; Lattuca, A.

    2016-01-01

    ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m 2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented

  16. Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

    Science.gov (United States)

    Kim, D.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Lattuca, A.; Mager, M.; Sielewicz, K. M.; Marin Tobon, C. A.; Marras, D.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Pham, T. H.; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. W.; Yang, P.

    2016-02-01

    ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented.

  17. A CMOS self-powered front-end architecture for subcutaneous event-detector devices

    CERN Document Server

    Colomer-Farrarons, Jordi

    2011-01-01

    A CMOS Self-Powered Front-End Architecture for Subcutaneous Event-Detector Devices presents the conception and prototype realization of a Self-Powered architecture for subcutaneous detector devices. The architecture is designed to work as a true/false (event detector) or threshold level alarm of some substances, ions, etc. that are detected through a three-electrodes amperometric BioSensor approach. The device is conceived as a Low-Power subcutaneous implantable application powered by an inductive link, one emitter antenna at the external side of the skin and the receiver antenna under the ski

  18. Performance of a fast low noise front-end preamplifier for the MAGIC imaging Cherenkov telescope

    International Nuclear Information System (INIS)

    Blanch, O.; Blanchot, G.; Bosman, M.

    1999-01-01

    The observation of high energy cosmic gamma rays with an energy threshold of 15 GeV using the proposed MAGIC ground based air imaging Cherenkov telescope requires the development of new low noise fast preamplifiers for the camera photosensors. The speed and noise performance of a transimpedance preamplifier that resolves the multi photoelectron peaks from a hybrid photomultiplier with a peaking time below 7 ns is presented. The new front-end circuit is designed with RF low noise bipolar transistors and provides fast output pulses that allow for fast trigger settings

  19. Digital front-end electronics for COMPASS Muon-Wall 1 detector

    International Nuclear Information System (INIS)

    Alekseev, G.D.; Zhuravlev, N.I.; Maggiora, A.

    2005-01-01

    The digital front-end electronics for the COMPASS Muon-Wall 1 (CERN) detector is described. The digital card has been designed on the basis of the TDC chip F1. One card includes 6 F1 chips (192 channels), bus arbiter, DAC, power supply distribution, hot-link interface. The total number of the digital cards in the system is 44 housed in 5 euro-crates (6U), the total number of readout channels is 8448. The electronics has been designed by the Dzhelepov Laboratory of Nuclear Problems (JINR) and INFN (Torino, Italy) experts

  20. Characterization of front-end electronics for CZT based handheld radioisotope identifier

    Energy Technology Data Exchange (ETDEWEB)

    Lombigit, L., E-mail: lojius@nm.gov.my [Malaysian Nuclear Agency, Bangi, 43000 Kajang, Selangor (Malaysia); Rahman, Nur Aira Abd; Mohamad, Glam Hadzir Patai; Ibrahim, Maslina Mohd; Yussup, Nolida; Yazid, Khairiah; Jaafar, Zainudin

    2016-01-22

    A radioisotope identifier device based on large volume Co-planar grid CZT detector is current under development at Malaysian Nuclear Agency. This device is planned to be used for in-situ identification of radioisotopes based on their unique energies. This work reports on electronics testing performed on the front-end electronics (FEE) analog section comprising charge sensitive preamplifier-pulse shaping amplifier chain. This test involves measurement of charge sensitivity, pulse parameters and electronics noise. This report also present some preliminary results on the spectral measurement obtained from gamma emitting radioisotopes.

  1. The front end test stand high performance H- ion source at Rutherford Appleton Laboratory.

    Science.gov (United States)

    Faircloth, D C; Lawrie, S; Letchford, A P; Gabor, C; Wise, P; Whitehead, M; Wood, T; Westall, M; Findlay, D; Perkins, M; Savage, P J; Lee, D A; Pozimski, J K

    2010-02-01

    The aim of the front end test stand (FETS) project is to demonstrate that chopped low energy beams of high quality can be produced. FETS consists of a 60 mA Penning Surface Plasma Ion Source, a three solenoid low energy beam transport, a 3 MeV radio frequency quadrupole, a chopper, and a comprehensive suite of diagnostics. This paper details the design and initial performance of the ion source and the laser profile measurement system. Beam current, profile, and emittance measurements are shown for different operating conditions.

  2. Tester of the TRT front-end electronics for the ATLAS-experiment

    CERN Document Server

    Hajduk, Z; Kisielewski, B; Kotarba, A; Malecki, P; Natkaniec, Z; Olszowska, J; Ostrowicz, W; Krupinska, G

    2000-01-01

    The VME based tester for front-end electronics of the TRT (Transition Radiation Tracker) detector of the ATLAS-LHC experiment at CERN, Geneva, is described. The TRT read-out electronics for 424576 proportional tubes grouped on many thousands of cards requires stringent quality control after assembly and during installation. The tester provides all required data, pulses, timing and power supplies for tested cards. The essential part of the tester is its software that allows for device handling as well as facilitates functional and statistical tests. The prototype, present design as well as the new design for mass production tests are discussed. (17 refs).

  3. Development of ATLAS Liquid Argon Calorimeter Front-end Electronics for the HL-LHC

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00219286; The ATLAS collaboration

    2016-01-01

    The high-luminosity phase of the Large Hadron Collider will provide 5-7 times greater luminosities than assumed in the original detector design. An improved trigger system requires an upgrade of the readout electronics of the ATLAS Liquid Argon Calorimeter. Concepts for the future readout of the 182,500 calorimeter channels at 40-80 MHz and 16-bit dynamic range and the developments of radiation-tolerant, low-noise, low-power, and high-bandwidth front-end electronic components, including preamplifiers and shapers, 14-bit ADCs, and 10-Gb/s laser diode array drivers, are presented.

  4. The TOTEM front end driver, its components and applications in the TOTEM experiment

    OpenAIRE

    Antchev G; Aspell P; Barney D; Reynaud S; Snoeys W; Vichoudis P

    2007-01-01

    The TOTEM Front End Driver, so-called TOTFED, receives and handles trigger building and tracking data from the TOTEM detectors, and interfaces to the global trigger and data acquisition systems. The TOTFED is based on the VME64x standard and has deliberately been kept modular. It is very flexible and programmable to deal with the different TOTEM sub-detectors and possible evolution of the data treatment and trigger algorithms over the duration of the experiment. The main objectives for each u...

  5. A new design for SLAM front-end based on recursive SOM

    Science.gov (United States)

    Yang, Xuesi; Xia, Shengping

    2015-12-01

    Aiming at the graph optimization-based monocular SLAM, a novel design for the front-end in single camera SLAM is proposed, based on the recursive SOM. Pixel intensities are directly used to achieve image registration and motion estimation, which can save time compared with the current appearance-based frameworks, usually including feature extraction and matching. Once a key-frame is identified, a recursive SOM is used to actualize loop-closure detecting, resulting a more precise location. The experiment on a public dataset validates our method on a computer with a quicker and effective result.

  6. Absolute moisture sensing for cotton bales

    Science.gov (United States)

    With the recent prevalence of moisture restoration systems in cotton gins, more and more gins are putting moisture back into the bales immediately before the packaging operation. There are two main reasons for this recent trend, the first is that it has been found that added moisture at the bale pre...

  7. Microwave moisture sensing of wet bales

    Science.gov (United States)

    Sensing of moisture in very wet lint bales is unique due to the fact that moisture distribution is typically non-uniform and can in some instances be highly localized. This issue is even further complicated by the use of a sensor that reads only a portion of the bale and/or with a sensor that provid...

  8. FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades

    International Nuclear Information System (INIS)

    Anderson, J; Drake, G; Ryu, S; Zhang, J; Borga, A; Boterenbrood, H; Schreuder, F; Vermeulen, J; Chen, H; Chen, K; Lanni, F; Francis, D; Gorini, B; Miotto, G Lehmann; Schumacher, J; Vandelli, W; Levinson, L; Narevicius, J; Roich, A; Plessl, C

    2015-01-01

    The ATLAS experiment at CERN is planning full deployment of a new unified optical link technology for connecting detector front end electronics on the timescale of the LHC Run 4 (2025). It is estimated that roughly 8000 GBT (GigaBit Transceiver) links, with transfer rates up to 10.24 Gbps, will replace existing links used for readout, detector control and distribution of timing and trigger information. A new class of devices will be needed to interface many GBT links to the rest of the trigger, data-acquisition and detector control systems. In this paper FELIX (Front End LInk eXchange) is presented, a PC-based device to route data from and to multiple GBT links via a high-performance general purpose network capable of a total throughput up to O(20 Tbps). FELIX implies architectural changes to the ATLAS data acquisition system, such as the use of industry standard COTS components early in the DAQ chain. Additionally the design and implementation of a FELIX demonstration platform is presented and hardware and software aspects will be discussed. (paper)

  9. CPRF/ZTH front-end torus design and fabrication status

    International Nuclear Information System (INIS)

    Ballard, E.O.; Baker, C.; Gomez, T.; Prince, P.P.; Smith, R.L.

    1989-01-01

    Design of the ZTH front-end torus has been completed for a new generation Reversed Field Pinch (RFP) machine to be assembled at Los Alamos National Laboratory during FY 92. The Confinement Physics Research Facility (CPRF) houses the ZTH front-end torus. The ZTH torus consists of an Inconel 625 vacuum vessel supported by an external electrically conducting 304L stainless steel shell. Interspace support rings support the vacuum vessel to the shell and also provide accurate radial support for the interspace electrical diagnostics. The shell also supports 48 toroidal field coils that are mounted to the shell's external surface. The shell consists of an explosion bonded stainless steel-copper composite with water-cooling tube assemblies attached to the outer surface. The 0.135-in. thick copper is on the inside surface of the shell, and provides an electrically conducting path with the required electrical time constant of 50 ms. The shell plate will be formed to the required toroidal configuration, after which the poloidal and toroidal flanges will be welded to the structure and machined. The Inconel vacuum vessel consists of bellows segments, armor support rings, and diagnostic stations welded together to form the complete vacuum vessel assembly. The necessity for accurate positioning of the vacuum vessel within the shell requires that the shell and vacuum vessel be fabricated with major diameter tolerances within 0.050-in. true position of the nominal diameters of 188.0-in. and 188.820-in., respectively. 7 figs

  10. Front-end Electronics for Unattended Measurement (FEUM). Results of Prototype Evaluation

    Energy Technology Data Exchange (ETDEWEB)

    Conrad, Ryan C. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Keller, Daniel T. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Morris, Scott J. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Smith, Leon E. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States)

    2015-07-01

    The International Atomic Energy Agency (IAEA) deploys unattended monitoring systems to provide continuous monitoring of nuclear material within safeguarded facilities around the world. As the number of unattended monitoring instruments increases, the IAEA is challenged to become more efficient in the implementation of those systems. In 2010, the IAEA initiated the Front-End Electronics for Unattended Measurement (FEUM) project with the goals of greater flexibility in the interfaces to various sensors and data acquisition systems, and improved capabilities for remotely located sensors (e.g., where sensor and front-end electronics might be separated by tens of meters). In consultation with the IAEA, a technical evaluation of a candidate FEUM device produced by a commercial vendor has been performed. This evaluation assessed the device against the IAEA’s original technical specifications and a broad range of important parameters that include sensor types, cable lengths and types, industrial electromagnetic noise that can degrade signals from remotely located detectors, and high radiation fields. Testing data, interpretation, findings and recommendations are provided.

  11. Fast front-end electronics for semiconductor tracking detectors: Trends and perspectives

    Energy Technology Data Exchange (ETDEWEB)

    Rivetti, Angelo

    2014-11-21

    In the past few years, extensive research efforts pursued by both the industry and the academia have lead to major improvements in the performance of Analog to Digital Converters (ADCs) and Time to Digital Converters (TDCs). ADCs achieving 8–10 bit resolution, 50–100 MHz conversion frequency and less than 1 mW power consumption are the today's standard, while TDCs have reached sub-picosecond time resolution. These results have been made possible by architectural upgrades combined with the use of ultra deep submicron CMOS technologies with minimum feature size of 130 nm or smaller. Front-end ASICs in which a prompt digitization is followed by signal conditioning in the digital domain can now be envisaged also within the tight power budget typically available in high density tracking systems. Furthermore, tracking detectors embedding high resolution timing capabilities are gaining interest. In the paper, ADC's and TDC's developments which are of particular relevance for the design front-end electronics for semiconductor trackers are discussed along with the benefits and challenges of exploiting such high performance building blocks in implementing the next generation of ASICs for high granularity particle detectors.

  12. Insulating electrodes: a review on biopotential front ends for dielectric skin–electrode interfaces

    International Nuclear Information System (INIS)

    Spinelli, Enrique; Haberman, Marcelo

    2010-01-01

    Insulating electrodes, also known as capacitive electrodes, allow acquiring biopotentials without galvanic contact with the body. They operate with displacement currents instead of real charge currents, and the electrolytic electrode–skin interface is replaced by a dielectric film. The use of insulating electrodes is not the end of electrode interface problems but the beginning of new ones: coupling capacitances are of the order of pF calling for ultra-high input impedance amplifiers and careful biasing, guarding and shielding techniques. In this work, the general requirements of front ends for capacitive electrodes are presented and the different contributions to the overall noise are discussed and estimated. This analysis yields that noise bounds depend on features of the available devices as current and voltage noise, but the final noise level also depends on parasitic capacitances, requiring a careful shield and printed circuit design. When the dielectric layer is placed on the skin, the present-day amplifiers allow achieving noise levels similar to those provided by wet electrodes. Furthermore, capacitive electrode technology allows acquiring high quality ECG signals through thin clothes. A prototype front end for capacitive electrodes was built and tested. ECG signals were acquired with these electrodes in direct contact with the skin and also through cotton clothes 350 µm thick. They were compared with simultaneously acquired signals by means of wet electrodes and no significant differences were observed between both output signals

  13. BORA: A front end board, with local intelligence, for the rich detector of the compass collaboration

    International Nuclear Information System (INIS)

    Baum, G.; Birsa, R.; Bradamante, F.

    1999-02-01

    In this paper we describe the design of the re-configurable front-end boards (BORA boards) for the 82944 channel RICH-1 (Ring Imaging CHerenkov) of the Compass Collaboration (NA58). The front-end electronics controls the sample-and-hold operation after the arrival of an event trigger, acquires the analogue voltages from the pre-amp VLSI and converts them into 10 bits at a rate of 20 Ms/s per analogue channel. After the analog values are digitized they are written into FIFOs. A subsequent operation compares the readings of each and every channel with corresponding programmable thresholds, and transmits those values larger than the threshold, together with the channel number, through an optical fiber to subsequent processing stages of the acquisition system. The overall operation of the board is controlled and supervised by a fast DSP. The availability of local intelligence allows the board to present innovative features such as: to be part of a computer network that connects several similar boards of the detector with a PC. The presence of the DSP allows testing the operability and linearity of the analogue channels; and creating engineering frames containing local temperatures and voltages and transmitting the results through the network. The operator can reconfigure the hardware and software of the board by downloading programs from the PC. (author)

  14. Front-end electronics and readout system for the ILD TPC

    CERN Document Server

    Hedberg, V; Lundberg, B; Mjörnmark, U; Oskarsson, A; Österman, L; De Lentdecker, G; Yang, Y; Zhang, F

    2015-01-01

    A high resolution TPC is the main option for a central tracking detector at the future International Linear Collider (ILC). It is planned that the MPGD (Micro Pattern Gas Detector) technology will be used for the readout. A Large Prototype TPC at DESY has been used to test the performance of MPGDs in an electron beam of energies up to 6 GeV. The first step in the technology development was to demonstrate that the MPGDs are able to achieve the necessary performance set by the goals of ILC. For this ’proof of principle’ phase, the ALTRO front-end electronics from the ALICE TPC was used, modified to adapt to MPGD readout. The proof of principle has been verified and at present further improvement of the MPGD technology is going on, using the same readout electronics. The next step is the ’feasibility phase’, which aims at producing front-end electronics comparable in size (few mm2) to the readout pads of the TPC. This development work is based on the succeeding SALTRO16 chip, which combines the analogue ...

  15. Concept Design for a 1-Lead Wearable/Implantable ECG Front-End: Power Management.

    Science.gov (United States)

    George, Libin; Gargiulo, Gaetano Dario; Lehmann, Torsten; Hamilton, Tara Julia

    2015-11-19

    Power supply quality and stability are critical for wearable and implantable biomedical applications. For this reason we have designed a reconfigurable switched-capacitor DC-DC converter that, aside from having an extremely small footprint (with an active on-chip area of only 0.04 mm²), uses a novel output voltage control method based upon a combination of adaptive gain and discrete frequency scaling control schemes. This novel DC-DC converter achieves a measured output voltage range of 1.0 to 2.2 V with power delivery up to 7.5 mW with 75% efficiency. In this paper, we present the use of this converter as a power supply for a concept design of a wearable (15 mm × 15 mm) 1-lead ECG front-end sensor device that simultaneously harvests power and communicates with external receivers when exposed to a suitable RF field. Due to voltage range limitations of the fabrication process of the current prototype chip, we focus our analysis solely on the power supply of the ECG front-end whose design is also detailed in this paper. Measurement results show not just that the power supplied is regulated, clean and does not infringe upon the ECG bandwidth, but that there is negligible difference between signals acquired using standard linear power-supplies and when the power is regulated by our power management chip.

  16. Single event effect hardness for the front-end ASICs in the DAMPE satellite BGO calorimeter

    Science.gov (United States)

    Gao, Shan-Shan; Jiang, Di; Feng, Chang-Qing; Xi, Kai; Liu, Shu-Bin; An, Qi

    2016-01-01

    The Dark Matter Particle Explorer (DAMPE) is a Chinese scientific satellite designed for cosmic ray studies with a primary scientific goal of indirect detection of dark matter particles. As a crucial sub-detector, the BGO calorimeter measures the energy spectrum of cosmic rays in the energy range from 5 GeV to 10 TeV. In order to implement high-density front-end electronics (FEE) with the ability to measure 1848 signals from 616 photomultiplier tubes on the strictly constrained satellite platform, two kinds of 32-channel front-end ASICs, VA160 and VATA160, are customized. However, a space mission period of more than 3 years makes single event effects (SEEs) become threats to reliability. In order to evaluate SEE sensitivities of these chips and verify the effectiveness of mitigation methods, a series of laser-induced and heavy ion-induced SEE tests were performed. Benefiting from the single event latch-up (SEL) protection circuit for power supply, the triple module redundancy (TMR) technology for the configuration registers and the optimized sequential design for the data acquisition process, 52 VA160 chips and 32 VATA160 chips have been applied in the flight model of the BGO calorimeter with radiation hardness assurance. Supported by Strategic Priority Research Program on Space Science of the Chinese Academy of Sciences (XDA04040202-4) and Fundamental Research Funds for the Central Universities (WK2030040048)

  17. Status report on front end electronics for the EUSO photon detector

    International Nuclear Information System (INIS)

    Bosson, G.; Dzahini, D.; Koang, D.H.; Musico, P.; Pallavicini, M.; Pouxe, J.; Pratolongo, F.; Richer, J.P.

    2002-01-01

    In this paper we'll give a status report on the design of the front end electronic system which will be used for the EUSO photon detector. For space, mass and power consumption constraints the system will be implemented developing an ASIC chip using a deep submicron technology. Two complementary approaches will be described: a digital one (DFEE) and an analog one (AFEE). The DFEE is able to count the single photoelectrons coming form the detector, store the numbers in a memory buffer and read them out after a trigger using a serial communication line. The AFEE integrate the anode signals, store them in an analog memory and serially send all the values to a single output after a trigger for digitalisation (external to the chip). Since the approaches are complementary the idea is to put both of them in the final front end chip. An overview of the system is given together to the actual status of the design. Results from simulations are shown: the system is feasible and we think to implement some devices this year to extensively test the proposed solutions

  18. Status report on front end electronics for the EUSO photon detector

    Energy Technology Data Exchange (ETDEWEB)

    Bosson, G.; Dzahini, D.; Koang, D.H.; Musico, P.; Pallavicini, M.; Pouxe, J.; Pratolongo, F.; Richer, J.P

    2002-12-01

    In this paper we'll give a status report on the design of the front end electronic system which will be used for the EUSO photon detector. For space, mass and power consumption constraints the system will be implemented developing an ASIC chip using a deep submicron technology. Two complementary approaches will be described: a digital one (DFEE) and an analog one (AFEE). The DFEE is able to count the single photoelectrons coming form the detector, store the numbers in a memory buffer and read them out after a trigger using a serial communication line. The AFEE integrate the anode signals, store them in an analog memory and serially send all the values to a single output after a trigger for digitalisation (external to the chip). Since the approaches are complementary the idea is to put both of them in the final front end chip. An overview of the system is given together to the actual status of the design. Results from simulations are shown: the system is feasible and we think to implement some devices this year to extensively test the proposed solutions.

  19. Front end of the nuclear fuel cycle: options to reduce the risks of terrorism and proliferation

    International Nuclear Information System (INIS)

    Greenberg, E.V.C.; Hoenig, M.M.

    1987-01-01

    The authors' assessment of the prospects for advanced front end technologies and fuel assurances becoming effective mechanisms for achieving nonproliferation and antiterrorism objectives is relatively pessimistic unless they are integrated with back end accommodations such as the return of spent fuel. They recommend that further examination of front end assurances be linked to that accommodation. To be sure, certain real technological improvements may postpone the day when commercial use of nuclear explosive fuels, with all their attendant terrorism and proliferation risks, is justified. Indeed, improvements in LWRs, using well-understood technology combined with advanced enrichment techniques, could reduce uranium requirements up to 45% at the beginning of the next century and up to 30% a decade earlier, provided the economic and security incentives are present. On the institutional side, existing supply conditions put little pressure on importing countries to seek long-term supply assurances. Moreover, the political obstacles to creating new international institutions or arrangements are exceedingly difficult to overcome, especially without a heightened consciousness of the growing risks of civilian explosive nuclear materials and the political will to make these risks a high priority. 2 tables

  20. The Majorana Low-noise Low-background Front-end Electronics

    Science.gov (United States)

    Abgrall, N.; Aguayo, E.; Avignone, F. T.; Barabash, A. S.; Bertrand, F. E.; Boswell, M.; Brudanin, V.; Busch, M.; Byram, D.; Caldwell, A. S.; Chan, Y.-D.; Christofferson, C. D.; Combs, D. C.; Cuesta, C.; Detwiler, J. A.; Doe, P. J.; Efremenko, Yu.; Egorov, V.; Ejiri, H.; Elliott, S. R.; Fast, J. E.; Finnerty, P.; Fraenkle, F. M.; Galindo-Uribarri, A.; Giovanetti, G. K.; Goett, J.; Green, M. P.; Gruszko, J.; Guiseppe, V. E.; Gusev, K.; Hallin, A. L.; Hazama, R.; Hegai, A.; Henning, R.; Hoppe, E. W.; Howard, S.; Howe, M. A.; Keeter, K. J.; Kidd, M. F.; Kochetov, O.; Konovalov, S. I.; Kouzes, R. T.; LaFerriere, B. D.; Leon, J.; Leviner, L. E.; Loach, J. C.; MacMullin, J.; MacMullin, S.; Martin, R. D.; Meijer, S.; Mertens, S.; Nomachi, M.; Orrell, J. L.; O'Shaughnessy, C.; Overman, N. R.; Phillips, D. G.; Poon, A. W. P.; Pushkin, K.; Radford, D. C.; Rager, J.; Rielage, K.; Robertson, R. G. H.; Romero-Romero, E.; Ronquest, M. C.; Schubert, A. G.; Shanks, B.; Shima, T.; Shirchenko, M.; Snavely, K. J.; Snyder, N.; Suriano, A. M.; Thompson, J.; Timkin, V.; Tornow, W.; Trimble, J. E.; Varner, R. L.; Vasilyev, S.; Vetter, K.; Vorren, K.; White, B. R.; Wilkerson, J. F.; Wiseman, C.; Xu, W.; Yakushev, E.; Young, A. R.; Yu, C.-H.; Yumatov, V.

    The MAJORANA DEMONSTRATOR will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope 76Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the MAJORANA DEMONSTRATOR is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the 76Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolution performances. We present here the low-noise low- background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the MAJORANA DEMONSTRATOR. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.

  1. CPRF/ZTH front-end torus design and fabrication status

    International Nuclear Information System (INIS)

    Ballard, E.O.; Baker, C.; Gomez, T.; Prince, P.P.; Smith, R.L.

    1989-01-01

    Design of the ZTH front-end torus has been completed for a new generation Reversed Field Pinch (RFP) machine to be assembled at Los Alamos National Laboratory during FY 92. The Confinement Physics Research Facility (CPRF) houses the ZTH front-end. The ZTH torus consists of an Inconel 625 vacuum vessel supported by an external electrically conducting 304L stainless steel shell. Interspace support rings support the vacuum vessel to the shell and also provide accurate radial support for the interspace electrical diagnostics. The shell also supports 48 toroidal field coils that are mounted to the shell's external surface. The shell consists of an explosion bonded stainless steel-copper composite with water-cooling tube assemblies attached to the outer surface. The 0.135-in. thick copper is on the inside surface of the shell, and provides an electrically conducting path with the required electrical time constant of 50 ms. The shell plate will be formed to the required toroidal configuration, after which the poloidal and toroidal flanges will be welded to the structure and machined. The Inconel vacuum vessel consists of bellows segments, armor support rings, and diagnostic stations welded together to form the complete vacuum vessel assembly. The necessity for accurate positioning of the vacuum vessel within the shell requires that the shell and vacuum vessel be fabricated with major diameter tolerances within 0.050-in. true position of the nominal diameters of 188.0-in. and 188.820-in., respectively. 7 figs

  2. Front-End Intelligence for Large-Scale Application-Oriented Internet-of-Things

    KAUST Repository

    Bader, Ahmed; Ghazzai, Hakim; Kadri, Abdullah; Alouini, Mohamed-Slim

    2016-01-01

    The Internet-of-things (IoT) refers to the massive integration of electronic devices, vehicles, buildings, and other objects to collect and exchange data. It is the enabling technology for a plethora of applications touching various aspects of our lives such as healthcare, wearables, surveillance, home automation, smart manufacturing, and intelligent automotive systems. Existing IoT architectures are highly centralized and heavily rely on a back-end core network for all decision-making processes. This may lead to inefficiencies in terms of latency, network traffic management, computational processing, and power consumption. In this paper, we advocate the empowerment of front-end IoT devices to support the back-end network in fulfilling end-user applications requirements mainly by means of improved connectivity and efficient network management. A novel conceptual framework is presented for a new generation of IoT devices that will enable multiple new features for both the IoT administrators as well as end users. Exploiting the recent emergence of software-defined architecture, these smart IoT devices will allow fast, reliable, and intelligent management of diverse IoT-based applications. After highlighting relevant shortcomings of the existing IoT architectures, we outline some key design perspectives to enable front-end intelligence while shedding light on promising future research directions.

  3. Characterisation of the VMM3 Front-end read-out ASIC

    CERN Document Server

    Bartels, Lara Maria

    2018-01-01

    This research project was conducted in the RD51 collaboration at CERN, which is involved in the development of micropattern gaseous detector technologies and read-out systems. One example in the broad range of possible applications of such gaseous detectors is the NMX macromolecular diffractometer instrument planned for the European spallation source (ESS) which is currently under construction in Lund, Sweden. For the NMX instrument neutron detectors with high rate capabilities, high stability and excellent spatial resolution are required. A group working in the RD51 collaboration at CERN within the BrightnESS project aims to fulfil those requirements using gas electron multiplier (GEM) detectors with Gadolinium foils as neutron converters [PFE]. In order to match the high rate capability of the detectors, new front-end read-out systems need to be tested and implemented. This project aims to understand and test the capabilities of the VMM3 as the front-end read-out ASIC for GEM detectors.

  4. Data acquisition at the front-end of the Mu3e pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Perrevoort, Ann-Kathrin [Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: Mu3e-Collaboration

    2016-07-01

    The Mu3e experiment - searching for the lepton-flavour violating decay of the muon into three electrons at an unprecedented sensitivity of one in 10{sup 16} decays - is based on a pixel tracking detector. The sensors are High-Voltage Monolithic Active Pixel Sensors, a technology which allows for very fast and thin detectors, and thus is an ideal fit for Mu3e where the trajectories of low-momentum electrons at high rates are to be measured. The detector will consist of about 275 million pixels and will be operated at up to 10{sup 9} muon stops per second. Therefore, a fast and trigger-less data readout is required. The pixel sensors feature zero-suppressed data output via high-speed serial links. The data is then buffered and sorted by time on a FPGA on the front-end before being processed to the following readout stage. In this talk, the readout of the Mu3e pixel detector at the front-end is introduced. Furthermore, a first firmware implementation of this concept in a beam telescope consisting of the current pixel sensor prototype MuPix7 is presented.

  5. Numerical study of a magnetically insulated front-end channel for a neutrino factory

    Directory of Open Access Journals (Sweden)

    Diktys Stratakis

    2011-01-01

    Full Text Available A neutrino factory, which can deliver an intense flux of ∼10^{21} neutrinos per year from a multi-GeV stored muon beam, is seemingly the ideal tool for studying neutrino oscillations and CP violations for leptons. The front end of this facility plays a critical role in determining the number of muons that can be accepted by the downstream accelerators. Delivering peak performance requires transporting the muon beams through long sections of a beam channel containing high-gradient rf cavities and strong focusing solenoids. Here, we propose a novel scheme to improve the performance of the cavities, thereby increasing the number of muons within the acceptance of the accelerator chain. The key element of our new scheme is to apply a tangential magnetic field to the rf surfaces, thus forcing any field-emitted electrons to return to the surface before gaining enough energy to damage the cavity. We incorporate this idea into a new lattice design for a neutrino factory, and detail its performance numerically. Although our proposed front-end channel requires more rf power than conventional pillbox designs, it provides enough beam cooling and muon production to be a feasible option for a neutrino factory.

  6. A front-end electronic system for large arrays of bolometers

    Science.gov (United States)

    Arnaboldi, C.; Carniti, P.; Cassina, L.; Gotti, C.; Liu, X.; Maino, M.; Pessina, G.; Rosenfeld, C.; Zhu, B. X.

    2018-02-01

    CUORE is an array of thermal calorimeters composed of 988 crystals held at about 10 mK, whose absorbed energy is read out with semiconductor thermistors. The composition of the crystal is TeO2, and the aim is the study of the double beta decay of 130Te on very long and stable runs. CUPID-0 is an array of 26 Zn82Se crystals with double thermistor readout to study the double beta decay of 82Se. In the present paper, we present an overview of the entire front-end electronic readout chain, from the preamplifier to the anti-aliasing filter. This overview includes motivations, design strategies, circuit implementation and performance results of the electronic system, including other auxiliary yet important elements like power supplies and the slow control communication system. The stringent requirements of stability on the very long experimental runs that are foreseen during CUORE and CUPID-0 operation, are achieved thanks to novel solutions of the front-end preamplifier and of the detector bias circuit setup.

  7. BORA: a front end board, with local intelligence, for the RICH detector of the Compass Collaboration

    International Nuclear Information System (INIS)

    Baum, G.; Birsa, R.; Bradamante, F.; Bressan, A.; Colavita, A.; Crespo, M.; Costa, S.; Dalla Torre, S.; Fauland, P.; Finger, M.; Fratnik, F.; Giorgi, M.; Gobbo, B.; Grasso, A.; Lamanna, M.; Martin, A.; Menon, G.; Panzieri, D.; Schiavon, P.; Tessarotto, F.; Zanetti, A.M.

    1999-01-01

    In this paper we describe the design of the re-configurable front-end boards (BORA boards) for the 82944 channel RICH-1 (Ring Imaging CHerenkov) of the Compass Collaboration (NA58). The front-end electronics controls the sample-and-hold operation after the arrival of an event trigger, acquires the analog voltages from the pre-amp VLSI and converts them into 10 bits at a rate of 20 Ms/s per analog channel. The digitized analogue values are then written into FIFOs. A subsequent operation compares the readings of each and every channel with corresponding programmable thresholds, and transmits those values larger than the threshold, together with the channel number, through an optical fiber to subsequent processing stages of the acquisition system. The overall operation of the board is controlled and supervised by a fast DSP. The availability of local intelligence allows the board to present innovative features such as: to be part of a computer network that connects several similar boards of the detector with a PC. The presence of the DSP allows testing the operability and linearity of the analog channels; and creating engineering frames containing local temperatures and voltages and transmitting the results through the network. The operator can reconfigure the hardware and software of the board by downloading programs from the PC

  8. Estimation of radiation effects in the front-end electronics of an ILC electromagnetic calorimeter

    International Nuclear Information System (INIS)

    Bartsch, V.; Postranecky, M.; Targett-Adams, C.; Warren, M.; Wing, M.

    2008-01-01

    The front-end electronics of the electromagnetic calorimeter of an International Linear Collider detector are situated in a radiation environment. This requires the effect of the radiation on the performance of the electronics, specifically FPGAs, to be examined. In this paper we study the flux, particle spectra and deposited doses at the front-end electronics of the electromagnetic calorimeter of a detector at the ILC. We also study the occupancy of the electromagnetic calorimeter. These estimates are compared with measurements, e.g. of the radiation damage of FPGAs, done elsewhere. The outcome of the study shows that the radiation doses and the annual flux is low enough to allow today's FPGAs to operate. The Single Event Upset rate, however, lies between 14 min and 12 h depending on the FPGA used and therefore needs to be considered in the design of the data acquisition system of the electromagnetic calorimeter. The occupancy is about 0.002 per bunch train not taking into account the effect of noise which depends on the choice of the detector

  9. FERMI: a digital Front End and Readout MIcrosystem for high resolution calorimetry

    International Nuclear Information System (INIS)

    Alexanian, H.; Appelquist, G.; Bailly, P.

    1995-01-01

    We present a digital solution for the front-end electronics of high resolution calorimeters at future colliders. It is based on analogue signal compression, high speed A/D converters, a fully programmable pipeline and a digital signal processing (DSP) chain with local intelligence and system supervision. This digital solution is aimed at providing maximal front-end processing power by performing waveform analysis using DSP methods. For the system integration of the multichannel device a multi-chip, silicon-on-silicon multi-chip module (MCM) has been adopted. This solution allows a high level of integration of complex analogue and digital functions, with excellent flexibility in mixing technologies for the different functional blocks. This type of multichip integration provides a high degree of reliability and programmability at both the function and the system level, with the additional possibility of customising the microsystem to detector-specific requirements. For enhanced reliability in high radiation environments, fault tolerance strategies, i.e. redundancy, reconfigurability, majority voting and coding for error detection and correction, are integrated into the design. ((orig.))

  10. Calculation Of Radon Gas Inhaled By A Front End Worker Of The Nuclear Fuel Cycles

    International Nuclear Information System (INIS)

    Soedardjo

    1996-01-01

    The calculation of Radon gas inhaled by workers in a front end nuclear fuel cycle has been studied. The cycle of front end nuclear fuel is underground uranium exploration on Remaja tunnel West Kalimantan. The activities of mining consider of drilling, blasting, transporting mineral and tunnel supporting were chosen, It is assumed that in one month, for a worker has four assignments namely in tunnel I, tunnel II, tunnel III and tunnel IV, The activities in the mine are divided into some categories, namely 12 hours of drilling, 2 hours of after blasting, 9 hours of mineral transportation and 8 hours of tunnel support construction. The result of calculation shows that the average Radon gas concentration on each particular location is still less than maximum permissible concentration 300 pCi/l. The prediction of maximum dose inhaled by one uranium miner during a year is 2.3 x 10 2 μCi which is less than BATAN regulation 7.3 x 10 2 μCi

  11. EXPERIENCE WITH FPGA-BASED PROCESSOR CORE AS FRONT-END COMPUTER

    International Nuclear Information System (INIS)

    HOFF, L.T.

    2005-01-01

    The RHIC control system architecture follows the familiar ''standard model''. LINUX workstations are used as operator consoles. Front-end computers are distributed around the accelerator, close to equipment being controlled or monitored. These computers are generally based on VMEbus CPU modules running the VxWorks operating system. I/O is typically performed via the VMEbus, or via PMC daughter cards (via an internal PCI bus), or via on-board I/O interfaces (Ethernet or serial). Advances in FPGA size and sophistication now permit running virtual processor ''cores'' within the FPGA logic, including ''cores'' with advanced features such as memory management. Such systems offer certain advantages over traditional VMEbus Front-end computers. Advantages include tighter coupling with FPGA logic, and therefore higher I/O bandwidth, and flexibility in packaging, possibly resulting in a lower noise environment and/or lower cost. This paper presents the experience acquired while porting the RHIC control system to a PowerPC 405 core within a Xilinx FPGA for use in low-level RF control

  12. Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier

    International Nuclear Information System (INIS)

    Re, V.; Gaioni, L.; Manghisoni, M.; Ratti, L.; Traversi, G.

    2010-01-01

    The progress of industrial microelectronic technologies has already overtaken the 130 nm CMOS generation that is currently the focus of IC designers for new front-end chips in LHC upgrades and other detector applications. In a broader time span, sub-100 nm CMOS processes may become appealing for the design of very compact front-end systems with advanced integrated functionalities. This is especially true in the case of pixel detectors, both for monolithic devices (MAPS) and for hybrid implementations where a high resistivity sensor is connected to a CMOS readout chip. Technologies beyond the 100 nm frontier have peculiar features, such as the evolution of the device gate material to reduce tunneling currents through the thin dielectric. These new physical device parameters may impact on functional properties such as noise and radiation hardness. On the basis of experimental data relevant to commercial devices, this work studies potential advantages and challenges associated to the design of low-noise and rad-hard analog circuits in these aggressively scaled technologies.

  13. A new portable test bench for the ATLAS Tile Calorimeter front-end electronics certification

    International Nuclear Information System (INIS)

    Alves, J.; Carrio, F.; Moreno, P.; Usai, G.; Valero, A.; Kim, H.Y.; Minashvili, I.; Shalyugin, A.; Reed, R.; Schettino, V.; Souza, J.; Solans, C.

    2013-06-01

    This paper describes the upgraded portable test bench for the Tile Calorimeter of the ATLAS experiment at CERN. The previous version of the portable test bench was extensively used for certification and qualification of the front-end electronics during the commissioning phase as well as during the short maintenance periods of 2010 and 2011. The new version described here is designed to be an easily upgradable version of the 10-year-old system, able to evaluate the new technologies planned for the ATLAS upgrade as well as provide new functionalities to the present system. It will be used in the consolidation of electronics campaign during the long shutdown of the LHC in 2013-14 and during future maintenance periods. The system, based on a global re-design with state-of-the-art devices, is based on a back-end electronics crate instrumented with commercial and custom modules and a front-end GUI that is executed on an external portable computer and communicates with the controller in the crate through an Ethernet connection. (authors)

  14. A CMOS Low-Power Optical Front-End for 5 Gbps Applications

    Science.gov (United States)

    Zohoori, Soorena; Dolatshahi, Mehdi

    2018-01-01

    In this paper, a new low-power optical receiver front-end is proposed in 90 nm CMOS technology for 5 Gb/s AApplications. However, to improve the gain-bandwidth trade-off, the proposed Trans-Impedance Amplifier (TIA) uses an active modified inverter-based topology followed by a common-source amplifier, which uses active inductive peaking technique to enhance the frequency bandwidth in an increased gain level for a reasonable power consumption value. The proposed TIA is analyzed and simulated in HSPICE using 90 nm CMOS technology parameters. Simulation results show a 53.5dBΩ trans-impedance gain, 3.5 GHz frequency bandwidth, 16.8pA/√Hz input referred noise, and 1.28 mW of power consumption at 1V supply voltage. The Optical receiver is completed using three stages of differential limiting amplifiers (LAs), which provide 27 dB voltage gain while consume 3.1 mW of power. Finally, the whole optical receiver front-end consumes only 5.6 mW of power at 1 V supply and amplifies the input signal by 80 dB, while providing 3.7 GHz of frequency bandwidth. Finally, the simulation results indicate that the proposed optical receiver is a proper candidate to be used in a low-power 5 Gbps optical communication system.

  15. An inductorless multi-mode RF front end for GNSS receiver in 55 nm CMOS

    Science.gov (United States)

    Yanbin, Luo; Chengyan, Ma; Yebing, Gan; Min, Qian; Tianchun, Ye

    2015-10-01

    An inductorless multi-mode RF front end for a global navigation satellite system (GNSS) receiver is presented. Unlike the traditional topology of a low noise amplifier (LNA), the inductorless current-mode noise-canceling LNA is applied in this design. The high-impedance-input radio frequency amplifier (RFA) further amplifies the GNSS signals and changes the single-end signal path into fully differential. The passive mixer down-converts the signals to the intermediate frequency (IF) band and conveys the signals to the analogue blocks. The local oscillator (LO) buffer divides the output frequency of the voltage controlled oscillator (VCO) and generates 25%-duty-cycle quadrature square waves to drive the mixer. Our measurement results display that the implemented RF front end achieves good overall performance while consuming only 6.7 mA from 1.2 V supply. The input return loss is better than -26 dB and the ultra low noise figure of 1.43 dB leads to high sensitivity of the GNSS receiver. The input 1 dB compression point is -43 dBm at the high gain of 48 dB. The designed circuit is fabricated in 55 nm CMOS technology and the die area, which is much smaller than traditional circuit, is around 220 × 280 μm2.

  16. An inductorless multi-mode RF front end for GNSS receiver in 55 nm CMOS

    International Nuclear Information System (INIS)

    Luo Yanbin; Ma Chengyan; Gan Yebing; Qian Min; Ye Tianchun

    2015-01-01

    An inductorless multi-mode RF front end for a global navigation satellite system (GNSS) receiver is presented. Unlike the traditional topology of a low noise amplifier (LNA), the inductorless current-mode noise-canceling LNA is applied in this design. The high-impedance-input radio frequency amplifier (RFA) further amplifies the GNSS signals and changes the single-end signal path into fully differential. The passive mixer down-converts the signals to the intermediate frequency (IF) band and conveys the signals to the analogue blocks. The local oscillator (LO) buffer divides the output frequency of the voltage controlled oscillator (VCO) and generates 25%-duty-cycle quadrature square waves to drive the mixer. Our measurement results display that the implemented RF front end achieves good overall performance while consuming only 6.7 mA from 1.2 V supply. The input return loss is better than −26 dB and the ultra low noise figure of 1.43 dB leads to high sensitivity of the GNSS receiver. The input 1 dB compression point is −43 dBm at the high gain of 48 dB. The designed circuit is fabricated in 55 nm CMOS technology and the die area, which is much smaller than traditional circuit, is around 220 × 280 μm 2 . (paper)

  17. Front-End Intelligence for Large-Scale Application-Oriented Internet-of-Things

    KAUST Repository

    Bader, Ahmed

    2016-06-14

    The Internet-of-things (IoT) refers to the massive integration of electronic devices, vehicles, buildings, and other objects to collect and exchange data. It is the enabling technology for a plethora of applications touching various aspects of our lives such as healthcare, wearables, surveillance, home automation, smart manufacturing, and intelligent automotive systems. Existing IoT architectures are highly centralized and heavily rely on a back-end core network for all decision-making processes. This may lead to inefficiencies in terms of latency, network traffic management, computational processing, and power consumption. In this paper, we advocate the empowerment of front-end IoT devices to support the back-end network in fulfilling end-user applications requirements mainly by means of improved connectivity and efficient network management. A novel conceptual framework is presented for a new generation of IoT devices that will enable multiple new features for both the IoT administrators as well as end users. Exploiting the recent emergence of software-defined architecture, these smart IoT devices will allow fast, reliable, and intelligent management of diverse IoT-based applications. After highlighting relevant shortcomings of the existing IoT architectures, we outline some key design perspectives to enable front-end intelligence while shedding light on promising future research directions.

  18. ASIC Wafer Test System for the ATLAS Semiconductor Tracker Front-End Chip

    International Nuclear Information System (INIS)

    Anghinolfi, F.; Bialas, W.; Busek, N.; Ciocio, A.; Cosgrove, D.; Fadeyev, V.; Flacco, C.; Gilchriese, M.; Grillo, A.A.; Haber, C.; Kaplon, J.; Lacasta, C.; Murray, W.; Niggli, H.; Pritchard, T.; Rosenbaum, F.; Spieler, H.; Stezelberger, T.; Vu, C.; Wilder, M.; Yaver, H.; Zetti, F.

    2002-01-01

    An ASIC wafer test system has been developed to provide comprehensive production screening of the ATLAS Semiconductor Tracker front-end chip (ABCD3T). The ABCD3T[1] features a 128-channel analog front-end, a digital pipeline, and communication circuitry, clocked at 40 MHz, which is the bunch crossing frequency at the LHC (Large Hadron Collider). The tester measures values and tolerance ranges of all critical IC parameters, including DC parameters, electronic noise, time resolution, clock levels and clock timing. The tester is controlled by an FPGA (ORCA3T) programmed to issue the input commands to the IC and to interpret the output data. This allows the high-speed wafer-level IC testing necessary to meet the production schedule. To characterize signal amplitudes and phase margins, the tester utilizes pin-driver, delay, and DAC chips, which control the amplitudes and delays of signals sent to the IC under test. Output signals from the IC under test go through window comparator chips to measure their levels. A probe card has been designed specifically to reduce pick-up noise that can affect the measurements. The system can operate at frequencies up to 100 MHz to study the speed limits of the digital circuitry before and after radiation damage. Testing requirements and design solutions are presented

  19. OLS Dialog: An open-source front end to the Ontology Lookup Service

    Directory of Open Access Journals (Sweden)

    Eidhammer Ingvar

    2010-01-01

    Full Text Available Abstract Background With the growing amount of biomedical data available in public databases it has become increasingly important to annotate data in a consistent way in order to allow easy access to this rich source of information. Annotating the data using controlled vocabulary terms and ontologies makes it much easier to compare and analyze data from different sources. However, finding the correct controlled vocabulary terms can sometimes be a difficult task for the end user annotating these data. Results In order to facilitate the location of the correct term in the correct controlled vocabulary or ontology, the Ontology Lookup Service was created. However, using the Ontology Lookup Service as a web service is not always feasible, especially for researchers without bioinformatics support. We have therefore created a Java front end to the Ontology Lookup Service, called the OLS Dialog, which can be plugged into any application requiring the annotation of data using controlled vocabulary terms, making it possible to find and use controlled vocabulary terms without requiring any additional knowledge about web services or ontology formats. Conclusions As a user-friendly open source front end to the Ontology Lookup Service, the OLS Dialog makes it straightforward to include controlled vocabulary support in third-party tools, which ultimately makes the data even more valuable to the biomedical community.

  20. Fuelcell-Hybrid Mine loader (LHD)

    Energy Technology Data Exchange (ETDEWEB)

    James L Dippo; Tim Erikson; Kris Hess

    2009-07-10

    The fuel cell hybrid mine loader project, sponsored by a government-industry consortium, was implemented to determine the viability of proton exchange membrane (PEM) fuel cells in underground mining applications. The Department of Energy (DOE) sponsored this project with cost-share support from industry. The project had three main goals: (1) to develop a mine loader powered by a fuel cell, (2) to develop associated metal-hydride storage and refueling systems, and (3) to demonstrate the fuel cell hybrid loader in an underground mine in Nevada. The investigation of a zero-emissions fuel cell power plant, the safe storage of hydrogen, worker health advantages (over the negative health effects associated with exposure to diesel emissions), and lower operating costs are all key objectives for this project.

  1. The Front-End Readout as an Encoder IC for Magneto-Resistive Linear Scale Sensors

    Directory of Open Access Journals (Sweden)

    Trong-Hieu Tran

    2016-09-01

    Full Text Available This study proposes a front-end readout circuit as an encoder chip for magneto-resistance (MR linear scales. A typical MR sensor consists of two major parts: one is its base structure, also called the magnetic scale, which is embedded with multiple grid MR electrodes, while another is an “MR reader” stage with magnets inside and moving on the rails of the base. As the stage is in motion, the magnetic interaction between the moving stage and the base causes the variation of the magneto-resistances of the grid electrodes. In this study, a front-end readout IC chip is successfully designed and realized to acquire temporally-varying resistances in electrical signals as the stage is in motions. The acquired signals are in fact sinusoids and co-sinusoids, which are further deciphered by the front-end readout circuit via newly-designed programmable gain amplifiers (PGAs and analog-to-digital converters (ADCs. The PGA is particularly designed to amplify the signals up to full dynamic ranges and up to 1 MHz. A 12-bit successive approximation register (SAR ADC for analog-to-digital conversion is designed with linearity performance of ±1 in the least significant bit (LSB over the input range of 0.5–2.5 V from peak to peak. The chip was fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC 0.35-micron complementary metal oxide semiconductor (CMOS technology for verification with a chip size of 6.61 mm2, while the power consumption is 56 mW from a 5-V power supply. The measured integral non-linearity (INL is −0.79–0.95 LSB while the differential non-linearity (DNL is −0.68–0.72 LSB. The effective number of bits (ENOB of the designed ADC is validated as 10.86 for converting the input analog signal to digital counterparts. Experimental validation was conducted. A digital decoder is orchestrated to decipher the harmonic outputs from the ADC via interpolation to the position of the moving stage. It was found that the displacement

  2. Detector and Front-end electronics for ALICE and STAR silicon strip layers

    CERN Document Server

    Arnold, L; Coffin, J P; Guillaume, G; Higueret, S; Jundt, F; Kühn, C E; Lutz, Jean Robert; Suire, C; Tarchini, A; Berst, D; Blondé, J P; Clauss, G; Colledani, C; Deptuch, G; Dulinski, W; Hu, Y; Hébrard, L; Kucewicz, W; Boucham, A; Bouvier, S; Ravel, O; Retière, F

    1998-01-01

    Detector modules consisting of Silicon Strip Detector (SSD) and Front End Electronics (FEE) assembly have been designed in order to provide the two outer layers of the ALICE Inner Tracker System (ITS) [1] as well as the outer layer of the STAR Silicon Vertex Tracker (SVT) [2]. Several prototypes have beenproduced and tested in the SPS and PS beam at CERN to validate the final design. Double-sided, AC-coupled SSD detectors provided by two different manufacturers and also a pair of single-sided SSD have been asssociated to new low-power CMOS ALICE128C ASIC chips in a new detector module assembly. The same detectors have also been associated to current Viking electronics for reference purpose. These prototype detector modules are described and some first results are presented.

  3. Physics at the front-end of a neutrino factory a quantitative appraisal

    CERN Document Server

    Mangano, Michelangelo L.; Anselmino, M.; Ball, R.D.; Boglione, Mariaelena; D'Alesio, U.; Davidson, S.; Lellis, De; Ellis, John R.; Forte, S.; Gambino, P.; Gehrmann, T.; Kataev, A.L.; Kotzinian, A.; Kulagin, Sergey A.; Lehmann-Dronke, B.; Migliozzi, P.; Murgia, F.; Ridolfi, G.

    2004-01-01

    We present a quantitative appraisal of the physics potential for neutrino experiments at the front-end of a muon storage ring. We estimate the forseeable accuracy in the determination of several interesting observables, and explore the consequences of these measurements. We discuss the extraction of individual quark and antiquark densities from polarized and unpolarized deep-inelastic scattering. In particular we study the implications for the undertanding of the nucleon spin structure. We assess the determination of alpha_s from scaling violation of structure functions, and from sum rules, and the determination of sin^2(theta_W) from elastic nu-e and deep-inelastic nu-p scattering. We then consider the production of charmed hadrons, and the measurement of their absolute branching ratios. We study the polarization of Lambda baryons produced in the current and target fragmentation regions. Finally, we discuss the sensitivity to physics beyond the Standard Model.

  4. Balancing research and organizational capacity building in front-end project design

    DEFF Research Database (Denmark)

    Hjortsø, Carsten Nico Portefée; Meilby, Henrik

    2013-01-01

    is more complex. We identify 11 specific factors influencing front-end project management related to structure, process and relationship, and we theorize about how these factors influence the choice between research and more general capacity development activities. Copyright © 2013 John Wiley & Sons, Ltd......, but in order for partnerships to comply with general governance-level recommendations, a better understanding is needed of how specific context-dependent factors influence the development and execution of projects. In this article, we aim to contribute to the understanding of factors influencing the design...... phase of RCB partnerships and examine how they influence the balance between performing collaborative research and developing general organizational capacity. Data collection was based on a survey (n = 25), and individual interviews and focus group discussions with 17 Danish project managers from...

  5. The front-end data conversion and readout electronics for the CMS ECAL upgrade

    CERN Document Server

    Mazza, Gianni

    2017-01-01

    The High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with 13 bit resolution. Therefore, a high-speed, high-resolution ADC is required. Moreover, each readout channel will produce 2.08 Gb/s, thus requiring fast data transmission circuitry. A new readout architecture, based on two 12 bit, 160 MS/s ADCs, lossless data compression algorithms and fast serial links have been developed for the ECAL upgrade. These functions will be integrated in a single ASIC which is currently under design in a commercial CMOS 65 nm technology using radiation damage mitigation techniques.

  6. CMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)

    CERN Multimedia

    J.Coughlan

    1998-01-01

    The tracking system of the CMS detector at the LHC employs Front End Driver (FED) cards to digitise, buffer and sparsify analogue data arriving via optical links from on detector pipeline chips. This paper describes a prototype version of the FED based upon the popular commercial PCI bus Mezzanine Card (PMC) form factor. The FED-PMC consists of an 8 channel, 9 bit ADC, card, providing a 1 MByte data buffer and operating at the LHC design frequency of 40 MHz. The core of the card is a re-programmable FPGA which allows the functionality of the card to be conveniently modified. The card is supplied with a comprehensive library of C routines.The PMC form factor allows the card to be plugged onto a wide variety of processor carrier boards and even directly into PCI based PCs. The flexibility of the FPGA based design permits the card to be used in a variety of ADC based applications.

  7. Characterization and performance of the ASIC (CITIROC) front-end of the ASTRI camera

    Energy Technology Data Exchange (ETDEWEB)

    Impiombato, D., E-mail: Domenico.Impiombato@iasf-palermo.inaf.it [INAF, Istituto di Astrofisica Spaziale e Fisica cosmica di Palermo, via U. La Malfa 153, I-90146 Palermo (Italy); Giarrusso, S., E-mail: Giarrusso@iasf-palermo.inaf.it [INAF, Istituto di Astrofisica Spaziale e Fisica cosmica di Palermo, via U. La Malfa 153, I-90146 Palermo (Italy); Mineo, T., E-mail: Mineo@iasf-palermo.inaf.it [INAF, Istituto di Astrofisica Spaziale e Fisica cosmica di Palermo, via U. La Malfa 153, I-90146 Palermo (Italy); Catalano, O., E-mail: Catalano@iasf-palermo.inaf.it [INAF, Istituto di Astrofisica Spaziale e Fisica cosmica di Palermo, via U. La Malfa 153, I-90146 Palermo (Italy); Gargano, C.; La Rosa, G.; Russo, F.; Sottile, G. [INAF, Istituto di Astrofisica Spaziale e Fisica cosmica di Palermo, via U. La Malfa 153, I-90146 Palermo (Italy); Billotta, S.; Bonanno, G.; Garozzo, S.; Grillo, A.; Marano, D.; Romeo, G. [INAF, Osservatorio Astrofisico di Catania, via S. Sofia 78, I-95123 Catania (Italy)

    2015-09-11

    The Cherenkov Imaging Telescope Integrated Read Out Chip, CITIROC, is a chip adopted as the front-end of the camera at the focal plane of the imaging Cherenkov ASTRI dual-mirror small size telescope (ASTRI SST-2M) prototype. This paper presents the results of the measurements performed to characterize CITIROC tailored for the ASTRI SST-2M focal plane requirements. In particular, we investigated the trigger linearity and efficiency, as a function of the pulse amplitude. Moreover, we tested its response by performing a set of measurements using a silicon photomultiplier (SiPM) in dark conditions and under light pulse illumination. The CITIROC output signal is found to vary linearly as a function of the input pulse amplitude. Our results show that it is suitable for the ASTRI SST-2M camera.

  8. The front-end data conversion and readout electronics for the CMS ECAL upgrade

    Science.gov (United States)

    Mazza, G.; Cometti, S.

    2018-03-01

    The High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with a 13 bits resolution. Therefore, a high-speed, high-resolution ADC is required. Moreover, each readout channel will produce 2.08 Gb/s, thus requiring a fast data transmission circuitry. A new readout architecture, based on two 12 bit, 160 MS/s ADCs, lossless data compression algorithms and fast serial links have been developed for the ECAL upgrade. These functions will be integrated in a single ASIC which is currently under design in a commercial CMOS 65 nm technology using radiation damage mitigation techniques.

  9. The MYRRHA ADS Project in Belgium Enters the Front End Engineering Phase

    International Nuclear Information System (INIS)

    De Bruyn, D.; Ait Abderrahim, H.; Baeten, P.; Leysen, P.

    2015-01-01

    The MYRRHA project started in 1998 by SCK.CEN. MYRRHA is a MTR, based on the ADS concept, for material and fuel research, for studying the feasibility of transmutation of minor actinides and long-lived fission products arising from radioactive waste reprocessing and finally for demonstrating at a reasonable power scale the principle of the ADS. The MYRRHA design has progressed through various framework programmes of the European Commission in the context of Partitioning and Transmutation. The design has now entered into the Front End Engineering Phase (FEED) covering the period 2012- 2015. The engineering company, which will handle this phase, has been selected and the works have begun in the late 2013. In the meantime we have made some refinements in both primary systems and plant layout, including reactor building design. In this paper, we present the most recent developments of the MYRRHA design in terms of reactor building and plant layout as existing today. (authors)

  10. Characterization and performance of the ASIC (CITIROC) front-end of the ASTRI camera

    International Nuclear Information System (INIS)

    Impiombato, D.; Giarrusso, S.; Mineo, T.; Catalano, O.; Gargano, C.; La Rosa, G.; Russo, F.; Sottile, G.; Billotta, S.; Bonanno, G.; Garozzo, S.; Grillo, A.; Marano, D.; Romeo, G.

    2015-01-01

    The Cherenkov Imaging Telescope Integrated Read Out Chip, CITIROC, is a chip adopted as the front-end of the camera at the focal plane of the imaging Cherenkov ASTRI dual-mirror small size telescope (ASTRI SST-2M) prototype. This paper presents the results of the measurements performed to characterize CITIROC tailored for the ASTRI SST-2M focal plane requirements. In particular, we investigated the trigger linearity and efficiency, as a function of the pulse amplitude. Moreover, we tested its response by performing a set of measurements using a silicon photomultiplier (SiPM) in dark conditions and under light pulse illumination. The CITIROC output signal is found to vary linearly as a function of the input pulse amplitude. Our results show that it is suitable for the ASTRI SST-2M camera

  11. Scientific performances of the XAA1.2 front-end chip for silicon microstrip detectors

    International Nuclear Information System (INIS)

    Del Monte, Ettore; Soffitta, Paolo; Morelli, Ennio; Pacciani, Luigi; Porrovecchio, Geiland; Rubini, Alda; Uberti, Olga; Costa, Enrico; Di Persio, Giuseppe; Donnarumma, Immacolata; Evangelista, Yuri; Feroci, Marco; Lazzarotto, Francesco; Mastropietro, Marcello; Rapisarda, Massimo

    2007-01-01

    The XAA1.2 is a custom ASIC chip for silicon microstrip detectors adapted by Ideas for the SuperAGILE instrument on board the AGILE space mission. The chip is equipped with 128 input channels, each one containing a charge preamplifier, shaper, peak detector and stretcher. The most important features of the ASIC are the extended linearity, low noise and low power consumption. The XAA1.2 underwent extensive laboratory testing in order to study its commandability and functionality and evaluate its scientific performances. In this paper we describe the XAA1.2 features, report the laboratory measurements and discuss the results emphasizing the scientific performances in the context of the SuperAGILE front-end electronics

  12. Interfirm collaboration in the Fuzzy Front-End of the innovation process

    DEFF Research Database (Denmark)

    Jørgensen, Jacob Høj; Goduscheit, René Chester; Bergenholtz, Carsten

    , marketing, sales. The focus of this paper is on collaboration where innovation is the main part of the collaborative effort. Innovation refers to the research and development (R&D) activity devoted to increasing scientific or technical knowledge and the application of that knowledge to the creation of new...... and tendencies in formal R&D partnering relations. This paper, however, focuses on collaboration between independent companies prior to such formal agreements as joint ventures or other contractual agreements. This first phase of the innovation process is often referred to as the Fuzzy Front-End (FFE....... In this article we examine the characteristics of the FFE phase and explore this phase in an inter-firm perspective. Through an in-depth case-study of a single firm and its innovation partners we identify parameters for improved collaboration in the FFE. In conclusion we outline a model for inter...

  13. Actuation stability test of the LISA pathfinder inertial sensor front-end electronics

    Science.gov (United States)

    Mance, Davor; Gan, Li; Weber, Bill; Weber, Franz; Zweifel, Peter

    In order to limit the residual stray forces on the inertial sensor test mass in LISA pathfinder, √ it is required that the fluctuation of the test mass actuation voltage is within 2ppm/ Hz. The actuation voltage stability test on the flight hardware of the inertial sensor front-end electronics (IS FEE) is presented in this paper. This test is completed during the inertial sensor integration at EADS Astrium Friedrichshafen, Germany. The standard measurement method using voltmeter is not sufficient for verification, since the instrument low frequency √ fluctuation is higher than the 2ppm/ Hz requirement. In this test, by using the differential measurement method and the lock-in amplifier, the actuation stability performance is verified and the quality of the IS FEE hardware is confirmed by the test results.

  14. Safety and regulatory aspects of front end facilities of nuclear fuel cycle

    International Nuclear Information System (INIS)

    Khan, Kirity Bhushan; Jha, S.K.; Bhasin, Vivek; Behere, P.G.

    2017-01-01

    Nuclear Fuels Group of BARC consists of various divisions with diverse activities but impeccable safety records. This has been made possible with strict safety culture among trained personnel across all divisions. The major activities of this group encompass the front end fuel fabrication facilities for thermal and fast reactors and post irradiation examination of fuel and structural materials. The group has been responsible for delivering departmental targets, as and when required, fulfilling all safety and security requirements. The present article covers the safety and regulatory aspects of this group with special emphasis on group safety management by the administrative/organizational control, the procedure followed for regulatory review and control which are carried out and the laid down procedures for identifying, classifying and reporting of safety related incidents. (author)

  15. A front-end system for industrial type controls at the SSC

    International Nuclear Information System (INIS)

    Haenni, D.R.

    1992-01-01

    The SSC control system is tasked with coordinating the operation of many different accelerator subsystems, a number of which use industrial type process controls. The design of a high-performance control system front end is presented which serves both as a data concentrator and a distributed process controller. In addition it provides strong support for a centralized control system architecture, allows for regional control systems, and simplifies the construction of inter-subsystem controls. An implementation of this design will be discussed which uses STD-Bus for accelerator hardware interfacing, a time domain multiplexing (TDM) communications transport system, and a modified reflective memory interface to the rest of the control system. (author)

  16. Design of the Front-End Detector Control System of the ATLAS New Small Wheels

    CERN Document Server

    Koulouris, Aimilianos; The ATLAS collaboration

    2017-01-01

    The ATLAS experiment will be upgraded during the next LHC Long Shutdown (LS2). The flagship upgrade is the New Small Wheel (NSW), which consists of 2 disks of Muon Gas detectors. The detector technologies used are Micromegas (MM) and sTGC, providing a total of 16 layers of tracking and trigger. The Slow Control Adapter (SCA) is part of the GigaBit Transceiver (GBT) - “Radiation Hard Optical Link Project” family of chips designed at CERN, EP-ESE department, which will be used at the NSW upgrade. The SCA offers several interfaces to read analog and digital inputs, and configure front-end Readout ASICs, FPGAs, or other chips. This poster gives an overview of the system, data flow, and software developed for communicating with the SCA.

  17. The nuclear fuel cycle desperately in need of front end alignment

    International Nuclear Information System (INIS)

    White, G.; Reaves, J.

    1983-01-01

    The front end of the nuclear fuel cycle which includes uranium supply, conversion of U308 to UF6 and enrichment of UF6, is characterized by excess capacity, excess production, growing inventories and price weakness. Excess capacity resulted from uncritical acceptance by suppliers of overly optimistic utility plans for nuclear growth. Cancellation and deferrals of nuclear plans led to reductions in forecast demand just as the new production capacity was coming on line to meet the high levels of demand forecast earlier. The unique and conservative nature of the utilities as business entities and the unique, sole-end-use character of uranium and its related fuel cycle services suggest that the markets for these materials and services will differ from those of other fuels. An international market is foreseen, marked by continuing boom-bust cycles

  18. Digital column readout architecture for the ATLAS pixel 025 mum front end IC

    CERN Document Server

    Mandelli, E; Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Marchesini, R; Meddeler, G; Peric, I

    2002-01-01

    A fast low noise, limited power, radiation-hard front-end chip was developed for reading out the Atlas Pixel Silicon Detector. As in the past prototypes, every chip is used to digitize and read out charge and time information from hits on each one of its 2880 inputs. The basic column readout architecture idea was adopted and modified to allow a safe transition to quarter micron technology. Each pixel cell, organized in a 160 multiplied by 18 matrix, can be independently enabled and configured in order to optimize the analog signal response and to prevent defective pixels from saturating the readout. The digital readout organizes hit data coming from each column, with respect to time, and output them on a low-level serial interface. A considerable effort was made to design state machines free of undefined states, where single-point defects and charge deposited by heavy ions in the silicon could have led to unpredicted forbidden states. 7 Refs.

  19. Impact of political and legislative events on the front end of the fuel cycle

    International Nuclear Information System (INIS)

    Steyn, J.J.

    1987-01-01

    This paper examines recent political and legislative events in the U.S. which could impact the supply of natural uranium, uranium hexafluoride, conversion services, and uranium enrichment services. While the industry has been clouded with continuing uncertainty resulting from the ongoing miners vs. DOE litigation and a number of legislative proposals to embargo the import of uranium, very little attention was being paid to the free trade agreement discussions which were taking place between the U.S. and Canada. However, with a draft agreement now being fact and its ratification a possibility by mid-1988, the front end of the fuel cycle may finally begin to achieve some normalcy within the next year. The impact of these factors on the industry are addressed

  20. Review of input stages used in front end electronics for particle detectors

    CERN Document Server

    Kaplon, J

    2015-01-01

    In this paper we present noise analysis of the input stages most commonly used in front end electronics for particle detectors. Analysis shows the calculation of the input referenced noise related to the active devices. It identifies the type, parallel or series, of the equivalent noise sources related to the input transistors, which is the important input for the further choice of the signal processing method. Moreover we calculate the input impedance of amplifiers employed in applications where the particle detector is connected to readout electronics by means of transmission line. We present schematics, small signal models,a complete set of equations, and results of the major steps of calculations for all discussed circuits.

  1. Considerations on the design of front-end electronics for silicon calorimetry for the SSC

    International Nuclear Information System (INIS)

    Wintenberg, A.L.; Bauer, M.L.; Britton, C.L.; Kennedy, E.J.; Todd, R.A.; Berridge, S.C.; Bugg, W.M.

    1990-01-01

    Some considerations are described for the design of a silicon-based sampling calorimetry detector for the Superconducting Super Collider (SSC). The use of silicon as the detection medium allows fast, accurate, and fine-grained energy measurements - but for optimal performance, the front-end electronics must be matched to the detector characteristics and have the speed required by the high SSC interaction rates. The relation between the signal-to-noise rtio of the calorimeter electronics and the charge collection time, the preamplifier power dissipation, detector capacitance and leakage, charge gain, and signal shaping and sampling was studied. The electrostatic transformer connection was analyzed and found to be unusable for a tightly arranged calorimeter because of stray capacitance effects. The method of deconvolutional sampling was developed as a means for pileup correction following synchronous sampling and analog storage

  2. Thermal analysis of the first canted-undulator front-end components at SSRF

    Energy Technology Data Exchange (ETDEWEB)

    Xu, Zhongmin, E-mail: xuzhongmin@sinap.ac.cn; Feng, Xinkang; Wang, Naxiu; Wu, Guanyuan; Zhang, Min; Wang, Jie

    2015-02-21

    The performance of three kinds of masks: pre-mask, splitter mask and fixed mask-photon shutter, used for the first canted-undulator front end under heat loads at SSRF, is studied. Because these components are shared with two beamlines, the X-rays from both dual undulators and bending magnets can strike on them. Under these complicated conditions, they will absorb much more thermal power than when they operate in usual beamline. So thermal and stress analysis is indispensable for their mechanical design. The method of applying the non-uniform power density using Ansys is presented. During thermal stress analysis, the normal operation or the worst possible case is considered. The finite element analyses results, such as the maximum temperature of the body and the cooling wall and the maximum stress of these components, show the design of them is reasonable and safe.

  3. Front-end electronics for the readout of CdZnTe sensors

    CERN Document Server

    Moraes, D; Rudge, A

    2006-01-01

    The CERN_DxCTA is a front-end ASIC optimized for the readout of CdZn Te sensors. The chip is implemented in 0.25 mum CMOS technology. The circuit consists of 128 channels equipped with a transimpedance amplifier followed by a gain-shaper stage with 20 ns peaking time and two discriminators, allowing two threshold settings. Each discriminator includes a 5-bit trim DAC and is followed by an 18-bit static ripple-counter. The channel architecture is optimized for the detector characteristics in order to achieve the best energy resolution at counting rates of up to 5 M counts/second. Complete evaluation of the circuit is presented using electronic pulses and Cd ZnTe pixel detectors.

  4. Design of a wideband CMOS impedance spectroscopy ASIC analog front-end for multichannel biosensor interfaces.

    Science.gov (United States)

    Valente, Virgilio; Dai Jiang; Demosthenous, Andreas

    2015-08-01

    This paper presents the preliminary design and simulation of a flexible and programmable analog front-end (AFE) circuit with current and voltage readout capabilities for electric impedance spectroscopy (EIS). The AFE is part of a fully integrated multifrequency EIS platform. The current readout comprises of a transimpedance stage and an automatic gain control (AGC) unit designed to accommodate impedance changes larger than 3 order of magnitude. The AGC is based on a dynamic peak detector that tracks changes in the input current over time and regulates the gain of a programmable gain amplifier in order to optimise the signal-to-noise ratio. The system works up to 1 MHz. The voltage readout consists of a 2 stages of fully differential current-feedback instrumentation amplifier which provide 100 dB of CMRR and a programmable gain up to 20 V/V per stage with a bandwidth in excess of 10MHz.

  5. A low power 3-5 GHz CMOS UWB receiver front-end

    International Nuclear Information System (INIS)

    Li Weinan; Huang Yumei; Hong Zhiliang

    2009-01-01

    A novel low power RF receiver front-end for 3-5 GHz UWB is presented. Designed in the 0.13 μm CMOS process, the direct conversion receiver features a wideband balun-coupled noise cancelling transconductance input stage, followed by quadrature passive mixers and transimpedance loading amplifiers. Measurement results show that the receiver achieves an input return loss below -8.5 dB across the 3.1-4.7 GHz frequency range, maximum voltage conversion gain of 27 dB, minimum noise figure of 4 dB, IIP3 of -11.5 dBm, and IIP2 of 33 dBm. Working under 1.2 V supply voltage, the receiver consumes total current of 18 mA including 10 mA by on-chip quadrature LO signal generation and buffer circuits. The chip area with pads is 1.1 x 1.5 mm 2 .

  6. Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

    CERN Document Server

    Albert, J; Alimonti, Gianluca; Allport, Phil; Altenheiner, Silke; Ancu, Lucian; Andreazza, Attilio; Arguin, Jean-Francois; Arutinov, David; Backhaus, Malte; Bagolini, Alvise; Ballansat, Jacques; Barbero, Marlon; Barbier, Gérard; Bates, Richard; Battistin, Michele; Baudin, Patrick; Beau, Tristan; Beccherle, Roberto; Beck, Hans Peter; Benoit, Mathieu; Bensinger, Jim; Bomben, Marco; Borri, Marcello; Boscardin, Maurizio; Botelho Direito, Jose Antonio; Bousson, Nicolas; Boyd, George Russell Jr; Breugnon, Patrick; Bruni, Graziano; Bruschi, Marco; Buchholz, Peter; Buttar, Craig; Cadoux, Franck; Calderini, Giovanni; Caminada, Leah; Capeans, Mar; Casse, Gianluigi; Catinaccio, Andrea; Cavalli-Sforza, Matteo; Chauveau, Jacques; Chu, Ming-Lee; Ciapetti, Marco; Cindro, Vladimir; Citterio, Mauro; Clark, Allan; Cobal, Marina; Coelli, Simone; Colijn, Auke-Pieter; Colin, Daly; Collot, Johann; Crespo-Lopez, Olivier; Dalla Betta, Gian-Franco; Darbo, Giovanni; DaVia, Cinzia; David, Pierre-Yves; Debieux, Stéphane; Delebecque, Pierre; Devetak, Erik; DeWilde, Burton; Di Girolamo, Beniamino; Dinu, Nicoleta; Dittus, Fridolin; Diyakov, Denis; Djama, Fares; Dobos, Daniel Adam; Doonan, Kate; Dopke, Jens; Dorholt, Ole; Dube, Sourabh; Dushkin, Andrey; Dzahini, Daniel; Egorov, Kirill; Ehrmann, Oswin; Elldge, David; Elles, Sabine; Elsing, Markus; Eraud, Ludovic; Ereditato, Antonio; Eyring, Andreas; Falchieri, Davide; Falou, Aboud; Fang, Xiaochao; Fausten, Camille; Favre, Yannick; Ferrere, Didier; Fleta, Celeste; Fleury, Julien; Flick, Tobias; Forshaw, Dean; Fougeron, Denis; Fritzsch, Thomas; Gabrielli, Alessandro; Gaglione, Renaud; Gallrapp, Christian; Gan, K; Garcia-Sciveres, Maurice; Gariano, Giuseppe; Gastaldi, Thibaut; Gemme, Claudia; Gensolen, Fabrice; George, Matthias; Ghislain, Patrick; Giacomini, Gabriele; Gibson, Stephen; Giordani, Mario Paolo; Giugni, Danilo; Gjersdal, Håvard; Glitza, Karl Walter; Gnani, Dario; Godlewski, Jan; Gonella, Laura; Gorelov, Igor; Gorišek, Andrej; Gössling, Claus; Grancagnolo, Sergio; Gray, Heather; Gregor, Ingrid-Maria; Grenier, Philippe; Grinstein, Sebastian; Gromov, Vladimir; Grondin, Denis; Grosse-Knetter, Jörn; Hansen, Thor-Erik; Hansson, Per; Harb, Ali; Hartman, Neal; Hasi, Jasmine; Hegner, Franziska; Heim, Timon; Heinemann, Beate; Hemperek, Tomasz; Hessey, Nigel; Hetmánek, Martin; Hoeferkamp, Martin; Hostachy, Jean-Yves; Hügging, Fabian; Husi, Coralie; Iacobucci, Giuseppe; Idarraga, John; Ikegami, Yoichi; Janoška, Zdenko; Jansen, Jens; Jansen, Luc; Jensen, Frank; Jentzsch, Jennifer; Joseph, John; Kagan, Harris; Karagounis, Michael; Kass, Richard; Kenney, Christopher J; Kersten, Susanne; Kind, Peter; Klingenberg, Reiner; Kluit, Ruud; Kocian, Martin; Koffeman, Els; Kok, Angela; Korchak, Oleksandr; Korolkov, Ilya; Kostyukhin, Vadim; Krieger, Nina; Krüger, Hans; Kruth, Andre; Kugel, Andreas; Kuykendall, William; La Rosa, Alessandro; Lai, Chung-Hang; Lantzsch, Kerstin; Laporte, Didier; Lapsien, Tobias; Lounis, abdenour; Lozano, Manuel; Lu, Yunpeng; Lubatti, Henry; Macchiolo, Anna; Mallik, Usha; Mandić, Igor; Marchand, Denis; Marchiori, Giovanni; Massol, Nicolas; Matthias, Wittgen; Mättig, Peter; Mekkaoui, Abderrazak; Menouni, Mohsine; Menu, Johann; Meroni, Chiara; Mesa, Javier; Micelli, Andrea; Michal, Sébastien; Miglioranzi, Silvia; Mikuž, Marko; Mitsui, Shingo; Monti, Mauro; Moore, J; Morettini, Paolo; Muenstermann, Daniel; Murray, Peyton; Nellist, Clara; Nelson, David J; Nessi, Marzio; Neumann, Manuel; Nisius, Richard; Nordberg, Markus; Nuiry, Francois-Xavier; Oppermann, Hermann; Oriunno, Marco; Padilla, Cristobal; Parker, Sherwood; Pellegrini, Giulio; Pelleriti, Gabriel; Pernegger, Heinz; Piacquadio, Nicola Giacinto; Picazio, Attilio; Pohl, David; Polini, Alessandro; Popule, Jiří; Portell Bueso, Xavier; Povoli, Marco; Puldon, David; Pylypchenko, Yuriy; Quadt, Arnulf; Quirion, David; Ragusa, Francesco; Rambure, Thibaut; Richards, Erik; Ristic, Branislav; Røhne, Ole; Rothermund, Mario; Rovani, Alessandro; Rozanov, Alexandre; Rubinskiy, Igor; Rudolph, Matthew Scott; Rummler, André; Ruscino, Ettore; Salek, David; Salzburger, Andreas; Sandaker, Heidi; Schipper, Jan-David; Schneider, Basil; Schorlemmer, Andre; Schroer, Nicolai; Schwemling, Philippe; Seidel, Sally; Seiden, Abraham; Šícho, Petr; Skubic, Patrick; Sloboda, Michal; Smith, D; Sood, Alex; Spencer, Edwin; Strang, Michael; Stugu, Bjarne; Stupak, John; Su, Dong; Takubo, Yosuke; Tassan, Jean; Teng, Ping-Kun; Terada, Susumu; Todorov, Theodore; Tomášek, Michal; Toms, Konstantin; Travaglini, Riccardo; Trischuk, William; Troncon, Clara; Troska, Georg; Tsiskaridze, Shota; Tsurin, Ilya; Tsybychev, Dmitri; Unno, Yoshinobu; Vacavant, Laurent; Verlaat, Bart; Vianello, Elisa; Vigeolas, Eric; von Kleist, Stephan; Vrba, Václav; Vuillermet, Raphaël; Wang, Rui; Watts, Stephen; Weber, Michele; Weber, Marteen; Weigell, Philipp; Weingarten, Jens; Welch, Steven David; Wenig, Siegfried; Wermes, Norbert; Wiese, Andreas; Wittig, Tobias; Yildizkaya, Tamer; Zeitnitz, Christian; Ziolkowski, Michal; Zivkovic, Vladimir; Zoccoli, Antonio; Zorzi, Nicola; Zwalinski, Lukasz

    2012-01-01

    The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.

  7. The first photon shutter development for APS insertion device beamline front ends

    International Nuclear Information System (INIS)

    Shu, Deming; Nian, H.L.T.; Wang, Zhibi; Collins, J.T.; Ryding, D.G.; Kuzay, T.M.

    1992-01-01

    One of the most critical components on the Advanced Photon Source (APS) insertion device (ID) beamline front ends is the first photon shutter. It operates in two modes to fully intercept the high total power and high-heat flux ID photon beam in seconds (normal mode) or in less than 100 ms (emergency fast mode). It is designed to operate in ultra high vacuum (UHV). The design incorporates a multi-channel rectangular bar, bent in a ''hockey stick'' configuration, with two-point suspension. The flanged end is an articulated bellows with rolling hinges. The actuation end is a spring-assisted, pneumatic fail-safe flexural pivot type. The coolant (water) channels incorporate brazed copper foam to enhance the heat transfer, a tube technology particular to the APS. The design development, and material aspects, as well as the extensive thermal and vibrational analyses in support of the design, are presented in this paper

  8. Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture

    CERN Document Server

    Cooper, B; The ATLAS collaboration

    2012-01-01

    Around 2021 the Large Hadron Collider will be upgraded to provide instantaneous luminosities 5x10^34, leading to excessive rates from the ATLAS Level-1 trigger. We describe a double-buffer front-end architecture for the ATLAS tracker replacement which should enable tracking information to be used in the Level-1 decision. This will allow Level-1 rates to be controlled whilst preserving high efficiency for single lepton triggers at relatively low transverse momentum thresholds pT ~25 GeV, enabling ATLAS to remain sensitive to physics at the electroweak scale. In particular, a potential hardware solution for the communication between the upgraded silicon barrel strip detectors and the external processing within this architecture will be described, and discrete event simulations used to demonstrate that this fits within the tight latency constraints.

  9. Front end electronics and first results of the ALICE V0 detector

    Energy Technology Data Exchange (ETDEWEB)

    Zoccarato, Y., E-mail: y.zoccarato@ipnl.in2p3.f [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Tromeur, W. [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Aguilar, S.; Alfaro, R.; Almaraz Avina, E.; Anzo, A.; Belmont, E. [Instituto de Fisica, Universidad Nacional Autonoma de Mexico, Circuito de la Investigacion Cientifica Ciudad Universitaria, C.P. 04510, Mexico, D.F. (Mexico); Cheshkov, C.; Cheynis, B.; Combaret, C. [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Contreras, G. [Centro de Investigacion y de Estudios Avanzados (CINVESTAV), Av. Instituto Politecnico Nacional 2508 Col. San Pedro Zacatenco, C.P. 07360, Mexico, D.F. (Mexico); Cuautle, E. [Instituto de Ciencias Nucleares, Universidad Nacional Autonoma de Mexico, Circuito Exterior s/n, Ciudad Universitaria. Delg. Coyoacan, C.P. 04510, Mexico, D.F. (Mexico); Ducroux, L. [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Gonzalez Trueba, L.; Grabski, V. [Instituto de Fisica, Universidad Nacional Autonoma de Mexico, Circuito de la Investigacion Cientifica Ciudad Universitaria, C.P. 04510, Mexico, D.F. (Mexico); Grossiord, J.-Y. [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Herrera Corral, G. [Centro de Investigacion y de Estudios Avanzados (CINVESTAV), Av. Instituto Politecnico Nacional 2508 Col. San Pedro Zacatenco, C.P. 07360, Mexico, D.F. (Mexico); Martinez, A. [Instituto de Fisica, Universidad Nacional Autonoma de Mexico, Circuito de la Investigacion Cientifica Ciudad Universitaria, C.P. 04510, Mexico, D.F. (Mexico)

    2011-01-21

    This paper gives a detailed description of the acquisition and trigger electronics especially designed for the V0 detector of ALICE at LHC. A short presentation of the detector itself is given before the description of the Front End Electronics (FEE) system, which is completely embedded within the LHC environment as far as acquisition (DAQ), trigger (CTP), and detector control (DCS) are concerned. It is able to detect on-line coincident events and to achieve charge (with a precision of 0.6 pC) and time measurements (with a precision of 100 ps). It deploys quite a simple architecture. It is however totally programmable and fully non-standard in discriminating events coming from Beam-Beam interaction and Beam-Gas background. Finally, raw data collected from the first LHC colliding beams illustrate the performance of the system.

  10. The NA62 LAV front-end electronics and the L0 trigger generating firmware

    CERN Document Server

    Gonnella, Francesco; Corradi, Giovanni; Kozhuharov , Venelin ; Martellotti, Silvia; Moulson, Matthew; Raggi, Mauro; Spadaro, Tommaso

    2014-01-01

    The aim of the NA62 experiment is to measure the branching ratio of the decay K + ! p + n ̄ n to within about 10%. The large-angle photon vetoes (LAVs) must detect particles with better than 1 ns time resolution and 10% energy resolution over a very large energy range in order to reject the dominant background: photons coming from p + p 0 decays. A low threshold, large dynamic range, time-over-threshold based solution has been developed for the LAV front end electronics (LAV-FEE). Our custom 32 channel 9U board uses a pair of low threshold discriminators for each channel to produce LVDS logic signals. The achieved time resolution obtained in laboratory, coupled to a readout board based on the HPTDC chip developed at CERN, is 100 ps. For LAV-FEE, a FPGA-based level-0 trigger providing slewing-corrected trigger time with similar precision has also been developed.

  11. A low power low noise analog front end for portable healthcare system

    International Nuclear Information System (INIS)

    Wang Yanchao; Ke Keren; Qin Wenhui; Qin Yajie; Yi Ting; Hong Zhiliang

    2015-01-01

    The presented analog front end (AFE) used to process human bio-signals consists of chopping instrument amplifier (IA), chopping spikes filter and programmable gain and bandwidth amplifier. The capacitor-coupling input of AFE can reject the DC electrode offset. The power consumption of current-feedback based IA is reduced by adopting capacitor divider in the input and feedback network. Besides, IA's input thermal noise is decreased by utilizing complementary CMOS input pairs which can offer higher transconductance. Fabricated in Global Foundry 0.35 μm CMOS technology, the chip consumes 3.96 μA from 3.3 V supply. The measured input noise is 0.85 μVrms (0.5–100 Hz) and the achieved noise efficient factor is 6.48. (paper)

  12. PDP-11 front-end for a VAX-11/780

    International Nuclear Information System (INIS)

    Browne, M.J.; Granieri, C.; Sherden, D.J.; Weaver, L.J.

    1980-01-01

    An unpublicized feature of the VAX-11/780 is the provision for attaching a PDP-11 to the VAX UNIBUS Adapter. Doing this can give significantly improved I/O performance for applications which are limited by overhead in the VAX I/O driver rather than by the transfer speed of the UNIBUS itself. Such a system was implemented by using a PDP-11/04 as a front-end to a CAMAC data acquisition system. Both the PDP and the VAX have full access to the UNIBUS. That portion of the PDP address space that does not have UNIBUS memory can be mapped to buffers in the VAX memory; this approach allows the PDP to access VAX memory and to initiate DMA transfers directly to the VAX. The VAX also has full access to the PDP memory; a convenient means for developing and downloading the PDP software is thus provided. 5 figures

  13. Analog lightwave links for detector front-ends at the LHC

    International Nuclear Information System (INIS)

    Baird, A.; Dowell, J.; Duthie, P.

    1995-01-01

    Lightwave links are being developed for volume application in the transfer of analog signals from the tracking detector front-ends to the readout electronics. The links are based on electro-optic intensity modulators which are mounted on detectors and connected by optical fibers to remotely located transceivers (lasers and photoreceivers). The modulators are 3--5 semiconductor reflective devices based on multi-quantum well structures. The transceivers will be integrated devices of a novel design. Modulator prototypes have been fabricated and tested. Neutron and γ-ray irradiation studies have been performed on modulators and fibers. The main results achieved so far are reported and key system issues are reviewed. This work is part of the CERN DRDC project RD23 project RD23

  14. The Study of Fault Location for Front-End Electronics System

    International Nuclear Information System (INIS)

    Zhang Fan; Wang Dong; Huang Guangming; Zhou Daicui

    2009-01-01

    Since some devices on the latest developed 250 ALICE/PHOS Front-end electronics (FEE) system cards had been partly or completely damaged during lead-free soldering. To alleviate the influence on the performance of FEE system and to locate fault related FPGA accurately, we should find a method for locating fault of FEE system based on the deep study of FPGA configuration scheme. It emphasized on the problems such as JTAG configuration of multi-devices, PS configuration based on EPC series configuration devices and auto re-configuration of FPGA. The result of the massive FEE system cards testing and repairing show that that location method can accurately and quickly target the fault point related FPGA on FEE system cards. (authors)

  15. Radiation Protection Aspects of the Linac Coherent Light Source Front End Enclosure

    Energy Technology Data Exchange (ETDEWEB)

    Vollaire, J.; Fasso, A.; Liu, J.C.; Mao, X.S.; Prinz, A.; Rokni, S.H.; Leitner, M.Santana; /SLAC

    2010-08-26

    The Front End Enclosure (FEE) of the Linac Coherent Light Source (LCLS) is a shielding housing located between the electron dump area and the first experimental hutch. The upstream part of the FEE hosts the commissioning diagnostics for the FEL beam. In the downstream part of the FEE, two sets of grazing incidence mirror and several collimators are used to direct the beam to one of the experimental stations and reduce the bremsstrahlung background and the hard component of the spontaneous radiation spectrum. This paper addresses the beam loss assumptions and radiation sources entering the FEE used for the design of the FEE shielding using the Monte-Carlo code FLUKA. The beam containment system prevents abnormal levels of radiations inside the FEE and ensures that the beam remains in its intended path is also described.

  16. A CMOS analog front-end chip for amperometric electrochemical sensors

    International Nuclear Information System (INIS)

    Li Zhichao; Chen Min; Xiao Jingbo; Chen Jie; Liu Yuntao

    2015-01-01

    This paper reports a complimentary metal–oxide–semiconductor (CMOS) analog front-end chip for amperometric electrochemical sensors. The chip includes a digital configuration circuit, which can communicate with an external microcontroller by employing an I 2 C interface bus, and thus is highly programmable. Digital correlative double samples technique and an incremental sigma–delta analog to digital converter (Σ–Δ ADC) are employed to achieve a new proposed system architecture with double samples. The chip has been fabricated in a standard 0.18-μm CMOS process with high-precision and high-linearity performance occupying an area of 1.3 × 1.9 mm 2 . Sample solutions with various phosphate concentrations have been detected with a step concentration of 0.01 mg/L. (paper)

  17. Dead-time free pixel readout architecture for ATLAS front-end IC

    CERN Document Server

    Einsweiler, Kevin F; Kleinfelder, S A; Luo, L; Marchesini, R; Milgrome, O; Pengg, F X

    1999-01-01

    A low power sparse scan readout architecture has been developed for the ATLAS pixel front-end IC. The architecture supports a dual discriminator and extracts the time over threshold (TOT) information along with a 2-D spatial address $9 of the hits associating them with a unique 7-bit beam crossing number. The IC implements level-1 trigger filtering along with event building (grouping together all hits in a beam crossing) in the end of column (EOC) buffer. The $9 events are transmitted over a 40 MHz serial data link with the protocol supporting buffer overflow handling by appending error flags to events. This mixed-mode full custom IC is implemented in 0.8 mu HP process to meet the $9 requirements for the pixel readout in the ATLAS inner detector. The circuits have been tested and the IC provides dead-time-less ambiguity free readout at 40 MHz data rate.

  18. Modeling, simulation, and optimization of a front-end system for acetylene hydrogenation reactors

    Directory of Open Access Journals (Sweden)

    R. Gobbo

    2004-12-01

    Full Text Available The modeling, simulation, and dynamic optimization of an industrial reaction system for acetylene hydrogenation are discussed in the present work. The process consists of three adiabatic fixed-bed reactors, in series, with interstage cooling. These reactors are located after the compression and the caustic scrubbing sections of an ethylene plant, characterizing a front-end system; in contrast to the tail-end system where the reactors are placed after the de-ethanizer unit. The acetylene conversion and selectivity profiles for the reactors are optimized, taking into account catalyst deactivation and process constraints. A dynamic optimal temperature profile that maximizes ethylene production and meets product specifications is obtained by controlling the feed and intercoolers temperatures. An industrial acetylene hydrogenation system is used to provide the necessary data to adjust kinetics and transport parameters and to validate the approach.

  19. Scintillation counter and wire chamber front end modules for high energy physics experiments

    International Nuclear Information System (INIS)

    Baldin, Boris; DalMonte, Lou

    2011-01-01

    This document describes two front-end modules developed for the proposed MIPP upgrade (P-960) experiment at Fermilab. The scintillation counter module was developed for the Plastic Ball detector time and charge measurements. The module has eight LEMO 00 input connectors terminated with 50 ohms and accepts negative photomultiplier signals in the range 0.25...1000 pC with the maximum input voltage of 4.0 V. Each input has a passive splitter with integration and differentiation times of ∼20 ns. The integrated portion of the signal is digitized at 26.55 MHz by Analog Devices AD9229 12-bit pipelined 4-channel ADC. The differentiated signal is discriminated for time measurement and sent to one of the four TMC304 inputs. The 4-channel TMC304 chip allows high precision time measurement of rising and falling edges with ∼100 ps resolution and has internal digital pipeline. The ADC data is also pipelined which allows deadtime-less operation with trigger decision times of ∼4 (micro)s. The wire chamber module was developed for MIPP EMCal detector charge measurements. The 32-channel digitizer accepts differential analog signals from four 8-channel integrating wire amplifiers. The connection between wire amplifier and digitizer is provided via 26-wire twist-n-flat cable. The wire amplifier integrates input wire current and has sensitivity of 275 mV/pC and the noise level of ∼0.013 pC. The digitizer uses the same 12-bit AD9229 ADC chip as the scintillator counter module. The wire amplifier has a built-in test pulser with a mask register to provide testing of the individual channels. Both modules are implemented as a 6Ux220 mm VME size board with 48-pin power connector. A custom europack (VME) 21-slot crate is developed for housing these front-end modules.

  20. Front-End Electronics for Verification Measurements: Performance Evaluation and Viability of Advanced Tamper Indicating Measures

    International Nuclear Information System (INIS)

    Smith, E.; Conrad, R.; Morris, S.; Ramuhalli, P.; Sheen, D.; Schanfein, M.; Ianakiev, K.; Browne, M.; Svoboda, J.

    2015-01-01

    The International Atomic Energy Agency (IAEA) continues to expand its use of unattended, remotely monitored measurement systems. An increasing number of systems and an expanding family of instruments create challenges in terms of deployment efficiency and the implementation of data authentication measures. A collaboration between Pacific Northwest National Laboratory (PNNL), Idaho National Laboratory (INL), and Los Alamos National Laboratory (LANL) is working to advance the IAEA's capabilities in these areas. The first objective of the project is to perform a comprehensive evaluation of a prototype front-end electronics package, as specified by the IAEA and procured from a commercial vendor. This evaluation begins with an assessment against the IAEA's original technical specifications and expands to consider the strengths and limitations over a broad range of important parameters that include: sensor types, cable types, and the spectrum of industrial electromagnetic noise that can degrade signals from remotely located detectors. A second objective of the collaboration is to explore advanced tamper-indicating (TI) measures that could help to address some of the long-standing data authentication challenges with IAEA's unattended systems. The collaboration has defined high-priority tampering scenarios to consider (e.g., replacement of sensor, intrusion into cable), and drafted preliminary requirements for advanced TI measures. The collaborators are performing independent TI investigations of different candidate approaches: active time-domain reflectometry (PNNL), passive noise analysis (INL), and pulse-by-pulse analysis and correction (LANL). The initial investigations focus on scenarios where new TI measures are retrofitted into existing IAEA UMS deployments; subsequent work will consider the integration of advanced TI methods into new IAEA UMS deployments where the detector is separated from the front-end electronics. In this paper, project progress

  1. The front-end chip of the SuperB SVT detector

    International Nuclear Information System (INIS)

    Giorgi, F.; Comotti, D.; Manghisoni, M.; Re, V.; Traversi, G.; Fabbri, L.; Gabrielli, A.; Pellegrini, G.; Sbarra, C.; Semprini-Cesari, N.; Valentinetti, S.; Villa, M.; Zoccoli, A.; Berra, A.; Lietti, D.; Prest, M.; Bevan, A.; Wilson, F.; Beck, G.; Morris, J.

    2013-01-01

    The asymmetric e + e − collider SuperB is designed to deliver a high luminosity, greater than 10 36 cm −2 s −1 , with moderate beam currents and a reduced center of mass boost with respect to earlier B-Factories. The innermost detector is the Silicon Vertex Tracker which is made of 5 layers of double sided silicon strip sensors plus a layer 0, that can be equipped with short striplets detectors in a first phase of the experiment. In order to achieve an overall track reconstruction efficiency above 98% it is crucial to optimize both analog and digital readout circuits. The readout architecture being developed for the front-end chips will be able to cope with the very high rates expected in the first layer. The digital readout will be optimized to be fully efficient for hit rates up to 2 MHz/strip, including large margins on the maximum expected background rates, but can potentially accommodate higher rates with a proper tuning of the buffer depth. The readout is based on a triggered architecture where each of the 128 strip channel is provided with a dedicated digital buffer. Each buffer collects the digitized charge information by means of a 4-bit TOT, storing it in conjunction with the related time stamp. The depth of buffers was dimensioned considering the expected trigger latency and hit rate including suitable safety margins. Every buffer is connected to a highly parallelized circuit handling the trigger logic, rejecting expired data in the buffers and channeling the parallel stream of triggered hits to the common output of the chip. The presented architecture has been modeled by HDL language and investigated with a Monte Carlo hit generator emulating the analog front-end behavior. The simulations showed that even applying the highest stressing conditions, about 2 MHz per strip, the efficiency of the digital readout remained above 99.8%

  2. Optimizing read-out of the NECTAr front-end electronics

    Science.gov (United States)

    Vorobiov, S.; Feinstein, F.; Bolmont, J.; Corona, P.; Delagnes, E.; Falvard, A.; Gascón, D.; Glicenstein, J.-F.; Naumann, C. L.; Nayman, P.; Ribo, M.; Sanuy, A.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.

    2012-12-01

    We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.

  3. Optimizing read-out of the NECTAr front-end electronics

    Energy Technology Data Exchange (ETDEWEB)

    Vorobiov, S., E-mail: vorobiov@lpta.in2p3.fr [LUPM, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); DESY-Zeuthen, Platanenallee 6, 15738 Zeuthen (Germany); Feinstein, F. [LUPM, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); Bolmont, J.; Corona, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Paris (France); Delagnes, E. [IRFU/DSM/CEA, Saclay, Gif-sur-Yvette (France); Falvard, A. [LUPM, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); Gascon, D. [ICC-UB, Universitat Barcelona, Barcelona (Spain); Glicenstein, J.-F. [IRFU/DSM/CEA, Saclay, Gif-sur-Yvette (France); Naumann, C.L.; Nayman, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Paris (France); Ribo, M.; Sanuy, A. [ICC-UB, Universitat Barcelona, Barcelona (Spain); Tavernet, J.-P.; Toussenel, F.; Vincent, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Paris (France)

    2012-12-11

    We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.

  4. Optimizing read-out of the NECTAr front-end electronics

    International Nuclear Information System (INIS)

    Vorobiov, S.; Feinstein, F.; Bolmont, J.; Corona, P.; Delagnes, E.; Falvard, A.; Gascón, D.; Glicenstein, J.-F.; Naumann, C.L.; Nayman, P.; Ribo, M.; Sanuy, A.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.

    2012-01-01

    We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.

  5. 29 CFR 782.5 - Loaders.

    Science.gov (United States)

    2010-07-01

    ... transfer of freight between the vehicles and the warehouse, but he engages, as a “loader,” in work directly... and a mechanical conveyor, it has been held that employees operating such a crane or conveyor in the....D. Tex.); Garton v. Sanders Transfer & Storage Co., 124 F. Supp. 84 (M.D. Tenn.); McKeown v...

  6. A protocol for hit and control synchronous transfer for the front-end electronics at the CBM experiment

    International Nuclear Information System (INIS)

    Kasinski, K.; Szczygiel, R.; Zabolotny, W.; Lehnert, J.; Schmidt, C.J.; Müller, W.F.J.

    2016-01-01

    The Silicon Tracking System, Muon Chamber, Transition Radiation Detector and Time-Of-Flight among others are the detector systems of the Compressed Baryonic Matter (CBM) experiment at the FAIR facility. These detector systems will be built with tens of thousands of front-end ASICs exposed to high radiation doses and difficult environmental and interference conditions. A CERN's GBTx-based solution was chosen for combining data from multiple front-end ASICs into an optical link before further concentration and preprocessing in the common Data Processing Board data hub. This paper presents the protocol design addressing the DAQ system requirements, simplifying the ASIC's back-end design and presents its adaptation for the STS and MUCH detector's conditions. A specific link synchronization technique, hit data bandwidth optimization and time synchronization method for the self-triggered front-end chip are presented.

  7. Development of a multi-channel front-end electronics module based on ASIC for silicon strip array detectors

    International Nuclear Information System (INIS)

    Zhao Xingwen; Yan Duo; Su Hong; Qian Yi; Kong Jie; Zhang Xueheng; Li Zhankui; Li Haixia

    2014-01-01

    The silicon strip array detector is one of external target facility subsystems in the Cooling Storage Ring on the Heavy Ion Research Facility at Lanzhou (HIRFL-CSR). Using the ASICs, the front-end electronics module has been developed for the silicon strip array detectors and can implement measurement of energy of 96 channels. The performance of the front-end electronics module has been tested. The energy linearity of the front-end electronics module is better than 0.3% for the dynamic range of 0.1∼0.7 V. The energy resolution is better than 0.45%. The maximum channel crosstalk is better than 10%. The channel consistency is better than 1.3%. After continuously working for 24 h at room temperature, the maximum drift of the zero-peak is 1.48 mV. (authors)

  8. A protocol for hit and control synchronous transfer for the front-end electronics at the CBM experiment

    Energy Technology Data Exchange (ETDEWEB)

    Kasinski, K., E-mail: kasinski@agh.edu.pl [AGH University of Science and Technology, Department of Measurement and Electronics, Av. Mickiewicza 30, 30-059 Cracow (Poland); Szczygiel, R. [AGH University of Science and Technology, Department of Measurement and Electronics, Av. Mickiewicza 30, 30-059 Cracow (Poland); Zabolotny, W. [Institute of Electronic Systems, Warsaw University of Technology, ul. Nowowiejska 15/19, 00-665 Warsaw (Poland); Lehnert, J.; Schmidt, C.J. [GSI Helmholtzzentrum für Schwerionenforschung GmbH, Planckstrasse 1, 64-291 Darmstadt (Germany); Müller, W.F.J. [FAIR Facility for Antiproton and Ion Research in Europe GmbH, Planckstrasse 1, 64-291 Darmstadt (Germany)

    2016-11-01

    The Silicon Tracking System, Muon Chamber, Transition Radiation Detector and Time-Of-Flight among others are the detector systems of the Compressed Baryonic Matter (CBM) experiment at the FAIR facility. These detector systems will be built with tens of thousands of front-end ASICs exposed to high radiation doses and difficult environmental and interference conditions. A CERN's GBTx-based solution was chosen for combining data from multiple front-end ASICs into an optical link before further concentration and preprocessing in the common Data Processing Board data hub. This paper presents the protocol design addressing the DAQ system requirements, simplifying the ASIC's back-end design and presents its adaptation for the STS and MUCH detector's conditions. A specific link synchronization technique, hit data bandwidth optimization and time synchronization method for the self-triggered front-end chip are presented.

  9. The Virtual Learning Commons: Supporting the Fuzzy Front End of Scientific Research with Emerging Technologies

    Science.gov (United States)

    Pennington, D. D.; Gandara, A.; Gris, I.

    2012-12-01

    The Virtual Learning Commons (VLC), funded by the National Science Foundation Office of Cyberinfrastructure CI-Team Program, is a combination of Semantic Web, mash up, and social networking tools that supports knowledge sharing and innovation across scientific disciplines in research and education communities and networks. The explosion of scientific resources (data, models, algorithms, tools, and cyberinfrastructure) challenges the ability of researchers to be aware of resources that might benefit them. Even when aware, it can be difficult to understand enough about those resources to become potential adopters or re-users. Often scientific data and emerging technologies have little documentation, especially about the context of their use. The VLC tackles this challenge by providing mechanisms for individuals and groups of researchers to organize Web resources into virtual collections, and engage each other around those collections in order to a) learn about potentially relevant resources that are available; b) design research that leverages those resources; and c) develop initial work plans. The VLC aims to support the "fuzzy front end" of innovation, where novel ideas emerge and there is the greatest potential for impact on research design. It is during the fuzzy front end that conceptual collisions across disciplines and exposure to diverse perspectives provide opportunity for creative thinking that can lead to inventive outcomes. The VLC integrates Semantic Web functionality for structuring distributed information, mash up functionality for retrieving and displaying information, and social media for discussing/rating information. We are working to provide three views of information that support researchers in different ways: 1. Innovation Marketplace: supports users as they try to understand what research is being conducted, who is conducting it, where they are located, and who they collaborate with; 2. Conceptual Mapper: supports users as they organize their

  10. LHCb : A generic firmware core to drive the Front-End GBT-SCAs for the LHCb ugprade

    CERN Multimedia

    Alessio, Federico; Gaspar, Clara; Jacobsson, Richard; Wyllie, Ken

    2014-01-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire Front-End electronics will be upgraded in order to cope with higher sub-detector occupancy, higher data rate and to work in a complete trigger-less fashion. In this paper, we describe a novel way to transmit slow control information to the Front-End electronics, by profiting from bidirectional optical connections and the GBT and GBT-SCA chipset capabilities. The implementation and preliminary validation tests are shown as well

  11. A generic firmware core to drive the Front-End GBT-SCAs for the LHCb ugprade

    CERN Document Server

    Alessio, F; Gaspar, C; Jacobsson, R; Wyllie, K

    2014-01-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire Front-End electronics will be upgraded in order to cope with higher sub-detector occupancy, higher data rate and to work in a complete trigger-less fashion. In this paper, we describe a novel way to transmit slow control information to the Front-End electronics, by profiting from bidirectional optical connections and the GBT and GBT-SCA chipset capabilities. The implementation and preliminary validation tests are shown as well.

  12. A generic firmware core to drive the Front-End GBT-SCAs for the LHCb upgrade

    International Nuclear Information System (INIS)

    Alessio, F.; Gaspar, C.; Jacobsson, R.; Wyllie, K.; Caplan, C.

    2015-01-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire Front-End electronics will be upgraded in order to cope with higher sub-detector occupancy, higher data rate and to work in a complete trigger-less fashion. In this paper, we describe a novel way to transmit slow control information to the Front-End electronics, by profiting from bidirectional optical connections and the GBT and GBT-SCA chipset capabilities. The implementation and preliminary validation tests are shown as well

  13. Influence Of Tools Input/Output Requirements On Managers Core Front End Activities In New Product Development

    DEFF Research Database (Denmark)

    Appio, Francesco P.; Achiche, Sofiane; Minin, Alberto Di

    2011-01-01

    opportunities; make this early phase of the innovation process uncertain and extremely risky. Literature suggests that the understanding, selection and use of appropriate tools/techniques to support decision making are instrumental for a less fuzzy front end of innovation. This paper considers the adoption......The object of analysis of this explorative research is the Fuzzy Front End of Innovation in Product Development, described by those activities going from the opportunity identification to the concept definition. Business scholars have shown that confusion in terms of goals and different ideas about...

  14. Development of pixel front-end electronics using advanced deep submicron CMOS technologies

    International Nuclear Information System (INIS)

    Havranek, Miroslav

    2014-09-01

    The content of this thesis is oriented on the R and D of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore's laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key parameters for design of the pixel front-end electronics and thus it is closely related to the content of the thesis. The theoretical background, aspects of chip design, performance of chip prototypes and prospect for design of large pixel chips are comprehensively described in five chapters of the thesis.

  15. DAQ system for testing RPC front-end electronics of the INO experiment

    International Nuclear Information System (INIS)

    Hari Prasad, K.; Sukhwani, Menka; Kesarkar, Tushar A.; Kumar, Sandeep; Chandratre, V.B.; Das, D.; Shinde, R.R.; Satyanarayana, B.

    2015-01-01

    The Resistive Plate Chamber (RPC) is the active detector element in the INO experiment. The in-house developed ANUSPARSH-III ASICs are being used as front-end electronics of the detector. The 2 m X 2 m RPC being used has 64-readout channels on X-side and 64-readout channels on Y-side. In order to test and validate the FE along with the RPC, a 64-channel DAQ system has been designed and developed. The detector parameters to be measured are noise rate, efficiency, hit pattern register and time resolution. The salient features of the DAQ system are: 64-channel LVDS receiver in FPGA, FPGA based parameter calculations and a micro controller for acquiring the processed data from FPGAs and sent through Ethernet and USB interfaces. The DAQ system consists of following parts: Two FPGAs each receiving 32 LVDS channels, FPGA firm-ware, micro controller firm-ware, Ethernet interface, embedded web server hosting data analysis software, USB interface, and Lab-windows based data analysis software. The DAQ system has been tested at TIFR with 1 m X 1 m RPC

  16. A multichannel front end ASIC for PMT readout in LHAASO WCDA

    Science.gov (United States)

    Liang, Y.; Zhao, L.; Guo, Y.; Qin, J.; Yang, Y.; Cheng, B.; Liu, S.; An, Q.

    2018-01-01

    Time and charge measurements over a large dynamic range from 1 Photo Electron (P.E.) to 4000 P.E. are required for the Water Cherenkov Detector Array (WCDA), which is one of the key components in the Large High Altitude Air Shower Observatory (LHAASO). To simplify the circuit structure of the readout electronics, a front end ASIC was designed. Based on the charge-to-time conversion method, the output pulse width of the ASIC corresponds to the input signal charge information while time information of the input signal is picked off through a discriminator, and thus the time and charge information can be digitized simultaneously using this ASIC and a following Time-to-Digital Converter (TDC). To address the challenge of mismatch among the channels observed in the previous prototype version, this work presents approaches for analyzing the problem and optimizing the circuits. A new version of the ASIC was designed and fabricated in the GLOBALFOUNDRIES 0.35 μm CMOS technology, which integrates 6 channels (corresponding to the readout of the 3 PMTs) in each chip. The test results indicate that the mismatch between the channels is significantly reduced to less than 20% using the proposed approach. The time measurement resolution better than 300 ps is achieved, and the charge measurement resolution is better than 10% at 1 P.E., and 1% at 4000 P.E., which meets the application requirements.

  17. Radiation exposure monitoring and control in front-end fuel cycle facilities

    International Nuclear Information System (INIS)

    Khan, A.H.

    2003-01-01

    The front end nuclear fuel cycle facilities presently operational in India are the mining and processing of beach mineral sands along the southern coast of Kerala, Tamilnadu and Orissa, mining and processing of uranium ore in Singhbhum-East in Jharkhand and refining and fuel fabrication at Hyderabad and Trombay. Dedicated Health Physics Units set up at each site regularly carry out in-plant and personnel monitoring to ensure safe working conditions and evaluate radiation exposure of workers and advise appropriate control measures. External gamma radiation, radon, thoron, their progeny and airborne long-lived activity due to radioactive dust are monitored. Personal dosimeters are also issued to workers. The total radiation exposure of workers from external and internal sources is evaluated from the plant and personal monitoring data. Provision of adequate ventilation, control of dust and spillage of active solutions, prompt decontamination, use of personal protective appliances and worker education are the key factors in keeping the doses to the workers well within the regulatory limits. It has been observed that the total radiation dose to workers has been well below 20 mSv.y - 1 at all stages of operations. The monitoring methodologies and summary of radiation exposure data for different facilities during the last few years are presented in the paper. (author)

  18. The Front-End Concentrator card for the RD51 Scalable Readout System

    International Nuclear Information System (INIS)

    Toledo, J; Esteve, R; Monzó, J M; Tarazona, A; Muller, H; Martoiu, S

    2011-01-01

    Conventional readout systems exist in many variants since the usual approach is to build readout electronics for one given type of detector. The Scalable Readout System (SRS) developed within the RD51 collaboration relaxes this situation considerably by providing a choice of frontends which are connected over a customizable interface to a common SRS DAQ architecture. This allows sharing development and production costs among a large base of users as well as support from a wide base of developers. The Front-end Concentrator card (FEC), a RD51 common project between CERN and the NEXT Collaboration, is a reconfigurable interface between the SRS online system and a wide range of frontends. This is accomplished by using application-specific adapter cards between the FEC and the frontends. The ensemble (FEC and adapter card are edge mounted) forms a 6U × 220 mm Eurocard combo that fits on a 19'' subchassis. Adapter cards exist already for the first applications and more are in development.

  19. Continuous-time digital front-ends for multistandard wireless transmission

    CERN Document Server

    Nuyts, Pieter A J; Dehaene, Wim

    2014-01-01

    This book describes the design of fully digital multistandard transmitter front-ends which can directly drive one or more switching power amplifiers, thus eliminating all other analog components.  After reviewing different architectures, the authors focus on polar architectures using pulse width modulation (PWM), which are entirely based on unclocked delay lines and other continuous-time digital hardware.  As a result, readers are enabled to shift accuracy concerns from the voltage domain to the time domain, to coincide with submicron CMOS technology scaling.  The authors present different architectural options and compare them, based on their effect on the signal and spectrum quality.  Next, a high-level theoretical analysis of two different PWM-based architectures – baseband PWM and RF PWM – is made.  On the circuit level, traditional digital components and design techniques are revisited from the point of view of continuous-time digital circuits.  Important design criteria are identified and diff...

  20. Front-end counting mode electronics for CdZnTe sensor readout

    CERN Document Server

    Moraes, Danielle; Kaplon, Jan

    2004-01-01

    The development of a front-end circuit optimized for CdZnTe detector readout, implemented in 0.25 mu m CMOS technology, is reported. The ASIC comprises 17 channels of a charge sensitive amplifier with an active feedback, followed by a gain-shaper stage and a discriminator with a 5 bit fine-tune DAC. The signal from the discriminator is sensed by a 25 ns mono-stable circuit and an 18-bit static ripple- counter. The channel architecture is optimized for the detector characteristics in order to achieve the best energy resolution at a maximum counting rate of 2 million counts/second. The amplifier shows a linear sensitivity of 24 mV/fC with 50 ns peaking time and an equivalent noise charge of about 650 e/sup -/, for a detector capacitance of 10 pF. When connected to a 3*3*7 mm/sup 3/ CdZnTe detector the amplifier gain is about 8 mV/keV with a noise around 3.6 keV.

  1. Web Monitoring of EOS Front-End Ground Operations, Science Downlinks and Level 0 Processing

    Science.gov (United States)

    Cordier, Guy R.; Wilkinson, Chris; McLemore, Bruce

    2008-01-01

    This paper addresses the efforts undertaken and the technology deployed to aggregate and distribute the metadata characterizing the real-time operations associated with NASA Earth Observing Systems (EOS) high-rate front-end systems and the science data collected at multiple ground stations and forwarded to the Goddard Space Flight Center for level 0 processing. Station operators, mission project management personnel, spacecraft flight operations personnel and data end-users for various EOS missions can retrieve the information at any time from any location having access to the internet. The users are distributed and the EOS systems are distributed but the centralized metadata accessed via an external web server provide an effective global and detailed view of the enterprise-wide events as they are happening. The data-driven architecture and the implementation of applied middleware technology, open source database, open source monitoring tools, and external web server converge nicely to fulfill the various needs of the enterprise. The timeliness and content of the information provided are key to making timely and correct decisions which reduce project risk and enhance overall customer satisfaction. The authors discuss security measures employed to limit access of data to authorized users only.

  2. Testing and development of an OWC MRI compatible PET insert front-end

    Energy Technology Data Exchange (ETDEWEB)

    Konstantinou, G.; Ali, W.; Chil, R.; Cossu, G.; Ciaramella, E.; Vaquero, J.J.

    2016-07-01

    We present the design and development of a positron emission tomography (PET) detector module that could be used inside magnetic resonance imager (MRI). Critical factors compromising this combination have been studied and different solutions have been offered. Our design divides the detector module in two sections: one is the insert front-end that is placed inside the MRI and that comprises of a scintillator, a silicon photomultiplier and minimum analog electronics. The analog pulses are sent to the second section, the back-end digitalization and reconstruction module. The analog link is implemented using optical wireless communication (OWC) techniques. In this work we study how such a setting retains all the necessary characteristics for the detection and characterization of gamma scintillation events, providing sufficient communication quality with low consumption and minimizing the need for space. Possible multiplexing schemes for achieving the necessary transmission with less communication channels are also proposed and studied. A series of tests and measurements on different settings demonstrate the viability of this technique. When fully developed, it can provide a cost effective alternative for the industrial production of a flexible and customizable modular PET detector insert that can be applied to pre-existing small animal or human MRI settings, only minimally affecting the size of the MRI bore, without compromising the PET signal quality. (Author)

  3. Peaceful nuclear programme and front end nuclear fuel cycle activities in Pakistan

    International Nuclear Information System (INIS)

    S. Mukhtar Ahmed

    1999-01-01

    Pakistan has a modest but broad based nuclear programme related to peaceful uses of atomic energy in nuclear power, agriculture, medicine and industry. While development projects in these areas form the major segment of Pakistan Atomic Energy Commission's work, complimentary activities in basic research and human resource development are also supported. PAEC through its activities has been moving towards the goal of achieving self-reliance for its existing programme in an international atmosphere of embargoes and restrictions and in pursuit of creating an infrastructure to help sustain an indigenous nuclear power programme. To solve the local needs and requirements, radioisotopes and nuclear techniques have been applied in agriculture, medicine, hydrology and industry. PAEC has one large research and development establishment in physical sciences, three R and D centers in agriculture, one in biotechnology, and ten nuclear medical centers for diagnostics and oncology treatment. Two research reactors form nucleus of research and development activities in nuclear sciences. In the power sector a 137 Mew CANDU power reactor is in operation in Karachi since 1971. Another 300 Mew PWR is under construction and is nearing completion. Front-end fuel cycle and engineering infrastructure facilities have been established to support continued operation of Karachi Nuclear Power Plant (KANUPP). To support the engineering activities it has established facilities for precision workshops, non-destructive testing center and a welding institute. (author)

  4. An Electronic Model of the ATLAS Phase-1 Upgrade Hadronic Endcap Calorimeter Front End Crate Baseplane

    CERN Document Server

    Porter, Ryan

    This thesis presents an electrical model of two pairs of interconnects of the ATLAS Phase-1 Upgrade Hadronic Endcap Front End Crate prototype baseplane. Stripline transmission lines of the baseplane are modeled using Keysight Technologies' Electromagnetic Professional's (EMPro) 3D electromagnetic simulation (Finite Element Method) and the connectors are modeled using built-in models in Keysight Technologies' Advanced Design System (ADS). The model is compared in both the time and frequency domain to measured Time Domain Reflectometer (TDR) traces and S-parameters. The S-parameters of the model are found to be within $5\\%$ of the measured S-parameters for transmission and reflection, and range from $25\\%$ below to $100\\%$ above for forward and backward crosstalk. To make comparisons with measurements, the cables used to connect the prototype HEC baseplane to the measurement system had to be included in the model. Plots of the S-parameters of a model without these cables are presented for one pair of interconne...

  5. Replacing PS controls front end minicomputers by VME based 32-bit processors

    International Nuclear Information System (INIS)

    Gagnaire, A.; Metz Noblat, N. de; Serre, Ch.; Sicard, Cl.H.

    1992-01-01

    The PS controls have started the first phase of system rejuvenation, targeted towards the LEP Preinjector Controls. The main impact of this phase is in the architectural change, as both the front-end minicomputers and the CAMAC embedded microprocessors are replaced by microprocessor based VME crates called Device Stub Controllers (DSC). This paper discusses the different steps planned for this first phase, i.e: (1) implementing the basic set of CERN Accelerator common facilities for DSCs (error handling, system surveillance, remote boot and network access); (2) porting the equipment access software layer; (3) applying the Real-time tasks to the LynxOS operating system and I/O architecture, conforming to the real-time constraints for control and acquisition; (4) defining the number and contents of the different DSC needed, according to geographical and cpu-load constraints; (5) providing the general services outside the DSC crates (file servers, data-base services); (6) emulating the current Console programs onto the new workstations. (author)

  6. Photodetectors and front-end electronics for the LHCb RICH upgrade

    Science.gov (United States)

    Cassina, L.; LHCb RICH

    2017-12-01

    The RICH detectors of the LHCb experiment provide identification of hadrons produced in high energy proton-proton collisions in the LHC at CERN over a wide momentum range (2-100 GeV/c). Cherenkov light is collected on photon detector planes sensitive to single photons. The RICH will be upgraded (in 2019) to read out every bunch crossing, at a rate of 40 MHz. The current hybrid photon detectors (HPD) will be replaced with multi-anode photomultiplier tubes (customisations of the Hamamatsu R11265 and the H12699 MaPMTs). These 8×8 pixel devices meet the experimental requirements thanks to their small pixel size, high gain, negligible dark count rate (∼50 Hz/cm2) and moderate cross-talk. The measured performance of several tubes is reported, together with their long-term stability. A new 8-channel front-end chip, named CLARO, has been designed in 0.35 μm CMOS AMS technology for the MaPMT readout. The CLARO chip operates in binary mode and combines low power consumption (∼1 mW/Ch), wide bandwidth (baseline restored in ⩽ 25 ns) and radiation hardness. A 12-bit digital register permits the optimisation of the dynamic range and the threshold level for each channel and provides tools for the on-site calibration. The design choices and the characterization of the electronics are presented.

  7. Comparison of OQPSK and CPM for Communications at 60 GHz with a Nonideal Front End

    Directory of Open Access Journals (Sweden)

    Jimmy Nsenga

    2007-03-01

    Full Text Available Short-range digital communications at 60 GHz have recently received a lot of interest because of the huge bandwidth available at those frequencies. The capacity offered to the users could finally reach 2 Gbps, enabling the deployment of new multimedia applications. However, the design of analog components is critical, leading to a possible high nonideality of the front end (FE. The goal of this paper is to compare the suitability of two different air interfaces characterized by a low peak-to-average power ratio (PAPR to support communications at 60 GHz. On one hand, we study the offset-QPSK (OQPSK modulation combined with a channel frequency-domain equalization (FDE. On the other hand, we study the class of continuous phase modulations (CPM combined with a channel time-domain equalizer (TDE. We evaluate their performance in terms of bit error rate (BER considering a typical indoor propagation environment at 60 GHz. For both air interfaces, we analyze the degradation caused by the phase noise (PN coming from the local oscillators; and by the clipping and quantization errors caused by the analog-to-digital converter (ADC; and finally by the nonlinearity in the PA.

  8. Development of pixel front-end electronics using advanced deep submicron CMOS technologies

    Energy Technology Data Exchange (ETDEWEB)

    Havranek, Miroslav

    2014-09-15

    The content of this thesis is oriented on the R and D of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore's laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key parameters for design of the pixel front-end electronics and thus it is closely related to the content of the thesis. The theoretical background, aspects of chip design, performance of chip prototypes and prospect for design of large pixel chips are comprehensively described in five chapters of the thesis.

  9. A low-power high dynamic range front-end ASIC for imaging calorimeters

    CERN Document Server

    Bagliesi, M G; Marrocchesi, P S; Meucci, M; Millucci, V; Morsani, F; Paoletti, R; Pilo, F; Scribano, A; Turini, N; Valle, G D

    2002-01-01

    High granularity calorimeters with shower imaging capabilities require dedicated front-end electronics. The ICON 4CH and VA4 PMT chip-set is suitable for very high dynamic range systems with strict noise requirements. The ICON 4CH is a 4 channel input, 12 channel output ASIC designed for use in a multi-anode photomultiplier system with very large dynamic range and low-noise requirements. Each of the four input signals to the ASIC is split equally into three branches by a current conveyor. Each of the three branches is scaled differently: 1:1, 1:8 and 1:80. The signal is read out by a 12 channel low noise/low power high dynamic range charge sensitive preamplifier-shaper circuit (VA4-PMT chip), with simultaneous sample- and-hold, multiplexed analog read-out, calibration facilities. Tests performed in our lab with a PMT are reported in terms of linearity, dynamic range and cross-talk of the system. (5 refs).

  10. A Time-Based Front End Readout System for PET & CT

    CERN Document Server

    Meyer, T C; Anghinolfi, F; Auffray, E; Dosanjh, M; Hillemanns, H; Hoffmann, H -F; Jarron, P; Kaplon, J; Kronberger, M; Lecoq, P; Moraes, D; Trummer, J

    2007-01-01

    In the framework of the European FP6's BioCare project, we develop a novel, time-based, photo-detector readout technique to increase sensitivity and timing precision for molecular imaging in PET and CT. The project aims to employ Avalanche Photo Diode (APD) arrays with state of the art, high speed, front end amplifiers and discrimination circuits developed for the Large Hadron Collider (LHC) physics program at CERN, suitable to detect and process photons in a combined one-unit PET/CT detection head. In the so-called time-based approach our efforts focus on the system's timing performance with sub-nanosecond time-jitter and -walk, and yet also provide information on photon energy without resorting to analog to digital conversion. The bandwidth of the electronic circuitry is compatible with the scintillator's intrinsic light response (e.g. les40ns in LSO) and hence allows high rate CT operation in single-photon counting mode. Based on commercial LSO crystals and Hamamatsu S8550 APD arrays, we show the system pe...

  11. Criteria for setting the width of CCD front end transistor to reach minimum pixel noise

    International Nuclear Information System (INIS)

    Fasoli, L.; Sampietro, M.

    1996-01-01

    The paper gives the criteria to calculate the width of the front end transistor integrated next to the charge sensing electrode of CCD's or, in general, of semiconductor detectors, in order to reach the minimum noise in the readout of the signal charge. The paper, for the first time, accounts for white, series and parallel, and 1/f noise contribution. In addition, it points out two different design criteria depending whether a JFET or a MOSFET is used. The attention given to the JFET is due to a lower 1/f noise component, which makes these transistors more and more appealing as input devices in very high resolution detectors. The paper shows that there is a characteristic width of the FET gate that practically doesn't depend on the noise sources but depends only on the capacitance seen by the charge sensing electrode of the detector, making possible the optimum design of the transistor prior to the knowledge of the real values of the spectral density of the noise sources, which are usually precisely known only at the end of the fabrication process. The paper shows that the pixel noise raises sharply as the transistor gate width departs from its optimum value

  12. Front-end receiver electronics for a matrix transducer for 3-D transesophageal echocardiography.

    Science.gov (United States)

    Yu, Zili; Blaak, Sandra; Chang, Zu-yao; Yao, Jiajian; Bosch, Johan G; Prins, Christian; Lancée, Charles T; de Jong, Nico; Pertijs, Michiel A P; Meijer, Gerard C M

    2012-07-01

    There is a clear clinical need for creating 3-D images of the heart. One promising technique is the use of transesophageal echocardiography (TEE). To enable 3-D TEE, we are developing a miniature ultrasound probe containing a matrix piezoelectric transducer with more than 2000 elements. Because a gastroscopic tube cannot accommodate the cables needed to connect all transducer elements directly to an imaging system, a major challenge is to locally reduce the number of channels, while maintaining a sufficient signal-to-noise ratio. This can be achieved by using front-end receiver electronics bonded to the transducers to provide appropriate signal conditioning in the tip of the probe. This paper presents the design of such electronics, realizing time-gain compensation (TGC) and micro-beamforming using simple, low-power circuits. Prototypes of TGC amplifiers and micro-beamforming cells have been fabricated in 0.35-μm CMOS technology. These prototype chips have been combined on a printed circuit board (PCB) to form an ultrasound-receiver system capable of reading and combining the signals of three transducer elements. Experimental results show that this design is a suitable candidate for 3-D TEE.

  13. Performance of the First Version of VMM Front-End ASIC with Resistive Micromegas Detectors

    CERN Document Server

    The ATLAS collaboration

    2014-01-01

    This note describes the performance of the first version of a front end ASIC, VMM1, being developed for the Micromegas and sTGC detectors of the ATLAS New Small Wheel (NSW) upgrade. The VMM1 ASIC was designed by the micro-electronics group of the Instrumentation Division of Brookhaven National Laboratory. It contains 64-channels of linear, low noise amplifiers with adaptive feedback, charge amplitude peak detectors with time stamp. It can accept inputs of both polarities, features selectable gain and shaping time and has a built-in calibration system. It is designed to operate with micro-pattern gas detectors providing both trigger and tracking information. The VMM1 was tested during August 2012 test beam campaign at SPS/H6 beam line at CERN using micromegas detectors of the Muon ATLAS MicroMega Activity R&D program. We present here the VMM1 configuration, the software that was developed to achieve its operation, as well as the calibration procedure. Furthermore, we present the analysis performed with the...

  14. Detector and front-end electronics of a fissile mass flow monitoring system

    International Nuclear Information System (INIS)

    Paulus, M.J.; Uckan, T.; Lenarduzzi, R.; Mullens, J.A.; Castleberry, K.N.; McMillan, D.E.; Mihalczo, J.T.

    1997-01-01

    A detector and front-end electronics unit with secure data transmission has been designed and implemented for a fissile mass flow monitoring system for fissile mass flow of gases and liquids in a pipe. The unit consists of 4 bismuth germanate (BGO) scintillation detectors, pulse-shaping and counting electronics, local temperature sensors, and on-board local area network nodes which locally acquire data and report to the master computer via a secure network link. The signal gain of the pulse-shaping circuitry and energy windows of the pulse-counting circuitry are periodicially self calibrated and self adjusted in situ using a characteristic line in the fissile material pulse height spectrum as a reference point to compensate for drift such as in the detector gain due to PM tube aging. The temperature- dependent signal amplitude variations due to the intrinsic temperature coefficients of the PM tube gain and BGO scintillation efficiency have been characterized and real-time gain corrections introduced. The detector and electronics design, measured intrinsic performance of the detectors and electronics, and the performance of the detector and electronics within the fissile mass flow monitoring system are described

  15. Front-end electronics and trigger systems-Status and challenges

    International Nuclear Information System (INIS)

    Spieler, Helmuth

    2007-01-01

    The past quarter century has brought about a revolution in front-end electronics for large-scale detector systems. Custom integrated circuits specifically tailored to the requirements of large detector systems have provided unprecedented performance and enabled systems that once were deemed impossible. The evolution of integrated circuit readouts in strip detectors is summarized, the present status described, and challenges posed by the sLHC and ILC are discussed. Performance requirements increase, but key considerations remain as in the past: power dissipation, material, and services. Smaller CMOS feature sizes will not reduce the power required for the desired noise levels, but will improve digital power efficiency. Significant improvements appear to be practical in more efficient power distribution. Enhanced digital electronics have provided powerful trigger processors that greatly improve the trigger efficiency. In data readout systems, they also improve data throughput, while reducing power requirements. Concurrently with new developments in high energy physics, detector systems for cosmology and astrophysics have made great strides. As an example, a large-scale readout for superconducting bolometer arrays is described

  16. The Front-End Electronics for the HADES RPC Wall (ESTRELA-FEE)

    International Nuclear Information System (INIS)

    Belver, D.; Garzon, J.A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Lange, S.; Marin, J.; Montes, N.; Skott, P.; Traxler, M.; Zapata, M.

    2006-01-01

    A new front-end electronics (FEE) system for RPC timing measurements has been developed for the ESTRELA project, which is part of the upgrade of the HADES experiment at GSI. The RPCs will cover an area of 8 m 2 with 2048 electronic channels. The chain consists on 2 boards: a 4-channel daughterboard (DB) and a 32-channel motherboard (MB). The DB uses a fast 2 GHz amplifier that feeds a discriminator with a constant threshold and an operational amplifier for a charge measurement by a Time-Over-Threshold (ToT) method for the integrated signal (for a slewing correction). The MB is connected to 8 DB, and provides voltage regulation, DACs for signal thresholds and a trigger logic. The MB delivers the differential output signals to an external HPTDC chip. Results are presented for (a) narrow electronic test pulses and for (b) RPC signals from gamma photons, showing a timing jitter around 15 ps/channel (for pulses above 100 fC) and 30-40 ps/channel, respectively. Tests with coincidently firing channels reveal levels of cross-talk below a 1% for a threshold of 25 fC, with a degradation of the time resolution of 10 ps at most

  17. A novel pseudo resistor structure for biomedical front-end amplifiers.

    Science.gov (United States)

    Yu-Chieh Huang; Tzu-Sen Yang; Shun-Hsi Hsu; Xin-Zhuang Chen; Jin-Chern Chiou

    2015-08-01

    This study proposes a novel pseudo resistor structure with a tunable DC bias voltage for biomedical front-end amplifiers (FEAs). In the proposed FEA, the high-pass filter composed of differential difference amplifier and a pseudo resistor is implemented. The FEA is manufactured by using a standard TSMC 0.35 μm CMOS process. In this study, three types FEAs included three different pseudo resistor are simulated, fabricated and measured for comparison and electrocorticography (ECoG) measurement, and all the results show the proposed pseudo resistor is superior to other two types in bandwidth. In chip implementation, the lower and upper cutoff frequencies of the high-pass filter with the proposed pseudo resistor are 0.15 Hz and 4.98 KHz, respectively. It also demonstrates lower total harmonic distortion performance of -58 dB at 1 kHz and higher stability with wide supply range (1.8 V and 3.3 V) and control voltage range (0.9 V and 1.65 V) than others. Moreover, the FEA with the proposed pseudo successfully recorded spike-and-wave discharges of ECoG signal in in vivo experiment on rat with pentylenetetrazol-induced seizures.

  18. A dual slope charge sampling analog front-end for a wireless neural recording system.

    Science.gov (United States)

    Lee, Seung Bae; Lee, Byunghun; Gosselin, Benoit; Ghovanloo, Maysam

    2014-01-01

    This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-μm CMOS process, occupying 2.4 × 2.1 mm(2) and consuming 255 μW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 μV(rms) in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 μW.

  19. A low-power high-sensitivity analog front-end for PPG sensor.

    Science.gov (United States)

    Binghui Lin; Atef, Mohamed; Guoxing Wang

    2017-07-01

    This paper presents a low-power analog front-end (AFE) photoplethysmography (PPG) sensor fabricated in 0.35 μm CMOS process. The AFE amplifies the weak photocurrent from the photodiode (PD) and converts it to a strong voltage at the output. In order to decrease the power consumption, the circuits are designed in subthreshold region; so the total biasing current of the AFE is 10 μ A. Since the large input DC photocurrent is a big issue for the PPG sensing circuit, we apply a DC photocurrent rejection technique by adding a DC current-cancellation loop to reject the large DC photocurrent up to 10 μA. In addition, a pseudo resistor is used to reduce the high-pass corner frequency below 0.5 Hz and Gm-C filter is adapted to reject the out-of-band noise higher than 16 Hz. For the whole sensor, the amplifier chain can achieve a total gain of 140 dBμ and an input integrated noise current of 68.87 pA rms up to 16 Hz.

  20. CMOS Receiver Front-ends for Gigabit Short-Range Optical Communications

    CERN Document Server

    Aznar, Francisco; Calvo Lopez, Belén

    2013-01-01

    This book describes optical receiver solutions integrated in standard CMOS technology, attaining high-speed short-range transmission within cost-effective constraints.  These techniques support short reach applications, such as local area networks, fiber-to-the-home and multimedia systems in cars and homes. The authors show how to implement the optical front-end in the same technology as the subsequent digital circuitry, leading to integration of the entire receiver system in the same chip.  The presentation focuses on CMOS receiver design targeting gigabit transmission along a low-cost, standardized plastic optical fiber up to 50m in length.  This book includes a detailed study of CMOS optical receiver design – from building blocks to the system level. Reviews optical communications, including long-haul transmission systems and emerging applications focused on short-range; Explains necessary fundamentals, such as characteristics of a data signal, system requirements affecting receiver design and key par...

  1. Laser based beam diagnostic for the RAL Front End Test Stand (FETS)

    International Nuclear Information System (INIS)

    Gabor, C.; Lee, D. A.; Pozimski, J. K.; Letchford, A.

    2007-01-01

    For the diagnostic of high power particle beams, non-destructive measurement devices provide minimum influence on the beam and avoid various problems in connection with the high power density on surfaces. An H- ion beam offers the opportunity of non destructive beam diagnostics based on the effect of photo detachment. By the interaction of light with H- ions, the additional electron can be detached and a small number of neutrals will be produced. An additional magnetic dipole field can then be used to separate the detached electrons and neutrals from the ions. Using an integral detector the spatial distribution of the beam ion density can be derived, while the use of a spatial resolving detector enables to determine the phase space distribution. To investigate the measurement principle of the latter, a test stand was set up at the IAP in Frankfurt. This system will now be adopted to the requirements of the Front End Test Stand at CCLRC/ RAL. The aim of this FETS is to demonstrate a chopped H- beam of 60mA at 3MeV and 50pps with sufficiently high beam quality. The paper will present a detailed description of the proposed set up at RAL and discuss several results of simulations and experimental data gained in Frankfurt

  2. A low power low noise analog front end for portable healthcare system

    Science.gov (United States)

    Yanchao, Wang; Keren, Ke; Wenhui, Qin; Yajie, Qin; Ting, Yi; Zhiliang, Hong

    2015-10-01

    The presented analog front end (AFE) used to process human bio-signals consists of chopping instrument amplifier (IA), chopping spikes filter and programmable gain and bandwidth amplifier. The capacitor-coupling input of AFE can reject the DC electrode offset. The power consumption of current-feedback based IA is reduced by adopting capacitor divider in the input and feedback network. Besides, IA's input thermal noise is decreased by utilizing complementary CMOS input pairs which can offer higher transconductance. Fabricated in Global Foundry 0.35 μm CMOS technology, the chip consumes 3.96 μA from 3.3 V supply. The measured input noise is 0.85 μVrms (0.5-100 Hz) and the achieved noise efficient factor is 6.48. Project supported by the Science and Technology Commission of Shanghai Municipality (No. 13511501100), the State Key Laboratory Project of China (No. 11MS002), and the State Key Laboratory of ASIC & System, Fudan University.

  3. A new front-end ASIC for GEM detectors with time and charge measurement capabilities

    Science.gov (United States)

    Ciciriello, F.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Marzocca, C.; Matarrese, G.; Ranieri, A.

    2016-07-01

    A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100 Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15 mV/fC and the dynamic range is 80 fC. The simulated ENC is about 650 e- for a detector capacitance of 10 pF.

  4. Front-end electronics and data acquisition system for imaging atmospheric Cherenkov telescopes

    International Nuclear Information System (INIS)

    Chen, Y.T.; La Taille, C. de; Suomijärvi, T.; Cao, Z.; Deligny, O.; Dulucq, F.; Ge, M.M.; Lhenry-Yvon, I.; Martin-Chassard, G.; Nguyen Trung, T.; Wanlin, E.; Xiao, G.; Yin, L.Q.; Yun Ky, B.; Zhang, L.; Zhang, H.Y.; Zhang, S.S.; Zhu, Z.

    2015-01-01

    In this paper, a front-end electronics based on an application-specific integrated circuit (ASIC) is presented for the future imaging atmospheric Cherenkov telescopes (IACTs). To achieve this purpose, a 16-channel ASIC chip, PARISROC 2 (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is used in the analog signal processing and digitization. The digitized results are sent to the server by a user-defined User Datagram Protocol/Internet Protocol (UDP/IP) hardcore engine through Ethernet that is managed by a FPGA. A prototype electronics fulfilling the requirements of the Wide Field of View Cherenkov Telescope Array (WFCTA) of the Large High Altitude Air Shower Observatory (LHAASO) project has been designed, fabricated and tested to prove the concept of the design. A detailed description of the development with the results of the test measurements are presented. By using a new input structure and a new configuration of the ASIC, the dynamic range of the circuit is extended. A highly precise-time calibrating algorithm is also proposed, verified and optimized for the mass production. The test results suggest that the proposed electronics design fulfills the general specification of the future IACTs

  5. Radiation induced Single Event Effects in the ATLAS MDT-ASD front-end chip

    CERN Document Server

    Posch, C

    2002-01-01

    Single Event Effect (SEE) tests of the MDT-ASD, the ATLAS MDT front-end chip have been performed at the Harvard Cyclotron Lab. The MDT-ASD is an 8-channel drift tube read-out ASIC fabricated in a commercial 0.5um CMOS process (AMOS14TB). The chip contains a 53 bit register which holds the setup information and an associated shift register of the same length plus some additional control logic. 10 test devices were exposed to a 160 MeV proton beam with a fluence of 1.05E9 p.cm-2.s-1 up to >4.4E p.cm-2 per device. After a total fluence of 4.46E13 p.cm-2, 7 soft SEEs (non-permanent bit flips in the registers) and 0 hard/destructive SEE (e.g. latch-ups, SEL) had occurred. The simulated fluence for 10 years of LHC operation at nominal luminosity for worst case location MDT components is 2.67E11 h.cm-2. The rate of SEUs in the ASD setup register for all of ATLAS, derived from these numbers, is 2.4 per day. It is foreseen to update the active registers of the on-detector electronics at regular intervals. Depending on...

  6. Demonstration of an RF front-end based on GaN HEMT technology

    Science.gov (United States)

    Ture, Erdin; Musser, Markus; Hülsmann, Axel; Quay, Rüdiger; Ambacher, Oliver

    2017-05-01

    The effectiveness of the developed front-end on blocking the communication link of a commercial drone vehicle has been demonstrated in this work. A jamming approach has been taken in a broadband fashion by using GaN HEMT technology. Equipped with a modulated-signal generator, a broadband power amplifier, and an omni-directional antenna, the proposed system is capable of producing jamming signals in a very wide frequency range between 0.1 - 3 GHz. The maximum RF output power of the amplifier module has been software-limited to 27 dBm (500 mW), complying to the legal spectral regulations of the 2.4 GHz ISM band. In order to test the proof of concept, a real-world scenario has been prepared in which a commercially-available quadcopter UAV is flown in a controlled environment while the jammer system has been placed in a distance of about 10 m from the drone. It has been proven that the drone of interest can be neutralized as soon as it falls within the range of coverage (˜3 m) which endorses the promising potential of the broadband jamming approach.

  7. 2-GHz band man-made noise evaluation for cryogenic receiver front-end

    Energy Technology Data Exchange (ETDEWEB)

    Narahashi, S; Satoh, K; Suzuki, Y [Research Laboratories, NTT DoCoMo, Inc., 3-5 Hikari-no-oka, Yokosuka, Kanagawa 239-8536 (Japan); Mimura, T [Intellectual Property Department, NTT DoCoMo, Inc., 2-11-1 Nagatacho, Chiyoda, Tokyo 100-6150 (Japan); Nojima, T [Graduate School of Information Science and Technology, Hokkaido University, Nishi 9, Kita 14, Kita, Sapporo 060-0808 (Japan)], E-mail: narahashi@nttdocomo.co.jp

    2008-02-01

    This paper presents measured results of man-made noise in urban and suburban areas in the 2-GHz band with amplitude probability distribution (APD) in order to evaluate the impact of man-made noise on an experimental cryogenic receiver front-end (CRFE). The CRFE comprises a high-temperature superconducting filter, cryogenically-cooled low-noise amplifier, and highly reliable cryostat that is very compact. The CRFE is anticipated to be an effective way to achieve efficient frequency utilization and to improve the sensitivity of mobile base station receivers. It is important to measure the characteristics of the man-made noise in typical cellular base station antenna environments and confirm their impact on the CRFE reception with APD because if man-made noise has a stronger effect than thermal noise, the CRFE would fail to offer any improvement in sensitivity. The measured results suggest that the contribution of man-made noise in the 2-GHz band can be ignored as far as the wideband code division multiple access (W-CDMA) system is concerned.

  8. BPM ANALOG FRONT-END ELECTRONICS BASED ON THE AD8307 LOG AMPLIFIER

    International Nuclear Information System (INIS)

    R. SHURTER; ET AL

    2000-01-01

    Beam position monitor (BPM) signal-processing electronics utilizing the Analog Devices AD8307 logarithmic amplifier has been developed for the Low Energy Demonstration Accelerator (LEDA), part of the Accelerator Production of Tritium (APT) project at Los Alamos. The low-pass filtered 350 MHz fundamental signal from each of the four microstrip electrodes in a BPM is ''detected'' by an AD8307 log amp, amplified and scaled to accommodate the 0 to +5V input of an analog-to-digital (A/D) converter. The resultant four digitized signals represent a linear power relationship to the electrode signals, which are in turn related to beam current and position. As the AD8307 has a potential dynamic range of approximately 92 dB, much attention must be given to noise reduction, sources of which can be digital signals on the same board, power supplies, inter-channel coupling, stray RF and others. This paper will describe the operational experience of this particular analog front-end electronic circuit design

  9. FELIX: A high-throughput network approach for interfacing to front end electronics for ATLAS upgrades

    CERN Document Server

    Anderson, John Thomas; The ATLAS collaboration; Boterenbrood, Hendrik; Chen, Hucheng; Chen, Kai; Drake, Gary; Francis, David; Gorini, Benedetto; Lanni, Francesco; Lehmann Miotto, Giovanna; Levinson, Lorne; Narevicius, Julia; Christian Plessl; Roich, Alexander; Schreuder, Frans Philip; Schumacher, Jorn; Vandelli, Wainer; Vermeulen, Jos; Zhang, Jinlong

    2015-01-01

    The ATLAS experiment at CERN is planning full deployment of a new unified link technology for connecting detector front end electronics on the timescale of the LHC Run 4 (2025). It is estimated that roughly 8000 GBT (GigaBit Transceiver) links, with transfer rates probably up to 9.6 Gbps, will replace existing links used for readout, detector control and distribution of timing and trigger information. In particular the links used for readout are often detector-specific. Already in Run 3 this technology will be deployed in conjunction with new muon detectors, additional muon first-level triggering electronics and new on-detector and off-detector liquid argon calorimeter electronics to be used for first level triggering. A total of roughly 2000 GBT links or GBT-like links (for connecting to off-detector trigger electronics) will be needed. A new class of devices will need to be developed to interface many GBT links to the rest of the trigger, data-acquisition and detector control systems. In this paper we prese...

  10. Irradiation studies of multimode optical fibres for use in ATLAS front-end links

    International Nuclear Information System (INIS)

    Mahout, G.; Pearce, M.; Andrieux, M-L.; Arvidsson, C-B.; Charlton, D.G.; Dinkespiler, B.; Dowell, J.D.; Gallin-Martel, L.; Homer, R.J.; Jovanovic, P.; Kenyon, I.R.; Kuyt, G.; Lundquist, J.; Mandic, I.; Martin, O.; Shaylor, H.R.; Stroynowski, R.; Troska, J.; Wastie, R.L.; Weidberg, A.R.; Wilson, J.A.; Ye, J.

    2000-01-01

    The radiation tolerance of three multimode optical fibres has been investigated to establish their suitability for the use in the front-end data links of the ATLAS experiment. Both gamma and neutron irradiation studies are reported. A step-index fibre with a pure silica core showed an induced attenuation of ∼0.05 dB/m at 330 kGy(Si) and 1x10 15 n(1 MeV Si)/cm 2 and is suitable for use with the inner detector links which operate at 40-80 Mb/s. A graded-index fibre with a predominantly germanium-doped core exhibits an induced attenuation of ∼0.1 dB/m at 800 Gy(Si) and 2x10 13 n(1 MeV Si)/cm 2 and is suitable for the calorimeter links which operate at 1.6 Gb/s. Measurements of the dose rate dependence of the induced attenuation indicate that the attenuation in ATLAS will be lower

  11. Development of a GUI Based Front End for Open Source CFD Program, OpenFOAM

    International Nuclear Information System (INIS)

    Han, Samhee; Lee, Youngjin; Kim, Hyongchol; Park, Sunbyung; Kim, Hyunjik

    2013-01-01

    OpenFOAM is sorely lacking in user friendliness as it runs in console mode under Li nux. Run F OAM was developed to greatly simplify the task of running an OpenFOAM calculation under Windows OS. Run F OAM was written using Delphi object pascal language, and GLScene package was used for the 3D graphics. Verification of Run F OAM was carried out by performing some OpenFOAM CFD calculations provided in OpenFOAM package, and these showed that the use of Run F OAM is simple whilst providing sufficient allowances in user modifications. Run F oam, a GUI based front end program to simplify running Open Foam CFD cases, has been developed. By incorporating numerous GUI in the program, Run F oam has demonstrated that running an Open Foam case can be easily accomplished. There is a potential for further development as the Open Foam has the great advantage of being free to develop and to use. There is also a potential to couple or interface the Open Foam with the systems analysis code such as Relap5

  12. Development of a GUI Based Front End for Open Source CFD Program, OpenFOAM

    Energy Technology Data Exchange (ETDEWEB)

    Han, Samhee; Lee, Youngjin; Kim, Hyongchol; Park, Sunbyung; Kim, Hyunjik [Nuclear Safety Evaluation, Daejeon (Korea, Republic of)

    2013-05-15

    OpenFOAM is sorely lacking in user friendliness as it runs in console mode under Li nux. Run{sub F}OAM was developed to greatly simplify the task of running an OpenFOAM calculation under Windows OS. Run{sub F}OAM was written using Delphi object pascal language, and GLScene package was used for the 3D graphics. Verification of Run{sub F}OAM was carried out by performing some OpenFOAM CFD calculations provided in OpenFOAM package, and these showed that the use of Run{sub F}OAM is simple whilst providing sufficient allowances in user modifications. Run{sub F}oam, a GUI based front end program to simplify running Open Foam CFD cases, has been developed. By incorporating numerous GUI in the program, Run{sub F}oam has demonstrated that running an Open Foam case can be easily accomplished. There is a potential for further development as the Open Foam has the great advantage of being free to develop and to use. There is also a potential to couple or interface the Open Foam with the systems analysis code such as Relap5.

  13. Comparison of OQPSK and CPM for Communications at 60 GHz with a Nonideal Front End

    Directory of Open Access Journals (Sweden)

    Nsenga Jimmy

    2007-01-01

    Full Text Available Short-range digital communications at 60 GHz have recently received a lot of interest because of the huge bandwidth available at those frequencies. The capacity offered to the users could finally reach 2 Gbps, enabling the deployment of new multimedia applications. However, the design of analog components is critical, leading to a possible high nonideality of the front end (FE. The goal of this paper is to compare the suitability of two different air interfaces characterized by a low peak-to-average power ratio (PAPR to support communications at 60 GHz. On one hand, we study the offset-QPSK (OQPSK modulation combined with a channel frequency-domain equalization (FDE. On the other hand, we study the class of continuous phase modulations (CPM combined with a channel time-domain equalizer (TDE. We evaluate their performance in terms of bit error rate (BER considering a typical indoor propagation environment at 60 GHz. For both air interfaces, we analyze the degradation caused by the phase noise (PN coming from the local oscillators; and by the clipping and quantization errors caused by the analog-to-digital converter (ADC; and finally by the nonlinearity in the PA.

  14. Front-end electronics and data acquisition system for imaging atmospheric Cherenkov telescopes

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Y.T., E-mail: chenytao@ynu.edu.cn [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Yunnan University, 650091 Kunming (China); La Taille, C. de [OMEGA (UMS 3605) - IN2P3/CNRS, Ecole Polytechnique, 91128 Palaiseau Cedex (France); Suomijärvi, T. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Cao, Z. [Institute of High Energy Physics, 100049 Beijing (China); Deligny, O. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Dulucq, F. [OMEGA (UMS 3605) - IN2P3/CNRS, Ecole Polytechnique, 91128 Palaiseau Cedex (France); Ge, M.M. [Yunnan University, 650091 Kunming (China); Lhenry-Yvon, I. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Martin-Chassard, G. [OMEGA (UMS 3605) - IN2P3/CNRS, Ecole Polytechnique, 91128 Palaiseau Cedex (France); Nguyen Trung, T.; Wanlin, E. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Xiao, G.; Yin, L.Q. [Institute of High Energy Physics, 100049 Beijing (China); Yun Ky, B. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Zhang, L. [Yunnan University, 650091 Kunming (China); Zhang, H.Y. [Tsinghua University, 100084 Beijing (China); Zhang, S.S.; Zhu, Z. [Institute of High Energy Physics, 100049 Beijing (China)

    2015-09-21

    In this paper, a front-end electronics based on an application-specific integrated circuit (ASIC) is presented for the future imaging atmospheric Cherenkov telescopes (IACTs). To achieve this purpose, a 16-channel ASIC chip, PARISROC 2 (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is used in the analog signal processing and digitization. The digitized results are sent to the server by a user-defined User Datagram Protocol/Internet Protocol (UDP/IP) hardcore engine through Ethernet that is managed by a FPGA. A prototype electronics fulfilling the requirements of the Wide Field of View Cherenkov Telescope Array (WFCTA) of the Large High Altitude Air Shower Observatory (LHAASO) project has been designed, fabricated and tested to prove the concept of the design. A detailed description of the development with the results of the test measurements are presented. By using a new input structure and a new configuration of the ASIC, the dynamic range of the circuit is extended. A highly precise-time calibrating algorithm is also proposed, verified and optimized for the mass production. The test results suggest that the proposed electronics design fulfills the general specification of the future IACTs.

  15. A 32-channel front-end ASIC for GEM detectors used in beam monitoring applications

    Science.gov (United States)

    Ciciriello, F.; Altieri, P. R.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Lorusso, L.; Marzocca, C.; Matarrese, G.; Ranieri, A.; Stamerra, A.

    2017-11-01

    A multichannel, mixed-signal, front-end ASIC for GEM detectors, intended for beam monitoring in hadron therapy applications, has been designed and prototyped in a standard 0.35 μm CMOS technology. The analog channels are based on the classic CSA + shaper processing chain, followed by a peak detector which can work as an analog memory, to simplifiy the analog-to-digital conversion of the peak voltage of the output pulse, proportional to the energy of the detected event. The available hardware resources include an 8-bit A/D converter and a standard-cell digital part, which manages the read-out procedure, in sparse or serial mode. The ASIC is self-triggered and transfers energy and address data to the external DAQ via a fast 100 MHz LVDS link. Preliminary characterization results show that the non-linearity error is limited to 5% for a maximum input charge of about 70 fC, the measured ENC is about 1400e- and the time jitter of the trigger signal generated in response to an injected charge of 60 fC is close to 200 ps.

  16. A new front-end ASIC for GEM detectors with time and charge measurement capabilities

    Energy Technology Data Exchange (ETDEWEB)

    Ciciriello, F., E-mail: fabio.ciciriello@poliba.it [DEI-Politecnico di Bari, Via Orabona 4, I-70125 Bari (Italy); INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); Corsi, F. [DEI-Politecnico di Bari, Via Orabona 4, I-70125 Bari (Italy); INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); De Robertis, G. [INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); Felici, G. [INFN, Laboratori Nazionali di Frascati, Via E. Fermi 40, I-00044 Frascati (Italy); Loddo, F. [INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); Marzocca, C.; Matarrese, G. [DEI-Politecnico di Bari, Via Orabona 4, I-70125 Bari (Italy); INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); Ranieri, A. [INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy)

    2016-07-11

    A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100 Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15 mV/fC and the dynamic range is 80 fC. The simulated ENC is about 650 e{sup −} for a detector capacitance of 10 pF. © 2001 Elsevier Science. All rights reserved.

  17. Fast front-end L0 trigger electronics for ALICE FMD-MCP tests and performance

    CERN Document Server

    Efimov, L G; Kasatkan, V; Klempt, W; Kuts, V; Lenti, V; Platanov, V; Rudge, A; Stolyarov, O I; Tsimbal, F A; Valiev, F F; Villalobos Baillie, O; Vinogradov, L I; Zhigunov, O

    1997-01-01

    We present design details and new measurements of the performance of fast electronics for the Forward Multiplicity Detector for ALICE. These detectors based on sector type Microchannel Plates (MCP) forming several disks gave the very first trigger decision in the experiment (L0). Fast passive summators integrated with the detectors are used for linear summation of up to eight isochronous signal channels from MCP pads belonging to one sector. Two types of microelectronics design thin film summators were produced. We present test results for these summators, working in the frequency range up to 1 Ghz. New low noise preamplifiers have been built to work with these summators. The new design shows a good performance with the usable frequency range extended up to 1 Ghz. An upgrade of the functional scheme for the L0 ALICE pre-trigger design is also presented.Abstract:List of figures Figure 1: ALICE L0 Trigger Front-End Electronics Functional Scheme. Figure 2: UHF design for a fast passive summator based on direct...

  18. Dynamic testing for radiation induced failures in a standard CMOS submicron technology pixel front-end

    International Nuclear Information System (INIS)

    Venuto, D. de; Corsi, F.; Ohletz, M.J.

    1999-01-01

    A testing method for the detection of performance degradation induced by high-dose irradiation in high-energy experiments has been developed. The method used is based on a fault signature generation defined on the basis of the state-space analysis for linear circuits. By sampling the response of the circuit under test (CUT) to a single rectangular pulse, a set of parameters α are evaluated which are functions of the circuit singularities and constitute a signature for the CUT. Amplitude perturbations of these parameters engendered by element drift failure indicate a possible faulty condition. The effects of radiation induced faults in the analogue CMOS front-end of a silicon pixel detector employed in high energy physics experiments has been investigated. The results show that, even for the 800 krad dose, the test devised is able to detect the degradation of the amplifier performances. The results show also that hardened devices do not necessarily produce high circuit immunity to radiation and the proposed test method provides a mean to detect these performance deviations and to monitor them during the operating life of the chip. (A.C.)

  19. Design and Optimization of Multi-bit Front-end Stage and Scaled Back-end Stages of Pipelined ADCs

    NARCIS (Netherlands)

    Quinn, P.J.; Roermund, van A.H.M.

    2005-01-01

    In this paper, an error analysis is presented to aid the design of a pipeline multi-bit front-end stage. It is demonstrated and quantified how the capacitor matching requirement can be reduced in high-resolution pipeline ADCs. The paper continues by analyzing the optimal design for low power of the

  20. Unified analytical expressions for calculating resonant frequencies, transimpedances, and equivalent input noise current densities of tuned receiver front ends

    DEFF Research Database (Denmark)

    Liu, Qing Zhong

    1992-01-01

    Unified analytical expressions have been derived for calculating the resonant frequencies, transimpedance and equivalent input noise current densities of the four most widely used tuned optical receiver front ends built with FETs and p-i-n diodes. A more accurate FET model has been used to improve...

  1. 75 FR 16819 - Notice of Proposed Information Collection for Public Comment Civil Rights Front End and Limited...

    Science.gov (United States)

    2010-04-02

    ... Information Collection for Public Comment Civil Rights Front End and Limited Monitoring Review AGENCY: Office... Office of Management and Budget (OMB) for review, as required by the Paperwork Reduction Act. The...-free Federal Information Relay Service at 800-877-8339. (Other than the HUD USER information line and...

  2. Design of ultralow power receiver front-ends for 2.4 GHz wireless sensor network applications

    International Nuclear Information System (INIS)

    Zhang Meng; Li Zhiqun; Wang Zengqi; Wu Chenjian; Chen Liang

    2014-01-01

    This paper presents the design of an ultralow power receiver front-end designed for a wireless sensor network (WSN) in a 0.18 μm CMOS process. The author designs two front-ends working in the saturation region and the subthreshold region respectively. The front-ends contain a two-stage cross-coupling cascaded common-gate (CG) LNA and a quadrature Gilbert IQ mixer. The measured conversion gain is variable with high gain at 24 dB and low gain at 7 dB for the saturation one, and high gain at 22 dB and low gain at 5 dB for the subthreshold one. The noise figure (NF) at high gain mode is 5.1 dB and 6.3 dB for each. The input 1 dB compression point (IP1dB) at low gain mode is about −6 dBm and −3 dBm for each. The front-ends consume about 2.1 mA current from 1.8 V power supply for the saturation one and 1.3 mA current for the subthreshold one. The measured results show that, comparing with the power consumption saving, it is worth making sacrifices on the performance for using the subthreshold technology. (semiconductor integrated circuits)

  3. Play it forward : A Game-based tool for Sustainable Product and Business Model Innovation in the Fuzzy Front End

    NARCIS (Netherlands)

    Dewulf, K.R.

    2010-01-01

    Dealing with sustainability in the fuzzy front end of innovation is complex and often hard. There are a number of tools available to guide designers, engineers and managers in the design process after the specifications of the product or service are already set, but methods supporting goal finding

  4. A 1.2-V CMOS front-end for LTE direct conversion SAW-less receiver

    International Nuclear Information System (INIS)

    Wang Riyan; Li Zhengping; Zhang Weifeng; Zeng Longyue; Huang Jiwei

    2012-01-01

    A CMOS RF front-end for the long-term evolution (LTE) direct conversion receiver is presented. With a low noise transconductance amplifier (LNA), current commutating passive mixer and transimpedance operational amplifier (TIA), the RF front-end structure enables high-integration, high linearity and simple frequency planning for LTE multi-band applications. Large variable gain is achieved using current-steering transconductance stages. A current commutating passive mixer with 25% duty-cycle LO improves gain, noise and linearity. A direct coupled current-input filter (DCF) is employed to suppress the out-of-band interferer. Fabricated in a 0.13-μm CMOS process, the RF front-end achieves a 45 dB conversion voltage gain, 2.7 dB NF, −7 dBm IIP3, and +60 dBm IIP2 with calibration from 2.3 to 2.7 GHz. The total RF front end with divider draws 40 mA from a single 1.2-V supply. (semiconductor integrated circuits)

  5. A 7-13 GHz low-noise tuned optical front-end amplifier for heterodyne transmission system application

    DEFF Research Database (Denmark)

    Ebskamp, Frank; Schiellerup, Gert; Høgdal, Morten

    1991-01-01

    The authors present a 7-13 GHz low-noise bandpass tuned optical front-end amplifier, showing 46±1 dBΩ transimpedance, and a noise spectral density of about 12 pA/√Hz. This is the first time such a flat response and such low noise were obtained simultaneously at these frequencies, without any...

  6. A 24 GHz integrated SiGe BiCMOS vital signs detection radar front-end

    DEFF Research Database (Denmark)

    Jensen, Brian Sveistrup; Johansen, Tom K.; Zhurbenko, Vitaliy

    2013-01-01

    In this paper a 24 GHz integrated front-end transceiver for vital signs detection (VSD) radars is described. The heterodyne radar transceiver integrates LO buffering and quadrature splitting circuits, up- and down-conversion SSB mixers and two cascaded receiver LNA's. The chip has been manufactured...

  7. High-Frequency Wireless Communications System: 2.45-GHz Front-End Circuit and System Integration

    Science.gov (United States)

    Chen, M.-H.; Huang, M.-C.; Ting, Y.-C.; Chen, H.-H.; Li, T.-L.

    2010-01-01

    In this article, a course on high-frequency wireless communications systems is presented. With the 145-MHz baseband subsystem available from a prerequisite course, the present course emphasizes the design and implementation of the 2.45-GHz front-end subsystem as well as system integration issues. In this curriculum, the 2.45-GHz front-end…

  8. Controller design and implementation of a three-phase Active Front End using SiC based MOSFETs

    DEFF Research Database (Denmark)

    Haase, Frerk; Kouchaki, Alireza; Nymand, Morten

    2015-01-01

    The design and implementation of a three phase Active Front End for power factor correction purposes using fast switching SiC based MOSFETs is presented. Possible applications are within the drives- and renewable energy sector. The controller is designed and implemented in the synchronous rotating...

  9. A low-power front-end amplifier for the microstrip sensors of the PANDA microvertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Di Pietro, Valentino; Brinkmann, Kai-Thomas; Riccardi, Alberto [II. Physikalisches Institut, JLU Giessen, Giessen (Germany); Rivetti, Angelo; Rolo, Manuel; Garbolino, Sara [INFN Sezione di Torino, Torino (Italy); Collaboration: PANDA-Collaboration

    2014-07-01

    The most common readout systems designed for nuclear physics detectors are based on amplitude measurements. The information that needs to be preserved is the charge delivered by a particle hitting the sensor. The electronic chain employed in these cases is made of two main building blocks: front-end amplifier and ADC. An issue in the implementation of such an architecture in scaled CMOS technologies is the dynamic range, because the charge information is extrapolated through the sampling of the peak of the front-end output signal. It is therefore interesting to explore the use of time-based architectures that offer better performances. In fact, in these topologies the linearity between the charge and the signal duration can be maintained even if some building blocks in the chain saturate. The main drawback is the loss in resolution since a duration measurement involves the difference between two time measurements. This work presents the design of a front-end optimized for fast Time-over-Threshold applications. The circuit has been developed for the microstrip detectors of the PANDA experiment. The architecture of the front-end amplifier is presented, and simulations in a 110 nm CMOS technology are discussed.

  10. A high dynamic range programmable CMOS front-end filter with a tuning range from 1850 to 2400 MHz

    DEFF Research Database (Denmark)

    Christensen, Kåre Tais; Lee, Thomas H.; Bruun, Erik

    2005-01-01

    This paper presents a highly programmable front-end filter and amplifier intended to replace SAW filters and low noise amplifiers (LNA) in multi-mode direct conversion radio receivers. The filter has a 42 MHz bandwidth, is tunable from 1850 to 2400 MHz, achieves a 5.8 dB NF, -25 dBm in-band 1-d...

  11. A 0.18 μm biosensor front-end based on 1/f noise, distortion cancelation and chopper stabilization techniques.

    Science.gov (United States)

    Balasubramanian, Viswanathan; Ruedi, Pierre-Francois; Temiz, Yuksel; Ferretti, Anna; Guiducci, Carlotta; Enz

    2013-10-01

    This paper presents a novel sensor front-end circuit that addresses the issues of 1/f noise and distortion in a unique way by using canceling techniques. The proposed front-end is a fully differential transimpedance amplifier (TIA) targeted for current mode electrochemical biosensing applications. In this paper, we discuss the architecture of this canceling based front-end and the optimization methods followed for achieving low noise, low distortion performance at minimum current consumption are presented. To validate the employed canceling based front-end, it has been realized in a 0.18 μm CMOS process and the characterization results are presented. The front-end has also been tested as part of a complete wireless sensing system and the cyclic voltammetry (CV) test results from electrochemical sensors are provided. Overall current consumption in the front-end is 50 μA while operating on a 1.8 V supply.

  12. AMIC: an expandable integrated analog front-end for light distribution moments analysis

    Energy Technology Data Exchange (ETDEWEB)

    Spaggiari, M; Herrero, V; Lerche, C W; Aliaga, R; Monzo, J M; Gadea, R, E-mail: michele.spaggiari@gmail.com [Instituto de Instrumentacion para Imagen Molecular (I3M), Universidad Politecnica de Valencia, Camino de Vera, 46022, Valencia (Spain)

    2011-01-15

    In this article we introduce AMIC (Analog Moments Integrated Circuit), a novel analog Application Specific Integrated Circuit (ASIC) front-end for Positron Emission Tomography (PET) applications. Its working principle is based on mathematical analysis of light distribution through moments calculation. Each moment provides useful information about light distribution, such as energy, position, depth of interaction, skewness (deformation due to border effect) etc. A current buffer delivers a copy of each input current to several processing blocks. The current preamplifier is designed in order to achieve unconditional stability under high input capacitance, thus allowing the use of both Photo-Multiplier Tubes (PMT) and Silicon Photo-Multipliers (SiPM). Each processing block implements an analog current filtering by multiplying each input current by a programmable 8-bit coefficient. The latter is implemented through a high linear MOS current divider ladder, whose high sensitivity to variations in output voltages requires the integration of an extremely stable fully differential current collector. Output currents are then summed and sent to the output stage, that provides both a buffered output current and a linear rail-to-rail voltage for further digitalization. Since computation is purely additive, the 64 input channels of AMIC do not represent a limitation in the number of the detector's outputs. Current outputs of various AMIC structures can be combined as inputs of a final AMIC, thus providing a fully expandable structure. In this version of AMIC, 8 programmable blocks for moments calculation are integrated, as well as an I2C interface in order to program every coefficient. Extracted layout simulation results demonstrate that the information provided by moment calculation in AMIC helps to improve tridimensional positioning of the detected event. A two-detector test-bench is now being used for AMIC prototype characterization and preliminary results are presented.

  13. The front end electronics of the NA62 Gigatracker: challenges, design and experimental measurements

    Science.gov (United States)

    Noy, M.; Aglieri Rinella, G.; Ceccucci, A.; Dellacasa, G.; Fiorini, M.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Martin, E.; Mazza, G.; Martoiu, S.; Morel, M.; Perktold, L.; Rivetti, A.; Tiuraniemi, S.

    2011-06-01

    The beam spectrometer of the NA62 experiment consists of 3 Gigatracker (GTK) stations. Each station comprises a pixel detector of 16 cm active area made of an assembly of 10 readout ASICs bump bonded to a 200 μm thick pixel silicon sensor, comprising 18000 pixels of 300 μm×300 μm. The main challenge of the NA62 pixel GTK station is the combination of an extremely high kaon/pion beam rate, where the intensity in the center of the beam reaches up to 1.5 Mhit s mm together with an extreme time resolution of 100 ps. To date, it is the first silicon tracking system with this time resolution. To face this challenge, the pixel analogue front end has been designed with a peaking time of 4 ns, with a planar silicon sensor operating up to 300 V over depletion. Moreover, the radiation level is severe, 2×10 1 MeV n cm per year of operation. Easy replacement of the GTK stations is foreseen as a design requirement. The amount of material of a single station should also be less than 0.5% X to minimize the background, which imposes strong constraints on the mechanics and the cooling system. We report upon the design and architecture of the 2 prototype demonstrator chips both designed in 130 nm CMOS technology, one with a constant fraction discriminator and the time stamp digitisation in each pixel (In-Pixel), and the other with a time-over-threshold discriminator and the processing of the time stamp located in the End of Column (EoC) region at the chip periphery. Some preliminary results are presented.

  14. PARISROC, an autonomous front-end ASIC for triggerless acquisition in next generation neutrino experiments

    International Nuclear Information System (INIS)

    Conforti Di Lorenzo, S.; Campagne, J.E.; Drouet, S.; Dulucq, F.; El Berni, M.; Genolini, B.; La Taille, C. de; Martin-Chassard, G.; Seguin Moreau, N.; Wanlin, E.; Xiangbo, Y.

    2012-01-01

    PARISROC (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is a complete readout chip in AustriaMicroSystems (AMS) SiGe 0.35 μm technology designed to read array of 16 Photomultipliers (PMTs). The ASIC is realized in the context of the PMm2 (square meter PhotoMultiplier) project that has proposed a new system of “smart photo-detectors” composed by sensor and read-out electronics dedicated to next generation neutrino experiments. The future water Cherenkov detectors will take place in megaton size water tanks then with a large surface of photo-detection. We propose to segment the large surface in arrays with a single front-end electronics and only the useful data send in surface to be stocked and analyzed. This paper describes the second version of the ASIC and illustrates the chip principle of operation and the main characteristics thank to a series of measurements. It is a 16-channel ASIC with channels that work independently, in triggerless mode and all managed by a common digital part. Then main innovation is that all the channels are handled independently by the digital part so that only channels that have triggered are digitized. Then the data are transferred to the internal memory and sent out in a data driven way. The ASIC allows charge and time measurement. We measured a charge measurement range starting from 160 fC (1 photoelectron-p.e., at PMT gain of 10 6 ) to 100 pC (around 600 p.e.) at 1% of linearity; time tagging at 1 ns thanks to a 24-bit counter at 10 MHz and a Time to Digital Converter (TDC) on a 100 ns ramp.

  15. An Inductively-Powered Wireless Neural Recording System with a Charge Sampling Analog Front-End.

    Science.gov (United States)

    Lee, Seung Bae; Lee, Byunghun; Kiani, Mehdi; Mahmoudi, Babak; Gross, Robert; Ghovanloo, Maysam

    2016-01-15

    An inductively-powered wireless integrated neural recording system (WINeR-7) is presented for wireless and battery less neural recording from freely-behaving animal subjects inside a wirelessly-powered standard homecage. The WINeR-7 system employs a novel wide-swing dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which performs amplification, filtering, sampling, and analog-to-time conversion (ATC) with minimal interference and small amount of power. The output of the DSCS-AFE produces a pseudo-digital pulse width modulated (PWM) signal. A circular shift register (CSR) time division multiplexes (TDM) the PWM pulses to create a TDM-PWM signal, which is fed into an on-chip 915 MHz transmitter (Tx). The AFE and Tx are supplied at 1.8 V and 4.2 V, respectively, by a power management block, which includes a high efficiency active rectifier and automatic resonance tuning (ART), operating at 13.56 MHz. The 8-ch system-on-a-chip (SoC) was fabricated in a 0.35-μm CMOS process, occupying 5.0 × 2.5 mm 2 and consumed 51.4 mW. For each channel, the sampling rate is 21.48 kHz and the power consumption is 19.3 μW. In vivo experiments were conducted on freely behaving rats in an energized homecage by continuously delivering 51.4 mW to the WINeR-7 system in a closed-loop fashion and recording local field potentials (LFP).

  16. PARISROC, an autonomous front-end ASIC for triggerless acquisition in next generation neutrino experiments

    Science.gov (United States)

    Conforti Di Lorenzo, S.; Campagne, J. E.; Drouet, S.; Dulucq, F.; El Berni, M.; Genolini, B.; de La Taille, C.; Martin-Chassard, G.; Seguin Moreau, N.; Wanlin, E.; Xiangbo, Y.

    2012-12-01

    PARISROC (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is a complete readout chip in AustriaMicroSystems (AMS) SiGe 0.35 μm technology designed to read array of 16 Photomultipliers (PMTs). The ASIC is realized in the context of the PMm2 (square meter PhotoMultiplier) project that has proposed a new system of “smart photo-detectors” composed by sensor and read-out electronics dedicated to next generation neutrino experiments. The future water Cherenkov detectors will take place in megaton size water tanks then with a large surface of photo-detection. We propose to segment the large surface in arrays with a single front-end electronics and only the useful data send in surface to be stocked and analyzed. This paper describes the second version of the ASIC and illustrates the chip principle of operation and the main characteristics thank to a series of measurements. It is a 16-channel ASIC with channels that work independently, in triggerless mode and all managed by a common digital part. Then main innovation is that all the channels are handled independently by the digital part so that only channels that have triggered are digitized. Then the data are transferred to the internal memory and sent out in a data driven way. The ASIC allows charge and time measurement. We measured a charge measurement range starting from 160 fC (1 photoelectron-p.e., at PMT gain of 106) to 100 pC (around 600 p.e.) at 1% of linearity; time tagging at 1 ns thanks to a 24-bit counter at 10 MHz and a Time to Digital Converter (TDC) on a 100 ns ramp.

  17. Wheeling and dealing - the development of the power loader

    Energy Technology Data Exchange (ETDEWEB)

    Davies, P M [British Coal Corporation (UK). Selby Group

    1990-04-01

    The paper traces the historical development of the power loader from its antecedent, the coal cutter, to the variety of coal getting machines available today. It examines the course of successful developments and, in addition, it describes some of the less successful machines that only found limited application - the 'dinosaurs'. Ancillary developments which were essential to the success of power loader evolution are also described and the evolutionary impetus that is currently altering power loader design is explored. The author concludes with views on the main criteria that will determine the power loader of the future and suggestions for improving some aspects of current performance by the application of technology. 8 figs.

  18. Calibration and performance test of the Very-Front-End electronics for the CMS electromagnetic calorimeter

    International Nuclear Information System (INIS)

    Blaha, J.

    2008-05-01

    A Very-Front-End (VFE) card is an important part of the on-detector read-out electronics of the CMS (Compact Muon Solenoid) electromagnetic calorimeter that is made of ∼ 76.000 radiation hard scintillating crystals PbWO 4 and operates on the Large Hadron Collider (LHC) at CERN. Almost 16.000 VFE cards that shape, amplify and digitize incoming signals from photodetectors generated by interacting particles. Since any maintenance of any part of the calorimeter is not possible during the 10-year lifetime of the experiment, the extensive screening program was employed throughout the whole manufacture process. As a part of readout electronics quality assurance program, the systems for burn-in and precise calibration of the VFE boards were developed and successfully used at IPN Lyon. In addition to functionality tests, all relevant electrical properties of each card were measured and analyzed in detail to obtain their full characterization and to build a database with all required parameters which will serve for the initial calibration of the whole calorimeter. In order to evaluate the calorimeter performance and also to deliver the most precise calibration constants, several fully equipped super-modules were extensively studied and calibrated during the test beam campaigns at CERN. As an important part of these tests, accurate studies of the electronics noise and relative gains, which are needed for measurement in high energy range, were carried out to optimize amplitude reconstruction procedure and thus improve the precision of the calorimeter energy determination. The heart of the thesis consists of the calibration of all VFE boards, including optimization of the laboratory calibration system and precise analysis of measured values to delivered desired calibration constants. The second half of the thesis is focused on the accurate evaluation and optimization of the read-out electronics in real data taking conditions. The results obtained in the laboratory at IPN Lyon

  19. A −3 dBm RF transmitter front-end for 802.11g application

    International Nuclear Information System (INIS)

    Zhao Jinxin; Yan Jun; Shi Yin

    2013-01-01

    A 2.4 GHz, direct-conversion RF transmitter front-end with an up converter and PA driver is fabricated in a 0.13 μm CMOS process for the reliable transmission of 54 Mb/s OFDM signals. The front-end output power is −3 dBm while the corresponding EVM is −27 dB which is necessary for the 802.11g standard of EVM at −25 dB. With the adopted gain control strategy the output power changes from −14.3 to −3.7 dBm with every step 0.8 dB (20%) which covers the gain variation due to working temperature and process. A power detector indicates the output power and delivers a voltage to the baseband to control the output power. (semiconductor integrated circuits)

  20. Coupling Front-End Separations, Ion Mobility Spectrometry, and Mass Spectrometry For Enhanced Multidimensional Biological and Environmental Analyses

    Science.gov (United States)

    Zheng, Xueyun; Wojcik, Roza; Zhang, Xing; Ibrahim, Yehia M.; Burnum-Johnson, Kristin E.; Orton, Daniel J.; Monroe, Matthew E.; Moore, Ronald J.; Smith, Richard D.; Baker, Erin S.

    2017-01-01

    Ion mobility spectrometry (IMS) is a widely used analytical technique for rapid molecular separations in the gas phase. Though IMS alone is useful, its coupling with mass spectrometry (MS) and front-end separations is extremely beneficial for increasing measurement sensitivity, peak capacity of complex mixtures, and the scope of molecular information available from biological and environmental sample analyses. In fact, multiple disease screening and environmental evaluations have illustrated that the IMS-based multidimensional separations extract information that cannot be acquired with each technique individually. This review highlights three-dimensional separations using IMS-MS in conjunction with a range of front-end techniques, such as gas chromatography, supercritical fluid chromatography, liquid chromatography, solid-phase extractions, capillary electrophoresis, field asymmetric ion mobility spectrometry, and microfluidic devices. The origination, current state, various applications, and future capabilities of these multidimensional approaches are described in detail to provide insight into their uses and benefits. PMID:28301728

  1. Front-end circuit for position sensitive silicon and vacuum tube photomultipliers with gain control and depth of interaction measurement

    International Nuclear Information System (INIS)

    Herrero, Vicente; Colom, Ricardo; Gadea, Rafael; Lerche, Christoph W.; Cerda, Joaquin; Sebastia, Angel; Benlloch, Jose M.

    2007-01-01

    Silicon Photomultipliers, though still under development for mass production, may be an alternative to traditional Vacuum Photomultipliers Tubes (VPMT). As a consequence, electronic front-ends initially designed for VPMT will need to be modified. In this simulation, an improved architecture is presented which is able to obtain impact position and depth of interaction of a gamma ray within a continuous scintillation crystal, using either kind of PM. A current sensitive preamplifier stage with individual gain adjustment interfaces the multi-anode PM outputs with a current division resistor network. The preamplifier stage allows to improve front-end processing delay and temporal resolution behavior as well as to increase impact position calculation resolution. Depth of interaction (DOI) is calculated from the width of the scintillation light distribution, which is related to the sum of voltages in resistor network input nodes. This operation is done by means of a high-speed current mode scheme

  2. Evaluation of the Ride-Through Capability of an Active-Front-End Adjustable Speed Drive under Real Grid Conditions

    DEFF Research Database (Denmark)

    Liserre, Marco; Klumpner, Christian; Blaabjerg, Frede

    2004-01-01

    Better quality of the input currents, unity power factor and regenerative capability are not the only benefits of equipping an Adjustable Speed Drive (ASD) with an active front-end-stage. Controlling the power inflow may enable also the reduction of the dc-link energy storage, which will then lead...... to the replacement of the electrolytic capacitors with film capacitors, which have lower energy density meaning that the volume is similar, but will increase the ASD lifetime. In these circumstances, operation under unbalanced and distorted supply voltage as well as high dynamic operation of the ASD makes...... the control task more challenging. The aim of this paper is to investigate the ride-through capability of an ASD with active front-end under real grid conditions and in view of the minimum dc-link storage. Experiments validate the theoretical analysis....

  3. Coupling Front-End Separations, Ion Mobility Spectrometry, and Mass Spectrometry For Enhanced Multidimensional Biological and Environmental Analyses

    Energy Technology Data Exchange (ETDEWEB)

    Zheng, Xueyun; Wojcik, Roza; Zhang, Xing; Ibrahim, Yehia M.; Burnum-Johnson, Kristin E.; Orton, Daniel J.; Monroe, Matthew E.; Moore, Ronald J.; Smith, Richard D.; Baker, Erin M.

    2017-06-12

    Ion mobility spectrometry (IMS) is a widely used analytical technique for rapid molecular separations in the gas phase. IMS alone is useful, but its coupling with mass spectrometry (MS) and front-end separations has been extremely beneficial for increasing measurement sensitivity, peak capacity of complex mixtures, and the scope of molecular information in biological and environmental sample analyses. Multiple studies in disease screening and environmental evaluations have even shown these IMS-based multidimensional separations extract information not possible with each technique individually. This review highlights 3-dimensional separations using IMS-MS in conjunction with a range of front-end techniques, such as gas chromatography (GC), supercritical fluid chromatography (SFC), liquid chromatography (LC), solid phase extractions (SPE), capillary electrophoresis (CE), field asymmetric ion mobility spectrometry (FAIMS), and microfluidic devices. The origination, current state, various applications, and future capabilities for these multidimensional approaches are described to provide insight into the utility and potential of each technique.

  4. One size does not fit all - understanding the front-end and back-ens of business model innovation

    DEFF Research Database (Denmark)

    Günzel, Franziska; Holm, Anna B.

    2013-01-01

    Business model innovation is becoming a central research topic in management. However, a lack of a common understanding of the nature of the business model leads to disregarding its multifaceted structure when analyzing the business model innovation process. This article proposes a more detailed...... understanding of the business model innovation process by drawing on existing knowledge from new product development literature and examining the front-end and the back-end of business model innovation of three leading Danish newspapers. We studied how changes introduced during the development of digital news...... production and delivery have affected key components of these business models, namely value creation, proposition, delivery and capture in the period 2002–2011. Our findings suggest the need to distinguish between front-end and back-end business model innovation processes, and to recognize the importance...

  5. A segmented Hybrid Photon Detector with integrated auto-triggering front-end electronics for a PET scanner

    CERN Document Server

    Chesi, Enrico Guido; Joram, C; Mathot, S; Séguinot, Jacques; Weilhammer, P; Ciocia, F; De Leo, R; Nappi, E; Vilardi, I; Argentieri, A; Corsi, F; Dragone, A; Pasqua, D

    2006-01-01

    We describe the design, fabrication and test results of a segmented Hybrid Photon Detector with integrated auto-triggering front-end electronics. Both the photodetector and its VLSI readout electronics are custom designed and have been tailored to the requirements of a recently proposed novel geometrical concept of a Positron Emission Tomograph. Emphasis is put on the PET specific features of the device. The detector has been fabricated in the photocathode facility at CERN.

  6. The design of a new coaxial water cooling structure for APS high power BM front end photon shutters

    International Nuclear Information System (INIS)

    Chang, J.; Shu, D.; Collins, J.; Ryding, D.; Kuzay, T.

    1993-01-01

    A new UHV compatible coaxial water cooling structure has been designed for Advanced Photon Source (APS) high power bending magnet front end photon shutters. Laser-beam-thermal-simulation test results show that this new cooling structure can provide more than 1.56 kW total power cooling capacity with 12.3 W/mm 2 maximum surface heat flux. The maximum surface temperature will be lower than 116 degree C

  7. ONE SIZE DOES NOT FIT ALL — UNDERSTANDING THE FRONT-END AND BACK-END OF BUSINESS MODEL INNOVATION

    OpenAIRE

    FRANZISKA GÜNZEL; ANNA B. HOLM

    2013-01-01

    Business model innovation is becoming a central research topic in management. However, a lack of a common understanding of the nature of the business model leads to disregarding its multifaceted structure when analyzing the business model innovation process. This article proposes a more detailed understanding of the business model innovation process by drawing on existing knowledge from new product development literature and examining the front-end and the back-end of business model innovatio...

  8. One size does not fit all - understanding the front-end and back-ens of business model innovation

    OpenAIRE

    Günzel, Franziska; Holm, Anna B.

    2013-01-01

    Business model innovation is becoming a central research topic in management. However, a lack of a common understanding of the nature of the business model leads to disregarding its multifaceted structure when analyzing the business model innovation process. This article proposes a more detailed understanding of the business model innovation process by drawing on existing knowledge from new product development literature and examining the front-end and the back-end of business model innovatio...

  9. Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0

    International Nuclear Information System (INIS)

    Manazza, A.; Gaioni, L.; Re, V.

    2011-01-01

    This work is concerned with the design of two different analog channels for hybrid and monolithic pixels readout in view of applications to the SVT at the SuperB Factory. The circuits have been designed in a 130nm CMOS, vertically integrated technology, which, among others, may provide some advantages in terms of functional density and electrical isolation between the analog and the digital sections of the front-end.

  10. Recent advancements of chemical engineering in front end fuel cycle technologies at NFC. Contributed Paper IT-01

    International Nuclear Information System (INIS)

    Saibaba, N.

    2014-01-01

    On front end fuel cycle side, Nuclear Fuel Complex (NFC) has been a pioneer in processing the uranium and zirconium ore concentrates from different sources. The uranium and zirconium ore concentrates are converted into nuclear grade uranium and zirconium di oxide powders through the conventional TBP purification and precipitation route. In case of zirconium powders, they are converted into pure nuclear grade zirconium sponge through chlorination route for the production of zirconium alloys, which are mainly used as reactor core structural material

  11. Development of a dedicated front-end electronics for straw tube trackers in the P-bar ANDA experiment

    International Nuclear Information System (INIS)

    Przyborowski, D.; Fiutowski, T.; Idzik, M.; Swientek, K.; Terlecki, P.; Tokarz, J.; Kajetanowicz, M.; Korcyl, G.; Salabura, P.; Smyrski, J.; Strzempek, P.

    2016-01-01

    The design and tests of front-end electronics for straw tube trackers in the P-bar ANDA experiment at FAIR are presented. The challenges for the front-end electronics, comprising operation at high counting rate up to 1 MHz per straw tube, are discussed and the proposed architecture comprising a switched gain charge sensitive preamplifier (CSP), a pole-zero cancellation circuit (PZC), a second order variable peaking time shaper, a trimming ion tail cancellation circuit, and a baseline holder (BLH), is described. The front-end provides an analogue output and a discriminator with LVDS differential driver for the Time-of-Arrival (ToA) and Time-over-Threshold (ToT) measurements. A prototype readout ASIC featuring four channels was fabricated in 0.35 μm CMOS technology consuming 15.5 mW (analog part) and 12 mW (LVDS) per channel. The results of measurements of peaking time (25–67 ns), gain, noise (ENC 800–2500 el. for various gains), time walk and jitter are presented as well as the first results obtained with prototype straw tubes connected.

  12. A Real Time Electronics Emulator with Realistic Data Generation for Reception Tests of the CMS ECAL Front-End Boards

    CERN Document Server

    Romanteau, T; Collard, Caroline; Debraine, A; Decotigny, D; Dobrzynski, L; Karar, A; Regnault, N

    2005-01-01

    The CMS [1] electromagnetic calorimeter (ECAL) [2] uses 3 132 Front-End boards (FE) performing both trigger and data readout functions. Prior to their integration at CERN, the FE boards have to be validated by dedicated test bench systems. The final one, called "XFEST" (eXtended Front-End System Test) and for which the present developments have been performed, is located at Laboratoire Leprince-Ringuet. In this contribution, a solution is described to efficiently test a large set of complex electronics boards characterized by a large number of input ports and a high throughput data rate. To perform it, an algorithm to simulate the Very Front End signals has been emulated. The project firmwares use VHDL embedded into XILINX Field Programmable Gate Array circuits (FPGA). This contribution describes the solutions developed in order to create a realistic digital input patterns real-time emul ator working at 40 MHz. The implementation of a real time comparison of the FE output streams as well as the test bench wil...

  13. Prometeo: A portable test-bench for the upgraded front-end electronics of the ATLAS Tile calorimeter

    CERN Document Server

    Bullock, D; The ATLAS collaboration; Hofsajer, I; Govender, M; Mellado, B; Moreno, P; Reed, R; Ruan, X; Sandrock, C; Solans, C; Suter, R; Usai, G; Valero, A

    2014-01-01

    Prometeo is the portable test-bench for the full certification of the front-end electronics of the ATLAS Tile calorimeter designed for the upgrade phase-II. It is a high throughput electronics system designed to simultaneously read-out all the samples from 12 channels at the LHC bunch crossing frequency and assess the quality of the data in real-time. The core of the system is a Xilinx Virtex 7 evaluation board extended with a dual QSFP FMC module to read-out and control the front-end boards. The rest of the functionalities of the system are provided by a HV mezzanine board that to turn on the gain of the photo-multipliers, an LED board that sends light to illuminate them, and a 12 channel ADC board that samples the analog output of the front-end. The system is connected by ethernet to a GUI client from which QA tests are performed on the electronics such as noise measurements and linearity response to an injected charge.

  14. Development of a dedicated front-end electronics for straw tube trackers in the bar PANDA experiment

    Science.gov (United States)

    Przyborowski, D.; Fiutowski, T.; Idzik, M.; Kajetanowicz, M.; Korcyl, G.; Salabura, P.; Smyrski, J.; Strzempek, P.; Swientek, K.; Terlecki, P.; Tokarz, J.

    2016-08-01

    The design and tests of front-end electronics for straw tube trackers in the bar PANDA experiment at FAIR are presented. The challenges for the front-end electronics, comprising operation at high counting rate up to 1 MHz per straw tube, are discussed and the proposed architecture comprising a switched gain charge sensitive preamplifier (CSP), a pole-zero cancellation circuit (PZC), a second order variable peaking time shaper, a trimming ion tail cancellation circuit, and a baseline holder (BLH), is described. The front-end provides an analogue output and a discriminator with LVDS differential driver for the Time-of-Arrival (ToA) and Time-over-Threshold (ToT) measurements. A prototype readout ASIC featuring four channels was fabricated in 0.35 μm CMOS technology consuming 15.5 mW (analog part) and 12 mW (LVDS) per channel. The results of measurements of peaking time (25-67 ns), gain, noise (ENC 800-2500 el. for various gains), time walk and jitter are presented as well as the first results obtained with prototype straw tubes connected.

  15. Biomass bale stack and field outlet locations assessment for efficient infield logistics

    Science.gov (United States)

    Harvested hay or biomass are traditionally baled for better handling and they are transported to the outlet for final utilization. For better management of bale logistics, producers often aggregate bales into stacks so that bale-hauling equipment can haul multiple bales for improved efficiency. Obje...

  16. BALE KULKUL SEBAGAI BANGUNAN PENANDA PENDUKUNG KARAKTER KOTA BUDAYA

    Directory of Open Access Journals (Sweden)

    A. A. Ayu Oka Saraswati

    2006-01-01

    Full Text Available Bale Kulkul is a bale edifice to hang up the kulkul (wooden bell so it can function as communicative facility for Balinese community. Bale kulkul which is grouped into several types, firstly found in temples, palaces and banjar. Later in its development, bale kulkul also functions as security post, generator room, lift shaft, water tower, office for head of banjar as well as warehouse. This research focuses on the evaluation of functional development of bale kulkul happened in society due to transformation, "both-end" phenomenon and resultant of the complexities. The samples are taken from temples, palaces, banjar and tourism facilities, such as hotels, travel bureau office as well as shopping centers. With its impress tall building like a minaret, bale kulkul also function as node to support the character of cultural town Abstract in Bahasa Indonesia : Bale kulkul merupakan suatu bangunan bale untuk menggantung kulkul sehingga dapat berfungsi sebagai sarana komunikasi masyarakat Bali. Bale kulkul yang dikelompokkan dalam beberapa jenis, pada awalnya banyak ditemukan di pura, puri, dan banjar. Pada perkembangannya, bale kulkul juga berfungsi sebagai pos satpam, ruang genset, lift shaft, tower air, kantor kelian banjar ataupun gudang simpan. Kajian ini mengetengahkan evaluasi terhadap perkembangan fungsi bale kulkul yang terjadi di masyarakat melalui transformasi, fenomena both-and, dan resultan kompleksitas. Pengambilan sampel dilakukan di pura, puri, banjar dan fasilitas pariwisata seperti hotel, kantor biro perjalanan serta pertokoan. Dengan bentuk yang menjulang tinggi menyerupai menara, bale kulkul juga berfungsi sebagai bangunan penanda yang mendukung karakter kota budaya. Kata kunci: bale kulkul, penanda, karakter kota budaya

  17. Polyurethane Production from Waste Bale Fibers

    Directory of Open Access Journals (Sweden)

    İbrahim BİLİCİ

    2017-12-01

    Full Text Available Nowadays, the methods of eliminating the pollution from wastes of the materials produced as much as the production methods are important. This requires efficiently use of sources economical and ecologically. Polyester based polymers, which is one of the most important consumed plastic materials in the world, have lots of number of recycling methods. Basically it is called chemical and physical recycling. Chemical recycle methods include glycolysis, aminolysis, methanolysis, hydrolysis and etc.. In this study aromatic polyester polyols produced from bale fiber wastes via glycolysis method. Zinc Acetate used as a catalysts and diethylene glycol used for the glycolysis reaction and moiety of glycol investigated as an experimental parameter. Polyurethane material produced via obtained polyol and TDI (Toluene di Isocyanate reaction. Obtained polyurethane material investigated via FTIR and TGA and compared with the commercial polyurethane. As a result, it has been decided that glycolysis is usable and applicable method for the waste bale fibers.

  18. A Novel Front-End ASIC With Post Digital Filtering and Calibration for CZT-Based PET Detector

    International Nuclear Information System (INIS)

    Gao, W.; Yin, J.; Li, C.; Zeng, H.; Gao, D.; Hu, Y.

    2015-01-01

    This paper presents a novel front-end electronics based on a front-end ASIC with post digital filtering and calibration dedicated to CZT detectors for PET imaging. A cascade amplifier based on split-leg topology is selected to realize the charge-sensitive amplifier (CSA) for the sake of low noise performances and the simple scheme of the power supplies. The output of the CSA is connected to a variable-gain amplifier to generate the compatible signals for the A/D conversion. A multi-channel single-slope ADC is designed to sample multiple points for the digital filtering and shaping. The digital signal processing algorithms are implemented by a FPGA. To verify the proposed scheme, a front-end readout prototype ASIC is designed and implemented in 0.35 μm CMOS process. In a single readout channel, a CSA, a VGA, a 10-bit ADC and registers are integrated. Two dummy channels, bias circuits, and time controller are also integrated. The die size is 2.0 mm x 2.1 mm. The input range of the ASIC is from 2000 e - to 100000 e - , which is suitable for the detection of the X-and gamma ray from 11.2 keV to 550 keV. The linearity of the output voltage is less than 1 %. The gain of the readout channel is 40.2 V/pC. The static power dissipation is about 10 mW/channel. The above tested results show that the electrical performances of the ASIC can well satisfy PET imaging applications. (authors)

  19. A Novel Front-End ASIC With Post Digital Filtering and Calibration for CZT-Based PET Detector

    Energy Technology Data Exchange (ETDEWEB)

    Gao, W.; Yin, J.; Li, C.; Zeng, H.; Gao, D. [Institute of Microelectronics, School of Computer Science and Techonology, Northwestern Polytechnical University, Xi' an (China); Hu, Y. [Institut Pluridiscipline Hubert Curien, CNRS/UDS/IN2P3, Strasbourg (France)

    2015-07-01

    This paper presents a novel front-end electronics based on a front-end ASIC with post digital filtering and calibration dedicated to CZT detectors for PET imaging. A cascade amplifier based on split-leg topology is selected to realize the charge-sensitive amplifier (CSA) for the sake of low noise performances and the simple scheme of the power supplies. The output of the CSA is connected to a variable-gain amplifier to generate the compatible signals for the A/D conversion. A multi-channel single-slope ADC is designed to sample multiple points for the digital filtering and shaping. The digital signal processing algorithms are implemented by a FPGA. To verify the proposed scheme, a front-end readout prototype ASIC is designed and implemented in 0.35 μm CMOS process. In a single readout channel, a CSA, a VGA, a 10-bit ADC and registers are integrated. Two dummy channels, bias circuits, and time controller are also integrated. The die size is 2.0 mm x 2.1 mm. The input range of the ASIC is from 2000 e{sup -} to 100000 e{sup -}, which is suitable for the detection of the X-and gamma ray from 11.2 keV to 550 keV. The linearity of the output voltage is less than 1 %. The gain of the readout channel is 40.2 V/pC. The static power dissipation is about 10 mW/channel. The above tested results show that the electrical performances of the ASIC can well satisfy PET imaging applications. (authors)

  20. Development and validation of a 64 channel front end ASIC for 3D directional detection for MIMAC

    International Nuclear Information System (INIS)

    Richer, J P; Bourrion, O; Bosson, G; Guillaudin, O; Mayet, F; Santos, D

    2011-01-01

    A front end ASIC has been designed to equip the μTPC prototype developed for the MIMAC project, which requires 3D reconstruction of low energy particle tracks in order to perform directional detection of galactic Dark Matter. Each ASIC is able to monitor 64 strips of pixels and provides the 'Time Over Threshold' information for each of those. These 64 digital informations, sampled at a rate of 50 MHz, can be transferred at 400 MHz by eight LVDS serial links. Eight ASIC were validated on a 2 × 256 strips of pixels prototype.

  1. Front-end and back-end electrochemistry of molten salt in accelerator-driven transmutation systems

    International Nuclear Information System (INIS)

    Williamson, M.A.; Venneri, F.

    1995-01-01

    The objective of this work is to develop preparation and clean-up processes for the fuel and carrier salt in the Los Alamos Accelerator-Driven Transmutation Technology molten salt nuclear system. The front-end or fuel preparation process focuses on the removal of fission products, uranium, and zirconium from spent nuclear fuel by utilizing electrochemical methods (i.e., electrowinning). The same method provides the separation of the so-called noble metal fission products at the back-end of the fuel cycle. Both implementations would have important diversion safeguards. The proposed separation processes and a thermodynamic analysis of the electrochemical separation method are presented

  2. Performance of the front-end signal processing electronics for the drift chambers of the Stanford Large Detector

    International Nuclear Information System (INIS)

    Honma, A.; Haller, G.M.; Usher, T.; Shypit, R.

    1990-10-01

    This paper reports on the performance of the front-end analog and digital signal processing electronics for the drift chambers of the Stanford Large Detector (SLD) detector at the Stanford Linear Collider. The electronics mounted on printed circuit boards include up to 64 channels of transimpedance amplification, analog sampling, A/D conversion, and associated control circuitry. Measurements of the time resolution, gain, noise, linearity, crosstalk, and stability of the readout electronics are described and presented. The expected contribution of the electronics to the relevant drift chamber measurement resolutions (i.e., timing and charge division) is given

  3. Instrumentation of the upgraded ATLAS tracker with a double buffer front-end architecture for track triggering

    International Nuclear Information System (INIS)

    Wardrope, D

    2012-01-01

    The Large Hadron Collider will be upgraded to provide instantaneous luminosity L = 5 × 10 34 cm −2 s −1 , leading to excessive rates from the ATLAS Level-1 trigger. A double buffer front-end architecture for the ATLAS tracker replacement is proposed, that will enable the use of track information in trigger decisions within 20 μs in order to reduce the high trigger rates. Analysis of ATLAS simulations have found that using track information will enable the use of single lepton triggers with transverse momentum thresholds of p T ∼ 25 GeV, which will be of great benefit to the future physics programme of ATLAS.

  4. The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators control system

    OpenAIRE

    Van den Eynden, M

    1995-01-01

    The CERN SPS and LEP PowerPC project is aimed at introducing a new generation of PowerPC VMEbus processor modules running the LynxOS real-time operating system. This new generation of front end computers using the state-of-the-art microprocessor technology will first replace the obsolete Xenix PC based systems (about 140 installations) successfully used since 1988 to control the LEP accelerator. The major issues addressed in the scope of this large scale project are the technical specificatio...

  5. The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators system

    OpenAIRE

    Charrue, P; Bland, A; Ghinet, F; Ribeiro, P

    1995-01-01

    The CERN SPS and LEP PowerPC project is aimed at introducing a new generation of PowerPC VMEbus processor modules running the LynxOS real-time operating system. This new generation of front end computers using the state-of-the-art microprocessor technology will first replace the obsolete XENIX PC based systems (about 140 installations) successfully used since 1988 to control the LEP accelerator. The major issues addressed in the scope of this large scale project are the technical specificatio...

  6. Artificial Neural Network based DC-link Capacitance Estimation in a Diode-bridge Front-end Inverter System

    DEFF Research Database (Denmark)

    Soliman, Hammam Abdelaal Hammam; Abdelsalam, Ibrahim; Wang, Huai

    2017-01-01

    , a proposed software condition monitoring methodology based on Artificial Neural Network (ANN) algorithm is presented. Matlab software is used to train and generate the proposed ANN. The proposed methodology estimates the capacitance of the DC-link capacitor in a three phase front-end diode bridge AC......In modern design of power electronic converters, reliability of DC-link capacitors is an essential aspect to be considered. The industrial field have been attracted to the monitoring of their health condition and the estimation of their ageing process status. The existing condition monitoring...

  7. Design and Test of a 65nm CMOS Front-End with Zero Dead Time for Next Generation Pixel Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Gaioni, L. [INFN, Pavia; Braga, D. [Fermilab; Christian, D. [Fermilab; Deptuch, G. [Fermilab; Fahim. F., Fahim. F. [Fermilab; Nodari, B. [Lyon, IPN; Ratti, L. [INFN, Pavia; Re, V. [INFN, Pavia; Zimmerman, T. [Fermilab

    2017-09-01

    This work is concerned with the experimental characterization of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier with detector leakage compensation circuit, and a compact, single ended comparator able to correctly process hits belonging to two consecutive bunch crossing periods. A 2-bit Flash ADC is exploited for digital conversion immediately after the preamplifier. A description of the circuits integrated in the front-end processor and the initial characterization results are provided

  8. An inquiry on managers use of decision-making tools in the core front end of the innovation process

    DEFF Research Database (Denmark)

    Appio, Francesco P.; Achiche, Sofiane; McAloone, Tim C.

    2013-01-01

    This paper focuses on the Core Front End (CFE) activities of the innovation process to say, Opportunity Identification and Opportunity Analysis. In the CFE of innovation, several tools are used to facilitate and optimise decisions. To select them, managers of the product development team have...... is chosen and how those tools impact specific performance metrics. From the analyses and hypotheses testing performed, it clearly emerges that there is no link between being aware of basic requirements (inputs/outputs) to appropriately use a certain tool and dimensions such as tools’ effectiveness...

  9. Design of an FPGA-based embedded system for the ATLAS Tile Calorimeter front-end electronics test-bench

    CERN Document Server

    Carrio, F; The ATLAS collaboration; Moreno, P; Reed, R; Sandrock, C; Shalyugin, A; Schettino, V; Solans, C; Souza, J; Usai, G; Valero, A

    2013-01-01

    The portable test bench (VME based) used for the certification of the Tile calorimeter front-end electronics has been redesigned for the LHC Long Shutdown (2013-2014) improving its portability. The new version is based on a Xilinx Virtex 5 FPGA that implements an embedded system using a hard core PowerPC 440 microprocessor and custom IP cores. The PowerPC microprocessor runs a light Linux version and handles the IP cores written in VHDL that implement the different functionalities (TTC, G-Link, CAN-Bus) Description of the system and performance measurements of the different components will be shown.

  10. Design, development, installation and commissioning of water-cooled pre-masks for undulator front-ends of Indus-2

    International Nuclear Information System (INIS)

    Raghuvanshi, V.K.; Prasad, Vijendra; Garg, S.R.; Jain, Vikas

    2015-01-01

    Recently two undulators U1 and U2 are installed in Indus-2 storage ring at RRCAT, Indore. When U1 and U2 are put in operation, a bright synchrotron radiation (SR) is produced which is transmitted through the zero degree port of the dipole vacuum chamber. In addition, a part of SR beam from the bending magnets, at the upstream and downstream of the undulator, is also overlapped with the undulator SR beam and transmitted in to the front-end through the same port. The front-end is a long ultra high vacuum (UHV) assembly consisting of water-cooled pre-mask, water-cooled shutters, UHV valves, diagnostic devices, safety shutter, vacuum pumps etc which acts as an interface between Indus-2 ring and beamline. Water-cooled pre- masks have been designed to cut a part of unwanted SR beam from the bending magnets. The pre-mask is a first active component in the undulator front-end which is also capable of absorbing high thermal load due to mis-steering of the SR beam from the undulator in the worst case scenario. The watercooled pre-mask consists of a copper block which has fixed aperture with slant faces to distribute the heat flux over a large surface area. The cooling channels are made on outer periphery of the block. The copper block is vacuum brazed with two conflat flanges of stainless steel at the two ends. The pre-mask is designed to absorb thermal load of 3 kW of synchrotron beam from undulator U1 and 2 kW of synchrotron beam from undulator U2. The thermal analysis of the pre-masks was carried out with the help of ANSYS® and the design was optimized with different cooling configurations. The main design criteria was to limit the maximum temperature of the mask less than 60 °C. This is to avoid substantial thermal outgassing from the heated portion which may deteriorate the ultra high vacuum. Pre-masks have been successfully tested, installed and commissioned with synchrotron beam in the undulator front-ends and are operating under vacuum of 5x10 -10 mbar. (author)

  11. Quality control considerations for the development of the front end hybrid circuits for the CMS Outer Tracker upgrade

    CERN Document Server

    Gadek, Tomasz; Bonnaud, Julien Yves Robert; De Clercq, Jarne Theo; Honma, Alan; Koliatos, Alexandros; Kovacs, Mark Istvan; Luetic, Jelena

    2017-01-01

    The upgrade of the CMS Outer Tracker for the HL-LHC requires the design of new double-sensor modules. They contain two high-density front end hybrid circuits, equipped with flip-chip ASICs, passives and mechanical structures. First prototype hybrids in a close-to-final form have been ordered from three manufacturers. To qualify these hybrids a test setup was built, which emulates future tracker temperature and humidity conditions, provides temporary interconnection, and implements testing features. The system was automated to minimize the testing time in view of the production phase. Failure modes, deliberately implemented in the produced hybrids, provided feedback on the system’s effectiveness.

  12. Interfirm collaboration in the fuzzy front-end of the innovation process - Exploring new forms of collaboration

    DEFF Research Database (Denmark)

    Bergenholtz, Carsten; Jørgensen, Jacob Høj; Goduscheit, Rene Chester

    The objective of this paper is to elaborate on the differentiating characteristics between intra-firm and inter-firm innovation projects in the Fuzzy Front-End (FFE) of the innovation process. Focus is on management methods of the collaboration and the CEO-commitment to the project. The main point...... is the balance between to types of structure, namely: Structure of Content and structure of Process.  The right balance of these two kinds of structure will ensure that the focal company benefits from the creative input from the inter-organisational innovation partners and that they stay committed...

  13. Irradiation induced effects in the FE-I4 front-end chip of the ATLAS IBL detector

    CERN Document Server

    La Rosa, Alessandro; The ATLAS collaboration

    2016-01-01

    The ATLAS Insertable B-Layer (IBL) detector was installed into the ATLAS experiment in 2014 and has been in operation since 2015. During the first year of IBL data taking an increase of the low voltage currents produced by the FE-I4 front-end chip was observed and this increase was traced back to the radiation damage in the chip. The dependence of the current on the total-ionising dose and temperature has been tested with Xray and proton irradiations and will be presented in this paper together with the detector operation guidelines.

  14. CHARACTERIZATION OF THE COHERENT NOISE, ELECTROMAGNETIC COMPATIBILITY AND ELECTROMAGNETIC INTERFERENCE OF THE ATLAS EM CALORIMETER FRONT END BOARD

    International Nuclear Information System (INIS)

    CHASE, B.; CITTERIO, M.; LANNI, F.; MAKOWIECKI, D.; RADEKA, S.; RESCIA, S.; TAKAI, H.

    1999-01-01

    The ATLAS Electromagnetic (EM) calorimeter (EMCAL) Front End Board (FEB) will be located in custom-designed enclosures solidly connected to the feedtroughs. It is a complex mixed signal board which includes the preamplifier, shaper, switched capacitor array analog memory unit (SCA), analog to digital conversion, serialization of the data and related control logic. It will be described in detail elsewhere in these proceedings. The electromagnetic interference (either pick-up from the on board digital activity, from power supply ripple or from external sources) which affects coherently large groups of channels (coherent noise) is of particular concern in calorimetry and it has been studied in detail

  15. An Upgraded Front-End Switching Power Supply Design For the ATLAS TileCAL Detector of the LHC

    CERN Document Server

    Drake, Gary; The ATLAS collaboration

    2011-01-01

    We present the design of an upgraded switching power supply brick for the front-end electronics of the ATLAS hadron tile calorimeter (TileCAL) at the LHC. The new design features significant improvement in noise, improved fault detection, and generally a more robust design, while retaining the compact size, water-cooling, output control, and monitoring features in this 300 KHz design. We discuss the improvements to the design, and the radiation testing that we have done to qualify the design. We also present our plans for the production of 2400 new bricks for installation on the detector in 2013.

  16. An Upgraded Front-End Switching Power Supply Design for the ATLAS TileCAL Detector of the LHC

    CERN Document Server

    Drake, G; The ATLAS collaboration; De Lurgio, P; Henriques, A; Minashvili, I; Nemecek, S; Price, L; Proudfoot, J; Stanek, R

    2011-01-01

    We present the design of an upgraded switching power supply brick for the front-end electronics of the ATLAS hadron tile calorimeter (TileCAL) at the LHC. The new design features significant improvement in noise, improved fault detection, and generally a more robust design, while retaining the compact size, water-cooling, output control, and monitoring features in this 300 KHz design. We discuss the improvements to the design, and the radiation testing that we have done to qualify the design. We also present our plans for the production of 2400 new bricks for installation on the detector in 2013.

  17. Design of a New Switching Power Supply for the ATLAS TileCal Front-End Electronics

    CERN Document Server

    Drake, Gary; The ATLAS collaboration

    2012-01-01

    We present the design of an upgraded switching power supply for the front-end electronics of the ATLAS Hadron Tile Calorimeter. The new design features significant improvement in noise, improved fault detection, and improved reliability, while retaining the compact size, water-cooling, output control, and monitoring features. We discuss the steps taken to improve the design. We present the results from extensive radiation testing to qualify the design, including SEU sensitivity. We also present our reliability analysis. Production of 2400 new bricks for the detector is in progress, and we present preliminary results from the production checkout.

  18. Design of a New Switching Power Supply for the ATLAS TileCAL Front-End Electronics

    CERN Document Server

    Drake, G; The ATLAS collaboration

    2012-01-01

    We present the design of an upgraded switching power supply for the front-end electronics of the ATLAS hadron tile calorimeter (TileCAL) at the LHC. The new design features significant improvement in noise, improved fault detection, and improved reliability, while retaining the compact size, water-cooling, output control, and monitoring features in this 300 KHz design. We discuss the steps taken to improve the design. We present the results from extensive radiation testing to qualify the design, including SEU sensitivity. We also present our reliability analysis. Production of 2400 new bricks for the detector is currently in progress, and we present preliminary results from the production checkout.

  19. CHARACTERIZATION OF THE COHERENT NOISE, ELECTROMAGNETIC COMPATIBILITY AND ELECTROMAGNETIC INTERFERENCE OF THE ATLAS EM CALORIMETER FRONT END BOARD

    International Nuclear Information System (INIS)

    CHASE, R.L.; CITTERIO, M.; LANNI, F.; MAKOWIECKI, D.; RADEKA, V.; RESCIA, S.; TAKAI, H.; BAN, J.; PARSONS, J.; SIPPACH, W.

    2000-01-01

    The ATLAS Electromagnetic (EM) calorimeter (EMCAL) Front End Board (FEB) will be located in custom-designed enclosures solidly connected to the feedtroughs. It is a complex mixed signal board which includes the preamplifier, shaper, switched capacitor array analog memory unit (SCA), analog to digital conversion, serialization of the data and related control logic. It will be described in detail elsewhere in these proceedings. The electromagnetic interference (either pick-up from the on board digital activity, from power supply ripple or from external sources) which affects coherently large groups of channels (coherent noise) is of particular concern in calorimetry and it has been studied in detail

  20. Wheeling and dealing - the development of the power loader

    Energy Technology Data Exchange (ETDEWEB)

    Davies, P.M. (British Coal Corporation (UK). Selby Group)

    1990-04-01

    The paper traces the historical development of the power loader from its antecedent, the coal cutter, to the variety of coal getting machines available today. It examines the course of successful developments and, in addition, it describes some of the less successful machines that only found limited application - the 'dinosaurs'. Ancillary developments which were essential to the success of power loader evolution are also described and the evolutionary impetus that is currently altering power loader design is explored. The author concludes with views on the main criteria that will determine the power loader of the future and suggestions for improving some aspects of current performance by the application of technology. 8 figs.

  1. An updated front-end data link design for the Phase-2 upgrade of the ATLAS Tile Calorimeter

    CERN Document Server

    Silverstein, Samuel; The ATLAS collaboration

    2017-01-01

    We present a new design of the advanced Link Daughter Board (DB) for the front-end electronics upgrade of the ATLAS Tile Calorimeter (TileCal) for Phase-II. The new TileCal front-end comprises 1024 “mini-drawers” (MD) installed in 256 calorimeter modules. Each MD serves up to 12 PMT channels, with ADCs and calibration provided by one “main board” (MB) per MD. The DB is connected to the MB through a dense, high-speed FMC connector, and provides bi-directional multi-Gb/s optlcal links to the off-detector electronics for timing, control, and continuous high-speed readout of the ADC channels on the MB. The DB is designed for redundancy and fault-tolerance, and previous versions have already been successfully tested at CERN and elsewhere. The new revision includes Kintex Ultrascale+ FPGAs for improved link timing and radiation tolerance, an expanded role for the rad-tolerant GBTx ASICs, and a simpler design requiring fewer components and optical links.

  2. Petiroc and Citiroc: front-end ASICs for SiPM read-out and ToF applications

    International Nuclear Information System (INIS)

    Fleury, J; Ahmad, S; Callier, S; Taille, C de La; Seguin, N; Thienpont, D; Dulucq, F; Martin, G

    2014-01-01

    Petiroc and Citiroc are the two latest ASIC from Weeroc dedicated to SiPM read-out. Petiroc is a 16-channel front-end ASIC designed to readout silicon photomultipliers (SiPMs) for particle time-of-flight measurement applications. It combines a very fast and low-jitter trigger with an accurate charge measurement. Citiroc is a 32-channel front-end ASIC designed to readout silicon photo-multipliers (SiPM). It allows triggering down to 1/3 pe and provides the charge measurement with a good noise rejection. Moreover, Citiroc outputs the 32-channel triggers with a high accuracy (100 ps). Each channel of both ASICs combines a trigger path with an accurate charge measurement path. An adjustment of the SiPM high voltage is possible using a channel-by-channel input DAC. That allows a fine SiPM gain and dark noise adjustment at the system level to correct for the non-uniformity of SiPMs. Timing measurement down to 16 ps RMS jitter for Petiroc and 100 ps RMS for Citiroc is possible along with 1% linearity energy measurement up to 2500 pe. The power consumption is around 3.5 mW/channel for Petiroc and 3 mW/channel for Citiroc, excluding ASICs outing buffer

  3. Design of low noise front-end ASIC and DAQ system for CdZnTe detector

    International Nuclear Information System (INIS)

    Luo Jie; Deng Zhi; Liu Yinong

    2012-01-01

    A low noise front-end ASIC has been designed for CdZnTe detector. This chip contains 16 channels and each channel consists of a dual-stage charge sensitive preamplifier, 4th order semi-Gaussian shaper, leakage current compensation (LCC) circuit, discriminator and output buffer. This chip has been fabricated in Chartered 0.35 μm CMOS process, the preliminary results show that it works well. The total channel charge gain can be adjusted from 100 mV/fC to 400 mV/fC and the peaking time can be adjusted from 1 μs to 4 μs. The minimum measured ENC at zero input capacitance is 70 e and minimum noise slope is 20 e/pF. The peak detector and derandomizer (PDD) ASIC developed by BNL and an associated USB DAQ board are also introduced in this paper. Two front-end ASICs can be connected to the PDD ASIC on the USB DAQ board and compose a 32 channels DAQ system for CdZnTe detector. (authors)

  4. A front end ASIC for the readout of the PMT in the KM3NeT detector

    International Nuclear Information System (INIS)

    Gajanana, D; Gromov, V; Timmer, P; Heine, E; Kluit, R

    2010-01-01

    In this work, we describe the front end ASIC to readout the Photo-Multiplier-Tube of the KM3NeT detector, in detail. Stringent power budgeting, area constraints and lowering cost motivate us to design a custom front-end ASIC for reading the PMT. The ASIC amplifies the PMT signal and discriminates it against a threshold level and delivers the information via low voltage differential signals (LVDS). These LVDS signals carry highly accurate timing information of the photons . The length of the LVDS signals or Time over Threshold (ToT) gives information on the number of detected photons. A one-time programmable read-only memory (PROM) block provides unique identification to the chip. The chip communicates with the data acquisition electronics via an I 2 C bus. The data is transmitted to shore via fiber optics, where processing is done. The ASIC was fabricated in 0.35u CMOS process from AustriaMicroSystems (AMS).

  5. A SAR-ADC using unit bridge capacitor and with calibration for the front-end electronics of PET imaging

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Wei [School of Computer Science and Engineering, Northwestern Polytechnical University, Xi' an 710072, Shaanxi (China); Wei, Tingcun, E-mail: weitc@nwpu.edu.cn [School of Computer Science and Engineering, Northwestern Polytechnical University, Xi' an 710072, Shaanxi (China); Li, Bo; Yang, Lifeng; Xue, Feifei [School of Computer Science and Engineering, Northwestern Polytechnical University, Xi' an 710072, Shaanxi (China); Hu, Yongcai [Institut Pluridisciplinaire Hubert CURIEN, Strasbourg (France)

    2016-05-11

    This paper presents a 12-bit 1 MS/s successive approximation register-analog to digital converter (SAR-ADC) for the 32-channel front-end electronics of CZT-based PET imaging system. To reduce the capacitance mismatch, instead of the fractional capacitor, the unit capacitor is used as the bridge capacitor in the split-capacitor digital to analog converter (DAC) circuit. In addition, in order to eliminate the periodical DNL errors of −1 LSB which often exists in the SAR-ADC using the charge-redistributed DAC, a calibration algorithm is proposed and verified by the experiments. The proposed 12-bit 1 MS/s SAR-ADC is designed and implemented using a 0.35 μm CMOS technology, it occupies only an active area of 986×956 μm{sup 2}. The measurement results show that, at the power supply of 3.3/5.0 V and the sampling rate of 1 MS/s, the ADC with calibration has a signal-to-noise-and-distortion ratio (SINAD) of 67.98 dB, the power dissipation of 5 mW, and a figure of merit (FOM) of 2.44 pJ/conv.-step. This ADC is with the features of high accuracy, low power and small layout area, it is especially suitable to the one-chip integration of the front-end readout electronics.

  6. An Updated Front-End Data Link Design for the Phase-2 Upgrade of the ATLAS Tile Calorimeter

    CERN Document Server

    Silverstein, Samuel; The ATLAS collaboration

    2017-01-01

    We present a new design for the advanced Link Daughter Board (DB) for the front-end electronics upgrade of the ATLAS hadronic Tile Calorimeter. The DB provides control, configuration and continuous ADC readout for the front-end, as well as bi-directional multi-GB/s optical links to the off-detector readout system. The DB will operate in high luminosity LHC conditions with limited detector access, so the design is fault tolerant with a high level of redundancy to avoid single-point failure modes. The DB is divided longitudinally, with an FPGA serving the ADC channels on its respective side. The new design is based on the new Xilinx Kintex Ultrascale+ FPGA family, which provides improved high-speed link timing performance as well as better signal compatibility with the CERN-developed GBTx link and timing distribution ASICs. Two GBTx ASICs each provide redundant phase-adjusted, LHC synchronous clocks, parallel control buses and remote JTAG configuration access to both FPGAs on the DB.

  7. A wideband large dynamic range and high linearity RF front-end for U-band mobile DTV

    International Nuclear Information System (INIS)

    Liu Rongjiang; Liu Shengyou; Guo Guiliang; Cheng Xu; Yan Yuepeng

    2013-01-01

    A wideband large dynamic range and high linearity U-band RF front-end for mobile DTV is introduced, and includes a noise-cancelling low-noise amplifier (LNA), an RF programmable gain amplifier (RFPGA) and a current communicating passive mixer. The noise/distortion cancelling structure and RC post-distortion compensation are employed to improve the linearity of the LNA. An RFPGA with five stages provides large dynamic range and fine gain resolution. A simple resistor voltage network in the passive mixer decreases the gate bias voltage of the mixing transistor, and optimum linearity and symmetrical mixing is obtained at the same time. The RF front-end is implemented in a 0.25 μm CMOS process. Tests show that it achieves an IIP3 (third-order intercept point) of −17 dBm, a conversion gain of 39 dB, and a noise figure of 5.8 dB. The RFPGA achieves a dynamic range of −36.2 to 23.5 dB with a resolution of 0.32 dB. (semiconductor integrated circuits)

  8. The SSC field bus: A high-performance control system front end concentrator for 'slow' accelerator controls

    International Nuclear Information System (INIS)

    Haenni, D.R.; Saltmarsh, C.G.; Lue, H.C.; Hunt, S.M.

    1991-01-01

    The SSC control system must support a large number of 'slow' or industrial type control points. A front-end system is described which could serve as both a data concentrator and a distributed process controller for these points. Unlike many distributed control systems, this front end is designed to provide strong support for centralized controls. The live parameter data base in the central system can be updated at a rate which is fast compared to that usually needed for process control loops. Portions of this data base can be optionally replicated in regional computers to provide both local control stations and distributed control loops. In addition to the global and regional levels the system also allows the distribution of loops to the local I/O crate level. A possible implementation of this system is under development which is based on industrial standard STD-Bus for accelerator hardware interfacing, time domain multiplexing (TDM) for communications transport, and a form of reflective memory for the back-end interface to the rest of the control system

  9. 10 Gb/s OEIC optical receiver front-end and 3.125 Gb/s PHEMT limiting amplifier

    International Nuclear Information System (INIS)

    Fan Chao; Jiao Shilong; Wu Yunfeng; Ye Yutang; Chen Tangsheng; Yang Lijie; Feng Ou

    2009-01-01

    A 10 Gb/s OEIC (optoelectronic integrated circuit) optical receiver front-end has been studied and fabricated based on the Φ-76 mm GaAs PHEMT process; this is the first time that a limiting amplifier (LA) has been designed and realized using depletion mode PHEMT. An OEIC optical receiver front-end mode composed of an MSM photodiode and a current mode transimpedance amplifier (TIA) has been established and optimized by simulation software ATLAS. The photodiode has a bandwidth of 10 GHz, a capacitance of 3 fF/μm and a photosensitive area of 50 x 50 μm 2 . The whole chip has an area of 1511 x 666 μm 2 . The LA bandwidth is expanded by spiral inductance which has been simulated by software HFSS. The chip area is 1950 x 1910 μm 2 and the measured results demonstrate an input dynamic range of 34 dB (10-500 mVpp) with constant output swing of 500 mVpp.

  10. 2.5 Gbit/s Optical Receiver Front-End Circuit with High Sensitivity and Wide Dynamic Range

    Science.gov (United States)

    Zhu, Tiezhu; Mo, Taishan; Ye, Tianchun

    2017-12-01

    An optical receiver front-end circuit is designed for passive optical network and fabricated in a 0.18 um CMOS technology. The whole circuit consists of a transimpedance amplifier (TIA), a single-ended to differential amplifier and an output driver. The TIA employs a cascode stage as the input stage and auxiliary amplifier to reduce the miller effect. Current injecting technique is employed to enlarge the input transistor's transconductance, optimize the noise performance and overcome the lack of voltage headroom. To achieve a wide dynamic range, an automatic gain control circuit with self-adaptive function is proposed. Experiment results show an optical sensitivity of -28 dBm for a bit error rate of 10-10 at 2.5 Gbit/s and a maxim input optical power of 2 dBm using an external photodiode. The chip occupies an area of 1×0.9 mm2 and consumes around 30 mW from single 1.8 V supply. The front-end circuit can be used in various optical receivers.

  11. 10 Gb/s OEIC optical receiver front-end and 3.125 Gb/s PHEMT limiting amplifier

    Energy Technology Data Exchange (ETDEWEB)

    Fan Chao; Jiao Shilong; Wu Yunfeng; Ye Yutang [School of Opto-Electronic Information, UESTC, Chengdu 610054 (China); Chen Tangsheng; Yang Lijie; Feng Ou, E-mail: fanchao41@126.co [Nanjing Electronic Devices Institute, Nanjing 210016 (China)

    2009-10-15

    A 10 Gb/s OEIC (optoelectronic integrated circuit) optical receiver front-end has been studied and fabricated based on the {Phi}-76 mm GaAs PHEMT process; this is the first time that a limiting amplifier (LA) has been designed and realized using depletion mode PHEMT. An OEIC optical receiver front-end mode composed of an MSM photodiode and a current mode transimpedance amplifier (TIA) has been established and optimized by simulation software ATLAS. The photodiode has a bandwidth of 10 GHz, a capacitance of 3 fF/{mu}m and a photosensitive area of 50 x 50 {mu}m{sup 2}. The whole chip has an area of 1511 x 666 {mu}m{sup 2}. The LA bandwidth is expanded by spiral inductance which has been simulated by software HFSS. The chip area is 1950 x 1910 {mu}m{sup 2} and the measured results demonstrate an input dynamic range of 34 dB (10-500 mVpp) with constant output swing of 500 mVpp.

  12. Performance evaluation of the analogue front-end and ADC prototypes for the Gotthard-II development

    Science.gov (United States)

    Zhang, J.; Andrä, M.; Barten, R.; Bergamaschi, A.; Brückner, M.; Dinapoli, R.; Fröjdh, E.; Greiffenberg, D.; Lopez-Cuenca, C.; Mezza, D.; Mozzanica, A.; Ramilli, M.; Redford, S.; Ruat, M.; Ruder, C.; Schmitt, B.; Shi, X.; Thattil, D.; Tinti, G.; Turcato, M.; Vetter, S.

    2017-12-01

    Gotthard-II is a silicon microstrip detector developed for the European X-ray Free-Electron Laser (XFEL.EU). Its potential scientific applications include X-ray absorption/emission spectroscopy, hard X-ray high resolution single-shot spectrometry (HiREX), energy dispersive experiments at 4.5 MHz frame rate, beam diagnostics, as well as veto signal generation for pixel detectors. Gotthard-II uses a silicon microstrip sensor with a pitch of 50 μm or 25 μm and with 1280 or 2560 channels wire-bonded to readout chips (ROCs). In the ROC, an adaptive gain switching pre-amplifier (PRE), a fully differential Correlated-Double-Sampling (CDS) stage, an Analog-to-Digital Converter (ADC) as well as a Static Random-Access Memory (SRAM) capable of storing all the 2700 images in an XFEL.EU bunch train will be implemented. Several prototypes with different designs of the analogue front-end (PRE and CDS) and ADC test structures have been fabricated in UMC-110 nm CMOS technology and their performance has been evaluated. In this paper, the performance of the analogue front-end and ADC will be summarized.

  13. A Programmable Biopotential Aquisition Front-end with a Resistance-free Current-balancing Instrumentation Amplifier

    Directory of Open Access Journals (Sweden)

    FARAGO, P.

    2018-05-01

    Full Text Available The development of wearable biomedical equipment benefits from low-power and low-voltage circuit techniques for reduced battery size and battery, or even battery-less, operation. This paper proposes a fully-differential low-power resistance-free programmable instrumentation amplifier for the analog front-end of biopotential monitoring systems. The proposed instrumentation amplifier implements the current balancing technique. Low power consumption is achieved with subthreshold biasing. To reduce chip area and enable integration, passive resistances have been replaced with active equivalents. Accordingly, the instrumentation amplifier gain is expressed as the ratio of two transconductance values. The proposed instrumentation amplifier exhibits two degrees of freedom: one to set the desired range and the other for fine-tuning of the voltage gain. The proposed IA is employed in a programmable biopotential acquisition front-end. The programmable frequency-selective behavior is achieved by having the lower cutoff frequency of a Gm-C Tow-Thomas biquad varied in a constant-C tuning approach. The proposed solutions and the programmability of the operation parameters to the specifications of particular bio-medical signals are validated on a 350nm CMOS process.

  14. Safety control system and its interface to EPICS for the off-line front end of the SPES project

    International Nuclear Information System (INIS)

    Vasquez, J.; Andrighetto, A.; Bassato, G.; Costa, L.; Giacchini, M.; Bertocco, M.

    2012-01-01

    The SPES (Selective Production of Exotic Species) project is based on a facility for the production of neutron-rich radioactive ion beams using the isotope separation on-line technique. The SPES off-line front-end apparatus involves a number of subsystems and procedures that are potentially dangerous both for human operators and for the equipment. The high voltage power supply, the ion source complex power supplies, the target chamber handling systems and the laser source are some example of these subsystems. For that reason, a safety control system has been developed. It is based on Schneider Electrics Preventa family safety modules that control the power supply of critical subsystems in combination with safety detectors that monitor critical variables. A Programmable Logic Controller (PLC), model BMXP342020 from the Schneider Electrics Modicon M340 family, is used for monitoring the status of the system as well as controlling the sequence of some operations in automatic way. A touch screen, model XBTGT5330 from the Schneider Electrics Magelis family, is used as Human Machine Interface (HMI) and communicates with the PLC using MODBUS-TCP. Additionally, an interface to the EPICS control network was developed using a home-made MODBUS-TCP EPICS driver in order to integrate it to the control system of the Front End as well as present the status of the system to the users on the main control panel. (authors)

  15. Prometeo: A portable test-bench for the upgraded front-end electronics of the ATLAS Tile calorimeter

    CERN Document Server

    Bullock, D; The ATLAS collaboration; Govender, M; Hofsajer, I; Mellado, B; Moreno, P; Reed, R; Ruan, X; Sandrock, C; Solans, C; Suter, R; Usai, G; Valero, A

    2014-01-01

    Prometeo is a portable test-bench for full certification of the front-end electronics of the ATLAS Tile calorimeter, designed for the upgrade phase-II. It is a high-throughput electronic system designed to simultaneously read out all the digitized samples from 12 channels at the LHC bunch crossing frequency and assess the quality of the data in real-time. The core of the system is a Xilinx Virtex 7 evaluation board extended with a dual QSFP FMC module to read out and control the on-detector electronics. The rest of the functionalities of the system are provided by a HV mezzanine board that supplied the HV to the photo-multipliers, an LED board that sends light to illuminate them, and a 12 channel ADC board that samples the analog trigger output of the front- end. The system is connected by ethernet to a GUI client from which QA tests are performed on the electronics such as noise measurements and linearity response to an injected charge.

  16. The CBM Experiment at FAIR-New challenges for Front-End Electronics, Data Acquisition and Trigger Systems

    International Nuclear Information System (INIS)

    Mueller, Walter F J

    2006-01-01

    The 'Compressed Baryonic Matter' (CBM) experiment at the new 'Facility for Antiproton and Ion Research' (FAIR) in Darmstadt is designed to study the properties of highly compressed baryonic matter produced in nucleus-nucleus collisions in the 10 to 45 A GeV energy range. One of the key observables is hidden (J/ψ) and open (D 0 , D ± ) charm production. To achieve an adequate sensitivity extremely high interaction rates of up to 10 7 events/second are required, resulting in major technological challenges for the detectors, front-end electronics and data processing. The front-end electronics will be self-triggered, autonomously detect particle hits, and output hit parameter together with a precise absolute time-stamp. Several layers of feature extraction and event selection will reduce the primary data flow of about 1 TByte/sec to a level of 1 GByte/sec. This new architecture avoids many limitations of conventional DAQ/Trigger systems and is for example essential for open charm detection, which requires the reconstruction of displaced vertices, in a high-rate heavy ion environment

  17. Interaction of bale size and preservative rate for large-round bales of alfalfa hay

    Science.gov (United States)

    Recently, two studies conducted at the US Dairy Forage Research Center have reported inconsistent storage responses following the application of propionic-acid-based preservatives to alfalfa or alfalfa-orchardgrass hays. One of these studies utilized 5-foot-diameter round bales, and produced disappo...

  18. ADVANTAGES AND DISADVANTAGES OF STRAW-BALE BUILDING

    Directory of Open Access Journals (Sweden)

    Larisa Brojan

    2014-06-01

    Full Text Available This paper is focused on general properties of straw bale as a building material which has been proven by buildings throughout the world to be an appropriate material choice. Still, there are many hesitations about using this alternative building material. The building techniques are relatively easy to learn and the performance of straw bale structures has a high value in terms of several aspects as long as general requirements are followed. The primary benefit of straw bale as a building material is its low embodied energy. It also has high thermal and sound insulation properties. Many previous research studies on straw bale building have been focused on structural stability, fire resistance and assessing moisture content in straw bales which is one of the major issues. Therefore, special attention needs to be devoted to details to insure proper building safety. Render selection is especially crucial and an extremely important step in straw bale building, not only in matters concerning moisture but also structural capacity and fire protection. A major disadvantage of straw bale construction is its lack of material research. The paper is divided into three parts in which advantages and disadvantages of such a building are discussed. In the third part, results are presented for a survey in which correspondents emphasized the advantages and disadvantages of living in a straw bale building.

  19. Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging.

    Science.gov (United States)

    Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F Levent

    2014-02-01

    Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of capacitive micromachined ultrasonic transducer (CMUT) arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-μm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-μm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single- chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex vivo chicken heart sample. The measured axial and lateral point resolutions are 92 μm and 251 μm, respectively. We successfully acquired volumetric imaging data from the ex vivo chicken heart at 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce realtime volumetric images with image quality and speed suitable for catheter-based clinical applications.

  20. Characteristics and Classification of Solid Radioactive Waste From the Front-End of the Uranium Fuel Cycle.

    Science.gov (United States)

    Liu, Xinhua; Wei, Fangxin; Xu, Chunyan; Liao, Yunxuan; Jiang, Jing

    2015-09-01

    The proper classification of radioactive waste is the basis upon which to define its disposal method. In view of differences between waste containing artificial radionuclides and waste with naturally occurring radionuclides, the scientific definition of the properties of waste arising from the front end of the uranium fuel cycle (UF Waste) is the key to dispose of such waste. This paper is intended to introduce briefly the policy and practice to dispose of such waste in China and some foreign countries, explore how to solve the dilemma facing such waste, analyze in detail the compositions and properties of such waste, and finally put forward a new concept of classifying such waste as waste with naturally occurring radionuclides.

  1. A wide dynamic range BF3 neutron monitor with front-end electronics based on a logarithmic amplifier

    International Nuclear Information System (INIS)

    Ferrarini, M.; Varoli, V.; Favalli, A.; Caresana, M.; Pedersen, B.

    2010-01-01

    This paper describes a wide dynamic range neutron monitor based on a BF 3 neutron detector. The detector is used in current mode, and front-end electronics based on a logarithmic amplifier are used in order to have a measurement capability ranging over many orders of magnitude. The system has been calibrated at the Polytechnic of Milan, CESNEF, with an AmBe neutron source, and has been tested in a pulsed field at the PUNITA facility at JRC, Ispra. The detector has achieved a dynamic range of over 6 orders of magnitude, being able to measure single neutron pulses and showing saturation-free response for a reaction rate up to 10 6 s -1 . It has also proved effective in measuring the PUNITA facility pulse integral fluence.

  2. Inter-firm collaboration in the Fuzzy Front-End of the innovation process - Exploring New Forms of Collaboration

    DEFF Research Database (Denmark)

    Jørgensen, Jacob Høj; Goduscheit, René Chester; Bergenholz, Carsten

    2007-01-01

    , marketing, sales. The focus of this paper is on collaboration where innovation is the main part of the collaborative effort. Innovation refers to the research and development (R&D) activity devoted to increasing scientific or technical knowledge and the application of that knowledge to the creation of new...... and tendencies in formal R&D partnering relations. This paper, however, focuses on collaboration between independent companies prior to such formal agreements as joint ventures or other contractual agreements. This first phase of the innovation process is often referred to as the Fuzzy Front-End (FFE....... In this article we examine the characteristics of the FFE phase and explore this phase in an inter-firm perspective. Through an in-depth case-study of a single firm and its innovation partners we identify parameters for improved collaboration in the FFE. In conclusion we outline a model for inter...

  3. Linear Modeling of the Three-Phase Diode Front-Ends with Reduced Capacitance Considering the Continuous Conduction Mode

    DEFF Research Database (Denmark)

    Máthé, Lászlo; Yang, Feng; Wang, Dong

    2016-01-01

    for the entire drive systems have to be designed. A linearization and simplification to single phase model can be performed; however, when inductance is present at the grid side its performance is not satisfactory. The problem is mainly caused by neglecting the continuous conduction mode of the rectifier......Reducing the DC-link capacitance considerably is a new trend in many applications, such as: motor drives, electrolysers etc.. A straight forward method for modelling the diode front-end is to build a non-linear diode based model. This non-linear model gives difficulties when the controllers...... in the simplified model. This article proposes a simplified linear model where the continuous conduction mode is also considered. The DC-link voltage and current waveforms obtained through the proposed simplified model matches very well the waveforms obtained with the three phase diode based model and also...

  4. The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators control system

    CERN Document Server

    Van den Eynden, M

    1995-01-01

    The CERN SPS and LEP PowerPC project is aimed at introducing a new generation of PowerPC VMEbus processor modules running the LynxOS real-time operating system. This new generation of front end computers using the state-of-the-art microprocessor technology will first replace the obsolete Xenix PC based systems (about 140 installations) successfully used since 1988 to control the LEP accelerator. The major issues addressed in the scope of this large scale project are the technical specification for the new PowerPC technology, the re-engineering aspects, the interfaces with other CERN wide projects, and the set up of a development environment. This project offers also support for other major SPS and LEP projects interested in the PowerPC microprocessor technology.

  5. The new generation of PowerPC VMEbus front end computers for the CERN SPS and LEP accelerators system

    CERN Document Server

    Charrue, P; Ghinet, F; Ribeiro, P

    1995-01-01

    The CERN SPS and LEP PowerPC project is aimed at introducing a new generation of PowerPC VMEbus processor modules running the LynxOS real-time operating system. This new generation of front end computers using the state-of-the-art microprocessor technology will first replace the obsolete XENIX PC based systems (about 140 installations) successfully used since 1988 to control the LEP accelerator. The major issues addressed in the scope of this large scale project are the technical specification for the new PowerPC technology, the re-engineering aspects, the interfaces with other CERN wide projects, and the set up of a development environment. This project offers also support for other major SPS and LEP projects interested in the PowerPC microprocessor technology.

  6. Hardware Architecture of Polyphase Filter Banks Performing Embedded Resampling for Software-Defined Radio Front-Ends

    DEFF Research Database (Denmark)

    Awan, Mehmood-Ur-Rehman; Le Moullec, Yannick; Koch, Peter

    2012-01-01

    , and power optimization for field programmable gate array (FPGA) based architectures in an M -path polyphase filter bank with modified N -path polyphase filter. Such systems allow resampling by arbitrary ratios while simultaneously performing baseband aliasing from center frequencies at Nyquist zones......In this paper, we describe resource-efficient hardware architectures for software-defined radio (SDR) front-ends. These architectures are made efficient by using a polyphase channelizer that performs arbitrary sample rate changes, frequency selection, and bandwidth control. We discuss area, time...... that are not multiples of the output sample rate. A non-maximally decimated polyphase filter bank, where the number of data loads is not equal to the number of M subfilters, processes M subfilters in a time period that is either less than or greater than the M data-load’s time period. We present a load...

  7. JACoW Design of the front-end detector control system of the ATLAS New Small Wheels

    CERN Document Server

    Moschovakos, Paris

    2018-01-01

    The ATLAS experiment will be upgraded during the next LHC Long Shutdown (LS2). The flagship upgrade is the New Small Wheel (NSW) [1], which consists of 2 disks of Muon Gas detectors. The detector technologies used are Micromegas (MM) and sTGC, providing a total of 16 layers of tracking and trigger. The Slow Control Adapter (SCA) is part of the Gigabit Transceiver (GBT) - “Radiation Hard Optical Link Project” family of chips designed at CERN, EP-ESE department [2,3], which will be used at the NSW upgrade. The SCA offers several interfaces to read analogue and digital inputs, and configure front-end Readout ASICs, FPGAs, or other chips. The design of the NSW Detector Control System (DCS) takes advantage of this functionality, as described in this paper.

  8. A wide dynamic range BF{sub 3} neutron monitor with front-end electronics based on a logarithmic amplifier

    Energy Technology Data Exchange (ETDEWEB)

    Ferrarini, M., E-mail: michele.ferrarini@polimi.i [Politecnico di Milano, Dipartimento Energia, via G. Ponzio 34/3, I-20133 Milano (Italy); Fondazione CNAO, via Caminadella 16, 20123 Milano (Italy); Varoli, V. [Politecnico di Milano, Dipartimento Energia, via G. Ponzio 34/3, I-20133 Milano (Italy); Favalli, A. [European Commission, Joint Research Centre, Institute for the Protection and Security of Citizen, TP 800, Via E. Fermi, 21027 Ispra (Vatican City State, Holy See) (Italy); Caresana, M. [Politecnico di Milano, Dipartimento Energia, via G. Ponzio 34/3, I-20133 Milano (Italy); Pedersen, B. [European Commission, Joint Research Centre, Institute for the Protection and Security of Citizen, TP 800, Via E. Fermi, 21027 Ispra (Italy)

    2010-02-01

    This paper describes a wide dynamic range neutron monitor based on a BF{sub 3} neutron detector. The detector is used in current mode, and front-end electronics based on a logarithmic amplifier are used in order to have a measurement capability ranging over many orders of magnitude. The system has been calibrated at the Polytechnic of Milan, CESNEF, with an AmBe neutron source, and has been tested in a pulsed field at the PUNITA facility at JRC, Ispra. The detector has achieved a dynamic range of over 6 orders of magnitude, being able to measure single neutron pulses and showing saturation-free response for a reaction rate up to 10{sup 6} s{sup -1}. It has also proved effective in measuring the PUNITA facility pulse integral fluence.

  9. A custom front-end ASIC for the readout and timing of 64 SiPM photosensors

    International Nuclear Information System (INIS)

    Bagliesi, M.G.; Avanzini, C.; Bigongiari, G.; Cecchi, R.; Kim, M.Y.; Maestro, P.; Marrocchesi, P.S.; Morsani, F.

    2011-01-01

    A new class of instruments - based on Silicon PhotoMultiplier (SiPM) photosensors - are currently under development for the next generation of Astroparticle Physics experiments in future space missions. A custom front-end ASIC (Application Specific Integrated Circuit) for the readout of 64 SiPM sensors was specified in collaboration with GM-IDEAS (Norway) that designed and manufactured the ASIC. Our group developed a custom readout board equipped with a 16 bit ADC for the digitization of both pulse height and time information. A time stamp, generated by the ASIC in correspondence of the threshold crossing time, is digitized and recorded for each channel. This allows to define a narrow time window around the physics event that reduces significantly the background due to the SiPM dark count rate. In this paper, we report on the preliminary test results obtained with the readout board prototype.

  10. Pseudo-differential CMOS analog front-end circuit for wide-bandwidth optical probe current sensor

    Science.gov (United States)

    Uekura, Takaharu; Oyanagi, Kousuke; Sonehara, Makoto; Sato, Toshiro; Miyaji, Kousuke

    2018-04-01

    In this paper, we present a pseudo-differential analog front-end (AFE) circuit for a novel optical probe current sensor (OPCS) aimed for high-frequency power electronics. It employs a regulated cascode transimpedance amplifier (RGC-TIA) to achieve a high gain and a large bandwidth without using an extremely high performance operational amplifier. The AFE circuit is designed in a 0.18 µm standard CMOS technology achieving a high transimpedance gain of 120 dB Ω and high cut off frequency of 16 MHz. The measured slew rate is 70 V/µs and the input referred current noise is 1.02 pA/\\sqrt{\\text{Hz}} . The magnetic resolution and bandwidth of OPCS are estimated to be 1.29 mTrms and 16 MHz, respectively; the bandwidth is higher than that of the reported Hall effect current sensor.

  11. A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection.

    Science.gov (United States)

    Wong, A K Y; Kong-Pang Pun; Yuan-Ting Zhang; Ka Nang Leung

    2008-12-01

    A micro-power CMOS front-end, consisting of a transimpedance amplifier (TIA) and an ultralow cutoff frequency lowpass filter for the acquisition of photoplethysmographic signal (PPG) is presented. Robust DC photocurrent rejection for the pulsed signal source is achieved through a sample-and-hold stage in the feed-forward signal path and an error amplifier in the feedback path. Ultra-low cutoff frequency of the filter is achieved with a proposed technique that incorporates a pair of current-steering transistors that increases the effective filter capacitance. The design was realized in a 0.35-mum CMOS technology. It consumes 600 muW at 2.5 V, rejects DC photocurrent ranged from 100 nA to 53.6 muA, and achieves lower-band and upper-band - 3-dB cutoff frequencies of 0.46 and 2.8 Hz, respectively.

  12. The digital ASIC for the digital front end electronics of the SPI astrophysics gamma-ray experiment

    International Nuclear Information System (INIS)

    Lafond, E.; Mur, M.; Schanne, S.

    1998-01-01

    The SPI spectrometer is one of the gamma-ray astronomy instruments that will be installed on the ESA INTEGRAL satellite, intended to be launched in 2001 by the European Space Agency. The Digital Front-End Electronics sub-system (DFEE) is in charge of the real time data processing of the various measurements produced by the Germanium (Ge) detectors and the Bismuth Germanate (BGO) anti-coincidence shield. The central processing unit of the DFEE is implemented in a digital ASIC circuit, which provides the real time association of the various time signals, acquires the associated energy measurements, and classifies the various types of physics events. The paper gives the system constraints of the DFEE, the architecture of the ASIC circuit, the technology requirements, and the strategy for test and integration. Emphasis is given to the high level language development and simulation, the automatic circuit synthesis approach, and the performance estimation

  13. WNA's worldwide overview on front-end nuclear fuel cycle growth and health, safety and environmental issues.

    Science.gov (United States)

    Saint-Pierre, Sylvain; Kidd, Steve

    2011-01-01

    This paper presents the WNA's worldwide nuclear industry overview on the anticipated growth of the front-end nuclear fuel cycle from uranium mining to conversion and enrichment, and on the related key health, safety, and environmental (HSE) issues and challenges. It also puts an emphasis on uranium mining in new producing countries with insufficiently developed regulatory regimes that pose greater HSE concerns. It introduces the new WNA policy on uranium mining: Sustaining Global Best Practices in Uranium Mining and Processing-Principles for Managing Radiation, Health and Safety and the Environment, which is an outgrowth of an International Atomic Energy Agency (IAEA) cooperation project that closely involved industry and governmental experts in uranium mining from around the world. Copyright © 2010 Health Physics Society

  14. The front-end analog and digital signal processing electronics for the drift chambers of the Stanford Large Detector

    International Nuclear Information System (INIS)

    Haller, G.M.; Freytag, D.R.; Fox, J.; Olsen, J.; Paffrath, L.; Yim, A.; Honma, A.

    1990-10-01

    The front-end signal processing electronics for the drift-chambers of the Stanford Large Detector (SLD) at the Stanford Linear Collider is described. The system is implemented with printed-circuit boards which are shaped for direct mounting on the detector. Typically, a motherboard comprises 64 channels of transimpedance amplification and analog waveform sampling, A/D conversion, and associated control and readout circuitry. The loaded motherboard thus forms a processor which records low-level wave forms from 64 detector channels and transforms the information into a 64 k-byte serial data stream. In addition, the package performs calibration functions, measures leakage currents on the wires, and generates wire hit patterns for triggering purposes. The construction and operation of the electronic circuits utilizing monolithic, hybridized, and programmable components are discussed

  15. Design and construction of the front-end electronics data acquisition for the SLD CRID [Cherenkov Ring Imaging Detector

    International Nuclear Information System (INIS)

    Hoeflich, J.; McShurley, D.; Marshall, D.; Oxoby, G.; Shapiro, S.; Stiles, P.; Spencer, E.

    1990-10-01

    We describe the front-end electronics for the Cherenkov Ring Imaging Detector (CRID) of the SLD at the Stanford Linear Accelerator Center. The design philosophy and implementation are discussed with emphasis on the low-noise hybrid amplifiers, signal processing and data acquisition electronics. The system receives signals from a highly efficient single-photo electron detector. These signals are shaped and amplified before being stored in an analog memory and processed by a digitizing system. The data from several ADCs are multiplexed and transmitted via fiber optics to the SLD FASTBUS system. We highlight the technologies used, as well as the space, power dissipation, and environmental constraints imposed on the system. 16 refs., 10 figs

  16. An automated meta-monitoring mobile application and front-end interface for the ATLAS computing model

    Energy Technology Data Exchange (ETDEWEB)

    Kawamura, Gen; Quadt, Arnulf [II. Physikalisches Institut, Georg-August-Universitaet Goettingen (Germany)

    2016-07-01

    Efficient administration of computing centres requires advanced tools for the monitoring and front-end interface of the infrastructure. Providing the large-scale distributed systems as a global grid infrastructure, like the Worldwide LHC Computing Grid (WLCG) and ATLAS computing, is offering many existing web pages and information sources indicating the status of the services, systems and user jobs at grid sites. A meta-monitoring mobile application which automatically collects the information could give every administrator a sophisticated and flexible interface of the infrastructure. We describe such a solution; the MadFace mobile application developed at Goettingen. It is a HappyFace compatible mobile application which has a user-friendly interface. It also becomes very feasible to automatically investigate the status and problem from different sources and provides access of the administration roles for non-experts.

  17. The OPERA RPCs front end electronics; a novel application of LVDS line receiver as low cost discriminator

    International Nuclear Information System (INIS)

    Balsamo, E; Bergnoli, A; Bertolin, A; Brugnera, R; Carrara, E; Ciesielski, R; Dal Corso, F; Dusini, S; Garfagnini, A; Kose, U; Longhin, A; Medinaceli, E; Stanco, L

    2012-01-01

    The OPERA spectrometer is built from two large dipoles instrumented with around 1000 Resistive Plate Chambers (RPCs), covering a surface of about 3350 m 2 , and digitally read out by means of almost 27000 strips. The huge number of channels, the inaccessibility of many parts of the detector and the wide uncertainty about the signal amplitude pushed to study a low cost, high sensitivity discriminator, and a very carefully designed layout for the read out system. Here we will present a novel application of LVDS line receiver as discriminator, showing that it exceeds the requirements of a large RPC based detector and offers the intrinsic advantages of a mature technology in terms of costs, reliability and integration scale. We will also present the layout of the read out system showing as the sensitivity and the noise immunity were preserved in a system where the front end electronics is far away from the detector.

  18. A reconfigurable medically cohesive biomedical front-end with ΣΔ ADC in 0.18µm CMOS.

    Science.gov (United States)

    Jha, Pankaj; Patra, Pravanjan; Naik, Jairaj; Acharya, Amit; Rajalakshmi, P; Singh, Shiv Govind; Dutta, Ashudeb

    2015-08-01

    This paper presents a generic programmable analog front-end (AFE) for acquisition and digitization of various biopotential signals. This includes a lead-off detection circuit, an ultra-low current capacitively coupled signal conditioning stage with programmable gain and bandwidth, a new mixed signal automatic gain control (AGC) mechanism and a medically cohesive reconfigurable ΣΔ ADC. The full system is designed in UMC 0.18μm CMOS. The AFE achieves an overall linearity of more 10 bits with 0.47μW power consumption. The ADC provides 2(nd) order noise-shaping while using single integrator and an ENOB of ~11 bits with 5μW power consumption. The system was successfully verified for various ECG signals from PTB database. This system is intended for portable batteryless u-Healthcare devices.

  19. Explosive bonding and its application in the Advanced Photon Source front-end and beamline components design

    International Nuclear Information System (INIS)

    Shu, D.; Li, Y.; Ryding, D.; Kuzay, T.M.

    1994-01-01

    Explosive bonding is a bonding method in which the controlled energy of a detonating explosive is used to create a metallurgical bonding between two or more similar or dissimilar materials. Since 1991, a number of explosive-bonding joints have been designed for high-thermal-load ultrahigh-vacuum (UHV) compatible components in the Advanced Photon Source. A series of standardized explosive bonded joint units has also been designed and tested, such as: oxygen-free copper (OFHC) to stainless-steel vacuum joints for slits and shutters, GlidCop to stainless-steel vacuum joints for fixed masks, and GlidCop to OFHC thermal and mechanical joints for shutter face-plates, etc. The design and test results for the explosive bonding units to be used in the Advanced Photon Source front ends and beamlines will be discussed in this paper

  20. SENSROC4: An Multichannel Low-Noise Front-End Readout ASIC Dedicated to CZT Detectors for PET Imaging

    International Nuclear Information System (INIS)

    Gao, W.; Liu, H.; Gao, D.; Gan, B.; Wei, T.; Hu, Y.

    2013-06-01

    In this paper, we present the design of a novel low-noise front-end readout application-specific integrated circuit (ASIC) for our small animal PET systems which objective is to achieve the following performances, the spatial resolution of 1 mm 3 , the detection efficiency of 15 % and the time resolution of 1 ns. A cascade amplifier based on the PMOS input transistor is selected to realize the charge-sensitive amplifier (CSA) for the sake of good noise performances. The output of the CSA is split into two branches. One is connected to a slow shaper for energy measurements. The other is connected to a fast shaper for time acquisition. A novel monostable circuit is designed to adjust the time delay of the trigger signals so that the peak value of the shaped voltages can be sampled and stored. Based on the above techniques, an eight-channel front-end readout prototype chip is designed and implemented in 0.35 μm CMOS process. The die size is 2.286 mm x 2.282 mm. The input range of the ASIC is from 2000 e- to 180000 e-, reflecting to the energy of the gamma ray from 11.2 keV to 1 MeV. The gain of the readout channel is 65 V/pC. The best test result of ENC is 86.5 e- at zero farad plus 9.3 e- per pico-farad. The nonlinearity is less than 3 %. The crosstalk is less than 2 %. The power dissipation is about 9 mW/channel (authors)

  1. Channel Analysis for a 6.4 Gb s-1 DDR5 Data Buffer Receiver Front-End

    Science.gov (United States)

    Lehmann, Stefanie; Gerfers, Friedel

    2017-09-01

    In this contribution, the channel characteristic of the next generation DDR5-SDRAM architecture and possible approaches to overcome channel impairments are analysed. Because modern enterprise server applications and networks demand higher memory bandwidth, throughput and capacity, the DDR5-SDRAM specification is currently under development as a follow-up of DDR4-SDRAM technology. In this specification, the data rate is doubled to DDR5-6400 per IO as compared to the former DDR4-3200 architecture, resulting in a total per DIMM data rate of up to 409.6 Gb s-1. The single-ended multi-point-to-point CPU channel architecture in DDRX technology remains the same for DDR5 systems. At the specified target data rate, insertion loss, reflections, cross-talk as well as power supply noise become more severe and have to be considered. Using the data buffer receiver front-end of a load-reduced memory module, sophisticated equalisation techniques can be applied to ensure target BER at the increased data rate. In this work, the worst case CPU back-plane channel is analysed to derive requirements for receiver-side equalisation from the channel response characteristics. First, channel impairments such as inter-symbol-interference, reflections from the multi-point channel structure, and crosstalk from neighboring lines are analysed in detail. Based on these results, different correction methods for DDR5 data buffer front-ends are discussed. An architecture with 1-tap FFE in combination with a multi-tap DFE is proposed. Simulation of the architecture using a random input data stream is used to reveal the required DFE tap filter depth to effectively eliminate the dominant ISI and reflection based error components.

  2. Design of a low-power 433/915-MHz RF front-end with a current-reuse common-gate LNA

    International Nuclear Information System (INIS)

    Jing Yiou; Lu Huaxiang

    2013-01-01

    This paper presents a wideband RF front-end with novel current-reuse wide band low noise amplifier (LNA), current-reuse V—I converter, active double balanced mixer and transimpedance amplifier for short range device (SRD) applications. With the proposed current-reuse LNA, the DC consumption of the front-end reduces considerably while maintaining sufficient performance needed by SRD devices. The RF front-end was fabricated in 0.18 μm RFCMOS process and occupies a silicon area of just 0.11 mm 2 . Operating in 433 MHz band, the measurement results show the RF front-end achieves a conversion gain of 29.7 dB, a double side band noise figure of 9.7 dB, an input referenced third intercept point of −24.9 dBm with only 1.44 mA power consumption from 1.8 V supply. Compared to other reported front-ends, it has an advantage in power consumption. (semiconductor integrated circuits)

  3. Bale Location Effects on Nutritive Value and Fermentation Characteristics of Annual Ryegrass Bale Stored in In-line Wrapping Silage

    Directory of Open Access Journals (Sweden)

    K. J. Han

    2014-09-01

    Full Text Available In southeastern regions of the US, herbage systems are primarily based on grazing or hay feeding with low nutritive value warm-season perennial grasses. Nutritious herbage such as annual ryegrass (Lolium multiflorum Lam. may be more suitable for preserving as baleage for winter feeding even with more intensive production inputs. Emerging in-line wrapped baleage storage systems featuring rapid wrapping and low polyethylene film requirements need to be tested for consistency of storing nutritive value of a range of annual ryegrass herbage. A ryegrass storage trial was conducted with 24-h wilted ‘Marshall’ annual ryegrass harvested at booting, heading and anthesis stages using three replicated in-line wrapped tubes containing ten round bales per tube. After a six-month storage period, nutritive value changes and fermentation end products differed significantly by harvest stage but not by bale location. Although wilted annual ryegrass exhibited a restricted fermentation across harvest stages characterized by high pH and low fermentation end product concentrations, butyric acid concentrations were less than 1 g/kg dry matter, and lactic acid was the major organic acid in the bales. Mold coverage and bale aroma did not differ substantially with harvest stage or bale location. Booting and heading stage-harvested ryegrass baleage were superior in nutritive value to anthesis stage-harvested herbage. Based on the investigated nutritive value and fermentation characteristics, individual bale location within in-line tubes did not significantly affect preservation quality of ryegrass round bale silages.

  4. Assessing musculoskeletal disorders among municipal waste loaders of Mumbai, India.

    Science.gov (United States)

    Salve, Pradeep; Chokhandre, Praveen; Bansod, Dhananjay

    2017-10-06

    The study aims to assess the impact of municipal waste loading occupation upon developing musculoskeletal disorders (MSDs) and thereby disabilities among waste loaders. Additionally, the study has identified the potential risk factors raising MSDs and disabilities. A cross-sectional case-control design survey was conducted in 6 out of 24 municipal wards of Mumbai during March-September 2015. The study population consisted of municipal waste loaders (N = 180) and a control group (N = 180). The Standardized Modified Nordic questionnaire was adopted to measures the MSDs and thereby disabilities in the past 12 months. A Propensity Score Matching (PSM) method was applied to assess the impact of waste loading occupation on developing MSDs and disabilities. Waste loaders had a significantly higher risk of developing MSDs as well as disabilities than the control group particularly for low back, hip/ thigh upper back and shoulder. Propensity Score Matching results revealed that the MSDs were significantly higher among waste loaders for hip/thigh (22%), low back (19%), shoulder (18%), and upper back (15%) than matched control group. Likewise, MSDs-related disabilities were found to be significantly higher among waste loaders for low back (20%), hip/ thigh (18%) upper back (13%) and shoulder (8%) than the control group. Duration of work, substance use and mental health were found to be the potential psychosocial factors for developing the risk of MSDs and disabilities. The municipal waste loading occupation raised the risk of MSDs and related disabilities among waste loaders compared to the control group. The preventive and curative measures are strongly recommended to minimize the burden of MSDs and disabilities. Int J Occup Med Environ Health 2017;30(6):875-886. This work is available in Open Access model and licensed under a CC BY-NC 3.0 PL license.

  5. FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS upgrade framework

    CERN Document Server

    Schreuder, Frans Philip; The ATLAS collaboration

    2018-01-01

    Starting during the upcoming major LHC shutdown (2019-2021), the ATLAS experiment at CERN will move to the Front-End Link eXchange (FELIX) system as the interface between the data acquisition system and the trigger and detector front-end electronics. FELIX will function as a router between custom serial links and a commodity switch network, which will use industry standard technologies to communicate with data collection and processing components. This presentation will describe the FELIX system design as well as reporting on results of the ongoing development program.

  6. The new version of the LHCb SOL40-SCA core to drive front-end GBT-SCAs for the LHCb upgrade

    CERN Document Server

    Viana Barbosa, Joao Vitor; Gaspar, Clara

    2018-01-01

    The LHCb experiment is currently engaged in an upgrade effort that will implement a triggerless 40 MHz readout system. The upgraded Front-End Electronics profit from the GBT chipset functionalities and bidirectional optical fibers for readout, control and synchronization. This paper describes the new version of the firmware core that transmits slow control information from the Control System to thousands of Front-End chips and discusses the implementation that expedites and makes the operation more versatile. The detailed architecture, original interaction with the software control system and integration within the LHCb upgraded architecture are described.

  7. A Study of the Effect of the Front-End Styling of Sport Utility Vehicles on Pedestrian Head Injuries

    Directory of Open Access Journals (Sweden)

    Guanjun Zhang

    2018-01-01

    Full Text Available Background. The number of sport utility vehicles (SUVs on China market is continuously increasing. It is necessary to investigate the relationships between the front-end styling features of SUVs and head injuries at the styling design stage for improving the pedestrian protection performance and product development efficiency. Methods. Styling feature parameters were extracted from the SUV side contour line. And simplified finite element models were established based on the 78 SUV side contour lines. Pedestrian headform impact simulations were performed and validated. The head injury criterion of 15 ms (HIC15 at four wrap-around distances was obtained. A multiple linear regression analysis method was employed to describe the relationships between the styling feature parameters and the HIC15 at each impact point. Results. The relationship between the selected styling features and the HIC15 showed reasonable correlations, and the regression models and the selected independent variables showed statistical significance. Conclusions. The regression equations obtained by multiple linear regression can be used to assess the performance of SUV styling in protecting pedestrians’ heads and provide styling designers with technical guidance regarding their artistic creations.

  8. Design of a Modular Multilevel Converter as an Active Front-End for a magnet supply application

    CERN Document Server

    Panagiotis, Asimakopoulos; Massimo, Bongiorno

    2015-01-01

    The aim of this work is to describe the general design procedure of a Modular Multilevel Converter (MMC) applied as an Active Front-End (AFE) for a magnet supply for beam accelerators. The dimensioning criteria for the converter and the dc-link capacitance are presented and the grid transformer requirements are set. Considering the converter design, the arm inductance calculation is based on the specifications for the arm-current ripple and the DC-link fault tolerance, but, also, on the limitation of the second harmonic and the second-order LC resonance of the arm current. The module capacitance value is evaluated by focusing on the required switching dynamics and the capacitor-voltage ripple according to a newly proposed graphical method. The loading of each semiconductor in the half bridge is calculated via simulation, indicating the unsymmetrical current distribution. It is concluded that the current distribution for each semiconductor depends on the mode of operation of the converter. The different criter...

  9. A GEM-TPC prototype with low-Noise highly integrated front-end electronics for linear collider studies

    CERN Document Server

    Kappler, Steffen; Kaminski, Jochen; Ledermann, Bernhard; Müller, Thomas; Ronan, Michael T; Ropelewski, Leszek; Sauli, Fabio; Settles, Ronald

    2004-01-01

    Connected to the linear collider project, studies on the readout of time projection chambers (TPCs) based on the gas electron multiplier (GEM) are ongoing. Higher granularity and intrinsically suppressed ion feedback are the major advantages of this technology. After a short discussion of these issues, we present the design of a small and very flexible TPC prototype, whose cylindrical drift volume can be equipped with endcaps of different gas detector types. An endcap with multi-GEM readout is currently set up and successfully operated with a low-noise highly integrated front-end electronics. We discuss results of measurements with this system in high intensity particle beams at CERN, where 99.3 plus or minus 0.2% single-pad-row efficiency could be achieved at an effective gain of 2.5 multiplied by 10**3 only, and spatial resolutions down to 63 plus or minus 3 mum could be demonstrated. Finally, these results are extrapolated to the high magnetic field in a linear collider TPC. 5 Refs.

  10. A 24-GHz Front-End Integrated on a Multilayer Cellulose-Based Substrate for Doppler Radar Sensors

    Directory of Open Access Journals (Sweden)

    Federico Alimenti

    2017-09-01

    Full Text Available This paper presents a miniaturized Doppler radar that can be used as a motion sensor for low-cost Internet of things (IoT applications. For the first time, a radar front-end and its antenna are integrated on a multilayer cellulose-based substrate, built-up by alternating paper, glue and metal layers. The circuit exploits a distributed microstrip structure that is realized using a copper adhesive laminate, so as to obtain a low-loss conductor. The radar operates at 24 GHz and transmits 5 mW of power. The antenna has a gain of 7.4 dBi and features a half power beam-width of 48 degrees. The sensor, that is just the size of a stamp, is able to detect the movement of a walking person up to 10 m in distance, while a minimum speed of 50 mm/s up to 3 m is clearly measured. Beyond this specific result, the present paper demonstrates that the attractive features of cellulose, including ultra-low cost and eco-friendliness (i.e., recyclability and biodegradability, can even be exploited for the realization of future high-frequency hardware. This opens opens the door to the implementation on cellulose of devices and systems which make up the “sensing layer” at the base of the IoT ecosystem.

  11. Analog Circuit Design Low Voltage Low Power; Short Range Wireless Front-Ends; Power Management and DC-DC

    CERN Document Server

    Roermund, Arthur; Baschirotto, Andrea

    2012-01-01

    The book contains the contribution of 18 tutorials of the 20th workshop on Advances in Analog Circuit Design.  Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of Low-Voltage Low-Power Data Converters - Chaired by Prof. Anderea Baschirotto, University of Milan-Bicocca Short Range Wireless Front-Ends - Chaired by Prof. Arthur van Roermund, Eindhoven University of Technology Power management and DC-DC - Chaired by Prof. M. Steyaert, Katholieke University Leuven Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design.

  12. Exploring the mechanisms of vehicle front-end shape on pedestrian head injuries caused by ground impact.

    Science.gov (United States)

    Yin, Sha; Li, Jiani; Xu, Jun

    2017-09-01

    In pedestrian-vehicle accidents, pedestrians typically suffer from secondary impact with the ground after the primary contact with vehicles. However, information about the fundamental mechanism of pedestrian head injury from ground impact remains minimal, thereby hindering further improvement in pedestrian safety. This study addresses this issue by using multi-body modeling and computation to investigate the influence of vehicle front-end shape on pedestrian safety. Accordingly, a simulation matrix is constructed to vary bonnet leading-edge height, bonnet length, bonnet angle, and windshield angle. Subsequently, a set of 315 pedestrian-vehicle crash simulations are conducted using the multi-body simulation software MADYMO. Three vehicle velocities, i.e., 20, 30, and 40km/h, are set as the scenarios. Results show that the top governing factor is bonnet leading-edge height. The posture and head injury at the instant of head ground impact vary dramatically with increasing height because of the significant rise of the body bending point and the movement of the collision point. The bonnet angle is the second dominant factor that affects head-ground injury, followed by bonnet length and windshield angle. The results may elucidate one of the critical barriers to understanding head injury caused by ground impact and provide a solid theoretical guideline for considering pedestrian safety in vehicle design. Copyright © 2017 Elsevier Ltd. All rights reserved.

  13. An eight channel low-noise CMOS readout circuit for silicon detectors with on-chip front-end FET

    International Nuclear Information System (INIS)

    Fiorini, C.; Porro, M.

    2006-01-01

    We propose a CMOS readout circuit for the processing of signals from multi-channel silicon detectors to be used in X-ray spectroscopy and γ-ray imaging applications. The circuit is composed by eight channels, each one featuring a low-noise preamplifier, a 6th-order semigaussian shaping amplifier with four selectable peaking times, from 1.8 up to 6 μs, a peak stretcher and a discriminator. The circuit is conceived to be used with silicon detectors with a front-end FET integrated on the detector chips itself, like silicon drift detectors with JFET and pixel detectors with DEPMOS. The integrated time constants used for the shaping are implemented by means of an RC-cell, based on the technique of demagnification of the current flowing in a resistor R by means of the use of current mirrors. The eight analog channels of the chip are multiplexed to a single analog output. A suitable digital section provides self-resetting of each channel and trigger output and is able to set independent thresholds on the analog channels by means of a programmable serial register and 3-bit DACs. The circuit has been realized in the 0.35 μm CMOS AMS technology. In this work, the main features of the circuit are presented along with the experimental results of its characterization

  14. Performance analysis of a low power low noise tunable band pass filter for multiband RF front end

    International Nuclear Information System (INIS)

    Manjula, J.; Malarvizhi, S.

    2014-01-01

    This paper presents a low power tunable active inductor and RF band pass filter suitable for multiband RF front end circuits. The active inductor circuit uses the PMOS cascode structure as the negative transconductor of a gyrator to reduce the noise voltage. Also, this structure provides possible negative resistance to reduce the inductor loss with wide inductive bandwidth and high resonance frequency. The RF band pass filter is realized using the proposed active inductor with suitable input and output buffer stages. The tuning of the center frequency for multiband operation is achieved through the controllable current source. The designed active inductor and RF band pass filter are simulated in 180 nm and 45 nm CMOS process using the Synopsys HSPICE simulation tool and their performances are compared. The parameters, such as resonance frequency, tuning capability, noise and power dissipation, are analyzed for these CMOS technologies and discussed. The design of a third order band pass filter using an active inductor is also presented. (semiconductor integrated circuits)

  15. LHCb: Dynamically Adaptive Header Generator and Front-End Source Emulator for a 100 Gbps FPGA Based DAQ

    CERN Multimedia

    Srikanth, S

    2014-01-01

    The proposed upgrade for the LHCb experiment envisages a system of 500 Data sources each generating data at 100 Gbps, the acquisition and processing of which is a big challenge even for the current state of the art FPGAs. This requires an FPGA DAQ module that not only handles the data generated by the experiment but also is versatile enough to dynamically adapt to potential inadequacies of other components like the network and PCs. Such a module needs to maintain real time operation while at the same time maintaining system stability and overall data integrity. This also creates a need for a Front-end source Emulator capable of generating the various data patterns, that acts as a testbed to validate the functionality and performance of the Header Generator. The rest of the abstract briefly describes these modules and their implementation. The Header Generator is used to packetize the streaming data from the detectors before it is sent to the PCs for further processing. This is achieved by continuously scannin...

  16. Ammonia-water exchange front end process for ammonia-hydrogen heavy water plants (Preprint No. PD-1)

    International Nuclear Information System (INIS)

    Sadhukhan, H.K.; Varadarajan, T.G.; Nair, N.K.; Das, S.K.; Nath, G.K.

    1989-04-01

    The ammonia-hydrogen exchange process, which utilizes the deutrium exchange between liquid ammonia and gaseous hydrogen is a parasitic process and the heavy water plants (HWP) based on this process has to be linked with the fertilizer plant (FP) for its enormous requirements of hydrogen (synthesis gas, N 2 +3H 2 ). This dependence of HWP on FP gives rise to certain constraints which are listed. These deficiencies of the ammonia-hydrogen process can be overcome to a great extent by delinking the HWP from FP by incorporating NH 3 -H 2 O exchange as the front end step. In addition to the elimination of the above limitations, by employing water as the ultimate feed for the HWP, the plant capacity can be increased substantially and this would go a long way in achieving economies of the large capacity plants. A schematic diagram of this integrated plant is given. Some of the results of developmental efforts and feasibility studies of this NH 3 -H 2 O exchange are briefly reviewed. (author). 4 figs

  17. Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

    CERN Document Server

    de La Taille, C

    2008-01-01

    The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memor...

  18. Explosion bonding of dissimilar materials for fabricating APS front end components: Analysis of metallurgical and mechanical properties and UHV applications

    International Nuclear Information System (INIS)

    Li, Yuheng; Shu, Deming; Kuzay, T.M.

    1994-01-01

    The front end beamline section contains photon shutters and fixed masks. These components are made of OFHC copper and GlidCOP AL-15. Stainless steels (304 or 316) are also used for connecting photon shutters and fixed masks to other components that operate in the ultrahigh vacuum system. All these dissimilar materials need to be joined together. However, bonding these dissimilar materials is very difficult because of their different mechanical and thermal properties and incompatible metallurgical properties. Explosion bonding is a bonding method in which the controlled energy of a detonating explosive is used to create a metallurgical bond between two or more similar or dissimilar materials. No intermediate filler metal, for example, a brazing compound or soldering alloy, is needed to promote bonding, and no external heat need be applied. A study of the metallurgical and mechanical properties and YGV applications of GlidCop AL-15, OFHC copper, and 304 stainless steel explosion-bonded joints has been done. This report contains five parts: an ultrasonic examination of explosion-bonded joints and a standard setup; mechanical-property and thermal-cycle tests of GlidCop AL-15/304 stainless steel explosion-bonded joints; leak tests of a GlidCop AL-15/304 stainless steel explosion-bonded interfaces for UHV application; metallurgical examination of explosion-bonded interfaces and failure analysis, and discussion and conclusion

  19. Neutron-induced Single Event Upset on the RPC front-end chips for the CMS experiment

    Energy Technology Data Exchange (ETDEWEB)

    Abbrescia, M.; Colaleo, A.; Iaselli, G.; Loddo, F.; Maggi, M.; Marangelli, B.; Natali, S.; Nuzzo, S.; Pugliese, G.; Ranieri, A.; Romano, F.; Altieri, S.; Belli, G.; Bruno, G.; Guida, R.; Merlo, M.; Ratti, S.P.; Riccardi, C.; Torre, P.; Vitulo, P. E-mail: paolo.vitulo@pv.infn.it; De Bari, A.; Manera, S

    2002-05-21

    Neutrons from a reactor and from a cyclotron have been used to characterise the CMS Resistive Plate Chambers (RPCs) front-end chip to neutron-induced damaging events. Single Event Upset (SEU) cross-sections have been measured up to 60 MeV for different chip thresholds. Tests at a reactor were done with an integrated fast (E{sub n}>3 MeV) neutron fluence of 1.7x10{sup 10} cm{sup -2} and a thermal neutron fluence of 9.5x10{sup 11} cm{sup -2}. High-energy neutrons from a cyclotron were used up to a fluence of 10{sup 12} cm{sup -2}. Data indicate the existence of a chip SEU sensitivity already at thermal energy and a saturated SEU cross-section from 3 to 60 MeV. Values of the SEU cross-sections from the thermal run well agree with those obtained by another CMS group that uses the same technology (0.8 {mu}m BiCMOS) though with different architecture. Cross-sections obtained with fast neutrons (from 3 MeV to about 10 MeV) are consistently higher by one order of magnitude compared to the thermal one. The average time between consecutive SEU events in each chip of the CMS barrel RPCs can be estimated to be 1 h.

  20. CMOS integrated avalanche photodiodes and frequency-mixing optical sensor front end for portable NIR spectroscopy instruments.

    Science.gov (United States)

    Yun, Ruida; Sthalekar, Chirag; Joyner, Valencia M

    2011-01-01

    This paper presents the design and measurement results of two avalanche photodiode structures (APDs) and a novel frequency-mixing transimpedance amplifier (TIA), which are key building blocks towards a monolithically integrated optical sensor front end for near-infrared (NIR) spectroscopy applications. Two different APD structures are fabricated in an unmodified 0.18 \\im CMOS process, one with a shallow trench isolation (STI) guard ring and the other with a P-well guard ring. The APDs are characterized in linear mode. The STI bounded APD demonstrates better performance and exhibits 3.78 A/W responsivity at a wavelength of 690 nm and bias voltage of 10.55 V. The frequency-mixing TIA (FM-TIA) employs a T-feedback network incorporating gate-controlled transistors for resistance modulation, enabling the simultaneous down-conversion and amplification of the high frequency modulated photodiode (PD) current. The TIA achieves 92 dS Ω conversion gain with 0.5 V modulating voltage. The measured IIP(3) is 10.6/M. The amplifier together with the 50 Ω output buffer draws 23 mA from a1.8 V power supply.