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Sample records for digital logic gate

  1. Digital logic circuit test

    Energy Technology Data Exchange (ETDEWEB)

    Yun, Gil Jung; Yang, Hong Young

    2011-03-15

    This book is about digital logic circuit test, which lists the digital basic theory, basic gate like and, or And Not gate, NAND/NOR gate such as NAND gate, NOR gate, AND and OR, logic function, EX-OR gate, adder and subtractor, decoder and encoder, multiplexer, demultiplexer, flip-flop, counter such as up/down counter modulus N counter and Reset type counter, shift register, D/A and A/D converter and two supplements list of using components and TTL manual and CMOS manual.

  2. Amplifying genetic logic gates.

    Science.gov (United States)

    Bonnet, Jerome; Yin, Peter; Ortiz, Monica E; Subsoontorn, Pakpoom; Endy, Drew

    2013-05-03

    Organisms must process information encoded via developmental and environmental signals to survive and reproduce. Researchers have also engineered synthetic genetic logic to realize simpler, independent control of biological processes. We developed a three-terminal device architecture, termed the transcriptor, that uses bacteriophage serine integrases to control the flow of RNA polymerase along DNA. Integrase-mediated inversion or deletion of DNA encoding transcription terminators or a promoter modulates transcription rates. We realized permanent amplifying AND, NAND, OR, XOR, NOR, and XNOR gates actuated across common control signal ranges and sequential logic supporting autonomous cell-cell communication of DNA encoding distinct logic-gate states. The single-layer digital logic architecture developed here enables engineering of amplifying logic gates to control transcription rates within and across diverse organisms.

  3. Digital systems from logic gates to processors

    CERN Document Server

    Deschamps, Jean-Pierre; Terés, Lluís

    2017-01-01

    This textbook for a one-semester course in Digital Systems Design describes the basic methods used to develop “traditional” Digital Systems, based on the use of logic gates and flip flops, as well as more advanced techniques that enable the design of very large circuits, based on Hardware Description Languages and Synthesis tools. It was originally designed to accompany a MOOC (Massive Open Online Course) created at the Autonomous University of Barcelona (UAB), currently available on the Coursera platform. Readers will learn what a digital system is and how it can be developed, preparing them for steps toward other technical disciplines, such as Computer Architecture, Robotics, Bionics, Avionics and others. In particular, students will learn to design digital systems of medium complexity, describe digital systems using high level hardware description languages, and understand the operation of computers at their most basic level. All concepts introduced are reinforced by plentiful illustrations, examples, ...

  4. Hydraulic logic gates: building a digital water computer

    Science.gov (United States)

    Taberlet, Nicolas; Marsal, Quentin; Ferrand, Jérémy; Plihon, Nicolas

    2018-03-01

    In this article, we propose an easy-to-build hydraulic machine which serves as a digital binary computer. We first explain how an elementary adder can be built from test tubes and pipes (a cup filled with water representing a 1, and empty cup a 0). Using a siphon and a slow drain, the proposed setup combines AND and XOR logical gates in a single device which can add two binary digits. We then show how these elementary units can be combined to construct a full 4-bit adder. The sequencing of the computation is discussed and a water clock can be incorporated so that the machine can run without any exterior intervention.

  5. Optical three-step binary-logic-gate-based MSD arithmetic

    Science.gov (United States)

    Fyath, R. S.; Alsaffar, A. A. W.; Alam, M. S.

    2003-11-01

    A three-step modified signed-digit (MSD) adder is proposed which can be optically implmented using binary logic gates. The proposed scheme depends on encoding each MSD digits into a pair of binary digits using a two-state and multi-position based encoding scheme. The design algorithm depends on constructing the addition truth table of binary-coded MSD numbers and then using Karnaugh map to achieve output minimization. The functions associated with the optical binary logic gates are achieved by simply programming the decoding masks of an optical shadow-casting logic system.

  6. Rapidly reconfigurable all-optical universal logic gate

    Science.gov (United States)

    Goddard, Lynford L.; Bond, Tiziana C.; Kallman, Jeffrey S.

    2010-09-07

    A new reconfigurable cascadable all-optical on-chip device is presented. The gate operates by combining the Vernier effect with a novel effect, the gain-index lever, to help shift the dominant lasing mode from a mode where the laser light is output at one facet to a mode where it is output at the other facet. Since the laser remains above threshold, the speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal optical modulation speed of the laser, which can be on the order of up to about tens of GHz. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog optical or electrical signal at the gate selection port. Other all-optical functionality includes wavelength conversion, signal duplication, threshold switching, analog to digital conversion, digital to analog conversion, signal routing, and environment sensing. Since each gate can perform different operations, the functionality of such a cascaded circuit grows exponentially.

  7. Area efficient digital logic NOT gate using single electron box (SEB

    Directory of Open Access Journals (Sweden)

    Bahrepour Davoud

    2017-01-01

    Full Text Available The continuing scaling down of complementary metal oxide semiconductor (CMOS has led researchers to build new devices with nano dimensions, whose behavior will be interpreted based on quantum mechanics. Single-electron devices (SEDs are promising candidates for future VLSI applications, due to their ultra small dimensions and lower power consumption. In most SED based digital logic designs, a single gate is introduced and its performance discussed. While in the SED based circuits the fan out of designed gate circuit should be considered and measured. In the other words, cascaded SED based designs must work properly so that the next stage(s should be driven by the previous stage. In this paper, previously NOT gate based on single electron box (SEB which is an important structure in SED technology, is reviewed in order to obtain correct operation in series connections. The correct operation of the NOT gate is investigated in a buffer circuit which uses two connected NOT gate in series. Then, for achieving better performance the designed buffer circuit is improved by the use of scaling process.

  8. Silicon Carbide Junction Field Effect Transistor Digital Logic Gates Demonstrated at 600 deg. C

    Science.gov (United States)

    Neudeck, Philip G.

    1998-01-01

    The High Temperature Integrated Electronics and Sensors (HTIES) Program at the NASA Lewis Research Center is currently developing silicon carbide (SiC) for use in harsh conditions where silicon, the semiconductor used in nearly all of today's electronics, cannot function. The HTIES team recently fabricated and demonstrated the first semiconductor digital logic gates ever to function at 600 C.

  9. Multi-valued logic gates based on ballistic transport in quantum point contacts.

    Science.gov (United States)

    Seo, M; Hong, C; Lee, S-Y; Choi, H K; Kim, N; Chung, Y; Umansky, V; Mahalu, D

    2014-01-22

    Multi-valued logic gates, which can handle quaternary numbers as inputs, are developed by exploiting the ballistic transport properties of quantum point contacts in series. The principle of a logic gate that finds the minimum of two quaternary number inputs is demonstrated. The device is scalable to allow multiple inputs, which makes it possible to find the minimum of multiple inputs in a single gate operation. Also, the principle of a half-adder for quaternary number inputs is demonstrated. First, an adder that adds up two quaternary numbers and outputs the sum of inputs is demonstrated. Second, a device to express the sum of the adder into two quaternary digits [Carry (first digit) and Sum (second digit)] is demonstrated. All the logic gates presented in this paper can in principle be extended to allow decimal number inputs with high quality QPCs.

  10. Multi-Valued Logic Gates based on Ballistic Transport in Quantum Point Contacts

    Science.gov (United States)

    Seo, M.; Hong, C.; Lee, S.-Y.; Choi, H. K.; Kim, N.; Chung, Y.; Umansky, V.; Mahalu, D.

    2014-01-01

    Multi-valued logic gates, which can handle quaternary numbers as inputs, are developed by exploiting the ballistic transport properties of quantum point contacts in series. The principle of a logic gate that finds the minimum of two quaternary number inputs is demonstrated. The device is scalable to allow multiple inputs, which makes it possible to find the minimum of multiple inputs in a single gate operation. Also, the principle of a half-adder for quaternary number inputs is demonstrated. First, an adder that adds up two quaternary numbers and outputs the sum of inputs is demonstrated. Second, a device to express the sum of the adder into two quaternary digits [Carry (first digit) and Sum (second digit)] is demonstrated. All the logic gates presented in this paper can in principle be extended to allow decimal number inputs with high quality QPCs.

  11. Reversible logic gates on Physarum Polycephalum

    International Nuclear Information System (INIS)

    Schumann, Andrew

    2015-01-01

    In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum

  12. Six-Correction Logic (SCL Gates in Quantum-dot Cellular Automata (QCA

    Directory of Open Access Journals (Sweden)

    Md. Anisur Rahman

    2015-11-01

    Full Text Available Quantum Dot Cellular Automata (QCA is a promising nanotechnology in Quantum electronics for its ultra low power consumption, faster speed and small size features. It has significant advantages over the Complementary Metal–Oxide–Semiconductor (CMOS technology. This paper present, a novel QCA representation of Six-Correction Logic (SCL gate based on QCA logic gates: the Maj3, Maj AND gate and Maj OR. In order to design and verify the functionality of the proposed layout, QCADesigner a familiar QCA simulator has been employed. The simulation results confirm correctness of the claims and its usefulness in designing a digital circuits.

  13. A DNA Logic Gate Automaton for Detection of Rabies and Other Lyssaviruses.

    Science.gov (United States)

    Vijayakumar, Pavithra; Macdonald, Joanne

    2017-07-05

    Immediate activation of biosensors is not always desirable, particularly if activation is due to non-specific interactions. Here we demonstrate the use of deoxyribozyme-based logic gate networks arranged into visual displays to precisely control activation of biosensors, and demonstrate a prototype molecular automaton able to discriminate between seven different genotypes of Lyssaviruses, including Rabies virus. The device uses novel mixed-base logic gates to enable detection of the large diversity of Lyssavirus sequence populations, while an ANDNOT logic gate prevents non-specific activation across genotypes. The resultant device provides a user-friendly digital-like, but molecule-powered, dot-matrix text output for unequivocal results read-out that is highly relevant for point of care applications. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. High-sensitivity assay for Hg (II) and Ag (I) ion detection: A new class of droplet digital PCR logic gates for an intelligent DNA calculator.

    Science.gov (United States)

    Cheng, Nan; Zhu, Pengyu; Xu, Yuancong; Huang, Kunlun; Luo, Yunbo; Yang, Zhansen; Xu, Wentao

    2016-10-15

    The first example of droplet digital PCR logic gates ("YES", "OR" and "AND") for Hg (II) and Ag (I) ion detection has been constructed based on two amplification events triggered by a metal-ion-mediated base mispairing (T-Hg(II)-T and C-Ag(I)-C). In this work, Hg(II) and Ag(I) were used as the input, and the "true" hierarchical colors or "false" green were the output. Through accurate molecular recognition and high sensitivity amplification, positive droplets were generated by droplet digital PCR and viewed as the basis of hierarchical digital signals. Based on this principle, YES gate for Hg(II) (or Ag(I)) detection, OR gate for Hg(II) or Ag(I) detection and AND gate for Hg(II) and Ag(I) detection were developed, and their sensitively and selectivity were reported. The results indicate that the ddPCR logic system developed based on the different indicators for Hg(II) and Ag(I) ions provides a useful strategy for developing advanced detection methods, which are promising for multiplex metal ion analysis and intelligent DNA calculator design applications. Copyright © 2016 Elsevier B.V. All rights reserved.

  15. Synthesizing biomolecule-based Boolean logic gates.

    Science.gov (United States)

    Miyamoto, Takafumi; Razavi, Shiva; DeRose, Robert; Inoue, Takanari

    2013-02-15

    One fascinating recent avenue of study in the field of synthetic biology is the creation of biomolecule-based computers. The main components of a computing device consist of an arithmetic logic unit, the control unit, memory, and the input and output devices. Boolean logic gates are at the core of the operational machinery of these parts, and hence to make biocomputers a reality, biomolecular logic gates become a necessity. Indeed, with the advent of more sophisticated biological tools, both nucleic acid- and protein-based logic systems have been generated. These devices function in the context of either test tubes or living cells and yield highly specific outputs given a set of inputs. In this review, we discuss various types of biomolecular logic gates that have been synthesized, with particular emphasis on recent developments that promise increased complexity of logic gate circuitry, improved computational speed, and potential clinical applications.

  16. Synthesizing Biomolecule-based Boolean Logic Gates

    Science.gov (United States)

    Miyamoto, Takafumi; Razavi, Shiva; DeRose, Robert; Inoue, Takanari

    2012-01-01

    One fascinating recent avenue of study in the field of synthetic biology is the creation of biomolecule-based computers. The main components of a computing device consist of an arithmetic logic unit, the control unit, memory, and the input and output devices. Boolean logic gates are at the core of the operational machinery of these parts, hence to make biocomputers a reality, biomolecular logic gates become a necessity. Indeed, with the advent of more sophisticated biological tools, both nucleic acid- and protein-based logic systems have been generated. These devices function in the context of either test tubes or living cells and yield highly specific outputs given a set of inputs. In this review, we discuss various types of biomolecular logic gates that have been synthesized, with particular emphasis on recent developments that promise increased complexity of logic gate circuitry, improved computational speed, and potential clinical applications. PMID:23526588

  17. Silicon photonic crystal all-optical logic gates

    Energy Technology Data Exchange (ETDEWEB)

    Fu, Yulan [State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871 (China); Hu, Xiaoyong, E-mail: xiaoyonghu@pku.edu.cn [State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871 (China); Gong, Qihuang, E-mail: qhgong@pku.edu.cn [State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871 (China)

    2013-01-03

    All-optical logic gates, including OR, XOR, NOT, XNOR, and NAND gates, are realized theoretically in a two-dimensional silicon photonic crystal using the light beam interference effect. The ingenious photonic crystal waveguide component design, the precisely controlled optical path difference, and the elaborate device configuration ensure the simultaneous realization of five types of logic gate with low-power and a contrast ratio between the logic states of “1” and “0” as high as 20 dB. High power is not necessary for operation of these logic gate devices. This offers a simple and effective approach for the realization of integrated all-optical logic devices.

  18. Design of digital logic control for accelerator magnet power supply

    International Nuclear Information System (INIS)

    Long Fengli; Hu Wei; Cheng Jian

    2008-01-01

    For the accelerator magnet power supply, usually the Programmable Logic Controller (PLC) is used to server as the controller for logic protection and control. Along with the development of modern accelerator technology, it is a trend to use fully-digital control to the magnet power supply. It is possible to integrate the logic control part into the digital control component of the power supply, for example, the Field Programmable Gate Array (FPGA). The paper introduces to different methods which are designed for the logic protection and control for accelerator magnet power supplies with the FPGA as the control component. (authors)

  19. Quantum design rules for single molecule logic gates.

    Science.gov (United States)

    Renaud, N; Hliwa, M; Joachim, C

    2011-08-28

    Recent publications have demonstrated how to implement a NOR logic gate with a single molecule using its interaction with two surface atoms as logical inputs [W. Soe et al., ACS Nano, 2011, 5, 1436]. We demonstrate here how this NOR logic gate belongs to the general family of quantum logic gates where the Boolean truth table results from a full control of the quantum trajectory of the electron transfer process through the molecule by very local and classical inputs practiced on the molecule. A new molecule OR gate is proposed for the logical inputs to be also single metal atoms, one per logical input.

  20. Integration of biomolecular logic gates with field-effect transducers

    Energy Technology Data Exchange (ETDEWEB)

    Poghossian, A., E-mail: a.poghossian@fz-juelich.de [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Malzahn, K. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Abouzar, M.H. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Mehndiratta, P. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Katz, E. [Department of Chemistry and Biomolecular Science, NanoBio Laboratory (NABLAB), Clarkson University, Potsdam, NY 13699-5810 (United States); Schoening, M.J. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany)

    2011-11-01

    Highlights: > Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. > The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. > Logic gates were activated by different combinations of chemical inputs (analytes). > The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO{sub 2}-Ta{sub 2}O{sub 5} structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta{sub 2}O{sub 5}) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

  1. Integration of biomolecular logic gates with field-effect transducers

    International Nuclear Information System (INIS)

    Poghossian, A.; Malzahn, K.; Abouzar, M.H.; Mehndiratta, P.; Katz, E.; Schoening, M.J.

    2011-01-01

    Highlights: → Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. → The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. → Logic gates were activated by different combinations of chemical inputs (analytes). → The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO 2 -Ta 2 O 5 structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta 2 O 5 ) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

  2. Instantons in Self-Organizing Logic Gates

    Science.gov (United States)

    Bearden, Sean R. B.; Manukian, Haik; Traversa, Fabio L.; Di Ventra, Massimiliano

    2018-03-01

    Self-organizing logic is a recently suggested framework that allows the solution of Boolean truth tables "in reverse"; i.e., it is able to satisfy the logical proposition of gates regardless to which terminal(s) the truth value is assigned ("terminal-agnostic logic"). It can be realized if time nonlocality (memory) is present. A practical realization of self-organizing logic gates (SOLGs) can be done by combining circuit elements with and without memory. By employing one such realization, we show, numerically, that SOLGs exploit elementary instantons to reach equilibrium points. Instantons are classical trajectories of the nonlinear equations of motion describing SOLGs and connect topologically distinct critical points in the phase space. By linear analysis at those points, we show that these instantons connect the initial critical point of the dynamics, with at least one unstable direction, directly to the final fixed point. We also show that the memory content of these gates affects only the relaxation time to reach the logically consistent solution. Finally, we demonstrate, by solving the corresponding stochastic differential equations, that, since instantons connect critical points, noise and perturbations may change the instanton trajectory in the phase space but not the initial and final critical points. Therefore, even for extremely large noise levels, the gates self-organize to the correct solution. Our work provides a physical understanding of, and can serve as an inspiration for, models of bidirectional logic gates that are emerging as important tools in physics-inspired, unconventional computing.

  3. Reconfigurable chaotic logic gates based on novel chaotic circuit

    International Nuclear Information System (INIS)

    Behnia, S.; Pazhotan, Z.; Ezzati, N.; Akhshani, A.

    2014-01-01

    Highlights: • A novel method for implementing logic gates based on chaotic maps is introduced. • The logic gates can be implemented without any changes in the threshold voltage. • The chaos-based logic gates may serve as basic components of future computing devices. - Abstract: The logical operations are one of the key issues in today’s computer architecture. Nowadays, there is a great interest in developing alternative ways to get the logic operations by chaos computing. In this paper, a novel implementation method of reconfigurable logic gates based on one-parameter families of chaotic maps is introduced. The special behavior of these chaotic maps can be utilized to provide same threshold voltage for all logic gates. However, there is a wide interval for choosing a control parameter for all reconfigurable logic gates. Furthermore, an experimental implementation of this nonlinear system is presented to demonstrate the robustness of computing capability of chaotic circuits

  4. Logic reversibility and thermodynamic irreversibility demonstrated by DNAzyme-based Toffoli and Fredkin logic gates.

    Science.gov (United States)

    Orbach, Ron; Remacle, Françoise; Levine, R D; Willner, Itamar

    2012-12-26

    The Toffoli and Fredkin gates were suggested as a means to exhibit logic reversibility and thereby reduce energy dissipation associated with logic operations in dense computing circuits. We present a construction of the logically reversible Toffoli and Fredkin gates by implementing a library of predesigned Mg(2+)-dependent DNAzymes and their respective substrates. Although the logical reversibility, for which each set of inputs uniquely correlates to a set of outputs, is demonstrated, the systems manifest thermodynamic irreversibility originating from two quite distinct and nonrelated phenomena. (i) The physical readout of the gates is by fluorescence that depletes the population of the final state of the machine. This irreversible, heat-releasing process is needed for the generation of the output. (ii) The DNAzyme-powered logic gates are made to operate at a finite rate by invoking downhill energy-releasing processes. Even though the three bits of Toffoli's and Fredkin's logically reversible gates manifest thermodynamic irreversibility, we suggest that these gates could have important practical implication in future nanomedicine.

  5. A Web-Based Visualization and Animation Platform for Digital Logic Design

    Science.gov (United States)

    Shoufan, Abdulhadi; Lu, Zheng; Huss, Sorin A.

    2015-01-01

    This paper presents a web-based education platform for the visualization and animation of the digital logic design process. This includes the design of combinatorial circuits using logic gates, multiplexers, decoders, and look-up-tables as well as the design of finite state machines. Various configurations of finite state machines can be selected…

  6. Reprogrammable Logic Gate and Logic Circuit Based on Multistimuli-Responsive Raspberry-like Micromotors.

    Science.gov (United States)

    Zhang, Lina; Zhang, Hui; Liu, Mei; Dong, Bin

    2016-06-22

    In this paper, we report a polymer-based raspberry-like micromotor. Interestingly, the resulting micromotor exhibits multistimuli-responsive motion behavior. Its on-off-on motion can be regulated by the application of stimuli such as H2O2, near-infrared light, NH3, or their combinations. Because of the versatility in motion control, the current micromotor has great potential in the application field of logic gate and logic circuit. With use of different stimuli as the inputs and the micromotor motion as the output, reprogrammable OR and INHIBIT logic gates or logic circuit consisting of OR, NOT, and AND logic gates can be achieved.

  7. r-Universal reversible logic gates

    International Nuclear Information System (INIS)

    Vos, A de; Storme, L

    2004-01-01

    Reversible logic plays a fundamental role both in ultra-low power electronics and in quantum computing. It is therefore important to know which reversible logic gates can be used as building block for the reversible implementation of an arbitrary boolean function and which cannot

  8. Multi-Valued Logic Gates, Continuous Sensitivity, Reversibility, and Threshold Functions

    OpenAIRE

    İlhan, Aslı Güçlükan; Ünlü, Özgün

    2016-01-01

    We define an invariant of a multi-valued logic gate by considering the number of certain threshold functions associated with the gate. We call this invariant the continuous sensitivity of the gate. We discuss a method for analysing continuous sensitivity of a multi-valued logic gate by using experimental data about the gate. In particular, we will show that this invariant provides a lower bound for the sensitivity of a boolean function considered as a multi-valued logic gate. We also discuss ...

  9. Molecular sensors and molecular logic gates

    International Nuclear Information System (INIS)

    Georgiev, N.; Bojinov, V.

    2013-01-01

    Full text: The rapid grow of nanotechnology field extended the concept of a macroscopic device to the molecular level. Because of this reason the design and synthesis of (supra)-molecular species capable of mimicking the functions of macroscopic devices are currently of great interest. Molecular devices operate via electronic and/or nuclear rearrangements and, like macroscopic devices, need energy to operate and communicate between their elements. The energy needed to make a device work can be supplied as chemical energy, electrical energy, or light. Luminescence is one of the most useful techniques to monitor the operation of molecular-level devices. This fact determinates the synthesis of novel fluorescence compounds as a considerable and inseparable part of nanoscience development. Further miniaturization of semiconductors in electronic field reaches their limit. Therefore the design and construction of molecular systems capable of performing complex logic functions is of great scientific interest now. In semiconductor devices the logic gates work using binary logic, where the signals are encoded as 0 and 1 (low and high current). This process is executable on molecular level by several ways, but the most common are based on the optical properties of the molecule switches encoding the low and high concentrations of the input guest molecules and the output fluorescent intensities with binary 0 and 1 respectively. The first proposal to execute logic operations at the molecular level was made in 1988, but the field developed only five years later when the analogy between molecular switches and logic gates was experimentally demonstrated by de Silva. There are seven basic logic gates: AND, OR, XOR, NOT, NAND, NOR and XNOR and all of them were achieved by molecules, the fluorescence switching as well. key words: fluorescence, molecular sensors, molecular logic gates

  10. Implementing conventional logic unconventionally: photochromic molecular populations as registers and logic gates.

    Science.gov (United States)

    Chaplin, J C; Russell, N A; Krasnogor, N

    2012-07-01

    In this paper we detail experimental methods to implement registers, logic gates and logic circuits using populations of photochromic molecules exposed to sequences of light pulses. Photochromic molecules are molecules with two or more stable states that can be switched reversibly between states by illuminating with appropriate wavelengths of radiation. Registers are implemented by using the concentration of molecules in each state in a given sample to represent an integer value. The register's value can then be read using the intensity of a fluorescence signal from the sample. Logic gates have been implemented using a register with inputs in the form of light pulses to implement 1-input/1-output and 2-input/1-output logic gates. A proof of concept logic circuit is also demonstrated; coupled with the software workflow describe the transition from a circuit design to the corresponding sequence of light pulses. Copyright © 2012 Elsevier Ireland Ltd. All rights reserved.

  11. Toward spin-based Magneto Logic Gate in Graphene

    Science.gov (United States)

    Wen, Hua; Dery, Hanan; Amamou, Walid; Zhu, Tiancong; Lin, Zhisheng; Shi, Jing; Zutic, Igor; Krivorotov, Ilya; Sham, Lu; Kawakami, Roland

    Graphene has emerged as a leading candidate for spintronic applications due to its long spin diffusion length at room temperature. A universal magnetologic gate (MLG) based on spin transport in graphene has been recently proposed as the building block of a logic circuit which could replace the current CMOS technology. This MLG has five ferromagnetic electrodes contacting a graphene channel and can be considered as two three-terminal XOR logic gates. Here we demonstrate this XOR logic gate operation in such a device. This was achieved by systematically tuning the injection current bias to balance the spin polarization efficiency of the two inputs, and offset voltage in the detection circuit to obtain binary outputs. The output is a current which corresponds to different logic states: zero current is logic `0', and nonzero current is logic `1'. We find improved performance could be achieved by reducing device size and optimizing the contacts.

  12. Error-Transparent Quantum Gates for Small Logical Qubit Architectures

    Science.gov (United States)

    Kapit, Eliot

    2018-02-01

    One of the largest obstacles to building a quantum computer is gate error, where the physical evolution of the state of a qubit or group of qubits during a gate operation does not match the intended unitary transformation. Gate error stems from a combination of control errors and random single qubit errors from interaction with the environment. While great strides have been made in mitigating control errors, intrinsic qubit error remains a serious problem that limits gate fidelity in modern qubit architectures. Simultaneously, recent developments of small error-corrected logical qubit devices promise significant increases in logical state lifetime, but translating those improvements into increases in gate fidelity is a complex challenge. In this Letter, we construct protocols for gates on and between small logical qubit devices which inherit the parent device's tolerance to single qubit errors which occur at any time before or during the gate. We consider two such devices, a passive implementation of the three-qubit bit flip code, and the author's own [E. Kapit, Phys. Rev. Lett. 116, 150501 (2016), 10.1103/PhysRevLett.116.150501] very small logical qubit (VSLQ) design, and propose error-tolerant gate sets for both. The effective logical gate error rate in these models displays superlinear error reduction with linear increases in single qubit lifetime, proving that passive error correction is capable of increasing gate fidelity. Using a standard phenomenological noise model for superconducting qubits, we demonstrate a realistic, universal one- and two-qubit gate set for the VSLQ, with error rates an order of magnitude lower than those for same-duration operations on single qubits or pairs of qubits. These developments further suggest that incorporating small logical qubits into a measurement based code could substantially improve code performance.

  13. Micro-mechanical resonators for dynamically reconfigurable reduced voltage logic gates

    Science.gov (United States)

    Chappanda, K. N.; Ilyas, S.; Younis, M. I.

    2018-05-01

    Due to the limitations of transistor-based logic devices such as their poor performance at elevated temperature, alternative computing methods are being actively investigated. In this work, we present electromechanical logic gates using electrostatically coupled in-plane micro-cantilever resonators operated at modest vacuum conditions of 5 Torr. Operating in the first resonant mode, we demonstrate 2-bit XOR, 2- and 3-bit AND, 2- and 3-bit NOR, and 1-bit NOT gates; all condensed in the same device. Through the designed electrostatic coupling, the required voltage for the logic gates is reduced by 80%, along with the reduction in the number of electrical interconnects and devices per logic operation (contrary to transistors). The device is dynamically reconfigurable between any logic gates in real time without the need for any change in the electrical interconnects and the drive circuit. By operating in the first two resonant vibration modes, we demonstrate mechanical logic gates consisting of two 2-bit AND and two 2-bit XOR gates. The device is tested at elevated temperatures and is shown to be functional as a logic gate up to 150 °C. Also, the device has high reliability with demonstrated lifetime greater than 5  ×  1012 oscillations.

  14. Micro-mechanical resonators for dynamically reconfigurable reduced voltage logic gates

    KAUST Repository

    Chappanda, K N

    2018-02-16

    Due to the limitations of transistor-based logic devices such as their poor performance at elevated temperature, alternative computing methods are being actively investigated. In this work, we present electromechanical logic gates using electrostatically coupled in-plane micro-cantilever resonators operated at modest vacuum conditions of 5 Torr. Operating in the first resonant mode, we demonstrate 2-bit XOR, 2- and 3-bit AND, 2- and 3-bit NOR, and 1-bit NOT gates; all condensed in the same device. Through the designed electrostatic coupling, the required voltage for the logic gates is reduced by 80%, along with the reduction in the number of electrical interconnects and devices per logic operation (contrary to transistors). The device is dynamically reconfigurable between any logic gates in real time without the need for any change in the electrical interconnects and the drive circuit. By operating in the first two resonant vibration modes, we demonstrate mechanical logic gates consisting of two 2-bit AND and two 2-bit XOR gates. The device is tested at elevated temperatures and is shown to be functional as a logic gate up to 150 °C. Also, the device has high reliability with demonstrated lifetime greater than 5 × 10 oscillations.

  15. Micro-mechanical resonators for dynamically reconfigurable reduced voltage logic gates

    KAUST Repository

    Chappanda , K. N.; Ilyas, Saad; Younis, Mohammad I.

    2018-01-01

    Due to the limitations of transistor-based logic devices such as their poor performance at elevated temperature, alternative computing methods are being actively investigated. In this work, we present electromechanical logic gates using electrostatically coupled in-plane micro-cantilever resonators operated at modest vacuum conditions of 5 Torr. Operating in the first resonant mode, we demonstrate 2-bit XOR, 2- and 3-bit AND, 2- and 3-bit NOR, and 1-bit NOT gates; all condensed in the same device. Through the designed electrostatic coupling, the required voltage for the logic gates is reduced by 80%, along with the reduction in the number of electrical interconnects and devices per logic operation (contrary to transistors). The device is dynamically reconfigurable between any logic gates in real time without the need for any change in the electrical interconnects and the drive circuit. By operating in the first two resonant vibration modes, we demonstrate mechanical logic gates consisting of two 2-bit AND and two 2-bit XOR gates. The device is tested at elevated temperatures and is shown to be functional as a logic gate up to 150 °C. Also, the device has high reliability with demonstrated lifetime greater than 5 × 10 oscillations.

  16. Valleytronics in merging Dirac cones: All-electric-controlled valley filter, valve, and universal reversible logic gate

    Science.gov (United States)

    Ang, Yee Sin; Yang, Shengyuan A.; Zhang, C.; Ma, Zhongshui; Ang, L. K.

    2017-12-01

    Despite much anticipation of valleytronics as a candidate to replace the aging complementary metal-oxide-semiconductor (CMOS) based information processing, its progress is severely hindered by the lack of practical ways to manipulate valley polarization all electrically in an electrostatic setting. Here, we propose a class of all-electric-controlled valley filter, valve, and logic gate based on the valley-contrasting transport in a merging Dirac cones system. The central mechanism of these devices lies on the pseudospin-assisted quantum tunneling which effectively quenches the transport of one valley when its pseudospin configuration mismatches that of a gate-controlled scattering region. The valley polarization can be abruptly switched into different states and remains stable over semi-infinite gate-voltage windows. Colossal tunneling valley-pseudomagnetoresistance ratio of over 10 000 % can be achieved in a valley-valve setup. We further propose a valleytronic-based logic gate capable of covering all 16 types of two-input Boolean logics. Remarkably, the valley degree of freedom can be harnessed to resurrect logical reversibility in two-input universal Boolean gate. The (2 +1 ) polarization states (two distinct valleys plus a null polarization) reestablish one-to-one input-to-output mapping, a crucial requirement for logical reversibility, and significantly reduce the complexity of reversible circuits. Our results suggest that the synergy of valleytronics and digital logics may provide new paradigms for valleytronic-based information processing and reversible computing.

  17. Enhancing Learning Effectiveness in Digital Design Courses through the Use of Programmable Logic Boards

    Science.gov (United States)

    Zhu, Yi; Weng, T.; Cheng, Chung-Kuan

    2009-01-01

    Incorporating programmable logic devices (PLD) in digital design courses has become increasingly popular. The advantages of using PLDs, such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGA), have been discussed before. However, previous studies have focused on the experiences from the point of view of the…

  18. An electrically reconfigurable logic gate intrinsically enabled by spin-orbit materials.

    Science.gov (United States)

    Kazemi, Mohammad

    2017-11-10

    The spin degree of freedom in magnetic devices has been discussed widely for computing, since it could significantly reduce energy dissipation, might enable beyond Von Neumann computing, and could have applications in quantum computing. For spin-based computing to become widespread, however, energy efficient logic gates comprising as few devices as possible are required. Considerable recent progress has been reported in this area. However, proposals for spin-based logic either require ancillary charge-based devices and circuits in each individual gate or adopt principals underlying charge-based computing by employing ancillary spin-based devices, which largely negates possible advantages. Here, we show that spin-orbit materials possess an intrinsic basis for the execution of logic operations. We present a spin-orbit logic gate that performs a universal logic operation utilizing the minimum possible number of devices, that is, the essential devices required for representing the logic operands. Also, whereas the previous proposals for spin-based logic require extra devices in each individual gate to provide reconfigurability, the proposed gate is 'electrically' reconfigurable at run-time simply by setting the amplitude of the clock pulse applied to the gate. We demonstrate, analytically and numerically with experimentally benchmarked models, that the gate performs logic operations and simultaneously stores the result, realizing the 'stateful' spin-based logic scalable to ultralow energy dissipation.

  19. Intelligent layered nanoflare: ``lab-on-a-nanoparticle'' for multiple DNA logic gate operations and efficient intracellular delivery

    Science.gov (United States)

    Yang, Bin; Zhang, Xiao-Bing; Kang, Li-Ping; Huang, Zhi-Mei; Shen, Guo-Li; Yu, Ru-Qin; Tan, Weihong

    2014-07-01

    DNA strand displacement cascades have been engineered to construct various fascinating DNA circuits. However, biological applications are limited by the insufficient cellular internalization of naked DNA structures, as well as the separated multicomponent feature. In this work, these problems are addressed by the development of a novel DNA nanodevice, termed intelligent layered nanoflare, which integrates DNA computing at the nanoscale, via the self-assembly of DNA flares on a single gold nanoparticle. As a ``lab-on-a-nanoparticle'', the intelligent layered nanoflare could be engineered to perform a variety of Boolean logic gate operations, including three basic logic gates, one three-input AND gate, and two complex logic operations, in a digital non-leaky way. In addition, the layered nanoflare can serve as a programmable strategy to sequentially tune the size of nanoparticles, as well as a new fingerprint spectrum technique for intelligent multiplex biosensing. More importantly, the nanoflare developed here can also act as a single entity for intracellular DNA logic gate delivery, without the need of commercial transfection agents or other auxiliary carriers. By incorporating DNA circuits on nanoparticles, the presented layered nanoflare will broaden the applications of DNA circuits in biological systems, and facilitate the development of DNA nanotechnology.DNA strand displacement cascades have been engineered to construct various fascinating DNA circuits. However, biological applications are limited by the insufficient cellular internalization of naked DNA structures, as well as the separated multicomponent feature. In this work, these problems are addressed by the development of a novel DNA nanodevice, termed intelligent layered nanoflare, which integrates DNA computing at the nanoscale, via the self-assembly of DNA flares on a single gold nanoparticle. As a ``lab-on-a-nanoparticle'', the intelligent layered nanoflare could be engineered to perform a variety of

  20. Divide and control: split design of multi-input DNA logic gates.

    Science.gov (United States)

    Gerasimova, Yulia V; Kolpashchikov, Dmitry M

    2015-01-18

    Logic gates made of DNA have received significant attention as biocompatible building blocks for molecular circuits. The majority of DNA logic gates, however, are controlled by the minimum number of inputs: one, two or three. Here we report a strategy to design a multi-input logic gate by splitting a DNA construct.

  1. Light-effect transistor (LET with multiple independent gating controls for optical logic gates and optical amplification

    Directory of Open Access Journals (Sweden)

    Jason eMarmon

    2016-03-01

    Full Text Available Modern electronics are developing electronic-optical integrated circuits, while their electronic backbone, e.g. field-effect transistors (FETs, remains the same. However, further FET down scaling is facing physical and technical challenges. A light-effect transistor (LET offers electronic-optical hybridization at the component level, which can continue Moore’s law to quantum region without requiring a FET’s fabrication complexity, e.g. physical gate and doping, by employing optical gating and photoconductivity. Multiple independent gates are therefore readily realized to achieve unique functionalities without increasing chip space. Here we report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs show output and transfer characteristics resembling advanced FETs, e.g. on/off ratios up to ~1.0x106 with a source-drain voltage of ~1.43 V, gate-power of ~260 nW, and subthreshold swing of ~0.3 nW/decade (excluding losses. Our work offers new electronic-optical integration strategies and electronic and optical computing approaches.

  2. Implementation of fault-tolerant quantum logic gates via optimal control

    International Nuclear Information System (INIS)

    Nigmatullin, R; Schirmer, S G

    2009-01-01

    The implementation of fault-tolerant quantum gates on encoded logic qubits is considered. It is shown that transversal implementation of logic gates based on simple geometric control ideas is problematic for realistic physical systems suffering from imperfections such as qubit inhomogeneity or uncontrollable interactions between qubits. However, this problem can be overcome by formulating the task as an optimal control problem and designing efficient algorithms to solve it. In particular, we can find solutions that implement all of the elementary logic gates in a fixed amount of time with limited control resources for the five-qubit stabilizer code. Most importantly, logic gates that are extremely difficult to implement using conventional techniques even for ideal systems, such as the T-gate for the five-qubit stabilizer code, do not appear to pose a problem for optimal control.

  3. Molecular logic gates: the past, present and future.

    Science.gov (United States)

    Erbas-Cakmak, Sundus; Kolemen, Safacan; Sedgwick, Adam C; Gunnlaugsson, Thorfinnur; James, Tony D; Yoon, Juyoung; Akkaya, Engin U

    2018-04-03

    The field of molecular logic gates originated 25 years ago, when A. P. de Silva published a seminal article in Nature. Stimulated by this ground breaking research, scientists were inspired to join the race to simulate the workings of the fundamental components of integrated circuits using molecules. The rules of this game of mimicry were flexible, and have evolved and morphed over the years. This tutorial review takes a look back on and provides an overview of the birth and growth of the field of molecular logics. Spinning-off from chemosensor research, molecular logic gates quickly proved themselves to be more than intellectual exercises and are now poised for many potential practical applications. The ultimate goal of this vein of research became clearer only recently - to "boldly go where no silicon-based logic gate has gone before" and seek out a new deeper understanding of life inside tissues and cells.

  4. Cascading of molecular logic gates for advanced functions: a self-reporting, activatable photosensitizer.

    Science.gov (United States)

    Erbas-Cakmak, Sundus; Akkaya, Engin U

    2013-10-18

    Logical progress: Independent molecular logic gates have been designed and characterized. Then, the individual molecular logic gates were coerced to work together within a micelle. Information relay between the two logic gates was achieved through the intermediacy of singlet oxygen. Working together, these concatenated logic gates result in a self-reporting and activatable photosensitizer. GSH=glutathione. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. Chaotic logic gate: A new approach in set and design by genetic algorithm

    International Nuclear Information System (INIS)

    Beyki, Mahmood; Yaghoobi, Mahdi

    2015-01-01

    How to reconfigure a logic gate is an attractive subject for different applications. Chaotic systems can yield a wide variety of patterns and here we use this feature to produce a logic gate. This feature forms the basis for designing a dynamical computing device that can be rapidly reconfigured to become any wanted logical operator. This logic gate that can reconfigure to any logical operator when placed in its chaotic state is called chaotic logic gate. The reconfiguration realize by setting the parameter values of chaotic logic gate. In this paper we present mechanisms about how to produce a logic gate based on the logistic map in its chaotic state and genetic algorithm is used to set the parameter values. We use three well-known selection methods used in genetic algorithm: tournament selection, Roulette wheel selection and random selection. The results show the tournament selection method is the best method for set the parameter values. Further, genetic algorithm is a powerful tool to set the parameter values of chaotic logic gate

  6. Proposal of unilateral single-flux-quantum logic gate

    International Nuclear Information System (INIS)

    Mikaye, H.; Fukaya, N.; Okabe, Y.; Sugamo, T.

    1985-01-01

    A new type of single flux quantum logic gate is proposed, which can perform unilateral propagation of signal without using three-phase clock. This gate is designed to be built with bridge-type Josephson junctions. A basic logic gate consists of two one-junction interferometers coupled by superconducting interconnecting lines, and the logical states are represented by zero or one quantized fluxoid in one of one-junction interferometers. The bias current of the unequal magnitude to each of the two one-junction interferometers results in unilateral signal flow. By adjusting design parameters such as the ratio of the critical current of Josephson junctions and the inductances, circuits with the noise immunity of greater than 50% with respect to the bias current have been designed. Three cascaded gates were modeled and simulated on a computer, and the unilateral signal flow was confirmed. The simulation also shows that a switching delay about 2 picoseconds is feasible

  7. Enzymatic AND logic gates operated under conditions characteristic of biomedical applications.

    Science.gov (United States)

    Melnikov, Dmitriy; Strack, Guinevere; Zhou, Jian; Windmiller, Joshua Ray; Halámek, Jan; Bocharova, Vera; Chuang, Min-Chieh; Santhosh, Padmanabhan; Privman, Vladimir; Wang, Joseph; Katz, Evgeny

    2010-09-23

    Experimental and theoretical analyses of the lactate dehydrogenase and glutathione reductase based enzymatic AND logic gates in which the enzymes and their substrates serve as logic inputs are performed. These two systems are examples of the novel, previously unexplored class of biochemical logic gates that illustrate potential biomedical applications of biochemical logic. They are characterized by input concentrations at logic 0 and 1 states corresponding to normal and pathophysiological conditions. Our analysis shows that the logic gates under investigation have similar noise characteristics. Both significantly amplify random noise present in inputs; however, we establish that for realistic widths of the input noise distributions, it is still possible to differentiate between the logic 0 and 1 states of the output. This indicates that reliable detection of pathophysiological conditions is indeed possible with such enzyme logic systems.

  8. Fast quantum logic gates with trapped-ion qubits

    Science.gov (United States)

    Schäfer, V. M.; Ballance, C. J.; Thirumalai, K.; Stephenson, L. J.; Ballance, T. G.; Steane, A. M.; Lucas, D. M.

    2018-03-01

    Quantum bits (qubits) based on individual trapped atomic ions are a promising technology for building a quantum computer. The elementary operations necessary to do so have been achieved with the required precision for some error-correction schemes. However, the essential two-qubit logic gate that is used to generate quantum entanglement has hitherto always been performed in an adiabatic regime (in which the gate is slow compared with the characteristic motional frequencies of the ions in the trap), resulting in logic speeds of the order of 10 kilohertz. There have been numerous proposals of methods for performing gates faster than this natural ‘speed limit’ of the trap. Here we implement one such method, which uses amplitude-shaped laser pulses to drive the motion of the ions along trajectories designed so that the gate operation is insensitive to the optical phase of the pulses. This enables fast (megahertz-rate) quantum logic that is robust to fluctuations in the optical phase, which would otherwise be an important source of experimental error. We demonstrate entanglement generation for gate times as short as 480 nanoseconds—less than a single oscillation period of an ion in the trap and eight orders of magnitude shorter than the memory coherence time measured in similar calcium-43 hyperfine qubits. The power of the method is most evident at intermediate timescales, at which it yields a gate error more than ten times lower than can be attained using conventional techniques; for example, we achieve a 1.6-microsecond-duration gate with a fidelity of 99.8 per cent. Faster and higher-fidelity gates are possible at the cost of greater laser intensity. The method requires only a single amplitude-shaped pulse and one pair of beams derived from a continuous-wave laser. It offers the prospect of combining the unrivalled coherence properties, operation fidelities and optical connectivity of trapped-ion qubits with the submicrosecond logic speeds that are usually

  9. Pressure driven digital logic in PDMS based microfluidic devices fabricated by multilayer soft lithography.

    Science.gov (United States)

    Devaraju, Naga Sai Gopi K; Unger, Marc A

    2012-11-21

    Advances in microfluidics now allow an unprecedented level of parallelization and integration of biochemical reactions. However, one challenge still faced by the field has been the complexity and cost of the control hardware: one external pressure signal has been required for each independently actuated set of valves on chip. Using a simple post-modification to the multilayer soft lithography fabrication process, we present a new implementation of digital fluidic logic fully analogous to electronic logic with significant performance advances over the previous implementations. We demonstrate a novel normally closed static gain valve capable of modulating pressure signals in a fashion analogous to an electronic transistor. We utilize these valves to build complex fluidic logic circuits capable of arbitrary control of flows by processing binary input signals (pressure (1) and atmosphere (0)). We demonstrate logic gates and devices including NOT, NAND and NOR gates, bi-stable flip-flops, gated flip-flops (latches), oscillators, self-driven peristaltic pumps, delay flip-flops, and a 12-bit shift register built using static gain valves. This fluidic logic shows cascade-ability, feedback, programmability, bi-stability, and autonomous control capability. This implementation of fluidic logic yields significantly smaller devices, higher clock rates, simple designs, easy fabrication, and integration into MSL microfluidics.

  10. MOSFET-like CNFET based logic gate library for low-power application: a comparative study

    International Nuclear Information System (INIS)

    Gowri Sankar, P. A.; Udhayakumar, K.

    2014-01-01

    The next generation of logic gate devices are expected to depend upon radically new technologies mainly due to the increasing difficulties and limitations of existing CMOS technology. MOSFET like CNFETs should ideally be the best devices to work with for high-performance VLSI. This paper presents results of a comprehensive comparative study of MOSFET-like carbon nanotube field effect transistors (CNFETs) technology based logic gate library for high-speed, low-power operation than conventional bulk CMOS libraries. It focuses on comparing four promising logic families namely: complementary-CMOS (C-CMOS), transmission gate (TG), complementary pass logic (CPL) and Domino logic (DL) styles are presented. Based on these logic styles, the proposed library of static and dynamic NAND-NOR logic gates, XOR, multiplexer and full adder functions are implemented efficiently and carefully analyzed with a test bench to measure propagation delay and power dissipation as a function of supply voltage. This analysis provides the right choice of logic style for low-power, high-speed applications. Proposed logic gates libraries are simulated using Synopsys HSPICE based on the standard 32 nm CNFET model. The simulation results demonstrate that, it is best to use C-CMOS logic style gates that are implemented in CNFET technology which are superior in performance compared to other logic styles, because of their low average power-delay-product (PDP). The analysis also demonstrates how the optimum supply voltage varies with logic styles in ultra-low power systems. The robustness of the proposed logic gate library is also compared with conventional and state-art of CMOS logic gate libraries. (semiconductor integrated circuits)

  11. Parallel logic gates in synthetic gene networks induced by non-Gaussian noise.

    Science.gov (United States)

    Xu, Yong; Jin, Xiaoqin; Zhang, Huiqing

    2013-11-01

    The recent idea of logical stochastic resonance is verified in synthetic gene networks induced by non-Gaussian noise. We realize the switching between two kinds of logic gates under optimal moderate noise intensity by varying two different tunable parameters in a single gene network. Furthermore, in order to obtain more logic operations, thus providing additional information processing capacity, we obtain in a two-dimensional toggle switch model two complementary logic gates and realize the transformation between two logic gates via the methods of changing different parameters. These simulated results contribute to improve the computational power and functionality of the networks.

  12. Logic of the digital

    CERN Document Server

    Evens, Aden

    2015-01-01

    Building a foundational understanding of the digital, Logic of the Digital reveals a unique digital ontology. Beginning from formal and technical characteristics, especially the binary code at the core of all digital technologies, Aden Evens traces the pathways along which the digital domain of abstract logic encounters the material, human world. How does a code using only 0s and 1s give rise to the vast range of applications and information that constitutes a great and growing portion of our world? Evens' analysis shows how any encounter between the actual and the digital must cross an ontolo

  13. A single nano cantilever as a reprogrammable universal logic gate

    International Nuclear Information System (INIS)

    Chappanda, K N; Ilyas, S; Kazmi, S N R; Younis, M I; Holguin-Lerma, J; Batra, N M; Costa, P M F J

    2017-01-01

    The current transistor-based computing circuits use multiple interconnected transistors to realize a single Boolean logic gate. This leads to higher power requirements and delayed computing. Transistors are not suitable for applications in harsh environments and require complicated thermal management systems due to excessive heat dissipation. Also, transistor circuits lack the ability to dynamically reconfigure their functionality in real time, which is desirable for enhanced computing capability. Further, the miniaturization of transistors to improve computational power is reaching its ultimate physical limits. As a step towards overcoming the limitations of transistor-based computing, here we demonstrate a reprogrammable universal Boolean logic gate based on a nanoelectromechanical cantilever (NC) oscillator. The fundamental XOR, AND, NOR, OR and NOT logic gates are condensed in a single NC, thereby reducing electrical interconnects between devices. The device is dynamically switchable between any logic gates at the same drive frequency without the need for any change in the circuit. It is demonstrated to operate at elevated temperatures minimizing the need for thermal management systems. It has a tunable bandwidth of 5 MHz enabling parallel and dynamically reconfigurable logic device for enhanced computing. (paper)

  14. A single nano cantilever as a reprogrammable universal logic gate

    KAUST Repository

    Chappanda, K. N.

    2017-02-24

    The current transistor-based computing circuits use multiple interconnected transistors to realize a single Boolean logic gate. This leads to higher power requirements and delayed computing. Transistors are not suitable for applications in harsh environments and require complicated thermal management systems due to excessive heat dissipation. Also, transistor circuits lack the ability to dynamically reconfigure their functionality in real time, which is desirable for enhanced computing capability. Further, the miniaturization of transistors to improve computational power is reaching its ultimate physical limits. As a step towards overcoming the limitations of transistor-based computing, here we demonstrate a reprogrammable universal Boolean logic gate based on a nanoelectromechanical cantilever (NC) oscillator. The fundamental XOR, AND, NOR, OR and NOT logic gates are condensed in a single NC, thereby reducing electrical interconnects between devices. The device is dynamically switchable between any logic gates at the same drive frequency without the need for any change in the circuit. It is demonstrated to operate at elevated temperatures minimizing the need for thermal management systems. It has a tunable bandwidth of 5 MHz enabling parallel and dynamically reconfigurable logic device for enhanced computing.

  15. Light-effect transistor (LET) with multiple independent gating controls for optical logic gates and optical amplification

    Science.gov (United States)

    Marmon, Jason; Rai, Satish; Wang, Kai; Zhou, Weilie; Zhang, Yong

    The pathway for CMOS technology beyond the 5-nm technology node remains unclear for both physical and technological reasons. A new transistor paradigm is required. A LET (Marmon et. al., Front. Phys. 2016, 4, No. 8) offers electronic-optical hybridization at the component level, and is capable of continuing Moore's law to the quantum scale. A LET overcomes a FET's fabrication complexity, e.g., physical gate and doping, by employing optical gating and photoconductivity, while multiple independent, optical gates readily realize unique functionalities. We report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs, incorporating an M-S-M structure, show output and transfer characteristics resembling advanced FETs, e.g., on/off ratios up to 106 with a source-drain voltage of 1.43V, gate-power of 260nW, and a subthreshold swing of 0.3nW/decade (excluding losses). A LET has potential for high-switching (THz) speeds and extremely low-switching energies (aJ) in the ballistic transport region. Our work offers new electronic-optical integration strategies for high speed and low energy computing approaches, which could potentially be extended to other materials and devices.

  16. Self-Assembling Molecular Logic Gates Based on DNA Crossover Tiles.

    Science.gov (United States)

    Campbell, Eleanor A; Peterson, Evan; Kolpashchikov, Dmitry M

    2017-07-05

    DNA-based computational hardware has attracted ever-growing attention due to its potential to be useful in the analysis of complex mixtures of biological markers. Here we report the design of self-assembling logic gates that recognize DNA inputs and assemble into crossover tiles when the output signal is high; the crossover structures disassemble to form separate DNA stands when the output is low. The output signal can be conveniently detected by fluorescence using a molecular beacon probe as a reporter. AND, NOT, and OR logic gates were designed. We demonstrate that the gates can connect to each other to produce other logic functions. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. DNAzyme-Based Logic Gate-Mediated DNA Self-Assembly.

    Science.gov (United States)

    Zhang, Cheng; Yang, Jing; Jiang, Shuoxing; Liu, Yan; Yan, Hao

    2016-01-13

    Controlling DNA self-assembly processes using rationally designed logic gates is a major goal of DNA-based nanotechnology and programming. Such controls could facilitate the hierarchical engineering of complex nanopatterns responding to various molecular triggers or inputs. Here, we demonstrate the use of a series of DNAzyme-based logic gates to control DNA tile self-assembly onto a prescribed DNA origami frame. Logic systems such as "YES," "OR," "AND," and "logic switch" are implemented based on DNAzyme-mediated tile recognition with the DNA origami frame. DNAzyme is designed to play two roles: (1) as an intermediate messenger to motivate downstream reactions and (2) as a final trigger to report fluorescent signals, enabling information relay between the DNA origami-framed tile assembly and fluorescent signaling. The results of this study demonstrate the plausibility of DNAzyme-mediated hierarchical self-assembly and provide new tools for generating dynamic and responsive self-assembly systems.

  18. Construction of a fuzzy and all Boolean logic gates based on DNA

    DEFF Research Database (Denmark)

    M. Zadegan, Reza; Jepsen, Mette D E; Hildebrandt, Lasse

    2015-01-01

    to the operation of the six Boolean logic gates AND, NAND, OR, NOR, XOR, and XNOR. The logic gate complex is shown to work also when implemented in a three-dimensional DNA origami box structure, where it controlled the position of the lid in a closed or open position. Implementation of multiple microRNA sensitive...... DNA locks on one DNA origami box structure enabled fuzzy logical operation that allows biosensing of complex molecular signals. Integrating logic gates with DNA origami systems opens a vast avenue to applications in the fields of nanomedicine for diagnostics and therapeutics....

  19. A reconfigurable NAND/NOR genetic logic gate.

    Science.gov (United States)

    Goñi-Moreno, Angel; Amos, Martyn

    2012-09-18

    Engineering genetic Boolean logic circuits is a major research theme of synthetic biology. By altering or introducing connections between genetic components, novel regulatory networks are built in order to mimic the behaviour of electronic devices such as logic gates. While electronics is a highly standardized science, genetic logic is still in its infancy, with few agreed standards. In this paper we focus on the interpretation of logical values in terms of molecular concentrations. We describe the results of computational investigations of a novel circuit that is able to trigger specific differential responses depending on the input standard used. The circuit can therefore be dynamically reconfigured (without modification) to serve as both a NAND/NOR logic gate. This multi-functional behaviour is achieved by a) varying the meanings of inputs, and b) using branch predictions (as in computer science) to display a constrained output. A thorough computational study is performed, which provides valuable insights for the future laboratory validation. The simulations focus on both single-cell and population behaviours. The latter give particular insights into the spatial behaviour of our engineered cells on a surface with a non-homogeneous distribution of inputs. We present a dynamically-reconfigurable NAND/NOR genetic logic circuit that can be switched between modes of operation via a simple shift in input signal concentration. The circuit addresses important issues in genetic logic that will have significance for more complex synthetic biology applications.

  20. Quantum logic gates using Stark-shifted Raman transitions in a cavity

    International Nuclear Information System (INIS)

    Biswas, Asoka; Agarwal, G.S.

    2004-01-01

    We present a scheme to realize the basic two-qubit logic gates such as the quantum phase gate and the controlled-NOT gate using a detuned optical cavity interacting with a three-level Raman system. We discuss the role of Stark shifts, which are as important as the terms leading to the two-photon transition. The operation of the proposed logic gates involves metastable states of the atom and hence is not affected by spontaneous emission. These ideas can be extended to produce multiparticle entanglement

  1. Reconfigurable logic via gate controlled domain wall trajectory in magnetic network structure

    Science.gov (United States)

    Murapaka, C.; Sethi, P.; Goolaup, S.; Lew, W. S.

    2016-01-01

    An all-magnetic logic scheme has the advantages of being non-volatile and energy efficient over the conventional transistor based logic devices. In this work, we present a reconfigurable magnetic logic device which is capable of performing all basic logic operations in a single device. The device exploits the deterministic trajectory of domain wall (DW) in ferromagnetic asymmetric branch structure for obtaining different output combinations. The programmability of the device is achieved by using a current-controlled magnetic gate, which generates a local Oersted field. The field generated at the magnetic gate influences the trajectory of the DW within the structure by exploiting its inherent transverse charge distribution. DW transformation from vortex to transverse configuration close to the output branch plays a pivotal role in governing the DW chirality and hence the output. By simply switching the current direction through the magnetic gate, two universal logic gate functionalities can be obtained in this device. Using magnetic force microscopy imaging and magnetoresistance measurements, all basic logic functionalities are demonstrated. PMID:26839036

  2. Microdroplet-based universal logic gates by electrorheological fluid

    KAUST Repository

    Zhang, Mengying

    2011-01-01

    We demonstrate a uniquely designed microfluid logic gate with universal functionality, which is capable of conducting all 16 logic operations in one chip, with different input voltage combinations. A kind of smart colloid, giant electrorheological (GER) fluid, functions as the translation media among fluidic, electronic and mechanic information, providing us with the capability of performing large integrations either on-chip or off-chip, while the on-chip hybrid circuit is formed by the interconnection of the electric components and fluidic channels, where the individual microdroplets travelling in a channel represents a bit. The universal logic gate reveals the possibilities of achieving a large-scale microfluidic processor with more complexity for on-chip processing for biological, chemical as well as computational experiments. © 2011 The Royal Society of Chemistry.

  3. A Single MEMS Resonator for Reconfigurable Multifunctional Logic Gates

    KAUST Repository

    Tella, Sherif Adekunle

    2018-04-30

    Despite recent efforts toward true electromechanical resonator-based computing, achieving complex logics functions through cascading micro resonators has been deterred by challenges involved in their interconnections and the large required array of resonators. In this work we present a single micro electromechanical resonator with two outputs that enables the realization of multifunctional logic gates as well as other complex logic operations. As examples, we demonstrate the realization of the fundamental 2-bit logic gates of OR, XOR, AND, NOR, and a half adder. The device is based on a compound resonator consisting of a clamped-guided electrostatically actuated arch beam that is attached to another resonant beam from the side, which serves as an additional actuation electrode for the arch. The structure is also provided with an additional electrothermal tuning capability. The logic operations are based on the linear frequency modulations of the arch resonator and side microbeam. The device is compatible with CMOS fabrication process and works at room temperature

  4. A Single MEMS Resonator for Reconfigurable Multifunctional Logic Gates

    KAUST Repository

    Tella, Sherif Adekunle; Alcheikh, Nouha; Younis, Mohammad I.

    2018-01-01

    Despite recent efforts toward true electromechanical resonator-based computing, achieving complex logics functions through cascading micro resonators has been deterred by challenges involved in their interconnections and the large required array of resonators. In this work we present a single micro electromechanical resonator with two outputs that enables the realization of multifunctional logic gates as well as other complex logic operations. As examples, we demonstrate the realization of the fundamental 2-bit logic gates of OR, XOR, AND, NOR, and a half adder. The device is based on a compound resonator consisting of a clamped-guided electrostatically actuated arch beam that is attached to another resonant beam from the side, which serves as an additional actuation electrode for the arch. The structure is also provided with an additional electrothermal tuning capability. The logic operations are based on the linear frequency modulations of the arch resonator and side microbeam. The device is compatible with CMOS fabrication process and works at room temperature

  5. Proposal for multiple-valued logic in gated semiconducting carbon nanotubes

    Science.gov (United States)

    Dragoman, D.; Dragoman, M.

    2006-06-01

    The proposal for an implementation of multi-valued logical devices based on excited states of a single quantum well is analysed for various configurations of carbon nanotube quantum wells, which were already experimentally demonstrated at room temperature. The best configuration, which gathers all the advantages of multi-valued logic, is a gated carbon nanotube device where the quantum well is imprinted via DC voltages applied on gate electrodes.

  6. Synchronous implementation of optoelectronic NOR and XNOR logic gates using parallel synchronization of three chaotic lasers

    International Nuclear Information System (INIS)

    Yan Sen-Lin

    2014-01-01

    The parallel synchronization of three chaotic lasers is used to emulate optoelectronic logic NOR and XNOR gates via modulating the light and the current. We deduce a logical computational equation that governs the chaotic synchronization, logical input, and logical output. We construct fundamental gates based on the three chaotic lasers and define the computational principle depending on the parallel synchronization. The logic gate can be implemented by appropriately synchronizing two chaotic lasers. The system shows practicability and flexibility because it can emulate synchronously an XNOR gate, two NOR gates, and so on. The synchronization can still be deteceted when mismatches exist with a certain range. (general)

  7. Acoustic logic gates and Boolean operation based on self-collimating acoustic beams

    International Nuclear Information System (INIS)

    Zhang, Ting; Xu, Jian-yi; Cheng, Ying; Liu, Xiao-jun; Guo, Jian-zhong

    2015-01-01

    The reveal of self-collimation effect in two-dimensional (2D) photonic or acoustic crystals has opened up possibilities for signal manipulation. In this paper, we have proposed acoustic logic gates based on the linear interference of self-collimated beams in 2D sonic crystals (SCs) with line-defects. The line defects on the diagonal of the 2D square SCs are actually functioning as a 3 dB splitter. By adjusting the phase difference between two input signals, the basic Boolean logic functions such as XOR, OR, AND, and NOT are achieved both theoretically and experimentally. Due to the non-diffracting property of self-collimation beams, more complex Boolean logic and algorithms such as NAND, NOR, and XNOR can be realized by cascading the basic logic gates. The achievement of acoustic logic gates and Boolean operation provides a promising approach for acoustic signal computing and manipulations

  8. Design of polarization encoded all-optical 4-valued MAX logic gate and its applications

    Science.gov (United States)

    Chattopadhyay, Tanay; Nath Roy, Jitendra

    2013-07-01

    Quaternary maximum (QMAX) gate is one type of multi-valued logic gate. An all-optical scheme of polarization encoded quaternary (4-valued) MAX logic gate with the help of Terahertz Optical Asymmetric Demultiplexer (TOAD) based fiber interferometric switch is proposed and described. For the quaternary information processing in optics, the quaternary number (0, 1, 2, 3) can be represented by four discrete polarized states of light. Numerical simulation result confirming the described methods is given in this paper. Some applications of MAX gate in logical operation and memory device are also given.

  9. Classical Boolean logic gates with quantum systems

    International Nuclear Information System (INIS)

    Renaud, N; Joachim, C

    2011-01-01

    An analytical method is proposed to implement any classical Boolean function in a small quantum system by taking the advantage of its electronic transport properties. The logical input, α = {α 1 , ..., α N }, is used to control well-identified parameters of the Hamiltonian of the system noted H 0 (α). The logical output is encoded in the tunneling current intensity passing through the quantum system when connected to conducting electrodes. It is demonstrated how to implement the six symmetric two-input/one-output Boolean functions in a quantum system. This system can be switched from one logic function to another by changing its structural parameters. The stability of the logic gates is discussed, perturbing the Hamiltonian with noise sources and studying the effect of decoherence.

  10. Quantum logic gates based on ballistic transport in graphene

    Energy Technology Data Exchange (ETDEWEB)

    Dragoman, Daniela [Faculty of Physics, University of Bucharest, P.O. Box MG-11, 077125 Bucharest (Romania); Academy of Romanian Scientists, Splaiul Independentei 54, 050094 Bucharest (Romania); Dragoman, Mircea, E-mail: mircea.dragoman@imt.ro [National Institute for Research and Development in Microtechnology (IMT), P.O. Box 38-160, 023573 Bucharest (Romania)

    2016-03-07

    The paper presents various configurations for the implementation of graphene-based Hadamard, C-phase, controlled-NOT, and Toffoli gates working at room temperature. These logic gates, essential for any quantum computing algorithm, involve ballistic graphene devices for qubit generation and processing and can be fabricated using existing nanolithographical techniques. All quantum gate configurations are based on the very large mean-free-paths of carriers in graphene at room temperature.

  11. Fredkin gates for finite-valued reversible and conservative logics

    International Nuclear Information System (INIS)

    Cattaneo, G; Leporati, A; Leporini, R

    2002-01-01

    The basic principles and results of conservative logic introduced by Fredkin and Toffoli in 1982, on the basis of a seminal paper of Landauer, are extended to d-valued logics, with a special attention to three-valued logics. Different approaches to d-valued logics are examined in order to determine some possible universal sets of logic primitives. In particular, we consider the typical connectives of Lukasiewicz and Goedel logics, as well as Chang's MV-algebras. As a result, some possible three-valued and d-valued universal gates are described which realize a functionally complete set of fundamental connectives. Two no-go theorems are also proved

  12. Optical NOR logic gate design on square lattice photonic crystal platform

    Energy Technology Data Exchange (ETDEWEB)

    D’souza, Nirmala Maria, E-mail: nirmala@cukerala.ac.in; Mathew, Vincent, E-mail: vincent@cukerala.ac.in [Department of Physics, Central University of Kerala, Kasaragod, Kerala-671 314 (India)

    2016-05-06

    We numerically demonstrate a new configuration of all-optical NOR logic gate with square lattice photonic crystal (PhC) waveguide using finite difference time domain (FDTD) method. The logic operations are based on interference effect of optical waves. We have determined the operating frequency range by calculating the band structure for a perfectly periodic PhC using plane wave expansion (PWE) method. Response time of this logic gate is 1.98 ps and it can be operated with speed about 513 GB/s. The proposed device consists of four linear waveguides and a square ring resonator waveguides on PhC platform.

  13. A new quantum flux parametron logic gate with large input margin

    International Nuclear Information System (INIS)

    Hioe, W.; Hosoya, M.; Goto, E.

    1991-01-01

    This paper reports on the Quantum Flux Parametron (QFP) which is a flux transfer, flux activated Josephson logic device which realizes much lower power dissipation than other Josephson logic devices. Being a two-terminal device its correct operation may be affected by coupling to other QFPs. The problems include backcoupling from active QFPs through inactive QFPs (relay noise), coupling between QFPs activated at different times because of clock skew (homophase noise), and interaction between active QFPs (reaction hazard). Previous QFP circuits worked by wired-majority, which being a linear input logic, has low input margin. A new logic gate (D-gate) using a QFP to perform logic operations has been analyzed and tested by computer simulation. Relay noise, homophase noise and reaction hazard are substantially reduced. Moreover, the input have little interaction hence input margin is greatly improved

  14. Universal programmable logic gate and routing method

    Science.gov (United States)

    Fijany, Amir (Inventor); Vatan, Farrokh (Inventor); Akarvardar, Kerem (Inventor); Blalock, Benjamin (Inventor); Chen, Suheng (Inventor); Cristoloveanu, Sorin (Inventor); Kolawa, Elzbieta (Inventor); Mojarradi, Mohammad M. (Inventor); Toomarian, Nikzad (Inventor)

    2009-01-01

    An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.

  15. A fluorescent combinatorial logic gate with Na+, H+-enabled OR and H+-driven low-medium-high ternary logic functions.

    Science.gov (United States)

    Spiteri, Jasmine M A; Mallia, Carl J; Scerri, Glenn J; Magri, David C

    2017-12-06

    A novel fluorescent molecular logic gate with a 'fluorophore-spacer 1 -receptor 1 -spacer 2 -receptor 2 ' format is demonstrated in 1 : 1 (v/v) methanol/water. The molecule consists of an anthracene fluorophore, and tertiary alkyl amine and N-(2-methoxyphenyl)aza-15-crown-5 ether receptors. In the presence of threshold concentrations of H + and Na + , the molecule switches 'on' as an AND logic gate with a fluorescence quantum yield of 0.21 with proton and sodium binding constants of log β H+ = 9.0 and log β Na+ = 3.2, respectively. At higher proton levels, protonation also occurs at the anilinic nitrogen atom ether with a log β H+ = 4.2, which allows for Na + , H + -enabled OR (OR + AND circuit) and H + -driven ternary logic functions. The reported molecule is compared and contrasted to classic anthracene-based Na + and H + logic gates. We propose that such logic-based molecules could be useful tools for probing the vicinity of Na + , H + antiporters in biological systems.

  16. Quantum logic gates generated by SC-charge qubits coupled to a resonator

    International Nuclear Information System (INIS)

    Obada, A-S F; Hessian, H A; Mohamed, A-B A; Homid, Ali H

    2012-01-01

    We propose some quantum logic gates by using SC-charge qubits coupled to a resonator to study two types of quantum operation. By applying a classical magnetic field with the flux, a simple rotation on the target qubit is generated. Single and two-qubit gates of quantum logic gates are realized. Two-qubit joint operations are firstly generated by applying a classical magnetic field with the flux, and secondly by applying a classical magnetic field with the flux when qubits are placed a quarter of the distance along the resonator. A short discussion of fidelity is given to prove the success of the operations in implementing these gates. (paper)

  17. Transcending binary logic by gating three coupled quantum dots.

    Science.gov (United States)

    Klein, Michael; Rogge, S; Remacle, F; Levine, R D

    2007-09-01

    Physical considerations supported by numerical solution of the quantum dynamics including electron repulsion show that three weakly coupled quantum dots can robustly execute a complete set of logic gates for computing using three valued inputs and outputs. Input is coded as gating (up, unchanged, or down) of the terminal dots. A nanosecond time scale switching of the gate voltage requires careful numerical propagation of the dynamics. Readout is the charge (0, 1, or 2 electrons) on the central dot.

  18. A novel reversible logic gate and its systematic approach to implement cost-efficient arithmetic logic circuits using QCA.

    Science.gov (United States)

    Ahmad, Peer Zahoor; Quadri, S M K; Ahmad, Firdous; Bahar, Ali Newaz; Wani, Ghulam Mohammad; Tantary, Shafiq Maqbool

    2017-12-01

    Quantum-dot cellular automata, is an extremely small size and a powerless nanotechnology. It is the possible alternative to current CMOS technology. Reversible QCA logic is the most important issue at present time to reduce power losses. This paper presents a novel reversible logic gate called the F-Gate. It is simplest in design and a powerful technique to implement reversible logic. A systematic approach has been used to implement a novel single layer reversible Full-Adder, Full-Subtractor and a Full Adder-Subtractor using the F-Gate. The proposed Full Adder-Subtractor has achieved significant improvements in terms of overall circuit parameters among the most previously cost-efficient designs that exploit the inevitable nano-level issues to perform arithmetic computing. The proposed designs have been authenticated and simulated using QCADesigner tool ver. 2.0.3.

  19. New designs of a complete set of Photonic Crystals logic gates

    Science.gov (United States)

    Hussein, Hussein M. E.; Ali, Tamer A.; Rafat, Nadia H.

    2018-03-01

    In this paper, we introduce new designs of all-optical OR, AND, XOR, NOT, NOR, NAND and XNOR logic gates based on the interference effect. The designs are built using 2D square lattice Photonic Crystal (PhC) structure of dielectric rods embedded in air background. The lattice constant, a, and the rod radius, r, are designed to achieve maximum operating range of frequencies using the gap map. We use the Plane Wave Expansion (PWE) method to obtain the band structure and the gap map of the proposed designs. The operating wavelengths achieve a wide band range that varies between 1266.9 nm and 1996 nm with center wavelength at 1550 nm. The Finite-Difference Time-Domain (FDTD) method is used to study the field behavior inside the PhC gates. The gates satisfy their truth tables with reasonable power contrast ratio between logic '1' and logic '0'.

  20. Notes on stochastic (bio)-logic gates: computing with allosteric cooperativity.

    Science.gov (United States)

    Agliari, Elena; Altavilla, Matteo; Barra, Adriano; Dello Schiavo, Lorenzo; Katz, Evgeny

    2015-05-15

    Recent experimental breakthroughs have finally allowed to implement in-vitro reaction kinetics (the so called enzyme based logic) which code for two-inputs logic gates and mimic the stochastic AND (and NAND) as well as the stochastic OR (and NOR). This accomplishment, together with the already-known single-input gates (performing as YES and NOT), provides a logic base and paves the way to the development of powerful biotechnological devices. However, as biochemical systems are always affected by the presence of noise (e.g. thermal), standard logic is not the correct theoretical reference framework, rather we show that statistical mechanics can work for this scope: here we formulate a complete statistical mechanical description of the Monod-Wyman-Changeaux allosteric model for both single and double ligand systems, with the purpose of exploring their practical capabilities to express noisy logical operators and/or perform stochastic logical operations. Mixing statistical mechanics with logics, and testing quantitatively the resulting findings on the available biochemical data, we successfully revise the concept of cooperativity (and anti-cooperativity) for allosteric systems, with particular emphasis on its computational capabilities, the related ranges and scaling of the involved parameters and its differences with classical cooperativity (and anti-cooperativity).

  1. Large-Area CVD-Grown Sub-2 V ReS2 Transistors and Logic Gates.

    Science.gov (United States)

    Dathbun, Ajjiporn; Kim, Youngchan; Kim, Seongchan; Yoo, Youngjae; Kang, Moon Sung; Lee, Changgu; Cho, Jeong Ho

    2017-05-10

    We demonstrated the fabrication of large-area ReS 2 transistors and logic gates composed of a chemical vapor deposition (CVD)-grown multilayer ReS 2 semiconductor channel and graphene electrodes. Single-layer graphene was used as the source/drain and coplanar gate electrodes. An ion gel with an ultrahigh capacitance effectively gated the ReS 2 channel at a low voltage, below 2 V, through a coplanar gate. The contact resistance of the ion gel-gated ReS 2 transistors with graphene electrodes decreased dramatically compared with the SiO 2 -devices prepared with Cr electrodes. The resulting transistors exhibited good device performances, including a maximum electron mobility of 0.9 cm 2 /(V s) and an on/off current ratio exceeding 10 4 . NMOS logic devices, such as NOT, NAND, and NOR gates, were assembled using the resulting transistors as a proof of concept demonstration of the applicability of the devices to complex logic circuits. The large-area synthesis of ReS 2 semiconductors and graphene electrodes and their applications in logic devices open up new opportunities for realizing future flexible electronics based on 2D nanomaterials.

  2. Cell-to-Cell Communication Circuits: Quantitative Analysis of Synthetic Logic Gates

    Science.gov (United States)

    Hoffman-Sommer, Marta; Supady, Adriana; Klipp, Edda

    2012-01-01

    One of the goals in the field of synthetic biology is the construction of cellular computation devices that could function in a manner similar to electronic circuits. To this end, attempts are made to create biological systems that function as logic gates. In this work we present a theoretical quantitative analysis of a synthetic cellular logic-gates system, which has been implemented in cells of the yeast Saccharomyces cerevisiae (Regot et al., 2011). It exploits endogenous MAP kinase signaling pathways. The novelty of the system lies in the compartmentalization of the circuit where all basic logic gates are implemented in independent single cells that can then be cultured together to perform complex logic functions. We have constructed kinetic models of the multicellular IDENTITY, NOT, OR, and IMPLIES logic gates, using both deterministic and stochastic frameworks. All necessary model parameters are taken from literature or estimated based on published kinetic data, in such a way that the resulting models correctly capture important dynamic features of the included mitogen-activated protein kinase pathways. We analyze the models in terms of parameter sensitivity and we discuss possible ways of optimizing the system, e.g., by tuning the culture density. We apply a stochastic modeling approach, which simulates the behavior of whole populations of cells and allows us to investigate the noise generated in the system; we find that the gene expression units are the major sources of noise. Finally, the model is used for the design of system modifications: we show how the current system could be transformed to operate on three discrete values. PMID:22934039

  3. Three-valued logic gates in reaction-diffusion excitable media

    International Nuclear Information System (INIS)

    Motoike, Ikuko N.; Adamatzky, Andrew

    2005-01-01

    It is well established now that excitable media are capable of implementing of a wide range of computational operations, from image processing to logical computation to navigation of robots. The findings published so far in the field of logical computation were concerned solely with realization of boolean logic. This imposed somewhat artificial limitations on a suitability of excitable media for logical reasoning and restricted a range of possible applications of these non-classical computational devices in the field of artificial intelligence. In the paper we go beyond binary logic and show how to implement three-valued logical operations in toy models of geometrically constrained excitable media. We realize several types of logical gates, including Lukasiewicz conjunction and disjunction, and Sobocinski conjunction in cellular automata and FitzHugh-Nagumo models of T-shaped excitable media

  4. Multiple Independent Gate FETs: How Many Gates Do We Need?

    OpenAIRE

    Amarù, Luca; Hills, Gage; Gaillardon, Pierre-Emmanuel; Mitra, Subhasish; De Micheli, Giovanni

    2015-01-01

    Multiple Independent Gate Field Effect Transistors (MIGFETs) are expected to push FET technology further into the semiconductor roadmap. In a MIGFET, supplementary gates either provide (i) enhanced conduction properties or (ii) more intelligent switching functions. In general, each additional gate also introduces a side implementation cost. To enable more efficient digital systems, MIGFETs must leverage their expressive power to realize complex logic circuits with few physical resources. Rese...

  5. Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations

    Science.gov (United States)

    Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki

    2016-01-01

    Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.

  6. The mathematics of a quantum Hamiltonian computing half adder Boolean logic gate

    International Nuclear Information System (INIS)

    Dridi, G; Julien, R; Hliwa, M; Joachim, C

    2015-01-01

    The mathematics behind the quantum Hamiltonian computing (QHC) approach of designing Boolean logic gates with a quantum system are given. Using the quantum eigenvalue repulsion effect, the QHC AND, NAND, OR, NOR, XOR, and NXOR Hamiltonian Boolean matrices are constructed. This is applied to the construction of a QHC half adder Hamiltonian matrix requiring only six quantum states to fullfil a half Boolean logical truth table. The QHC design rules open a nano-architectronic way of constructing Boolean logic gates inside a single molecule or atom by atom at the surface of a passivated semi-conductor. (paper)

  7. The mathematics of a quantum Hamiltonian computing half adder Boolean logic gate.

    Science.gov (United States)

    Dridi, G; Julien, R; Hliwa, M; Joachim, C

    2015-08-28

    The mathematics behind the quantum Hamiltonian computing (QHC) approach of designing Boolean logic gates with a quantum system are given. Using the quantum eigenvalue repulsion effect, the QHC AND, NAND, OR, NOR, XOR, and NXOR Hamiltonian Boolean matrices are constructed. This is applied to the construction of a QHC half adder Hamiltonian matrix requiring only six quantum states to fullfil a half Boolean logical truth table. The QHC design rules open a nano-architectronic way of constructing Boolean logic gates inside a single molecule or atom by atom at the surface of a passivated semi-conductor.

  8. Prospects of luminescence based molecular scale logic gates and logic circuits

    International Nuclear Information System (INIS)

    Speiser, Shammai

    2016-01-01

    In recent years molecular electronics has emerged as a rapidly growing research field. The aim of this review is to introduce this subject as a whole with special emphasis on molecular scale potential devices and applications. As a particular example we will discuss all optical molecular scale logic gates and logic circuits based on molecular fluorescence and electronic excitation transfer processes. Charge and electronic energy transfers (ET and EET) are well-studied examples whereby different molecules can signal their state from one (the donor, D) to the other (the acceptor, A). We show how a half-adder logic circuit can be implemented on one molecule that can communicate its logic output as input to another half-adder molecule. This is achieved as an electronic energy transfer from a donor to an acceptor, thus implementing a molecular full adder. We discuss a specific pair, the rhodamine–azulene, for which there is considerable spectroscopic data, but the scheme is general enough to allow a wide choice of D and A pairs. We present results based on this pair, in which, for the first time, an all optical half-adder and full-adder logic circuits are implemented. - Highlights: • Molecular scale logic • Photoquenching • Full adder

  9. Prospects of luminescence based molecular scale logic gates and logic circuits

    Energy Technology Data Exchange (ETDEWEB)

    Speiser, Shammai, E-mail: speiser@technion.ac.il

    2016-01-15

    In recent years molecular electronics has emerged as a rapidly growing research field. The aim of this review is to introduce this subject as a whole with special emphasis on molecular scale potential devices and applications. As a particular example we will discuss all optical molecular scale logic gates and logic circuits based on molecular fluorescence and electronic excitation transfer processes. Charge and electronic energy transfers (ET and EET) are well-studied examples whereby different molecules can signal their state from one (the donor, D) to the other (the acceptor, A). We show how a half-adder logic circuit can be implemented on one molecule that can communicate its logic output as input to another half-adder molecule. This is achieved as an electronic energy transfer from a donor to an acceptor, thus implementing a molecular full adder. We discuss a specific pair, the rhodamine–azulene, for which there is considerable spectroscopic data, but the scheme is general enough to allow a wide choice of D and A pairs. We present results based on this pair, in which, for the first time, an all optical half-adder and full-adder logic circuits are implemented. - Highlights: • Molecular scale logic • Photoquenching • Full adder.

  10. A computational paradigm for dynamic logic-gates in neuronal activity

    Directory of Open Access Journals (Sweden)

    Amir eGoldental

    2014-04-01

    Full Text Available In 1943 McCulloch and Pitts suggested that the brain is composed of reliable logic-gates similar to the logic at the core of today's computers. This framework had a limited impact on neuroscience, since neurons exhibit far richer dynamics. Here we propose a new experimentally corroborated paradigm in which the truth tables of the brain's logic-gates are time dependent, i.e. dynamic logic-gates (DLGs. The truth tables of the DLGs depend on the history of their activity and the stimulation frequencies of their input neurons. Our experimental results are based on a procedure where conditioned stimulations were enforced on circuits of neurons embedded within a large-scale network of cortical cells in-vitro. We demonstrate that the underlying biological mechanism is the unavoidable increase of neuronal response latencies to ongoing stimulations, which imposes a non-uniform gradual stretching of network delays. The limited experimental results are confirmed and extended by simulations and theoretical arguments based on identical neurons with a fixed increase of the neuronal response latency per evoked spike. We anticipate our results to lead to better understanding of the suitability of this computational paradigm to account for the brain's functionalities and will require the development of new systematic mathematical methods beyond the methods developed for traditional Boolean algebra.

  11. Block QCA Fault-Tolerant Logic Gates

    Science.gov (United States)

    Firjany, Amir; Toomarian, Nikzad; Modarres, Katayoon

    2003-01-01

    Suitably patterned arrays (blocks) of quantum-dot cellular automata (QCA) have been proposed as fault-tolerant universal logic gates. These block QCA gates could be used to realize the potential of QCA for further miniaturization, reduction of power consumption, increase in switching speed, and increased degree of integration of very-large-scale integrated (VLSI) electronic circuits. The limitations of conventional VLSI circuitry, the basic principle of operation of QCA, and the potential advantages of QCA-based VLSI circuitry were described in several NASA Tech Briefs articles, namely Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), Vol. 25, No. 10 (October 2001), page 42; Compact Interconnection Networks Based on Quantum Dots (NPO-20855) Vol. 27, No. 1 (January 2003), page 32; Bit-Serial Adder Based on Quantum Dots (NPO-20869), Vol. 27, No. 1 (January 2003), page 35; and Hybrid VLSI/QCA Architecture for Computing FFTs (NPO-20923), which follows this article. To recapitulate the principle of operation (greatly oversimplified because of the limitation on space available for this article): A quantum-dot cellular automata contains four quantum dots positioned at or between the corners of a square cell. The cell contains two extra mobile electrons that can tunnel (in the quantummechanical sense) between neighboring dots within the cell. The Coulomb repulsion between the two electrons tends to make them occupy antipodal dots in the cell. For an isolated cell, there are two energetically equivalent arrangements (denoted polarization states) of the extra electrons. The cell polarization is used to encode binary information. Because the polarization of a nonisolated cell depends on Coulomb-repulsion interactions with neighboring cells, universal logic gates and binary wires could be constructed, in principle, by arraying QCA of suitable design in suitable patterns. Heretofore, researchers have recognized two major obstacles to realization of QCA

  12. Logic-type Schmitt circuit using multi-valued gates

    Science.gov (United States)

    Wakui, M.; Tanaka, M.

    Logic-type Schmitt circuits (LTSCs) proposed in this paper by author's proposal are a new detector for a multi-valued multi-threshold logic circuit, and it realizes the high resolution with a little hysteresis or the high noise margin. The detector consists of the combinations of the multi-valued gates (MVGs) and a positive reaction device (PRD), and each circuit can be realized by the conventional elements. This paper shows their practical circuits, and describes the regions and the conditions for their operation.

  13. Disjointness of Stabilizer Codes and Limitations on Fault-Tolerant Logical Gates

    Science.gov (United States)

    Jochym-O'Connor, Tomas; Kubica, Aleksander; Yoder, Theodore J.

    2018-04-01

    Stabilizer codes are among the most successful quantum error-correcting codes, yet they have important limitations on their ability to fault tolerantly compute. Here, we introduce a new quantity, the disjointness of the stabilizer code, which, roughly speaking, is the number of mostly nonoverlapping representations of any given nontrivial logical Pauli operator. The notion of disjointness proves useful in limiting transversal gates on any error-detecting stabilizer code to a finite level of the Clifford hierarchy. For code families, we can similarly restrict logical operators implemented by constant-depth circuits. For instance, we show that it is impossible, with a constant-depth but possibly geometrically nonlocal circuit, to implement a logical non-Clifford gate on the standard two-dimensional surface code.

  14. Reversible logic gates based on enzyme-biocatalyzed reactions and realized in flow cells: a modular approach.

    Science.gov (United States)

    Fratto, Brian E; Katz, Evgeny

    2015-05-18

    Reversible logic gates, such as the double Feynman gate, Toffoli gate and Peres gate, with 3-input/3-output channels are realized using reactions biocatalyzed with enzymes and performed in flow systems. The flow devices are constructed using a modular approach, where each flow cell is modified with one enzyme that biocatalyzes one chemical reaction. The multi-step processes mimicking the reversible logic gates are organized by combining the biocatalytic cells in different networks. This work emphasizes logical but not physical reversibility of the constructed systems. Their advantages and disadvantages are discussed and potential use in biosensing systems, rather than in computing devices, is suggested. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  15. Unconventional geometric logic gate in a strong-driving-assisted multi-mode cavity

    International Nuclear Information System (INIS)

    Chang-Ning, Pan; Di-Wu, Yang; Xue-Hui, Zhao; Mao-Fa, Fang

    2010-01-01

    We propose a scheme to implement an unconventional geometric logic gate separately in a two-mode cavity and a multi-mode cavity assisted by a strong classical driving field. The effect of the cavity decay is included in the investigation. The numerical calculation is carried out, and the result shows that our scheme is more tolerant to cavity decay than the previous one because the time consumed for finishing the logic gate is doubly reduced. (general)

  16. Programming the quorum sensing-based AND gate in Shewanella oneidensis for logic gated-microbial fuel cells.

    Science.gov (United States)

    Hu, Yidan; Yang, Yun; Katz, Evgeny; Song, Hao

    2015-03-11

    An AND logic gate based on a synthetic quorum-sensing (QS) module was constructed in a Shewanella oneidensis MR-1 mtrA knockout mutant. The presence of two input signals activated the expression of a periplasmic decaheme cytochrome MtrA to regenerate the extracellular electron transfer conduit, enabling the construction of AND-gated microbial fuel cells.

  17. Universal logic gates via liquid-electronic hybrid divider

    KAUST Repository

    Zhou, Bingpu

    2012-01-01

    We demonstrated two-input microdroplet-based universal logic gates using a liquid-electronic hybrid divider. All 16 Boolean logic functions have been realized by manipulating the applied voltages. The novel platform consists of a microfluidic chip with integrated microdroplet detectors and external electronic components. The microdroplet detectors act as the communication media for fluidic and electronic information exchange. The presence or absence of microdroplets at the detector translates into the binary signal 1 or 0. The embedded micro-mechanical pneumatically actuated valve (PAV), fabricated using the well-developed multilayer soft lithography technique, offers biocompatibility, flexibility and accuracy for the on-chip realization of different logic functions. The microfluidic chip can be scaled up to construct large-scale microfluidic logic computation. On the other hand, the microfluidic chip with a specific logic function can be applied to droplet-based chemical reactions for on-demand bio or chemical analysis. Our experimental results have presented an autonomously driven, precision-controlled microfluidic chip for chemical reactions based on the IF logic function. © 2012 The Royal Society of Chemistry.

  18. Practical digital electronics for technicians

    CERN Document Server

    Kimber, Will

    2013-01-01

    Practical Digital Electronics for Technicians covers topics on analog and digital signals, logic gates, combinational logic, and Karnaugh mapping. The book discusses the characteristics and types of logic families; sequential systems including latch, bistable circuits, counters and shift registers; Schmitt triggers and multivibrators; and MSI combinational logic systems. Display devices, including LED, LCD and dot matrix display; analog and digital conversion; and examples of and equipment for digital fault finding are also considered. The book concludes by providing answers to the questions

  19. Shape changing collisions of optical solitons, universal logic gates ...

    Indian Academy of Sciences (India)

    ... in optical media such as multicore fibers, photorefractive materials and so on. ... of logic gates and Turing equivalent all optical computers in homogeneous bulk media as shown by Steiglitz recently. ... Pramana – Journal of Physics | News.

  20. Electron spin for classical information processing: a brief survey of spin-based logic devices, gates and circuits

    International Nuclear Information System (INIS)

    Bandyopadhyay, Supriyo; Cahay, Marc

    2009-01-01

    In electronics, information has been traditionally stored, processed and communicated using an electron's charge. This paradigm is increasingly turning out to be energy-inefficient, because movement of charge within an information processing device invariably causes current flow and an associated dissipation. Replacing 'charge' with the 'spin' of an electron to encode information may eliminate much of this dissipation and lead to more energy-efficient 'green electronics'. This realization has spurred significant research in spintronic devices and circuits where spin either directly acts as the physical variable for hosting information or augments the role of charge. In this review article, we discuss and elucidate some of these ideas, and highlight their strengths and weaknesses. Many of them can potentially reduce energy dissipation significantly, but unfortunately are error-prone and unreliable. Moreover, there are serious obstacles to their technological implementation that may be difficult to overcome in the near term. This review addresses three constructs: (1) single devices or binary switches that can be constituents of Boolean logic gates for digital information processing, (2) complete gates that are capable of performing specific Boolean logic operations, and (3) combinational circuits or architectures (equivalent to many gates working in unison) that are capable of performing universal computation. (topical review)

  1. Simultaneous G-Quadruplex DNA Logic.

    Science.gov (United States)

    Bader, Antoine; Cockroft, Scott L

    2018-04-03

    A fundamental principle of digital computer operation is Boolean logic, where inputs and outputs are described by binary integer voltages. Similarly, inputs and outputs may be processed on the molecular level as exemplified by synthetic circuits that exploit the programmability of DNA base-pairing. Unlike modern computers, which execute large numbers of logic gates in parallel, most implementations of molecular logic have been limited to single computing tasks, or sensing applications. This work reports three G-quadruplex-based logic gates that operate simultaneously in a single reaction vessel. The gates respond to unique Boolean DNA inputs by undergoing topological conversion from duplex to G-quadruplex states that were resolved using a thioflavin T dye and gel electrophoresis. The modular, addressable, and label-free approach could be incorporated into DNA-based sensors, or used for resolving and debugging parallel processes in DNA computing applications. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  2. A parity checker circuit based on microelectromechanical resonator logic elements

    Energy Technology Data Exchange (ETDEWEB)

    Hafiz, Md Abdullah Al, E-mail: abdullah.hafiz@kaust.edu.sa [CEMSE Division, King Abdullah University of Science and Technology, Thuwal (Saudi Arabia); Li, Ren [CEMSE Division, King Abdullah University of Science and Technology, Thuwal (Saudi Arabia); Younis, Mohammad I. [PSE Division, King Abdullah University of Science and Technology, Thuwal (Saudi Arabia); Fariborzi, Hossein [CEMSE Division, King Abdullah University of Science and Technology, Thuwal (Saudi Arabia)

    2017-03-03

    Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro-resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized. - Highlights: • A 4-bit parity checker circuit is proposed and demonstrated based on MEMS resonator based logic elements. • Multiple copies of MEMS resonator based XOR logic gates are used to construct a complex logic circuit. • Functionality and feasibility of micro-resonator based logic platform is demonstrated.

  3. Redox-Enabled, pH-Disabled Pyrazoline-Ferrocene INHIBIT Logic Gates.

    Science.gov (United States)

    Scerri, Glenn J; Cini, Miriam; Schembri, Jonathan S; da Costa, Paola F; Johnson, Alex D; Magri, David C

    2017-07-05

    Pyrazoline-ferrocene conjugates with an "electron-donor-spacer-fluorophore-receptor" format are demonstrated as redox-fluorescent two-input INHIBIT logic gates. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  4. Passive linear-optics 640 Gbit/s logic NOT gate

    DEFF Research Database (Denmark)

    Maram, Reza; Kong, Deming; Galili, Michael

    2015-01-01

    We experimentally demonstrate a 640 Gbit/s all-optical NOT gate for high-speed telecommunication on-off-keying (OOK) data signals. We employ linear optical signal processing based on spectral phase-only (all-pass) optical filtering to perform the target logic NOT operation....

  5. Implementation of a three-qubit refined Deutsch-Jozsa algorithm using SFG quantum logic gates

    International Nuclear Information System (INIS)

    Duce, A Del; Savory, S; Bayvel, P

    2006-01-01

    In this paper we present a quantum logic circuit which can be used for the experimental demonstration of a three-qubit solid state quantum computer based on a recent proposal of optically driven quantum logic gates. In these gates, the entanglement of randomly placed electron spin qubits is manipulated by optical excitation of control electrons. The circuit we describe solves the Deutsch problem with an improved algorithm called the refined Deutsch-Jozsa algorithm. We show that it is possible to select optical pulses that solve the Deutsch problem correctly, and do so without losing quantum information to the control electrons, even though the gate parameters vary substantially from one gate to another

  6. Implementation of a three-qubit refined Deutsch-Jozsa algorithm using SFG quantum logic gates

    Energy Technology Data Exchange (ETDEWEB)

    Duce, A Del; Savory, S; Bayvel, P [Department of Electronic and Electrical Engineering, University College London, Torrington Place, London WC1E 7JE (United Kingdom)

    2006-05-31

    In this paper we present a quantum logic circuit which can be used for the experimental demonstration of a three-qubit solid state quantum computer based on a recent proposal of optically driven quantum logic gates. In these gates, the entanglement of randomly placed electron spin qubits is manipulated by optical excitation of control electrons. The circuit we describe solves the Deutsch problem with an improved algorithm called the refined Deutsch-Jozsa algorithm. We show that it is possible to select optical pulses that solve the Deutsch problem correctly, and do so without losing quantum information to the control electrons, even though the gate parameters vary substantially from one gate to another.

  7. Implementation of a three-qubit refined Deutsch Jozsa algorithm using SFG quantum logic gates

    Science.gov (United States)

    DelDuce, A.; Savory, S.; Bayvel, P.

    2006-05-01

    In this paper we present a quantum logic circuit which can be used for the experimental demonstration of a three-qubit solid state quantum computer based on a recent proposal of optically driven quantum logic gates. In these gates, the entanglement of randomly placed electron spin qubits is manipulated by optical excitation of control electrons. The circuit we describe solves the Deutsch problem with an improved algorithm called the refined Deutsch-Jozsa algorithm. We show that it is possible to select optical pulses that solve the Deutsch problem correctly, and do so without losing quantum information to the control electrons, even though the gate parameters vary substantially from one gate to another.

  8. Electro-optical logic gates based on graphene-silicon waveguides

    Science.gov (United States)

    Chen, Weiwei; Yang, Longzhi; Wang, Pengjun; Zhang, Yawei; Zhou, Liqiang; Yang, Tianjun; Wang, Yang; Yang, Jianyi

    2016-08-01

    In this paper, designs of electro-optical AND/NAND, OR/ NOR, XOR/XNOR logic gates based on cascaded silicon graphene switches and regular 2×1 multimode interference combiners are presented. Each switch consists of a Mach-Zehnder interferometer in which silicon slot waveguides embedded with graphene flakes are designed for phase shifters. High-speed switching function is achieved by applying an electrical signal to tune the Fermi levels of graphene flakes causing the variation of modal effective index. Calculation results show the crosstalk in the proposed optical switch is lower than -22.9 dB within a bandwidth from 1510 nm to 1600 nm. The designed six electro-optical logic gates with the operation speed of 10 Gbit/s have a minimum extinction ratio of 35.6 dB and a maximum insertion loss of 0.21 dB for transverse electric modes at 1.55 μm.

  9. A parity checker circuit based on microelectromechanical resonator logic elements

    KAUST Repository

    Hafiz, Md Abdullah Al

    2017-01-11

    Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized.

  10. A parity checker circuit based on microelectromechanical resonator logic elements

    KAUST Repository

    Hafiz, Md Abdullah Al; Li, Ren; Younis, Mohammad I.; Fariborzi, Hossein

    2017-01-01

    Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized.

  11. "Plug and play" logic gates based on fluorescence switching regulated by self-assembly of nucleotide and lanthanide ions.

    Science.gov (United States)

    Pu, Fang; Ren, Jinsong; Qu, Xiaogang

    2014-06-25

    Molecular logic gates in response to chemical, biological, or optical input signals at a molecular level have received much interest over the past decade. Herein, we construct "plug and play" logic systems based on the fluorescence switching of guest molecules confined in coordination polymer nanoparticles generated from nucleotide and lanthanide ions. In the system, the addition of new modules directly enables new logic functions. PASS 0, YES, PASS 1, NOT, IMP, OR, and AND gates are successfully constructed in sequence. Moreover, different logic gates (AND, INH, and IMP) can be constructed using different guest molecules and the same input combinations. The work will be beneficial to the future logic design and expand the applications of coordination polymers.

  12. Realization of a quantum Hamiltonian Boolean logic gate on the Si(001):H surface.

    Science.gov (United States)

    Kolmer, Marek; Zuzak, Rafal; Dridi, Ghassen; Godlewski, Szymon; Joachim, Christian; Szymonski, Marek

    2015-08-07

    The design and construction of the first prototypical QHC (Quantum Hamiltonian Computing) atomic scale Boolean logic gate is reported using scanning tunnelling microscope (STM) tip-induced atom manipulation on an Si(001):H surface. The NOR/OR gate truth table was confirmed by dI/dU STS (Scanning Tunnelling Spectroscopy) tracking how the surface states of the QHC quantum circuit on the Si(001):H surface are shifted according to the input logical status.

  13. Logic gates and antisense DNA devices operating on a translator nucleic Acid scaffold.

    Science.gov (United States)

    Shlyahovsky, Bella; Li, Yang; Lioubashevski, Oleg; Elbaz, Johann; Willner, Itamar

    2009-07-28

    A series of logic gates, "AND", "OR", and "XOR", are designed using a DNA scaffold that includes four "footholds" on which the logic operations are activated. Two of the footholds represent input-recognition strands, and these are blocked by complementary nucleic acids, whereas the other two footholds are blocked by nucleic acids that include the horseradish peroxidase (HRP)-mimicking DNAzyme sequence. The logic gates are activated by either nucleic acid inputs that hybridize to the respective "footholds", or by low-molecular-weight inputs (adenosine monophosphate or cocaine) that yield the respective aptamer-substrate complexes. This results in the respective translocation of the blocking nucleic acids to the footholds carrying the HRP-mimicking DNAzyme sequence, and the concomitant release of the respective DNAzyme. The released product-strands then self-assemble into the hemin/G-quadruplex-HRP-mimicking DNAzyme that biocatalyzes the formation of a colored product and provides an output signal for the different logic gates. The principle of the logic operation is, then, implemented as a possible paradigm for future nanomedicine. The nucleic acid inputs that bind to the blocked footholds result in the translocation of the blocking nucleic acids to the respective footholds carrying the antithrombin aptamer. The released aptamer inhibits, then, the hydrolytic activity of thrombin. The system demonstrates the regulation of a biocatalytic reaction by a translator system activated on a DNA scaffold.

  14. Three-input gate logic circuits on chemically assembled single-electron transistors with organic and inorganic hybrid passivation layers.

    Science.gov (United States)

    Majima, Yutaka; Hackenberger, Guillaume; Azuma, Yasuo; Kano, Shinya; Matsuzaki, Kosuke; Susaki, Tomofumi; Sakamoto, Masanori; Teranishi, Toshiharu

    2017-01-01

    Single-electron transistors (SETs) are sub-10-nm scale electronic devices based on conductive Coulomb islands sandwiched between double-barrier tunneling barriers. Chemically assembled SETs with alkanethiol-protected Au nanoparticles show highly stable Coulomb diamonds and two-input logic operations. The combination of bottom-up and top-down processes used to form the passivation layer is vital for realizing multi-gate chemically assembled SET circuits, as this combination enables us to connect conventional complementary metal oxide semiconductor (CMOS) technologies via planar processes. Here, three-input gate exclusive-OR (XOR) logic operations are demonstrated in passivated chemically assembled SETs. The passivation layer is a hybrid bilayer of self-assembled monolayers (SAMs) and pulsed laser deposited (PLD) aluminum oxide (AlO[Formula: see text]), and top-gate electrodes were prepared on the hybrid passivation layers. Top and two-side-gated SETs showed clear Coulomb oscillation and diamonds for each of the three available gates, and three-input gate XOR logic operation was clearly demonstrated. These results show the potential of chemically assembled SETs to work as logic devices with multi-gate inputs using organic and inorganic hybrid passivation layers.

  15. Microelectromechanical resonator based digital logic elements

    KAUST Repository

    Hafiz, Md Abdullah Al

    2016-10-20

    Micro/nano-electromechanical resonator based mechanical computing has recently attracted significant attention. However, its full realization has been hindered by the difficulty in realizing complex combinational logics, in which the logic function is constructed by cascading multiple smaller logic blocks. In this work we report an alternative approach for implementation of digital logic core elements, multiplexer and demultiplexer, which can be used to realize combinational logic circuits by suitable concatenation. Toward this, shallow arch shaped microresonators are electrically connected and their resonance frequencies are tuned based on an electrothermal frequency modulation scheme. This study demonstrates that by reconfiguring the same basic building block, the arch microresonator, complex logic circuits can be realized.

  16. Microelectromechanical resonator based digital logic elements

    KAUST Repository

    Hafiz, Md Abdullah Al; Kosuru, Lakshmoji; Younis, Mohammad I.; Fariborzi, Hossein

    2016-01-01

    Micro/nano-electromechanical resonator based mechanical computing has recently attracted significant attention. However, its full realization has been hindered by the difficulty in realizing complex combinational logics, in which the logic function is constructed by cascading multiple smaller logic blocks. In this work we report an alternative approach for implementation of digital logic core elements, multiplexer and demultiplexer, which can be used to realize combinational logic circuits by suitable concatenation. Toward this, shallow arch shaped microresonators are electrically connected and their resonance frequencies are tuned based on an electrothermal frequency modulation scheme. This study demonstrates that by reconfiguring the same basic building block, the arch microresonator, complex logic circuits can be realized.

  17. Field-Programmable Gate Array-based fluxgate magnetometer with digital integration

    Science.gov (United States)

    Butta, Mattia; Janosek, Michal; Ripka, Pavel

    2010-05-01

    In this paper, a digital magnetometer based on printed circuit board fluxgate is presented. The fluxgate is pulse excited and the signal is extracted by gate integration. We investigate the possibility to perform integration on very narrow gates (typically 500 ns) by using digital techniques. The magnetometer is based on field-programmable gate array (FPGA) card: we will show all the advantages and disadvantages, given by digitalization of fluxgate output voltage by means of analog-to-digital converter on FPGA card, as well as digitalization performed by external digitizer. Due to very narrow gate, it is shown that a magnetometer entirely based on a FPGA card is preferable, because it avoids noise due to trigger instability. Both open loop and feedback operative mode are described and achieved results are presented.

  18. High-Fidelity Quantum Logic Gates Using Trapped-Ion Hyperfine Qubits.

    Science.gov (United States)

    Ballance, C J; Harty, T P; Linke, N M; Sepiol, M A; Lucas, D M

    2016-08-05

    We demonstrate laser-driven two-qubit and single-qubit logic gates with respective fidelities 99.9(1)% and 99.9934(3)%, significantly above the ≈99% minimum threshold level required for fault-tolerant quantum computation, using qubits stored in hyperfine ground states of calcium-43 ions held in a room-temperature trap. We study the speed-fidelity trade-off for the two-qubit gate, for gate times between 3.8  μs and 520  μs, and develop a theoretical error model which is consistent with the data and which allows us to identify the principal technical sources of infidelity.

  19. Realization of morphing logic gates in a repressilator with quorum sensing feedback

    International Nuclear Information System (INIS)

    Agrawal, Vidit; Kang, Shivpal Singh; Sinha, Sudeshna

    2014-01-01

    We demonstrate how a genetic ring oscillator network with quorum sensing feedback can operate as a robust logic gate. Specifically we show how a range of logic functions, namely AND/NAND, OR/NOR and XOR/XNOR, can be realized by the system, thus yielding a versatile unit that can morph between different logic operations. We further demonstrate the capacity of this system to yield complementary logic operations in parallel. Our results then indicate the computing potential of this biological system, and may lead to bio-inspired computing devices.

  20. Realization of morphing logic gates in a repressilator with quorum sensing feedback

    Energy Technology Data Exchange (ETDEWEB)

    Agrawal, Vidit; Kang, Shivpal Singh; Sinha, Sudeshna

    2014-03-01

    We demonstrate how a genetic ring oscillator network with quorum sensing feedback can operate as a robust logic gate. Specifically we show how a range of logic functions, namely AND/NAND, OR/NOR and XOR/XNOR, can be realized by the system, thus yielding a versatile unit that can morph between different logic operations. We further demonstrate the capacity of this system to yield complementary logic operations in parallel. Our results then indicate the computing potential of this biological system, and may lead to bio-inspired computing devices.

  1. Design of quaternary logic circuit using quantum dot gate-quantum dot channel FET (QDG-QDCFET)

    Science.gov (United States)

    Karmakar, Supriya

    2014-10-01

    This paper presents the implementation of quaternary logic circuits based on quantum dot gate-quantum dot channel field effect transistor (QDG-QDCFET). The super lattice structure in the quantum dot channel region of QDG-QDCFET and the electron tunnelling from inversion channel to the quantum dot layer in the gate region of a QDG-QDCFET change the threshold voltage of this device which produces two intermediate states between its ON and OFF states. This property of QDG-QDCFET is used to implement multi-valued logic for future multi-valued logic circuit. This paper presents the design of basic quaternary logic operation such as inverter, AND and OR operation based on QDG-QDCFET.

  2. Parallel Transport Quantum Logic Gates with Trapped Ions.

    Science.gov (United States)

    de Clercq, Ludwig E; Lo, Hsiang-Yu; Marinelli, Matteo; Nadlinger, David; Oswald, Robin; Negnevitsky, Vlad; Kienzler, Daniel; Keitch, Ben; Home, Jonathan P

    2016-02-26

    We demonstrate single-qubit operations by transporting a beryllium ion with a controlled velocity through a stationary laser beam. We use these to perform coherent sequences of quantum operations, and to perform parallel quantum logic gates on two ions in different processing zones of a multiplexed ion trap chip using a single recycled laser beam. For the latter, we demonstrate individually addressed single-qubit gates by local control of the speed of each ion. The fidelities we observe are consistent with operations performed using standard methods involving static ions and pulsed laser fields. This work therefore provides a path to scalable ion trap quantum computing with reduced requirements on the optical control complexity.

  3. Probing Dense Sprays with Gated, Picosecond, Digital Particle Field Holography

    Directory of Open Access Journals (Sweden)

    James Trolinger

    2011-12-01

    Full Text Available This paper describes work that demonstrated the feasibility of producing a gated digital holography system that is capable of producing high-resolution images of three-dimensional particle and structure details deep within dense particle fields of a spray. We developed a gated picosecond digital holocamera, using optical Kerr cell gating, to demonstrate features of gated digital holography that make it an exceptional candidate for this application. The Kerr cell gate shuttered the camera after the initial burst of ballistic and snake photons had been recorded, suppressing longer path, multiple scattered illumination. By starting with a CW laser without gating and then incorporating a picosecond laser and an optical Kerr gate, we were able to assess the imaging quality of the gated holograms, and determine improvement gained by gating. We produced high quality images of 50–200 μm diameter particles, hairs and USAF resolution charts from digital holograms recorded through turbid media where more than 98% of the light was scattered from the field. The system can gate pulses as short as 3 mm in pathlength (10 ps, enabling image-improving features of the system. The experiments lead us to the conclusion that this method has an excellent capability as a diagnostics tool in dense spray combustion research.

  4. Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory

    Energy Technology Data Exchange (ETDEWEB)

    Li, Y.; Zhong, Y. P.; Deng, Y. F.; Zhou, Y. X.; Xu, L.; Miao, X. S., E-mail: miaoxs@mail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics (WNLO), Huazhong University of Science and Technology (HUST), Wuhan 430074 (China); School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074 (China)

    2013-12-21

    Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.

  5. Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory

    International Nuclear Information System (INIS)

    Li, Y.; Zhong, Y. P.; Deng, Y. F.; Zhou, Y. X.; Xu, L.; Miao, X. S.

    2013-01-01

    Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices

  6. Nanoeletromechanical switch and logic circuits formed therefrom

    Science.gov (United States)

    Nordquist, Christopher D [Albuquerque, NM; Czaplewski, David A [Albuquerque, NM

    2010-05-18

    A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.

  7. Chemical switches and logic gates based on surface modified semiconductors

    Energy Technology Data Exchange (ETDEWEB)

    Konrad, Szacilowski; Wojciech, Macyk [Jagiellonian Univ., Dept. of Chemistry, Krakow (Poland)

    2006-02-15

    Photoelectrochemical properties of multicomponent photo-electrodes based on titanium dioxide and cadmium sulfide powders modified with hexacyanoferrate complexes have been examined. Photocurrent responses were recorded as functions of applied potential and photon energy. Surprisingly, the photocurrent can be switched between positive and negative values as a result of potential or photon energy changes. This new effect called Photo Electrochemical Photocurrent Switching (PEPS) opens a possibility of new chemical switches and logic gates construction. Boolean logic analysis and a tentative mechanism of the device are discussed. (authors)

  8. Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata

    Directory of Open Access Journals (Sweden)

    Ali Newaz Bahar

    2017-02-01

    Full Text Available This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T=2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed.

  9. Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata.

    Science.gov (United States)

    Bahar, Ali Newaz; Rahman, Mohammad Maksudur; Nahid, Nur Mohammad; Hassan, Md Kamrul

    2017-02-01

    This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T =2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed.

  10. Quantum cost optimized design of 4-bit reversible universal shift register using reduced number of logic gate

    Science.gov (United States)

    Maity, H.; Biswas, A.; Bhattacharjee, A. K.; Pal, A.

    In this paper, we have proposed the design of quantum cost (QC) optimized 4-bit reversible universal shift register (RUSR) using reduced number of reversible logic gates. The proposed design is very useful in quantum computing due to its low QC, less no. of reversible logic gate and less delay. The QC, no. of gates, garbage outputs (GOs) are respectively 64, 8 and 16 for proposed work. The improvement of proposed work is also presented. The QC is 5.88% to 70.9% improved, no. of gate is 60% to 83.33% improved with compared to latest reported result.

  11. Enzyme-Based Logic Gates and Networks with Output Signals Analyzed by Various Methods.

    Science.gov (United States)

    Katz, Evgeny

    2017-07-05

    The paper overviews various methods that are used for the analysis of output signals generated by enzyme-based logic systems. The considered methods include optical techniques (optical absorbance, fluorescence spectroscopy, surface plasmon resonance), electrochemical techniques (cyclic voltammetry, potentiometry, impedance spectroscopy, conductivity measurements, use of field effect transistor devices, pH measurements), and various mechanoelectronic methods (using atomic force microscope, quartz crystal microbalance). Although each of the methods is well known for various bioanalytical applications, their use in combination with the biomolecular logic systems is rather new and sometimes not trivial. Many of the discussed methods have been combined with the use of signal-responsive materials to transduce and amplify biomolecular signals generated by the logic operations. Interfacing of biocomputing logic systems with electronics and "smart" signal-responsive materials allows logic operations be extended to actuation functions; for example, stimulating molecular release and switchable features of bioelectronic devices, such as biofuel cells. The purpose of this review article is to emphasize the broad variability of the bioanalytical systems applied for signal transduction in biocomputing processes. All bioanalytical systems discussed in the article are exemplified with specific logic gates and multi-gate networks realized with enzyme-based biocatalytic cascades. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  12. An Automated Test Framework for Experimenting with Stochastic Behavior in Reconfigurable Logic

    DEFF Research Database (Denmark)

    Birklykke, Alex Aaen; Le Moullec, Yannick; Alminde, Lars

    2012-01-01

    In this paper, we present an automated test frame- work for the characterization of stochastic behavior in logic circuits. The framework is intended as a platform for experimenting with and providing statistics on digital architectures given behavioral uncertainties at the gate-level. As an exper......In this paper, we present an automated test frame- work for the characterization of stochastic behavior in logic circuits. The framework is intended as a platform for experimenting with and providing statistics on digital architectures given behavioral uncertainties at the gate...... block subject to voltage/frequency scaling and Vdd -noise. The framework provides easy interfacing with laboratory equipment, design of experiment capabilities and automatic test execution, thus providing a powerful tool for characterizing stochastic behavior in reconfigurable logic....

  13. Speed Geometric Quantum Logical Gate Based on Double-Hamiltonian Evolution under Large-Detuning Cavity QED Model

    International Nuclear Information System (INIS)

    Chen Changyong; Liu Zongliang; Kang Shuai; Li Shaohua

    2010-01-01

    We introduce the double-Hamiltonian evolution technique approach to investigate the unconventional geometric quantum logical gate with dissipation under the model of many identical three-level atoms in a cavity, driven by a classical field. Our concrete calculation is made for the case of two atoms for the large-detuning interaction of the atoms with the cavity mode. The main advantage of our scheme is of eliminating the photon flutuation in the cavity mode during the gating. The corresponding analytical results will be helpful for experimental realization of speed geometric quantum logical gate in real cavities. (general)

  14. Digital logic circuit design with ALTERA MAX+PLUS II

    International Nuclear Information System (INIS)

    Lee, Seung Ho; Park, Yong Su; Park, Gun Jong; Lee, Ju Heon

    2006-09-01

    This book is composed of five parts. The first part has introduction of ALTERA MAX+PLUS II and graphic editor, text editor, compiler, waveform editor simulator and timing analyzer of it. The second part is about direction of digital logic circuit design with training kit. The third part has grammar and practice of VHDL in ALTERA MAX+PLUS II including example and history of VHDL. The fourth part shows the design example of digital logic circuit by VHDL of ALTERA MAX+PLUS II which lists designs of adder and subtractor, code converter, counter, state machine and LCD module. The last part explains design example of digital logic circuit by graphic editor in ALTERA MAX+PLUS II.

  15. All-optical XOR logic gate using intersubband transition in III-V quantum well materials.

    Science.gov (United States)

    Feng, Jijun; Akimoto, Ryoichi; Gozu, Shin-ichiro; Mozume, Teruo

    2014-06-02

    A monolithically integrated all-optical exclusive-OR (XOR) logic gate is experimentally demonstrated based on a Michelson interferometer (MI) gating device in InGaAs/AlAsSb coupled double quantum wells (CDQWs). The MI arms can convert the pump data with return-to-zero ON-OFF keying (RZ OOK) to binary phase-shift keying (BPSK) format, then two BPSK signals can interfere with each other for realizing a desired logical operation. All-optical format conversion from the RZ OOK to BPSK is based on the cross-phase modulation to the transverse electric (TE) probe wave, which is caused by the intersubband transition excited by the transverse magnetic (TM) pump light. Bit error rate measurements show that error free operation for both BPSK format conversion and XOR logical operation can be achieved.

  16. Magnon-based logic in a multi-terminal YIG/Pt nanostructure

    Energy Technology Data Exchange (ETDEWEB)

    Ganzhorn, Kathrin, E-mail: kathrin.ganzhorn@wmi.badw.de; Klingler, Stefan; Wimmer, Tobias [Walther-Meißner-Institut, Bayerische Akademie der Wissenschaften, 85748 Garching (Germany); Physik-Department, Technische Universität München, 85748 Garching (Germany); Geprägs, Stephan [Walther-Meißner-Institut, Bayerische Akademie der Wissenschaften, 85748 Garching (Germany); Gross, Rudolf; Huebl, Hans, E-mail: huebl@wmi.badw.de; Goennenwein, Sebastian T. B., E-mail: goennenwein@wmi.badw.de [Walther-Meißner-Institut, Bayerische Akademie der Wissenschaften, 85748 Garching (Germany); Physik-Department, Technische Universität München, 85748 Garching (Germany); Nanosystems Initiative Munich, 80799 Munich (Germany)

    2016-07-11

    Boolean logic is the foundation of modern digital information processing. Recently, there has been a growing interest in phenomena based on pure spin currents, which allows to move from charge to spin based logic gates. We study a proof-of-principle logic device based on the ferrimagnetic insulator Yttrium Iron Garnet, with Pt strips acting as injectors and detectors for non-equilibrium magnons. We experimentally observe incoherent superposition of magnons generated by different injectors. This allows to implement a fully functional majority gate, enabling multiple logic operations (AND and OR) in one and the same device. Clocking frequencies of the order of several GHz and straightforward down-scaling make our device promising for applications.

  17. Efficient quantum computation in a network with probabilistic gates and logical encoding

    DEFF Research Database (Denmark)

    Borregaard, J.; Sørensen, A. S.; Cirac, J. I.

    2017-01-01

    An approach to efficient quantum computation with probabilistic gates is proposed and analyzed in both a local and nonlocal setting. It combines heralded gates previously studied for atom or atomlike qubits with logical encoding from linear optical quantum computation in order to perform high......-fidelity quantum gates across a quantum network. The error-detecting properties of the heralded operations ensure high fidelity while the encoding makes it possible to correct for failed attempts such that deterministic and high-quality gates can be achieved. Importantly, this is robust to photon loss, which...... is typically the main obstacle to photonic-based quantum information processing. Overall this approach opens a path toward quantum networks with atomic nodes and photonic links....

  18. Implementation of Adaptive Digital Controllers on Programmable Logic Devices

    Science.gov (United States)

    Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Monenegro, Justino (Technical Monitor)

    2002-01-01

    Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment

  19. Control of electrochemical signals from quantum dots conjugated to organic materials by using DNA structure in an analog logic gate.

    Science.gov (United States)

    Chen, Qi; Yoo, Si-Youl; Chung, Yong-Ho; Lee, Ji-Young; Min, Junhong; Choi, Jeong-Woo

    2016-10-01

    Various bio-logic gates have been studied intensively to overcome the rigidity of single-function silicon-based logic devices arising from combinations of various gates. Here, a simple control tool using electrochemical signals from quantum dots (QDs) was constructed using DNA and organic materials for multiple logic functions. The electrochemical redox current generated from QDs was controlled by the DNA structure. DNA structure, in turn, was dependent on the components (organic materials) and the input signal (pH). Independent electrochemical signals from two different logic units containing QDs were merged into a single analog-type logic gate, which was controlled by two inputs. We applied this electrochemical biodevice to a simple logic system and achieved various logic functions from the controlled pH input sets. This could be further improved by choosing QDs, ionic conditions, or DNA sequences. This research provides a feasible method for fabricating an artificial intelligence system. Copyright © 2016 Elsevier B.V. All rights reserved.

  20. Piezo-phototronic Boolean logic and computation using photon and strain dual-gated nanowire transistors.

    Science.gov (United States)

    Yu, Ruomeng; Wu, Wenzhuo; Pan, Caofeng; Wang, Zhaona; Ding, Yong; Wang, Zhong Lin

    2015-02-04

    Using polarization charges created at the metal-cadmium sulfide interface under strain to gate/modulate electrical transport and optoelectronic processes of charge carriers, the piezo-phototronic effect is applied to process mechanical and optical stimuli into electronic controlling signals. The cascade nanowire networks are demonstrated for achieving logic gates, binary computations, and gated D latches to store information carried by these stimuli. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Multi-channel logical circuit module used for high-speed, low amplitude signals processing and QDC gate signals generation

    International Nuclear Information System (INIS)

    Su Hong; Li Xiaogang; Zhu Haidong; Ma Xiaoli; Yin Weiwei; Li Zhuyu; Jin Genming; Wu Heyu

    2001-01-01

    A new kind of logical circuit will be introduced in brief. There are 16 independent channels in the module. The module receives low amplitude signals(≥40 mV), and processes them to amplify, shape, delay, sum and etc. After the processing each channel produces 2 pairs of ECL logical signal to feed the gate of QDC as the gate signal of QDC. The module consists of high-speed preamplifier unit, high-speed discriminate unit, delaying and shaping unit, summing unit and trigger display unit. The module is developed for 64 CH. 12 BIT Multi-event QDC. The impedance of QDC is 110 Ω. Each gate signal of QDC requires a pair of differential ECL level, Min. Gate width 30 ns and Max. Gate width 1 μs. It has showed that the outputs of logical circuit module satisfy the QDC requirements in experiment. The module can be used on data acquisition system to acquire thousands of data at high-speed ,high-density and multi-parameter, in heavy particle nuclear physics experiment. It also can be used to discriminate multi-coincidence events

  2. Low-photon-number optical switch and AND/OR logic gates based on quantum dot-bimodal cavity coupling system.

    Science.gov (United States)

    Ma, Shen; Ye, Han; Yu, Zhong-Yuan; Zhang, Wen; Peng, Yi-Wei; Cheng, Xiang; Liu, Yu-Min

    2016-01-11

    We propose a new scheme based on quantum dot-bimodal cavity coupling system to realize all-optical switch and logic gates in low-photon-number regime. Suppression of mode transmission due to the destructive interference effect is theoretically demonstrated by driving the cavity with two orthogonally polarized pulsed lasers at certain pulse delay. The transmitted mode can be selected by designing laser pulse sequence. The optical switch with high on-off ratio emerges when considering one driving laser as the control. Moreover, the AND/OR logic gates based on photon polarization are achieved by cascading the coupling system. Both proposed optical switch and logic gates work well in ultra-low energy magnitude. Our work may enable various applications of all-optical computing and quantum information processing.

  3. Demonstration of quantum logic gates in liquid crystal nuclear magnetic resonance

    International Nuclear Information System (INIS)

    Marjanska, Malgorzata; Chuang, Isaac L.; Kubinec, Mark G.

    2000-01-01

    1 H- 13 C heteronuclear dipolar couplings are used to produce the NMR (nuclear magnetic resonance) version of a two bit controlled-NOT quantum logic gate. This gate is coupled with the Hadamard gate to complete a circuit which generates the Einstein-Podolsky-Rosen (EPR) state which is the maximally entangled state of a pair of spins. The EPR state is crucial for the potential exponential speed advantage of quantum computers over their classical counterparts. We sample the deviation density matrix of the two spin system to verify the presence of the EPR state. EPR state lifetimes are also measured with this technique, thereby demonstrating the viability of liquid crystals as a platform for quantum computing. (c) 2000 American Institute of Physics

  4. Implementation of Self-Bias Transistor on Voting Logic

    International Nuclear Information System (INIS)

    Harzawardi Hasim; Syirrazie Che Soh

    2014-01-01

    Study in the eld of digital integrated circuit (IC) already become common to the modern industrial. Day by day we have been introduced with new gadget that was developed based on transistor. This paper will study the implementation of self-bias transistor on voting logic. The self-bias transistor will connected both on pull-up network and pull-down network. On previous research, study on comparison of total number of transistors, time propagation delay, and frequency between NAND and NOR gate of voting logic. It's show, with the same number of transistor, NAND gate achieve high frequency and low time propagation delay compare to NOR gate. We extend this analysis by comparing the total number of transistor, time propagation delay, frequency and power dissipation between common NAND gate with self-bias NAND gate. Extensive LTSpice simulations were performed using IBM 90 nm CMOS(Complementary Metal Oxide Semiconductor) process technology. The result show self-bias voting NAND gate consumes 54 % less power dissipation, 43% slow frequency and 43 % high time propagation delay compare to common voting NAND gate. (author)

  5. Tackling systematic errors in quantum logic gates with composite rotations

    International Nuclear Information System (INIS)

    Cummins, Holly K.; Llewellyn, Gavin; Jones, Jonathan A.

    2003-01-01

    We describe the use of composite rotations to combat systematic errors in single-qubit quantum logic gates and discuss three families of composite rotations which can be used to correct off-resonance and pulse length errors. Although developed and described within the context of nuclear magnetic resonance quantum computing, these sequences should be applicable to any implementation of quantum computation

  6. Logic and memory concepts for all-magnetic computing based on transverse domain walls

    International Nuclear Information System (INIS)

    Vandermeulen, J; Van de Wiele, B; Dupré, L; Van Waeyenberge, B

    2015-01-01

    We introduce a non-volatile digital logic and memory concept in which the binary data is stored in the transverse magnetic domain walls present in in-plane magnetized nanowires with sufficiently small cross sectional dimensions. We assign the digital bit to the two possible orientations of the transverse domain wall. Numerical proofs-of-concept are presented for a NOT-, AND- and OR-gate, a FAN-out as well as a reading and writing device. Contrary to the chirality based vortex domain wall logic gates introduced in Omari and Hayward (2014 Phys. Rev. Appl. 2 044001), the presented concepts remain applicable when miniaturized and are driven by electrical currents, making the technology compatible with the in-plane racetrack memory concept. The individual devices can be easily combined to logic networks working with clock speeds that scale linearly with decreasing design dimensions. This opens opportunities to an all-magnetic computing technology where the digital data is stored and processed under the same magnetic representation. (paper)

  7. Manipulating molecular quantum states with classical metal atom inputs: demonstration of a single molecule NOR logic gate.

    Science.gov (United States)

    Soe, We-Hyo; Manzano, Carlos; Renaud, Nicolas; de Mendoza, Paula; De Sarkar, Abir; Ample, Francisco; Hliwa, Mohamed; Echavarren, Antonio M; Chandrasekhar, Natarajan; Joachim, Christian

    2011-02-22

    Quantum states of a trinaphthylene molecule were manipulated by putting its naphthyl branches in contact with single Au atoms. One Au atom carries 1-bit of classical information input that is converted into quantum information throughout the molecule. The Au-trinaphthylene electronic interactions give rise to measurable energy shifts of the molecular electronic states demonstrating a NOR logic gate functionality. The NOR truth table of the single molecule logic gate was characterized by means of scanning tunnelling spectroscopy.

  8. Excitonic AND Logic Gates on DNA Brick Nanobreadboards

    Science.gov (United States)

    2015-01-01

    A promising application of DNA self-assembly is the fabrication of chromophore-based excitonic devices. DNA brick assembly is a compelling method for creating programmable nanobreadboards on which chromophores may be rapidly and easily repositioned to prototype new excitonic devices, optimize device operation, and induce reversible switching. Using DNA nanobreadboards, we have demonstrated each of these functions through the construction and operation of two different excitonic AND logic gates. The modularity and high chromophore density achievable via this brick-based approach provide a viable path toward developing information processing and storage systems. PMID:25839049

  9. Quantum logic gates based on coherent electron transport in quantum wires.

    Science.gov (United States)

    Bertoni, A; Bordone, P; Brunetti, R; Jacoboni, C; Reggiani, S

    2000-06-19

    It is shown that the universal set of quantum logic gates can be realized using solid-state quantum bits based on coherent electron transport in quantum wires. The elementary quantum bits are realized with a proper design of two quantum wires coupled through a potential barrier. Numerical simulations show that (a) a proper design of the coupling barrier allows one to realize any one-qbit rotation and (b) Coulomb interaction between two qbits of this kind allows the implementation of the CNOT gate. These systems are based on a mature technology and seem to be integrable with conventional electronics.

  10. Multiple advanced logic gates made of DNA-Ag nanocluster and the application for intelligent detection of pathogenic bacterial genes.

    Science.gov (United States)

    Lin, Xiaodong; Liu, Yaqing; Deng, Jiankang; Lyu, Yanlong; Qian, Pengcheng; Li, Yunfei; Wang, Shuo

    2018-02-21

    The integration of multiple DNA logic gates on a universal platform to implement advance logic functions is a critical challenge for DNA computing. Herein, a straightforward and powerful strategy in which a guanine-rich DNA sequence lighting up a silver nanocluster and fluorophore was developed to construct a library of logic gates on a simple DNA-templated silver nanoclusters (DNA-AgNCs) platform. This library included basic logic gates, YES, AND, OR, INHIBIT, and XOR, which were further integrated into complex logic circuits to implement diverse advanced arithmetic/non-arithmetic functions including half-adder, half-subtractor, multiplexer, and demultiplexer. Under UV irradiation, all the logic functions could be instantly visualized, confirming an excellent repeatability. The logic operations were entirely based on DNA hybridization in an enzyme-free and label-free condition, avoiding waste accumulation and reducing cost consumption. Interestingly, a DNA-AgNCs-based multiplexer was, for the first time, used as an intelligent biosensor to identify pathogenic genes, E. coli and S. aureus genes, with a high sensitivity. The investigation provides a prototype for the wireless integration of multiple devices on even the simplest single-strand DNA platform to perform diverse complex functions in a straightforward and cost-effective way.

  11. Unimolecular Logic Gate with Classical Input by Single Gold Atoms.

    Science.gov (United States)

    Skidin, Dmitry; Faizy, Omid; Krüger, Justus; Eisenhut, Frank; Jancarik, Andrej; Nguyen, Khanh-Hung; Cuniberti, Gianaurelio; Gourdon, Andre; Moresco, Francesca; Joachim, Christian

    2018-02-27

    By a combination of solution and on-surface chemistry, we synthesized an asymmetric starphene molecule with two long anthracenyl input branches and a short naphthyl output branch on the Au(111) surface. Starting from this molecule, we could demonstrate the working principle of a single molecule NAND logic gate by selectively contacting single gold atoms by atomic manipulation to the longer branches of the molecule. The logical input "1" ("0") is defined by the interaction (noninteraction) of a gold atom with one of the input branches. The output is measured by scanning tunneling spectroscopy following the shift in energy of the electronic tunneling resonances at the end of the short branch of the molecule.

  12. Proposal for nanoscale cascaded plasmonic majority gates for non-Boolean computation.

    Science.gov (United States)

    Dutta, Sourav; Zografos, Odysseas; Gurunarayanan, Surya; Radu, Iuliana; Soree, Bart; Catthoor, Francky; Naeemi, Azad

    2017-12-19

    Surface-plasmon-polariton waves propagating at the interface between a metal and a dielectric, hold the key to future high-bandwidth, dense on-chip integrated logic circuits overcoming the diffraction limitation of photonics. While recent advances in plasmonic logic have witnessed the demonstration of basic and universal logic gates, these CMOS oriented digital logic gates cannot fully utilize the expressive power of this novel technology. Here, we aim at unraveling the true potential of plasmonics by exploiting an enhanced native functionality - the majority voter. Contrary to the state-of-the-art plasmonic logic devices, we use the phase of the wave instead of the intensity as the state or computational variable. We propose and demonstrate, via numerical simulations, a comprehensive scheme for building a nanoscale cascadable plasmonic majority logic gate along with a novel referencing scheme that can directly translate the information encoded in the amplitude and phase of the wave into electric field intensity at the output. Our MIM-based 3-input majority gate displays a highly improved overall area of only 0.636 μm 2 for a single-stage compared with previous works on plasmonic logic. The proposed device demonstrates non-Boolean computational capability and can find direct utility in highly parallel real-time signal processing applications like pattern recognition.

  13. Tyramine Hydrochloride Based Label-Free System for Operating Various DNA Logic Gates and a DNA Caliper for Base Number Measurements.

    Science.gov (United States)

    Fan, Daoqing; Zhu, Xiaoqing; Dong, Shaojun; Wang, Erkang

    2017-07-05

    DNA is believed to be a promising candidate for molecular logic computation, and the fluorogenic/colorimetric substrates of G-quadruplex DNAzyme (G4zyme) are broadly used as label-free output reporters of DNA logic circuits. Herein, for the first time, tyramine-HCl (a fluorogenic substrate of G4zyme) is applied to DNA logic computation and a series of label-free DNA-input logic gates, including elementary AND, OR, and INHIBIT logic gates, as well as a two to one encoder, are constructed. Furthermore, a DNA caliper that can measure the base number of target DNA as low as three bases is also fabricated. This DNA caliper can also perform concatenated AND-AND logic computation to fulfil the requirements of sophisticated logic computing. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. Logic-Gate Functions in Chemomechanical Materials.

    Science.gov (United States)

    Schneider, Hans-Jörg

    2017-09-06

    Chemomechanical polymers that change their shape or volume on stimulation by multiple external chemical signals, particularly on the basis of selective molecular recognition, are discussed. Several examples illustrate how such materials, usually in the form of hydrogels, can be used for the design of chemically triggered valves or artificial muscles and applied, for example, in self-healing materials or drug delivery. The most attractive feature of such materials is that they can combine sensor and actuator within single units, from nano- to macrosize. Simultaneous action of a cofactor allows selective response in the sense of AND logic gates by, for example, amino acids and peptides, which without the presence of a second effector do not induce any changes. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  15. Firmware-only implementation of Time-to-Digital Converter (TDC) in Field-Programmable Gate Array (FPGA)

    International Nuclear Information System (INIS)

    Jinyuan Wu; Zonghan Shi; Irena Y Wang

    2003-01-01

    A Time-to-Digital Converter (TDC) implemented in general purpose field-programmable gate array (FPGA) for the Fermilab CKM experiment will be presented. The TDC uses a delay chain and register array structure to produce lower bits in addition to higher bits from a clock counter. Lacking the direct controls custom chips, the FPGA implementation of the delay chain and register array structure had to address two major problems: (1) the logic elements used for the delay chain and register array structure must be placed and routed by the FPGA compiler in a predictable manner, to assure uniformity of the TDC binning and short-term stability. (2) The delay variation due to temperature and power supply voltage must be compensated for to assure long-term stability. They used the chain structures in the existing FPGAs that the venders designed for general purpose such as carry algorithm or logic expansion to solve the first problem. To compensate for delay variations, they studied several digital compensation strategies that can be implemented in the same FPGA device. Some bench-top test results will also be presented in this document

  16. A biomimetic colorimetric logic gate system based on multi-functional peptide-mediated gold nanoparticle assembly.

    Science.gov (United States)

    Li, Yong; Li, Wang; He, Kai-Yu; Li, Pei; Huang, Yan; Nie, Zhou; Yao, Shou-Zhuo

    2016-04-28

    In natural biological systems, proteins exploit various functional peptide motifs to exert target response and activity switch, providing a functional and logic basis for complex cellular activities. Building biomimetic peptide-based bio-logic systems is highly intriguing but remains relatively unexplored due to limited logic recognition elements and complex signal outputs. In this proof-of-principle work, we attempted to address these problems by utilizing multi-functional peptide probes and the peptide-mediated nanoparticle assembly system. Here, the rationally designed peptide probes function as the dual-target responsive element specifically responsive to metal ions and enzymes as well as the mediator regulating the assembly of gold nanoparticles (AuNPs). Taking advantage of Zn2+ ions and chymotrypsin as the model inputs of metal ions and enzymes, respectively, we constructed the peptide logic system computed by the multi-functional peptide probes and outputted by the readable colour change of AuNPs. In this way, the representative binary basic logic gates (AND, OR, INHIBIT, NAND, IMPLICATION) have been achieved by delicately coding the peptide sequence, demonstrating the versatility of our logic system. Additionally, we demonstrated that the three-input combinational logic gate (INHIBIT-OR) could also be successfully integrated and applied as a multi-tasking biosensor for colorimetric detection of dual targets. This nanoparticle-based peptide logic system presents a valid strategy to illustrate peptide information processing and provides a practical platform for executing peptide computing or peptide-related multiplexing sensing, implying that the controllable nanomaterial assembly is a promising and potent methodology for the advancement of biomimetic bio-logic computation.

  17. N Channel JFET Based Digital Logic Gate Structure

    Science.gov (United States)

    Krasowski, Michael J (Inventor)

    2013-01-01

    An apparatus is provided that includes a first field effect transistor with a source tied to zero volts and a drain tied to voltage drain drain (Vdd) through a first resistor. The apparatus also includes a first node configured to tie a second resistor to a third resistor and connect to an input of a gate of the first field effect transistor in order for the first field effect transistor to receive a signal. The apparatus also includes a second field effect transistor configured as a unity gain buffer having a drain tied to Vdd and an uncommitted source.

  18. A visual dual-aptamer logic gate for sensitive discrimination of prion diseases-associated isoform with reusable magnetic microparticles and fluorescence quantum dots.

    Science.gov (United States)

    Xiao, Sai Jin; Hu, Ping Ping; Chen, Li Qiang; Zhen, Shu Jun; Peng, Li; Li, Yuan Fang; Huang, Cheng Zhi

    2013-01-01

    Molecular logic gates, which have attracted increasing research interest and are crucial for the development of molecular-scale computers, simplify the results of measurements and detections, leaving the diagnosis of disease either "yes" or "no". Prion diseases are a group of fatal neurodegenerative disorders that happen in human and animals. The main problem with a diagnosis of prion diseases is how to sensitively and selectively discriminate and detection of the minute amount of PrP(Res) in biological samples. Our previous work had demonstrated that dual-aptamer strategy could achieve highly sensitive and selective discrimination and detection of prion protein (cellular prion protein, PrP(C), and the diseases associated isoform, PrP(Res)) in serum and brain. Inspired by the advantages of molecular logic gate, we further conceived a new concept for dual-aptamer logic gate that responds to two chemical input signals (PrP(C) or PrP(Res) and Gdn-HCl) and generates a change in fluorescence intensity as the output signal. It was found that PrP(Res) performs the "OR" logic operation while PrP(C) performs "XOR" logic operation when they get through the gate consisted of aptamer modified reusable magnetic microparticles (MMPs-Apt1) and quantum dots (QDs-Apt2). The dual-aptamer logic gate simplifies the discrimination results of PrP(Res), leaving the detection of PrP(Res) either "yes" or "no". The development of OR logic gate based on dual-aptamer strategy and two chemical input signals (PrP(Res) and Gdn-HCl) is an important step toward the design of prion diseases diagnosis and therapy systems.

  19. A visual dual-aptamer logic gate for sensitive discrimination of prion diseases-associated isoform with reusable magnetic microparticles and fluorescence quantum dots.

    Directory of Open Access Journals (Sweden)

    Sai Jin Xiao

    Full Text Available Molecular logic gates, which have attracted increasing research interest and are crucial for the development of molecular-scale computers, simplify the results of measurements and detections, leaving the diagnosis of disease either "yes" or "no". Prion diseases are a group of fatal neurodegenerative disorders that happen in human and animals. The main problem with a diagnosis of prion diseases is how to sensitively and selectively discriminate and detection of the minute amount of PrP(Res in biological samples. Our previous work had demonstrated that dual-aptamer strategy could achieve highly sensitive and selective discrimination and detection of prion protein (cellular prion protein, PrP(C, and the diseases associated isoform, PrP(Res in serum and brain. Inspired by the advantages of molecular logic gate, we further conceived a new concept for dual-aptamer logic gate that responds to two chemical input signals (PrP(C or PrP(Res and Gdn-HCl and generates a change in fluorescence intensity as the output signal. It was found that PrP(Res performs the "OR" logic operation while PrP(C performs "XOR" logic operation when they get through the gate consisted of aptamer modified reusable magnetic microparticles (MMPs-Apt1 and quantum dots (QDs-Apt2. The dual-aptamer logic gate simplifies the discrimination results of PrP(Res, leaving the detection of PrP(Res either "yes" or "no". The development of OR logic gate based on dual-aptamer strategy and two chemical input signals (PrP(Res and Gdn-HCl is an important step toward the design of prion diseases diagnosis and therapy systems.

  20. Communication Strategies with Digital Logic: Collaborative Intelligence and Meritocratic Order

    Directory of Open Access Journals (Sweden)

    Andrea Hoare

    2009-08-01

    Full Text Available This paper is based on the research prior to my applying for the post of Assistant Professor in the Public Relations Department of the Social Communication School at the Universidad Central de Venezuela. Its aim is to contribute to the understanding of the digital logic implications in the contemporary organizations´ communications, and to collaborate, from an epistemic point of view, with its projected meaning in the communications area. In this sense, digital logic is defined as the dynamic organization resulting from user interaction, technology, practices, attitudes and values that develop at the same pace as the cyberspace. The main finding was that digital logic is a valuable model to characterize current communicational mutations, because it helps describe a scenario, where communicational bidirectionality prevails, and the network structure empowers the rebirth of self-protagonism. It is the self-organized feature from the digital platform, which encourages new organizing principles like collaborative intelligence and meritocratic order, centered on content relevance.

  1. Direct-write fabrication of a nanoscale digital logic element on a single nanowire

    International Nuclear Information System (INIS)

    Roy, Somenath; Gao Zhiqiang

    2010-01-01

    In this paper we report on the 'direct-write' fabrication and electrical characteristics of a nanoscale logic inverter, integrating enhancement-mode (E-mode) and depletion-mode (D-mode) field-effect transistors (FETs) on a single zinc oxide (ZnO) nanowire. 'Direct-writing' of platinum metal electrodes and a dielectric layer is executed on individual single-crystalline ZnO nanowires using either a focused electron beam (FEB) or a focused ion beam (FIB). We fabricate a top-gate FET structure, in which the gate electrode wraps around the ZnO nanowire, resulting in a more efficient gate response than the conventional back-gate nanowire transistors. For E-mode device operation, the gate electrode (platinum) is deposited directly onto the ZnO nanowire by a FEB, which creates a Schottky barrier and in turn a fully depleted channel. Conversely, sandwiching an insulating layer between the FIB-deposited gate electrode and the nanowire channel makes D-mode operation possible. Integrated E- and D-mode FETs on a single nanowire exhibit the characteristics of a direct-coupled FET logic (DCFL) inverter with a high gain and noise margin.

  2. Analysis of Nonlinear Periodic and Aperiodic Media: Application to Optical Logic Gates

    Science.gov (United States)

    Yu, Yisheng

    This dissertation is about the analysis of nonlinear periodic and aperiodic media and their application to the design of intensity controlled all optical logic gates: AND, OR, and NOT. A coupled nonlinear differential equation that characterizes the electromagnetic wave propagation in a nonlinear periodic (and aperiodic) medium has been derived from the first principle. The equations are general enough that it reflects the effect of transverse modal fields and can be used to analyze both co-propagating and counter propagating waves. A numerical technique based on the finite differences method and absorbing boundary condition has been developed to solve the coupled differential equations here. The numerical method is simple and accurate. Unlike the method based on characteristics that has been reported in the literature, this method does not involve integration and step sizes of time and space coordinates are decoupled. The decoupling provides independent choice for time and space step sizes. The concept of "gap soliton" has also been re-examined. The dissertation consists of four manuscripts. Manuscript I reports on the design of all optical logic gates: AND, OR, and NOT based on the bistability property of nonlinear periodic and aperiodic waveguiding structures. The functioning of the logic gates has been shown by analysis. The numerical technique that has been developed to solve the nonlinear differential equations are addressed in manuscript II. The effect of transverse modal fields on the bistable property of nonlinear periodic medium is reported in manuscript III. The concept of "gap soliton" that are generated in a nonlinear periodic medium has been re-examined. The details on the finding of the re-examination are discussed in manuscript IV.

  3. Generalized look-ahead number conversion from signed digit to complement representation with optical logic operations

    Science.gov (United States)

    Qian, Feng; Li, Guoqiang

    2001-12-01

    In this paper a generalized look-ahead logic algorithm for number conversion from signed-digit to its complement representation is developed. By properly encoding the signed digits, all the operations are performed by binary logic, and unified logical expressions can be obtained for conversion from modified-signed-digit (MSD) to 2's complement, trinary signed-digit (TSD) to 3's complement, and quaternary signed-digit (QSD) to 4's complement. For optical implementation, a parallel logical array module using electron-trapping device is employed, which is suitable for realizing complex logic functions in the form of sum-of-product. The proposed algorithm and architecture are compatible with a general-purpose optoelectronic computing system.

  4. The operations of quantum logic gates with pure and mixed initial states.

    Science.gov (United States)

    Chen, Jun-Liang; Li, Che-Ming; Hwang, Chi-Chuan; Ho, Yi-Hui

    2011-04-07

    The implementations of quantum logic gates realized by the rovibrational states of a C(12)O(16) molecule in the X((1)Σ(+)) electronic ground state are investigated. Optimal laser fields are obtained by using the modified multitarget optimal theory (MTOCT) which combines the maxima of the cost functional and the fidelity for state and quantum process. The projection operator technique together with modified MTOCT is used to get optimal laser fields. If initial states of the quantum gate are pure states, states at target time approach well to ideal target states. However, if the initial states are mixed states, the target states do not approach well to ideal ones. The process fidelity is introduced to investigate the reliability of the quantum gate operation driven by the optimal laser field. We found that the quantum gates operate reliably whether the initial states are pure or mixed.

  5. Profiling the miRNAs for Early Cancer Detection using DNA-based Logic Gates

    Directory of Open Access Journals (Sweden)

    Tahereh Yahya

    2017-12-01

    Full Text Available Abstract Background: DNA-based computing is an emerging research aspect that enables the in-vivo computation and decision making with significant correctness. Recent papers show that the expression level of miRNAs are related to the progress status of some diseases such as cancers and DNA computing is introduced as a low cost and concise technique for detection of these biomarkers. In this paper, DNA-based logic gates are implemented in the laboratory to detect the level of miR-21 as the biomarker of cancer. Materials and Methods: At the first, required strands for designing DNA gates are synthesized. Then, double stranded gate is generated in laboratory using a temperature gradient that followed by electrophoresis process. This double strand is the computation engine for detecting the miR-21 biomarker. miR-21 is as input in designed gate. At the end, the expression level of miR-21 is identified by measuring the generated fluorescent. Results: at the first stage, the proposed DNA-based logic gate is evaluated by using the synthesized input strands and then it is experimented on a tumor tissue. Experimental results on synthesized strands show that its detection quality/correctness is 2.5x better than conventional methods. Conclusion: Experimental results on the tumor tissues are successful and are matched with those are extracted from real time PCR results. Also, the results show that this method is significantly more suitable than real time PCR in view of time and cost.

  6. Reliability evaluation programmable logic devices

    International Nuclear Information System (INIS)

    Srivani, L.; Murali, N.; Thirugnana Murthy, D.; Satya Murty, S.A.V.

    2014-01-01

    Programmable Logic Devices (PLD) are widely used as basic building modules in high integrity systems, considering their robust features such as gate density, performance, speed etc. PLDs are used to implement digital design such as bus interface logic, control logic, sequencing logic, glue logic etc. Due to semiconductor evolution, new PLDs with state-of-the-art features are arriving to the market. Since these devices are reliable as per the manufacturer's specification, they were used in the design of safety systems. But due to their reduced market life, the availability of performance data is limited. So evaluating the PLD before deploying in a safety system is very important. This paper presents a survey on the use of PLDs in the nuclear domain and the steps involved in the evaluation of PLD using Quantitative Accelerated Life Testing. (author)

  7. Design and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS

    KAUST Repository

    Dadgour, Hamed F.

    2010-01-01

    Nano-Electro-Mechanical Switches (NEMS) are among the most promising emerging devices due to their near-zero subthreshold-leakage currents. This paper reports device fabrication and modeling, as well as novel logic gate design using "laterally-actuated double-electrode NEMS" structures. The new device structure has several advantages over existing NEMS architectures such as being immune to impact bouncing and release vibrations (unlike a vertically-actuated NEMS) and offer higher flexibility to implement compact logic gates (unlike a single-electrode NEMS). A comprehensive analytical framework is developed to model different properties of these devices by solving the Euler-Bernoulli\\'s beam equation. The proposed model is validated using measurement data for the fabricated devices. It is shown that by ignoring the non-uniformity of the electrostatic force distribution, the existing models "underestimate" the actual value of Vpull-in and Vpull-out. Furthermore, novel energy efficient NEMS-based circuit topologies are introduced to implement compact inverter, NAND, NOR and XOR gates. For instance, the proposed XOR gate can be implemented by using only two NEMS devices compared to that of a static CMOS-based XOR gate that requires at least 10 transistors. © Copyright 2010 ACM.

  8. Code conversion from signed-digit to complement representation based on look-ahead optical logic operations

    Science.gov (United States)

    Li, Guoqiang; Qian, Feng

    2001-11-01

    We present, for the first time to our knowledge, a generalized lookahead logic algorithm for number conversion from signed-digit to complement representation. By properly encoding the signed-digits, all the operations are performed by binary logic, and unified logical expressions can be obtained for conversion from modified-signed- digit (MSD) to 2's complement, trinary signed-digit (TSD) to 3's complement, and quarternary signed-digit (QSD) to 4's complement. For optical implementation, a parallel logical array module using an electron-trapping device is employed and experimental results are shown. This optical module is suitable for implementing complex logic functions in the form of the sum of the product. The algorithm and architecture are compatible with a general-purpose optoelectronic computing system.

  9. SYNTHESIS AND REDUCED LOGIC GATE REALIZATION OF MULTI-VALUED LOGIC FUNCTIONS USING NEURAL NETWORK DEPLOYMENT ALGORITHM

    Directory of Open Access Journals (Sweden)

    A. K. CHOWDHURY

    2016-02-01

    Full Text Available In this paper an evolutionary technique for synthesizing Multi-Valued Logic (MVL functions using Neural Network Deployment Algorithm (NNDA is presented. The algorithm is combined with back-propagation learning capability and neural MVL operators. This research article is done to observe the anomalistic characteristics of MVL neural operators and their role in synthesis. The advantages of NNDA-MVL algorithm is demonstrated with realization of synthesized many valued functions with lesser MVL operators. The characteristic feature set consists of MVL gate count, network link count, network propagation delay and accuracy achieved in training. In brief, this paper depicts an effort of reduced network size for synthesized MVL functions. Trained MVL operators improve the basic architecture by reducing MIN gate and interlink connection by 52.94% and 23.38% respectively.

  10. High-order noise filtering in nontrivial quantum logic gates.

    Science.gov (United States)

    Green, Todd; Uys, Hermann; Biercuk, Michael J

    2012-07-13

    Treating the effects of a time-dependent classical dephasing environment during quantum logic operations poses a theoretical challenge, as the application of noncommuting control operations gives rise to both dephasing and depolarization errors that must be accounted for in order to understand total average error rates. We develop a treatment based on effective Hamiltonian theory that allows us to efficiently model the effect of classical noise on nontrivial single-bit quantum logic operations composed of arbitrary control sequences. We present a general method to calculate the ensemble-averaged entanglement fidelity to arbitrary order in terms of noise filter functions, and provide explicit expressions to fourth order in the noise strength. In the weak noise limit we derive explicit filter functions for a broad class of piecewise-constant control sequences, and use them to study the performance of dynamically corrected gates, yielding good agreement with brute-force numerics.

  11. Analogue Building Blocks Based on Digital CMOS Gates

    DEFF Research Database (Denmark)

    Mucha, Igor

    1996-01-01

    Low-performance analogue circuits built of digital MOS gates are presented. Depending on the threshold voltages of the technology used the final circuits can be operated using low supply voltages. The main advantage using the proposed circuits is the simplicity and ultimate compatibility...... with the design of digital circuits....

  12. Implementation of quantum logic gates using polar molecules in pendular states.

    Science.gov (United States)

    Zhu, Jing; Kais, Sabre; Wei, Qi; Herschbach, Dudley; Friedrich, Bretislav

    2013-01-14

    We present a systematic approach to implementation of basic quantum logic gates operating on polar molecules in pendular states as qubits for a quantum computer. A static electric field prevents quenching of the dipole moments by rotation, thereby creating the pendular states; also, the field gradient enables distinguishing among qubit sites. Multi-target optimal control theory is used as a means of optimizing the initial-to-target transition probability via a laser field. We give detailed calculations for the SrO molecule, a favorite candidate for proposed quantum computers. Our simulation results indicate that NOT, Hadamard and CNOT gates can be realized with high fidelity, as high as 0.985, for such pendular qubit states.

  13. Implementing quantum logic gates with gradient ascent pulse engineering: principles and practicalities.

    Science.gov (United States)

    Rowland, Benjamin; Jones, Jonathan A

    2012-10-13

    We briefly describe the use of gradient ascent pulse engineering (GRAPE) pulses to implement quantum logic gates in nuclear magnetic resonance quantum computers, and discuss a range of simple extensions to the core technique. We then consider a range of difficulties that can arise in practical implementations of GRAPE sequences, reflecting non-idealities in the experimental systems used.

  14. Effect of laser pulse shaping parameters on the fidelity of quantum logic gates.

    Science.gov (United States)

    Zaari, Ryan R; Brown, Alex

    2012-09-14

    The effect of varying parameters specific to laser pulse shaping instruments on resulting fidelities for the ACNOT(1), NOT(2), and Hadamard(2) quantum logic gates are studied for the diatomic molecule (12)C(16)O. These parameters include varying the frequency resolution, adjusting the number of frequency components and also varying the amplitude and phase at each frequency component. A time domain analytic form of the original discretized frequency domain laser pulse function is derived, providing a useful means to infer the resulting pulse shape through variations to the aforementioned parameters. We show that amplitude variation at each frequency component is a crucial requirement for optimal laser pulse shaping, whereas phase variation provides minimal contribution. We also show that high fidelity laser pulses are dependent upon the frequency resolution and increasing the number of frequency components provides only a small incremental improvement to quantum gate fidelity. Analysis through use of the pulse area theorem confirms the resulting population dynamics for one or two frequency high fidelity laser pulses and implies similar dynamics for more complex laser pulse shapes. The ability to produce high fidelity laser pulses that provide both population control and global phase alignment is attributed greatly to the natural evolution phase alignment of the qubits involved within the quantum logic gate operation.

  15. All-optical 10 Gb/s AND logic gate in a silicon microring resonator

    DEFF Research Database (Denmark)

    Xiong, Meng; Lei, Lei; Ding, Yunhong

    2013-01-01

    An all-optical AND logic gate in a single silicon microring resonator is experimentally demonstrated at 10 Gb/s with 50% RZ-OOK signals. By setting the wavelengths of two intensity-modulated input pumps on the resonances of the microring resonator, field-enhanced four-wave mixing with a total inp...... power of only 8.5 dBm takes place in the ring, resulting in the generation of an idler whose intensity follows the logic operation between the pumps. Clear and open eye diagrams with a bit-error- ratio below 10−9 are achieved....

  16. Performance projections and design optimization of planar double gate SOI MOSFETs for logic technology applications

    International Nuclear Information System (INIS)

    Kranti, Abhinav; Hao Ying; Armstrong, G Alastair

    2008-01-01

    In this paper, by investigating the influence of source/drain extension region engineering (also known as gate–source/drain underlap) in nanoscale planar double gate (DG) SOI MOSFETs, we offer new insights into the design of future nanoscale gate-underlap DG devices to achieve ITRS projections for high performance (HP), low standby power (LSTP) and low operating power (LOP) logic technologies. The impact of high-κ gate dielectric, silicon film thickness, together with parameters associated with the lateral source/drain doping profile, is investigated in detail. The results show that spacer width along with lateral straggle can not only effectively control short-channel effects, thus presenting low off-current in a gate underlap device, but can also be optimized to achieve lower intrinsic delay and higher on–off current ratio (I on /I off ). Based on the investigation of on-current (I on ), off-current (I off ), I on /I off , intrinsic delay (τ), energy delay product and static power dissipation, we present design guidelines to select key device parameters to achieve ITRS projections. Using nominal gate lengths for different technologies, as recommended from ITRS specification, optimally designed gate-underlap DG MOSFETs with a spacer-to-straggle (s/σ) ratio of 2.3 for HP/LOP and 3.2 for LSTP logic technologies will meet ITRS projection. However, a relatively narrow range of lateral straggle lying between 7 to 8 nm is recommended. A sensitivity analysis of intrinsic delay, on-current and off-current to important parameters allows a comparative analysis of the various design options and shows that gate workfunction appears to be the most crucial parameter in the design of DG devices for all three technologies. The impact of back gate misalignment on I on , I off and τ is also investigated for optimized underlap devices

  17. ECG-gating in non-cardiac digital subtraction angiography

    International Nuclear Information System (INIS)

    Gattoni, F.; Baldini, V.; Cairo, F.

    1987-01-01

    This paper reports the results of the ECG-gating in non-cardiac digital subtraction angiography (DSA). One hundred and fifteen patients underwent DSA (126 examinations); ECG-gating was applied in 66/126 examinations: images recorded at 70% of R wave were subtracted. Artifacts produced by vascular movements were evaluated in all patients: only 40 examinations, carried out whithout ECG-gating, showed vascular artifacts. The major advantage of the ECG-gated DSA is the more efficent subtraction because of the better images superimposition: therefore, ECG-gating can be clinically helpful. On the contrary, it could be a problem in arrhytmic or bradycardic patients. ECG-gating is helpful in DSA imaging of the thoracic and abdominal aorta and of the cervical and renal arteries. In the examinations of peripheral vessels of the limbs it is not so efficent as in the trunk or in the neck

  18. Design and experimentation of BSFQ logic devices

    International Nuclear Information System (INIS)

    Hosoki, T.; Kodaka, H.; Kitagawa, M.; Okabe, Y.

    1999-01-01

    Rapid single flux quantum (RSFQ) logic needs synchronous pulses for each gate, so the clock-wiring problem is more serious when designing larger scale circuits with this logic. So we have proposed a new SFQ logic which follows Boolean algebra perfectly by using set and reset pulses. With this logic, the level information of current input is transmitted with these pulses generated by level-to-pulse converters, and each gate calculates logic using its phase level made by these pulses. Therefore, our logic needs no clock in each gate. We called this logic 'Boolean SFQ (BSFQ) logic'. In this paper, we report design and experimentation for an AND gate with inverting input based on BSFQ logic. The experimental results for OR and XOR gates are also reported. (author)

  19. Tunable Tribotronic Dual-Gate Logic Devices Based on 2D MoS2 and Black Phosphorus.

    Science.gov (United States)

    Gao, Guoyun; Wan, Bensong; Liu, Xingqiang; Sun, Qijun; Yang, Xiaonian; Wang, Longfei; Pan, Caofeng; Wang, Zhong Lin

    2018-03-01

    With the Moore's law hitting the bottleneck of scaling-down in size (below 10 nm), personalized and multifunctional electronics with an integration of 2D materials and self-powering technology emerge as a new direction of scientific research. Here, a tunable tribotronic dual-gate logic device based on a MoS 2 field-effect transistor (FET), a black phosphorus FET and a sliding mode triboelectric nanogenerator (TENG) is reported. The triboelectric potential produced from the TENG can efficiently drive the transistors and logic devices without applying gate voltages. High performance tribotronic transistors are achieved with on/off ratio exceeding 106 and cutoff current below 1 pA μm -1 . Tunable electrical behaviors of the logic device are also realized, including tunable gains (improved to ≈13.8) and power consumptions (≈1 nW). This work offers an active, low-power-consuming, and universal approach to modulate semiconductor devices and logic circuits based on 2D materials with TENG, which can be used in microelectromechanical systems, human-machine interfacing, data processing and transmission. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  20. Implementation of all-optical reversible logic gate based on holographic laser induced grating using azo-dye doped polymers

    Science.gov (United States)

    Forsati, Rana; Valipour Ebrahimi, Sara; Navi, Keivan; Mohajerani, Ezeddin; Jashnsaz, Hossein

    2013-02-01

    Increasing demand for power reduction in computer systems has led to new trends in computations and computer design including reversible computing. Its main aim is to eliminate power dissipation in logical elements but can have some other advantages such as data security and error prevention. Because of interesting properties of reversible computing, implementing computing devices with reversible manner is the only way to make the reversible computing a reality. In recent years, reversible logic has turned out to be a promising computing paradigm having application in CMOS, nanotechnology, quantum computing and optical computing. In this paper, we propose and realize a novel implementation of Toffoli gate in all-optical domain. We have explained its principle of operations and described an actual experimental implementation. The all-optical reversible gate presented in this paper will be useful in different applications such as arithmetic and logical operations in the domain of reversible logic-based computing.

  1. Control phase shift of spin-wave by spin-polarized current and its application in logic gates

    International Nuclear Information System (INIS)

    Chen, Xiangxu; Wang, Qi; Liao, Yulong; Tang, Xiaoli; Zhang, Huaiwu; Zhong, Zhiyong

    2015-01-01

    We proposed a new ways to control the phase shift of propagating spin waves by applying a local spin-polarized current on ferromagnetic stripe. Micromagnetic simulation showed that a phase shift of about π can be obtained by designing appropriate width and number of pinned magnetic layers. The ways can be adopted in a Mach-Zehnder-type interferometer structure to fulfill logic NOT gates based on spin waves. - Highlights: • Spin-wave phase shift can be controlled by a local spin-polarized current. • Spin-wave phase shift increased with the increasing of current density. • Spin-wave phase shift can reach about 0.3π at a particular current density. • The ways can be used in a Mach-Zehnder-type interferometer to fulfill logic gates

  2. Dataset demonstrating the temperature effect on average output polarization for QCA based reversible logic gates

    Directory of Open Access Journals (Sweden)

    Md. Kamrul Hassan

    2017-08-01

    Full Text Available Quantum-dot cellular automata (QCA is a developing nanotechnology, which seems to be a good candidate to replace the conventional complementary metal-oxide-semiconductor (CMOS technology. In this article, we present the dataset of average output polarization (AOP for basic reversible logic gates presented in Ali Newaz et al. (2016 [1]. QCADesigner 2.0.3 has been employed to analysis the AOP of reversible gates at different temperature levels in Kelvin (K unit.

  3. A DNAzyme-mediated logic gate for programming molecular capture and release on DNA origami.

    Science.gov (United States)

    Li, Feiran; Chen, Haorong; Pan, Jing; Cha, Tae-Gon; Medintz, Igor L; Choi, Jong Hyun

    2016-06-28

    Here we design a DNA origami-based site-specific molecular capture and release platform operated by a DNAzyme-mediated logic gate process. We show the programmability and versatility of this platform with small molecules, proteins, and nanoparticles, which may also be controlled by external light signals.

  4. A Reversible DNA Logic Gate Platform Operated by One- and Two-Photon Excitations.

    Science.gov (United States)

    Tam, Dick Yan; Dai, Ziwen; Chan, Miu Shan; Liu, Ling Sum; Cheung, Man Ching; Bolze, Frederic; Tin, Chung; Lo, Pik Kwan

    2016-01-04

    We demonstrate the use of two different wavelength ranges of excitation light as inputs to remotely trigger the responses of the self-assembled DNA devices (D-OR). As an important feature of this device, the dependence of the readout fluorescent signals on the two external inputs, UV excitation for 1 min and/or near infrared irradiation (NIR) at 800 nm fs laser pulses, can mimic function of signal communication in OR logic gates. Their operations could be reset easily to its initial state. Furthermore, these DNA devices exhibit efficient cellular uptake, low cytotoxicity, and high bio-stability in different cell lines. They are considered as the first example of a photo-responsive DNA logic gate system, as well as a biocompatible, multi-wavelength excited system in response to UV and NIR. This is an important step to explore the concept of photo-responsive DNA-based systems as versatile tools in DNA computing, display devices, optical communication, and biology. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. MEMS Logic Using Mixed-Frequency Excitation

    KAUST Repository

    Ilyas, Saad

    2017-06-22

    We present multi-function microelectromechanical systems (MEMS) logic device that can perform the fundamental logic gate AND, OR, universal logic gates NAND, NOR, and a tristate logic gate using mixed-frequency excitation. The concept is based on exciting combination resonances due to the mixing of two or more input signals. The device vibrates at two steady states: a high state when the combination resonance is activated and a low state when no resonance is activated. These vibration states are assigned to logical value 1 or 0 to realize the logic gates. Using ac signals to drive the resonator and to execute the logic inputs unifies the input and output wave forms of the logic device, thereby opening the possibility for cascading among logic devices. We found that the energy consumption per cycle of the proposed logic resonator is higher than those of existing technologies. Hence, integration of such logic devices to build complex computational system needs to take into consideration lowering the total energy consumption. [2017-0041

  6. Geometrical considerations in the transient ionization testing of digital logic circuits

    International Nuclear Information System (INIS)

    Johnston, A.

    1982-01-01

    Mechanisms are identified that can cause the transient response of digital logic circuits to depend on the logic state in which they are irradiated. Several of these mechanisms depend on surface topology, and for these cases the sensitive logic states can be determined by examining the topology. General approaches for transient radiation testing are also discussed for several MSI and LSI device technologies

  7. Automatic alternative phase-shift mask CAD layout tool for gate shrinkage of embedded DRAM in logic below 0.18 μm

    Science.gov (United States)

    Ohnuma, Hidetoshi; Kawahira, Hiroichi

    1998-09-01

    An automatic alternative phase shift mask (PSM) pattern layout tool has been newly developed. This tool is dedicated for embedded DRAM in logic device to shrink gate line width with improving line width controllability in lithography process with a design rule below 0.18 micrometers by the KrF excimer laser exposure. The tool can crete Levenson type PSM used being coupled with a binary mask adopting a double exposure method for positive photo resist. By using graphs, this tool automatically creates alternative PSM patterns. Moreover, it does not give any phase conflicts. By adopting it to actual embedded DRAM in logic cells, we have provided 0.16 micrometers gate resist patterns at both random logic and DRAM areas. The patterns were fabricated using two masks with the double exposure method. Gate line width has been well controlled under a practical exposure-focus window.

  8. Entangling quantum-logic gate operated with an ultrabright semiconductor single-photon source.

    Science.gov (United States)

    Gazzano, O; Almeida, M P; Nowak, A K; Portalupi, S L; Lemaître, A; Sagnes, I; White, A G; Senellart, P

    2013-06-21

    We demonstrate the unambiguous entangling operation of a photonic quantum-logic gate driven by an ultrabright solid-state single-photon source. Indistinguishable single photons emitted by a single semiconductor quantum dot in a micropillar optical cavity are used as target and control qubits. For a source brightness of 0.56 photons per pulse, the measured truth table has an overlap with the ideal case of 68.4±0.5%, increasing to 73.0±1.6% for a source brightness of 0.17 photons per pulse. The gate is entangling: At a source brightness of 0.48, the Bell-state fidelity is above the entangling threshold of 50% and reaches 71.0±3.6% for a source brightness of 0.15.

  9. Designed cell consortia as fragrance-programmable analog-to-digital converters.

    Science.gov (United States)

    Müller, Marius; Ausländer, Simon; Spinnler, Andrea; Ausländer, David; Sikorski, Julian; Folcher, Marc; Fussenegger, Martin

    2017-03-01

    Synthetic biology advances the rational engineering of mammalian cells to achieve cell-based therapy goals. Synthetic gene networks have nearly reached the complexity of digital electronic circuits and enable single cells to perform programmable arithmetic calculations or to provide dynamic remote control of transgenes through electromagnetic waves. We designed a synthetic multilayered gaseous-fragrance-programmable analog-to-digital converter (ADC) allowing for remote control of digital gene expression with 2-bit AND-, OR- and NOR-gate logic in synchronized cell consortia. The ADC consists of multiple sampling-and-quantization modules sensing analog gaseous fragrance inputs; a gas-to-liquid transducer converting fragrance intensity into diffusible cell-to-cell signaling compounds; a digitization unit with a genetic amplifier circuit to improve the signal-to-noise ratio; and recombinase-based digital expression switches enabling 2-bit processing of logic gates. Synthetic ADCs that can remotely control cellular activities with digital precision may enable the development of novel biosensors and may provide bioelectronic interfaces synchronizing analog metabolic pathways with digital electronics.

  10. Design and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS

    KAUST Repository

    Dadgour, Hamed F.; Hussain, Muhammad Mustafa; Smith, Casey Eben; Banerjee, Kaustav

    2010-01-01

    Nano-Electro-Mechanical Switches (NEMS) are among the most promising emerging devices due to their near-zero subthreshold-leakage currents. This paper reports device fabrication and modeling, as well as novel logic gate design using "laterally

  11. Optimal inverter logic gate using 10-nm double gate-all-around (DGAA transistor with asymmetric channel width

    Directory of Open Access Journals (Sweden)

    Myunghwan Ryu

    2016-01-01

    Full Text Available We investigate the electrical characteristics of a double-gate-all-around (DGAA transistor with an asymmetric channel width using three-dimensional device simulation. The DGAA structure creates a silicon nanotube field-effect transistor (NTFET with a core-shell gate architecture, which can solve the problem of loss of gate controllability of the channel and provides improved short-channel behavior. The channel width asymmetry is analyzed on both sides of the terminals of the transistors, i.e., source and drain. In addition, we consider both n-type and p-type DGAA FETs, which are essential to forming a unit logic cell, the inverter. Simulation results reveal that, according to the carrier types, the location of the asymmetry has a different effect on the electrical properties of the devices. Thus, we propose the N/P DGAA FET structure with an asymmetric channel width to form the optimal inverter. Various electrical metrics are analyzed to investigate the benefits of the optimal inverter structure over the conventional inverter structure. Simulation results show that 27% delay and 15% leakage power improvement are enabled in the optimum structure.

  12. Miniaturization of Josephson logic circuits

    International Nuclear Information System (INIS)

    Ko, H.; Van Duzer, T.

    1985-01-01

    The performances of Current Injection Logic (CIL) and Resistor Coupled Josephson Logic (RCJL) have been evaluated for minimum features sizes ranging from 5 μm to 0.2 μm. The logic delay is limited to about 10 ps for both the CIL AND gate and the RCJL OR gate biased at 70% of maximum bias current. The maximum circuit count on an 6.35 x 6.35 chip is 13,000 for CIL gates and 20,000 for RCJL gates. Some suggestions are given for further improvements

  13. The combination of gold nanorods and nanoparticles with DNA nanodevices for logic gates construction

    International Nuclear Information System (INIS)

    Yao, Dongbao; Song, Tingjie; Xiao, Shiyan; Huang, Fujian; Liang, Haojun; Zheng, Bin

    2015-01-01

    In this work, two DNA nanodevices were constructed utilizing a DNA strand displacement reaction. With the assistance of gold nanoparticles (AuNPs) and gold nanorods (AuNRs), the autonomous reactions can be reflected from the aggregation states of nanoparticles. By sequence design and the two non-overlapping double hump-like UV–vis spectral peaks of AuNPs and AuNRs, two logic gates with multiple inputs and outputs were successfully run with expected outcomes. This method not only shows how to achieve computing with multiple logic calculations but also has great potential for multiple targets detection. (paper)

  14. Logic delays of 5-μm resistor coupled Josephson logic

    International Nuclear Information System (INIS)

    Sone, J.; Yoshida, T.; Tahara, S.; Abe, H.

    1982-01-01

    Logic delays of resistor coupled Josephson logic (RCJL) have been investigated. An experimental circuit with a cascade chain of ten RCJL OR gates was fabricated using Pb-alloy Josephson IC technology with 5-μm minimum linewidth. Logic delay was measured to be as low as 10.8 ps with power dissipation of 11.7 μW. This demonstrates a switching operation faster than those reported for other Josephson gate designs. Comparison with computer-simulation results is also presented

  15. Development of a sensor to study the DNA conformation using molecular logic gates

    Science.gov (United States)

    Roy, Arpan Datta; Dey, Dibyendu; Saha, Jaba; Chakraborty, Santanu; Bhattacharjee, D.; Hussain, Syed Arshad

    2015-02-01

    This communication reports our investigations on the Fluorescence Resonance Energy Transfer (FRET) between two laser dyes Acriflavine and Rhodamine B in absence and presence of DNA at different pH. It has been observed that energy transfer efficiency is largely affected by the presence of DNA as well as the pH of the system. It is well known that with increase in pH, DNA conformation changes from double stranded to single stranded (denaturation) and finally form random coil. Based on our experimental results two different types of molecular logic gates namely, XOR and OR logic have been demonstrated which can be used to have an idea about DNA conformation in solution.

  16. Proposal for a graphene-based all-spin logic gate

    Science.gov (United States)

    Su, Li; Zhao, Weisheng; Zhang, Yue; Querlioz, Damien; Zhang, Youguang; Klein, Jacques-Olivier; Dollfus, Philippe; Bournel, Arnaud

    2015-02-01

    In this work, we present a graphene-based all-spin logic gate (G-ASLG) that integrates the functionalities of perpendicular anisotropy magnetic tunnel junctions (p-MTJs) with spin transport in graphene-channel. It provides an ideal integration of logic and memory. The input and output states are defined as the relative magnetization between free layer and fixed layer of p-MTJs. They can be probed by the tunnel magnetoresistance and controlled by spin transfer torque effect. Using lateral non-local spin valve, the spin information is transmitted by the spin-current interaction through graphene channels. By using a physics-based spin current compact model, the operation of G-ASLG is demonstrated and its performance is analyzed. It allows us to evaluate the influence of parameters, such as spin injection efficiency, spin diffusion length, contact area, the device length, and their interdependence, and to optimize the energy and dynamic performance. Compared to other beyond-CMOS solutions, longer spin information transport length (˜μm), higher data throughput, faster computing speed (˜ns), and lower power consumption (˜μA) can be expected from the G-ASLG.

  17. Proposal for a graphene-based all-spin logic gate

    International Nuclear Information System (INIS)

    Su, Li; Zhao, Weisheng; Zhang, Yue; Querlioz, Damien; Klein, Jacques-Olivier; Dollfus, Philippe; Bournel, Arnaud; Zhang, Youguang

    2015-01-01

    In this work, we present a graphene-based all-spin logic gate (G-ASLG) that integrates the functionalities of perpendicular anisotropy magnetic tunnel junctions (p-MTJs) with spin transport in graphene-channel. It provides an ideal integration of logic and memory. The input and output states are defined as the relative magnetization between free layer and fixed layer of p-MTJs. They can be probed by the tunnel magnetoresistance and controlled by spin transfer torque effect. Using lateral non-local spin valve, the spin information is transmitted by the spin-current interaction through graphene channels. By using a physics-based spin current compact model, the operation of G-ASLG is demonstrated and its performance is analyzed. It allows us to evaluate the influence of parameters, such as spin injection efficiency, spin diffusion length, contact area, the device length, and their interdependence, and to optimize the energy and dynamic performance. Compared to other beyond-CMOS solutions, longer spin information transport length (∼μm), higher data throughput, faster computing speed (∼ns), and lower power consumption (∼μA) can be expected from the G-ASLG

  18. Protected gates for topological quantum field theories

    International Nuclear Information System (INIS)

    Beverland, Michael E.; Pastawski, Fernando; Preskill, John; Buerschaper, Oliver; Koenig, Robert; Sijher, Sumit

    2016-01-01

    We study restrictions on locality-preserving unitary logical gates for topological quantum codes in two spatial dimensions. A locality-preserving operation is one which maps local operators to local operators — for example, a constant-depth quantum circuit of geometrically local gates, or evolution for a constant time governed by a geometrically local bounded-strength Hamiltonian. Locality-preserving logical gates of topological codes are intrinsically fault tolerant because spatially localized errors remain localized, and hence sufficiently dilute errors remain correctable. By invoking general properties of two-dimensional topological field theories, we find that the locality-preserving logical gates are severely limited for codes which admit non-abelian anyons, in particular, there are no locality-preserving logical gates on the torus or the sphere with M punctures if the braiding of anyons is computationally universal. Furthermore, for Ising anyons on the M-punctured sphere, locality-preserving gates must be elements of the logical Pauli group. We derive these results by relating logical gates of a topological code to automorphisms of the Verlinde algebra of the corresponding anyon model, and by requiring the logical gates to be compatible with basis changes in the logical Hilbert space arising from local F-moves and the mapping class group

  19. All-optical logic gates and wavelength conversion via the injection locking of a Fabry-Perot semiconductor laser

    Science.gov (United States)

    Harvey, E.; Pochet, M.; Schmidt, J.; Locke, T.; Naderi, N.; Usechak, N. G.

    2013-03-01

    This work investigates the implementation of all-optical logic gates based on optical injection locking (OIL). All-optical inverting, NOR, and NAND gates are experimentally demonstrated using two distributed feedback (DFB) lasers, a multi-mode Fabry-Perot laser diode, and an optical band-pass filter. The DFB lasers are externally modulated to represent logic inputs into the cavity of the multi-mode Fabry-Perot slave laser. The input DFB (master) lasers' wavelengths are aligned with the longitudinal modes of the Fabry-Perot slave laser and their optical power is used to modulate the injection conditions in the Fabry-Perot slave laser. The optical band-pass filter is used to select a Fabry- Perot mode that is either suppressed or transmitted given the logic state of the injecting master laser signals. When the input signal(s) is (are) in the on state, injection locking, and thus the suppression of the non-injected Fabry-Perot modes, is induced, yielding a dynamic system that can be used to implement photonic logic functions. Additionally, all-optical photonic processing is achieved using the cavity-mode shift produced in the injected slave laser under external optical injection. The inverting logic case can also be used as a wavelength converter — a key component in advanced wavelength-division multiplexing networks. As a result of this experimental investigation, a more comprehensive understanding of the locking parameters involved in injecting multiple lasers into a multi-mode cavity and the logic transition time is achieved. The performance of optical logic computations and wavelength conversion has the potential for ultrafast operation, limited primarily by the photon decay rate in the slave laser.

  20. Practical design of digital circuits basic logic to microprocessors

    CERN Document Server

    Kampel, Ian

    1983-01-01

    Practical Design of Digital Circuits: Basic Logic to Microprocessors demonstrates the practical aspects of digital circuit design. The intention is to give the reader sufficient confidence to embark upon his own design projects utilizing digital integrated circuits as soon as possible. The book is organized into three parts. Part 1 teaches the basic principles of practical design, and introduces the designer to his """"tools"""" - or rather, the range of devices that can be called upon. Part 2 shows the designer how to put these together into viable designs. It includes two detailed descriptio

  1. Reconfigurable OR and XOR logic gates based on dual responsive on-off-on micromotors

    Science.gov (United States)

    Dong, Yonggang; Liu, Mei; Zhang, Hui; Dong, Bin

    2016-04-01

    In this study, we report a hemisphere-like micromotor. Intriguingly, the micromotor exhibits controllable on-off-on motion, which can be actuated by two different external stimuli (UV and NH3). Moreover, the moving direction of the micromotor can be manipulated by the direction in which UV and NH3 are applied. As a result, the motion accelerates when both stimuli are applied in the same direction and decelerates when the application directions are opposite to each other. More interestingly, the dual stimuli responsive micromotor can be utilized as a reconfigurable logic gate with UV and NH3 as the inputs and the motion of the micromotor as the output. By controlling the direction of the external stimuli, OR and XOR dual logic functions can be realized.In this study, we report a hemisphere-like micromotor. Intriguingly, the micromotor exhibits controllable on-off-on motion, which can be actuated by two different external stimuli (UV and NH3). Moreover, the moving direction of the micromotor can be manipulated by the direction in which UV and NH3 are applied. As a result, the motion accelerates when both stimuli are applied in the same direction and decelerates when the application directions are opposite to each other. More interestingly, the dual stimuli responsive micromotor can be utilized as a reconfigurable logic gate with UV and NH3 as the inputs and the motion of the micromotor as the output. By controlling the direction of the external stimuli, OR and XOR dual logic functions can be realized. Electronic supplementary information (ESI) available: Fig. S1-S6 and Videos S1-S5. See DOI: 10.1039/c6nr00752j

  2. Ultracompact all-optical logic gates based on nonlinear plasmonic nanocavities

    Directory of Open Access Journals (Sweden)

    Yang Xiaoyu

    2016-09-01

    Full Text Available In this study, nanoscale integrated all-optical XNOR, XOR, and NAND logic gates were realized based on all-optical tunable on-chip plasmon-induced transparency in plasmonic circuits. A large nonlinear enhancement was achieved with an organic composite cover layer based on the resonant excitation-enhancing nonlinearity effect, slow light effect, and field confinement effect provided by the plasmonic nanocavity mode, which ensured a low excitation power of 200 μW that is three orders of magnitude lower than the values in previous reports. A feature size below 600 nm was achieved, which is a one order of magnitude lower compared to previous reports. The contrast ratio between the output logic states “1” and “0” reached 29 dB, which is among the highest values reported to date. Our results not only provide an on-chip platform for the study of nonlinear and quantum optics but also open up the possibility for the realization of nanophotonic processing chips based on nonlinear plasmonics.

  3. The development of a digital logic concept inventory

    Science.gov (United States)

    Herman, Geoffrey Lindsay

    Instructors in electrical and computer engineering and in computer science have developed innovative methods to teach digital logic circuits. These methods attempt to increase student learning, satisfaction, and retention. Although there are readily accessible and accepted means for measuring satisfaction and retention, there are no widely accepted means for assessing student learning. Rigorous assessment of learning is elusive because differences in topic coverage, curriculum and course goals, and exam content prevent direct comparison of two teaching methods when using tools such as final exam scores or course grades. Because of these difficulties, computing educators have issued a general call for the adoption of assessment tools to critically evaluate and compare the various teaching methods. Science, Technology, Engineering, and Mathematics (STEM) education researchers commonly measure students' conceptual learning to compare how much different pedagogies improve learning. Conceptual knowledge is often preferred because all engineering courses should teach a fundamental set of concepts even if they emphasize design or analysis to different degrees. Increasing conceptual learning is also important, because students who can organize facts and ideas within a consistent conceptual framework are able to learn new information quickly and can apply what they know in new situations. If instructors can accurately assess their students' conceptual knowledge, they can target instructional interventions to remedy common problems. To properly assess conceptual learning, several researchers have developed concept inventories (CIs) for core subjects in engineering sciences. CIs are multiple-choice assessment tools that evaluate how well a student's conceptual framework matches the accepted conceptual framework of a discipline or common faulty conceptual frameworks. We present how we created and evaluated the digital logic concept inventory (DLCI).We used a Delphi process to

  4. A psychometric evaluation of the digital logic concept inventory

    Science.gov (United States)

    Herman, Geoffrey L.; Zilles, Craig; Loui, Michael C.

    2014-10-01

    Concept inventories hold tremendous promise for promoting the rigorous evaluation of teaching methods that might remedy common student misconceptions and promote deep learning. The measurements from concept inventories can be trusted only if the concept inventories are evaluated both by expert feedback and statistical scrutiny (psychometric evaluation). Classical Test Theory and Item Response Theory provide two psychometric frameworks for evaluating the quality of assessment tools. We discuss how these theories can be applied to assessment tools generally and then apply them to the Digital Logic Concept Inventory (DLCI). We demonstrate that the DLCI is sufficiently reliable for research purposes when used in its entirety and as a post-course assessment of students' conceptual understanding of digital logic. The DLCI can also discriminate between students across a wide range of ability levels, providing the most information about weaker students' ability levels.

  5. Single-flux-quantum logic circuits exploiting collision-based fusion gates

    International Nuclear Information System (INIS)

    Asai, T.; Yamada, K.; Amemiya, Y.

    2008-01-01

    We propose a single-flux-quantum (SFQ) logic circuit based on the fusion computing systems--collision-based and reaction-diffusion fusion computers. A fusion computing system consists of regularly arrayed unit cells (fusion gates), where each unit has two input arms and two output arms and is connected to its neighboring cells with the arms. We designed functional SFQ circuits that implemented the fusion computation. The unit cell was able to be made with ten Josephson junctions. Circuit simulation with standard Nb/Al-AlOx/Nb 2.5-kA/cm 2 process parameters showed that the SFQ fusion computing systems could operate at 10 GHz clock

  6. Development of a sensor to study the DNA conformation using molecular logic gates.

    Science.gov (United States)

    Roy, Arpan Datta; Dey, Dibyendu; Saha, Jaba; Chakraborty, Santanu; Bhattacharjee, D; Hussain, Syed Arshad

    2015-02-05

    This communication reports our investigations on the Fluorescence Resonance Energy Transfer (FRET) between two laser dyes Acriflavine and Rhodamine B in absence and presence of DNA at different pH. It has been observed that energy transfer efficiency is largely affected by the presence of DNA as well as the pH of the system. It is well known that with increase in pH, DNA conformation changes from double stranded to single stranded (denaturation) and finally form random coil. Based on our experimental results two different types of molecular logic gates namely, XOR and OR logic have been demonstrated which can be used to have an idea about DNA conformation in solution. Copyright © 2014 Elsevier B.V. All rights reserved.

  7. Fully digital routing logic for single-photon avalanche diode arrays in highly efficient time-resolved imaging

    Science.gov (United States)

    Cominelli, Alessandro; Acconcia, Giulia; Ghioni, Massimo; Rech, Ivan

    2018-03-01

    Time-correlated single-photon counting (TCSPC) is a powerful optical technique, which permits recording fast luminous signals with picosecond precision. Unfortunately, given its repetitive nature, TCSPC is recognized as a relatively slow technique, especially when a large time-resolved image has to be recorded. In recent years, there has been a fast trend toward the development of TCPSC imagers. Unfortunately, present systems still suffer from a trade-off between number of channels and performance. Even worse, the overall measurement speed is still limited well below the saturation of the transfer bandwidth toward the external processor. We present a routing algorithm that enables a smart connection between a 32×32 detector array and five shared high-performance converters able to provide an overall conversion rate up to 10 Gbit/s. The proposed solution exploits a fully digital logic circuit distributed in a tree structure to limit the number and length of interconnections, which is a major issue in densely integrated circuits. The behavior of the logic has been validated by means of a field-programmable gate array, while a fully integrated prototype has been designed in 180-nm technology and analyzed by means of postlayout simulations.

  8. Easy design of colorimetric logic gates based on nonnatural base pairing and controlled assembly of gold nanoparticles.

    Science.gov (United States)

    Zhang, Li; Wang, Zhong-Xia; Liang, Ru-Ping; Qiu, Jian-Ding

    2013-07-16

    Utilizing the principles of metal-ion-mediated base pairs (C-Ag-C and T-Hg-T), the pH-sensitive conformational transition of C-rich DNA strand, and the ligand-exchange process triggered by DL-dithiothreitol (DTT), a system of colorimetric logic gates (YES, AND, INHIBIT, and XOR) can be rationally constructed based on the aggregation of the DNA-modified Au NPs. The proposed logic operation system is simple, which consists of only T-/C-rich DNA-modified Au NPs, and it is unnecessary to exquisitely design and alter the DNA sequence for different multiple molecular logic operations. The nonnatural base pairing combined with unique optical properties of Au NPs promises great potential in multiplexed ion sensing, molecular-scale computers, and other computational logic devices.

  9. Multiple advanced logic gates made of DNA-Ag nanocluster and the application for intelligent detection of pathogenic bacterial genes† †Electronic supplementary information (ESI) available: Chemicals, materials and DNA sequences used in the investigation, the construction of YES, AND, OR, XOR and INH logic gates, CD and PAGE experimental results. See DOI: 10.1039/c7sc05246d

    Science.gov (United States)

    Lin, Xiaodong; Deng, Jiankang; Lyu, Yanlong; Qian, Pengcheng; Li, Yunfei

    2018-01-01

    The integration of multiple DNA logic gates on a universal platform to implement advance logic functions is a critical challenge for DNA computing. Herein, a straightforward and powerful strategy in which a guanine-rich DNA sequence lighting up a silver nanocluster and fluorophore was developed to construct a library of logic gates on a simple DNA-templated silver nanoclusters (DNA-AgNCs) platform. This library included basic logic gates, YES, AND, OR, INHIBIT, and XOR, which were further integrated into complex logic circuits to implement diverse advanced arithmetic/non-arithmetic functions including half-adder, half-subtractor, multiplexer, and demultiplexer. Under UV irradiation, all the logic functions could be instantly visualized, confirming an excellent repeatability. The logic operations were entirely based on DNA hybridization in an enzyme-free and label-free condition, avoiding waste accumulation and reducing cost consumption. Interestingly, a DNA-AgNCs-based multiplexer was, for the first time, used as an intelligent biosensor to identify pathogenic genes, E. coli and S. aureus genes, with a high sensitivity. The investigation provides a prototype for the wireless integration of multiple devices on even the simplest single-strand DNA platform to perform diverse complex functions in a straightforward and cost-effective way. PMID:29675221

  10. Spectroscopic and TDDFT investigation on highly selective fluorogenic chemosensor and construction of molecular logic gates

    Energy Technology Data Exchange (ETDEWEB)

    Basheer, Sabeel M [Department of Chemistry, National Institute of Technology, Tiruchirappalli 620 015 (India); Kumar, Saravana Loganathan Ashok [Department of Chemistry, GRT Institute of Engineering Technology, Tiruttani (India); Kumar, Moorthy Saravana [Research and PG Department of Chemistry, Saraswathi Narayanan College, Madurai 625022 (India); Sreekanth, Anandaram, E-mail: sreekanth@nitt.edu [Department of Chemistry, National Institute of Technology, Tiruchirappalli 620 015 (India)

    2017-03-01

    1,5-Bis(2-fluorene)thiocarbohydrazone (FBTC) was designed and synthesized for selective sensing of fluoride and copper ions. The binding constants of FBTC towards fluoride and copper ions have been calculated using the Benesi-Hildebrand equation, and FBTC has more binding affinity towards copper ion than fluoride ion. The {sup 1}H NMR and {sup 13}C NMR titration studies strongly support the deprotonation was taken from the N–H protons followed by the formation of hydrogen bond via N–H{sup …}F. To understand the fluoride ion sensing mechanism, theoretical investigation had been carried out using the density functional theory and time-dependent density functional theory. The theoretical data well reproduced the experimental results. The deprotonation process has a moderate transition barrier (481.55 kcal/mol). The calculated ΔE and ΔG values (− 253.92 and − 192.41 kcal/mol respectively) suggest the feasibility of sensing process. The potential energy curves give the optimized structures of FBTC-F complex in the ground state and excited state, which states the proton transition occurs at the excited state. The excited state proton transition mechanism was further confirmed with natural bond orbital analysis. The reversibility of the sensor was monitored by the alternate addition of F{sup −} and Cu{sup 2+} ions, which was explained with “Read-Erase-Write-Read” behaviour. The multi-ion detection of sensor used to construct the molecular logic gate, such as AND, OR, NOR and INHIBITION logic gates. - Highlight: • Synthesis and characterised the thiosemicarbohydrazone derivative • Experimental evolution of selective fluoride and copper sensing via both colorimetric and spectroscopic studies • The proposed sensing mechanism of fluoride and copper ion were further confirmed with DFT and TD-DFT investigation • Receptor was turned as molecular switches and molecular logic gates.

  11. Boolean gates on actin filaments

    International Nuclear Information System (INIS)

    Siccardi, Stefano; Tuszynski, Jack A.; Adamatzky, Andrew

    2016-01-01

    Actin is a globular protein which forms long polar filaments in the eukaryotic cytoskeleton. Actin networks play a key role in cell mechanics and cell motility. They have also been implicated in information transmission and processing, memory and learning in neuronal cells. The actin filaments have been shown to support propagation of voltage pulses. Here we apply a coupled nonlinear transmission line model of actin filaments to study interactions between voltage pulses. To represent digital information we assign a logical TRUTH value to the presence of a voltage pulse in a given location of the actin filament, and FALSE to the pulse's absence, so that information flows along the filament with pulse transmission. When two pulses, representing Boolean values of input variables, interact, then they can facilitate or inhibit further propagation of each other. We explore this phenomenon to construct Boolean logical gates and a one-bit half-adder with interacting voltage pulses. We discuss implications of these findings on cellular process and technological applications. - Highlights: • We simulate interaction between voltage pulses using on actin filaments. • We use a coupled nonlinear transmission line model. • We design Boolean logical gates via interactions between the voltage pulses. • We construct one-bit half-adder with interacting voltage pulses.

  12. Boolean gates on actin filaments

    Energy Technology Data Exchange (ETDEWEB)

    Siccardi, Stefano, E-mail: ssiccardi@2ssas.it [The Unconventional Computing Centre, University of the West of England, Bristol (United Kingdom); Tuszynski, Jack A., E-mail: jackt@ualberta.ca [Department of Oncology, University of Alberta, Edmonton, Alberta (Canada); Adamatzky, Andrew, E-mail: andrew.adamatzky@uwe.ac.uk [The Unconventional Computing Centre, University of the West of England, Bristol (United Kingdom)

    2016-01-08

    Actin is a globular protein which forms long polar filaments in the eukaryotic cytoskeleton. Actin networks play a key role in cell mechanics and cell motility. They have also been implicated in information transmission and processing, memory and learning in neuronal cells. The actin filaments have been shown to support propagation of voltage pulses. Here we apply a coupled nonlinear transmission line model of actin filaments to study interactions between voltage pulses. To represent digital information we assign a logical TRUTH value to the presence of a voltage pulse in a given location of the actin filament, and FALSE to the pulse's absence, so that information flows along the filament with pulse transmission. When two pulses, representing Boolean values of input variables, interact, then they can facilitate or inhibit further propagation of each other. We explore this phenomenon to construct Boolean logical gates and a one-bit half-adder with interacting voltage pulses. We discuss implications of these findings on cellular process and technological applications. - Highlights: • We simulate interaction between voltage pulses using on actin filaments. • We use a coupled nonlinear transmission line model. • We design Boolean logical gates via interactions between the voltage pulses. • We construct one-bit half-adder with interacting voltage pulses.

  13. A novel three-input monomolecular logic circuit on a rhodamine inspired bio-compatible bi-compartmental molecular platform

    International Nuclear Information System (INIS)

    Mistri, Tarun; Bhowmick, Rahul; Katarkar, Atul; Chaudhuri, Keya; Ali, Mahammad

    2017-01-01

    Methodological synthesis of a new biocompatible bi-compartmental rhodamine based probe (L 3 ) provides a multi-inputs and multi-outputs molecular logic circuit based on simple chemosensing phenomena. Spectroscopic responses of Cu 2+ and Hg 2+ towards L 3 together with reversible binding of S 2- with L 3 -Cu 2+ and L 3 -Hg 2+ complexes help us to construct a thee-input molecular circuit on their control and sequential addition to a solution of L 3 in a mixed organo-aqueous medium. We have further successfully encoded binary digits out of these inputs and outputs which may convert a three-digit input string into a two-digit output string resulting a simple monomolecular logic circuit. Such a molecular ‘Boolean’ logic operation may improve the complexity of logic gate circuitry and computational speed and may be useful to employ in potential biocompatible molecular logic platforms. - Graphical abstract: A new bi-compartmental molecular system equipped with Rhodamine fluorophore unit provides a Multi-inputs and Multi-outputs Molecular Logic Circuit based on a very simple observation of chemosensing activities.

  14. Selected area growth integrated wavelength converter based on PD-EAM optical logic gate

    International Nuclear Information System (INIS)

    Niu Bin; Zhou Daibing; Zhang Can; Liang Song; Lu Dan; Zhao Lingjuan; Wang Wei; Qiu Jifang; Wu Jian

    2014-01-01

    A selected area growth wavelength converter based on a PD-EAM optical logic gate for WDM application is presented, integrating an EML transmitter and a SOA-PD receiver. The design, fabrication, and DC characters were analyzed. A 2 Gb/s NRZ signal based on the C-band wavelength converted to 1555 nm with the highest extinction ratio of 7 dB was achieved and wavelength converted eye diagrams with eyes opened were presented. (semiconductor devices)

  15. Construction of high-dimensional universal quantum logic gates using a Λ system coupled with a whispering-gallery-mode microresonator.

    Science.gov (United States)

    He, Ling Yan; Wang, Tie-Jun; Wang, Chuan

    2016-07-11

    High-dimensional quantum system provides a higher capacity of quantum channel, which exhibits potential applications in quantum information processing. However, high-dimensional universal quantum logic gates is difficult to achieve directly with only high-dimensional interaction between two quantum systems and requires a large number of two-dimensional gates to build even a small high-dimensional quantum circuits. In this paper, we propose a scheme to implement a general controlled-flip (CF) gate where the high-dimensional single photon serve as the target qudit and stationary qubits work as the control logic qudit, by employing a three-level Λ-type system coupled with a whispering-gallery-mode microresonator. In our scheme, the required number of interaction times between the photon and solid state system reduce greatly compared with the traditional method which decomposes the high-dimensional Hilbert space into 2-dimensional quantum space, and it is on a shorter temporal scale for the experimental realization. Moreover, we discuss the performance and feasibility of our hybrid CF gate, concluding that it can be easily extended to a 2n-dimensional case and it is feasible with current technology.

  16. Surface confined assemblies and polymers for sensing and molecular logic

    Science.gov (United States)

    de Ruiter, Graham; Altman, Marc; Motiei, Leila; Lahav, Michal; van der Boom, Milko E.

    2013-05-01

    Since the development of molecule-based sensors and the introduction of molecules mimicking the behavior of the AND gate in solution by de Silva in 1993, molecular (Boolean) Logic and Computing (MBLC) has become increasingly popular. The molecular approach toward Boolean logic resulted in intriguing proofs of concepts in solution including logic gates, half-adders, multiplexers, and flip-flop logic circuits. Molecular assemblies can perform diverse logic tasks by reconfiguring their inputs. Our recent research activities focus on MBLC with electrochromic polymers and immobilized polypyridyl complexes on solid support. We have designed a series of coordination-based thin films that are formed linearly by stepwise wet-chemical deposition or by self-propagating molecular assembly. The electrochromic properties of these films can be used for (i) detecting various analytes in solution and in the air, (ii) MBLC, (iii) electron-transfer studies, and (iv) interlayers for efficient inverted bulk-heterojunction solar cells. Our concept toward MBLC with functionalized surfaces is applicable to electrochemical and chemical inputs coupled with optical readout. Using this approach, we demonstrated various logic architectures with redox-active functionalized surfaces. Electrochemically operated sequential logic systems (e.g., flip-flops), multi-valued logic, and multi-state memory have been designed, which can improve computational power without increasing spatial requirements. Applying multi-valued digits in data storage and information processing could exponentially increase memory capacity. Our approach is applicable to highly diverse electrochromic thin films that operate at practical voltages (< 1.5 V).

  17. A survey of advancements in nucleic acid-based logic gates and computing for applications in biotechnology and biomedicine.

    Science.gov (United States)

    Wu, Cuichen; Wan, Shuo; Hou, Weijia; Zhang, Liqin; Xu, Jiehua; Cui, Cheng; Wang, Yanyue; Hu, Jun; Tan, Weihong

    2015-03-04

    Nucleic acid-based logic devices were first introduced in 1994. Since then, science has seen the emergence of new logic systems for mimicking mathematical functions, diagnosing disease and even imitating biological systems. The unique features of nucleic acids, such as facile and high-throughput synthesis, Watson-Crick complementary base pairing, and predictable structures, together with the aid of programming design, have led to the widespread applications of nucleic acids (NA) for logic gate and computing in biotechnology and biomedicine. In this feature article, the development of in vitro NA logic systems will be discussed, as well as the expansion of such systems using various input molecules for potential cellular, or even in vivo, applications.

  18. Characteristics of dual-gate thin-film transistors for applications in digital radiology

    International Nuclear Information System (INIS)

    Waechter, D.; Huang, Z.; Zhao, W.; Blevis, I.; Rowlands, J.A.

    1996-01-01

    A large-area flat-panel detector for digital radiology is being developed. The detector uses an array of dual-gate thin-film transistors (TFTs) to read out X-ray-generated charge produced in an amorphous selenium (a-Se) layer. The TFTs use CdSe as the semiconductor and use the bottom gate for row selection. The top gate can be divided into a 'deliberate' gate, covering most of the channel length, and small 'parasitic' gates that consist of: overlap of source or drain metal over the top-gate oxide; and gap regions in the metal that are covered only by the a-Se. In this paper we present the properties of dual-gate TFTs and examine the effect of both the deliberate and parasitic gates on the detector operation. Various options for controlling the top-gate potential are analyzed and discussed. (author)

  19. LicenseScript: A Logical Language for Digital Rights Management

    NARCIS (Netherlands)

    Chong, C.N.; Corin, R.J.; Doumen, J.M.; Etalle, Sandro; Hartel, Pieter H.; Law, Y.W.; Tokmakoff, Andrew

    We propose LicenseScript, a language for digital rights management (DRM) based on multiset rewriting and logic programming. LicenseScript enjoys a precise syntax and semantics, and it is rich enough to embed other rights expression languages (REL). We show that LicenseScript is expressive and

  20. Quantum computer with mixed states and four-valued logic

    International Nuclear Information System (INIS)

    Tarasov, Vasily E.

    2002-01-01

    In this paper we discuss a model of quantum computer in which a state is an operator of density matrix and gates are general quantum operations, not necessarily unitary. A mixed state (operator of density matrix) of n two-level quantum systems is considered as an element of 4 n -dimensional operator Hilbert space (Liouville space). It allows us to use a quantum computer model with four-valued logic. The gates of this model are general superoperators which act on n-ququat state. Ququat is a quantum state in a four-dimensional (operator) Hilbert space. Unitary two-valued logic gates and quantum operations for an n-qubit open system are considered as four-valued logic gates acting on n-ququats. We discuss properties of quantum four-valued logic gates. In the paper we study universality for quantum four-valued logic gates. (author)

  1. A logic circuit for solving linear function by digital method

    International Nuclear Information System (INIS)

    Ma Yonghe

    1986-01-01

    A mathematical method for determining the linear relation of physical quantity with rediation intensity is described. A logic circuit has been designed for solving linear function by digital method. Some applications and the circuit function are discussed

  2. Logical operations realized on the Ising chain of N qubits

    International Nuclear Information System (INIS)

    Asano, Masanari; Tateda, Norihiro; Ishii, Chikara

    2004-01-01

    Multiqubit logical gates are proposed as implementations of logical operations on N qubits realized physically by the local manipulation of qubits before and after the one-time evolution of an Ising chain. This construction avoids complicated tuning of the interactions between qubits. The general rules of the action of multiqubit logical gates are derived by decomposing the process into the product of two-qubit logical operations. The formalism is demonstrated by the construction of a special type of multiqubit logical gate that is simulated by a quantum circuit composed of controlled-NOT gates

  3. Application of Field programmable Gate Array to Digital Signal ...

    African Journals Online (AJOL)

    Journal of Research in National Development ... This work shows how one parallel technology Field Programmable Gate Array (FPGA) can be applied to digital signal processing problem to increase computational speed. ... In this research work FPGA typically exploits parallelism because FPGA is a parallel device. With the ...

  4. All-optical symmetric ternary logic gate

    Science.gov (United States)

    Chattopadhyay, Tanay

    2010-09-01

    Symmetric ternary number (radix=3) has three logical states (1¯, 0, 1). It is very much useful in carry free arithmetical operation. Beside this, the logical operation using this type of number system is also effective in high speed computation and communication in multi-valued logic. In this literature all-optical circuits for three basic symmetrical ternary logical operations (inversion, MIN and MAX) are proposed and described. Numerical simulation verifies the theoretical model. In this present scheme the different ternary logical states are represented by different polarized state of light. Terahertz optical asymmetric demultiplexer (TOAD) based interferometric switch has been used categorically in this manuscript.

  5. Development of RPS trip logic based on PLD technology

    International Nuclear Information System (INIS)

    Choi, Jong Gyun; Lee, Dong Young

    2012-01-01

    The majority of instrumentation and control (I and C) systems in today's nuclear power plants (NPPs) are based on analog technology. Thus, most existing I and C systems now face obsolescence problems. Existing NPPs have difficulty in repairing and replacing devices and boards during maintenance because manufacturers no longer produce the analog devices and boards used in the implemented I and C systems. Therefore, existing NPPs are replacing the obsolete analog I and C systems with advanced digital systems. New NPPs are also adopting digital I and C systems because the economic efficiencies and usability of the systems are higher than the analog I and C systems. Digital I and C systems are based on two technologies: a microprocessor based system in which software programs manage the required functions and a programmable logic device (PLD) based system in which programmable logic devices, such as field programmable gate arrays, manage the required functions. PLD based systems provide higher levels of performance compared with microprocessor based systems because PLD systems can process the data in parallel while microprocessor based systems process the data sequentially. In this research, a bistable trip logic in a reactor protection system (RPS) was developed using very high speed integrated circuits hardware description language (VHDL), which is a hardware description language used in electronic design to describe the behavior of the digital system. Functional verifications were also performed in order to verify that the bistable trip logic was designed correctly and satisfied the required specifications. For the functional verification, a random testing technique was adopted to generate test inputs for the bistable trip logic.

  6. Principles of logic and the use of digital geographic information systems

    Science.gov (United States)

    Robinove, Charles Joseph

    1986-01-01

    Digital geographic information systems allow many different types of data to be spatially and statistically analyzed. Logical operations can be performed on individual or multiple data planes by algorithms that can be implemented in computer systems. Users and creators of the systems should fully understand these operations. This paper describes the relationships of layers and features in geographic data bases and the principles of logic that can be applied by geographic information systems and suggests that a thorough knowledge of the data that are entered into a geographic data base and of the logical operations will produce results that are most satisfactory to the user. Methods of spatial analysis are reduced to their primitive logical operations and explained to further such understanding.

  7. Toward Efficient Design of Reversible Logic Gates in Quantum-Dot Cellular Automata with Power Dissipation Analysis

    Science.gov (United States)

    Sasamal, Trailokya Nath; Singh, Ashutosh Kumar; Ghanekar, Umesh

    2018-04-01

    Nanotechnologies, remarkably Quantum-dot Cellular Automata (QCA), offer an attractive perspective for future computing technologies. In this paper, QCA is investigated as an implementation method for designing area and power efficient reversible logic gates. The proposed designs achieve superior performance by incorporating a compact 2-input XOR gate. The proposed design for Feynman, Toffoli, and Fredkin gates demonstrates 28.12, 24.4, and 7% reduction in cell count and utilizes 46, 24.4, and 7.6% less area, respectively over previous best designs. Regarding the cell count (area cover) that of the proposed Peres gate and Double Feynman gate are 44.32% (21.5%) and 12% (25%), respectively less than the most compact previous designs. Further, the delay of Fredkin and Toffoli gates is 0.75 clock cycles, which is equal to the delay of the previous best designs. While the Feynman and Double Feynman gates achieve a delay of 0.5 clock cycles, equal to the least delay previous one. Energy analysis confirms that the average energy dissipation of the developed Feynman, Toffoli, and Fredkin gates is 30.80, 18.08, and 4.3% (for 1.0 E k energy level), respectively less compared to best reported designs. This emphasizes the beneficial role of using proposed reversible gates to design complex and power efficient QCA circuits. The QCADesigner tool is used to validate the layout of the proposed designs, and the QCAPro tool is used to evaluate the energy dissipation.

  8. A novel three-input monomolecular logic circuit on a rhodamine inspired bio-compatible bi-compartmental molecular platform

    Energy Technology Data Exchange (ETDEWEB)

    Mistri, Tarun; Bhowmick, Rahul [Department of Chemistry, Jadavpur University, 188 Raja S.C. Mullick Road, Kolkata 700032 (India); Katarkar, Atul; Chaudhuri, Keya [Molecular & Human Genetics Division, CSIR-Indian Institute of Chemical Biology, 4 Raja S.C. Mullick Road, Kolkata 700032 (India); Ali, Mahammad, E-mail: mali@chemistry.jdvu.ac.in [Department of Chemistry, Jadavpur University, 188 Raja S.C. Mullick Road, Kolkata 700032 (India)

    2017-05-15

    Methodological synthesis of a new biocompatible bi-compartmental rhodamine based probe (L{sup 3}) provides a multi-inputs and multi-outputs molecular logic circuit based on simple chemosensing phenomena. Spectroscopic responses of Cu{sup 2+} and Hg{sup 2+} towards L{sup 3} together with reversible binding of S{sup 2-} with L{sup 3}-Cu{sup 2+} and L{sup 3}-Hg{sup 2+} complexes help us to construct a thee-input molecular circuit on their control and sequential addition to a solution of L{sup 3} in a mixed organo-aqueous medium. We have further successfully encoded binary digits out of these inputs and outputs which may convert a three-digit input string into a two-digit output string resulting a simple monomolecular logic circuit. Such a molecular ‘Boolean’ logic operation may improve the complexity of logic gate circuitry and computational speed and may be useful to employ in potential biocompatible molecular logic platforms. - Graphical abstract: A new bi-compartmental molecular system equipped with Rhodamine fluorophore unit provides a Multi-inputs and Multi-outputs Molecular Logic Circuit based on a very simple observation of chemosensing activities.

  9. Logical operations using phenyl ring

    Science.gov (United States)

    Patra, Moumita; Maiti, Santanu K.

    2018-02-01

    Exploiting the effects of quantum interference we put forward an idea of designing three primary logic gates, OR, AND and NOT, using a benzene molecule. Under a specific molecule-lead interface geometry, anti-resonant states appear which play the crucial role for AND and NOT operations, while for OR gate no such states are required. Our analysis leads to a possibility of designing logic gates using simple molecular structure which might be significant in the area of molecular electronics.

  10. Low-power logic computing realized in a single electric-double-layer MoS2 transistor gated with polymer electrolyte

    Science.gov (United States)

    Guo, Junjie; Xie, Dingdong; Yang, Bingchu; Jiang, Jie

    2018-06-01

    Due to its mechanical flexibility, large bandgap and carrier mobility, atomically thin molybdenum disulphide (MoS2) has attracted widespread attention. However, it still lacks a facile route to fabricate a low-power high-performance logic gates/circuits before it gets the real application. Herein, we reported a facile and environment-friendly method to establish the low-power logic function in a single MoS2 field-effect transistor (FET) configuration gated with a polymer electrolyte. Such low-power and high-performance MoS2 FET can be implemented by using water-soluble polyvinyl alcohol (PVA) polymer as proton-conducting electric-double-layer (EDL) dielectric layer. It exhibited an ultra-low voltage (1.5 V) and a good performance with a high current on/off ratio (Ion/off) of 1 × 105, a large electron mobility (μ) of 47.5 cm2/V s, and a small subthreshold swing (S) of 0.26 V/dec, respectively. The inverter can be realized by using such a single MoS2 EDL FET with a gain of ∼4 at the operation voltage of only ∼1 V. Most importantly, the neuronal AND logic computing can be also demonstrated by using such a double-lateral-gate single MoS2 EDL transistor. These results show an effective step for future applications of 2D MoS2 FETs for integrated electronic engineering and low-energy environment-friendly green electronics.

  11. All-optical universal logic gates on nonlinear multimode interference coupler using tunable input intensity

    Science.gov (United States)

    Tajaldini, Mehdi; Jafri, Mohd Zubir Mat

    2015-04-01

    The theory of Nonlinear Modal Propagation Analysis Method (NMPA) have shown significant features of nonlinear multimode interference (MMI) coupler with compact dimension and when launched near the threshold of nonlinearity. Moreover, NMPA have the potential to allow studying the nonlinear MMI based the modal interference to explorer the phenomenon that what happen due to the natural of multimode region. Proposal of all-optical switch based NMPA has approved its capability to achieving the all-optical gates. All-optical gates have attracted increasing attention due to their practical utility in all-optical signal processing networks and systems. Nonlinear multimode interference devices could apply as universal all-optical gates due to significant features that NMPA introduce them. In this Paper, we present a novel Ultra-compact MMI coupler based on NMPA method in low intensity compared to last reports either as a novel design method and potential application for optical NAND, NOR as universal gates on single structure for Boolean logic signal processing devices and optimize their application via studding the contrast ratio between ON and OFF as a function of output width. We have applied NMPA for several applications so that the miniaturization in low nonlinear intensities is their main purpose.

  12. Digital logic circuit design with ALTERA Quartus II

    International Nuclear Information System (INIS)

    Lee, Seung Ho

    2009-09-01

    This book consists 31 chapters about digital logic circuit with ALTERA Quartus II. It includes the introduction of ALTERA Quartus II, ALTERA Quartus II schematic editor, ALTERA Quartus II compiler, ALTERA Quartus II simulator, ALTERA Quartus II timing analyzer, how to use HBE-COMBO II training and HBE-COMBO II training kit with schematic editor, VHDL grammar and practice of ALTERA Quartus II and HBE-COMBO II training kit with VHDL.

  13. Energy-Efficient Wide Datapath Integer Arithmetic Logic Units Using Superconductor Logic

    Science.gov (United States)

    Ayala, Christopher Lawrence

    Complementary Metal-Oxide-Semiconductor (CMOS) technology is currently the most widely used integrated circuit technology today. As CMOS approaches the physical limitations of scaling, it is unclear whether or not it can provide long-term support for niche areas such as high-performance computing and telecommunication infrastructure, particularly with the emergence of cloud computing. Alternatively, superconductor technologies based on Josephson junction (JJ) switching elements such as Rapid Single Flux Quantum (RSFQ) logic and especially its new variant, Energy-Efficient Rapid Single Flux Quantum (ERSFQ) logic have the capability to provide an ultra-high-speed, low power platform for digital systems. The objective of this research is to design and evaluate energy-efficient, high-speed 32-bit integer Arithmetic Logic Units (ALUs) implemented using RSFQ and ERSFQ logic as the first steps towards achieving practical Very-Large-Scale-Integration (VLSI) complexity in digital superconductor electronics. First, a tunable VHDL superconductor cell library is created to provide a mechanism to conduct design exploration and evaluation of superconductor digital circuits from the perspectives of functionality, complexity, performance, and energy-efficiency. Second, hybrid wave-pipelining techniques developed earlier for wide datapath RSFQ designs have been used for efficient arithmetic and logic circuit implementations. To develop the core foundation of the ALU, the ripple-carry adder and the Kogge-Stone parallel prefix carry look-ahead adder are studied as representative candidates on opposite ends of the design spectrum. By combining the high-performance features of the Kogge-Stone structure and the low complexity of the ripple-carry adder, a 32-bit asynchronous wave-pipelined hybrid sparse-tree ALU has been designed and evaluated using the VHDL cell library tuned to HYPRES' gate-level characteristics. The designs and techniques from this research have been implemented using

  14. Environment dependent enhanced photoluminescence and Boolean logic gates like behavior of Bi2O3 and Ag:Bi2O3 nanostructures

    Science.gov (United States)

    Hariharan, S.; Karthikeyan, B.

    2018-03-01

    In the evolution of nanotechnology research for smart and precise sensor fabrication, here we report the implementation of simple logic gate operations performing by luminescent nanostructures in biomolecule environment based on photoluminescence (PL) technique. This present work deals with the luminescence property of α-Bi2O3 and Ag modified α-Bi2O3 nanostructures for D-glucose and Bovine serum albumin (BSA) sensing applications. These nanostructures are prepared by simple co-precipitation method and their morphology are examined using transmission electron microscope (TEM). We explore the PL characteristics of the prepared nanostructures and observe their change in PL intensity in the presence of D-glucose and BSA molecules. Enhancement in PL intensity is observed in the presence of D-glucose and BSA. Based on the PL response of prepared nanostructures in the biomolecule environment, we demonstrate biophotonic logic gates including YES, PASS 0, OR and INHIBIT gates.

  15. Superconducting digital logic amplifier

    International Nuclear Information System (INIS)

    Przybysz, J.X.

    1989-01-01

    This paper describes a superconducting digital logic amplifier for interfacing between a Josephson junction logic circuit having output current and a higher voltage semiconductor circuit input. The amplifier comprising: an input terminal for connection to a; an output terminal for connection to a semiconductor circuit input; an input, lower critical current, Josephson junction having first and second terminals; a first series string of at least three lower critical current Josephson junctions. The first series string being connected to the first terminal of the input Josephson junction such that the first series string is in series with the input Josephson junction to provide a series combination. The input terminal being connected to the first terminal of the input Josephson junction, and with the critical current of the lower critical current Josephson junctions of the input Josephson junction and the first series Josephson junctions being less than the output current of the low voltage Josephson junction circuit; a second series string of at least four higher critical current Josephson junctions. The second string being connected in parallel with the series combination to provide parallel strings having an upper common connection and a lower common connection. The lower common connection being connected to the second terminal of the input Josephson junction and the upper common connection being connected to the output terminal; and a pulsed DC current source connected the parallel strings at the upper common connection. The DC current source having a current at least equal to the critical current of the higher critical current Josephson junctions

  16. A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array

    International Nuclear Information System (INIS)

    Wang, Yonggang; Kuang, Jie; Liu, Chong; Cao, Qiang; Li, Deng

    2017-01-01

    A high performance multi-channel time-to-digital converter (TDC) is implemented in a Xilinx Zynq-7000 field programmable gate array (FPGA). It can be flexibly configured as either 32 TDC channels with 9.9 ps time-interval RMS precision, 16 TDC channels with 6.9 ps RMS precision, or 8 TDC channels with 5.8 ps RMS precision. All TDCs have a 380 M Samples/second measurement throughput and a 2.63 ns measurement dead time. The performance consistency and temperature dependence of TDC channels are also evaluated. Because Zynq-7000 FPGA family integrates a feature-rich dual-core ARM based processing system and 28 nm Xilinx programmable logic in a single device, the realization of high performance TDCs on it will make the platform more widely used in time-measuring related applications.

  17. A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Yonggang, E-mail: wangyg@ustc.edu.cn; Kuang, Jie; Liu, Chong; Cao, Qiang; Li, Deng

    2017-03-01

    A high performance multi-channel time-to-digital converter (TDC) is implemented in a Xilinx Zynq-7000 field programmable gate array (FPGA). It can be flexibly configured as either 32 TDC channels with 9.9 ps time-interval RMS precision, 16 TDC channels with 6.9 ps RMS precision, or 8 TDC channels with 5.8 ps RMS precision. All TDCs have a 380 M Samples/second measurement throughput and a 2.63 ns measurement dead time. The performance consistency and temperature dependence of TDC channels are also evaluated. Because Zynq-7000 FPGA family integrates a feature-rich dual-core ARM based processing system and 28 nm Xilinx programmable logic in a single device, the realization of high performance TDCs on it will make the platform more widely used in time-measuring related applications.

  18. Computational logic with square rings of nanomagnets

    Science.gov (United States)

    Arava, Hanu; Derlet, Peter M.; Vijayakumar, Jaianth; Cui, Jizhai; Bingham, Nicholas S.; Kleibert, Armin; Heyderman, Laura J.

    2018-06-01

    Nanomagnets are a promising low-power alternative to traditional computing. However, the successful implementation of nanomagnets in logic gates has been hindered so far by a lack of reliability. Here, we present a novel design with dipolar-coupled nanomagnets arranged on a square lattice to (i) support transfer of information and (ii) perform logic operations. We introduce a thermal protocol, using thermally active nanomagnets as a means to perform computation. Within this scheme, the nanomagnets are initialized by a global magnetic field and thermally relax on raising the temperature with a resistive heater. We demonstrate error-free transfer of information in chains of up to 19 square rings and we show a high level of reliability with successful gate operations of ∼94% across more than 2000 logic gates. Finally, we present a functionally complete prototype NAND/NOR logic gate that could be implemented for advanced logic operations. Here we support our experiments with simulations of the thermally averaged output and determine the optimal gate parameters. Our approach provides a new pathway to a long standing problem concerning reliability in the use of nanomagnets for computation.

  19. Design and Analysis of Double-Gate MOSFETs for Ultra-Low Power Radio Frequency Identification (RFID: Device and Circuit Co-Design

    Directory of Open Access Journals (Sweden)

    Tony T. Kim

    2011-07-01

    Full Text Available Recently, double-gate MOSFETs (DGMOSFETs have been shown to be more optimal for ultra-low power circuit design due to the improved subthreshold slope and the reduced leakage current compared to bulk CMOS. However, DGMOSFETs for subthreshold circuit design have not been much explored in comparison to those for strong inversion-based design. In this paper, various configurations of DGMOSFETs, such as tied/independent gates and symmetric/asymmetric gate oxide thickness are explored for ultra-low power and high efficient radio frequency identification (RFID design. Comparison of bulk CMOS with DGMOSFETs has been conducted in ultra-low power subthreshold digital logic design and rectifier design, emphasizing the scope of the nano-scale DGMOSFET technology for future ultra-low power systems. The DGMOSFET-based subthreshold logic improves energy efficiency by more than 40% compared to the bulk CMOS-based logic at 32 nm. Among the various DGMOSFET configurations for RFID rectifiers, symmetric tied-gate DGMOSFET has the best power conversion efficiency and the lowest power consumption.

  20. Complex logic functions implemented with quantum dot bionanophotonic circuits.

    Science.gov (United States)

    Claussen, Jonathan C; Hildebrandt, Niko; Susumu, Kimihiro; Ancona, Mario G; Medintz, Igor L

    2014-03-26

    We combine quantum dots (QDs) with long-lifetime terbium complexes (Tb), a near-IR Alexa Fluor dye (A647), and self-assembling peptides to demonstrate combinatorial and sequential bionanophotonic logic devices that function by time-gated Förster resonance energy transfer (FRET). Upon excitation, the Tb-QD-A647 FRET-complex produces time-dependent photoluminescent signatures from multi-FRET pathways enabled by the capacitor-like behavior of the Tb. The unique photoluminescent signatures are manipulated by ratiometrically varying dye/Tb inputs and collection time. Fluorescent output is converted into Boolean logic states to create complex arithmetic circuits including the half-adder/half-subtractor, 2:1 multiplexer/1:2 demultiplexer, and a 3-digit, 16-combination keypad lock.

  1. Proposal of ultra-compact NAND/NOR/XNOR all-optical logic gates based on a nonlinear 3x1 multimode interference

    Science.gov (United States)

    Tajaldini, Mehdi; Mat Jafri, M. Z.

    2014-05-01

    We present a highly miniaturized multimode interference (MMI) coupler based on nonlinear modal propagation analysis (NMPA) method as a novel design method and potential application for optical NAND, NOR and XNOR logic gates for Boolean logic signal processing devices. Crystalline polydiacetylene is used to allow the appearances of nonlinear effects in low input intensities and ultra- short length to control the MMI coupler as an active device to access light switching due to its high nonlinear susceptibility. We consider a 10x33 μm2 MMI structure with three inputs and one output. Notably, the access facets are single-mode waveguides with sub-micron width. The center input contributes to control the induced light propagation in MMI by intensity variation whereas others could be launched by particular intensity when they are ON and 0 in OFF. Output intensity is analyzed in various sets of inputs to show the capability of Boolean logic gates, the contrast between ON and OFF is calculated on mentioned gates to present the efficiency. Good operation in low intensity and highly miniaturized MMI coupler is observed. Furthermore, nonlinear effects could be realized through the modal interferences. The issue of high insertion loss is addressed with a 3×3 upgraded coupler. Furthermore, the main significant aspect of this paper is simulating an MMI coupler that is launched by three nonlinear inputs, simultaneously, whereas last presents have never studied more than one input in nonlinear regimes.

  2. Old citizens, new logics: Digital literacy and elderly citizens in Denmark

    DEFF Research Database (Denmark)

    Stald, Gitte Bang

    2016-01-01

    and The Danage Association. Theoretically, the article discusses definitions of digital literacy respectively digital citizenship; and it draws on theories on mediatization, media ecologies, and digital governance. REFERENCES (selected) Borchorst, D.S. et al (2016). ”Digitalisering af ældre menneskers hverdag......Old citizens, new logics: Digital literacy and elderly citizens in Denmark Many my age have problems with IT. We are now reasonably informed and we have had computers for many years but our competences are still not tiptop and that is definitely a problem. This 79-year old man talks about...... the challenges he encounters with mastering IT in general and NemID in particular. NemID is the Danish, digital system for interaction between public institutions and citizens. The system was implemented by law in December 2015. The paper focuses on the relation between age, digitization, and citizen self...

  3. VLSI System Implementation of 200 MHz, 8-bit, 90nm CMOS Arithmetic and Logic Unit (ALU Processor Controller

    Directory of Open Access Journals (Sweden)

    Fazal NOORBASHA

    2012-08-01

    Full Text Available In this present study includes the Very Large Scale Integration (VLSI system implementation of 200MHz, 8-bit, 90nm Complementary Metal Oxide Semiconductor (CMOS Arithmetic and Logic Unit (ALU processor control with logic gate design style and 0.12µm six metal 90nm CMOS fabrication technology. The system blocks and the behaviour are defined and the logical design is implemented in gate level in the design phase. Then, the logic circuits are simulated and the subunits are converted in to 90nm CMOS layout. Finally, in order to construct the VLSI system these units are placed in the floor plan and simulated with analog and digital, logic and switch level simulators. The results of the simulations indicates that the VLSI system can control different instructions which can divided into sub groups: transfer instructions, arithmetic and logic instructions, rotate and shift instructions, branch instructions, input/output instructions, control instructions. The data bus of the system is 16-bit. It runs at 200MHz, and operating power is 1.2V. In this paper, the parametric analysis of the system, the design steps and obtained results are explained.

  4. All-optical OR/NOR Bi-functional logic gate by using cross-gain modulation in semiconductor optical amplifiers

    International Nuclear Information System (INIS)

    Choi, Kyoung Sun; Byun, Young Tae; Lee, Seok; Jhon, Young Min

    2010-01-01

    An OR/NOR bi-functional all-optical logic gate has been experimentally demonstrated at 10 Gbit/s by using cross-gain modulation (XGM) in only 2 semiconductor optical amplifiers (SOAs). One SOA was used for NOR operation and the other SOA was used for inversion to obtain OR operation. Numerical simulation has also been performed, which coincided well with the experimental results.

  5. Ferritin-Templated Quantum-Dots for Quantum Logic Gates

    Science.gov (United States)

    Choi, Sang H.; Kim, Jae-Woo; Chu, Sang-Hyon; Park, Yeonjoon; King, Glen C.; Lillehei, Peter T.; Kim, Seon-Jeong; Elliott, James R.

    2005-01-01

    Quantum logic gates (QLGs) or other logic systems are based on quantum-dots (QD) with a stringent requirement of size uniformity. The QD are widely known building units for QLGs. The size control of QD is a critical issue in quantum-dot fabrication. The work presented here offers a new method to develop quantum-dots using a bio-template, called ferritin, that ensures QD production in uniform size of nano-scale proportion. The bio-template for uniform yield of QD is based on a ferritin protein that allows reconstitution of core material through the reduction and chelation processes. One of the biggest challenges for developing QLG is the requirement of ordered and uniform size of QD for arrays on a substrate with nanometer precision. The QD development by bio-template includes the electrochemical/chemical reconsitution of ferritins with different core materials, such as iron, cobalt, manganese, platinum, and nickel. The other bio-template method used in our laboratory is dendrimers, precisely defined chemical structures. With ferritin-templated QD, we fabricated the heptagonshaped patterned array via direct nano manipulation of the ferritin molecules with a tip of atomic force microscope (AFM). We also designed various nanofabrication methods of QD arrays using a wide range manipulation techniques. The precise control of the ferritin-templated QD for a patterned arrangement are offered by various methods, such as a site-specific immobilization of thiolated ferritins through local oxidation using the AFM tip, ferritin arrays induced by gold nanoparticle manipulation, thiolated ferritin positioning by shaving method, etc. In the signal measurements, the current-voltage curve is obtained by measuring the current through the ferritin, between the tip and the substrate for potential sweeping or at constant potential. The measured resistance near zero bias was 1.8 teraohm for single holoferritin and 5.7 teraohm for single apoferritin, respectively.

  6. A novel water-soluble 1,8-naphthalimide as a fluorescent pH-probe and a molecular logic circuit

    International Nuclear Information System (INIS)

    Georgiev, Nikolai I.; Dimitrova, Margarita D.; Krasteva, Paoleta V.; Bojinov, Vladimir B.

    2017-01-01

    A novel highly water-soluble fluorescence sensing 1,8-naphthalimide is synthesized and investigated. The novel compound is designed on the “fluorophore-receptor 1 -spacer-receptor 2 ” model as a molecular fluorescence probe for determination of ions in 100% aqueous media. The novel probe comprising hydrazide and N-methylpiperazine substituents is capable of operating simultaneously via ICT and PET signaling mechanism and of recognizing selectively protons and hydroxyl anions over the representative metal ions and anions. Due to the remarkable fluorescence changes as a function of pH the system is able to act as a three output combinatorial logic circuit with two chemical inputs. Two INHIBIT gates in fluorescence and absorption mode as well as an IMPLICATION logic gate are obtained. Because of the parallel action of both INHIBIT gates a magnitude digital comparator is achieved for the first time in this way.

  7. Multi-valued logic circuits using hybrid circuit consisting of three gates single-electron transistors (TG-SETs) and MOSFETs.

    Science.gov (United States)

    Shin, SeungJun; Yu, YunSeop; Choi, JungBum

    2008-10-01

    New multi-valued logic (MVL) families using the hybrid circuits consisting of three gates single-electron transistors (TG-SETs) and a metal-oxide-semiconductor field-effect transistor (MOSFET) are proposed. The use of SETs offers periodic literal characteristics due to Coulomb oscillation of SET, which allows a realization of binary logic (BL) circuits as well as multi-valued logic (MVL) circuits. The basic operations of the proposed MVL families are successfully confirmed through SPICE circuit simulation based on the physical device model of a TG-SET. The proposed MVL circuits are found to be much faster, but much larger power consumption than a previously reported MVL, and they have a trade-off between speed and power consumption. As an example to apply the newly developed MVL families, a half-adder is introduced.

  8. An Embedded Reconfigurable Logic Module

    Science.gov (United States)

    Tucker, Jerry H.; Klenke, Robert H.; Shams, Qamar A. (Technical Monitor)

    2002-01-01

    A Miniature Embedded Reconfigurable Computer and Logic (MERCAL) module has been developed and verified. MERCAL was designed to be a general-purpose, universal module that that can provide significant hardware and software resources to meet the requirements of many of today's complex embedded applications. This is accomplished in the MERCAL module by combining a sub credit card size PC in a DIMM form factor with a XILINX Spartan I1 FPGA. The PC has the ability to download program files to the FPGA to configure it for different hardware functions and to transfer data to and from the FPGA via the PC's ISA bus during run time. The MERCAL module combines, in a compact package, the computational power of a 133 MHz PC with up to 150,000 gate equivalents of digital logic that can be reconfigured by software. The general architecture and functionality of the MERCAL hardware and system software are described.

  9. All optical programmable logic array (PLA)

    Science.gov (United States)

    Hiluf, Dawit

    2018-03-01

    A programmable logic array (PLA) is an integrated circuit (IC) logic device that can be reconfigured to implement various kinds of combinational logic circuits. The device has a number of AND and OR gates which are linked together to give output or further combined with more gates or logic circuits. This work presents the realization of PLAs via the physics of a three level system interacting with light. A programmable logic array is designed such that a number of different logical functions can be combined as a sum-of-product or product-of-sum form. We present an all optical PLAs with the aid of laser light and observables of quantum systems, where encoded information can be considered as memory chip. The dynamics of the physical system is investigated using Lie algebra approach.

  10. Superconducting flux flow digital circuits

    International Nuclear Information System (INIS)

    Martens, J.S.; Zipperian, T.E.; Hietala, V.M.; Ginley, D.S.; Tigges, C.P.; Phillips, J.M.; Siegal, M.P.

    1993-01-01

    The authors have developed a family of digital logic circuits based on superconducting flux flow transistors that show high speed, reasonable signal levels, large fan-out, and large noise margins. The circuits are made from high-temperature superconductors (HTS) and have been shown to operate at over 90 K. NOR gates have been demonstrated with fan-outs of more than 5 and fully loaded switching times less than a fixture-limited 50 ps. Ring-oscillator data suggest inverter delay times of about 40ps when using a 3-μm linewidths. Simple flip-flops have also been demonstrated showing large noise margins, response times of less than 30 ps, and static power dissipation on the order of 30 nW. Among other uses, this logic family is appropriate as an interface between logic families such as single flux quantum and conventional semiconductor logic

  11. Design, Analysis and Test of Logic Circuits Under Uncertainty

    CERN Document Server

    Krishnaswamy, Smita; Hayes, John P

    2013-01-01

    Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits.  To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits.  The book describes techniques for:   • Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework;   • Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-l...

  12. Synthetic Ion Channels and DNA Logic Gates as Components of Molecular Robots.

    Science.gov (United States)

    Kawano, Ryuji

    2018-02-19

    A molecular robot is a next-generation biochemical machine that imitates the actions of microorganisms. It is made of biomaterials such as DNA, proteins, and lipids. Three prerequisites have been proposed for the construction of such a robot: sensors, intelligence, and actuators. This Minireview focuses on recent research on synthetic ion channels and DNA computing technologies, which are viewed as potential candidate components of molecular robots. Synthetic ion channels, which are embedded in artificial cell membranes (lipid bilayers), sense ambient ions or chemicals and import them. These artificial sensors are useful components for molecular robots with bodies consisting of a lipid bilayer because they enable the interface between the inside and outside of the molecular robot to function as gates. After the signal molecules arrive inside the molecular robot, they can operate DNA logic gates, which perform computations. These functions will be integrated into the intelligence and sensor sections of molecular robots. Soon, these molecular machines will be able to be assembled to operate as a mass microrobot and play an active role in environmental monitoring and in vivo diagnosis or therapy. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  13. A peak value searching method of the MCA based on digital logic devices

    International Nuclear Information System (INIS)

    Sang Ziru; Huang Shanshan; Chen Lian; Jin Ge

    2010-01-01

    Digital multi-channel analyzers play a more important role in multi-channel pulse height analysis technique. The direction of digitalization are characterized by powerful pulse processing ability, high throughput, improved stability and flexibility. This paper introduces a method of searching peak value of waveform based on digital logic with FPGA. This method reduce the dead time. Then data correction offline can improvement the non-linearity of MCA. It gives the α energy spectrum of 241 Am. (authors)

  14. All-metallic electrically gated 2H-TaSe2 thin-film switches and logic circuits

    International Nuclear Information System (INIS)

    Renteria, J.; Jiang, C.; Yan, Z.; Samnakay, R.; Goli, P.; Pope, T. R.; Salguero, T. T.; Wickramaratne, D.; Lake, R. K.; Khitun, A. G.; Balandin, A. A.

    2014-01-01

    We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe 2 were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe 2 –Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials

  15. All-metallic electrically gated 2H-TaSe2 thin-film switches and logic circuits

    Science.gov (United States)

    Renteria, J.; Samnakay, R.; Jiang, C.; Pope, T. R.; Goli, P.; Yan, Z.; Wickramaratne, D.; Salguero, T. T.; Khitun, A. G.; Lake, R. K.; Balandin, A. A.

    2014-01-01

    We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe2 were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe2-Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials.

  16. A dansyl group modified SBA-15 INHIBIT logic gate with [Hg2+ and Cl-] or [Hg2+ and Br-] as inputs

    Science.gov (United States)

    Wang, Xiaoyu; Yang, Honglei

    2013-07-01

    We developed a SBA-15-based INHIBIT logic gate (DA-SBA-15) which was prepared by covalent immobilization of a dansylamide derivative into the channels of the mesoporous silica material (SBA-15) via (3-aminopropyl)triethoxysilane (APTES) groups. A series of characteristic results proved that the fluorescent ligand was successfully grafted into the mesopores of SBA-15. The fluorescent characterization revealed excellent selectivity of DA-SBA-15 to the Hg2+ ion. Moreover, DA-SBA-15 can be considered as a selective fluorescent probe for Cl- and Br-. The fluorescent changes of DA-SBA-15 upon the addition of ions (Hg2+, Cl- and Br-) were utilized as an INH logic gate at the molecular level, using [Hg2+ and Cl-] or [Hg2+ and Br-] as chemical inputs and the fluorescence intensity signal as output.

  17. A novel method of developing all optical frequency encoded Fredkin gates

    Science.gov (United States)

    Garai, Sisir Kumar

    2014-02-01

    All optical reversible logic gates have significant applications in the field of optics and optoelectronics for developing different sequential and combinational circuits of optical computing, optical signal processing and in multi-valued logic operations and quantum computing. Here the author proposes a method for developing all optical three-input-output Fredkin gate and modified Fredkin gate using frequency encoded data. For this purpose the author has exploited the properties of efficient frequency conversion and faster switching speed of semiconductor optical amplifiers. Simulation results of the three input-output Fredkin gate testifies to the feasibility of the proposed scheme. These Fredkin gates are universal logic gates, and can be used to develop different all-optical logic and data processors in communication network.

  18. Logic gate system with three outputs and three inputs based on switchable electrocatalysis of glucose by glucose oxidase entrapped in chitosan films.

    Science.gov (United States)

    Liu, Shuang; Wang, Lei; Lian, Wenjing; Liu, Hongyun; Li, Chen-Zhong

    2015-01-01

    A logic-gate system with three outputs and three inputs was developed based on the bioelectrocatalysis of glucose by glucose oxidase (GOx) entrapped in chitosan films on the electrode surface by means of ferrocenedicarboxylic acid (Fc(COOH)2 ). Cyclic voltammetric (CV) signals of Fc(COOH)2 exhibited pH-triggered on/off behavior owing to electrostatic interactions between the film and the probe at different pH levels. The addition of glucose greatly increased the oxidation peak current (Ipa ) through the electrocatalytic reaction. pH and glucose were selected as two inputs. As a reversible inhibitor of GOx, Cu(2+) was chosen as the third input. The combination of three inputs led to Ipa with different values according to different mechanisms, which were defined as three outputs with two thresholds. The logic gate with three outputs by using one type of enzyme provided a novel model to build logic circuits based on biomacromolecules, which might be applied to the intelligent medical diagnostics as smart biosensors in the future. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  19. Universal Fault-Tolerant Gates on Concatenated Stabilizer Codes

    Directory of Open Access Journals (Sweden)

    Theodore J. Yoder

    2016-09-01

    Full Text Available It is an oft-cited fact that no quantum code can support a set of fault-tolerant logical gates that is both universal and transversal. This no-go theorem is generally responsible for the interest in alternative universality constructions including magic state distillation. Widely overlooked, however, is the possibility of nontransversal, yet still fault-tolerant, gates that work directly on small quantum codes. Here, we demonstrate precisely the existence of such gates. In particular, we show how the limits of nontransversality can be overcome by performing rounds of intermediate error correction to create logical gates on stabilizer codes that use no ancillas other than those required for syndrome measurement. Moreover, the logical gates we construct, the most prominent examples being Toffoli and controlled-controlled-Z, often complete universal gate sets on their codes. We detail such universal constructions for the smallest quantum codes, the 5-qubit and 7-qubit codes, and then proceed to generalize the approach. One remarkable result of this generalization is that any nondegenerate stabilizer code with a complete set of fault-tolerant single-qubit Clifford gates has a universal set of fault-tolerant gates. Another is the interaction of logical qubits across different stabilizer codes, which, for instance, implies a broadly applicable method of code switching.

  20. Upconversion luminescent logic gates and turn-on sensing of glutathione based on two-photon excited quantum dots conjugated with dopamine.

    Science.gov (United States)

    Gui, Rijun; Jin, Hui; Liu, Xifeng; Wang, Zonghua; Zhang, Feifei; Xia, Jianfei; Yang, Min; Bi, Sai

    2014-12-07

    Under the two-photon excitation, upconversion luminescent "INHIBIT" and "OR" logic gates of water-dispersed CdTe quantum dots (QDs) were constituted by conjugating the QDs with dopamine. This facilitated the development of a novel QDs-based upconversion luminescent probe for efficient turn-on sensing of glutathione.

  1. Single OR molecule and OR atomic circuit logic gates interconnected on a Si(100)H surface

    International Nuclear Information System (INIS)

    Ample, F; Joachim, C; Duchemin, I; Hliwa, M

    2011-01-01

    Electron transport calculations were carried out for three terminal OR logic gates constructed either with a single molecule or with a surface dangling bond circuit interconnected on a Si(100)H surface. The corresponding multi-electrode multi-channel scattering matrix (where the central three terminal junction OR gate is the scattering center) was calculated, taking into account the electronic structure of the supporting Si(100)H surface, the metallic interconnection nano-pads, the surface atomic wires and the molecule. Well interconnected, an optimized OR molecule can only run at a maximum of 10 nA output current intensity for a 0.5 V bias voltage. For the same voltage and with no molecule in the circuit, the output current of an OR surface atomic scale circuit can reach 4 μA.

  2. Realization of optimized quantum controlled-logic gate based on the orbital angular momentum of light.

    Science.gov (United States)

    Zeng, Qiang; Li, Tao; Song, Xinbing; Zhang, Xiangdong

    2016-04-18

    We propose and experimentally demonstrate an optimized setup to implement quantum controlled-NOT operation using polarization and orbital angular momentum qubits. This device is more adaptive to inputs with various polarizations, and can work both in classical and quantum single-photon regime. The logic operations performed by such a setup not only possess high stability and polarization-free character, they can also be easily extended to deal with multi-qubit input states. As an example, the experimental implementation of generalized three-qubit Toffoli gate has been presented.

  3. Flexible and re-configurable optical three-input XOR logic gate of phase-modulated signals with multicast functionality for potential application in optical physical-layer network coding.

    Science.gov (United States)

    Lu, Guo-Wei; Qin, Jun; Wang, Hongxiang; Ji, XuYuefeng; Sharif, Gazi Mohammad; Yamaguchi, Shigeru

    2016-02-08

    Optical logic gate, especially exclusive-or (XOR) gate, plays important role in accomplishing photonic computing and various network functionalities in future optical networks. On the other hand, optical multicast is another indispensable functionality to efficiently deliver information in optical networks. In this paper, for the first time, we propose and experimentally demonstrate a flexible optical three-input XOR gate scheme for multiple input phase-modulated signals with a 1-to-2 multicast functionality for each XOR operation using four-wave mixing (FWM) effect in single piece of highly-nonlinear fiber (HNLF). Through FWM in HNLF, all of the possible XOR operations among input signals could be simultaneously realized by sharing a single piece of HNLF. By selecting the obtained XOR components using a followed wavelength selective component, the number of XOR gates and the participant light in XOR operations could be flexibly configured. The re-configurability of the proposed XOR gate and the function integration of the optical logic gate and multicast in single device offer the flexibility in network design and improve the network efficiency. We experimentally demonstrate flexible 3-input XOR gate for four 10-Gbaud binary phase-shift keying signals with a multicast scale of 2. Error-free operations for the obtained XOR results are achieved. Potential application of the integrated XOR and multicast function in network coding is also discussed.

  4. Quinoline group based fluorescent sensor for detecting zinc ions in aqueous media and its logic gate behaviour

    International Nuclear Information System (INIS)

    Dong, Zhengping; Guo, Yueping; Tian, Xin; Ma, Jiantai

    2013-01-01

    A highly sensitive method for quantitative determination of Zn 2+ in water has been developed by using a novel fluorescent sensor NQA: (N-Quinolin-8-yl-2-[(quinolin-8-ylcarbamoylmethyl)-amino]-acetamide). The sensor displays great selectivity for Zn 2+ in the presence of other metal ions in aqueous solution and possesses an excellent sensitivity of about 2×10 −8 M for Zn 2+ . The binding stoichiometry, binding affinity, and pH sensitivity of the sensor have also been studied. Furthermore, the fluorescent changes of NQA upon the addition of cations (Cu 2+ and Zn 2+ ) are utilized to construct an INHIBIT logic gate at the molecular level, using Cu 2+ and Zn 2+ as chemical inputs and the fluorescence intensity as output. NQA has ideal chemical and spectroscopic properties that satisfy the criteria for further biological and environmental applications. - Highlights: ► A novel fluorescent sensor for Zn 2+ in water has been synthesized. ► The sensor displays high selectivity for Zn 2+ in the presence of other ions. ► The sensor exhibits excellent sensing ability under the physiological pH window. ► The sensor can be utilized as an INHIBIT logic gate at the molecular level.

  5. All-metallic electrically gated 2H-TaSe{sub 2} thin-film switches and logic circuits

    Energy Technology Data Exchange (ETDEWEB)

    Renteria, J.; Jiang, C.; Yan, Z. [Nano-Device Laboratory, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Samnakay, R.; Goli, P. [Materials Science and Engineering Program, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Pope, T. R.; Salguero, T. T. [Department of Chemistry, University of Georgia, Athens, Georgia 30602 (United States); Wickramaratne, D.; Lake, R. K. [Laboratory for Terascale and Terahertz Electronics, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Khitun, A. G. [Nano-Device Laboratory, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Materials Science and Engineering Program, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Balandin, A. A., E-mail: balandin@ee.ucr.edu [Nano-Device Laboratory, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Department of Chemistry, University of Georgia, Athens, Georgia 30602 (United States)

    2014-01-21

    We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe{sub 2} were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe{sub 2}–Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials.

  6. Logic gates realized by nonvolatile GeTe/Sb2Te3 super lattice phase-change memory with a magnetic field input

    Science.gov (United States)

    Lu, Bin; Cheng, Xiaomin; Feng, Jinlong; Guan, Xiawei; Miao, Xiangshui

    2016-07-01

    Nonvolatile memory devices or circuits that can implement both storage and calculation are a crucial requirement for the efficiency improvement of modern computer. In this work, we realize logic functions by using [GeTe/Sb2Te3]n super lattice phase change memory (PCM) cell in which higher threshold voltage is needed for phase change with a magnetic field applied. First, the [GeTe/Sb2Te3]n super lattice cells were fabricated and the R-V curve was measured. Then we designed the logic circuits with the super lattice PCM cell verified by HSPICE simulation and experiments. Seven basic logic functions are first demonstrated in this letter; then several multi-input logic gates are presented. The proposed logic devices offer the advantages of simple structures and low power consumption, indicating that the super lattice PCM has the potential in the future nonvolatile central processing unit design, facilitating the development of massive parallel computing architecture.

  7. Tunable Molecular Logic Gates Designed for Imaging Released Neurotransmitters.

    Science.gov (United States)

    Klockow, Jessica L; Hettie, Kenneth S; Secor, Kristen E; Barman, Dipti N; Glass, Timothy E

    2015-08-03

    Tunable dual-analyte fluorescent molecular logic gates (ExoSensors) were designed for the purpose of imaging select vesicular primary-amine neurotransmitters that are released from secretory vesicles upon exocytosis. ExoSensors are based on the coumarin-3-aldehyde scaffold and rely on both neurotransmitter binding and the change in environmental pH associated with exocytosis to afford a unique turn-on fluorescence output. A pH-functionality was directly integrated into the fluorophore π-system of the scaffold, thereby allowing for an enhanced fluorescence output upon the release of labeled neurotransmitters. By altering the pH-sensitive unit with various electron-donating and -withdrawing sulfonamide substituents, we identified a correlation between the pKa of the pH-sensitive group and the fluorescence output from the activated fluorophore. In doing so, we achieved a twelvefold fluorescence enhancement upon evaluating the ExoSensors under conditions that mimic exocytosis. ExoSensors are aptly suited to serve as molecular imaging tools that allow for the direct visualization of only the neurotransmitters that are released from secretory vesicles upon exocytosis. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  8. Configuration and debug of field programmable gate arrays using MATLAB[reg)/SIMULINK[reg

    International Nuclear Information System (INIS)

    Grout, I; Ryan, J; O'Shea, T

    2005-01-01

    Increasingly, the need to seamlessly link high-level behavioural descriptions of electronic hardware for modelling and simulation purposes to the final application hardware highlights the gap between the high-level behavioural descriptions of the required circuit functionality (considering here digital logic) in commonly used mathematical modelling tools, and the hardware description languages such as VHDL and Verilog-HDL. In this paper, the linking of a MATLAB[reg] model for digital algorithm for implementation on a programmable logic device for design synthesis from the MATLAB[reg] model into VHDL is discussed. This VHDL model is itself synthesised and downloaded to the target Field Programmable Gate Array, for normal operation and also for design debug purposes. To demonstrate this, a circuit architecture mapped from a SIMULINK[reg] model is presented. The rationale is for a seamless interface between the initial algorithm development and the target hardware, enabling the hardware to be debugged and compared to the simulated model from a single interface for use with by a non-expert in the programmable logic and hardware description language use

  9. Development of a diffuse element matrix in 'planar' technology. A particular application: logical gate with coupled emitter

    International Nuclear Information System (INIS)

    Rousseau, P.

    1968-01-01

    In a first part, after a brief recall concerning 'planar' technology we discuss the various parasitic elements associated with integrated circuits components. Mathematical formulae of these elements are derived. In a second part, we present a matrix of 22 transistors and 12 resistors which has been realized. This matrix enables the integration of the major part of nuclear circuits. Some of the obtained circuits are shown, particularly an emitter coupled logic gate which presents good electrical behaviour. (author) [fr

  10. Digital-circuit analysis of short-gate tunnel FETs for low-voltage applications

    International Nuclear Information System (INIS)

    Zhuge, Jing; Huang, Ru; Wang, Yangyuan; Verhulst, Anne S; Vandenberghe, William G; Dehaene, Wim; Groeseneken, Guido

    2011-01-01

    This paper investigates the potential of tunnel field-effect transistors (TFETs), with emphasis on short-gate TFETs, by simulation for low-power digital applications having a supply voltage lower than 0.5 V. A transient study shows that the tunneling current has a negligible contribution in charging and discharging the gate capacitance of TFETs. In spite of a higher resistance region in the short-gate TFET, the gate (dis)charging speed still meets low-voltage application requirements. A circuit analysis is performed on short-gate TFETs with different materials, such as Si, Ge and heterostructures in terms of voltage overshoot, delay, static power, energy consumption and energy delay product (EDP). These results are compared to MOSFET and full-gate TFET performance. It is concluded that short-gate heterostructure TFETs (Ge–source for nTFET, In 0.6 Ga 0.4 As–source for pTFET) are promising candidates to extend the supply voltage to lower than 0.5 V because they combine the advantage of a low Miller capacitance, due to the short-gate structures, and strong drive current in TFETs, due to the narrow bandgap material in the source. At a supply voltage of 0.4 V and for an EOT and channel length of 0.6 nm and 40 nm, respectively, a three-stage inverter chain based on short-gate heterostructure TFETs saves 40% energy consumption per cycle at the same delay and shows 60%–75% improvement of EDP at the same static power, compared to its full-gate counterpart. When compared to the MOSFET, better EDP can be achieved in the heterostructure TFET especially at low static power consumption

  11. G(sup 4)FET Implementations of Some Logic Circuits

    Science.gov (United States)

    Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan

    2009-01-01

    Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration

  12. PM 3655 PHILIPS Logic analyzer

    CERN Multimedia

    A logic analyzer is an electronic instrument that captures and displays multiple signals from a digital system or digital circuit. A logic analyzer may convert the captured data into timing diagrams, protocol decodes, state machine traces, assembly language, or may correlate assembly with source-level software. Logic Analyzers have advanced triggering capabilities, and are useful when a user needs to see the timing relationships between many signals in a digital system.

  13. Near-Infrared Ag2S Quantum Dots-Based DNA Logic Gate Platform for miRNA Diagnostics.

    Science.gov (United States)

    Miao, Peng; Tang, Yuguo; Wang, Bidou; Meng, Fanyu

    2016-08-02

    Dysregulation of miRNA expression is correlated with the development and progression of many diseases. These miRNAs are regarded as promising biomarkers. However, it is challenging to measure these low abundant molecules without employing time-consuming radioactive labeling or complex amplification strategies. Here, we present a DNA logic gate platform for miRNA diagnostics with fluorescence outputs from near-infrared (NIR) Ag2S quantum dots (QDs). Carefully designed toehold exchange-mediated strand displacements with different miRNA inputs occur on a solid-state interface, which control QDs release from solid-state interface to solution, responding to multiplex information on initial miRNAs. Excellent fluorescence emission properties of NIR Ag2S QDs certify the great prospect for amplification-free and sensitive miRNA assay. We demonstrate the potential of this platform by achieving femtomolar level miRNA analysis and the versatility of a series of logic circuits computation.

  14. Modeling and the analysis of control logic for a digital PWM controller based on a nano electronic single electron transistor

    Directory of Open Access Journals (Sweden)

    Rathnakannan Kailasam

    2008-01-01

    Full Text Available This paper describes the modelling and the analysis of control logic for a Nano-Device- based PWM controller. A comprehensive simple SPICE schematic model for Single Electron transistor has been proposed. The operation of basic Single Electron Transistor logic gates and SET flip flops were successfully designed and their performances analyzed. The proposed design for realizing the logic gates and flip-flops is used in constructing the PWM controller utilized for switching the buck converter circuit. The output of the converter circuit is compared with reference voltage, and when the error voltage and the reference are matched the latch is reset so as to generate the PWM signal. Due to the simplicity and accuracy of the compact model, the simulation time and speed are much faster, which makes it potentially applicable in large-scale circuit simulation. This study confirms that the SET-based PWM controller is small in size, consumes ultra low power and operates at high speeds without compromising any performance. In addition these devices are capable of measuring charges of extremely high sensitivity.

  15. Synthesis of multivalued quantum logic circuits by elementary gates

    Science.gov (United States)

    Di, Yao-Min; Wei, Hai-Rui

    2013-01-01

    We propose the generalized controlled X (gcx) gate as the two-qudit elementary gate, and based on Cartan decomposition, we also give the one-qudit elementary gates. Then we discuss the physical implementation of these elementary gates and show that it is feasible with current technology. With these elementary gates many important qudit quantum gates can be synthesized conveniently. We provide efficient methods for the synthesis of various kinds of controlled qudit gates and greatly simplify the synthesis of existing generic multi-valued quantum circuits. Moreover, we generalize the quantum Shannon decomposition (QSD), the most powerful technique for the synthesis of generic qubit circuits, to the qudit case. A comparison of ququart (d=4) circuits and qubit circuits reveals that using ququart circuits may have an advantage over the qubit circuits in the synthesis of quantum circuits.

  16. Digitally controlled oscillator design with a variable capacitance XOR gate

    International Nuclear Information System (INIS)

    Kumar, Manoj; Arya, Sandeep K.; Pandey, Sujata

    2011-01-01

    A digitally controlled oscillator (DCO) using a three-transistor XOR gate as the variable load has been presented. A delay cell using an inverter and a three-transistor XOR gate as the variable capacitance is also proposed. Three-, five- and seven-stage DCO circuits have been designed using the proposed delay cell. The output frequency is controlled digitally with bits applied to the delay cells. The three-bit DCO shows output frequency and power consumption variation in the range of 3.2486–4.0267 GHz and 0.6121–0.3901 mW, respectively, with a change in the control word 111–000. The five-bit DCO achieves frequency and power of 1.8553–2.3506 GHz and 1.0202–0.6501 mW, respectively, with a change in the control word 11111–00000. Moreover, the seven-bit DCO shows a frequency and power consumption variation of 1.3239–1.6817 GHz and 1.4282–0.9102 mW, respectively, with a varying control word 1111111–0000000. The power consumption and output frequency of the proposed circuits have been compared with earlier reported circuits and the present approaches show significant improvements. (semiconductor integrated circuits)

  17. Characterization of radiation effects in 65 nm digital circuits with the DRAD digital radiation test chip

    International Nuclear Information System (INIS)

    Casas, L.M. Jara; Ceresa, D.; Kulis, S.; Christiansen, J.; Francisco, R.; Miryala, S.; Gnani, D.

    2017-01-01

    A Digital RADiation (DRAD) test chip has been specifically designed to study the impact of Total Ionizing Dose (TID) (<1 Grad) and Single Event Upset (SEU) on digital logic gates in a 65 nm CMOS technology. Nine different versions of standard cell libraries are studied in this chip, basically differing in the device dimensions, V t flavor and layout of the device. Each library has eighteen test structures specifically designed to characterize delay degradation and power consumption of the standard cells. For SEU study, a dedicated test structure based on a shift register is designed for each library. TID results up to 500 Mrad are reported.

  18. Spatially and Temporally Resolved Diagnostics of Dense Sprays Using Gated, Femtosecond, Digital Holography, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — This is a proposal to develop a unique, gated, picosecond, digital holography system for characterizing dense particle fields in high pressure combustion...

  19. Floating-Gate Manipulated Graphene-Black Phosphorus Heterojunction for Nonvolatile Ambipolar Schottky Junction Memories, Memory Inverter Circuits, and Logic Rectifiers.

    Science.gov (United States)

    Li, Dong; Chen, Mingyuan; Zong, Qijun; Zhang, Zengxing

    2017-10-11

    The Schottky junction is an important unit in electronics and optoelectronics. However, its properties greatly degrade with device miniaturization. The fast development of circuits has fueled a rapid growth in the study of two-dimensional (2D) crystals, which may lead to breakthroughs in the semiconductor industry. Here we report a floating-gate manipulated nonvolatile ambipolar Schottky junction memory from stacked all-2D layers of graphene-BP/h-BN/graphene (BP, black phosphorus; h-BN, hexagonal boron nitride) in a designed floating-gate field-effect Schottky barrier transistor configuration. By manipulating the voltage pulse applied to the control gate, the device exhibits ambipolar characteristics and can be tuned to act as graphene-p-BP or graphene-n-BP junctions with reverse rectification behavior. Moreover, the junction exhibits good storability properties of more than 10 years and is also programmable. On the basis of these characteristics, we further demonstrate the application of the device to dual-mode nonvolatile Schottky junction memories, memory inverter circuits, and logic rectifiers.

  20. Control of Turing patterns and their usage as sensors, memory arrays, and logic gates

    Science.gov (United States)

    Muzika, František; Schreiber, Igor

    2013-10-01

    We study a model system of three diffusively coupled reaction cells arranged in a linear array that display Turing patterns with special focus on the case of equal coupling strength for all components. As a suitable model reaction we consider a two-variable core model of glycolysis. Using numerical continuation and bifurcation techniques we analyze the dependence of the system's steady states on varying rate coefficient of the recycling step while the coupling coefficients of the inhibitor and activator are fixed and set at the ratios 100:1, 1:1, and 4:5. We show that stable Turing patterns occur at all three ratios but, as expected, spontaneous transition from the spatially uniform steady state to the spatially nonuniform Turing patterns occurs only in the first case. The other two cases possess multiple Turing patterns, which are stabilized by secondary bifurcations and coexist with stable uniform periodic oscillations. For the 1:1 ratio we examine modular spatiotemporal perturbations, which allow for controllable switching between the uniform oscillations and various Turing patterns. Such modular perturbations are then used to construct chemical computing devices utilizing the multiple Turing patterns. By classifying various responses we propose: (a) a single-input resettable sensor capable of reading certain value of concentration, (b) two-input and three-input memory arrays capable of storing logic information, (c) three-input, three-output logic gates performing combinations of logical functions OR, XOR, AND, and NAND.

  1. Logic synthesis for FPGA-based finite state machines

    CERN Document Server

    Barkalov, Alexander; Kolopienczyk, Malgorzata; Mielcarek, Kamil; Bazydlo, Grzegorz

    2016-01-01

    This book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model. It shows that one of the peculiarities of FPGA chips is the existence of embedded memory blocks (EMB). The book is devoted to the solution of problems of logic synthesis and reduction of hardware amount in control units. The book will be interesting and useful for researchers and PhD students in the area of Electrical Engineering and Computer Science, as well as for designers of modern digital systems.

  2. Quantum gate decomposition algorithms.

    Energy Technology Data Exchange (ETDEWEB)

    Slepoy, Alexander

    2006-07-01

    Quantum computing algorithms can be conveniently expressed in a format of a quantum logical circuits. Such circuits consist of sequential coupled operations, termed ''quantum gates'', or quantum analogs of bits called qubits. We review a recently proposed method [1] for constructing general ''quantum gates'' operating on an qubits, as composed of a sequence of generic elementary ''gates''.

  3. Experimental investigation of a four-qubit linear-optical quantum logic circuit.

    Science.gov (United States)

    Stárek, R; Mičuda, M; Miková, M; Straka, I; Dušek, M; Ježek, M; Fiurášek, J

    2016-09-20

    We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C(3)Z gate and several two-qubit and single-qubit gates. The C(3)Z gate introduces a sign flip if and only if all four qubits are in the computational state |1〉. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses.

  4. Nucleic acids and smart materials: advanced building blocks for logic systems.

    Science.gov (United States)

    Pu, Fang; Ren, Jinsong; Qu, Xiaogang

    2014-09-03

    Logic gates can convert input signals into a defined output signal, which is the fundamental basis of computing. Inspired by molecular switching from one state to another under an external stimulus, molecular logic gates are explored extensively and recognized as an alternative to traditional silicon-based computing. Among various building blocks of molecular logic gates, nucleic acid attracts special attention owing to its specific recognition abilities and structural features. Functional materials with unique physical and chemical properties offer significant advantages and are used in many fields. The integration of nucleic acids and functional materials is expected to bring about several new phenomena. In this Progress Report, recent progress in the construction of logic gates by combining the properties of a range of smart materials with nucleic acids is introduced. According to the structural characteristics and composition, functional materials are categorized into three classes: polymers, noble-metal nanomaterials, and inorganic nanomaterials. Furthermore, the unsolved problems and future challenges in the construction of logic gates are discussed. It is hoped that broader interests in introducing new smart materials into the field are inspired and tangible applications for these constructs are found. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. Respiratory-Gated MRgHIFU in Upper Abdomen Using an MR-Compatible In-Bore Digital Camera

    Directory of Open Access Journals (Sweden)

    Vincent Auboiroux

    2014-01-01

    Full Text Available Objective. To demonstrate the technical feasibility and the potential interest of using a digital optical camera inside the MR magnet bore for monitoring the breathing cycle and subsequently gating the PRFS MR thermometry, MR-ARFI measurement, and MRgHIFU sonication in the upper abdomen. Materials and Methods. A digital camera was reengineered to remove its magnetic parts and was further equipped with a 7 m long USB cable. The system was electromagnetically shielded and operated inside the bore of a closed 3T clinical scanner. Suitable triggers were generated based on real-time motion analysis of the images produced by the camera (resolution 640×480 pixels, 30 fps. Respiratory-gated MR-ARFI prepared MRgHIFU ablation was performed in the kidney and liver of two sheep in vivo, under general anaesthesia and ventilator-driven forced breathing. Results. The optical device demonstrated very good MR compatibility. The current setup permitted the acquisition of motion artefact-free and high resolution MR 2D ARFI and multiplanar interleaved PRFS thermometry (average SNR 30 in liver and 56 in kidney. Microscopic histology indicated precise focal lesions with sharply delineated margins following the respiratory-gated HIFU sonications. Conclusion. The proof-of-concept for respiratory motion management in MRgHIFU using an in-bore digital camera has been validated in vivo.

  6. Digital Fuzzy logic and PI control of phase-shifted full-bridge current-doubler converter

    DEFF Research Database (Denmark)

    Török, Lajos; Munk-Nielsen, Stig

    2011-01-01

    Simple digital fuzzy logic voltage control of a phaseshifted full-bridge (PSFB) converter is proposed in this article. A comparison of the fuzzy controller and the classical PI voltage controller is presented and their effects on the converter dynamics are analyzed. Simulation model of the conver...... of the converter was built in Matlab/Simulink using PLECS. A 600W PSFB convert was designed and built and the control strategies were implemented in a 16 bit fixed point dsPIC microcontroller. The advantages and disadvantages of using Fuzzy logic control are highlighted....

  7. Final Report and Documentation for the PLD11 Multipurpose Programmable Logic VME Board Design

    International Nuclear Information System (INIS)

    Hutchinson, Robert L.; Pierson, Lyndon G.; Robertson, Perry J.; Tarman, Thomas D.; Witzke, Edward L.

    1999-01-01

    The PLD11 board is a 9U VME board containing 11 Altera 10K100 Programmable Logic Devices, controlled impedance clock tree, VME interface, programming inteface, 0C3 (155 Mbps) interface and serial port. The 11 Altera 10K100 Programmable Logic Devices arranged to provide four 96 bit wide buses for a total of 384 parallel digital data lines in and out of the board that can operate up to 100 Mhz for a aggrigate throughput of 38.4 Gpbs. The 14.44'' X 15.75'' board has over 1.1 million programmable gates that can be programmed through a serial interace. The board contains a clock reference and 50 ohm clock distribution tree that can drive each of the eleven 10K100 devices with two critically timed clock references. Five external clock references can be used to drive five additional PLD 11 boards for a total of six boards operating all from the same synchronous clock reference. A system of six boards provides just under 7 million programmable gates

  8. Qubits and quantum Hamiltonian computing performances for operating a digital Boolean 1/2-adder

    Science.gov (United States)

    Dridi, Ghassen; Faizy Namarvar, Omid; Joachim, Christian

    2018-04-01

    Quantum Boolean (1 + 1) digits 1/2-adders are designed with 3 qubits for the quantum computing (Qubits) and 4 quantum states for the quantum Hamiltonian computing (QHC) approaches. Detailed analytical solutions are provided to analyse the time operation of those different 1/2-adder gates. QHC is more robust to noise than Qubits and requires about the same amount of energy for running its 1/2-adder logical operations. QHC is faster in time than Qubits but its logical output measurement takes longer.

  9. Demonstration and optimisation of an ultrafast all-optical AND logic gate using four-wave mixing in a semiconductor optical amplifier

    International Nuclear Information System (INIS)

    Razaghi, M; Nosratpour, A; Das, N K

    2013-01-01

    We have proposed an all-optical AND logic gate based on four-wave mixing (FWM) in a semiconductor optical amplifier (SOA) integrated with an optical filter. In the scheme proposed, the preferred logical function can be performed without using a continuous-wave (cw) signal. The modified nonlinear Schroedinger equation (MNLSE) is used for the modelling wave propagation in a SOA. The MNLSE takes into account all nonlinear effects relevant to pico- and sub-picosecond pulse durations and is solved by the finite-difference beam-propagation method (FD-BPM). Based on the simulation results, the optimal output signal with a 40-fJ energy can be obtained at a bit rate of 50 Gb s -1 . In the simulations, besides the nonlinearities included in the model, the pattern effect of the signals propagating in the SOA medium and the effect of the input signal bit rate are extensively investigated to optimise the system performance. (optical logic elements)

  10. Quantum Gate Operations in Decoherence-Free Subspace with Superconducting Charge Qubits inside a Cavity

    International Nuclear Information System (INIS)

    Yi-Min, Wang; Yan-Li, Zhou; Lin-Mei, Liang; Cheng-Zu, Li

    2009-01-01

    We propose a feasible scheme to achieve universal quantum gate operations in decoherence-free subspace with superconducting charge qubits placed in a microwave cavity. Single-logic-qubit gates can be realized with cavity assisted interaction, which possesses the advantages of unconventional geometric gate operation. The two-logic-qubit controlled-phase gate between subsystems can be constructed with the help of a variable electrostatic transformer. The collective decoherence can be successfully avoided in our well-designed system. Moreover, GHZ state for logical qubits can also be easily produced in this system

  11. Hybrid Toffoli gate on photons and quantum spins.

    Science.gov (United States)

    Luo, Ming-Xing; Ma, Song-Ya; Chen, Xiu-Bo; Wang, Xiaojun

    2015-11-16

    Quantum computation offers potential advantages in solving a number of interesting and difficult problems. Several controlled logic gates, the elemental building blocks of quantum computer, have been realized with various physical systems. A general technique was recently proposed that significantly reduces the realization complexity of multiple-control logic gates by harnessing multi-level information carriers. We present implementations of a key quantum circuit: the three-qubit Toffoli gate. By exploring the optical selection rules of one-sided optical microcavities, a Toffoli gate may be realized on all combinations of photon and quantum spins in the QD-cavity. The three general controlled-NOT gates are involved using an auxiliary photon with two degrees of freedom. Our results show that photons and quantum spins may be used alternatively in quantum information processing.

  12. A multiplicity logic unit

    International Nuclear Information System (INIS)

    Bialkowski, J.; Moszynski, M.; Zagorski, A.

    1981-01-01

    The logic diagram principle of operation and some details of the design of the multiplicity logic unit are presented. This unit was specially designed to fulfil the requirements of a multidetector arrangement for gamma-ray multiplicity measurements. The unit is equipped with 16 inputs controlled by a common coincidence gate. It delivers a linear output pulse with the height proportional to the multiplicity of coincidences and logic pulses corresponding to 0, 1, ... up to >= 5-fold coincidences. These last outputs are used to steer the routing unit working with the multichannel analyser. (orig.)

  13. Reconfigurable Complementary Logic Circuits with Ambipolar Organic Transistors.

    Science.gov (United States)

    Yoo, Hocheon; Ghittorelli, Matteo; Smits, Edsger C P; Gelinck, Gerwin H; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

    2016-10-20

    Ambipolar organic electronics offer great potential for simple and low-cost fabrication of complementary logic circuits on large-area and mechanically flexible substrates. Ambipolar transistors are ideal candidates for the simple and low-cost development of complementary logic circuits since they can operate as n-type and p-type transistors. Nevertheless, the experimental demonstration of ambipolar organic complementary circuits is limited to inverters. The control of the transistor polarity is crucial for proper circuit operation. Novel gating techniques enable to control the transistor polarity but result in dramatically reduced performances. Here we show high-performance non-planar ambipolar organic transistors with electrical control of the polarity and orders of magnitude higher performances with respect to state-of-art split-gate ambipolar transistors. Electrically reconfigurable complementary logic gates based on ambipolar organic transistors are experimentally demonstrated, thus opening up new opportunities for ambipolar organic complementary electronics.

  14. A model system for targeted drug release triggered by biomolecular signals logically processed through enzyme logic networks.

    Science.gov (United States)

    Mailloux, Shay; Halámek, Jan; Katz, Evgeny

    2014-03-07

    A new Sense-and-Act system was realized by the integration of a biocomputing system, performing analytical processes, with a signal-responsive electrode. A drug-mimicking release process was triggered by biomolecular signals processed by different logic networks, including three concatenated AND logic gates or a 3-input OR logic gate. Biocatalytically produced NADH, controlled by various combinations of input signals, was used to activate the electrochemical system. A biocatalytic electrode associated with signal-processing "biocomputing" systems was electrically connected to another electrode coated with a polymer film, which was dissolved upon the formation of negative potential releasing entrapped drug-mimicking species, an enzyme-antibody conjugate, operating as a model for targeted immune-delivery and consequent "prodrug" activation. The system offers great versatility for future applications in controlled drug release and personalized medicine.

  15. Designable DNA-binding domains enable construction of logic circuits in mammalian cells.

    Science.gov (United States)

    Gaber, Rok; Lebar, Tina; Majerle, Andreja; Šter, Branko; Dobnikar, Andrej; Benčina, Mojca; Jerala, Roman

    2014-03-01

    Electronic computer circuits consisting of a large number of connected logic gates of the same type, such as NOR, can be easily fabricated and can implement any logic function. In contrast, designed genetic circuits must employ orthogonal information mediators owing to free diffusion within the cell. Combinatorial diversity and orthogonality can be provided by designable DNA- binding domains. Here, we employed the transcription activator-like repressors to optimize the construction of orthogonal functionally complete NOR gates to construct logic circuits. We used transient transfection to implement all 16 two-input logic functions from combinations of the same type of NOR gates within mammalian cells. Additionally, we present a genetic logic circuit where one input is used to select between an AND and OR function to process the data input using the same circuit. This demonstrates the potential of designable modular transcription factors for the construction of complex biological information-processing devices.

  16. Optical XOR gate

    Science.gov (United States)

    Vawter, G. Allen

    2013-11-12

    An optical XOR gate is formed as a photonic integrated circuit (PIC) from two sets of optical waveguide devices on a substrate, with each set of the optical waveguide devices including an electroabsorption modulator electrically connected in series with a waveguide photodetector. The optical XOR gate utilizes two digital optical inputs to generate an XOR function digital optical output. The optical XOR gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.

  17. Design of two and three input molecular logic gates using non-Watson-Crick base pairing-based molecular beacons.

    Science.gov (United States)

    Lin, Jia-Hui; Tseng, Wei-Lung

    2014-03-21

    This study presents a single, resettable, and sensitive molecular beacon (MB) used to operate molecular-scale logic gates. The MB consists of a random DNA sequence, a fluorophore at the 5'-end, and a quencher at the 3'-end. The presence of Hg(2+), Ag(+), and coralyne promoted the formation of stable T-Hg(2+)-T, C-Ag(+)-C, and A2-coralyne-A2 coordination in the MB probe, respectively, thereby driving its conformational change. The metal ion or small molecule-mediated coordination of mismatched DNA brought the fluorophore and the quencher into close proximity, resulting in collisional quenching of fluorescence between the two organic dyes. Because thiol can bind Hg(2+) and remove it from the T-Hg(2+)-T-based MB, adding thiol to a solution of the T-Hg(2+)-T-based MB allowed the fluorophore and the quencher to be widely separated. A similar phenomenon was observed when replacing Hg(2+) with Ag(+). Because Ag(+) strongly binds to iodide, cyanide, and cysteine, they were capable of removing Ag(+) from the C-Ag(+)-C-based MB, restoring the fluorescence of the MB. Moreover, the fluorescence of the A2-coralyne-A2-based MB could be switched on by adding polyadenosine. Using these analytes as inputs and the MB as a signal transducer, we successfully developed a series of two-input, three-input, and set-reset logic gates at the molecular level.

  18. A quantum Fredkin gate.

    Science.gov (United States)

    Patel, Raj B; Ho, Joseph; Ferreyrol, Franck; Ralph, Timothy C; Pryde, Geoff J

    2016-03-01

    Minimizing the resources required to build logic gates into useful processing circuits is key to realizing quantum computers. Although the salient features of a quantum computer have been shown in proof-of-principle experiments, difficulties in scaling quantum systems have made more complex operations intractable. This is exemplified in the classical Fredkin (controlled-SWAP) gate for which, despite theoretical proposals, no quantum analog has been realized. By adding control to the SWAP unitary, we use photonic qubit logic to demonstrate the first quantum Fredkin gate, which promises many applications in quantum information and measurement. We implement example algorithms and generate the highest-fidelity three-photon Greenberger-Horne-Zeilinger states to date. The technique we use allows one to add a control operation to a black-box unitary, something that is impossible in the standard circuit model. Our experiment represents the first use of this technique to control a two-qubit operation and paves the way for larger controlled circuits to be realized efficiently.

  19. A quantum Fredkin gate

    Science.gov (United States)

    Patel, Raj B.; Ho, Joseph; Ferreyrol, Franck; Ralph, Timothy C.; Pryde, Geoff J.

    2016-01-01

    Minimizing the resources required to build logic gates into useful processing circuits is key to realizing quantum computers. Although the salient features of a quantum computer have been shown in proof-of-principle experiments, difficulties in scaling quantum systems have made more complex operations intractable. This is exemplified in the classical Fredkin (controlled-SWAP) gate for which, despite theoretical proposals, no quantum analog has been realized. By adding control to the SWAP unitary, we use photonic qubit logic to demonstrate the first quantum Fredkin gate, which promises many applications in quantum information and measurement. We implement example algorithms and generate the highest-fidelity three-photon Greenberger-Horne-Zeilinger states to date. The technique we use allows one to add a control operation to a black-box unitary, something that is impossible in the standard circuit model. Our experiment represents the first use of this technique to control a two-qubit operation and paves the way for larger controlled circuits to be realized efficiently. PMID:27051868

  20. Trapped-ion quantum logic gates based on oscillating magnetic fields.

    Science.gov (United States)

    Ospelkaus, C; Langer, C E; Amini, J M; Brown, K R; Leibfried, D; Wineland, D J

    2008-08-29

    Oscillating magnetic fields and field gradients can be used to implement single-qubit rotations and entangling multiqubit quantum gates for trapped-ion quantum information processing (QIP). With fields generated by currents in microfabricated surface-electrode traps, it should be possible to achieve gate speeds that are comparable to those of optically induced gates for realistic distances between the ion crystal and the electrode surface. Magnetic-field-mediated gates have the potential to significantly reduce the overhead in laser-beam control and motional-state initialization compared to current QIP experiments with trapped ions and will eliminate spontaneous scattering, a fundamental source of decoherence in laser-mediated gates.

  1. Quantum-classical interface based on single flux quantum digital logic

    Science.gov (United States)

    McDermott, R.; Vavilov, M. G.; Plourde, B. L. T.; Wilhelm, F. K.; Liebermann, P. J.; Mukhanov, O. A.; Ohki, T. A.

    2018-04-01

    We describe an approach to the integrated control and measurement of a large-scale superconducting multiqubit array comprising up to 108 physical qubits using a proximal coprocessor based on the Single Flux Quantum (SFQ) digital logic family. Coherent control is realized by irradiating the qubits directly with classical bitstreams derived from optimal control theory. Qubit measurement is performed by a Josephson photon counter, which provides access to the classical result of projective quantum measurement at the millikelvin stage. We analyze the power budget and physical footprint of the SFQ coprocessor and discuss challenges and opportunities associated with this approach.

  2. Adder design using a 5-input majority gate in a novel “multilayer gate design paradigm” for quantum dot cellular automata circuits

    International Nuclear Information System (INIS)

    Kumar, Rohit; Ghosh, Bahniman; Gupta, Shoubhik

    2015-01-01

    This paper proposes a novel design paradigm for circuits designed in quantum dot cellular automata (QCA) technology. Previously reported QCA circuits in the literature have generally been designed in a single layer which is the main logical block in which the inverter and majority gate are on the base layer, except for the parts where multilayer wire crossing was used. In this paper the concept of multilayer wire crossing has been extended to design logic gates in multilayers. Using a 5-input majority gate in a multilayer, a 1-bit and 2-bit adder have been designed in the proposed multilayer gate design paradigm. A comparison has been made with some adders reported previously in the literature and it has been shown that circuits designed in the proposed design paradigm are much more efficient in terms of area, the requirement of QCA cells in the design and the input–output delay of the circuit. Over all, the availability of one additional spatial dimension makes the design process much more flexible and there is scope for the customizability of logic gate designs to make the circuit compact. (paper)

  3. Easy digital engineering

    International Nuclear Information System (INIS)

    Jin, Dal Bok

    2002-02-01

    This book lists basic of digital engineering, number system and digital code, Boolean algebra and basic logic circuit, simplify of logical expression, combinational circuit, arithmetic circuit, multivibrator circuit, sequential circuit, memory unit of semiconductor and logical element for program, D/A converter and A/D converter, logic element and integrated circuit and logic circuit and micro controller. It has exercises and answers about digital engineering and summary in the end of each chapter.

  4. Experimental implementation of collision-based gates in Belousov-Zhabotinsky medium

    International Nuclear Information System (INIS)

    De Lacy Costello, Benjamin; Adamatzky, Andrew

    2005-01-01

    We experimentally demonstrate that excitation wave-fragments in a Belousov-Zhabotinsky (BZ) medium with immobilised catalyst can be used to build elementary logical gates and circuits. Following our previous theoretical constructions [Adamatzky A. Collision-based computing in Belousov Zhabotinsky medium. Chaos, Solitons and Fractals 2004;21:1259-64] on embedding logical schemes in BZ medium, we represent True/False values of logical variables by presence/absence of wave-fragments. We show that when wave-fragments collide with each other they may annihilate, fuse, split and change their velocity vectors. Thus the values of logical variables represented by the wave-fragments change and certain logical operations are implemented. In the paper we provide examples of experimental logical gates, and present pioneer results in dynamic, architectureless computing in excitable reaction-diffusion systems

  5. Designing learning apparatus to promote twelfth grade students’ understanding of digital technology concept: A preliminary studies

    Science.gov (United States)

    Marlius; Kaniawati, I.; Feranie, S.

    2018-05-01

    A preliminary learning design using relay to promote twelfth grade student’s understanding of logic gates concept is implemented to see how well it’s to adopted by six high school students, three male students and three female students of twelfth grade. This learning design is considered for next learning of digital technology concept i.e. data digital transmition and analog. This work is a preliminary study to design the learning for large class. So far just a few researches designing learning design related to digital technology with relay. It may due to this concept inserted in Indonesian twelfth grade curriculum recently. This analysis is focus on student difficulties trough video analysis to learn the concept. Based on our analysis, the recommended thing for redesigning learning is: students understand first about symbols and electrical circuits; the Student Worksheet is made in more detail on the assembly steps to the project board; mark with symbols at points in certain places in the circuit for easy assembly; assembly using relays by students is enough until is the NOT’s logic gates and the others that have been assembled so that effective time. The design of learning using relays can make the relay a liaison between the abstract on the digital with the real thing of it, especially in the circuit of symbols and real circuits. Besides it is expected to also enrich the ability of teachers in classroom learning about digital technology.

  6. Logic Locking Using Hybrid CMOS and Emerging SiNW FETs

    Directory of Open Access Journals (Sweden)

    Qutaiba Alasad

    2017-09-01

    Full Text Available The outsourcing of integrated circuit (IC fabrication services to overseas manufacturing foundry has raised security and privacy concerns with regard to intellectual property (IP protection as well as the integrity maintenance of the fabricated chips. One way to protect ICs from malicious attacks is to encrypt and obfuscate the IP design by incorporating additional key gates, namely logic encryption or logic locking. The state-of-the-art logic encryption techniques certainly incur considerable performance overhead upon the genuine IP design. The focus of this paper is to leverage the unique property of emerging transistor technology on reducing the performance overhead as well as preserving the robustness of logic locking technique. We design the polymorphic logic gate using silicon nanowire field effect transistors (SiNW FETs to replace the conventional Exclusive-OR (XOR-based logic cone. We then evaluate the proposed technique based on security metric and performance overhead.

  7. Stochastic p -Bits for Invertible Logic

    Science.gov (United States)

    Camsari, Kerem Yunus; Faria, Rafatul; Sutton, Brian M.; Datta, Supriyo

    2017-07-01

    Conventional semiconductor-based logic and nanomagnet-based memory devices are built out of stable, deterministic units such as standard metal-oxide semiconductor transistors, or nanomagnets with energy barriers in excess of ≈40 - 60 kT . In this paper, we show that unstable, stochastic units, which we call "p -bits," can be interconnected to create robust correlations that implement precise Boolean functions with impressive accuracy, comparable to standard digital circuits. At the same time, they are invertible, a unique property that is absent in standard digital circuits. When operated in the direct mode, the input is clamped, and the network provides the correct output. In the inverted mode, the output is clamped, and the network fluctuates among all possible inputs that are consistent with that output. First, we present a detailed implementation of an invertible gate to bring out the key role of a single three-terminal transistorlike building block to enable the construction of correlated p -bit networks. The results for this specific, CMOS-assisted nanomagnet-based hardware implementation agree well with those from a universal model for p -bits, showing that p -bits need not be magnet based: any three-terminal tunable random bit generator should be suitable. We present a general algorithm for designing a Boltzmann machine (BM) with a symmetric connection matrix [J ] (Ji j=Jj i) that implements a given truth table with p -bits. The [J ] matrices are relatively sparse with a few unique weights for convenient hardware implementation. We then show how BM full adders can be interconnected in a partially directed manner (Ji j≠Jj i) to implement large logic operations such as 32-bit binary addition. Hundreds of stochastic p -bits get precisely correlated such that the correct answer out of 233 (≈8 ×1 09) possibilities can be extracted by looking at the statistical mode or majority vote of a number of time samples. With perfect directivity (Jj i=0 ) a small

  8. Design of a spin-wave majority gate employing mode selection

    Energy Technology Data Exchange (ETDEWEB)

    Klingler, S., E-mail: klingler@physik.uni-kl.de; Pirro, P.; Brächer, T.; Leven, B.; Hillebrands, B.; Chumak, A. V. [Fachbereich Physik and Landesforschungszentrum OPTIMAS, Technische Universität Kaiserslautern, 67663 Kaiserslautern (Germany)

    2014-10-13

    The design of a microstructured, fully functional spin-wave majority gate is presented and studied using micromagnetic simulations. This all-magnon logic gate consists of three-input waveguides, a spin-wave combiner, and an output waveguide. In order to ensure the functionality of the device, the output waveguide is designed to perform spin-wave mode selection. We demonstrate that the gate evaluates the majority of the input signals coded into the spin-wave phase. Moreover, the all-magnon data processing device is used to perform logic AND-, OR-, NAND-, and NOR- operations.

  9. Magnonic logic circuits

    International Nuclear Information System (INIS)

    Khitun, Alexander; Bao Mingqiang; Wang, Kang L

    2010-01-01

    We describe and analyse possible approaches to magnonic logic circuits and basic elements required for circuit construction. A distinctive feature of the magnonic circuitry is that information is transmitted by spin waves propagating in the magnetic waveguides without the use of electric current. The latter makes it possible to exploit spin wave phenomena for more efficient data transfer and enhanced logic functionality. We describe possible schemes for general computing and special task data processing. The functional throughput of the magnonic logic gates is estimated and compared with the conventional transistor-based approach. Magnonic logic circuits allow scaling down to the deep submicrometre range and THz frequency operation. The scaling is in favour of the magnonic circuits offering a significant functional advantage over the traditional approach. The disadvantages and problems of the spin wave devices are also discussed.

  10. Engineering integrated digital circuits with allosteric ribozymes for scaling up molecular computation and diagnostics.

    Science.gov (United States)

    Penchovsky, Robert

    2012-10-19

    Here we describe molecular implementations of integrated digital circuits, including a three-input AND logic gate, a two-input multiplexer, and 1-to-2 decoder using allosteric ribozymes. Furthermore, we demonstrate a multiplexer-decoder circuit. The ribozymes are designed to seek-and-destroy specific RNAs with a certain length by a fully computerized procedure. The algorithm can accurately predict one base substitution that alters the ribozyme's logic function. The ability to sense the length of RNA molecules enables single ribozymes to be used as platforms for multiple interactions. These ribozymes can work as integrated circuits with the functionality of up to five logic gates. The ribozyme design is universal since the allosteric and substrate domains can be altered to sense different RNAs. In addition, the ribozymes can specifically cleave RNA molecules with triplet-repeat expansions observed in genetic disorders such as oculopharyngeal muscular dystrophy. Therefore, the designer ribozymes can be employed for scaling up computing and diagnostic networks in the fields of molecular computing and diagnostics and RNA synthetic biology.

  11. Error rates and resource overheads of encoded three-qubit gates

    Science.gov (United States)

    Takagi, Ryuji; Yoder, Theodore J.; Chuang, Isaac L.

    2017-10-01

    A non-Clifford gate is required for universal quantum computation, and, typically, this is the most error-prone and resource-intensive logical operation on an error-correcting code. Small, single-qubit rotations are popular choices for this non-Clifford gate, but certain three-qubit gates, such as Toffoli or controlled-controlled-Z (ccz), are equivalent options that are also more suited for implementing some quantum algorithms, for instance, those with coherent classical subroutines. Here, we calculate error rates and resource overheads for implementing logical ccz with pieceable fault tolerance, a nontransversal method for implementing logical gates. We provide a comparison with a nonlocal magic-state scheme on a concatenated code and a local magic-state scheme on the surface code. We find the pieceable fault-tolerance scheme particularly advantaged over magic states on concatenated codes and in certain regimes over magic states on the surface code. Our results suggest that pieceable fault tolerance is a promising candidate for fault tolerance in a near-future quantum computer.

  12. Alternative approach of developing all-optical Fredkin and Toffoli gates

    Science.gov (United States)

    Mandal, Dhoumendra; Mandal, Sumana; Garai, Sisir Kumar

    2015-09-01

    Reversible logic gates show potential roles in communication technology, and it has a wide area of applicability such as in sequential and combinational circuit of optical computing, optical signal processing, multi-valued logic operations, etc. because of its advantageous aspects of data-recovering capabilities, low power consumption, least power dissipation, faster speed of processing, less hardware complexity, etc. In a reversible logic gate not only the outputs can be determined from the inputs, but also the inputs can be uniquely recovered from the outputs. In this article an alternative approach has been made to develop three-input-output Fredkin and Toffoli gates using the frequency conversion property of semiconductor optical amplifier (SOA) and frequency-based beam routing by optical multiplexers and demultiplexers. Simulation results show the feasibility of our proposed scheme.

  13. Trapped-ion quantum logic gates based on oscillating magnetic fields

    Science.gov (United States)

    Ospelkaus, Christian; Langer, Christopher E.; Amini, Jason M.; Brown, Kenton R.; Leibfried, Dietrich; Wineland, David J.

    2009-05-01

    Oscillating magnetic fields and field gradients can be used to implement single-qubit rotations and entangling multiqubit quantum gates for trapped-ion quantum information processing. With fields generated by currents in microfabricated surface-electrode traps, it should be possible to achieve gate speeds that are comparable to those of optically induced gates for realistic distances between the ions and the electrode surface. Magnetic-field-mediated gates have the potential to significantly reduce the overhead in laser-beam control and motional-state initialization compared to current QIP experiments with trapped ions and will eliminate spontaneous scattering decoherence, a fundamental source of decoherence in laser-mediated gates. A potentially beneficial environment for the implementation of such schemes is a cryogenic ion trap, because small length scale traps with low motional heating rates can be realized. A cryogenic ion trap experiment is currently under construction at NIST.

  14. A high performance gate drive for large gate turn off thyristors

    Energy Technology Data Exchange (ETDEWEB)

    Szilagyi, C.P.

    1993-01-01

    Past approaches to gate turn-off (GTO) gating are application oriented, inefficient and dissipate power even when inactive. They allow the gate to avalanch, and do not reduce GTO turn-on and turn-off losses. A new approach is proposed which will allow modular construction and adaptability to large GTOs in the 50 amp to 2000 amp range. The proposed gate driver can be used in large voltage source and current source inverters and other power converters. The approach consists of a power metal-oxide-silicon field effect transistor (MOSFET) technology gating unit, with associated logic and supervisory circuits and an isolated flyback converter as the dc power source for the gating unit. The gate driver formed by the gating unit and the flyback converter is designed for 4000 V isolation. Control and supervisory signals are exchanged between the gate driver and the remote control system via fiber optics. The gating unit has programmable front-porch current amplitude and pulse-width, programmable closed-loop controlled back-porch current, and a turn-off switch capable of supplying negative gate current at demand as a function of peak controllable forward anode current. The GTO turn-on, turn-off and gate avalanch losses are reduced to a minimum. The gate driver itself has minimum operating losses. Analysis, design and practical realization are reported. 19 refs., 54 figs., 1 tab.

  15. High-fidelity gates in quantum dot spin qubits.

    Science.gov (United States)

    Koh, Teck Seng; Coppersmith, S N; Friesen, Mark

    2013-12-03

    Several logical qubits and quantum gates have been proposed for semiconductor quantum dots controlled by voltages applied to top gates. The different schemes can be difficult to compare meaningfully. Here we develop a theoretical framework to evaluate disparate qubit-gating schemes on an equal footing. We apply the procedure to two types of double-dot qubits: the singlet-triplet and the semiconducting quantum dot hybrid qubit. We investigate three quantum gates that flip the qubit state: a DC pulsed gate, an AC gate based on logical qubit resonance, and a gate-like process known as stimulated Raman adiabatic passage. These gates are all mediated by an exchange interaction that is controlled experimentally using the interdot tunnel coupling g and the detuning [Symbol: see text], which sets the energy difference between the dots. Our procedure has two steps. First, we optimize the gate fidelity (f) for fixed g as a function of the other control parameters; this yields an f(opt)(g) that is universal for different types of gates. Next, we identify physical constraints on the control parameters; this yields an upper bound f(max) that is specific to the qubit-gate combination. We show that similar gate fidelities (~99:5%) should be attainable for singlet-triplet qubits in isotopically purified Si, and for hybrid qubits in natural Si. Considerably lower fidelities are obtained for GaAs devices, due to the fluctuating magnetic fields ΔB produced by nuclear spins.

  16. Design of synthetic biological logic circuits based on evolutionary algorithm.

    Science.gov (United States)

    Chuang, Chia-Hua; Lin, Chun-Liang; Chang, Yen-Chang; Jennawasin, Tanagorn; Chen, Po-Kuei

    2013-08-01

    The construction of an artificial biological logic circuit using systematic strategy is recognised as one of the most important topics for the development of synthetic biology. In this study, a real-structured genetic algorithm (RSGA), which combines general advantages of the traditional real genetic algorithm with those of the structured genetic algorithm, is proposed to deal with the biological logic circuit design problem. A general model with the cis-regulatory input function and appropriate promoter activity functions is proposed to synthesise a wide variety of fundamental logic gates such as NOT, Buffer, AND, OR, NAND, NOR and XOR. The results obtained can be extended to synthesise advanced combinational and sequential logic circuits by topologically distinct connections. The resulting optimal design of these logic gates and circuits are established via the RSGA. The in silico computer-based modelling technology has been verified showing its great advantages in the purpose.

  17. Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

    KAUST Repository

    Hussain, Muhammad Mustafa; Smith, Casey Eben; Harris, Harlan Rusty; Young, Chadwin; Tseng, Hsinghuang; Jammy, Rajarao

    2010-01-01

    Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

  18. Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-03-01

    Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

  19. Entangling capabilities of symmetric two-qubit gates

    Indian Academy of Sciences (India)

    Com- putational investigation of entanglement of such ensembles is therefore impractical for ... the computational complexity. Pairs of spin-1 ... tensor operators which can also provide different symmetric logic gates for quantum pro- ... that five of the eight, two-qubit symmetric quantum gates expressed in terms of our newly.

  20. The floating-gate non-volatile semiconductor memory--from invention to the digital age.

    Science.gov (United States)

    Sze, S M

    2012-10-01

    In the past 45 years (from 1967 to 2012), the non-volatile semiconductor memory (NVSM) has emerged from a floating-gate concept to the prime technology driver of the largest industry in the world-the electronics industry. In this paper, we briefly review the historical development of NVSM and project its future trends to the year 2020. In addition, we consider NVSM's wide-range of applications from the digital cellular phone to tablet computer to digital television. As the device dimension is scaled down to the deca-nanometer regime, we expect that many innovations will be made to meet the scaling challenges, and NVSM-inspired technology will continue to enrich and improve our lives for decades to come.

  1. Development of a fast time-to-digital converter (TDC) using a programmable gate array

    International Nuclear Information System (INIS)

    Mine, Shun-ichi; Tokushuku, Katsuo; Yamada, Sakue.

    1994-09-01

    A fast time-to-digital converter with a 5 ns step was designed and tested by utilizing a user-programmable gate array. The stabilities against temperature and supply voltage variation were measured. A module was built with this TDC, and was successfully used in the first-level trigger system of the ZEUS detector to reject proton-beam induced background events. (author)

  2. Regulatory issues on using programmable logic device in nuclear power plants

    International Nuclear Information System (INIS)

    Park, G. Y.; Yu, Y. J.; Kim, H. T.; Kwon, Y. I.; Park, H. S.; Jeong, C. H.

    2012-01-01

    For replacing obsolete analog equipment in nuclear power plant, the Programmable Logic Devices (PLDs) using Hardware Description Language (HDL) have been widely adopted in digitalized Instrumentation and Control (I and C) systems because of its flexibility. For safety reviews on Nuclear Power Plants (NPPs,) qualifying digitalized safety I and C system using PLDs is an important issue. As an effort to provide regulatory position on using PLDs in safety I and C system, there is a research project to provide the regulatory positions against emerging issues involved with digitalisation of I and C system including using PLDs. Therefore, this paper addresses the important considerations for using PLDs in safety I and C systems such as diversity, independence and qualification, etc. In this point, this study focuses on technical reports for Field Programmable Gate Array (FPGA) from EPRI,. U.S. NRC, and relevant technical standards

  3. Regulatory issues on using programmable logic device in nuclear power plants

    Energy Technology Data Exchange (ETDEWEB)

    Park, G. Y.; Yu, Y. J.; Kim, H. T.; Kwon, Y. I.; Park, H. S.; Jeong, C. H. [Korea Institute of Nuclear Safety, Daejeon (Korea, Republic of)

    2012-10-15

    For replacing obsolete analog equipment in nuclear power plant, the Programmable Logic Devices (PLDs) using Hardware Description Language (HDL) have been widely adopted in digitalized Instrumentation and Control (I and C) systems because of its flexibility. For safety reviews on Nuclear Power Plants (NPPs,) qualifying digitalized safety I and C system using PLDs is an important issue. As an effort to provide regulatory position on using PLDs in safety I and C system, there is a research project to provide the regulatory positions against emerging issues involved with digitalisation of I and C system including using PLDs. Therefore, this paper addresses the important considerations for using PLDs in safety I and C systems such as diversity, independence and qualification, etc. In this point, this study focuses on technical reports for Field Programmable Gate Array (FPGA) from EPRI,. U.S. NRC, and relevant technical standards.

  4. One-way gates based on EPR, GHZ and decoherence-free states of W class

    International Nuclear Information System (INIS)

    Basharov, A.M.; Gorbachev, V.N.; Trubilko, A.I.; Yakovleva, E.S.

    2009-01-01

    The logical gates using quantum measurement as a primitive of quantum computation are considered. It is found that these gates achieved with EPR, GHZ and W entangled states have the same structure, allow encoding the classical information into states of quantum system and can perform any calculations. A particular case of decoherence-free W states is discussed as in this very case the logical gate is decoherence-free.

  5. Multiple logic functions from extended blockade region in a silicon quantum-dot transistor

    International Nuclear Information System (INIS)

    Lee, Youngmin; Lee, Sejoon; Im, Hyunsik; Hiramoto, Toshiro

    2015-01-01

    We demonstrate multiple logic-functions at room temperature on a unit device of the Si single electron transistor (SET). Owing to the formation of the multi-dot system, the device exhibits the enhanced Coulomb blockade characteristics (e.g., large peak-to-valley current ratio ∼200) that can improve the reliability of the SET-based logic circuits. The SET displays a unique feature useful for the logic applications; namely, the Coulomb oscillation peaks are systematically shifted by changing either of only the gate or the drain voltage. This enables the SET to act as a multi-functional one-transistor logic gate with AND, OR, NAND, and XOR functions

  6. Multiple logic functions from extended blockade region in a silicon quantum-dot transistor

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Youngmin; Lee, Sejoon, E-mail: sejoon@dongguk.edu; Im, Hyunsik [Department of Semiconductor Science, Dongguk University-Seoul, Seoul 100-715 (Korea, Republic of); Hiramoto, Toshiro [Institute of Industrial Science, University of Tokyo, Tokyo 153-8505 (Japan)

    2015-02-14

    We demonstrate multiple logic-functions at room temperature on a unit device of the Si single electron transistor (SET). Owing to the formation of the multi-dot system, the device exhibits the enhanced Coulomb blockade characteristics (e.g., large peak-to-valley current ratio ∼200) that can improve the reliability of the SET-based logic circuits. The SET displays a unique feature useful for the logic applications; namely, the Coulomb oscillation peaks are systematically shifted by changing either of only the gate or the drain voltage. This enables the SET to act as a multi-functional one-transistor logic gate with AND, OR, NAND, and XOR functions.

  7. Molecular implementation of simple logic programs.

    Science.gov (United States)

    Ran, Tom; Kaplan, Shai; Shapiro, Ehud

    2009-10-01

    Autonomous programmable computing devices made of biomolecules could interact with a biological environment and be used in future biological and medical applications. Biomolecular implementations of finite automata and logic gates have already been developed. Here, we report an autonomous programmable molecular system based on the manipulation of DNA strands that is capable of performing simple logical deductions. Using molecular representations of facts such as Man(Socrates) and rules such as Mortal(X) logical deductions and delivers the result. This prototype is the first simple programming language with a molecular-scale implementation.

  8. A gold nanocluster-based fluorescent probe for simultaneous pH and temperature sensing and its application to cellular imaging and logic gates

    Science.gov (United States)

    Wu, Yun-Tse; Shanmugam, Chandirasekar; Tseng, Wei-Bin; Hiseh, Ming-Mu; Tseng, Wei-Lung

    2016-05-01

    Metal nanocluster-based nanomaterials for the simultaneous determination of temperature and pH variations in micro-environments are still a challenge. In this study, we develop a dual-emission fluorescent probe consisting of bovine serum albumin-stabilized gold nanoclusters (BSA-AuNCs) and fluorescein-5-isothiocyanate (FITC) as temperature- and pH-responsive fluorescence signals. Under single wavelength excitation the FITC/BSA-AuNCs exhibited well-separated dual emission bands at 525 and 670 nm. When FITC was used as a reference fluorophore, FITC/BSA-AuNCs showed a good linear response over the temperature range 1-71 °C and offered temperature-independent spectral shifts, temperature accuracy, activation energy, and reusability. The possible mechanism for high temperature-induced fluorescence quenching of FITC/BSA-AuNCs could be attributed to a weakening of the Au-S bond, thereby lowering the charge transfer from BSA to AuNCs. Additionally, the pH- and temperature-responsive properties of FITC/BSA-AuNCs allow simultaneous temperature sensing from 21 to 41 °C (at intervals of 5 °C) and pH from 6.0 to 8.0 (at intervals of 0.5 pH unit), facilitating the construction of two-input AND logic gates. Three-input AND logic gates were also designed using temperature, pH, and trypsin as inputs. The practicality of using FITC/BSA-AuNCs to determine the temperature and pH changes in HeLa cells is also validated.Metal nanocluster-based nanomaterials for the simultaneous determination of temperature and pH variations in micro-environments are still a challenge. In this study, we develop a dual-emission fluorescent probe consisting of bovine serum albumin-stabilized gold nanoclusters (BSA-AuNCs) and fluorescein-5-isothiocyanate (FITC) as temperature- and pH-responsive fluorescence signals. Under single wavelength excitation the FITC/BSA-AuNCs exhibited well-separated dual emission bands at 525 and 670 nm. When FITC was used as a reference fluorophore, FITC/BSA-AuNCs showed a

  9. Formal Verification of Digital Protection Logic and Automatic Testing Software

    Energy Technology Data Exchange (ETDEWEB)

    Cha, S. D.; Ha, J. S.; Seo, J. S. [KAIST, Daejeon (Korea, Republic of)

    2008-06-15

    - Technical aspect {center_dot} It is intended that digital I and C software have safety and reliability. Project results help the software to acquire license. Software verification technique, which results in this project, can be to use for digital NPP(Nuclear power plant) in the future. {center_dot} This research introduces many meaningful results of verification on digital protection logic and suggests I and C software testing strategy. These results apply to verify nuclear fusion device, accelerator, nuclear waste management and nuclear medical device that require dependable software and high-reliable controller. Moreover, These can be used for military, medical or aerospace-related software. - Economical and industrial aspect {center_dot} Since safety of digital I and C software is highly import, It is essential for the software to be verified. But verification and licence acquisition related to digital I and C software face high cost. This project gives economic profit to domestic economy by using introduced verification and testing technique instead of foreign technique. {center_dot} The operation rate of NPP will rise, when NPP safety critical software is verified with intellectual V and V tool. It is expected that these software substitute safety-critical software that wholly depend on foreign. Consequently, the result of this project has high commercial value and the recognition of the software development works will be able to be spread to the industrial circles. - Social and cultural aspect People expect that nuclear power generation contributes to relieving environmental problems because that does not emit more harmful air pollution source than other power generations. To give more trust and expectation about nuclear power generation to our society, we should make people to believe that NPP is highly safe system. In that point of view, we can present high-reliable I and C proofed by intellectual V and V technique as evidence

  10. Femtosecond all-optical parallel logic gates based on tunable saturable to reverse saturable absorption in graphene-oxide thin films

    International Nuclear Information System (INIS)

    Roy, Sukhdev; Yadav, Chandresh

    2013-01-01

    A detailed theoretical analysis of ultrafast transition from saturable absorption (SA) to reverse saturable absorption (RSA) has been presented in graphene-oxide thin films with femtosecond laser pulses at 800 nm. Increase in pulse intensity leads to switching from SA to RSA with increased contrast due to two-photon absorption induced excited-state absorption. Theoretical results are in good agreement with reported experimental results. Interestingly, it is also shown that increase in concentration results in RSA to SA transition. The switching has been optimized to design parallel all-optical femtosecond NOT, AND, OR, XOR, and the universal NAND and NOR logic gates

  11. Integrated digital superconducting logic circuits for the quantum synthesizer. Report

    International Nuclear Information System (INIS)

    Buchholz, F.I.; Kohlmann, J.; Khabipov, M.; Brandt, C.M.; Hagedorn, D.; Balashov, D.; Maibaum, F.; Tolkacheva, E.; Niemeyer, J.

    2006-11-01

    This report presents the results, which were reached in the framework of the BMBF cooperative plan ''Quantum Synthesizer'' in the partial plan ''Integrated Digital Superconducting Logic Circuits''. As essential goal of the plan a novel instrument on the base of quantum-coherent superconducting circuits should be developed. which allows to generate praxis-relevant wave forms with quantum accuracy, the quantum synthesizer. The main topics of development of the reported partial plan lied at the one hand in the development of integrated, digital, superconducting circuit in rapid-single-flux (RSFQ) quantum logics for the pattern generator of the quantum synthesizer, at the other hand in the further development of the fabrication technology for the aiming of high circuit complexity. In order to fulfil these requirements at the PTB a new design system was implemented, based on the software of Cadence. Together with the required RSFQ extensions for the design of digital superconducting circuits was a platform generated, on which the reachable circuit complexity is exclusively limited by the technology parameters of the available fabrication technology: Physical simulations are with PSCAN up to a complexity of more than 1000 circuit elements possible; furthermore VHDL allows the verification of arbitrarily large circuit architectures. In accordance for this the production line at the PTB was brought to a level, which allows in Nb/Al-Al x O y /Nb SIS technology implementation the fabrication of highly integrable RSFQ circuit architectures. The developed and fabricated basic circuits of the pattern generator have proved correct functionality and reliability in the measuring operation. Thereby for the circular RSFQ shift registers a key role as local memories in the construction of the pattern generator is devolved upon. The registers were realized with the aimed bit lengths up to 128 bit and with reachable signal-processing speeds of above 10 GHz. At the interface RSFQ

  12. Fuzzy logic type 1 and type 2 based on LabVIEW FPGA

    CERN Document Server

    Ponce-Cruz, Pedro; MacCleery, Brian

    2016-01-01

    This book is a comprehensive introduction to LabVIEW FPGA™, a package allowing the programming of intelligent digital controllers in field programmable gate arrays (FPGAs) using graphical code. It shows how both potential difficulties with understanding and programming in VHDL and the consequent difficulty and slowness of implementation can be sidestepped. The text includes a clear theoretical explanation of fuzzy logic (type 1 and type 2) with case studies that implement the theory and systematically demonstrate the implementation process. It goes on to describe basic and advanced levels of programming LabVIEW FPGA and show how implementation of fuzzy-logic control in FPGAs improves system responses. A complete toolkit for implementing fuzzy controllers in LabVIEW FPGA has been developed with the book so that readers can generate new fuzzy controllers and deploy them immediately. Problems and their solutions allow readers to practice the techniques and to absorb the theoretical ideas as they arise. Fuzzy L...

  13. A functional language for describing reversible logic

    DEFF Research Database (Denmark)

    Thomsen, Michael Kirkedal

    2012-01-01

    Reversible logic is a computational model where all gates are logically reversible and combined in circuits such that no values are lost or duplicated. This paper presents a novel functional language that is designed to describe only reversible logic circuits. The language includes high....... Reversibility of descriptions is guaranteed with a type system based on linear types. The language is applied to three examples of reversible computations (ALU, linear cosine transformation, and binary adder). The paper also outlines a design flow that ensures garbage- free translation to reversible logic...... circuits. The flow relies on a reversible combinator language as an intermediate language....

  14. Wide operating window spin-torque majority gate towards large-scale integration of logic circuits

    Science.gov (United States)

    Vaysset, Adrien; Zografos, Odysseas; Manfrini, Mauricio; Mocuta, Dan; Radu, Iuliana P.

    2018-05-01

    Spin Torque Majority Gate (STMG) is a logic concept that inherits the non-volatility and the compact size of MRAM devices. In the original STMG design, the operating range was restricted to very small size and anisotropy, due to the exchange-driven character of domain expansion. Here, we propose an improved STMG concept where the domain wall is driven with current. Thus, input switching and domain wall propagation are decoupled, leading to higher energy efficiency and allowing greater technological optimization. To ensure majority operation, pinning sites are introduced. We observe through micromagnetic simulations that the new structure works for all input combinations, regardless of the initial state. Contrary to the original concept, the working condition is only given by threshold and depinning currents. Moreover, cascading is now possible over long distances and fan-out is demonstrated. Therefore, this improved STMG concept is ready to build complete Boolean circuits in absence of external magnetic fields.

  15. Modular Adder Designs Using Optimal Reversible and Fault Tolerant Gates in Field-Coupled QCA Nanocomputing

    Science.gov (United States)

    Bilal, Bisma; Ahmed, Suhaib; Kakkar, Vipan

    2018-02-01

    The challenges which the CMOS technology is facing toward the end of the technology roadmap calls for an investigation of various logical and technological solutions to CMOS at the nano scale. Two such paradigms which are considered in this paper are the reversible logic and the quantum-dot cellular automata (QCA) nanotechnology. Firstly, a new 3 × 3 reversible and universal gate, RG-QCA, is proposed and implemented in QCA technology using conventional 3-input majority voter based logic. Further the gate is optimized by using explicit interaction of cells and this optimized gate is then used to design an optimized modular full adder in QCA. Another configuration of RG-QCA gate, CRG-QCA, is then proposed which is a 4 × 4 gate and includes the fault tolerant characteristics and parity preserving nature. The proposed CRG-QCA gate is then tested to design a fault tolerant full adder circuit. Extensive comparisons of gate and adder circuits are drawn with the existing literature and it is envisaged that our proposed designs perform better and are cost efficient in QCA technology.

  16. Line defects on As2Se3-Chalcogenide photonic crystals for the design of all-optical power splitters and digital logic gates

    Science.gov (United States)

    Saghaei, Hamed; Zahedi, Abdulhamid; Karimzadeh, Rouhollah; Parandin, Fariborz

    2017-10-01

    In this paper, a triangular two-dimensional photonic crystal (PhC) of As2Se3-chalcogenide rods in air is presented and its photonic band diagram is calculated by plane wave method. In this structure, an optical waveguide is obtained by creating a line defect (eliminating rods) in diagonal direction of PhC. Numerical simulations based on finite difference time domain method show that when self-collimated beams undergo total internal reflection at the PhC-air interface, a total reflection of 90° occurs for the output beams. We also demonstrate that by decreasing the radius of As2Se3-chalcogenide instead of eliminating a diagonal line, a two-channel optical splitter will be designed. In this case, incoming self-collimated beams can be divided into the reflected and transmitted beams with arbitrary power ratio by adjusting the value of their radii. Based on these results, we propose a four-channel optical splitter using four line defects. The power ratio among output channels can be controlled systematically by varying the radius of rods in the line defects. We also demonstrate that by launching two optical sources with the same intensity and 90° phase difference from both perpendicular faces of the PhC, two logic OR and XOR gates will be achieved at the output channels. These optical devices have some applications in photonic integrated circuits for controlling and steering (managing) the light as desired.

  17. On the design of high-speed energy-efficient successive-approximation logic for asynchronous SAR ADCs

    Science.gov (United States)

    Yang, Jiaqi; Li, Ting; Yu, Mingyuan; Zhang, Shuangshuang; Lin, Fujiang; He, Lin

    2017-08-01

    This paper analyzes the power consumption and delay mechanisms of the successive-approximation (SA) logic of a typical asynchronous SAR ADC, and provides strategies to reduce both of them. Following these strategies, a unique direct-pass SA logic is proposed based on a full-swing once-triggered DFF and a self-locking tri-state gate. The unnecessary internal switching power of a typical TSPC DFF, which is commonly used in the SA logic, is avoided. The delay of the ready detector as well as the sequencer is removed from the critical path. A prototype SAR ADC based on the proposed SA logic is fabricated in 130 nm CMOS. It achieves a peak SNDR of 56.3 dB at 1.2 V supply and 65 MS/s sampling rate, and has a total power consumption of 555 μW, while the digital part consumes only 203 μW. Project supported by the National Natural Science Foundation of China (Nos. 61204033, 61331015), the Fundamental Research Funds for the Central Universities (No. WK2100230015), and the Funds of Science and Technology on Analog Integrated Circuit Laboratory (No. 9140C090111150C09041).

  18. Grafting polyethylenimine with quinoline derivatives for targeted imaging of intracellular Zn2+ and logic gate operations

    International Nuclear Information System (INIS)

    Pan, Yi; Shi, Yupeng; Chen, Junying; Wong, Chap-Mo; Zhang, Heng; Li, Mei-Jin; Li, Cheuk-Wing; Yi, Changqing

    2016-01-01

    In this study, a highly sensitive and selective fluorescent Zn 2+ probe which exhibited excellent biocompatibility, water solubility, and cell-membrane permeability, was facilely synthesized in a single step by grafting polyethyleneimine (PEI) with quinoline derivatives. The primary amino groups in the branched PEI can increase water solubility and cell permeability of the probe PEIQ, while quinoline derivatives can specifically recognize Zn 2+ and reduce the potential cytotoxicity of PEI. Basing on fluorescence off-on mechanism, PEIQ demonstrated excellent sensing capability towards Zn 2+ in absolute aqueous solution, where a high sensitivity with a detection limit as low as 38.1 nM, and a high selectivity over competing metal ions and potential interfering amino acids, were achieved. Inspired by these results, elementary logic operations (YES, NOT and INHIBIT) have been constructed by employing PEIQ as the gate while Zn 2+ and EDTA as chemical inputs. Together with the low cytotoxicity and good cell-permeability, the practical application of PEIQ in living cell imaging was satisfactorily demonstrated, emphasizing its wide application in fundamental biology research. - Graphical abstract: The fluorescent Zn 2+ probe, PEIQ, is facilely synthesized by grafting PEI with 8-CAAQ, and demonstrated for the pratical applications in Zn 2+ imaging and implementation of molecular logic operations within biological cells. - Highlights: • PEIQ, fluorescent Zn 2+ probe, is synthesized by grafting PEI with quinoline derivatives. • PEIQ exhibits high sensitivity and selectivity in absolute aqueous solution. • PEIQ is biocompatible, water soluble, and cell-membrane permeable. • Elementary logic operations have been demonstrated for PEIQ/Zn 2+ /EDTA system. • The practical application of PEIQ in living cell imaging is demonstrated.

  19. Single event upset mitigation techniques for FPGAs utilized in nuclear power plant digital instrumentation and control

    International Nuclear Information System (INIS)

    Wang Xin; Holbert, Keith E.; Clark, Lawrence T.

    2011-01-01

    Highlights: → Triple modular redundancy (TMR) implementation is the best solution for digital I and C. → Maximal probability of two simultaneous errors with TMR maximum partition is 4.44%. → Dual modular redundancy minimum logic partitioning design is an additional option. - Abstract: Field programmable gate arrays (FPGAs) are integrated circuits being increasingly used for digital instrumentation and control (I and C) in nuclear power plants (NPPs) because of low cost, re-configurability and low design turn-around time. However, to ensure reliability, proper design techniques must be employed since the memory and logic in FPGAs are susceptible to single event upsets (SEUs). Triple modular redundancy (TMR) has become a common SEU mitigation design technique because of its straightforward implementation and reliable results. Partitioned TMR approaches are introduced in this paper, and formulae derived indicate that the maximum probability of two simultaneous errors [P E ] max is inversely proportional to the number of logic partitions in a TMR design, when each redundant logic block in every logic partition has the same number of sensitive nodes. However, the maximum logic partitioning design cannot completely eliminate the possibility of two simultaneous upsets. For the example test circuit it is found that [P E ] max is reduced dramatically from 66.67% for minimum logic partitioning to 4.44% for maximum logic partitioning. Because TMR introduces significant overhead due to its full hardware redundancy, a dual modular redundancy approach is also examined for application to less demanding situations. By comparative analysis this study reaches the conclusion that the maximum logic partitioning TMR implementation is the best solution for digital I and C applications in NPPs where obtaining robustness is of the highest importance, despite its higher area overhead.

  20. Relaxation oscillation logic in Josephson junction circuits

    International Nuclear Information System (INIS)

    Fulton, T.A.

    1981-01-01

    A dc powered, self-resetting Josephson junction logic circuit relying on relaxation oscillations is described. A pair of Josephson junction gates are connected in series, a first shunt is connected in parallel with one of the gates, and a second shunt is connected in parallel with the series combination of gates. The resistance of the shunts and the dc bias current bias the gates so that they are capable of undergoing relaxation oscillations. The first shunt forms an output line whereas the second shunt forms a control loop. The bias current is applied to the gates so that, in the quiescent state, the gate in parallel with the second shunt is at V O, and the other gate is undergoing relaxation oscillations. By controlling the state of the first gate with the current in the output loop of another identical circuit, the invert function is performed

  1. Noise-assisted morphing of memory and logic function

    International Nuclear Information System (INIS)

    Kohar, Vivek; Sinha, Sudeshna

    2012-01-01

    We demonstrate how noise allows a bistable system to behave as a memory device, as well as a logic gate. Namely, in some optimal range of noise, the system can operate flexibly, both as a NAND/AND gate and a Set–Reset latch, by varying an asymmetrizing bias. Thus we show how this system implements memory, even for sub-threshold input signals, using noise constructively to store information. This can lead to the development of reconfigurable devices, that can switch efficiently between memory tasks and logic operations. -- Highlights: ► We consider a nonlinear system in a noisy environment. ► We show that the system can function as a robust memory element. ► Further, the response of the system can be easily morphed from memory to logic operations. ► Such systems can potentially act as building blocks of “smart” computing devices.

  2. Enhancement of ambipolar characteristics in single-walled carbon nanotubes using C{sub 60} and fabrication of logic gates

    Energy Technology Data Exchange (ETDEWEB)

    Park, Steve [Department of Materials Science and Engineering, Stanford University, Durand Building, 496 Lomita Mall, Stanford, California 94305-4034 (United States); Nam, Ji Hyun [Department of Electrical Engineering, Stanford University, David Packard Building, 350 Serra Mall, Mail Code: 9505, Stanford, California 94305-9505 (United States); Koo, Ja Hoon; Lei, Ting; Bao, Zhenan, E-mail: zbao@stanford.edu [Department of Chemical Engineering, Stanford University, Shriram Center, 443 Via Ortega, Room 307, Stanford, California 94305-4145 (United States)

    2015-03-09

    We demonstrate a technique to convert p-type single-walled carbon nanotube (SWNT) network transistor into ambipolar transistor by thermally evaporating C{sub 60} on top. The addition of C{sub 60} was observed to have two effects in enhancing ambipolar characteristics. First, C{sub 60} served as an encapsulating layer that enhanced the ambipolar characteristics of SWNTs. Second, C{sub 60} itself served as an electron transporting layer that contributed to the n-type conduction. Such a dual effect enables effective conversion of p-type into ambipolar characteristics. We have fabricated inverters using our SWNT/C{sub 60} ambipolar transistors with gain as high as 24, along with adaptive NAND and NOR logic gates.

  3. Classical Logic and Quantum Logic with Multiple and Common Lattice Models

    Directory of Open Access Journals (Sweden)

    Mladen Pavičić

    2016-01-01

    Full Text Available We consider a proper propositional quantum logic and show that it has multiple disjoint lattice models, only one of which is an orthomodular lattice (algebra underlying Hilbert (quantum space. We give an equivalent proof for the classical logic which turns out to have disjoint distributive and nondistributive ortholattices. In particular, we prove that both classical logic and quantum logic are sound and complete with respect to each of these lattices. We also show that there is one common nonorthomodular lattice that is a model of both quantum and classical logic. In technical terms, that enables us to run the same classical logic on both a digital (standard, two-subset, 0-1-bit computer and a nondigital (say, a six-subset computer (with appropriate chips and circuits. With quantum logic, the same six-element common lattice can serve us as a benchmark for an efficient evaluation of equations of bigger lattice models or theorems of the logic.

  4. Low-power DRAM-compatible Replacement Gate High-k/Metal Gate Stacks

    Science.gov (United States)

    Ritzenthaler, R.; Schram, T.; Bury, E.; Spessot, A.; Caillat, C.; Srividya, V.; Sebaai, F.; Mitard, J.; Ragnarsson, L.-Å.; Groeseneken, G.; Horiguchi, N.; Fazan, P.; Thean, A.

    2013-06-01

    In this work, the possibility of integration of High-k/Metal Gate (HKMG), Replacement Metal Gate (RMG) gate stacks for low power DRAM compatible transistors is studied. First, it is shown that RMG gate stacks used for Logic applications need to be seriously reconsidered, because of the additional anneal(s) needed in a DRAM process. New solutions are therefore developed. A PMOS stack HfO2/TiN with TiN deposited in three times combined with Work Function metal oxidations is demonstrated, featuring a very good Work Function of 4.95 eV. On the other hand, the NMOS side is shown to be a thornier problem to solve: a new solution based on the use of oxidized Ta as a diffusion barrier is proposed, and a HfO2/TiN/TaOX/TiAl/TiN/TiN gate stack featuring an aggressive Work Function of 4.35 eV (allowing a Work Function separation of 600 mV between NMOS and PMOS) is demonstrated. This work paves the way toward the integration of gate-last options for DRAM periphery transistors.

  5. Walsh-synthesized noise filters for quantum logic

    International Nuclear Information System (INIS)

    Ball, Harrison; Biercuk, Michael J.

    2015-01-01

    We study a novel class of open-loop control protocols constructed to perform arbitrary nontrivial single-qubit logic operations robust against time-dependent non-Markovian noise. Amplitude and phase modulation protocols are crafted leveraging insights from functional synthesis and the basis set of Walsh functions. We employ the experimentally validated generalized filter-transfer function formalism in order to find optimized control protocols for target operations in SU(2) by defining a cost function for the filter-transfer function to be minimized through the applied modulation. Our work details the various techniques by which we define and then optimize the filter-synthesis process in the Walsh basis, including the definition of specific analytic design rules which serve to efficiently constrain the available synthesis space. This approach yields modulated-gate constructions consisting of chains of discrete pulse-segments of arbitrary form, whose modulation envelopes possess intrinsic compatibility with digital logic and clocking. We derive novel families of Walsh-modulated noise filters designed to suppress dephasing and coherent amplitude-damping noise, and describe how well-known sequences derived in NMR also fall within the Walsh-synthesis framework. Finally, our work considers the effects of realistic experimental constraints such as limited modulation bandwidth on achievable filter performance. (orig.)

  6. Walsh-synthesized noise filters for quantum logic

    Energy Technology Data Exchange (ETDEWEB)

    Ball, Harrison; Biercuk, Michael J. [The University of Sydney, ARC Centre for Engineered Quantum Systems, School of Physics, Sydney, NSW (Australia); National Measurement Institute, Sydney, NSW (Australia)

    2015-05-14

    We study a novel class of open-loop control protocols constructed to perform arbitrary nontrivial single-qubit logic operations robust against time-dependent non-Markovian noise. Amplitude and phase modulation protocols are crafted leveraging insights from functional synthesis and the basis set of Walsh functions. We employ the experimentally validated generalized filter-transfer function formalism in order to find optimized control protocols for target operations in SU(2) by defining a cost function for the filter-transfer function to be minimized through the applied modulation. Our work details the various techniques by which we define and then optimize the filter-synthesis process in the Walsh basis, including the definition of specific analytic design rules which serve to efficiently constrain the available synthesis space. This approach yields modulated-gate constructions consisting of chains of discrete pulse-segments of arbitrary form, whose modulation envelopes possess intrinsic compatibility with digital logic and clocking. We derive novel families of Walsh-modulated noise filters designed to suppress dephasing and coherent amplitude-damping noise, and describe how well-known sequences derived in NMR also fall within the Walsh-synthesis framework. Finally, our work considers the effects of realistic experimental constraints such as limited modulation bandwidth on achievable filter performance. (orig.)

  7. Graphene-based non-Boolean logic circuits

    Science.gov (United States)

    Liu, Guanxiong; Ahsan, Sonia; Khitun, Alexander G.; Lake, Roger K.; Balandin, Alexander A.

    2013-10-01

    Graphene revealed a number of unique properties beneficial for electronics. However, graphene does not have an energy band-gap, which presents a serious hurdle for its applications in digital logic gates. The efforts to induce a band-gap in graphene via quantum confinement or surface functionalization have not resulted in a breakthrough. Here we show that the negative differential resistance experimentally observed in graphene field-effect transistors of "conventional" design allows for construction of viable non-Boolean computational architectures with the gapless graphene. The negative differential resistance—observed under certain biasing schemes—is an intrinsic property of graphene, resulting from its symmetric band structure. Our atomistic modeling shows that the negative differential resistance appears not only in the drift-diffusion regime but also in the ballistic regime at the nanometer-scale—although the physics changes. The obtained results present a conceptual change in graphene research and indicate an alternative route for graphene's applications in information processing.

  8. Protein logic: a statistical mechanical study of signal integration at the single-molecule level.

    Science.gov (United States)

    de Ronde, Wiet; Rein ten Wolde, Pieter; Mugler, Andrew

    2012-09-05

    Information processing and decision-making is based upon logic operations, which in cellular networks has been well characterized at the level of transcription. In recent years, however, both experimentalists and theorists have begun to appreciate that cellular decision-making can also be performed at the level of a single protein, giving rise to the notion of protein logic. Here we systematically explore protein logic using a well-known statistical mechanical model. As an example system, we focus on receptors that bind either one or two ligands, and their associated dimers. Notably, we find that a single heterodimer can realize any of the 16 possible logic gates, including the XOR gate, by variation of biochemical parameters. We then introduce what to our knowledge is a novel idea: that a set of receptors with fixed parameters can encode functionally unique logic gates simply by forming different dimeric combinations. An exhaustive search reveals that the simplest set of receptors (two single-ligand receptors and one double-ligand receptor) can realize several different groups of three unique gates, a result for which the parametric analysis of single receptors and dimers provides a clear interpretation. Both results underscore the surprising functional freedom readily available to cells at the single-protein level. Copyright © 2012 Biophysical Society. Published by Elsevier Inc. All rights reserved.

  9. Experimental demonstration of programmable multi-functional spin logic cell based on spin Hall effect

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, X.; Wan, C.H., E-mail: wancaihua@iphy.ac.cn; Yuan, Z.H.; Fang, C.; Kong, W.J.; Wu, H.; Zhang, Q.T.; Tao, B.S.; Han, X.F., E-mail: xfhan@iphy.ac.cn

    2017-04-15

    Confronting with the gigantic volume of data produced every day, raising integration density by reducing the size of devices becomes harder and harder to meet the ever-increasing demand for high-performance computers. One feasible path is to actualize more logic functions in one cell. In this respect, we experimentally demonstrate a prototype spin-orbit torque based spin logic cell integrated with five frequently used logic functions (AND, OR, NOT, NAND and NOR). The cell can be easily programmed and reprogrammed to perform desired function. Furthermore, the information stored in cells is symmetry-protected, making it possible to expand into logic gate array where the cell can be manipulated one by one without changing the information of other undesired cells. This work provides a prospective example of multi-functional spin logic cell with reprogrammability and nonvolatility, which will advance the application of spin logic devices. - Highlights: • Experimental demonstration of spin logic cell based on spin Hall effect. • Five logic functions are realized in a single logic cell. • The logic cell is reprogrammable. • Information in the cell is symmetry-protected. • The logic cell can be easily expanded to logic gate array.

  10. Graphical approach for multiple values logic minimization

    Science.gov (United States)

    Awwal, Abdul Ahad S.; Iftekharuddin, Khan M.

    1999-03-01

    Multiple valued logic (MVL) is sought for designing high complexity, highly compact, parallel digital circuits. However, the practical realization of an MVL-based system is dependent on optimization of cost, which directly affects the optical setup. We propose a minimization technique for MVL logic optimization based on graphical visualization, such as a Karnaugh map. The proposed method is utilized to solve signed-digit binary and trinary logic minimization problems. The usefulness of the minimization technique is demonstrated for the optical implementation of MVL circuits.

  11. Spatially and temporally resolved diagnostics of dense sprays using gated, femtosecond, digital holography

    Science.gov (United States)

    Trolinger, James D.; Dioumaev, Andrei K.; Ziaee, Ali; Minniti, Marco; Dunn-Rankin, Derek

    2017-08-01

    This paper describes research that demonstrated gated, femtosecond, digital holography, enabling 3D microscopic viewing inside dense, almost opaque sprays, and providing a new and powerful diagnostics capability for viewing fuel atomization processes never seen before. The method works by exploiting the extremely short coherence and pulse length (approximately 30 micrometers in this implementation) provided by a femtosecond laser combined with digital holography to eliminate multiple and wide angle scattered light from particles surrounding the injection region, which normally obscures the image of interest. Photons that follow a path that differs in length by more than 30 micrometers from a straight path through the field to the sensor do not contribute to the holographic recording of photons that travel in a near straight path (ballistic and "snake" photons). To further enhance the method, off-axis digital holography was incorporated to enhance signal to noise ratio and image processing capability in reconstructed images by separating the conjugate images, which overlap and interfere in conventional in-line holography. This also enables digital holographic interferometry. Fundamental relationships and limitations were also examined. The project is a continuing collaboration between MetroLaser and the University of California, Irvine.

  12. Using Spare Logic Resources To Create Dynamic Test Points

    Science.gov (United States)

    Katz, Richard; Kleyner, Igor

    2011-01-01

    A technique has been devised to enable creation of a dynamic set of test points in an embedded digital electronic system. As a result, electronics contained in an application specific circuit [e.g., gate array, field programmable gate array (FPGA)] can be internally probed, even when contained in a closed housing during all phases of test. In the present technique, the test points are not fixed and limited to a small number; the number of test points can vastly exceed the number of buffers or pins, resulting in a compact footprint. Test points are selected by means of spare logic resources within the ASIC(s) and/or FPGA(s). A register is programmed with a command, which is used to select the signals that are sent off-chip and out of the housing for monitoring by test engineers and external test equipment. The register can be commanded by any suitable means: for example, it could be commanded through a command port that would normally be used in the operation of the system. In the original application of the technique, commanding of the register is performed via a MIL-STD-1553B communication subsystem.

  13. Buried injector logic, a vertical IIL using deep ion implantation

    NARCIS (Netherlands)

    Mouthaan, A.J.

    1987-01-01

    A vertically integrated alternative for integrated injection logic has been realized, named buried injector logic (BIL). 1 MeV ion implantations are used to create buried layers. The vertical pnp and npn transistors have thin base regions and exhibit a limited charge accumulation if a gate is

  14. Heuristic Synthesis of Reversible Logic – A Comparative Study

    Directory of Open Access Journals (Sweden)

    Chua Shin Cheng

    2014-01-01

    Full Text Available Reversible logic circuits have been historically motivated by theoretical research in low-power, and recently attracted interest as components of the quantum algorithm, optical computing and nanotechnology. However due to the intrinsic property of reversible logic, traditional irreversible logic design and synthesis methods cannot be carried out. Thus a new set of algorithms are developed correctly to synthesize reversible logic circuit. This paper presents a comprehensive literature review with comparative study on heuristic based reversible logic synthesis. It reviews a range of heuristic based reversible logic synthesis techniques reported by researchers (BDD-based, cycle-based, search-based, non-search-based, rule-based, transformation-based, and ESOP-based. All techniques are described in detail and summarized in a table based on their features, limitation, library used and their consideration metric. Benchmark comparison of gate count and quantum cost are analysed for each synthesis technique. Comparing the synthesis algorithm outputs over the years, it can be observed that different approach has been used for the synthesis of reversible circuit. However, the improvements are not significant. Quantum cost and gate count has improved over the years, but arguments and debates are still on certain issues such as the issue of garbage outputs that remain the same. This paper provides the information of all heuristic based synthesis of reversible logic method proposed over the years. All techniques are explained in detail and thus informative for new reversible logic researchers and bridging the knowledge gap in this area.

  15. A Reconfigurable Logic Cell Based on a Simple Dynamical System

    Directory of Open Access Journals (Sweden)

    Lixiang Li

    2013-01-01

    Full Text Available This paper introduces a new scheme to achieve a dynamic logic gate which can be adjusted flexibly to obtain different logic functions by adjusting specific parameters of a dynamical system. Based on graphical tools and the threshold mechanism, the distribution of different logic gates is studied, and a transformation method between different logics is given. Analyzing the performance of the dynamical system in the presence of noise, we discover that it is resistant to system noise. Moreover, we find some part of the system can be considered as a leaky integrator which has been already widely applied in engineering. Finally, we provide a proof-of-principle hardware implementation of the proposed scheme to illustrate its effectiveness. With the proposed scheme in hand, it is convenient to build the flexible, robust, and general purpose computing devices such as various network coding routers, communication encoders or decoders, and reconfigurable computer chips.

  16. Wave Pipelining Using Self Reset Logic

    Directory of Open Access Journals (Sweden)

    Miguel E. Litvin

    2008-01-01

    Full Text Available This study presents a novel design approach combining wave pipelining and self reset logic, which provides an elegant solution at high-speed data throughput with significant savings in power and area as compared with other dynamic CMOS logic implementations. To overcome some limitations in SRL art, we employ a new SRL family, namely, dual-rail self reset logic with input disable (DRSRL-ID. These gates depict fairly constant timing parameters, specially the width of the output pulse, for varying fan-out and logic depth, helping accommodate process, supply voltage, and temperature variations (PVT. These properties simplify the implementation of wave pipelined circuits. General timing analysis is provided and compared with previous implementations. Results of circuit implementation are presented together with conclusions and future work.

  17. Carbon Nanotube Self-Gating Diode and Application in Integrated Circuits.

    Science.gov (United States)

    Si, Jia; Liu, Lijun; Wang, Fanglin; Zhang, Zhiyong; Peng, Lian-Mao

    2016-07-26

    A nano self-gating diode (SGD) based on nanoscale semiconducting material is proposed, simulated, and realized on semiconducting carbon nanotubes (CNTs) through a doping-free fabrication process. The relationships between the performance and material/structural parameters of the SGD are explored through numerical simulation and verified by experiment results. Based on these results, performance optimization strategy is outlined, and high performance CNT SGDs are fabricated and demonstrated to surpass other published CNT diodes. In particular the CNT SGD exhibits high rectifier factor of up to 1.4 × 10(6) while retains large on-state current. Benefiting from high yield and stability, CNT SGDs are used for constructing logic and analog integrated circuits. Two kinds of basic digital gates (AND and OR) have been realized on chip through using CNT SGDs and on-chip Ti wire resistances, and a full wave rectifier circuit has been demonstrated through using two CNT SGDs. Although demonstrated here using CNT SGDs, this device structure may in principle be implemented using other semiconducting nanomaterials, to provide ideas and building blocks for electronic applications based on nanoscale materials.

  18. Carbon nanotube feedback-gate field-effect transistor: suppressing current leakage and increasing on/off ratio.

    Science.gov (United States)

    Qiu, Chenguang; Zhang, Zhiyong; Zhong, Donglai; Si, Jia; Yang, Yingjun; Peng, Lian-Mao

    2015-01-27

    Field-effect transistors (FETs) based on moderate or large diameter carbon nanotubes (CNTs) usually suffer from ambipolar behavior, large off-state current and small current on/off ratio, which are highly undesirable for digital electronics. To overcome these problems, a feedback-gate (FBG) FET structure is designed and tested. This FBG FET differs from normal top-gate FET by an extra feedback-gate, which is connected directly to the drain electrode of the FET. It is demonstrated that a FBG FET based on a semiconducting CNT with a diameter of 1.5 nm may exhibit low off-state current of about 1 × 10(-13) A, high current on/off ratio of larger than 1 × 10(8), negligible drain-induced off-state leakage current, and good subthreshold swing of 75 mV/DEC even at large source-drain bias and room temperature. The FBG structure is promising for CNT FETs to meet the standard for low-static-power logic electronics applications, and could also be utilized for building FETs using other small band gap semiconductors to suppress leakage current.

  19. Simple realization of the Fredkin gate using a series of two-body operators

    International Nuclear Information System (INIS)

    Chau, H.F.; Wilczek, F.

    1995-01-01

    The Fredkin three-bit gate is universal for computational logic, and is reversible. Classically, it is impossible to do universal computation using reversible two-bit gates only. Here we construct the Fredkin gate using a combination of six two-body reversible (quantum) operators

  20. Quantum Logic Networks for Probabilistic Teleportation of an Arbitrary Three-Particle State

    Institute of Scientific and Technical Information of China (English)

    QIAN Xue-Min; FANG Jian-Xing; ZHU Shi-Qun; XI Yong-Jun

    2005-01-01

    The scheme for probabilistic teleportation of an arbitrary three-particle state is proposed. By using single qubit gate and three two-qubit gates, efficient quantum logic networks for probabilistic teleportation of an arbitrary three-particle state are constructed.

  1. A gold nanocluster-based fluorescent probe for simultaneous pH and temperature sensing and its application to cellular imaging and logic gates.

    Science.gov (United States)

    Wu, Yun-Tse; Shanmugam, Chandirasekar; Tseng, Wei-Bin; Hiseh, Ming-Mu; Tseng, Wei-Lung

    2016-06-07

    Metal nanocluster-based nanomaterials for the simultaneous determination of temperature and pH variations in micro-environments are still a challenge. In this study, we develop a dual-emission fluorescent probe consisting of bovine serum albumin-stabilized gold nanoclusters (BSA-AuNCs) and fluorescein-5-isothiocyanate (FITC) as temperature- and pH-responsive fluorescence signals. Under single wavelength excitation the FITC/BSA-AuNCs exhibited well-separated dual emission bands at 525 and 670 nm. When FITC was used as a reference fluorophore, FITC/BSA-AuNCs showed a good linear response over the temperature range 1-71 °C and offered temperature-independent spectral shifts, temperature accuracy, activation energy, and reusability. The possible mechanism for high temperature-induced fluorescence quenching of FITC/BSA-AuNCs could be attributed to a weakening of the Au-S bond, thereby lowering the charge transfer from BSA to AuNCs. Additionally, the pH- and temperature-responsive properties of FITC/BSA-AuNCs allow simultaneous temperature sensing from 21 to 41 °C (at intervals of 5 °C) and pH from 6.0 to 8.0 (at intervals of 0.5 pH unit), facilitating the construction of two-input AND logic gates. Three-input AND logic gates were also designed using temperature, pH, and trypsin as inputs. The practicality of using FITC/BSA-AuNCs to determine the temperature and pH changes in HeLa cells is also validated.

  2. Cleaning Challenges of High-κ/Metal Gate Structures

    KAUST Repository

    Hussain, Muhammad Mustafa; Shamiryan, Denis G.; Paraschiv, Vasile; Sano, Kenichi; Reinhardt, Karen A.

    2010-01-01

    High-κ/metal gates are used as transistors for advanced logic applications to improve speed and eliminate electrical issues associated with polySi and SiO2 gates. Various integration schemes are possible and will be discussed, such as dual gate, gate-first, and gate-last, both of which require specialized cleaning and etching steps. Specific areas of discussion will include cleaning and conditioning of the silicon surface, forming a high-quality chemical oxide, removal of the high-κ dielectric with selectivity to the SiO2 layer, cleaning and residue removal after etching, and prevention of galvanic corrosion during cleaning. © 2011 Scrivener Publishing LLC. All rights reserved.

  3. Cleaning Challenges of High-κ/Metal Gate Structures

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-12-20

    High-κ/metal gates are used as transistors for advanced logic applications to improve speed and eliminate electrical issues associated with polySi and SiO2 gates. Various integration schemes are possible and will be discussed, such as dual gate, gate-first, and gate-last, both of which require specialized cleaning and etching steps. Specific areas of discussion will include cleaning and conditioning of the silicon surface, forming a high-quality chemical oxide, removal of the high-κ dielectric with selectivity to the SiO2 layer, cleaning and residue removal after etching, and prevention of galvanic corrosion during cleaning. © 2011 Scrivener Publishing LLC. All rights reserved.

  4. Quantum Logical Operations on Encoded Qubits

    International Nuclear Information System (INIS)

    Zurek, W.H.; Laflamme, R.

    1996-01-01

    We show how to carry out quantum logical operations (controlled-not and Toffoli gates) on encoded qubits for several encodings which protect against various 1-bit errors. This improves the reliability of these operations by allowing one to correct for 1-bit errors which either preexisted or occurred in the course of operation. The logical operations we consider allow one to carry out the vast majority of the steps in the quantum factoring algorithm. copyright 1996 The American Physical Society

  5. A new paradigm in the design of energy-efficient digital circuits using laterally-actuated double-gate NEMS

    KAUST Repository

    Dadgour, Hamed F.

    2010-01-01

    Nano-Electro-Mechanical Switches (NEMS) offer the prospect of improved energy-efficiency in digital circuits due to their near-zero subthreshold leakage and extremely low subthreshold swing values. Among the different approaches of implementing NEMS, laterallyactuated double-gate NEMS devices have attracted much attention as they provide unique and exciting circuit design opportunities. For instance, this paper demonstrates that compact XOR/XNOR gates can be implemented using only two such NEMS transistors. While this in itself is a major improvement, its implications for minimizing Boolean functions using Karnaugh maps (K-maps) are even more significant. In the standard K-map technique, which is used in digital circuit design, adjacent "1s" (minterms) are grouped only in horizontal and/or vertical directions; the diagonal (or zig-zag) grouping of adjacent "1s" is not an option due to the absence of compact XOR/XNOR gates. However, this work demonstrates, for the first time ever, that in lateral double-gate NEMS-based circuits, grouping of minterms is possible in horizontal and vertical as well as diagonal fashions. This is because the diagonal groupings of minterms require XOR/XNOR operations, which are available in such NEMS-based circuits at minimal costs. This novel design paradigm facilitates more compact implementations of Boolean functions and thus, considerably improves their energy-efficiency. For example, a lateral NEMS-based full-adder is implemented using less than half the number of transistors, which is required by a CMOS-based full-adder. Furthermore, circuit simulations are performed to evaluate the energy-efficiencies of the NEMS-based 32-bit carry-save adders compared to their standard CMOS-based counterparts. Copyright 2010 ACM.

  6. Reprogammable universal logic device based on mems technology

    KAUST Repository

    Hafiz, Md Adbdullah Al

    2017-06-15

    Various examples of reprogrammable universal logic devices are provided. In one example, the device can include a tunable AC input (206) to an oscillator/resonator; a first logic input and a second logic input to the oscillator/resonator, the first and second logic inputs provided by separate DC voltage sources (VA, VB), each of the first and second logic inputs including an on/off switch (A, B); and the oscillator/resonator including an output terminal (215). The tunable oscillator/resonator can be a MEMS/NEMS resonator. Switching of one or both of the first or second logic inputs on or off in association with the tuning of the AC input (206) can provide logic gate operation. The device can easily be extended to a 3-bit or n-bit device by providing additional logic inputs. Binary comparators and encoders can be implemented using a plurality of oscillators/resonators.

  7. Electron transport in a double quantum ring: Evidence of an AND gate

    International Nuclear Information System (INIS)

    Maiti, Santanu K.

    2009-01-01

    We explore AND gate response in a double quantum ring where each ring is threaded by a magnetic flux φ. The double quantum ring is attached symmetrically to two semi-infinite one-dimensional metallic electrodes and two gate voltages, namely, V a and V b , are applied, respectively, in the lower arms of the two rings which are treated as two inputs of the AND gate. The system is described in the tight-binding framework and the calculations are done using the Green's function formalism. Here we numerically compute the conductance-energy and current-voltage characteristics as functions of the ring-to-electrode coupling strengths, magnetic flux and gate voltages. Our study suggests that, for a typical value of the magnetic flux φ=φ 0 /2 (φ 0 =ch/e, the elementary flux-quantum) a high output current (1) (in the logical sense) appears only if both the two inputs to the gate are high (1), while if neither or only one input to the gate is high (1), a low output current (0) results. It clearly demonstrates the AND gate behavior and this aspect may be utilized in designing an electronic logic gate.

  8. Logical design for computers and control

    CERN Document Server

    Dodd, Kenneth N

    1972-01-01

    Logical Design for Computers and Control Logical Design for Computers and Control gives an introduction to the concepts and principles, applications, and advancements in the field of control logic. The text covers topics such as logic elements; high and low logic; kinds of flip-flops; binary counting and arithmetic; and Boolean algebra, Boolean laws, and De Morgan's theorem. Also covered are topics such as electrostatics and atomic theory; the integrated circuit and simple control systems; the conversion of analog to digital systems; and computer applications and control. The book is recommend

  9. Separating Business Logic from Medical Knowledge in Digital Clinical Workflows Using Business Process Model and Notation and Arden Syntax.

    Science.gov (United States)

    de Bruin, Jeroen S; Adlassnig, Klaus-Peter; Leitich, Harald; Rappelsberger, Andrea

    2018-01-01

    Evidence-based clinical guidelines have a major positive effect on the physician's decision-making process. Computer-executable clinical guidelines allow for automated guideline marshalling during a clinical diagnostic process, thus improving the decision-making process. Implementation of a digital clinical guideline for the prevention of mother-to-child transmission of hepatitis B as a computerized workflow, thereby separating business logic from medical knowledge and decision-making. We used the Business Process Model and Notation language system Activiti for business logic and workflow modeling. Medical decision-making was performed by an Arden-Syntax-based medical rule engine, which is part of the ARDENSUITE software. We succeeded in creating an electronic clinical workflow for the prevention of mother-to-child transmission of hepatitis B, where institution-specific medical decision-making processes could be adapted without modifying the workflow business logic. Separation of business logic and medical decision-making results in more easily reusable electronic clinical workflows.

  10. A Combinational Digital Logic Design Tool for Practice and Assessment in Engineering Education

    Directory of Open Access Journals (Sweden)

    Rasha Morsi

    2016-08-01

    Full Text Available As technology advances, computers are being used almost everywhere. In a 2013 US Census report (File and Ryan, 2014, 83.8% (up from 78.9% in 2012 of U.S. households reported owning a computer with 74.4% reporting internet use (73.4% high speed internet. In recent years, the shift in educational technologies has been moving towards gaming, more specifically serious gaming. Although this is an important trend, there is still much to be said about e-learning through a step-by-step interactive process using an online practice tool. This paper presents a detailed description of the Combinational Logic Design Tool (CLDT (Morsi and Russell (2007. CLDT was designed and developed under the CCLI project, #0737242, funded by the National Science Foundation, which aimed to develop and disseminate a novel online practice tool for on demand review and assessment in Electrical and Computer Engineering education. The paper also reports on a formal assessment conducted in a Digital Logic Design Classroom and presents the results of this assessment.

  11. Nuclear spin states and quantum logical operations

    International Nuclear Information System (INIS)

    Orlova, T.A.; Rasulov, E.N.

    2006-01-01

    Full text: To build a really functional quantum computer, researchers need to develop logical controllers known as 'gates' to control the state of q-bits. In this work , equal quantum logical operations are examined with the emphasis on 1-, 2-, and 3-q-bit gates.1-q-bit quantum logical operations result in Boolean 'NOT'; the 'NOT' and '√NOT' operations are described from the classical and quantum perspective. For the 'NOT' operation to be performed, there must be a means to switch the state of q-bits from to and vice versa. For this purpose either a light or radio pulse of a certain frequency can be used. If the nucleus has the spin-down state, the spin will absorb a portion of energy from electromagnetic current and switch into the spin-up state, and the radio pulse will force it to switch into state. An operation thus described from purely classical perspective is clearly understood. However, operations not analogous to the classical type may also be performed. If the above mentioned radio pulses are only half the frequency required to cause a state switch in the nuclear spin, the nuclear spin will enter the quantum superposition state of the ground state (↓) and excited states (↑). A recurring radio pulse will then result in an operation equivalent to 'NOT', for which reason the described operation is called '√NOT'. Such an operation allows for the state of quantum superposition in quantum computing, which enables parallel processing of several numbers. The work also treats the principles of 2-q-bit logical operations of the controlled 'NOT' type (CNOT), 2-q-bit (SWAP), and the 3-q-bit 'TAFFOLI' gate. (author)

  12. Compact field programmable gate array-based pulse-sequencer and radio-frequency generator for experiments with trapped atoms

    Energy Technology Data Exchange (ETDEWEB)

    Pruttivarasin, Thaned, E-mail: thaned.pruttivarasin@riken.jp [Quantum Metrology Laboratory, RIKEN, Wako-shi, Saitama 351-0198 (Japan); Katori, Hidetoshi [Quantum Metrology Laboratory, RIKEN, Wako-shi, Saitama 351-0198 (Japan); Innovative Space-Time Project, ERATO, JST, Bunkyo-ku, Tokyo 113-8656 (Japan); Department of Applied Physics, Graduate School of Engineering, The University of Tokyo, Bunkyo-ku, Tokyo 113-8656 (Japan)

    2015-11-15

    We present a compact field-programmable gate array (FPGA) based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 transistor-transistor logic (TTL) channels with a timing resolution of 40 ns and contains a built-in 100 MHz frequency counter for counting electrical pulses from a photo-multiplier tube. There are 16 independent direct-digital-synthesizers RF sources with fast (rise-time of ∼60 ns) amplitude switching and sub-mHz frequency tuning from 0 to 800 MHz.

  13. Grafting polyethylenimine with quinoline derivatives for targeted imaging of intracellular Zn{sup 2+} and logic gate operations

    Energy Technology Data Exchange (ETDEWEB)

    Pan, Yi; Shi, Yupeng; Chen, Junying; Wong, Chap-Mo; Zhang, Heng [Key Laboratory of Sensing Technology and Biomedical Instruments (Guangdong Province), School of Engineering, Sun Yat-Sen University, Guangzhou (China); Li, Mei-Jin [Key Laboratory of Analysis and Detection Technology for Food Safety, Ministry of Education and Fujian Province, Department of Chemistry, Fuzhou University, Fuzhou (China); Li, Cheuk-Wing [Institute of Chinese Medical Sciences, University of Macau (China); Yi, Changqing, E-mail: yichq@mail.sysu.edu.cn [Key Laboratory of Sensing Technology and Biomedical Instruments (Guangdong Province), School of Engineering, Sun Yat-Sen University, Guangzhou (China); Research Institute of Sun Yat-Sen University in Shenzhen, Shenzhen (China)

    2016-12-01

    In this study, a highly sensitive and selective fluorescent Zn{sup 2+} probe which exhibited excellent biocompatibility, water solubility, and cell-membrane permeability, was facilely synthesized in a single step by grafting polyethyleneimine (PEI) with quinoline derivatives. The primary amino groups in the branched PEI can increase water solubility and cell permeability of the probe PEIQ, while quinoline derivatives can specifically recognize Zn{sup 2+} and reduce the potential cytotoxicity of PEI. Basing on fluorescence off-on mechanism, PEIQ demonstrated excellent sensing capability towards Zn{sup 2+} in absolute aqueous solution, where a high sensitivity with a detection limit as low as 38.1 nM, and a high selectivity over competing metal ions and potential interfering amino acids, were achieved. Inspired by these results, elementary logic operations (YES, NOT and INHIBIT) have been constructed by employing PEIQ as the gate while Zn{sup 2+} and EDTA as chemical inputs. Together with the low cytotoxicity and good cell-permeability, the practical application of PEIQ in living cell imaging was satisfactorily demonstrated, emphasizing its wide application in fundamental biology research. - Graphical abstract: The fluorescent Zn{sup 2+} probe, PEIQ, is facilely synthesized by grafting PEI with 8-CAAQ, and demonstrated for the pratical applications in Zn{sup 2+} imaging and implementation of molecular logic operations within biological cells. - Highlights: • PEIQ, fluorescent Zn{sup 2+} probe, is synthesized by grafting PEI with quinoline derivatives. • PEIQ exhibits high sensitivity and selectivity in absolute aqueous solution. • PEIQ is biocompatible, water soluble, and cell-membrane permeable. • Elementary logic operations have been demonstrated for PEIQ/Zn{sup 2+}/EDTA system. • The practical application of PEIQ in living cell imaging is demonstrated.

  14. Semiconductor optical amplifier-based all-optical gates for high-speed optical processing

    DEFF Research Database (Denmark)

    Stubkjær, Kristian

    2000-01-01

    Semiconductor optical amplifiers are useful building blocks for all-optical gates as wavelength converters and OTDM demultiplexers. The paper reviews the progress from simple gates using cross-gain modulation and four-wave mixing to the integrated interferometric gates using cross-phase modulation....... These gates are very efficient for high-speed signal processing and open up interesting new areas, such as all-optical regeneration and high-speed all-optical logic functions...

  15. Spin-wave logic devices based on isotropic forward volume magnetostatic waves

    International Nuclear Information System (INIS)

    Klingler, S.; Pirro, P.; Brächer, T.; Leven, B.; Hillebrands, B.; Chumak, A. V.

    2015-01-01

    We propose the utilization of isotropic forward volume magnetostatic spin waves in modern wave-based logic devices and suggest a concrete design for a spin-wave majority gate operating with these waves. We demonstrate by numerical simulations that the proposed out-of-plane magnetized majority gate overcomes the limitations of anisotropic in-plane magnetized majority gates due to the high spin-wave transmission through the gate, which enables a reduced energy consumption of these devices. Moreover, the functionality of the out-of-plane majority gate is increased due to the lack of parasitic generation of short-wavelength exchange spin waves

  16. Spin-wave logic devices based on isotropic forward volume magnetostatic waves

    Energy Technology Data Exchange (ETDEWEB)

    Klingler, S., E-mail: stefan.klingler@wmi.badw-muenchen.de; Pirro, P.; Brächer, T.; Leven, B.; Hillebrands, B.; Chumak, A. V. [Fachbereich Physik and Landesforschungszentrum OPTIMAS, Technische Universität Kaiserslautern, 67663 Kaiserslautern (Germany)

    2015-05-25

    We propose the utilization of isotropic forward volume magnetostatic spin waves in modern wave-based logic devices and suggest a concrete design for a spin-wave majority gate operating with these waves. We demonstrate by numerical simulations that the proposed out-of-plane magnetized majority gate overcomes the limitations of anisotropic in-plane magnetized majority gates due to the high spin-wave transmission through the gate, which enables a reduced energy consumption of these devices. Moreover, the functionality of the out-of-plane majority gate is increased due to the lack of parasitic generation of short-wavelength exchange spin waves.

  17. Quantum logic networks for probabilistic teleportation

    Institute of Scientific and Technical Information of China (English)

    刘金明; 张永生; 等

    2003-01-01

    By eans of the primitive operations consisting of single-qubit gates.two-qubit controlled-not gates,Von Neuman measurement and classically controlled operations.,we construct efficient quantum logic networks for implementing probabilistic teleportation of a single qubit,a two-particle entangled state,and an N-particle entanglement.Based on the quantum networks,we show that after the partially entangled states are concentrated into maximal entanglement,the above three kinds of probabilistic teleportation are the same as the standard teleportation using the corresponding maximally entangled states as the quantum channels.

  18. Loregic: A Method to Characterize the Cooperative Logic of Regulatory Factors

    Science.gov (United States)

    Wang, Daifeng; Yan, Koon-Kiu; Sisu, Cristina; Cheng, Chao; Rozowsky, Joel; Meyerson, William; Gerstein, Mark B.

    2015-01-01

    The topology of the gene-regulatory network has been extensively analyzed. Now, given the large amount of available functional genomic data, it is possible to go beyond this and systematically study regulatory circuits in terms of logic elements. To this end, we present Loregic, a computational method integrating gene expression and regulatory network data, to characterize the cooperativity of regulatory factors. Loregic uses all 16 possible two-input-one-output logic gates (e.g. AND or XOR) to describe triplets of two factors regulating a common target. We attempt to find the gate that best matches each triplet’s observed gene expression pattern across many conditions. We make Loregic available as a general-purpose tool (github.com/gersteinlab/loregic). We validate it with known yeast transcription-factor knockout experiments. Next, using human ENCODE ChIP-Seq and TCGA RNA-Seq data, we are able to demonstrate how Loregic characterizes complex circuits involving both proximally and distally regulating transcription factors (TFs) and also miRNAs. Furthermore, we show that MYC, a well-known oncogenic driving TF, can be modeled as acting independently from other TFs (e.g., using OR gates) but antagonistically with repressing miRNAs. Finally, we inter-relate Loregic’s gate logic with other aspects of regulation, such as indirect binding via protein-protein interactions, feed-forward loop motifs and global regulatory hierarchy. PMID:25884877

  19. A circuit design for multi-inputs stateful OR gate

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Qiao; Wang, Xiaoping, E-mail: wangxiaoping@hust.edu.cn; Wan, Haibo; Yang, Ran; Zheng, Jian

    2016-09-07

    The in situ logic operation on memristor memory has attracted researchers' attention. In this brief, a new circuit structure that performs a stateful OR logic operation is proposed. When our OR logic is operated in series with other logic operations (IMP, AND), only two voltages should to be changed while three voltages are necessary in the previous one-step OR logic operation. In addition, this circuit structure can be extended to multi-inputs OR operation to perfect the family of logic operations on memristive memory in nanocrossbar based networks. The proposed OR gate can enable fast logic operation, reduce the number of required memristors and the sequential steps. Through analysis and simulation, the feasibility of OR operation is demonstrated and the appropriate parameters are obtained.

  20. A circuit design for multi-inputs stateful OR gate

    International Nuclear Information System (INIS)

    Chen, Qiao; Wang, Xiaoping; Wan, Haibo; Yang, Ran; Zheng, Jian

    2016-01-01

    The in situ logic operation on memristor memory has attracted researchers' attention. In this brief, a new circuit structure that performs a stateful OR logic operation is proposed. When our OR logic is operated in series with other logic operations (IMP, AND), only two voltages should to be changed while three voltages are necessary in the previous one-step OR logic operation. In addition, this circuit structure can be extended to multi-inputs OR operation to perfect the family of logic operations on memristive memory in nanocrossbar based networks. The proposed OR gate can enable fast logic operation, reduce the number of required memristors and the sequential steps. Through analysis and simulation, the feasibility of OR operation is demonstrated and the appropriate parameters are obtained.

  1. A Cu2+-selective fluorescent chemosensor based on BODIPY with two pyridine ligands and logic gate

    Science.gov (United States)

    Huang, Liuqian; Zhang, Jing; Yu, Xiaoxiu; Ma, Yifan; Huang, Tianjiao; Shen, Xi; Qiu, Huayu; He, Xingxing; Yin, Shouchun

    2015-06-01

    A novel near-infrared fluorescent chemosensor based on BODIPY (Py-1) has been synthesized and characterized. Py-1 displays high selectivity and sensitivity for sensing Cu2+ over other metal ions in acetonitrile. Upon addition of Cu2+ ions, the maximum absorption band of Py-1 in CH3CN displays a red shift from 603 to 608 nm, which results in a visual color change from pink to blue. When Py-1 is excited at 600 nm in the presence of Cu2+, the fluorescent emission intensity of Py-1 at 617 nm is quenched over 86%. Notably, the complex of Py-1-Cu2+ can be restored with the introduction of EDTA or S2-. Consequently, an IMPLICATION logic gate at molecular level operating in fluorescence mode with Cu2+ and S2- as chemical inputs can be constructed. Finally, based on the reversible and reproducible system, a nanoscale sequential memory unit displaying "Writing-Reading-Erasing-Reading" functions can be integrated.

  2. Logic control of microfluidics with smart colloid

    KAUST Repository

    Wang, Limu

    2010-01-01

    We report the successful realization of a microfluidic chip with switching and corresponding inverting functionalities. The chips are identical logic control components incorporating a type of smart colloid, giant electrorheological fluid (GERF), which possesses reversible characteristics via a liquid-solid phase transition under external electric field. Two pairs of electrodes embedded on the sides of two microfluidic channels serve as signal input and output, respectively. One, located in the GERF micro-channel is used to control the flow status of GERF, while another one in the ither micro-fluidic channel is used to detect the signal generated with a passing-by droplet (defined as a signal droplet). Switching of the GERF from the suspended state (off-state) to the flowing state (on-state) or vice versa in the micro-channel is controlled by the appearance of signal droplets whenever they pass through the detection electrode. The output on-off signals can be easily demonstrated, clearly matching with GERF flow status. Our results show that such a logic switch is also a logic IF gate, while its inverter functions as a NOT gate. © The Royal Society of Chemistry 2010.

  3. Using Pipelined XNOR Logic to Reduce SEU Risks in State Machines

    Science.gov (United States)

    Le, Martin; Zheng, Xin; Katanyoutant, Sunant

    2008-01-01

    Single-event upsets (SEUs) pose great threats to avionic systems state machine control logic, which are frequently used to control sequence of events and to qualify protocols. The risks of SEUs manifest in two ways: (a) the state machine s state information is changed, causing the state machine to unexpectedly transition to another state; (b) due to the asynchronous nature of SEU, the state machine's state registers become metastable, consequently causing any combinational logic associated with the metastable registers to malfunction temporarily. Effect (a) can be mitigated with methods such as triplemodular redundancy (TMR). However, effect (b) cannot be eliminated and can degrade the effectiveness of any mitigation method of effect (a). Although there is no way to completely eliminate the risk of SEU-induced errors, the risk can be made very small by use of a combination of very fast state-machine logic and error-detection logic. Therefore, one goal of two main elements of the present method is to design the fastest state-machine logic circuitry by basing it on the fastest generic state-machine design, which is that of a one-hot state machine. The other of the two main design elements is to design fast error-detection logic circuitry and to optimize it for implementation in a field-programmable gate array (FPGA) architecture: In the resulting design, the one-hot state machine is fitted with a multiple-input XNOR gate for detection of illegal states. The XNOR gate is implemented with lookup tables and with pipelines for high speed. In this method, the task of designing all the logic must be performed manually because no currently available logic synthesis software tool can produce optimal solutions of design problems of this type. However, some assistance is provided by a script, written for this purpose in the Python language (an object-oriented interpretive computer language) to automatically generate hardware description language (HDL) code from state

  4. Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations

    Science.gov (United States)

    Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

    2017-09-01

    The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

  5. Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations.

    Science.gov (United States)

    Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

    2017-09-15

    The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

  6. High-Fidelity Trapped-Ion Quantum Logic Using Near-Field Microwaves.

    Science.gov (United States)

    Harty, T P; Sepiol, M A; Allcock, D T C; Ballance, C J; Tarlton, J E; Lucas, D M

    2016-09-30

    We demonstrate a two-qubit logic gate driven by near-field microwaves in a room-temperature microfabricated surface ion trap. We introduce a dynamically decoupled gate method, which stabilizes the qubits against fluctuating energy shifts and avoids the need to null the microwave field. We use the gate to produce a Bell state with fidelity 99.7(1)%, after accounting for state preparation and measurement errors. The gate is applied directly to ^{43}Ca^{+} hyperfine "atomic clock" qubits (coherence time T_{2}^{*}≈50  s) using the oscillating magnetic field gradient produced by an integrated microwave electrode.

  7. Technologies for faults diagnosis of FPGA logic blocks

    Directory of Open Access Journals (Sweden)

    C. U. Ngene

    2012-08-01

    Full Text Available The critical issues of testing field programmable gate arrays (FPGA with a view to diagnosing faults are an important step that ensures the reliability of FPGA designs. Correct diagnosis of faulty logic blocks of FPGAs guarantees restoration of functionality through replacement of faulty block with replacement units. This process can be done autonomously or without the intervention of an engineer depending on application area. This paper considers two methods for analysing test results of FPGA logic blocks with the purpose of localising and distinguishing faults. The algebraic logic and vector-logical methods are proposed for diagnosing faulty logic blocks in FPGA fabric. It is found that the algebraic logic method is more useful for processing of sparse faults tables when the number of coordinates with 1s values with respect to zero values ​​is not more than 20%, whereas the vector-logical method facilitates the analysis of faults table with predominance of 1s values.

  8. Random noise effects in pulse-mode digital multilayer neural networks.

    Science.gov (United States)

    Kim, Y C; Shanblatt, M A

    1995-01-01

    A pulse-mode digital multilayer neural network (DMNN) based on stochastic computing techniques is implemented with simple logic gates as basic computing elements. The pulse-mode signal representation and the use of simple logic gates for neural operations lead to a massively parallel yet compact and flexible network architecture, well suited for VLSI implementation. Algebraic neural operations are replaced by stochastic processes using pseudorandom pulse sequences. The distributions of the results from the stochastic processes are approximated using the hypergeometric distribution. Synaptic weights and neuron states are represented as probabilities and estimated as average pulse occurrence rates in corresponding pulse sequences. A statistical model of the noise (error) is developed to estimate the relative accuracy associated with stochastic computing in terms of mean and variance. Computational differences are then explained by comparison to deterministic neural computations. DMNN feedforward architectures are modeled in VHDL using character recognition problems as testbeds. Computational accuracy is analyzed, and the results of the statistical model are compared with the actual simulation results. Experiments show that the calculations performed in the DMNN are more accurate than those anticipated when Bernoulli sequences are assumed, as is common in the literature. Furthermore, the statistical model successfully predicts the accuracy of the operations performed in the DMNN.

  9. Fabrication of magnetic tunnel junctions connected through a continuous free layer to enable spin logic devices

    Science.gov (United States)

    Wan, Danny; Manfrini, Mauricio; Vaysset, Adrien; Souriau, Laurent; Wouters, Lennaert; Thiam, Arame; Raymenants, Eline; Sayan, Safak; Jussot, Julien; Swerts, Johan; Couet, Sebastien; Rassoul, Nouredine; Babaei Gavan, Khashayar; Paredis, Kristof; Huyghebaert, Cedric; Ercken, Monique; Wilson, Christopher J.; Mocuta, Dan; Radu, Iuliana P.

    2018-04-01

    Magnetic tunnel junctions (MTJs) interconnected via a continuous ferromagnetic free layer were fabricated for spin torque majority gate (STMG) logic. The MTJs are biased independently and show magnetoelectric response under spin transfer torque. The electrical control of these devices paves the way to future spin logic devices based on domain wall (DW) motion. In particular, it is a significant step towards the realization of a majority gate. To our knowledge, this is the first fabrication of a cross-shaped free layer shared by several perpendicular MTJs. The fabrication process can be generalized to any geometry and any number of MTJs. Thus, this framework can be applied to other spin logic concepts based on magnetic interconnect. Moreover, it allows exploration of spin dynamics for logic applications.

  10. High-fidelity Rydberg quantum gate via a two-atom dark state

    DEFF Research Database (Denmark)

    Petrosyan, David; Motzoi, Felix; Saffman, Mark

    2017-01-01

    We propose a two-qubit gate for neutral atoms in which one of the logical state components adiabatically follows a two-atom dark state formed by the laser coupling to a Rydberg state and a strong, resonant dipole-dipole exchange interaction between two Rydberg excited atoms. Our gate exhibits...

  11. Logic functions and equations examples and exercises

    CERN Document Server

    Steinbach, Bernd

    2009-01-01

    With a free, downloadable software package available to help solve the exercises, this book focuses on practical and relevant problems that arise in the field of binary logics, with its two main applications - digital circuit design, and propositional logics.

  12. An intelligent 1:2 demultiplexer as an intracellular theranostic device based on DNA/Ag cluster-gated nanovehicles

    Science.gov (United States)

    Ran, Xiang; Wang, Zhenzhen; Ju, Enguo; Pu, Fang; Song, Yanqiu; Ren, Jinsong; Qu, Xiaogang

    2018-02-01

    The logic device demultiplexer can convey a single input signal into one of multiple output channels. The choice of the output channel is controlled by a selector. Several molecules and biomolecules have been used to mimic the function of a demultiplexer. However, the practical application of logic devices still remains a big challenge. Herein, we design and construct an intelligent 1:2 demultiplexer as a theranostic device based on azobenzene (azo)-modified and DNA/Ag cluster-gated nanovehicles. The configuration of azo and the conformation of the DNA ensemble can be regulated by light irradiation and pH, respectively. The demultiplexer which uses light as the input and acid as the selector can emit red fluorescence or a release drug under different conditions. Depending on different cells, the intelligent logic device can select the mode of cellular imaging in healthy cells or tumor therapy in tumor cells. The study incorporates the logic gate with the theranostic device, paving the way for tangible applications of logic gates in the future.

  13. The effects of transistor source-to-gate bridging faults in complex CMOS gates

    Science.gov (United States)

    Visweswaran, G. S.; Ali, Akhtar-Uz-Zaman M.; Lala, Parag K.; Hartmann, Carlos R. P.

    1991-06-01

    A study of the effect of gate-to-source bridging faults in the pull-up section of a complex CMOS gate is presented. The manifestation of these faults depends on the resistance value of the connection causing the bridging. It is shown that such faults manifest themselves either as stuck-at or stuck-open faults and can be detected by tests for stuck-at and stuck-open faults generated for the equivalent logic current. It is observed that for transistor channel lengths larger than 1 microns there exists a range of values of the bridging resistance for which the fault behaves as a pseudo-stuck-open fault.

  14. Simultaneous multichannel wavelength multicasting and XOR logic gate multicasting for three DPSK signals based on four-wave mixing in quantum-dot semiconductor optical amplifier.

    Science.gov (United States)

    Qin, Jun; Lu, Guo-Wei; Sakamoto, Takahide; Akahane, Kouichi; Yamamoto, Naokatsu; Wang, Danshi; Wang, Cheng; Wang, Hongxiang; Zhang, Min; Kawanishi, Tetsuya; Ji, Yuefeng

    2014-12-01

    In this paper, we experimentally demonstrate simultaneous multichannel wavelength multicasting (MWM) and exclusive-OR logic gate multicasting (XOR-LGM) for three 10Gbps non-return-to-zero differential phase-shift-keying (NRZ-DPSK) signals in quantum-dot semiconductor optical amplifier (QD-SOA) by exploiting the four-wave mixing (FWM) process. No additional pump is needed in the scheme. Through the interaction of the input three 10Gbps DPSK signal lights in QD-SOA, each channel is successfully multicasted to three wavelengths (1-to-3 for each), totally 3-to-9 MWM, and at the same time, three-output XOR-LGM is obtained at three different wavelengths. All the new generated channels are with a power penalty less than 1.2dB at a BER of 10(-9). Degenerate and non-degenerate FWM components are fully used in the experiment for data and logic multicasting.

  15. CMOS gate array characterization procedures

    Science.gov (United States)

    Spratt, James P.

    1993-09-01

    Present procedures are inadequate for characterizing the radiation hardness of gate array product lines prior to personalization because the selection of circuits to be used, from among all those available in the manufacturer's circuit library, is usually uncontrolled. (Some circuits are fundamentally more radiation resistant than others.) In such cases, differences in hardness can result between different designs of the same logic function. Hardness also varies because many gate arrays feature large custom-designed megacells (e.g., microprocessors and random access memories-MicroP's and RAM's). As a result, different product lines cannot be compared equally. A characterization strategy is needed, along with standardized test vehicle(s), methodology, and conditions, so that users can make informed judgments on which gate arrays are best suited for their needs. The program described developed preferred procedures for the radiation characterization of gate arrays, including a gate array evaluation test vehicle, featuring a canary circuit, designed to define the speed versus hardness envelope of the gate array. A multiplier was chosen for this role, and a baseline multiplier architecture is suggested that could be incorporated into an existing standard evaluation circuit chip.

  16. Generation of high-fidelity controlled-NOT logic gates by coupled superconducting qubits

    International Nuclear Information System (INIS)

    Galiautdinov, Andrei

    2007-01-01

    Building on the previous results of the Weyl chamber steering method, we demonstrate how to generate high-fidelity controlled-NOT (CNOT) gates by direct application of certain physically relevant Hamiltonians with fixed coupling constants containing Rabi terms. Such Hamiltonians are often used to describe two superconducting qubits driven by local rf pulses. It is found that in order to achieve 100% fidelity in a system with capacitive coupling of strength g, one Rabi term suffices. We give the exact values of the physical parameters needed to implement such CNOT gates. The gate time and all possible Rabi frequencies are found to be t=π/(2g) and Ω 1 /g=√(64n 2 -1),n=1,2,3,.... Generation of a perfect CNOT gate in a system with inductive coupling, characterized by additional constant k, requires the presence of both Rabi terms. The gate time is again t=π/(2g), but now there is an infinite number of solutions, each of which is valid in a certain range of k and is characterized by a pair of integers (n,m), (Ω 1,2 /g)=√(16n 2 -((k-1/2)) 2 )±√(16m 2 -((k+1/2)) 2 ). We distinguish two cases, depending on the sign of the coupling constant: (i) the antiferromagnetic case (k≥0) with n≥m=0,1,2,... and (ii) the ferromagnetic case (k≤0) with n>m=0,1,2,.... We conclude with consideration of fidelity degradation by switching to resonance. Simulation of time evolution based on the fourth-order Magnus expansion reveals characteristics of the gate similar to those found in the exact case, with slightly shorter gate time and shifted values of the Rabi frequencies

  17. "Glitch Logic" and Applications to Computing and Information Security

    Science.gov (United States)

    Stoica, Adrian; Katkoori, Srinivas

    2009-01-01

    This paper introduces a new method of information processing in digital systems, and discusses its potential benefits to computing and information security. The new method exploits glitches caused by delays in logic circuits for carrying and processing information. Glitch processing is hidden to conventional logic analyses and undetectable by traditional reverse engineering techniques. It enables the creation of new logic design methods that allow for an additional controllable "glitch logic" processing layer embedded into a conventional synchronous digital circuits as a hidden/covert information flow channel. The combination of synchronous logic with specific glitch logic design acting as an additional computing channel reduces the number of equivalent logic designs resulting from synthesis, thus implicitly reducing the possibility of modification and/or tampering with the design. The hidden information channel produced by the glitch logic can be used: 1) for covert computing/communication, 2) to prevent reverse engineering, tampering, and alteration of design, and 3) to act as a channel for information infiltration/exfiltration and propagation of viruses/spyware/Trojan horses.

  18. Asynchronous Operators of Sequential Logic Venjunction & Sequention

    CERN Document Server

    Vasyukevich, Vadim

    2011-01-01

    This book is dedicated to new mathematical instruments assigned for logical modeling of the memory of digital devices. The case in point is logic-dynamical operation named venjunction and venjunctive function as well as sequention and sequentional function. Venjunction and sequention operate within the framework of sequential logic. In a form of the corresponding equations, they organically fit analytical expressions of Boolean algebra. Thus, a sort of symbiosis is formed using elements of asynchronous sequential logic on the one hand and combinational logic on the other hand. So, asynchronous

  19. Optimized 4-bit Quantum Reversible Arithmetic Logic Unit

    Science.gov (United States)

    Ayyoub, Slimani; Achour, Benslama

    2017-08-01

    Reversible logic has received a great attention in the recent years due to its ability to reduce the power dissipation. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. The arithmetic logic unit (ALU) is an important part of central processing unit (CPU) as the execution unit. This paper presents a complete design of a new reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The proposed ALU based on a reversible low power control unit and small performance parameters full adder named double Peres gates. The presented ALU can produce the largest number (28) of arithmetic and logic functions and have the smallest number of quantum cost and delay compared with existing designs.

  20. Magnonic interferometric switch for multi-valued logic circuits

    Science.gov (United States)

    Balynsky, Michael; Kozhevnikov, Alexander; Khivintsev, Yuri; Bhowmick, Tonmoy; Gutierrez, David; Chiang, Howard; Dudko, Galina; Filimonov, Yuri; Liu, Guanxiong; Jiang, Chenglong; Balandin, Alexander A.; Lake, Roger; Khitun, Alexander

    2017-01-01

    We investigated a possible use of the magnonic interferometric switches in multi-valued logic circuits. The switch is a three-terminal device consisting of two spin channels where input, control, and output signals are spin waves. Signal modulation is achieved via the interference between the source and gate spin waves. We report experimental data on a micrometer scale prototype based on the Y3Fe2(FeO4)3 structure. The output characteristics are measured at different angles of the bias magnetic field. The On/Off ratio of the prototype exceeds 13 dB at room temperature. Experimental data are complemented by the theoretical analysis and the results of micro magnetic simulations showing spin wave propagation in a micrometer size magnetic junction. We also present the results of numerical modeling illustrating the operation of a nanometer-size switch consisting of just 20 spins in the source-drain channel. The utilization of spin wave interference as a switching mechanism makes it possible to build nanometer-scale logic gates, and minimize energy per operation, which is limited only by the noise margin. The utilization of phase in addition to amplitude for information encoding offers an innovative route towards multi-state logic circuits. We describe possible implementation of the three-value logic circuits based on the magnonic interferometric switches. The advantages and shortcomings inherent in interferometric switches are also discussed.

  1. Interconnected magnetic tunnel junctions for spin-logic applications

    Science.gov (United States)

    Manfrini, Mauricio; Vaysset, Adrien; Wan, Danny; Raymenants, Eline; Swerts, Johan; Rao, Siddharth; Zografos, Odysseas; Souriau, Laurent; Gavan, Khashayar Babaei; Rassoul, Nouredine; Radisic, Dunja; Cupak, Miroslav; Dehan, Morin; Sayan, Safak; Nikonov, Dmitri E.; Manipatruni, Sasikanth; Young, Ian A.; Mocuta, Dan; Radu, Iuliana P.

    2018-05-01

    With the rapid progress of spintronic devices, spin-logic concepts hold promises of energy-delay conscious computation for efficient logic gate operations. We report on the electrical characterization of domain walls in interconnected magnetic tunnel junctions. By means of spin-transfer torque effect, domains walls are produced at the common free layer and its propagation towards the output pillar sensed by tunneling magneto-resistance. Domain pinning conditions are studied quasi-statically showing a strong dependence on pillar size, ferromagnetic free layer width and inter-pillar distance. Addressing pinning conditions are detrimental for cascading and fan-out of domain walls across nodes, enabling the realization of domain-wall-based logic technology.

  2. Fast logic modules with programmed functions

    International Nuclear Information System (INIS)

    Zinov, V.G.; Selikov, A.V.

    1987-01-01

    Modern nuclear-physical experiment procedure requires automated control and adjustment of event selection and recording systems. Nanosecond programmed-control units realizing optional set of combinational logic functions are described. Programmed permanent storage device is the basis of one unit, and on-line storage device, preliminary provided with truth tables, is in the basis of the other units. The resolution time is 40 ns. By means of auxiliary unit the programmed logic devices with sequent storage elements (digital timer and pulse generator; multiple-phase generator; sequential digital controller) are realized. The units are performed in CAMAC standard, the modules size being 1M

  3. Logic circuits from zero forcing.

    Science.gov (United States)

    Burgarth, Daniel; Giovannetti, Vittorio; Hogben, Leslie; Severini, Simone; Young, Michael

    We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity. Moreover, in the light of applications of zero forcing in quantum mechanics, the link with Boolean functions may suggest a new directions in quantum control theory and in the study of engineered quantum spin systems. It is an open technical problem to verify whether there is a link between zero forcing and computation with contact circuits.

  4. Electronic logic circuits

    CERN Document Server

    Gibson, J

    2013-01-01

    Most branches of organizing utilize digital electronic systems. This book introduces the design of such systems using basic logic elements as the components. The material is presented in a straightforward manner suitable for students of electronic engineering and computer science. The book is also of use to engineers in related disciplines who require a clear introduction to logic circuits. This third edition has been revised to encompass the most recent advances in technology as well as the latest trends in components and notation. It includes a wide coverage of application specific integrate

  5. Flexible Proton-Gated Oxide Synaptic Transistors on Si Membrane.

    Science.gov (United States)

    Zhu, Li Qiang; Wan, Chang Jin; Gao, Ping Qi; Liu, Yang Hui; Xiao, Hui; Ye, Ji Chun; Wan, Qing

    2016-08-24

    Ion-conducting materials have received considerable attention for their applications in fuel cells, electrochemical devices, and sensors. Here, flexible indium zinc oxide (InZnO) synaptic transistors with multiple presynaptic inputs gated by proton-conducting phosphorosilicate glass-based electrolyte films are fabricated on ultrathin Si membranes. Transient characteristics of the proton gated InZnO synaptic transistors are investigated, indicating stable proton-gating behaviors. Short-term synaptic plasticities are mimicked on the proposed proton-gated synaptic transistors. Furthermore, synaptic integration regulations are mimicked on the proposed synaptic transistor networks. Spiking logic modulations are realized based on the transition between superlinear and sublinear synaptic integration. The multigates coupled flexible proton-gated oxide synaptic transistors may be interesting for neuroinspired platforms with sophisticated spatiotemporal information processing.

  6. Enzymatic logic calculation systems based on solid-state electrochemiluminescence and molecularly imprinted polymer film electrodes.

    Science.gov (United States)

    Lian, Wenjing; Liang, Jiying; Shen, Li; Jin, Yue; Liu, Hongyun

    2018-02-15

    The molecularly imprinted polymer (MIP) films were electropolymerized on the surface of Au electrodes with luminol and pyrrole (PY) as the two monomers and ampicillin (AM) as the template molecule. The electrochemiluminescence (ECL) intensity peak of polyluminol (PL) of the AM-free MIP films at 0.7V vs Ag/AgCl could be greatly enhanced by AM rebinding. In addition, the ECL signals of the MIP films could also be enhanced by the addition of glucose oxidase (GOD)/glucose and/or ferrocenedicarboxylic acid (Fc(COOH) 2 ) in the testing solution. Moreover, Fc(COOH) 2 exhibited cyclic voltammetric (CV) response at the AM-free MIP film electrodes. Based on these results, a binary 3-input/6-output biomolecular logic gate system was established with AM, GOD and Fc(COOH) 2 as inputs and the ECL responses at different levels and CV signal as outputs. Some functional non-Boolean logic devices such as an encoder, a decoder and a demultiplexer were also constructed on the same platform. Particularly, on the basis of the same system, a ternary AND logic gate was established. The present work combined MIP film electrodes, the solid-state ECL, and the enzymatic reaction together, and various types of biomolecular logic circuits and devices were developed, which opened a novel avenue to construct more complicated bio-logic gate systems. Copyright © 2017 Elsevier B.V. All rights reserved.

  7. Design Principles of A Sigma-delta Flux-gate Magnetometer

    Science.gov (United States)

    Magnes, W.; Valavanoglou, A.; Pierce, D.; Frank, A.; Schwingenschuh, K.

    A state-of-the-art flux-gate magnetometer is characterised by magnetic field resolution of several pT in a wide frequency range, low power consumption, low weight and high robustness. Therefore, flux-gate magnetometers are frequently used for ground-based Earth's field observation as well as for measurements aboard scientific space missions. But both traditional analogue and recently developed digital flux-gate magnetometers need low power and high-resolution analogue-to-digital converters for signal quan- tization. The disadvantage of such converters is the low radiation hardness. This fact has led to the idea of combining a traditional analogue flux-gate regulation circuit with that of a discretely realized sigma-delta converter in order to get a radiation hard and further miniaturized magnetometer. The name sigma-delta converter is derived from putting an integrator in front of a 1-bit delta modulator which forms the sigma-delta loop. It is followed by a digital decimation filter realized in a field-programmable gate array (FPGA). The flux-gate regulation and the sigma-delta loop are quite similar in the way of realizing the integrator and feedback circuit, which makes it easy to com- bine these two systems. The presented talk deals with the design principles and the results of a first bread board model.

  8. Field-Programmable Logic Devices with Optical Input Output

    Science.gov (United States)

    Szymanski, Ted H.; Saint-Laurent, Martin; Tyan, Victor; Au, Albert; Supmonchai, Boonchuay

    2000-02-01

    A field-programmable logic device (FPLD) with optical I O is described. FPLD s with optical I O can have their functionality specified in the field by means of downloading a control-bit stream and can be used in a wide range of applications, such as optical signal processing, optical image processing, and optical interconnects. Our device implements six state-of-the-art dynamically programmable logic arrays (PLA s) on a 2 mm 2 mm die. The devices were fabricated through the Lucent Technologies Advanced Research Projects Agency Consortium for Optical and Optoelectronic Technologies in Computing (Lucent ARPA COOP) workshop by use of 0.5- m complementary metal-oxide semiconductor self-electro-optic device technology and were delivered in 1998. All devices are fully functional: The electronic data paths have been verified at 200 MHz, and optical tests are pending. The device has been programmed to implement a two-stage optical switching network with six 4 4 crossbar switches, which can realize more than 190 10 6 unique programmable input output permutations. The same device scaled to a 2 cm 2 cm substrate could support as many as 4000 optical I O and 1 Tbit s of optical I O bandwidth and offer fully programmable digital functionality with approximately 110,000 programmable logic gates. The proposed optoelectronic FPLD is also ideally suited to realizing dense, statically reconfigurable crossbar switches. We describe an attractive application area for such devices: a rearrangeable three-stage optical switch for a wide-area-network backbone, switching 1000 traffic streams at the OC-48 data rate and supporting several terabits of traffic.

  9. Access control, security, and trust a logical approach

    CERN Document Server

    Chin, Shiu-Kai

    2010-01-01

    Access Control, Security, Trust, and Logic Deconstructing Access Control Decisions A Logical Approach to Access Control PRELIMINARIES A Language for Access ControlSets and Relations Syntax SemanticsReasoning about Access Control Logical RulesFormal Proofs and Theorems Soundness of Logical RulesBasic Concepts Reference Monitors Access Control Mechanisms: Tickets and Lists Authentication Security PoliciesConfidentiality, Integrity, and Availability Discretionary Security Policies Mandatory Security Policies Military Security Policies Commercial PoliciesDISTRIBUTED ACCESS CONTROL Digital Authenti

  10. The Logic of Digital Platform Disruption

    DEFF Research Database (Denmark)

    Kazan, Erol; Tan, Chee-Wee; Lim, Eric T. K.

    Digital platforms are disruptive IT artifacts, because they facilitate the quick release of innovative platform derivatives from third parties (e.g., apps). This study endeavours to unravel the disruptive potential, caused by distinct designs and configurations of digital platforms on market...... environments. We postulate that the disruptive potential of digital platforms is determined by the degree of alignment among the business, technology and platform profiles. Furthermore, we argue that the design and configuration of the aforementioned three elements dictates the extent to which open innovation...... is permitted. To shed light on the disruptive potential of digital platforms, we opted for payment platforms as our unit of analysis. Through interviews with experts and payment providers, we seek to gain an in-depth appreciation of how contemporary digital payment platforms are designed and configured...

  11. Small RNA-based feedforward loop with AND-gate logic regulates extrachromosomal DNA transfer in Salmonella.

    Science.gov (United States)

    Papenfort, Kai; Espinosa, Elena; Casadesús, Josep; Vogel, Jörg

    2015-08-25

    Horizontal gene transfer via plasmid conjugation is a major driving force in microbial evolution but constitutes a complex process that requires synchronization with the physiological state of the host bacteria. Although several host transcription factors are known to regulate plasmid-borne transfer genes, RNA-based regulatory circuits for host-plasmid communication remain unknown. We describe a posttranscriptional mechanism whereby the Hfq-dependent small RNA, RprA, inhibits transfer of pSLT, the virulence plasmid of Salmonella enterica. RprA employs two separate seed-pairing domains to activate the mRNAs of both the sigma-factor σ(S) and the RicI protein, a previously uncharacterized membrane protein here shown to inhibit conjugation. Transcription of ricI requires σ(S) and, together, RprA and σ(S) orchestrate a coherent feedforward loop with AND-gate logic to tightly control the activation of RicI synthesis. RicI interacts with the conjugation apparatus protein TraV and limits plasmid transfer under membrane-damaging conditions. To our knowledge, this study reports the first small RNA-controlled feedforward loop relying on posttranscriptional activation of two independent targets and an unexpected role of the conserved RprA small RNA in controlling extrachromosomal DNA transfer.

  12. Digital Device Architecture and the Safe Use of Flash Devices in Munitions

    Science.gov (United States)

    Katz, Richard B.; Flowers, David; Bergevin, Keith

    2017-01-01

    Flash technology is being utilized in fuzed munition applications and, based on the development of digital logic devices in the commercial world, usage of flash technology will increase. Digital devices of interest to designers include flash-based microcontrollers and field programmable gate arrays (FPGAs). Almost a decade ago, a study was undertaken to determine if flash-based microcontrollers could be safely used in fuzes and, if so, how should such devices be applied. The results were documented in the Technical Manual for the Use of Logic Devices in Safety Features. This paper will first review the Technical Manual and discuss the rationale behind the suggested architectures for microcontrollers and a brief review of the concern about data retention in flash cells. An architectural feature in the microcontroller under study will be discussed and its use will show how to screen for weak or failed cells during manufacture, storage, or immediately prior to use. As was done for microcontrollers a decade ago, architectures for a flash-based FPGA will be discussed, showing how it can be safely used in fuzes. Additionally, architectures for using non-volatile (including flash-based) storage will be discussed for SRAM-based FPGAs.

  13. Development of Testing Platform for Digital I and C System in Nuclear Power Plants

    Energy Technology Data Exchange (ETDEWEB)

    Park, G. Y.; Kim, Y. M.; Jeong, C. H. [Korea Institute of Nuclear Safety, Daejeon (Korea, Republic of)

    2013-10-15

    According to digitalization of the NPP (Nuclear Power Plant) I and C (Instrumentation and Control) system, cyber threats against I and C system are increased. Moreover, the complexity of I and C system are increased due to adopt the up-to-date technologies (i. e., smart sensor, wireless network, and Field Programmable Gate Array / Complex Programmable Logic Device) into NPP's I and C system. For example, new issues such as cyber threat are introduced from digitalized I and C systems and components to replace obsolete analog equipment in existing NPPs. Furthermore, use of wireless communication, FPGA/CPLD, and smart sensor could introduce new considerations such as Defense-in-Depth and Diversity. Therefore, the proof testing for digital I and C system is required to verify the adverse effect from use of up-to-date digital technologies and identify the criteria to resolve and mitigate (or prevent) the (possibility of) effects. The objective of this study is developing the Testing Platform for the proof testing. The digital I and C System Test Platform is implemented using test platform hardware, component software, and architectural design. The digital I and C testing platform includes the safety-related PLC and relevant ladder logics, Windows-based C++ codes for host PC. For software, there are seven spike models to confirm the each module's functionality and generate/monitor the signals to/from PLCs. For future work, digital I and C System Test Platform architecture will be implemented using spike models. And a set of acceptance test against cyber security, smart sensor, wireless network, and FPGA/CPLD will be conducted using digital I and C System Test Platform.

  14. Development of Testing Platform for Digital I and C System in Nuclear Power Plants

    International Nuclear Information System (INIS)

    Park, G. Y.; Kim, Y. M.; Jeong, C. H.

    2013-01-01

    According to digitalization of the NPP (Nuclear Power Plant) I and C (Instrumentation and Control) system, cyber threats against I and C system are increased. Moreover, the complexity of I and C system are increased due to adopt the up-to-date technologies (i. e., smart sensor, wireless network, and Field Programmable Gate Array / Complex Programmable Logic Device) into NPP's I and C system. For example, new issues such as cyber threat are introduced from digitalized I and C systems and components to replace obsolete analog equipment in existing NPPs. Furthermore, use of wireless communication, FPGA/CPLD, and smart sensor could introduce new considerations such as Defense-in-Depth and Diversity. Therefore, the proof testing for digital I and C system is required to verify the adverse effect from use of up-to-date digital technologies and identify the criteria to resolve and mitigate (or prevent) the (possibility of) effects. The objective of this study is developing the Testing Platform for the proof testing. The digital I and C System Test Platform is implemented using test platform hardware, component software, and architectural design. The digital I and C testing platform includes the safety-related PLC and relevant ladder logics, Windows-based C++ codes for host PC. For software, there are seven spike models to confirm the each module's functionality and generate/monitor the signals to/from PLCs. For future work, digital I and C System Test Platform architecture will be implemented using spike models. And a set of acceptance test against cyber security, smart sensor, wireless network, and FPGA/CPLD will be conducted using digital I and C System Test Platform

  15. Modal and polarization qubits in Ti:LiNbO3 photonic circuits for a universal quantum logic gate.

    Science.gov (United States)

    Saleh, Mohammed F; Di Giuseppe, Giovanni; Saleh, Bahaa E A; Teich, Malvin Carl

    2010-09-13

    Lithium niobate photonic circuits have the salutary property of permitting the generation, transmission, and processing of photons to be accommodated on a single chip. Compact photonic circuits such as these, with multiple components integrated on a single chip, are crucial for efficiently implementing quantum information processing schemes.We present a set of basic transformations that are useful for manipulating modal qubits in Ti:LiNbO(3) photonic quantum circuits. These include the mode analyzer, a device that separates the even and odd components of a state into two separate spatial paths; the mode rotator, which rotates the state by an angle in mode space; and modal Pauli spin operators that effect related operations. We also describe the design of a deterministic, two-qubit, single-photon, CNOT gate, a key element in certain sets of universal quantum logic gates. It is implemented as a Ti:LiNbO(3) photonic quantum circuit in which the polarization and mode number of a single photon serve as the control and target qubits, respectively. It is shown that the effects of dispersion in the CNOT circuit can be mitigated by augmenting it with an additional path. The performance of all of these components are confirmed by numerical simulations. The implementation of these transformations relies on selective and controllable power coupling among single- and two-mode waveguides, as well as the polarization sensitivity of the Pockels coefficients in LiNbO(3).

  16. Nonlinear dynamics based digital logic and circuits.

    Science.gov (United States)

    Kia, Behnam; Lindner, John F; Ditto, William L

    2015-01-01

    We discuss the role and importance of dynamics in the brain and biological neural networks and argue that dynamics is one of the main missing elements in conventional Boolean logic and circuits. We summarize a simple dynamics based computing method, and categorize different techniques that we have introduced to realize logic, functionality, and programmability. We discuss the role and importance of coupled dynamics in networks of biological excitable cells, and then review our simple coupled dynamics based method for computing. In this paper, for the first time, we show how dynamics can be used and programmed to implement computation in any given base, including but not limited to base two.

  17. Trapped-Ion Quantum Logic with Global Radiation Fields.

    Science.gov (United States)

    Weidt, S; Randall, J; Webster, S C; Lake, K; Webb, A E; Cohen, I; Navickas, T; Lekitsch, B; Retzker, A; Hensinger, W K

    2016-11-25

    Trapped ions are a promising tool for building a large-scale quantum computer. However, the number of required radiation fields for the realization of quantum gates in any proposed ion-based architecture scales with the number of ions within the quantum computer, posing a major obstacle when imagining a device with millions of ions. Here, we present a fundamentally different approach for trapped-ion quantum computing where this detrimental scaling vanishes. The method is based on individually controlled voltages applied to each logic gate location to facilitate the actual gate operation analogous to a traditional transistor architecture within a classical computer processor. To demonstrate the key principle of this approach we implement a versatile quantum gate method based on long-wavelength radiation and use this method to generate a maximally entangled state of two quantum engineered clock qubits with fidelity 0.985(12). This quantum gate also constitutes a simple-to-implement tool for quantum metrology, sensing, and simulation.

  18. Structured-gate organic field-effect transistors

    International Nuclear Information System (INIS)

    Aljada, Muhsen; Pandey, Ajay K; Velusamy, Marappan; Burn, Paul L; Meredith, Paul; Namdas, Ebinazar B

    2012-01-01

    We report the fabrication and electrical characteristics of structured-gate organic field-effect transistors consisting of a gate electrode patterned with three-dimensional pillars. The pillar gate electrode was over-coated with a gate dielectric (SiO 2 ) and solution processed organic semiconductors producing both unipolar p-type and bipolar behaviour. We show that this new structured-gate architecture delivers higher source-drain currents, higher gate capacitance per unit equivalent linear channel area, and enhanced charge injection (electrons and/or holes) versus the conventional planar structure in all modes of operation. For the bipolar field-effect transistor (FET) the maximum source-drain current enhancements in p- and n-channel mode were >600% and 28%, respectively, leading to p and n charge mobilities with the same order of magnitude. Thus, we have demonstrated that it is possible to use the FET architecture to manipulate and match carrier mobilities of material combinations where one charge carrier is normally dominant. Mobility matching is advantageous for creating organic logic circuit elements such as inverters and amplifiers. Hence, the method represents a facile and generic strategy for improving the performance of standard organic semiconductors as well as new materials and blends. (paper)

  19. Structured-gate organic field-effect transistors

    Science.gov (United States)

    Aljada, Muhsen; Pandey, Ajay K.; Velusamy, Marappan; Burn, Paul L.; Meredith, Paul; Namdas, Ebinazar B.

    2012-06-01

    We report the fabrication and electrical characteristics of structured-gate organic field-effect transistors consisting of a gate electrode patterned with three-dimensional pillars. The pillar gate electrode was over-coated with a gate dielectric (SiO2) and solution processed organic semiconductors producing both unipolar p-type and bipolar behaviour. We show that this new structured-gate architecture delivers higher source-drain currents, higher gate capacitance per unit equivalent linear channel area, and enhanced charge injection (electrons and/or holes) versus the conventional planar structure in all modes of operation. For the bipolar field-effect transistor (FET) the maximum source-drain current enhancements in p- and n-channel mode were >600% and 28%, respectively, leading to p and n charge mobilities with the same order of magnitude. Thus, we have demonstrated that it is possible to use the FET architecture to manipulate and match carrier mobilities of material combinations where one charge carrier is normally dominant. Mobility matching is advantageous for creating organic logic circuit elements such as inverters and amplifiers. Hence, the method represents a facile and generic strategy for improving the performance of standard organic semiconductors as well as new materials and blends.

  20. A molecular-sized optical logic circuit for digital modulation of a fluorescence signal

    Science.gov (United States)

    Nishimura, Takahiro; Tsuchida, Karin; Ogura, Yusuke; Tanida, Jun

    2018-03-01

    Fluorescence measurement allows simultaneous detection of multiple molecular species by using spectrally distinct fluorescence probes. However, due to the broad spectra of fluorescence emission, the multiplicity of fluorescence measurement is generally limited. To overcome this limitation, we propose a method to digitally modulate fluorescence output signals with a molecular-sized optical logic circuit by using optical control of fluorescence resonance energy transfer (FRET). The circuit receives a set of optical inputs represented with different light wavelengths, and then it switches high and low fluorescence intensity from a reporting molecule according to the result of the logic operation. By using combinational optical inputs in readout of fluorescence signals, the number of biomolecular species that can be identified is increased. To implement the FRET-based circuits, we designed two types of basic elements, YES and NOT switches. An YES switch produces a high-level output intensity when receiving a designated light wavelength input and a low-level intensity without the light irradiation. A NOT switch operates inversely to the YES switch. In experiments, we investigated the operation of the YES and NOT switches that receive a 532-nm light input and modulate the fluorescence intensity of Alexa Fluor 488. The experimental result demonstrates that the switches can modulate fluorescence signals according to the optical input.

  1. Real time event selection and flash analog-to-digital converters

    International Nuclear Information System (INIS)

    Imori, Masatosi

    1983-01-01

    In high-energy particle experiments, high-speed analog logic is employed to select events on a real-time basis. Flash analog-to-digital converters replace the high-speed analog logic with digital logic. The digital logic gives great flexibility to the scheme for real-time event selection. This paper proposes the use of flash A/D converters for the logic used to obtain the total sum of the energy deposited in individual counters in a shower detector. (author)

  2. A digital optical phase-locked loop for diode lasers based on field programmable gate array

    Science.gov (United States)

    Xu, Zhouxiang; Zhang, Xian; Huang, Kaikai; Lu, Xuanhui

    2012-09-01

    We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat note line width below 1 Hz, residual mean-square phase error of 0.14 rad2 and transition time of 100 μs under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.

  3. Fuzzy Logic Controller Design for Intelligent Robots

    Directory of Open Access Journals (Sweden)

    Ching-Han Chen

    2017-01-01

    Full Text Available This paper presents a fuzzy logic controller by which a robot can imitate biological behaviors such as avoiding obstacles or following walls. The proposed structure is implemented by integrating multiple ultrasonic sensors into a robot to collect data from a real-world environment. The decisions that govern the robot’s behavior and autopilot navigation are driven by a field programmable gate array- (FPGA- based fuzzy logic controller. The validity of the proposed controller was demonstrated by simulating three real-world scenarios to test the bionic behavior of a custom-built robot. The results revealed satisfactorily intelligent performance of the proposed fuzzy logic controller. The controller enabled the robot to demonstrate intelligent behaviors in complex environments. Furthermore, the robot’s bionic functions satisfied its design objectives.

  4. Monolithically integrated enhancement/depletion-mode AlGaN/GaN HEMT D flip-flop using fluorine plasma treatment

    International Nuclear Information System (INIS)

    Xie Yuanbin; Quan Si; Ma Xiaohua; Zhang Jincheng; Li Qingmin; Hao Yue

    2011-01-01

    Depletion-mode and enhancement-mode AlGaN/GaN HEMTs using fluorine plasma treatment were integrated on one wafer. Direct-coupled FET logic circuits, such as an E/D HEMT inverter, NAND gate and D flip-flop, were fabricated on an AlGaN/GaN heterostructure. The D flip-flop and NAND gate are demonstrated in a GaN system for the first time. The dual-gate AlGaN/GaN E-HEMT substitutes two single-gate E-HEMTs for simplifying the NAND gate and shrinking the area, integrating with a conventional AlGaN/GaN D-HEMT and demonstrating a NAND gate. E/D-mode D flip-flop was fabricated by integrating the inverters and the NAND gate on the AlGaN/GaN heterostructure. At a supply voltage of 2 V, the E/D inverter shows an output logic swing of 1.7 V, a logic-low noise margin of 0.49 V and a logic-high noise margin of 0.83 V. The NAND gate and D flip-flop showed correct logic function demonstrating promising potential for GaN-based digital ICs. (semiconductor integrated circuits)

  5. Verilog HDL digital design and modeling

    CERN Document Server

    Cavanagh, Joseph

    2007-01-01

    PREFACE INTRODUCTION History of HDL Verilog HDL IEEE Standard Features Assertion Levels OVERVIEW Design Methodologies Modulo-16 Synchronous Counter Four-Bit Ripple Adder Modules and Ports Designing a Test Bench for Simulation Construct Definitions Introduction to Dataflow Modeling Two-Input Exclusive-OR Gate Four 2-Input AND Gates With Delay Introduction to Behavioral Modeling Three-Input OR Gate Four-Bit Adder Modulo-16 Synchronous Counter Introduction to Structural Modeling Sum-of-Products Implementation Full Adder Four-Bit Ripple Adder Introduction to Mixed-Design Modeling Full Adder Problems LANGUAGE ELEMENTS Comments Identifiers Keywords Bidirectional Gates Charge Storage Strengths CMOS Gates Combinational Logic Gates Continuous Assignment Data Types Module Declaration MOS Switches Multiple-Way Branching Named Ev...

  6. New efficient five-input majority gate for quantum-dot cellular automata

    International Nuclear Information System (INIS)

    Farazkish, Razieh; Navi, Keivan

    2012-01-01

    A novel fault-tolerant five-input majority gate for quantum-dot cellular automata is presented. Quantum-dot cellular automata (QCA) is an emerging technology which is considered to be presented in future computers. Two principle logic elements in QCA are “majority gate” and “inverter.” In this paper, we propose a new approach to the design of fault-tolerant five-input majority gate by considering two-dimensional arrays of QCA cells. We analyze fault tolerance properties of such block five-input majority gate in terms of misalignment, missing, and dislocation cells. Some physical proofs are used for verifying five-input majority gate circuit layout and functionality. Our results clearly demonstrate that the redundant version of the block five-input majority gate is more robust than the standard style for this gate.

  7. Design improvement of FPGA and CPU based digital circuit cards to solve timing issues

    International Nuclear Information System (INIS)

    Lee, Dongil; Lee, Jaeki; Lee, Kwang-Hyun

    2016-01-01

    The digital circuit cards installed at NPPs (Nuclear Power Plant) are mostly composed of a CPU (Central Processing Unit) and a PLD (Programmable Logic Device; these include a FPGA (Field Programmable Gate Array) and a CPLD (Complex Programmable Logic Device)). This type of structure is typical and is maintained using digital circuit cards. There are no big problems with this device as a structure. In particular, signal delay causes a lot of problems when various IC (Integrated Circuit) and several circuit cards are connected to the BUS of the backplane in the BUS design. This paper suggests a structure to improve the BUS signal timing problems in a circuit card consisting of CPU and FPGA. Nowadays, as the structure of circuit cards has become complex and mass data at high speed is communicated through the BUS, data integrity is the most important issue. The conventional design does not consider delay and the synchronicity of signal and this causes many problems in data processing. In order to solve these problems, it is important to isolate the BUS controller from the CPU and maintain constancy of the signal delay by using a PLD

  8. Design improvement of FPGA and CPU based digital circuit cards to solve timing issues

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Dongil; Lee, Jaeki; Lee, Kwang-Hyun [KHNP CRI, Daejeon (Korea, Republic of)

    2016-10-15

    The digital circuit cards installed at NPPs (Nuclear Power Plant) are mostly composed of a CPU (Central Processing Unit) and a PLD (Programmable Logic Device; these include a FPGA (Field Programmable Gate Array) and a CPLD (Complex Programmable Logic Device)). This type of structure is typical and is maintained using digital circuit cards. There are no big problems with this device as a structure. In particular, signal delay causes a lot of problems when various IC (Integrated Circuit) and several circuit cards are connected to the BUS of the backplane in the BUS design. This paper suggests a structure to improve the BUS signal timing problems in a circuit card consisting of CPU and FPGA. Nowadays, as the structure of circuit cards has become complex and mass data at high speed is communicated through the BUS, data integrity is the most important issue. The conventional design does not consider delay and the synchronicity of signal and this causes many problems in data processing. In order to solve these problems, it is important to isolate the BUS controller from the CPU and maintain constancy of the signal delay by using a PLD.

  9. Implementation of quantum logic gates via Stark-tuned Förster resonance in Rydberg atoms

    Science.gov (United States)

    Huang, Xi-Rong; Hu, Chang-Sheng; Shen, Li-Tuo; Yang, Zhen-Biao; Wu, Huai-Zhi

    2018-02-01

    We present a scheme for implementation of controlled-Z and controlled-NOT gates via rapid adiabatic passage and Stark-tuned Förster resonance. By sweeping the Förster resonance once without passing through it and adiabatically tuning the angle-dependent Rydberg-Rydberg interaction of the dipolar nature, the system can be effectively described by a two-level system with the adiabatic theorem. The single adiabatic passage leads to a gate fidelity as high as 0.999 and a greatly reduced gate operation time. We investigate the scheme by considering an actual atomic level configuration with rubidium atoms, where the fidelity of the controlled-Z gate is still higher than 0.99 under the influence of the Zeeman effect.

  10. A digital optical phase-locked loop for diode lasers based on field programmable gate array

    Energy Technology Data Exchange (ETDEWEB)

    Xu Zhouxiang; Zhang Xian; Huang Kaikai; Lu Xuanhui [Physics Department, Zhejiang University, Hangzhou, 310027 (China)

    2012-09-15

    We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat note line width below 1 Hz, residual mean-square phase error of 0.14 rad{sup 2} and transition time of 100 {mu}s under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.

  11. High speed all optical logic gates based on quantum dot semiconductor optical amplifiers.

    Science.gov (United States)

    Ma, Shaozhen; Chen, Zhe; Sun, Hongzhi; Dutta, Niloy K

    2010-03-29

    A scheme to realize all-optical Boolean logic functions AND, XOR and NOT using semiconductor optical amplifiers with quantum-dot active layers is studied. nonlinear dynamics including carrier heating and spectral hole-burning are taken into account together with the rate equations scheme. Results show with QD excited state and wetting layer serving as dual-reservoir of carriers, as well as the ultra fast carrier relaxation of the QD device, this scheme is suitable for high speed Boolean logic operations. Logic operation can be carried out up to speed of 250 Gb/s.

  12. Digital design and computer architecture

    CERN Document Server

    Harris, David

    2010-01-01

    Digital Design and Computer Architecture is designed for courses that combine digital logic design with computer organization/architecture or that teach these subjects as a two-course sequence. Digital Design and Computer Architecture begins with a modern approach by rigorously covering the fundamentals of digital logic design and then introducing Hardware Description Languages (HDLs). Featuring examples of the two most widely-used HDLs, VHDL and Verilog, the first half of the text prepares the reader for what follows in the second: the design of a MIPS Processor. By the end of D

  13. Reversible arithmetic logic unit for quantum arithmetic

    DEFF Research Database (Denmark)

    Thomsen, Michael Kirkedal; Glück, Robert; Axelsen, Holger Bock

    2010-01-01

    This communication presents the complete design of a reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The presented ALU is garbage free and uses reversible updates to combine the standard reversible arithmetic...... and logical operations in one unit. Combined with a suitable control unit, the ALU permits the construction of an r-Turing complete computing device. The garbage-free ALU developed in this communication requires only 6n elementary reversible gates for five basic arithmetic-logical operations on two n......-bit operands and does not use ancillae. This remarkable low resource consumption was achieved by generalizing the V-shape design first introduced for quantum ripple-carry adders and nesting multiple V-shapes in a novel integrated design. This communication shows that the realization of an efficient reversible...

  14. Quantum Logic Networks for Probabilistic and Controlled Teleportation of Unknown Quantum States

    Institute of Scientific and Technical Information of China (English)

    GAO Ting

    2004-01-01

    We present simplification schemes for probabilistic and controlled teleportation of the unknown quantum states of both one particle and two particles and construct efficient quantum logic networks for implementing the new schemes by means of the primitive operations consisting of single-qubit gates, two-qubit controlled-not gates, Von Neumann measurement, and classically controlled operations. In these schemes the teleportation are not always successful but with certain probability.

  15. Applications of field-programmable gate arrays in scientific research

    CERN Document Server

    Sadrozinski, Hartmut F W

    2011-01-01

    Focusing on resource awareness in field-programmable gate array (FPGA) design, Applications of Field-Programmable Gate Arrays in Scientific Research covers the principle of FPGAs and their functionality. It explores a host of applications, ranging from small one-chip laboratory systems to large-scale applications in ""big science."" The book first describes various FPGA resources, including logic elements, RAM, multipliers, microprocessors, and content-addressable memory. It then presents principles and methods for controlling resources, such as process sequencing, location constraints, and in

  16. Nanowire NMOS Logic Inverter Characterization.

    Science.gov (United States)

    Hashim, Yasir

    2016-06-01

    This study is the first to demonstrate characteristics optimization of nanowire N-Channel Metal Oxide Semiconductor (NW-MOS) logic inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. A computer-based model used to produce static characteristics of NW-NMOS logic inverter. In this research two circuit configuration of NW-NMOS inverter was studied, in first NW-NMOS circuit, the noise margin for (low input-high output) condition was very low. For second NMOS circuit gives excellent noise margins, and results indicate that optimization depends on applied voltage to the inverter. Increasing gate to source voltage with (2/1) nanowires ratio results better noise margins. Increasing of applied DC load transistor voltage tends to increasing in decreasing noise margins; decreasing this voltage will improve noise margins significantly.

  17. Timed Safety Automata and Logic Conformance

    National Research Council Canada - National Science Library

    Young, Frank

    1999-01-01

    Timed Logic Conformance (TLC) is used to verify the behavioral and timing properties of detailed digital circuits against abstract circuit specifications when both are modeled as Timed Safety Automata (TSA...

  18. Hybrid quantum logic and a test of Bell's inequality using two different atomic isotopes.

    Science.gov (United States)

    Ballance, C J; Schäfer, V M; Home, J P; Szwer, D J; Webster, S C; Allcock, D T C; Linke, N M; Harty, T P; Aude Craik, D P L; Stacey, D N; Steane, A M; Lucas, D M

    2015-12-17

    Entanglement is one of the most fundamental properties of quantum mechanics, and is the key resource for quantum information processing (QIP). Bipartite entangled states of identical particles have been generated and studied in several experiments, and post-selected or heralded entangled states involving pairs of photons, single photons and single atoms, or different nuclei in the solid state, have also been produced. Here we use a deterministic quantum logic gate to generate a 'hybrid' entangled state of two trapped-ion qubits held in different isotopes of calcium, perform full tomography of the state produced, and make a test of Bell's inequality with non-identical atoms. We use a laser-driven two-qubit gate, whose mechanism is insensitive to the qubits' energy splittings, to produce a maximally entangled state of one (40)Ca(+) qubit and one (43)Ca(+) qubit, held 3.5 micrometres apart in the same ion trap, with 99.8 ± 0.6 per cent fidelity. We test the CHSH (Clauser-Horne-Shimony-Holt) version of Bell's inequality for this novel entangled state and find that it is violated by 15 standard deviations; in this test, we close the detection loophole but not the locality loophole. Mixed-species quantum logic is a powerful technique for the construction of a quantum computer based on trapped ions, as it allows protection of memory qubits while other qubits undergo logic operations or are used as photonic interfaces to other processing units. The entangling gate mechanism used here can also be applied to qubits stored in different atomic elements; this would allow both memory and logic gate errors caused by photon scattering to be reduced below the levels required for fault-tolerant quantum error correction, which is an essential prerequisite for general-purpose quantum computing.

  19. Two-step digit-set-restricted modified signed-digit addition-subtraction algorithm and its optoelectronic implementation.

    Science.gov (United States)

    Qian, F; Li, G; Ruan, H; Jing, H; Liu, L

    1999-09-10

    A novel, to our knowledge, two-step digit-set-restricted modified signed-digit (MSD) addition-subtraction algorithm is proposed. With the introduction of the reference digits, the operand words are mapped into an intermediate carry word with all digits restricted to the set {1, 0} and an intermediate sum word with all digits restricted to the set {0, 1}, which can be summed to form the final result without carry generation. The operation can be performed in parallel by use of binary logic. An optical system that utilizes an electron-trapping device is suggested for accomplishing the required binary logic operations. By programming of the illumination of data arrays, any complex logic operations of multiple variables can be realized without additional temporal latency of the intermediate results. This technique has a high space-bandwidth product and signal-to-noise ratio. The main structure can be stacked to construct a compact optoelectronic MSD adder-subtracter.

  20. Adiabatic logic future trend and system level perspective

    CERN Document Server

    Teichmann, Philip

    2012-01-01

    Adiabatic logic is a potential successor for static CMOS circuit design when it comes to ultra-low-power energy consumption. Future development like the evolutionary shrinking of the minimum feature size as well as revolutionary novel transistor concepts will change the gate level savings gained by adiabatic logic. In addition, the impact of worsening degradation effects has to be considered in the design of adiabatic circuits. The impact of the technology trends on the figures of merit of adiabatic logic, energy saving potential and optimum operating frequency, are investigated, as well as degradation related issues. Adiabatic logic benefits from future devices, is not susceptible to Hot Carrier Injection, and shows less impact of Bias Temperature Instability than static CMOS circuits. Major interest also lies on the efficient generation of the applied power-clock signal. This oscillating power supply can be used to save energy in short idle times by disconnecting circuits. An efficient way to generate the p...

  1. The topologic information processing by the artificial intellingence systems for the logic tasks' solving

    Directory of Open Access Journals (Sweden)

    Demyokhin V. V.

    2008-04-01

    Full Text Available The new method of parallel logic gates realization is described. The implementation of the parallel logic for a binary patterns considered on the basis of the topological information processing, used also in recognizing of visual images of single-layer systems of artificial intelligence. The estimates of the main parameters of TIP devices indicate that their performance can reach 1016 operations / sec and the amount of the structural elements is much less than in the known opto-logic devices.

  2. P-channel differential multiple-time programmable memory cells by laterally coupled floating metal gate fin field-effect transistors

    Science.gov (United States)

    Wang, Tai-Min; Chien, Wei-Yu; Hsu, Chia-Ling; Lin, Chrong Jung; King, Ya-Chin

    2018-04-01

    In this paper, we present a new differential p-channel multiple-time programmable (MTP) memory cell that is fully compatible with advanced 16 nm CMOS fin field-effect transistors (FinFET) logic processes. This differential MTP cell stores complementary data in floating gates coupled by a slot contact structure, which make different read currents possible on a single cell. In nanoscale CMOS FinFET logic processes, the gate dielectric layer becomes too thin to retain charges inside floating gates for nonvolatile data storage. By using a differential architecture, the sensing window of the cell can be extended and maintained by an advanced blanket boost scheme. The charge retention problem in floating gate cells can be improved by periodic restoring lost charges when significant read window narrowing occurs. In addition to high programming efficiency, this p-channel MTP cells also exhibit good cycling endurance as well as disturbance immunity. The blanket boost scheme can remedy the charge loss problem under thin gate dielectrics.

  3. Diamond logic inverter with enhancement-mode metal-insulator-semiconductor field effect transistor

    Energy Technology Data Exchange (ETDEWEB)

    Liu, J. W., E-mail: liu.jiangwei@nims.go.jp [International Center for Young Scientists (ICYS), National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Liao, M. Y.; Imura, M. [Optical and Electronic Materials Unit, NIMS, 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Watanabe, E.; Oosato, H. [Nanofabrication Platform, NIMS, 1-2-1 Sengen, Tsukuba, Ibaraki 305-0047 (Japan); Koide, Y., E-mail: koide.yasuo@nims.go.jp [Optical and Electronic Materials Unit, NIMS, 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Nanofabrication Platform, NIMS, 1-2-1 Sengen, Tsukuba, Ibaraki 305-0047 (Japan); Center of Materials Research for Low Carbon Emission, NIMS, 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan)

    2014-08-25

    A diamond logic inverter is demonstrated using an enhancement-mode hydrogenated-diamond metal-insulator-semiconductor field effect transistor (MISFET) coupled with a load resistor. The gate insulator has a bilayer structure of a sputtering-deposited LaAlO{sub 3} layer and a thin atomic-layer-deposited Al{sub 2}O{sub 3} buffer layer. The source-drain current maximum, extrinsic transconductance, and threshold voltage of the MISFET are measured to be −40.7 mA·mm{sup −1}, 13.2 ± 0.1 mS·mm{sup −1}, and −3.1 ± 0.1 V, respectively. The logic inverters show distinct inversion (NOT-gate) characteristics for input voltages ranging from 4.0 to −10.0 V. With increasing the load resistance, the gain of the logic inverter increases from 5.6 to as large as 19.4. The pulse response against the high and low input voltages shows the inversion response with the low and high output voltages.

  4. Numerical Analysis of an All-optical Logic XOR gate based on an active MZ interferometer

    DEFF Research Database (Denmark)

    Nielsen, Mads Lønstrup; Mørk, Jesper; Fjelde, T.

    2002-01-01

    are investigated numerically for a Mach-Zehnder interferometer (MZI) based XOR gate. For bit-rates up to 40 Gb/s, the synchronization tolerance of a MZI XOR gate is determined by the pulse width for RZ format. For the NRZ format, the tolerance decreases as the rise/fall-time approaches the timeslot. The gate...

  5. Reliability concerns with logical constants in Xilinx FPGA designs

    Energy Technology Data Exchange (ETDEWEB)

    Quinn, Heather M [Los Alamos National Laboratory; Graham, Paul [Los Alamos National Laboratory; Morgan, Keith [Los Alamos National Laboratory; Ostler, Patrick [Los Alamos National Laboratory; Allen, Greg [JPL; Swift, Gary [XILINX; Tseng, Chen W [XILINX

    2009-01-01

    In Xilinx Field Programmable Gate Arrays logical constants, which ground unused inputs and provide constants for designs, are implemented in SEU-susceptible logic. In the past, these logical constants have been shown to cause the user circuit to output bad data and were not resetable through off-line rcconfiguration. In the more recent devices, logical constants are less problematic, though mitigation should still be considered for high reliability applications. In conclusion, we have presented a number of reliability concerns with logical constants in the Xilinx Virtex family. There are two main categories of logical constants: implicit and explicit logical constants. In all of the Virtex devices, the implicit logical constants are implemented using half latches, which in the most recent devices are several orders of magnitudes smaller than configuration bit cells. Explicit logical constants are implemented exclusively using constant LUTs in the Virtex-I and Virtex-II, and use a combination of constant LUTs and architectural posts to the ground plane in the Virtex-4. We have also presented mitigation methods and options for these devices. While SEUs in implicit and some types of explicit logical constants can cause data corrupt, the chance of failure from these components is now much smaller than it was in the Virtex-I device. Therefore, for many cases, mitigation might not be necessary, except under extremely high reliability situations.

  6. Axially modulated arch resonator for logic and memory applications

    KAUST Repository

    Hafiz, Md Abdullah Al

    2018-01-17

    We demonstrate reconfigurable logic and random access memory devices based on an axially modulated clamped-guided arch resonator. The device is electrostatically actuated and the motional signal is capacitively sensed, while the resonance frequency is modulated through an axial electrostatic force from the guided side of the microbeam. A multi-physics finite element model is used to verify the effectiveness of the axial modulation. We present two case studies: first, a reconfigurable two-input logic gate based on the linear resonance frequency modulation, and second, a memory element based on the hysteretic frequency response of the resonator working in the nonlinear regime. The energy consumptions of the device for both logic and memory operations are in the range of picojoules, promising for energy efficient alternative computing paradigm.

  7. Quantitative analysis of a fault tree with priority AND gates

    International Nuclear Information System (INIS)

    Yuge, T.; Yanagi, S.

    2008-01-01

    A method for calculating the exact top event probability of a fault tree with priority AND gates and repeated basic events is proposed when the minimal cut sets are given. A priority AND gate is an AND gate where the input events must occur in a prescribed order for the occurrence of the output event. It is known that the top event probability of such a dynamic fault tree is obtained by converting the tree into an equivalent Markov model. However, this method is not realistic for a complex system model because the number of states which should be considered in the Markov analysis increases explosively as the number of basic events increases. To overcome the shortcomings of the Markov model, we propose an alternative method to obtain the top event probability in this paper. We assume that the basic events occur independently, exponentially distributed, and the component whose failure corresponds to the occurrence of the basic event is non-repairable. First, we obtain the probability of occurrence of the output event of a single priority AND gate by Markov analysis. Then, the top event probability is given by a cut set approach and the inclusion-exclusion formula. An efficient procedure to obtain the probabilities corresponding to logical products in the inclusion-exclusion formula is proposed. The logical product which is composed of two or more priority AND gates having at least one common basic event as their inputs is transformed into the sum of disjoint events which are equivalent to a priority AND gate in the procedure. Numerical examples show that our method works well for complex systems

  8. Delay Insensitive Ternary CMOS Logic for Secure Hardware

    Directory of Open Access Journals (Sweden)

    Ravi S. P. Nair

    2015-09-01

    Full Text Available As digital circuit design continues to evolve due to progress of semiconductor processes well into the sub 100 nm range, clocked architectures face limitations in a number of cases where clockless asynchronous architectures generate less noise and produce less electro-magnetic interference (EMI. This paper develops the Delay-Insensitive Ternary Logic (DITL asynchronous design paradigm that combines design aspects of similar dual-rail asynchronous paradigms and Boolean logic to create a single wire per bit, three voltage signaling and logic scheme. DITL is compared with other delay insensitive paradigms, such as Pre-Charge Half-Buffers (PCHB and NULL Convention Logic (NCL on which it is based. An application of DITL is discussed in designing secure digital circuits resistant to side channel attacks based on measurement of timing, power, and EMI signatures. A Secure DITL Adder circuit is designed at the transistor level, and several variance parameters are measured to validate the efficiency of DITL in resisting side channel attacks. The DITL design methodology is then applied to design a secure 8051 ALU.

  9. K-maps: a vehicle to an optimal solution in combinational logic ...

    African Journals Online (AJOL)

    K-maps: a vehicle to an optimal solution in combinational logic design problems using digital multiplexers. ... Abstract. Application of Karnaugh maps (K-Maps) for the design of combinational logic circuits and sequential logic circuits is a subject that has been widely discussed. However, the use of K-Maps in the design of ...

  10. Solving the Ternary Quantum-Dot Cellular Automata Logic Gate Problem by Means of Adiabatic Switching

    Science.gov (United States)

    Pecar, Primoz; Mraz, Miha; Zimic, Nikolaj; Janez, Miha; Lebar Bajec, Iztok

    2008-06-01

    Quantum-dot cellular automata (QCA) are one of the most promising alternative platforms of the future. Recent years have witnessed the development of basic logic structures as well as more complex processing structures, however most in the realm of binary logic. On the grounds that future platforms should not disregard the advantages of multi-valued logic, Lebar Bajec et al. were the first to show that quantum-dot cellular automata can be used for the implementation of ternary logic as well. In their study the ternary AND and OR logic functions proved to be the most troublesome primitive to implement. This research presents a revised solution that is based on adiabatic switching.

  11. One electron-based smallest flexible logic cell

    Science.gov (United States)

    Kim, S. J.; Lee, J. J.; Kang, H. J.; Choi, J. B.; Yu, Y.-S.; Takahashi, Y.; Hasko, D. G.

    2012-10-01

    A one electron-based operating half-adder, the smallest arithmetic block, has been implemented on silicon-on-insulator structure whose basic element is a nanoscale single-electron transistor (SET) with two symmetrical side-wall gates. Grayscale contour plots of the resulting cell output voltages exhibit the Coulomb blockade-induced periodic alternating high/low features. Their voltage transfer characteristics display typical Sum and Carry-Out functions for binary, multi-valued (MV), and binary-MV mixed input voltages. Moreover, the half-adder function converts into a subtraction mode by adjusting control gates of the SET element. This flexible multi-valued cell provides an arithmetic block for the SET MV logic family of high density integration, operating with ultra-low power.

  12. Sidewall gated double well quasi-one-dimensional resonant tunneling transistors

    Science.gov (United States)

    Kolagunta, V. R.; Janes, D. B.; Melloch, M. R.; Youtsey, C.

    1997-12-01

    We present gating characteristics of submicron vertical resonant tunneling transistors in double quantum well heterostructures. Current-voltage characteristics at room temperature and 77 K for devices with minimum feature widths of 0.9 and 0.7 μm are presented and discussed. The evolution of the I-V characteristics with increasing negative gate biases is related to the change in the lateral confinement, with a transition from a large area 2D to a quasi-1D. Even gating of multiple wells and lateral confinement effects observable at 77 K make these devices ideally suited for applications in multi-valued logic systems and low-dimensional structures.

  13. Peptide Logic Circuits Based on Chemoenzymatic Ligation for Programmable Cell Apoptosis.

    Science.gov (United States)

    Li, Yong; Sun, Sujuan; Fan, Lin; Hu, Shanfang; Huang, Yan; Zhang, Ke; Nie, Zhou; Yao, Shouzhou

    2017-11-20

    A novel and versatile peptide-based bio-logic system capable of regulating cell function is developed using sortase A (SrtA), a peptide ligation enzyme, as a generic processor. By modular peptide design, we demonstrate that mammalian cells apoptosis can be programmed by peptide-based logic operations, including binary and combination gates (AND, INHIBIT, OR, and AND-INHIBIT), and a complex sequential logic circuit (multi-input keypad lock). Moreover, a proof-of-concept peptide regulatory circuit was developed to analyze the expression profile of cell-secreted protein biomarkers and trigger cancer-cell-specific apoptosis. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. Study of Reversible Logic Synthesis with Application in SOC: A Review

    Science.gov (United States)

    Sharma, Chinmay; Pahuja, Hitesh; Dadhwal, Mandeep; Singh, Balwinder

    2017-08-01

    The prime concern in today’s SOC designs is the power dissipation which increases with technology scaling. The reversible logic possesses very high potential in reducing power dissipation in these designs. It finds its application in latest research fields such as DNA computing, quantum computing, ultra-low power CMOS design and nanotechnology. The reversible circuits can be easily designed using the conventional CMOS technology at a cost of a garbage output which maintains the reversibility. The purpose of this paper is to provide an overview of the developments that have occurred till date in this concept and how the new reversible logic gates are used to design the logic functions.

  15. Digital design basic concepts and principles

    CERN Document Server

    Karim, Mohammad A

    2007-01-01

    DATA TYPE AND REPRESENTATIONS Positional Number Systems Number System Conversion Negative Numbers Binary Arithmetic Unconventional Number System Binary Codes Error Detecting and Correcting Codes CAD System BOOLEAN ALGEBRA Logic Operations Logic Functions from Truth Tables Boolean Algebra MINIMIZATION OF LOGIC FUNCTIONS Karnaugh Map Incompletely Specified Functions in K-Map K-Maps for Product-of-sum Form of Functions Map-entered Variables Hazards Single-output Q-M Tabular Reduction Multiple-output Q-M Tabular reduction                               LOGIC FUNCTION IMPLEMENTATION Introduction Functionally Complete Operation Sets NAND-only and NOR-only Implementations Function Implementation Using XOR and XNOR Logic Circuit Implementation Using Gate Arrays Logic Function Implementation Using Multiplexers Logic Function Implementation Using Demultiplexers andecoders Logic Function Implementation Using ROM Logic Function Implementation Using PLD Logic Func...

  16. A Cu²⁺-selective fluorescent chemosensor based on BODIPY with two pyridine ligands and logic gate.

    Science.gov (United States)

    Huang, Liuqian; Zhang, Jing; Yu, Xiaoxiu; Ma, Yifan; Huang, Tianjiao; Shen, Xi; Qiu, Huayu; He, Xingxing; Yin, Shouchun

    2015-06-15

    A novel near-infrared fluorescent chemosensor based on BODIPY (Py-1) has been synthesized and characterized. Py-1 displays high selectivity and sensitivity for sensing Cu(2+) over other metal ions in acetonitrile. Upon addition of Cu(2+) ions, the maximum absorption band of Py-1 in CH3CN displays a red shift from 603 to 608 nm, which results in a visual color change from pink to blue. When Py-1 is excited at 600 nm in the presence of Cu(2+), the fluorescent emission intensity of Py-1 at 617 nm is quenched over 86%. Notably, the complex of Py-1-Cu(2+) can be restored with the introduction of EDTA or S(2-). Consequently, an IMPLICATION logic gate at molecular level operating in fluorescence mode with Cu(2+) and S(2-) as chemical inputs can be constructed. Finally, based on the reversible and reproducible system, a nanoscale sequential memory unit displaying "Writing-Reading-Erasing-Reading" functions can be integrated. Copyright © 2015 Elsevier B.V. All rights reserved.

  17. Event management for large scale event-driven digital hardware spiking neural networks.

    Science.gov (United States)

    Caron, Louis-Charles; D'Haene, Michiel; Mailhot, Frédéric; Schrauwen, Benjamin; Rouat, Jean

    2013-09-01

    The interest in brain-like computation has led to the design of a plethora of innovative neuromorphic systems. Individually, spiking neural networks (SNNs), event-driven simulation and digital hardware neuromorphic systems get a lot of attention. Despite the popularity of event-driven SNNs in software, very few digital hardware architectures are found. This is because existing hardware solutions for event management scale badly with the number of events. This paper introduces the structured heap queue, a pipelined digital hardware data structure, and demonstrates its suitability for event management. The structured heap queue scales gracefully with the number of events, allowing the efficient implementation of large scale digital hardware event-driven SNNs. The scaling is linear for memory, logarithmic for logic resources and constant for processing time. The use of the structured heap queue is demonstrated on a field-programmable gate array (FPGA) with an image segmentation experiment and a SNN of 65,536 neurons and 513,184 synapses. Events can be processed at the rate of 1 every 7 clock cycles and a 406×158 pixel image is segmented in 200 ms. Copyright © 2013 Elsevier Ltd. All rights reserved.

  18. A Fastbus module for trigger applications based on a digital signal processor and on programmable gate arrays

    International Nuclear Information System (INIS)

    Battaiotto, P.; Colavita, A.; Fratnik, F.; Lanceri, L.; Udine Univ.

    1991-01-01

    The new generation of DSP microprocessors based on RISC and Harvard-like architectures can conveniently take the place of specially built processors in fast trigger circuits for high-energy physics experiments. Presently available programmable gate arrays are well matched to them in speed and contribute to simplify the design of trigger circuits. Using these components, we designed and constructed a Fastbus module. We describe an application for the total-energy trigger of DELPHI, performing the readout of digitized calorimeter trigger data and some simple computations in less than 3 μs. (orig.)

  19. Design and demonstration of adiabatic quantum-flux-parametron logic circuits with superconductor magnetic shields

    International Nuclear Information System (INIS)

    Inoue, Kenta; Narama, Tatsuya; Yamanashi, Yuki; Yoshikawa, Nobuyuki; Takeuchi, Naoki

    2015-01-01

    Adiabatic quantum-flux-parametron (AQFP) logic is an energy-efficient superconductor logic with zero static power and very small dynamic power due to adiabatic switching operations. In order to build large-scale digital circuits, we built AQFP logic cells using superconductor magnetic shields, which are necessary in order to avoid unwanted magnetic couplings between the cells and excitation currents. In preliminary experimental tests, we confirmed that the unwanted coupling became negligibly small thanks to the superconductor shields. As a demonstration, we designed a four-to-one multiplexor and a 16-junction full adder using the shielded logic cells. In both circuits, we confirmed correct logic operations with wide operation margins of excitation currents. These results indicate that large-scale AQFP digital circuits can be realized using the shielded logic cells. (paper)

  20. Logical Qubit in a Linear Array of Semiconductor Quantum Dots

    Directory of Open Access Journals (Sweden)

    Cody Jones

    2018-06-01

    Full Text Available We design a logical qubit consisting of a linear array of quantum dots, we analyze error correction for this linear architecture, and we propose a sequence of experiments to demonstrate components of the logical qubit on near-term devices. To avoid the difficulty of fully controlling a two-dimensional array of dots, we adapt spin control and error correction to a one-dimensional line of silicon quantum dots. Control speed and efficiency are maintained via a scheme in which electron spin states are controlled globally using broadband microwave pulses for magnetic resonance, while two-qubit gates are provided by local electrical control of the exchange interaction between neighboring dots. Error correction with two-, three-, and four-qubit codes is adapted to a linear chain of qubits with nearest-neighbor gates. We estimate an error correction threshold of 10^{-4}. Furthermore, we describe a sequence of experiments to validate the methods on near-term devices starting from four coupled dots.

  1. Mathematical modelling of Bit-Level Architecture using Reciprocal Quantum Logic

    Science.gov (United States)

    Narendran, S.; Selvakumar, J.

    2018-04-01

    Efficiency of high-performance computing is on high demand with both speed and energy efficiency. Reciprocal Quantum Logic (RQL) is one of the technology which will produce high speed and zero static power dissipation. RQL uses AC power supply as input rather than DC input. RQL has three set of basic gates. Series of reciprocal transmission lines are placed in between each gate to avoid loss of power and to achieve high speed. Analytical model of Bit-Level Architecture are done through RQL. Major drawback of reciprocal Quantum Logic is area, because of lack in proper power supply. To achieve proper power supply we need to use splitters which will occupy large area. Distributed arithmetic uses vector- vector multiplication one is constant and other is signed variable and each word performs as a binary number, they rearranged and mixed to form distributed system. Distributed arithmetic is widely used in convolution and high performance computational devices.

  2. Digital/Commercial (In)visibility

    DEFF Research Database (Denmark)

    Leander, Anna

    2017-01-01

    an argument demonstrating specifically how digital and commercial logics characterize the aesthetic, circulatory, and infrastructuring practices re-producing the regime of (in)visibility. It shows that digital/commercial logics are at the heart of the combinatorial marketing of multiple, contradictory images......This article explores one aspect of digital politics, the politics of videos and more spe- cifically of DAESH recruitment videos. It proposes a practice theoretical approach to the politics of DAESH recruitment videos focused on the re-production of regimes of (in)visibility. The article develops...... on the internet. The theoretical and political cost of overlooking these digital and commercial characteristics of DAESH visibility practices are high. It perpetuates misconceptions of how the videos work and what their politics are and it reinforces the digital Orientalism/Occidentalism in which...

  3. Sequential logic analysis and synthesis

    CERN Document Server

    Cavanagh, Joseph

    2007-01-01

    Until now, there was no single resource for actual digital system design. Using both basic and advanced concepts, Sequential Logic: Analysis and Synthesis offers a thorough exposition of the analysis and synthesis of both synchronous and asynchronous sequential machines. With 25 years of experience in designing computing equipment, the author stresses the practical design of state machines. He clearly delineates each step of the structured and rigorous design principles that can be applied to practical applications. The book begins by reviewing the analysis of combinatorial logic and Boolean a

  4. FPGA implementation of a single-input fuzzy logic controller for boost converter with the absence of an external analog-to-digital converter

    DEFF Research Database (Denmark)

    Taeed, Fazel; Salam, Z.; Ayob, S.

    2012-01-01

    converter (ADC). Instead, a simple analog-to-digital conversion scheme is implemented using the FPGA itself. Due to the simplicity of the SIFLC algorithm and the absence of an external ADC, the overall implementation requires only 408 logic elements and five input-output pins of the FPGA.......) and applied on a 50-W boost converter. The SIFLC is compared to the proportional-integral controller; the simulation and practical results indicate that SIFLC exhibits excellent performance for step load and input reference changes. Another feature of this work is the absence of an external analog-to-digital...

  5. Engineered modular biomaterial logic gates for environmentally triggered therapeutic delivery

    Science.gov (United States)

    Badeau, Barry A.; Comerford, Michael P.; Arakawa, Christopher K.; Shadish, Jared A.; Deforest, Cole A.

    2018-03-01

    The successful transport of drug- and cell-based therapeutics to diseased sites represents a major barrier in the development of clinical therapies. Targeted delivery can be mediated through degradable biomaterial vehicles that utilize disease biomarkers to trigger payload release. Here, we report a modular chemical framework for imparting hydrogels with precise degradative responsiveness by using multiple environmental cues to trigger reactions that operate user-programmable Boolean logic. By specifying the molecular architecture and connectivity of orthogonal stimuli-labile moieties within material cross-linkers, we show selective control over gel dissolution and therapeutic delivery. To illustrate the versatility of this methodology, we synthesized 17 distinct stimuli-responsive materials that collectively yielded all possible YES/OR/AND logic outputs from input combinations involving enzyme, reductant and light. Using these hydrogels we demonstrate the first sequential and environmentally stimulated release of multiple cell lines in well-defined combinations from a material. We expect these platforms will find utility in several diverse fields including drug delivery, diagnostics and regenerative medicine.

  6. Rotation gate for a three-level superconducting quantum interference device qubit with resonant interaction

    International Nuclear Information System (INIS)

    Yang, C.-P.; Han Siyuan

    2006-01-01

    We show a way to realize an arbitrary rotation gate in a three-level superconducting quantum interference device (SQUID) qubit using resonant interaction. In this approach, the two logical states of the qubit are represented by the two lowest levels of the SQUID and a higher-energy intermediate level is utilized for the gate manipulation. By considering spontaneous decay from the intermediate level during the gate operation, we present a formula for calculating average fidelity over all possible initial states. Finally, based on realistic system parameters, we show that an arbitrary rotation gate can be achieved with a high fidelity in a SQUID

  7. Testing Superconductor Logic Integrated Circuits

    NARCIS (Netherlands)

    Arun, A.J.; Kerkhoff, Hans G.

    2005-01-01

    Superconductor logic has the potential of extremely low-power consumption and ultra-fast digital signal processing. Unfortunately, the obtained yield of the present processes is low and specific faults occur. This paper deals with fault-modelling, Design-for-Test structures, and ATPG for these

  8. Programmable Array Logic Design

    International Nuclear Information System (INIS)

    Demon Handoyo; Djen Djen Djainal

    2007-01-01

    Good digital circuit design that part of a complex system, often becoming a separate problem. To produce finishing design according to wanted performance is often given on to considerations which each other confuse, hence thereby analyse optimization become important in this case. To realization is made design logic program, the first are determined global diagram block, then are decided contents of these block diagram, and then determined its interconnection in the form of logic expression, continued with election of component. These steps are done to be obtained the design with low price, easy in its interconnection, minimal volume, low power and certainty god work. (author)

  9. Quantum logical states and operators for Josephson-like systems

    International Nuclear Information System (INIS)

    Faoro, Lara; Raffa, Francesco A; Rasetti, Mario

    2006-01-01

    We give a formal algebraic description of Josephson-type quantum dynamical systems, i.e., Hamiltonian systems with a cos θ-like potential term. The two-boson Heisenberg algebra plays for such systems the role that the h(1) algebra does for the harmonic oscillator. A single Josephson junction is selected as a representative of Josephson systems. We construct both logical states (codewords) and logical (gate) operators in the superconductive regime. The codewords are the even and odd coherent states of the two-boson algebra: they are shift-resistant and robust, due to squeezing. The logical operators acting on the qubit codewords are expressed in terms of operators in the enveloping of the two-boson algebra. Such a scheme appears to be relevant for quantum information applications. (letter to the editor)

  10. Digitized adiabatic quantum computing with a superconducting circuit.

    Science.gov (United States)

    Barends, R; Shabani, A; Lamata, L; Kelly, J; Mezzacapo, A; Las Heras, U; Babbush, R; Fowler, A G; Campbell, B; Chen, Yu; Chen, Z; Chiaro, B; Dunsworth, A; Jeffrey, E; Lucero, E; Megrant, A; Mutus, J Y; Neeley, M; Neill, C; O'Malley, P J J; Quintana, C; Roushan, P; Sank, D; Vainsencher, A; Wenner, J; White, T C; Solano, E; Neven, H; Martinis, John M

    2016-06-09

    Quantum mechanics can help to solve complex problems in physics and chemistry, provided they can be programmed in a physical device. In adiabatic quantum computing, a system is slowly evolved from the ground state of a simple initial Hamiltonian to a final Hamiltonian that encodes a computational problem. The appeal of this approach lies in the combination of simplicity and generality; in principle, any problem can be encoded. In practice, applications are restricted by limited connectivity, available interactions and noise. A complementary approach is digital quantum computing, which enables the construction of arbitrary interactions and is compatible with error correction, but uses quantum circuit algorithms that are problem-specific. Here we combine the advantages of both approaches by implementing digitized adiabatic quantum computing in a superconducting system. We tomographically probe the system during the digitized evolution and explore the scaling of errors with system size. We then let the full system find the solution to random instances of the one-dimensional Ising problem as well as problem Hamiltonians that involve more complex interactions. This digital quantum simulation of the adiabatic algorithm consists of up to nine qubits and up to 1,000 quantum logic gates. The demonstration of digitized adiabatic quantum computing in the solid state opens a path to synthesizing long-range correlations and solving complex computational problems. When combined with fault-tolerance, our approach becomes a general-purpose algorithm that is scalable.

  11. Implementing a Microcontroller Watchdog with a Field-Programmable Gate Array (FPGA)

    Science.gov (United States)

    Straka, Bartholomew

    2013-01-01

    Reliability is crucial to safety. Redundancy of important system components greatly enhances reliability and hence safety. Field-Programmable Gate Arrays (FPGAs) are useful for monitoring systems and handling the logic necessary to keep them running with minimal interruption when individual components fail. A complete microcontroller watchdog with logic for failure handling can be implemented in a hardware description language (HDL.). HDL-based designs are vendor-independent and can be used on many FPGAs with low overhead.

  12. Gate-Driven Pure Spin Current in Graphene

    Science.gov (United States)

    Lin, Xiaoyang; Su, Li; Si, Zhizhong; Zhang, Youguang; Bournel, Arnaud; Zhang, Yue; Klein, Jacques-Olivier; Fert, Albert; Zhao, Weisheng

    2017-09-01

    The manipulation of spin current is a promising solution for low-power devices beyond CMOS. However, conventional methods, such as spin-transfer torque or spin-orbit torque for magnetic tunnel junctions, suffer from large power consumption due to frequent spin-charge conversions. An important challenge is, thus, to realize long-distance transport of pure spin current, together with efficient manipulation. Here, the mechanism of gate-driven pure spin current in graphene is presented. Such a mechanism relies on the electrical gating of carrier-density-dependent conductivity and spin-diffusion length in graphene. The gate-driven feature is adopted to realize the pure spin-current demultiplexing operation, which enables gate-controllable distribution of the pure spin current into graphene branches. Compared with the Elliott-Yafet spin-relaxation mechanism, the D'yakonov-Perel spin-relaxation mechanism results in more appreciable demultiplexing performance. The feature of the pure spin-current demultiplexing operation will allow a number of logic functions to be cascaded without spin-charge conversions and open a route for future ultra-low-power devices.

  13. Development of digital safety system logic and control

    International Nuclear Information System (INIS)

    Nishikawa, H.; Sakamoto, H.

    1995-01-01

    Advanced-BWR (ABWR) uses total digital control and instrumentation (C and I) system. In particular, ABWR adopts a newly developed safety system using advanced digital technology. In the presentation the digital safety system design, manufacturing and factory validation test method are shortly overviewed. The digital safety system consists of micro-processor based digital controllers, data and information transmission by optical fibers and human-machine interface using color flat displays. This new developed safety system meet the nuclear safety requirements such as high reliability, independence of divisions, operability and maintainability. (2 refs., 4 figs., 1 tab.)

  14. Implementation of FPGA-Based Diverse Protection System

    International Nuclear Information System (INIS)

    Hwang, Soo Yun; Lee, Yoon Hee; Shon, Se Do; Baek, Seung Min

    2015-01-01

    Obsolete analog and digital hardware platforms in NPPs are commonly replaced with programmable logic controller (PLC) and distributed control system (DCS). Field programmable gate arrays (FPGAs) are highlighted as an alternative to obsolete hardware platforms. FPGAs are digital integrated circuits (ICs) that contain the configurable (programmable) blocks of logic along with configurable interconnections among these blocks. Designers can configure (program) such devices to perform a tremendous variety of tasks. FPGAs have been evolved from the technology of programmable logic device (PLD). Nowadays, they can contain millions of logic gates by nanotechnology and can be used to implement extremely large and complex functions that previously could be realized only using application specific integrated circuits (ASICs). This paper presents the implementation of an FPGA-based diverse protection system (DPS) which executes the protective functions in NPP when the protective functions of the plant protection system (PPS) fails

  15. Implementation of FPGA-Based Diverse Protection System

    Energy Technology Data Exchange (ETDEWEB)

    Hwang, Soo Yun; Lee, Yoon Hee; Shon, Se Do; Baek, Seung Min [KEPCO Engineering and Construction Company Inc., Daejeon (Korea, Republic of)

    2015-10-15

    Obsolete analog and digital hardware platforms in NPPs are commonly replaced with programmable logic controller (PLC) and distributed control system (DCS). Field programmable gate arrays (FPGAs) are highlighted as an alternative to obsolete hardware platforms. FPGAs are digital integrated circuits (ICs) that contain the configurable (programmable) blocks of logic along with configurable interconnections among these blocks. Designers can configure (program) such devices to perform a tremendous variety of tasks. FPGAs have been evolved from the technology of programmable logic device (PLD). Nowadays, they can contain millions of logic gates by nanotechnology and can be used to implement extremely large and complex functions that previously could be realized only using application specific integrated circuits (ASICs). This paper presents the implementation of an FPGA-based diverse protection system (DPS) which executes the protective functions in NPP when the protective functions of the plant protection system (PPS) fails.

  16. Axially Modulated Clamped-Guided Arch Resonator for Memory and Logic Applications

    KAUST Repository

    Hafiz, Md Abdullah Al; Tella, Sherif Adekunle; Alcheikh, Nouha; Fariborzi, Hossein; Younis, Mohammad I.

    2017-01-01

    We experimentally demonstrate memory and logic devices based on an axially modulated clamped-guided arch resonator. The device are electrostatically actuated and capacitively sensed, while the resonance frequency modulation is achieved through an axial electrostatic force from the guided side of the clamped-guided arch microbeam. We present two case studies: first, a dynamic memory based on the nonlinear frequency response of the resonator, and second, a reprogrammable two-input logic gate based on the linear frequency modulation of the resonator. These devices show energy cost per memory/logic operation in pJ, are fully compatible with CMOS fabrication processes, have the potential for on-chip system integration, and operate at room temperature.

  17. Axially Modulated Clamped-Guided Arch Resonator for Memory and Logic Applications

    KAUST Repository

    Hafiz, Md Abdullah Al

    2017-11-03

    We experimentally demonstrate memory and logic devices based on an axially modulated clamped-guided arch resonator. The device are electrostatically actuated and capacitively sensed, while the resonance frequency modulation is achieved through an axial electrostatic force from the guided side of the clamped-guided arch microbeam. We present two case studies: first, a dynamic memory based on the nonlinear frequency response of the resonator, and second, a reprogrammable two-input logic gate based on the linear frequency modulation of the resonator. These devices show energy cost per memory/logic operation in pJ, are fully compatible with CMOS fabrication processes, have the potential for on-chip system integration, and operate at room temperature.

  18. Evaluation of flux-based logic schemes for high-Tc applications

    International Nuclear Information System (INIS)

    Fleishman, J.; Feld, D.; Xiao, P.; Van Dazer, T.

    1991-01-01

    This paper presents analyses of three digital logic families that can be made using nonhysteretic Josephson junctions, potentially the only kind of Josephson device realizable with superconductors having high transition temperatures. These logic families utilize magnetic flux-transfer and are characterized by very low power dissipation. Rapid Single Flux Quantum (RSFQ) and Phase Mode logic are both based on pulse propagation. The Quantum Flux Parametron (QFP) logic family is based on current latching. Simulations of RSFQ, Phase-Mode, and QFP logic families using high-T c junction parameters are presented to demonstrate the compatibility of these logic families with the new perovskite superconductors. The operation of these logic families is analyzed and the advantages and disadvantages of each are discussed

  19. Fuzzy Logic vs. Neutrosophic Logic: Operations Logic

    Directory of Open Access Journals (Sweden)

    Salah Bouzina

    2016-12-01

    Full Text Available The goal of this research is first to show how different, thorough, widespread and effective are the operations logic of the neutrosophic logic compared to the fuzzy logic’s operations logical. The second aim is to observe how a fully new logic, the neutrosophic logic, is established starting by changing the previous logical perspective fuzzy logic, and by changing that, we mean changing changing the truth values from the truth and falsity degrees membership in fuzzy logic, to the truth, falsity and indeterminacy degrees membership in neutrosophic logic; and thirdly, to observe that there is no limit to the logical discoveries - we only change the principle, then the system changes completely.

  20. Logic circuits based on molecular spider systems.

    Science.gov (United States)

    Mo, Dandan; Lakin, Matthew R; Stefanovic, Darko

    2016-08-01

    Spatial locality brings the advantages of computation speed-up and sequence reuse to molecular computing. In particular, molecular walkers that undergo localized reactions are of interest for implementing logic computations at the nanoscale. We use molecular spider walkers to implement logic circuits. We develop an extended multi-spider model with a dynamic environment wherein signal transmission is triggered via localized reactions, and use this model to implement three basic gates (AND, OR, NOT) and a cascading mechanism. We develop an algorithm to automatically generate the layout of the circuit. We use a kinetic Monte Carlo algorithm to simulate circuit computations, and we analyze circuit complexity: our design scales linearly with formula size and has a logarithmic time complexity. Copyright © 2016 Elsevier Ireland Ltd. All rights reserved.

  1. Design of High Quality Chemical XOR Gates with Noise Reduction.

    Science.gov (United States)

    Wood, Mackenna L; Domanskyi, Sergii; Privman, Vladimir

    2017-07-05

    We describe a chemical XOR gate design that realizes gate-response function with filtering properties. Such gate-response function is flat (has small gradients) at and in the vicinity of all the four binary-input logic points, resulting in analog noise suppression. The gate functioning involves cross-reaction of the inputs represented by pairs of chemicals to produce a practically zero output when both are present and nearly equal. This cross-reaction processing step is also designed to result in filtering at low output intensities by canceling out the inputs if one of the latter has low intensity compared with the other. The remaining inputs, which were not reacted away, are processed to produce the output XOR signal by chemical steps that result in filtering at large output signal intensities. We analyze the tradeoff resulting from filtering, which involves loss of signal intensity. We also discuss practical aspects of realizations of such XOR gates. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  2. The Communication of Capital: Digital Media and the Logic of Acceleration

    Directory of Open Access Journals (Sweden)

    Vincent R. Manzerolle

    2012-05-01

    Full Text Available This paper argues that questions concerning the circulation of capital are central to the study of contemporary and future media under capitalism. Moreover, it argues that such questions have been central to Marx’s analysis of the reproduction of capital vis-à-vis the realization of value and the reduction of circulation time. Marx’s concepts of both the circuit and circulation of capital implies a theory of communication. Thus the purpose of our paper is to outline the logistical mechanisms that underlie a Marxist theory of media and communication and thereby foregrounding the role new media plays in reducing circulation time. We argue that the necessity of theorizing communication from a circuit and circulation-centric point of view stems from the emergence of a number of new technological phenomena that intensify, but sometimes undermine, the capitalist logic of acceleration. For the purposes of understanding the evolution of digital technologies, ostensibly employed to accelerate the circulation of capital—or put differently, to reduce circulation time—we need to pay attention to volume 2 of Capital, and key sections in the Grundrisse.

  3. Towards electromechanical computation: An alternative approach to realize complex logic circuits

    KAUST Repository

    Hafiz, Md Abdullah Al; Kosuru, Lakshmoji; Younis, Mohammad I.

    2016-01-01

    Electromechanical computing based on micro/nano resonators has recently attracted significant attention. However, full implementation of this technology has been hindered by the difficulty in realizing complex logic circuits. We report here an alternative approach to realize complex logic circuits based on multiple MEMS resonators. As case studies, we report the construction of a single-bit binary comparator, a single-bit 4-to-2 encoder, and parallel XOR/XNOR and AND/NOT logic gates. Toward this, several microresonators are electrically connected and their resonance frequencies are tuned through an electrothermal modulation scheme. The microresonators operating in the linear regime do not require large excitation forces, and work at room temperature and at modest air pressure. This study demonstrates that by reconfiguring the same basic building block, tunable resonator, several essential complex logic functions can be achieved.

  4. Towards electromechanical computation: An alternative approach to realize complex logic circuits

    KAUST Repository

    Hafiz, M. A. A.

    2016-08-18

    Electromechanical computing based on micro/nano resonators has recently attracted significant attention. However, full implementation of this technology has been hindered by the difficulty in realizing complex logic circuits. We report here an alternative approach to realize complex logic circuits based on multiple MEMS resonators. As case studies, we report the construction of a single-bit binary comparator, a single-bit 4-to-2 encoder, and parallel XOR/XNOR and AND/NOT logic gates. Toward this, several microresonators are electrically connected and their resonance frequencies are tuned through an electrothermal modulation scheme. The microresonators operating in the linear regime do not require large excitation forces, and work at room temperature and at modest air pressure. This study demonstrates that by reconfiguring the same basic building block, tunable resonator, several essential complex logic functions can be achieved.

  5. Polynomial-time solution of prime factorization and NP-complete problems with digital memcomputing machines

    Science.gov (United States)

    Traversa, Fabio L.; Di Ventra, Massimiliano

    2017-02-01

    We introduce a class of digital machines, we name Digital Memcomputing Machines, (DMMs) able to solve a wide range of problems including Non-deterministic Polynomial (NP) ones with polynomial resources (in time, space, and energy). An abstract DMM with this power must satisfy a set of compatible mathematical constraints underlying its practical realization. We prove this by making a connection with the dynamical systems theory. This leads us to a set of physical constraints for poly-resource resolvability. Once the mathematical requirements have been assessed, we propose a practical scheme to solve the above class of problems based on the novel concept of self-organizing logic gates and circuits (SOLCs). These are logic gates and circuits able to accept input signals from any terminal, without distinction between conventional input and output terminals. They can solve boolean problems by self-organizing into their solution. They can be fabricated either with circuit elements with memory (such as memristors) and/or standard MOS technology. Using tools of functional analysis, we prove mathematically the following constraints for the poly-resource resolvability: (i) SOLCs possess a global attractor; (ii) their only equilibrium points are the solutions of the problems to solve; (iii) the system converges exponentially fast to the solutions; (iv) the equilibrium convergence rate scales at most polynomially with input size. We finally provide arguments that periodic orbits and strange attractors cannot coexist with equilibria. As examples, we show how to solve the prime factorization and the search version of the NP-complete subset-sum problem. Since DMMs map integers into integers, they are robust against noise and hence scalable. We finally discuss the implications of the DMM realization through SOLCs to the NP = P question related to constraints of poly-resources resolvability.

  6. Digital circuit boards mach 1 GHz

    CERN Document Server

    Morrison, Ralph

    2012-01-01

    A unique, practical approach to the design of high-speed digital circuit boards The demand for ever-faster digital circuit designs is beginning to render the circuit theory used by engineers ineffective. Digital Circuit Boards presents an alternative to the circuit theory approach, emphasizing energy flow rather than just signal interconnection to explain logic circuit behavior. The book shows how treating design in terms of transmission lines will ensure that the logic will function, addressing both storage and movement of electrical energy on these lines. It cove

  7. Novel latch for adiabatic quantum-flux-parametron logic

    International Nuclear Information System (INIS)

    Takeuchi, Naoki; Yamanashi, Yuki; Yoshikawa, Nobuyuki; Ortlepp, Thomas

    2014-01-01

    We herein propose the quantum-flux-latch (QFL) as a novel latch for adiabatic quantum-flux-parametron (AQFP) logic. A QFL is very compact and compatible with AQFP logic gates and can be read out in one clock cycle. Simulation results revealed that the QFL operates at 5 GHz with wide parameter margins of more than ±22%. The calculated energy dissipation was only ∼0.1 aJ/bit, which yields a small energy delay product of 20 aJ·ps. We also designed shift registers using QFLs to demonstrate more complex circuits with QFLs. Finally, we experimentally demonstrated correct operations of the QFL and a 1-bit shift register (a D flip-flop)

  8. A dynamically reconfigurable logic cell: from artificial neural networks to quantum-dot cellular automata

    Science.gov (United States)

    Naqvi, Syed Rameez; Akram, Tallha; Iqbal, Saba; Haider, Sajjad Ali; Kamran, Muhammad; Muhammad, Nazeer

    2018-02-01

    Considering the lack of optimization support for Quantum-dot Cellular Automata, we propose a dynamically reconfigurable logic cell capable of implementing various logic operations by means of artificial neural networks. The cell can be reconfigured to any 2-input combinational logic gate by altering the strength of connections, called weights and biases. We demonstrate how these cells may appositely be organized to perform multi-bit arithmetic and logic operations. The proposed work is important in that it gives a standard implementation of an 8-bit arithmetic and logic unit for quantum-dot cellular automata with minimal area and latency overhead. We also compare the proposed design with a few existing arithmetic and logic units, and show that it is more area efficient than any equivalent available in literature. Furthermore, the design is adaptable to 16, 32, and 64 bit architectures.

  9. Recent Trends in Spintronics-Based Nanomagnetic Logic

    Science.gov (United States)

    Das, Jayita; Alam, Syed M.; Bhanja, Sanjukta

    2014-09-01

    With the growing concerns of standby power in sub-100-nm CMOS technologies, alternative computing techniques and memory technologies are explored. Spin transfer torque magnetoresistive RAM (STT-MRAM) is one such nonvolatile memory relying on magnetic tunnel junctions (MTJs) to store information. It uses spin transfer torque to write information and magnetoresistance to read information. In 2012, Everspin Technologies, Inc. commercialized the first 64Mbit Spin Torque MRAM. On the computing end, nanomagnetic logic (NML) is a promising technique with zero leakage and high data retention. In 2000, Cowburn and Welland first demonstrated its potential in logic and information propagation through magnetostatic interaction in a chain of single domain circular nanomagnetic dots of Supermalloy (Ni80Fe14Mo5X1, X is other metals). In 2006, Imre et al. demonstrated wires and majority gates followed by coplanar cross wire systems demonstration in 2010 by Pulecio et al. Since 2004 researchers have also investigated the potential of MTJs in logic. More recently with dipolar coupling between MTJs demonstrated in 2012, logic-in-memory architecture with STT-MRAM have been investigated. The architecture borrows the computing concept from NML and read and write style from MRAM. The architecture can switch its operation between logic and memory modes with clock as classifier. Further through logic partitioning between MTJ and CMOS plane, a significant performance boost has been observed in basic computing blocks within the architecture. In this work, we have explored the developments in NML, in MTJs and more recent developments in hybrid MTJ/CMOS logic-in-memory architecture and its unique logic partitioning capability.

  10. Design and implementation of double oscillator time-to-digital converter using SFQ logic circuits

    International Nuclear Information System (INIS)

    Nishigai, T.; Ito, M.; Yoshikawa, N.; Fujimaki, A.; Terai, H.; Yorozu, S.

    2005-01-01

    We have designed, fabricated and tested a time-to-digital converter (TDC) using SFQ logic circuits. The proposed TDC consists of two sets of ring oscillators and binary counters, and a coincidence detector (CD), which detects the coincidence of the arrival of two SFQ pulses from two ring oscillators. The advantage of the proposed TDC is its simple circuit structure with wide measurement range. The time resolution of the proposed TDC is limited by the resolution of the CD, which is about 10 ps because it is made by an NDRO cell in this study. The circuits are implemented using NEC 2.5 kA/cm 2 Nb standard process and the CONNECT cell library. We have demonstrated the measurement of the propagation delay of a Josephson transmission line by the TDC with the time resolution of about 10 ps

  11. Quantifying the impact of respiratory-gated 4D CT acquisition on thoracic image quality: A digital phantom study

    International Nuclear Information System (INIS)

    Bernatowicz, K.; Knopf, A.; Lomax, A.; Keall, P.; Kipritidis, J.; Mishra, P.

    2015-01-01

    Purpose: Prospective respiratory-gated 4D CT has been shown to reduce tumor image artifacts by up to 50% compared to conventional 4D CT. However, to date no studies have quantified the impact of gated 4D CT on normal lung tissue imaging, which is important in performing dose calculations based on accurate estimates of lung volume and structure. To determine the impact of gated 4D CT on thoracic image quality, the authors developed a novel simulation framework incorporating a realistic deformable digital phantom driven by patient tumor motion patterns. Based on this framework, the authors test the hypothesis that respiratory-gated 4D CT can significantly reduce lung imaging artifacts. Methods: Our simulation framework synchronizes the 4D extended cardiac torso (XCAT) phantom with tumor motion data in a quasi real-time fashion, allowing simulation of three 4D CT acquisition modes featuring different levels of respiratory feedback: (i) “conventional” 4D CT that uses a constant imaging and couch-shift frequency, (ii) “beam paused” 4D CT that interrupts imaging to avoid oversampling at a given couch position and respiratory phase, and (iii) “respiratory-gated” 4D CT that triggers acquisition only when the respiratory motion fulfills phase-specific displacement gating windows based on prescan breathing data. Our framework generates a set of ground truth comparators, representing the average XCAT anatomy during beam-on for each of ten respiratory phase bins. Based on this framework, the authors simulated conventional, beam-paused, and respiratory-gated 4D CT images using tumor motion patterns from seven lung cancer patients across 13 treatment fractions, with a simulated 5.5 cm 3 spherical lesion. Normal lung tissue image quality was quantified by comparing simulated and ground truth images in terms of overall mean square error (MSE) intensity difference, threshold-based lung volume error, and fractional false positive/false negative rates. Results: Averaged

  12. Quantifying the impact of respiratory-gated 4D CT acquisition on thoracic image quality: A digital phantom study

    Energy Technology Data Exchange (ETDEWEB)

    Bernatowicz, K., E-mail: kingab@student.ethz.ch; Knopf, A.; Lomax, A. [Center for Proton Therapy, Paul Scherrer Institute, Villigen PSI 5232, Switzerland and Department of Physics, ETH Zürich, Zürich 8092 (Switzerland); Keall, P.; Kipritidis, J., E-mail: john.kipritidis@sydney.edu.au [Radiation Physics Laboratory, Sydney Medical School, University of Sydney, Sydney, NSW 2006 (Australia); Mishra, P. [Brigham and Womens Hospital, Dana-Farber Cancer Institute and Harvard Medical School, Boston, Massachusetts 02115 (United States)

    2015-01-15

    Purpose: Prospective respiratory-gated 4D CT has been shown to reduce tumor image artifacts by up to 50% compared to conventional 4D CT. However, to date no studies have quantified the impact of gated 4D CT on normal lung tissue imaging, which is important in performing dose calculations based on accurate estimates of lung volume and structure. To determine the impact of gated 4D CT on thoracic image quality, the authors developed a novel simulation framework incorporating a realistic deformable digital phantom driven by patient tumor motion patterns. Based on this framework, the authors test the hypothesis that respiratory-gated 4D CT can significantly reduce lung imaging artifacts. Methods: Our simulation framework synchronizes the 4D extended cardiac torso (XCAT) phantom with tumor motion data in a quasi real-time fashion, allowing simulation of three 4D CT acquisition modes featuring different levels of respiratory feedback: (i) “conventional” 4D CT that uses a constant imaging and couch-shift frequency, (ii) “beam paused” 4D CT that interrupts imaging to avoid oversampling at a given couch position and respiratory phase, and (iii) “respiratory-gated” 4D CT that triggers acquisition only when the respiratory motion fulfills phase-specific displacement gating windows based on prescan breathing data. Our framework generates a set of ground truth comparators, representing the average XCAT anatomy during beam-on for each of ten respiratory phase bins. Based on this framework, the authors simulated conventional, beam-paused, and respiratory-gated 4D CT images using tumor motion patterns from seven lung cancer patients across 13 treatment fractions, with a simulated 5.5 cm{sup 3} spherical lesion. Normal lung tissue image quality was quantified by comparing simulated and ground truth images in terms of overall mean square error (MSE) intensity difference, threshold-based lung volume error, and fractional false positive/false negative rates. Results

  13. Synthesizing genetic sequential logic circuit with clock pulse generator.

    Science.gov (United States)

    Chuang, Chia-Hua; Lin, Chun-Liang

    2014-05-28

    Rhythmic clock widely occurs in biological systems which controls several aspects of cell physiology. For the different cell types, it is supplied with various rhythmic frequencies. How to synthesize a specific clock signal is a preliminary but a necessary step to further development of a biological computer in the future. This paper presents a genetic sequential logic circuit with a clock pulse generator based on a synthesized genetic oscillator, which generates a consecutive clock signal whose frequency is an inverse integer multiple to that of the genetic oscillator. An analogous electronic waveform-shaping circuit is constructed by a series of genetic buffers to shape logic high/low levels of an oscillation input in a basic sinusoidal cycle and generate a pulse-width-modulated (PWM) output with various duty cycles. By controlling the threshold level of the genetic buffer, a genetic clock pulse signal with its frequency consistent to the genetic oscillator is synthesized. A synchronous genetic counter circuit based on the topology of the digital sequential logic circuit is triggered by the clock pulse to synthesize the clock signal with an inverse multiple frequency to the genetic oscillator. The function acts like a frequency divider in electronic circuits which plays a key role in the sequential logic circuit with specific operational frequency. A cascaded genetic logic circuit generating clock pulse signals is proposed. Based on analogous implement of digital sequential logic circuits, genetic sequential logic circuits can be constructed by the proposed approach to generate various clock signals from an oscillation signal.

  14. Archive Design Based on Planets Inspired Logical Object Model

    DEFF Research Database (Denmark)

    Zierau, Eld; Johansen, Anders

    2008-01-01

    We describe a proposal for a logical data model based on preliminary work the Planets project In OAIS terms the main areas discussed are related to the introduction of a logical data model for representing the past, present and future versions of the digital object associated with the Archival St...... Storage Package for the publications deposited by our client repositories....

  15. Photon-Mediated Quantum Gate between Two Neutral Atoms in an Optical Cavity

    Science.gov (United States)

    Welte, Stephan; Hacker, Bastian; Daiss, Severin; Ritter, Stephan; Rempe, Gerhard

    2018-02-01

    Quantum logic gates are fundamental building blocks of quantum computers. Their integration into quantum networks requires strong qubit coupling to network channels, as can be realized with neutral atoms and optical photons in cavity quantum electrodynamics. Here we demonstrate that the long-range interaction mediated by a flying photon performs a gate between two stationary atoms inside an optical cavity from which the photon is reflected. This single step executes the gate in 2 μ s . We show an entangling operation between the two atoms by generating a Bell state with 76(2)% fidelity. The gate also operates as a cnot. We demonstrate 74.1(1.6)% overlap between the observed and the ideal gate output, limited by the state preparation fidelity of 80.2(0.8)%. As the atoms are efficiently connected to a photonic channel, our gate paves the way towards quantum networking with multiqubit nodes and the distribution of entanglement in repeater-based long-distance quantum networks.

  16. Photon-Mediated Quantum Gate between Two Neutral Atoms in an Optical Cavity

    Directory of Open Access Journals (Sweden)

    Stephan Welte

    2018-02-01

    Full Text Available Quantum logic gates are fundamental building blocks of quantum computers. Their integration into quantum networks requires strong qubit coupling to network channels, as can be realized with neutral atoms and optical photons in cavity quantum electrodynamics. Here we demonstrate that the long-range interaction mediated by a flying photon performs a gate between two stationary atoms inside an optical cavity from which the photon is reflected. This single step executes the gate in 2  μs. We show an entangling operation between the two atoms by generating a Bell state with 76(2% fidelity. The gate also operates as a cnot. We demonstrate 74.1(1.6% overlap between the observed and the ideal gate output, limited by the state preparation fidelity of 80.2(0.8%. As the atoms are efficiently connected to a photonic channel, our gate paves the way towards quantum networking with multiqubit nodes and the distribution of entanglement in repeater-based long-distance quantum networks.

  17. Interferometric architectures based All-Optical logic design methods and their implementations

    Science.gov (United States)

    Singh, Karamdeep; Kaur, Gurmeet

    2015-06-01

    All-Optical Signal Processing is an emerging technology which can avoid costly Optical-electronic-optical (O-E-O) conversions which are usually compulsory in traditional Electronic Signal Processing systems, thus greatly enhancing operating bit rate with some added advantages such as electro-magnetic interference immunity and low power consumption etc. In order to implement complex signal processing tasks All-Optical logic gates are required as backbone elements. This review describes the advances in the field of All-Optical logic design methods based on interferometric architectures such as Mach-Zehnder Interferometer (MZI), Sagnac Interferometers and Ultrafast Non-Linear Interferometer (UNI). All-Optical logic implementations for realization of arithmetic and signal processing applications based on each interferometric arrangement are also presented in a categorized manner.

  18. Polymer-electrolyte-gated nanowire synaptic transistors for neuromorphic applications

    Science.gov (United States)

    Zou, Can; Sun, Jia; Gou, Guangyang; Kong, Ling-An; Qian, Chuan; Dai, Guozhang; Yang, Junliang; Guo, Guang-hua

    2017-09-01

    Polymer-electrolytes are formed by dissolving a salt in polymer instead of water, the conducting mechanism involves the segmental motion-assisted diffusion of ion in the polymer matrix. Here, we report on the fabrication of tin oxide (SnO2) nanowire synaptic transistors using polymer-electrolyte gating. A thin layer of poly(ethylene oxide) and lithium perchlorate (PEO/LiClO4) was deposited on top of the devices, which was used to boost device performances. A voltage spike applied on the in-plane gate attracts ions toward the polymer-electrolyte/SnO2 nanowire interface and the ions are gradually returned after the pulse is removed, which can induce a dynamic excitatory postsynaptic current in the nanowire channel. The SnO2 synaptic transistors exhibit the behavior of short-term plasticity like the paired-pulse facilitation and self-adaptation, which is related to the electric double-effect regulation. In addition, the synaptic logic functions and the logical function transformation are also discussed. Such single SnO2 nanowire-based synaptic transistors are of great importance for future neuromorphic devices.

  19. Implementation of digital equality comparator circuit on memristive memory crossbar array using material implication logic

    Science.gov (United States)

    Haron, Adib; Mahdzair, Fazren; Luqman, Anas; Osman, Nazmie; Junid, Syed Abdul Mutalib Al

    2018-03-01

    One of the most significant constraints of Von Neumann architecture is the limited bandwidth between memory and processor. The cost to move data back and forth between memory and processor is considerably higher than the computation in the processor itself. This architecture significantly impacts the Big Data and data-intensive application such as DNA analysis comparison which spend most of the processing time to move data. Recently, the in-memory processing concept was proposed, which is based on the capability to perform the logic operation on the physical memory structure using a crossbar topology and non-volatile resistive-switching memristor technology. This paper proposes a scheme to map digital equality comparator circuit on memristive memory crossbar array. The 2-bit, 4-bit, 8-bit, 16-bit, 32-bit, and 64-bit of equality comparator circuit are mapped on memristive memory crossbar array by using material implication logic in a sequential and parallel method. The simulation results show that, for the 64-bit word size, the parallel mapping exhibits 2.8× better performance in total execution time than sequential mapping but has a trade-off in terms of energy consumption and area utilization. Meanwhile, the total crossbar area can be reduced by 1.2× for sequential mapping and 1.5× for parallel mapping both by using the overlapping technique.

  20. Fast digitization and digital receiver technology

    International Nuclear Information System (INIS)

    Kimball, Ralph C.

    2002-01-01

    The potentially lucrative wireless market has led to technological advances in mixed signal devices such as high speed, high resolution A/D and D/A converters. This same market has also driven the development of high performance multi-channel digital receiver and digital transmitter ICs. Similarly, advances in semiconductor processes, coupled with the need for reduced time-to-market, has led to the development of large, enhanced performance, in-circuit programmable logic devices. A review of the key characteristics of these mixed-signal, signal processing and programmable logic devices is presented. The application of these devices and technologies to the instrumentation of Accelerators and Storage Rings is discussed and presented by way of examples. Issues relating to the requirements associated with real-time processing, I/O throughput, reconfigurability, reliability, maintainability and packaging requirements are also addressed