Digital systems from logic gates to processors
Deschamps, Jean-Pierre; Terés, Lluís
2017-01-01
This textbook for a one-semester course in Digital Systems Design describes the basic methods used to develop “traditional” Digital Systems, based on the use of logic gates and flip flops, as well as more advanced techniques that enable the design of very large circuits, based on Hardware Description Languages and Synthesis tools. It was originally designed to accompany a MOOC (Massive Open Online Course) created at the Autonomous University of Barcelona (UAB), currently available on the Coursera platform. Readers will learn what a digital system is and how it can be developed, preparing them for steps toward other technical disciplines, such as Computer Architecture, Robotics, Bionics, Avionics and others. In particular, students will learn to design digital systems of medium complexity, describe digital systems using high level hardware description languages, and understand the operation of computers at their most basic level. All concepts introduced are reinforced by plentiful illustrations, examples, ...
Amplifying genetic logic gates.
Bonnet, Jerome; Yin, Peter; Ortiz, Monica E; Subsoontorn, Pakpoom; Endy, Drew
2013-05-03
Organisms must process information encoded via developmental and environmental signals to survive and reproduce. Researchers have also engineered synthetic genetic logic to realize simpler, independent control of biological processes. We developed a three-terminal device architecture, termed the transcriptor, that uses bacteriophage serine integrases to control the flow of RNA polymerase along DNA. Integrase-mediated inversion or deletion of DNA encoding transcription terminators or a promoter modulates transcription rates. We realized permanent amplifying AND, NAND, OR, XOR, NOR, and XNOR gates actuated across common control signal ranges and sequential logic supporting autonomous cell-cell communication of DNA encoding distinct logic-gate states. The single-layer digital logic architecture developed here enables engineering of amplifying logic gates to control transcription rates within and across diverse organisms.
Passive all-optical polarization switch, binary logic gates, and digital processor.
Zaghloul, Y A; Zaghloul, A R M; Adibi, A
2011-10-10
We introduce the passive all-optical polarization switch, which modulates light with light. That switch is used to construct all the binary logic gates of two or more inputs. We discuss the design concepts and the operation of the AND, OR, NAND, and NOR gates as examples. The rest of the 16 logic gates are similarly designed. Cascading of such gates is straightforward as we show and discuss. Cascading in itself does not require a power source, but feedback at this stage of development does. The design and operation of an SR Latch is presented as one of the popular basic sequential devices used for memory cells. That completes the essential components of an all-optical polarization digital processor. The speed of such devices is well above 10 GHz for bulk implementations and is much higher for chip-size implementations. In addition, the presented devices do have the four essential characteristics previously thought unique to the microelectronic ones.
N Channel JFET Based Digital Logic Gate Structure
Krasowski, Michael J (Inventor)
2013-01-01
An apparatus is provided that includes a first field effect transistor with a source tied to zero volts and a drain tied to voltage drain drain (Vdd) through a first resistor. The apparatus also includes a first node configured to tie a second resistor to a third resistor and connect to an input of a gate of the first field effect transistor in order for the first field effect transistor to receive a signal. The apparatus also includes a second field effect transistor configured as a unity gain buffer having a drain tied to Vdd and an uncommitted source.
Area efficient digital logic NOT gate using single electron box (SEB
Bahrepour Davoud
2017-01-01
Full Text Available The continuing scaling down of complementary metal oxide semiconductor (CMOS has led researchers to build new devices with nano dimensions, whose behavior will be interpreted based on quantum mechanics. Single-electron devices (SEDs are promising candidates for future VLSI applications, due to their ultra small dimensions and lower power consumption. In most SED based digital logic designs, a single gate is introduced and its performance discussed. While in the SED based circuits the fan out of designed gate circuit should be considered and measured. In the other words, cascaded SED based designs must work properly so that the next stage(s should be driven by the previous stage. In this paper, previously NOT gate based on single electron box (SEB which is an important structure in SED technology, is reviewed in order to obtain correct operation in series connections. The correct operation of the NOT gate is investigated in a buffer circuit which uses two connected NOT gate in series. Then, for achieving better performance the designed buffer circuit is improved by the use of scaling process.
Source-Coupled, N-Channel, JFET-Based Digital Logic Gate Structure Using Resistive Level Shifters
Krasowski, Michael J.
2011-01-01
A circuit topography is used to create usable, digital logic gates using N (negatively doped) channel junction field effect transistors (JFETs), load resistors, level shifting resistors, and supply rails whose values are based on the DC parametric distributions of these JFETs. This method has direct application to the current state-of-the-art in high-temperature (300 to 500 C and higher) silicon carbide (SiC) device production, and defines an adaptation to the logic gate described in U.S. Patent 7,688,117 in that, by removing the level shifter from the output of the gate structure described in the patent (and applying it to the input of the same gate), a source-coupled gate topography is created. This structure allows for the construction AND/OR (sum of products) arrays that use far fewer transistors and resistors than the same array as constructed from the gates described in the aforementioned patent. This plays a central role when large multiplexer constructs are necessary; for example, as in the construction of memory. This innovation moves the resistive level shifter from the output of the basic gate structure to the front as if the input is now configured as what would be the output of the preceding gate, wherein the output is the two level shifting resistors. The output of this innovation can now be realized as the lone follower transistor with its source node as the gate output. Additionally, one may leave intact the resistive level shifter on the new gate topography. A source-coupled to direct-coupled logic translator will be the result.
Application of bistable optical logic gate arrays to all-optical digital parallel processing
Walker, A. C.
1986-05-01
Arrays of bistable optical gates can form the basis of an all-optical digital parallel processor. Two classes of signal input geometry exist - on- and off-axis - and lead to distinctly different device characteristics. The optical implementation of multisignal fan-in to an array of intrinsically bistable optical gates using the more efficient off-axis option is discussed together with the construction of programmable read/write memories from optically bistable devices. Finally the design of a demonstration all-optical parallel processor incorporating these concepts is presented.
Reversible logic gates on Physarum Polycephalum
Schumann, Andrew [University of Information Technology and Management, Sucharskiego 2, Rzeszow, 35-225 (Poland)
2015-03-10
In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum.
Logic Gates with Ion Transistors
Grebel, Haim
2016-01-01
Electronic logic gates are the basic building blocks of every computing and micro controlling system. Logic gates are made of switches, such as diodes and transistors. Ion-selective, ionic switches may emulate electronic switches [1-8]. If we ever want to create artificial bio-chemical circuitry, then we need to move a step further towards ion-logic circuitry. Here we demonstrate ion XOR and OR gates with electrochemical cells, and specifically, with two wet-cell batteries. In parallel to vacuum tubes, the batteries were modified to include a third, permeable and conductive mid electrode (the gate), which was placed between the anode and cathode in order to affect the ion flow through it. The key is to control the cell output with a much smaller biasing power, as demonstrated here. A successful demonstration points to self-powered ion logic gates.
2014-09-01
implementation of XOR/XNOR, making for a more modular nature to implement the common logic gates. The library is used to implement 1-bit full adders and a CIC...implementations. We validate such techniques through the design and simulation of inverters, full adders , and a five-stage cascaded integrator-comb (CIC...filter (inverter, XOR, NAND, flip flop, full adder , ripple carry adder , 26 bits). 2. Circuit Topology/Gate Design/Inverter and Gate Design Trade-Offs
Reversible logic gate using adiabatic superconducting devices
Takeuchi, N; Yamanashi, Y; Yoshikawa, N
2014-01-01
.... However, until now, no practical reversible logic gates have been demonstrated. One of the problems is that reversible logic gates must be built by using extremely energy-efficient logic devices...
Evens, Aden
2015-01-01
Building a foundational understanding of the digital, Logic of the Digital reveals a unique digital ontology. Beginning from formal and technical characteristics, especially the binary code at the core of all digital technologies, Aden Evens traces the pathways along which the digital domain of abstract logic encounters the material, human world. How does a code using only 0s and 1s give rise to the vast range of applications and information that constitutes a great and growing portion of our world? Evens' analysis shows how any encounter between the actual and the digital must cross an ontolo
Cheng, Nan; Zhu, Pengyu; Xu, Yuancong; Huang, Kunlun; Luo, Yunbo; Yang, Zhansen; Xu, Wentao
2016-10-15
The first example of droplet digital PCR logic gates ("YES", "OR" and "AND") for Hg (II) and Ag (I) ion detection has been constructed based on two amplification events triggered by a metal-ion-mediated base mispairing (T-Hg(II)-T and C-Ag(I)-C). In this work, Hg(II) and Ag(I) were used as the input, and the "true" hierarchical colors or "false" green were the output. Through accurate molecular recognition and high sensitivity amplification, positive droplets were generated by droplet digital PCR and viewed as the basis of hierarchical digital signals. Based on this principle, YES gate for Hg(II) (or Ag(I)) detection, OR gate for Hg(II) or Ag(I) detection and AND gate for Hg(II) and Ag(I) detection were developed, and their sensitively and selectivity were reported. The results indicate that the ddPCR logic system developed based on the different indicators for Hg(II) and Ag(I) ions provides a useful strategy for developing advanced detection methods, which are promising for multiplex metal ion analysis and intelligent DNA calculator design applications.
Reversible logic gate using adiabatic superconducting devices
Takeuchi, N.; Yamanashi, Y.; Yoshikawa, N.
2014-09-01
Reversible computing has been studied since Rolf Landauer advanced the argument that has come to be known as Landauer's principle. This principle states that there is no minimum energy dissipation for logic operations in reversible computing, because it is not accompanied by reductions in information entropy. However, until now, no practical reversible logic gates have been demonstrated. One of the problems is that reversible logic gates must be built by using extremely energy-efficient logic devices. Another difficulty is that reversible logic gates must be both logically and physically reversible. Here we propose the first practical reversible logic gate using adiabatic superconducting devices and experimentally demonstrate the logical and physical reversibility of the gate. Additionally, we estimate the energy dissipation of the gate, and discuss the minimum energy dissipation required for reversible logic operations. It is expected that the results of this study will enable reversible computing to move from the theoretical stage into practical usage.
Rapidly Reconfigurable All-Optical Universal Logic Gates
Goddard, L L; Kallman, J S; Bond, T C
2006-06-21
We present designs and simulations for a highly cascadable, rapidly reconfigurable, all-optical, universal logic gate. We will discuss the gate's expected performance, e.g. speed, fanout, and contrast ratio, as a function of the device layout and biasing conditions. The gate is a three terminal on-chip device that consists of: (1) the input optical port, (2) the gate selection port, and (3) the output optical port. The device can be built monolithically using a standard multiple quantum well graded index separate confinement heterostructure laser configuration. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog electrical or optical signal at the gate selection port. Specifically, the same gate can be selected to execute one of the 2 basic unary operations (NOT or COPY), or one of the 6 binary operations (OR, XOR, AND, NOR, XNOR, or NAND), or one of the many logic operations involving more than two inputs. The speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal modulation speed of a laser, which can be on the order of tens of GHz. The reprogrammable nature of the universal gate offers maximum flexibility and interchangeability for the end user since the entire application of a photonic integrated circuit built from cascaded universal logic gates can be changed simply by adjusting the gate selection port signals.
Wang, Baojun; Buck, Martin
2014-10-11
We designed and constructed versatile modular genetic logic gates in bacterial cells. These function as digital logic 1-input Buffer gate, 2-input and 3-input AND gates with one inverted input and integrate multiple chemical input signals in customised logic manners. Such rapidly engineered devices serve to achieve increased sensing signal selectivity.
Microscale Digital Vacuum Electronic Gates
Manohara, Harish (Inventor); Mojarradi, Mohammed M. (Inventor)
2014-01-01
Systems and methods in accordance with embodiments of the invention implement microscale digital vacuum electronic gates. In one embodiment, a microscale digital vacuum electronic gate includes: a microscale field emitter that can emit electrons and that is a microscale cathode; and a microscale anode; where the microscale field emitter and the microscale anode are disposed within at least a partial vacuum; where the microscale field emitter and the microscale anode are separated by a gap; and where the potential difference between the microscale field emitter and the microscale anode is controllable such that the flow of electrons between the microscale field emitter and the microscale anode is thereby controllable; where when the microscale anode receives a flow of electrons, a first logic state is defined; and where when the microscale anode does not receive a flow of electrons, a second logic state is defined.
NOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATES
M. Saravanan; K. Suresh Manic
2014-01-01
Multipliers play a vital role in digital systems especially in digital processors. There are many algorithms and designs were proposed in the earlier works, but still there is a need and a greater interest in designing a less complex, low power consuming, fastest multipliers. Reversible logic design became the promising technologies gaining greater interest due to less dissipation of heat and low power consumption. In this study a reversible logic gate based design of variable precision multi...
Synthesizing biomolecule-based Boolean logic gates.
Miyamoto, Takafumi; Razavi, Shiva; DeRose, Robert; Inoue, Takanari
2013-02-15
One fascinating recent avenue of study in the field of synthetic biology is the creation of biomolecule-based computers. The main components of a computing device consist of an arithmetic logic unit, the control unit, memory, and the input and output devices. Boolean logic gates are at the core of the operational machinery of these parts, and hence to make biocomputers a reality, biomolecular logic gates become a necessity. Indeed, with the advent of more sophisticated biological tools, both nucleic acid- and protein-based logic systems have been generated. These devices function in the context of either test tubes or living cells and yield highly specific outputs given a set of inputs. In this review, we discuss various types of biomolecular logic gates that have been synthesized, with particular emphasis on recent developments that promise increased complexity of logic gate circuitry, improved computational speed, and potential clinical applications.
Saghaei, Hamed; Zahedi, Abdulhamid; Karimzadeh, Rouhollah; Parandin, Fariborz
2017-10-01
In this paper, a triangular two-dimensional photonic crystal (PhC) of silicon rods in air is presented and its photonic band diagram is calculated by plane wave method. In this structure, an optical waveguide is obtained by creating a line defect (eliminating rods) in diagonal direction of PhC. Numerical simulations based on finite difference time domain method show that when self-collimated beams undergo total internal reflection at the PhC-air interface, a total reflection of 90° occurs for the output beams. We also demonstrate that by decreasing the radius of silicon rods instead of eliminating a diagonal line, a two-channel optical splitter will be designed. In this case, incoming self-collimated beams can be divided into the reflected and transmitted beams with arbitrary power ratio by adjusting the value of their radii. Based on these results, we propose a four-channel optical splitter using four line defects. The power ratio among output channels can be controlled systematically by varying the radius of rods in the line defects. We also demonstrate that by launching two optical sources with the same intensity and 90° phase difference from both perpendicular faces of the PhC, two logic OR and XOR gates will be achieved at the output channels. These optical devices have some applications in photonic integrated circuits for controlling and steering (managing) the light as desired.
Implementation of Effective Code Converters using Reversible Logic Gates
Ponnuru Koteswara Rao
2016-05-01
Full Text Available aThe development in the field of nanometer technology leads to minimize the power consumption of logic circuits. Reversible logic design has been one of the promising technologies gaining greater interest due to less dissipation of heat and low power consumption. In the digital design, the code converters are widely used process. So, the reversible logic gates and reversible circuits for realizing code converters like as Binary to Gray code, Gray to Binary code, BCD to Excess 3 code, Excess 3 to BCD codes using reversible logic gates is proposed. Designing of reversible logic circuit is challenging task, since not enough number of gates are available for design. Reversible processor design needs its building blocks should be reversible in this view the designing of reversible code converters became essential one. In the digital domain, data or information is represented by a combination of 0’s and 1’s. A code is basically the pattern of these 0’s and 1’s used to represent the data. Code converters are a class of combinational digital circuits that are used to convert one type of code in to another. The proposed design leads to the reduction of power consumption compared with conventional logic circuits
Cascaded logic gates in nanophotonic plasmon networks.
Wei, Hong; Wang, Zhuoxian; Tian, Xiaorui; Käll, Mikael; Xu, Hongxing
2011-07-12
Optical computing has been pursued for decades as a potential strategy for advancing beyond the fundamental performance limitations of semiconductor-based electronic devices, but feasible on-chip integrated logic units and cascade devices have not been reported. Here we demonstrate that a plasmonic binary NOR gate, a 'universal logic gate', can be realized through cascaded OR and NOT gates in four-terminal plasmonic nanowire networks. This finding provides a path for the development of novel nanophotonic on-chip processor architectures for future optical computing technologies.
Simulated Laboratory in Digital Logic.
Cleaver, Thomas G.
Design of computer circuits used to be a pencil and paper task followed by laboratory tests, but logic circuit design can now be done in half the time as the engineer accesses a program which simulates the behavior of real digital circuits, and does all the wiring and testing on his computer screen. A simulated laboratory in digital logic has been…
Novel Low Power Comparator Design using Reversible Logic Gates
Nagamani A N
2011-09-01
Full Text Available Reversible logic has received great attention in the recent years due to its ability to reduce the power dissipation which is the main requirement in low power digital design. It has wide applications inadvanced computing, low power CMOS design, Optical information processing, DNA computing, bio information, quantum computation and nanotechnology. This paper presents a novel design of reversiblecomparator using the existing reversible gates and proposed new Reversible BJN gate. All the comparators have been modeled and verified using VHDL and ModelSim. A comparative result is presented in terms of number of gates, number of garbage outputs, number of constant inputs and Quantum cost.
Logic gates based on ion transistors.
Tybrandt, Klas; Forchheimer, Robert; Berggren, Magnus
2012-05-29
Precise control over processing, transport and delivery of ionic and molecular signals is of great importance in numerous fields of life sciences. Integrated circuits based on ion transistors would be one approach to route and dispense complex chemical signal patterns to achieve such control. To date several types of ion transistors have been reported; however, only individual devices have so far been presented and most of them are not functional at physiological salt concentrations. Here we report integrated chemical logic gates based on ion bipolar junction transistors. Inverters and NAND gates of both npn type and complementary type are demonstrated. We find that complementary ion gates have higher gain and lower power consumption, as compared with the single transistor-type gates, which imitates the advantages of complementary logics found in conventional electronics. Ion inverters and NAND gates lay the groundwork for further development of solid-state chemical delivery circuits.
Rapidly reconfigurable all-optical universal logic gate
Goddard, Lynford L.; Bond, Tiziana C.; Kallman, Jeffrey S.
2010-09-07
A new reconfigurable cascadable all-optical on-chip device is presented. The gate operates by combining the Vernier effect with a novel effect, the gain-index lever, to help shift the dominant lasing mode from a mode where the laser light is output at one facet to a mode where it is output at the other facet. Since the laser remains above threshold, the speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal optical modulation speed of the laser, which can be on the order of up to about tens of GHz. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog optical or electrical signal at the gate selection port. Other all-optical functionality includes wavelength conversion, signal duplication, threshold switching, analog to digital conversion, digital to analog conversion, signal routing, and environment sensing. Since each gate can perform different operations, the functionality of such a cascaded circuit grows exponentially.
Slime mould logical gates: exploring ballistic approach
Adamatzky, Andrew
2010-01-01
Plasmodium of \\emph{Physarum polycephalum} is a single cell visible by unaided eye. On a non-nutrient substrate the plasmodium propagates as a traveling localization, as a compact wave-fragment of protoplasm. The plasmodium-localization travels in its originally predetermined direction for a substantial period of time even when no gradient of chemo-attractants is present. We utilize this property of \\emph{Physarum} localizations to design a two-input two-output Boolean logic gates $ \\to $ and $ \\to $. We verify the designs in laboratory experiments and computer simulations. We cascade the logical gates into one-bit half-adder and simulate its functionality.
AN IMPROVED DESIGN OF A MULTIPLIER USING REVERSIBLE LOGIC GATES
H.R.BHAGYALAKSHMI
2010-08-01
Full Text Available Reversible logic gates are very much in demand for the future computing technologies as they are known to produce zero power dissipation under ideal conditions. This paper proposes an improved design of a multiplier using reversible logic gates. Multipliers are very essential for the construction of various computational units of a quantum computer. The quantum cost of a reversible logic circuit can be minimized by reducing the number of reversible logic gates. For this two 4*4 reversible logic gates called a DPG gate and a BVF gate are used.
Optimized reversible BCD adder using new reversible logic gates
Bhagyalakshmi, H R
2010-01-01
Reversible logic has received great attention in the recent years due to their ability to reduce the power dissipation which is the main requirement in low power digital design. It has wide applications advanced computing, low power CMOS design, Optical information processing, DNA computing, bio information, quantum computation and nanotechnology. This paper presents an optimized reversible BCD adder using a new reversible gate. A comparative result is presented which shows that the proposed design is more optimized in terms of number of gates, number of garbage outputs and quantum cost than the existing designs.
Shefali Mamataj
2016-07-01
Full Text Available In today‟s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. Reversible computation is a research area characterized by having only computational models that is both forward and backward deterministic. Reversible Logic is gaining significant consideration as the potential logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on physical entropy. It has become very popular over the last few years since reversible logic circuits dramatically reduce energy loss. It consumes less power by recovering bit loss from its unique input-output mapping. This paper represents the implementation of conventional Boolean functions for basic digital gate by using COG reversible gate. This paper also represents a multi logic function generator circuit for generating multiple logical function simultaneously using COG gates. And also represents a controlled multi logic function generator circuit for generating any specified output in a controlled way.
Classical Boolean logic gates with quantum systems
Renaud, N; Joachim, C, E-mail: n-renaud@northwestern.edu [Nanoscience Group and MANA Satellite CEMES/CNRS, 29 rue J Marvig, BP 94347, 31055 Toulouse Cedex (France)
2011-04-15
An analytical method is proposed to implement any classical Boolean function in a small quantum system by taking the advantage of its electronic transport properties. The logical input, {alpha} = {l_brace}{alpha}{sub 1}, ..., {alpha}{sub N}{r_brace}, is used to control well-identified parameters of the Hamiltonian of the system noted H{sub 0}({alpha}). The logical output is encoded in the tunneling current intensity passing through the quantum system when connected to conducting electrodes. It is demonstrated how to implement the six symmetric two-input/one-output Boolean functions in a quantum system. This system can be switched from one logic function to another by changing its structural parameters. The stability of the logic gates is discussed, perturbing the Hamiltonian with noise sources and studying the effect of decoherence.
Single spin universal Boolean logic gate
Agarwal, H; Pramanik, S; Bandyopadhyay, S [Department of Electrical and Computer Engineering, Virginia Commonwealth University, Richmond, VA 23284 (United States)
2008-01-15
Recent advances in manipulating single electron spins in quantum dots have brought us close to the realization of classical logic gates, where binary bits are encoded in spin polarizations of single electrons. Here, we show that a linear array of three quantum dots, each containing a single spin polarized electron, and with nearest neighbor exchange coupling, acts as a NAND gate. The energy dissipated during switching this gate is the Landauer-Shannon limit of kTln(1/p{sub i} ) (T = ambient temperature and p{sub i}= intrinsic gate error probability). With present day technology, p{sub i} = 10{sup -9} is achievable above 1 K temperature. Even with this small intrinsic error probability, the energy dissipated during switching is only {approx}21kT, while today's nanoscale transistors dissipate about 40 000-50 000kT when they switch.
Universal programmable logic gate and routing method
Fijany, Amir (Inventor); Vatan, Farrokh (Inventor); Akarvardar, Kerem (Inventor); Blalock, Benjamin (Inventor); Chen, Suheng (Inventor); Cristoloveanu, Sorin (Inventor); Kolawa, Elzbieta (Inventor); Mojarradi, Mohammad M. (Inventor); Toomarian, Nikzad (Inventor)
2009-01-01
An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.
Cyclic groups and quantum logic gates
Pourkia, Arash; Batle, J.; Raymond Ooi, C. H.
2016-10-01
We present a formula for an infinite number of universal quantum logic gates, which are 4 by 4 unitary solutions to the Yang-Baxter (Y-B) equation. We obtain this family from a certain representation of the cyclic group of order n. We then show that this discrete family, parametrized by integers n, is in fact, a small sub-class of a larger continuous family, parametrized by real numbers θ, of universal quantum gates. We discuss the corresponding Yang-Baxterization and related symmetries in the concomitant Hamiltonian.
Bimetal switches in an AND logic gate
Lubrica, Joel V.; Lubrica, Quantum Yuri B.
2016-09-01
In this frontline, we use bimetal switches to provide inputs in an electrical AND logic gate. These switches can be obtained from the pre-heat starters of fluorescent lamps, by safely removing the glass enclosure. They may be activated by small open flames. This frontline has a historical aspect because fluorescent lamps, together with pre-heat starters, are now being replaced by compact fluorescent, halogen, and LED lamps.
SynBioLGDB: a resource for experimentally validated logic gates in synthetic biology
Wang, Liqiang; Qian, Kun; Huang, Yan; Jin, Nana; Lai, Hongyan; Zhang, Ting; Li, Chunhua; Zhang, Chunrui; Bi, Xiaoman; Wu, Deng; Wang, Changliang; Wu, Hao; Tan, Puwen; Lu, Jianping; Chen, Liqun; Li, Kongning; Li, Xia; Wang, Dong
2015-01-01
Synthetic biologists have developed DNA/molecular modules that perform genetic logic operations in living cells to track key moments in a cell's life or change the fate of a cell. Increasing evidence has also revealed that diverse genetic logic gates capable of generating a Boolean function play critically important roles in synthetic biology. Basic genetic logic gates have been designed to combine biological science with digital logic. SynBioLGDB (http://bioinformatics.ac.cn/synbiolgdb/) aims to provide the synthetic biology community with a useful resource for efficient browsing and visualization of genetic logic gates. The current version of SynBioLGDB documents more than 189 genetic logic gates with experimental evidence involving 80 AND gates and 16 NOR gates, etc. in three species (Human, Escherichia coli and Bacillus clausii). SynBioLGDB provides a user-friendly interface through which conveniently to query and browse detailed information about these genetic logic gates. SynBioLGDB will enable more comprehensive understanding of the connection of genetic logic gates to execute complex cellular functions in living cells.
Optimized design of BCD adder and Carry skip BCD adder using reversible logic gates
H.R.Bhagyalakshmi,; M K Venkatesha
2011-01-01
Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nano technology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit BCD adder and an optimized one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
Optimized design of BCD adder and Carry skip BCD adder using reversible logic gates
H.R.Bhagyalakshmi,
2011-04-01
Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nano technology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit BCD adder and an optimized one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
Second Quantization Representation of Quantum Logic Gate Transformations
MA Lei; ZHANG Yong-De
2001-01-01
By using the theory of multimode linear transformation in Fock space, we offer an effective method to study the quantum logic gates based on fermion states. The forms of some basic quantum logic operations are also obtained.
Three-Function Logic Gate Controlled by Analog Voltage
Zebulum, Ricardo; Stoica, Adrian
2006-01-01
The figure is a schematic diagram of a complementary metal oxide/semiconductor (CMOS) electronic circuit that performs one of three different logic functions, depending on the level of an externally applied control voltage, V(sub sel). Specifically, the circuit acts as A NAND gate at V(sub sel) = 0.0 V, A wire (the output equals one of the inputs) at V(sub sel) = 1.0 V, or An AND gate at V(sub sel) = -1.8 V. [The nominal power-supply potential (VDD) and logic "1" potential of this circuit is 1.8 V.] Like other multifunctional circuits described in several prior NASA Tech Briefs articles, this circuit was synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. An evolved circuit can be tested by computational simulation and/or tested in real hardware, and the results of the test can provide guidance for refining the design through further iteration. The evolutionary synthesis of electronic circuits can now be implemented by means of a software package Genetic Algorithms for Circuit Synthesis (GACS) that was developed specifically for this purpose. GACS was used to synthesize the present trifunctional circuit. As in the cases of other multifunctional circuits described in several prior NASA Tech Briefs articles, the multiple functionality of this circuit, the use of a single control voltage to select the function, and the automated evolutionary approach to synthesis all contribute synergistically to a combination of features that are potentially advantageous for the further development of robust, multiple-function logic circuits, including, especially, field-programmable gate arrays (FPGAs). These advantages include the following: This circuit contains only 9 transistors about half the number of transistors that would be needed to obtain equivalent NAND/wire/AND functionality by use of components from a standard digital design library. If
Optimized design of Carry Skip BCD adder using new FHNG reversible logic gates
Md.Belayet Ali
2012-07-01
Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nanotechnology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
Kim, Hoon-Sik; Won, Sang Min; Ha, Young-Geun; Ahn, Jong-Hyun; Facchetti, Antonio; Marks, Tobin J.; Rogers, John A.
2009-11-01
This letter reports the fabrication and electrical characterization of mechanically flexible and low operating voltage transistors and logic gates (NOT, NAND, and NOR gates) using printed silicon nanomembranes and self-assembled nanodielectrics on thin plastic substrates. The transistors exhibit effective linear mobilities of ˜680 cm2/V s, on/off ratios >107, gate leakage current densities <2.8×10-7 A/cm2, and subthreshold slopes ˜120 mV/decade. The inverters show voltage gains as high as 4.8. Simple digital logic gates (NAND and NOR gates) demonstrate the possible application of this materials combination in digital integrated circuits.
Development of a DNA sensor using molecular logic gate
Bhattacharjee, D; Chakraborty, S; Hussain, Syed Arshad
2014-01-01
This communication reports the increase in fluorescence resonance energy transfer (FRET) efficiency between two laser dyes in presence of Deoxyribonucleic acid (DNA). Two types of molecular logic gates have been designed where DNA acts as input signal and fluorescence intensity of different bands are taken as output signal. Use of these logic gates as DNA sensor has been demonstrated
Six-Correction Logic (SCL Gates in Quantum-dot Cellular Automata (QCA
Md. Anisur Rahman
2015-11-01
Full Text Available Quantum Dot Cellular Automata (QCA is a promising nanotechnology in Quantum electronics for its ultra low power consumption, faster speed and small size features. It has significant advantages over the Complementary Metal–Oxide–Semiconductor (CMOS technology. This paper present, a novel QCA representation of Six-Correction Logic (SCL gate based on QCA logic gates: the Maj3, Maj AND gate and Maj OR. In order to design and verify the functionality of the proposed layout, QCADesigner a familiar QCA simulator has been employed. The simulation results confirm correctness of the claims and its usefulness in designing a digital circuits.
Implementation of Quantum Logic Gates by Nuclear Magnetic Resonance Spectroscopy
DU Jiang-Feng; WU Ji-Hui; SHI Ming-Jun; HAN Liang; ZHOU Xian-Yi; YE Bang-Jiao; WENG Hui-Ming; HAN Rong-Dian
2000-01-01
Using nuclear magnetic resonance techniques with a solution of cytosine molecules, we show an implementation of certain quantum logic gates (including NOT gate, square-root of NOT gate and controlled-NOT gate), which have central importance in quantum computing. In addition, experimental results show that nuclear magnetic resonance spectroscopy can efficiently measure the result of quantum computing without attendant wave-function collapse.
Fredkin Gates for Finite-valued Reversible and Conservative Logics
Cattaneo, G; Leporini, R; Cattaneo, Gianpiero; Leporati, Alberto; Leporini, Roberto
2002-01-01
The basic principles and results of Conservative Logic introduced by Fredkin and Toffoli on the basis of a seminal paper of Landauer are extended to d-valued logics, with a special attention to three-valued logics. Different approaches to d-valued logics are examined in order to determine some possible universal sets of logic primitives. In particular, we consider the typical connectives of Lukasiewicz and Godel logics, as well as Chang's MV-algebras. As a result, some possible three-valued and d-valued universal gates are described which realize a functionally complete set of fundamental connectives.
Basic Reversible Logic Gates and It’s Qca Implementation
Papiya Biswas,
2014-06-01
Full Text Available Reversible logic has various applications in various field like in Nanotechnology, quantum computing, Low power CMOS, Optical computing and DNA computing, etc. Quantum computation is One of the most important applications of the reversible logic.Basically reversible circuits do not lose information & reversible computation is performed only when system comprises of reversible gates. The reversible logic is design,main purposes are - decrease quantum cost, depth of the circuits & the number of garbage output. This paper provides the basic‘s of reversible logic gates & its implementation in qca.
Microelectromechanical resonator based digital logic elements
Hafiz, Md Abdullah Al
2016-10-20
Micro/nano-electromechanical resonator based mechanical computing has recently attracted significant attention. However, its full realization has been hindered by the difficulty in realizing complex combinational logics, in which the logic function is constructed by cascading multiple smaller logic blocks. In this work we report an alternative approach for implementation of digital logic core elements, multiplexer and demultiplexer, which can be used to realize combinational logic circuits by suitable concatenation. Toward this, shallow arch shaped microresonators are electrically connected and their resonance frequencies are tuned based on an electrothermal frequency modulation scheme. This study demonstrates that by reconfiguring the same basic building block, the arch microresonator, complex logic circuits can be realized.
Quantum Circuit Synthesis using a New Quantum Logic Gate Library of NCV Quantum Gates
Li, Zhiqiang; Chen, Sai; Song, Xiaoyu; Perkowski, Marek; Chen, Hanwu; Zhu, Wei
2017-04-01
Since Controlled-Square-Root-of-NOT (CV, CV‡) gates are not permutative quantum gates, many existing methods cannot effectively synthesize optimal 3-qubit circuits directly using the NOT, CNOT, Controlled-Square-Root-of-NOT quantum gate library (NCV), and the key of effective methods is the mapping of NCV gates to four-valued quantum gates. Firstly, we use NCV gates to create the new quantum logic gate library, which can be directly used to get the solutions with smaller quantum costs efficiently. Further, we present a novel generic method which quickly and directly constructs this new optimal quantum logic gate library using CNOT and Controlled-Square-Root-of-NOT gates. Finally, we present several encouraging experiments using these new permutative gates, and give a careful analysis of the method, which introduces a new idea to quantum circuit synthesis.
Quantum Circuit Synthesis using a New Quantum Logic Gate Library of NCV Quantum Gates
Li, Zhiqiang; Chen, Sai; Song, Xiaoyu; Perkowski, Marek; Chen, Hanwu; Zhu, Wei
2016-12-01
Since Controlled-Square-Root-of-NOT (CV, CV‡) gates are not permutative quantum gates, many existing methods cannot effectively synthesize optimal 3-qubit circuits directly using the NOT, CNOT, Controlled-Square-Root-of-NOT quantum gate library (NCV), and the key of effective methods is the mapping of NCV gates to four-valued quantum gates. Firstly, we use NCV gates to create the new quantum logic gate library, which can be directly used to get the solutions with smaller quantum costs efficiently. Further, we present a novel generic method which quickly and directly constructs this new optimal quantum logic gate library using CNOT and Controlled-Square-Root-of-NOT gates. Finally, we present several encouraging experiments using these new permutative gates, and give a careful analysis of the method, which introduces a new idea to quantum circuit synthesis.
Quantum logic gates from Dirac quasiparticles
Marino, E. C.; Brozeguini, J. C.
2015-03-01
We show that one of the fundamental operations of topological quantum computation, namely the non-Abelian braiding of identical particles, can be physically realized in a general system of Dirac quasiparticles in 1 + 1D. Our method is based on the study of the analytic structure of the different Euclidean correlation functions of Dirac fields, which are conveniently expressed as functions of a complex variable. When the Dirac field is an (Abelian) anyon with statistics parameter s (2s not an integer), we show that the associated Majorana states of such a field present non-Abelian statistics. The explicit form of the unitary, non-commuting (monodromy) matrices generated upon braiding is derived as a function of s and is shown to satisfy the Yang-Baxter algebra. For the special case of s = 1/4, we show that the braiding matrices become the logic gates NOT, CNOT,… required in the algorithms of universal quantum computation. We suggest that maybe polyacetylene, alternately doped with alkali and halogen atoms, is a potential candidate for a physical material realization of the system studied here.
DESIGN OF OPTIMAL CARRY SKIP ADDER AND CARRY SKIP BCD ADDER USING REVERSIBLE LOGIC GATES
Praveena Murugesan; Thanushkodi Keppanagounder
2014-01-01
Reversible logic circuits have the ability to produce zero power dissipation which has found its importance in quantum computing, optical computing and low power digital circuits. The study presents improved and efficient reversible logic circuits for carry skip adder and carry skip BCD adder. The performance of the proposed architecture is better than the existing works in terms of gate count, garbage outputs and constant inputs. This design forms the basis for different quantum ALU and embe...
NOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATES
M. Saravanan; K. Suresh Manic
2014-01-01
.... In this study a reversible logic gate based design of variable precision multiplier is proposed which have the greater efficiency in power consumption and speed since the partial products received...
All-optical reversible logic gates with microresonators
Sethi, Purnima; Roy, Sukhdev; Topolancik, Juraj; Vollmer, Frank
2011-08-01
We present designs of all-optical reversible logic gates, namely, Feynman, Toffoli, Peres and Feynman Double gates, based on switching of a near-IR (1310/1550 nm) signal by low-power control signals at 532 nm and 405 nm, in optically controlled bacteriorhodopsin protein-coated silica microcavities coupled between two tapered single-mode fibers.
Alternative approach of conducting phase-modulated all-optical logic gates
Chakraborty, Bikash; Mukhopadhyay, Sourangshu
2009-03-01
It is well established that optical devices and components are more advantageous than their electronic counterparts because of inherent parallelism in optics. Basically electronics are found to be very unsuitable in high speed (above gigahertz) data processing systems whereas tremendous operational speed (in the range of terahertz) can be achieved with the help of optics. The parallelism of optics and the properties of low loss transmission make optics a powerful technology for digital computing and processing and in long-range communications. Again it is well established that logic gates are the basic building blocks of any computing or data processing system. Therefore, any optical data processor needs suitable optically run logic gates. A method of conducting phase-modulated all-optical logic gates is proposed. Here we will exploit the advantages of phase modulation not only in processing but also in encoding as well decoding also.
Variable Block Carry Skip Logic using Reversible Gates
Islam, Md. Rafiqul; Islam, Md. Saiful; Karim, Muhammad Rezaul; Mahmud, Abdullah Al; Babu, Hafiz Md. Hasan
2010-01-01
Reversible circuits have applications in digital signal processing, computer graphics, quantum computation and cryptography. In this paper, a generalized k*k reversible gate family is proposed and a 3*3 gate of the family is discussed. Inverter, AND, OR, NAND, NOR, and EXOR gates can be realized by this gate. Implementation of a full-adder circuit using two such 3*3 gates is given. This full-adder circuit contains only two reversible gates and produces no extra garbage outputs. The proposed f...
Design of Asynchronous Sequential Circuits using Reversible Logic Gates
Bahram Dehghan
2012-09-01
Full Text Available In recent literature, Reversible logic has become one of the promising arena in low power dissipating circuit design in the past few years and has found its applications in low power CMOS circuits ,optical information processing and nanotechnology. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. This paper presents asynchronoussequential circuits and circuits without hazard effect using reversible logic gates. I illustrate that we can produce AND, OR, NAND, NOR, EXOR and EXNOR outputs in one design using reversible logic gates. Also, I will evaluate the proposed circuits. The results show that reversible logic can be used to design these circuits. In this paper, the number of gates and garbage outputs is considered.
Design of CMOS logic gates for TID radiation
Attia, John Okyere; Sasabo, Maria L.
1993-01-01
The rise time, fall time and propagation delay of the logic gates were derived. The effects of total ionizing dose (TID) radiation on the fall and rise times of CMOS logic gates were obtained using C program calculations and PSPICE simulations. The variations of mobility and threshold voltage on MOSFET transistors when subjected to TID radiation were used to determine the dependence of switching times on TID. The results of this work indicate that by increasing the size of P-channel transistor with respect to the N-channel transistors of the CMOS gates, the propagation delay of CMOS logic gate can be made to decrease with, or be independent of an increase in TID radiation.
VLSI Implementation of Fault Tolerance Multiplier based on Reversible Logic Gate
Ahmad, Nabihah; Hakimi Mokhtar, Ahmad; Othman, Nurmiza binti; Fhong Soon, Chin; Rahman, Ab Al Hadi Ab
2017-08-01
Multiplier is one of the essential component in the digital world such as in digital signal processing, microprocessor, quantum computing and widely used in arithmetic unit. Due to the complexity of the multiplier, tendency of errors are very high. This paper aimed to design a 2×2 bit Fault Tolerance Multiplier based on Reversible logic gate with low power consumption and high performance. This design have been implemented using 90nm Complemetary Metal Oxide Semiconductor (CMOS) technology in Synopsys Electronic Design Automation (EDA) Tools. Implementation of the multiplier architecture is by using the reversible logic gates. The fault tolerance multiplier used the combination of three reversible logic gate which are Double Feynman gate (F2G), New Fault Tolerance (NFT) gate and Islam Gate (IG) with the area of 160μm x 420.3μm (67.25 mm2). This design achieved a low power consumption of 122.85μW and propagation delay of 16.99ns. The fault tolerance multiplier proposed achieved a low power consumption and high performance which suitable for application of modern computing as it has a fault tolerance capabilities.
Molecular logic gates and luminescent sensors based on photoinduced electron transfer.
de Silva, A Prasanna; Uchiyama, Seiichi
2011-01-01
The competition between Photoinduced electron transfer (PET) and other de-excitation pathways such as fluorescence and phosphorescence can be controlled within designed molecular structures. Depending on the particular design, the resulting optical output is thus a function of various inputs such as ion concentration and excitation light dose. Once digitized into binary code, these input-output patterns can be interpreted according to Boolean logic. The single-input logic types of YES and NOT cover simple sensors and the double- (or higher-) input logic types represent other gates such as AND and OR. The logic-based arithmetic processors such as half-adders and half-subtractors are also featured. Naturally, a principal application of the more complex gates is in multi-sensing contexts.
Chaplin, J C; Russell, N A; Krasnogor, N
2012-07-01
In this paper we detail experimental methods to implement registers, logic gates and logic circuits using populations of photochromic molecules exposed to sequences of light pulses. Photochromic molecules are molecules with two or more stable states that can be switched reversibly between states by illuminating with appropriate wavelengths of radiation. Registers are implemented by using the concentration of molecules in each state in a given sample to represent an integer value. The register's value can then be read using the intensity of a fluorescence signal from the sample. Logic gates have been implemented using a register with inputs in the form of light pulses to implement 1-input/1-output and 2-input/1-output logic gates. A proof of concept logic circuit is also demonstrated; coupled with the software workflow describe the transition from a circuit design to the corresponding sequence of light pulses. Copyright © 2012 Elsevier Ireland Ltd. All rights reserved.
Orbach, Ron; Remacle, Françoise; Levine, R D; Willner, Itamar
2012-12-26
The Toffoli and Fredkin gates were suggested as a means to exhibit logic reversibility and thereby reduce energy dissipation associated with logic operations in dense computing circuits. We present a construction of the logically reversible Toffoli and Fredkin gates by implementing a library of predesigned Mg(2+)-dependent DNAzymes and their respective substrates. Although the logical reversibility, for which each set of inputs uniquely correlates to a set of outputs, is demonstrated, the systems manifest thermodynamic irreversibility originating from two quite distinct and nonrelated phenomena. (i) The physical readout of the gates is by fluorescence that depletes the population of the final state of the machine. This irreversible, heat-releasing process is needed for the generation of the output. (ii) The DNAzyme-powered logic gates are made to operate at a finite rate by invoking downhill energy-releasing processes. Even though the three bits of Toffoli's and Fredkin's logically reversible gates manifest thermodynamic irreversibility, we suggest that these gates could have important practical implication in future nanomedicine.
Design of Digital Adder Using Reversible Logic
Gowthami P
2016-02-01
Full Text Available Reversible logic circuits have promising applications in Quantum computing, Low power VLSI design, Nanotechnology, optical computing, DNA computing and Quantum dot cellular automata. In spite of them another main prominent application of reversible logic is Quantum computers where the quantum devices are essential which are ideally operated at ultra high speed with less power dissipation must be built from reversible logic components. This makes the reversible logic as a one of the most promising research areas in the past few decades. In VLSI design the delay is the one of the major issue along with area and power. This paper presents the implementation of Ripple Carry Adder (RCA circuits using reversible logic gates are discussed.
A Web-Based Visualization and Animation Platform for Digital Logic Design
Shoufan, Abdulhadi; Lu, Zheng; Huss, Sorin A.
2015-01-01
This paper presents a web-based education platform for the visualization and animation of the digital logic design process. This includes the design of combinatorial circuits using logic gates, multiplexers, decoders, and look-up-tables as well as the design of finite state machines. Various configurations of finite state machines can be selected…
Fredkin gates for finite-valued reversible and conservative logics
Cattaneo, G; Leporati, A; Leporini, R [Dipartimento di Informatica, Sistemistica e Comunicazione, Universita degli Studi di Milano - Bicocca, via Bicocca degli Arcimboldi 8, 20126 Milan (Italy)
2002-11-22
The basic principles and results of conservative logic introduced by Fredkin and Toffoli in 1982, on the basis of a seminal paper of Landauer, are extended to d-valued logics, with a special attention to three-valued logics. Different approaches to d-valued logics are examined in order to determine some possible universal sets of logic primitives. In particular, we consider the typical connectives of Lukasiewicz and Goedel logics, as well as Chang's MV-algebras. As a result, some possible three-valued and d-valued universal gates are described which realize a functionally complete set of fundamental connectives. Two no-go theorems are also proved.
Multiplexing of injury codes for the parallel operation of enzyme logic gates.
Halámek, Jan; Windmiller, Joshua Ray; Zhou, Jian; Chuang, Min-Chieh; Santhosh, Padmanabhan; Strack, Guinevere; Arugula, Mary A; Chinnapareddy, Soujanya; Bocharova, Vera; Wang, Joseph; Katz, Evgeny
2010-09-01
The development of a highly parallel enzyme logic sensing concept employing a novel encoding scheme for the determination of multiple pathophysiological conditions is reported. The new concept multiplexes a contingent of enzyme-based logic gates to yield a distinct 'injury code' corresponding to a unique pathophysiological state as prescribed by a truth table. The new concept is illustrated using an array of NAND and AND gates to assess the biomedical significance of numerous biomarker inputs including creatine kinase, lactate dehydrogenase, norepinephrine, glutamate, alanine transaminase, lactate, glucose, glutathione disulfide, and glutathione reductase to assess soft-tissue injury, traumatic brain injury, liver injury, abdominal trauma, hemorrhagic shock, and oxidative stress. Under the optimal conditions, physiological and pathological levels of these biomarkers were detected through either optical or electrochemical techniques by monitoring the level of the outputs generated by each of the six logic gates. By establishing a pathologically meaningful threshold for each logic gate, the absorbance and amperometric assays tendered the diagnosis in a digitally encoded 6-bit word, defined as an 'injury code'. This binary 'injury code' enabled the effective discrimination of 64 unique pathological conditions to offer a comprehensive high-fidelity diagnosis of multiple injury conditions. Such processing of relevant biomarker inputs and the subsequent multiplexing of the logic gate outputs to yield a comprehensive 'injury code' offer significant potential for the rapid and reliable assessment of varied and complex forms of injury in circumstances where access to a clinical laboratory is not viable. While the new concept of parallel and multiplexed enzyme logic gates is illustrated here in connection to multi-injury diagnosis, it could be readily extended to a wide range of practical medical, industrial, security and environmental applications.
Two-Qubit Quantum Logic Gate in Molecular Magnets
HOU Jing-Min; TIAN Li-Jun; GE Mo-Lin
2005-01-01
@@ We propose a scheme to realize a controlled-NOT quantum logic gate in a dimer of exchange coupled singlemolecule magnets, [Mn4]2. We chosen the ground state and the three low-lying excited states of a dimer in a finite longitudinal magnetic field as the quantum computing bases and introduced a pulsed transverse magnetic field with a special frequency. The pulsed transverse magnetic field induces the transitions between the quantum computing bases so as to realize a controlled-NOT quantum logic gate. The transition rates between a pair of the four quantum computing bases and between the quantum computing bases and excited states are evaluated and analysed.
A single nano cantilever as a reprogrammable universal logic gate
Chappanda, K. N.; Ilyas, S.; Kazmi, S. N. R.; Holguin-Lerma, J.; Batra, N. M.; Costa, P. M. F. J.; Younis, M. I.
2017-04-01
The current transistor-based computing circuits use multiple interconnected transistors to realize a single Boolean logic gate. This leads to higher power requirements and delayed computing. Transistors are not suitable for applications in harsh environments and require complicated thermal management systems due to excessive heat dissipation. Also, transistor circuits lack the ability to dynamically reconfigure their functionality in real time, which is desirable for enhanced computing capability. Further, the miniaturization of transistors to improve computational power is reaching its ultimate physical limits. As a step towards overcoming the limitations of transistor-based computing, here we demonstrate a reprogrammable universal Boolean logic gate based on a nanoelectromechanical cantilever (NC) oscillator. The fundamental XOR, AND, NOR, OR and NOT logic gates are condensed in a single NC, thereby reducing electrical interconnects between devices. The device is dynamically switchable between any logic gates at the same drive frequency without the need for any change in the circuit. It is demonstrated to operate at elevated temperatures minimizing the need for thermal management systems. It has a tunable bandwidth of 5 MHz enabling parallel and dynamically reconfigurable logic device for enhanced computing.
A single nano cantilever as a reprogrammable universal logic gate
Chappanda, K. N.
2017-02-24
The current transistor-based computing circuits use multiple interconnected transistors to realize a single Boolean logic gate. This leads to higher power requirements and delayed computing. Transistors are not suitable for applications in harsh environments and require complicated thermal management systems due to excessive heat dissipation. Also, transistor circuits lack the ability to dynamically reconfigure their functionality in real time, which is desirable for enhanced computing capability. Further, the miniaturization of transistors to improve computational power is reaching its ultimate physical limits. As a step towards overcoming the limitations of transistor-based computing, here we demonstrate a reprogrammable universal Boolean logic gate based on a nanoelectromechanical cantilever (NC) oscillator. The fundamental XOR, AND, NOR, OR and NOT logic gates are condensed in a single NC, thereby reducing electrical interconnects between devices. The device is dynamically switchable between any logic gates at the same drive frequency without the need for any change in the circuit. It is demonstrated to operate at elevated temperatures minimizing the need for thermal management systems. It has a tunable bandwidth of 5 MHz enabling parallel and dynamically reconfigurable logic device for enhanced computing.
Variable Block Carry Skip Logic using Reversible Gates
Islam, Md Rafiqul; Karim, Muhammad Rezaul; Mahmud, Abdullah Al; Babu, Hafiz Md Hasan
2010-01-01
Reversible circuits have applications in digital signal processing, computer graphics, quantum computation and cryptography. In this paper, a generalized k*k reversible gate family is proposed and a 3*3 gate of the family is discussed. Inverter, AND, OR, NAND, NOR, and EXOR gates can be realized by this gate. Implementation of a full-adder circuit using two such 3*3 gates is given. This full-adder circuit contains only two reversible gates and produces no extra garbage outputs. The proposed full-adder circuit is efficient in terms of gate count, garbage outputs and quantum cost. A 4-bit carry skip adder is designed using this full-adder circuit and a variable block carry skip adder is discussed. Necessary equations required to evaluate these adder are presented.
A reconfigurable NAND/NOR genetic logic gate.
Goñi-Moreno, Angel; Amos, Martyn
2012-09-18
Engineering genetic Boolean logic circuits is a major research theme of synthetic biology. By altering or introducing connections between genetic components, novel regulatory networks are built in order to mimic the behaviour of electronic devices such as logic gates. While electronics is a highly standardized science, genetic logic is still in its infancy, with few agreed standards. In this paper we focus on the interpretation of logical values in terms of molecular concentrations. We describe the results of computational investigations of a novel circuit that is able to trigger specific differential responses depending on the input standard used. The circuit can therefore be dynamically reconfigured (without modification) to serve as both a NAND/NOR logic gate. This multi-functional behaviour is achieved by a) varying the meanings of inputs, and b) using branch predictions (as in computer science) to display a constrained output. A thorough computational study is performed, which provides valuable insights for the future laboratory validation. The simulations focus on both single-cell and population behaviours. The latter give particular insights into the spatial behaviour of our engineered cells on a surface with a non-homogeneous distribution of inputs. We present a dynamically-reconfigurable NAND/NOR genetic logic circuit that can be switched between modes of operation via a simple shift in input signal concentration. The circuit addresses important issues in genetic logic that will have significance for more complex synthetic biology applications.
Fratto, Brian E; Katz, Evgeny
2016-04-04
Controlled logic gates, where the logic operations on the Data inputs are performed in the way determined by the Control signal, were designed in a chemical fashion. Specifically, the systems where the Data output signals directed to various output channels depending on the logic value of the Control input signal have been designed based on enzyme biocatalyzed reactions performed in a multi-cell flow system. In the Switch gate one Data signal was directed to one of two possible output channels depending on the logic value of the Control input signal. In the reversible Fredkin gate the routing of two Data signals between two output channels is controlled by the third Control signal. The flow devices were created using a network of flow cells, each modified with one enzyme that biocatalyzed one chemical reaction. The enzymatic cascade was realized by moving the solution from one reacting cell to another which were organized in a specific network. The modular design of the enzyme-based systems realized in the flow device allowed easy reconfiguration of the logic system, thus allowing simple extension of the logic operation from the 2-input/3-output channels in the Switch gate to the 3-input/3-output channels in the Fredkin gate. Further increase of the system complexity for realization of various logic processes is feasible with the use of the flow cell modular design. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Parallel transport quantum logic gates with trapped ions
de Clercq, Ludwig; Marinelli, Matteo; Nadlinger, David; Oswald, Robin; Negnevitsky, Vlad; Kienzler, Daniel; Keitch, Ben; Home, Jonathan P
2015-01-01
Quantum information processing will require combinations of gate operations and communication, with each applied in parallel to large numbers of quantum systems. These tasks are often performed sequentially, with gates implemented by pulsed fields and information transported either by moving the physical qubits or using photonic links. For trapped ions, an alternative approach is to implement quantum logic gates by transporting the ions through static laser beams, combining qubit operations with transport. This has significant advantages for scalability since the voltage waveforms required for transport can potentially be generated using micro-electronics integrated into the trap structure itself, while both optical and microwave control elements are significantly more bulky. Using a multi-zone ion trap, we demonstrate transport gates on a qubit encoded in the hyperfine structure of a beryllium ion. We show the ability to perform sequences of operations, and to perform parallel gates on two ions transported t...
Molecular AND logic gate based on bacterial anaerobic respiration.
Arugula, Mary Anitha; Shroff, Namita; Katz, Evgeny; He, Zhen
2012-10-21
Enzyme coding genes that integrate information for anaerobic respiration in Shewanella oneidensis MR-1 were used as input for constructing an AND logic gate. The absence of one or both genes inhibited electrochemically-controlled anaerobic respiration, while wild type bacteria were capable of accepting electrons from an electrode for DMSO reduction.
Microdroplet-based universal logic gates by electrorheological fluid
Zhang, Mengying
2011-01-01
We demonstrate a uniquely designed microfluid logic gate with universal functionality, which is capable of conducting all 16 logic operations in one chip, with different input voltage combinations. A kind of smart colloid, giant electrorheological (GER) fluid, functions as the translation media among fluidic, electronic and mechanic information, providing us with the capability of performing large integrations either on-chip or off-chip, while the on-chip hybrid circuit is formed by the interconnection of the electric components and fluidic channels, where the individual microdroplets travelling in a channel represents a bit. The universal logic gate reveals the possibilities of achieving a large-scale microfluidic processor with more complexity for on-chip processing for biological, chemical as well as computational experiments. © 2011 The Royal Society of Chemistry.
Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates
Islam, Md Saiful; Begum, Zerina; Hafiz, Mohd Zulfiquar
2010-01-01
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient design approaches of fault tolerant carry skip adders (FTCSAs) and compares those designs with the existing ones. Variable block carry skip logic (VBCSL) using the fault tolerant full adders (FTFAs) has also been developed. The designs are minimized in terms of hardware complexity, gate count, constant inputs and garbage outputs. Besides of it, technology independent evaluation of the proposed designs clearly demonstrates its superiority with the existing counterparts.
Divide and control: split design of multi-input DNA logic gates.
Gerasimova, Yulia V; Kolpashchikov, Dmitry M
2015-01-18
Logic gates made of DNA have received significant attention as biocompatible building blocks for molecular circuits. The majority of DNA logic gates, however, are controlled by the minimum number of inputs: one, two or three. Here we report a strategy to design a multi-input logic gate by splitting a DNA construct.
Construction of DNA logic gates utilizing a H+/Ag+ induced i-motif structure.
Shi, Yunhua; Sun, Hongxia; Xiang, Junfeng; Chen, Hongbo; Yang, Qianfan; Guan, Aijiao; Li, Qian; Yu, Lijia; Tang, Yalin
2014-12-18
A simple technology to construct diverse DNA logic gates (OR and INHIBIT) has been designed utilizing a H(+) and/or Ag(+) induced i-motif structure. The logic gates are easily controlled and also show a real time response towards inputs. The research provides a new insight for designing DNA logic gates using an i-motif DNA structure.
MoS2 based dual input logic AND gate
Martinez, Luis M.; Pinto, Nicholas J.; Naylor, Carl H.; Johnson, A. T. Charlie
2016-12-01
Crystalline monolayers of CVD MoS2 are used as the active semiconducting channel in a split-gate field effect transistor. The device demonstrates logic AND functionality that is controlled by independently addressing each gate terminal with ±10V. When +10V was simultaneously applied to both gates, the device was conductive (ON), while any other combination of gate voltages rendered the device resistive (OFF). The ON/OFF ratio of the device was ˜ 35 and the charge mobility using silicon nitride as the gate dielectric was 1.2cm2/V-s and 0.1cm2/V-s in the ON and OFF states respectively. Clear discrimination between the two states was observed when a simple circuit containing a load resistor was used to test the device logic AND functionality at 10Hz. One advantage is that split gate technology can reduce the number of devices required in complex circuits, leading to compact electronics and large scale integration based on intrinsic 2-D semiconducting materials.
S. M. Afanador-Delgado; R. Jaimes-Reátegui; Sevilla-Escoboza, R.; G. Huerta-Cuéllar; J. H. García-López; D. López Mancilla; L. A. Camacho-Castillo; C. E. Castañeda-Hernández
2013-01-01
We implement an algorithm to reproduce the behavior of a dynamic logic gate which consists of three elements: a fiber laser in chaotic regime, a threshold controller and the output of the logic gate. The output signal of the fiber laser is sent to the logic gate input as to the threshold controller; threshold controller output signal is sent at the entrance of the logic gate and also fed back to the fiber laser which changes their dynamic behavior. The output of the logic gate consists of a d...
Design of 4:16 decoder using reversible logic gates
Santhi Chebiyyam
2016-04-01
Full Text Available Reversible logic has received great importance in the recent years because of its feature of reduction in power dissipation. It finds application in low power digital designs, quantum computing, nanotechnology, DNA computing etc. Large number of researches are currently ongoing on sequential and combinational circuits using reversible logic. Decoders are one of the most important circuits used in combinational logic. Different approaches have been proposed for their design. In this article, we have proposed a novel design of 4:16.
Newnes digital logic IC pocket book
MARSTON, R M
1996-01-01
This handy reference guide to modern '74'- series and '4000'- series digital ICs presents 620 useful and carefully selected circuits, diagrams, graphs and tables, supported by informative text and captions. Detailed descriptions of and practical applications information on more than 185 TTL and CMOS ICs are provided.This wealth of information is clearly and logically arranged so that specific information can be quickly and easily located. Fifteen chapters cover from IC basics and TTL and CMOS principles, to the practical circuitry of logic ICs, waveform generators and multiplexers.
Orthogonally modulated molecular transport junctions for resettable electronic logic gates
Meng, Fanben; Hervault, Yves-Marie; Shao, Qi; Hu, Benhui; Norel, Lucie; Rigaut, Stéphane; Chen, Xiaodong
2014-01-01
Individual molecules have been demonstrated to exhibit promising applications as functional components in the fabrication of computing nanocircuits. Based on their advantage in chemical tailorability, many molecular devices with advanced electronic functions have been developed, which can be further modulated by the introduction of external stimuli. Here, orthogonally modulated molecular transport junctions are achieved via chemically fabricated nanogaps functionalized with dithienylethene units bearing organometallic ruthenium fragments. The addressable and stepwise control of molecular isomerization can be repeatedly and reversibly completed with a judicious use of the orthogonal optical and electrochemical stimuli to reach the controllable switching of conductivity between two distinct states. These photo-/electro-cooperative nanodevices can be applied as resettable electronic logic gates for Boolean computing, such as a two-input OR and a three-input AND-OR. The proof-of-concept of such logic gates demonstrates the possibility to develop multifunctional molecular devices by rational chemical design.
Construction of a fuzzy and all Boolean logic gates based on DNA
M. Zadegan, Reza; Jepsen, Mette D E; Hildebrandt, Lasse
2015-01-01
computing and biosensing. The ideal logic gate system should provide a wide selection of logical operations, and be integrable in multiple copies into more complex structures. Here we show the successful construction of a small DNA-based logic gate complex that produces fluorescent outputs corresponding......Logic gates are devices that can perform logical operations by transforming a set of inputs into a predictable single detectable output. The hybridization properties, structure, and function of nucleic acids can be used to make DNA-based logic gates. These devices are important modules in molecular...... to the operation of the six Boolean logic gates AND, NAND, OR, NOR, XOR, and XNOR. The logic gate complex is shown to work also when implemented in a three-dimensional DNA origami box structure, where it controlled the position of the lid in a closed or open position. Implementation of multiple microRNA sensitive...
Universal logic gates via liquid-electronic hybrid divider
Zhou, Bingpu
2012-01-01
We demonstrated two-input microdroplet-based universal logic gates using a liquid-electronic hybrid divider. All 16 Boolean logic functions have been realized by manipulating the applied voltages. The novel platform consists of a microfluidic chip with integrated microdroplet detectors and external electronic components. The microdroplet detectors act as the communication media for fluidic and electronic information exchange. The presence or absence of microdroplets at the detector translates into the binary signal 1 or 0. The embedded micro-mechanical pneumatically actuated valve (PAV), fabricated using the well-developed multilayer soft lithography technique, offers biocompatibility, flexibility and accuracy for the on-chip realization of different logic functions. The microfluidic chip can be scaled up to construct large-scale microfluidic logic computation. On the other hand, the microfluidic chip with a specific logic function can be applied to droplet-based chemical reactions for on-demand bio or chemical analysis. Our experimental results have presented an autonomously driven, precision-controlled microfluidic chip for chemical reactions based on the IF logic function. © 2012 The Royal Society of Chemistry.
Marmon, Jason K; Wang, Kai; Zhou, Weilie; Zhang, Yong
2016-01-01
Modern electronics are developing electronic-optical integrated circuits, while their electronic backbone, e.g. field-effect transistors (FETs), remains the same. However, further FET down scaling is facing physical and technical challenges. A light-effect transistor (LET) offers electronic-optical hybridization at the component level, which can continue Moore's law to the quantum region without requiring a FET's fabrication complexity, e.g. a physical gate and doping, by employing optical gating and photoconductivity. Multiple independent gates are therefore readily realized to achieve unique functionalities without increasing chip space. Here we report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs show output and transfer characteristics resembling advanced FETs, e.g. on/off ratios up to ~1.0x10^6 with a source-drain voltage of ~1.43 V, gate-power of ~260 nW, and subthreshold swing of ~0.3 nW/de...
An enzyme-free and DNA-based Feynman gate for logically reversible operation.
Zhou, Chunyang; Wang, Kun; Fan, Daoqing; Wu, Changtong; Liu, Dali; Liu, Yaqing; Wang, Erkang
2015-06-28
A logically reversible Feynman gate was successfully realized under enzyme-free conditions by integrating graphene oxide and DNA for the first time. The gate has a one-to-one mapping function to identify inputs from the corresponding outputs. This type of reversible logic gate may have great potential applications in information processing and biosensing systems.
Logic Gates Made of N-Channel JFETs and Epitaxial Resistors
Krasowski, Michael J.
2008-01-01
Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform
DNA Sequential Logic Gate Using Two-Ring DNA.
Zhang, Cheng; Shen, Linjing; Liang, Chao; Dong, Yafei; Yang, Jing; Xu, Jin
2016-04-13
Sequential DNA detection is a fundamental issue for elucidating the interactive relationships among complex gene systems. Here, a sequential logic DNA gate was achieved by utilizing the two-ring DNA structure, with the ability to recognize "before" and "after" triggering sequences of DNA signals. By taking advantage of a "loop-open" mechanism, separations of two-ring DNAs were controlled. Three triggering pathways with different sequential DNA treatments were distinguished by comparing fluorescent outputs. Programmed nanoparticle arrangement guided by "interlocked" two-ring DNA was also constructed to demonstrate the achievement of designed nanostrucutres. Such sequential logic DNA operation may guide future molecular sensors to monitor more complex gene network in biological systems.
A New DNA-based Logical Gate Comes into Being
无
2006-01-01
@@ Across-disciplinary research team, headed by Prof. FAN Chunhai from the CAS Shanghai Institute of Applied Physics, Prof. HE Lin, a CAS Member, and Prof. ZHANG Zhizhou at the Bio-X Research Center under Shanghai Jiao Tong University (SJTU), succeeded in developing a new type of logical gates by applying the deoxyribozyme (DNAzyme), adding a new brick to the groundwork of a DNA-based computation. The related research results have been reported on the German journal Angew. Chem. Int.Ed., 2006, 45, 1759.
Excitonic AND Logic Gates on DNA Brick Nanobreadboards
2015-01-01
A promising application of DNA self-assembly is the fabrication of chromophore-based excitonic devices. DNA brick assembly is a compelling method for creating programmable nanobreadboards on which chromophores may be rapidly and easily repositioned to prototype new excitonic devices, optimize device operation, and induce reversible switching. Using DNA nanobreadboards, we have demonstrated each of these functions through the construction and operation of two different excitonic AND logic gates. The modularity and high chromophore density achievable via this brick-based approach provide a viable path toward developing information processing and storage systems. PMID:25839049
Excitonic AND Logic Gates on DNA Brick Nanobreadboards.
Cannon, Brittany L; Kellis, Donald L; Davis, Paul H; Lee, Jeunghoon; Kuang, Wan; Hughes, William L; Graugnard, Elton; Yurke, Bernard; Knowlton, William B
2015-03-18
A promising application of DNA self-assembly is the fabrication of chromophore-based excitonic devices. DNA brick assembly is a compelling method for creating programmable nanobreadboards on which chromophores may be rapidly and easily repositioned to prototype new excitonic devices, optimize device operation, and induce reversible switching. Using DNA nanobreadboards, we have demonstrated each of these functions through the construction and operation of two different excitonic AND logic gates. The modularity and high chromophore density achievable via this brick-based approach provide a viable path toward developing information processing and storage systems.
Aptamer-Binding Directed DNA Origami Pattern for Logic Gates.
Yang, Jing; Jiang, Shuoxing; Liu, Xiangrong; Pan, Linqiang; Zhang, Cheng
2016-12-14
In this study, an aptamer-substrate strategy is introduced to control programmable DNA origami pattern. Combined with DNA aptamer-substrate binding and DNAzyme-cutting, small DNA tiles were specifically controlled to fill into the predesigned DNA origami frame. Here, a set of DNA logic gates (OR, YES, and AND) are performed in response to the stimuli of adenosine triphosphate (ATP) and cocaine. The experimental results are confirmed by AFM imaging and time-dependent fluorescence changes, demonstrating that the geometric patterns are regulated in a controllable and programmable manner. Our approach provides a new platform for engineering programmable origami nanopatterns and constructing complex DNA nanodevices.
Entanglement of Formation for Werner States and Isotropic States via Logical Gates
Bertini, Cesarino; Chiara, Maria Luisa Dalla; Leporini, Roberto
To what extent is a logical characterization of entanglement possible? We investigate some correlations that hold between the concept of entanglement of formation for Werner states and for isotropic states and the probabilistic behavior of some quantum logical gates.
Rational Design of a Fusion Protein to Exhibit Disulfide-Mediated Logic Gate Behavior
2015-01-01
Synthetic cellular logic gates are primarily built from gene circuits owing to their inherent modularity. Single proteins can also possess logic gate functions and offer the potential to be simpler, quicker, and less dependent on cellular resources than gene circuits. However, the design of protein logic gates that are modular and integrate with other cellular components is a considerable challenge. As a step toward addressing this challenge, we describe the design, construction, and characterization of AND, ORN, and YES logic gates built by introducing disulfide bonds into RG13, a fusion of maltose binding protein and TEM-1 β-lactamase for which maltose is an allosteric activator of enzyme activity. We rationally designed these disulfide bonds to manipulate RG13’s allosteric regulation mechanism such that the gating had maltose and reducing agents as input signals, and the gates could be toggled between different gating functions using redox agents, although some gates performed suboptimally. PMID:25144732
Parallel logic gates in synthetic gene networks induced by non-Gaussian noise.
Xu, Yong; Jin, Xiaoqin; Zhang, Huiqing
2013-11-01
The recent idea of logical stochastic resonance is verified in synthetic gene networks induced by non-Gaussian noise. We realize the switching between two kinds of logic gates under optimal moderate noise intensity by varying two different tunable parameters in a single gene network. Furthermore, in order to obtain more logic operations, thus providing additional information processing capacity, we obtain in a two-dimensional toggle switch model two complementary logic gates and realize the transformation between two logic gates via the methods of changing different parameters. These simulated results contribute to improve the computational power and functionality of the networks.
Orthogonal Ambipolar Semiconductor Nanostructures for Complementary Logic Gates.
Huang, Weiguo; Markwart, Jens C; Briseno, Alejandro L; Hayward, Ryan C
2016-09-27
We report orthogonal ambipolar semiconductors that exhibit hole and electron transport in perpendicular directions based on aligned films of nanocrystalline "shish-kebabs" containing poly(3-hexylthiophene) (P3HT) and N,N'-di-n-octyl-3,4,9,10-perylenetetracarboxylic diimide (PDI) as p- and n-type components, respectively. Polarized optical microscopy, scanning electron microscopy, and X-ray diffraction measurements reveal a high degree of in-plane alignment. Relying on the orientation of interdigitated electrodes to enable efficient charge transport from either the respective p- or n-channel materials, we demonstrate semiconductor films with high anisotropy in the sign of charge carriers. Films of these aligned crystalline semiconductors were used to fabricate complementary inverter devices, which exhibited good switching behavior and a high noise margin of 80% of 1/2 Vdd. Moreover, complementary "NAND" and "NOR" logic gates were fabricated and found to exhibit excellent voltage transfer characteristics and low static power consumption. The ability to optimize the performance of these devices, simply by adjusting the solution concentrations of P3HT and PDI, makes this a simple and versatile method for preparing ambipolar organic semiconductor devices and high-performance logic gates. Further, we demonstrate that this method can also be applied to mixtures of PDI with another conjugated polymer, poly[2,5-bis(3-tetradecylthiophen-2-yl)thieno[3,2-b]thiophene]) (PBTTT), with better hole transport characteristics than P3HT, opening the door to orthogonal ambipolar semiconductors with higher performance.
Implementation of Adaptive Digital Controllers on Programmable Logic Devices
Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Monenegro, Justino (Technical Monitor)
2002-01-01
Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment
Construction of a fuzzy and Boolean logic gates based on DNA.
Zadegan, Reza M; Jepsen, Mette D E; Hildebrandt, Lasse L; Birkedal, Victoria; Kjems, Jørgen
2015-04-17
Logic gates are devices that can perform logical operations by transforming a set of inputs into a predictable single detectable output. The hybridization properties, structure, and function of nucleic acids can be used to make DNA-based logic gates. These devices are important modules in molecular computing and biosensing. The ideal logic gate system should provide a wide selection of logical operations, and be integrable in multiple copies into more complex structures. Here we show the successful construction of a small DNA-based logic gate complex that produces fluorescent outputs corresponding to the operation of the six Boolean logic gates AND, NAND, OR, NOR, XOR, and XNOR. The logic gate complex is shown to work also when implemented in a three-dimensional DNA origami box structure, where it controlled the position of the lid in a closed or open position. Implementation of multiple microRNA sensitive DNA locks on one DNA origami box structure enabled fuzzy logical operation that allows biosensing of complex molecular signals. Integrating logic gates with DNA origami systems opens a vast avenue to applications in the fields of nanomedicine for diagnostics and therapeutics.
MOSFET-like CNFET based logic gate library for low-power application: a comparative study
Gowri Sankar, P. A.; Udhayakumar, K.
2014-07-01
The next generation of logic gate devices are expected to depend upon radically new technologies mainly due to the increasing difficulties and limitations of existing CMOS technology. MOSFET like CNFETs should ideally be the best devices to work with for high-performance VLSI. This paper presents results of a comprehensive comparative study of MOSFET-like carbon nanotube field effect transistors (CNFETs) technology based logic gate library for high-speed, low-power operation than conventional bulk CMOS libraries. It focuses on comparing four promising logic families namely: complementary-CMOS (C-CMOS), transmission gate (TG), complementary pass logic (CPL) and Domino logic (DL) styles are presented. Based on these logic styles, the proposed library of static and dynamic NAND-NOR logic gates, XOR, multiplexer and full adder functions are implemented efficiently and carefully analyzed with a test bench to measure propagation delay and power dissipation as a function of supply voltage. This analysis provides the right choice of logic style for low-power, high-speed applications. Proposed logic gates libraries are simulated using Synopsys HSPICE based on the standard 32 nm CNFET model. The simulation results demonstrate that, it is best to use C-CMOS logic style gates that are implemented in CNFET technology which are superior in performance compared to other logic styles, because of their low average power-delay-product (PDP). The analysis also demonstrates how the optimum supply voltage varies with logic styles in ultra-low power systems. The robustness of the proposed logic gate library is also compared with conventional and state-art of CMOS logic gate libraries.
Enzymatic AND logic gates operated under conditions characteristic of biomedical applications.
Melnikov, Dmitriy; Strack, Guinevere; Zhou, Jian; Windmiller, Joshua Ray; Halámek, Jan; Bocharova, Vera; Chuang, Min-Chieh; Santhosh, Padmanabhan; Privman, Vladimir; Wang, Joseph; Katz, Evgeny
2010-09-23
Experimental and theoretical analyses of the lactate dehydrogenase and glutathione reductase based enzymatic AND logic gates in which the enzymes and their substrates serve as logic inputs are performed. These two systems are examples of the novel, previously unexplored class of biochemical logic gates that illustrate potential biomedical applications of biochemical logic. They are characterized by input concentrations at logic 0 and 1 states corresponding to normal and pathophysiological conditions. Our analysis shows that the logic gates under investigation have similar noise characteristics. Both significantly amplify random noise present in inputs; however, we establish that for realistic widths of the input noise distributions, it is still possible to differentiate between the logic 0 and 1 states of the output. This indicates that reliable detection of pathophysiological conditions is indeed possible with such enzyme logic systems.
SDLDS--System for Digital Logic Design and Simulation
Stanisavljevic, Z.; Pavlovic, V.; Nikolic, B.; Djordjevic, J.
2013-01-01
This paper presents the basic features of a software system developed to support the teaching of digital logic, as well as the experience of using it in the Digital Logic course taught at the School of Electrical Engineering, University of Belgrade, Serbia. The system has been used for several years, both by students for self-learning and…
SDLDS--System for Digital Logic Design and Simulation
Stanisavljevic, Z.; Pavlovic, V.; Nikolic, B.; Djordjevic, J.
2013-01-01
This paper presents the basic features of a software system developed to support the teaching of digital logic, as well as the experience of using it in the Digital Logic course taught at the School of Electrical Engineering, University of Belgrade, Serbia. The system has been used for several years, both by students for self-learning and…
Two all-optical logic gates in a single photonic interferometer
Araújo, Antônio; Oliveira, Antônio; Martins, Francisco; Coelho, Amarílio; Fraga, Wilton; Nascimento, José
2015-11-01
In this paper is presented the all-optical AND and OR gates with high contrast ratio in a single interferometric configuration, i.e., when two logic signals are modulated in the input of the interferometer, so we have the OR gate in the first output and the AND gate in the second output. These logic gates were obtained by numerical investigation of the Mach-Zehnder interferometer constituted of dual-core nonlinear photonic crystal fiber operating with ultrashort fundamental solitons of 100 fs. To represent the logic information, pulse amplitude modulation by amplitude shift-keying was used.
Fuzzy Logic Enhanced Digital PIV Processing Software
Wernet, Mark P.
1999-01-01
Digital Particle Image Velocimetry (DPIV) is an instantaneous, planar velocity measurement technique that is ideally suited for studying transient flow phenomena in high speed turbomachinery. DPIV is being actively used at the NASA Glenn Research Center to study both stable and unstable operating conditions in a high speed centrifugal compressor. Commercial PIV systems are readily available which provide near real time feedback of the PIV image data quality. These commercial systems are well designed to facilitate the expedient acquisition of PIV image data. However, as with any general purpose system, these commercial PIV systems do not meet all of the data processing needs required for PIV image data reduction in our compressor research program. An in-house PIV PROCessing (PIVPROC) code has been developed for reducing PIV data. The PIVPROC software incorporates fuzzy logic data validation for maximum information recovery from PIV image data. PIVPROC enables combined cross-correlation/particle tracking wherein the highest possible spatial resolution velocity measurements are obtained.
Antibody activation using DNA-based logic gates.
Janssen, Brian M G; van Rosmalen, Martijn; van Beek, Lotte; Merkx, Maarten
2015-02-16
Oligonucleotide-based molecular circuits offer the exciting possibility to introduce autonomous signal processing in biomedicine, synthetic biology, and molecular diagnostics. Here we introduce bivalent peptide-DNA conjugates as generic, noncovalent, and easily applicable molecular locks that allow the control of antibody activity using toehold-mediated strand displacement reactions. Employing yeast as a cellular model system, reversible control of antibody targeting is demonstrated with low nM concentrations of peptide-DNA locks and oligonucleotide displacer strands. Introduction of two different toehold strands on the peptide-DNA lock allowed signal integration of two different inputs, yielding logic OR- and AND-gates. The range of molecular inputs could be further extended to protein-based triggers by using protein-binding aptamers. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Designing novel reversible BCD adder and parallel adder/subtraction using new reversible logic gates
Zhou, Rigui; Zhang, Manqun; Wu, Qian; Shi, Yang
2012-10-01
Reversible logic has received much attention in recent years when calculation with minimum energy consumption is considered. Especially, interest is sparked in reversible logic by its applications in some technologies, such as quantum computing, low-power CMOS design, optical information processing and nanotechnology. This article proposes two new reversible logic gates, ZRQ and NC. The first gate ZRQ not only implements all Boolean functions but also can be used to design optimised adder/subtraction architectures. One of the prominent functionalities of the proposed ZRQ gate is that it can work by itself as a reversible full adder/subtraction unit. The second gate NC can complete overflow detection logic of Binary Coded Decimal (BCD) adder. This article proposes two approaches to design novel reversible BCD adder using new reversible gates. A comparative result which is presented shows that the proposed designs are more optimised in terms of number of gates, garbage outputs, quantum costs and unit delays than the existing designs.
Devaraju, Naga Sai Gopi K; Unger, Marc A
2012-11-21
Advances in microfluidics now allow an unprecedented level of parallelization and integration of biochemical reactions. However, one challenge still faced by the field has been the complexity and cost of the control hardware: one external pressure signal has been required for each independently actuated set of valves on chip. Using a simple post-modification to the multilayer soft lithography fabrication process, we present a new implementation of digital fluidic logic fully analogous to electronic logic with significant performance advances over the previous implementations. We demonstrate a novel normally closed static gain valve capable of modulating pressure signals in a fashion analogous to an electronic transistor. We utilize these valves to build complex fluidic logic circuits capable of arbitrary control of flows by processing binary input signals (pressure (1) and atmosphere (0)). We demonstrate logic gates and devices including NOT, NAND and NOR gates, bi-stable flip-flops, gated flip-flops (latches), oscillators, self-driven peristaltic pumps, delay flip-flops, and a 12-bit shift register built using static gain valves. This fluidic logic shows cascade-ability, feedback, programmability, bi-stability, and autonomous control capability. This implementation of fluidic logic yields significantly smaller devices, higher clock rates, simple designs, easy fabrication, and integration into MSL microfluidics.
Enhanced architectures for room-temperature reversible logic gates in graphene
Dragoman, Daniela; Dragoman, Mircea
2014-09-01
We show that reversible two- and three-input logic gates, such as the universal Toffoli gate, can be implemented with three tilted gate electrodes patterned on a monolayer graphene flake. These reversible gates are based on the unique properties of ballistic charge carriers in graphene, which induce bandgaps in transmission for properly chosen potential barriers. The enhanced architectures for reversible logic gate implementation proposed in this paper offer a remarkable design simplification compared to standard approaches based on field-effect transistor circuits, as well as potential high-frequency operation.
Zhong, Dongzhou; Luo, Wei; Xu, Geliang
2016-09-01
Using the dynamical properties of the polarization bistability that depends on the detuning of the injected light, we propose a novel approach to implement reliable all-optical stochastic logic gates in the cascaded vertical cavity surface emitting lasers (VCSELs) with optical-injection. Here, two logic inputs are encoded in the detuning of the injected light from a tunable CW laser. The logic outputs are decoded from the two orthogonal polarization lights emitted from the optically injected VCSELs. For the same logic inputs, under electro-optic modulation, we perform various digital signal processing (NOT, AND, NAND, XOR, XNOR, OR, NOR) in the all-optical domain by controlling the logic operation of the applied electric field. Also we explore their delay storages by using the mechanism of the generalized chaotic synchronization. To quantify the reliabilities of these logic gates, we further demonstrate their success probabilities. Project supported by the National Natural Science Foundation of China (Grant No. 61475120) and the Innovative Projects in Guangdong Colleges and Universities, China (Grant Nos. 2014KTSCX134 and 2015KTSCX146).
Multi-enzyme logic network architectures for assessing injuries: digital processing of biomarkers.
Halámek, Jan; Bocharova, Vera; Chinnapareddy, Soujanya; Windmiller, Joshua Ray; Strack, Guinevere; Chuang, Min-Chieh; Zhou, Jian; Santhosh, Padmanabhan; Ramirez, Gabriela V; Arugula, Mary A; Wang, Joseph; Katz, Evgeny
2010-12-01
A multi-enzyme biocatalytic cascade processing simultaneously five biomarkers characteristic of traumatic brain injury (TBI) and soft tissue injury (STI) was developed. The system operates as a digital biosensor based on concerted function of 8 Boolean AND logic gates, resulting in the decision about the physiological conditions based on the logic analysis of complex patterns of the biomarkers. The system represents the first example of a multi-step/multi-enzyme biosensor with the built-in logic for the analysis of complex combinations of biochemical inputs. The approach is based on recent advances in enzyme-based biocomputing systems and the present paper demonstrates the potential applicability of biocomputing for developing novel digital biosensor networks.
Multiple Valued Logic for Synthesis and Simulation of Digital Circuits
Bharathi.S.L
2015-04-01
Full Text Available The Multiple valued logic(MVL has increased attention in the last decades because of the possibility to represent the information with more than two discrete levels.Advancing from two-valued to four-valued logic provides a progressive approach. In new technologies, the most delay and power occurs in the connections between gates. When designing a function using MVL, we need fewer gates,which implies less number of connections, then less delay. In the existing system, the 4:1 multiplexer is designed using the MVL logic and various paramaters are analysed. In the proposed system, the idea of designing a Barrel shifter using the multiple valued logic and the parameters are all analyzed. All these designs are verified using Modelsim simulator.
Bioelectronic Interface Connecting Reversible Logic Gates Based on Enzyme and DNA Reactions.
Guz, Nataliia; Fedotova, Tatiana A; Fratto, Brian E; Schlesinger, Orr; Alfonta, Lital; Kolpashchikov, Dmitry M; Katz, Evgeny
2016-07-18
It is believed that connecting biomolecular computation elements in complex networks of communicating molecules may eventually lead to a biocomputer that can be used for diagnostics and/or the cure of physiological and genetic disorders. Here, a bioelectronic interface based on biomolecule-modified electrodes has been designed to bridge reversible enzymatic logic gates with reversible DNA-based logic gates. The enzyme-based Fredkin gate with three input and three output signals was connected to the DNA-based Feynman gate with two input and two output signals-both representing logically reversible computing elements. In the reversible Fredkin gate, the routing of two data signals between two output channels was controlled by the control signal (third channel). The two data output signals generated by the Fredkin gate were directed toward two electrochemical flow cells, responding to the output signals by releasing DNA molecules that serve as the input signals for the next Feynman logic gate based on the DNA reacting cascade, producing, in turn, two final output signals. The Feynman gate operated as the controlled NOT gate (CNOT), where one of the input channels controlled a NOT operation on another channel. Both logic gates represented a highly sophisticated combination of input-controlled signal-routing logic operations, resulting in redirecting chemical signals in different channels and performing orchestrated computing processes. The biomolecular reaction cascade responsible for the signal processing was realized by moving the solution from one reacting cell to another, including the reacting flow cells and electrochemical flow cells, which were organized in a specific network mimicking electronic computing circuitries. The designed system represents the first example of high complexity biocomputing processes integrating enzyme and DNA reactions and performing logically reversible signal processing. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
A Review on Energy Efficient CMOS Digital Logic
B. L. Dokic
2013-12-01
Full Text Available Autonomy of power supply used in portable devices directly depends on energy efficiency of digital logic. This means that digital systems, beside high processing power and very complex functionality, must also have very low power consumption. Power consumption depends on many factors: system architecture, technology, basic cells topology-speed, and accuracy of assigned tasks. In this paper, a review and comparison of CMOS topologies techniques and operating modes is given, as CMOS technology is expected to be the optimum choice in the near future. It is shown that there is a full analogy in the behavior of digital circuits in sub-threshold and strong inversion. Therefore, synthesis of digital circuits is the same for both strong and weak operating modes. Analysis of the influence of the technology, MOS transistor threshold voltage (Vt and power supply voltage (Vdd on digital circuit power consumption and speed for both operating modes is given. It is shown that optimal power consumption (minimum power consumption for given speed depends on optimal choice of threshold, and power supply voltage. Multi Vdd /Vt techniques are analyzed as well. A review and analysis of alternative logical circuit's topologies – pass logic (PL, complementary pass logic (CPL, push-pull pass logic (PPL and adiabatic logic – is also given. As shown, adiabatic logic is the optimum choice regarding energy efficiency.
Acoustic logic gates and Boolean operation based on self-collimating acoustic beams
Zhang, Ting; Cheng, Ying; Guo, Jian-zhong; Xu, Jian-yi; Liu, Xiao-jun
2015-03-01
The reveal of self-collimation effect in two-dimensional (2D) photonic or acoustic crystals has opened up possibilities for signal manipulation. In this paper, we have proposed acoustic logic gates based on the linear interference of self-collimated beams in 2D sonic crystals (SCs) with line-defects. The line defects on the diagonal of the 2D square SCs are actually functioning as a 3 dB splitter. By adjusting the phase difference between two input signals, the basic Boolean logic functions such as XOR, OR, AND, and NOT are achieved both theoretically and experimentally. Due to the non-diffracting property of self-collimation beams, more complex Boolean logic and algorithms such as NAND, NOR, and XNOR can be realized by cascading the basic logic gates. The achievement of acoustic logic gates and Boolean operation provides a promising approach for acoustic signal computing and manipulations.
Acoustic logic gates and Boolean operation based on self-collimating acoustic beams
Zhang, Ting; Xu, Jian-yi [Key Laboratory of Modern Acoustics, Department of Physics and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093 (China); Cheng, Ying, E-mail: chengying@nju.edu.cn; Liu, Xiao-jun, E-mail: liuxiaojun@nju.edu.cn [Key Laboratory of Modern Acoustics, Department of Physics and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093 (China); State Key Laboratory of Acoustics, Chinese Academy of Sciences, Beijing 100190 (China); Guo, Jian-zhong [School of Physics and Information Technology, Shaanxi Normal University, Xian 710119 (China)
2015-03-16
The reveal of self-collimation effect in two-dimensional (2D) photonic or acoustic crystals has opened up possibilities for signal manipulation. In this paper, we have proposed acoustic logic gates based on the linear interference of self-collimated beams in 2D sonic crystals (SCs) with line-defects. The line defects on the diagonal of the 2D square SCs are actually functioning as a 3 dB splitter. By adjusting the phase difference between two input signals, the basic Boolean logic functions such as XOR, OR, AND, and NOT are achieved both theoretically and experimentally. Due to the non-diffracting property of self-collimation beams, more complex Boolean logic and algorithms such as NAND, NOR, and XNOR can be realized by cascading the basic logic gates. The achievement of acoustic logic gates and Boolean operation provides a promising approach for acoustic signal computing and manipulations.
Liang, Xiao; Binghe, Sun; Yueping, Ma; Ruyan, Zhao
2013-05-01
A digital spectrometer for low-field magnetic resonance imaging is described. A digital signal processor (DSP) is utilized as the pulse programmer on which a pulse sequence is executed as a subroutine. Field programmable gate array (FPGA) devices that are logically mapped into the external addressing space of the DSP work as auxiliary controllers of gradient control, radio frequency (rf) generation, and rf receiving separately. The pulse programmer triggers an event by setting the 32-bit control register of the corresponding FPGA, and then the FPGA automatically carries out the event function according to preset configurations in cooperation with other devices; accordingly, event control of the spectrometer is flexible and efficient. Digital techniques are in widespread use: gradient control is implemented in real-time by a FPGA; rf source is constructed using direct digital synthesis technique, and rf receiver is constructed using digital quadrature detection technique. Well-designed performance is achieved, including 1 μs time resolution of the gradient waveform, 1 μs time resolution of the soft pulse, and 2 MHz signal receiving bandwidth. Both rf synthesis and rf digitalization operate at the same 60 MHz clock, therefore, the frequency range of transmitting and receiving is from DC to ~27 MHz. A majority of pulse sequences have been developed, and the imaging performance of the spectrometer has been validated through a large number of experiments. Furthermore, the spectrometer is also suitable for relaxation measurement in nuclear magnetic resonance field.
Liang, Xiao; Binghe, Sun; Yueping, Ma; Ruyan, Zhao
2013-05-01
A digital spectrometer for low-field magnetic resonance imaging is described. A digital signal processor (DSP) is utilized as the pulse programmer on which a pulse sequence is executed as a subroutine. Field programmable gate array (FPGA) devices that are logically mapped into the external addressing space of the DSP work as auxiliary controllers of gradient control, radio frequency (rf) generation, and rf receiving separately. The pulse programmer triggers an event by setting the 32-bit control register of the corresponding FPGA, and then the FPGA automatically carries out the event function according to preset configurations in cooperation with other devices; accordingly, event control of the spectrometer is flexible and efficient. Digital techniques are in widespread use: gradient control is implemented in real-time by a FPGA; rf source is constructed using direct digital synthesis technique, and rf receiver is constructed using digital quadrature detection technique. Well-designed performance is achieved, including 1 μs time resolution of the gradient waveform, 1 μs time resolution of the soft pulse, and 2 MHz signal receiving bandwidth. Both rf synthesis and rf digitalization operate at the same 60 MHz clock, therefore, the frequency range of transmitting and receiving is from DC to ˜27 MHz. A majority of pulse sequences have been developed, and the imaging performance of the spectrometer has been validated through a large number of experiments. Furthermore, the spectrometer is also suitable for relaxation measurement in nuclear magnetic resonance field.
Complete all-optical processing polarization-based binary logic gates and optical processors.
Zaghloul, Y A; Zaghloul, A R M
2006-10-16
We present a complete all-optical-processing polarization-based binary-logic system, by which any logic gate or processor can be implemented. Following the new polarization-based logic presented in [Opt. Express 14, 7253 (2006)], we develop a new parallel processing technique that allows for the creation of all-optical-processing gates that produce a unique output either logic 1 or 0 only once in a truth table, and those that do not. This representation allows for the implementation of simple unforced OR, AND, XOR, XNOR, inverter, and more importantly NAND and NOR gates that can be used independently to represent any Boolean expression or function. In addition, the concept of a generalized gate is presented which opens the door for reconfigurable optical processors and programmable optical logic gates. Furthermore, the new design is completely compatible with the old one presented in [Opt. Express 14, 7253 (2006)], and with current semiconductor based devices. The gates can be cascaded, where the information is always on the laser beam. The polarization of the beam, and not its intensity, carries the information. The new methodology allows for the creation of multiple-input-multiple-output processors that implement, by itself, any Boolean function, such as specialized or non-specialized microprocessors. Three all-optical architectures are presented: orthoparallel optical logic architecture for all known and unknown binary gates, singlebranch architecture for only XOR and XNOR gates, and the railroad (RR) architecture for polarization optical processors (POP). All the control inputs are applied simultaneously leading to a single time lag which leads to a very-fast and glitch-immune POP. A simple and easy-to-follow step-by-step algorithm is provided for the POP, and design reduction methodologies are briefly discussed. The algorithm lends itself systematically to software programming and computer-assisted design. As examples, designs of all binary gates, multiple
Design of a novel RTD-based three-variable universal logic gate
Mao-qun YAO; Kai YANG; Cong-yuan XU; Ji-zhong SHEN
2015-01-01
Traditional CMOS technology faces some fundamental physical limitations. Therefore, it has become very important for the integrated circuit industry to continue to develop modern devices and new design methods. The threshold logic gate has attracted much attention because of its powerful logic function. The resonant tunneling diode (RTD) is well suited for imple-menting the threshold logic gate because of its high-speed switching capability, negative differential resistance (NDR) charac-teristic, and functional versatility. In this paper, based on the Reed-Muller (RM) algebraic system, a novel method is proposed to convert three-variable non-threshold functions to the XOR of multiple threshold functions, which is simple and has a program-mable implementation. With this approach, all three-variable non-threshold functions can be presented by the XOR of two threshold functions, except for two special functions. On this basis, a novel three-variable universal logic gate (ULG3) is proposed, composed of two RTD-based universal threshold logic gates (UTLG) and an RTD-based three-variable XOR gate (XOR3). The ULG3 has a simple structure, and a simple method is presented to implement all three-variable functions using one ULG3. Thus, the proposed ULG3 provides a new efficient universal logic gate to implement RTD-based arbitrary n-variable functions.
VENKATESH P R; VENKATESAN A; LAKSHMANAN M
2016-06-01
The idea of synchronization can be explicitly demonstrated by both numerical and analytical means on a nonlinear electronic circuit. Also, we introduce a scheme to obtain various logic gate structures, using synchronization of chaotic systems. By a small change in the response parameter of unidirectionally coupled nonlinear systems, one is able to construct various logic behaviours by both numerical and analytical methods.
Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata.
Bahar, Ali Newaz; Rahman, Mohammad Maksudur; Nahid, Nur Mohammad; Hassan, Md Kamrul
2017-02-01
This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T=2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed.
Logic gates scheme based on Coulomb blockade in metallic nanoclusters with organic ligands
Cervera, Javier [Facultat de Fisica, Universitat de Valencia, E-46100 Burjassot (Spain); Ramirez, Patricio [Depto. de Fisica Aplicada, Universidad Politecnica de Valencia, E-46022 Valencia (Spain); Mafe, Salvador, E-mail: smafe@uv.e [Facultat de Fisica, Universitat de Valencia, E-46100 Burjassot (Spain)
2010-01-11
We propose a logic gates scheme based on the electron transfer through metallic nanoclusters linked to organic ligands and discuss theoretically the characteristics needed for practical implementation. As a proof-of-the-concept, we demonstrate the OR, AND and NOT gates and study the performance in terms of temperature, applied voltage, and noise.
DARKO STEFANOVIC
2003-05-01
Full Text Available We recently reported the first complete set of molecular-scale logic gates based on deoxyribozymes. Here we report how we tile these logic gates and construct new logic elements: OR, NAND, and the first element with four inputs (i1^i5Ú(i2^i6. Tiling of logic gates was achieved through a common substrate used for core deoxyribozyme; degradation of this substrate defines the output. This kind of connection between logic gates is an implicit-OR tiling, because it suffices that one componenet of the network is active for the whole network to give an output of 1.
Yu, Ruomeng; Wu, Wenzhuo; Pan, Caofeng; Wang, Zhaona; Ding, Yong; Wang, Zhong Lin
2015-02-04
Using polarization charges created at the metal-cadmium sulfide interface under strain to gate/modulate electrical transport and optoelectronic processes of charge carriers, the piezo-phototronic effect is applied to process mechanical and optical stimuli into electronic controlling signals. The cascade nanowire networks are demonstrated for achieving logic gates, binary computations, and gated D latches to store information carried by these stimuli.
Probing Dense Sprays with Gated, Picosecond, Digital Particle Field Holography
James Trolinger
2011-12-01
Full Text Available This paper describes work that demonstrated the feasibility of producing a gated digital holography system that is capable of producing high-resolution images of three-dimensional particle and structure details deep within dense particle fields of a spray. We developed a gated picosecond digital holocamera, using optical Kerr cell gating, to demonstrate features of gated digital holography that make it an exceptional candidate for this application. The Kerr cell gate shuttered the camera after the initial burst of ballistic and snake photons had been recorded, suppressing longer path, multiple scattered illumination. By starting with a CW laser without gating and then incorporating a picosecond laser and an optical Kerr gate, we were able to assess the imaging quality of the gated holograms, and determine improvement gained by gating. We produced high quality images of 50–200 μm diameter particles, hairs and USAF resolution charts from digital holograms recorded through turbid media where more than 98% of the light was scattered from the field. The system can gate pulses as short as 3 mm in pathlength (10 ps, enabling image-improving features of the system. The experiments lead us to the conclusion that this method has an excellent capability as a diagnostics tool in dense spray combustion research.
Singla, Pradeep
2012-01-01
This paper present the research work directed towards the design of reversible programmable logic array using very high speed integrated circuit hardware description language (VHDL). Reversible logic circuits have significant importance in bioinformatics, optical information processing, CMOS design etc. In this paper the authors propose the design of new RPLA using Feynman & MUX gate.VHDL based codes of reversible gates with simulating results are shown .This proposed RPLA may be further used to design any reversible logic function or Boolean function (Adder, subtractor etc.) which dissipate very low or ideally no heat.
The mathematics of a quantum Hamiltonian computing half adder Boolean logic gate.
Dridi, G; Julien, R; Hliwa, M; Joachim, C
2015-08-28
The mathematics behind the quantum Hamiltonian computing (QHC) approach of designing Boolean logic gates with a quantum system are given. Using the quantum eigenvalue repulsion effect, the QHC AND, NAND, OR, NOR, XOR, and NXOR Hamiltonian Boolean matrices are constructed. This is applied to the construction of a QHC half adder Hamiltonian matrix requiring only six quantum states to fullfil a half Boolean logical truth table. The QHC design rules open a nano-architectronic way of constructing Boolean logic gates inside a single molecule or atom by atom at the surface of a passivated semi-conductor.
Fundamental Approach in Digital Circuit Design for 1-MHz Frequency PWM Gate Drive Application
Nor Zaihar Yahaya
2011-01-01
Full Text Available This paper discusses the design of a digital programmable logic circuit to produce a 5 V - output square wave pulses for four high power MOSFET switches using a fixed PWM circuit. It will be applied to drive the synchronous rectifier buck converter(SRBC circuit. The PWM signals with multiple fixed time delay of 15 ns, 232 ns, 284 ns and 955 ns are generated. The steps taken to analyze each propagation time delay of each logic gate used and its combination are carefully studied. A multiplexer is added at the output of the logic circuit to select and produce the desired output pulses of 20% duty ratio. The logic outputs are compared with the analog pulses and results match each other within 1% in difference.
All-optical logic-gates based on bacteriorhodopsin film
Chen Gui-Ying; Zhang Chun-Ping; Guo Zong-Xia; Tian Jian-Guo; Zhang Guang-Yin; Song Qi-Wang
2005-01-01
Based on self-diffraction in bacteriorhodopsin (bR) film, we propose all-optical NOT, XOR, half adder and XNOR logic operations. Using the relation between diffraction light and the polarization states of recording beams, we demonstrate NOT and XNOR logic operations. Studying the relation of polarization states among the diffracting, recording and reading beams, we implement XOR logic and half adder operations with three inputs. The methods are simple and practicable.
Nonlinear dynamics based digital logic and circuits.
Kia, Behnam; Lindner, John F; Ditto, William L
2015-01-01
We discuss the role and importance of dynamics in the brain and biological neural networks and argue that dynamics is one of the main missing elements in conventional Boolean logic and circuits. We summarize a simple dynamics based computing method, and categorize different techniques that we have introduced to realize logic, functionality, and programmability. We discuss the role and importance of coupled dynamics in networks of biological excitable cells, and then review our simple coupled dynamics based method for computing. In this paper, for the first time, we show how dynamics can be used and programmed to implement computation in any given base, including but not limited to base two.
Realization of morphing logic gates in a repressilator with quorum sensing feedback
Agrawal, Vidit; Kang, Shivpal Singh; Sinha, Sudeshna
2014-03-01
We demonstrate how a genetic ring oscillator network with quorum sensing feedback can operate as a robust logic gate. Specifically we show how a range of logic functions, namely AND/NAND, OR/NOR and XOR/XNOR, can be realized by the system, thus yielding a versatile unit that can morph between different logic operations. We further demonstrate the capacity of this system to yield complementary logic operations in parallel. Our results then indicate the computing potential of this biological system, and may lead to bio-inspired computing devices.
Fluorescent nanoparticle beacon for logic gate operation regulated by strand displacement.
Yang, Jing; Shen, Lingjing; Ma, Jingjing; Schlaberg, H Inaki; Liu, Shi; Xu, Jin; Zhang, Cheng
2013-06-26
A mechanism is developed to construct a logic system by employing DNA/gold nanoparticle (AuNP) conjugates as a basic work unit, utilizing a fluorescent beacon probe to detect output signals. To implement the logic circuit, a self-assembly DNA structure is attached onto nanoparticles to form the fluorescent beacon. Moreover, assisted by regulation of multilevel strand displacement, cascaded logic gates are achieved. The computing results are detected by methods using fluorescent signals, gel electrophoresis and transmission electron microscope (TEM). This work is expected to demonstrate the feasibility of the cascaded logic system based on fluorescent nanoparticle beacons, suggesting applications in DNA computation and biotechnology.
Realization of Morphing Logic Gates in a Repressilator with Quorum Sensing Feedback
Agrawal, Vidit; Sinha, Sudeshna
2013-01-01
We demonstrate how a genetic ring oscillator network with quorum sensing feedback can operate as a robust logic gate. Specifically we show how a range of logic functions, namely AND/NAND, OR/NOR and XOR/XNOR, can be realized by the system, thus yielding a versatile unit that can morph between different logic operations. We further demonstrate the capacity of this system to yield complementary logic operations in parallel. Our results then indicate the computing potential of this biological system, and may lead to bio-inspired computing devices.
The Logic of Digital Platform Disruption
Kazan, Erol; Tan, Chee-Wee; Lim, Eric T. K.
Digital platforms are disruptive IT artifacts, because they facilitate the quick release of innovative platform derivatives from third parties (e.g., apps). This study endeavours to unravel the disruptive potential, caused by distinct designs and configurations of digital platforms on market...... environments. We postulate that the disruptive potential of digital platforms is determined by the degree of alignment among the business, technology and platform profiles. Furthermore, we argue that the design and configuration of the aforementioned three elements dictates the extent to which open innovation...... is permitted. To shed light on the disruptive potential of digital platforms, we opted for payment platforms as our unit of analysis. Through interviews with experts and payment providers, we seek to gain an in-depth appreciation of how contemporary digital payment platforms are designed and configured...
The Logic of Digital Platform Disruption
Kazan, Erol; Tan, Chee-Wee; Lim, Eric T. K.
Digital platforms are disruptive IT artifacts, because they facilitate the quick release of innovative platform derivatives from third parties (e.g., apps). This study endeavours to unravel the disruptive potential, caused by distinct designs and configurations of digital platforms on market...... environments. We postulate that the disruptive potential of digital platforms is determined by the degree of alignment among the business, technology and platform profiles. Furthermore, we argue that the design and configuration of the aforementioned three elements dictates the extent to which open innovation...... is permitted. To shed light on the disruptive potential of digital platforms, we opted for payment platforms as our unit of analysis. Through interviews with experts and payment providers, we seek to gain an in-depth appreciation of how contemporary digital payment platforms are designed and configured...
Gated Clock Implementation of Arithmetic Logic Unit (ALU
Dr. Neelam R. Prakash
2013-05-01
Full Text Available Low power design has emerged as one of the challenging area in today’s ASIC (Application specific integrated circuit design. With continuous decrease in transistor size, power density is increasing and there is an urgent need for reduction in total power consumption. Clock gating is one most effective technique for low power synchronous circuit design. Clock gating technique in low power design is used to reduce the dynamic power consumption. Clock signal in a synchronous circuit is used for synchronization only and hence does not carry any important information. Since clock is applied to each block of a synchronous circuit, and clock switches for every cycle, clock power is the major part of dynamic power consumption in synchronous circuits. Clock gating is a well known technique to reduce clock power. In clock gating clock to an idle block is disabled. Thus significant amount of power consumption is reduced by employing clock gating. In this paper an ALU design is proposed employing Gated clock for its operation. Design simulation has been performed on Xilinx ISE design suite, and power calculation is done by Xilinx Xpower analyzer. Results show that approximately 17% of total clock power consumption is reduced by gated clock implementation.
Terahertz all-optical NOR and AND logic gates based on 2D photonic crystals
Parandin, Fariborz; Karkhanehchi, Mohammad Mehdi
2017-01-01
Usually, photonic crystals are used in designing optical logic gates. This study focuses on the design and simulation of an all optical NOR and AND logic gates based on two dimensional photonic crystals. The simplicity of the proposed structure is a characteristic feature of this designation. Finite Difference Time Domain (FDTD) as well as Plane Wave Expansion (PWE) methods have been used for this structural analysis. The simulation results revealed an increase in the interval between "zero" and "one" logic levels. Also, the simple structure and its small size demonstrate the usefulness of this structure in optical integrated circuits. The proposed optical gates can operate with a bit rate of about 1.54 Tbit/s.
High-order noise filtering in nontrivial quantum logic gates
Green, T
2012-07-01
Full Text Available Treating the effects of a time-dependent classical dephasing environment during quantum logic operations poses a theoretical challenge, as the application of noncommuting control operations gives rise to both dephasing and depolarization errors...
DESIGN OF TWO-PHASE SINUSOIDAL POWER CLOCK AND CLOCKED TRANSMISSION GATE ADIABATIC LOGIC CIRCUIT
Wang Pengjun; Yu Junjun
2007-01-01
First the research is conducted on the design of the two-phase sinusoidal power clock generator in this paper. Then the design of the new adiabatic logic circuit adopting the two-phase sinusoidal power clocks-Clocked Transmission Gate Adiabatic Logic (CTGAL) circuit is presented. This circuit makes use of the clocked transmission gates to sample the input signals, then the output loads are charged and discharged in a fully adiabatic manner by using bootstrapped N-Channel Metal Oxide Semiconductor (NMOS) and Complementary Metal Oxide Semiconductor (CMOS) latch structure.Finally, with the parameters of Taiwan Semiconductor Manufacturing Company (TSMC) 0.25 μm CMOS device, the transient energy consumption of CTGAL, Bootstrap Charge-Recovery Logic (BCRL)and Pass-transistor Adiabatic Logic (PAL) including their clock generators is simulated. The simulation result indicates that CTGAL circuit has the characteristic of remarkably low energy consumption.
Serial DNA relay in DNA logic gates by electrical fusion and mechanical splitting of droplets
Kawano, Ryuji; Takinoue, Masahiro; Osaki, Toshihisa; Kamiya, Koki; Miki, Norihisa
2017-01-01
DNA logic circuits utilizing DNA hybridization and/or enzymatic reactions have drawn increasing attention for their potential applications in the diagnosis and treatment of cellular diseases. The compartmentalization of such a system into a microdroplet considerably helps to precisely regulate local interactions and reactions between molecules. In this study, we introduced a relay approach for enabling the transfer of DNA from one droplet to another to implement multi-step sequential logic operations. We proposed electrical fusion and mechanical splitting of droplets to facilitate the DNA flow at the inputs, logic operation, output, and serial connection between two logic gates. We developed Negative-OR operations integrated by a serial connection of the OR gate and NOT gate incorporated in a series of droplets. The four types of input defined by the presence/absence of DNA in the input droplet pair were correctly reflected in the readout at the Negative-OR gate. The proposed approach potentially allows for serial and parallel logic operations that could be used for complex diagnostic applications. PMID:28700641
Hassan, Md Kamrul; Nahid, Nur Mohammad; Bahar, Ali Newaz; Bhuiyan, Mohammad Maksudur Rahman; Abdullah-Al-Shafi, Md; Ahmed, Kawsar
2017-08-01
Quantum-dot cellular automata (QCA) is a developing nanotechnology, which seems to be a good candidate to replace the conventional complementary metal-oxide-semiconductor (CMOS) technology. In this article, we present the dataset of average output polarization (AOP) for basic reversible logic gates presented in Ali Newaz et al. (2016) [1]. QCADesigner 2.0.3 has been employed to analysis the AOP of reversible gates at different temperature levels in Kelvin (K) unit.
Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata
Ali Newaz Bahar
2017-02-01
Full Text Available This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T=2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed.
Privman, Vladimir; Fratto, Brian E.; Zavalov, Oleksandr; Halamek, Jan; Katz, Evgeny
2013-01-01
We report a study of a system which involves an enzymatic cascade realizing an AND logic gate, with an added photochemical processing of the output allowing to make the gate's response sigmoid in both inputs. New functional forms are developed for quantifying the kinetics of such systems, specifically designed to model their response in terms of signal and information processing. These theoretical expressions are tested for the studied system, which also allows us to consider aspects of bioch...
Md. Kamrul Hassan
2017-08-01
Full Text Available Quantum-dot cellular automata (QCA is a developing nanotechnology, which seems to be a good candidate to replace the conventional complementary metal-oxide-semiconductor (CMOS technology. In this article, we present the dataset of average output polarization (AOP for basic reversible logic gates presented in Ali Newaz et al. (2016 [1]. QCADesigner 2.0.3 has been employed to analysis the AOP of reversible gates at different temperature levels in Kelvin (K unit.
Investigation of a simultaneous multifunctional photonic logic gate based on bidirectional FWM
Li, Lanlan; Lv, Tingting; Wu, Jian
2013-11-01
We demonstrate a multi-functional photonic logic gate for RZ-PolSK signals based on four wave mixing (FWM) in highly nonlinear fiber (HNLF). Bidirectional operation with one spool of HNLF is implemented numerically at 40 Gb/s. The basic logic arithmetics, such as XOR, AB¯,A¯B, XNOR, AND, NOR, and complex logic functions such as half-subtracter, half-adder, comparator and decoder are simultaneously realized by adjusting the polarization controllers. This novel structure is low-cost and rather flexible. Proper logic results, clear waveforms and high Q factors of eye diagrams are presented. Simulation analysis shows that bit error-free operation for the logic gate can be obtained when the wavelength separation is from -7 to 6 nm for two input signals. The impact of the input power on the Q factor is also investigated. Due to the femoto-second response time of Kerr-effect in HNLF we used in the scheme, the logic gate has great potential in future ultra-high speed optical transmission systems.
A smart gelator as a chemosensor: application to integrated logic gates in solution, gel, and film.
Xue, Pengchong; Lu, Ran; Jia, Junhui; Takafuji, Makoto; Ihara, Hirotaka
2012-03-19
A gelator that consisted of one benzimidazole moiety and four amide units was used as a chemosensor. We found that its absorption and emission spectra in solution were sensitive to two complementary chemical stimuli: protons and anions. Thus, YES and INH logic gates were obtained when absorbance was defined as an output. A combination gate of XNOR and AND with an emission output was also obtained. Moreover, wet gels in two solvents were used to construct two more-complicated three-input-three-output gates, owing to the existence of the gel phase as an additional output. Finally, in xerogel films that were formed from two kinds of wet gels, reversible changes in their emission spectra were observed when they were sequentially exposed to volatile acid and NH(3). Another combination two-output logic gate was obtained for xerogel films. Finally, three states of the gelator were used to construct not only basic logic gate, but also some combination gates because of their response to multiple chemical stimuli and their multiple output signals, in which one chemical input could erase the effect of another chemical input. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Chauhan, Chanderkanta; Bedi, Amna; Kumar, Santosh
2017-02-01
In this ultra fast computing era power optimization is a major technological challenge that requires new computing paradigms. Conservative and reversible logic opens up the possibility of ultralow power computing. In this paper, basic reversible logic gate (double Feynman gate) using the lithium-niobate based Mach-Zehnder interferometer is proposed. The results are verified using beam propagation method and MATLAB simulations.
Practical design of digital circuits basic logic to microprocessors
Kampel, Ian
1983-01-01
Practical Design of Digital Circuits: Basic Logic to Microprocessors demonstrates the practical aspects of digital circuit design. The intention is to give the reader sufficient confidence to embark upon his own design projects utilizing digital integrated circuits as soon as possible. The book is organized into three parts. Part 1 teaches the basic principles of practical design, and introduces the designer to his """"tools"""" - or rather, the range of devices that can be called upon. Part 2 shows the designer how to put these together into viable designs. It includes two detailed descriptio
Design of High Speed Low Power Reversible Logic Adder Using HNG Gate
Manjeet Singh Sankhwar,
2014-01-01
Full Text Available Reversibility plays a fundamental role when computations with minimal energy dissipation are considered. In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, optical information processing, quantum computing and nanotechnology. This research proposes a new implementation of adder in reversible logic. The design reduces the number of gate operations compared to the existing adder reversible logic implementations. So, this design gives rise to an implementation with a reduced area and delay. We can use it to construct more complex systems in nanotechnology.
Hur, Seung-Hyun; Yoon, Myung-Han; Gaur, Anshu; Shim, Moonsub; Facchetti, Antonio; Marks, Tobin J; Rogers, John A
2005-10-12
We report the implementation of three dimensionally cross-linked, organic nanodielectric multilayers as ultrathin gate dielectrics for a type of thin film transistor device that uses networks of single-walled carbon nanotubes as effective semiconductor thin films. Unipolar n- and p-channel devices are demonstrated by use of polymer coatings to control the behavior of the networks. Monolithically integrating these devices yields complementary logic gates. The organic multilayers provide exceptionally good gate dielectrics for these systems and allow for low voltage, low hysteresis operation. The excellent performance characteristics suggest that organic dielectrics of this general type could provide a promising path to SWNT-based thin film electronics.
Notes on stochastic (bio)-logic gates: computing with allosteric cooperativity.
Agliari, Elena; Altavilla, Matteo; Barra, Adriano; Dello Schiavo, Lorenzo; Katz, Evgeny
2015-05-15
Recent experimental breakthroughs have finally allowed to implement in-vitro reaction kinetics (the so called enzyme based logic) which code for two-inputs logic gates and mimic the stochastic AND (and NAND) as well as the stochastic OR (and NOR). This accomplishment, together with the already-known single-input gates (performing as YES and NOT), provides a logic base and paves the way to the development of powerful biotechnological devices. However, as biochemical systems are always affected by the presence of noise (e.g. thermal), standard logic is not the correct theoretical reference framework, rather we show that statistical mechanics can work for this scope: here we formulate a complete statistical mechanical description of the Monod-Wyman-Changeaux allosteric model for both single and double ligand systems, with the purpose of exploring their practical capabilities to express noisy logical operators and/or perform stochastic logical operations. Mixing statistical mechanics with logics, and testing quantitatively the resulting findings on the available biochemical data, we successfully revise the concept of cooperativity (and anti-cooperativity) for allosteric systems, with particular emphasis on its computational capabilities, the related ranges and scaling of the involved parameters and its differences with classical cooperativity (and anti-cooperativity).
Flip-Flops for accurate multiphase clocking: transmission gate versus current mode logic
Dutta, R.; Klumperink, Eric A.M.; Gao, X.; Ru, Z.; van der Zee, Ronan A.R.; Nauta, Bram
2013-01-01
Dynamic transmission gate (DTG) flip-flops (FFs) (DTG-FFs) and current mode logic (CML) FFs (CML-FFs) are compared targeting power efficient multiphase clock generation with low phase error. The effect of component mismatches on multiphase clock timing inaccuracies is modeled and compared, using the
Passive linear-optics 640 Gbit/s logic NOT gate
Maram, Reza; Kong, Deming; Galili, Michael;
2015-01-01
We experimentally demonstrate a 640 Gbit/s all-optical NOT gate for high-speed telecommunication on-off-keying (OOK) data signals. We employ linear optical signal processing based on spectral phase-only (all-pass) optical filtering to perform the target logic NOT operation....
A DNAzyme-mediated logic gate for programming molecular capture and release on DNA origami.
Li, Feiran; Chen, Haorong; Pan, Jing; Cha, Tae-Gon; Medintz, Igor L; Choi, Jong Hyun
2016-06-28
Here we design a DNA origami-based site-specific molecular capture and release platform operated by a DNAzyme-mediated logic gate process. We show the programmability and versatility of this platform with small molecules, proteins, and nanoparticles, which may also be controlled by external light signals.
Flip-Flops for accurate multiphase clocking: transmission gate versus current mode logic
Dutta, R.; Klumperink, E.A.M.; Gao, X.; Ru, Z.; Zee, van der R.A.R.; Nauta, B.
2013-01-01
Dynamic transmission gate (DTG) flip-flops (FFs) (DTG-FFs) and current mode logic (CML) FFs (CML-FFs) are compared targeting power efficient multiphase clock generation with low phase error. The effect of component mismatches on multiphase clock timing inaccuracies is modeled and compared, using the
Del Duce, A; Bayvel, P
2009-01-01
We analyse the design and optimisation of quantum logic circuits suitable for the experimental demonstration of a three-qubit quantum computation prototype based on optically-controlled, solid-state quantum logic gates. In these gates, the interaction between two qubits carried by the electron-spin of donors is mediated by the optical excitation of a control particle placed in their proximity. First, we use a geometrical approach for analysing the entangling characteristics of these quantum gates. Then, using a genetic programming algorithm, we develop circuits for the refined Deutsch-Jozsa algorithm investigating different strategies for obtaining short total computational times. We test two separate approaches based on using different sets of entangling gates with the shortest possible gate computation time which, however, does not introduce leakage of quantum information to the control particles. The first set exploits fast approximations of controlled-phase gates as entangling gates, while the other one a...
Fundamentals of digital logic and microcontrollers
Rafiquzzaman, M
2014-01-01
Reviews of the Fifth Edition:""...a well-established text for undergraduate and graduate students...a good reference for engineers."" (IEEE Circuits & Devices Magazine, November/December 2006)""...will serve very well for a number of courses in electrical and computing engineering...can also be used as a reference by practicing engineers who want to know about microcomputers."" (Computing Reviews.com, December 14, 2005)""Long recognized for its clear and simple presentation of the principles and basic tools required to design typical digital systems..."" (IEEE Computer Magazine, August 2005)W
Logic Gate Operation by DNA Translocation through Biological Nanopores.
Hiroki Yasuga
Full Text Available Logical operations using biological molecules, such as DNA computing or programmable diagnosis using DNA, have recently received attention. Challenges remain with respect to the development of such systems, including label-free output detection and the rapidity of operation. Here, we propose integration of biological nanopores with DNA molecules for development of a logical operating system. We configured outputs "1" and "0" as single-stranded DNA (ssDNA that is or is not translocated through a nanopore; unlabeled DNA was detected electrically. A negative-AND (NAND operation was successfully conducted within approximately 10 min, which is rapid compared with previous studies using unlabeled DNA. In addition, this operation was executed in a four-droplet network. DNA molecules and associated information were transferred among droplets via biological nanopores. This system would facilitate linking of molecules and electronic interfaces. Thus, it could be applied to molecular robotics, genetic engineering, and even medical diagnosis and treatment.
Wavelet analisys and HHG in nanorings Their applications in logic gates and memory mass devices
Cricchio, Dario
2015-01-01
We study the application of one nanoring driven by a laser field in different states of polarization in logic circuits. In particular we show that assigning boolean values to different state of the incident laser field and to the emitted signals, we can create logic gates such as OR, XOR and AND. We also show the possibility to make logic circuits such as half-adder and full-adder using one and two nanoring respectively. Using two nanorings we made the Toffoli gate. Finally we use the final angular momentum acquired by the electron to store information and hence show the possibility to use an array of nanorings as a mass memory device.
Accurate dynamic power estimation for CMOS combinational logic circuits with real gate delay model
Omnia S. Fadl
2016-01-01
Full Text Available Dynamic power estimation is essential in designing VLSI circuits where many parameters are involved but the only circuit parameter that is related to the circuit operation is the nodes’ toggle rate. This paper discusses a deterministic and fast method to estimate the dynamic power consumption for CMOS combinational logic circuits using gate-level descriptions based on the Logic Pictures concept to obtain the circuit nodes’ toggle rate. The delay model for the logic gates is the real-delay model. To validate the results, the method is applied to several circuits and compared against exhaustive, as well as Monte Carlo, simulations. The proposed technique was shown to save up to 96% processing time compared to exhaustive simulation.
A Survey Analysis on CMOS Integrated Circuits with Clock-Gated Logic Structure
PADMA KHARE
2014-09-01
Full Text Available Various circuit design techniques has been presented to improve noise tolerance of the proposed CGS logic families. Noise in deep submicron technology limits the reliability and performance of ICs. The ANTE (Average Noise Threshold Energy metric is used for the analysis of noise tolerance of proposed CGS. A 2- input NAND and NOR gate is designed by the proposed technique. Simulation results for a 2-input NAND gate at clock gated logic show that the proposed noise tolerant circuit achieves 1.79X ANTE improvement along with the reduction in leakage power. Continuous scaling of technology towards the manometer range significantly increases leakage current level and the effect of noise. This research can be further extended for performance optimization in terms of power, speed, area and noise immunity.
Genomic mining of prokaryotic repressors for orthogonal logic gates.
Stanton, Brynne C; Nielsen, Alec A K; Tamsir, Alvin; Clancy, Kevin; Peterson, Todd; Voigt, Christopher A
2014-02-01
Genetic circuits perform computational operations based on interactions between freely diffusing molecules within a cell. When transcription factors are combined to build a circuit, unintended interactions can disrupt its function. Here, we apply 'part mining' to build a library of 73 TetR-family repressors gleaned from prokaryotic genomes. The operators of a subset were determined using an in vitro method, and this information was used to build synthetic promoters. The promoters and repressors were screened for cross-reactions. Of these, 16 were identified that both strongly repress their cognate promoter (5- to 207-fold) and exhibit minimal interactions with other promoters. Each repressor-promoter pair was converted to a NOT gate and characterized. Used as a set of 16 NOT/NOR gates, there are >10(54) circuits that could be built by changing the pattern of input and output promoters. This represents a large set of compatible gates that can be used to construct user-defined circuits.
New low power adders in Self Resetting Logic with Gate Diffusion Input Technique
R. Uma
2017-04-01
Full Text Available The objective vividly defines a new low-power and high-speed logic family; named Self Resetting Logic with Gate Diffusion Input (SRLGDI. This logic family resolves the issues in dynamic circuits like charge sharing, charge leakage, short circuit power dissipation, monotonicity requirement and low output voltage. In the proposed design structure of SRLGDI, the pull down tree is implemented with Gate Diffusion Input (GDI with level restoration which apparently eliminated the conductance overlap between nMOS and pMOS devices, thereby reducing the short circuit power dissipation and providing High Output Voltage VoH. The output stage of SRLGDI has been incorporated with an inverter to produce both true and complementary output function. The Resistance Capacitance (RC delay model has been proposed to obtain the total delay of the circuit during precharge and evaluation phases. Using SRLGDI, the primitive cells and 3 different full adder circuits were designed and simulated in a 0.250 μm Complementary Metal Oxide Semiconductor (CMOS process technology. The simulated result demonstrates that the proposed SRLGDI logic family is superior in terms of speed and power consumption with respect to other logic families like Dynamic logic (DY, CMOS, Self Resetting CMOS (SRCMOS and GDI.
Enzyme-Based Logic Gates and Networks with Output Signals Analyzed by Various Methods.
Katz, Evgeny
2017-07-05
The paper overviews various methods that are used for the analysis of output signals generated by enzyme-based logic systems. The considered methods include optical techniques (optical absorbance, fluorescence spectroscopy, surface plasmon resonance), electrochemical techniques (cyclic voltammetry, potentiometry, impedance spectroscopy, conductivity measurements, use of field effect transistor devices, pH measurements), and various mechanoelectronic methods (using atomic force microscope, quartz crystal microbalance). Although each of the methods is well known for various bioanalytical applications, their use in combination with the biomolecular logic systems is rather new and sometimes not trivial. Many of the discussed methods have been combined with the use of signal-responsive materials to transduce and amplify biomolecular signals generated by the logic operations. Interfacing of biocomputing logic systems with electronics and "smart" signal-responsive materials allows logic operations be extended to actuation functions; for example, stimulating molecular release and switchable features of bioelectronic devices, such as biofuel cells. The purpose of this review article is to emphasize the broad variability of the bioanalytical systems applied for signal transduction in biocomputing processes. All bioanalytical systems discussed in the article are exemplified with specific logic gates and multi-gate networks realized with enzyme-based biocatalytic cascades. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
Implementation of quantum logic gates using coupled Bose-Einstein condensates
Luiz, F.S. [Universidade Federal de Sao Carlos (UFSCar), Sao Carlos, SP (Brazil). Departamento de Fisica; Duzzioni, E.I. [Universidade Federal de Santa Catarina (UFSC), Florianopolis, SC (Brazil). Departamento de Fisica; Sanz, L., E-mail: lsanz@infis.ufu.br [Universidade Federal de Uberlandia (UFU), MG (Brazil). Instituto de Fisica
2015-10-15
In this work, we are interested in the implementation of single-qubit gates on coupled Bose-Einstein condensates (BECs). The system, a feasible candidate for a qubit, consists of condensed atoms in different hyperfine levels coupled by a two-photon transition. It is well established that the dynamics of coupled BECs can be described by the two-mode Hamiltonian that takes into account the confinement potential of the trap and the effects of collisions associated with each condensate. Other effects, such as collisions between atoms belonging to different BECs and detuning, are included in this approach. We demonstrate how to implement two types of quantum logic gates: population-transfer gates (NOT, Ŷ, and Hadamard), which require a population inversion between hyperfine levels, and phase gates (Z{sup ^}, Ŝ and T{sup ^}), which require self-trapping. We also discuss the experimental feasibility by evaluating the robustness of quantum gates against variations of physical parameters outside of the ideal conditions for the implementation of each quantum logic gate. (author)
A psychometric evaluation of the digital logic concept inventory
Herman, Geoffrey L.; Zilles, Craig; Loui, Michael C.
2014-10-01
Concept inventories hold tremendous promise for promoting the rigorous evaluation of teaching methods that might remedy common student misconceptions and promote deep learning. The measurements from concept inventories can be trusted only if the concept inventories are evaluated both by expert feedback and statistical scrutiny (psychometric evaluation). Classical Test Theory and Item Response Theory provide two psychometric frameworks for evaluating the quality of assessment tools. We discuss how these theories can be applied to assessment tools generally and then apply them to the Digital Logic Concept Inventory (DLCI). We demonstrate that the DLCI is sufficiently reliable for research purposes when used in its entirety and as a post-course assessment of students' conceptual understanding of digital logic. The DLCI can also discriminate between students across a wide range of ability levels, providing the most information about weaker students' ability levels.
Analogue Building Blocks Based on Digital CMOS Gates
Mucha, Igor
1996-01-01
Low-performance analogue circuits built of digital MOS gates are presented. Depending on the threshold voltages of the technology used the final circuits can be operated using low supply voltages. The main advantage using the proposed circuits is the simplicity and ultimate compatibility with the......Low-performance analogue circuits built of digital MOS gates are presented. Depending on the threshold voltages of the technology used the final circuits can be operated using low supply voltages. The main advantage using the proposed circuits is the simplicity and ultimate compatibility...
Quantum logic gates using coherent population trapping states
Ashok Vudayagiri
2011-12-01
A scheme is proposed for achieving a controlled phase gate using interaction between atomic spin dipoles. Further, the spin states are prepared in coherent population trap states (CPTs), which are robust against perturbations, laser ﬂuctuations etc. We show that one-qubit and two-qubit operations can easily be obtained in this scheme. The scheme is also robust against decoherences due to spontaneous emissions as the CPT states used are dressed states formed out of Zeeman sublevels of ground states of the bare atom. However, certain practical issues are of concern in actually obtaining the scheme, which are also discussed at the end of this paper.
Exact Quantum Logic Gates with a Single Trapped Cold Ion
韦联福; 刘世勇; 雷啸霖
2001-01-01
We present an alternative scheme to exactly implement one-qubit and two-qubit quantum gates with a single trapped cold ion driven by a travelling laser field. The internal degree of freedom of the ion acts as the target qubit and the control qubit is encoded by two Fock states of the external vibration of the ion. The conditions to realize these operations, including the duration of each applied laser pulse and Lamb-Dicke parameter, are derived. In our scheme neither the auxiliary atomic level nor the Lamb-Dicke approximation is required. The multiquantum transition between the internal and external degrees of freedom of the ion is considered.
Orbach, Ron; Willner, Bilha; Willner, Itamar
2015-03-11
This feature article addresses the implementation of catalytic nucleic acids as functional units for the construction of logic gates and computing circuits, and discusses the future applications of these systems. The assembly of computational modules composed of DNAzymes has led to the operation of a universal set of logic gates, to field programmable logic gates and computing circuits, to the development of multiplexers/demultiplexers, and to full-adder systems. Also, DNAzyme cascades operating as logic gates and computing circuits were demonstrated. DNAzyme logic systems find important practical applications. These include the use of DNAzyme-based systems for sensing and multiplexed analyses, for the development of controlled release and drug delivery systems, for regulating intracellular biosynthetic pathways, and for the programmed synthesis and operation of cascades.
Efficient quantum computation in a network with probabilistic gates and logical encoding
Borregaard, J.; Sørensen, A. S.; Cirac, J. I.
2017-01-01
An approach to efficient quantum computation with probabilistic gates is proposed and analyzed in both a local and nonlocal setting. It combines heralded gates previously studied for atom or atomlike qubits with logical encoding from linear optical quantum computation in order to perform high......-fidelity quantum gates across a quantum network. The error-detecting properties of the heralded operations ensure high fidelity while the encoding makes it possible to correct for failed attempts such that deterministic and high-quality gates can be achieved. Importantly, this is robust to photon loss, which...... is typically the main obstacle to photonic-based quantum information processing. Overall this approach opens a path toward quantum networks with atomic nodes and photonic links....
Budyka, Mikhail F; Li, Vitalii M
2017-01-18
Using molecular logic gates (MLGs) for information processing attracts attention due to perspectives of creating molecular computers. Biphotochromic dyads are suitable models of photonic MLGs. However, they suffer from one weakness: the activity of one of the photochromes is often quenched because of Förster resonance energy transfer (FRET). Herein, we designed a dyad with reduced FRET, in which both photochromes keep their photoactivity thanks to spectral and spatial separation, allowing MLG switching between different states. This novel dyad reproduces the functionality of the full set of 16 two-input gates, as well a reversible gate-dual inverter, all gates are photonic. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
Gate contact resistive random access memory in nano scaled FinFET logic technologies
Hsu, Meng-Yin; Shih, Yi-Hong; Chih, Yue-Der; Lin, Chrong Jung; King, Ya-Chin
2017-04-01
A full logic-compatible embedded gate contact resistive random access memory (GC-RRAM) cell in the CMOS FinFET logic process without extra mask or processing steps has been successfully demonstrated for high-density and low-cost logic nonvolatile memory (NVM) applications. This novel GC-RRAM cell is composed of a transition metal oxide from the gate contact plug and interlayer dielectric (ILD) in the middle, and a gate contact and an n-type epitaxial drain terminal as the top and bottom electrodes, respectively. It features low-voltage operation and reset current, compact cell size, and a stable read window. As a promising embedded NVM solution, the compact one transistor and one resistor (1T1R) cell is highly scalable as the technology node progresses. Excellent data retention and cycling capability have also been demonstrated by the reliability testing results. These superior characteristics make GC-RRAM one of a few viable candidates for logic NVM for future FinFET circuits.
Rani, Preeti; Kalra, Yogita; Sinha, R. K.
2016-09-01
In this paper, we have reported design and analysis of polarization independent all optical logic gates in silicon-on-insulator photonic crystal consisting of two dimensional honeycomb lattices with two different air holes exhibiting photonic band gap for both TE and TM mode in the optical communication window. The proposed structures perform as an AND optical logic gate and all the optical logic gates based on the phenomenon of interference. The response period and bit rate for TE and TM polarizations at a wavelength of 1.55 μm show improved results as reported earlier.
Enzyme-based NAND and NOR logic gates with modular design.
Zhou, Jian; Arugula, Mary A; Halámek, Jan; Pita, Marcos; Katz, Evgeny
2009-12-10
The logic gates NAND/NOR were mimicked by enzyme biocatalyzed reactions activated by sucrose, maltose and phosphate. The subunits performing AND/OR Boolean logic operations were designed using maltose phosphorylase and cooperative work of invertase/amyloglucosidase, respectively. Glucose produced as the output signal from the AND/OR subunits was applied as the input signal for the INVERTER gate composed of alcohol dehydrogenase, glucose oxidase, microperoxidase-11, ethanol and NAD(+), which generated the final output in the form of NADH inverting the logic signal from 0 to 1 or from 1 to 0. The final output signal was amplified by a self-promoting biocatalytic system. In order to fulfill the Boolean properties of associativity and commutativity in logic networks, the final NADH output signal was converted to the initial signals of maltose and phosphate, thus allowing assembling of the same standard units in concatenated sequences. The designed modular approach, signal amplification and conversion processes open the way toward complex logic networks composed of standard elements resembling electronic integrated circuitries.
All-optical 10 Gb/s AND logic gate in a silicon microring resonator
Xiong, Meng; Lei, Lei; Ding, Yunhong
2013-01-01
An all-optical AND logic gate in a single silicon microring resonator is experimentally demonstrated at 10 Gb/s with 50% RZ-OOK signals. By setting the wavelengths of two intensity-modulated input pumps on the resonances of the microring resonator, field-enhanced four-wave mixing with a total inp...... power of only 8.5 dBm takes place in the ring, resulting in the generation of an idler whose intensity follows the logic operation between the pumps. Clear and open eye diagrams with a bit-error- ratio below 10−9 are achieved....
Privman, Vladimir; Fratto, Brian E; Zavalov, Oleksandr; Halámek, Jan; Katz, Evgeny
2013-06-27
We report a study of a system which involves an enzymatic cascade realizing an AND logic gate, with an added photochemical processing of the output, allowing the gate's response to be made sigmoid in both inputs. New functional forms are developed for quantifying the kinetics of such systems, specifically designed to model their response in terms of signal and information processing. These theoretical expressions are tested for the studied system, which also allows us to consider aspects of biochemical information processing such as noise transmission properties and control of timing of the chemical and physical steps.
Xia, Hongyan; Xu, Yangyang; Yang, Guang; Jiang, Hao; Zou, Gang; Zhang, Qijin
2014-02-01
Here, a novel multi-stimuli-responsive fluorescence probe is developed by incorporating spiropyran group into the coumarin-substituted polydiacetylene (PDA) vesicles. The fluorescence of PDA can be turned on upon heating, and can be quenched upon exposure to UV light irradiation or pH stimuli owing to the fluorescene resonance energy transfer (FRET) between the red-phase PDA and the open merocyanine (MC) form of spiropyran. Moreover, we have designed and experimentally realized a set of logic gate operations for the first time based on the fluorescence modulation of the designed system upon thermal, photo, and pH stimuli. This novel type of resettable logic gates augur well for practical applications in information storage, optical recording, and sensing in complicated microenvironments. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Generation of logic gates based on a photonic crystal fiber Michelson interferometer
Sousa, J. R. R.; Filho, A. F. G. F.; Ferreira, A. C.; Batista, G. S.; Sobrinho, C. S.; Bastos, A. M.; Lyra, M. L.; Sombra, A. S. B.
2014-07-01
We present a numerical investigation of all-optical logical gates based in a Michelson interferometer (MI) of micro structured fibers, also known as photonic crystal fibers (PCF). We considered an ultra-short pulse propagating along the system in three distinct regimes of pump power. We determine several relevant quantities to characterize the system performance such as transmission, extinction ratio and crosstalk as a function of the dephasing added to one of the Bragg gratings of the Michelson interferometer (MI). High-order effects, such as third-order dispersion, intrapulse Raman scattering and self-steepening were included in the nonlinear generalized Schrödinger equation governing the pulse propagation. Our results show that the proposed device can be used to obtain all-optical XOR, OR and NOT logic gates.
Quantum gate between logical qubits in decoherence-free subspace implemented with trapped ions
Ivanov, Peter A; Singer, Kilian; Schmidt-Kaler, Ferdinand
2009-01-01
We propose an efficient technique for the implementation of a geometric phase gate in a decoherence-free subspace with trapped ions. In this scheme, the quantum information is encoded in the Zeeman sublevels of the ground state and two physical qubits are used to make up one logical qubit with ultra long coherence time. The physical realization of a geometric phase gate between two logic qubits is performed with four ions in a linear crystal simultaneously interacting with single laser beam. We investigate in detail the robustness of the scheme with respect to the right choice of the trap frequency and provide a detailed analysis of error sources, taking into account the experimental conditions. Furthermore, possible applications for the generation of cluster states for larger numbers of ions within the decoherence-free subspace are presented.
A logic-gated nanorobot for targeted transport of molecular payloads.
Douglas, Shawn M; Bachelet, Ido; Church, George M
2012-02-17
We describe an autonomous DNA nanorobot capable of transporting molecular payloads to cells, sensing cell surface inputs for conditional, triggered activation, and reconfiguring its structure for payload delivery. The device can be loaded with a variety of materials in a highly organized fashion and is controlled by an aptamer-encoded logic gate, enabling it to respond to a wide array of cues. We implemented several different logical AND gates and demonstrate their efficacy in selective regulation of nanorobot function. As a proof of principle, nanorobots loaded with combinations of antibody fragments were used in two different types of cell-signaling stimulation in tissue culture. Our prototype could inspire new designs with different selectivities and biologically active payloads for cell-targeting tasks.
Reduction of Power Dissipation in Dynamic BiCMOS Logic Gates by Transistor Reordering
S. M. Rezaul Hasan; Yufridin Wahab
2002-01-01
This paper explores the deterministic transistor reordering in low-voltage dynamic BiCMOS logic gates, for reducing the dynamic power dissipation. The constraints of load driving (discharging) capability and NPN turn-on delay for MOSFET reordered structures has been carefully considered. Simulations shows significant reduction in the dynamic power dissipation for the transistor reordered BiCMOS structures. The power-delay product figure-of-merit is found to be significantly enhanced without a...
Wu, Shing-Trong; Fuh, Andy Ying-Guey; Ho, Shau-Jung; Li, Ming-Shian
2015-03-01
This study investigates the bichromatic tuning of cholesteric liquid crystal (CLC) reflection bands from reflectors containing chiral azo dopants. Because the chiral azo molecules change their helical twist power in reversible photoisomerization, the reflection bands of the CLCs are modulated using purple and green laser beams. The CLC reflectors are integrated into an optical gate that can be used to modulate output spectra. We also apply the integrated system in optical switching and logic.
Fan, Kaiqi; Yang, Jun; Wang, Xiaobo; Song, Jian
2014-11-07
A gelator containing a sorbitol moiety and a naphthalene-based salicylideneaniline group exhibits macroscopic gel-sol behavior in response to four complementary input stimuli: temperature, UV light, OH(-), and Cu(2+). On the basis of its multiple-stimuli responsive properties, we constructed a rational gel-based supramolecular logic gate that performed OR and INH types of reversible stimulus responsive gel-sol transition in the presence of various combinations of the four stimuli when the gel state was defined as an output. Moreover, a combination two-output logic gate was obtained, owing to the existence of the naked eye as an additional output. Hence, gelator 1 could construct not only a basic logic gate, but also a two-input-two-output logic gate because of its response to multiple chemical stimuli and multiple output signals, in which one input could erase the effect of another input.
An organic jelly made fractal logic gate with an infinite truth table
Ghosh, Subrata; Fujita, Daisuke; Bandyopadhyay, Anirban
2015-06-01
Widely varying logic gates invented over a century are all finite. As data deluge problem looms large on the information processing and communication industry, the thrust to explore radical concepts is increasing rapidly. Here, we design and synthesis a molecule, wherein, the input energy transmits in a cycle inside the molecular system, just like an oscillator, then, we use the molecule to make a jelly that acts as chain of oscillators with a fractal like resonance band. Hence, with the increasing detection resolution, in the vacant space between two energy levels of a given resonance band, a new band appears, due to fractal nature, generation of newer energy levels never stops. This is natural property of a linear chain oscillator. As we correlate each energy level of the resonance band of organic jelly, as a function of pH and density of the jelly, we realize a logic gate, whose truth table is finite, but if we zoom any small part, a new truth table appears. In principle, zooming of truth table would continue forever. Thus, we invent a new class of infinite logic gate for the first time.
Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations
Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki
2016-01-01
Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.
Zhang, Ting; Cheng, Ying; Yuan, Bao-Guo; Guo, Jian-Zhong; Liu, Xiao-Jun
2016-05-01
The extraordinary transmission in density-near-zero (DNZ) acoustic metamaterials (AMs) provides possibilities to manipulate acoustic signals with extremely large effective phase velocity and wavelength. Here, we report compact transformable acoustic logic gates with a subwavelength size as small as 0.82λ based on DNZ AMs. The basic acoustic logic gates, composed of a tri-port structure filled with space-coiling DNZ AMs, enable precise direct linear interference of input signals with considerably small phase lag and wavefront distortion. We demonstrate both theoretically and experimentally the basic Boolean logic operations such as OR, AND, XOR, and NOT with wide operational frequency ranges and controllability, by adjusting the phase difference between two input signals. More complex logic calculus, such as "I1 + I2 × I3," are also realized by cascading of the basic logic gates. Our proposal provides diverse routes to construct devices for acoustic signal computing and manipulations.
Pu, Fang; Ren, Jinsong; Qu, Xiaogang
2014-06-25
Molecular logic gates in response to chemical, biological, or optical input signals at a molecular level have received much interest over the past decade. Herein, we construct "plug and play" logic systems based on the fluorescence switching of guest molecules confined in coordination polymer nanoparticles generated from nucleotide and lanthanide ions. In the system, the addition of new modules directly enables new logic functions. PASS 0, YES, PASS 1, NOT, IMP, OR, and AND gates are successfully constructed in sequence. Moreover, different logic gates (AND, INH, and IMP) can be constructed using different guest molecules and the same input combinations. The work will be beneficial to the future logic design and expand the applications of coordination polymers.
Fratto, Brian E; Katz, Evgeny
2015-05-18
Reversible logic gates, such as the double Feynman gate, Toffoli gate and Peres gate, with 3-input/3-output channels are realized using reactions biocatalyzed with enzymes and performed in flow systems. The flow devices are constructed using a modular approach, where each flow cell is modified with one enzyme that biocatalyzes one chemical reaction. The multi-step processes mimicking the reversible logic gates are organized by combining the biocatalytic cells in different networks. This work emphasizes logical but not physical reversibility of the constructed systems. Their advantages and disadvantages are discussed and potential use in biosensing systems, rather than in computing devices, is suggested. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Possibility designing XNOR and NAND molecular logic gates by using single benzene ring
Abbas, Mohammed A.; Hanoon, Falah H.; Al-Badry, Lafy F.
2017-09-01
This study focused on examining electronic transport through single benzene ring and suggested how such ring can be employed to design XNOR and NAND molecular logic gates. The single benzene ring was threaded by a magnetic flux. The magnetic flux and applied gate voltages were considered as the key tuning parameter in the XNOR and NAND gates operation. All the calculations are achieved by using steady-state theoretical model, which is based on the time-dependent Hamiltonian model. The transmission probability and the electric current are calculated as functions of electron energy and bias voltage, respectively. The application of the anticipated results can be a base for the progress of molecular electronics.
Quantum logic gates with two-level trapped ions beyond Lamb-Dicke limit
Zheng Xiao-Juan; Luo Yi-Min; Cai Jian-Wu
2009-01-01
In the system with two two-level ions confined in a linear trap,this paper presents a simple scheme to realize the quantum phase gate(QPG)and the swap gate beyond the Lamb-Dicke(LD)limit.These two-qubit quantum logic gates only involve the internal states of two trapped ions.The scheme does not use the vibrational mode as the data bus and only requires a single resonant interaction of the ions with the lasers.Neither the LD approximation nor the auxiliary atomic level is needed in the proposed scheme.Thus the scheme is simple and the interaction time is very short,which is important in view of decoherence.The experimental feasibility for achieving this scheme is also discussed.
Energy-Efficient and Secure S-Box circuit using Symmetric Pass Gate Adiabatic Logic
Kumar, Dinesh [University of Kentucky, Lexington; Thapliyal, Himanshu [ORNL; Mohammad, Azhar [University of Kentucky, Lexington; Singh, Vijay [University of Kentucky, Lexington; Perumalla, Kalyan S [ORNL
2016-01-01
Differential Power Analysis (DPA) attack is considered to be a main threat while designing cryptographic processors. In cryptographic algorithms like DES and AES, S-Box is used to indeterminate the relationship between the keys and the cipher texts. However, S-box is prone to DPA attack due to its high power consumption. In this paper, we are implementing an energy-efficient 8-bit S-Box circuit using our proposed Symmetric Pass Gate Adiabatic Logic (SPGAL). SPGAL is energy-efficient as compared to the existing DPAresistant adiabatic and non-adiabatic logic families. SPGAL is energy-efficient due to reduction of non-adiabatic loss during the evaluate phase of the outputs. Further, the S-Box circuit implemented using SPGAL is resistant to DPA attacks. The results are verified through SPICE simulations in 180nm technology. SPICE simulations show that the SPGAL based S-Box circuit saves upto 92% and 67% of energy as compared to the conventional CMOS and Secured Quasi-Adiabatic Logic (SQAL) based S-Box circuit. From the simulation results, it is evident that the SPGAL based circuits are energy-efficient as compared to the existing DPAresistant adiabatic and non-adiabatic logic families. In nutshell, SPGAL based gates can be used to build secure hardware for lowpower portable electronic devices and Internet-of-Things (IoT) based electronic devices.
Design of High-Performance Asynchronous Pipeline Using Synchronizing Logic Gates
Xia, Zhengfan; Ishihara, Shota; Hariyama, Masanori; Kameyama, Michitaka
This paper introduces a novel design method of an asynchronous pipeline based on dual-rail dynamic logic. The overhead of handshake control logic is greatly reduced by constructing a reliable critical datapath, which offers the pipeline high throughput as well as low power consumption. Synchronizing Logic Gates (SLGs), which have no data dependency problem, are used in the design to construct the reliable critical datapath. The design targets latch-free and extremely fine-grain or gate-level pipeline, where the depth of every pipeline stage is only one dual-rail dynamic logic. HSPICE simulation results, in a 65nm design technology, indicate that the proposed design increases the throughput by 120% and decreases the power consumption by 54% compared with PS0, a classic dual-rail asynchronous pipeline implementation style, in 4-bit wide FIFOs. Moreover, this method is applied to design an array style multiplier. It shows that the proposed design reduces power by 37.9% compared to classic synchronous design when the workloads are 55%. A chip has been fabricated with a 4×4 multiplier function, which works well at 2.16G data-set/s (Post-layout simulation).
A quantum logic gate between a solid-state quantum bit and a photon
Kim, Hyochul; Shen, Thomas C; Solomon, Glenn S; Waks, Edo; 10.1038/nphoton.2013.48
2013-01-01
Integrated quantum photonics provides a promising route towards scalable solid-state implementations of quantum networks, quantum computers, and ultra-low power opto-electronic devices. A key component for many of these applications is the photonic quantum logic gate, where the quantum state of a solid-state quantum bit (qubit) conditionally controls the state of a photonic qubit. These gates are crucial for development of robust quantum networks, non-destructive quantum measurements, and strong photon-photon interactions. Here we experimentally realize a quantum logic gate between an optical photon and a solid-state qubit. The qubit is composed of a quantum dot (QD) strongly coupled to a nano-cavity, which acts as a coherently controllable qubit system that conditionally flips the polarization of a photon on picosecond timescales, implementing a controlled-NOT (cNOT) gate. Our results represent an important step towards solid-state quantum networks and provide a versatile approach for probing QD-photon inter...
The development of a digital logic concept inventory
Herman, Geoffrey Lindsay
Instructors in electrical and computer engineering and in computer science have developed innovative methods to teach digital logic circuits. These methods attempt to increase student learning, satisfaction, and retention. Although there are readily accessible and accepted means for measuring satisfaction and retention, there are no widely accepted means for assessing student learning. Rigorous assessment of learning is elusive because differences in topic coverage, curriculum and course goals, and exam content prevent direct comparison of two teaching methods when using tools such as final exam scores or course grades. Because of these difficulties, computing educators have issued a general call for the adoption of assessment tools to critically evaluate and compare the various teaching methods. Science, Technology, Engineering, and Mathematics (STEM) education researchers commonly measure students' conceptual learning to compare how much different pedagogies improve learning. Conceptual knowledge is often preferred because all engineering courses should teach a fundamental set of concepts even if they emphasize design or analysis to different degrees. Increasing conceptual learning is also important, because students who can organize facts and ideas within a consistent conceptual framework are able to learn new information quickly and can apply what they know in new situations. If instructors can accurately assess their students' conceptual knowledge, they can target instructional interventions to remedy common problems. To properly assess conceptual learning, several researchers have developed concept inventories (CIs) for core subjects in engineering sciences. CIs are multiple-choice assessment tools that evaluate how well a student's conceptual framework matches the accepted conceptual framework of a discipline or common faulty conceptual frameworks. We present how we created and evaluated the digital logic concept inventory (DLCI).We used a Delphi process to
Fratto, Brian E; Roby, Lucas J; Guz, Nataliia; Katz, Evgeny
2014-10-18
The enzyme-based system performing a biocatalytic cascade reaction was realized in a flow device and was used to mimic Boolean logic operations. Chemical inputs applied to the system resulted in the activation of additional reaction steps, allowing the reversible switch of the logic operations between OR, NXOR and NAND gates for processing of two other biomolecular inputs.
Larom, Bar; Nazarathy, Moshe; Rudnitsky, Arkady; Nevet, Amir; Zalevsky, Zeev
2010-06-21
Feasibility of cascading and reconfiguring a pair of linear-nonlinear all-optical logic gate structures is experimentally demonstrated using RF photonics. Progress in highly integrated O/E/O repeaters over Si/InP hybrid platforms enables large-scale reconfigurable gate arrays.
Digital logic design using verilog coding and RTL synthesis
Taraate, Vaibbhav
2016-01-01
This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex. The book constructs the logic design story from the fundamentals of logic design to advanced RTL design concepts. Keeping in view the importance of miniaturization today, the book gives practical information on the issues with ASIC RTL design and how to overcome these concerns. It clearly explains how to write an efficient RTL code and how to improve design performance. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design. The practical orientation of the book makes it ideal for training programs for practicing design engineers and for short-term vocational programs. The contents of the book will also make it a useful read for students a...
Lize, Yannick K; Christen, Louis; Nazarathy, Moshe; Nuccio, Scott; Wu, Xiaoxia; Willner, Alan E; Kashyap, Raman
2007-05-28
We present an optical multipath error correction technique for differentially encoded modulation formats such as differential-phase-shift-keying (DPSK) and differential polarization shift keying (DPolSK) for fiber-based and free-space communication. This multipath error correction method combines optical and electronic logic gates. The scheme can easily be implemented using commercially available interferometers and high speed logic gates and does not require any data overhead therefore does not affect the effective bandwidth of the transmitted data. It is not merely compatible but also complementary to error correction codes commonly used in optical transmission systems such as forward-error-correction (FEC). The technique consists of separating the demodulation at the receiver in multiple paths. Each path consists of a Mach-Zehnder interferometer with a different integer bit delay used in each path. Some basic logic operations follow and the three paths are compared using a simple majority vote algorithm. Experimental results show that the scheme improves receiver sensitivity by 1.5 dB at BER of 10(-3),in back-to-back configuration. Numerical results indicate a 1.6 dB improvement in the presence of Chromatic Dispersion for a 25% increase in tolerance for a 3dB penalty from +/-1220 ps/nm to +/-1520 ps/nm. and a 0.35 dB improvement for back-to-back operation.
Skyrmion domain wall collision and domain wall-gated skyrmion logic
Xing, Xiangjun; Pong, Philip W. T.; Zhou, Yan
2016-08-01
Skyrmions and domain walls are significant spin textures of great technological relevance to magnetic memory and logic applications, where they can be used as carriers of information. The unique topology of skyrmions makes them display emergent dynamical properties as compared with domain walls. Some studies have demonstrated that the two topologically inequivalent magnetic objects could be interconverted by using cleverly designed geometric structures. Here, we numerically address the skyrmion domain wall collision in a magnetic racetrack by introducing relative motion between the two objects based on a specially designed junction. An electric current serves as the driving force that moves a skyrmion toward a trapped domain wall pair. We see different types of collision dynamics depending on the driving parameters. Most importantly, the modulation of skyrmion transport using domain walls is realized in this system, allowing a set of domain wall-gated logical NOT, NAND, and NOR gates to be constructed. This work provides a skyrmion-based spin-logic architecture that is fully compatible with racetrack memories.
Sukhdev Roy
2012-01-01
Full Text Available We present designs of all-optical reversible gates, namely, Feynman, Toffoli, Peres, and Feynman double gates, with optically controlled microresonators. To demonstrate the applicability, a bacteriorhodopsin protein-coated silica microcavity in contact between two tapered single-mode fibers has been used as an all-optical switch. Low-power control signals (<200 μW at 532 nm and at 405 nm control the conformational states of the protein to switch a near infrared signal laser beam at 1310 or 1550 nm. This configuration has been used as a template to design four-port tunable resonant coupler logic gates. The proposed designs are general and can be implemented in both fiber-optic and integrated-optic formats and with any other coated photosensitive material. Advantages of directed logic, high Q-factor, tunability, compactness, low-power control signals, high fan-out, and flexibility of cascading switches in 2D/3D architectures to form circuits make the designs promising for practical applications.
Guo, Jun-Hong; Kong, De-Ming; Shen, Han-Xi
2010-10-15
This paper describes the construction of a DNA IMPLICATION logic gate based on triphenylmethane (TPM) dye/G-quadruplex complexes, using Ag+ and cysteine (Cys) as the two inputs, and fluorescence intensity of the TPM dye as the output signal. Free triphenylmethane (TPM) dyes emit inherently low fluorescence signal, the formation of TPM dye/G-quadruplex complexes yielded greatly enhanced fluorescence signals from the dye, and the output signal of the gate was 1. The addition of Cys had no effect on the fluorescence signal, again yielding an output of 1. However, the addition of Ag+ instead of Cys greatly disrupted the G-quadruplex structure, causing a decrease in the fluorescence of the dye, and yielding an output signal of 0. The addition of Cys into the Ag+-quenched fluorescence system led to the release of Ag+ from G-quadruplex-forming DNAs, resulting in the reformation of G-quadruplex structures and the recovery of TMP dye fluorescence, the output signal of 1 was obtained again. Compared with previously published DNA logic gates, the gate operation described here was rapid and reversible, with a reliable, nondestructive readout and excellent digital behavior. In addition, the modulation of TPM dye/G-quadruplex complex fluorescence by Ag+ and Cys could be used to develop a simple, fast, label-free and highly specific homogenous sensing methods for Ag+ and Cys. Copyright © 2010 Elsevier B.V. All rights reserved.
Ho, Kum-Song; Han, Yong-Ha; Ri, Chol-Song; Im, Song-Jin
2016-08-15
The development of nanoscale optical logic gates has attracted immense attention due to increasing demand for ultrahigh-speed and energy-efficient optical computing and data processing, however, suffers from the difficulty in precise control of phase difference of the two optical signals. We propose a novel conception of nanoscale optical logic gates based on actively phase-controlled coupling between two plasmonic waveguides via an in-between gain-assisted nanoresonator. Precise control of phase difference between the two plasmonic signals can be performed by manipulating pumping rate at an appropriate frequency detuning, enabling a high contrast between the output logic states "1" and "0." Without modification of the structural parameters, different logic functions can be provided. This active nanoscale optical logic device is expected to be quite energy-efficient with ideally low energy consumption on the order of 0.1 fJ/bit. Analytical calculations and numerical experiments demonstrate the validity of the proposed concept.
Son, Donghee; Koo, Ja Hoon; Song, Jun-Kyul; Kim, Jaemin; Lee, Mincheol; Shim, Hyung Joon; Park, Minjoon; Lee, Minbaek; Kim, Ji Hoon; Kim, Dae-Hyeong
2015-05-26
Electronics for wearable applications require soft, flexible, and stretchable materials and designs to overcome the mechanical mismatch between the human body and devices. A key requirement for such wearable electronics is reliable operation with high performance and robustness during various deformations induced by motions. Here, we present materials and device design strategies for the core elements of wearable electronics, such as transistors, charge-trap floating-gate memory units, and various logic gates, with stretchable form factors. The use of semiconducting carbon nanotube networks designed for integration with charge traps and ultrathin dielectric layers meets the performance requirements as well as reliability, proven by detailed material and electrical characterizations using statistics. Serpentine interconnections and neutral mechanical plane layouts further enhance the deformability required for skin-based systems. Repetitive stretching tests and studies in mechanics corroborate the validity of the current approaches.
Implementation of Quantum Logic Gates Using Polar Molecules in Pendular States
Zhu, Jing; Wei, Qi; Herschbach, Dudley; Friedrich, Bretislav
2012-01-01
We present a systematic approach to implementation of basic quantum logic gates operating on polar molecules in pendular states as qubits for a quantum computer. A static electric field prevents quenching of the dipole moments by rotation, thereby creating the pendular states; also, the field gradient enables distinguishing among qubit sites. Multi-Target Optimal Control Theory (MTOCT) is used as a means of optimizing the initial-to-target transition probability via a laser field. We give detailed calculations for the SrO molecule, a favorite candidate for proposed quantum computers. Our simulation results indicate that NOT, Hadamard and CNOT gates can be realized with high fidelity for such pendular qubit states.
Dynamically Arranging Gold Nanoparticles on DNA Origami for Molecular Logic Gates.
Yang, Jing; Song, Zhichao; Liu, Shi; Zhang, Qiang; Zhang, Cheng
2016-08-31
In molecular engineering, DNA molecules have been extensively studied owing to their capacity for accurate structural control and complex programmability. Recent studies have shown that the versatility and predictability of DNA origami make it an excellent platform for constructing nanodevices. In this study, we developed a strand-displacing strategy to selectively and dynamically release specific gold nanoparticles (AuNPs) on a rectangular DNA origami. A set of DNA logic gates ("OR", "AND", and "three-input majority gate") were established based on this strategy, in which computing results were identified by disassembly between the AuNPs and DNA origami. The computing results were detected using experimental approaches such as gel electrophoresis and transmission electron microscopy (TEM). This method can be used to assemble more complex nanosystems and may have potential applications for molecular engineering.
Switchable electrode controlled by Boolean logic gates using enzymes as input signals.
Wang, Xuemei; Zhou, Jian; Tam, Tsz Kin; Katz, Evgeny; Pita, Marcos
2009-11-01
Application of Boolean logic operations performed by enzymes to control electrochemical systems is presented. Indium-tin oxide (ITO) electrodes with the surface modified with poly-4-vinyl pyridine (P4VP) brush were synthesized and used as switchable electrochemical systems. The switch ON and OFF of the electrode activity were achieved by pH changes generated in situ by biocatalytic reactions in the presence of enzymes used as input signals. Two logic gates operating as AND/OR Boolean functions were designed using invertase and glucose oxidase or esterase and glucose oxidase as input signals, respectively. The electrode surface coated with a shrunk P4VP polymer at neutral pH values was not electrochemically active because of the blocking effect of the polymer film. The positive outputs of the logic operations yielded a pH drop to acidic conditions, resulting in the protonation and swelling of the P4VP polymer allowing penetration of a soluble redox probe to the conducting support, thus switching the electrode activity ON. The electrode interface was reset to the initial OFF state, with the inhibited electrochemical reaction, upon in situ pH increase generated by another enzymatic reaction in the presence of urease. Logically processed biochemical inputs of various enzymes allowed reversible activation-inactivation of the electrochemical reaction.
Logic Gates and Ring Oscillators Based on Ambipolar Nanocrystalline-Silicon TFTs
Anand Subramaniam
2013-01-01
Full Text Available Nanocrystalline silicon (nc-Si thin film transistors (TFTs are well suited for circuit applications that require moderate device performance and low-temperature CMOS-compatible processing below 250°C. Basic logic gate circuits fabricated using ambipolar nc-Si TFTs alone are presented and shown to operate with correct outputs at frequencies of up to 100 kHz. Ring oscillators consisting of nc-Si TFT-based inverters are also shown to operate at above 20 kHz with a supply voltage of 5 V, corresponding to a propagation delay of 5 V for several hours.
Zhai, Wei; Du, Chunyan; Li, Xiaohong
2014-02-28
Direct reduction of Pb(2+) in self-assembled G-quadruplex on the gold electrode was first observed, which was applied in constructing a series of simple and reversible logic gates, such as one-input, two-input and three-input logic gates. Importantly, the largest scale of reversibility among two-input logic gates was achieved based on the reciprocal transformations of DNA.
Kazemi, Mehdi Mohammad; Mazaheri Tehrani, Alireza; Zeb Khan, Tahir; Namboodiri, Mahesh; Materny, Arnulf
2015-12-01
A Toffoli logic gate (CCNOT gate) is a universal reversible logic gate from which all other reversible gates can be constructed. It has a three-bit input and output. The goal of our work was to realize a Toffoli gate where all inputs and outputs are realized optically, which allows for ultrafast switching processes. We demonstrate experimentally that a Toffoli logic gate can be created based on nonlinear multi-wave interactions of light with matter. Using femtosecond laser pulses, the all-optical Toffoli gate is based on the coherence of the optical signals produced via the nonlinear optical processes. Sum frequency (SF) and second harmonic (SH) generations are combined in such a way so as to yield the complete truth table of the universal reversible logic gate.
High-speed all-optical NAND/AND logic gates using four-wave mixing Bragg scattering.
Li, Kangmei; Ting, Hong-Fu; Foster, Mark A; Foster, Amy C
2016-07-15
A high-speed all-optical NAND logic gate is proposed and experimentally demonstrated using four-wave mixing Bragg scattering in highly nonlinear fiber. NAND/AND logic functions are implemented at two wavelengths by encoding logic inputs on two pumps via on-off keying. A 15.2-dB depletion of the signal is obtained for NAND operation, and time domain measurements show 10-Gb/s NAND/AND logic operations with open eye diagrams. The approach can be readily extended to higher data rates and transferred to on-chip waveguide platforms.
Shefali Mamataj; Biswajit Das
2016-01-01
.... Reversible Logic is gaining significant consideration as the potential logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on physical entropy...
Chen, Qi; Yoo, Si-Youl; Chung, Yong-Ho; Lee, Ji-Young; Min, Junhong; Choi, Jeong-Woo
2016-10-01
Various bio-logic gates have been studied intensively to overcome the rigidity of single-function silicon-based logic devices arising from combinations of various gates. Here, a simple control tool using electrochemical signals from quantum dots (QDs) was constructed using DNA and organic materials for multiple logic functions. The electrochemical redox current generated from QDs was controlled by the DNA structure. DNA structure, in turn, was dependent on the components (organic materials) and the input signal (pH). Independent electrochemical signals from two different logic units containing QDs were merged into a single analog-type logic gate, which was controlled by two inputs. We applied this electrochemical biodevice to a simple logic system and achieved various logic functions from the controlled pH input sets. This could be further improved by choosing QDs, ionic conditions, or DNA sequences. This research provides a feasible method for fabricating an artificial intelligence system. Copyright © 2016 Elsevier B.V. All rights reserved.
A Reversible DNA Logic Gate Platform Operated by One- and Two-Photon Excitations.
Tam, Dick Yan; Dai, Ziwen; Chan, Miu Shan; Liu, Ling Sum; Cheung, Man Ching; Bolze, Frederic; Tin, Chung; Lo, Pik Kwan
2016-01-04
We demonstrate the use of two different wavelength ranges of excitation light as inputs to remotely trigger the responses of the self-assembled DNA devices (D-OR). As an important feature of this device, the dependence of the readout fluorescent signals on the two external inputs, UV excitation for 1 min and/or near infrared irradiation (NIR) at 800 nm fs laser pulses, can mimic function of signal communication in OR logic gates. Their operations could be reset easily to its initial state. Furthermore, these DNA devices exhibit efficient cellular uptake, low cytotoxicity, and high bio-stability in different cell lines. They are considered as the first example of a photo-responsive DNA logic gate system, as well as a biocompatible, multi-wavelength excited system in response to UV and NIR. This is an important step to explore the concept of photo-responsive DNA-based systems as versatile tools in DNA computing, display devices, optical communication, and biology. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Electrochemically controlled assembly and logic gates operations of gold nanoparticle arrays.
Frasconi, Marco; Mazzei, Franco
2012-02-14
The reversible assembly of β-cyclodextrin-functionalized gold NPs (β-CD Au NPs) is studied on mixed self-assembled monolayer (SAM), formed by coadsorption of redox-active ferrocenylalkylthiols and n-alkanethiols on gold surfaces. The surface coverage and spatial distribution of the β-CD Au NPs monolayer on the gold substrate are tuned by the self-assembled monolayer composition. The binding and release of β-CD Au NPs to and from the SAMs modified surface are followed by surface plasmon resonance (SPR) spectroscopy. The redox state of the tethered ferrocene in binary SAMs controls the formation of the supramolecular interaction between ferrocene moieties and β-CD-capped Au NPs. As a result, the potential-induced uptake and release of β-CD Au NPs to and from the surface is accomplished. The competitive binding of β-CD Au NPs with guest molecules in solution shifted the equilibrium of the complexation-decomplexation process involving the supramolecular interaction with the Fc-functionalized surface. The dual controlled assembly of β-CD Au NPs on the surface enabled to use two stimuli as inputs for logic gate activation; the coupling between the localized surface plasmon, associated with the Au NP, and the surface plasmon wave, associated with the thin metal surface, is implemented as readout signal for "AND" logic gate operations.
Ultracompact all-optical XOR logic gate in a slow-light silicon photonic crystal waveguide.
Husko, C; Vo, T D; Corcoran, B; Li, J; Krauss, T F; Eggleton, B J
2011-10-10
We demonstrate an ultracompact, chip-based, all-optical exclusive-OR (XOR) logic gate via slow-light enhanced four-wave mixing (FWM) in a silicon photonic crystal waveguide (PhCWG). We achieve error-free operation (<10⁻⁹) for 40 Gbit/s differential phase-shift keying (DPSK) signals with a 2.8 dB power penalty. Slowing the light to vg = c/32 enables a FWM conversion efficiency, η, of -30 dB for a 396 μm device. The nonlinear FWM process is enhanced by 20 dB compared to a relatively fast mode of vg = c/5. The XOR operation requires ≈ 41 mW, corresponding to a switching energy of 1 pJ/bit. We compare the slow-light PhCWG device performance with experimentally demonstrated XOR DPSK logic gates in other platforms and discuss scaling the device operation to higher bit-rates. The ultracompact structure suggests the potential for device integration.
Fast Rydberg antiblockade regime and its applications in quantum logic gates
Su, Shi-Lei; Gao, Ya; Liang, Erjun; Zhang, Shou
2017-02-01
Unlike the Rydberg blockade regime, the Rydberg antiblockade regime (RABR) allows more than one Rydberg atom to be excited, which can bring other interesting phenomena and applications. We propose an alternative scheme to quickly achieve the RABR. The proposed RABR can be implemented by adjusting the detuning of the classical driving field, which is, in turn, based on the former numbers of the excited Rydberg atoms. In contrast to the former schemes, the current one enables more than two atoms to be excited to Rydberg states in a short period of time and thus is useful for large-scale quantum information processing. The proposed RABR can be used to construct two- and multiqubit quantum logic gates. In addition, a Rydberg excitation superatom, which can decrease the blockade error and enlarge the blockade radius for Rydberg blockade-based schemes, is constructed based on the suggested RABR and used to realize a more robust quantum logic gate. The mechanical effect and the ionization are discussed, and the performance is investigated using the master-equation method. Finally, other possible applications of the present RABR are also given.
Practical digital electronics for technicians
Kimber, Will
2013-01-01
Practical Digital Electronics for Technicians covers topics on analog and digital signals, logic gates, combinational logic, and Karnaugh mapping. The book discusses the characteristics and types of logic families; sequential systems including latch, bistable circuits, counters and shift registers; Schmitt triggers and multivibrators; and MSI combinational logic systems. Display devices, including LED, LCD and dot matrix display; analog and digital conversion; and examples of and equipment for digital fault finding are also considered. The book concludes by providing answers to the questions
Forsati, Rana; Valipour Ebrahimi, Sara; Navi, Keivan; Mohajerani, Ezeddin; Jashnsaz, Hossein
2013-02-01
Increasing demand for power reduction in computer systems has led to new trends in computations and computer design including reversible computing. Its main aim is to eliminate power dissipation in logical elements but can have some other advantages such as data security and error prevention. Because of interesting properties of reversible computing, implementing computing devices with reversible manner is the only way to make the reversible computing a reality. In recent years, reversible logic has turned out to be a promising computing paradigm having application in CMOS, nanotechnology, quantum computing and optical computing. In this paper, we propose and realize a novel implementation of Toffoli gate in all-optical domain. We have explained its principle of operations and described an actual experimental implementation. The all-optical reversible gate presented in this paper will be useful in different applications such as arithmetic and logical operations in the domain of reversible logic-based computing.
Influence of non-resonant effects on the dynamics of quantum logic gates at room temperature
Berman, G. P.; Bishop, A. R.; Doolen, G. D.; López, G. V.; Tsifrinovich, V. I.
2001-01-01
We study numerically the influence of non-resonant effects on the dynamics of a single- π-pulse quantum CONTROL-NOT (CN) gate in a macroscopic ensemble of four-spin molecules at room temperature. The four nuclear spins in each molecule represent a four-qubit register. The qubits are “labeled” by the characteristic frequencies, ωk, ( k=0-3) due to the Zeeman interaction of the nuclear spins with the magnetic field. The qubits interact with each other through an Ising interaction of strength J. The paper examines the feasibility of implementing a single-pulse quantum CN gate in an ensemble of quantum molecules at room temperature. We determine a parameter region, ωk and J, in which a single-pulse quantum CN gate can be implemented at room temperature. We also show that there exist characteristic critical values of parameters, Δ ωcr≡| ωk‧ - ωk| cr and Jcr, such that for JJcr and Δ ωk≡| ωk‧ - ωk|<Δ ωcr, non-resonant effects are sufficient to destroy the dynamics required for quantum logic operations.
Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory
Li, Y.; Zhong, Y. P.; Deng, Y. F.; Zhou, Y. X.; Xu, L.; Miao, X. S., E-mail: miaoxs@mail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics (WNLO), Huazhong University of Science and Technology (HUST), Wuhan 430074 (China); School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074 (China)
2013-12-21
Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.
Bogdał, Marta N; Hat, Beata; Kochańczyk, Marek; Lipniacki, Tomasz
2013-07-24
Apoptosis is a tightly regulated process: cellular survive-or-die decisions cannot be accidental and must be unambiguous. Since the suicide program may be initiated in response to numerous stress stimuli, signals transmitted through a number of checkpoints have to be eventually integrated. In order to analyze possible mechanisms of the integration of multiple pro-apoptotic signals, we constructed a simple model of the Bcl-2 family regulatory module. The module collects upstream signals and processes them into life-or-death decisions by employing interactions between proteins from three subgroups of the Bcl-2 family: pro-apoptotic multidomain effectors, pro-survival multidomain restrainers, and pro-apoptotic single domain BH3-only proteins. Although the model is based on ordinary differential equations (ODEs), it demonstrates that the Bcl-2 family module behaves akin to a Boolean logic gate of the type dependent on levels of BH3-only proteins (represented by Bad) and restrainers (represented by Bcl-xL). A low level of pro-apoptotic Bad or a high level of pro-survival Bcl-xL implies gate AND, which allows for the initiation of apoptosis only when two stress stimuli are simultaneously present: the rise of the p53 killer level and dephosphorylation of kinase Akt. In turn, a high level of Bad or a low level of Bcl-xL implies gate OR, for which any of these stimuli suffices for apoptosis. Our study sheds light on possible signal integration mechanisms in cells, and spans a bridge between modeling approaches based on ODEs and on Boolean logic. In the proposed scheme, logic gates switching results from the change of relative abundances of interacting proteins in response to signals and involves system bistability. Consequently, the regulatory system may process two analogous inputs into a digital survive-or-die decision.
Li, Lei; Qi, Zhipeng; Hu, Guohua; Yun, Binfeng; Zhong, Yuan; Cui, Yiping
2016-10-01
A compact electro-optical "NOR" logic gate device based on silicon-on-insulator (SOI) platform is proposed and investigated theoretically. By introducing a hook-type waveguide, the signal could be coupled between the bus and hook-type waveguide to form an optical circuit and realize NOR logic gate. We can easily realize the NOR logical function by the voltage applied on the coupling components. The numerical simulation shows that a high coupling efficiency of more than 99% is obtained at the wavelength of 1550 nm, and the footprint of our device is smaller than 90 μm2. In addition, the response time of the proposed NOR logic gate is 3 ns with a switching voltage of 1.8 V. Moreover, it is demonstrated that such NOR logic gate device could obtain an extinction ratio of 21.8 dB. Thus, it has great potential to achieve high speed response, low power consumption, and small footprint, which fulfill the demands of next-generation on-chip computer multiplex processors.
Digitally controlled oscillator design with a variable capacitance XOR gate
Manoj Kumar; Sandeep K. Arya; Sujata Pandey
2011-01-01
A digitally controlled oscillator (DCO) using a three-transistor XOR gate as the variable load has been presented.A delay cell using an inverter and a three-transistor XOR gate as the variable capacitance is also proposed.Three-,five- and seven-stage DCO circuits have been designed using the proposed delay cell.The output frequency is controlled digitally with bits applied to the delay cells.The three-bit DCO shows output frequency and power consumption variation in the range of 3.2486-4.0267 GHz and 0.6121-0.3901 mW,respectively,with a change in the control word 1 1 1-000.The five-bit DCO achieves frequency and power of 1.8553-2.3506 GHz and 1.0202-0.6501 mW,respectively,with a change in the control word 11111-00000.Moreover,the seven-bit DCO shows a frequency and power consumption variation of 1.3239-1.6817 GHz and 1.4282-0.9102 m W,respectively,with a varying control word 1111111-0000000.The power consumption and output frequency of the proposed circuits have been compared with earlier reported circuits and the present approaches show significant improvements.
A high-speed multiplexer-based fine-grain pipelined architecture for digital fuzzy logic controllers
Rashidi, Bahram; Masoud Sayedi, Sayed
2015-12-01
Design and implementation of a high-speed multiplexer-based fine-grain pipelined architecture for a general digital fuzzy logic controller has been presented. All the operators have been designed at gate level. For the multiplication, a multiplexer-based modified Wallace tree multiplier has been designed, and for the division and addition multiplexer-based non-restoring parallel divider and multiplexer-based Manchester adder have been used, respectively. To further increase the processing speed, fine-grain pipelining technique has been employed. By using this technique, the critical path of the circuit is broken into finer pieces. Based on the proposed architecture, and by using Quartus II 9.1, a sample two-input, one-output digital fuzzy logic controller with eight rules has been successfully synthesised and implemented on Stratix II field programmable gate array. Simulations were carried out using DSP Builder in the MATLAB/Simulink tool at a maximum clock rate of 301.84 MHz.
Privman, Vladimir; Arugula, Mary A; Halámek, Jan; Pita, Marcos; Katz, Evgeny
2009-04-16
We develop an approach aimed at optimizing the parameters of a network of biochemical logic gates for reduction of the "analog" noise buildup. Experiments for three coupled enzymatic AND gates are reported, illustrating our procedure. Specifically, starch, one of the controlled network inputs, is converted to maltose by beta-amylase. With the use of phosphate (another controlled input), maltose phosphorylase then produces glucose. Finally, nicotinamide adenine dinucleotide (NAD(+)), the third controlled input, is reduced under the action of glucose dehydrogenase to yield the optically detected signal. Network functioning is analyzed by varying selective inputs and fitting standardized few-parameters "response-surface" functions assumed for each gate. This allows a certain probe of the individual gate quality, but primarily yields information on the relative contribution of the gates to noise amplification. The derived information is then used to modify our experimental system to put it in a regime of a less noisy operation.
Reduction of Power Dissipation in Dynamic BiCMOS Logic Gates by Transistor Reordering
S. M. Rezaul Hasan
2002-01-01
Full Text Available This paper explores the deterministic transistor reordering in low-voltage dynamic BiCMOS logic gates, for reducing the dynamic power dissipation. The constraints of load driving (discharging capability and NPN turn-on delay for MOSFET reordered structures has been carefully considered. Simulations shows significant reduction in the dynamic power dissipation for the transistor reordered BiCMOS structures. The power-delay product figure-of-merit is found to be significantly enhanced without any associated silicon-area penalty. In order to experimentally verify the reduction in power dissipation, original and reordered structures were fabricated using the MOSIS 2 μm N-well analog CMOS process which has a P-base layer for bipolar NPN option. Measured results shows a 20% reduction in the power dissipation for the transistor reordered structure, which is in close agreement with the simulation.
Analysis of Pocket Double Gate Tunnel FET for Low Stand by Power Logic Circuits
Kamal K. Jha
2013-12-01
Full Text Available For low power circuits downscaling of MOSFET has a major issue of scaling of voltage which has ceased after 1V. This paper highlights comparative study and analysis of pocket double gate tunnel FET (DGTFET with MOSFET for low standby power logic circuits. The leakage current of pocket DGTFET and MOSFET have been studied and the analysis results shows that the pocket DGTFET gives the lower leakage current than the MOSFET. Further a pocket DGTFET inverter circuit is design in 32 nm technology node at VDD =0.6 V. The pocket DGTFET inverter shows the significant improvement on the leakage power than multi-threshold CMOS (MTCMOS inverter. The leakage power of pocket DGFET and MTCMOS inverter are 0.116 pW and 1.83 pW respectively. It is found that, the pocket DGTFET can replace the MOSFET for low standby power circuits.
Ones and zeros understanding Boolean algebra digital circuits and the logic of sets
Gregg, John
1998-01-01
"Ones and Zeros explains, in lay terms, Boolean algebra, the suprisingly simple system of mathematical logic used in digital computer circuitry. Ones and Zeros follows the development of this logic system from its origins in Victorian England to its rediscovery in this century as the foundation of all modern computing machinery. Readers will learn about the interesting history of the development of symbolic logic in particular, and the often misunderstood process of mathematical invention and scientific discovery, in general. Ones and Zeros also features practical exercises with answers, real-world examples of digital circuit design, and a reading list." "Ones and Zeros will be of particular interest to software engineers who want to gain a comprehensive understanding of computer hardware." "Outstanding features include: a history of mathematical logic, an explanation of the logic of digital circuits, and hands-on exercises and examples."--Jacket.
IST-LASAGNE: Towards all-optical label swapping employing optical logic gates and optical flip-flops
Ramos, F.; Kehayas, E.; Martinez, J.M.
2005-01-01
The Information Society Technologies - all-optical LAbel SwApping employing optical logic Gates in NEtwork nodes (IST-LASAGNE) project aims at designing and implementing the first, modular, scalable, and truly all-optical photonic router capable of operating at 40 Gb/s. The results of the first...
Pyrene-based dual-mode fluorescence switches and logic gates that function in solution and film.
Zhou, Weidong; Li, Yongjun; Li, Yuliang; Liu, Huibiao; Wang, Shu; Li, Cuihong; Yuan, Mingjian; Liu, Xiaofeng; Zhu, Daoben
2006-07-17
A dual-mode fluorescence switch controlled by external inputs such as protons and metal ions is described, and each state corresponds to a specific fluorescent emission peak. Based on the reversible changes of the fluorescence emission of the switch responding to different external stimuli, the corresponding integrated logic gates and communication networks have been constructed in solid film or in solution.
IST-LASAGNE: Towards all-optical label swapping employing optical logic gates and optical flip-flops
Ramos, F.; Kehayas, E.; Martinez, J.M.
2005-01-01
The Information Society Technologies - all-optical LAbel SwApping employing optical logic Gates in NEtwork nodes (IST-LASAGNE) project aims at designing and implementing the first, modular, scalable, and truly all-optical photonic router capable of operating at 40 Gb/s. The results of the first...
Teslenko, Maxim
2008-01-01
This dissertation is in the area of Computer-Aided Design (CAD) of digital Integrated Circuits (ICs). Today's digital ICs, such as microprocessors, memories, digital signal processors (DSPs), etc., range from a few thousands to billions of logic gates, flip-flops, and other components, packed in a few millimeters of area. The creation of such highly complex systems would not be possible without the use of CAD tools. CAD tools play the key role in determining the area, speed and power consumpt...
Ultracompact all-optical logic gates based on nonlinear plasmonic nanocavities
Yang, Xiaoyu; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang
2017-01-01
In this study, nanoscale integrated all-optical XNOR, XOR, and NAND logic gates were realized based on all-optical tunable on-chip plasmon-induced transparency in plasmonic circuits. A large nonlinear enhancement was achieved with an organic composite cover layer based on the resonant excitation-enhancing nonlinearity effect, slow light effect, and field confinement effect provided by the plasmonic nanocavity mode, which ensured a low excitation power of 200 μW that is three orders of magnitude lower than the values in previous reports. A feature size below 600 nm was achieved, which is a one order of magnitude lower compared to previous reports. The contrast ratio between the output logic states "1" and "0" reached 29 dB, which is among the highest values reported to date. Our results not only provide an on-chip platform for the study of nonlinear and quantum optics but also open up the possibility for the realization of nanophotonic processing chips based on nonlinear plasmonics.
Li, Qiliang; Zhang, Zhen; Li, Dongqiang; Zhu, Mengyun; Tang, Xianghong; Li, Shuqin
2014-12-01
In this paper, we theoretically investigate all-optical logical gates based on the pump-induced resonant nonlinearity in an erbium-doped fiber coupler. The resonant nonlinearity yielded by the optical transitions between the (4)I(15/2) states and (4)I(13/2) states in Er(3+) induces the refractive index to change, which leads to switching between two output ports. First, we do a study on the switching performance, and calculate the extinction ratio (Xratio) of the device. Second, using the Xratio, we obtain the truth tables of the device. The results reveal that compared with other undoped nonlinear couplers, the erbium-doped fiber coupler can drop the switching threshold power. We also obtain different logic gates and logic operations in the cases of the same phase and different phase of two initial signals by changing the pump power.
Ferritin-templated quantum dots for quantum logic gates (Invited Paper)
Choi, Sang H.; Kim, Jae-Woo; Chu, Sang-Hyon; Park, Yeonjoon; King, Glen C.; Lillehei, Peter T.; Kim, Seon-Jeong; Elliott, James R.
2005-05-01
Quantum logic gates (QLGs) or other logic systems are based on quantum-dots (QD) with a stringent requirement of size uniformity. The QD are widely known building units for QLGs. The size control of QD is a critical issue in quantum-dot fabrication. The work presented here offers a new method to develop quantum-dots using a bio-template, called ferritin, that ensures QD production in uniform size of nano-scale proportion. This technology is essential for NASA, DoD, and industrial nanotechnology applications such as: ultra-high density data storage, quantum electronic devices, biomedical nanorobots, molecular tagging, terahertz radiation sources, nanoelectromechanical systems (NEMS), etc. The bio-template for uniform yield of QD is based on a ferritin protein that allows reconstitution of core material through the reduction and chelation processes. By either the magnetic or electrical property of reconstituted core materials, the QD can be used for logic gates which are fundamental building blocks for quantum computing. However, QLGs are in an incubation stage and still have many potential obstacles that need to be addressed, such as an error collection, a decoherence, and a hardware architecture. One of the biggest challenges for developing QLG is the requirement of ordered and uniform size of QD for arrays on a substrate with nanometer precision. The other methods known so far, such as self-assembled QD grown in the Stranski-Krastanov mode, are usually randomly organized. The QD development by bio-template includes the electrochemical/chemical reconstitution of ferritins with different core materials, such as iron, cobalt, manganese, platinum, and nickel. The other bio-template method used in our laboratory is dendrimers, precisely defined chemical structures. With ferritin-templated QD, we fabricated the heptagon-shaped patterned array via direct nano manipulation of the ferritin molecules with a tip of atomic force microscope (AFM). We also designed various
Lilin Yi; Weisheng Hu; Hao He; Yi Dong; Yaohui Jin; Weiqiang Sun
2011-01-01
We demonstrate an all-optical reconfigurable logic gate based on dominant nonlinear polarization rotation accompanied with cross-gain modulation effect in a singlc semiconductor optical amplifier (SOA). Five logic functions, including NOT, OR, NOR, AND, and NAND, are realized using 10-Gb/s on-off keying signals with flexible wavelength tunability. The operation principle is explained in detail. By adjusting polarization controllers, multiple logic functions corresponding to different input polarization states are separately achieved using a single SOA with high flexibility.%@@ We demonstrate an all-optical reconfigurable logic gate based on dominant nonlinear polarization rotation accompanied with cross-gain modulation effect in a single semiconductor optical amplifier (SOA).Five logic functions, including NOT, OR, NOR, AND, and NAND, are realized using 10-Gb/s on-off keying signals with flexible wavelength tunability.The operation principle is explained in detail.By adjusting polarization controllers, multiple logic functions corresponding to different input polarization states are separately achieved using a single SOA with high flexibility.
Bian, Yusheng; Gong, Qihuang
2014-02-01
The whole set of fundamental all-optical logic gates is realized theoretically using a multi-channel configuration based on one-dimensional (1D) metal-insulator-metal (MIM) structures by leveraging the linear interference between surface plasmon polariton modes. The working principle and conditions for different logic functions are analyzed and demonstrated numerically by means of the finite element method. In contrast to most of the previous studies that require more than one type of configuration to achieve different logic functions, a single geometry with fixed physical dimensions can realize all fundamental functions in our case studies. It is shown that by switching the optical signals to different input channels, the presented device can realize simple logic functions such as OR, AND and XOR. By adding signal in the control channel, more functions including NOT, XNOR, NAND and NOR can be implemented. For these considered logic functions, high intensity contrast ratios between Boolean logic states "1" and "0" can be achieved at the telecom wavelength. The presented all-optical logic device is simple, compact and efficient. Moreover, the proposed scheme can be applied to many other nano-photonic logic devices as well, thereby potentially offering useful guidelines for their designs and further applications in on-chip optical computing and optical interconnection networks.
Zhang, Li; Wang, Zhong-Xia; Liang, Ru-Ping; Qiu, Jian-Ding
2013-07-16
Utilizing the principles of metal-ion-mediated base pairs (C-Ag-C and T-Hg-T), the pH-sensitive conformational transition of C-rich DNA strand, and the ligand-exchange process triggered by DL-dithiothreitol (DTT), a system of colorimetric logic gates (YES, AND, INHIBIT, and XOR) can be rationally constructed based on the aggregation of the DNA-modified Au NPs. The proposed logic operation system is simple, which consists of only T-/C-rich DNA-modified Au NPs, and it is unnecessary to exquisitely design and alter the DNA sequence for different multiple molecular logic operations. The nonnatural base pairing combined with unique optical properties of Au NPs promises great potential in multiplexed ion sensing, molecular-scale computers, and other computational logic devices.
Wu, Cuichen; Wan, Shuo; Hou, Weijia; Zhang, Liqin; Xu, Jiehua; Cui, Cheng; Wang, Yanyue; Hu, Jun; Tan, Weihong
2015-03-04
Nucleic acid-based logic devices were first introduced in 1994. Since then, science has seen the emergence of new logic systems for mimicking mathematical functions, diagnosing disease and even imitating biological systems. The unique features of nucleic acids, such as facile and high-throughput synthesis, Watson-Crick complementary base pairing, and predictable structures, together with the aid of programming design, have led to the widespread applications of nucleic acids (NA) for logic gate and computing in biotechnology and biomedicine. In this feature article, the development of in vitro NA logic systems will be discussed, as well as the expansion of such systems using various input molecules for potential cellular, or even in vivo, applications.
Dadgour, Hamed F.
2010-01-01
Nano-Electro-Mechanical Switches (NEMS) are among the most promising emerging devices due to their near-zero subthreshold-leakage currents. This paper reports device fabrication and modeling, as well as novel logic gate design using "laterally-actuated double-electrode NEMS" structures. The new device structure has several advantages over existing NEMS architectures such as being immune to impact bouncing and release vibrations (unlike a vertically-actuated NEMS) and offer higher flexibility to implement compact logic gates (unlike a single-electrode NEMS). A comprehensive analytical framework is developed to model different properties of these devices by solving the Euler-Bernoulli\\'s beam equation. The proposed model is validated using measurement data for the fabricated devices. It is shown that by ignoring the non-uniformity of the electrostatic force distribution, the existing models "underestimate" the actual value of Vpull-in and Vpull-out. Furthermore, novel energy efficient NEMS-based circuit topologies are introduced to implement compact inverter, NAND, NOR and XOR gates. For instance, the proposed XOR gate can be implemented by using only two NEMS devices compared to that of a static CMOS-based XOR gate that requires at least 10 transistors. © Copyright 2010 ACM.
Direct-write fabrication of a nanoscale digital logic element on a single nanowire
Roy, Somenath; Gao Zhiqiang, E-mail: sroy@ibn.a-star.edu.sg [Institute of Bioengineering and Nanotechnology, 31 Biopolis Way, 138669 (Singapore)
2010-06-18
In this paper we report on the 'direct-write' fabrication and electrical characteristics of a nanoscale logic inverter, integrating enhancement-mode (E-mode) and depletion-mode (D-mode) field-effect transistors (FETs) on a single zinc oxide (ZnO) nanowire. 'Direct-writing' of platinum metal electrodes and a dielectric layer is executed on individual single-crystalline ZnO nanowires using either a focused electron beam (FEB) or a focused ion beam (FIB). We fabricate a top-gate FET structure, in which the gate electrode wraps around the ZnO nanowire, resulting in a more efficient gate response than the conventional back-gate nanowire transistors. For E-mode device operation, the gate electrode (platinum) is deposited directly onto the ZnO nanowire by a FEB, which creates a Schottky barrier and in turn a fully depleted channel. Conversely, sandwiching an insulating layer between the FIB-deposited gate electrode and the nanowire channel makes D-mode operation possible. Integrated E- and D-mode FETs on a single nanowire exhibit the characteristics of a direct-coupled FET logic (DCFL) inverter with a high gain and noise margin.
Direct-write fabrication of a nanoscale digital logic element on a single nanowire
Roy, Somenath; Gao, Zhiqiang
2010-06-01
In this paper we report on the 'direct-write' fabrication and electrical characteristics of a nanoscale logic inverter, integrating enhancement-mode (E-mode) and depletion-mode (D-mode) field-effect transistors (FETs) on a single zinc oxide (ZnO) nanowire. 'Direct-writing' of platinum metal electrodes and a dielectric layer is executed on individual single-crystalline ZnO nanowires using either a focused electron beam (FEB) or a focused ion beam (FIB). We fabricate a top-gate FET structure, in which the gate electrode wraps around the ZnO nanowire, resulting in a more efficient gate response than the conventional back-gate nanowire transistors. For E-mode device operation, the gate electrode (platinum) is deposited directly onto the ZnO nanowire by a FEB, which creates a Schottky barrier and in turn a fully depleted channel. Conversely, sandwiching an insulating layer between the FIB-deposited gate electrode and the nanowire channel makes D-mode operation possible. Integrated E- and D-mode FETs on a single nanowire exhibit the characteristics of a direct-coupled FET logic (DCFL) inverter with a high gain and noise margin.
Quaternary Logic and Applications Using Multiple Quantum Well Based SWSFETs
P. Gogna
2012-11-01
Full Text Available This paper presents Spatial Wavefunction-Switched Field-Effect Transistors (SWSFET to implement efficient quaternary logic and arithmetic functions. Various quaternary logic gates and digital building blocks are presented using SWSFETs. In addition, arithmetic operation with full adder using novel logic algebra is also presented. The SWSFET based implementation of digital logic, cache and arithmetic block results in up to 75% reduction in transistor count and up to 50% reduction in data interconnect densities. Simulations of quaternary logic gates using the BSIM equivalent models for SWSFET channels are also described.
Misalignment-free signal propagation in nanomagnet arrays and logic gates with 45°-clocking field
Li, Zheng; Kwon, Byung Seok; Krishnan, Kannan M., E-mail: kannanmk@uw.edu [Department of Materials Science and Engineering University of Washington, Box 352120, Seattle, Washington 98195 (United States)
2014-05-07
A key obstacle for the application of Magnetic Quantum-dot Cellular Automata (MQCA) is the misalignment of clocking field, which results in low stability for both signal propagations within nanomagnet array and logic operation in majority gates. Here, we demonstrate that a reversal clocking field applied at 45° off the hard axis, with progressively reduced amplitude, applied to a shape-tuned nanomagnet array fabricated by e-beam lithography, helps intrinsically eliminate the misalignment sensitivity of the elements and results in correct signal propagation. Further, least reversal steps and reduced field amplitude was required owing to the 45°-clocking field. This clocking field was also tested for majority gates (OR function) and characterized by Magnetic Force Microscopy demonstrating correct output. This novel design provides high stability for signal propagation and logic operation of MQCA and potentially paves way for its application.
Misalignment-free signal propagation in nanomagnet arrays and logic gates with 45Â°-clocking field
Li, Zheng; Kwon, Byung Seok; Krishnan, Kannan M.
2014-05-01
A key obstacle for the application of Magnetic Quantum-dot Cellular Automata (MQCA) is the misalignment of clocking field, which results in low stability for both signal propagations within nanomagnet array and logic operation in majority gates. Here, we demonstrate that a reversal clocking field applied at 45° off the hard axis, with progressively reduced amplitude, applied to a shape-tuned nanomagnet array fabricated by e-beam lithography, helps intrinsically eliminate the misalignment sensitivity of the elements and results in correct signal propagation. Further, least reversal steps and reduced field amplitude was required owing to the 45°-clocking field. This clocking field was also tested for majority gates (OR function) and characterized by Magnetic Force Microscopy demonstrating correct output. This novel design provides high stability for signal propagation and logic operation of MQCA and potentially paves way for its application.
Europium Luminescence Used for Logic Gate and Ions Sensing with Enoxacin As the Antenna.
Lu, Lixia; Chen, Chuanxia; Zhao, Dan; Sun, Jian; Yang, Xiurong
2016-01-19
Luminescent lanthanide ion complexes have received increasing attention because of their unique optical properties. Herein, we discovered that the luminescence of europium(III) (Eu(3+)) could be regulated by Ag(+) and SCN(-) in seconds with enoxacin (ENX) as the antenna. Under given conditions, only the simultaneous introduction of Ag(+) and SCN(-) could remarkably enhance the luminescence intensity of Eu(3+)-ENX complexes. This phenomenon has been exploited to design an "AND" logic gate and specific luminescence turn-on assays for sensitively sensing Ag(+) and SCN(-) for the first time. Furthermore, the addition of S(2-) resulted in efficient luminescence quenching of the Eu(3+)/ENX/Ag(+)/SCN(-) system due to the strong affinity between Ag(+) and S(2-). Thus, a new luminescent sensing platform for S(2-) was established, which exhibited excellent selectivity and high sensitivity. S(2-) could be detected within the concentration range of 100 nM to 12.5 μM with a detection limit of 60 nM. Such sensing system features simplicity, rapidity, and flexibility. Moreover, this proposed Eu(3+)-based luminescent assay could be successfully applied in the real environmental water sample analysis.
Pangannaya, Srikala; Purayil, Neethu Padinchare; Dabhi, Shweta; Mankad, Venu; Jha, Prafulla K; Shinde, Satyam
2017-01-01
New colorimetric receptors R1 and R2 with varied positional substitution of a cyano and nitro signaling unit having a hydroxy functionality as the hydrogen bond donor site have been designed, synthesized and characterized by FTIR, 1H NMR spectroscopy and mass spectrometry. The receptors R1 and R2 exhibit prominent visual response for F− and AcO– ions allowing the real time analysis of these ions in aqueous media. The formation of the receptor–anion complexes has been supported by UV–vis titration studies and confirmed through binding constant calculations. The anion binding process follows a first order rate equation and the calculated rate constants reveal a higher order of reactivity for AcO− ions. The 1H NMR titration and TDDFT studies provide full support of the binding mechanism. The Hg2+ and F− ion sensing property of receptor R1 has been utilized to arrive at “AND” and “INHIBIT” molecular logic gate applications.
Pan, Yi; Shi, Yupeng; Chen, Junying; Wong, Chap-Mo; Zhang, Heng; Li, Mei-Jin; Li, Cheuk-Wing; Yi, Changqing
2016-12-01
In this study, a highly sensitive and selective fluorescent Zn(2+) probe which exhibited excellent biocompatibility, water solubility, and cell-membrane permeability, was facilely synthesized in a single step by grafting polyethyleneimine (PEI) with quinoline derivatives. The primary amino groups in the branched PEI can increase water solubility and cell permeability of the probe PEIQ, while quinoline derivatives can specifically recognize Zn(2+) and reduce the potential cytotoxicity of PEI. Basing on fluorescence off-on mechanism, PEIQ demonstrated excellent sensing capability towards Zn(2+) in absolute aqueous solution, where a high sensitivity with a detection limit as low as 38.1nM, and a high selectivity over competing metal ions and potential interfering amino acids, were achieved. Inspired by these results, elementary logic operations (YES, NOT and INHIBIT) have been constructed by employing PEIQ as the gate while Zn(2+) and EDTA as chemical inputs. Together with the low cytotoxicity and good cell-permeability, the practical application of PEIQ in living cell imaging was satisfactorily demonstrated, emphasizing its wide application in fundamental biology research. Copyright © 2016. Published by Elsevier B.V.
A Cu2+-selective fluorescent chemosensor based on BODIPY with two pyridine ligands and logic gate
Huang, Liuqian; Zhang, Jing; Yu, Xiaoxiu; Ma, Yifan; Huang, Tianjiao; Shen, Xi; Qiu, Huayu; He, Xingxing; Yin, Shouchun
2015-06-01
A novel near-infrared fluorescent chemosensor based on BODIPY (Py-1) has been synthesized and characterized. Py-1 displays high selectivity and sensitivity for sensing Cu2+ over other metal ions in acetonitrile. Upon addition of Cu2+ ions, the maximum absorption band of Py-1 in CH3CN displays a red shift from 603 to 608 nm, which results in a visual color change from pink to blue. When Py-1 is excited at 600 nm in the presence of Cu2+, the fluorescent emission intensity of Py-1 at 617 nm is quenched over 86%. Notably, the complex of Py-1-Cu2+ can be restored with the introduction of EDTA or S2-. Consequently, an IMPLICATION logic gate at molecular level operating in fluorescence mode with Cu2+ and S2- as chemical inputs can be constructed. Finally, based on the reversible and reproducible system, a nanoscale sequential memory unit displaying "Writing-Reading-Erasing-Reading" functions can be integrated.
Massey, M. K.; Kotsialos, A.; Qaiser, F.; Zeze, D. A.; Pearson, C.; Volpati, D.; Bowen, L.; Petty, M. C.
2015-04-01
This paper explores the use of single-walled carbon nanotube (SWCNT)/poly(butyl methacrylate) composites as a material for use in unconventional computing. The mechanical and electrical properties of the materials are investigated. The resulting data reveal a correlation between the SWCNT concentration/viscosity/conductivity and the computational capability of the composite. The viscosity increases significantly with the addition of SWCNTs to the polymer, mechanically reinforcing the host material and changing the electrical properties of the composite. The electrical conduction is found to depend strongly on the nanotube concentration; Poole-Frenkel conduction appears to dominate the conductivity at very low concentrations (0.11% by weight). The viscosity and conductivity both show a threshold point around 1% SWCNT concentration; this value is shown to be related to the computational performance of the material. A simple optimization of threshold logic gates shows that satisfactory computation is only achieved above a SWCNT concentration of 1%. In addition, there is some evidence that further above this threshold the computational efficiency begins to decrease.
Li, Dandan; Cheng, Wei; Li, Yujian; Xu, YongJie; Li, Xinmin; Yin, Yibing; Ju, Huangxian; Ding, Shijia
2016-08-02
A target-switched DNA nanotweezer is designed for AND logic gate operation and enzyme-free detection of microRNAs (miRNAs) by catalytic hairpin assembly (CHA) and proximity-dependent DNAzyme formation. The double crossover motif-based nanotweezer consists of an arched structure as the set strand for target inputs and two split G-rich DNAs at the termini of two arms for signal output. Upon a CHA, a small amount of binary target inputs can switch numerous open nanotweezers to a closed state, which leads to the formation of proximity-dependent DNAzyme in the presence of hemin to produce a highly sensitive biosensing system. The binary target inputs can be used for successful building of AND logic gate, which is validated by polyacrylamide gel electrophoresis, surface plasmon resonance and the biosensing signal. The developed biosensing system shows a linear response of the output chemiluminescence signal to input binary miRNAs with a detection limit of 30 fM. It can be used for miRNAs analysis in complex sample matrix. This system provides a simple and reusable platform for logic gate operation and enzyme-free, highly sensitive, and specific multianalysis of miRNAs.
Dynamic Power Reduction of Digital Circuits by ClockGating
Varsha Dewre
2017-04-01
Full Text Available In this paper we have presented clock gating process for low power VLSI (very large scale integration circuit design. Clock gating is one of the most quite often used systems in RTL to shrink dynamic power consumption without affecting the performance of the design. One process involves inserting gating requisites in the RTL, which the synthesis tool translates to clock gating cells in the clock-path of a register bank. This helps to diminish the switching activity on the clock network, thereby decreasing dynamic power consumption within the design. Due to the fact the translation accomplished via the synthesis tool is solely combinational; it is referred to as combinational clock gating. This transformation does not alter the behavior of the register being gated
Goswami, Shyamaprosad; Manna, Abhishek; Paul, Sima; Aich, Krishnendu; Das, Avijit K; Chakraborty, Shampa
2013-06-14
In this study, we have synthesized a simple Schiff base type isophthaloyl salicylaldehyde hydrazone (ISH) moiety which selectively detects Al(III) and PPi with a fluorescence enhancement at two different wavelengths in aqueous solution. The sensing phenomenon is also reversible and thus the sensor beautifully mimics logic gates (INHIBIT and EXOR gates).
Implantable synthetic cytokine converter cells with AND-gate logic treat experimental psoriasis.
Schukur, Lina; Geering, Barbara; Charpin-El Hamri, Ghislaine; Fussenegger, Martin
2015-12-16
Psoriasis is a chronic inflammatory skin disease characterized by a relapsing-remitting disease course and correlated with increased expression of proinflammatory cytokines, such as tumor necrosis factor (TNF) and interleukin 22 (IL22). Psoriasis is hard to treat because of the unpredictable and asymptomatic flare-up, which limits handling of skin lesions to symptomatic treatment. Synthetic biology-based gene circuits are uniquely suited for the treatment of diseases with complex dynamics, such as psoriasis, because they can autonomously couple the detection of disease biomarkers with the production of therapeutic proteins. We designed a mammalian cell synthetic cytokine converter that quantifies psoriasis-associated TNF and IL22 levels using serially linked receptor-based synthetic signaling cascades, processes the levels of these proinflammatory cytokines with AND-gate logic, and triggers the corresponding expression of therapeutic levels of the anti-inflammatory/psoriatic cytokines IL4 and IL10, which have been shown to be immunomodulatory in patients. Implants of microencapsulated cytokine converter transgenic designer cells were insensitive to simulated bacterial and viral infections as well as psoriatic-unrelated inflammation. The designer cells specifically prevented the onset of psoriatic flares, stopped acute psoriasis, improved psoriatic skin lesions and restored normal skin-tissue morphology in mice. The antipsoriatic designer cells were equally responsive to blood samples from psoriasis patients, suggesting that the synthetic cytokine converter captures the clinically relevant cytokine range. Implanted designer cells that dynamically interface with the patient's metabolism by detecting specific disease metabolites or biomarkers, processing their blood levels with synthetic circuits in real time, and coordinating immediate production and systemic delivery of protein therapeutics may advance personalized gene- and cell-based therapies.
Systems chemistry: logic gates, arithmetic units, and network motifs in small networks.
Wagner, Nathaniel; Ashkenasy, Gonen
2009-01-01
A mixture of molecules can be regarded as a network if all the molecular components participate in some kind of interaction with other molecules--either physical or functional interactions. Template-assisted ligation reactions that direct replication processes can serve as the functional elements that connect two members of a chemical network. In such a process, the template does not necessarily catalyze its own formation, but rather the formation of another molecule, which in turn can operate as a template for reactions within the network medium. It was postulated that even networks made up of small numbers of molecules possess a wealth of molecular information sufficient to perform rather complex behavior. To probe this assumption, we have constructed virtual arrays consisting of three replicating molecules, in which dimer templates are capable of catalyzing reactants to form additional templates. By using realistic parameters from peptides or DNA replication experiments, we simulate the construction of various functional motifs within the networks. Specifically, we have designed and implemented each of the three-element Boolean logic gates, and show how these networks are assembled from four basic "building blocks". We also show how the catalytic pathways can be wired together to perform more complex arithmetic units and network motifs, such as the half adder and half subtractor computational modules, and the coherent feed-forward loop network motifs under different sets of parameters. As in previous studies of chemical networks, some of the systems described display behavior that would be difficult to predict without the numerical simulations. Furthermore, the simulations reveal trends and characteristics that should be useful as "recipes" for future design of experimental functional motifs and for potential integration into modular circuits and molecular computation devices.
Mixed-Species Logic Gates and High-Fidelity Universal Gate Set for Trapped-Ion Qubits
Tan, Ting Rei
2016-05-01
Precision control over hybrid physical systems at the quantum level is important for the realization of many quantum-based technologies. For trapped-ions, a hybrid system formed of different species introduces extra degrees of freedom that can be exploited to expand and refine the control of the system. We demonstrate an entangling gate between two atomic ions of different elements that can serve as an important building block of quantum information processing (QIP), quantum networking, precision spectroscopy, metrology, and quantum simulation. An entangling geometric phase gate between a 9 Be+ ion and a 25 Mg+ ion is realized through an effective spin-spin interaction generated by state-dependent forces. A mixed-species Bell state is thereby created with a fidelity of 0 . 979(1) . We use the gate to construct a SWAP gate that interchanges the quantum states of the two dissimilar qubits. We also report a high-fidelity universal gate set for 9 Be+ ion qubits, achieved through a combination of improved laser beam quality and control, improved state preparation, and reduced electric potential noise on trap electrodes. Supported by Office of the Director of National Intelligence (ODNI) Intelligence Advanced Research Projects Activity (IARPA), ONR, and the NIST Quantum Information Program.
On modeling the digital gate delay under process variation
Gao Mingzhi; Ye Zuochang; Wang Yan; Yu Zhiping
2011-01-01
To achieve a characterization method for the gate delay library used in block based statistical static timing analysis with neither unacceptably poor accuracy nor forbiddingly high cost,we found that general-purpose gate delay models are useful as intermediaries between the circuit simulation data and the gate delay models in required forms.In this work,two gate delay models for process variation considering different driving and loading conditions are proposed.From the testing results,these two models,especially the one that combines effective dimension reduction (EDR) from statistics society with comprehensive gate delay models,offer good accuracy with low characterization cost,and they are thus competent for use in statistical timing analysis (SSTA).In addition,these two models have their own value in other SSTA techniques.
Wang, Cheng-Yu; Chen, Chun-Wei; Jau, Hung-Chang; Li, Cheng-Chang; Cheng, Chiao-Yu; Wang, Chun-Ta; Leng, Shi-Ee; Khoo, Iam-Choon; Lin, Tsung-Hsien
2016-08-05
In this paper, we show that anisotropic photosensitive nematic liquid crystals (PNLC) made by incorporating anisotropic absorbing dyes are promising candidates for constructing all-optical elements by virtue of the extraordinarily large optical nonlinearity of the nematic host. In particular, we have demonstrated several room-temperature 'prototype' PNLC-based all-optical devices such as optical diode, optical transistor and all primary logic gate operations (OR, AND, NOT) based on such optical transistor. Owing to the anisotropic absorption property and the optical activity of the twist alignment nematic cell, spatially non-reciprocal transmission response can be obtained within a sizeable optical isolation region of ~210 mW. Exploiting the same mechanisms, a tri-terminal configuration as an all-optical analogue of a bipolar junction transistor is fabricated. Its ability to be switched by an optical field enables us to realize an all-optical transistor and demonstrate cascadability, signal fan-out, logic restoration, and various logical gate operations such as OR, AND and NOT. Due to the possibility of synthesizing anisotropic dyes and wide ranging choice of liquid crystals nonlinear optical mechanisms, these all-optical operations can be optimized to have much lower thresholds and faster response speeds. The demonstrated capabilities of these devices have shown great potential in all-optical control system and photonic integrated circuits.
NSLS-II Digital RF Controller Logic and Applications
Holub, B. [Brookhaven National Lab. (BNL), Upton, NY (United States); Gao, F. [Brookhaven National Lab. (BNL), Upton, NY (United States); Kulpin, J. [Brookhaven National Lab. (BNL), Upton, NY (United States); Marques, C. [Brookhaven National Lab. (BNL), Upton, NY (United States); Oliva, J. [Brookhaven National Lab. (BNL), Upton, NY (United States); Rose, J. [Brookhaven National Lab. (BNL), Upton, NY (United States); Towne, N. [Brookhaven National Lab. (BNL), Upton, NY (United States)
2015-05-03
The National Synchrotron Light Source II (NSLS-II) accelerator consists of the Storage Ring, the Booster Ring and Linac along with their associated cavities. Given the number, types and variety of functions of these cavities, we sought to limit the logic development effort by reuse of parameterized code on one hardware platform. Currently there are six controllers installed in the NSLS-II system. There are two in the Storage ring, two in the Booster ring, one in the Linac and one in the Master Oscillator Distribution system.
Quantum half-adder Boolean logic gate with a nano-graphene molecule and graphene nano-electrodes
Srivastava, Saurabh; Kino, Hiori; Joachim, Christian
2017-01-01
A molecule Boolean 1 / 2 -adder is designed and the XOR and AND truth table calculated at +0.1 V using 4 graphene electrodes. It functions with level repulsion and destructive interferences effects using 4 molecule electronic states in a quantum Hamiltonian computing approach (QHC) with the abrupt change of the molecular orbital weight of those 4 calculating states as a function of the logical input configuration. The logical inputs enter rotating the two nitro groups of the central board. With QHC, a complex Boolean digital function can be implemented employing the same graphene material for interconnects and the molecule calculating parts.
Yeom, Donghyuk; Keem, Kihyun; Kang, Jeongmin; Jeong, Dong-Young; Yoon, Changjoon; Kim, Dongseung; Kim, Sangsig
2008-07-02
Electrical characteristics of NOT and NAND logic circuits fabricated using top-gate ZnO nanowire field-effect transistors (FETs) with high-k Al(2)O(3) gate layers were investigated in this study. To form a NOT logic circuit, two identical FETs whose I(on)/I(off) ratios were as high as ∼10(8) were connected in series in a single ZnO nanowire channel, sharing a common source electrode. Its voltage transfer characteristics exhibited an inverting operation and its logic swing was 98%. In addition, the characteristics of a NAND logic circuit composed of three top-gate FETs connected in series in a single nanowire channel are discussed in this paper.
Principles of logic and the use of digital geographic information systems
Robinove, Charles Joseph
1986-01-01
Digital geographic information systems allow many different types of data to be spatially and statistically analyzed. Logical operations can be performed on individual or multiple data planes by algorithms that can be implemented in computer systems. Users and creators of the systems should fully understand these operations. This paper describes the relationships of layers and features in geographic data bases and the principles of logic that can be applied by geographic information systems and suggests that a thorough knowledge of the data that are entered into a geographic data base and of the logical operations will produce results that are most satisfactory to the user. Methods of spatial analysis are reduced to their primitive logical operations and explained to further such understanding.
Superconductive combinational logic circuit using magnetically coupled SQUID array
Yamanashi, Y., E-mail: yamanasi@ynu.ac.j [Interdisciplinary Research Center, Yokohama National University, Tokiwadai 79-5, Hodogaya-ku, Yokohama 240-8501 (Japan); Umeda, K.; Sai, K. [Department of Electrical and Computer Engineering, Yokohama National University, Tokiwadai 79-5, Hodogaya-ku, Yokohama 240-8501 (Japan)
2010-11-01
In this paper, we propose the development of superconductive combinational logic circuits. One of the difficulties in designing superconductive single-flux-quantum (SFQ) digital circuits can be attributed to the fundamental nature of the SFQ circuits, in which all logic gates have latching functions and are based on sequential logic. The design of ultralow-power superconductive digital circuits can be facilitated by the development of superconductive combinational logic circuits in which the output is a function of only the present input. This is because superconductive combinational logic circuits do not require determination of the timing adjustment and clocking scheme. Moreover, semiconductor design tools can be used to design digital circuits because CMOS logic gates are based on combinational logic. The proposed superconductive combinational logic circuits comprise a magnetically coupled SQUID array. By adjusting the circuit parameters and coupling strengths between neighboring SQUIDs, fundamental combinational logic gates, including the AND, OR, and NOT gates, can be built. We have verified the accuracy of the operations of the fundamental logic gates by analog circuit simulations.
Digit-Recurrence Dividers with Reduced Logical Depth
Antelo, Elisardo; Lang, Tomas; Montuschi, Paolo
2005-01-01
In this paper, we propose a class of division algorithms with the aim of reducing the delay of the selection of the quotient digit by introducing more concurrency and flexibility in its computation. From the proposed class of algorithms, we select one that moves part of the selection function out...
Wang, Yonggang; Kuang, Jie; Liu, Chong; Cao, Qiang; Li, Deng
2017-03-01
A high performance multi-channel time-to-digital converter (TDC) is implemented in a Xilinx Zynq-7000 field programmable gate array (FPGA). It can be flexibly configured as either 32 TDC channels with 9.9 ps time-interval RMS precision, 16 TDC channels with 6.9 ps RMS precision, or 8 TDC channels with 5.8 ps RMS precision. All TDCs have a 380 M Samples/second measurement throughput and a 2.63 ns measurement dead time. The performance consistency and temperature dependence of TDC channels are also evaluated. Because Zynq-7000 FPGA family integrates a feature-rich dual-core ARM based processing system and 28 nm Xilinx programmable logic in a single device, the realization of high performance TDCs on it will make the platform more widely used in time-measuring related applications.
Quantum state transfer and logic gates with two 3-level atoms in cavity QED
Yang, Chui-Ping; Chu, Shih-I.
2004-08-01
We present a new way to implement quantum controlled phase-shift gate, quantum exchange gate (SWAP gate), and quantum state transfer with two 3-level atoms in cavity QED. The method does not involve real excitation of a cavity photon during the operation, thus decoherence induced due to the cavity-photon decay is minimized. In addition, it is remarkable that for all present purposes, no auxiliary atoms or any measurement is needed. Therefore, the operation is significantly simplified.
Castagnoli, G C
1999-01-01
In former work, quantum computation has been shown to be a problem solving process essentially affected by both the reversible dynamics leading to the state before measurement, and the logical-mathematical constraints introduced by quantum measurement (in particular, the constraint that there is only one measurement outcome). This dual influence, originated by independent initial and final conditions, justifies the quantum computation speed-up and is not representable inside dynamics, namely as a one-way propagation. In this work, we reformulate von Neumann's model of quantum measurement at the light of above findings. We embed it in a broader representation based on the quantum logic gate formalism and capable of describing the interplay between dynamical and non-dynamical constraints. The two steps of the original model, namely (1) dynamically reaching a complete entanglement between pointer and quantum object and (2) enforcing the one-outcome-constraint, are unified and reversed. By representing step (2) r...
F. Djeffal; A. Ferdi; M. Chahdi
2012-01-01
The double gate (DG) silicon MOSFET with an extremely short-channel length has the appropriate features to constitute the devices for nanoscale circuit design.To develop a physical model for extremely scaled DG MOSFETs,the drain current in the channel must be accurately determined under the application of drain and gate voltages.However,modeling the transport mechanism for the nanoscale structures requires the use of overkill methods and models in terms of their complexity and computation time (self-consistent,quantum computations ).Therefore,new methods and techniques are required to overcome these constraints.In this paper,a new approach based on the fuzzy logic computation is proposed to investigate nanoscale DG MOSFETs.The proposed approach has been implemented in a device simulator to show the impact of the proposed approach on the nanoelectronic circuit design.The approach is general and thus is suitable for any type ofnanoscale structure investigation problems in the nanotechnology industry.
Toward high-performance digital logic technology with carbon nanotubes.
Tulevski, George S; Franklin, Aaron D; Frank, David; Lobez, Jose M; Cao, Qing; Park, Hongsik; Afzali, Ali; Han, Shu-Jen; Hannon, James B; Haensch, Wilfried
2014-09-23
The slow-down in traditional silicon complementary metal-oxide-semiconductor (CMOS) scaling (Moore's law) has created an opportunity for a disruptive innovation to bring the semiconductor industry into a postsilicon era. Due to their ultrathin body and ballistic transport, carbon nanotubes (CNTs) have the intrinsic transport and scaling properties to usher in this new era. The remaining challenges are largely materials-related and include obtaining purity levels suitable for logic technology, placement of CNTs at very tight (∼5 nm) pitch to allow for density scaling and source/drain contact scaling. This review examines the potential performance advantages of a CNT-based computing technology, outlines the remaining challenges, and describes the recent progress on these fronts. Although overcoming these issues will be challenging and will require a large, sustained effort from both industry and academia, the recent progress in the field is a cause for optimism that these materials can have an impact on future technologies.
An Imidazole based probe for relay recognition of Cu2+ and OH− ions leading to AND logic gate
Navneet Kaur; Priya Alreja
2015-07-01
2-(2-methoxyphenyl)-4,5-diphenyl-1H-imidazole 1, an imidazole-based compound, was found to sense Cu2+ ions via fluorescence and absorption spectroscopy over a number of other metal ions. During Cu2+ sensing, the chemosensor 1 followed a “switch-off” mechanism. Job’s plot supported 1:1 stoichiometry of 1-Cu2+ complex. The 1-Cu2+ complex formed in situ underwent different absorption changes with OH− ions. These differential absorption changes observed with the addition of Cu2+ and OH− ions were used to mimic AND logic gate using A274nm as output.
Digital Poetry: A Narrow Relation between Poetics and the Codes of the Computational Logic
Laurentiz, Silvia
The project "Percorrendo Escrituras" (Walking Through Writings Project) has been developed at ECA-USP Fine Arts Department. Summarizing, it intends to study different structures of digital information that share the same universe and are generators of a new aesthetics condition. The aim is to search which are the expressive possibilities of the computer among the algorithm functions and other of its specific properties. It is a practical, theoretical and interdisciplinary project where the study of programming evolutionary language, logic and mathematics take us to poetic experimentations. The focus of this research is the digital poetry, and it comes from poetics of permutation combinations and culminates with dynamic and complex systems, autonomous, multi-user and interactive, through agents generation derivations, filtration and emergent standards. This lecture will present artworks that use some mechanisms introduced by cybernetics and the notion of system in digital poetry that demonstrate the narrow relationship between poetics and the codes of computational logic.
A parity checker circuit based on microelectromechanical resonator logic elements
Hafiz, Md Abdullah Al; Li, Ren; Younis, Mohammad I.; Fariborzi, Hossein
2017-03-01
Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro-resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized.
A parity checker circuit based on microelectromechanical resonator logic elements
Hafiz, Md Abdullah Al
2017-01-11
Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized.
Maximizing Strength of Digital Watermarks using Fuzzy Logic
Oueslati, Sameh; Solaiman, Bassel
2011-01-01
In this paper, we propose a novel digital watermarking scheme in DCT domain based fuzzy inference system and the human visual system to adapt the embedding strength of different blocks. Firstly, the original image is divided into some 8 \\times 8 blocks, and then fuzzy inference system according to different textural features and luminance of each block decide adaptively different embedding strengths. The watermark detection adopts correlation technology. Experimental results show that the proposed scheme has good imperceptibility and high robustness to common image processing operators.
Maximizing Strength of Digital Watermarks Using Fuzzy Logic
Sameh Oueslati
2011-02-01
Full Text Available In this paper, we propose a novel digital watermarking scheme in DCT domain based fuzzy inferencesystem and the human visual system to adapt the embedding strength of different blocks. Firstly, theoriginal image is divided into some 8×8 blocks, and then fuzzy inference system according to differenttextural features and luminance of each block decide adaptively different embedding strengths. Thewatermark detection adopts correlation technology. Experimental results show that the proposed schemehas good imperceptibility and high robustness to common image processing operators.
Online Testable Decoder using Reversible Logic
Hemalatha. K. N. Manjula B. B. Girija. S
2012-02-01
Full Text Available The project proposes to design and test 2 to 4 reversible Decoder circuit with arbitrary number of gates to an online testable reversible one and is independent of the type of reversible gate used. The constructed circuit can detect any single bit errors and to convert a decoder circuit that is designed by reversible gates to an online testable reversible decoder circuit. Conventional digital circuits dissipate a significant amount of energy because bits of information are erased during the logic operations. Thus if logic gates are designed such that the information bits are not destroyed, the power consumption can be reduced. The information bits are not lost in case of a reversible computation. Reversible logic can be used to implement any Boolean logic function.
Nugamesh Mutter, Kussay; Mat Jafri, Mohd Zubir; Abdul Aziz, Azlan
2010-05-01
Many researches are conducted to improve Hopfield Neural Network (HNN) performance especially for speed and memory capacity in different approaches. However, there is still a significant scope of developing HNN using Optical Logic Gates. We propose here a new model of HNN based on all-optical XNOR logic gates for real time color image recognition. Firstly, we improved HNN toward optimum learning and converging operations. We considered each unipolar image as a set of small blocks of 3-pixels as vectors for HNN. This enables to save large number of images in the net with best reaching into global minima, and because there are only eight fixed states of weights so that only single iteration performed to construct a vector with stable state at minimum energy. HNN is useless in dealing with data not in bipolar representation. Therefore, HNN failed to work with color images. In RGB bands each represents different values of brightness, for d-bit RGB image it is simply consists of d-layers of unipolar. Each layer is as a single unipolar image for HNN. In addition, the weight matrices with stability of unity at the diagonal perform clear converging in comparison with no self-connecting architecture. Synchronously, each matrix-matrix multiplication operation would run optically in the second part, since we propose an array of all-optical XOR gates, which uses Mach-Zehnder Interferometer (MZI) for neurons setup and a controlling system to distribute timely signals with inverting to achieve XNOR function. The primary operation and simulation of the proposal HNN is demonstrated.
Fuzzy logic control strategy for submerged arc automatic welding of digital controlling
He Kuanfang; Huang Shisheng; Zhou Yiqing; Wang Zhenmin
2008-01-01
A microcomputer control system based on 80C320 and a switching regulation of wire feeder were designed. A correction factor based double model fuzzy logic controller (FLC) was introduced to achieve welding digital and intellectualized control by means of wire feeding speed feedback. The controller has many functions such as keyboard input, light emitting diode (LED) display and real-time intellectualized control of welding process etc. The controlling performance influenced by the coefficient of correction function was discussed. It was concluded by the experiments the relation between the coefftcient of correction function and welding quality, when the coefficient of correction function is great, the dynamic character of controller is better, when the coefficient of correction function is small, the sensitivity character of controller is better. Experimental results also show that digital and fuzzy logic control method enable the improvement of appearance of weld and stability of welding process to be achieved in submerged arc automatic welding.
Digital model of TiO(2 memristor for field-programmable gate array
Guangyi Wang
2014-03-01
Full Text Available A digital model which imitates the behaviour of a TiO(2 memristor as a new block in Alter DSP Builder is proposed in this Letter. The proposed model can be used as an independent memristor unit working with other units for designing memristor circuits based on field-programmable gate array. The accuracy of the digital model is confirmed not only by simulations, but also by hardwire experiments.
Old citizens, new logics: Digital literacy and elderly citizens in Denmark
Stald, Gitte Bang
2016-01-01
Old citizens, new logics: Digital literacy and elderly citizens in Denmark Many my age have problems with IT. We are now reasonably informed and we have had computers for many years but our competences are still not tiptop and that is definitely a problem. This 79-year old man talks about...... citizenship. Empirically the paper is based on findings from a study of media literacy in a Danish context , conducted in 2014-15. The data was collected during visits with 40 citizens in 20 families across Denmark. Five families were elderly. The analysis is supported by data from Statistics Denmark...... and The Danage Association. Theoretically, the article discusses definitions of digital literacy respectively digital citizenship; and it draws on theories on mediatization, media ecologies, and digital governance. REFERENCES (selected) Borchorst, D.S. et al (2016). ”Digitalisering af ældre menneskers hverdag...
Fuzzy Logic Module of Convolutional Neural Network for Handwritten Digits Recognition
Popko, E. A.; Weinstein, I. A.
2016-08-01
Optical character recognition is one of the important issues in the field of pattern recognition. This paper presents a method for recognizing handwritten digits based on the modeling of convolutional neural network. The integrated fuzzy logic module based on a structural approach was developed. Used system architecture adjusted the output of the neural network to improve quality of symbol identification. It was shown that proposed algorithm was flexible and high recognition rate of 99.23% was achieved.
Taeed, Fazel; Salam, Z.; Ayob, S.
2012-01-01
for the control surface to be approximated by a piecewise linear. It is shown that, despite the simplicity of SIFLC, its control performance is almost equivalent to that of the conventional FLC. As a proof of concept, the SIFLC is implemented using the Altera EP2C35F672C6N field-programmable gate array (FPGA......-to-digital converter (ADC). Instead, a simple analog-to-digital conversion scheme is implemented using the FPGA itself. Due to the simplicity of the SIFLC algorithm and the absence of an external ADC, the overall implementation requires only 408 logic elements and five input-output pins of the FPGA. © 2011 IEEE....
Rhee, Minsoung; Burns, Mark A
2009-11-07
We have developed pneumatic logic circuits and microprocessors built with microfluidic channels and valves in polydimethylsiloxane (PDMS). The pneumatic logic circuits perform various combinational and sequential logic calculations with binary pneumatic signals (atmosphere and vacuum), producing cascadable outputs based on Boolean operations. A complex microprocessor is constructed from combinations of various logic circuits and receives pneumatically encoded serial commands at a single input line. The device then decodes the temporal command sequence by spatial parallelization, computes necessary logic calculations between parallelized command bits, stores command information for signal transportation and maintenance, and finally executes the command for the target devices. Thus, such pneumatic microprocessors will function as a universal on-chip control platform to perform complex parallel operations for large-scale integrated microfluidic devices. To demonstrate the working principles, we have built 2-bit, 3-bit, 4-bit, and 8-bit microprocessors to control various target devices for applications such as four color dye mixing, and multiplexed channel fluidic control. By significantly reducing the need for external controllers, the digital pneumatic microprocessor can be used as a universal on-chip platform to autonomously manipulate microfluids in a high throughput manner.
Aytar, Oktay
2015-09-01
This paper presents a novel comparator structure based on the common gate differential MOS pair. The proposed comparator has been applied to fully parallel analog to digital converter (A/D converter). Furthermore, this article presents 5 bit fully parallel A/D Converter design using the cadence IC5141 design platform and NCSU(North Carolina State University) design kit with 0.18 μm CMOS technology library. The proposed fully parallel A/D converter consist of resistor array block, comparator block, 1-n decoder block and programmable logic array. The 1-n decoder block includes latch block and thermometer code circuit that is implemented using transmission gate based multiplexer circuit. Thus, sampling frequency and analog bandwidth are increased. The INL and DNL of the proposed fully parallel A/D converter are (0/ + 0.63) LSB and (-0.26/ + 0.31) LSB at a sampling frequency of 5 GS/s with an input signal of 50 MHz, respectively. The proposed fully parallel A/D Converter consumes 340 mW from 1.8 V supply.
Digital-circuit analysis of short-gate tunnel FETs for low-voltage applications
Zhuge, Jing; Verhulst, Anne S.; Vandenberghe, William G.; Dehaene, Wim; Huang, Ru; Wang, Yangyuan; Groeseneken, Guido
2011-08-01
This paper investigates the potential of tunnel field-effect transistors (TFETs), with emphasis on short-gate TFETs, by simulation for low-power digital applications having a supply voltage lower than 0.5 V. A transient study shows that the tunneling current has a negligible contribution in charging and discharging the gate capacitance of TFETs. In spite of a higher resistance region in the short-gate TFET, the gate (dis)charging speed still meets low-voltage application requirements. A circuit analysis is performed on short-gate TFETs with different materials, such as Si, Ge and heterostructures in terms of voltage overshoot, delay, static power, energy consumption and energy delay product (EDP). These results are compared to MOSFET and full-gate TFET performance. It is concluded that short-gate heterostructure TFETs (Ge-source for nTFET, In0.6Ga0.4As-source for pTFET) are promising candidates to extend the supply voltage to lower than 0.5 V because they combine the advantage of a low Miller capacitance, due to the short-gate structures, and strong drive current in TFETs, due to the narrow bandgap material in the source. At a supply voltage of 0.4 V and for an EOT and channel length of 0.6 nm and 40 nm, respectively, a three-stage inverter chain based on short-gate heterostructure TFETs saves 40% energy consumption per cycle at the same delay and shows 60%-75% improvement of EDP at the same static power, compared to its full-gate counterpart. When compared to the MOSFET, better EDP can be achieved in the heterostructure TFET especially at low static power consumption.
Meyer-Base, U.; Vera, A.; Meyer-Base, A.; Pattichis, M. S.; Perry, R. J.
2010-01-01
In this paper, an innovative educational approach to introducing undergraduates to both digital signal processing (DSP) and field programmable gate array (FPGA)-based design in a one-semester course and laboratory is described. While both DSP and FPGA-based courses are currently present in different curricula, this integrated approach reduces the…
Zheng Xiaojuan [College of Physics and Information Science, Hunan Normal University, Changsha, 410081 (China); Fang Maofa [College of Physics and Information Science, Hunan Normal University, Changsha, 410081 (China); Liao Xiangping [College of Physics and Information Science, Hunan Normal University, Changsha, 410081 (China); Cai Jianwu [College of Physics and Information Science, Hunan Normal University, Changsha, 410081 (China)
2007-02-14
In the system with a two-level ion confined both in a linear trap and in a high-Q single-mode cavity, we present a simple scheme to realize the basic two-qubit logic gates such as the quantum phase gate (QPG), the SWAP gate and the controlled-NOT (CNOT) gate beyond the Lamb-Dicke (LD) limit. We realize the three kinds of two-qubit quantum phase gates, i.e. QPG operation involving the cavity mode as well as the vibrational mode of the trapped ion, QPG operation involving the internal states as well as the vibrational mode of the trapped ion and QPG operation involving the internal states of the trapped ion as well as the cavity mode. The controlled-NOT gate can be implemented from a QPG operation through a rotation of the second qubit before and after the QPG operation. We can also perform the SWAP gate operation involving the ionic internal states of the trapped ion and the two-mode bosonic basis. The logic gates involving the cavity mode as well as the vibrational mode of the trapped ion are insensitive to spontaneous emission, and the logic gates involving the internal states as well as the vibrational mode of the trapped ion are insensitive to the decay of the cavity, which is an important feature for the practical implementation of quantum computing. Neither the LD approximation nor the auxiliary atomic level is needed in our scheme. Experimental feasibility for achieving our scheme is also discussed.
Chen, Yuqi; Song, Yanyan; Wu, Fan; Liu, Wenting; Fu, Boshi; Feng, Bingkun; Zhou, Xiang
2015-04-25
A conveniently amplified DNA AND logic gate platform was designed for the highly sensitive detection of low-abundance DNA fragment inputs based on strand displacement reaction and rolling circle amplification strategy. Compared with others, this system can detect miRNAs in biological samples. The success of this strategy demonstrates the potential of DNA logic gates in disease diagnosis.
Ultra-low-power carbon nanotube FET-based quaternary logic gates
Sharifi, Fazel; Moaiyeri, Mohammad Hossein; Navi, Keivan; Bagherzadeh, Nader
2016-09-01
This paper presents low-power carbon nanotube field-effect transistor (CNTFET)-based quaternary logic circuits. The proposed quaternary circuits are designed based on the CNTFET unique properties, such as the same carrier mobility for N- and P-type devices and also providing desirable threshold voltages by adopting proper diameters for the nanotubes. In addition, no paths exist between supply and ground rails in the steady states of the proposed designs, which eliminates the ON state static current and also the stacking technique is utilised in order to significantly reduce the leakage currents. The results of the simulations, conducted using Synopsys HSPICE with the standard 32 nm CNTFET technology, confirm the significantly lower power consumption, higher energy efficiency and lower sensitivity to process variation of the proposed designs compared to the state-of-the-art quaternary logic circuits. The proposed quaternary logic circuits have on average 92, 99 and 91% less total power, static power and PDP, respectively, compared with the most low-power and energy-efficient CNTFET-based quaternary logic circuits, recently presented in the literature.
Two-Input Enzymatic Logic Gates Made Sigmoid by Modifications of the Biocatalytic Reaction Cascades
Zavalov, Oleksandr; Halamek, Jan; Halamkova, Lenka; Korkmaz, Sevim; Arugula, Mary A; Chinnapareddy, Soujanya; Katz, Evgeny; Privman, Vladimir
2013-01-01
Computing based on biochemical processes is a newest rapidly developing field of unconventional information and signal processing. In this paper we present results of our research in the field of biochemical computing and summarize the obtained numerical and experimental data for implementations of the standard two-input OR and AND gates with double-sigmoid shape of the output signal. This form of response was obtained as a function of the two inputs in each of the realized biochemical systems. The enzymatic gate processes in the first system were activated with two chemical inputs and resulted in optically detected chromogen oxidation, which happens when either one or both of the inputs are present. In this case, the biochemical system is functioning as the OR gate. We demonstrate that the addition of a "filtering" biocatalytic process leads to a considerable reduction of the noise transmission factor and the resulting gate response has sigmoid shape in both inputs. The second system was developed for functi...
Simple and Fast Scheme for Realizing Quantum Logic Gates in an Ion Trap
ZHENG Shi-Biao
2004-01-01
We propose a simple and fast scheme to realize a controlled-NOT gate between two trapped ions using a resonant laser pulse. Our scheme allows the Rabi frequency of the laser field to be of the order of the vibrational frequency and thus the time required to complete the operation is greatly shortened, which is of importance in view of decoherence.
Lu, Bin; Cheng, Xiaomin; Feng, Jinlong; Guan, Xiawei; Miao, Xiangshui
2016-07-01
Nonvolatile memory devices or circuits that can implement both storage and calculation are a crucial requirement for the efficiency improvement of modern computer. In this work, we realize logic functions by using [GeTe/Sb2Te3]n super lattice phase change memory (PCM) cell in which higher threshold voltage is needed for phase change with a magnetic field applied. First, the [GeTe/Sb2Te3]n super lattice cells were fabricated and the R-V curve was measured. Then we designed the logic circuits with the super lattice PCM cell verified by HSPICE simulation and experiments. Seven basic logic functions are first demonstrated in this letter; then several multi-input logic gates are presented. The proposed logic devices offer the advantages of simple structures and low power consumption, indicating that the super lattice PCM has the potential in the future nonvolatile central processing unit design, facilitating the development of massive parallel computing architecture.
Huang, Zhenzhen; Ren, Jinsong; Qu, Xiaogang
2012-03-01
Molecule-like silver nanoclusters (AgNCs) with few to tens of atoms are highly sensitive to the sequence and structure of DNA stabilizers. In this paper, a novel pH-triggered reversible molecular fluorescence switch is developed by taking advantage of the DNA-dependent fluorescence pH response of AgNCs. The DNA-AgNCs fluorescence switch simultaneously addresses concerns of simple construction strategy, efficient design and organic-solvent-free operation. Moreover, the excellent photostability and biocompatibility of AgNCs provide great potential for application of the DNA-AgNCs fluorescence switch in the development of functional molecular devices. Specifically, we apply the DNA-AgNCs fluorescence switch combined with the DNA sequence-dependent pH response pattern of AgNCs for construction of molecular logic gates.
Park, Steve [Department of Materials Science and Engineering, Stanford University, Durand Building, 496 Lomita Mall, Stanford, California 94305-4034 (United States); Nam, Ji Hyun [Department of Electrical Engineering, Stanford University, David Packard Building, 350 Serra Mall, Mail Code: 9505, Stanford, California 94305-9505 (United States); Koo, Ja Hoon; Lei, Ting; Bao, Zhenan, E-mail: zbao@stanford.edu [Department of Chemical Engineering, Stanford University, Shriram Center, 443 Via Ortega, Room 307, Stanford, California 94305-4145 (United States)
2015-03-09
We demonstrate a technique to convert p-type single-walled carbon nanotube (SWNT) network transistor into ambipolar transistor by thermally evaporating C{sub 60} on top. The addition of C{sub 60} was observed to have two effects in enhancing ambipolar characteristics. First, C{sub 60} served as an encapsulating layer that enhanced the ambipolar characteristics of SWNTs. Second, C{sub 60} itself served as an electron transporting layer that contributed to the n-type conduction. Such a dual effect enables effective conversion of p-type into ambipolar characteristics. We have fabricated inverters using our SWNT/C{sub 60} ambipolar transistors with gain as high as 24, along with adaptive NAND and NOR logic gates.
Venkatesh, P. R.; Venkatesan, A.
2016-10-01
We report the occurrence of vibrational resonance in piecewise-linear non-autonomous system. Especially, we show that an optimal amplitude of the high frequency second harmonic driving enhances the response of a piece-wise linear non-autonomous Murali-Lakshmanan-Chua (MLC) system to a low frequency first harmonic signal. This phenomenon is illustrated with the analytical solutions of circuit equations characterising the system and finally compared with the numerical method. Further, it has been enunciated explicitly, the implementation of the fundamental NOR/NAND gate via vibrational resonance, both by numerical and analytical solutions. In addition, these logical behaviours (AND/NAND/OR/NOR) can be decided by the amplitude of the input square waves without altering the system parameters.
Unipolar organic transistor circuits made robust by dual-gate technology
Myny, K.; Beenhakkers, M.J.; Aerle, N.A.J.M. van; Gelinck, G.H.; Genoe, J.; Dehaene, W.; Heremans, P.
2011-01-01
Dual-gate organic transistor technology is used to increase the robustness of digital circuits as illustrated by higher inverter gains and noise margins. The additional gate in the technology functions as a VT-control gate. Both zero-VGS-load and diode-load logic are investigated. The noise margin o
Wei-feng LU; Mi LIN; Ling-ling SUN
2009-01-01
Neurons with complex-valued weights have stronger capability because of their multi-valued threshold logic. Neurons with such features may be suitable for solution of different kinds of problems including associative memory, image recognition and digital logical mapping. In this paper, robustness or tolerance is introduced and newly defined for this kind of neuron ac-cording to both their mathematical model and the perceptron neuron's definition of robustness. Also, the most robust design for basic digital logics of multiple variables is proposed based on these robust neurons. Our proof procedure shows that, in robust design each weight only takes the value of i or -i, while the value of threshold is with respect to the number of variables. The results demonstrate the validity and simplicity of using robust neurons for realizing arbitrary digital logical functions.
Ikeda, Masato; Tanida, Tatsuya; Yoshii, Tatsuyuki; Kurotani, Kazuya; Onogi, Shoji; Urayama, Kenji; Hamachi, Itaru
2014-06-01
Soft materials that exhibit stimuli-responsive behaviour under aqueous conditions (such as supramolecular hydrogels composed of self-assembled nanofibres) have many potential biological applications. However, designing a macroscopic response to structurally complex biochemical stimuli in these materials still remains a challenge. Here we show that redox-responsive peptide-based hydrogels have the ability to encapsulate enzymes and still retain their activities. Moreover, cooperative coupling of enzymatic reactions with the gel response enables us to construct unique stimuli-responsive soft materials capable of sensing a variety of disease-related biomarkers. The programmable gel-sol response (even to biological samples) is visible to the naked eye. Furthermore, we built Boolean logic gates (OR and AND) into the hydrogel-enzyme hybrid materials, which were able to sense simultaneously plural specific biochemicals and execute a controlled drug release in accordance with the logic operation. The intelligent soft materials that we have developed may prove valuable in future medical diagnostics or treatments.
Alternating phase-shifted mask for logic gate levels, design, and mask manufacturing
Liebmann, Lars W.; Graur, Ioana C.; Leipold, William C.; Oberschmidt, James M.; O'Grady, David S.; Regaill, Denis
1999-07-01
While the benefits of alternating phase shifted masks in improving lithographic process windows at increased resolution are well known throughout the lithography community, broad implementation of this potentially powerful technique has been slow due to the inherent complexity of the layout design and mask manufacturing process. This paper will review a project undertaken at IBM's Semiconductor Research and Development Center and Mask Manufacturing and Development facility to understand the technical and logistical issues associated with the application of alternating phase shifted mask technology to the gate level of a full microprocessor chip. The work presented here depicts an important milestone toward integration of alternating phase shifted masks into the manufacturing process by demonstrating an automated design solution and yielding a functional alternating phase shifted mask. The design conversion of the microprocessor gate level to a conjugate twin shifter alternating phase shift layout was accomplished with IBM's internal design system that automatically scaled the design, added required phase regions, and resolved phase conflicts. The subsequent fabrication of a nearly defect free phase shifted mask, as verified by SEM based die to die inspection, highlights the maturity of the alternating phase shifted mask manufacturing process in IBM's internal mask facility. Well defined and recognized challenges in mask inspection and repair remain and the layout of alternating phase shifted masks present a design and data preparation overhead, but the data presented here demonstrate the feasibility of designing and building manufacturing quality alternating phase shifted masks for the gate level of a microprocessor.
A Novel Design of Half Subtractor using Reversible Feynman Gate in Quantum Dot cellular Automata
Rubina Akter
2014-12-01
Full Text Available Quantum Dot cellular Automata (QCA is an emerging, promising alternative to CMOS technology that performs its task by encoding binary information on electronic charge configuration of a cell. All circuit based on QCA has an advantages of high speed, high parallel processing, high integrityand low power consumption. Reversible logic gates are the leading part in Quantum Dot cellular Automata. Reversible logic gates have an extensive feature that does not lose information. In this paper, we present a novel architecture of half subtractor gate design by reversible Feynman gate. This circuit is designedbased on QCA logic gates such as QCA majority voter gate, majority AND gate, majority OR gate and inverter gate. This circuit will provide an effective working efficiency on computational units of the digital circuit system.
Synthesis of Fault Tolerant Reversible Logic Circuits
Islam, Md Saiful; Begum, Zerina; Hafiz, Mohd Zulfiquar; Mahmud, Abdullah Al; 10.1109/CAS-ICTD.2009.4960883
2010-01-01
Reversible logic is emerging as an important research area having its application in diverse fields such as low power CMOS design, digital signal processing, cryptography, quantum computing and optical information processing. This paper presents a new 4*4 universal reversible logic gate, IG. It is a parity preserving reversible logic gate, that is, the parity of the inputs matches the parity of the outputs. The proposed parity preserving reversible gate can be used to synthesize any arbitrary Boolean function. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. Finally, it is shown how a fault tolerant reversible full adder circuit can be realized using only two IGs. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts.
Auto- and hetero-associative memory using a 2-D optical logic gate
Chao, Tien-Hsin
1989-01-01
An optical associative memory system suitable for both auto- and hetero-associative recall is demonstrated. This system utilizes Hamming distance as the similarity measure between a binary input and a memory image with the aid of a two-dimensional optical EXCLUSIVE OR (XOR) gate and a parallel electronics comparator module. Based on the Hamming distance measurement, this optical associative memory performs a nearest neighbor search and the result is displayed in the output plane in real-time. This optical associative memory is fast and noniterative and produces no output spurious states as compared with that of the Hopfield neural network model.
AD-PLL for WiMAX with Digitally-Regulated TDC and Glitch Correction Logic
Levantino Salvatore
2010-01-01
Full Text Available This paper describes the design of an All-Digital Phase Locked Loop (AD-PLL for wireless applications in the WiMAX 3.3–3.8 GHz bandwidth. The time/digital converter (TDC sets the in-band noise and it may be responsible for the presence of spurious tones at the PLL output. The TDC is implemented as a delay-locked loop (DLL to be insensitive to process spreads and it uses a lead-lag phase detector and a digital loop filter to further take advantage of the digital approach. The most important source of spurs is identified in the time skew between counter and TDC in the PLL. This mechanism gives rise to a glitch in the digital feedback signal and spurs in the output spectrum. A simple glitch-corrector logic is described, that completely removes this effect, thus allowing to meet the phase noise specifications. The AD-PLL has been designed in a 90 nm CMOS process.
Field Programmable Gate Array for Implementation of Redundant Advanced Digital Feedback Control
King, K. D.
2003-01-01
The goal of this effort was to develop a digital motor controller using field programmable gate arrays (FPGAs). This is a more rugged approach than a conventional microprocessor digital controller. FPGAs typically have higher radiation (rad) tolerance than both the microprocessor and memory required for a conventional digital controller. Furthermore, FPGAs can typically operate at higher speeds. (While speed is usually not an issue for motor controllers, it can be for other system controllers.) Other than motor power, only a 3.3-V digital power supply was used in the controller; no analog bias supplies were used. Since most of the circuit was implemented in the FPGA, no additional parts were needed other than the power transistors to drive the motor. The benefits that FPGAs provide over conventional designs-lower power and fewer parts-allow for smaller packaging and reduced weight and cost.
GaAs integrated digital-to-analogue convertor for control of power dual-gate FETs
Saunier, P.; Kim, B.; Frensley, W. R.
1983-01-01
The design, fabrication and performance of a TTL compatible 4-bit GaAs integrated digital-to-analog convertor with an output voltage between -2.8 V and +2.8 V are reported. This circuit has been especially designed to control the gain of power dual-gate FETs by applying a voltage on the capacitively terminated second gate.
Compact, Intelligent, Digitally Controlled IGBT Gate Drivers for a PEBB-Based ILC Marx Modulator
Nguyen, M.N.; Burkhart, C.; Olsen, J.J.; Macken, K.; /SLAC
2010-06-07
SLAC National Accelerator Laboratory has built and is currently operating a first generation prototype Marx klystron modulator to meet ILC specifications. Under development is a second generation prototype, aimed at improving overall performance, serviceability, and manufacturability as compared to its predecessor. It is designed around 32 cells, each operating at 3.75 kV and correcting for its own capacitor droop. Due to the uniqueness of this application, high voltage gate drivers needed to be developed for the main 6.5 kV and droop correction 1.7 kV IGBTs. The gate driver provides vital functions such as protection of the IGBT from over-voltage and over-current, detection of gate-emitter open and short circuit conditions, and monitoring of IGBT degradation (based on collector-emitter saturation voltage). Gate drive control, diagnostic processing capabilities, and communication are digitally implemented using an FPGA. This paper details the design of the gate driver circuitry, component selection, and construction layout. In addition, experimental results are included to illustrate the effectiveness of the protection circuit.
Abbasian, Karim; Sadeghi, Parvin
2016-01-01
We have proposed optical tunable CNOT (XOR) and XNOR logic gates using two-dimensional photonic crystal (2DPhC) cavities. Where, air rods with square lattice array have been embedded in Ag-Polymer substrate with refractive index of 1.59. In this work, we have enhanced speed of logic gates by applying two input signals with a phase dif?ference at the same wavelength for 2DPhC cavities. Where, we have adjusted the phases of input and control signals equal with {\\pi}/3 and zero, respectively. The response time of the structure and quality factor of the cavities are in the range of femtosecond and 2000, respectively. Then, we have used electro-optic property of the substrate material to change the cavities resonance wavelengths. By this means, we could design the logic gates and demonstrate a tunable range of 23nm for their operation wavelength. The quality factor and the response times of cavities remain constant in the tunable range of wavelength, approximately. The evaluated least ON to OFF logic-level contras...
Nanoeletromechanical switch and logic circuits formed therefrom
Nordquist, Christopher D [Albuquerque, NM; Czaplewski, David A [Albuquerque, NM
2010-05-18
A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.
Programmable logic controller performance enhancement by field programmable gate array based design.
Patel, Dhruv; Bhatt, Jignesh; Trivedi, Sanjay
2015-01-01
PLC, the core element of modern automation systems, due to serial execution, exhibits limitations like slow speed and poor scan time. Improved PLC design using FPGA has been proposed based on parallel execution mechanism for enhancement of performance and flexibility. Modelsim as simulation platform and VHDL used to translate, integrate and implement the logic circuit in FPGA. Xilinx's Spartan kit for implementation-testing and VB has been used for GUI development. Salient merits of the design include cost-effectiveness, miniaturization, user-friendliness, simplicity, along with lower power consumption, smaller scan time and higher speed. Various functionalities and applications like typical PLC and industrial alarm annunciator have been developed and successfully tested. Results of simulation, design and implementation have been reported.
Demonstration of a quantum logic gate in a cryogenic surface-electrode ion trap
Wang, Shannon X; Ge, Yufei; Shewmon, Ruth; Chuang, Isaac L
2009-01-01
We demonstrate quantum control techniques for a single trapped ion in a cryogenic, surface-electrode trap. A narrow optical transition of Sr+ along with the ground and first excited motional states of the harmonic trapping potential form a two-qubit system. The optical qubit transition is susceptible to magnetic field fluctuations, which we stabilize with a simple and compact method using superconducting rings. Decoherence of the motional qubit is suppressed by the cryogenic environment. AC Stark shift correction is accomplished by controlling the laser phase in the pulse sequencer, eliminating the need for an additional laser. Quantum process tomography is implemented on atomic and motional states using conditional pulse sequences. With these techniques we demonstrate a Cirac-Zoller Controlled-NOT gate in a single ion with a mean fidelity of 91(1)%.
Cluster States from Quantum Logic Gates with Trapped Ions in Thermal Motion
YANG Wen-Xing; ZHAN Zhi-Ming; LI Jia-Hua
2006-01-01
Following the recent proposal by Briegel et al. [Phys. Rev. Lett. 86 (2001) 910], a procedure is proposed for one-step realizing quantum control phase gates with two trapped ions in thermal motion. It is shown that the scheme can also be used to create a new special type of entangled states, i.e., cluster states of many trapped ions. In the scheme the two-trapped ions are simultaneously excited by a single laser beam and the frequency of the laser beam is slightly off resonance with the first lower vibration sideband of the trapped ions. The distinct advantage of the scheme is that it does not use the vibrational mode as the data bus. Furthermore, our scheme is insensitive to both the initial motional state and heating (or decay) as long as the system remains in the Lamb-Dicke regime.
Quantum logic gates from time-dependent global magnetic field in a system with constant exchange
Nenashev, A. V., E-mail: nenashev@isp.nsc.ru; Dvurechenskii, A. V. [Rzhanov Institute of Semiconductor Physics SB RAS, 630090 Novosibirsk (Russian Federation); Novosibirsk State University, 630090 Novosibirsk (Russian Federation); Zinovieva, A. F. [Rzhanov Institute of Semiconductor Physics SB RAS, 630090 Novosibirsk (Russian Federation); Gornov, A. Yu.; Zarodnyuk, T. S. [Institute for System Dynamics and Control Theory SB RAS, 664033 Irkutsk (Russian Federation)
2015-03-21
We propose a method that implements a universal set of one- and two-quantum-bit gates for quantum computation in a system of coupled electron pairs with constant non-diagonal exchange interaction. In our proposal, suppression of the exchange interaction is performed by the continual repetition of single-spin rotations. A small g-factor difference between the electrons allows for addressing qubits and avoiding strong magnetic field pulses. Numerical experiments were performed to show that, to implement the one- and two-qubit operations, it is sufficient to change the strength of the magnetic field by a few Gauss. This introduces one and then the other electron in a resonance. To determine the evolution of the two-qubit system, we use the algorithms of optimal control theory.
Surface-confined assemblies and polymers for molecular logic.
de Ruiter, Graham; van der Boom, Milko E
2011-08-16
output of one gate is used as the input for another gate. Using the same setup, we were able to display both combinatorial and sequential logic. We have demonstrated MBLC by coupling electrochemical inputs with optical readout, which resulted in various logic architectures built on a redox-active, functionalized surface. Electrochemically operated sequential logic systems such as flip-flops, multivalued logic, and multistate memory could enhance computational power without increasing spatial requirements. Applying multivalued digits in data storage could exponentially increase memory capacity. Furthermore, we evaluate the pros and cons of MBLC and identify targets for future research in this Account. © 2011 American Chemical Society
Athale, R. A.; Lee, S. H.
1978-01-01
The paper describes the fabrication and operation of an optical parallel logic (OPAL) device which performs Boolean algebraic operations on binary images. Several logic operations on two input binary images were demonstrated using an 8 x 8 device with a CdS photoconductor and a twisted nematic liquid crystal. Two such OPAL devices can be interconnected to form a half-adder circuit which is one of the essential components of a CPU in a digital signal processor.
Athale, R. A.; Lee, S. H.
1978-01-01
The paper describes the fabrication and operation of an optical parallel logic (OPAL) device which performs Boolean algebraic operations on binary images. Several logic operations on two input binary images were demonstrated using an 8 x 8 device with a CdS photoconductor and a twisted nematic liquid crystal. Two such OPAL devices can be interconnected to form a half-adder circuit which is one of the essential components of a CPU in a digital signal processor.
High-speed radiometric imaging with a gated, intensified, digitally controlled camera
Ross, Charles C.; Sturz, Richard A.
1997-05-01
The development of an advanced instrument for real-time radiometric imaging of high-speed events is described. The Intensified Digitally-Controlled Gated (IDG) camera is a microprocessor-controlled instrument based on an intensified CCD that is specifically designed to provide radiometric optical data. The IDG supports a variety of camera- synchronous and camera-asynchronous imaging tasks in both passive imaging and active laser range-gated applications. It features both automatic and manual modes of operation, digital precision and repeatability, and ease of use. The IDG produces radiometric imagery by digitally controlling the instrument's optical gain and exposure duration, and by encoding and annotating the parameters necessary for radiometric analysis onto the resultant video signal. Additional inputs, such as date, time, GPS, IRIG-B timing, and other data can also be encoded and annotated. The IDG optical sensitivity can be readily calibrated, with calibration data tables stored in the camera's nonvolatile flash memory. The microprocessor then uses this data to provide a linear, calibrated output. The IDG possesses both synchronous and asynchronous imaging modes in order to allow internal or external control of exposure, timing, and direct interface to external equipment such as event triggers and frame grabbers. Support for laser range-gating is implemented by providing precise asynchronous CCD operation and nanosecond resolution of the intensifier photocathode gate duration and timing. Innovative methods used to control the CCD for asynchronous image capture, as well as other sensor and system considerations relevant to high-speed imaging are discussed in this paper.
Si-nanowire CMOS inverter logic fabricated using gate-all-around (GAA) devices and top-down approach
Buddharaju, K. D.; Singh, N.; Rustagi, S. C.; Teo, Selin H. G.; Lo, G. Q.; Balasubramanian, N.; Kwong, D. L.
2008-09-01
We present the monolithic integration of gate-all-around (GAA) Si-nanowire FETs into CMOS logic using top-down approach. Inverters are chosen as the test vehicles for demonstration. Empirically optimized designs show sharp ON-OFF transitions with high voltage-gains (e.g., ΔVOUT/ΔVIN up to ∼45) and symmetric pull-up and pull-down characteristics. The matching of the drive currents of n- and p-MOSFETs is achieved using different number of nanowire channels for N- and P-MOS transistors. The inverter maintains its good transfer characteristics and noise margins for wide range of VDD tested down to 0.2 V. The detailed experimental characterization is discussed along with the electrical characteristics of the individual transistors comprising the inverter. The performances of the inverters are discussed vis-à-vis those reported in the literature using advanced non-classical device architectures such as FinFETs. The integration potential of GAA Si-nanowire transistors to realize CMOS circuit functionality using top-down approach is thus demonstrated.
Papenfort, Kai; Espinosa, Elena; Casadesús, Josep; Vogel, Jörg
2015-08-25
Horizontal gene transfer via plasmid conjugation is a major driving force in microbial evolution but constitutes a complex process that requires synchronization with the physiological state of the host bacteria. Although several host transcription factors are known to regulate plasmid-borne transfer genes, RNA-based regulatory circuits for host-plasmid communication remain unknown. We describe a posttranscriptional mechanism whereby the Hfq-dependent small RNA, RprA, inhibits transfer of pSLT, the virulence plasmid of Salmonella enterica. RprA employs two separate seed-pairing domains to activate the mRNAs of both the sigma-factor σ(S) and the RicI protein, a previously uncharacterized membrane protein here shown to inhibit conjugation. Transcription of ricI requires σ(S) and, together, RprA and σ(S) orchestrate a coherent feedforward loop with AND-gate logic to tightly control the activation of RicI synthesis. RicI interacts with the conjugation apparatus protein TraV and limits plasmid transfer under membrane-damaging conditions. To our knowledge, this study reports the first small RNA-controlled feedforward loop relying on posttranscriptional activation of two independent targets and an unexpected role of the conserved RprA small RNA in controlling extrachromosomal DNA transfer.
A Cu²⁺-selective fluorescent chemosensor based on BODIPY with two pyridine ligands and logic gate.
Huang, Liuqian; Zhang, Jing; Yu, Xiaoxiu; Ma, Yifan; Huang, Tianjiao; Shen, Xi; Qiu, Huayu; He, Xingxing; Yin, Shouchun
2015-06-15
A novel near-infrared fluorescent chemosensor based on BODIPY (Py-1) has been synthesized and characterized. Py-1 displays high selectivity and sensitivity for sensing Cu(2+) over other metal ions in acetonitrile. Upon addition of Cu(2+) ions, the maximum absorption band of Py-1 in CH3CN displays a red shift from 603 to 608 nm, which results in a visual color change from pink to blue. When Py-1 is excited at 600 nm in the presence of Cu(2+), the fluorescent emission intensity of Py-1 at 617 nm is quenched over 86%. Notably, the complex of Py-1-Cu(2+) can be restored with the introduction of EDTA or S(2-). Consequently, an IMPLICATION logic gate at molecular level operating in fluorescence mode with Cu(2+) and S(2-) as chemical inputs can be constructed. Finally, based on the reversible and reproducible system, a nanoscale sequential memory unit displaying "Writing-Reading-Erasing-Reading" functions can be integrated. Copyright © 2015 Elsevier B.V. All rights reserved.
Low voltage logic circuits exploiting gate level dynamic body biasing in 28 nm UTBB FD-SOI
Taco, Ramiro; Levi, Itamar; Lanuzza, Marco; Fish, Alexander
2016-03-01
In this paper, the recently proposed gate level body bias (GLBB) technique is evaluated for low voltage logic design in state-of-the-art 28 nm ultra-thin body and box (UTBB) fully-depleted silicon-on-insulator (FD-SOI) technology. The inherent benefits of the low-granularity body-bias control, provided by the GLBB approach, are emphasized by the efficiency of forward body bias (FBB) in the FD-SOI technology. In addition, the possibility to integrate PMOS and NMOS devices into a single common well configuration allows significant area reduction, as compared to an equivalent triple well implementation. Some arithmetic circuits were designed using GLBB approach and compared to their conventional CMOS and DTMOS counterparts under different running conditions at low voltage regime. Simulation results shows that, for 300 mV of supply voltage, a 4 × 4-bit GLBB Baugh Wooley multiplier allows performance improvement of about 30% and area reduction of about 35%, while maintaining low energy consumption as compared to the conventional CMOS ⧹ DTMOS solutions. Performance and energy benefits are maintained over a wide range of process-voltage-temperature (PVT) variations.
Roy, Sukhdev; Yadav, Chandresh
2014-12-01
We propose a model for the early sub-picosecond (sub-ps) transitions in the photochromic bacteriorhodopsin (BR) protein photocycle (B570 → H → I460 → J625 → B570) and present a detailed analysis of ultrafast all-optical switching for different pump-probe combinations. BR excitation with 120 fs pump pulses at 570 or 612 nm results in the switching of cw probe beams at 460 and 580 nm exhibiting reverse saturable absorption (RSA) and saturable absorption (SA) respectively. The effect of pump intensity, pump pulse width, lifetime of I460 state, thickness and concentration on switching has been studied in detail. It is shown that low intensity (MW cm-2), high contrast (100%), sub-ps all-optical switching can be achieved with BR-gold nanoparticle solutions. The validity of the proposed model is evident from the good agreement of theoretical simulations with reported experimental results. The switching characteristics have been optimized to design ultrafast all-optical parallel NOT, OR, AND and the universal NOR and NAND logic gates. High contrast, ultrafast switching at relatively lower pump intensities, compared to other organic molecules, opens up exciting prospects for ultrafast, all-optical information processing with BR and BR nano-biophotonic hybrid materials.
Zhang, Guanxin; Zhang, Deqing; Zhou, Yucheng; Zhu, Daoben
2006-05-12
In this Note, we describe a new TTF-anthracene dyad fusion with the crown ether unit. It is interesting to find that the fluorescence of this new dyad can be modulated with Na+ and C60, and its fluorescence intensity can be largely enhanced only in the presence of both Na+ and C60. Such fluorescence modulation behavior mimics the performance of a two-input "AND" logic gate.
CHEN Yong-jun; HUANG Sheng-hua; WAN Shan-ming; WU Fang
2008-01-01
A high-performance digital servo system built on the platform of a field programmable gate array (FPGA), a fully digitized hardware design scheme of a direct torque control (DTC) and a low speed permanent magnet synchronous motor (PMSM) is proposed. The DTC strategy of PMSM is described with Verilog hardware description language and is employed on-chip FPGA in accordance with the electronic design automation design methodology. Due to large torque ripples in low speed PMSM, the hysteresis controller in a conventional PMSM DTC was replaced by a fuzzy controller. This FPGA scheme integrates the direct torque controller strategy, the time speed measurement algorithm, the fuzzy regulating technique and the space vector pulse width modulation principle. Experimental results indicate the fuzzy controller can provide a controllable speed at 20 r min-1 and torque at 330 N m with satisfactory dynamic and static performance. Furthermore, the results show that this new control strategy decreases the torque ripple drastically and enhances control performance.
Neiroukh, Osama
2011-01-01
A new approach for enhancing the process-variation tolerance of digital circuits is described. We extend recent advances in statistical timing analysis into an optimization framework. Our objective is to reduce the performance variance of a technology-mapped circuit where delays across elements are represented by random variables which capture the manufacturing variations. We introduce the notion of statistical critical paths, which account for both means and variances of performance variation. An optimization engine is used to size gates with a goal of reducing the timing variance along the statistical critical paths. We apply a pair of nested statistical analysis methods deploying a slower more accurate approach for tracking statistical critical paths and a fast engine for evaluation of gate size assignments. We derive a new approximation for the max operation on random variables which is deployed for the faster inner engine. Circuit optimization is carried out using a gain-based algorithm that terminates w...
Yang, Guowu; Song, Xiaoyu; Perkowski, Marek
2011-01-01
We propose an approach to optimally synthesize quantum circuits from non-permutative quantum gates such as Controlled-Square-Root-of-Not (i.e. Controlled-V). Our approach reduces the synthesis problem to multiple-valued optimization and uses group theory. We devise a novel technique that transforms the quantum logic synthesis problem from a multi-valued constrained optimization problem to a group permutation problem. The transformation enables us to utilize group theory to exploit the properties of the synthesis problem. Assuming a cost of one for each two-qubit gate, we found all reversible circuits with quantum costs of 4, 5, 6, etc, and give another algorithm to realize these reversible circuits with quantum gates.
New cardiac MRI gating method using event-synchronous adaptive digital filter.
Park, Hodong; Park, Youngcheol; Cho, Sungpil; Jang, Bongryoel; Lee, Kyoungjoung
2009-11-01
When imaging the heart using MRI, an artefact-free electrocardiograph (ECG) signal is not only important for monitoring the patient's heart activity but also essential for cardiac gating to reduce noise in MR images induced by moving organs. The fundamental problem in conventional ECG is the distortion induced by electromagnetic interference. Here, we propose an adaptive algorithm for the suppression of MR gradient artefacts (MRGAs) in ECG leads of a cardiac MRI gating system. We have modeled MRGAs by assuming a source of strong pulses used for dephasing the MR signal. The modeled MRGAs are rectangular pulse-like signals. We used an event-synchronous adaptive digital filter whose reference signal is synchronous to the gradient peaks of MRI. The event detection processor for the event-synchronous adaptive digital filter was implemented using the phase space method-a sort of topology mapping method-and least-squares acceleration filter. For evaluating the efficiency of the proposed method, the filter was tested using simulation and actual data. The proposed method requires a simple experimental setup that does not require extra hardware connections to obtain the reference signals of adaptive digital filter. The proposed algorithm was more effective than the multichannel approach.
A logic gate-based fluorogenic probe for Hg(2+) detection and its applications in cellular imaging.
Hu, Jiwen; Hu, Zhangjun; Chen, Zhiwen; Gao, Hong-Wen; Uvdal, Kajsa
2016-05-05
A new colorimetric and fluorogenic probe (RN3) based on rhodamine-B has been successfully designed and synthesized. It displays a selective response to Hg(2+) in the aqueous buffer solution over the other competing metals. Upon addition of Hg(2+), the solution of RN3 exhibits a 'naked eye' observable color change from colorless to red and an intensive fluorescence with about 105-fold enhancement. The changes in the color and fluorescence are ascribed to the ring-opening of spirolactam in rhodamine fluorophore, which is induced by a binding of the constructed receptor to Hg(2+) with the association and dissociation constants of 0.22 × 10(5) M(-1) and 25.2 μM, respectively. The Job's plot experiment determines a 1:1 binding stoichiometry between RN3 and Hg(2+). The resultant "turn-on" fluorescence in buffer solution, allows the application of a method to determine Hg(2+) levels in the range of 4.0-15.0 μM, with the limit of detection (LOD) calculated at 60.7 nM (3σ/slope). In addition, the fluorescence 'turn-off' and color 'fading-out' happen to the mixture of RN3-Hg(2+) by further addition of I(-) or S(2-). The reversible switching cycles of fluorescence intensity upon alternate additions of Hg(2+) and S(2-) demonstrate that RN3 can perform as an INHIBIT logic gate. Furthermore, the potential of RN3 as a fluorescent probe has been demonstrated for cellular imaging. Copyright © 2016 Elsevier B.V. All rights reserved.
2013-03-21
Figure 18: An all-optical half- adder involving all-optical NAND, AND, XNOR, and XOR gates [44...XNOR gates, XOR gates, comparators, flip-flops, and half- adders can be achieved using multiple SMFP-LDs in a variety of configurations [47]. For...half- adder . Figure 18: An all-optical half- adder involving all-optical NAND, AND, XNOR, and XOR gates [47]. 55 The all-optical half- adder
A digital optical phase-locked loop for diode lasers based on field programmable gate array
Xu Zhouxiang; Zhang Xian; Huang Kaikai; Lu Xuanhui [Physics Department, Zhejiang University, Hangzhou, 310027 (China)
2012-09-15
We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat note line width below 1 Hz, residual mean-square phase error of 0.14 rad{sup 2} and transition time of 100 {mu}s under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.
Jiang, Yanan; Liu, Nannan; Guo, Wei; Xia, Fan; Jiang, Lei
2012-09-19
Integrating biological components into artificial devices establishes an interface to understand and imitate the superior functionalities of the living systems. One challenge in developing biohybrid nanosystems mimicking the gating function of the biological ion channels is to enhance the gating efficiency of the man-made systems. Herein, we demonstrate a DNA supersandwich and ATP gated nanofluidic device that exhibits high ON-OFF ratios (up to 10(6)) and a perfect electric seal at its closed state (~GΩ). The ON-OFF ratio is distinctly higher than existing chemically modified nanofluidic gating systems. The gigaohm seal is comparable with that required in ion channel electrophysiological recording and some lipid bilayer-coated nanopore sensors. The gating function is implemented by self-assembling DNA supersandwich structures into solid-state nanochannels (open-to-closed) and their disassembly through ATP-DNA binding interactions (closed-to-open). On the basis of the reversible and all-or-none electrochemical switching properties, we further achieve the IMPLICATION logic operations within the nanofluidic structures. The present biohybrid nanofluidic device translates molecular events into electrical signals and indicates a built-in signal amplification mechanism for future nanofluidic biosensing and modular DNA computing on solid-state substrates.
Low power digitally controlled oscillator designs with a novel 3-transistor XNOR gate
Kumar, Manoj; Arya, Sandeep K.; Pandey, Sujata
2012-03-01
Digital controlled oscillators (DCOs) are the core of all digital phase locked loop (ADPLL) circuits. Here, DCO structures with reduced hardware and power consumption having full digital control have been proposed. Three different DCO architectures have been proposed based on ring based topology. Three, four and five bit controlled DCO with NMOS, PMOS and NMOS & PMOS transistor switching networks are presented. A three-transistor XNOR gate has been used as the inverter which is used as the delay cell. Delay has been controlled digitally with a switch network of NMOS and PMOS transistors. The three bit DCO with one NMOS network shows frequency variations of 1.6141-1.8790 GHz with power consumption variations 251.9224-276.8591 μW. The four bit DCO with one NMOS network shows frequency variation of 1.6229-1.8868 GHz with varying power consumption of 251.9225-278.0740 μW. A six bit DCO with one NMOS switching network gave an output frequency of 1.7237-1.8962 GHz with power consumption of 251.928-278.998 μW. Output frequency and power consumption results for 4 & 6 bit DCO circuits with one PMOS and NMOS & PMOS switching network have also been presented. The phase noise parameter with an offset frequency of 1 MHz has also been reported for the proposed circuits. Comparisons with earlier reported circuits have been made and the present approach shows advantages over previous circuits.
Low power digitally controlled oscillator designs with a novel 3-transistor XNOR gate
Manoj Kumar; Sandeep K. Arya; Sujata Pandey
2012-01-01
Digital controlled oscillators (DCOs) are the core of all digital phase locked loop (ADPLL) circuits.Here,DCO structures with reduced hardware and power consumption having full digital control have been proposed.Three different DCO architectures have been proposed based on ring based topology.Three,four and five bit controlled DCO with NMOS,PMOS and NMOS & PMOS transistor switching networks are presented.A threetransistor XNOR gate has been used as the inverter which is used as the delay cell.Delay has been controlled digitally with a switch network of NMOS and PMOS transistors.The three bit DCO with one NMOS network shows frequency variations of 1.6141-1.8790 GHz with power consumption variations 251.9224-276.8591 μW.The four bit DCO with one NMOS network shows frequency variation of 1.6229-1.8868 GHz with varying power consumption of 251.9225-278.0740μW.A six bit DCO with one NMOS switching network gave an output frequency of 1.7237-1.8962 GHz with power consumption of 251.928-278.998μW.Output frequency and power consumption results for 4 & 6 bit DCO circuits with one PMOS and NMOS & PMOS switching network have also been presented.The phase noise parameter with an offset frequency of 1 MHz has also been reported for the proposed circuits.Comparisons with earlier reported circuits have been made and the present approach shows advantages over previous circuits.
Liu, Shuang; Wang, Lei; Lian, Wenjing; Liu, Hongyun; Li, Chen-Zhong
2015-01-01
A logic-gate system with three outputs and three inputs was developed based on the bioelectrocatalysis of glucose by glucose oxidase (GOx) entrapped in chitosan films on the electrode surface by means of ferrocenedicarboxylic acid (Fc(COOH)2 ). Cyclic voltammetric (CV) signals of Fc(COOH)2 exhibited pH-triggered on/off behavior owing to electrostatic interactions between the film and the probe at different pH levels. The addition of glucose greatly increased the oxidation peak current (Ipa ) through the electrocatalytic reaction. pH and glucose were selected as two inputs. As a reversible inhibitor of GOx, Cu(2+) was chosen as the third input. The combination of three inputs led to Ipa with different values according to different mechanisms, which were defined as three outputs with two thresholds. The logic gate with three outputs by using one type of enzyme provided a novel model to build logic circuits based on biomacromolecules, which might be applied to the intelligent medical diagnostics as smart biosensors in the future. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Rathnakannan Kailasam
2008-01-01
Full Text Available This paper describes the modelling and the analysis of control logic for a Nano-Device- based PWM controller. A comprehensive simple SPICE schematic model for Single Electron transistor has been proposed. The operation of basic Single Electron Transistor logic gates and SET flip flops were successfully designed and their performances analyzed. The proposed design for realizing the logic gates and flip-flops is used in constructing the PWM controller utilized for switching the buck converter circuit. The output of the converter circuit is compared with reference voltage, and when the error voltage and the reference are matched the latch is reset so as to generate the PWM signal. Due to the simplicity and accuracy of the compact model, the simulation time and speed are much faster, which makes it potentially applicable in large-scale circuit simulation. This study confirms that the SET-based PWM controller is small in size, consumes ultra low power and operates at high speeds without compromising any performance. In addition these devices are capable of measuring charges of extremely high sensitivity.
Digital Fuzzy logic and PI control of phase-shifted full-bridge current-doubler converter
Török, Lajos; Munk-Nielsen, Stig
2011-01-01
Simple digital fuzzy logic voltage control of a phaseshifted full-bridge (PSFB) converter is proposed in this article. A comparison of the fuzzy controller and the classical PI voltage controller is presented and their effects on the converter dynamics are analyzed. Simulation model of the conver...... of the converter was built in Matlab/Simulink using PLECS. A 600W PSFB convert was designed and built and the control strategies were implemented in a 16 bit fixed point dsPIC microcontroller. The advantages and disadvantages of using Fuzzy logic control are highlighted....
Rapid mapping of digital integrated circuit logic gates via multi-spectral backside imaging
Adato, Ronen; Zangeneh, Mahmoud; Zhou, Boyou; Joshi, Ajay; Goldberg, Bennett; Unlu, M Selim
2016-01-01
Modern semiconductor integrated circuits are increasingly fabricated at untrusted third party foundries. There now exist myriad security threats of malicious tampering at the hardware level and hence a clear and pressing need for new tools that enable rapid, robust and low-cost validation of circuit layouts. Optical backside imaging offers an attractive platform, but its limited resolution and throughput cannot cope with the nanoscale sizes of modern circuitry and the need to image over a large area. We propose and demonstrate a multi-spectral imaging approach to overcome these obstacles by identifying key circuit elements on the basis of their spectral response. This obviates the need to directly image the nanoscale components that define them, thereby relaxing resolution and spatial sampling requirements by 1 and 2 - 4 orders of magnitude respectively. Our results directly address critical security needs in the integrated circuit supply chain and highlight the potential of spectroscopic techniques to addres...
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
Md. Belayet Ali
2011-12-01
Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application,those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular auto meta, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designed RS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
Md. Mosharof Hossin
2012-01-01
Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application, those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular automata, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designedRS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.
Roy, Sukhdev; Yadav, Chandresh
2011-09-01
A detailed theoretical analysis of femtosecond transition from saturable (SA) to reverse saturable absorption (RSA) has been carried out in Copper-Phthalocyanine (CuPc)-doped polymethylmethacrylate (PMMA) thin films. The transition due to fifth-order effect of excited-state absorption induced two-photon process has been optimized with respect to intensity, concentration and nonlinear coefficients to design various all-optical logic gates, namely, OR and AND at lower intensities (SA region), XOR at the transition intensity, and the universal NAND and NOR at higher intensities (RSA region). The advantages of ultrafast operation, simplicity, tunability, high contrast, stability of CuPc-doped PMMA thin film, and the possibility to control and realize various logic operations in the same film at the same wavelength by only controlling the pulse intensity, instead of a pump-probe configuration, make them attractive for practical implementation.
Qin, Jun; Lu, Guo-Wei; Sakamoto, Takahide; Akahane, Kouichi; Yamamoto, Naokatsu; Wang, Danshi; Wang, Cheng; Wang, Hongxiang; Zhang, Min; Kawanishi, Tetsuya; Ji, Yuefeng
2014-12-01
In this paper, we experimentally demonstrate simultaneous multichannel wavelength multicasting (MWM) and exclusive-OR logic gate multicasting (XOR-LGM) for three 10Gbps non-return-to-zero differential phase-shift-keying (NRZ-DPSK) signals in quantum-dot semiconductor optical amplifier (QD-SOA) by exploiting the four-wave mixing (FWM) process. No additional pump is needed in the scheme. Through the interaction of the input three 10Gbps DPSK signal lights in QD-SOA, each channel is successfully multicasted to three wavelengths (1-to-3 for each), totally 3-to-9 MWM, and at the same time, three-output XOR-LGM is obtained at three different wavelengths. All the new generated channels are with a power penalty less than 1.2dB at a BER of 10(-9). Degenerate and non-degenerate FWM components are fully used in the experiment for data and logic multicasting.
Roy, Sukhdev; Yadav, Chandresh
2013-12-01
A detailed theoretical analysis of ultrafast transition from saturable absorption (SA) to reverse saturable absorption (RSA) has been presented in graphene-oxide thin films with femtosecond laser pulses at 800 nm. Increase in pulse intensity leads to switching from SA to RSA with increased contrast due to two-photon absorption induced excited-state absorption. Theoretical results are in good agreement with reported experimental results. Interestingly, it is also shown that increase in concentration results in RSA to SA transition. The switching has been optimized to design parallel all-optical femtosecond NOT, AND, OR, XOR, and the universal NAND and NOR logic gates.
ZHU Lin-Na; GONG Shao-Long; GONG Shu-Ling; YANG Chu-Luo; QIN Jin-Gui
2008-01-01
Two novel pyrene-armed calix[4]arenes by triazole connection were synthesized using "click" chemistry. Com-pound 1 with two pyrene subunits appended to the lower rims of the calix[4]arene shows ratiometric fluorescence response toward Zn2+, and selective fluorescence quenching toward heavy metal ions such as Cu2+, Hg2+ and pb2+; while compound 2 with one pyrene subunit exhibits significant fluorescence quenching toward Cu2+ and moderate quenching behaviour toward Hg2+. By utilizing the different fluorescence behavior of 1 toward Zn2+and Cu2+, inhi-bition (INH) and not or (NOR) logic gates were established.
Taylor, B.
1990-01-01
The design of Integrated Circuits has evolved past the black art practiced by a few semiconductor companies to a world wide community of users. This was basically accomplished by the development of computer aided design tools which were made available to this community. As the tools matured into different components of the design task they were accepted into the community at large. However, the next step in this evolution is being ignored by the large tool vendors hindering the continuation of this process. With system level definition and simulation through the logic specification well understood, why is the physical generation so blatantly ignored. This portion of the development is still treated as an isolated task with information being passed from the designer to the layout function. Some form of result given back but it severely lacks full definition of what has transpired. The level of integration in I.C.'s for tomorrow, whether through new processes or applications will require higher speeds, increased transistor density, and non-digital performance which can only be achieved through attention to the physical implementation.
Secure and Fast Chaos based Encryption System using Digital Logic Circuit
Ankur A. Khare
2014-05-01
Full Text Available Chaotic system based message encryption system for wired and wireless networks broadly used in computer engineering, communication and network security, such as robotic systems, encryption, synchronization and genetic network. The main motive for developing the chaos based cryptosystem is to attain encryption with several compensation over the conventional encryption algorithms such as high security, speed, complexity, cost and quality assurance. These challenges encourage the researchers to develop novel chaos based data encryption techniques with digital logics dealing with encryption of messages for fast and secure communication networks. This effort provides a modified version of traditional data encryption algorithms to provide good quality and performance in a secure communication network environment. A cryptology technique is widely used in network security during communication. An avalanche effect is the attractive property of cryptography in which two different keys produce different cipher text for the same data information and also some Important properties related to chaotic systems are sensitivity to initial condition and nonlinearity, which makes two similar or slightly different keys to generate completely different cipher text to produce confusion. It has been proposed a novel fast & secure encryption Technique which uses the chaotic map function to generate the different multiple keys and shows that negligible difference in parameters of chaotic function generate completely different keys as well as cipher text. Cryptanalysis of the proposed algorithm shows the strength and security of algorithm and keys.
Piyush Kumar Shukla
2015-03-01
Full Text Available Recently, chaotic dynamics-based data encryption techniques for wired and wireless networks have become a topic of active research in computer science and network security such as robotic systems, encryption, and communication. The main aim of deploying a chaos-based cryptosystem is to provide encryption with several advantages over traditional encryption algorithms such as high security, speed, and reasonable computational overheads and computational power requirements. These challenges have motivated researchers to explore novel chaos-based data encryption techniques with digital logics dealing with hiding information for fast secure communication networks. This work provides an overview of how traditional data encryption techniques are revised and improved to achieve good performance in a secure communication network environment. A comprehensive survey of existing chaos-based data encryption techniques and their application areas are presented. The comparative tables can be used as a guideline to select an encryption technique suitable for the application at hand. Based on the limitations of the existing techniques, an adaptive chaos based data encryption framework of secure communication for future research is proposed
A 16 channel high resolution (Digital Converter in a Field Programmable Gate Array
Ugur, C.; Bayer, E.; Kurz, N.; Traxler, M.
2012-02-01
A 16-channel Time-to-Digital Converter (TDC) was implemented in a general purpose Field-Programmable Gate Array (FPGA). The fine time calculations are achieved by using the dedicated carry-chain lines. The coarse counter defines the coarse time stamp. In order to overcome the negative effects of temperature and power supply dependency bin-by-bin calibration is applied. The time interval measurements are done using 2 channels. The time resolution of channels are calculated for 1 clock cycle and a minimum of 10.3 ps RMS on two channels, yielding 7.3 ps RMS (10.3 ps/√2) on a single channel is achieved.
T-Algorithm-Based Logic Simulation on Distributed Systems
Sundaram, S; Patnaik, LM
1992-01-01
Increase in the complexity of VLSI digital circuit it sign demands faster logic simulation techniques than those currently available. One of the ways of speeding up existing logic simulataon algorithms is by exploiting the inherent parallelism an the sequentaal versaon. In this paper, we explore the possibility of mapping a T-algoriihm based logac samulataon algorithm onto a cluster of workstation interconnected by an ethernet. The set of gates at a particular level as partitioned by the hias...
Shen, Jianxin; Shang, Dashan; Chai, Yisheng; Wang, Yue; Cong, Junzhuang; Shen, Shipeng; Yan, Liqin; Wang, Wenhong; Sun, Young
2016-12-01
Memtranstor that correlates charge and magnetic flux via nonlinear magnetoelectric effects has a great potential in developing next-generation nonvolatile devices. In addition to multilevel nonvolatile memory, we demonstrate here that nonvolatile logic gates such as nor and nand can be implemented in a single memtranstor made of the Ni /PMN -PT /Ni heterostructure. After applying two sequent voltage pulses (X1 , X2 ) as the logic inputs on the memtranstor, the output magnetoelectric voltage can be positive high (logic 1), positive low (logic 0), or negative (logic 0), depending on the levels of X1 and X2 . The underlying physical mechanism is related to the complete or partial reversal of ferroelectric polarization controlled by inputting selective voltage pulses, which determines the magnitude and sign of the magnetoelectric voltage coefficient. The combined functions of both memory and logic could enable the memtranstor as a promising candidate for future computing systems beyond von Neumann architecture.
Mitsue Takahashi
2010-11-01
Full Text Available We have investigated ferroelectric-gate field-effect transistors (FeFETs with Pt/SrBi2Ta2O9/(HfO2x(Al2O31−x (Hf-Al-O and Pt/SrBi2Ta2O9/HfO2 gate stacks. The fabricated FeFETs have excellent data retention characteristics: The drain current ratio between the on- and off-states of a FeFET was more than 2 × 106 after 12 days, and the decreasing rate of this ratio was so small that the extrapolated drain current ratio after 10 years is larger than 1 × 105. A fabricated self-aligned gate Pt/SrBi2Ta2O9/Hf-Al-O/Si FET revealed a sufficiently large drain current ratio of 2.4 × 105 after 33.5 day, which is 6.5 × 104 after 10 years by extrapolation. The developed FeFETs also revealed stable retention characteristics at an elevated temperature up to 120 °C and had small transistor threshold voltage (Vth distribution. The Vth can be adjusted by controlling channel impurity densities for both n-channel and p-channel FeFETs. These performances are now suitable to integrated circuit application with nonvolatile functions. Fundamental properties for the applications to ferroelectric-CMOS nonvolatile logic-circuits and to ferroelectric-NAND flash memories are demonstrated.
Di Vincenzo, D P
1997-01-01
A historical review is given of the emergence of the idea of the quantum logic gate from the theory of reversible Boolean gates. I highlight the quantum XOR or controlled NOT as the fundamental two-bit gate for quantum computation. This gate plays a central role in networks for quantum error correction.
Lei, Ming; Tian, Qing; Wu, Kevin; Zhao, Yan
2016-03-01
Gate to source/drain (S/D) short is the most common and detrimental failure mechanism for advanced process technology development in Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET) device manufacturing. Especially for sub-1Xnm nodes, MOSFET device is more vulnerable to gate-S/D shorts due to the aggressive scaling. The detection of this kind of electrical short defect is always challenging for in-line electron beam inspection (EBI), especially new shorting mechanisms on atomic scale due to new material/process flow implementation. The second challenge comes from the characterization of the shorts including identification of the exact shorting location. In this paper, we demonstrate unique scan direction induced charging dynamics (SDCD) phenomenon which stems from the transistor level response from EBI scan at post metal contact chemical-mechanical planarization (CMP) layers. We found that SDCD effect is exceptionally useful for gate-S/D short induced voltage contrast (VC) defect detection, especially for identification of shorting locations. The unique SDCD effect signatures of gate-S/D shorts can be used as fingerprint for ground true shorting defect detection. Correlation with other characterization methods on the same defective location from EBI scan shows consistent results from various shorting mechanism. A practical work flow to implement the application of SDCD effect for in-line EBI monitor of critical gate-S/D short defects is also proposed, together with examples of successful application use cases which mostly focus on static random-access memory (SRAM) array regions. Although the capability of gate-S/D short detection as well as expected device response is limited to passing transistors and pull-down transistors due to the design restriction from standard 6-cell SRAM structure, SDCD effect is proven to be very effective for gate-S/D short induced VC defect detection as well as yield learning for advanced technology development.
Novel three-state quantum dot gate field effect transistor fabrication, modeling and applications
Karmakar, Supriya
2014-01-01
The book presents the fabrication and circuit modeling of quantum dot gate field effect transistor (QDGFET) and quantum dot gate NMOS inverter (QDNMOS inverter). It also introduces the development of a circuit model of QDGFET based on Berkley Short Channel IGFET model (BSIM). Different ternary logic circuits based on QDGFET are also investigated in this book. Advanced circuit such as three-bit and six bit analog-to-digital converter (ADC) and digital-to-analog converter (DAC) were also simulated.
Feng, J. H.; Zhu, D. D.
Because the low carbon and sustainable development becomes more and more important in Chinese even in all over the world, author sorted out the logic of green building technology with the logic of digital technology by generalizing the development and type of modern green building technology. As the specific experiment object, Xuzhou Fenghua garden residential district was planned and designed though green digital design means. The reasonable general plan was designed scientifically and efficiently though the immediate colorful chill sunshine time map and repeated adjusted design. The above is to prove the efficiency and possibility of green digital design and bring inspiration to a deeper level of advanced algorithm.
Reversible Logic Synthesis of Fault Tolerant Carry Skip BCD Adder
Islam, Md Saiful; 10.3329/jbas.v32i2.2431
2010-01-01
Reversible logic is emerging as an important research area having its application in diverse fields such as low power CMOS design, digital signal processing, cryptography, quantum computing and optical information processing. This paper presents a new 4*4 parity preserving reversible logic gate, IG. The proposed parity preserving reversible gate can be used to synthesize any arbitrary Boolean function. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. It is shown that a fault tolerant reversible full adder circuit can be realized using only two IGs. The proposed fault tolerant full adder (FTFA) is used to design other arithmetic logic circuits for which it is used as the fundamental building block. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts.
Wu, Yun-Tse; Shanmugam, Chandirasekar; Tseng, Wei-Bin; Hiseh, Ming-Mu; Tseng, Wei-Lung
2016-05-01
Metal nanocluster-based nanomaterials for the simultaneous determination of temperature and pH variations in micro-environments are still a challenge. In this study, we develop a dual-emission fluorescent probe consisting of bovine serum albumin-stabilized gold nanoclusters (BSA-AuNCs) and fluorescein-5-isothiocyanate (FITC) as temperature- and pH-responsive fluorescence signals. Under single wavelength excitation the FITC/BSA-AuNCs exhibited well-separated dual emission bands at 525 and 670 nm. When FITC was used as a reference fluorophore, FITC/BSA-AuNCs showed a good linear response over the temperature range 1-71 °C and offered temperature-independent spectral shifts, temperature accuracy, activation energy, and reusability. The possible mechanism for high temperature-induced fluorescence quenching of FITC/BSA-AuNCs could be attributed to a weakening of the Au-S bond, thereby lowering the charge transfer from BSA to AuNCs. Additionally, the pH- and temperature-responsive properties of FITC/BSA-AuNCs allow simultaneous temperature sensing from 21 to 41 °C (at intervals of 5 °C) and pH from 6.0 to 8.0 (at intervals of 0.5 pH unit), facilitating the construction of two-input AND logic gates. Three-input AND logic gates were also designed using temperature, pH, and trypsin as inputs. The practicality of using FITC/BSA-AuNCs to determine the temperature and pH changes in HeLa cells is also validated.Metal nanocluster-based nanomaterials for the simultaneous determination of temperature and pH variations in micro-environments are still a challenge. In this study, we develop a dual-emission fluorescent probe consisting of bovine serum albumin-stabilized gold nanoclusters (BSA-AuNCs) and fluorescein-5-isothiocyanate (FITC) as temperature- and pH-responsive fluorescence signals. Under single wavelength excitation the FITC/BSA-AuNCs exhibited well-separated dual emission bands at 525 and 670 nm. When FITC was used as a reference fluorophore, FITC/BSA-AuNCs showed a
Mukherjee, Soma; Talukder, Shrabani
2016-05-01
A new Schiff-base, HL luminescent chemosensor of 1-amino pyrene and 8-hydroxy quinoline-2-carboxaldehyde was synthesized which demonstrates selective fluorimetric detection of Fe(3+) in aqueous medium with detection limit of 2.52 × 10(-8) M. The receptor shows selective 'turn-on' response towards Fe(3+) over other metal ions. This gradual 'turn-on' fluorescence response for Fe(3+) may be induced via CHEF (chelation-enhanced fluorescence) through close proximity of pyrene rings. The stoichiometry and binding property of HL with Fe(3+) was examined by emission studies. In presence of Fe(3+), HL also exhibits reversible change in emission pattern with EDTA and thus offers an interesting property of molecular 'INHIBIT' logic gate with Fe(3+) and EDTA as chemical inputs.
M Lakshmanan; T Kanna
2001-11-01
Coupled nonlinear Schrödinger equations (CNLS) very often represent wave propagation in optical media such as multicore ﬁbers, photorefractive materials and so on. We consider speciﬁcally the pulse propagation in integrable CNLS equations (generalized Manakov systems). We point out that these systems possess novel exact soliton type pulses which are shape changing under collision leading to an intensity redistribution. The shape changes correspond to linear fractional transformations allowing for the possibility of construction of logic gates and Turing equivalent all optical computers in homogeneous bulk media as shown by Steiglitz recently. Special cases of such solitons correspond to the recently much discussed partially coherent stationary solitons (PCS). In this paper, we review critically the recent developments regarding the above properties with particular reference to 2-CNLS.
Hong, Lu; Zhou, Fu; Wang, Guangfeng; Zhang, Xiaojun
2016-12-15
A novel fluorescent label-free "turn-on" NAD(+) and adenosine triphosphate (ATP) biosensing strategy is proposed by fully exploiting ligation triggered Nanocluster Beacon (NCB). In the presence of the target, the split NCB was brought to intact, which brought the C-rich sequence and enhancer sequence in close proximity resulting in the lightening of dark DNA/AgNCs ("On" mode). Further application was presented for logic gate operation and aptasensor construction. The feasibility was investigated by Ultraviolet-visible spectroscopy (UV-vis), Fluorescence, lifetime and High Resolution Transmission Electron Microscopy (HRTEM) etc. The strategy displayed good performance in the detection of NAD(+) and ATP, with the detection limit of 0.002nM and 0.001mM, the linear range of 10-1000nM and 0.003-0.01mM, respectively. Due to the DNA/AgNCs as fluorescence reporter, the completely label-free fluorescent strategy boasts the features of simplicity and low cost, and showing little reliance on the sensing environment. Meanwhile, the regulation by overhang G-rich sequence not relying on Förster energy transfer quenching manifests the high signal-to-background ratios (S/B ratios). This method not only provided a simple, economical and reliable fluorescent NAD(+) assay but also explored a flexible G-rich sequence regulated NCB probe for the fluorescent biosensors. Furthermore, this sensing mode was expanded to the application of a logic gate design, which exhibited a high performance for not only versatile biosensors construction but also for molecular computing application. Copyright © 2016 Elsevier B.V. All rights reserved.
Respiratory-Gated MRgHIFU in Upper Abdomen Using an MR-Compatible In-Bore Digital Camera
Vincent Auboiroux
2014-01-01
Full Text Available Objective. To demonstrate the technical feasibility and the potential interest of using a digital optical camera inside the MR magnet bore for monitoring the breathing cycle and subsequently gating the PRFS MR thermometry, MR-ARFI measurement, and MRgHIFU sonication in the upper abdomen. Materials and Methods. A digital camera was reengineered to remove its magnetic parts and was further equipped with a 7 m long USB cable. The system was electromagnetically shielded and operated inside the bore of a closed 3T clinical scanner. Suitable triggers were generated based on real-time motion analysis of the images produced by the camera (resolution 640×480 pixels, 30 fps. Respiratory-gated MR-ARFI prepared MRgHIFU ablation was performed in the kidney and liver of two sheep in vivo, under general anaesthesia and ventilator-driven forced breathing. Results. The optical device demonstrated very good MR compatibility. The current setup permitted the acquisition of motion artefact-free and high resolution MR 2D ARFI and multiplanar interleaved PRFS thermometry (average SNR 30 in liver and 56 in kidney. Microscopic histology indicated precise focal lesions with sharply delineated margins following the respiratory-gated HIFU sonications. Conclusion. The proof-of-concept for respiratory motion management in MRgHIFU using an in-bore digital camera has been validated in vivo.
Efficient G(sup 4)FET-Based Logic Circuits
Vatan, Farrokh
2008-01-01
A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.
Huang, Tao; Zhu, Yu-lian; Dai, Xue-qin; Zhang, Qi; Huang, Yan
2011-07-01
The Schiff base's reduced product N,N-bis(4-methoxybenzyl) ethane-1,2-diamine, which was used as a receptor L, was designed and synthesized for the first time in the present article. It was found that Cu2+ and Fe3+ could quench L in fluorescence observably and Zn2+ and Cd2+ could enhance L remarkably. So the two pair metal cation could set up "OR" logical gate relation with the receptor molecule L, then a logical recognition system be formed. The data of resolved ZnL's single crystal indicated that ZnL belonged to monoclinic (CCDC No. 747994). Integrated spectrum instrument was used to characterize the structure of its alike series of complex compound. According to ZnL's excellent fluorescence character and the ability to exchange with contiguous metal cation, ZnZ+/ZnL/Co2+, Zn2+/ZnL/Nit+ fluorescent molecule switch was designed. It is hoped that the work above could be positive for the development of molecule computer, bio-intellectualized inspection technology (therapy) and instrument.
Wang, Ya-Wen; Liu, Shun-Bang; Yang, Yan-Ling; Wang, Peng-Zhi; Zhang, Ai-Jiang; Peng, Yu
2015-02-25
A new Tb(III) complex based on a tripodal carboxylate ligand has been synthesized for the selective fluorescent recognition of phosphate anions, including inorganic phosphates and nucleoside phosphates (e.g., ATP), in Tris buffer solution. The resulting L · Tb complex shows the characteristic emission bands centered at about 495 and 550 nm from the Tb(III)-centered (5)D4 excited state to (7)FJ transitions with J = 6 and 5, where the chelating ligand acts only as an "antenna". Upon the addition of phosphate anions to the aqueous solution of Tb(III) complex, significant "on-off" fluorescence changes were observed, which were attributed to the inhibition of the "antenna" effect between the ligand and Tb(III) after the incorporation of phosphate anions. Furthermore, this unique Tb(III) complex has been successfully utilized to detect phosphate anions with filter papers and hydrogels. Notably, the Tb(III) complex also can be used for the construction of molecular logic gates with TRANSFER and INHIBIT logic functions by using the above fluorescence changes.
Comparison and Digital Circuit Analysis Based on Low Power Subthreshold Dual Mode Logic
D.Naveen Kumar
2014-03-01
Full Text Available In this brief, we propose new low power techniques such as Variable body bias method. This technique reduces the leakage power by increasing the body to source voltage of the sleep transistor in the design. By reducing the leakage power overall power of the design is reduced. The proposed logic switches between the active mode and sleep mode. To reduce the leakage current in sleep mode, the body to source voltage of the sleep transistor increased. To increase the voltage of Sleep transistor another transistor is connected to it. Average power and delay are the parameters compared between proposed logic to their CMOS and Dual Mode Logic counter parts in 180-nm process.
Scaling trends in energy recovery logic: an analytical approach
Jitendra Kanungo; S.Dasgupta
2013-01-01
This paper presents an analytical model to study the scaling trends in energy recovery logic.The energy performance of conventional CMOS and energy recovery logic are compared with scaling the design and technology parameters such as supply voltage,device threshold voltage and gate oxide thickness.The proposed analytical model is validated with simulation results at 90 nm and 65 nm CMOS technology nodes and predicts the scaling behavior accurately that help us to design an energy-efficient CMOS digital circuit design at the nanoscale.This research work shows the adiabatic switching as an ultra-low-power circuit technique for sub-100 nm digital CMOS circuit applications.
Reconfigurable Optical Directed-Logic Circuits
2015-11-20
and their switching delays do not accumulate. This is in contrast to conventional logic circuits where gate delays are cascaded, resulting in a...transistor logic circuits wherein gate delays are cascaded resulting in increased latencies with increased logic elements. Thus directed- logic ... reverse biased at -5 V ( logic ‘1’) and the transmission is high when the bias voltage is zero ( logic ‘0’). So the switch works in the block/pass mode
On Using Current Steering Logic in Mixed Analogue-digital Circuits
Lehmann, Torsten
1998-01-01
The authors investigate power supply noise in mixed analogue-digital circuits, arising from communication between the analogue and digital parts of the circuit. Current steering techniques and proper buffering are used to show which noise currents can be reduced and which cannot. In addition...
Implementation Of A Prototype Digital Optical Cellular Image Processor (DOCIP)
Huang, K. S.; Sawchuk, A. A.; Jenkins, B. K.; Chavel, P.; Wang, J. M.; Weber, A. G.; Wang, C. H.; Glaser, I.
1989-02-01
A processing element of a prototype digital optical cellular image processor (DOCIP) is implemented to demonstrate a particular parallel computing and interconnection architecture. This experimental digital optical computing system consists of a 2-D array of 54 optical logic gates, a 2-D array of 53 subholograms to provide interconnections between gates, and electronic input/output interfaces. The multi-facet interconnection hologram used in this system is fabricated by a computer-controlled optical system to offer very flexible interconnections.
Bernatowicz, K., E-mail: kingab@student.ethz.ch; Knopf, A.; Lomax, A. [Center for Proton Therapy, Paul Scherrer Institute, Villigen PSI 5232, Switzerland and Department of Physics, ETH Zürich, Zürich 8092 (Switzerland); Keall, P.; Kipritidis, J., E-mail: john.kipritidis@sydney.edu.au [Radiation Physics Laboratory, Sydney Medical School, University of Sydney, Sydney, NSW 2006 (Australia); Mishra, P. [Brigham and Womens Hospital, Dana-Farber Cancer Institute and Harvard Medical School, Boston, Massachusetts 02115 (United States)
2015-01-15
Purpose: Prospective respiratory-gated 4D CT has been shown to reduce tumor image artifacts by up to 50% compared to conventional 4D CT. However, to date no studies have quantified the impact of gated 4D CT on normal lung tissue imaging, which is important in performing dose calculations based on accurate estimates of lung volume and structure. To determine the impact of gated 4D CT on thoracic image quality, the authors developed a novel simulation framework incorporating a realistic deformable digital phantom driven by patient tumor motion patterns. Based on this framework, the authors test the hypothesis that respiratory-gated 4D CT can significantly reduce lung imaging artifacts. Methods: Our simulation framework synchronizes the 4D extended cardiac torso (XCAT) phantom with tumor motion data in a quasi real-time fashion, allowing simulation of three 4D CT acquisition modes featuring different levels of respiratory feedback: (i) “conventional” 4D CT that uses a constant imaging and couch-shift frequency, (ii) “beam paused” 4D CT that interrupts imaging to avoid oversampling at a given couch position and respiratory phase, and (iii) “respiratory-gated” 4D CT that triggers acquisition only when the respiratory motion fulfills phase-specific displacement gating windows based on prescan breathing data. Our framework generates a set of ground truth comparators, representing the average XCAT anatomy during beam-on for each of ten respiratory phase bins. Based on this framework, the authors simulated conventional, beam-paused, and respiratory-gated 4D CT images using tumor motion patterns from seven lung cancer patients across 13 treatment fractions, with a simulated 5.5 cm{sup 3} spherical lesion. Normal lung tissue image quality was quantified by comparing simulated and ground truth images in terms of overall mean square error (MSE) intensity difference, threshold-based lung volume error, and fractional false positive/false negative rates. Results
Dadgour, Hamed F.
2010-01-01
Nano-Electro-Mechanical Switches (NEMS) offer the prospect of improved energy-efficiency in digital circuits due to their near-zero subthreshold leakage and extremely low subthreshold swing values. Among the different approaches of implementing NEMS, laterallyactuated double-gate NEMS devices have attracted much attention as they provide unique and exciting circuit design opportunities. For instance, this paper demonstrates that compact XOR/XNOR gates can be implemented using only two such NEMS transistors. While this in itself is a major improvement, its implications for minimizing Boolean functions using Karnaugh maps (K-maps) are even more significant. In the standard K-map technique, which is used in digital circuit design, adjacent "1s" (minterms) are grouped only in horizontal and/or vertical directions; the diagonal (or zig-zag) grouping of adjacent "1s" is not an option due to the absence of compact XOR/XNOR gates. However, this work demonstrates, for the first time ever, that in lateral double-gate NEMS-based circuits, grouping of minterms is possible in horizontal and vertical as well as diagonal fashions. This is because the diagonal groupings of minterms require XOR/XNOR operations, which are available in such NEMS-based circuits at minimal costs. This novel design paradigm facilitates more compact implementations of Boolean functions and thus, considerably improves their energy-efficiency. For example, a lateral NEMS-based full-adder is implemented using less than half the number of transistors, which is required by a CMOS-based full-adder. Furthermore, circuit simulations are performed to evaluate the energy-efficiencies of the NEMS-based 32-bit carry-save adders compared to their standard CMOS-based counterparts. Copyright 2010 ACM.
A novel nanoscaled Schottky barrier based transmission gate and its digital circuit applications
Kumar, Sunil; Loan, Sajad A.; Alamoud, Abdulrahman M.
2017-04-01
In this work we propose and simulate a compact nanoscaled transmission gate (TG) employing a single Schottky barrier based transistor in the transmission path and a single transistor based Sajad-Sunil-Schottky (SSS) device as an inverter. Therefore, just two transistors are employed to realize a complete transmission gate which normally consumes four transistors in the conventional technology. The transistors used to realize the transmission path and the SSS inverter in the proposed TG are the double gate Schottky barrier devices, employing stacks of two metal silicides, platinum silicide (PtSi) and erbium silicide (ErSi). It has been observed that the realization of the TG gate by the proposed technology has resulted into a compact structure, with reduced component count, junctions, interconnections and regions in comparison to the conventional technology. The further focus of this work is on the application part of the proposed technology. So for the first time, the proposed technology has been used to realize various combinational circuits, like a two input AND gate, a 2:1 multiplexer and a two input XOR circuits. It has been observed that the transistor count has got reduced by half in a TG, two input AND gate, 2:1 multiplexer and in a two input XOR gate. Therefore, a significant reduction in transistor count and area requirement can be achieved by using the proposed technology. The proposed technology can be also used to perform the compact realization of other combinational and sequential circuitry in future.
Ugur, Cahit [Helmholtz-Institut Mainz, Johannes Gutenberg-Universitaet Mainz (Germany); Bayer, Eugen [Department for Digital Electronics, University Kassel (Germany); Kurz, Nikolaus; Traxler, Michael [GSI Helmholtz Centre for Heavy Ion Research, Darmstadt (Germany); Michel, Jan [Institute for Nuclear Physics, Goethe University Frankfurt, Frankfurt am Main (Germany)
2012-07-01
A high resolution time-to-digital converter (TDC) was implemented in a general purpose field-programmable gate array (FPGA), a re-programmable digital chip. RMS and the time resolution of different channels are calculated for one clock cycle (5 ns) interval and a minimum of 10.3 ps RMS on two channels is achieved, which yields to a time resolution of 7.3 ps (10.3 ps/{radical}(2)) on a single channel. The TDC can be used in time-of-flight, time-over-threshold, drift time measurement applications as well as many other measurements with specific Front-End Electronics (FEE), e.g. charge measurements with charge-to-width (Q2W) FEE. The re-programmable flexibility of FPGAs also allows to have application specific features, e.g. trigger window, zero dead time etc.
Sun, Jian; Yang, Fan; Zhao, Dan; Chen, Chuanxia; Yang, Xiurong
2015-04-01
By means of employing 11-mercaptoundecanoic acid (11-MUA) as a reducing agent and protecting ligand, we present straightforward one-pot preparation of fluorescent Ag/Au bimetallic nanoclusters (namely AgAuNCs@11-MUA) from AgNO3 and HAuCl4 in alkaline aqueous solution at room temperature. It is found that the fluorescence of AgAuNCs@11-MUA has been selectively quenched by Cu(2+) ions, and the nonfluorescence off-state of the as-prepared AgAuNCs@11-MUA-Cu(2+) ensemble can be effectively switched on upon the addition of histidine and cysteine. By incorporating Ni(2+) ions and N-ethylmaleimide, this phenomenon is further exploited as an integrated logic gate and a specific fluorescence turn-on assay for selectively and sensitively sensing histidine and cysteine has been designed and established based on the original noncovalent AgAuNCs@11-MUA-Cu(2+) ensemble. Under the optimal conditions, histidine and cysteine can be detected in the concentration ranges of 0.25-9 and 0.25-7 μM; besides, the detection limits are found to be 87 and 111 nM (S/N = 3), respectively. Furthermore, we demonstrate that the proposed AgAuNCs@11-MUA-based fluorescent assay can be successfully utilized for biological fluids sample analysis.
Gao, Tianxi; Que, Wenxiu, E-mail: wxque@mail.xjtu.edu.cn; Shao, Jinyou [Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education, International Center for Dielectric Research, School of Electronic and Information Engineering, State Key Laboratory for Manufacturing Systems Engineering, Xi' an Jiaotong University, Xi' an 710049, Shaanxi (China); Wang, Yushu [School of Materials Science and Engineering, Georgia Institute of Technology, 500 Tenth Street NW, Atlanta, Georgia 30318 (United States)
2015-10-21
Azobenzene dyes have large refractive index near their main resonance, but the poor figure of merit (FOM) limits their potential for all-optical applications. To improve this situation, disperse red 1 (DR1) molecules were dispersed in a sol-gel germanium/Ormosil organic-inorganic hybrid matrix. Z-scan measurement results showed a good compatibility between the dopant and the matrix, and also, an improved FOM was obtained as compared to the DR1/polymer films reported previously. To demonstrate the all-optical signal processing effect, a cw Nd:YAG laser emitting at 532 nm and a He-Ne laser emitting at 632.8 nm were used as pump and probe beams, respectively. DR1 acts as an initiator of the photo-induced transient holographic grating, which is attributed to the trans-cis-trans photoisomerization. Thus, a three inputs AND all-optical logic gate was achieved by using choppers with different frequencies. The detailed mechanism of operation is discussed. These results indicate that the DR1 doped germanium/Ormosil organic-inorganic hybrid film with an improved FOM has a great potential in all-optical devices around its main resonance.
New trends in logic synthesis for both digital designing and data processing
Borowik, Grzegorz; Łuba, Tadeusz; Poźniak, Krzysztof
2016-09-01
FPGA devices are equipped with memory-based structures. These memories act as very large logic cells where the number of inputs equals the number of address lines. At the same time, there is a huge demand in the market of Internet of Things for devices implementing virtual routers, intrusion detection systems, etc.; where such memories are crucial for realizing pattern matching circuits, IP address tables, and other. Unfortunately, existing CAD tools are not well suited to utilize capabilities that such large memory blocks offer due to the lack of appropriate synthesis procedures. This paper presents methods which are useful for memory-based implementations: minimization of the number of input variables and functional decomposition.
Herselman, PLR
2007-09-01
Full Text Available In modern information and sensor systems, the timely estimation of the carrier frequency of received signals is of critical importance. This paper presents a digital instantaneous frequency measurement (DIFM) technique, which can measure the carrier...
Universal asynchronous RSFQ gate for realization of Boolean functions of dual-rail binary variables
Dimov, B [University of Technology Ilmenau, Institute for Information Technology, PO Box 100565, D-98684 Ilmenau (Germany); Khabipov, M [Physikalisch-Technische Bundesanstalt, Division 2.42, Bundesallee 100, D-38116 Braunschweig (Germany); Balashov, D [Physikalisch-Technische Bundesanstalt, Division 2.42, Bundesallee 100, D-38116 Braunschweig (Germany); Brandt, C M [Physikalisch-Technische Bundesanstalt, Division 2.42, Bundesallee 100, D-38116 Braunschweig (Germany); Ortlepp, Th [University of Technology Ilmenau, Institute for Information Technology, PO Box 100565, D-98684 Ilmenau (Germany); Hagedorn, D [Physikalisch-Technische Bundesanstalt, Division 2.42, Bundesallee 100, D-38116 Braunschweig (Germany); Buchholz, F-Im [Physikalisch-Technische Bundesanstalt, Division 2.42, Bundesallee 100, D-38116 Braunschweig (Germany); Niemeyer, J [Physikalisch-Technische Bundesanstalt, Division 2.42, Bundesallee 100, D-38116 Braunschweig (Germany); Uhlmann, F H [University of Technology Ilmenau, Institute for Information Technology, PO Box 100565, D-98684 Ilmenau (Germany)
2006-06-01
We report on the design, optimization, fabrication, and successful testing of an universal asynchronous RSFQ logic gate based on the dual-rail data coding. Properly connecting its inputs and outputs, one can perform most of the basic Boolean functions over a pair of dual-rail input variables. Therefore, this gate is fundamental component for the development of high-speed complex asynchronous RSFQ digital devices.
肖林荣; 陈偕雄; 应时彦
2011-01-01
为了减少纳米器件量子细胞自动机(QCA)电路的线交叉数和电路综合时采用的门电路类型,在介绍QCA细胞结构、逻辑器件、模块化设计技术以及最佳通用逻辑门ULG.2的基础上,提出基于模块化技术的最佳通用逻辑门ULG.2的QCA电路实现方案.利用最佳QCA通用逻辑门ULG.2设计了全加/减器、全比较器和4选1数据选择器.所设计的QCA电路均用QCADesigner软件进行模拟,结果表明:该电路不仅具有正确的逻辑功能,而且某些性能得到了很大的改善.特别地对于4选1数据选择器,与已有的多数门和反相器直接设计的电路相比,细胞数、QCA线交叉数分别减少了31.8％和62.5％.%In order to reduce the number of wire-crossings in quantum-dot cellular automata (QCA) circuits and the types of QCA logic gates in logic synthesis, based on the introduction of basic principles of QCA , QCA logic devices and modular design methodology, a novel QCA optimal universal logic gate ULG. 2 was designed. Three circuits of full adder/subtraction, full comparator and 4-to-l multiplexer were implemented with the optimal QCA universal logic gate ULG. 2. Simulation by using the QCADesigner tool for the proposed QCA circuits confirms that the proposed circuits have correct logic function and their performance was improved dramatically in comparison to the other previous designs. Especially, the proposed 4-to-l multiplexer was reduced 31. 8%QCA cells and 62. 5% number of wire-crossings compared with the traditional design based on majority gates and inverters.
Scope of Reversible Engineering at Gate-Level : Fault - Tolerant Combinational Adders
M.Bharathi
2012-05-01
Full Text Available Reversible engineering has been one of the thrust areas ensuring that continual process of the innovation trends that explore and sustain the resources of the nature. This reversible engineering is used in many fields like quantum computing, low power CMOS design, nanotechnology, optical information processing, digital signal processing, cryptography, etc. These are the digital domain implementations of Reversible and Fault-Tolerant logic gates. Any arbitrary Boolean function can be synthesized by using the proposed parity preserving reversible gates. Not only the possibility of detecting errors is induced inherently in the proposed high speed adders at their output side but also it allows any fault that affects no more than a single signal that is detectable. The fault tolerant reversible full adder circuits are realized by using two IG gates only. The derived fault tolerant full adder is used for designing other arithmetic- logic circuit by using it as fundamental building block. The proposed reversible gate is designed to have less hardwarecomplexity and efficiecyt in terms of gate count, garbage outputs and constant input. In this paper, we design BCD adder using carry select logic, Carry-select and Bypass adders using FG gates, and newly designed TG gates.
Scope of Reversible Engineering at Gate-Level : Fault - Tolerant Combinational Adders
M.Bharathi
2012-04-01
Full Text Available Reversible engineering has been one of the thrust areas ensuring that continual process of the innovation trends that explore and sustain the resources of the nature. This reversible engineering is used in many fields like quantum computing, low power CMOS design, nanotechnology, optical information processing, digital signal processing, cryptography, etc. These are the digital domain implementations of Reversible and Fault-Tolerant logic gates. Any arbitrary Boolean function can be synthesized by using the proposed parity preserving reversible gates. Not only the possibility of detecting errors is induced inherently in the proposed high speed adders at their output side but also it allows any fault that affects no more than a single signal that is detectable. The fault tolerant reversible full adder circuits are realized by using two IG gates only. The derived fault tolerant full adder is used for designing other arithmetic- logic circuit by using it as fundamental building block. The proposed reversible gate is designed to have less hardware complexity and efficiecyt in terms of gate count, garbage outputs and constant input. In this paper, we design BCD adder using carry select logic, Carry-select and Bypass adders using FG gates, and newly designed TG gates.
Liu, Dan; Liu, Hongyun; Hu, Naifei
2012-02-09
Phenylboronic acid (PBA) moieties are grafted onto the backbone of poly(acrylic acid) (PAA), forming the PAA-PBA polyelectrolyte. The semi-interpenetrating polymer network (semi-IPN) films composed of PAA-PBA and poly(N,N-diethylacrylamide) (PDEA) were then synthesized on electrode surface with entrapped horseradish peroxidase (HRP), designated as PDEA-(PAA-PBA)-HRP. The films demonstrated reversible pH-, fructose-, and thermo-responsive on-off behavior toward electroactive probe K(3)Fe(CN)(6) in its cyclic voltammetric (CV) response. This multiswitchable CV behavior of the system could be further employed to control and modulate the electrochemical reduction of H(2)O(2) catalyzed by HRP immobilized in the films with K(3)Fe(CN)(6) as the mediator in solution. The responsive mechanism of the system was also explored and discussed. The pH-sensitive property was attributed to the electrostatic interaction between the PAA component of the films and the probe at different pH; the thermo-responsive behavior originated from the structure change of PDEA hydrogel component of the films with temperature; the fructose-sensitive property was ascribed to the structure change of the films induced by the complexation between the PBA constituent and the sugar. This smart system could be used as a 3-input logic network composed of enabled OR (EnOR) gates in chemical or biomolecular computing by combining the multiresponsive property of the films and the amplification effect of bioelectrocatalysis and demonstrated the potential perspective for fabricating novel multiswitchable electrochemical biosensors and bioelectronic devices. © 2012 American Chemical Society
Wang, Lei; Lian, Wenjing; Yao, Huiqin; Liu, Hongyun
2015-03-11
In the present work, reduced graphene oxide (rGO)/poly(N-isopropylacrylamide) (PNIPAA) composite films were electrodeposited onto the surface of Au electrodes in a fast and one-step manner from an aqueous mixture of a graphene oxide (GO) dispersion and N-isopropylacrylamide (NIPAA) monomer solutions. Reflection-absorption infrared (IR) and Raman spectroscopies were employed to characterize the successful construction of the rGO/PNIPAA composite films. The rGO/PNIPAA composite films exhibited reversible potential-, pH-, temperature-, and sulfate-sensitive cyclic voltammetric (CV) on-off behavior to the electroactive probe ferrocenedicarboxylic acid (Fc(COOH)2). For instance, after the composite films were treated at -0.7 V for 7 min, the CV responses of Fc(COOH)2 at the rGO/PNIPAA electrodes were quite large at pH 8.0, exhibiting the on state. However, after the films were treated at 0 V for 30 min, the CV peak currents became much smaller, demonstrating the off state. The mechanism of the multiple-stimuli switchable behaviors for the system was investigated not only by electrochemical methods but also by scanning electron microscopy and X-ray photoelectron spectroscopy. The potential-responsive behavior for this system was mainly attributed to the transformation between rGO and GO in the films at different potentials. The film system was further used to realize multiple-stimuli responsive bioelectrocatalysis of glucose catalyzed by the enzyme of glucose oxidase and mediated by the electroactive probe of Fc(COOH)2 in solution. On the basis of this, a four-input enabled OR (EnOR) logic gate network was established.
Characterization of Fundamental Logics for the Sub-Threshold Digital Design
Yan-Ming He; Ya-Juan He; Yang-Ming Li; Shao-Wei Zhen; Ping Luo
2013-01-01
Digital circuits operating in the sub-threshold regime consume the least energy. The strict energy constraints are desired in the applications which work at the lowest possible supply voltage. On the other hand, the conventional design flow utilizes the technology library provided by the foundry with a fixed voltage boundary, which causes problems when the supply scales down to the sub-threshold regime. In this paper, we present a design methodology to characterize the existing cell library with Liberty NCX to facilitate the standard design flow. It is demonstrated in 0.13μm complementary metal-oxide-semiconductor (CMOS) technology with the supply voltage of 300 mV.
Du, Yuanbo; Li, Wenbing; Ge, Yapeng; Li, Hui; Deng, Ke; Lu, Zehuang
2017-09-01
A high-frequency signal generator based on direct digital synthesizer (DDS) and field-programmable gate array (FPGA) is presented. The FPGA provides the controlling time sequence for the DDS, which has a highest output frequency of 1.4 GHz and a frequency resolution of 190 pHz. At an output frequency of 1.2 GHz, the measured phase noise, including the contribution of the reference clock, is -65 dBc/Hz@1 Hz, while the intrinsic phase noise is -82 dBc/Hz@1 Hz. Time delay of the DDS is measured to be less than 150 ns. The signal generator is used to drive an acousto-optic modulator, and the rise time due to the whole link is 24 ns. The developed signal generator can be used in many precision measurement experiments in the fields of atomic, molecular, and optical physics.
Development of a sub-nanosecond time-to-digital converter based on a field-programmable gate array
Sano, Y.; Tomoto, M.; Horii, Y.; Sasaki, O.; Uchida, T.; Ikeno, M.
2016-03-01
The present time-to-digital converter (TDC) chips for the monitored drift tube (MDT) chambers at the ATLAS experiment will be replaced with new ones for the High-Luminosity LHC, expected to begin operation in 2026. The design and the performance of a 24 channel TDC with a variable time binning of down to 0.28 nsec based on a Xilinx Kintex-7 field programmable gate array are reported. The time measurement is provided by a multisampling scheme with quad phase clocks synchronized with an external reference clock. The differential and integral nonlinearities have been measured to be less than half of the time binning. The temperature dependence on the performance is observed to be small. In conclusion the obtained performance of the time measurement is sufficiently high for the use with MDT chambers.
Ankur Khare
2016-05-01
Full Text Available Delays added by the encryption process represent an overhead for smart computing devices in ad-hoc and ubiquitous computing intelligent systems. Digital Logic Circuits are faster than other computing techniques, so these can be used for fast encryption to minimize processing delays. Chaotic Encryption is more attack-resilient than other encryption techniques. One of the most attractive properties of cryptography is known as an avalanche effect, in which two different keys produce distinct cipher text for the same information. Important properties of chaotic systems are sensitivity to initial conditions and nonlinearity, which makes two similar keys that generate different cipher text a source of confusion. In this paper a novel fast and secure Chaotic Map-based encryption technique using 2’s Compliment (CET-2C has been proposed, which uses a logistic map which implies that a negligible difference in parameters of the map generates different cipher text. Cryptanalysis of the proposed algorithm shows the strength and security of algorithm and keys. Performance of the proposed algorithm has been analyzed in terms of running time, throughput and power consumption. It is to be shown in comparison graphs that the proposed algorithm gave better results compare to different algorithms like AES and some others.
McFee, J.E., E-mail: jemcfee@telus.net; Mosquera, C.M.; Faust, A.A.
2016-08-21
An analysis of digitized pulse waveforms from experiments with LaBr{sub 3}(Ce) and LaCl{sub 3}(Ce) detectors is presented. Pulse waveforms from both scintillator types were captured in the presence of {sup 22}Na and {sup 60}Co sources and also background alone. Two methods to extract pulse shape discrimination (PSD) parameters and estimate energy spectra were compared. The first involved least squares fitting of the pulse waveforms to a physics-based model of one or two exponentially modified Gaussian functions. The second was the conventional gated integration method. The model fitting method produced better PSD than gated integration for LaCl{sub 3}(Ce) and higher resolution energy spectra for both scintillator types. A disadvantage to the model fitting approach is that it is more computationally complex and about 5 times slower. LaBr{sub 3}(Ce) waveforms had a single decay component and showed no ability for alpha/electron PSD. LaCl{sub 3}(Ce) was observed to have short and long decay components and alpha/electron discrimination was observed.
The All Optical New Universal Gate Using TOAD
Goutam Kumar Maity
2014-06-01
Full Text Available Since the seventies of the past century the reversible logic has originated as an unconventional form of computing. It is new relatively in the area of extensive applications in quantum computing, low power CMOS, DNA computing, digital signal processing (DSP, nanotechnology, communication, optical computing, computer graphics, bio information, etc .Here we present and configure a new TAND gate in all-optical domain and also in this paper we have explained their principle of operations and used a theoretical model to fulfil this task, finally supporting through numerical simulations. In the field of ultra-fast all-optical signal processing Terahertz Optical Asymmetric Demultiplexer (TOAD, semiconductor optical amplifier (SOA-based, has an important function. The different logical (composing of Boolean function operations can be executed by designed circuits with TAND gate in the domain of universal logic-based information processing.
TRANSISTOR IMPLEMENTATION OF REVERSIBLE PRT GATES
RASHMI S.B,
2011-03-01
Full Text Available Reversible logic has emerged as one of the most important approaches for power optimization with its application in low power VLSI design. Reversible or information lossless circuits have applications in nanotechnology, digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computing. In this paper, two newoptimized universal gates are proposed. One of them has an ability to operate as a reversible half adder and half subtractor imultaneously. Another one acts only as half adder with minimum transistor count. The reversible gates are evaluated in terms of number of transistor count, critical path, garbage outputs and one to one mapping. Here transistor implementation of the proposed gates is done by using Virtuoso tool of cadence. Based on the results of the analysis, some of the trade-offs are made in the design to improve the efficiency.
Digitally Controlled Current Source Amplifiers for Power Converter Gate Drive Units
Scheele, Mathias
2013-01-01
Within this project, performance differences of 3.3 kV / 1500 A IGBT modules of the same type, but of different production batches are being investigated while the modules are being driven by the gate drive units of Bombardier Transportation. The results will be compared to measurements of a reference module. Devices of two different manufacturers were used. Results show that the deviations in terms of dI/dt, dV/dt and losses are generally very small. However, the IGBTs react differently if a...
Baldur’s Gate and History: Race and Alignment in Digital Role-Playing Games
Warnes, Christopher
2005-01-01
This paper, part of a wider study of the connections between romance, fantasy and political rhetoric in the twenty-first century, seeks to historicise some of the defining features of Dungeons and Dragons (D&D)-based role playing games, using as examples the Bioware games, Baldur’s Gate I and II and Neverwinter Nights. The starting point of the paper is that technical, procedural and aesthetic innovations in gaming arise from contexts given by history, and by social and cultural processes...
Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate
Phillips, Thomas A.; MacLeond, Todd C.; Sayyah, Rana; Ho, Fat Duen
2009-01-01
Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.
唐东峰; 张平; 龙志林; 胡仕刚; 吴笑峰
2013-01-01
With the scaling of MOS (metal-oxide-semiconductor) devices, gate tunneling current increases significantly due to thinner gate oxides, and static characteristics of devices and circuit are severely affected by the presence of gate tunneling currents, considering that, the direct tunneling current (DT) in MOSFET (metal-oxide-semiconductor field effect transistor) was studied based on reliability theory and simulation. Simultaneously, the static gate leakage current of two-input nor gate was studied and the impact of direct tunneling gate leakage current on CMOS (complementary metal oxide semiconductor) logic circuits was revealed. HSP1CE software was used as the simulation tool. MOS model parameter is BSIM4 and LEVEL 54. The thickness of the gate oxide is 1.4 nm. The results show that the edge direct tunneling is an important component of gate tunneling in a scaled MOS device. Drain bias and substrate bias can affect the gate current density by changing the surface potential. There are four common working states of MOS device in CMOS logic circuit, i.e. the linear region, saturation region, sub-threshold region and cut-off region. The gate leakage current of MOSFET in CMOS logic circuit is related to its working status. The simulation results agree well with theoretical analysis results, and the theory and simulation will contribute to integrated circuit design.%随着晶体管尺寸按比例缩小,越来越薄的氧化层厚度导致栅上的隧穿电流显著地增大,严重地影响器件和电路的静态特性,为此,基于可靠性理论和仿真,对小尺寸MOSFET (metal-oxide-semiconductor field effect transistor)的直接隧穿栅电流进行研究,并通过对二输入或非门静态栅泄漏电流的研究,揭示直接隧穿栅电流对CMOS(complementary metal oxide semiconductor)逻辑电路的影响.仿真工具为HSPICE软件,MOS器件模型参数采用的是BSIM4和LEVEL 54,栅氧化层厚度为1.4 nm.研究结果表明:边缘直接隧穿电流是
PM 3655 PHILIPS Logic analyzer
A logic analyzer is an electronic instrument that captures and displays multiple signals from a digital system or digital circuit. A logic analyzer may convert the captured data into timing diagrams, protocol decodes, state machine traces, assembly language, or may correlate assembly with source-level software. Logic Analyzers have advanced triggering capabilities, and are useful when a user needs to see the timing relationships between many signals in a digital system.
All-optical digital processor based on harmonic generation phenomena
Shcherbakov, Alexandre S.; Rakovsky, Vsevolod Y.
1990-07-01
Digital optical processors are designed to combine ultra- parallel data procesing capabilities of optical aystems cnd high accur&cy of performed computations. The ultimate limit of the processing rate can be anticipated from all-optical parcllel erchitecturea based on networks o logic gates using materials exibiting strong electronic nonlinearities with response times less than 1O seconds1.
Cadilha Marques, Gabriel; Garlapati, Suresh Kumar; Dehm, Simone; Dasgupta, Subho; Hahn, Horst; Tahoori, Mehdi; Aghassi-Hagmann, Jasmin
2017-09-01
Printed electronic components offer certain technological advantages over their silicon based counterparts, like mechanical flexibility, low process temperatures, maskless and additive manufacturing possibilities. However, to be compatible to the fields of smart sensors, Internet of Things, and wearables, it is essential that devices operate at small supply voltages. In printed electronics, mostly silicon dioxide or organic dielectrics with low dielectric constants have been used as gate isolators, which in turn have resulted in high power transistors operable only at tens of volts. Here, we present inkjet printed circuits which are able to operate at supply voltages as low as ≤2 V. Our transistor technology is based on lithographically patterned drive electrodes, the dimensions of which are carefully kept well within the printing resolutions; the oxide semiconductor, the electrolytic insulator and the top-gate electrodes have been inkjet printed. Our inverters show a gain of ˜4 and 2.3 ms propagation delay time at 1 V supply voltage. Subsequently built 3-stage ring oscillators start to oscillate at a supply voltage of only 0.6 V with a frequency of ˜255 Hz and can reach frequencies up to ˜350 Hz at 2 V supply voltage. Furthermore, we have introduced a systematic methodology for characterizing ring oscillators in the printed electronics domain, which has been largely missing. Benefiting from this procedure, we are now able to predict the switching capacitance and driver capability at each stage, as well as the power consumption of our inkjet printed ring oscillators. These achievements will be essential for analyzing the performance and power characteristics of future inkjet printed digital circuits.
A nanomechanical Fredkin gate.
Wenzler, Josef-Stefan; Dunn, Tyler; Toffoli, Tommaso; Mohanty, Pritiraj
2014-01-08
Irreversible logic operations inevitably discard information, setting fundamental limitations on the flexibility and the efficiency of modern computation. To circumvent the limit imposed by the von Neumann-Landauer (VNL) principle, an important objective is the development of reversible logic gates, as proposed by Fredkin, Toffoli, Wilczek, Feynman, and others. Here, we present a novel nanomechanical logic architecture for implementing a Fredkin gate, a universal logic gate from which any reversible computation can be built. In addition to verifying the truth table, we demonstrate operation of the device as an AND, OR, NOT, and FANOUT gate. Excluding losses due to resonator dissipation and transduction, which will require significant improvement in order to minimize the overall energy cost, our device requires an energy of order 10(4) kT per logic operation, similar in magnitude to state-of-the-art transistor-based technologies. Ultimately, reversible nanomechanical logic gates could play a crucial role in developing highly efficient reversible computers, with implications for efficient error correction and quantum computing.
GATE TYPE SELECTION BASED ON FUZZY MAPPING
无
2002-01-01
Gate type selection is very important for mould design. Improper gate type may lead to poor product quality and low production efficiency. Although numerical simulation approach could be used to optimize gate location, the determination of gate type is still up to designers' experience. A novel method for selecting gate type based on fuzzy logic is proposed. The proposed methodology follows three steps:Design requirements for gate is extracted and generalized; Possible gate types (design schemes) are presented; The fuzzy mapping relationship between gate design requirements and gate design scheme is established based on fuzzy composition and fuzzy relation transition matrices that are assigned by domain experts.
Nilsson, Jørgen Fischer
A Gentle introduction to logical languages, logical modeling, formal reasoning and computational logic for computer science and software engineering students......A Gentle introduction to logical languages, logical modeling, formal reasoning and computational logic for computer science and software engineering students...
Sasao, Tsutomu
2011-01-01
This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.
Ferrite logic reliability study
Baer, J. A.; Clark, C. B.
1973-01-01
Development and use of digital circuits called all-magnetic logic are reported. In these circuits the magnetic elements and their windings comprise the active circuit devices in the logic portion of a system. The ferrite logic device belongs to the all-magnetic class of logic circuits. The FLO device is novel in that it makes use of a dual or bimaterial ferrite composition in one physical ceramic body. This bimaterial feature, coupled with its potential for relatively high speed operation, makes it attractive for high reliability applications. (Maximum speed of operation approximately 50 kHz.)
Reversible Logic Circuit Synthesis
Shende, V V; Markov, I L; Prasad, A K; Hayes, John P.; Markov, Igor L.; Prasad, Aditya K.; Shende, Vivek V.
2002-01-01
Reversible, or information-lossless, circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement for quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line-pairs (temporary storage channels). We propose new constructions for reversible circuits composed of NOT, Controlled-NOT, and TOFFOLI gates (the CNT gate library) based on permutation theory. A new algorithm is given to synthesize optimal reversible circuits using an arbitrary gate library. We also describe much faster heuristic algorithms. We also pursue applications of the proposed techniques to the synthesis of quantum circuits.
Optimized Multiplier Using Reversible Multicontrol Input Toffoli Gates
H R Bhagyalakshmi
2013-01-01
Full Text Available Reversible logic is an important area to carry the computation into the world of quantum computing. In thispaper a 4-bit multiplier using a new reversible logic gate called BVPPG gate is presented. BVPPG gate isa 5 x 5 reversible gate which is designed to generate partial products required to perform multiplicationand also duplication of operand bits is obtained. This reduces the total cost of the circuit. Toffoli gate isthe universal and also most flexible reversible logic gate. So we have used the Toffoli gates to construct thedesigned multiplier.
Digital optical cellular image processor (DOCIP) - Experimental implementation
Huang, K.-S.; Sawchuk, A. A.; Jenkins, B. K.; Chavel, P.; Wang, J.-M.; Weber, A. G.; Wang, C.-H.; Glaser, I.
1993-01-01
We demonstrate experimentally the concept of the digital optical cellular image processor architecture by implementing one processing element of a prototype optical computer that includes a 54-gate processor, an instruction decoder, and electronic input-output interfaces. The processor consists of a two-dimensional (2-D) array of 54 optical logic gates implemented by use of a liquid-crystal light valve and a 2-D array of 53 subholograms to provide interconnections between gates. The interconnection hologram is fabricated by a computer-controlled optical system.
Construction of a reconfigurable dynamic logic cell
K Murali; Sudeshna Sinha; William L Ditto
2005-03-01
We report the first experimental realization of all the fundamental logic gates, flexibly, using a chaotic circuit. In our scheme a simple threshold mechanism allows the chaotic unit to switch easily between behaviours emulating the different gates. We also demonstrate the combination of gates through a half-adder implementation.
Fegade, Umesh A; Sahoo, Suban K; Singh, Amanpreet; Singh, Narinder; Attarde, Sanjay B; Kuwar, Anil S
2015-05-04
A fluorescent based receptor (4Z)-4-(4-diethylamino)-2-hydroxybenzylidene amino)-1,2dihydro-1,5-dimethyl-2-phenylpyrazol-3-one (receptor 3) was developed for the highly selective and sensitive detection of Cu(2+) and Zn(2+) in semi-aqueous system. The fluorescence of receptor 3 was enhanced and quenched, respectively, with the addition of Zn(2+) and Cu(2+) ions over other surveyed cations. The receptor formed host-guest complexes in 1:1 stoichiometry with the detection limit of 5 nM and 15 nM for Cu(2+) and Zn(2+) ions, respectively. Further, we have effectively utilized the two metal ions (Cu(2+) and Zn(2+)) as chemical inputs for the manufacture of INHIBIT type logic gate at molecular level using the fluorescence responses of receptor 3 at 450 nm. Copyright © 2015 Elsevier B.V. All rights reserved.
MEMS Logic Using Mixed-Frequency Excitation
Ilyas, Saad
2017-06-22
We present multi-function microelectromechanical systems (MEMS) logic device that can perform the fundamental logic gate AND, OR, universal logic gates NAND, NOR, and a tristate logic gate using mixed-frequency excitation. The concept is based on exciting combination resonances due to the mixing of two or more input signals. The device vibrates at two steady states: a high state when the combination resonance is activated and a low state when no resonance is activated. These vibration states are assigned to logical value 1 or 0 to realize the logic gates. Using ac signals to drive the resonator and to execute the logic inputs unifies the input and output wave forms of the logic device, thereby opening the possibility for cascading among logic devices. We found that the energy consumption per cycle of the proposed logic resonator is higher than those of existing technologies. Hence, integration of such logic devices to build complex computational system needs to take into consideration lowering the total energy consumption. [2017-0041
Jin, Dal Bok
2002-02-15
This book lists basic of digital engineering, number system and digital code, Boolean algebra and basic logic circuit, simplify of logical expression, combinational circuit, arithmetic circuit, multivibrator circuit, sequential circuit, memory unit of semiconductor and logical element for program, D/A converter and A/D converter, logic element and integrated circuit and logic circuit and micro controller. It has exercises and answers about digital engineering and summary in the end of each chapter.
Yin, Z; Yin, Zhang-qi; Li, Fu-li
2007-01-01
A system consisting of two single-mode cavities spatially separated and connected by an optical fibre and multi two-level atoms trapped in the cavities is considered. If the atoms resonantly and collectively interact with the local cavity fields but there is no direct interaction between the atoms, we show that an ideal quantum state transfer, and highly reliable quantum swap, entangling and controlled-Z gates can be deterministically realized between the distant cavities. We find that the operation of the state-transfer, and swap, entangling and controlled-Z gates can be greatly speeded up as number of the atoms in the cavities increases. We also notice that the effects of spontaneous emission of atoms and photon leakage out of cavity on the quantum processes can also be greatly diminished in the multi-atom case.
Protected gates for topological quantum field theories
Beverland, Michael E.; Pastawski, Fernando; Preskill, John [Institute for Quantum Information and Matter, California Institute of Technology, Pasadena, California 91125 (United States); Buerschaper, Oliver [Dahlem Center for Complex Quantum Systems, Freie Universität Berlin, 14195 Berlin (Germany); Koenig, Robert [Institute for Advanced Study and Zentrum Mathematik, Technische Universität München, 85748 Garching (Germany); Sijher, Sumit [Institute for Quantum Computing and Department of Applied Mathematics, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada)
2016-02-15
We study restrictions on locality-preserving unitary logical gates for topological quantum codes in two spatial dimensions. A locality-preserving operation is one which maps local operators to local operators — for example, a constant-depth quantum circuit of geometrically local gates, or evolution for a constant time governed by a geometrically local bounded-strength Hamiltonian. Locality-preserving logical gates of topological codes are intrinsically fault tolerant because spatially localized errors remain localized, and hence sufficiently dilute errors remain correctable. By invoking general properties of two-dimensional topological field theories, we find that the locality-preserving logical gates are severely limited for codes which admit non-abelian anyons, in particular, there are no locality-preserving logical gates on the torus or the sphere with M punctures if the braiding of anyons is computationally universal. Furthermore, for Ising anyons on the M-punctured sphere, locality-preserving gates must be elements of the logical Pauli group. We derive these results by relating logical gates of a topological code to automorphisms of the Verlinde algebra of the corresponding anyon model, and by requiring the logical gates to be compatible with basis changes in the logical Hilbert space arising from local F-moves and the mapping class group.
Priscila Monteiro Borges
2012-01-01
Full Text Available Historically, typography has been having the function of making visible verbal language. However, fonts have another functions besides this one - they can also represent visual qualities. The aim of this article is to analyze the sign functioning of digital typographic fonts to show how some of them emphasize the typographys visual/graphic logic, placing their verbal relations on second plan. Using Charles S. Peirce semiotic method of analysis, we examine how verbal and visual languages are used in different levels on digital fonts and we propose a classification of digital fonts based on their significant potential.Historicamente a tipografia tem funo de tornar visvel a escrita verbal. No entanto, as fontes no apresentam apenas essa funo, elas tambm possuem a capacidade de representar qualidades visuais. Este artigo tem como objetivo analisar o funcionamento sgnico de fontes tipogrficas digitais para mostrar como algumas fontes digitais enfatizam a lgica grfico-visual da tipografia, deixando em segundo plano sua relao verbal. Utilizando o mtodo de anlise semitica de Charles S. Peirce, examinamos como as linguagens verbais e visuais so utilizadas em diferentes graus nas fontes digitais e propomos uma classificao dessas fontes digitais baseada no potencial significativo delas.
Belochio, Vivian de Carvalho; Universidade Federal do Pampa (Unipampa)
2014-01-01
This paper presents partial results of a doctoral research focused on the multiplatform distribution involving journalism in digital networks. This research starts from the hypothesis that convergence with digital media, which will be defined during this article, results in the expansion of communication contracts (Charaudeau, 2007) proposed by news outlets. The case of the newspaper “Zero Hora” is analyzed in the thesis. This paper proposes a reflection about the possible expansion of commun...
Logic functions and equations examples and exercises
Steinbach, Bernd
2009-01-01
With a free, downloadable software package available to help solve the exercises, this book focuses on practical and relevant problems that arise in the field of binary logics, with its two main applications - digital circuit design, and propositional logics.
Development of RPS trip logic based on PLD technology
Choi, Jong Gyun; Lee, Dong Young [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)
2012-08-15
The majority of instrumentation and control (I and C) systems in today's nuclear power plants (NPPs) are based on analog technology. Thus, most existing I and C systems now face obsolescence problems. Existing NPPs have difficulty in repairing and replacing devices and boards during maintenance because manufacturers no longer produce the analog devices and boards used in the implemented I and C systems. Therefore, existing NPPs are replacing the obsolete analog I and C systems with advanced digital systems. New NPPs are also adopting digital I and C systems because the economic efficiencies and usability of the systems are higher than the analog I and C systems. Digital I and C systems are based on two technologies: a microprocessor based system in which software programs manage the required functions and a programmable logic device (PLD) based system in which programmable logic devices, such as field programmable gate arrays, manage the required functions. PLD based systems provide higher levels of performance compared with microprocessor based systems because PLD systems can process the data in parallel while microprocessor based systems process the data sequentially. In this research, a bistable trip logic in a reactor protection system (RPS) was developed using very high speed integrated circuits hardware description language (VHDL), which is a hardware description language used in electronic design to describe the behavior of the digital system. Functional verifications were also performed in order to verify that the bistable trip logic was designed correctly and satisfied the required specifications. For the functional verification, a random testing technique was adopted to generate test inputs for the bistable trip logic.
Logic synthesis for FPGA-based finite state machines
Barkalov, Alexander; Kolopienczyk, Malgorzata; Mielcarek, Kamil; Bazydlo, Grzegorz
2016-01-01
This book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model. It shows that one of the peculiarities of FPGA chips is the existence of embedded memory blocks (EMB). The book is devoted to the solution of problems of logic synthesis and reduction of hardware amount in control units. The book will be interesting and useful for researchers and PhD students in the area of Electrical Engineering and Computer Science, as well as for designers of modern digital systems.
数字逻辑课程教学方式的改革与探讨%Discussion on the teaching reform of digital logic course
梁娟
2016-01-01
The traditional teaching method of digital logic course is mainly dominated by theoretical teaching. This paper mainly analyzes the questions existing in the traditional teaching, focusing on how to improve student's ability of logical thinking, ability of designing and analyzing problems, and professional competence, and how to strengthen the cultivation of applied technical personnel, and so on, discusses the teaching reform of the course from theory, experiment, curriculum design and assessment methods, and other aspects.%数字逻辑传统的教学方式主要是以理论教学为主。文章主要分析了传统教学方式存在的一些问题，围绕如何提高学生的逻辑思维能力、设计分析问题的能力和职业化能力，以及如何加强应用型技术人才的培养等问题，从理论、实验、课程设计和考核方式等方面，对该课程的教学改革进行探讨。
Goavec-Mérou, G; Chrétien, N; Friedt, J-M; Sandoz, P; Martin, G; Lenczner, M; Ballandras, S
2014-01-01
Vibrating mechanical structure characterization is demonstrated using contactless techniques best suited for mobile and rotating equipments. Fast measurement rates are achieved using Field Programmable Gate Array (FPGA) devices as real-time digital signal processors. Two kinds of algorithms are implemented on FPGA and experimentally validated in the case of the vibrating tuning fork. A first application concerns in-plane displacement detection by vision with sampling rates above 10 kHz, thus reaching frequency ranges above the audio range. A second demonstration concerns pulsed-RADAR cooperative target phase detection and is applied to radiofrequency acoustic transducers used as passive wireless strain gauges. In this case, the 250 ksamples/s refresh rate achieved is only limited by the acoustic sensor design but not by the detection bandwidth. These realizations illustrate the efficiency, interest, and potentialities of FPGA-based real-time digital signal processing for the contactless interrogation of passive embedded probes with high refresh rates.
Delay modeling in logic simulation
Acken, J. M.; Goldstein, L. H.
1980-01-01
As digital integrated circuit size and complexity increases, the need for accurate and efficient computer simulation increases. Logic simulators such as SALOGS (SAndia LOGic Simulator), which utilize transition states in addition to the normal stable states, provide more accurate analysis than is possible with traditional logic simulators. Furthermore, the computational complexity of this analysis is far lower than that of circuit simulation such as SPICE. An eight-value logic simulation environment allows the use of accurate delay models that incorporate both element response and transition times. Thus, timing simulation with an accuracy approaching that of circuit simulation can be accomplished with an efficiency comparable to that of logic simulation. 4 figures.
Reversibility and energy dissipation in adiabatic superconductor logic.
Takeuchi, Naoki; Yamanashi, Yuki; Yoshikawa, Nobuyuki
2017-03-06
Reversible computing is considered to be a key technology to achieve an extremely high energy efficiency in future computers. In this study, we investigated the relationship between reversibility and energy dissipation in adiabatic superconductor logic. We analyzed the evolution of phase differences of Josephson junctions in the reversible quantum-flux-parametron (RQFP) gate and confirmed that the phase differences can change time reversibly, which indicates that the RQFP gate is physically, as well as logically, reversible. We calculated energy dissipation required for the RQFP gate to perform a logic operation and numerically demonstrated that the energy dissipation can fall below the thermal limit, or the Landauer bound, by lowering operation frequencies. We also investigated the 1-bit-erasure gate as a logically irreversible gate and the quasi-RQFP gate as a physically irreversible gate. We calculated the energy dissipation of these irreversible gates and showed that the energy dissipation of these gate is dominated by non-adiabatic state changes, which are induced by unwanted interactions between gates due to logical or physical irreversibility. Our results show that, in reversible computing using adiabatic superconductor logic, logical and physical reversibility are required to achieve energy dissipation smaller than the Landauer bound without non-adiabatic processes caused by gate interactions.
Gate complexity using Dynamic Programming
Sridharan, Srinivas; Gu, Mile; James, Matthew R.
2008-01-01
The relationship between efficient quantum gate synthesis and control theory has been a topic of interest in the quantum control literature. Motivated by this work, we describe in the present article how the dynamic programming technique from optimal control may be used for the optimal synthesis of quantum circuits. We demonstrate simulation results on an example system on SU(2), to obtain plots related to the gate complexity and sample paths for different logic gates.
Delay Optimization of Low Power Reversible Gate using MOS Transistor Level design
Mukesh Kumar Kushwaha
2015-10-01
Full Text Available In Semiconductor industry has witnessed and explosive growth of integration of sophisticated multimedia base application onto mobile electronic gadget since the last decade. The critical concern in this aspect is to reduce the power consumption beyond a certain range of operating frequency. An important factor in the design of VLSI circuits is the choices of reversible logic. Basically conventionally digital circuits have been implemented using the logic gates, which were irreversible in nature only NOT gate are reversible. These irreversible gates produce energy loss due to the information bits lost during the operation information loss occurs because the total number of output signals generated is less than total number of input signals applied. In reversible if the input vector can be uniquely recovered from the output vector and if there is a one to one correspondence between its input and output logic. This paper present a new representation of existing reversible gate in MOS transistor. The MOS transistor designing using a gate diffusion input. Those new representation of MOS transistor has a hoping future in design of low power consumption circuits and high speed application
Hossein AGHABABA; Behjat FOROUZANDEH; Ali AFZALI-KUSHA
2012-01-01
We propose a modeling methodology for both leakage power consumption and delay of basic CMOS digital gates in the presence of threshold voltage and mobility variations.The key parameters in determining the leakage and delay are OFF and ON currents,respectively,which are both affected by the variation of the threshold voltage.Additionally,the current is a strong function of mobility.The proposed methodology relies on a proper modeling of the threshold voltage and mobility variations,which may be induced by any source.Using this model,in the plane of threshold voltage and mobility,we determine regions for different combinations of performance (speed) and leakage.Based on these regions,we discuss the trade-offbetween leakage and delay where the leakage-delay-product is the optimization objective.To assess the accuracy of the proposed model,we compare its predictions with those of HSPICE simulations for both basic digital gates and ISCAS85 benchmark circuits in 45-,65-,and 90-nm technologies.
Melendez-Pastor, I.; Navarro-Pedreño, J.; Gómez, I.; Koch, M.
2009-04-01
Soil vulnerability is the capacity of one or more of the ecological functions of the soil system to be harmed. Soil vulnerability is related with the sensitivity of the soil system to degradation processes like erosion, desertification or salinization. Vegetation plays a crucial role in soil vulnerability because is a source of organic matter and a protection against rain, wind and other erosive agents. A soil covered by a dense and vigorous vegetation is more resistant against erosion. Another important factor that determines soil vulnerability is the topography. Slope and aspect have a great influence on vegetation distribution and losses of soil due to erosive processes. A key problem with traditional erosion models (USLE; RUSLE, etc.) is that input parameters are obtained locally or with large intervals of time. This technical problem greatly limits the update of soil erosion maps and their modification according to landscape changes (land use change, forest fires, etc.). To solve this technical difficulties, remote sensing and GIS techniques has been employed to compute input parameters of erosion models or develop new methodological approaches for soil vulnerability and erosion assessment. This work presents a methodological approach to assess soil vulnerability using remote sensing and GIS techniques to estimate input variables and to develop calculations in a spatial basis. Input variables include information about vegetation status and topography. The main advantage of this approach is that input variables can be updated fast to reflect landscape changes and the phenological status of vegetation that substantially could affect soil vulnerability. Soil vulnerability is assessed with a fuzzy logic model. Fuzzy logic emanates from Fuzzy Sets theory developed by Zadeh (1965) as a way to express and operate with membership degrees of the elements in a set. Fuzzy logic works well with continuous variables and with data uncertainties, and thus is very suitable to
由C++到Verilog实现数字逻辑设计的方法%Design Method for Digital Logic Circuits from C ++ to Verilog
孟祥鹤; 吕楠; 韩路; 吴春瑜; 王绩伟; 梁洁
2011-01-01
A mode for designing the digital logic circuit through C ++ language matching with Verilog HDL was introduced. Base on this, a brand-new method of designing logic circuit from C ++ to Verilog was presented. This method starts from the system design ( virtual machine) and used C ++ to build the required system model. Then, the software design is accurately translated into a hardware level by Verilog and C ++ consistency. So the logical design upwards can undertake joint simulation by software and hardware, and downwards can realize physical level outspread. This method can effectively avoid logic inconsistency when the SOC design is translated from system design to physical design. Some contrastive analyses about the difference of two languages were given after some language characteristics of C ++ were formulated. Then translation way was given between C ++ and Verilog HDL. Besides, the example of DSP designing was provided which can perform application of this method directly. Finally,the system description was verified by comparing the simulation data of C ++ and Verilog.%通过介绍C++语言配合Verilog HDL来进行数字逻辑设计的模式,提出了一种由C++到Verilog来实现逻辑设计的崭新方法.此方法从系统设计(虚拟机)入手,用C++来搭建所需要的系统模型,再由Verilog与C++的一致性转化,将软件设计精确地转化到硬件级上,使得逻辑设计向上可进行软硬件的联合仿真,向下能够实现物理级延伸.通过该方法可有效地避免SOC设计中从系统到物理实现在转化过程中产生的逻辑不一致.在简叙C++的语言特性后,将Verilog与C++进行了对比分析,给出了两种语言之间进行转化设计的实现方式.结合数字信号处理器的设计,对此方法进行了设计应用,最终通过比对C++与Verilog两者的仿真数据文件,对两种层次系统描述进行了测试验证.
All-photonic multifunctional molecular logic device.
Andréasson, Joakim; Pischel, Uwe; Straight, Stephen D; Moore, Thomas A; Moore, Ana L; Gust, Devens
2011-08-03
Photochromes are photoswitchable, bistable chromophores which, like transistors, can implement binary logic operations. When several photochromes are combined in one molecule, interactions between them such as energy and electron transfer allow design of simple Boolean logic gates and more complex logic devices with all-photonic inputs and outputs. Selective isomerization of individual photochromes can be achieved using light of different wavelengths, and logic outputs can employ absorption and emission properties at different wavelengths, thus allowing a single molecular species to perform several different functions, even simultaneously. Here, we report a molecule consisting of three linked photochromes that can be configured as AND, XOR, INH, half-adder, half-subtractor, multiplexer, demultiplexer, encoder, decoder, keypad lock, and logically reversible transfer gate logic devices, all with a common initial state. The system demonstrates the advantages of light-responsive molecules as multifunctional, reconfigurable nanoscale logic devices that represent an approach to true molecular information processing units.
Optimization Approaches for Designing Quantum Reversible Arithmetic Logic Unit
Haghparast, Majid; Bolhassani, Ali
2016-03-01
Reversible logic is emerging as a promising alternative for applications in low-power design and quantum computation in recent years due to its ability to reduce power dissipation, which is an important research area in low power VLSI and ULSI designs. Many important contributions have been made in the literatures towards the reversible implementations of arithmetic and logical structures; however, there have not been many efforts directed towards efficient approaches for designing reversible Arithmetic Logic Unit (ALU). In this study, three efficient approaches are presented and their implementations in the design of reversible ALUs are demonstrated. Three new designs of reversible one-digit arithmetic logic unit for quantum arithmetic has been presented in this article. This paper provides explicit construction of reversible ALU effecting basic arithmetic operations with respect to the minimization of cost metrics. The architectures of the designs have been proposed in which each block is realized using elementary quantum logic gates. Then, reversible implementations of the proposed designs are analyzed and evaluated. The results demonstrate that the proposed designs are cost-effective compared with the existing counterparts. All the scales are in the NANO-metric area.
Bulsara, Adi R., E-mail: bulsara@spawar.navy.mil [SPAWAR Systems Center Pacific, San Diego, CA 92152-5001 (United States); Dari, Anna, E-mail: adari@asu.edu [Ira A. Fulton School of Engineering, Arizona State University, Tempe, AZ 85287-9309 (United States); Ditto, William L., E-mail: william.ditto@asu.edu [Ira A. Fulton School of Engineering, Arizona State University, Tempe, AZ 85287-9309 (United States); Murali, K., E-mail: kmurali@annauniv.edu [Department of Physics, Anna University, Chennai 600 025 (India); Sinha, Sudeshna, E-mail: sudeshna@imsc.res.in [Institute of Mathematical Sciences, Taramani, Chennai 600 113 (India); Indian Institute of Science Education and Research, Mohali, Transit Campus: MGSIPAP Complex, Sector 26 Chandigarh (India)
2010-10-05
In a recent publication it was shown that, when one drives a two-state system with two square waves as input, the response of the system mirrors a logical output (NOR/OR). The probability of obtaining the correct logic response is controlled by the interplay between the noise-floor and the nonlinearity. As one increases the noise intensity, the probability of the output reflecting a NOR/OR operation increases to unity and then decreases. Varying the nonlinearity (or the thresholds) of the system allows one to morph the output into another logic operation (NAND/AND) whose probability displays analogous behavior. Thus, the outcome of the interplay of nonlinearity and noise is a flexible logic gate with enhanced performance. Here we review this concept of 'Logical Stochastic Resonance' (LSR) and provide details of an electronic circuit system demonstrating LSR. Our proof-of-principle experiment involves a particularly simple realization of a two-state system realized by two adjustable thresholds. We also review CMOS implementations of a simple LSR circuit, and the concatenation of these LSR modules to emulate combinational logic, such as data flip-flop and full adder operations.
Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit
Rakshith Saligram1
2013-06-01
Full Text Available Reversible Logic is gaining significant consideration as the potential logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on physical entropy .Fault Tolerant reversible logic is one class of reversible logic that maintain the parity of the input and the outputs. Significant contributions have been made in the literature towards the design of fault tolerant reversible logic gate structures and arithmetic units, however, there are not many efforts directed towards the design of fault tolerant reversible ALUs. Arithmetic Logic Unit (ALU is the prime performing unit in any computing device and it has to be made fault tolerant. In this paper we aim to design one such fault tolerant reversible ALU that is constructed using parity preserving reversible logic gates. The designed ALU can generate up to seven Arithmetic operations and four logical operations
Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit
Rakshith Saligram
2013-07-01
Full Text Available Reversible Logic is gaining significant consideration as the potential logic design style for implementationin modern nanotechnology and quantum computing with minimal impact on physical entropy .FaultTolerant reversible logic is one class of reversible logic that maintain the parity of the input and theoutputs. Significant contributions have been made in the literature towards the design of fault tolerantreversible logic gate structures and arithmetic units, however, there are not many efforts directed towardsthe design of fault tolerant reversible ALUs. Arithmetic Logic Unit (ALU is the prime performing unit inany computing device and it has to be made fault tolerant. In this paper we aim to design one such faulttolerant reversible ALU that is constructed using parity preserving reversible logic gates. The designedALU can generate up to seven Arithmetic operations and four logical operations.
Smullyan, Raymond
2008-01-01
This book features a unique approach to the teaching of mathematical logic by putting it in the context of the puzzles and paradoxes of common language and rational thought. It serves as a bridge from the author's puzzle books to his technical writing in the fascinating field of mathematical logic. Using the logic of lying and truth-telling, the author introduces the readers to informal reasoning preparing them for the formal study of symbolic logic, from propositional logic to first-order logic, a subject that has many important applications to philosophy, mathematics, and computer science. T
Fault tolerant reversible logic synthesis: Carry look-ahead and carry-skip adders
Islam, Md Saiful; Begum, Zerina; Hafiz, Mohd Zulfiquar; 10.1109/ACTEA.2009.5227871
2010-01-01
Irreversible logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its corresponding output vector. Reversible logic circuit naturally takes care of heating because it implements only the functions that have one-to-one mapping between its input and output vectors. Therefore reversible logic design becomes one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient approaches for designing reversible fast adders that implement carry look-ahead and carry-skip logic. The proposed 16-bit high speed reversible adder will include IG gates for the realization of its basic building block. The IG gate is universal in the sense that it can be used to synthesize any arbitrary Boolean-functions. The IG gate is parity preserving, that is, the parity of the input...
Boolean gates on actin filaments
Siccardi, Stefano; Tuszynski, Jack A.; Adamatzky, Andrew
2016-01-01
Actin is a globular protein which forms long polar filaments in the eukaryotic cytoskeleton. Actin networks play a key role in cell mechanics and cell motility. They have also been implicated in information transmission and processing, memory and learning in neuronal cells. The actin filaments have been shown to support propagation of voltage pulses. Here we apply a coupled nonlinear transmission line model of actin filaments to study interactions between voltage pulses. To represent digital information we assign a logical TRUTH value to the presence of a voltage pulse in a given location of the actin filament, and FALSE to the pulse's absence, so that information flows along the filament with pulse transmission. When two pulses, representing Boolean values of input variables, interact, then they can facilitate or inhibit further propagation of each other. We explore this phenomenon to construct Boolean logical gates and a one-bit half-adder with interacting voltage pulses. We discuss implications of these findings on cellular process and technological applications.
Zhi, Lihua; Wang, Zhiyi; Liu, Jian; Liu, Weisheng; Zhang, Haoli; Chen, Fengjuan; Wang, Baodui
2015-07-01
Fluorescent chemosensors for detecting single anions have been largely synthesized. However, the simultaneous detection and degradation of multiple anions remain a major challenge. Herein we report the synthesis of a white emission nanoprobe on the basis of a Coumarin-Rhodamine CR1-Eu complex coordinated to dipicolinic acid (dpa)-PEG-Fe3O4 nanoparticles for the selective detection of ClO- and SCN- ions on controlling by a logic gate. The obtained nanoprobe exhibits three individual primary colors (blue, green, and red) as well as white emission at different excitation energies. Interestingly, this nanoprobe shows a marked rose red to violet emission color change in response to ClO-, a reversible violet to rose red emission color change in response to SCN-, and high ClO- and SCN- selectivity and sensitivity with a detection limit of 0.037 and 0.250 nM, respectively. Furthermore, the SCN- and ClO- can degrade simultaneously through the redox reaction between ClO- and SCN-.Fluorescent chemosensors for detecting single anions have been largely synthesized. However, the simultaneous detection and degradation of multiple anions remain a major challenge. Herein we report the synthesis of a white emission nanoprobe on the basis of a Coumarin-Rhodamine CR1-Eu complex coordinated to dipicolinic acid (dpa)-PEG-Fe3O4 nanoparticles for the selective detection of ClO- and SCN- ions on controlling by a logic gate. The obtained nanoprobe exhibits three individual primary colors (blue, green, and red) as well as white emission at different excitation energies. Interestingly, this nanoprobe shows a marked rose red to violet emission color change in response to ClO-, a reversible violet to rose red emission color change in response to SCN-, and high ClO- and SCN- selectivity and sensitivity with a detection limit of 0.037 and 0.250 nM, respectively. Furthermore, the SCN- and ClO- can degrade simultaneously through the redox reaction between ClO- and SCN-. Electronic supplementary
Prakash, Manu; Gershenfeld, Neil
2007-02-09
We demonstrate universal computation in an all-fluidic two-phase microfluidic system. Nonlinearity is introduced into an otherwise linear, reversible, low-Reynolds number flow via bubble-to-bubble hydrodynamic interactions. A bubble traveling in a channel represents a bit, providing us with the capability to simultaneously transport materials and perform logical control operations. We demonstrate bubble logic AND/OR/NOT gates, a toggle flip-flop, a ripple counter, timing restoration, a ring oscillator, and an electro-bubble modulator. These show the nonlinearity, gain, bistability, synchronization, cascadability, feedback, and programmability required for scalable universal computation. With increasing complexity in large-scale microfluidic processors, bubble logic provides an on-chip process control mechanism integrating chemistry and computation.
Energy-Efficient Wide Datapath Integer Arithmetic Logic Units Using Superconductor Logic
Ayala, Christopher Lawrence
Complementary Metal-Oxide-Semiconductor (CMOS) technology is currently the most widely used integrated circuit technology today. As CMOS approaches the physical limitations of scaling, it is unclear whether or not it can provide long-term support for niche areas such as high-performance computing and telecommunication infrastructure, particularly with the emergence of cloud computing. Alternatively, superconductor technologies based on Josephson junction (JJ) switching elements such as Rapid Single Flux Quantum (RSFQ) logic and especially its new variant, Energy-Efficient Rapid Single Flux Quantum (ERSFQ) logic have the capability to provide an ultra-high-speed, low power platform for digital systems. The objective of this research is to design and evaluate energy-efficient, high-speed 32-bit integer Arithmetic Logic Units (ALUs) implemented using RSFQ and ERSFQ logic as the first steps towards achieving practical Very-Large-Scale-Integration (VLSI) complexity in digital superconductor electronics. First, a tunable VHDL superconductor cell library is created to provide a mechanism to conduct design exploration and evaluation of superconductor digital circuits from the perspectives of functionality, complexity, performance, and energy-efficiency. Second, hybrid wave-pipelining techniques developed earlier for wide datapath RSFQ designs have been used for efficient arithmetic and logic circuit implementations. To develop the core foundation of the ALU, the ripple-carry adder and the Kogge-Stone parallel prefix carry look-ahead adder are studied as representative candidates on opposite ends of the design spectrum. By combining the high-performance features of the Kogge-Stone structure and the low complexity of the ripple-carry adder, a 32-bit asynchronous wave-pipelined hybrid sparse-tree ALU has been designed and evaluated using the VHDL cell library tuned to HYPRES' gate-level characteristics. The designs and techniques from this research have been implemented using
Carrillo-Delgado, C.; García-Gil, C. I.; Trejo-Valdez, M.; Torres-Torres, C.; García-Merino, J. A.; Martínez-Gutiérrez, H.; Khomenko, A. V.; Torres-Martínez, R.
2016-01-01
Measurements of the third-order nonlinear optical properties exhibited by a ZnO thin solid film deposited on a SnO2 substrate are presented. The samples were prepared by a spray pyrolysis processing route. Scanning electron microscopy analysis and UV-Vis spectroscopy studies were carried out. The picosecond response at 1064 nm was explored by the z-scan technique. A large optical Kerr effect with two-photon absorption was obtained. The inhibition of the nonlinear optical absorption together with a noticeable enhancement in the optical Kerr effect in the sample was achieved by the incorporation of Au nanoparticles into the ZnO film. Additionally, a two-wave mixing configuration at 532 nm was performed and an optical Kerr effect was identified as the main cause of the nanosecond third-order optical nonlinearity. The relaxation time of the photothermal response of the sample was estimated to be about 1 s when the sample was excited by nanosecond single-shots. The rotation of the sample during the nanosecond two-wave mixing experiments was analyzed. It was stated that a non-monotonic relation between rotating frequency and pulse repetition rate governs the thermal contribution to the nonlinear refractive index exhibited by a rotating film. Potential applications for switching photothermal interactions in rotating samples can be contemplated. A rotary logic system dependent on Kerr transmittance in a two-wave mixing experiment was proposed.
Kleene, Stephen Cole
2002-01-01
Undergraduate students with no prior instruction in mathematical logic will benefit from this multi-part text. Part I offers an elementary but thorough overview of mathematical logic of 1st order. Part II introduces some of the newer ideas and the more profound results of logical research in the 20th century. 1967 edition.
Parthiban, C.; Elango, Kuppanagounder P.
2017-03-01
An amino-naphthoquione receptor (R1) has been rationally designed, synthesized and characterized using 1H and 13C NMR, LCMS and single crystal X-ray diffraction studies. The receptor exhibits an instantaneous colour change from yellow to blue selectively with Cu(II) ions in water-DMF (98:2% v/v) medium. The results of UV-Vis and fluorescence spectral studies indicates that the mechanism of sensing involves formation of a 1:1 complex between R1 and Cu(II) ion. The proposed mechanism has been confirmed through product analysis using FT-IR, UV-Vis, EPR and HRMS studies in addition to magnetic moment and elemental analysis measurements. The formed [Cu(R1)Cl2] possess a square planar geometry. The binding constant for the interaction of Cu(II) ion with the present unsubstituted quinone is found to be relatively higher than that with quinones containing electron withdrawing chlorine atom and electron releasing methyl group reported in literature. The detection limit of Cu(II) ion in aqueous solution by R1 is observed to be 8.7 nM. The detection of Cu(II) ion by R1 in aqueous solution produces remarkable changes in the electronic and fluorescence spectra, which is applied to construct logic gate at molecular level.
A Type of Low Power Adiabatic Logic Circuit with Cross-coupled Transmission Gate%一种交叉耦合低功耗传输门绝热逻辑电路
胡建平; 汪鹏君; 夏银水
2003-01-01
提出了一种新的能量恢复型电路--Transmission Gate Adiabatic Logic(TGAL).该电路由交叉耦合的CMOS传输门完成逻辑运算与能量恢复,对负载的驱动为全绝热过程.TGAL电路输出端始终处于箝位状态,在整个输出期不存在悬空现象并具有良好的信号传输效果.分析了TGAL反相器的能耗,并与静态CMOS电路及部分文献中绝热电路进行了比较.使用TGAL构成门电路与时序系统的实例被演示.应用MOSIS的0.25 μm CMOS工艺参数的模拟结果表明,与传统CMOS和2N-2N2P绝热电路相比,TGAL电路在100 MHz工作频率时分别节省80%与60%以上的功耗.
Singh, Gurjaspreet, E-mail: gjpsingh@pu.ac.in; Singh, Jandeep; Singh, Jasbhinder; Mangat, Satinderpal Singh
2015-09-15
This report describes an on–off module of a fluorescent probe for selectively sensing of Fe(II) and Fe(III) ions by a single chemosensor with unique output optical response and is being reported for the first time. The probe 8-methylquinolinyl-1,2,3-triazolyl silatrane (QTS) was efficiently developed using click silylation route, followed by transetherification of silane. Moreover, the color change in probe QTS by response of this colorimetric sensor can be visualized by naked eye. The anti-quenching response for quenched QTS–Fe{sup 3+} fluorescence spectra by addition of H{sub 2}PO{sub 4}{sup −} ions in the MeOH/H{sub 2}O solvent system results into reversion of fluorescence maximum. These fluctuations in spectral response, under electronic behavior, can be viewed to mimic as NOR and IMPLICATION logic gate. - Highlights: • The probe 8-methylquinolinyl-1,2,3-triazolyl silatrane (QTS) was efficiently developed by using click silylation route. • The fluorescence emission response of sensor QTS towards Fe{sup 3+} ions show 'turn-on' mode, with red shift of 79 nm. • UV–vis spectra illustrate increase in absorption maxima on sensing of both ionic species.
NAND GATE USING FINFET FOR NANOSCALE TECHNOLOGY
Nirmal,
2010-05-01
Full Text Available In this paper we propose Double gate transistors (FinFETs are the substitutes for bulk CMOS evolving from a single gate devices into three dimensional devices with multiple gates (double gate, triple gate or quadruple-gate devices. The main drawback of using CMOS transistors are high power consumption and high leakage current. Enormous progress has been made to scale transistors to even smaller dimensions to obtain fast switching transistors, as well as to reduce the power consumption. Even though the device characteristics are improved, high active leakage remain a problem. Leakage is found to contribute more amount of total power consumption in power-optimized FinFET logic circuits. This paper mainly deals with the various logic design styles to obtain the Leakage power savings through the judicious use of FinFET logic styles.
Digital electronic bone growth stimulator
Kronberg, James W. (Aiken, SC)
1995-01-01
A device for stimulating bone tissue by applying a low level alternating current signal directly to the patient's skin. A crystal oscillator, a binary divider chain and digital logic gates are used to generate the desired waveforms that reproduce the natural electrical characteristics found in bone tissue needed for stimulating bone growth and treating osteoporosis. The device, powered by a battery, contains a switch allowing selection of the correct waveform for bone growth stimulation or osteoporosis treatment so that, when attached to the skin of the patient using standard skin contact electrodes, the correct signal is communicated to the underlying bone structures.
Digital electronic bone growth stimulator
Kronberg, J.W.
1995-05-09
A device is described for stimulating bone tissue by applying a low level alternating current signal directly to the patient`s skin. A crystal oscillator, a binary divider chain and digital logic gates are used to generate the desired waveforms that reproduce the natural electrical characteristics found in bone tissue needed for stimulating bone growth and treating osteoporosis. The device, powered by a battery, contains a switch allowing selection of the correct waveform for bone growth stimulation or osteoporosis treatment so that, when attached to the skin of the patient using standard skin contact electrodes, the correct signal is communicated to the underlying bone structures. 5 figs.
Parallel optical logic operations on reversible networks
Shamir, Joseph
2013-03-01
A generic optical network architecture is proposed for the implementation of programmable logic operations. Based on reversible optical gate elements the processor is highly energy efficient and intrinsically fast. In this architecture the whole logic operation is executed by light propagating through the system with no energy dissipation. Energy must be spent only at the input interface and at discrete locations where the logic operation results are to be detected. As a consequence, the theoretical lower limit for energy dissipation in logic operations must be reconsidered. The strength of this approach is demonstrated by examples showing the implementation of various lossless logic operations, including Half Adder and Full Adder.
Fazal NOORBASHA
2012-08-01
Full Text Available In this present study includes the Very Large Scale Integration (VLSI system implementation of 200MHz, 8-bit, 90nm Complementary Metal Oxide Semiconductor (CMOS Arithmetic and Logic Unit (ALU processor control with logic gate design style and 0.12µm six metal 90nm CMOS fabrication technology. The system blocks and the behaviour are defined and the logical design is implemented in gate level in the design phase. Then, the logic circuits are simulated and the subunits are converted in to 90nm CMOS layout. Finally, in order to construct the VLSI system these units are placed in the floor plan and simulated with analog and digital, logic and switch level simulators. The results of the simulations indicates that the VLSI system can control different instructions which can divided into sub groups: transfer instructions, arithmetic and logic instructions, rotate and shift instructions, branch instructions, input/output instructions, control instructions. The data bus of the system is 16-bit. It runs at 200MHz, and operating power is 1.2V. In this paper, the parametric analysis of the system, the design steps and obtained results are explained.
Sorting Network for Reversible Logic Synthesis
Islam, Md Saiful; Mahmud, Abdullah Al; karim, Muhammad Rezaul
2010-01-01
In this paper, we have introduced an algorithm to implement a sorting network for reversible logic synthesis based on swapping bit strings. The algorithm first constructs a network in terms of n*n Toffoli gates read from left to right. The number of gates in the circuit produced by our algorithm is then reduced by template matching and removing useless gates from the network. We have also compared the efficiency of the proposed method with the existing ones.
Sensor activity and logic behaviour of PET based dihydroimidazonaphthalimide diester
Georgiev, Nikolai I.; Lyulev, Mihail P.; Bojinov, Vladimir B.
2012-11-01
An ester terminated dihydroimidazonaphthalimide as multi-functional logic device is presented. Due to the optical changes as a function of pH this simple molecule is able to act as a molecular pH metre, a digital comparator and a half-adder. It was demonstrated that the dihydroimidazonaphthalimide comparator could be used as a fundamental element of an optical device for control of pH windows. Also, the ability of the device to detect metal ions in DMF and in water/DMF (3:1, v/v) at different pHs has been evaluated by monitoring the changes of its fluorescence intensity. Among the tested metal ions (Cd2+, Co2+, Cu2+, Fe3+, Ni2+, Pb2+, Zn2+, Bi3+, Hg2+ and Ag+) only Fe3+ and Bi3+ were efficiently detected. In water/DMF (3:1, v/v) XOR and XNOR logic gates are presented using pH and Fe3+ as chemical inputs based on encoding binary digits of logical conventions.
Gibson, J
2013-01-01
Most branches of organizing utilize digital electronic systems. This book introduces the design of such systems using basic logic elements as the components. The material is presented in a straightforward manner suitable for students of electronic engineering and computer science. The book is also of use to engineers in related disciplines who require a clear introduction to logic circuits. This third edition has been revised to encompass the most recent advances in technology as well as the latest trends in components and notation. It includes a wide coverage of application specific integrate
Design of RSFQ wave pipelined Kogge-Stone Adder and developing custom compound gates
Ozer, M.; Eren Çelik, M.; Tukel, Y.; Bozbey, A.
2014-09-01
Since the invention of computers, the calculation of arithmetic and logic operations using digital circuits has been one of the leading problems in processor designs. The challenge has been to compute more operations with less clock cycles by using additional specific logic circuits. One of the most fundamental processes is addition; in which the carry bit should be transferred from the least significant bit to the most significant one. A wide range of digital circuit designs have been sustained for specialized faster addition operation. One of these adder algorithms is Kogge Stone Adder which does faster calculation with fewer levels and minimum fan-out compared to today’s adders despite the only disadvantage of having an excessive amount of wiring. In this study, a custom Rapid Single Flux Quantum (RSFQ) based, wave pipelined, Kogge Stone Adder is proposed to be used later in an Arithmetic Logic Unit (ALU). Two different design methodologies have been considered. In the first approach, we used standard logic gates for the whole adder design. In the second approach, utilization to compound gate design with adjustments over component parameters is done by using Particle Swarm Optimization and Statistical Timing Analysis Tools, to increase both efficiency and bias margin.
Gilliland, M. G.; Rougelot, R. S.; Schumaker, R. A.
1966-01-01
Video signal processor uses special-purpose integrated circuits with nonsaturating current mode switching to accept texture and color information from a digital computer in a visual spaceflight simulator and to combine these, for display on color CRT with analog information concerning fading.
Adiabatic quantum gates and Boolean functions
Andrecut, M; Ali, M K [Department of Physics, University of Lethbridge, Lethbridge, AB, T1K 3M4 (Canada)
2004-06-25
We discuss the logical implementation of quantum gates and Boolean functions in the framework of quantum adiabatic method, which uses the language of ground states, spectral gaps and Hamiltonians instead of the standard unitary transformation language. (letter to the editor)
Kasai, S.; Yumoto, M; Sato, T.; Hasegawa, H.
2004-01-01
This paper discusses feasibility of design and future implementation of ultrasmall-size and ultra-low-power digital logic systems by a hexagonal BDD (binary-decision diagram) quantum circuit approach. The discussion is based on various circuits formed on GaAs-based hexagonal nanowire networks controlled by nanometer scale Schottky wrap gates (WPGs). Starting from basic node devices and elementary logic function blocks, fabrication technology of hexagonal BDD quantum circuits up to 8-bit adder...
Whitfield, J D; Biamonte, J D
2012-01-01
Designing and optimizing cost functions and energy landscapes is a problem encountered in many fields of science and engineering. These landscapes and cost functions can be embedded and annealed in experimentally controllable spin Hamiltonians. Using an approach based on group theory and symmetries, we examine the embedding of Boolean logic gates into the ground state subspace of such spin systems. We describe parameterized families of diagonal Hamiltonians and symmetry operations which preserve the ground state subspace encoding the truth tables of Boolean formulas. The ground state embeddings of adder circuits are used to illustrate how gates are combined and simplified using symmetry. Our work is relevant for experimental demonstrations of ground state embeddings found in both classical optimization as well as adiabatic quantum optimization.
Tugué, Tosiyuki; Slaman, Theodore
1989-01-01
These proceedings include the papers presented at the logic meeting held at the Research Institute for Mathematical Sciences, Kyoto University, in the summer of 1987. The meeting mainly covered the current research in various areas of mathematical logic and its applications in Japan. Several lectures were also presented by logicians from other countries, who visited Japan in the summer of 1987.
Instantaneous, non-squeezed, noise-based logic
Peper, Ferdinand
2010-01-01
Noise-based logic, by utilizing its multidimensional logic hyperspace, has significant potential for low-power parallel operations in beyond-Moore-chips. However universal gates for Boolean logic thus far had to rely on either time averaging to distinguish signals from each other or, alternatively, on squeezed logic signals, where the logic-high was represented by a random process and the logic-low was a zero signal. A major setback is that squeezed logic variables are unable to work in the hyperspace, because the logic-low zero value sets the hyperspace product vector to zero. This paper proposes Boolean universal logic gates that alleviate such shortcomings. They are able to work with non-squeezed logic values where both the high and low values are encoded into nonzero, bipolar, independent random telegraph waves. Non-squeezed universal Boolean logic gates for spike-based brain logic are also shown. The advantages vs. disadvantages of the two logic types are compared.
Finnemann, Niels Ole
2014-01-01
Processes of digitization have for years represented a major trend in the developments of modern society but have only recently been related to processes of mediatization. The purpose of this article is to look into the relation between the concepts of mediatization and digitization and to clarify...... what a concept of digital media might add to the understanding of processes of mediatization and what the concept of mediatization might add to the understanding of digital media. It is argued that digital media open an array of new trajectories in human communication, trajectories which were...... not anticipated in previous conceptualizations of media and mediatization. If digital media are to be included, the concept of mediatization has to be revised and new parameters are to be built into the concept of media. At the same time it is argued that the concept of mediatization still provides a variety...
2014-10-03
that must be woven into proofs of security statements. 03-10-2014 Memorandum Report Logic System-on-a-Chip Distributed systems 9888 ASDR&EAssistant...can be removed without damaging the logic. For all propositional letters p, E1. p ⊃ [r] p From now on, a distributed logic contains at least the...a ∈ x iff 〈h〉 ∈ x. These same definitions work for the canonical relation R for r : h y k where now a ∈ MA(k), [r] a, 〈r〉 a ∈ MA(h), x ∈ CF(h), and
Respiratory gated irradiation system for heavy-ion radiotherapy.
Minohara, S; Kanai, T; Endo, M; Noda, K; Kanazawa, M
2000-07-01
In order to reduce the treatment margin of the moving target due to breathing, we developed a gated irradiation system for heavy-ion radiotherapy. The motion of a patient due to respiration is detected by the motion of the body surface around the chest wall. A respiratory sensor was developed using an infrared light spot and a position-sensitive detector. A timing signal to request a beam is generated in response to the respiration waveform, and a carbon beam is extracted from the synchrotron using a RF-knockout method. CT images for treatment planning are taken in synchronization with the respiratory motion. For patient positioning, digitized fluoroscopic images superimposed with the respiration waveform were used. The relation between the respiratory sensor signal and the organ motion was examined using digitized video images from fluoroscopy. The performance of our gated system was demonstrated by using the moving phantom, and dose profiles were measured in the direction of phantom motion. The timing of gate-on is set at the end of the expiratory phase, because the motion of the diaphragm is slower and more reproducible than during the inspiratory phase. The signal of the respiratory sensor shows a phase difference of 120 milliseconds between lower and upper locations on the chest wall. The motion of diaphragm is delayed by 200 milliseconds from the respiration waveform at the lower location. The beam extraction system worked according to the beam on/off logic for gating, and the gated CT scanner performed well. The lateral penumbra size of the dose profile along the moving axis was distinguishably decreased by the gated irradiation. The ratio of the nongated to gated lateral fall-off was 4.3, 3.5, and 2. 0 under the stroke of 40.0, 29.0, and 13.0 mm respectively. We developed a total treatment system of gated irradiation for heavy-ion radiotherapy. We found that with this system the target margin along the body axis could be decreased to 5-10 mm although the
Quasi-classical modeling of molecular quantum-dot cellular automata multidriver gates
Rahimi, Ehsan; Nejad, Shahram Mohammad
2012-05-01
Molecular quantum-dot cellular automata (mQCA) has received considerable attention in nanoscience. Unlike the current-based molecular switches, where the digital data is represented by the on/off states of the switches, in mQCA devices, binary information is encoded in charge configuration within molecular redox centers. The mQCA paradigm allows high device density and ultra-low power consumption. Digital mQCA gates are the building blocks of circuits in this paradigm. Design and analysis of these gates require quantum chemical calculations, which are demanding in computer time and memory. Therefore, developing simple models to probe mQCA gates is of paramount importance. We derive a semi-classical model to study the steady-state output polarization of mQCA multidriver gates, directly from the two-state approximation in electron transfer theory. The accuracy and validity of this model are analyzed using full quantum chemistry calculations. A complete set of logic gates, including inverters and minority voters, are implemented to provide an appropriate test bench in the two-dot mQCA regime. We also briefly discuss how the QCADesigner tool could find its application in simulation of mQCA devices.
Magnetic tunnel junction based spintronic logic devices
Lyle, Andrew Paul
The International Technology Roadmap for Semiconductors (ITRS) predicts that complimentary metal oxide semiconductor (CMOS) based technologies will hit their last generation on or near the 16 nm node, which we expect to reach by the year 2025. Thus future advances in computational power will not be realized from ever-shrinking device sizes, but rather by 'outside the box' designs and new physics, including molecular or DNA based computation, organics, magnonics, or spintronic. This dissertation investigates magnetic logic devices for post-CMOS computation. Three different architectures were studied, each relying on a different magnetic mechanism to compute logic functions. Each design has it benefits and challenges that must be overcome. This dissertation focuses on pushing each design from the drawing board to a realistic logic technology. The first logic architecture is based on electrically connected magnetic tunnel junctions (MTJs) that allow direct communication between elements without intermediate sensing amplifiers. Two and three input logic gates, which consist of two and three MTJs connected in parallel, respectively were fabricated and are compared. The direct communication is realized by electrically connecting the output in series with the input and applying voltage across the series connections. The logic gates rely on the fact that a change in resistance at the input modulates the voltage that is needed to supply the critical current for spin transfer torque switching the output. The change in resistance at the input resulted in a voltage margin of 50--200 mV and 250--300 mV for the closest input states for the three and two input designs, respectively. The two input logic gate realizes the AND, NAND, NOR, and OR logic functions. The three input logic function realizes the Majority, AND, NAND, NOR, and OR logic operations. The second logic architecture utilizes magnetostatically coupled nanomagnets to compute logic functions, which is the basis of
Nucleic acid based logical systems.
Han, Da; Kang, Huaizhi; Zhang, Tao; Wu, Cuichen; Zhou, Cuisong; You, Mingxu; Chen, Zhuo; Zhang, Xiaobing; Tan, Weihong
2014-05-12
Researchers increasingly visualize a significant role for artificial biochemical logical systems in biological engineering, much like digital logic circuits in electrical engineering. Those logical systems could be utilized as a type of servomechanism to control nanodevices in vitro, monitor chemical reactions in situ, or regulate gene expression in vivo. Nucleic acids (NA), as carriers of genetic information with well-regulated and predictable structures, are promising materials for the design and engineering of biochemical circuits. A number of logical devices based on nucleic acids (NA) have been designed to handle various processes for technological or biotechnological purposes. This article focuses on the most recent and important developments in NA-based logical devices and their evolution from in vitro, through cellular, even towards in vivo biological applications.
High Speed Boosted Cmos Differential Logic for Ripple Carry Adders
Meenu Roy,
2014-01-01
Full Text Available This paper describes a high speed boosted CMOS differential logic which is applicable in Ripple Carry Adders. The proposed logic operating with supply voltage approaching the MOS threshold voltage. The logic style improves switching speed by boosting the gate-source voltage of transistors along timing critical signal path. It allows a single boosting circuit to be shared by complementary outputs as a result the area overhead also minimizes. As compared to the conventional logic gates the EDP (energy delay product is improved. The test sets of logic gates and adders where designed in tsmc0.18μm of Mentor Graphics EDA tool. The experimental result for Ripple Carry Adders using the proposed logic style revealed that the addition time is reduced as compared with the conventional CMOS circuits.
Motion Control with Fuzzy Logic in an High Speed PLC System
Ovidiu Neamtu
2008-05-01
Full Text Available The paper presents a new strategy of makingsoftware modules with fuzzy control. It is the best solutionfor implementing complex applications. Dynamic controltoday takes place in discrete time and discrete values.Concurrently, it is desirable that the discrete values are asclose as possible to the continuous values. This needs A/Dand D/A converters with high resolutions (up to 16-bitand support of floating point operations in controllers.This approach forced slow migration from MCU(Microcontroller unit, to DSP (Digital Signal Processor,to CPLD (Complex Programmable Logic Device andFPGA (Field Programmable Gate Array.
Experimental Demonstration of a Quantum Circuit using Linear Optics Gates
Pittman, T B; Franson, J D
2004-01-01
Probabilistic quantum logic gates can be constructed using linear optical elements, ancilla photons, and post-selection based on the results of measurements. Here we describe an experimental demonstration of a simple quantum circuit that combines two exclusive-OR (XOR) logic gates of that kind. Although circuits using XOR gates are not reversible, they may still be useful in a variety of applications such as generating non-classical states of light.
Lengyel, Florian
2012-01-01
We define Denial Logic DL, a system of justification logic that models an agent whose justified beliefs are false, who cannot avow his own propositional attitudes and who can believe contradictions but not tautologies of classical propositional logic. Using Artemov's natural semantics for justification logic JL, in which justifications are interpreted as sets of formulas, we provide an inductive construction of models of DL, and prove soundness and completeness results for DL. Some logical notions developed for JL, such as constant specifications and the internalization property, are inconsistent with DL. This leads us to define negative constant specifications for DL, which can be used to model agents with justified false beliefs. Denial logic can therefore be relevant to philosophical skepticism. We use DL with what we call coherent negative constant specifications to model a Putnamian brain in a vat with the justified false belief that it is not a brain in a vat, and derive a model of JL in which "I am a b...
LOGIC DEVICES, *OPTICAL CIRCUITS, *OPTICAL SWITCHING, HETEROJUNCTIONS, PHOTOTRANSISTORS, ELECTROOPTICS, LASER CAVITIES, OPTICAL PROCESSING, PARALLEL PROCESSING, BISTABLE DEVICES, GATES(CIRCUITS), VOLTAGE, BINARY ARITHMETIC .
KM3NeT Digital Optical Module electronics
Real, Diego
2016-04-01
The KM3NeT collaboration is currently building of a neutrino telescope with a volume of several cubic kilometres at the bottom of the Mediterranean Sea. The telescope consists of a matrix of Digital Optical Modules that will detect the Cherenkov light originated by the interaction of the neutrinos in the proximity of the detector. This contribution describes the main components of the read-out electronics of the Digital Optical Module: the Power Board, which delivers all the power supply required by the Digital Optical Molule electronics; the Central Logic Board, the main core of the read-out system, hosting 31 Time to Digital Converters with 1 ns resolution and the White Rabbit protocol embedded in the Central Logic Board Field Programmable Gate Array; the Octopus boards, that transfer the Low Voltage Digital Signals from the PMT bases to the Central Logic Board and finally the PMT bases, in charge of converting the analogue signal produced in the 31 3" PMTs into a Low Voltage Digital Signal.
KM3NeT Digital Optical Module electronics
Real Diego
2016-01-01
Full Text Available The KM3NeT collaboration is currently building of a neutrino telescope with a volume of several cubic kilometres at the bottom of the Mediterranean Sea. The telescope consists of a matrix of Digital Optical Modules that will detect the Cherenkov light originated by the interaction of the neutrinos in the proximity of the detector. This contribution describes the main components of the read-out electronics of the Digital Optical Module: the Power Board, which delivers all the power supply required by the Digital Optical Molule electronics; the Central Logic Board, the main core of the read-out system, hosting 31 Time to Digital Converters with 1 ns resolution and the White Rabbit protocol embedded in the Central Logic Board Field Programmable Gate Array; the Octopus boards, that transfer the Low Voltage Digital Signals from the PMT bases to the Central Logic Board and finally the PMT bases, in charge of converting the analogue signal produced in the 31 3” PMTs into a Low Voltage Digital Signal.
Realization of Two-Qutrit Quantum Gates with Control Pulses
ZHANG Jie; DI Yao-Min; WEI Hai-Rui
2009-01-01
We investigate the realization of 2-qutrit logic gate in a bipartite 3-level system with qusi-Ising interaction. On the basis of Caftan decomposition of matrices, the unitary matrices of 2-qutrit are factorized into products of a series of realizable matrices. It is equivalent to exerting a certain control field on the system, and the control goal is usually gained by a sequence of control pulses. The general discussion on the realization of 2-qutrit logic gate is made first, and then the realization of the ternary SWAP gate and the ternary gate are discussed specifically, and the sequences of control pulses and drift processes implementing these gates are given.
BSSSN: Bit String Swapping Sorting Network for Reversible Logic Synthesis
Islam, Md Saiful
2010-01-01
In this paper, we have introduced the notion of UselessGate and ReverseOperation. We have also given an algorithm to implement a sorting network for reversible logic synthesis based on swapping bit strings. The network is constructed in terms of n*n Toffoli Gates read from left to right and it has shown that there will be no more gates than the number of swappings the algorithm requires. The gate complexity of the network is O(n2). The number of gates in the network can be further reduced by template reduction technique and removing UselessGate from the network.
Logical design for computers and control
Dodd, Kenneth N
1972-01-01
Logical Design for Computers and Control Logical Design for Computers and Control gives an introduction to the concepts and principles, applications, and advancements in the field of control logic. The text covers topics such as logic elements; high and low logic; kinds of flip-flops; binary counting and arithmetic; and Boolean algebra, Boolean laws, and De Morgan's theorem. Also covered are topics such as electrostatics and atomic theory; the integrated circuit and simple control systems; the conversion of analog to digital systems; and computer applications and control. The book is recommend
Braüner, Torben
2011-01-01
Intuitionistic hybrid logic is hybrid modal logic over an intuitionistic logic basis instead of a classical logical basis. In this short paper we introduce intuitionistic hybrid logic and we give a survey of work in the area.......Intuitionistic hybrid logic is hybrid modal logic over an intuitionistic logic basis instead of a classical logical basis. In this short paper we introduce intuitionistic hybrid logic and we give a survey of work in the area....
Hongsheng QI; Daizhan CHENG
2008-01-01
This paper gives a matrix expression of logic. Under the matrix expression, a general description of the logical operators is proposed. Using the semi-tensor product of matrices, the proofs of logical equivalences, implications, etc., can be simplified a lot. Certain general properties are revealed. Then, based on matrix expression, the logical operators are extended to multi-valued logic, which provides a foundation for fuzzy logical inference. Finally, we propose a new type of logic, called mix-valued logic, and a new design technique, called logic-based fuzzy control. They provide a numerically computable framework for the application of fuzzy logic for the control of fuzzy systems.
Logic circuits from zero forcing
Burgarth, Daniel; Hogben, Leslie; Severini, Simone; Young, Michael
2011-01-01
We design logical circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity.
Dynamic partial reconfiguration of logic controllers implemented in FPGAs
Bazydło, Grzegorz; Wiśniewski, Remigiusz
2016-09-01
Technological progress in recent years benefits in digital circuits containing millions of logic gates with the capability for reprogramming and reconfiguring. On the one hand it provides the unprecedented computational power, but on the other hand the modelled systems are becoming increasingly complex, hierarchical and concurrent. Therefore, abstract modelling supported by the Computer Aided Design tools becomes a very important task. Even the higher consumption of the basic electronic components seems to be acceptable because chip manufacturing costs tend to fall over the time. The paper presents a modelling approach for logic controllers with the use of Unified Modelling Language (UML). Thanks to the Model Driven Development approach, starting with a UML state machine model, through the construction of an intermediate Hierarchical Concurrent Finite State Machine model, a collection of Verilog files is created. The system description generated in hardware description language can be synthesized and implemented in reconfigurable devices, such as FPGAs. Modular specification of the prototyped controller permits for further dynamic partial reconfiguration of the prototyped system. The idea bases on the exchanging of the functionality of the already implemented controller without stopping of the FPGA device. It means, that a part (for example a single module) of the logic controller is replaced by other version (called context), while the rest of the system is still running. The method is illustrated by a practical example by an exemplary Home Area Network system.
Characterization of the faulted behavior of digital computers and fault tolerant systems
Bavuso, Salvatore J.; Miner, Paul S.
1989-01-01
A development status evaluation is presented for efforts conducted at NASA-Langley since 1977, toward the characterization of the latent fault in digital fault-tolerant systems. Attention is given to the practical, high speed, generalized gate-level logic system simulator developed, as well as to the validation methodology used for the simulator, on the basis of faultable software and hardware simulations employing a prototype MIL-STD-1750A processor. After validation, latency tests will be performed.
Patel, Raj B; Ho, Joseph; Ferreyrol, Franck; Ralph, Timothy C; Pryde, Geoff J
2016-03-01
Minimizing the resources required to build logic gates into useful processing circuits is key to realizing quantum computers. Although the salient features of a quantum computer have been shown in proof-of-principle experiments, difficulties in scaling quantum systems have made more complex operations intractable. This is exemplified in the classical Fredkin (controlled-SWAP) gate for which, despite theoretical proposals, no quantum analog has been realized. By adding control to the SWAP unitary, we use photonic qubit logic to demonstrate the first quantum Fredkin gate, which promises many applications in quantum information and measurement. We implement example algorithms and generate the highest-fidelity three-photon Greenberger-Horne-Zeilinger states to date. The technique we use allows one to add a control operation to a black-box unitary, something that is impossible in the standard circuit model. Our experiment represents the first use of this technique to control a two-qubit operation and paves the way for larger controlled circuits to be realized efficiently.
Ultralow-Power Digital Correlator for Microwave Polarimetry
Piepmeier, Jeffrey R.; Hass, K. Joseph
2004-01-01
A recently developed high-speed digital correlator is especially well suited for processing readings of a passive microwave polarimeter. This circuit computes the autocorrelations of, and the cross-correlations among, data in four digital input streams representing samples of in-phase (I) and quadrature (Q) components of two intermediate-frequency (IF) signals, denoted A and B, that are generated in heterodyne reception of two microwave signals. The IF signals arriving at the correlator input terminals have been digitized to three levels (-1,0,1) at a sampling rate up to 500 MHz. Two bits (representing sign and magnitude) are needed to represent the instantaneous datum in each input channel; hence, eight bits are needed to represent the four input signals during any given cycle of the sampling clock. The accumulation (integration) time for the correlation is programmable in increments of 2(exp 8) cycles of the sampling clock, up to a maximum of 2(exp 24) cycles. The basic functionality of the correlator is embodied in 16 correlation slices, each of which contains identical logic circuits and counters (see figure). The first stage of each correlation slice is a logic gate that computes one of the desired correlations (for example, the autocorrelation of the I component of A or the negative of the cross-correlation of the I component of A and the Q component of B). The sampling of the output of the logic gate output is controlled by the sampling-clock signal, and an 8-bit counter increments in every clock cycle when the logic gate generates output. The most significant bit of the 8-bit counter is sampled by a 16-bit counter with a clock signal at 2(exp 8) the frequency of the sampling clock. The 16-bit counter is incremented every time the 8-bit counter rolls over.
Fuzzy logic type 1 and type 2 based on LabVIEW FPGA
Ponce-Cruz, Pedro; MacCleery, Brian
2016-01-01
This book is a comprehensive introduction to LabVIEW FPGA™, a package allowing the programming of intelligent digital controllers in field programmable gate arrays (FPGAs) using graphical code. It shows how both potential difficulties with understanding and programming in VHDL and the consequent difficulty and slowness of implementation can be sidestepped. The text includes a clear theoretical explanation of fuzzy logic (type 1 and type 2) with case studies that implement the theory and systematically demonstrate the implementation process. It goes on to describe basic and advanced levels of programming LabVIEW FPGA and show how implementation of fuzzy-logic control in FPGAs improves system responses. A complete toolkit for implementing fuzzy controllers in LabVIEW FPGA has been developed with the book so that readers can generate new fuzzy controllers and deploy them immediately. Problems and their solutions allow readers to practice the techniques and to absorb the theoretical ideas as they arise. Fuzzy L...
Zadeh, Lofti A.
1988-01-01
The author presents a condensed exposition of some basic ideas underlying fuzzy logic and describes some representative applications. The discussion covers basic principles; meaning representation and inference; basic rules of inference; and the linguistic variable and its application to fuzzy control.
All-optical integrated logic operations based on chemical communication between molecular switches.
Silvi, Serena; Constable, Edwin C; Housecroft, Catherine E; Beves, Jonathon E; Dunphy, Emma L; Tomasulo, Massimiliano; Raymo, Françisco M; Credi, Alberto
2009-01-01
Molecular logic gates process physical or chemical "inputs" to generate "outputs" based on a set of logical operators. We report the design and operation of a chemical ensemble in solution that behaves as integrated AND, OR, and XNOR gates with optical input and output signals. The ensemble is composed of a reversible merocyanine-type photoacid and a ruthenium polypyridine complex that functions as a pH-controlled three-state luminescent switch. The light-triggered release of protons from the photoacid is used to control the state of the transition-metal complex. Therefore, the two molecular switching devices communicate with one another through the exchange of ionic signals. By means of such a double (optical-chemical-optical) signal-transduction mechanism, inputs of violet light modulate a luminescence output in the red/far-red region of the visible spectrum. Nondestructive reading is guaranteed because the green light used for excitation in the photoluminescence experiments does not affect the state of the gate. The reset is thermally driven and, thus, does not involve the addition of chemicals and accumulation of byproducts. Owing to its reversibility and stability, this molecular device can afford many cycles of digital operation.
Classical Logic and Quantum Logic with Multiple and Common Lattice Models
Mladen Pavičić
2016-01-01
Full Text Available We consider a proper propositional quantum logic and show that it has multiple disjoint lattice models, only one of which is an orthomodular lattice (algebra underlying Hilbert (quantum space. We give an equivalent proof for the classical logic which turns out to have disjoint distributive and nondistributive ortholattices. In particular, we prove that both classical logic and quantum logic are sound and complete with respect to each of these lattices. We also show that there is one common nonorthomodular lattice that is a model of both quantum and classical logic. In technical terms, that enables us to run the same classical logic on both a digital (standard, two-subset, 0-1-bit computer and a nondigital (say, a six-subset computer (with appropriate chips and circuits. With quantum logic, the same six-element common lattice can serve us as a benchmark for an efficient evaluation of equations of bigger lattice models or theorems of the logic.
Evaluating logic functionality of cascaded fracturable LUTs
GUO Zhenhong; LIN Yu; LI Tianyi; JIA Rui; GAO Tongqiang; YANG Haigang
2016-01-01
Look Up Tables(LUTs) are the key components of Field-Programmable Gate Arrays(FPGAs). Many LUT architectures have been studied; nevertheless, it is difficult to quantificationally evaluate an LUT based architecture. Traditionally, dedicated efforts on specific modifications to the technology mapping tools are required for LUT architecture evaluation. A more feasible evaluation method for logic functionality is strongly required for the design of LUT architecture. In this paper, a mathematical method for logic functionality calculation is proposed and conventional and fracturable LUT architectures are analyzed. Furthermore, a cascaded fracturable LUT architecture is presented, which achieves twice logic functionality compared with the conventional LUTs and fracturable LUTs.
Application of fast-moving magnetic-flux-quanta in constructing an AND gate and an OR gate
Jung, K. R. [Korea Photonics Technology Institute, Gwangju (Korea, Republic of); Kang, J. H. [University of Incheon, Incheon (Korea, Republic of)
2004-08-15
In developing an arithmetic logic unit (ALU) with new electronic devices, constructing an OR gate and an AND gate is crucial. In this work, we have designed, fabricated, and tested an OR gate and an AND gate by using rapid single flux quantum (RSFQ) logic. We constructed an AND gate with two D flip-flops and an OR gate with the combination of a confluence buffer and a D flip-flop. The role of the D flip-flop in an OR gate is to output the data when clocked. DC/SFQ circuits were used to generate data and clock pulses in testing the gates. Outputs were read with RS flip-flop type readout circuits and displayed on an oscilloscope. Input frequencies of 10 kHz and 1 MHz were used in this work. We observed correct operations of the gates. The bandwidth of the oscilloscope limited the maximum frequency of our measurements. The logic gates themselves could operate at tens of GHz. We measured the bias margins of the D flip-flop and the confluence buffer of the OR gate, and their values were +-39% and +-23 %, respectively. We also measured the operation margin of the AND gate to be +-25 %. The circuit was measured at liquid-helium temperature.
CMAT non-volatile spintronic computing: complementary MTJ logic
Friedman, Joseph S.
2016-10-01
Magnetic tunnel junctions (MTJs) have thoroughly demonstrated their utility as a non-volatile memory storage element, inspiring their application to a memory-in-logic computer that would overcome the von Neumann bottleneck. However, MTJ logic gates must be able to cause other MTJs to switch, thus ensuring the cascading capability fundamental to efficient computing. Complementary MTJ logic (CMAT) provides a simple circuit structure through which MTJs can be cascaded directly to perform logic operations. In this novel logic family, charge pulses resulting from MTJ switching create magnetic fields that switch other MTJs, providing impetus for further development of MTJs for computing applications.
Tony T. Kim
2011-07-01
Full Text Available Recently, double-gate MOSFETs (DGMOSFETs have been shown to be more optimal for ultra-low power circuit design due to the improved subthreshold slope and the reduced leakage current compared to bulk CMOS. However, DGMOSFETs for subthreshold circuit design have not been much explored in comparison to those for strong inversion-based design. In this paper, various configurations of DGMOSFETs, such as tied/independent gates and symmetric/asymmetric gate oxide thickness are explored for ultra-low power and high efficient radio frequency identification (RFID design. Comparison of bulk CMOS with DGMOSFETs has been conducted in ultra-low power subthreshold digital logic design and rectifier design, emphasizing the scope of the nano-scale DGMOSFET technology for future ultra-low power systems. The DGMOSFET-based subthreshold logic improves energy efficiency by more than 40% compared to the bulk CMOS-based logic at 32 nm. Among the various DGMOSFET configurations for RFID rectifiers, symmetric tied-gate DGMOSFET has the best power conversion efficiency and the lowest power consumption.
林作铨; 李未
1995-01-01
Parametric logic is introduced. The language, semantics and axiom system of parametric logic are defined. Completeness theorem of parametric logic is provided. Parametric logic has formal ability powerful enough to capture a wide class of logic as its special cases, and therefore can be viewed as a uniform basis for modern logics.
Buried injector logic, a vertical IIL using deep ion implantation
Mouthaan, A.J.
1987-01-01
A vertically integrated alternative for integrated injection logic has been realized, named buried injector logic (BIL). 1 MeV ion implantations are used to create buried layers. The vertical pnp and npn transistors have thin base regions and exhibit a limited charge accumulation if a gate is satura
Integrated circuits in digital electronics (2nd revised and enlarged edition)
Barna, Arpad; Porat, Dan I.
This book provides a link between elementary logic design theory and its practical applications. New information on Schottky TTL, ECL, and CMOS is given, along with a study of number systems and a detailed description of the design of sequential logic with emphasis on counters and shift registers and a discussion of arithmetic circuits. A chapter on latches and flip-flops emphasizes the differences between these two storage elements. A summary of coding, code conversion, and error detection and correction is given along with descriptions of digital-to-analog and analog-to-digital converters. Up-to-date treatment of LSI and VLSI circuits is given, including static and dynamic circuits, RASMs, ROMs, PLSAs, associative memories, and gate arrays. There is also a unified presentation of practical considerations in digital equipment design.
Zhang, Jingfu; Laflamme, Raymond; Suter, Dieter
2012-09-07
Large-scale universal quantum computing requires the implementation of quantum error correction (QEC). While the implementation of QEC has already been demonstrated for quantum memories, reliable quantum computing requires also the application of nontrivial logical gate operations to the encoded qubits. Here, we present examples of such operations by implementing, in addition to the identity operation, the NOT and the Hadamard gate to a logical qubit encoded in a five qubit system that allows correction of arbitrary single-qubit errors. We perform quantum process tomography of the encoded gate operations, demonstrate the successful correction of all possible single-qubit errors, and measure the fidelity of the encoded logical gate operations.
Reprogammable universal logic device based on mems technology
Hafiz, Md Adbdullah Al
2017-06-15
Various examples of reprogrammable universal logic devices are provided. In one example, the device can include a tunable AC input (206) to an oscillator/resonator; a first logic input and a second logic input to the oscillator/resonator, the first and second logic inputs provided by separate DC voltage sources (VA, VB), each of the first and second logic inputs including an on/off switch (A, B); and the oscillator/resonator including an output terminal (215). The tunable oscillator/resonator can be a MEMS/NEMS resonator. Switching of one or both of the first or second logic inputs on or off in association with the tuning of the AC input (206) can provide logic gate operation. The device can easily be extended to a 3-bit or n-bit device by providing additional logic inputs. Binary comparators and encoders can be implemented using a plurality of oscillators/resonators.
An Area Efficient and High Speed Reversible Multiplier Using NS Gate
Venkateswarlu
2017-01-01
Full Text Available In digital computer system a major problem has been found that the Power dissipation which leads to bring some research on the methods to decrease this Area efficient, high speed. This is the main cause to give birth to reversible computing systems for digital computers and designs. Reversible computing is the path to future computing technologies, which all happen to use reversible logic. In addition, reversible computing will become mandatory because of the necessity to decrease power consumption. Reversible logic circuits have the same number of inputs and outputs, and have one-to-one mapping between vectors of inputs and outputs; thus the vector of input states can be always reconstructed from the vector of output states. Consequently, a computation is reversible, if it is always possible to uniquely recover the input, given the output. Each gate can be made reversible by adding some additional input and output wires if necessary. The main aim of this reversible computing is to lower the power dissipation, area efficient and high speed and some other advantages like security of data and prevention of errors etc... Reversible logic has so many applications low power CMOS, nanotechnology, DNA computing and quantum computing. There are two primary design implementations in this study which are the major spotlights. The first one is reversible design gate and the second one is multiplier design using reversible gates. In this manuscript we have implemented a 8 * 8 reversible design called “NSG(Non linear Sign Flip”. The total project is implemented in Xilinx 14.7 ISE with Spartan 3E family
Experimental demonstration of an all-optical fiber-based Fredkin gate.
Kostinski, Natalie; Fok, Mable P; Prucnal, Paul R
2009-09-15
We propose and report on what we believe to be the first experimental demonstration of an all-optical fiber-based Fredkin gate for reversible digital logic. The simple 3-input/3-output fiber-based nonlinear optical loop mirror architecture requires only minor alignment for full operation. A short nonlinear element, heavily doped GeO(2) fiber (HDF), allows for a more compact design than typical nonlinear fiber gates. The HDF is ideal for studying reversibility, functioning as a noise-limited medium, as compared to the semiconductor optical amplifier, while allowing for cross-phase modulation, a nondissipative optical interaction. We suggest applications for secure communications, based on "cool" computing.
Malcolm, Norman; Altuner, Ilyas
2015-01-01
The paper deals exclusively with the doctrine called ‘Logical Behaviorism’. Although this position does not vogue it enjoyed in the 1930s and 1940s, it will always possess a compelling attraction for anyone who is perplexed by the psychological concepts, who has become aware of worthlessness of an appeal to introspection as an account of how we learn those concepts, and he has no inclination to identify mind with brain. There, of course, are other forms of behaviorism, and of reductionism, wh...
ENERGY EFFICIENT FLOW AND LEVEL CONTROL IN A HYDRO POWER PLANT USING FUZZY LOGIC
A. Selwin Mich Priyadharson
2014-01-01
Full Text Available The main objective and an innovative design of this work is to improve the energy efficiency by controlling the variables flow and level in a hydroelectric power plant using Programmable Logic Control (PLC-Human Machine Interface (HMI and fuzzy logic approach. This project will focus on design and development of flow and level controller for small scale hydro generating units by implementing gate control based on PLC-HMI and Fuzzy Logic Control (FLC. So far there is no other better performing control scheme, with uncomplicated approach, in order to match and satisfy the dynamic changes in load demand. In this project, FLC will be applied to flow and level control for small scale hydro generating units is proposed. A lab scale experimental setup is made-up as prototype model for flow and level control and simulation outputs were achieved, using PLC-HMI based fuzzy controller scheme. The hardware set up is designed with 5 stages in the tank 1 and 2 stages in the tank 2. Based on the outputs of the level sensors from tanks 1 and 2, the ladder logic will perform. B&R Industrial Automation PLC inbuilt with 24 digital inputs and provides 16 potential free outputs is used to perform control action. Finally, the performance of the proposed scheme is evaluated by simulation results by comparing with conventional controllers output using the data collected from the hydroelectric power plant. The merits of the proposed Fuzzy scheme over the conventional method are spotlighted.
Low Power, Reduced Dynamic Voltage Swing Domino Logic Circuits
Salendra.Govindarajulu; Dr.T.Jayachandra Prasad; Rangappa, P
2010-01-01
Dynamic domino logic circuits are widely used in modern digital VLSI circuits. These dynamic circuits are often favoured in high performance designs because of the speed advantage offered over static CMOS logic circuits. The main drawbacks of dynamic logic are a lack of design automation, a decreased tolerance to noise and increased power dissipation. In this work, new reduced – swing domino logic techniques which provide significant low power dissipation as compared to traditional domino cir...
Access control, security, and trust a logical approach
Chin, Shiu-Kai
2010-01-01
Access Control, Security, Trust, and Logic Deconstructing Access Control Decisions A Logical Approach to Access Control PRELIMINARIES A Language for Access ControlSets and Relations Syntax SemanticsReasoning about Access Control Logical RulesFormal Proofs and Theorems Soundness of Logical RulesBasic Concepts Reference Monitors Access Control Mechanisms: Tickets and Lists Authentication Security PoliciesConfidentiality, Integrity, and Availability Discretionary Security Policies Mandatory Security Policies Military Security Policies Commercial PoliciesDISTRIBUTED ACCESS CONTROL Digital Authenti
Coherent spaces, Boolean rings and quantum gates
Vourdas, A.
2016-10-01
Coherent spaces spanned by a finite number of coherent states, are introduced. Their coherence properties are studied, using the Dirac contour representation. It is shown that the corresponding projectors resolve the identity, and that they transform into projectors of the same type, under displacement transformations, and also under time evolution. The set of these spaces, with the logical OR and AND operations is a distributive lattice, and with the logical XOR and AND operations is a Boolean ring (Stone's formalism). Applications of this Boolean ring into classical CNOT gates with n-ary variables, and also quantum CNOT gates with coherent states, are discussed.
Subnanowatt carbon nanotube complementary logic enabled by threshold voltage control.
Geier, Michael L; Prabhumirashi, Pradyumna L; McMorrow, Julian J; Xu, Weichao; Seo, Jung-Woo T; Everaerts, Ken; Kim, Chris H; Marks, Tobin J; Hersam, Mark C
2013-10-09
In this Letter, we demonstrate thin-film single-walled carbon nanotube (SWCNT) complementary metal-oxide-semiconductor (CMOS) logic devices with subnanowatt static power consumption and full rail-to-rail voltage transfer characteristics as is required for logic gate cascading. These results are enabled by a local metal gate structure that achieves enhancement-mode p-type and n-type SWCNT thin-film transistors (TFTs) with widely separated and symmetric threshold voltages. These complementary SWCNT TFTs are integrated to demonstrate CMOS inverter, NAND, and NOR logic gates at supply voltages as low as 0.8 V with ideal rail-to-rail operation, subnanowatt static power consumption, high gain, and excellent noise immunity. This work provides a direct pathway for solution processable, large area, power efficient SWCNT advanced logic circuits and systems.