CMOS based capacitance to digital converter circuit for MEMS sensor

Science.gov (United States)

Rotake, D. R.; Darji, A. D.

2018-02-01

Most of the MEMS cantilever based system required costly instruments for characterization, processing and also has large experimental setups which led to non-portable device. So there is a need of low cost, highly sensitive, high speed and portable digital system. The proposed Capacitance to Digital Converter (CDC) interfacing circuit converts capacitance to digital domain which can be easily processed. Recent demand microcantilever deflection is part per trillion ranges which change the capacitance in 1-10 femto farad (fF) range. The entire CDC circuit is designed using CMOS 250nm technology. Design of CDC circuit consists of a D-latch and two oscillators, namely Sensor controlled oscillator (SCO) and digitally controlled oscillator (DCO). The D-latch is designed using transmission gate based MUX for power optimization. A CDC design of 7-stage, 9-stage and 11-stage tested for 1-18 fF and simulated using mentor graphics Eldo tool with parasitic. Since the proposed design does not use resistance component, the total power dissipation is reduced to 2.3621 mW for CDC designed using 9-stage SCO and DCO.

A high speed, wide dynamic range digitizer circuit for photomultiplier tubes

Energy Technology Data Exchange (ETDEWEB)

Yarema, R.J.; Foster, G.W.; Knickerbocker, K.; Sarraj, M.; Tschirhart, R.; Whitmore, J.; Zimmerman, T. [Fermi National Accelerator Lab., Batavia, IL (United States); Lindgren, M. [Univ. of California, Los Angeles, CA (United States). Physics Dept.

1994-06-01

High energy physics experiments running at high interaction rates frequently require long record lengths for determining a level 1 trigger. The easiest way to provide a long event record is by digital means. In applications requiring wide dynamic range, however, digitization of an analog signal to obtain the digital record has been impossible due to lack of high speed, wide range FADCs. One such application is the readout of thousands of photomultiplier tubes in fixed target and colliding beam experiment calorimeters. A circuit has been designed for digitizing PMT signals over a wide dynamic range (17--18 bits) with 8 bits of resolution at rates up to 53 MHz. Output from the circuit is in a floating point format with a 4 bit exponent and an 8 bit mantissa. The heart of the circuit is a full custom integrated circuit called the QIE (Charge Integrator and Encoder). The design of the QIE and associated circuitry reported here permits operation over a 17 bit dynamic range. Tests of the circuit with a PMT input and a pulsed laser have provided respectable results with little off line correction. Performance of the circuit for demanding applications can be significantly enhanced with additional off line correction. Circuit design, packaging issues, and test results of a multirange device are presented for the first time.

A high speed, wide dynamic range digitizer circuit for photomultiplier tubes

International Nuclear Information System (INIS)

Yarema, R.J.; Foster, G.W.; Knickerbocker, K.; Sarraj, M.; Tschirhart, R.; Whitmore, J.; Zimmerman, T.; Lindgren, M.

1994-06-01

High energy physics experiments running at high interaction rates frequently require long record lengths for determining a level 1 trigger. The easiest way to provide a long event record is by digital means. In applications requiring wide dynamic range, however, digitization of an analog signal to obtain the digital record has been impossible due to lack of high speed, wide range FADCs. One such application is the readout of thousands of photomultiplier tubes in fixed target and colliding beam experiment calorimeters. A circuit has been designed for digitizing PMT signals over a wide dynamic range (17--18 bits) with 8 bits of resolution at rates up to 53 MHz. Output from the circuit is in a floating point format with a 4 bit exponent and an 8 bit mantissa. The heart of the circuit is a full custom integrated circuit called the QIE (Charge Integrator and Encoder). The design of the QIE and associated circuitry reported here permits operation over a 17 bit dynamic range. Tests of the circuit with a PMT input and a pulsed laser have provided respectable results with little off line correction. Performance of the circuit for demanding applications can be significantly enhanced with additional off line correction. Circuit design, packaging issues, and test results of a multirange device are presented for the first time

23rd workshop on Advances in Analog Circuit Design

CERN Document Server

Baschirotto, Andrea; Makinwa, Kofi

2015-01-01

This book is based on the 18 tutorials presented during the 23rd workshop on Advances in Analog Circuit Design.  Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, serving as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.    • Includes coverage of high-performance analog-to-digital and digital to analog converters, integrated circuit design in scaled technologies, and time-domain signal processing; • Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; • Presents material in a tutorial-based format.

Optimal design of RTCs in digital circuit fault self-repair based on global signal optimization

Institute of Scientific and Technical Information of China (English)

Zhang Junbin; Cai Jinyan; Meng Yafeng

2016-01-01

Since digital circuits have been widely and thoroughly applied in various fields, electronic systems are increasingly more complicated and require greater reliability. Faults may occur in elec-tronic systems in complicated environments. If immediate field repairs are not made on the faults, elec-tronic systems will not run normally, and this will lead to serious losses. The traditional method for improving system reliability based on redundant fault-tolerant technique has been unable to meet the requirements. Therefore, on the basis of (evolvable hardware)-based and (reparation balance technology)-based electronic circuit fault self-repair strategy proposed in our preliminary work, the optimal design of rectification circuits (RTCs) in electronic circuit fault self-repair based on global sig-nal optimization is deeply researched in this paper. First of all, the basic theory of RTC optimal design based on global signal optimization is proposed. Secondly, relevant considerations and suitable ranges are analyzed. Then, the basic flow of RTC optimal design is researched. Eventually, a typical circuit is selected for simulation verification, and detailed simulated analysis is made on five circumstances that occur during RTC evolution. The simulation results prove that compared with the conventional design method based RTC, the global signal optimization design method based RTC is lower in hardware cost, faster in circuit evolution, higher in convergent precision, and higher in circuit evolution success rate. Therefore, the global signal optimization based RTC optimal design method applied in the elec-tronic circuit fault self-repair technology is proven to be feasible, effective, and advantageous.

Design of two digital radiation tolerant integrated circuits for high energy physics experiments data readout

CERN Document Server

Bonacini, Sandro

2003-01-01

High Energy Physics research (HEP) involves the design of readout electron- ics for its experiments, which generate a high radiation ¯eld in the detectors. The several integrated circuits placed in the future Large Hadron Collider (LHC) experiments' environment have to resist the radiation and carry out their normal operation. In this thesis I will describe in detail what, during my 10-months partic- ipation in the digital section of the Microelectronics group at CERN, I had the possibility to work on: - The design of a radiation-tolerant data readout digital integrated cir- cuit in a 0.25 ¹m CMOS technology, called \\the Kchip", for the CMS preshower front-end system. This will be described in Chapter 3. - The design of a radiation-tolerant SRAM integrated circuit in a 0.13 ¹m CMOS technology, for technology radiation testing purposes and fu- ture applications in the HEP ¯eld. The SRAM will be described in Chapter 4. All the work has carried out under the supervision and with the help of Dr. Kostas Klouki...

Digital system design with VHDL

International Nuclear Information System (INIS)

Kang, Jin Gu; Lee, Da Young; Song, Je Chel

2000-09-01

This book is comprised of eleven chapters, which are review of basic logic design including combinational logic circuit, KARNAUGH MAPS, Hazard of combinational circuit, Melay order circuit design and synchronous design, introduction of VHDL like VHDL module of Multiplexer and VHDL Function, design with PLD for program, circuit design for arithmetical operation, digital design using SM chart, PGA and CPLD design, Floating-point calculation, extra issues on VHDL, VHDL module for memory and bus,design for hardware test and a testing and examples for design such as UART design and M68HC05 micro controller.

A logic circuit for solving linear function by digital method

International Nuclear Information System (INIS)

Ma Yonghe

1986-01-01

A mathematical method for determining the linear relation of physical quantity with rediation intensity is described. A logic circuit has been designed for solving linear function by digital method. Some applications and the circuit function are discussed

Digital logic circuit design with ALTERA Quartus II

International Nuclear Information System (INIS)

Lee, Seung Ho

2009-09-01

This book consists 31 chapters about digital logic circuit with ALTERA Quartus II. It includes the introduction of ALTERA Quartus II, ALTERA Quartus II schematic editor, ALTERA Quartus II compiler, ALTERA Quartus II simulator, ALTERA Quartus II timing analyzer, how to use HBE-COMBO II training and HBE-COMBO II training kit with schematic editor, VHDL grammar and practice of ALTERA Quartus II and HBE-COMBO II training kit with VHDL.

A new paradigm in the design of energy-efficient digital circuits using laterally-actuated double-gate NEMS

KAUST Repository

Dadgour, Hamed F.

2010-01-01

Nano-Electro-Mechanical Switches (NEMS) offer the prospect of improved energy-efficiency in digital circuits due to their near-zero subthreshold leakage and extremely low subthreshold swing values. Among the different approaches of implementing NEMS, laterallyactuated double-gate NEMS devices have attracted much attention as they provide unique and exciting circuit design opportunities. For instance, this paper demonstrates that compact XOR/XNOR gates can be implemented using only two such NEMS transistors. While this in itself is a major improvement, its implications for minimizing Boolean functions using Karnaugh maps (K-maps) are even more significant. In the standard K-map technique, which is used in digital circuit design, adjacent "1s" (minterms) are grouped only in horizontal and/or vertical directions; the diagonal (or zig-zag) grouping of adjacent "1s" is not an option due to the absence of compact XOR/XNOR gates. However, this work demonstrates, for the first time ever, that in lateral double-gate NEMS-based circuits, grouping of minterms is possible in horizontal and vertical as well as diagonal fashions. This is because the diagonal groupings of minterms require XOR/XNOR operations, which are available in such NEMS-based circuits at minimal costs. This novel design paradigm facilitates more compact implementations of Boolean functions and thus, considerably improves their energy-efficiency. For example, a lateral NEMS-based full-adder is implemented using less than half the number of transistors, which is required by a CMOS-based full-adder. Furthermore, circuit simulations are performed to evaluate the energy-efficiencies of the NEMS-based 32-bit carry-save adders compared to their standard CMOS-based counterparts. Copyright 2010 ACM.

A new paradigm in the design of energy-efficient digital circuits using laterally-actuated double-gate NEMS

KAUST Repository

Dadgour, Hamed F.; Hussain, Muhammad Mustafa; Banerjee, Kaustav

2010-01-01

. While this in itself is a major improvement, its implications for minimizing Boolean functions using Karnaugh maps (K-maps) are even more significant. In the standard K-map technique, which is used in digital circuit design, adjacent "1s" (minterms

High accuracy digital aging monitor based on PLL-VCO circuit

International Nuclear Information System (INIS)

Zhang Yuejun; Jiang Zhidi; Wang Pengjun; Zhang Xuelong

2015-01-01

As the manufacturing process is scaled down to the nanoscale, the aging phenomenon significantly affects the reliability and lifetime of integrated circuits. Consequently, the precise measurement of digital CMOS aging is a key aspect of nanoscale aging tolerant circuit design. This paper proposes a high accuracy digital aging monitor using phase-locked loop and voltage-controlled oscillator (PLL-VCO) circuit. The proposed monitor eliminates the circuit self-aging effect for the characteristic of PLL, whose frequency has no relationship with circuit aging phenomenon. The PLL-VCO monitor is implemented in TSMC low power 65 nm CMOS technology, and its area occupies 303.28 × 298.94 μm 2 . After accelerating aging tests, the experimental results show that PLL-VCO monitor improves accuracy about high temperature by 2.4% and high voltage by 18.7%. (semiconductor integrated circuits)

The Art of Hardware Architecture Design Methods and Techniques for Digital Circuits

CERN Document Server

Arora, Mohit

2012-01-01

This book highlights the complex issues, tasks and skills that must be mastered by an IP designer, in order to design an optimized and robust digital circuit to solve a problem. The techniques and methodologies described can serve as a bridge between specifications that are known to the designer and RTL code that is final outcome, reducing significantly the time it takes to convert initial ideas and concepts into right-first-time silicon.� Coverage focuses on real problems rather than theoretical concepts, with an emphasis on design techniques across various aspects of chip-design.�� Describes techniques to help IP designers get it right the first time, creating designs optimized in terms of power, area and performance; Focuses on practical aspects of chip design and minimizes theory; Covers chip design in a consistent way, starting with basics and gradually developing advanced concepts, such as electromagnetic compatibility (EMC) design techniques and low-power design techniques such as dynamic voltage...

CMOS analog integrated circuits high-speed and power-efficient design

CERN Document Server

Ndjountche, Tertulien

2011-01-01

High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components. CMOS: Analog Integrated Circuits: High-Speed and Power-Efficient Design describes the important tren

Design and implementation of double oscillator time-to-digital converter using SFQ logic circuits

International Nuclear Information System (INIS)

Nishigai, T.; Ito, M.; Yoshikawa, N.; Fujimaki, A.; Terai, H.; Yorozu, S.

2005-01-01

We have designed, fabricated and tested a time-to-digital converter (TDC) using SFQ logic circuits. The proposed TDC consists of two sets of ring oscillators and binary counters, and a coincidence detector (CD), which detects the coincidence of the arrival of two SFQ pulses from two ring oscillators. The advantage of the proposed TDC is its simple circuit structure with wide measurement range. The time resolution of the proposed TDC is limited by the resolution of the CD, which is about 10 ps because it is made by an NDRO cell in this study. The circuits are implemented using NEC 2.5 kA/cm 2 Nb standard process and the CONNECT cell library. We have demonstrated the measurement of the propagation delay of a Josephson transmission line by the TDC with the time resolution of about 10 ps

Designing Asynchronous Circuits for Low Power: An IFIR Filter

DEFF Research Database (Denmark)

Nielsen, Lars Skovby; Sparsø, Jens

1999-01-01

This paper addresses the design of asynchronous circuits for low power through an example: a filter bank for a digital hearing aid. The asynchronous design re-implements an existing synchronous circuit which is used in a commercial product. For comparison, both designs have been fabricated...

Full Digital Short Circuit Protection for Advanced IGBTs

OpenAIRE

谷村, 拓哉; 湯浅, 一史; 大村, 一郎

2011-01-01

A full digital short circuit protection method for advanced IGBTs has been proposed and experimentally demonstrated for the first time. The method employs combination of digital circuit, the gate charge sense instead of the conventional sense IGBT and analog circuit configuration. Digital protection scheme has significant advantages in thevprotection speed and flexibility.

Servo Platform Circuit Design of Pendulous Gyroscope Based on DSP

Science.gov (United States)

Tan, Lilong; Wang, Pengcheng; Zhong, Qiyuan; Zhang, Cui; Liu, Yunfei

2018-03-01

In order to solve the problem when a certain type of pendulous gyroscope in the initial installation deviation more than 40 degrees, that the servo platform can not be up to the speed of the gyroscope in the rough north seeking phase. This paper takes the digital signal processor TMS320F28027 as the core, uses incremental digital PID algorithm, carries out the circuit design of the servo platform. Firstly, the hardware circuit is divided into three parts: DSP minimum system, motor driving circuit and signal processing circuit, then the mathematical model of incremental digital PID algorithm is established, based on the model, writes the PID control program in CCS3.3, finally, the servo motor tracking control experiment is carried out, it shows that the design can significantly improve the tracking ability of the servo platform, and the design has good engineering practice.

Automatic ranging circuit for a digital panel meter

International Nuclear Information System (INIS)

Mueller, T.R.; Ross, H.H.

1976-01-01

This invention relates to a range changing circuit that operates in conjunction with a digital panel meter of fixed sensitivity. The circuit decodes the output of the panel meter and uses that information to change the gain of an input amplifier to the panel meter in order to ensure that the maximum number of significant figures is always displayed in the meter. The circuit monitors five conditions in the meter and responds to any of four combinations of these conditions by means of logic elements to carry out the function of the circuit. The system was designed for readout of a fluorescence analyzer for uranium analysis

Test generation for digital circuits using parallel processing

Science.gov (United States)

Hartmann, Carlos R.; Ali, Akhtar-Uz-Zaman M.

1990-12-01

The problem of test generation for digital logic circuits is an NP-Hard problem. Recently, the availability of low cost, high performance parallel machines has spurred interest in developing fast parallel algorithms for computer-aided design and test. This report describes a method of applying a 15-valued logic system for digital logic circuit test vector generation in a parallel programming environment. A concept called fault site testing allows for test generation, in parallel, that targets more than one fault at a given location. The multi-valued logic system allows results obtained by distinct processors and/or processes to be merged by means of simple set intersections. A machine-independent description is given for the proposed algorithm.

Development of reconfigurable analog and digital circuits for plasma diagnostics measurement systems

International Nuclear Information System (INIS)

Srivastava, Amit Kumar; Sharma, Atish; Raval, Tushar

2009-01-01

In long pulse discharge tokamak, a large number of diagnostic channels are being used to understand the complex behavior of plasma. Different diagnostics demand different types of analog and digital processing for plasma parameters measurement. This leads to variable requirements of signal processing for diagnostic measurement. For such types of requirements, we have developed hardware with reconfigurable electronic devices, which provide flexible solution for rapid development of measurement system. Here the analog processing is achieved by Field Programmable Analog Array (FPAA) integrated circuit while reconfigurable digital devices (CPLD/FPGA) achieve digital processing. FPAA's provide an ideal integrated platform for implementing low to medium complexity analog signal processing. With dynamic reconfigurability, the functionality of the FPAA can be reconfigured in-system by the designer or on the fly by a microprocessor. This feature is quite useful to manipulate the tuning or the construction of any part of the analog circuit without interrupting operation of the FPAA, thus maintaining system integrity. The hardware operation control logic circuits are configured in the reconfigurable digital devices (CPLD/FPGA) to control proper hardware functioning. These reconfigurable devices provide the design flexibility and save the component space on the board. It also provides the flexibility for various setting through software. The circuit controlling commands are either issued by computer/processor or generated by circuit itself. (author)

Methodology for the digital calibration of analog circuits and systems with case studies

CERN Document Server

Pastre, Marc

2006-01-01

Methodology for the Digital Calibration of Analog Circuits and Systems shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. A complete methodology is proposed, and three applications are detailed. To start with, an in-depth analysis of existing compensation techniques for analog circuit imperfections is carried out. The M/2+M sub-binary digital-to-analog converter is thoroughly studied, and the use of this very low-area circuit in conjunction with a successive approximations algorithm for digital compensation is described. A complete methodology based on this compensation circuit and algorithm is then proposed. The detection and correction of analog circuit imperfections is studied, and a simulation tool allowing the transparent simulation of analog circuits with automatic compensation blocks is introduced. The first application shows how the sub-binary M/2+M structure can be employed as a conventional di...

A high speed, wide dynamic range digitizer circuit for photomultiplier tubes

International Nuclear Information System (INIS)

Yarema, R.J.; Foster, G.W.; Knickerbocker, K.; Sarraj, M.; Tschirhart, R.; Whitmore, J.; Zimmerman, T.; Lindgren, M.

1995-01-01

A circuit has been designed for digitizing PMT signals over a wide dynamic range (17-18 bits) with 8 bits of resolution at rates up to 53 MHz. Output from the circuit is in a floating point format with a 4 bit exponent and an 8 bit mantissa. The heart of the circuit is a full custom integrated circuit called the QIE (Charge Integrator and Encoder). The design of the QIE and associated circuitry reported here permits operation over a 17 bit dynamic range. Test results of a multirange device are presented for the first time. (orig.)

Integrated digital superconducting logic circuits for the quantum synthesizer. Report

International Nuclear Information System (INIS)

Buchholz, F.I.; Kohlmann, J.; Khabipov, M.; Brandt, C.M.; Hagedorn, D.; Balashov, D.; Maibaum, F.; Tolkacheva, E.; Niemeyer, J.

2006-11-01

This report presents the results, which were reached in the framework of the BMBF cooperative plan ''Quantum Synthesizer'' in the partial plan ''Integrated Digital Superconducting Logic Circuits''. As essential goal of the plan a novel instrument on the base of quantum-coherent superconducting circuits should be developed. which allows to generate praxis-relevant wave forms with quantum accuracy, the quantum synthesizer. The main topics of development of the reported partial plan lied at the one hand in the development of integrated, digital, superconducting circuit in rapid-single-flux (RSFQ) quantum logics for the pattern generator of the quantum synthesizer, at the other hand in the further development of the fabrication technology for the aiming of high circuit complexity. In order to fulfil these requirements at the PTB a new design system was implemented, based on the software of Cadence. Together with the required RSFQ extensions for the design of digital superconducting circuits was a platform generated, on which the reachable circuit complexity is exclusively limited by the technology parameters of the available fabrication technology: Physical simulations are with PSCAN up to a complexity of more than 1000 circuit elements possible; furthermore VHDL allows the verification of arbitrarily large circuit architectures. In accordance for this the production line at the PTB was brought to a level, which allows in Nb/Al-Al x O y /Nb SIS technology implementation the fabrication of highly integrable RSFQ circuit architectures. The developed and fabricated basic circuits of the pattern generator have proved correct functionality and reliability in the measuring operation. Thereby for the circular RSFQ shift registers a key role as local memories in the construction of the pattern generator is devolved upon. The registers were realized with the aimed bit lengths up to 128 bit and with reachable signal-processing speeds of above 10 GHz. At the interface RSFQ

Control circuits in power electronics practical issues in design and implementation

CERN Document Server

Castilla, Miguel

2016-01-01

Control circuits are a key element in the operation and performance of power electronics converters. This book describes practical issues related to the design and implementation of these control circuits, and is divided into three parts - analogue control circuits, digital control circuits, and new trends in control circuits.

Circuit, especially for digital nuclear gyroscope systems

International Nuclear Information System (INIS)

Lowdenslager, J.R.

1974-01-01

The circuit with at least one or two spin generator shows a digital phase synchronizing loop in solid-state construction without movable mechanical parts. It is stable, may be turned in one direction any number of times without saturation, and also remains phase-synchronized when input signals are turned off. For this purpose, crystal oscillators with certain resonance frequencies are used. The spin generators are coupled at the outled side with filtering, squaring, and differential connections generating control impulses synchronous to the spin generators. Step divider circuits are connected to the oscillators, which act upon flip-flop registers. This is controlled by the filtering, squaring, and differential connections. Furthermore, field proportional control circuits with registers, advancing and delay circuits are provided, the registers being connected at the outlet side with digital adders and subtractors. The digital adder serves inertial-related purposes. (DG) [de

Electronic circuit for rapid digital NMR signal imaging

International Nuclear Information System (INIS)

Jurak, P.; Krejci, I.; Belusa, J.

1992-01-01

The circuit is made up of two analog-to-digital converters whose outputs are connected to a process computer and the synchronization inputs to the clock terminal. The one analog-to-digital converter is connected, via the signal input, to the terminal of the nuclear magnetic resonance locking signal. The signal input of the other analog-to-digital converter is connected to the time base generator, which can be switched off, and to the magnetic field sweep circuit. The assets of this citcuit include easy computerized processing of the digitized information independently of the time base generation, and prevention of interfering signals from penetrating into the magnetic field sweep circuits. (Z.S.). 1 fig

Design and implementation of a hybrid circuit system for micro sensor signal processing

International Nuclear Information System (INIS)

Wang Zhuping; Chen Jing; Liu Ruqing

2011-01-01

This paper covers a micro sensor analog signal processing circuit system (MASPS) chip with low power and a digital signal processing circuit board implementation including hardware connection and software design. Attention has been paid to incorporate the MASPS chip into the digital circuit board. The ultimate aim is to form a hybrid circuit used for mixed-signal processing, which can be applied to a micro sensor flow monitoring system. (semiconductor integrated circuits)

CASTOR a VLSI CMOS mixed analog-digital circuit for low noise multichannel counting applications

International Nuclear Information System (INIS)

Comes, G.; Loddo, F.; Hu, Y.; Kaplon, J.; Ly, F.; Turchetta, R.; Bonvicini, V.; Vacchi, A.

1996-01-01

In this paper we present the design and first experimental results of a VLSI mixed analog-digital 1.2 microns CMOS circuit (CASTOR) for multichannel radiation detectors applications demanding low noise amplification and counting of radiation pulses. This circuit is meant to be connected to pixel-like detectors. Imaging can be obtained by counting the number of hits in each pixel during a user-controlled exposure time. Each channel of the circuit features an analog and a digital part. In the former one, a charge preamplifier is followed by a CR-RC shaper with an output buffer and a threshold discriminator. In the digital part, a 16-bit counter is present together with some control logic. The readout of the counters is done serially on a common tri-state output. Daisy-chaining is possible. A 4-channel prototype has been built. This prototype has been optimised for use in the digital radiography Syrmep experiment at the Elettra synchrotron machine in Trieste (Italy): its main design parameters are: shaping time of about 850 ns, gain of 190 mV/fC and ENC (e - rms)=60+17 C (pF). The counting rate per channel, limited by the analog part, can be as high as about 200 kHz. Characterisation of the circuit and first tests with silicon microstrip detectors are presented. They show the circuit works according to design specification and can be used for imaging applications. (orig.)

Design, Analysis and Test of Logic Circuits Under Uncertainty

CERN Document Server

Krishnaswamy, Smita; Hayes, John P

2013-01-01

Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits.  To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits.  The book describes techniques for:   • Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework;   • Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-l...

Modeling digital switching circuits with linear algebra

CERN Document Server

Thornton, Mitchell A

2014-01-01

Modeling Digital Switching Circuits with Linear Algebra describes an approach for modeling digital information and circuitry that is an alternative to Boolean algebra. While the Boolean algebraic model has been wildly successful and is responsible for many advances in modern information technology, the approach described in this book offers new insight and different ways of solving problems. Modeling the bit as a vector instead of a scalar value in the set {0, 1} allows digital circuits to be characterized with transfer functions in the form of a linear transformation matrix. The use of transf

An expert system in C for computer-aided digital circuit design

Science.gov (United States)

Santos, Jorge S.

1989-06-01

This thesis effort documents the design, development, implementation, and test of an expert system which decomposes digital circuits into subproblems in order to detect wiring errors, which consist of improperly connected gates, missing connections, and violation of fanout or race conditions. Information needed to connect chips together is viewed as knowledge base information for the expert system. Information such type as number of pins, value of each pin (input, output, power, ground, clock), fanout for a particular type of chip are retrieved from a central database where they are represented. Implementation was done in the C programming language, which although is not design specially for dealing with problems in the Artificial Intelligence (AI) field could be used with success. An integration with a graphics package and a central database was achieved. Tests conducted with the system running in a personal computer Zenith 248 and compatible microcomputers under the Disk Operational System (DOS) version 3.2 proved the portability and efficiency of the expert system. A user's manual is included for the operation of the InterConnect Expert System (ICE).

Proposal for a fast, zero suppressing circuit for the digitization of analog pulses over long memory times

International Nuclear Information System (INIS)

Bourgeois, F.

1984-01-01

This report describes the design principles of a fast (100 MHz) time and pulse height digitizer that can record up to 15 analog pulses over 10-80 μs memory times. Unlike other triggered circuits prepulse samples are recorded without the help of an analog delay line. The low power requirements of the circuit as well as its fast read-out characteristics make it very attractive for detectors with many digitizing channels. Conventional circuits are described as a reference for the evaluation of this new design. An ECL 10 K implementation of the circuit is presented in the third section. (orig.)

Digital logic circuit test

Energy Technology Data Exchange (ETDEWEB)

Yun, Gil Jung; Yang, Hong Young

2011-03-15

This book is about digital logic circuit test, which lists the digital basic theory, basic gate like and, or And Not gate, NAND/NOR gate such as NAND gate, NOR gate, AND and OR, logic function, EX-OR gate, adder and subtractor, decoder and encoder, multiplexer, demultiplexer, flip-flop, counter such as up/down counter modulus N counter and Reset type counter, shift register, D/A and A/D converter and two supplements list of using components and TTL manual and CMOS manual.

Analog circuit design designing dynamic circuit response

CERN Document Server

Feucht, Dennis

2010-01-01

This second volume, Designing Dynamic Circuit Response builds upon the first volume Designing Amplifier Circuits by extending coverage to include reactances and their time- and frequency-related behavioral consequences.

Digitally-assisted analog and RF CMOS circuit design for software-defined radio

CERN Document Server

Okada, Kenichi

2011-01-01

This book describes the state-of-the-art in RF, analog, and mixed-signal circuit design for Software Defined Radio (SDR). It synthesizes for analog/RF circuit designers the most important general design approaches to take advantage of the most recent CMOS technology, which can integrate millions of transistors, as well as several real examples from the most recent research results.

Design rules for superconducting analog-digital transducers

International Nuclear Information System (INIS)

Haddad, Taghrid

2015-01-01

This Thesis is a contribution for dimensioning aspects of circuits designs in superconductor electronics. Mainly superconductor comparators inclusive Josephson comparators as well as QOJS-Comparators are investigated. Both types were investigated in terms of speed and sensitivity. The influence of the thermal noise on the decision process of the comparators represent in so called gray zone, which is analysed in this thesis. Thereby, different relations between design parameters were derived. A circuit model of the Josephson comparator was verified by experiments. Concepts of superconductor analog-to-digital converters, which are based on above called comparators, were investigated in detail. From the comparator design rules, new rules for AD-converters were derived. Because of the reduced switching energy, the signal to noise ratio (SNR) of the circuits is affected and therefore the reliability of the decision-process is affected. For special applications with very demanding requirements in terms of the speed and accuracy superconductor analog-to-digital converters offer an excellent performance. This thesis provides relations between different design paramenters and shows resulting trade-offs, This method is transparent and easy to transfer to other circuit topologies. As a main result, a highly predictive tool for dimensioning of superconducting ADC's is proved.

Digi Island: A Serious Game for Teaching and Learning Digital Circuit Optimization

Science.gov (United States)

Harper, Michael; Miller, Joseph; Shen, Yuzhong

2011-01-01

Karnaugh maps, also known as K-maps, are a tool used to optimize or simplify digital logic circuits. A K-map is a graphical display of a logic circuit. K-map optimization is essentially the process of finding a minimum number of maximal aggregations of K-map cells. with values of 1 according to a set of rules. The Digi Island is a serious game designed for aiding students to learn K-map optimization. The game takes place on an exotic island (called Digi Island) in the Pacific Ocean . The player is an adventurer to the Digi Island and will transform it into a tourist attraction by developing real estates, such as amusement parks.and hotels. The Digi Island game elegantly converts boring 1s and Os in digital circuits into usable and unusable spaces on a beautiful island and transforms K-map optimization into real estate development, an activity with which many students are familiar and also interested in. This paper discusses the design, development, and some preliminary results of the Digi Island game.

On Using Current Steering Logic in Mixed Analogue-digital Circuits

DEFF Research Database (Denmark)

Lehmann, Torsten

1998-01-01

The authors investigate power supply noise in mixed analogue-digital circuits, arising from communication between the analogue and digital parts of the circuit. Current steering techniques and proper buffering are used to show which noise currents can be reduced and which cannot. In addition......, a high-swing current steering buffer for driving analogue switches or external digital signals is proposed....

Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

Science.gov (United States)

Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

2012-10-21

Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

Design rules for superconducting analog-digital transducers; Entwurfsregeln fuer Supraleitende Analog-Digital-Wandler

Energy Technology Data Exchange (ETDEWEB)

Haddad, Taghrid

2015-05-29

This Thesis is a contribution for dimensioning aspects of circuits designs in superconductor electronics. Mainly superconductor comparators inclusive Josephson comparators as well as QOJS-Comparators are investigated. Both types were investigated in terms of speed and sensitivity. The influence of the thermal noise on the decision process of the comparators represent in so called gray zone, which is analysed in this thesis. Thereby, different relations between design parameters were derived. A circuit model of the Josephson comparator was verified by experiments. Concepts of superconductor analog-to-digital converters, which are based on above called comparators, were investigated in detail. From the comparator design rules, new rules for AD-converters were derived. Because of the reduced switching energy, the signal to noise ratio (SNR) of the circuits is affected and therefore the reliability of the decision-process is affected. For special applications with very demanding requirements in terms of the speed and accuracy superconductor analog-to-digital converters offer an excellent performance. This thesis provides relations between different design paramenters and shows resulting trade-offs, This method is transparent and easy to transfer to other circuit topologies. As a main result, a highly predictive tool for dimensioning of superconducting ADC's is proved.

Principles of transistor circuits introduction to the design of amplifiers, receivers and digital circuits

CERN Document Server

Amos, S W

2013-01-01

For over thirty years, Stan Amos has provided students and practitioners with a text they could rely on to keep them at the forefront of transistor circuit design. This seminal work has now been presented in a clear new format and completely updated to include the latest equipment such as laser diodes, Trapatt diodes, optocouplers and GaAs transistors, and the most recent line output stages and switch-mode power supplies.Although integrated circuits have widespread application, the role of discrete transistors is undiminished, both as important building blocks which students must understand an

Trends in integrated circuit design for particle physics experiments

International Nuclear Information System (INIS)

Atkin, E V

2017-01-01

Integrated circuits are one of the key complex units available to designers of multichannel detector setups. A whole number of factors makes Application Specific Integrated Circuits (ASICs) valuable for Particle Physics and Astrophysics experiments. Among them the most important ones are: integration scale, low power dissipation, radiation tolerance. In order to make possible future experiments in the intensity, cosmic, and energy frontiers today ASICs should provide new level of functionality at a new set of constraints and trade-offs, like low-noise high-dynamic range amplification and pulse shaping, high-speed waveform sampling, low power digitization, fast digital data processing, serialization and data transmission. All integrated circuits, necessary for physical instrumentation, should be radiation tolerant at an earlier not reached level (hundreds of Mrad) of total ionizing dose and allow minute almost 3D assemblies. The paper is based on literary source analysis and presents an overview of the state of the art and trends in nowadays chip design, using partially own ASIC lab experience. That shows a next stage of ising micro- and nanoelectronics in physical instrumentation. (paper)

A new time-digital convert circuit based on digital delay line

International Nuclear Information System (INIS)

Liu Haifeng; Guo Ying; Zhang Zhi

2004-01-01

An introduction of a new method of time-digital convert circuit based on digital delay line is given. High precision and good reliability can be realized when it is combined with traditional counting convert method in the measurement of large scale pulse width and low frequency self-excitation oscillator. (authors)

Design in the digital textbook

DEFF Research Database (Denmark)

Ebbesen, Toke Riis

reorganization of the publishing company, web based user interfaces, and ultimately the branding, that market these new digital objects, are building powerful discourses around the product. Thus it is suggested that the design process of the iBog-case can be understood in a model of database-based publishing......Building on a preliminary case study of the Danish educational publisher, Systime A/S, and its flagship product, the web based ‘iBog’ {Systime 2014}, this paper explores how digital textbooks can be understood as design. The shaping of digital books is seen as intertwined in a wider circuit...... with multiple levels. In the final analysis, the iBog is much more than a product and a technology. It is a brand that goes beyond what can be studied by looking at the digital textbook as a singular artefact....

A kind of video image digitizing circuit based on computer parallel port

International Nuclear Information System (INIS)

Wang Yi; Tang Le; Cheng Jianping; Li Yuanjing; Zhang Binquan

2003-01-01

A kind of video images digitizing circuit based on parallel port was developed to digitize the flash x ray images in our Multi-Channel Digital Flash X ray Imaging System. The circuit can digitize the video images and store in static memory. The digital images can be transferred to computer through parallel port and can be displayed, processed and stored. (authors)

The research of digital circuit system for high accuracy CCD of portable Raman spectrometer

Science.gov (United States)

Yin, Yu; Cui, Yongsheng; Zhang, Xiuda; Yan, Huimin

2013-08-01

The Raman spectrum technology is widely used for it can identify various types of molecular structure and material. The portable Raman spectrometer has become a hot direction of the spectrometer development nowadays for its convenience in handheld operation and real-time detection which is superior to traditional Raman spectrometer with heavy weight and bulky size. But there is still a gap for its measurement sensitivity between portable and traditional devices. However, portable Raman Spectrometer with Shell-Isolated Nanoparticle-Enhanced Raman Spectroscopy (SHINERS) technology can enhance the Raman signal significantly by several orders of magnitude, giving consideration in both measurement sensitivity and mobility. This paper proposed a design and implementation of driver and digital circuit for high accuracy CCD sensor, which is core part of portable spectrometer. The main target of the whole design is to reduce the dark current generation rate and increase signal sensitivity during the long integration time, and in the weak signal environment. In this case, we use back-thinned CCD image sensor from Hamamatsu Corporation with high sensitivity, low noise and large dynamic range. In order to maximize this CCD sensor's performance and minimize the whole size of the device simultaneously to achieve the project indicators, we delicately designed a peripheral circuit for the CCD sensor. The design is mainly composed with multi-voltage circuit, sequential generation circuit, driving circuit and A/D transition parts. As the most important power supply circuit, the multi-voltage circuits with 12 independent voltages are designed with reference power supply IC and set to specified voltage value by the amplifier making up the low-pass filter, which allows the user to obtain a highly stable and accurate voltage with low noise. What's more, to make our design easy to debug, CPLD is selected to generate sequential signal. The A/D converter chip consists of a correlated

Multiuser remote access to distributed heterogeneous system of programmable logic based laboratory equipment for remote digital circuits design labs

Directory of Open Access Journals (Sweden)

Mikhail N. Yokhin

2017-12-01

Full Text Available The paper contains an analysis of perspective structures of software and hardware equipment of universal digital design laboratories with the purpose of enabling laboratory classes of digital circuit design to be taken remotely. Implementation characteristics and usage experience of some of those structures applied to labs on several hardware related courses of « Computer science and computer engineering» program in NRNU MEPhI are presented. The paper also considers different aspects of usage of remote access enabled laboratory which should be taken into account to substantiate laboratory configuration from technical and economical standpoints. To increase equipment usage efficiency an approach to group several distinct projects to place them on a single FPGA chip is proposed. The paper shows advisability and gives an example of parametrizable virtual stand for remote debugging of FPGA projects.

A Flipped First-Year Digital Circuits Course for Engineering and Technology Students

Science.gov (United States)

Yelamarthi, Kumar; Drake, Eron

2015-01-01

This paper describes a flipped and improved first-year digital circuits (DC) course that incorporates several active learning strategies. With the primary objective of increasing student interest and learning, an integrated instructional design framework is proposed to provide first-year engineering and technology students with practical knowledge…

Intuitive analog circuit design

CERN Document Server

Thompson, Marc

2013-01-01

Intuitive Analog Circuit Design outlines ways of thinking about analog circuits and systems that let you develop a feel for what a good, working analog circuit design should be. This book reflects author Marc Thompson's 30 years of experience designing analog and power electronics circuits and teaching graduate-level analog circuit design, and is the ideal reference for anyone who needs a straightforward introduction to the subject. In this book, Dr. Thompson describes intuitive and ""back-of-the-envelope"" techniques for designing and analyzing analog circuits, including transistor amplifi

Signal Digitizer and Cross-Correlation Application Specific Integrated Circuit

Science.gov (United States)

Baranauskas, Dalius (Inventor); Baranauskas, Gytis (Inventor); Zelenin, Denis (Inventor); Kangaslahti, Pekka (Inventor); Tanner, Alan B. (Inventor); Lim, Boon H. (Inventor)

2017-01-01

According to one embodiment, a cross-correlator comprises a plurality of analog front ends (AFEs), a cross-correlation circuit and a data serializer. Each of the AFEs comprises a variable gain amplifier (VGA) and a corresponding analog-to-digital converter (ADC) in which the VGA receives and modifies a unique analog signal associates with a measured analog radio frequency (RF) signal and the ADC produces digital data associated with the modified analog signal. Communicatively coupled to the AFEs, the cross-correlation circuit performs a cross-correlation operation on the digital data produced from different measured analog RF signals. The data serializer is communicatively coupled to the summing and cross-correlating matrix and continuously outputs a prescribed amount of the correlated digital data.

Circuits and filters handbook

CERN Document Server

Chen, Wai-Kai

2003-01-01

A bestseller in its first edition, The Circuits and Filters Handbook has been thoroughly updated to provide the most current, most comprehensive information available in both the classical and emerging fields of circuits and filters, both analog and digital. This edition contains 29 new chapters, with significant additions in the areas of computer-aided design, circuit simulation, VLSI circuits, design automation, and active and digital filters. It will undoubtedly take its place as the engineer's first choice in looking for solutions to problems encountered in the design, analysis, and behavi

Parts & Pools: A Framework for Modular Design of Synthetic Gene Circuits

Energy Technology Data Exchange (ETDEWEB)

Marchisio, Mario Andrea, E-mail: marchisio@hit.edu.cn [School of Life Science and Technology, Harbin Institute of Technology, Harbin (China)

2014-10-06

Published in 2008, Parts & Pools represents one of the first attempts to conceptualize the modular design of bacterial synthetic gene circuits with Standard Biological Parts (DNA segments) and Pools of molecules referred to as common signal carriers (e.g., RNA polymerases and ribosomes). The original framework for modeling bacterial components and designing prokaryotic circuits evolved over the last years and brought, first, to the development of an algorithm for the automatic design of Boolean gene circuits. This is a remarkable achievement since gene digital circuits have a broad range of applications that goes from biosensors for health and environment care to computational devices. More recently, Parts & Pools was enabled to give a proper formal description of eukaryotic biological circuit components. This was possible by employing a rule-based modeling approach, a technique that permits a faithful calculation of all the species and reactions involved in complex systems such as eukaryotic cells and compartments. In this way, Parts & Pools is currently suitable for the visual and modular design of synthetic gene circuits in yeast and mammalian cells too.

Parts & Pools: A Framework for Modular Design of Synthetic Gene Circuits

International Nuclear Information System (INIS)

Marchisio, Mario Andrea

2014-01-01

Published in 2008, Parts & Pools represents one of the first attempts to conceptualize the modular design of bacterial synthetic gene circuits with Standard Biological Parts (DNA segments) and Pools of molecules referred to as common signal carriers (e.g., RNA polymerases and ribosomes). The original framework for modeling bacterial components and designing prokaryotic circuits evolved over the last years and brought, first, to the development of an algorithm for the automatic design of Boolean gene circuits. This is a remarkable achievement since gene digital circuits have a broad range of applications that goes from biosensors for health and environment care to computational devices. More recently, Parts & Pools was enabled to give a proper formal description of eukaryotic biological circuit components. This was possible by employing a rule-based modeling approach, a technique that permits a faithful calculation of all the species and reactions involved in complex systems such as eukaryotic cells and compartments. In this way, Parts & Pools is currently suitable for the visual and modular design of synthetic gene circuits in yeast and mammalian cells too.

Nyquist AD Converters, Sensor Interfaces, and Robustness Advances in Analog Circuit Design, 2012

CERN Document Server

Baschirotto, Andrea; Steyaert, Michiel

2013-01-01

This book is based on the presentations during the 21st workshop on Advances in Analog Circuit Design.  Expert designers provide readers with information about a variety of topics at the frontier of analog circuit design, including Nyquist analog-to-digital converters, capacitive sensor interfaces, reliability, variability, and connectivity.  This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.  Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; Presents material in a tutorial-based format; Includes coverage of Nyquist A/D converters, capacitive sensor interfaces, reliability, variability, and connectivity.

Design and test of component circuits of an integrated quantum voltage noise source for Johnson noise thermometry

International Nuclear Information System (INIS)

Yamada, Takahiro; Maezawa, Masaaki; Urano, Chiharu

2015-01-01

Highlights: • We demonstrated RSFQ digital components of a new quantum voltage noise source. • A pseudo-random number generator and variable pulse number multiplier are designed. • Fabrication process is based on four Nb wiring layers and Nb/AlOx/Nb junctions. • The circuits successfully operated with wide dc bias current margins, 80–120%. - Abstract: We present design and testing of a pseudo-random number generator (PRNG) and a variable pulse number multiplier (VPNM) which are digital circuit subsystems in an integrated quantum voltage noise source for Jonson noise thermometry. Well-defined, calculable pseudo-random patterns of single flux quantum pulses are synthesized with the PRNG and multiplied digitally with the VPNM. The circuit implementation on rapid single flux quantum technology required practical circuit scales and bias currents, 279 junctions and 33 mA for the PRNG, and 1677 junctions and 218 mA for the VPNM. We confirmed the circuit operation with sufficiently wide margins, 80–120%, with respect to the designed bias currents.

Design and test of component circuits of an integrated quantum voltage noise source for Johnson noise thermometry

Energy Technology Data Exchange (ETDEWEB)

Yamada, Takahiro, E-mail: yamada-takahiro@aist.go.jp [Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology, Central 2, Umezono 1-1-1, Tsukuba, Ibaraki 305-8568 (Japan); Maezawa, Masaaki [Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology, Central 2, Umezono 1-1-1, Tsukuba, Ibaraki 305-8568 (Japan); Urano, Chiharu [National Metrology Institute of Japan, National Institute of Advanced Industrial Science and Technology, Central 3, Umezono 1-1-1, Tsukuba, Ibaraki 305-8563 (Japan)

2015-11-15

Highlights: • We demonstrated RSFQ digital components of a new quantum voltage noise source. • A pseudo-random number generator and variable pulse number multiplier are designed. • Fabrication process is based on four Nb wiring layers and Nb/AlOx/Nb junctions. • The circuits successfully operated with wide dc bias current margins, 80–120%. - Abstract: We present design and testing of a pseudo-random number generator (PRNG) and a variable pulse number multiplier (VPNM) which are digital circuit subsystems in an integrated quantum voltage noise source for Jonson noise thermometry. Well-defined, calculable pseudo-random patterns of single flux quantum pulses are synthesized with the PRNG and multiplied digitally with the VPNM. The circuit implementation on rapid single flux quantum technology required practical circuit scales and bias currents, 279 junctions and 33 mA for the PRNG, and 1677 junctions and 218 mA for the VPNM. We confirmed the circuit operation with sufficiently wide margins, 80–120%, with respect to the designed bias currents.

Design and test of component circuits of an integrated quantum voltage noise source for Johnson noise thermometry

Science.gov (United States)

Yamada, Takahiro; Maezawa, Masaaki; Urano, Chiharu

2015-11-01

We present design and testing of a pseudo-random number generator (PRNG) and a variable pulse number multiplier (VPNM) which are digital circuit subsystems in an integrated quantum voltage noise source for Jonson noise thermometry. Well-defined, calculable pseudo-random patterns of single flux quantum pulses are synthesized with the PRNG and multiplied digitally with the VPNM. The circuit implementation on rapid single flux quantum technology required practical circuit scales and bias currents, 279 junctions and 33 mA for the PRNG, and 1677 junctions and 218 mA for the VPNM. We confirmed the circuit operation with sufficiently wide margins, 80-120%, with respect to the designed bias currents.

Logic designer's handbook circuits and systems

CERN Document Server

Parr, E A

2013-01-01

Easy-to-read, but nonetheless thorough, this book on digital circuits is for use by students and engineers, and is a readily accessible source of data on devices in the TTL and CMOS families. The book is written to be used as a Designer's Handbook and will spend its days on the designer's bench rather than their bookshelf. The basic theory is explained and then supported with specific practical examples.* Revised, enlarged, reduced price edition * Easy-to-read, jargon free book suitable for professionals and students * Plenty of basic theory and practical information * Based on authors practi

Design of organic complementary circuits and systems on foil

CERN Document Server

Abdinia, Sahel; Cantatore, Eugenio

2015-01-01

This book describes new approaches to fabricate complementary organic electronics, and focuses on the design of circuits and practical systems created using these manufacturing approaches. The authors describe two state-of-the-art, complementary organic technologies, characteristics and modeling of their transistors and their capability to implement circuits and systems on foil. Readers will benefit from the valuable overview of the challenges and opportunities that these extremely innovative technologies provide. ·         Demonstrates first circuits implemented using specific complementary organic technologies, including first printed analog to digital converter, first dynamic logic on foil and largest complementary organic circuit ·         Includes step-by-step design from single transistor level to complete systems on foil ·         Provides a platform for comparing state-of-the-art complementary organic technologies and for comparing these with other similar technologies, spec...

An integrated energy-efficient capacitive sensor digital interface circuit

KAUST Repository

Omran, Hesham

2014-06-19

In this paper, we propose an energy-efficient 13-bit capacitive sensor interface circuit. The proposed design fully relies on successive approximation algorithm, which eliminates the need for oversampling and digital decimation filtering, and thus low-power consumption is achieved. The proposed architecture employs a charge amplifier stage to acheive parasitic insensitive operation and fine absolute resolution. Moreover, the output code is not affected by offset voltages or charge injection. The successive approximation algorithm is implemented in the capacitance-domain using a coarse-fine programmable capacitor array, which allows digitizing wide capacitance range in compact area. Analysis for the maximum achievable resolution due to mismatch is provided. The proposed design is insensitive to any reference voltage or current which translates to low temperature sensitivity. The operation of a prototype fabricated in a standard CMOS technology is experimentally verified using both on-chip and off-chip capacitive sensors. Compared to similar prior work, the fabricated prototype achieves and excellent energy efficiency of 34 pJ/step.

MOS integrated circuit design

CERN Document Server

Wolfendale, E

2013-01-01

MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

ESD analog circuits and design

CERN Document Server

Voldman, Steven H

2014-01-01

A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design.  It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect pres

CMOS analog circuit design

CERN Document Server

Allen, Phillip E

1987-01-01

This text presents the principles and techniques for designing analog circuits to be implemented in a CMOS technology. The level is appropriate for seniors and graduate students familiar with basic electronics, including biasing, modeling, circuit analysis, and some familiarity with frequency response. Students learn the methodology of analog integrated circuit design through a hierarchically-oriented approach to the subject that provides thorough background and practical guidance for designing CMOS analog circuits, including modeling, simulation, and testing. The authors' vast industrial experience and knowledge is reflected in the circuits, techniques, and principles presented. They even identify the many common pitfalls that lie in the path of the beginning designer--expert advice from veteran designers. The text mixes the academic and practical viewpoints in a treatment that is neither superficial nor overly detailed, providing the perfect balance.

Integrated Design Validation: Combining Simulation and Formal Verification for Digital Integrated Circuits

Directory of Open Access Journals (Sweden)

Lun Li

2006-04-01

Full Text Available The correct design of complex hardware continues to challenge engineers. Bugs in a design that are not uncovered in early design stages can be extremely expensive. Simulation is a predominantly used tool to validate a design in industry. Formal verification overcomes the weakness of exhaustive simulation by applying mathematical methodologies to validate a design. The work described here focuses upon a technique that integrates the best characteristics of both simulation and formal verification methods to provide an effective design validation tool, referred as Integrated Design Validation (IDV. The novelty in this approach consists of three components, circuit complexity analysis, partitioning based on design hierarchy, and coverage analysis. The circuit complexity analyzer and partitioning decompose a large design into sub-components and feed sub-components to different verification and/or simulation tools based upon known existing strengths of modern verification and simulation tools. The coverage analysis unit computes the coverage of design validation and improves the coverage by further partitioning. Various simulation and verification tools comprising IDV are evaluated and an example is used to illustrate the overall validation process. The overall process successfully validates the example to a high coverage rate within a short time. The experimental result shows that our approach is a very promising design validation method.

On automatic synthesis of analog/digital circuits

Energy Technology Data Exchange (ETDEWEB)

Beiu, V.

1998-12-31

The paper builds on a recent explicit numerical algorithm for Kolmogorov`s superpositions, and will show that in order to synthesize minimum size (i.e., size-optimal) circuits for implementing any Boolean function, the nonlinear activation function of the gates has to be the identity function. Because classical and--or implementations, as well as threshold gate implementations require exponential size, it follows that size-optimal solutions for implementing arbitrary Boolean functions can be obtained using analog (or mixed analog/digital) circuits. Conclusions and several comments are ending the paper.

Designing learning apparatus to promote twelfth grade students’ understanding of digital technology concept: A preliminary studies

Science.gov (United States)

Marlius; Kaniawati, I.; Feranie, S.

2018-05-01

A preliminary learning design using relay to promote twelfth grade student’s understanding of logic gates concept is implemented to see how well it’s to adopted by six high school students, three male students and three female students of twelfth grade. This learning design is considered for next learning of digital technology concept i.e. data digital transmition and analog. This work is a preliminary study to design the learning for large class. So far just a few researches designing learning design related to digital technology with relay. It may due to this concept inserted in Indonesian twelfth grade curriculum recently. This analysis is focus on student difficulties trough video analysis to learn the concept. Based on our analysis, the recommended thing for redesigning learning is: students understand first about symbols and electrical circuits; the Student Worksheet is made in more detail on the assembly steps to the project board; mark with symbols at points in certain places in the circuit for easy assembly; assembly using relays by students is enough until is the NOT’s logic gates and the others that have been assembled so that effective time. The design of learning using relays can make the relay a liaison between the abstract on the digital with the real thing of it, especially in the circuit of symbols and real circuits. Besides it is expected to also enrich the ability of teachers in classroom learning about digital technology.

Integrated circuit design using design automation

International Nuclear Information System (INIS)

Gwyn, C.W.

1976-09-01

Although the use of computer aids to develop integrated circuits is relatively new at Sandia, the program has been very successful. The results have verified the utility of the in-house CAD design capability. Custom IC's have been developed in much shorter times than available through semiconductor device manufacturers. In addition, security problems were minimized and a saving was realized in circuit cost. The custom CMOS IC's were designed at less than half the cost of designing with conventional techniques. In addition to the computer aided design, the prototype fabrication and testing capability provided by the semiconductor development laboratory and microelectronics computer network allows the circuits to be fabricated and evaluated before the designs are transferred to the commercial semiconductor manufacturers for production. The Sandia design and prototype fabrication facilities provide the capability of complete custom integrated circuit development entirely within the ERDA laboratories

Superconducting flux flow digital circuits

International Nuclear Information System (INIS)

Martens, J.S.; Zipperian, T.E.; Hietala, V.M.; Ginley, D.S.; Tigges, C.P.; Phillips, J.M.; Siegal, M.P.

1993-01-01

The authors have developed a family of digital logic circuits based on superconducting flux flow transistors that show high speed, reasonable signal levels, large fan-out, and large noise margins. The circuits are made from high-temperature superconductors (HTS) and have been shown to operate at over 90 K. NOR gates have been demonstrated with fan-outs of more than 5 and fully loaded switching times less than a fixture-limited 50 ps. Ring-oscillator data suggest inverter delay times of about 40ps when using a 3-μm linewidths. Simple flip-flops have also been demonstrated showing large noise margins, response times of less than 30 ps, and static power dissipation on the order of 30 nW. Among other uses, this logic family is appropriate as an interface between logic families such as single flux quantum and conventional semiconductor logic

Designed cell consortia as fragrance-programmable analog-to-digital converters.

Science.gov (United States)

Müller, Marius; Ausländer, Simon; Spinnler, Andrea; Ausländer, David; Sikorski, Julian; Folcher, Marc; Fussenegger, Martin

2017-03-01

Synthetic biology advances the rational engineering of mammalian cells to achieve cell-based therapy goals. Synthetic gene networks have nearly reached the complexity of digital electronic circuits and enable single cells to perform programmable arithmetic calculations or to provide dynamic remote control of transgenes through electromagnetic waves. We designed a synthetic multilayered gaseous-fragrance-programmable analog-to-digital converter (ADC) allowing for remote control of digital gene expression with 2-bit AND-, OR- and NOR-gate logic in synchronized cell consortia. The ADC consists of multiple sampling-and-quantization modules sensing analog gaseous fragrance inputs; a gas-to-liquid transducer converting fragrance intensity into diffusible cell-to-cell signaling compounds; a digitization unit with a genetic amplifier circuit to improve the signal-to-noise ratio; and recombinase-based digital expression switches enabling 2-bit processing of logic gates. Synthetic ADCs that can remotely control cellular activities with digital precision may enable the development of novel biosensors and may provide bioelectronic interfaces synchronizing analog metabolic pathways with digital electronics.

Rapid Co-optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations

OpenAIRE

Hills, Gage; Zhang, Jie; Shulaker, Max Marcel; Wei, Hai; Lee, Chi-Shuen; Balasingam, Arjun; Wong, H. -S. Philip; Mitra, Subhasish

2015-01-01

Carbon nanotube field-effect transistors (CNFETs) are promising candidates for building energy-efficient digital systems at highly-scaled technology nodes. However, carbon nanotubes (CNTs) are inherently subject to variations that reduce circuit yield, increase susceptibility to noise, and severely degrade their anticipated energy and speed benefits. Joint exploration and optimization of CNT processing options and CNFET circuit design are required to overcome this outstanding challenge. Unfor...

AnalogRF and mixed-signal circuit systematic design

CERN Document Server

Tlelo-Cuautle, Esteban; Castro-Lopez, Rafael

2013-01-01

Despite the fact that in the digital domain, designers can take full benefits of IPs and design automation tools to synthesize and design very complex systems, the analog designers’ task is still considered as a ‘handcraft’, cumbersome and very time consuming process. Thus, tremendous efforts are being deployed  to develop new design methodologies in the analog/RF and mixed-signal domains. This book collects 16 state-of-the-art contributions devoted to the topic of systematic design of analog, RF and mixed signal circuits. Divided in the two parts Methodologies and Techniques recent theories, synthesis techniques and design methodologies, as well as new sizing approaches in the field of robust analog and mixed signal design automation are presented for researchers and R/D engineers.  

Design of full digital 50 kV electronic gun high voltage power supply

International Nuclear Information System (INIS)

Ge Lei; Shang Lei

2014-01-01

The design of full digital electronic gun high voltage power supply based on DSP was introduced in this paper. This power supply has innovations of full digital feedback circuit and PID closed-loop control mode. The application of high frequency resonant converter circuit reduces the size of the resonant element and transformer. The current-coupling distributed high voltage transformer and rectifier circuit were employed in this power supply. By this way, the power supply efficiency is improved and the number of distributed parameters is reduced, and the rectifier circuit could work under the oil-free environment. This power supply has been used in electronic grid-control high voltage system of the irradiation accelerator. (authors)

Theory of Digital Automata

CERN Document Server

Borowik, Bohdan; Lahno, Valery; Petrov, Oleksandr

2013-01-01

This book serves a dual purpose: firstly to combine the treatment of circuits and digital electronics, and secondly, to establish a strong connection with the contemporary world of digital systems. The need for this approach arises from the observation that introducing digital electronics through a course in traditional circuit analysis is fast becoming obsolete. Our world has gone digital. Automata theory helps with the design of digital circuits such as parts of computers, telephone systems and control systems. A complete perspective is emphasized, because even the most elegant computer architecture will not function without adequate supporting circuits. The focus is on explaining the real-world implementation of complete digital systems. In doing so, the reader is prepared to immediately begin design and implementation work. This work serves as a bridge to take readers from the theoretical world to the everyday design world where solutions must be complete to be successful.

A Modified Design of a Thermocouple Based Digital Temperature Indicator with Opto-Isolation

Directory of Open Access Journals (Sweden)

S. C. BERA

2008-01-01

Full Text Available In the conventional thermocouple based digital temperature indicator the millivolt signal obtained from a thermocouple is first amplified and then converted into a digital signal by using analog-to-digital converter (ADC. This digital signal is then indicated as digital display of temperature using digital counter circuit or microprocessor/microcontroller based circuitry. In the present paper a modified AD conversion technique along with opto-isolation is used to indicate digitally the temperature without using any conventional analog-to-digital converter. The theory and design of the measuring technique are described in the paper. The non-linearity of thermocouple is eliminated by using look-up table within software program. The performance of the circuit has been experimentally tested by using mV input signal instead of a thermocouple as well as using a K-type thermocouple. The experimental results are reported in the paper.

Engineering integrated digital circuits with allosteric ribozymes for scaling up molecular computation and diagnostics.

Science.gov (United States)

Penchovsky, Robert

2012-10-19

Here we describe molecular implementations of integrated digital circuits, including a three-input AND logic gate, a two-input multiplexer, and 1-to-2 decoder using allosteric ribozymes. Furthermore, we demonstrate a multiplexer-decoder circuit. The ribozymes are designed to seek-and-destroy specific RNAs with a certain length by a fully computerized procedure. The algorithm can accurately predict one base substitution that alters the ribozyme's logic function. The ability to sense the length of RNA molecules enables single ribozymes to be used as platforms for multiple interactions. These ribozymes can work as integrated circuits with the functionality of up to five logic gates. The ribozyme design is universal since the allosteric and substrate domains can be altered to sense different RNAs. In addition, the ribozymes can specifically cleave RNA molecules with triplet-repeat expansions observed in genetic disorders such as oculopharyngeal muscular dystrophy. Therefore, the designer ribozymes can be employed for scaling up computing and diagnostic networks in the fields of molecular computing and diagnostics and RNA synthetic biology.

Design and demonstration of adiabatic quantum-flux-parametron logic circuits with superconductor magnetic shields

International Nuclear Information System (INIS)

Inoue, Kenta; Narama, Tatsuya; Yamanashi, Yuki; Yoshikawa, Nobuyuki; Takeuchi, Naoki

2015-01-01

Adiabatic quantum-flux-parametron (AQFP) logic is an energy-efficient superconductor logic with zero static power and very small dynamic power due to adiabatic switching operations. In order to build large-scale digital circuits, we built AQFP logic cells using superconductor magnetic shields, which are necessary in order to avoid unwanted magnetic couplings between the cells and excitation currents. In preliminary experimental tests, we confirmed that the unwanted coupling became negligibly small thanks to the superconductor shields. As a demonstration, we designed a four-to-one multiplexor and a 16-junction full adder using the shielded logic cells. In both circuits, we confirmed correct logic operations with wide operation margins of excitation currents. These results indicate that large-scale AQFP digital circuits can be realized using the shielded logic cells. (paper)

Calculation of Digital Control Circuits using Scilab Environment

Directory of Open Access Journals (Sweden)

Petru Chioncel

2015-09-01

Full Text Available The paper presents the computing of digital control circuits using Scilab environment. It exemplifies the influence of the sampling time in case of a transfer system described by a PT3 element composed of one PT1 and one PT2 element. For a continuous control system, the transfer function in z is computed and replaced with a digital control system. The presented calculation, done in Scilab, highlights the test responses of the process evidencing the systems performances.

Design of remote laser-induced fluorescence system's acquisition circuit

Science.gov (United States)

Wang, Guoqing; Lou, Yue; Wang, Ran; Yan, Debao; Li, Xin; Zhao, Xin; Chen, Dong; Zhao, Qi

2017-10-01

Laser-induced fluorescence system(LIfS) has been found its significant application in identifying one kind of substance from another by its properties even it's thimbleful, and becomes useful in plenty of fields. Many superior works have reported LIfS' theoretical analysis , designs and uses. However, the usual LIPS is always constructed in labs to detect matter quite closely, for the system using low-power laser as excitation source and charge coupled device (CCD) as detector. Promoting the detectivity of LIfS is of much concern to spread its application. Here, we take a high-energy narrow-pulse laser instead of commonly used continuous wave laser to operate sample, thus we can get strong fluorescent. Besides, photomultiplier (PMT) with high sensitivity is adopted in our system to detect extremely weak fluorescence after a long flight time from the sample to the detector. Another advantage in our system, as the fluorescence collected into spectroscopy, multiple wavelengths of light can be converted to the corresponding electrical signals with the linear array multichannel PMT. Therefore, at the cost of high-powered incentive and high-sensitive detector, a remote LIFS is get. In order to run this system, it is of importance to turn light signal to digital signal which can be processed by computer. The pulse width of fluorescence is deeply associated with excitation laser, at the nanosecond(ns) level, which has a high demand for acquisition circuit. We design an acquisition circuit including, I/V conversion circuit, amplifying circuit and peak-holding circuit. The simulation of circuit shows that peak-holding circuit can be one effective approach to reducing difficulty of acquisition circuit.

Design of a saturated analogue and digital current transducer

International Nuclear Information System (INIS)

Pross, Alexander

2002-01-01

This project describes the development of a new analogue and digital current transducer, providing a range of new theoretical design methods for these novel devices. The main control feature is the limit cycling operation, and the novel use of the embedded sigma-delta modulator sensor structure to derive a low component count digital sensor. The research programme was initiated into the design, development and evaluation of a novel non-Hall sensing analogue and digital current transducer. These transducers are used for measurement of high currents in power systems applications. The investigation is concerned with a new design which uses a magnetic ferrite core without an air gap for current measurement. The motivation for this work was to design a new control circuit which provides a low component count, and utilises the non-linear properties of the magnetic ferrite core to transmit direct current. The use of a limit cycle control circuit was believed to be particularly suitable for the analogue and digital transducers, for two main reasons: the low component count, and the output signal is directly digital. In line with the motivations outlined above, the outcome of the research has witnessed the design, development and evaluation of a practically realisable analogue and digital current transducer. The design procedure, which is documented in this thesis, is considered to be a major contribution to the field of transducers design and development using a control systems approach. Mathematical models for both analogue and digital transducers were developed and the resulting model based predictions were found to be in good agreement with measured results. Simplification of the new model sensing device was achieved by approximating the non-linear ferrite core using FFT analysis. This is also considered to be a significant contribution. The development analogue and digital current censors employed a sampled data control systems design and utilised limit cycling

A Web-Based Visualization and Animation Platform for Digital Logic Design

Science.gov (United States)

Shoufan, Abdulhadi; Lu, Zheng; Huss, Sorin A.

2015-01-01

This paper presents a web-based education platform for the visualization and animation of the digital logic design process. This includes the design of combinatorial circuits using logic gates, multiplexers, decoders, and look-up-tables as well as the design of finite state machines. Various configurations of finite state machines can be selected…

Instrumentation and test gear circuits manual

CERN Document Server

Marston, R M

2013-01-01

Instrumentation and Test Gear Circuits Manual provides diagrams, graphs, tables, and discussions of several types of practical circuits. The practical circuits covered in this book include attenuators, bridges, scope trace doublers, timebases, and digital frequency meters. Chapter 1 discusses the basic instrumentation and test gear principles. Chapter 2 deals with the design of passive attenuators, and Chapter 3 with passive and active filter circuits. The subsequent chapters tackle 'bridge' circuits, analogue and digital metering techniques and circuitry, signal and waveform generation, and p

Digital computer structure and design

CERN Document Server

Townsend, R

2014-01-01

Digital Computer Structure and Design, Second Edition discusses switching theory, counters, sequential circuits, number representation, and arithmetic functions The book also describes computer memories, the processor, data flow system of the processor, the processor control system, and the input-output system. Switching theory, which is purely a mathematical concept, centers on the properties of interconnected networks of ""gates."" The theory deals with binary functions of 1 and 0 which can change instantaneously from one to the other without intermediate values. The binary number system is

Digital circuit for the introduction and later removal of dither from an analog signal

Science.gov (United States)

Borgen, Gary S.

1994-05-01

An electronics circuit is presented for accurately digitizing an analog audio or like data signal into a digital equivalent signal by introducing dither into the analog signal and then subsequently removing the dither from the digitized signal prior to its conversion to an analog signal which is a substantial replica of the incoming analog audio or like data signal. The electronics circuit of the present invention is characterized by a first pseudo-random number generator which generates digital random noise signals or dither for addition to the digital equivalent signal and a second pseudo-random number generator which generates subtractive digital random noise signals for the subsequent removal of dither from the digital equivalent signal prior its conversion to the analog replica signal.

The multiplicity of the digital textbook as design object

DEFF Research Database (Denmark)

Riis Ebbesen, Toke

2015-01-01

Building on a preliminary case study of the Danish educational publisher Systime A/S and its flagship product, the web-based ‘iBog’/‘iBook’, this article explores how digital textbooks can be understood as design. The shaping of digital books is seen as being intertwined in a wider circuit...... reorganization of the publishing company, web-based user interfaces, and ultimately the branding, which market these new digital objects, are building power- ful discourses around the product. Thus it is suggested that the design process of the iBog case can be understood in a model of database-based publishing...... with multiple levels. In the final analysis, the iBog is much more than a product and a technology. It is a brand that goes beyond what can be studied by looking at the digital textbook as a singular artefact....

Development of Magnetometer Digital Circuit for KSR-3 Rocket and Analytical Study on Calibration Result

Directory of Open Access Journals (Sweden)

Eun-Seok Lee

2002-12-01

Full Text Available This paper describes the re-design and the calibration results of the MAG digital circuit onboard the KSR-3. We enhanced the sampling rate of magnetometer data. Also, we reduced noise and increased authoritativeness of data. We could confirm that AIM resolution was decreased less than 1nT of analog calibration by a digital calibration of magnetometer. Therefore, we used numerical-program to correct this problem. As a result, we could calculate correction and error of data. These corrections will be applied to magnetometer data after the launch of KSR-3.

Flexible circuits with integrated switches for robotic shape sensing

Science.gov (United States)

Harnett, C. K.

2016-05-01

Digital switches are commonly used for detecting surface contact and limb-position limits in robotics. The typical momentary-contact digital switch is a mechanical device made from metal springs, designed to connect with a rigid printed circuit board (PCB). However, flexible printed circuits are taking over from the rigid PCB in robotics because the circuits can bend while carrying signals and power through moving joints. This project is motivated by a previous work where an array of surface-mount momentary contact switches on a flexible circuit acted as an all-digital shape sensor compatible with the power resources of energy harvesting systems. Without a rigid segment, the smallest commercially-available surface-mount switches would detach from the flexible circuit after several bending cycles, sometimes violently. This report describes a low-cost, conductive fiber based method to integrate electromechanical switches into flexible circuits and other soft, bendable materials. Because the switches are digital (on/off), they differ from commercially-available continuous-valued bend/flex sensors. No amplification or analog-to-digital conversion is needed to read the signal, but the tradeoff is that the digital switches only give a threshold curvature value. Boundary conditions on the edges of the flexible circuit are key to setting the threshold curvature value for switching. This presentation will discuss threshold-setting, size scaling of the design, automation for inserting a digital switch into the flexible circuit fabrication process, and methods for reconstructing a shape from an array of digital switch states.

A novel analog/digital reconfigurable automatic gain control with a novel DC offset cancellation circuit

Energy Technology Data Exchange (ETDEWEB)

He Xiaofeng; Ye Tianchun [Institute of Microelectronics, Chinese Academy of Science, Beijing 100029 (China); Mo Taishan; Ma Chengyan, E-mail: hexiaofeng@casic.ac.cn [Hangzhou Zhongke Microelectronics Co, Ltd, Hangzhou 310053 (China)

2011-02-15

An analog/digital reconfigurable automatic gain control (AGC) circuit with a novel DC offset cancellation circuit for a direct-conversion receiver is presented. The AGC is analog/digital reconfigurable in order to be compatible with different baseband chips. What's more, a novel DC offset cancellation (DCOC) circuit with an HPCF (high pass cutoff frequency) less than 10 kHz is proposed. The AGC is fabricated by a 0.18 {mu}m CMOS process. Under analog control mode, the AGC achieves a 70 dB dynamic range with a 3 dB-bandwidth larger than 60 MHz. Under digital control mode, through a 5-bit digital control word, the AGC shows a 64 dB gain control range by 2 dB each step with a gain error of less than 0.3 dB. The DC offset cancellation circuits can suppress the output DC offset voltage to be less than 1.5 mV, while the offset voltage of 40 mV is introduced into the input. The overall power consumption is less than 3.5 mA, and the die area is 800 x 300 {mu}m{sup 2}. (semiconductor integrated circuits)

Principles of transistor circuits introduction to the design of amplifiers, receivers and digital circuits

CERN Document Server

Amos, S W

2013-01-01

Principles of Transistor Circuits: Sixth Edition discusses the principles, concepts, and practices involved integrated circuits. The current edition includes up-to-date circuits, the section on thyristors has been revised to give more information on modern types, and dated information has been eliminated. The book covers related topics such as semiconductors and junction diodes; the principles behind transistors; and common amplifiers. The book also covers bias and DC stabilization; large-signal and small-signal AF amplifiers; DC and pulse amplifiers; sinusoidal oscillators; pulse and sawtooth

76 FR 58041 - Certain Digital Televisions Containing Integrated Circuit Devices and Components Thereof; Notice...

Science.gov (United States)

2011-09-19

... Integrated Circuit Devices and Components Thereof; Notice of Institution of Investigation; Institution of... integrated circuit devices and components thereof by reason of infringement of certain claims of U.S. Patent... after importation of certain digital televisions containing integrated circuit devices and components...

Digital system design and application with VHDL and FPGA

Energy Technology Data Exchange (ETDEWEB)

Lee, Gang; Jo, Yun Seok

2002-09-15

Contents of this book are digital system design modeling using VHDL like VHDL basics, writing VHDL for synthesis and VHDL environments, combinational logic design such as 4bit full adder and parallel combinational BCD multiplier sequential logic design, including Johnson counter, stop-watch, Dice game, traffic light controller, elevator controller and alarm clock, complex applications design like dynamic input/output circuit, PS/2 keyboard, LCD, VGA and UART. It also has a supplement about free license for ModelSim and Guide for 3100 X board user.

Digital system design and application with VHDL and FPGA

International Nuclear Information System (INIS)

Lee, Gang; Jo, Yun Seok

2002-09-01

Contents of this book are digital system design modeling using VHDL like VHDL basics, writing VHDL for synthesis and VHDL environments, combinational logic design such as 4bit full adder and parallel combinational BCD multiplier sequential logic design, including Johnson counter, stop-watch, Dice game, traffic light controller, elevator controller and alarm clock, complex applications design like dynamic input/output circuit, PS/2 keyboard, LCD, VGA and UART. It also has a supplement about free license for ModelSim and Guide for 3100 X board user.

[Design of High Frequency Signal Detecting Circuit of Human Body Impedance Used for Ultrashort Wave Diathermy Apparatus].

Science.gov (United States)

Fan, Xu; Wang, Yunguang; Cheng, Haiping; Chong, Xiaochen

2016-02-01

The present circuit was designed to apply to human tissue impedance tuning and matching device in ultra-short wave treatment equipment. In order to judge if the optimum status of circuit parameter between energy emitter circuit and accepter circuit is in well syntony, we designed a high frequency envelope detect circuit to coordinate with automatic adjust device of accepter circuit, which would achieve the function of human tissue impedance matching and tuning. Using the sampling coil to receive the signal of amplitude-modulated wave, we compared the voltage signal of envelope detect circuit with electric current of energy emitter circuit. The result of experimental study was that the signal, which was transformed by the envelope detect circuit, was stable and could be recognized by low speed Analog to Digital Converter (ADC) and was proportional to the electric current signal of energy emitter circuit. It could be concluded that the voltage, transformed by envelope detect circuit can mirror the real circuit state of syntony and realize the function of human tissue impedance collecting.

Circuit design on plastic foils

CERN Document Server

Raiteri, Daniele; Roermund, Arthur H M

2015-01-01

This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics.  The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing.   • Discusses implications of problems associated with large-area electronics and compares them to standard silicon; • Provides the basis for understanding physics and modeling of disordered material; • Includes guidelines to quickly setup the basic CAD tools enabling efficient and reliable designs; • Illustrates practical solutions to cope with hard/soft faults, variability, mismatch, aging and bias stress at architecture, circuit, layout, and device levels.

Conceptual design of a versatile radiation tolerant integrated signal conditioning circuit for resistive sensors

Energy Technology Data Exchange (ETDEWEB)

Leroux, P. [Katholieke Hogeschool Kempen, Kleinhoefstraat 4, B-2440 Geel (Belgium); Katholieke Universiteit Leuven, Dept. ESAT-MICAS, Kasteelpark Arenberg 10, B-3001 Heverlee (Belgium); SCK-CEN, Belgian Nuclear Research Centre, Boeretang 200, B-2400 Mol (Belgium); Sterckx, J. [Katholieke Hogeschool Kempen, Kleinhoefstraat 4, B-2440 Geel (Belgium); Van Uffelen, M.; Damiani, C. [Fusion 4 Energy, Ed. B3, c/Josep, no 2, Torres Diagonal Litoral, 08019 Barcelona (Spain)

2011-07-01

This paper presents the design of a radiation tolerant configurable discrete time CMOS signal conditioning circuit for use with resistive sensors like strain gauge pressure sensors. The circuit is intended to be used for remote handling in harsh environments in the International Thermonuclear Experimental fusion Reactor (ITER). The design features a 5 V differential preamplifier using a Correlated Double Sampling (CDS) architecture at a sample rate of 20 kHz and a 24 V discrete time post amplifier. The gain is digitally controllable between 27 and 400 in the preamplifier and between 1 and 8 in the post amplifier. The nominal input referred noise voltage is only 8.5 {mu}V while consuming only 1 mW. The circuit has a simulated radiation tolerance of more than 1 MGy. (authors)

Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

OpenAIRE

石橋, 孝昭

2012-01-01

This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

An analog integrated circuit design laboratory

OpenAIRE

Mondragon-Torres, A.F.; Mayhugh, Jr.; Pineda de Gyvez, J.; Silva-Martinez, J.; Sanchez-Sinencio, E.

2003-01-01

We present the structure of an analog integrated circuit design laboratory to instruct at both, senior undergraduate and entry graduate levels. The teaching material includes: a laboratory manual with analog circuit design theory, pre-laboratory exercises and circuit design specifications; a reference web page with step by step instructions and examples; the use of mathematical tools for automation and analysis; and state of the art CAD design tools in use by industry. Upon completion of the ...

Analog circuit design art, science, and personalities

CERN Document Server

Williams, Jim

1991-01-01

Analog Circuit Design: Art, Science, and Personalities discusses the many approaches and styles in the practice of analog circuit design. The book is written in an informal yet informative manner, making it easily understandable to those new in the field. The selection covers the definition, history, current practice, and future direction of analog design; the practice proper; and the styles in analog circuit design. The book also includes the problems usually encountered in analog circuit design; approach to feedback loop design; and other different techniques and applications. The text is

Circuit design for reliability

CERN Document Server

Cao, Yu; Wirth, Gilson

2015-01-01

This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.

Comparing Online to Face-To-Face Delivery of Undergraduate Digital Circuits Content

Science.gov (United States)

LaMeres, Brock J.; Plumb, Carolyn

2014-01-01

This paper presents a comparison of online to traditional face-to-face delivery of undergraduate digital systems material. Two specific components of digital content were compared and evaluated: a sophomore logic circuits course with no laboratory, and a microprocessor laboratory component of a junior-level computer systems course. For each of…

A molecular-sized optical logic circuit for digital modulation of a fluorescence signal

Science.gov (United States)

Nishimura, Takahiro; Tsuchida, Karin; Ogura, Yusuke; Tanida, Jun

2018-03-01

Fluorescence measurement allows simultaneous detection of multiple molecular species by using spectrally distinct fluorescence probes. However, due to the broad spectra of fluorescence emission, the multiplicity of fluorescence measurement is generally limited. To overcome this limitation, we propose a method to digitally modulate fluorescence output signals with a molecular-sized optical logic circuit by using optical control of fluorescence resonance energy transfer (FRET). The circuit receives a set of optical inputs represented with different light wavelengths, and then it switches high and low fluorescence intensity from a reporting molecule according to the result of the logic operation. By using combinational optical inputs in readout of fluorescence signals, the number of biomolecular species that can be identified is increased. To implement the FRET-based circuits, we designed two types of basic elements, YES and NOT switches. An YES switch produces a high-level output intensity when receiving a designated light wavelength input and a low-level intensity without the light irradiation. A NOT switch operates inversely to the YES switch. In experiments, we investigated the operation of the YES and NOT switches that receive a 532-nm light input and modulate the fluorescence intensity of Alexa Fluor 488. The experimental result demonstrates that the switches can modulate fluorescence signals according to the optical input.

Source-circuit design overview

Science.gov (United States)

Ross, R. G., Jr.

1983-01-01

The source circuit is the fundamental electrical building block of a large central-station array; it consists of a series-parallel network of solar cells that develops full system voltage. The array field is generally made up of a large number of parallel source circuits. Source-circuit electrical configuration is driven by a number of design considerations, which must be considered simultaneously. Array fault tolerance and hot spot heating endurance are examined in detail.

Multiband RF circuits and techniques for wireless transmitters

CERN Document Server

Chen, Wenhua; Ghannouchi, Fadhel M

2016-01-01

This book introduces systematic design methods for passive and active RF circuits and techniques, including state-of-the-art digital enhancement techniques. As the very first book dedicated to multiband RF circuits and techniques, this work provides an overview of the evolution of transmitter architecture and discusses current digital predistortion techniques. Readers will find a collection of novel research ideas and new architectures in concurrent multiband power dividers, power amplifiers and related digital enhancement techniques. This book will be of great interest to academic researchers, R&D engineers, wireless transmitter and protocol designers, as well as graduate students who wish to learn the core architectures, principles and methods of multiband RF circuits and techniques. .

Circuit bridging of digital equipment caused by smoke from a cable fire

International Nuclear Information System (INIS)

Tanaka, T.J.; Anderson, D.J.

1997-01-01

Advanced reactor systems are likely to use protection systems with digital electronics that ideally should be resistant to environmental hazards, including smoke from possible cable fires. Previous smoke tests have shown that digital safety systems can fail even at relatively low levels of smoke density and that short-term failures are likely to be caused by circuit bridging. Experiments were performed to examine these failures, with a focus on component packaging and protection schemes. Circuit bridging, which causes increased leakage currents and arcs, was gauged by measuring leakage currents among the leads of component packages. The resistance among circuit leads typically varies over a wide range, depending on the nature of the circuitry between the pins, bias conditions, circuit board material, etc. Resistance between leads can be as low as 20 kΩ and still be good, depending on the component. For these tests, the authors chose a printed circuit board and components that normally have an interlead resistance above 10 12 Ω, but if the circuit is exposed to smoke, circuit bridging causes the resistance to fall below 10 3 Ω. Plated-through-hole (PTH) and surface-mounted (SMT) packages were exposed to a series of different smoke environments using a mixture of environmentally qualified cables for fuel. Conformal coatings and enclosures were tested as circuit protection methods. High fuel levels, high humidity, and high flaming burns were the conditions most likely to cause circuit bridging. The inexpensive conformal coating that was tested - an acrylic spray - reduced leakage currents, but enclosure in a chassis with a fan did not. PTH packages were more resistant to smoke-induced circuit bridging than SMT packages. Active components failed most often in tests where the leakage currents were high, but failure did not always accompany high leakage currents

Digitally controlled oscillator design with a variable capacitance XOR gate

International Nuclear Information System (INIS)

Kumar, Manoj; Arya, Sandeep K.; Pandey, Sujata

2011-01-01

A digitally controlled oscillator (DCO) using a three-transistor XOR gate as the variable load has been presented. A delay cell using an inverter and a three-transistor XOR gate as the variable capacitance is also proposed. Three-, five- and seven-stage DCO circuits have been designed using the proposed delay cell. The output frequency is controlled digitally with bits applied to the delay cells. The three-bit DCO shows output frequency and power consumption variation in the range of 3.2486–4.0267 GHz and 0.6121–0.3901 mW, respectively, with a change in the control word 111–000. The five-bit DCO achieves frequency and power of 1.8553–2.3506 GHz and 1.0202–0.6501 mW, respectively, with a change in the control word 11111–00000. Moreover, the seven-bit DCO shows a frequency and power consumption variation of 1.3239–1.6817 GHz and 1.4282–0.9102 mW, respectively, with a varying control word 1111111–0000000. The power consumption and output frequency of the proposed circuits have been compared with earlier reported circuits and the present approaches show significant improvements. (semiconductor integrated circuits)

Silicon CMOS optical receiver circuits with integrated thin-film compound semiconductor detectors

Science.gov (United States)

Brooke, Martin A.; Lee, Myunghee; Jokerst, Nan Marie; Camperi-Ginestet, C.

1995-04-01

While many circuit designers have tackled the problem of CMOS digital communications receiver design, few have considered the problem of circuitry suitable for an all CMOS digital IC fabrication process. Faced with a high speed receiver design the circuit designer will soon conclude that a high speed analog-oriented fabrication process provides superior performance advantages to a digital CMOS process. However, for applications where there are overwhelming reasons to integrate the receivers on the same IC as large amounts of conventional digital circuitry, the low yield and high cost of the exotic analog-oriented fabrication is no longer an option. The issues that result from a requirement to use a digital CMOS IC process cut across all aspects of receiver design, and result in significant differences in circuit design philosophy and topology. Digital ICs are primarily designed to yield small, fast CMOS devices for digital logic gates, thus no effort is put into providing accurate or high speed resistances, or capacitors. This lack of any reliable resistance or capacitance has a significant impact on receiver design. Since resistance optimization is not a prerogative of the digital IC process engineer, the wisest option is thus to not use these elements, opting instead for active circuitry to replace the functions normally ascribed to resistance and capacitance. Depending on the application receiver noise may be a dominant design constraint. The noise performance of CMOS amplifiers is different than bipolar or GaAs MESFET circuits, shot noise is generally insignificant when compared to channel thermal noise. As a result the optimal input stage topology is significantly different for the different technologies. It is found that, at speeds of operation approaching the limits of the digital CMOS process, open loop designs have noise-power-gain-bandwidth tradeoff performance superior to feedback designs. Furthermore, the lack of good resisters and capacitors

Simplified design of filter circuits

CERN Document Server

Lenk, John

1999-01-01

Simplified Design of Filter Circuits, the eighth book in this popular series, is a step-by-step guide to designing filters using off-the-shelf ICs. The book starts with the basic operating principles of filters and common applications, then moves on to describe how to design circuits by using and modifying chips available on the market today. Lenk's emphasis is on practical, simplified approaches to solving design problems.Contains practical designs using off-the-shelf ICsStraightforward, no-nonsense approachHighly illustrated with manufacturer's data sheets

Design of a CMOS readout circuit on ultra-thin flexible silicon chip for printed strain gauges

Directory of Open Access Journals (Sweden)

M. Elsobky

2017-09-01

Full Text Available Flexible electronics represents an emerging technology with features enabling several new applications such as wearable electronics and bendable displays. Precise and high-performance sensors readout chips are crucial for high quality flexible electronic products. In this work, the design of a CMOS readout circuit for an array of printed strain gauges is presented. The ultra-thin readout chip and the printed sensors are combined on a thin Benzocyclobutene/Polyimide (BCB/PI substrate to form a Hybrid System-in-Foil (HySiF, which is used as an electronic skin for robotic applications. Each strain gauge utilizes a Wheatstone bridge circuit, where four Aerosol Jet® printed meander-shaped resistors form a full-bridge topology. The readout chip amplifies the output voltage difference (about 5 mV full-scale swing of the strain gauge. One challenge during the sensor interface circuit design is to compensate for the relatively large dc offset (about 30 mV at 1 mA in the bridge output voltage so that the amplified signal span matches the input range of an analog-to-digital converter (ADC. The circuit design uses the 0. 5 µm mixed-signal GATEFORESTTM technology. In order to achieve the mechanical flexibility, the chip fabrication is based on either back thinned wafers or the ChipFilmTM technology, which enables the manufacturing of silicon chips with a thickness of about 20 µm. The implemented readout chip uses a supply of 5 V and includes a 5-bit digital-to-analog converter (DAC, a differential difference amplifier (DDA, and a 10-bit successive approximation register (SAR ADC. The circuit is simulated across process, supply and temperature corners and the simulation results indicate excellent performance in terms of circuit stability and linearity.

Analogue Building Blocks Based on Digital CMOS Gates

DEFF Research Database (Denmark)

Mucha, Igor

1996-01-01

Low-performance analogue circuits built of digital MOS gates are presented. Depending on the threshold voltages of the technology used the final circuits can be operated using low supply voltages. The main advantage using the proposed circuits is the simplicity and ultimate compatibility...... with the design of digital circuits....

Principles of transistor circuits introduction to the design of amplifiers, receivers and digital circuits

CERN Document Server

Amos, S W

1990-01-01

Principles of Transistor Circuits, Seventh Edition discusses the fundamental concepts of transistor circuits. The book is comprised of 16 chapters that cover amplifiers, oscillators, and generators. Chapter 1 discusses semiconductors and junction nodes, while Chapter 2 covers the basic principles of transistors. The subsequent chapters focus on amplifiers, where one of the chapters discusses bias and D.C. The book also talks about sinusoidal oscillators and covers modulators, demodulators, mixers, and receivers. Chapters 13 and 14 discuss pulse generators and sawtooth generators, respectively.

ASIC design of a digital fuzzy system on chip for medical diagnostic applications.

Science.gov (United States)

Roy Chowdhury, Shubhajit; Roy, Aniruddha; Saha, Hiranmay

2011-04-01

The paper presents the ASIC design of a digital fuzzy logic circuit for medical diagnostic applications. The system on chip under consideration uses fuzzifier, memory and defuzzifier for fuzzifying the patient data, storing the membership function values and defuzzifying the membership function values to get the output decision. The proposed circuit uses triangular trapezoidal membership functions for fuzzification patients' data. For minimizing the transistor count, the proposed circuit uses 3T XOR gates and 8T adders for its design. The entire work has been carried out using TSMC 0.35 µm CMOS process. Post layout TSPICE simulation of the whole circuit indicates a delay of 31.27 ns and the average power dissipation of the system on chip is 123.49 mW which indicates a less delay and less power dissipation than the comparable embedded systems reported earlier.

Semiconductors integrated circuit design for manufacturability

CERN Document Server

Balasinki, Artur

2011-01-01

Because of the continuous evolution of integrated circuit manufacturing (ICM) and design for manufacturability (DfM), most books on the subject are obsolete before they even go to press. That's why the field requires a reference that takes the focus off of numbers and concentrates more on larger economic concepts than on technical details. Semiconductors: Integrated Circuit Design for Manufacturability covers the gradual evolution of integrated circuit design (ICD) as a basis to propose strategies for improving return-on-investment (ROI) for ICD in manufacturing. Where most books put the spotl

Design of analog integrated circuits and systems

CERN Document Server

Laker, Kenneth R

1994-01-01

This text is designed for senior or graduate level courses in analog integrated circuits or design of analog integrated circuits. This book combines consideration of CMOS and bipolar circuits into a unified treatment. Also included are CMOS-bipolar circuits made possible by BiCMOS technology. The text progresses from MOS and bipolar device modelling to simple one and two transistor building block circuits. The final two chapters present a unified coverage of sample-data and continuous-time signal processing systems.

Arithmetic circuits for DSP applications

CERN Document Server

Stouraitis, Thanos

2017-01-01

Arithmetic Circuits for DSP Applications is a complete resource on arithmetic circuits for digital signal processing (DSP). It covers the key concepts, designs and developments of different types of arithmetic circuits, which can be used for improving the efficiency of implementation of a multitude of DSP applications. Each chapter includes various applications of the respective class of arithmetic circuits along with information on the future scope of research. Written for students, engineers, and researchers in electrical and computer engineering, this comprehensive text offers a clear understanding of different types of arithmetic circuits used for digital signal processing applications. The text includes contributions from noted researchers on a wide range of topics, including a review o circuits used in implementing basic operations like additions and multiplications; distributed arithmetic as a technique for the multiplier-less implementation of inner products for DSP applications; discussions on look ...

Grounding and shielding circuits and interference

CERN Document Server

Morrison, Ralph

2016-01-01

Applies basic field behavior in circuit design and demonstrates how it relates to grounding and shielding requirements and techniques in circuit design This book connects the fundamentals of electromagnetic theory to the problems of interference in all types of electronic design. The text covers power distribution in facilities, mixing of analog and digital circuitry, circuit board layout at high clock rates, and meeting radiation and susceptibility standards. The author examines the grounding and shielding requirements and techniques in circuit design and applies basic physics to circuit behavior. The sixth edition of this book has been updated with new material added throughout the chapters where appropriate. The presentation of the book has also been rearranged in order to reflect the current trends in the field.

Design and Implementation of a Digital Angular Rate Sensor

Directory of Open Access Journals (Sweden)

Zhen Peng

2010-10-01

Full Text Available With the aim of detecting the attitude of a rotating carrier, the paper presents a novel, digital angular rate sensor. The sensor consists of micro-sensing elements (gyroscope and accelerometer, signal processing circuit and micro-processor (DSP2812. The sensor has the feature of detecting three angular rates of a rotating carrier at the same time. The key techniques of the sensor, including sensing construction, sensing principles, and signal processing circuit design are presented. The test results show that the sensor can sense rolling, pitch and yaw angular rate at the same time and the measurement error of yaw (or pitch angular rate and rolling rate of the rotating carrier is less than 0.5%.

Wavy Channel TFT-Based Digital Circuits

KAUST Repository

Hanna, Amir

2016-02-23

We report a wavy channel (WC) architecture thin-film transistor-based digital circuitry using ZnO as a channel material. The novel architecture allows for extending device width by integrating vertical finlike substrate corrugations giving rise to 50% larger device width, without occupying extra chip area. The enhancement in the output drive current is 100%, when compared with conventional planar architecture for devices occupying the same chip area. The current increase is attributed to both the extra device width and 50% enhancement in field-effect mobility due to electrostatic gating effects. Fabricated inverters show that WC inverters can achieve two times the peak-to-peak output voltage for the same input when compared with planar devices. In addition, WC inverters show 30% faster rise and fall times, and can operate up to around two times frequency of the planar inverters for the same peak-to-peak output voltage. WC NOR circuits have shown 70% higher peak-to-peak output voltage, over their planar counterparts, and WC pass transistor logic multiplexer circuit has shown more than five times faster high-to-low propagation delay compared with its planar counterpart at a similar peak-to-peak output voltage.

Wavy Channel TFT-Based Digital Circuits

KAUST Repository

Hanna, Amir; Hussain, Aftab M.; Hussain, Aftab M.; Hussain, Aftab M.; Omran, Hesham; Alsharif, Sarah M.; Salama, Khaled N.; Hussain, Muhammad Mustafa

2016-01-01

We report a wavy channel (WC) architecture thin-film transistor-based digital circuitry using ZnO as a channel material. The novel architecture allows for extending device width by integrating vertical finlike substrate corrugations giving rise to 50% larger device width, without occupying extra chip area. The enhancement in the output drive current is 100%, when compared with conventional planar architecture for devices occupying the same chip area. The current increase is attributed to both the extra device width and 50% enhancement in field-effect mobility due to electrostatic gating effects. Fabricated inverters show that WC inverters can achieve two times the peak-to-peak output voltage for the same input when compared with planar devices. In addition, WC inverters show 30% faster rise and fall times, and can operate up to around two times frequency of the planar inverters for the same peak-to-peak output voltage. WC NOR circuits have shown 70% higher peak-to-peak output voltage, over their planar counterparts, and WC pass transistor logic multiplexer circuit has shown more than five times faster high-to-low propagation delay compared with its planar counterpart at a similar peak-to-peak output voltage.

Possible applications of the sigma delta digitizer in particle physics

International Nuclear Information System (INIS)

Hallgren, B.

1991-01-01

The sigma delta (ΣΔ) principle is an analog-to-digital conversion technique based on high-frequency sampling and low-pass filtering of the quantization noise. Resolution in time is exchanged for that in amplitude so as to avoid the difficulty of implementing complex precision analog circuits, in favour of digital circuits. The approach is attractive because it will make it possible to integrate complete channels of high resolution analog-to-digital converters and time digitizers in submicron digital VLSI technologies. Advantage is taken of the fact that the state-of-the-art VLSI is better suited for providing fast digital circuits than for providing precise analog circuits. This article describes the principle and the performance of the ideal ΣΔ digitizer. The design and measurements of a new 10 MHz prototype circuit of a second-order ΣΔ is presented to show the high speed operation of such a circuit. The expected performance of a CMOS test design using the same principles is discussed. Digital filters, useful for particle physics, are introduced. A comparison to other digitizing techniques is made and the potential applications of the ΣΔ digitizer in particle physics are outlined. (orig.)

Memristor-based nanoelectronic computing circuits and architectures

CERN Document Server

Vourkas, Ioannis

2016-01-01

This book considers the design and development of nanoelectronic computing circuits, systems and architectures focusing particularly on memristors, which represent one of today’s latest technology breakthroughs in nanoelectronics. The book studies, explores, and addresses the related challenges and proposes solutions for the smooth transition from conventional circuit technologies to emerging computing memristive nanotechnologies. Its content spans from fundamental device modeling to emerging storage system architectures and novel circuit design methodologies, targeting advanced non-conventional analog/digital massively parallel computational structures. Several new results on memristor modeling, memristive interconnections, logic circuit design, memory circuit architectures, computer arithmetic systems, simulation software tools, and applications of memristors in computing are presented. High-density memristive data storage combined with memristive circuit-design paradigms and computational tools applied t...

The analysis and design of linear circuits

CERN Document Server

Thomas, Roland E; Toussaint, Gregory J

2009-01-01

The Analysis and Design of Linear Circuits, 6e gives the reader the opportunity to not only analyze, but also design and evaluate linear circuits as early as possible. The text's abundance of problems, applications, pedagogical tools, and realistic examples helps engineers develop the skills needed to solve problems, design practical alternatives, and choose the best design from several competing solutions. Engineers searching for an accessible introduction to resistance circuits will benefit from this book that emphasizes the early development of engineering judgment.

Sequential circuit design for radiation hardened multiple voltage integrated circuits

Science.gov (United States)

Clark, Lawrence T [Phoenix, AZ; McIver, III, John K.

2009-11-24

The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

Designing Novel Quaternary Quantum Reversible Subtractor Circuits

Science.gov (United States)

Haghparast, Majid; Monfared, Asma Taheri

2018-01-01

Reversible logic synthesis is an important area of current research because of its ability to reduce energy dissipation. In recent years, multiple valued logic has received great attention due to its ability to reduce the width of the reversible circuit which is a main requirement in quantum technology. Subtractor circuits are between major components used in quantum computers. In this paper, we will discuss the design of a quaternary quantum reversible half subtractor circuit using quaternary 1-qudit, 2-qudit Muthukrishnan-Stroud and 3-qudit controlled gates and a 2-qudit Generalized quaternary gate. Then a design of a quaternary quantum reversible full subtractor circuit based on the quaternary half subtractor will be presenting. The designs shall then be evaluated in terms of quantum cost, constant input, garbage output, and hardware complexity. The proposed quaternary quantum reversible circuits are the first attempt in the designing of the aforementioned subtractor.

Signal processing: opportunities for superconductive circuits

International Nuclear Information System (INIS)

Ralston, R.W.

1985-01-01

Prime motivators in the evolution of increasingly sophisticated communication and detection systems are the needs for handling ever wider signal bandwidths and higher data processing speeds. These same needs drive the development of electronic device technology. Until recently the superconductive community has been tightly focused on digital devices for high speed computers. The purpose of this paper is to describe opportunities and challenges which exist for both analog and digital devices in a less familiar area, that of wideband signal processing. The function and purpose of analog signal-processing components, including matched filters, correlators and Fourier transformers, will be described and examples of superconductive implementations given. A canonic signal-processing system is then configured using these components in combination with analog/digital converters and digital output circuits to highlight the important issues of dynamic range, accuracy and equivalent computation rate. Superconductive circuits hold promise for processing signals of 10-GHz bandwidth. Signal processing systems, however, can be properly designed and implemented only through a synergistic combination of the talents of device physicists, circuit designers, algorithm architects and system engineers. An immediate challenge to the applied superconductivity community is to begin sharing ideas with these other researchers

A Parallel Genetic Algorithm for Automated Electronic Circuit Design

Science.gov (United States)

Lohn, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris; Norvig, Peter (Technical Monitor)

2000-01-01

We describe a parallel genetic algorithm (GA) that automatically generates circuit designs using evolutionary search. A circuit-construction programming language is introduced and we show how evolution can generate practical analog circuit designs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. We present experimental results as applied to analog filter and amplifier design tasks.

A guide to printed circuit board design

CERN Document Server

Hamilton, Charles

1984-01-01

A Guide to Printed Circuit Board Design discusses the basic design principles of printed circuit board (PCB). The book consists of nine chapters; each chapter provides both text discussion and illustration relevant to the topic being discussed. Chapter 1 talks about understanding the circuit diagram, and Chapter 2 covers how to compile component information file. Chapter 3 deals with the design layout, while Chapter 4 talks about preparing the master artworks. The book also covers generating computer aided design (CAD) master patterns, and then discusses how to prepare the production drawing a

A space-qualified experiment integrating HTS digital circuits and small cryocoolers

International Nuclear Information System (INIS)

Silver, A.; Akerling, G.; Auten, R.

1996-01-01

High temperature superconductors (HTS) promise to achieve electrical performance superior to that of conventional electronics. For application in space systems, HTS systems must simultaneously achieve lower power, weight, and volume than conventional electronics, and meet stringent space qualification and reliability requirements. Most effort to date has focused on passive RF/microwave applications. However, incorporation of active microwave components such as amplifiers, mixers, and phase shifters, and on-board high data rate digital signal processing is limited by the power and weight of their spacecraft electronic and support modules. Absence of data on active HTS components will prevent their utilization in space. To validate the feasibility in space of HTS circuits and components based on Josephson junctions, one needs to demonstrate HTS circuits and critical supporting technologies, such as space-qualified packaging and interconnects, closed-cycle cryocooling, and interface electronics. This paper describes the packaging, performance, and space test plan of an integrated, space-qualified experimental package consisting of HTS Josephson junction circuits and all the supporting components for NRL's high temperature superconductor space experiment (HTSSE-II). Most of the technical challenges and approaches are equally applicable to passive and active RF/microwave and digital electronic components, and this experiment will provide valuable validation data

Circuit design techniques for non-crystalline semiconductors

CERN Document Server

Sambandan, Sanjiv

2012-01-01

Despite significant progress in materials and fabrication technologies related to non-crystalline semiconductors, fundamental drawbacks continue to limit real-world application of these devices in electronic circuits. To help readers deal with problems such as low mobility and intrinsic time variant behavior, Circuit Design Techniques for Non-Crystalline Semiconductors outlines a systematic design approach, including circuit theory, enabling users to synthesize circuits without worrying about the details of device physics. This book: Offers examples of how self-assembly can be used as a powerf

Microelectronic circuit design for energy harvesting systems

CERN Document Server

Di Paolo Emilio, Maurizio

2017-01-01

This book describes the design of microelectronic circuits for energy harvesting, broadband energy conversion, new methods and technologies for energy conversion. The author also discusses the design of power management circuits and the implementation of voltage regulators. Coverage includes advanced methods in low and high power electronics, as well as principles of micro-scale design based on piezoelectric, electromagnetic and thermoelectric technologies with control and conditioning circuit design. Provides a single-source reference to energy harvesting and its applications; Serves as a practical guide to microelectronics design for energy harvesting, with application to mobile power supplies; Enables readers to develop energy harvesting systems for wearable/mobile electronics.

Synthesis of logic circuits with evolutionary algorithms

Energy Technology Data Exchange (ETDEWEB)

JONES,JAKE S.; DAVIDSON,GEORGE S.

2000-01-26

In the last decade there has been interest and research in the area of designing circuits with genetic algorithms, evolutionary algorithms, and genetic programming. However, the ability to design circuits of the size and complexity required by modern engineering design problems, simply by specifying required outputs for given inputs has as yet eluded researchers. This paper describes current research in the area of designing logic circuits using an evolutionary algorithm. The goal of the research is to improve the effectiveness of this method and make it a practical aid for design engineers. A novel method of implementing the algorithm is introduced, and results are presented for various multiprocessing systems. In addition to evolving standard arithmetic circuits, work in the area of evolving circuits that perform digital signal processing tasks is described.

Foundations for microstrip circuit design

CERN Document Server

Edwards, Terry

2016-01-01

Building on the success of the previous three editions, Foundations for Microstrip Circuit Design offers extensive new, updated and revised material based upon the latest research. Strongly design-oriented, this fourth edition provides the reader with a fundamental understanding of this fast expanding field making it a definitive source for professional engineers and researchers and an indispensable reference for senior students in electronic engineering. Topics new to this edition: microwave substrates, multilayer transmission line structures, modern EM tools and techniques, microstrip and planar transmision line design, transmission line theory, substrates for planar transmission lines, Vias, wirebonds, 3D integrated interposer structures, computer-aided design, microstrip and power-dependent effects, circuit models, microwave network analysis, microstrip passive elements, and slotline design fundamentals.

Maximum Acceleration Recording Circuit

Science.gov (United States)

Bozeman, Richard J., Jr.

1995-01-01

Coarsely digitized maximum levels recorded in blown fuses. Circuit feeds power to accelerometer and makes nonvolatile record of maximum level to which output of accelerometer rises during measurement interval. In comparison with inertia-type single-preset-trip-point mechanical maximum-acceleration-recording devices, circuit weighs less, occupies less space, and records accelerations within narrower bands of uncertainty. In comparison with prior electronic data-acquisition systems designed for same purpose, circuit simpler, less bulky, consumes less power, costs and analysis of data recorded in magnetic or electronic memory devices. Circuit used, for example, to record accelerations to which commodities subjected during transportation on trucks.

Digitized adiabatic quantum computing with a superconducting circuit.

Science.gov (United States)

Barends, R; Shabani, A; Lamata, L; Kelly, J; Mezzacapo, A; Las Heras, U; Babbush, R; Fowler, A G; Campbell, B; Chen, Yu; Chen, Z; Chiaro, B; Dunsworth, A; Jeffrey, E; Lucero, E; Megrant, A; Mutus, J Y; Neeley, M; Neill, C; O'Malley, P J J; Quintana, C; Roushan, P; Sank, D; Vainsencher, A; Wenner, J; White, T C; Solano, E; Neven, H; Martinis, John M

2016-06-09

Quantum mechanics can help to solve complex problems in physics and chemistry, provided they can be programmed in a physical device. In adiabatic quantum computing, a system is slowly evolved from the ground state of a simple initial Hamiltonian to a final Hamiltonian that encodes a computational problem. The appeal of this approach lies in the combination of simplicity and generality; in principle, any problem can be encoded. In practice, applications are restricted by limited connectivity, available interactions and noise. A complementary approach is digital quantum computing, which enables the construction of arbitrary interactions and is compatible with error correction, but uses quantum circuit algorithms that are problem-specific. Here we combine the advantages of both approaches by implementing digitized adiabatic quantum computing in a superconducting system. We tomographically probe the system during the digitized evolution and explore the scaling of errors with system size. We then let the full system find the solution to random instances of the one-dimensional Ising problem as well as problem Hamiltonians that involve more complex interactions. This digital quantum simulation of the adiabatic algorithm consists of up to nine qubits and up to 1,000 quantum logic gates. The demonstration of digitized adiabatic quantum computing in the solid state opens a path to synthesizing long-range correlations and solving complex computational problems. When combined with fault-tolerance, our approach becomes a general-purpose algorithm that is scalable.

Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits.

Science.gov (United States)

Aull, Brian

2016-04-08

This article reviews MIT Lincoln Laboratory's work over the past 20 years to develop photon-sensitive image sensors based on arrays of silicon Geiger-mode avalanche photodiodes. Integration of these detectors to all-digital CMOS readout circuits enable exquisitely sensitive solid-state imagers for lidar, wavefront sensing, and passive imaging.

Design and Analysis of Double-Gate MOSFETs for Ultra-Low Power Radio Frequency Identification (RFID: Device and Circuit Co-Design

Directory of Open Access Journals (Sweden)

Tony T. Kim

2011-07-01

Full Text Available Recently, double-gate MOSFETs (DGMOSFETs have been shown to be more optimal for ultra-low power circuit design due to the improved subthreshold slope and the reduced leakage current compared to bulk CMOS. However, DGMOSFETs for subthreshold circuit design have not been much explored in comparison to those for strong inversion-based design. In this paper, various configurations of DGMOSFETs, such as tied/independent gates and symmetric/asymmetric gate oxide thickness are explored for ultra-low power and high efficient radio frequency identification (RFID design. Comparison of bulk CMOS with DGMOSFETs has been conducted in ultra-low power subthreshold digital logic design and rectifier design, emphasizing the scope of the nano-scale DGMOSFET technology for future ultra-low power systems. The DGMOSFET-based subthreshold logic improves energy efficiency by more than 40% compared to the bulk CMOS-based logic at 32 nm. Among the various DGMOSFET configurations for RFID rectifiers, symmetric tied-gate DGMOSFET has the best power conversion efficiency and the lowest power consumption.

Analog integrated circuits design for processing physiological signals.

Science.gov (United States)

Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

2010-01-01

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

Wireless transceiver circuits system perspectives and design aspects

CERN Document Server

Rhee, Woogeun

2015-01-01

This cutting-edge work contains comprehensive coverage of integrated circuit (IC) design for modern transceiver circuits and wireless systems. Ranging in scope from system perspectives to practical circuit design for emerging wireless applications, the book includes detailed discussions of transceiver architectures and system parameters, mm-wave circuits, ultra-low-power radios for biomedical and sensor applications, and the latest circuit techniques. Written by renowned international experts in IC industry and academia, the text is an ideal reference for engineers and researchers in the area

Circuit arrangement of an electronic component for the design of fail-safe protective circuits

International Nuclear Information System (INIS)

Centmaier, W.; Bernhard, U.; Friederich, B.; Heisecke, I.

1974-01-01

The critical parameters of reactors are controlled by safety circuits. These circuits are controlled designed as logic modules operating by the 'n-out-of-m' selection principle. In most cases, a combination of a '1-out-of-3' circuit with a '2-out-of-3' circuit and separate indication is sufficient for a dynamic fail-safe circuit. The basic logic elements are AND and OR gate circuits, respectively, which are triggered by pulse trains and in which the failure of a pulse train is indicated as an error at the output. The module allows the design of safety circuits offering various degrees of safety. If the indication of an error is made on the modules, faulty components can be exchanged by the maintenance crew right away. (DG) [de

Microcontroller based Integrated Circuit Tester

OpenAIRE

Yousif Taha Yousif Elamin; Abdelrasoul Jabar Alzubaidi

2015-01-01

The digital integrated circuit (IC) tester is implemented by using the ATmega32 microcontroller . The microcontroller processes the inputs and outputs and displays the results on a Liquid Crystal Display (LCD). The basic function of the digital IC tester is to test a digital IC for correct logical functioning as described in the truth table and/or function table. The designed model can test digital ICs having 14 pins. Since it is programmable, any number of ICs can be tested . Thi...

Oscillator circuits frontiers in design, analysis and applications

CERN Document Server

2016-01-01

This book surveys recent developments in the design, analysis and applications of oscillator circuit design. It highlights developments in the analysis of synchronization and wave phenomena, new analytical and design methods and their application, and novel engineering applications of oscillator circuits.

Robert Lacoste's the darker side practical applications for electronic design concepts from circuit cellar

CERN Document Server

Lacoste, Robert

2009-01-01

Robert Lacoste's The Darker Side column has quickly become a must read among Circuit Cellar devotees. His column provides readers with succinct theoretical concepts and practical applications on topics as far reaching as digital modulation to antenna basics. Difficult concepts are demystified as Robert shines a light on complex topics within electronic design.This book collects sixteen Darker Side articles that have been enriched with new, exclusive content from the author. An intro into The Darker Side will give examples of material that can enhance and optimize the way you design. A

Hardware/software co-design and optimization for cyberphysical integration in digital microfluidic biochips

CERN Document Server

Luo, Yan; Ho, Tsung-Yi

2015-01-01

This book describes a comprehensive framework for hardware/software co-design, optimization, and use of robust, low-cost, and cyberphysical digital microfluidic systems. Readers with a background in electronic design automation will find this book to be a valuable reference for leveraging conventional VLSI CAD techniques for emerging technologies, e.g., biochips or bioMEMS. Readers from the circuit/system design community will benefit from methods presented to extend design and testing techniques from microelectronics to mixed-technology microsystems. For readers from the microfluidics domain,

The design of charge measurement circuit of MWPC

International Nuclear Information System (INIS)

Guan Xiaolei; Xiang Haisheng; Sheng Huayi; Zhao Yubin; Zhao Pingping; Zhang Hongyu; Jiang Xiaoshan; Zhao Jingwei; Zhao Dongxu

2010-01-01

It introduces the design of charge measurement (MQ) circuit of MWPC, including how MQ works in the whole MWPC readout electronic system, the architecture of MQ circuit, and the logic and algorithm design of FPGA. MQ circuit can also be applied to readout systems for other detectors. The test results in different working modes are provided. (authors)

Design and testing of integrated circuits for reactor protection channels

International Nuclear Information System (INIS)

Battle, R.E.; Vandermolen, R.I.; Jagadish, U.; Swail, B.K.; Naser, J.

1995-01-01

Custom and semicustom application-specific integrated circuit design and testing methods are investigated for use in research and commercial nuclear reactor safety systems. The Electric Power Research Institute and Oak Ridge National Laboratory are working together through a cooperative research and development agreement to apply modern technology to a nuclear reactor protection system. The purpose of this project is to demonstrate to the nuclear industry an alternative approach for new or upgrade reactor protection and safety system signal processing and voting logic. Motivation for this project stems from (1) the difficulty of proving that software-based protection systems are adequately reliable, (2) the obsolescence of the original equipment, and (3) the improved performance of digital processing. A demonstration model for protection system of PWR reactor has been designed and built

A main amplifier circuit and data acquisition system for charged particle detector array

International Nuclear Information System (INIS)

Hao Rui; Ge Yucheng

2011-01-01

The charged particle detector array has huge amounts of signal and needs high counting rate. To meet the requirements, a main amplifier and analog-to-digital conversion circuit based on high-speed op-amp chips and ADC chip was designed. A 51-MCU was used to control the circuit of ADC and the USB communication chip. The signals were digitized and uploaded by the MCU-ADC-USB circuit. The whole system has a compact hardware structure and a reasonable controlling software, which meet the design requirements. (authors)

CAD-CAM printed circuit board design

Science.gov (United States)

Agy, W. E.

A step-by-step procedure for a printed circuit design achieved by CAD is presented. The operator at the interactive CRT station moves a stylus across a graphics tablet and intersperses commands which result in computer-generated pictorial forms on the screen that were drawn on the pad. Standard symbols are used for commands allowing, for instance, connections to be made of specific types in certain locations, which can be automatically edited from a materials list. An entire network of drawn lines can be referenced by a signal name for recall, and a finished circuit schematic can be checked for designs rules compliance, including fault reporting in terms of designator/pin number. A map may be present delineating the boundaries of the circuitry area, and previously completed circuitry segments can be recalled for piece-by-piece assembly of the circuit board.

RF microwave circuit design for wireless applications

CERN Document Server

Rohde, Ulrich L

2012-01-01

Provides researchers and engineers with a complete set of modeling, design, and implementation tools for tackling the newest IC technologies Revised and completely updated, RF/Microwave Circuit Design for Wireless Applications, Second Edition is a unique, state-of-the-art guide to wireless integrated circuit design that provides researchers and engineers with a complete set of modeling, design, and implementation tools for tackling even the newest IC technologies. It emphasizes practical design solutions for high-performance devices and circuitry, incorporating ample exa

Digital Quantum Simulation of Spin Models with Circuit Quantum Electrodynamics

OpenAIRE

Salathé, Y.; Mondal, M.; Oppliger, M.; Heinsoo, J.; Kurpiers, P.; Potočnik, A.; Mezzacapo, Antonio; Las Heras García, Urtzi; Lamata Manuel, Lucas; Solano Villanueva, Enrique Leónidas; Filipp, S.; Wallraff, A.

2015-01-01

Systems of interacting quantum spins show a rich spectrum of quantum phases and display interesting many-body dynamics. Computing characteristics of even small systems on conventional computers poses significant challenges. A quantum simulator has the potential to outperform standard computers in calculating the evolution of complex quantum systems. Here, we perform a digital quantum simulation of the paradigmatic Heisenberg and Ising interacting spin models using a two transmon-qubit circuit...

Design optimization of radiation-hardened CMOS integrated circuits

International Nuclear Information System (INIS)

1975-01-01

Ionizing-radiation-induced threshold voltage shifts in CMOS integrated circuits will drastically degrade circuit performance unless the design parameters related to the fabrication process are properly chosen. To formulate an approach to CMOS design optimization, experimentally observed analytical relationships showing strong dependences between threshold voltage shifts and silicon dioxide thickness are utilized. These measurements were made using radiation-hardened aluminum-gate CMOS inverter circuits and have been corroborated by independent data taken from MOS capacitor structures. Knowledge of these relationships allows one to define ranges of acceptable CMOS design parameters based upon radiation-hardening capabilities and post-irradiation performance specifications. Furthermore, they permit actual design optimization of CMOS integrated circuits which results in optimum pre- and post-irradiation performance with respect to speed, noise margins, and quiescent power consumption. Theoretical and experimental results of these procedures, the applications of which can mean the difference between failure and success of a CMOS integrated circuit in a radiation environment, are presented

Essential knowledge for transistor-level LSI circuit design

CERN Document Server

Nakura, Toru

2016-01-01

This book is a collection of the miscellaneous knowledge essential for transistor-level LSI circuit design, summarized as the issues that need to be considered in each design step. To design an LSI that actually functions and to be able to properly measure it, an extremely large amount of diverse, detailed knowledge is necessary. Even though one may read a textbook about an op-amp, for example, the op-amp circuit design may not actually be possible to complete in one’s CAD tools. The first half of this text explains important design issues such as the operating principles of CAD tools, including schematic entry, SPICE simulation, layout and verification, and RC extraction. Then, mistake-prone topics for many circuit design beginners, resulting from their lack of consideration of these subjects, are explained including IO buffers, noise, and problems due to the progress of miniaturization. Following these topics, basic but very specialized issues for LSI circuit measurement are explained including measuremen...

RF Circuit Design in Nanometer CMOS

NARCIS (Netherlands)

Nauta, Bram

2007-01-01

With CMOS technology entering the nanometer regime, the design of analog and RF circuits is complicated by low supply voltages, very non-linear (and nonquadratic) devices and large 1/f noise. At the same time, circuits are required to operate over increasingly wide bandwidths to implement modern

Controllable clock circuit design in PEM system

International Nuclear Information System (INIS)

Sun Yunhua; Wang Peihua; Hu Tingting; Feng Baotong; Shuai Lei; Huang Huan; Wei Shujun; Li Ke; Zhao Jingwei; Wei Long

2011-01-01

A high-precision synchronized clock circuit design will be presented, which can supply steady, reliable and anti-jamming clock signal for the data acquirement (DAQ) system of Positron Emission Mammography (PEM). This circuit design is based on the Single-Chip Microcomputer and high-precision clock chip, and can achieve multiple controllable clock signals. The jamming between the clock signals can be reduced greatly with the differential transmission. Meanwhile, the adoption of CAN bus control in the clock circuit can prompt the clock signals to be transmitted or masked simultaneously when needed. (authors)

Controllable clock circuit design in PEM system

International Nuclear Information System (INIS)

Sun Yunhua; Wang Peilin; Hu Tingting; Feng Baotong; Shuai Lei; Huang Huan; Wei Shujun; Li Ke; Zhao Jingwei; Wei Long

2010-01-01

A high-precision synchronized clock circuit design will be presented, which can supply steady, reliable and anti-jamming clock signal for the data acquirement (DAQ) system of Positron Emission Mammography (PEM). This circuit design is based on the Single-Chip Microcomputer and high-precision clock chip, and can achieve multiple controllable clock signals. The jamming between the clock signals can be reduced greatly with the differential transmission. Meanwhile, the adoption of CAN bus control in the clock circuit can prompt the clock signals to be transmitted or masked simultaneously when needed. (authors)

Design of 3D integrated circuits and systems

CERN Document Server

Sharma, Rohit

2014-01-01

Three-dimensional (3D) integration of microsystems and subsystems has become essential to the future of semiconductor technology development. 3D integration requires a greater understanding of several interconnected systems stacked over each other. While this vertical growth profoundly increases the system functionality, it also exponentially increases the design complexity. Design of 3D Integrated Circuits and Systems tackles all aspects of 3D integration, including 3D circuit and system design, new processes and simulation techniques, alternative communication schemes for 3D circuits and sys

Low cost design of microprocessor EDAC circuit

International Nuclear Information System (INIS)

Hao Li; Yu Lixin; Peng Heping; Zhuang Wei

2015-01-01

An optimization method of error detection and correction (EDAC) circuit design is proposed. The method involves selecting or constructing EDAC codes of low cost hardware, associated with operation scheduling implementation based on 2-input XOR gates structure, and two actions for reducing hardware cells, which can reduce the delay penalties and area costs of the EDAC circuit effectively. The 32-bit EDAC circuit hardware implementation is selected to make a prototype, based on the 180 nm process. The delay penalties and area costs of the EDAC circuit are evaluated. Results show that the time penalty and area cost of the EDAC circuitries are affected with different parity-check matrices and different hardware implementation for the EDAC codes with the same capability of correction and detection code. This method can be used as a guide for low-cost radiation-hardened microprocessor EDAC circuit design and for more advanced technologies. (paper)

Geometrical considerations in the transient ionization testing of digital logic circuits

International Nuclear Information System (INIS)

Johnston, A.

1982-01-01

Mechanisms are identified that can cause the transient response of digital logic circuits to depend on the logic state in which they are irradiated. Several of these mechanisms depend on surface topology, and for these cases the sensitive logic states can be determined by examining the topology. General approaches for transient radiation testing are also discussed for several MSI and LSI device technologies

Introduction of circuit design on RFID system

International Nuclear Information System (INIS)

Pak, Sunho

2007-06-01

This is a case of research of Fujitsu company and design of basic circuit of electronic technique. It is composed of two parts. The first part deals with introduction of RFID system design, which lists basic knowledge of ubiquitous, glossary of high frequency, design of impedance matching circuit, RFID system, sorts and design of filter, modulator and a transmission and RFID system design. The second part deals with research and development of Fujitsu company, including RFID middle ware RFID CONNECT of Fujitsu, sensor network of Fujitsu and high handing technique of RFID system.

Introduction of circuit design on RFID system

Energy Technology Data Exchange (ETDEWEB)

Pak, Sunho

2007-06-15

This is a case of research of Fujitsu company and design of basic circuit of electronic technique. It is composed of two parts. The first part deals with introduction of RFID system design, which lists basic knowledge of ubiquitous, glossary of high frequency, design of impedance matching circuit, RFID system, sorts and design of filter, modulator and a transmission and RFID system design. The second part deals with research and development of Fujitsu company, including RFID middle ware RFID CONNECT of Fujitsu, sensor network of Fujitsu and high handing technique of RFID system.

Circuit and interconnect design for high bit-rate applications

NARCIS (Netherlands)

Veenstra, H.

2006-01-01

This thesis presents circuit and interconnect design techniques and design flows that address the most difficult and ill-defined aspects of the design of ICs for high bit-rate applications. Bottlenecks in interconnect design, circuit design and on-chip signal distribution for high bit-rate

On stethoscope design: a challenge for biomedical circuit designers.

Science.gov (United States)

Hahn, A W

2001-01-01

Most clinicians learned the art and science of auscultation using an acoustic stethoscope. While many models of electronic stethoscopes have been marketed over the years, none of them seem to do a very good job of emulating the most common forms of acoustic stethoscopes available. This paper is an appeal to biomedical circuit designers to learn more about the acoustics of commonly used stethoscopes and to develop an appropriate group of circuits which would emulate them much like music synthesizers can emulate almost any musical instrument. The implications are for creative designers to move toward a rational and acceptable design for both personal physician use and for telemedicine.

Design and testing of integrated circuits for reactor protection channels

International Nuclear Information System (INIS)

Battle, R.E.; Vandermolen, R.I.; Jagadish, U.; Swail, B.K.; Naser, J.; Rana, I.

1995-01-01

Custom and semicustom application-specific integrated circuit design and testing methods are investigated for use in research and commercial nuclear reactor safety systems. The Electric Power Research Institute and Oak Ridge National Laboratory are working together through a cooperative research and development agreement to apply modern technology to a nuclear reactor protection system. Purpose of this project is to demonstrate to the nuclear industry an alternative approach for new or upgrade reactor protection and safety system signal processing and voting logic. Motivation for this project stems from (1) the difficulty of proving that software-based protection systems are adequately reliable, (2) the obsolescence of the original equipment, and (3) the improved performance of digital processing

Control circuits for the 1.3 GeV electron synchrotron

International Nuclear Information System (INIS)

Asaoka, S.; Shiino, K.; Yoshioka, M.; Norimura, K.

1980-01-01

Following control circuits for the 1.3 GeV electron synchrotron, Institute for Nuclear Study, University of Tokyo, have been designed and constructed. 1. Variable delay circuits for the timing pulse of the synchrotron. 2. An alarm circuit for sputter ion pumps. 3. A sample and hold circuit for digital display and computer control of the beam intensity. This report describes detailes of the circuits and their specificatons. (author)

Digital design and computer architecture

CERN Document Server

Harris, David

2010-01-01

Digital Design and Computer Architecture is designed for courses that combine digital logic design with computer organization/architecture or that teach these subjects as a two-course sequence. Digital Design and Computer Architecture begins with a modern approach by rigorously covering the fundamentals of digital logic design and then introducing Hardware Description Languages (HDLs). Featuring examples of the two most widely-used HDLs, VHDL and Verilog, the first half of the text prepares the reader for what follows in the second: the design of a MIPS Processor. By the end of D

Analog circuit design art, science and personalities

CERN Document Server

Williams, Jim

1991-01-01

This book is far more than just another tutorial or reference guide - it's a tour through the world of analog design, combining theory and applications with the philosophies behind the design process. Readers will learn how leading analog circuit designers approach problems and how they think about solutions to those problems. They'll also learn about the `analog way' - a broad, flexible method of thinking about analog design tasks.A comprehensive and useful guide to analog theory and applications. Covers visualizing the operation of analog circuits. Looks at how to rap

Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits

Science.gov (United States)

Sporea, R. A.; Trainor, M. J.; Young, N. D.; Shannon, J. M.; Silva, S. R. P.

2014-03-01

Ultra-large-scale integrated (ULSI) circuits have benefited from successive refinements in device architecture for enormous improvements in speed, power efficiency and areal density. In large-area electronics (LAE), however, the basic building-block, the thin-film field-effect transistor (TFT) has largely remained static. Now, a device concept with fundamentally different operation, the source-gated transistor (SGT) opens the possibility of unprecedented functionality in future low-cost LAE. With its simple structure and operational characteristics of low saturation voltage, stability under electrical stress and large intrinsic gain, the SGT is ideally suited for LAE analog applications. Here, we show using measurements on polysilicon devices that these characteristics lead to substantial improvements in gain, noise margin, power-delay product and overall circuit robustness in digital SGT-based designs. These findings have far-reaching consequences, as LAE will form the technological basis for a variety of future developments in the biomedical, civil engineering, remote sensing, artificial skin areas, as well as wearable and ubiquitous computing, or lightweight applications for space exploration.

The effects of advanced digital signal processing concepts on VLSIC/VHSIC design

Science.gov (United States)

Jankowski, C.

Implementations of sophisticated mathematical techniques in advanced digital signal processors can significantly improve performance. Future VLSI and VHSI circuit designs must include the practical realization of these algorithms. A structured design approach is described and illustrated with examples from a RNS FIR filter processor development project. The CAE hardware and software required to support tasks of this complexity are also discussed. An EWS is recommended for controlling essential functions such as logic optimization, simulation and verification. The total IC design system is illustrated with the implementation of a new high performance algorithm for computing complex magnitude.

Ultraprecise parabolic interpolator for numerically controlled machine tools. [Digital differential analyzer circuit

Energy Technology Data Exchange (ETDEWEB)

Davenport, C. M.

1977-02-01

The mathematical basis for an ultraprecise digital differential analyzer circuit for use as a parabolic interpolator on numerically controlled machines has been established, and scaling and other error-reduction techniques have been developed. An exact computer model is included, along with typical results showing tracking to within an accuracy of one part per million.

Contribution of custom-designed integrated circuits to the electronic equipment of multiwire chambers

International Nuclear Information System (INIS)

Prunier, J.

1977-01-01

The first generations of circuits intended to equip the multiwire proportional chambers provided the user with logical type indications (absence or presence of a signal at a given place). This logical indication was soon associated with a semi-analog data (presence or absence of a signal above an analog threshold, i.e. the discrimination function) as with FILAS, RBA and RBB circuits. The evolution continued with the appearance of analog data capture (time, amplitude, charge) and the corresponding circuits: IFT circuits, analog-to-digital converters [fr

Maximum Temperature Detection System for Integrated Circuits

Science.gov (United States)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

25th workshop on Advances in Analog Circuit Design

CERN Document Server

Harpe, Pieter; Makinwa, Kofi

2017-01-01

This book is based on the 18 tutorials presented during the 25th workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including low-power and energy-efficient analog electronics, with specific contributions focusing on the design of continuous-time sigma-delta modulators, automotive electronics, and power management. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.

Performance of digital integrated circuit technologies at very high temperatures

Energy Technology Data Exchange (ETDEWEB)

Prince, J.L.; Draper, B.L.; Rapp, E.A.; Kromberg, J.N.; Fitch, L.T.

1980-01-01

Results of investigations of the performance and reliability of digital bipolar and CMOS integrated circuits over the 25 to 340/sup 0/C range are reported. Included in these results are both parametric variation information and analysis of the functional failure mechanisms. Although most of the work was done using commercially available circuits (TTL and CMOS) and test chips from commercially compatible processes, some results of experimental simulations of dielectrically isolated CMOS are also discussed. It was found that commercial Schottky clamped TTL, and dielectrically isolated, low power Schottky-clamped TTL, functioned to junction temperatures in excess of 325/sup 0/C. Standard gold doped TTL functioned only to 250/sup 0/C, while commercial, isolated I/sup 2/L functioned to the range 250/sup 0/C to 275/sup 0/C. Commercial junction isolated CMOS, buffered and unbuffered, functioned to the range 280/sup 0/C to 310/sup 0/C/sup +/, depending on the manufacturer. Experimental simulations of simple dielectrically isolated CMOS integrated circuits, fabricated with heavier doping levels than normal, functioned to temperatures in excess of 340/sup 0/C. High temperature life testing of experimental, silicone-encapsulated simple TTL and CMOS integrated circuits have shown no obvious life limiting problems to date. No barrier to reliable functionality of TTL bipolar or CMOS integrated ciruits at temperatures in excess of 300/sup 0/C has been found.

Easy digital engineering

International Nuclear Information System (INIS)

Jin, Dal Bok

2002-02-01

This book lists basic of digital engineering, number system and digital code, Boolean algebra and basic logic circuit, simplify of logical expression, combinational circuit, arithmetic circuit, multivibrator circuit, sequential circuit, memory unit of semiconductor and logical element for program, D/A converter and A/D converter, logic element and integrated circuit and logic circuit and micro controller. It has exercises and answers about digital engineering and summary in the end of each chapter.

Design, Simulation and Characteristics Research of the Interface Circuit based on nano-polysilicon thin films pressure sensor

Science.gov (United States)

Zhao, Xiaosong; Zhao, Xiaofeng; Yin, Liang

2018-03-01

This paper presents a interface circuit for nano-polysilicon thin films pressure sensor. The interface circuit includes consist of instrument amplifier and Analog-to-Digital converter (ADC). The instrumentation amplifier with a high common mode rejection ratio (CMRR) is implemented by three stages current feedback structure. At the same time, in order to satisfy the high precision requirements of pressure sensor measure system, the 1/f noise corner of 26.5 mHz can be achieved through chopping technology at a noise density of 38.2 nV/sqrt(Hz).Ripple introduced by chopping technology adopt continuous ripple reduce circuit (RRL), which achieves the output ripple level is lower than noise. The ADC achieves 16 bits significant digit by adopting sigma-delta modulator with fourth-order single-bit structure and digital decimation filter, and finally achieves high precision integrated pressure sensor interface circuit.

Applications of modularized circuit designs in a new hyper-chaotic system circuit implementation

International Nuclear Information System (INIS)

Wang Rui; Sun Hui; Wang Jie-Zhi; Wang Lu; Wang Yan-Chao

2015-01-01

Modularized circuit designs for chaotic systems are introduced in this paper. Especially, a typical improved modularized design strategy is proposed and applied to a new hyper-chaotic system circuit implementation. In this paper, the detailed design procedures are described. Multisim simulations and physical experiments are conducted, and the simulation results are compared with Matlab simulation results for different system parameter pairs. These results are consistent with each other and they verify the existence of the hyper-chaotic attractor for this new hyper-chaotic system. (paper)

New way on designing majorant coincidence circuits

International Nuclear Information System (INIS)

Gajdamaka, R.I.; Kalinnikov, V.A.; Nikityuk, N.M.; Shirikov, V.P.

1982-01-01

A new way of designing fast devices of combinatorial selection by the number of particles passing through a multichannel charged particle detector is decribed. The algorithm of their operation is based on modern algebraic coding theory. By application of analytical computational methods Boolean expressions can be obtianed for designing basic circuits for a large number of inputs. An example of computation of 15 inputs majorant coincidence circuit is considered

Resonance circuits for adiabatic circuits

Directory of Open Access Journals (Sweden)

C. Schlachta

2003-01-01

Full Text Available One of the possible techniques to reduces the power consumption in digital CMOS circuits is to slow down the charge transport. This slowdown can be achieved by introducing an inductor in the charging path. Additionally, the inductor can act as an energy storage element, conserving the energy that is normally dissipated during discharging. Together with the parasitic capacitances from the circuit a LCresonant circuit is formed.

Insulated transcriptional elements enable precise design of genetic circuits.

Science.gov (United States)

Zong, Yeqing; Zhang, Haoqian M; Lyu, Cheng; Ji, Xiangyu; Hou, Junran; Guo, Xian; Ouyang, Qi; Lou, Chunbo

2017-07-03

Rational engineering of biological systems is often complicated by the complex but unwanted interactions between cellular components at multiple levels. Here we address this issue at the level of prokaryotic transcription by insulating minimal promoters and operators to prevent their interaction and enable the biophysical modeling of synthetic transcription without free parameters. This approach allows genetic circuit design with extraordinary precision and diversity, and consequently simplifies the design-build-test-learn cycle of circuit engineering to a mix-and-match workflow. As a demonstration, combinatorial promoters encoding NOT-gate functions were designed from scratch with mean errors of 96% using our insulated transcription elements. Furthermore, four-node transcriptional networks with incoherent feed-forward loops that execute stripe-forming functions were obtained without any trial-and-error work. This insulation-based engineering strategy improves the resolution of genetic circuit technology and provides a simple approach for designing genetic circuits for systems and synthetic biology.Unwanted interactions between cellular components can complicate rational engineering of biological systems. Here the authors design insulated minimal promoters and operators that enable biophysical modeling of bacterial transcription without free parameters for precise circuit design.

A programming language for composable DNA circuits.

Science.gov (United States)

Phillips, Andrew; Cardelli, Luca

2009-08-06

Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing.

Programming languages for circuit design.

Science.gov (United States)

Pedersen, Michael; Yordanov, Boyan

2015-01-01

This chapter provides an overview of a programming language for Genetic Engineering of Cells (GEC). A GEC program specifies a genetic circuit at a high level of abstraction through constraints on otherwise unspecified DNA parts. The GEC compiler then selects parts which satisfy the constraints from a given parts database. GEC further provides more conventional programming language constructs for abstraction, e.g., through modularity. The GEC language and compiler is available through a Web tool which also provides functionality, e.g., for simulation of designed circuits.

Reactor protection system design using application specific integrated circuits

International Nuclear Information System (INIS)

Battle, R.E.; Bryan, W.L.; Kisner, R.A.; Wilson, T.L. Jr.

1992-01-01

Implementing reactor protection systems (RPS) or other engineering safeguard systems with application specific integrated circuits (ASICs) offers significant advantages over conventional analog or software based RPSs. Conventional analog RPSs suffer from setpoints drifts and large numbers of discrete analog electronics, hardware logic, and relays which reduce reliability because of the large number of potential failures of components or interconnections. To resolve problems associated with conventional discrete RPSs and proposed software based RPS systems, a hybrid analog and digital RPS system implemented with custom ASICs is proposed. The actual design of the ASIC RPS resembles a software based RPS but the programmable software portion of each channel is implemented in a fixed digital logic design including any input variable computations. Set point drifts are zero as in proposed software systems, but the verification and validation of the computations is made easier since the computational logic an be exhaustively tested. The functionality is assured fixed because there can be no future changes to the ASIC without redesign and fabrication. Subtle error conditions caused by out of order evaluation or time dependent evaluation of system variables against protection criteria are eliminated by implementing all evaluation computations in parallel for simultaneous results. On- chip redundancy within each RPS channel and continuous self-testing of all channels provided enhanced assurance that a particular channel is available and faults are identified as soon as possible for corrective actions. The use of highly integrated ASICs to implement channel electronics rather than the use of discrete electronics greatly reduces the total number of components and interconnections in the RPS to further increase system reliability. A prototype ASIC RPS channel design and the design environment used for ASIC RPS systems design is discussed

Extend Course for Product Designer in Digital Mobile Era

Science.gov (United States)

CHAO, Fang-Lin; LIU, Tzu-Heng; HUANG, Xian-Chun

2017-12-01

Product design refers to a system of processes from confirming a product’s specifications to product’s structure. Form, technology, and needs must be considered simultaneously to ensure qualities. In recent years, with the advancement of smartphone technology, many products are connected with apps. Designers cannot exclude themselves from this new wave of the trend. In this article, household hydroponic products design is used as an example, to show the close relationship between digital mobile technology and product design in the contemporary world. Regularly measure the amount of liquid to be added is difficult for a consumer who has no professional experience. To facilitate the introduction of small-scale aquaculture systems into the home, we proposed sensor hardware combined with App software, measured EC and pH value and transmitted to the phone. The app can calculate and display the amount of added and control the amount of inserted through a Bluetooth connection. The physical design needs to take into account the connection between the electronic parts and the circuit board, and interface operation. Thus, not only the model of the product but also the user interface has to be integrated to show the product's quality completely. Besides, authors made reflection upon the necessity for adjustments for interdisciplinary courses under the changing digital mobile era. Also, under the current curriculum structure, possible teaching approach is expressed for extending student’s feasibility.

Circuit design for RF transceivers

CERN Document Server

Leenaerts, Domine; Vaucher, Cicero S

2007-01-01

Second edition of this successful 2001 RF Circuit Design book, has been updated, latest technology reviews have been added as well as several actual case studies. Due to the authors being active in industry as well as academia, this should prove to be an essential guide on RF Transceiver Design for students and engineers.

Theory of circuit block switch-off

Directory of Open Access Journals (Sweden)

S. Henzler

2004-01-01

Full Text Available Switching-off unused circuit blocks is a promising approach to supress static leakage currents in ultra deep sub-micron CMOS digital systems. Basic performance parameters of Circuit Block Switch-Off (CBSO schemes are defined and their dependence on basic circuit parameters is estimated. Therefore the design trade-off between strong leakage suppression in idle mode and adequate dynamic performance in active mode can be supported by simple analytic investigations. Additionally, a guideline for the estimation of the minimum time for which a block deactivation is useful is derived.

Digital Quantum Simulation of Spin Models with Circuit Quantum Electrodynamics

Directory of Open Access Journals (Sweden)

Y. Salathé

2015-06-01

Full Text Available Systems of interacting quantum spins show a rich spectrum of quantum phases and display interesting many-body dynamics. Computing characteristics of even small systems on conventional computers poses significant challenges. A quantum simulator has the potential to outperform standard computers in calculating the evolution of complex quantum systems. Here, we perform a digital quantum simulation of the paradigmatic Heisenberg and Ising interacting spin models using a two transmon-qubit circuit quantum electrodynamics setup. We make use of the exchange interaction naturally present in the simulator to construct a digital decomposition of the model-specific evolution and extract its full dynamics. This approach is universal and efficient, employing only resources that are polynomial in the number of spins, and indicates a path towards the controlled simulation of general spin dynamics in superconducting qubit platforms.

Flexible Simulation E-Learning Environment for Studying Digital Circuits and Possibilities for It Deployment as Semantic Web Service

Science.gov (United States)

Radoyska, P.; Ivanova, T.; Spasova, N.

2011-01-01

In this article we present a partially realized project for building a distributed learning environment for studying digital circuits Test and Diagnostics at TU-Sofia. We describe the main requirements for this environment, substantiate the developer platform choice, and present our simulation and circuit parameter calculation tools.…

Digital electronics

CERN Document Server

Morris, John

2013-01-01

An essential companion to John C Morris's 'Analogue Electronics', this clear and accessible text is designed for electronics students, teachers and enthusiasts who already have a basic understanding of electronics, and who wish to develop their knowledge of digital techniques and applications. Employing a discovery-based approach, the author covers fundamental theory before going on to develop an appreciation of logic networks, integrated circuit applications and analogue-digital conversion. A section on digital fault finding and useful ic data sheets completes th

A new integrated microwave SQUID circuit design

International Nuclear Information System (INIS)

Erne, S.N.; Finnegan, T.F.

1980-01-01

In this paper we consider the design and operation of a planar thin-film rf-SQUID circuit which can be realized via microwave-integrated-circuit (MIC) techniques and which differs substantially from pervious microwave SQUID configurations involving either mechanical point-contact or cylindrical thin-film micro-bridge geometries. (orig.)

Repeater For A Digital-Communication Bus

Science.gov (United States)

Torres-Guzman, Esteban; Olson, Stephen; Heaps, Tim

1993-01-01

Digital repeater circuit designed to extend range of communication on MIL-STD-1553 bus beyond original maximum allowable length of 300 ft. Circuit provides two-way communication, one way at time, and conforms to specifications of MIL-STD-1553. Crosstalk and instability eliminated.

22nd Workshop on Advances in Analog Circuit Design

CERN Document Server

Makinwa, Kofi; Harpe, Pieter

2014-01-01

This book is based on the 18 tutorials presented during the 22nd workshop on Advances in Analog Circuit Design.  Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including frequency reference, power management for systems-on-chip, and smart wireless interfaces.  This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.    ·         Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; ·         Presents material in a tutorial-based format; ·         Includes coverage of frequency reference, power management for systems-on-chip, and smart wireless interfaces.

Printed circuits and their applications: Which way forward?

Science.gov (United States)

Cantatore, E.

2015-09-01

The continuous advancements in printed electronics make nowadays feasible the design of printed circuits which enable meaningful applications. Examples include ultra-low cost sensors embedded in food packaging, large-area sensing surfaces and biomedical assays. This paper offers an overview of state-of-the-art digital and analog circuit blocks, manufactured with a printed complementary organic TFT technology. An analog to digital converter and an RFID tag implemented exploiting these building blocks are also described. The main remaining drawbacks of the printed technology described are identified, and new approaches to further improve the state of the art, enabling more innovative applications are discussed.

PUZZLE - A program for computer-aided design of printed circuit artwork

Science.gov (United States)

Harrell, D. A. W.; Zane, R.

1971-01-01

Program assists in solving spacing problems encountered in printed circuit /PC/ design. It is intended to have maximum use for two-sided PC boards carrying integrated circuits, and also aids design of discrete component circuits.

Design and implementation of therapeutic ultrasound generating circuit for dental tissue formation and tooth-root healing.

Science.gov (United States)

Woon Tiong Ang; Scurtescu, C; Wing Hoy; El-Bialy, T; Ying Yin Tsui; Jie Chen

2010-02-01

Biological tissue healing has recently attracted a great deal of research interest in various medical fields. Trauma to teeth, deep and root caries, and orthodontic treatment can all lead to various degrees of root resorption. In our previous study, we showed that low-intensity pulsed ultrasound (LIPUS) enhances the growth of lower incisor apices and accelerates their rate of eruption in rabbits by inducing dental tissue growth. We also performed clinical studies and demonstrated that LIPUS facilitates the healing of orthodontically induced teeth-root resorption in humans. However, the available LIPUS devices are too large to be used comfortably inside the mouth. In this paper, the design and implementation of a low-power LIPUS generator is presented. The generator is the core of the final intraoral device for preventing tooth root loss and enhancing tooth root tissue healing. The generator consists of a power-supply subsystem, an ultrasonic transducer, an impedance-matching circuit, and an integrated circuit composed of a digital controller circuitry and the associated driver circuit. Most of our efforts focus on the design of the impedance-matching circuit and the integrated system-on-chip circuit. The chip was designed and fabricated using 0.8- ¿m high-voltage technology from Dalsa Semiconductor, Inc. The power supply subsystem and its impedance-matching network are implemented using discrete components. The LIPUS generator was tested and verified to function as designed and is capable of producing ultrasound power up to 100 mW in the vicinity of the transducer's resonance frequency at 1.5 MHz. The power efficiency of the circuitry, excluding the power supply subsystem, is estimated at 70%. The final products will be tailored to the exact size of teeth or biological tissue, which is needed to be used for stimulating dental tissue (dentine and cementum) healing.

Effects of smoke on functional circuits

International Nuclear Information System (INIS)

Tanaka, T.J.

1997-10-01

Nuclear power plants are converting to digital instrumentation and control systems; however, the effects of abnormal environments such as fire and smoke on such systems are not known. There are no standard tests for smoke, but previous smoke exposure tests at Sandia National Laboratories have shown that digital communications can be temporarily interrupted during a smoke exposure. Another concern is the long-term corrosion of metals exposed to the acidic gases produced by a cable fire. This report documents measurements of basic functional circuits during and up to 1 day after exposure to smoke created by burning cable insulation. Printed wiring boards were exposed to the smoke in an enclosed chamber for 1 hour. For high-resistance circuits, the smoke lowered the resistance of the surface of the board and caused the circuits to short during the exposure. These circuits recovered after the smoke was vented. For low-resistance circuits, the smoke caused their resistance to increase slightly. A polyurethane conformal coating substantially reduced the effects of smoke. A high-speed digital circuit was unaffected. A second experiment on different logic chip technologies showed that the critical shunt resistance that would cause failure was dependent on the chip technology and that the components used in the smoke exposures were some of the most smoke tolerant. The smoke densities in these tests were high enough to cause changes in high impedance (resistance) circuits during exposure, but did not affect most of the other circuits. Conformal coatings and the characteristics of chip technologies should be considered when designing circuitry for nuclear power plant safety systems, which must be highly reliable under a variety of operating and accident conditions. 10 refs., 34 figs., 18 tabs

Design and development of improved ballscrew and control circuit for reactivity mechanisms of 220 MWe PHWR operating stations

International Nuclear Information System (INIS)

Jain, A.K.; Rama Mohan, N.; Mathew, Jimmy; Mathur, M.K.; Roy, S.; Ingle, V.J.; Ghoshal, B.; Ashok Kumar, B.; Patil, D.C.; Dwivedi, K.P.; Bhambra, H.S.

2006-01-01

There has been persistent failure of Ballscrews used for Reactivity Mechanism in standardised 220 MWe PHWR units. The detailed review of failures indicated that on one hand the number of demands for operation of Absorber Rod and Regulating Rod had increased due to use of digital circuit in the drive control system as compared analog circuits used earlier. On the other hand, the existing design of ballscrew had some inherent weaknesses to withstand the loads generated during starting and stopping of the regulating rods. To solve these problems two-pronged approach was adopted. The control problem was traced to overshooting of the servomotor of Absorber Rod and Regulating Rod to the full speed at the time of starting and thereafter, settling to the required speed. This sudden overshooting produces a jerk in the drive mechanism. A modified circuit has been evolved to solve this problem. Also, Changing the dead band and gain of control circuits have reduced the number of rod movements. A 'new design' of Ballscrew assembly was finalised by NPCIL with a view to withstand the severe loads generated during starting and stopping of the regulating rods and to achieve enhanced service life under water-lubrication condition. Based on this design, prototype assemblies were successfully manufactured by two Indian manufacturers. The design was cleared for manufacturing of the bulk production of Ballscrew assemblies after evaluation of its performance during rigorous 'Acceptance Testing'. Two ballscrews of new design were installed in the KGS-1 reactor and are operating since July 2005. This paper covers operational feedback including ballscrew failures in various units, Design/Development of Modified Reactivity Mechanism Ballscrews and Control Circuit based on analysis of underlying causes of failures and feedback on performance of new design. (author)

Design and implementation of Gm-APD array readout integrated circuit for infrared 3D imaging

Science.gov (United States)

Zheng, Li-xia; Yang, Jun-hao; Liu, Zhao; Dong, Huai-peng; Wu, Jin; Sun, Wei-feng

2013-09-01

A single-photon detecting array of readout integrated circuit (ROIC) capable of infrared 3D imaging by photon detection and time-of-flight measurement is presented in this paper. The InGaAs avalanche photon diodes (APD) dynamic biased under Geiger operation mode by gate controlled active quenching circuit (AQC) are used here. The time-of-flight is accurately measured by a high accurate time-to-digital converter (TDC) integrated in the ROIC. For 3D imaging, frame rate controlling technique is utilized to the pixel's detection, so that the APD related to each pixel should be controlled by individual AQC to sense and quench the avalanche current, providing a digital CMOS-compatible voltage pulse. After each first sense, the detector is reset to wait for next frame operation. We employ counters of a two-segmental coarse-fine architecture, where the coarse conversion is achieved by a 10-bit pseudo-random linear feedback shift register (LFSR) in each pixel and a 3-bit fine conversion is realized by a ring delay line shared by all pixels. The reference clock driving the LFSR counter can be generated within the ring delay line Oscillator or provided by an external clock source. The circuit is designed and implemented by CSMC 0.5μm standard CMOS technology and the total chip area is around 2mm×2mm for 8×8 format ROIC with 150μm pixel pitch. The simulation results indicate that the relative time resolution of the proposed ROIC can achieve less than 1ns, and the preliminary test results show that the circuit function is correct.

Digital time-interpolator

International Nuclear Information System (INIS)

Schuller, S.; Nationaal Inst. voor Kernfysica en Hoge-Energiefysica

1990-01-01

This report presents a description of the design of a digital time meter. This time meter should be able to measure, by means of interpolation, times of 100 ns with an accuracy of 50 ps. In order to determine the best principle for interpolation, three methods were simulated at the computer with a Pascal code. On the basis of this the best method was chosen and used in the design. In order to test the principal operation of the circuit a part of the circuit was constructed with which the interpolation could be tested. The remainder of the circuit was simulated with a computer. So there are no data available about the operation of the complete circuit in practice. The interpolation part however is the most critical part, the remainder of the circuit is more or less simple logic. Besides this report also gives a description of the principle of interpolation and the design of the circuit. The measurement results at the prototype are presented finally. (author). 3 refs.; 37 figs.; 2 tabs

Clock generators for SOC processors circuits and architectures

CERN Document Server

Fahim, Amr

2004-01-01

This book explores the design of fully-integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. The text takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The comprehensive coverage includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discrete-time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The book provides numerous real world applications, as well as practical rules-of-thumb for modern designers to use at the system, architectural, as well as the circuit level.

Design of delay insensitive circuits using multi-ring structures

DEFF Research Database (Denmark)

Sparsø, Jens; Staunstrup, Jørgen; Dantzer-Sørensen, Michael

1992-01-01

The design and VLSI implementation of a delay insensitive circuit that computes the inner product of two vec·tors is described. The circuit is based on an iterative serial-parallel multiplication algorithm. The design is based on a data flow approach using pipelines and rings that are combined...

A Alternative Analog Circuit Design Methodology Employing Integrated Artificial Intelligence Techniques

Science.gov (United States)

Tuttle, Jeffery L.

In consideration of the computer processing power now available to the designer, an alternative analog circuit design methodology is proposed. Computer memory capacities no longer require the reduction of the transistor operational characteristics to an imprecise formulation. Therefore, it is proposed that transistor modelling be abandoned in favor of fully characterized transistor data libraries. Secondly, availability of the transistor libraries would facilitate an automated selection of the most appropriate device(s) for the circuit being designed. More specifically, a preprocessor computer program to a more sophisticated circuit simulator (e.g. SPICE) is developed to assist the designer in developing the basic circuit topology and the selection of the most appropriate transistor. Once this is achieved, the circuit topology and selected transistor data library would be downloaded to the simulator for full circuit operational characterization and subsequent design modifications. It is recognized that the design process is enhanced by the use of heuristics as applied to iterative design results. Accordingly, an artificial intelligence (AI) interface is developed to assist the designer in applying the preprocessor results. To demonstrate the retrofitability of the AI interface to established programs, the interface is specifically designed to be as non-intrusive to the host code as possible. Implementation of the proposed methodology offers the potential to speed the design process, since the preprocessor both minimizes the required number of simulator runs and provides a higher acceptance potential of the initial and subsequent simulator runs. Secondly, part count reductions may be realizable since the circuit topologies are not as strongly driven by transistor limitations. Thirdly, the predicted results should more closely match actual circuit operations since the inadequacies of the transistor models have been virtually eliminated. Finally, the AI interface

A design method of oscillatory De-Qing circuit

International Nuclear Information System (INIS)

Feng Wenquan

1988-01-01

With some particular advantages the oscillatory De-Qing circuit now is widely used. However its design is very complex. By means of a quantitative analysis for this circuit a group of design formulas is obtained. According to these design formulas the maximum allowable charging inductance L c , the De-Qing network resistance R and capacitance C can easily be determined, if the PFN capacitance C N , the maximum pulse frequency F max , and percentage regulation η are given. Simple and direct formulas for specific situation are listed. Finally, a design example is given and a comparison with experimental result is made, which shows that the design method is feasible and reliable

A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

Science.gov (United States)

Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

2010-01-01

This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

Design And Construction Of Digital Multi-Meter Using PIC Microcontroller

Directory of Open Access Journals (Sweden)

Khawn Nue

2015-07-01

Full Text Available Abstract This thesis describes the design and construction of digital multi-meter using PIC microcontroller. In this system a typical multi-meter may include features such as the ability to measure ACDC voltage DC current resistance temperature diodes frequency and connectivity. This design uses of the PIC microcontroller voltage rectifiers voltage divide potentiometer LCD and other instruments to complete the measure. When we used what we have learned of microprocessors and adjust the program to calculate and show the measures in the LCD keypad selected the modes. The software programming has been incorporated using MPLAB and PROTEUS. In this system the analogue input is taken directly to the analogue input pin of the microcontroller without any other processing. So the input range is from 0V to 5V the maximum source impedance is 2k5 for testing use a 1k pot. To improve the circuit adds an op-amp in front to present greater impedance to the circuit under test. The output impedance of the op-amp will be low which a requirement of the PIC analogue input is.

Design of DSP-based high-power digital solar array simulator

Science.gov (United States)

Zhang, Yang; Liu, Zhilong; Tong, Weichao; Feng, Jian; Ji, Yibo

2013-12-01

To satisfy rigid performance specifications, a feedback control was presented for zoom optical lens plants. With the increasing of global energy consumption, research of the photovoltaic(PV) systems get more and more attention. Research of the digital high-power solar array simulator provides technical support for high-power grid-connected PV systems research.This paper introduces a design scheme of the high-power digital solar array simulator based on TMS320F28335. A DC-DC full-bridge topology was used in the system's main circuit. The switching frequency of IGBT is 25kHz.Maximum output voltage is 900V. Maximum output current is 20A. Simulator can be pre-stored solar panel IV curves.The curve is composed of 128 discrete points .When the system was running, the main circuit voltage and current values was feedback to the DSP by the voltage and current sensors in real-time. Through incremental PI,DSP control the simulator in the closed-loop control system. Experimental data show that Simulator output voltage and current follow a preset solar panels IV curve. In connection with the formation of high-power inverter, the system becomes gridconnected PV system. The inverter can find the simulator's maximum power point and the output power can be stabilized at the maximum power point (MPP).

Electronic circuit encyclopedia 2

Energy Technology Data Exchange (ETDEWEB)

Park, Sun Ho

1992-10-15

This book is composed of 15 chapters, which are amplification of weak signal and measurement circuit audio control and power amplification circuit, data transmission and wireless system, forwarding and isolation, signal converting circuit, counter and comparator, discriminator circuit, oscillation circuit and synthesizer, digital and circuit on computer image processing circuit, sensor drive circuit temperature sensor circuit, magnetic control and application circuit, motor driver circuit, measuring instrument and check tool and power control and stability circuit.

Electronic circuit encyclopedia 2

International Nuclear Information System (INIS)

Park, Sun Ho

1992-10-01

This book is composed of 15 chapters, which are amplification of weak signal and measurement circuit audio control and power amplification circuit, data transmission and wireless system, forwarding and isolation, signal converting circuit, counter and comparator, discriminator circuit, oscillation circuit and synthesizer, digital and circuit on computer image processing circuit, sensor drive circuit temperature sensor circuit, magnetic control and application circuit, motor driver circuit, measuring instrument and check tool and power control and stability circuit.

Monolitic integrated circuit for the strobed charge-to-time converter

International Nuclear Information System (INIS)

Bel'skij, V.I.; Bushnin, Yu.B.; Zimin, S.A.; Punzhin, Yu.N.; Sen'ko, V.A.; Soldatov, M.M.; Tokarchuk, V.P.

1985-01-01

The developed and comercially produced semiconducting circuit - gating charge-to-time converter KR1101PD1 is described. The considered integrated circuit is a short pulse charge-to-time converter with integration of input current. The circuit is designed for construction of time-to-pulse analog-to-digital converters utilized in multichannel detection systems when studying complex topology processes. Input resistance of the circuit is 0.1 Ω permissible input current is 50 mA, maximum measured charge is 300-1000 pC

Power management techniques for integrated circuit design

CERN Document Server

Chen, Ke-Horng

2016-01-01

This book begins with the premise that energy demands are directing scientists towards ever-greener methods of power management, so highly integrated power control ICs (integrated chip/circuit) are increasingly in demand for further reducing power consumption. * A timely and comprehensive reference guide for IC designers dealing with the increasingly widespread demand for integrated low power management * Includes new topics such as LED lighting, fast transient response, DVS-tracking and design with advanced technology nodes * Leading author (Chen) is an active and renowned contributor to the power management IC design field, and has extensive industry experience * Accompanying website includes presentation files with book illustrations, lecture notes, simulation circuits, solution manuals, instructors manuals, and program downloads.

Design automation for integrated nonlinear logic circuits (Conference Presentation)

Science.gov (United States)

Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

2016-05-01

A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite

Signal sampling circuit

NARCIS (Netherlands)

Louwsma, S.M.; Vertregt, Maarten

2011-01-01

A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital

Signal sampling circuit

NARCIS (Netherlands)

Louwsma, S.M.; Vertregt, Maarten

2010-01-01

A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital

Nucleic acids for the rational design of reaction circuits.

Science.gov (United States)

Padirac, Adrien; Fujii, Teruo; Rondelez, Yannick

2013-08-01

Nucleic acid-based circuits are rationally designed in vitro assemblies that can perform complex preencoded programs. They can be used to mimic in silico computations. Recent works emphasized the modularity and robustness of these circuits, which allow their scaling-up. Another new development has led to dynamic, time-responsive systems that can display emergent behaviors like oscillations. These are closely related to biological architectures and provide an in vitro model of in vivo information processing. Nucleic acid circuits have already been used to handle various processes for technological or biotechnological purposes. Future applications of these chemical smart systems will benefit from the rapidly growing ability to design, construct, and model nucleic acid circuits of increasing size. Copyright © 2012 Elsevier Ltd. All rights reserved.

Trigger circuits for the PHENIX electromagnetic calorimeter

International Nuclear Information System (INIS)

Frank, S.S.; Britton, C.L. Jr.; Winterberg, A.L.; Young, G.R.

1997-11-01

Monolithic and discrete circuits have been developed to provide trigger signals for the PHENIX electromagnetic calorimeter detector. These trigger circuits are deadtimeless and create overlapping 4 by 4 energy sums, a cosmic muon trigger, and a 144 channel energy sum. The front end electronics of the PHENIX system sample the energy and timing channels at each bunch crossing (BC) but it is not known immediately if this data is of interest. The information from the trigger circuits is used to determine if the data collected is of interest and should be digitized and stored or discarded. This paper presents details of the design, issues affecting circuit performance, characterization of prototypes fabricated in 1.2 microm Orbit CMOS, and integration of the circuits into the EMCal electronics system

Custom high-reliability radiation-hard CMOS-LSI circuit design

International Nuclear Information System (INIS)

Barnard, W.J.

1981-01-01

Sandia has developed a custom CMOS-LSI design capability to provide high reliability radiation-hardened circuits. This capability relies on (1) proven design practices to enhance reliability, (2) use of well characterized cells and logic modules, (3) computer-aided design tools to reduce design time and errors and to standardize design definition, and (4) close working relationships with the system designer and technology fabrication personnel. Trade-offs are made during the design between circuit complexity/performance and technology/producibility for high reliability and radiation-hardened designs to result. Sandia has developed and is maintaining a radiation-hardened bulk CMOS technology fabrication line for production of prototype and small production volume parts

An optimum design of R-C oscillatory De-Qing circuit

International Nuclear Information System (INIS)

Cao Dezhang; Pan Linghe; Yang Tianlu

1990-01-01

An optimum design of R-C oscillatory De-Qing circuit has been developed for voltage regulation of the pulse modulator. When a new coefficient T 3 /T is introduced, the selection of De-Qing circuit parameters will become quite simple and the optimum parameters can be calculated directly. The De-Qing circuit parameters calculated will be effective in the whole range of the percentage regulation η from zero to maximum design value. The limit value of η is 0.36 or 0.29, theoretically, when the time constant of the De-Qing circuit is 3RC or 5RC respectively

Design structure for in-system redundant array repair in integrated circuits

Science.gov (United States)

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Pulse Detecting Genetic Circuit – A New Design Approach

Science.gov (United States)

Inniss, Mara; Iba, Hitoshi; Way, Jeffrey C.

2016-01-01

A robust cellular counter could enable synthetic biologists to design complex circuits with diverse behaviors. The existing synthetic-biological counters, responsive to the beginning of the pulse, are sensitive to the pulse duration. Here we present a pulse detecting circuit that responds only at the falling edge of a pulse–analogous to negative edge triggered electric circuits. As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events. This transcription-based pulse detecting circuit depends on the interaction of two co-expressed lambdoid phage-derived proteins: the first is unstable and inhibits the regulatory activity of the second, stable protein. At the end of the pulse the unstable inhibitor protein disappears from the cell and the second protein triggers the recording of the event completion. Using stochastic simulation we showed that the proposed design can detect the completion of the pulse irrespective to the pulse duration. In our simulation we also showed that fusing the pulse detector with a phage lambda memory element we can construct a counter which can be extended to count larger numbers. The proposed design principle is a new control mechanism for synthetic biology which can be integrated in different circuits for identifying the completion of an event. PMID:27907045

Pulse-power circuit diagnostics for the Nova laser

International Nuclear Information System (INIS)

Christie, D.J.; Dallum, G.E.; Gritton, D.G.; Merritt, B.T.; Whitham, K.; Berkbigler, L.W.

1982-01-01

The Nova laser will have a large pulse power system for driving laser amplifiers, incorporating approximately 1600 flashlamp circuits. An automated system has been designed for diagnosing the condition of these flashlamp circuits. It records digitized circuit current waveforms and detects current excursions above a given threshold. In addition, it is able to fire flashlamps at a low energy to ascertain the health of the system. Data from this system can be ploted for inspection by the operator, analyzed by the computer system and archived for future reference

Gallium arsenide digital integrated circuits for controlling SLAC CW-RF systems

International Nuclear Information System (INIS)

Ronan, M.T.; Lee, K.L.; Corredoura, P.; Judkins, J.G.

1989-01-01

In order to fill the PEP and SPEAR storage rings with beams from the SLC linac and damping rings, precise control of the linac subharmonic buncher and the damping ring RF is required. Recently several companies have developed resettable GaAs master/slave D-type flip-flops which are capable of operating at frequencies of 3 GHz and higher. Using these digital devices as frequency dividers, one can phase shift the SLAC CW-RF systems to optimize the timing for filling the storage rings. The authors have evaluated the performance of integrated circuits from two vendors for our particular application. Using microstrip circuit techniques, they have built and operated in the accelerator several chassis to synchronize a reset signal from the storage rings to the SLAC 2.856 GHz RF and to phase shift divide-by-four and divide-by-sixteen frequency dividers to the nearest 350 psec bucket required for filling

Gallium arsenide digital integrated circuits for controlling SLAC CW-RF systems

International Nuclear Information System (INIS)

Ronan, M.T.; Lee, K.L.; Corredoura, P.; Judkins, J.G.

1988-10-01

In order to fill the PEP and SPEAR storage rings with beams from the SLC linac and damping rings, precise control of the linac subharmonic buncher and the damping ring RF is required. Recently several companies have developed resettable GaAs master/slave D-type flip-flops which are capable of operating at frequencies of 3 GHz and higher. Using these digital devices as frequency dividers, one can phase shift the SLAC CW-RF systems to optimize the timing for filling the storage rings. We have evaluated the performance of integrated circuits from two vendors for our particular application. Using microstrip circuit techniques, we have built and operated in the accelerator several chassis to synchronize a reset signal from the storage rings to the SLAC 2.856 GHz RF and to phase shift divide-by-four and divide-by-sixteen frequency dividers to the nearest 350 psec bucket required for filling. 4 refs., 4 figs., 2 tabs

Radio frequency integrated circuit design for cognitive radio systems

CERN Document Server

Fahim, Amr

2015-01-01

This book fills a disconnect in the literature between Cognitive Radio systems and a detailed account of the circuit implementation and architectures required to implement such systems.  Throughout the book, requirements and constraints imposed by cognitive radio systems are emphasized when discussing the circuit implementation details.  In addition, this book details several novel concepts that advance state-of-the-art cognitive radio systems.  This is a valuable reference for anybody with background in analog and radio frequency (RF) integrated circuit design, needing to learn more about integrated circuits requirements and implementation for cognitive radio systems. ·         Describes in detail cognitive radio systems, as well as the circuit implementation and architectures required to implement them; ·         Serves as an excellent reference to state-of-the-art wideband transceiver design; ·         Emphasizes practical requirements and constraints imposed by cognitive radi...

A Parallel Genetic Algorithm for Automated Electronic Circuit Design

Science.gov (United States)

Long, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris

2000-01-01

Parallelized versions of genetic algorithms (GAs) are popular primarily for three reasons: the GA is an inherently parallel algorithm, typical GA applications are very compute intensive, and powerful computing platforms, especially Beowulf-style computing clusters, are becoming more affordable and easier to implement. In addition, the low communication bandwidth required allows the use of inexpensive networking hardware such as standard office ethernet. In this paper we describe a parallel GA and its use in automated high-level circuit design. Genetic algorithms are a type of trial-and-error search technique that are guided by principles of Darwinian evolution. Just as the genetic material of two living organisms can intermix to produce offspring that are better adapted to their environment, GAs expose genetic material, frequently strings of 1s and Os, to the forces of artificial evolution: selection, mutation, recombination, etc. GAs start with a pool of randomly-generated candidate solutions which are then tested and scored with respect to their utility. Solutions are then bred by probabilistically selecting high quality parents and recombining their genetic representations to produce offspring solutions. Offspring are typically subjected to a small amount of random mutation. After a pool of offspring is produced, this process iterates until a satisfactory solution is found or an iteration limit is reached. Genetic algorithms have been applied to a wide variety of problems in many fields, including chemistry, biology, and many engineering disciplines. There are many styles of parallelism used in implementing parallel GAs. One such method is called the master-slave or processor farm approach. In this technique, slave nodes are used solely to compute fitness evaluations (the most time consuming part). The master processor collects fitness scores from the nodes and performs the genetic operators (selection, reproduction, variation, etc.). Because of dependency

An experiment in multidisciplinary digital design

NARCIS (Netherlands)

Tuncer, B.; De Ruiter, P.; Mulders, S.

2008-01-01

The design and realization of complex buildings requires multidisciplinary design collaboration from early on in the design process. The intensive use of digital design environments in this process demands new knowledge and skills from the involved players including integrating and managing digital

Benchmarking in digital circuit design automation

NARCIS (Netherlands)

Jozwiak, L.; Gawlowski, D.M.; Slusarczyk, A.S.

2008-01-01

This paper focuses on benchmarking, which is the main experimental approach to the design method and EDA-tool analysis, characterization and evaluation. We discuss the importance and difficulties of benchmarking, as well as the recent research effort related to it. To resolve several serious

CMOS analog integrated circuit design technology; CMOS anarogu IC sekkei gijutsu

Energy Technology Data Exchange (ETDEWEB)

Fujimoto, H.; Fujisawa, A. [Fuji Electric Co. Ltd., Tokyo (Japan)

2000-08-10

In the field of the LSI (large scale integrated circuit) in rapid progress toward high integration and advanced functions, CAD (computer-aided design) technology has become indispensable to LSI development within a short period. Fuji Electric has developed design technologies and automatic design system to develop high-quality analog ICs (integrated circuits), including power supply ICs. within a short period. This paper describes CMOS (complementary metal-oxide semiconductor) analog macro cell, circuit simulation, automatic routing, and backannotation technologies. (author)

Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

Science.gov (United States)

Reagor, James A; Holt, David W

2016-03-01

Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

Carbon Nanotubes-Based Digitally Programmable Current Follower

Directory of Open Access Journals (Sweden)

S. K. Tripathi

2018-01-01

Full Text Available The physical constraints of ever-shrinking CMOS transistors are rapidly approaching atomistic and quantum mechanical limits. Therefore, research is now directed towards the development of nanoscale devices that could work efficiently in the sub-10 nm regime. This coupled with the fact that recent design trend for analog signal processing applications is moving towards current-mode circuits which offer lower voltage swings, higher bandwidth, and better signal linearity is the motivation for this work. A digitally controlled DVCC has been realized using CNFETs. This work exploited the CNFET’s parameters like chirality, pitch, and numbers of CNTs to perform the digital control operation. The circuit has minimum number of transistors and can control the output current digitally. A similar CMOS circuit with 32 nm CMOS parameters was also simulated and compared. The result shows that CMOS-based circuit requires 418.6 μW while CNFET-based circuit consumes 352.1 μW only. Further, the proposed circuit is used to realize a CNFET-based instrumentation amplifier with digitally programmable gain. The amplifier has a CMRR of 100 dB and ICMR equal to 0.806 V. The 3 dB bandwidth of the amplifier is 11.78 GHz which is suitable for the applications like navigation, radar instrumentation, and high-frequency signal amplification and conditioning.

ARSITEKTUR DVD (Digital Virtual Design

Directory of Open Access Journals (Sweden)

Danny Santoso Mintorogo

2000-01-01

Full Text Available Soon after the millennium year of 2000 and toward 21th century, the ways of architecture design will be a great change from traditional hand design and drawings to super computer digital virtual design models with tremendous of high-end architectural 3D software domains. Virtual Technology will be a plus to architectural design stage to obtain several "scheme" and observe with real - time feedback of the quality (height, light, furniture, shape, and environment as well as the sequential of the space, site context or massing studies. Abstract in Bahasa Indonesia : Strategi dalam desain arsitektur pada abad 22 atau setelah tahun milinium 2000 ini akan banyak didominasi dengan perangkap teknologi canggih yang tentunya akan mengandalkan pada perangkap keras (komputer dan perangkap lunak (software untuk tujuan desain arsitektur secara digital. Teknologi "Virtual" akan dimanfaatkan untuk bidang arsitektur dalam mengoptimasikan disain arsitektur secara digital maya, untuk mengobservasi/mengkaji kwalitas ruang, model suatu ruang/massa secara maya dalam phase perancangan arsitektur. Kata kunci: arsitektur, desain, digital, maya.

Analog Circuit Design Optimization Based on Evolutionary Algorithms

Directory of Open Access Journals (Sweden)

Mansour Barari

2014-01-01

Full Text Available This paper investigates an evolutionary-based designing system for automated sizing of analog integrated circuits (ICs. Two evolutionary algorithms, genetic algorithm and PSO (Parswal particle swarm optimization algorithm, are proposed to design analog ICs with practical user-defined specifications. On the basis of the combination of HSPICE and MATLAB, the system links circuit performances, evaluated through specific electrical simulation, to the optimization system in the MATLAB environment, for the selected topology. The system has been tested by typical and hard-to-design cases, such as complex analog blocks with stringent design requirements. The results show that the design specifications are closely met. Comparisons with available methods like genetic algorithms show that the proposed algorithm offers important advantages in terms of optimization quality and robustness. Moreover, the algorithm is shown to be efficient.

Modern TTL circuits manual

CERN Document Server

Marston, R M

2013-01-01

Modern TTL Circuits Manual provides an introduction to the basic principles of Transistor-Transistor Logic (TTL). This book outlines the major features of the 74 series of integrated circuits (ICs) and introduces the various sub-groups of the TTL family.Organized into seven chapters, this book begins with an overview of the basics of digital ICs. This text then examines the symbology and mathematics of digital logic. Other chapters consider a variety of topics, including waveform generator circuitry, clocked flip-flop and counter circuits, special counter/dividers, registers, data latches, com

30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Science.gov (United States)

2010-07-01

... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...

Circuit Design of Surface Acoustic Wave Based Micro Force Sensor

Directory of Open Access Journals (Sweden)

Yuanyuan Li

2014-01-01

Full Text Available Pressure sensors are commonly used in industrial production and mechanical system. However, resistance strain, piezoresistive sensor, and ceramic capacitive pressure sensors possess limitations, especially in micro force measurement. A surface acoustic wave (SAW based micro force sensor is designed in this paper, which is based on the theories of wavelet transform, SAW detection, and pierce oscillator circuits. Using lithium niobate as the basal material, a mathematical model is established to analyze the frequency, and a peripheral circuit is designed to measure the micro force. The SAW based micro force sensor is tested to show the reasonable design of detection circuit and the stability of frequency and amplitude.

Electronic circuit design with HEP computational tools

International Nuclear Information System (INIS)

Vaz, Mario

1996-01-01

CPSPICE is an electronic circuit statistical simulation program developed to run in a parallel environment under UNIX operating system and TCP/IP communications protocol, using CPS - Cooperative Processes Software , SPICE program and CERNLIB software package. It is part of a set of tools being develop, intended to help electronic engineers to design, model and simulate complex systems and circuits for High Energy Physics detectors, based on statistical methods, using the same software and methodology used by HEP physicists for data analysis. CPSPICE simulates electronic circuits by Monte Carlo method, through several different processes running simultaneously SPICE in UNIX parallel computers or workstation farms. Data transfer between CPS processes for a modified version of SPICE2G6 is done by RAM memory, but can also be done through hard disk files if no source files are available for the simulator, and for bigger simulation outputs files. Simulation results are written in a HBOOK file as a NTUPLE, to be examined by HBOOK in batch model or graphics, and analyzed by statistical procedures available. The HBOOK file be stored on hard disk for small amount of data, or into Exabyte tape file for large amount of data. HEP tools also helps circuit or component modeling, like MINUT program from CERNLIB, that implements Nelder and Mead Simplex and Gradient with or without derivatives algorithms, and can be used for design optimization.This paper presents CPSPICE program implementation. The scheme adopted is suitable to make parallel other electronic circuit simulators. (author)

Phase-locked loops. [in analog and digital circuits communication system

Science.gov (United States)

Gupta, S. C.

1975-01-01

An attempt to systematically outline the work done in the area of phase-locked loops which are now used in modern communication system design is presented. The analog phase-locked loops are well documented in several books but discrete, analog-digital, and digital phase-locked loop work is scattered. Apart from discussing the various analysis, design, and application aspects of phase-locked loops, a number of references are given in the bibliography.

Continuous-time digital front-ends for multistandard wireless transmission

CERN Document Server

Nuyts, Pieter A J; Dehaene, Wim

2014-01-01

This book describes the design of fully digital multistandard transmitter front-ends which can directly drive one or more switching power amplifiers, thus eliminating all other analog components.  After reviewing different architectures, the authors focus on polar architectures using pulse width modulation (PWM), which are entirely based on unclocked delay lines and other continuous-time digital hardware.  As a result, readers are enabled to shift accuracy concerns from the voltage domain to the time domain, to coincide with submicron CMOS technology scaling.  The authors present different architectural options and compare them, based on their effect on the signal and spectrum quality.  Next, a high-level theoretical analysis of two different PWM-based architectures – baseband PWM and RF PWM – is made.  On the circuit level, traditional digital components and design techniques are revisited from the point of view of continuous-time digital circuits.  Important design criteria are identified and diff...

Evolvable designs of experiments applications for circuits

CERN Document Server

Iordache, Octavian

2009-01-01

Adopting a groundbreaking approach, the highly regarded author shows how to design methods for planning increasingly complex experiments. He begins with a brief introduction to standard quality methods and the technology in standard electric circuits. The book then gives numerous examples of how to apply the proposed methodology in a series of real-life case studies. Although these case studies are taken from the printed circuit board industry, the methods are equally applicable to other fields of engineering.

High-frequency analog integrated circuit design

CERN Document Server

1995-01-01

To learn more about designing analog integrated circuits (ICs) at microwave frequencies using GaAs materials, turn to this text and reference. It addresses GaAs MESFET-based IC processing. Describes the newfound ability to apply silicon analog design techniques to reliable GaAs materials and devices which, until now, was only available through technical papers scattered throughout hundred of articles in dozens of professional journals.

Practical guide to organic field effect transistor circuit design

CERN Document Server

Sou, Antony

2016-01-01

The field of organic electronics spans a very wide range of disciplines from physics and chemistry to hardware and software engineering. This makes the field of organic circuit design a daunting prospect full of intimidating complexities, yet to be exploited to its true potential. Small focussed research groups also find it difficult to move beyond their usual boundaries and create systems-on-foil that are comparable with the established silicon world.This book has been written to address these issues, intended for two main audiences; firstly, physics or materials researchers who have thus far designed circuits using only basic drawing software; and secondly, experienced silicon CMOS VLSI design engineers who are already knowledgeable in the design of full custom transistor level circuits but are not familiar with organic devices or thin film transistor (TFT) devices.In guiding the reader through the disparate and broad subject matters, a concise text has been written covering the physics and chemistry of the...

Two-wire Interface for Digital Microphones

NARCIS (Netherlands)

Groothedde, Wouter; Klumperink, Eric A.M.; Nauta, Bram; Eschauzier, Rudolphe Gustave Hubertus; van Rijn, Nico

2003-01-01

A two-wire interface for a digital microphone circuit includes a power line and a ground line. The interface utilizes the ground line as a "voltage active line" to transmit both clock and data signals between the digital microphone circuit and a receiving circuit. The digital microphone circuit

Two-Wire interface for digital microphones

NARCIS (Netherlands)

Groothedde, Wouter; Klumperink, Eric A.M.; Nauta, Bram; Eschauzier, Rudolphe Gustave Hubertus; van Rijn, Nico

2005-01-01

A two-wire interface for a digital microphone circuit includes a power line and a ground line. The interface utilizes the ground line as a "voltage active line" to transmit both clock and data signals between the digital microphone circuit and a receiving circuit. The digital microphone circuit

Enabling the Internet of Things from integrated circuits to integrated systems

CERN Document Server

2017-01-01

This book offers the first comprehensive view on integrated circuit and system design for the Internet of Things (IoT), and in particular for the tiny nodes at its edge. The authors provide a fresh perspective on how the IoT will evolve based on recent and foreseeable trends in the semiconductor industry, highlighting the key challenges, as well as the opportunities for circuit and system innovation to address them. This book describes what the IoT really means from the design point of view, and how the constraints imposed by applications translate into integrated circuit requirements and design guidelines. Chapter contributions equally come from industry and academia. After providing a system perspective on IoT nodes, this book focuses on state-of-the-art design techniques for IoT applications, encompassing the fundamental sub-systems encountered in Systems on Chip for IoT: ultra-low power digital architectures and circuits low- and zero-leakage memories (including emerging technologies) circuits for hardwar...

Automated Design of Board and MCM Level Digital Systems.

Science.gov (United States)

1997-10-01

Object- Oriented Programming, 7(6):39-49, October 1994. 46 December 14, 1994 33 [3] Stephen J. Garland, John V. Guttag, and James J. Horning...of Digital Circuits. Mc Graw Hill, 1994. 15 APPENDIX G: ... 93 Multicomponent Partitioning for VLSI System Synthesis Nand Kumar and Ranga Vemuri

Single-flux-quantum circuit technology for superconducting radiation detectors

International Nuclear Information System (INIS)

Fujimaki, Akira; Onogi, Masashi; Matsumoto, Tomohiro; Tanaka, Masamitsu; Sekiya, Akito; Hayakawa, Hisao; Yorozu, Shinichi; Terai, Hirotaka; Yoshikawa, Nobuyuki

2003-01-01

We discuss the application of the single-flux-quantum (SFQ) logic circuits to multi superconducting radiation detectors system. The SFQ-based analog-to-digital converters (ADCs) have the advantage in current sensitivity, which can reach less than 10 nA in a well-tuned ADC. We have also developed the design technology of the SFQ circuits. We demonstrate high-speed operation of large-scale integrated circuits such as a 2x2 cross/bar switch, arithmetic logic unit, indicating that our present SFQ technology is applicable to the multi radiation detectors system. (author)

Design Thinking for Digital Fabrication in Education

DEFF Research Database (Denmark)

Smith, Rachel Charlotte; Iversen, Ole Sejer; Hjorth, Mikkel

2015-01-01

In this paper, we argue that digital fabrication in education may benefit from design thinking, to foster a more profound understanding of digital fabrication processes among students. Two related studies of digital fabrication in education are presented in the paper. In an observational study we...... found that students (eleven to fifteen) lacked an understanding of the complexity of the digital fabrication process impeding on the potentials of digital fabrication in education. In a second explorative research through design study, we investigated how a focus on design thinking affected the students...

[Design of blood-pressure parameter auto-acquisition circuit].

Science.gov (United States)

Chen, Y P; Zhang, D L; Bai, H W; Zhang, D A

2000-02-01

This paper presents the realization and design of a kind of blood-pressure parameter auto-acquisition circuit. The auto-acquisition of blood-pressure parameter controlled by 89C2051 single chip microcomputer is accomplished by collecting and processing the driving signal of LCD. The circuit that is successfully applied in the home unit of telemedicine system has the simple and reliable properties.

Design of An Energy Efficient Hydraulic Regenerative circuit

Science.gov (United States)

Ramesh, S.; Ashok, S. Denis; Nagaraj, Shanmukha; Adithyakumar, C. R.; Reddy, M. Lohith Kumar; Naulakha, Niranjan Kumar

2018-02-01

Increasing cost and power demand, leads to evaluation of new method to increase through productivity and help to solve the power demands. Many researchers have break through to increase the efficiency of a hydraulic power pack, one of the promising methods is the concept of regenerative. The objective of this research work is to increase the efficiency of a hydraulic circuit by introducing a concept of regenerative circuit. A Regenerative circuit is a system that is used to speed up the extension stroke of the double acting single rod hydraulic cylinder. The output is connected to the input in the directional control value. By this concept, increase in velocity of the piston and decrease the cycle time. For the research, a basic hydraulic circuit and a regenerative circuit are designated and compared both with their results. The analysis was based on their time taken for extension and retraction of the piston. From the detailed analysis of both the hydraulic circuits, it is found that the efficiency by introducing hydraulic regenerative circuit increased by is 5.3%. The obtained results conclude that, implementing hydraulic regenerative circuit in a hydraulic power pack decreases power consumption, reduces cycle time and increases productivity in a longer run.

Measurements of the Effects of Smoke on Active Circuits

International Nuclear Information System (INIS)

Tanaka, T.J.

1999-01-01

Smoke has long been recognized as the most common source of fire damage to electrical equipment; however, most failures have been analyzed after the fire was out and the smoke vented. The effects caused while the smoke is still in the air have not been explored. Such effects have implications for new digital equipment being installed in nuclear reactors. The U.S. Nuclear Regulatory Commission is sponsoring work to determine the impact of smoke on digital instrumentation and control. As part of this program, Sandia National Laboratories has tested simple active circuits to determine how smoke affects them. These tests included the study of three possible failure modes on a functional board: (1) circuit bridging, (2) corrosion (metal loss), and (3) induction of stray capacitance. The performance of nine different circuits was measured continuously on bare and conformably coated boards during smoke exposures lasting 1 hour each and continued for 24 hours after the exposure started. The circuit that was most affected by smoke (100% change in measured values) was the one most sensitive to circuit bridging. Its high impedance (50 MOmega) was shorted during the exposure, but in some cases recovered after the smoke was vented. The other two failure modes, corrosion and induced stray capacitance, caused little change in the function of the circuits. The smoke permanently increased resistance of the circuit tested for corrosion, implying that the cent acts were corroded. However, the change was very small (< 2%). The stray-capacitance test circuit showed very little change after a smoke exposure in either the short or long term. The results of the tests suggest that conformal coatings and type of circuit are major considerations when designing digital circuitry to be used in critical control systems

Measurements of the effects of smoke on active circuits

International Nuclear Information System (INIS)

Tanaka, T.J.

1998-01-01

Smoke has long been recognized as the most common source of fire damage to electrical equipment; however, most failures have been analyzed after the fire was out and the smoke vented. The effects caused while the smoke is still in the air have not been explored. Such effects have implications for new digital equipment being installed in nuclear reactors. The US Nuclear Regulatory Commission is sponsoring work to determine the impact of smoke on digital instrumentation and control. As part of this program, Sandia National Laboratories has tested simple active circuits to determine how smoke affects them. These tests included the study of three possible failure modes on a functional board: (1) circuit bridging, (2) corrosion (metal loss), and (3) induction of stray capacitance. The performance of nine different circuits was measured continuously on bare and conformally coated boards during smoke exposures lasting 1 hour each and continued for 24 hours after the exposure started. The circuit that was most affected by smoke (100% change in measured values) was the one most sensitive to circuit bridging. Its high impedance (50 Mohm) was shorted during the exposure, but in some cases recovered after the smoke was vented. The other two failure modes, corrosion and induced stray capacitance, caused little change in the function of the circuits. The smoke permanently increased resistance of the circuit tested for corrosion, implying that the contacts were corroded. However, the change was very small (< 2%). The stray capacitance test circuit showed very little change after a smoke exposure in either the short or long term. The results of the tests suggest that conformal coatings and type of circuit are major considerations when designing digital circuitry to be used in critical control systems

Circuit architecture derivation starting from a formal requirements specification considering a DDS as example

Science.gov (United States)

Garbe, H.; Richter, R.; Jentschel, H.-J.

2004-05-01

Based on a formal specification of a direct digital synthesis (DDS) and assuming the availability of a set of possible circuit architectures we derive a customised system configuration. e calculate the design parameters that can be used for the specification to synthesise the circuit components. We show how the derived parameters and the selected IC technology influence the complexity of the circuit implementation.

Circuit design and simulation of a transmit beamforming ASIC for high-frequency ultrasonic imaging systems.

Science.gov (United States)

Athanasopoulos, Georgios I; Carey, Stephen J; Hatfield, John V

2011-07-01

This paper describes the design of a programmable transmit beamformer application-specific integrated circuit (ASIC) with 8 channels for ultrasound imaging systems. The system uses a 20-MHz reference clock. A digital delay-locked loop (DLL) was designed with 50 variable delay elements, each of which provides a clock with different phase from a single reference. Two phase detectors compare the phase difference of the reference clock with the feedback clock, adjusting the delay of the delay elements to bring the feedback clock signal in phase with the reference clock signal. Two independent control voltages for the delay elements ensure that the mark space ratio of the pulses remain at 50%. By combining a 10- bit asynchronous counter with the delays from the DLL, each channel can be programmed to give a maximum time delay of 51 μs with 1 ns resolution. It can also give bursts of up to 64 pulses. Finally, for a single pulse, it can adjust the pulse width between 9 ns and 100 ns by controlling the current flowing through a capacitor in a one-shot circuit, for use with 40-MHz and 5-MHz transducers, respectively.

Analog circuit design automation for performance

NARCIS (Netherlands)

Ning, Zhen-Qiu; Ning, Zhen-Qiu; Kole, Marq; Kole, M.E.; Mouthaan, A.J.; Wallinga, Hans

1992-01-01

This paper describes an improved version of the program SEAS (a Simulated Evolution approach for Analog circuit Synthesis), in which an approach for selection of alternatives based on the evaluation of mutation values is developed, and design automafion for high performance comparators is covered.

Electromagnetic Compatibility Design of the Computer Circuits

Science.gov (United States)

Zitai, Hong

2018-02-01

Computers and the Internet have gradually penetrated into every aspect of people’s daily work. But with the improvement of electronic equipment as well as electrical system, the electromagnetic environment becomes much more complex. Electromagnetic interference has become an important factor to hinder the normal operation of electronic equipment. In order to analyse the computer circuit compatible with the electromagnetic compatibility, this paper starts from the computer electromagnetic and the conception of electromagnetic compatibility. And then, through the analysis of the main circuit and system of computer electromagnetic compatibility problems, we can design the computer circuits in term of electromagnetic compatibility. Finally, the basic contents and methods of EMC test are expounded in order to ensure the electromagnetic compatibility of equipment.

Design of pressure-driven microfluidic networks using electric circuit analogy.

Science.gov (United States)

Oh, Kwang W; Lee, Kangsun; Ahn, Byungwook; Furlani, Edward P

2012-02-07

This article reviews the application of electric circuit methods for the analysis of pressure-driven microfluidic networks with an emphasis on concentration- and flow-dependent systems. The application of circuit methods to microfluidics is based on the analogous behaviour of hydraulic and electric circuits with correlations of pressure to voltage, volumetric flow rate to current, and hydraulic to electric resistance. Circuit analysis enables rapid predictions of pressure-driven laminar flow in microchannels and is very useful for designing complex microfluidic networks in advance of fabrication. This article provides a comprehensive overview of the physics of pressure-driven laminar flow, the formal analogy between electric and hydraulic circuits, applications of circuit theory to microfluidic network-based devices, recent development and applications of concentration- and flow-dependent microfluidic networks, and promising future applications. The lab-on-a-chip (LOC) and microfluidics community will gain insightful ideas and practical design strategies for developing unique microfluidic network-based devices to address a broad range of biological, chemical, pharmaceutical, and other scientific and technical challenges.

Introduction to logic circuits & logic design with verilog

CERN Document Server

LaMeres, Brock J

2017-01-01

This textbook for courses in Digital Systems Design introduces students to the fundamental hardware used in modern computers. Coverage includes both the classical approach to digital system design (i.e., pen and paper) in addition to the modern hardware description language (HDL) design approach (computer-based). Using this textbook enables readers to design digital systems using the modern HDL approach, but they have a broad foundation of knowledge of the underlying hardware and theory of their designs. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the presentation with learning Goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to “do” after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on ...

Electrostatic Discharge Current Linear Approach and Circuit Design Method

Directory of Open Access Journals (Sweden)

Pavlos K. Katsivelis

2010-11-01

Full Text Available The Electrostatic Discharge phenomenon is a great threat to all electronic devices and ICs. An electric charge passing rapidly from a charged body to another can seriously harm the last one. However, there is a lack in a linear mathematical approach which will make it possible to design a circuit capable of producing such a sophisticated current waveform. The commonly accepted Electrostatic Discharge current waveform is the one set by the IEC 61000-4-2. However, the over-simplified circuit included in the same standard is incapable of producing such a waveform. Treating the Electrostatic Discharge current waveform of the IEC 61000-4-2 as reference, an approximation method, based on Prony’s method, is developed and applied in order to obtain a linear system’s response. Considering a known input, a method to design a circuit, able to generate this ESD current waveform in presented. The circuit synthesis assumes ideal active elements. A simulation is carried out using the PSpice software.

TRANP - a computer code for digital simulation of steady - state and transient behavior of a pressurizer water reactor primary circuit

International Nuclear Information System (INIS)

Chalhoub, E.S.

1980-09-01

A digital computer code TRANP was developed to simulate the steady-state and transient behavior of a pressurizer water reactor primary circuit. The development of this code was based on the combining of three codes already developed for the simulation of a PWR core, a pressurizer, a steam generator and a main coolant pump, representing the primary circuit components. (Author) [pt

ALL-Digital Baseband 65nm PLL/FPLL Clock Multiplier Using 10-Cell Library

Science.gov (United States)

Schuler, Robert L., Jr.; Wu, Qiong; Liu, Rui; Chen, Li; Madala, Shridhar

2014-01-01

PLLs for clock generation are essential for modern circuits, to generate specialized frequencies for many interfaces and high frequencies for chip internal operation. These circuits depend on analog circuits and careful tailoring for each new process, and making them fault tolerant is an incompletely solved problem. Until now, all digital PLLs have been restricted to sampled data DSP techniques and not available for the highest frequency baseband applications. This paper presents the design and preliminary evaluation of an all-digital baseband technique built entirely with an easily portable 10-cell digital library. The library is also described, as it aids in research and low volume design porting to new processes. The advantages of the digital approach are the wide variety of techniques available to give varying degrees of fault tolerance, and the simplicity of porting the design to new processes, even to exotic processes that may not have analog capability. The only tuning parameter is digital gate delay. An all-digital approach presents unique problems and standard analog loop stability design criteria cannot be directly used. Because of the quantization of frequency, there is effectively infinite gain for very small loop error feedback. The numerically controlled oscillator (NCO) based on a tapped delay line cannot be reliably updated while a pulse is active in the delay line, and ordinarily does not have enough frequency resolution for a low-jitter output.

Design and debugging of multi-step analog to digital converters

NARCIS (Netherlands)

Zjajo, A.

2010-01-01

With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. The trend of increasing integration level for integrated circuits has

Digital fluxgate magnetometer: design notes

International Nuclear Information System (INIS)

Belyayev, Serhiy; Ivchenko, Nickolay

2015-01-01

We presented an approach to understanding the performance of a fully digital fluxgate magnetometer. All elements of the design are important for the performance of the instrument, and the presence of the digital feed-back loop introduces certain peculiarities affecting the noise and dynamic performance of the instrument. Ultimately, the quantisation noise of the digital to analogue converter is found to dominate the noise of the current design, although noise shaping alleviates its effect to some extent. An example of magnetometer measurements on board a sounding rocket is presented, and ways to further improve the performance of the instrument are discussed. (paper)

Digital fluxgate magnetometer: design notes

Science.gov (United States)

Belyayev, Serhiy; Ivchenko, Nickolay

2015-12-01

We presented an approach to understanding the performance of a fully digital fluxgate magnetometer. All elements of the design are important for the performance of the instrument, and the presence of the digital feed-back loop introduces certain peculiarities affecting the noise and dynamic performance of the instrument. Ultimately, the quantisation noise of the digital to analogue converter is found to dominate the noise of the current design, although noise shaping alleviates its effect to some extent. An example of magnetometer measurements on board a sounding rocket is presented, and ways to further improve the performance of the instrument are discussed.

Realization of a counter/timer circuit used in digital pulse height analysis in a single chip

International Nuclear Information System (INIS)

Mahmoud, I.I.

2000-01-01

This paper presents a single chip realization of a counter circuit, which is used in random signal processing and nuclear gamma ray spectrometers. The circuit contains a counter to count the repetition rate of a selected pulse train coming from a single channel analyzer circuit. Also, it contains a timer to measure the accumulation period. The timer possesses a predetermined time facility so that processing lasts for a certain adjustable predetermined period. The counter and the timer are synchronized to start and stop simultaneously at the beginning and end of the counting interval. A multiplexed BCD to 7-segment decoder/driver is also included in the circuit. The multiplexing allows the decrease of pin count of the chip.Two stages are designed, simulated for a single channel, however more stages and channels can be added by copying the designed circuits. Schematic flow of Xilinx v.1.2I is used as the design strategy with top-level schematic design containing VHDL and schematic macros

Engineering embedded systems physics, programs, circuits

CERN Document Server

Hintenaus, Peter

2015-01-01

This is a textbook for graduate and final-year-undergraduate computer-science and electrical-engineering students interested in the hardware and software aspects of embedded and cyberphysical systems design. It is comprehensive and self-contained, covering everything from the basics to case-study implementation. Emphasis is placed on the physical nature of the problem domain and of the devices used. The reader is assumed to be familiar on a theoretical level with mathematical tools like ordinary differential equation and Fourier transforms. In this book these tools will be put to practical use. Engineering Embedded Systems begins by addressing basic material on signals and systems, before introducing to electronics. Treatment of digital electronics accentuating synchronous circuits and including high-speed effects proceeds to micro-controllers, digital signal processors and programmable logic. Peripheral units and decentralized networks are given due weight. The properties of analog circuits and devices like ...

CMOS digital integrated circuits a first course

CERN Document Server

Hawkins, Charles; Zarkesh-Ha, Payman

2016-01-01

This book teaches the fundamentals of modern CMOS technology and covers equal treatment to both types of MOSFET transistors that make up computer circuits; power properties of logic circuits; physical and electrical properties of metals; introduction of timing circuit electronics and introduction of layout; real-world examples and problem sets.

Monolithic Microwave Integrated Circuits Based on GaAs Mesfet Technology

Science.gov (United States)

Bahl, Inder J.

Advanced military microwave systems are demanding increased integration, reliability, radiation hardness, compact size and lower cost when produced in large volume, whereas the microwave commercial market, including wireless communications, mandates low cost circuits. Monolithic Microwave Integrated Circuit (MMIC) technology provides an economically viable approach to meeting these needs. In this paper the design considerations for several types of MMICs and their performance status are presented. Multifunction integrated circuits that advance the MMIC technology are described, including integrated microwave/digital functions and a highly integrated transceiver at C-band.

Analog circuits cookbook

CERN Document Server

Hickman, Ian

2013-01-01

Analog Circuits Cookbook presents articles about advanced circuit techniques, components and concepts, useful IC for analog signal processing in the audio range, direct digital synthesis, and ingenious video op-amp. The book also includes articles about amplitude measurements on RF signals, linear optical imager, power supplies and devices, and RF circuits and techniques. Professionals and students of electrical engineering will find the book informative and useful.

Device reliability challenges for modern semiconductor circuit design – a review

Directory of Open Access Journals (Sweden)

C. Schlünder

2009-05-01

Full Text Available Product development based on highly integrated semiconductor circuits faces various challenges. To ensure the function of circuits the electrical parameters of every device must be in a specific window. This window is restricted by competing mechanisms like process variations and device degradation (Fig. 1. Degradation mechanisms like Negative Bias Temperature Instability (NBTI or Hot Carrier Injection (HCI lead to parameter drifts during operation adding on top of the process variations.

The safety margin between real lifetime of MOSFETs and product lifetime requirements decreases at advanced technologies. The assignment of tasks to ensure the product lifetime has to be changed for the future. Up to now technology development has the main responsibility to adjust the technology processes to achieve the required lifetime. In future, reliability can no longer be the task of technology development only. Device degradation becomes a collective challenge for semiconductor technologist, reliability experts and circuit designers. Reliability issues have to be considered in design as well to achieve reliable and competitive products. For this work, designers require support by smart software tools with built-in reliability know how. Design for reliability will be one of the key requirements for modern product designs.

An overview will be given of the physical device damage mechanisms, the operation conditions within circuits leading to stress and the impact of the corresponding device parameter degradation on the function of the circuit. Based on this understanding various approaches for Design for Reliability (DfR will be described. The function of aging simulators will be explained and the flow of circuit-simulation will be described. Furthermore, the difference between full custom and semi custom design and therefore, the different required approaches will be discussed.

Design of Energy Aware Adder Circuits Considering Random Intra-Die Process Variations

Directory of Open Access Journals (Sweden)

Marco Lanuzza

2011-04-01

Full Text Available Energy consumption is one of the main barriers to current high-performance designs. Moreover, the increased variability experienced in advanced process technologies implies further timing yield concerns and therefore intensifies this obstacle. Thus, proper techniques to achieve robust designs are a critical requirement for integrated circuit success. In this paper, the influence of intra-die random process variations is analyzed considering the particular case of the design of energy aware adder circuits. Five well known adder circuits were designed exploiting an industrial 45 nm static complementary metal-oxide semiconductor (CMOS standard cell library. The designed adders were comparatively evaluated under different energy constraints. As a main result, the performed analysis demonstrates that, for a given energy budget, simpler circuits (which are conventionally identified as low-energy slow architectures operating at higher power supply voltages can achieve a timing yield significantly better than more complex faster adders when used in low-power design with supply voltages lower than nominal.

Design, Fabrication and Integration of a NaK-Cooled Circuit

International Nuclear Information System (INIS)

Garber, Anne; Godfroy, Thomas

2006-01-01

The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the NASA Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed for use with a eutectic mixture of sodium potassium (NaK), was redesigned for use with lithium. Due to a shift in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature circuit include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a full design) was selected for fabrication and test. This paper summarizes the integration and preparations for the fill of the pumped NaK circuit. (authors)

High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation

CERN Document Server

Palchaudhuri, Ayan

2016-01-01

This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary “User Constraints File”. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from us...

Characterization of radiation effects in 65 nm digital circuits with the DRAD digital radiation test chip

International Nuclear Information System (INIS)

Casas, L.M. Jara; Ceresa, D.; Kulis, S.; Christiansen, J.; Francisco, R.; Miryala, S.; Gnani, D.

2017-01-01

A Digital RADiation (DRAD) test chip has been specifically designed to study the impact of Total Ionizing Dose (TID) (<1 Grad) and Single Event Upset (SEU) on digital logic gates in a 65 nm CMOS technology. Nine different versions of standard cell libraries are studied in this chip, basically differing in the device dimensions, V t flavor and layout of the device. Each library has eighteen test structures specifically designed to characterize delay degradation and power consumption of the standard cells. For SEU study, a dedicated test structure based on a shift register is designed for each library. TID results up to 500 Mrad are reported.

Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

Science.gov (United States)

McConkey, M. L.

1984-12-01

A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

Voltage linear transformation circuit design

Science.gov (United States)

Sanchez, Lucas R. W.; Jin, Moon-Seob; Scott, R. Phillip; Luder, Ryan J.; Hart, Michael

2017-09-01

Many engineering projects require automated control of analog voltages over a specified range. We have developed a computer interface comprising custom hardware and MATLAB code to provide real-time control of a Thorlabs adaptive optics (AO) kit. The hardware interface includes an op amp cascade to linearly shift and scale a voltage range. With easy modifications, any linear transformation can be accommodated. In AO applications, the design is suitable to drive a range of different types of deformable and fast steering mirrors (FSM's). Our original motivation and application was to control an Optics in Motion (OIM) FSM which requires the customer to devise a unique interface to supply voltages to the mirror controller to set the mirror's angular deflection. The FSM is in an optical servo loop with a wave front sensor (WFS), which controls the dynamic behavior of the mirror's deflection. The code acquires wavefront data from the WFS and fits a plane, which is subsequently converted into its corresponding angular deflection. The FSM provides +/-3° optical angular deflection for a +/-10 V voltage swing. Voltages are applied to the mirror via a National Instruments digital-to-analog converter (DAC) followed by an op amp cascade circuit. This system has been integrated into our Thorlabs AO testbed which currently runs at 11 Hz, but with planned software upgrades, the system update rate is expected to improve to 500 Hz. To show that the FSM subsystem is ready for this speed, we conducted two different PID tuning runs at different step commands. Once 500 Hz is achieved, we plan to make the code and method for our interface solution freely available to the community.

Ultra low-power integrated circuit design for wireless neural interfaces

CERN Document Server

Holleman, Jeremy; Otis, Brian

2014-01-01

Presenting results from real prototype systems, this volume provides an overview of ultra low-power integrated circuits and systems for neural signal processing and wireless communication. Topics include analog, radio, and signal processing theory and design for ultra low-power circuits.

Optimal Design of Rectification Circuit in Electronic Circuit Fault Self-repair Based on EHW and RBT

Institute of Scientific and Technical Information of China (English)

ZHANG Junbin; CAI Jinyan; MENG Yafeng

2018-01-01

Reliability of traditional electronic circuit is improved mainly by redundant fault-tolerant technol-ogy with large hardware resource consumption and limited fault self-repair capability. In complicated environment, electronic circuit faults appear easily. If on-site immedi-ate repair is not implemented, normal running of elec-tronic system will be directly affected. In order to solve these problems, Evolvable hardware (EHW) technology is widely used. The conventional EHW has some bottlenecks. The optimal design of Rectification circuit (RTC) is fur-ther researched on the basis of the previously proposed fault self-repair based on EHW and Reparation balance technology (RBT). Fault sets are selected by fault danger degree and fault coverage rate. The optimal designed RTC can completely repair faults in the fault set. Simulation re-sults prove that it has higher self-repair capability and less hardware resource.

Designable DNA-binding domains enable construction of logic circuits in mammalian cells.

Science.gov (United States)

Gaber, Rok; Lebar, Tina; Majerle, Andreja; Šter, Branko; Dobnikar, Andrej; Benčina, Mojca; Jerala, Roman

2014-03-01

Electronic computer circuits consisting of a large number of connected logic gates of the same type, such as NOR, can be easily fabricated and can implement any logic function. In contrast, designed genetic circuits must employ orthogonal information mediators owing to free diffusion within the cell. Combinatorial diversity and orthogonality can be provided by designable DNA- binding domains. Here, we employed the transcription activator-like repressors to optimize the construction of orthogonal functionally complete NOR gates to construct logic circuits. We used transient transfection to implement all 16 two-input logic functions from combinations of the same type of NOR gates within mammalian cells. Additionally, we present a genetic logic circuit where one input is used to select between an AND and OR function to process the data input using the same circuit. This demonstrates the potential of designable modular transcription factors for the construction of complex biological information-processing devices.

A study on the development of an automatic fault diagnosis system for testing NPP digital electronic circuits

International Nuclear Information System (INIS)

Kim, Dae Sik

1993-02-01

This paper describes a study on the development of an automatic fault diagnosis system for testing digital electronic circuits of nuclear power plants. Compared with the other conventional fault diagnosis systems, the system described in this paper uses Artificial Intelligence technique of model based reasoning and corroboration, which makes fault diagnosis much more efficient. In order to reduce the testing time, an optimal testing set which means a minimal testing set to determine whether or not the circuit is fault-free and to locate the faulty gate was derived. Compared with the testing using an exhaustive testing set, the testing using the optimal testing set makes fault diagnosis much more fast. Since the system diagnoses the circuit boards bases only on input and output signals, it can be further developed for on-line testing. The system was implemented on a microprocessor and was applied for Universal Circuit board testing of the Solid State protection System in nuclear power plants

Beyond the Interconnections: Split Manufacturing in RF Designs

Directory of Open Access Journals (Sweden)

Yu Bi

2015-08-01

Full Text Available With the globalization of the integrated circuit (IC design flow of chip fabrication, intellectual property (IP piracy is becoming the main security threat. While most of the protection methods are dedicated for digital circuits, we are trying to protect radio-frequency (RF designs. For the first time, we applied the split manufacturing method in RF circuit protection. Three different implementation cases are introduced for security and design overhead tradeoffs, i.e., the removal of the top metal layer, the removal of the top two metal layers and the design obfuscation dedicated to RF circuits. We also developed a quantitative security evaluation method to measure the protection level of RF designs under split manufacturing. Finally, a simple Class AB power amplifier and a more sophisticated Class E power amplifier are used for the demonstration through which we prove that: (1 the removal of top metal layer or the top two metal layers can provide high-level protection for RF circuits with a lower request to domestic foundries; (2 the design obfuscation method provides the highest level of circuit protection, though at the cost of design overhead; and (3 split manufacturing may be more suitable for RF designs than for digital circuits, and it can effectively reduce IP piracy in untrusted off-shore foundries.

Process design kit and circuits at a 2 µm technology node for flexible wearable electronics applications (Conference Presentation)

Science.gov (United States)

Torres-Miranda, Miguel; Petritz, Andreas; Gold, Herbert; Stadlober, Barbara

2016-09-01

In this work we present our most advanced technology node of organic thin film transistors (OTFTs) manufactured with a channel length as short as 2 μm by contact photolithography and a self-alignment process directly on a plastic substrate. Our process design kit (PDK) is described with P-type transistors, capacitors and 3 metal layers for connections of complex circuits. The OTFTs are composed of a double dielectric layer with a photopatternable ultra thin polymer (PNDPE) and alumina, with a thickness on the order of 100 nm. The organic semiconductor is either Pentacene or DNTT, which have a stable average mobility up to 0.1 cm2/Vs. Finally, a polymer (e.g.: Parylene-C) is used as a passivation layer. We describe also our design rules for the placement of standard circuit cells. A "plastic wafer" is fabricated containing 49 dies. Each die of 1 cm2 has between 25 to 50 devices, proving larger scale integration in such a small space, unique in organic technologies. Finally, we present the design (by simulations using a Spice model for OTFTs) and the test of analog and digital basic circuits: amplifiers with DC gains of about 20 dB, comparators, inverters and logic gates working in the frequency range of 1-10 kHz. These standard circuit cells could be used for signal conditioning and integrated as active matrices for flexible sensors from 3rd party institutions, thus opening our fab to new ideas and sophisticated pre-industrial low cost applications for the emerging fields of biomedical devices and wearable electronics for virtual/augmented reality.

Design of synthetic biological logic circuits based on evolutionary algorithm.

Science.gov (United States)

Chuang, Chia-Hua; Lin, Chun-Liang; Chang, Yen-Chang; Jennawasin, Tanagorn; Chen, Po-Kuei

2013-08-01

The construction of an artificial biological logic circuit using systematic strategy is recognised as one of the most important topics for the development of synthetic biology. In this study, a real-structured genetic algorithm (RSGA), which combines general advantages of the traditional real genetic algorithm with those of the structured genetic algorithm, is proposed to deal with the biological logic circuit design problem. A general model with the cis-regulatory input function and appropriate promoter activity functions is proposed to synthesise a wide variety of fundamental logic gates such as NOT, Buffer, AND, OR, NAND, NOR and XOR. The results obtained can be extended to synthesise advanced combinational and sequential logic circuits by topologically distinct connections. The resulting optimal design of these logic gates and circuits are established via the RSGA. The in silico computer-based modelling technology has been verified showing its great advantages in the purpose.

Energy efficient circuit design using nanoelectromechanical relays

Science.gov (United States)

Venkatasubramanian, Ramakrishnan

Nano-electromechanical (NEM) relays are a promising class of emerging devices that offer zero off-state leakage and behave like an ideal switch. Recent advances in planar fabrication technology have demonstrated that microelectromechanical (MEMS) scale miniature relays could be manufactured reliably and could be used to build fully functional, complex integrated circuits. The zero leakage operation of relays has renewed the interest in relay based low power logic design. This dissertation explores circuit architectures using NEM relays and NEMS-CMOS heterogeneous integration. Novel circuit topologies for sequential logic, memory, and power management circuits have been proposed taking into consideration the NEM relay device properties and optimizing for energy efficiency and area. In nanoscale electromechanical devices, dispersion forces like Van der Waals' force (vdW) affect the pull-in stability of the relay devices significantly. Verilog-A electromechanical model of the suspended gate relay operating at 1V with a nominal air gap of 5 - 10nm has been developed taking into account all the electrical, mechanical and dispersion effects. This dissertation explores different relay based latch and flip-flop topologies. It has been shown that as few as 4 relay cells could be used to build flip-flops. An integrated voltage doubler based flip flop that improves the performance by 2X by overdriving Vgb has been proposed. Three NEM relay based parallel readout memory bitcell architectures have been proposed that have faster access time, and remove the reliability issues associated with previously reported serial readout architectures. A paradigm shift in design of power switches using NEM relays is proposed. An interesting property of the relay device is that the ON state resistance (Ron) of the NEM relay switch is constant and is insensitive to the gate slew rate. This coupled with infinite OFF state resistance (Roff ) offers significant area and power advantages over CMOS

Wireless and photonic high-speed communication technologies, circuits and design tools

DEFF Research Database (Denmark)

Krozer, Viktor; Johansen, Tom Keinicke; Jiang, Chenhui

2009-01-01

were reported. These communication systems present new challenges for circuit designers. The presentation will be devoted to technologies and various aspects of circuit design for 100 G applications. We will present overview on wired and wireless systems demonstrating the challenges of this research...... including design challenges, relevant trade-offs and the present bottlenecks. Different system architectures will be presented with their impact on component requirements. Similarities and differences of wired and wireless applications will be pointed out. Design methodologies, necessary tools and circuit...... are fundamental to emerging consumer and professional applications. These systems start to emerge as near future applications and are subject of ongoing research activities in Europe, for example within the EU FP6 GIBON project. Wireless systems with over 100 GHz carriers as well as first over 100-G fibre systems...

Design and implementation of JOM-3 Overhauser magnetometer analog circuit

Science.gov (United States)

Zhang, Xiao; Jiang, Xue; Zhao, Jianchang; Zhang, Shuang; Guo, Xin; Zhou, Tingting

2017-09-01

Overhauser magnetometer, a kind of static-magnetic measurement system based on the Overhauser effect, has been widely used in archaeological exploration, mineral resources exploration, oil and gas basin structure detection, prediction of engineering exploration environment, earthquakes and volcanic eruotions, object magnetic measurement and underground buried booty exploration. Overhauser magnetometer plays an important role in the application of magnetic field measurement for its characteristics of small size, low power consumption and high sensitivity. This paper researches the design and the application of the analog circuit of JOM-3 Overhauser magnetometer. First, the Larmor signal output by the probe is very weak. In order to obtain the signal with high signal to noise rstio(SNR), the design of pre-amplifier circuit is the key to improve the quality of the system signal. Second, in this paper, the effectual step which could improve the frequency characters of bandpass filter amplifier circuit were put forward, and theoretical analysis was made for it. Third, the shaping circuit shapes the amplified sine signal into a square wave signal which is suitable for detecting the rising edge. Fourth, this design elaborated the optimized choice of tuning circuit, so the measurement range of the magnetic field can be covered. Last, integrated analog circuit testing system was formed to detect waveform of each module. By calculating the standard deviation, the sensitivity of the improved Overhauser magnetometer is 0.047nT for Earth's magnetic field observation. Experimental results show that the new magnetometer is sensitive to earth field measurement.

Design of secure digital communication systems using chaotic modulation, cryptography and chaotic synchronization

International Nuclear Information System (INIS)

Chien, T.-I.; Liao, T.-L.

2005-01-01

This paper presents a secure digital communication system based on chaotic modulation, cryptography, and chaotic synchronization techniques. The proposed system consists of a Chaotic Modulator (CM), a Chaotic Secure Transmitter (CST), a Chaotic Secure Receiver (CSR) and a Chaotic Demodulator (CDM). The CM module incorporates a chaotic system and a novel Chaotic Differential Peaks Keying (CDPK) modulation scheme to generate analog patterns corresponding to the input digital bits. The CST and CSR modules are designed such that a single scalar signal is transmitted in the public channel. Furthermore, by giving certain structural conditions of a particular class of chaotic system, the CST and the nonlinear observer-based CSR with an appropriate observer gain are constructed to synchronize with each other. These two slave systems are driven simultaneously by the transmitted signal and are designed to synchronize and generate appropriate cryptography keys for encryption and decryption purposes. In the CDM module, a nonlinear observer is designed to estimate the chaotic modulating system in the CM. A demodulation mechanism is then applied to decode the transmitted input digital bits. The effectiveness of the proposed scheme is demonstrated through the numerical simulation of an illustrative communication system. Synchronization between the chaotic circuits of the transmitter and receiver modules is guaranteed through the Lyapunov stability theorem. Finally, the security features of the proposed system in the event of attack by an intruder in either the time domain or the frequency domain are discussed

A 750 MHz semi-digital clock and data recovery circuit with 10−12 BER

International Nuclear Information System (INIS)

Wei Xueming; Wang Yiwen; Li Ping; Luo Heping

2011-01-01

A semi-digital clock and data recovery (CDR) is presented. In order to lower CDR trace jitter and decrease loop latency, an average-based phase detection algorithm is adopted and realized with a novel circuit. Implemented in a 0.13 μm standard 1P8M CMOS process, our CDR is integrated into a high speed serial and de-serial (SERDES) chip. Measurement results of the chip show that the CDR can trace the phase of the input data well and the RMS jitter of the recovery clock in the observation pin is 122 ps at 75 MHz clock frequency, while the bit error rate of the recovery data is less than 10 × 10 −12 . (semiconductor integrated circuits)

Applications of modularized circuit designs in a new hyper-chaotic system circuit implementation

Science.gov (United States)

Wang, Rui; Sun, Hui; Wang, Jie-Zhi; Wang, Lu; Wang, Yan-Chao

2015-02-01

Modularized circuit designs for chaotic systems are introduced in this paper. Especially, a typical improved modularized design strategy is proposed and applied to a new hyper-chaotic system circuit implementation. In this paper, the detailed design procedures are described. Multisim simulations and physical experiments are conducted, and the simulation results are compared with Matlab simulation results for different system parameter pairs. These results are consistent with each other and they verify the existence of the hyper-chaotic attractor for this new hyper-chaotic system. Project supported by the Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 61403395), the Natural Science Foundation of Tianjin, China (Grant No. 13JCYBJC39000), the Scientific Research Foundation for the Returned Overseas Chinese Scholars, State Education Ministry of China, the Fund from the Tianjin Key Laboratory of Civil Aircraft Airworthiness and Maintenance in Civil Aviation of China (Grant No. 104003020106), the National Basic Research Program of China (Grant No. 2014CB744904), and the Fund for the Scholars of Civil Aviation University of China (Grant No. 2012QD21x).

Electronic logic circuits

CERN Document Server

Gibson, J

2013-01-01

Most branches of organizing utilize digital electronic systems. This book introduces the design of such systems using basic logic elements as the components. The material is presented in a straightforward manner suitable for students of electronic engineering and computer science. The book is also of use to engineers in related disciplines who require a clear introduction to logic circuits. This third edition has been revised to encompass the most recent advances in technology as well as the latest trends in components and notation. It includes a wide coverage of application specific integrate

Considerations on Circuit Design and Data Acquisition of a Portable Surface Plasmon Resonance Biosensing System

Directory of Open Access Journals (Sweden)

Keke Chang

2015-08-01

Full Text Available The aim of this study was to develop a circuit for an inexpensive portable biosensing system based on surface plasmon resonance spectroscopy. This portable biosensing system designed for field use is characterized by a special structure which consists of a microfluidic cell incorporating a right angle prism functionalized with a biomolecular identification membrane, a laser line generator and a data acquisition circuit board. The data structure, data memory capacity and a line charge-coupled device (CCD array with a driving circuit for collecting the photoelectric signals are intensively focused on and the high performance analog-to-digital (A/D converter is comprehensively evaluated. The interface circuit and the photoelectric signal amplifier circuit are first studied to obtain the weak signals from the line CCD array in this experiment. Quantitative measurements for validating the sensitivity of the biosensing system were implemented using ethanol solutions of various concentrations indicated by volume fractions of 5%, 8%, 15%, 20%, 25%, and 30%, respectively, without a biomembrane immobilized on the surface of the SPR sensor. The experiments demonstrated that it is possible to detect a change in the refractive index of an ethanol solution with a sensitivity of 4.99838 × 105 ΔRU/RI in terms of the changes in delta response unit with refractive index using this SPR biosensing system, whereby the theoretical limit of detection of 3.3537 × 10−5 refractive index unit (RIU and a high linearity at the correlation coefficient of 0.98065. The results obtained from a series of tests confirmed the practicality of this cost-effective portable SPR biosensing system.

Design of Efficient Mirror Adder in Quantum- Dot Cellular Automata

Science.gov (United States)

Mishra, Prashant Kumar; Chattopadhyay, Manju K.

2018-03-01

Lower power consumption is an essential demand for portable multimedia system using digital signal processing algorithms and architectures. Quantum dot cellular automata (QCA) is a rising nano technology for the development of high performance ultra-dense low power digital circuits. QCA based several efficient binary and decimal arithmetic circuits are implemented, however important improvements are still possible. This paper demonstrate Mirror Adder circuit design in QCA. We present comparative study of mirror adder cells designed using conventional CMOS technique and mirror adder cells designed using quantum-dot cellular automata. QCA based mirror adders are better in terms of area by order of three.

An application specific integrated circuit and data acquisition system for digital X-ray imaging

Energy Technology Data Exchange (ETDEWEB)

Beuville, E.; Cederstroem, B.; Danielsson, M.; Luo, L.; Nygren, D.; Oltman, E.; Vestlund, J. [Lawrence Berkeley National Lab., CA (United States)

1998-04-01

We have developed an application specific integrated circuit (ASIC) and data acquisition system for digital X-ray imaging. The chip consists of 16 parallel channels, each containing preamplifier, shaper, comparator and a 16 bit counter. We have demonstrated noiseless single-photon counting over a threshold of 7.2 keV using Silicon detectors and are presently capable of maximum counting rates of 2 MHz per channel. The ASIC is controlled by a personal computer through a commercial PCI card, which is also used for data acquisition. The content of the 16 bit counters are loaded into a shift register and transferred to the PC at any time at a rate of 20 MHz. The system is non-complicated, low cost and high performance and is optimised for digital X-ray imaging applications. (orig.). 11 refs.

An application specific integrated circuit and data acquisition system for digital X-ray imaging

International Nuclear Information System (INIS)

Beuville, E.; Cederstroem, B.; Danielsson, M.; Luo, L.; Nygren, D.; Oltman, E.; Vestlund, J.

1998-01-01

We have developed an application specific integrated circuit (ASIC) and data acquisition system for digital X-ray imaging. The chip consists of 16 parallel channels, each containing preamplifier, shaper, comparator and a 16 bit counter. We have demonstrated noiseless single-photon counting over a threshold of 7.2 keV using Silicon detectors and are presently capable of maximum counting rates of 2 MHz per channel. The ASIC is controlled by a personal computer through a commercial PCI card, which is also used for data acquisition. The content of the 16 bit counters are loaded into a shift register and transferred to the PC at any time at a rate of 20 MHz. The system is non-complicated, low cost and high performance and is optimised for digital X-ray imaging applications. (orig.)

Design of The High Efficiency Power Factor Correction Circuit for Power Supply

Directory of Open Access Journals (Sweden)

Atiye Hülya OBDAN

2017-12-01

Full Text Available Designing power factor correction circuits for switched power supplies has become important in recent years in terms of efficient use of energy. Power factor correction techniques play a significant role in high power density and energy efficiency. For these purposes, bridgeless PFC topologies and control strategies have been developed alongside basic boost PFC circuits. The power density can be increased using bridgeless structures by means of reducing losses in the circuit. This article examines bridgeless PFC structures and compares their performances in terms of losses and power factor. A semi-bridgeless PFC, which is widely used at high power levels, was analyzed and simulated. The designed circuit simulation using the current mode control method was performed in the PSIM program. A prototype of a 900 W semi-bridgeless PFC circuit was implemented and the results obtained from the circuit are presented

Optimal testing input sets for reduced diagnosis time of nuclear power plant digital electronic circuits

International Nuclear Information System (INIS)

Kim, D.S.; Seong, P.H.

1994-01-01

This paper describes the optimal testing input sets required for the fault diagnosis of the nuclear power plant digital electronic circuits. With the complicated systems such as very large scale integration (VLSI), nuclear power plant (NPP), and aircraft, testing is the major factor of the maintenance of the system. Particularly, diagnosis time grows quickly with the complexity of the component. In this research, for reduce diagnosis time the authors derived the optimal testing sets that are the minimal testing sets required for detecting the failure and for locating of the failed component. For reduced diagnosis time, the technique presented by Hayes fits best for the approach to testing sets generation among many conventional methods. However, this method has the following disadvantages: (a) it considers only the simple network (b) it concerns only whether the system is in failed state or not and does not provide the way to locate the failed component. Therefore the authors have derived the optimal testing input sets that resolve these problems by Hayes while preserving its advantages. When they applied the optimal testing sets to the automatic fault diagnosis system (AFDS) which incorporates the advanced fault diagnosis method of artificial intelligence technique, they found that the fault diagnosis using the optimal testing sets makes testing the digital electronic circuits much faster than that using exhaustive testing input sets; when they applied them to test the Universal (UV) Card which is a nuclear power plant digital input/output solid state protection system card, they reduced the testing time up to about 100 times

Architecture for a 1-GHz Digital RADAR

Science.gov (United States)

Mallik, Udayan

2011-01-01

An architecture for a Direct RF-digitization Type Digital Mode RADAR was developed at GSFC in 2008. Two variations of a basic architecture were developed for use on RADAR imaging missions using aircraft and spacecraft. Both systems can operate with a pulse repetition rate up to 10 MHz with 8 received RF samples per pulse repetition interval, or at up to 19 kHz with 4K received RF samples per pulse repetition interval. The first design describes a computer architecture for a Continuous Mode RADAR transceiver with a real-time signal processing and display architecture. The architecture can operate at a high pulse repetition rate without interruption for an infinite amount of time. The second design describes a smaller and less costly burst mode RADAR that can transceive high pulse repetition rate RF signals without interruption for up to 37 seconds. The burst-mode RADAR was designed to operate on an off-line signal processing paradigm. The temporal distribution of RF samples acquired and reported to the RADAR processor remains uniform and free of distortion in both proposed architectures. The majority of the RADAR's electronics is implemented in digital CMOS (complementary metal oxide semiconductor), and analog circuits are restricted to signal amplification operations and analog to digital conversion. An implementation of the proposed systems will create a 1-GHz, Direct RF-digitization Type, L-Band Digital RADAR--the highest band achievable for Nyquist Rate, Direct RF-digitization Systems that do not implement an electronic IF downsample stage (after the receiver signal amplification stage), using commercially available off-the-shelf integrated circuits.

High-frequency and microwave circuit design

CERN Document Server

Nelson, Charles

2007-01-01

An integral part of any communications system, high-frequency and microwave design stimulates major progress in the wireless world and continues to serve as a foundation for the commercial wireless products we use every day. The exceptional pace of advancement in developing these systems stipulates that engineers be well versed in multiple areas of electronics engineering. With more illustrations, examples, and worked problems, High-Frequency and Microwave Circuit Design, Second Edition provides engineers with a diverse body of knowledge they can use to meet the needs of this rapidly progressi

Design and Testing of Digital Microfluidic Biochips

CERN Document Server

Zhao, Yang

2013-01-01

This book provides a comprehensive methodology for automated design, test and diagnosis, and use of robust, low-cost, and manufacturable digital microfluidic systems. It focuses on the development of a comprehensive CAD optimization framework for digital microfluidic biochips that unifies different design problems. With the increase in system complexity and integration levels, biochip designers can utilize the design methods described in this book to evaluate different design alternatives, and carry out design-space exploration to obtain the best design point. Describes practical design automation tools that address different design problems (e.g., synthesis, droplet routing, control-pin mapping, testing and diagnosis, and error recovery) in a unified manner; Applies test pattern generation and error-recovery techniques for digital microfluidics-based biochips; Uses real bioassays as evaluation examples, e.g., multiplexed in vitro human physiological fluids diagnostics, PCR, protein crystallization.  

Design of an improved RCD buffer circuit for full bridge circuit

Science.gov (United States)

Yang, Wenyan; Wei, Xueye; Du, Yongbo; Hu, Liang; Zhang, Liwei; Zhang, Ou

2017-05-01

In the full bridge inverter circuit, when the switch tube suddenly opened or closed, the inductor current changes rapidly. Due to the existence of parasitic inductance of the main circuit. Therefore, the surge voltage between drain and source of the switch tube can be generated, which will have an impact on the switch and the output voltage. In order to ab sorb the surge voltage. An improve RCD buffer circuit is proposed in the paper. The peak energy will be absorbed through the buffer capacitor of the circuit. The part energy feedback to the power supply, another part release through the resistor in the form of heat, and the circuit can absorb the voltage spikes. This paper analyzes the process of the improved RCD snubber circuit, According to the specific parameters of the main circuit, a reasonable formula for calculating the resistance capacitance is given. A simulation model will be modulated in Multisim, which compared the waveform of tube voltage and the output waveform of the circuit without snubber circuit with the improved RCD snubber circuit. By comparing and analyzing, it is proved that the improved buffer circuit can absorb surge voltage. Finally, experiments are demonstrated to validate that the correctness of the RC formula and the improved RCD snubber circuit.

ADC testing using digital stimuli

NARCIS (Netherlands)

Sheng, Xiaoqin

2014-01-01

The Analogue-to-Digital Converter (ADC) is one of the most typical and widely used mixed-signal circuits. They are applied in video, audio, high-speed communications systems and so on. Many ADCs are integrated into platform-based designs, the architecture which normally contains of standard blocks

A 14-bit 50 MS/s sample-and-hold circuit for pipelined ADC

International Nuclear Information System (INIS)

Yue Sen; Zhao Yiqiang; Pang Ruilong; Sheng Yun

2014-01-01

A high performance sample-and-hold (S/H) circuit used in a pipelined analog-to-digital converter (ADC) is presented. Capacitor flip-around architecture is used in this S/H circuit with a novel gain-boosted differential folded cascode operational transconductance amplifier. A double-bootstrapped switch is designed to improve the performance of the circuit. The circuit is implemented using a 0.18 μm 1P6M CMOS process. Measurement results show that the effective number of bits is 14.03 bits, the spurious free dynamic range is 94.62 dB, the signal to noise and distortion ratio is 86.28 dB, and the total harmonic distortion is −91:84 dB for a 5 MHz input signal with 50 MS/s sampling rate. A pipeline ADC with the designed S/H circuit has been implemented. (semiconductor integrated circuits)

Immunizing digital systems against electromagnetic interference

International Nuclear Information System (INIS)

Ewing, P.D.; Korsah, K.; Antonescu, C.

1993-01-01

This paper discusses the development of the technical basis for acceptance criteria applicable to the immunization of digital systems against electromagnetic interference (EMI). The work is sponsored by the US Nuclear Regulatory Commission and stems from the safety-related issues that need to be addressed as a result of the application of digital instrumentation and control systems in nuclear power plants. Designers of digital circuits are incorporating increasingly higher clock frequencies and lower logic level voltages, thereby leading to potentially greater susceptibility of spurious interference being misinterpreted as legitimate logic. Development of the technical basis for acceptance criteria to apply to these digital systems centers around establishing good engineering practices to ensure that sufficient levels of electromagnetic compatibility (EMC) are maintained between the nuclear power plant's electronic and electromechanical systems. First, good EMC design and installation practices are needed to control the emissions from interference sources and thereby their impact on other nearby circuits and systems. Second, a test and evaluation program is needed to outline the EMI tests to be performed, the associated test methods to be followed, and adequate test limits to ensure that the circuit or system under test meets the recommended guidelines. Test and evaluation should be followed by periodic maintenance to assess whether the recommended EMI control practices continue to be adhered to as part of the routine operation of the nuclear power plant. By following these steps, the probability of encountering safety-related instrumentation problems associated with EMI will be greatly reduced

Immunizing digital systems against electromagnetic interference

International Nuclear Information System (INIS)

Ewing, P.D.; Korsah, K.; Antonescu, C.

1993-01-01

This paper discusses the development of the technical basis for acceptance criteria applicable to the immunization of digital systems against electromagnetic interference (EMI). The work is sponsored by the US Nuclear Regulatory Commission and stems from the safety-related issues that need to be addressed as a result of the application of digital instrumentation and control systems in nuclear power plants. Designers of digital circuits are incorporating increasingly higher clock frequencies and lower logic level voltages, thereby leading to potentially greater susceptibility of spurious interference being misinterpreted as legitimate logic. Development of the technical basis for acceptance criteria to apply to these digital systems centers around establishing good engineering practices to ensure that sufficient levels of electromagnetic compatibility (EMC) are maintained between the nuclear power plant's electronic and electromechanical systems. First, good EMC design and installation practices are needed to control the emissions from interference sources and thereby their impact on other nearby circuits and systems. Secondly, a test and evaluation program is needed to outline the EMI tests to be performed, the associated test methods to be followed, and adequate test limits to ensure that the circuit or system under test meets the recommended guidelines. Test and evaluation should be followed by periodic maintenance to assess whether the recommended EMI control practices continue to be adhered to as part of the routine operation of the nuclear power plant. By following these steps, the probability of encountering safety-related instrumentation problems associated with EMI will be greatly reduced

Exploration and design of smart home circuit based on ZigBee

Science.gov (United States)

Luo, Huirong

2018-05-01

To apply ZigBee technique in smart home circuit design, in the hardware design link of ZigBee node, TI Company's ZigBee wireless communication chip CC2530 was used to complete the design of ZigBee RF module circuit and peripheral circuit. In addition, the function demand and the overall scheme of the intelligent system based on smart home furnishing were proposed. Finally, the smart home system was built by combining ZigBee network and intelligent gateway. The function realization, reliability and power consumption of ZigBee network were tested. The results showed that ZigBee technology was applied to smart home system, making it have some advantages in terms of flexibility, scalability, power consumption and indoor aesthetics. To sum up, the system has high application value.

Digital systems from logic gates to processors

CERN Document Server

Deschamps, Jean-Pierre; Terés, Lluís

2017-01-01

This textbook for a one-semester course in Digital Systems Design describes the basic methods used to develop “traditional” Digital Systems, based on the use of logic gates and flip flops, as well as more advanced techniques that enable the design of very large circuits, based on Hardware Description Languages and Synthesis tools. It was originally designed to accompany a MOOC (Massive Open Online Course) created at the Autonomous University of Barcelona (UAB), currently available on the Coursera platform. Readers will learn what a digital system is and how it can be developed, preparing them for steps toward other technical disciplines, such as Computer Architecture, Robotics, Bionics, Avionics and others. In particular, students will learn to design digital systems of medium complexity, describe digital systems using high level hardware description languages, and understand the operation of computers at their most basic level. All concepts introduced are reinforced by plentiful illustrations, examples, ...

Designing charge-sensitive preamplifiers based on low-noise analog integrated circuits

International Nuclear Information System (INIS)

Agakhanyan, T.M.

1998-01-01

The methodology for designing charge-sensitive preamplifiers on the low-noise analog integral circuits, including all the stages: the mathematical synthesis with optimization of the intermediate function; the scheme-technical synthesis with parametric optimization of the scheme and analysis of draft projects with the parameter verification is presented. The designing is conducted on the basis of requirements for signal parameters and noise indices of the preamplifier. The system of automated designing of the charge-sensitive preamplifiers on the low-noise analog integral circuits is developed [ru

A high speed digitizing photomultiplier tube base for the KTeV CsI calorimeter

International Nuclear Information System (INIS)

Whitmore, J.

1994-11-01

A circuit has been designed to digitize PMT signals over an 18-bit dynamic range with 8-bits of resolution. The crucial element of the circuit is the custom charge integrating and encoding (QIE) ASIC. This chip is designed to operate at rates up to 53 MHz, and, in conjunction with an 8-bit FADC, generates 12-bit floating point output. Bench tests of a 17-bit version of the digital base demonstrated excellent noise performance, linearity and pedestal and gain stability. Twenty-five channels of digitizing PMT bases have been built and used for readout of a CsI array in a test beam at CERN. Performance of these devices in a beam environment is discussed

'Speedy' superconducting circuits

International Nuclear Information System (INIS)

Holst, T.

1994-01-01

The most promising concept for realizing ultra-fast superconducting digital circuits is the Rapid Single Flux Quantum (RSFQ) logic. The basic physical principle behind RSFQ logic, which include the storage and transfer of individual magnetic flux quanta in Superconducting Quantum Interference Devices (SQUIDs), is explained. A Set-Reset flip-flop is used as an example of the implementation of an RSFQ based circuit. Finally, the outlook for high-temperature superconducting materials in connection with RSFQ circuits is discussed in some details. (au)

High performance 14-bit pipelined redundant signed digit ADC

International Nuclear Information System (INIS)

Narula, Swina; Pandey, Sujata

2016-01-01

A novel architecture of a pipelined redundant-signed-digit analog to digital converter (RSD-ADC) is presented featuring a high signal to noise ratio (SNR), spurious free dynamic range (SFDR) and signal to noise plus distortion (SNDR) with efficient background correction logic. The proposed ADC architecture shows high accuracy with a high speed circuit and efficient utilization of the hardware. This paper demonstrates the functionality of the digital correction logic of 14-bit pipelined ADC at each 1.5 bit/stage. This prototype of ADC architecture accounts for capacitor mismatch, comparator offset and finite Op-Amp gain error in the MDAC (residue amplification circuit) stages. With the proposed architecture of ADC, SNDR obtained is 85.89 dB, SNR is 85.9 dB and SFDR obtained is 102.8 dB at the sample rate of 100 MHz. This novel architecture of digital correction logic is transparent to the overall system, which is demonstrated by using 14-bit pipelined ADC. After a latency of 14 clocks, digital output will be available at every clock pulse. To describe the circuit behavior of the ADC, VHDL and MATLAB programs are used. The proposed architecture is also capable of reducing the digital hardware. Silicon area is also the complexity of the design. (paper)

Design and experimental results of coaxial circuits for gyroklystron amplifiers

International Nuclear Information System (INIS)

Flaherty, M.K.E.; Lawson, W.; Cheng, J.; Calame, J.P.; Hogan, B.; Latham, P.E.; Granatstein, V.L.

1994-01-01

At the University of Maryland high power microwave source development for use in linear accelerator applications continues with the design and testing of coaxial circuits for gyroklystron amplifiers. This presentation will include experimental results from a coaxial gyroklystron that was tested on the current microwave test bed, and designs for second harmonic coaxial circuits for use in the next generation of the gyroklystron program. The authors present test results for a second harmonic coaxial circuit. Similar to previous second harmonic experiments the input cavity resonated at 9.886 GHz and the output frequency was 19.772 GHz. The coaxial insert was positioned in the input cavity and drift region. The inner conductor consisted of a tungsten rod with copper and ceramic cylinders covering its length. Two tungsten rods that bridged the space between the inner and outer conductors supported the whole assembly. The tube produced over 20 MW of output power with 17% efficiency. Beam interception by the tungsten rods resulted in minor damage. Comparisons with previous non-coaxial circuits showed that the coaxial configuration increased the parameter space over which stable operation was possible. Future experiments will feature an upgraded modulator and beam formation system capable of producing 300 MW of beam power. The fundamental frequency of operation is 8.568 GHz. A second harmonic coaxial gyroklystron circuit was designed for use in the new system. A scattering matrix code predicts a resonant frequency of 17.136 GHz and Q of 260 for the cavity with 95% of the outgoing microwaves in the desired TE032 mode. Efficiency studies of this second harmonic output cavity show 20% expected efficiency. Shorter second harmonic output cavity designs are also being investigated with expected efficiencies near 34%

Principles of modern digital design

CERN Document Server

Lala, Parag K

2007-01-01

A major objective of this book is to fill the gap between traditional logic design principles and logic design/optimization techniques used in practice. Over the last two decades several techniques for computer-aided design and optimization of logic circuits have been developed. However, underlying theories of these techniques are inadequately covered or not covered at all in undergraduate text books. This book covers not only the ""classical"" material found in current text books but also selected materials that modern logic designers need to be familiar with.

Foreword in "RF imperfections in high-rate wireless systems: impact and digital compensation"

NARCIS (Netherlands)

Linnartz, J.P.M.G.; Schenk, Tim

2008-01-01

Foreword This book takes a modern, multidisciplinary view on radio system design: the advantages of digital signal processing are exploited to satisfy the ever increasing demands on better performing, flexible radio frequency (RF) circuits. By accepting that analog circuits are inherently imperfect,

Synthetic Biology: A Unifying View and Review Using Analog Circuits.

Science.gov (United States)

Teo, Jonathan J Y; Woo, Sung Sik; Sarpeshkar, Rahul

2015-08-01

We review the field of synthetic biology from an analog circuits and analog computation perspective, focusing on circuits that have been built in living cells. This perspective is well suited to pictorially, symbolically, and quantitatively representing the nonlinear, dynamic, and stochastic (noisy) ordinary and partial differential equations that rigorously describe the molecular circuits of synthetic biology. This perspective enables us to construct a canonical analog circuit schematic that helps unify and review the operation of many fundamental circuits that have been built in synthetic biology at the DNA, RNA, protein, and small-molecule levels over nearly two decades. We review 17 circuits in the literature as particular examples of feedforward and feedback analog circuits that arise from special topological cases of the canonical analog circuit schematic. Digital circuit operation of these circuits represents a special case of saturated analog circuit behavior and is automatically incorporated as well. Many issues that have prevented synthetic biology from scaling are naturally represented in analog circuit schematics. Furthermore, the deep similarity between the Boltzmann thermodynamic equations that describe noisy electronic current flow in subthreshold transistors and noisy molecular flux in biochemical reactions has helped map analog circuit motifs in electronics to analog circuit motifs in cells and vice versa via a `cytomorphic' approach. Thus, a body of knowledge in analog electronic circuit design, analysis, simulation, and implementation may also be useful in the robust and efficient design of molecular circuits in synthetic biology, helping it to scale to more complex circuits in the future.

Designing reversible arithmetic, logic circuit to implement micro-operation in quantum computation

International Nuclear Information System (INIS)

Kalita, Gunajit; Saikia, Navajit

2016-01-01

The futuristic computing is desired to be more power full with low-power consumption. That is why quantum computing has been a key area of research for quite some time and is getting more and more attention. Quantum logic being reversible, a significant amount of contributions has been reported on reversible logic in recent times. Reversible circuits are essential parts of quantum computers, and hence their designs are of great importance. In this paper, designs of reversible circuits are proposed using a recently proposed reversible gate for arithmetic and logic operations to implement various micro-operations (simple add and subtract, add with carry, subtract with borrow, transfer, incrementing, decrementing etc., and logic operations like XOR, XNOR, complementing etc.) in a reversible computer like quantum computer. The two new reversible designs proposed here for half adder and full adders are also used in the presented reversible circuits to implement various microoperations. The quantum costs of these designs are comparable. Many of the implemented micro-operations are not seen in previous literatures. The performances of the proposed circuits are compared with existing designs wherever available. (paper)

Integrated Circuit Design of 3 Electrode Sensing System Using Two-Stage Operational Amplifier

Science.gov (United States)

Rani, S.; Abdullah, W. F. H.; Zain, Z. M.; N, Aqmar N. Z.

2018-03-01

This paper presents the design of a two-stage operational amplifier(op amp) for 3-electrode sensing system readout circuits. The designs have been simulated using 0.13μm CMOS technology from Silterra (Malaysia) with Mentor graphics tools. The purpose of this projects is mainly to design a miniature interfacing circuit to detect the redox reaction in the form of current using standard analog modules. The potentiostat consists of several op amps combined together in order to analyse the signal coming from the 3-electrode sensing system. This op amp design will be used in potentiostat circuit device and to analyse the functionality for each module of the system.

Designing Robustness to Temperature in a Feedforward Loop Circuit

OpenAIRE

Sen, Shaunak; Kim, Jongmin; Murray, Richard M.

2013-01-01

Incoherent feedforward loops represent important biomolecular circuit elements capable of a rich set of dynamic behavior including adaptation and pulsed responses. Temperature can modulate some of these properties through its effect on the underlying reaction rate parameters. It is generally unclear how to design such a circuit where the properties are robust to variations in temperature. Here, we address this issue using a combination of tools from control and dynamical systems theory as wel...

Digital Circuit Analysis Using an 8080 Processor.

Science.gov (United States)

Greco, John; Stern, Kenneth

1983-01-01

Presents the essentials of a program written in Intel 8080 assembly language for the steady state analysis of a combinatorial logic gate circuit. Program features and potential modifications are considered. For example, the program could also be extended to include clocked/unclocked sequential circuits. (JN)

Electrical, electronics, and digital hardware essentials for scientists and engineers

CERN Document Server

Lipiansky, Ed

2012-01-01

A practical guide for solving real-world circuit board problems Electrical, Electronics, and Digital Hardware Essentials for Scientists and Engineers arms engineers with the tools they need to test, evaluate, and solve circuit board problems. It explores a wide range of circuit analysis topics, supplementing the material with detailed circuit examples and extensive illustrations. The pros and cons of various methods of analysis, fundamental applications of electronic hardware, and issues in logic design are also thoroughly examined. The author draws on more than tw

Ultra-low power circuits based on tunnel FETs for energy harvesting applications

OpenAIRE

Cavalheiro, David

2017-01-01

There has been a tremendous evolution in integrated circuit technology in the past decades. With the scaling of complementary metal-oxide-semiconductor (CMOS) transistors, faster, less power consuming and more complex chips per unit area have made possible electronic gadgets to evolve to what we see today. The increasing demand in electronic portability imposes low power consumption as a key metric to analog and digital circuit design. While dynamic power consumption decreases quadraticall...

Digital Art and Design

Directory of Open Access Journals (Sweden)

Khaldoun A. A. BESOUL

2006-07-01

Full Text Available The desire to create unique things and give free rain to one's imagination served as a powerful impetus to the development of digital art and design software. The commoner was the use of computers the wider variety of professional software was developed. Nowadays the creators and computer designers are receiving more and more new and advanced programs that allow their ideas becoming virtual reality. This research paper looks at the history of the development of graphic editors from the simplest to the most modern and advanced. This brief survey includes the history of different graphic editors’ creation, their features and abilities. This paper highlights the two basic branches of graphic editors – these that are in free use and commercial graphic editors design software. The researcher selected the most powerful and influential graphic editors design software brands like Paint.NET and GIMP among free software and commercial Adobe Photoshop. This paper also dwells upon the way digital art transferred from the exclusively professional business into the hobby for ordinary users. This research paper bears implications for those who are interested in features and potentiality of most popular graphic editors design software.

A basic design of microcontroller based data processor and local display for digital logarithmic power channel

International Nuclear Information System (INIS)

Nur Khasan; Syahrudin Yusuf

2009-01-01

A data processor and its local display for a digital logarithmic power channel, which will be used as a complement and diversification of nuclear reactor instrument, has been designed using micro controller base circuit. This power channel has been designed using TTL device and microcontroller. The roll of the microcontroller will be as data acquisition, data processing for the measurement of percentage reactor power, period and the trip decision. In this design has beer; created display of numerical value will be display on the local display in on-line mode for 1 nV to 10 10 nV neutron flux measurement range. This logarithmic power channel is expected to support the existing instrument which uses analog system in Instrumentation and Control System of nuclear reactor. (author)

The Challenges of Designing Digital Services for Multiple Mobile Platforms

DEFF Research Database (Denmark)

Ghazawneh, Ahmad

2016-01-01

on a multiple case study of three mobile application development firms from Sweden, Denmark and Norway, we synthesize the digital service design taxonomy to understand the challenges faced by third-party developers. Our study identifies a set of challenges in four different levels: user level, platform level...... to tap into and join the digital ecosystem. However, while there is an emerging literature on designing digital services, little empirical evidence exists about challenges faced by third-party developers while designing digital services, and in particular for multiple mobile platforms. Drawing......The value of digital services is increasingly recognized by owners of digital platforms. These services have central role in building and sustaining the business of the digital platform. In order to sustain the design of digital services, owners of digital platforms encourage third-party developers...

Design and Radiation Assessment of Optoelectronic Transceiver Circuits for ITER

CERN Document Server

Leroux, P; Van Uffelen, M; Steyaert, M

2008-01-01

The presented work describes the design and characterization results of different electronic building blocks for a MGy gamma radiation tolerant optoelectronic transceiver aiming at ITER applications. The circuits are implemented using the 70GHz fT SiGe HBT in a 0.35μm BiCMOS technology. A VCSEL driver circuit has been designed and measured up to a TID of 1.6 MGy and up to a bit rate of 622Mbps. No significant degradation is seen in the eye opening of the output signal. On the receiver side, both a 1GHz, 3kΩ transimpedance and a 5GHz Cherry-Hooper amplifier with over 20dB voltage gain have been designed.

Low-power low-noise analog circuits for on-focal-plane signal processing of infrared sensors

Science.gov (United States)

Pain, Bedabrata; Mendis, Sunetra K.; Schober, Robert C.; Nixon, Robert H.; Fossum, Eric R.

1993-10-01

On-focal-plane signal processing circuits for enhancement of IR imager performance are presented. To enable the detection of high background IR images, an in-pixel current-mode background suppression scheme is presented. The background suppression circuit consists of a current memory placed in the feedback loop of a CTIA and is designed for a thousand-fold suppression of the background flux, thereby easing circuit design constraints, and assuring BLIP operation even with detectors having large response non-uniformities. For improving the performance of low-background IR imagers, an on-chip column-parallel analog-to-digital converter (ADC) is presented. The design of a 10-bit ADC with 50 micrometers pitch and based on sigma-delta ((Sigma) -(Delta) ) modulation is presented. A novel IR imager readout technique featuring photoelectron counting in the unit cell is presented for ultra-low background applications. The output of the unit cell is a digital word corresponding to the incident flux density and the readout is noise free. The design of low-power (noise, high-gain (> 100,000), small real estate (60 micrometers pitch) self-biased CMOS amplifiers required for photon counting are presented.

Realistic Realizations Of Threshold Circuits

Science.gov (United States)

Razavi, Hassan M.

1987-08-01

Threshold logic, in which each input is weighted, has many theoretical advantages over the standard gate realization, such as reducing the number of gates, interconnections, and power dissipation. However, because of the difficult synthesis procedure and complicated circuit implementation, their use in the design of digital systems is almost nonexistant. In this study, three methods of NMOS realizations are discussed, and their advantages and shortcomings are explored. Also, the possibility of using the methods to realize multi-valued logic is examined.

Amorphous Zinc Oxide Integrated Wavy Channel Thin Film Transistor Based High Performance Digital Circuits

KAUST Repository

Hanna, Amir

2015-12-04

High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (ZnO) present promising opportunity in that regard, still wide area of improvement exists to increase the performance further. Here, we show a wavy channel (WC) architecture for ZnO integrated TFT which increases transistor width without chip area penalty, enabling high performance in material agnostic way. We further demonstrate digital logic NAND circuit using the WC architecture and compare it to the conventional planar architecture. The WC architecture circuits have shown 2× higher peak-to-peak output voltage for the same input voltage. They also have 3× lower high-to-low propagation delay times, respectively, when compared to the planar architecture. The performance enhancement is attributed to both extra device width and enhanced field effect mobility due to higher gate field electrostatics control.

Automatic Design of Synthetic Gene Circuits through Mixed Integer Non-linear Programming

Science.gov (United States)

Huynh, Linh; Kececioglu, John; Köppe, Matthias; Tagkopoulos, Ilias

2012-01-01

Automatic design of synthetic gene circuits poses a significant challenge to synthetic biology, primarily due to the complexity of biological systems, and the lack of rigorous optimization methods that can cope with the combinatorial explosion as the number of biological parts increases. Current optimization methods for synthetic gene design rely on heuristic algorithms that are usually not deterministic, deliver sub-optimal solutions, and provide no guaranties on convergence or error bounds. Here, we introduce an optimization framework for the problem of part selection in synthetic gene circuits that is based on mixed integer non-linear programming (MINLP), which is a deterministic method that finds the globally optimal solution and guarantees convergence in finite time. Given a synthetic gene circuit, a library of characterized parts, and user-defined constraints, our method can find the optimal selection of parts that satisfy the constraints and best approximates the objective function given by the user. We evaluated the proposed method in the design of three synthetic circuits (a toggle switch, a transcriptional cascade, and a band detector), with both experimentally constructed and synthetic promoter libraries. Scalability and robustness analysis shows that the proposed framework scales well with the library size and the solution space. The work described here is a step towards a unifying, realistic framework for the automated design of biological circuits. PMID:22536398

Integrated Circuit Design in US High-Energy Physics

Energy Technology Data Exchange (ETDEWEB)

Geronimo, G. D. [Brookhaven National Lab. (BNL), Upton, NY (United States); Christian, D. [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Bebek, C. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Garcia-Sciveres, M. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Lippe, H. V. D. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Haller, G. [SLAC National Accelerator Lab., Menlo Park, CA (United States); Grillo, AA [Univ. of California, Santa Cruz, CA (United States); Newcomer, M [Univ. of Pennsylvania, Philadelphia, PA (United States)

2013-07-10

This whitepaper summarizes the status, plans, and challenges in the area of integrated circuit design in the United States for future High Energy Physics (HEP) experiments. It has been submitted to CPAD (Coordinating Panel for Advanced Detectors) and the HEP Community Summer Study 2013(Snowmass on the Mississippi) held in Minnesota July 29 to August 6, 2013. A workshop titled: US Workshop on IC Design for High Energy Physics, HEPIC2013 was held May 30 to June 1, 2013 at Lawrence Berkeley National Laboratory (LBNL). A draft of the whitepaper was distributed to the attendees before the workshop, the content was discussed at the meeting, and this document is the resulting final product. The scope of the whitepaper includes the following topics: Needs for IC technologies to enable future experiments in the three HEP frontiers Energy, Cosmic and Intensity Frontiers; Challenges in the different technology and circuit design areas and the related R&D needs; Motivation for using different fabrication technologies; Outlook of future technologies including 2.5D and 3D; Survey of ICs used in current experiments and ICs targeted for approved or proposed experiments; IC design at US institutes and recommendations for collaboration in the future.

Results and Insights on the Impact of Smoke on Digital Instrumentation and Control

Energy Technology Data Exchange (ETDEWEB)

Tanaka, T. J. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Nowlen, S. P. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

2001-01-31

Smoke can cause interruptions and upsets in active electronics. Because nuclear power plants are replacing analog with digital instrumentation and control systems, qualification guidelines for new systems are being reviewed for severe environments such as smoke and electromagnetic interference. Active digital systems, individual components, and active circuits have been exposed to smoke in a program sponsored by the U.S. Nuclear Regulatory Commission. The circuits and systems were all monitored during the smoke exposure, indicating any immediate effects of the smoke. The major effect of smoke has been to increase leakage currents (through circuit bridging across contacts and leads) and to cause momentary upsets and failures in digital systems. This report summarizes two previous reports and presents new results from conformal coating, memory chip, and hard drive tests. The report describes practices for mitigation of smoke damage through digital system design, fire barriers, ventilation, fire suppressants, and post fire procedures.

Oscillator circuits

CERN Document Server

Graf, Rudolf F

1996-01-01

This series of circuits provides designers with a quick source for oscillator circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listing

Measuring circuits

CERN Document Server

Graf, Rudolf F

1996-01-01

This series of circuits provides designers with a quick source for measuring circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listings

Integrated digital printing of flexible circuits for wireless sensing (Conference Presentation)

Science.gov (United States)

Mei, Ping; Whiting, Gregory L.; Schwartz, David E.; Ng, Tse Nga; Krusor, Brent S.; Ready, Steve E.; Daniel, George; Veres, Janos; Street, Bob

2016-09-01

Wireless sensing has broad applications in a wide variety of fields such as infrastructure monitoring, chemistry, environmental engineering and cold supply chain management. Further development of sensing systems will focus on achieving light weight, flexibility, low power consumption and low cost. Fully printed electronics provide excellent flexibility and customizability, as well as the potential for low cost and large area applications, but lack solutions for high-density, high-performance circuitry. Conventional electronics mounted on flexible printed circuit boards provide high performance but are not digitally fabricated or readily customizable. Incorporation of small silicon dies or packaged chips into a printed platform enables high performance without compromising flexibility or cost. At PARC, we combine high functionality c-Si CMOS and digitally printed components and interconnects to create an integrated platform that can read and process multiple discrete sensors. Our approach facilitates customization to a wide variety of sensors and user interfaces suitable for a broad range of applications including remote monitoring of health, structures and environment. This talk will describe several examples of printed wireless sensing systems. The technologies required for these sensor systems are a mix of novel sensors, printing processes, conventional microchips, flexible substrates and energy harvesting power solutions.

Controller with an ispLS1016 circuit for the utilization of a TV fifo in spectrometric

International Nuclear Information System (INIS)

Arista Romeu, E.; Osorio Deliz, J.F.; Toledo Acosta, R.B.

1997-01-01

It is described the design of a controller based in the integrated circuit ispLS1016 for the utilization of a 256K x 8 FIFO originally for digital video applications in spectroscopy., Co, Zn, Sn, U and Th (deposited in filter paper) are The design was based upon an integrated circuit of the ispLSI family, which allowed drastically to diminish the quantity of utilized components, to obtain a flexible design in less time and to fulfill other specific requirements for spectroscopy applications

The Signal Detection and Control Circuit Design for Confocal Auto-Focus System

OpenAIRE

Yin Liu; Jin Yu; Zeqiang Mo

2016-01-01

Based on the demands of Confocal Auto-Focus system, the implementation method of signal measurement circuit and control circuit is given. Using the high performance instrumental amplifier AD620BN, low noise precision FET Op amplifier AD795JRZ and ultralow offset voltage Op amplifier OP07EP, a signal measurement circuit used to converse the two differential light intensity signal to electric signal is designed. And a control circuit which takes MCU MSP430F149 as core processes the former signa...

Advanced Breakdown Modeling for Solid-State Circuit Design

NARCIS (Netherlands)

Milovanovi?, V.

2010-01-01

Modeling of the effects occurring outside the usual region of application of semiconductor devices is becoming more important with increasing demands set upon electronic systems for simultaneous speed and output power. Analog integrated circuit designers are forced to enter regimes of transistor

Introduction to logic circuits & logic design with VHDL

CERN Document Server

LaMeres, Brock J

2017-01-01

This textbook introduces readers to the fundamental hardware used in modern computers. The only pre-requisite is algebra, so it can be taken by college freshman or sophomore students or even used in Advanced Placement courses in high school. This book presents both the classical approach to digital system design (i.e., pen and paper) in addition to the modern hardware description language (HDL) design approach (computer-based). This textbook enables readers to design digital systems using the modern HDL approach while ensuring they have a solid foundation of knowledge of the underlying hardware and theory of their designs. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the content with learning goals and assessment at its core. Each section addresses a specific learning outcome that the learner should be able to “do” after its completion...

Adder design using a 5-input majority gate in a novel “multilayer gate design paradigm” for quantum dot cellular automata circuits

International Nuclear Information System (INIS)

Kumar, Rohit; Ghosh, Bahniman; Gupta, Shoubhik

2015-01-01

This paper proposes a novel design paradigm for circuits designed in quantum dot cellular automata (QCA) technology. Previously reported QCA circuits in the literature have generally been designed in a single layer which is the main logical block in which the inverter and majority gate are on the base layer, except for the parts where multilayer wire crossing was used. In this paper the concept of multilayer wire crossing has been extended to design logic gates in multilayers. Using a 5-input majority gate in a multilayer, a 1-bit and 2-bit adder have been designed in the proposed multilayer gate design paradigm. A comparison has been made with some adders reported previously in the literature and it has been shown that circuits designed in the proposed design paradigm are much more efficient in terms of area, the requirement of QCA cells in the design and the input–output delay of the circuit. Over all, the availability of one additional spatial dimension makes the design process much more flexible and there is scope for the customizability of logic gate designs to make the circuit compact. (paper)

Micro-circuits for high energy physics

International Nuclear Information System (INIS)

Kunz, P.F.

1978-01-01

Microprogramming is an inherently elegant method for implementing many digital systems. It is a mixture of hardware and software techniques with the logic subsystems controlled by 'instructions' stored in a memory. In the past, designing microprogrammed systems was difficult, tedious, and expensive because the available components were capable of only limited number of functions. Today, however, large blocks of microprogrammed systems have been incorporated into a single integrated circuit, thus microprogramming has become a simple, practical method. (Auth.)

A fully integral, differential, high-speed, low-power consumption CMOS recovery clock circuit

Directory of Open Access Journals (Sweden)

Daniel Pacheco Bautista

2007-09-01

Full Text Available The clock recovery circuit (CRC plays a fundamental role in electronic information recovery systems (hard disks, DVD and CD read/writeable units and baseband digital communication systems in recovering the clock signal contained in the received data. This signal is necessary for synchronising subsequent information processing. Nowadays, this task is difficult to achieve because of the data’s random nature and its high transfer rate. This paper presents the design of a high-performance integral CMOS technology clock recovery circuit (CRC wor-king at 1.2 Gbps and only consuming 17.4 mW using a 3.3V power supply. The circuit was fully differentially designed to obtain high performance. Circuit architecture was based on a conventional phase lock loop (PLL, current mode logic (MCML and a novel two stage ring-based voltage controlled oscillator (VCO. The design used 0.35 μm CMOS AMS process parameters. Hspice simulation results proved the circuit’s high performance, achieving tracking in less than 300 ns.

Design and realisation of integrated circuits for the readout of pixel sensors in high-energy physics and biomedical imaging

Energy Technology Data Exchange (ETDEWEB)

Peric, I.

2004-08-01

Radiation tolerant pixel-readout chip for the ATLAS pixel detector has been designed, implemented in a deep-submicron CMOS technology and successfully tested. The chip contains readout-channels with complex analog and digital circuits. Chip for steering of the DEPFET active-pixel matrix has been implemented in a high-voltage CMOS technology. The chip contains channels which generate fast sequences of high-voltage signals. Detector containing this chip has been successfully tested. Pixel-readout test chip for an X-ray imaging pixel sensor has been designed, implemented in a CMOS technology and tested. Pixel-readout channels are able to simultaneously count the signals generated by passage of individual photons and to sum the total charge generated during exposure time. (orig.)

Revolution of Nuclear Power Plant Design Through Digital Technology

International Nuclear Information System (INIS)

Zhang, L.; Shi, J.; Chen, W.

2015-01-01

In the digital times, digital technology has penetrated into every industry. As the highest safety requirement standard, nuclear power industry needs digital technology more to breed high quality and efficiency. Digital power plant is derived from digital design and the digitisation of power plant transfer is an inevitable trend. This paper introduces the technical solutions and features of digital nuclear power plant construction by Shanghai Nuclear Engineering Research & Design Institute, points out the key points and technical difficulties that exist in the process of construction and can serve as references for further promoting construction of digital nuclear power plant. Digital technology is still flourishing. Although many problems will be encountered in construction, it is believed that digital technology will make nuclear power industry more safe, cost-effective and efficient. (author)

Design of a MGy radiation tolerant resolver-to-digital convertor IC for remotely operated maintenance in harsh environments

Energy Technology Data Exchange (ETDEWEB)

Leroux, Paul, E-mail: paul.leroux@kuleuven.be [KU Leuven, Dept. of Electrical Engineering (ESAT), AdvISe, Kleinhoefstraat 4, 2440 Geel (Belgium); Van Koeckhoven, Wesley; Verbeeck, Jens [KU Leuven, Dept. of Electrical Engineering (ESAT), AdvISe, Kleinhoefstraat 4, 2440 Geel (Belgium); Van Uffelen, Marco; Esqué, Salvador; Ranz, Roberto; Damiani, Carlo [Fusion for Energy, Torres Diagonal Litoral B3, Josep Pla 2, 08019 Barcelona (Spain); Hamilton, David [ITER Organization, Route de Vinon sur Verdon, 13115 Saint Paul-lez-Durance (France)

2014-10-15

During future ITER maintenance operations, sensors and their embarked electronics will be exposed to a hostile and radioactive environment. This paper presents the design of a MGy radiation tolerant 16 bit resolver-to-digital converter (RDC) in 130 nm CMOS technology. The RDC features a Type II digital tracking loop, able to track resolvers with speeds up to 300 rps, and excitation frequencies up to 4 kHz. The RDC uses two integrated ΔΣ-analog-to-digital converters (ADCs) to digitize the resolver outputs. The 16 bit, 10 kHz ADCs utilize a correlated double sampling technique to remove radiation induced offset and 1/f-noise. The front-end features a static angular resolution of 16 bits (4.2 arcsec{sub rms}) and a resolution of 10 bits (6 arcmin{sub rms}) at a rotor speed of 100 rps. The circuit has a simulated radiation tolerance exceeding 1 MGy. It has the ability to operate under temperatures up to 125 °C, and to allow multiplexing with signals from other conventional sensors for compact, robust read-out architectures.

Process Variations and Probabilistic Integrated Circuit Design

CERN Document Server

Haase, Joachim

2012-01-01

Uncertainty in key parameters within a chip and between different chips in the deep sub micron era plays a more and more important role. As a result, manufacturing process spreads need to be considered during the design process.  Quantitative methodology is needed to ensure faultless functionality, despite existing process variations within given bounds, during product development.   This book presents the technological, physical, and mathematical fundamentals for a design paradigm shift, from a deterministic process to a probability-orientated design process for microelectronic circuits.  Readers will learn to evaluate the different sources of variations in the design flow in order to establish different design variants, while applying appropriate methods and tools to evaluate and optimize their design.  Trains IC designers to recognize problems caused by parameter variations during manufacturing and to choose the best methods available to mitigate these issues during the design process; Offers both qual...

Extraction of MOS VLSI (Very-Large-Scale-Integrated) Circuit Models Including Critical Interconnect Parasitics.

Science.gov (United States)

1987-09-01

level descrip- tion without human intervention. Although design rules and the layout function may not be checked, performance verification is still a...digital syvstems.- Proc. I1E1., vol. 69. no. 10. pp. 1200-1211. October 198 1. [2] A. Gupta, AT A circuit extractor." Proc. 20th Design Automiation

CCTV networking and digital technology

CERN Document Server

Damjanovski, Vlado

2005-01-01

Closed circuit television (CCTV) is experiencing a leap in technology using digital techniques, networking and the Internet. The new edition of this high-level professional reference retains the particulars that made the first edition a success, including the details of CCD cameras, lenses, coaxial cables, fiber-optics, and system design, but it is expanded to cover all video compression techniques used in the ever increasing assortment of digital video recorders (DVRs) available on the market today. This new edition of the book CCTV demystifies DVR technology. It also serves to clarify the te

Mechanically and electrically robust metal-mask design for organic CMOS circuits

Science.gov (United States)

Shintani, Michihiro; Qin, Zhaoxing; Kuribara, Kazunori; Ogasahara, Yasuhiro; Hiromoto, Masayuki; Sato, Takashi

2018-04-01

The design of metal masks for fabricating organic CMOS circuits requires the consideration of not only the electrical property of the circuits, but also the mechanical strength of the masks. In this paper, we propose a new design flow for metal masks that realizes coanalysis of the mechanical and electrical properties and enables design exploration considering the trade-off between the two properties. As a case study, we apply a “stitching technique” to the mask design of a ring oscillator and explore the best design. With this technique, mask patterns are divided into separate parts using multiple mask layers to improve the mechanical strength at the cost of high resistance of the vias. By a numerical experiment, the design trade-off of the stitching technique is quantitatively analyzed, and it is demonstrated that the proposed flow is useful for the exploration of the designs of metal masks.

Short circuit protection for a power distribution system

Science.gov (United States)

Owen, J. R., III

1969-01-01

Sensing circuit detects when the output from a matrix is present and when it should be present. The circuit provides short circuit protection for a power distribution system where the selection of the driven load is accomplished by digital logic.

Superior model for fault tolerance computation in designing nano-sized circuit systems

Energy Technology Data Exchange (ETDEWEB)

Singh, N. S. S., E-mail: narinderjit@petronas.com.my; Muthuvalu, M. S., E-mail: msmuthuvalu@gmail.com [Fundamental and Applied Sciences Department, Universiti Teknologi PETRONAS, Bandar Seri Iskandar, Perak (Malaysia); Asirvadam, V. S., E-mail: vijanth-sagayan@petronas.com.my [Electrical and Electronics Engineering Department, Universiti Teknologi PETRONAS, Bandar Seri Iskandar, Perak (Malaysia)

2014-10-24

As CMOS technology scales nano-metrically, reliability turns out to be a decisive subject in the design methodology of nano-sized circuit systems. As a result, several computational approaches have been developed to compute and evaluate reliability of desired nano-electronic circuits. The process of computing reliability becomes very troublesome and time consuming as the computational complexity build ups with the desired circuit size. Therefore, being able to measure reliability instantly and superiorly is fast becoming necessary in designing modern logic integrated circuits. For this purpose, the paper firstly looks into the development of an automated reliability evaluation tool based on the generalization of Probabilistic Gate Model (PGM) and Boolean Difference-based Error Calculator (BDEC) models. The Matlab-based tool allows users to significantly speed-up the task of reliability analysis for very large number of nano-electronic circuits. Secondly, by using the developed automated tool, the paper explores into a comparative study involving reliability computation and evaluation by PGM and, BDEC models for different implementations of same functionality circuits. Based on the reliability analysis, BDEC gives exact and transparent reliability measures, but as the complexity of the same functionality circuits with respect to gate error increases, reliability measure by BDEC tends to be lower than the reliability measure by PGM. The lesser reliability measure by BDEC is well explained in this paper using distribution of different signal input patterns overtime for same functionality circuits. Simulation results conclude that the reliability measure by BDEC depends not only on faulty gates but it also depends on circuit topology, probability of input signals being one or zero and also probability of error on signal lines.

Superior model for fault tolerance computation in designing nano-sized circuit systems

International Nuclear Information System (INIS)

Singh, N. S. S.; Muthuvalu, M. S.; Asirvadam, V. S.

2014-01-01

As CMOS technology scales nano-metrically, reliability turns out to be a decisive subject in the design methodology of nano-sized circuit systems. As a result, several computational approaches have been developed to compute and evaluate reliability of desired nano-electronic circuits. The process of computing reliability becomes very troublesome and time consuming as the computational complexity build ups with the desired circuit size. Therefore, being able to measure reliability instantly and superiorly is fast becoming necessary in designing modern logic integrated circuits. For this purpose, the paper firstly looks into the development of an automated reliability evaluation tool based on the generalization of Probabilistic Gate Model (PGM) and Boolean Difference-based Error Calculator (BDEC) models. The Matlab-based tool allows users to significantly speed-up the task of reliability analysis for very large number of nano-electronic circuits. Secondly, by using the developed automated tool, the paper explores into a comparative study involving reliability computation and evaluation by PGM and, BDEC models for different implementations of same functionality circuits. Based on the reliability analysis, BDEC gives exact and transparent reliability measures, but as the complexity of the same functionality circuits with respect to gate error increases, reliability measure by BDEC tends to be lower than the reliability measure by PGM. The lesser reliability measure by BDEC is well explained in this paper using distribution of different signal input patterns overtime for same functionality circuits. Simulation results conclude that the reliability measure by BDEC depends not only on faulty gates but it also depends on circuit topology, probability of input signals being one or zero and also probability of error on signal lines

Doubling-resolution analog-to-digital conversion based on PIC18F45K80

Directory of Open Access Journals (Sweden)

Yueyang Yuan

2014-08-01

Full Text Available Aiming at the analog signal being converted into the digital with a higher precision, a method to improve the analog-to-digital converter (ADC resolution is proposed and described. Based on the microcomputer PIC18F45K80 in which the internal ADC modules are embedded, a circuit is designed for doubling the resolution of ADC. According to the circuit diagram, the mathematical formula for calculating this resolution is derived. The corresponding software and print circuit board assembly is also prepared. With the experiment, a 13 bit ADC is achieved based on the 12 bit ADC module predesigned in the PIC18F45K80.

Design of Threshold Controller Based Chaotic Circuits

DEFF Research Database (Denmark)

Mohamed, I. Raja; Murali, K.; Sinha, Sudeshna

2010-01-01

We propose a very simple implementation of a second-order nonautonomous chaotic oscillator, using a threshold controller as the only source of nonlinearity. We demonstrate the efficacy and simplicity of our design through numerical and experimental results. Further, we show that this approach...... of using a threshold controller as a nonlinear element, can be extended to obtain autonomous and multiscroll chaotic attractor circuits as well....

Investigation of Classification and Design Requirements for Digital Software for Advanced Research Reactors

Energy Technology Data Exchange (ETDEWEB)

Park, Gee Young; Jung, H. S.; Ryu, J. S.; Park, C

2005-06-15

As the digital technology is being developed drastically, it is being applied to various industrial instrumentation and control (I and C) fields. In the nuclear power plants, I and C systems are also being installed by digital systems replacing their corresponding analog systems installed previously. There had been I and C systems constructed by analog technology especially for the reactor protection system in the research reactor HANARO. Parallel to the pace of the current trend for digital technology, it is desirable that all I and C systems including the safety critical and non-safety systems in an advanced research reactor is to be installed based on the computer based system. There are many attractable features in using digital systems against existing analog systems in that the digital system has a superior performance for a function and it is more flexible than the analog system. And any fruit gained from the newly developed digital technology can be easily incorporated into the existing digital system and hence, the performance improvement of a computer based system can be implemented conveniently and promptly. Moreover, the capability of high integrity in electronic circuits reduces the electronic components needed to construct the processing device and makes the electronic board simple, and this fact reveals that the hardware failure itself are unlikely to occur in the electronic device other than some electric problems. Balanced the fact mentioned above are the roles and related issues of the software loaded on the digital integrated hardware. Some defects in the course of software development might induce a severe damage on the computer system and plant systems and therefore it is obvious that comprehensive and deep considerations are to be placed on the development of the software in the design of I and C system for use in an advanced research reactor. The work investigates the domestic and international standards on the classifications of digital

Design of a semi-custom integrated circuit for the SLAC SLC timing control system

International Nuclear Information System (INIS)

Linstadt, E.

1984-10-01

A semi-custom (gate array) integrated circuit has been designed for use in the SLAC Linear Collider timing and control system. The design process and SLAC's experiences during the phases of the design cycle are described. Issues concerning the partitioning of the design into semi-custom and standard components are discussed. Functional descriptions of the semi-custom integrated circuit and the timing module in which it is used are given

Development of the automatic test pattern generation for NPP digital electronic circuits using the degree of freedom concept

International Nuclear Information System (INIS)

Kim, D.S.; Seong, P.H.

1995-01-01

In this paper, an improved algorithm for automatic test pattern generation (ATG) for nuclear power plant digital electronic circuits--the combinational type of logic circuits is presented. For accelerating and improving the ATG process for combinational circuits the presented ATG algorithm has the new concept--the degree of freedom (DF). The DF, directly computed from the system descriptions such as types of gates and their interconnections, is the criterion to decide which among several alternate lines' logic values required along each path promises to be the most effective in order to accelerate and improve the ATG process. Based on the DF the proposed ATG algorithm is implemented in the automatic fault diagnosis system (AFDS) which incorporates the advanced fault diagnosis method of artificial intelligence technique, it is shown that the AFDS using the ATG algorithm makes Universal Card (UV Card) testing much faster than the present testing practice or by using exhaustive testing sets

Analog circuit design a tutorial guide to applications and solutions

CERN Document Server

Williams, Jim

2011-01-01

* Covers the fundamentals of linear/analog circuit and system design to guide engineers with their design challenges. * Based on the Application Notes of Linear Technology, the foremost designer of high performance analog products, readers will gain practical insights into design techniques and practice. * Broad range of topics, including power management tutorials, switching regulator design, linear regulator design, data conversion, signal conditioning, and high frequency/RF design. * Contributors include the leading lights in analog design, Robert Dobkin, Jim Willia

4-bit digital to analog converter using R-2R ladder and binary weighted resistors

Science.gov (United States)

Diosanto, J.; Batac, M. L.; Pereda, K. J.; Caldo, R.

2017-06-01

The use of a 4-bit digital-to-analog converter using two methods; Binary Weighted Resistors and R-2R Ladder is designed and presented in this paper. The main components that were used in constructing both circuits were different resistor values, operational amplifier (LM741) and single pole double throw switches. Both circuits were designed using MULTISIM software to be able to test the circuit for its ideal application and FRITZING software for the layout designing and fabrication to the printed circuit board. The implementation of both systems in an actual circuit benefits in determining and comparing the advantages and disadvantages of each. It was realized that the binary weighted circuit is more efficient DAC, having lower percentage error of 0.267% compared to R-2R ladder circuit which has a minimum of percentage error of 4.16%.

ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

Science.gov (United States)

Vasile, Stefan; Lipson, Jerold

2012-01-01

The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

Integrated circuits, and design and manufacture thereof

Science.gov (United States)

Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

2006-04-18

A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

Threshold voltage and power-supply tolerance of CMOS logic design families

NARCIS (Netherlands)

Kishor, M.; Pineda de Gyvez, J.

2000-01-01

The advent of deep submicron technologies brings new challenges to digital circuit design. A reduced threshold voltage (VT) and power supply (Vdd) in addition to process variabilities have a direct impact on circuit design. In a semiconductor environment it is conventionally thought that parametric

Multiple-valued logic design based on the multiple-peak BiCMOS-NDR circuits

Directory of Open Access Journals (Sweden)

Kwang-Jow Gan

2016-06-01

Full Text Available Three different multiple-valued logic (MVL designs using the multiple-peak negative-differential-resistance (NDR circuits are investigated. The basic NDR element, which is made of several Si-based metal-oxide-semiconductor field-effect-transistor (MOS and SiGe-based heterojunction-bipolar-transistor (HBT devices, can be implemented by using a standard BiCMOS process. These MVL circuits are designed based on the triggering-pulse control, saw-tooth input signal, and peak-control methods, respectively. However, there are some transient states existing between the multiple stable levels for the first two methods. These states might affect the circuit function in practical application. As a result, our proposed peak-control method for the MVL design can be used to overcome these transient states.

Digitally assisted pipeline ADCs theory and implementation

CERN Document Server

Murmann, Boris

2007-01-01

List of Figures. List of Tables. Acknowledgements. Preface. 1: Introduction. 1. Motivation. 2. Overview. 3. Chapter Organization. 2: Performance Trends. 1. Introduction. 2. Digital Performance Trends. 3. ADC Performance Trends. 3: Scaling Analysis. 1. Introduction. 2. Basic Device Scaling from a Digital Perspective. 3. Technology Metrics for Analog Circuits. 4. Scaling Impact on Matching-Limited Circuits. 5. Scaling Impact on Noise-Limited Circuits. 4: Improving Analog Circuit Efficiency. 1. Introduction. 2. Analog Circuit Challenges. 3. The Cost of Feedback. 4. Two-Stage Feedback Amplifier vs. Open-Loop Gain Stage. 5. Discussion. 5: Open-Loop Pipelined ADCs. 1. A Brief Review of Pipelined ADCs. 2. Conventional Stage Implementation. 3. Open-Loop Pipeline Stages. 4. Alternative Transconductor Implementations. 6: Digital Nonlinearity Correction. 1. Overview. 2. Error Model and Digital Correction. 3. Alternative Error Models. 7: Statistics-Based Parameter Estimation. 1. Introduction. 2. Modulation Approach. 3. R...

A Digital Power Quality Monitoring Equipment Designed for Digital Substation

Science.gov (United States)

Li, Wei; Wang, Xin; Geng, Jiewen

2018-01-01

Taking into account both current status and development trend of digital substation, this paper proposed a design of a new multi-channelled digital power quality monitoring equipment with high compatibility. The overall functional structure, hardware architecture, software architecture, interface architecture and some key techniques such as IEC 61850 modelling of transient event and harmonic measurement method under the condition of non-synchronous sampling are described in this paper.

Circuit designs for measuring reactor period, peak power, and pulse fluence on TRIGA and other pulse reactor

International Nuclear Information System (INIS)

Meyer, R.D.; Thome, F.V.; Williams, R.L.

1976-01-01

Inexpensive circuits for use in evaluating reactor pulse prompt period, peak power, and pulse fluence (NVT) are presented. In addition to low cost, these circuits are easily assembled and calibrated and operate with a high degree of accuracy. The positive period measuring system has been used in evaluating reactivity additions as small as 5 cents (with an accuracy of ±0.1 cents) and as large as $4.50 (accuracy ±2 cents). Reactor peak power is measured digitally with a system accuracy of ±0.04% of a 10 Volt input (±4 mV). The NVT circuit measures over a 2-1/2 decade range, has 3 place resolution and an accuracy of better than 1%. (author)

A Framework for Robust Multivariable Optimization of Integrated Circuits in Space Applications

Science.gov (United States)

DuMonthier, Jeffrey; Suarez, George

2013-01-01

new process specific device models. The system has been used in the design of time to digital converters for laser ranging and time-of-flight mass spectrometry to optimize analog, mixed signal and digital circuits such as charge sensitive amplifiers, comparators, delay elements, radiation tolerant dual interlocked (DICE) flip-flops and two of three voter gates.

Vertically integrated circuit development at Fermilab for detectors

International Nuclear Information System (INIS)

Yarema, R; Deptuch, G; Hoff, J; Khalid, F; Lipton, R; Shenai, A; Trimpl, M; Zimmerman, T

2013-01-01

Today vertically integrated circuits, (a.k.a. 3D integrated circuits) is a popular topic in many trade journals. The many advantages of these circuits have been described such as higher speed due to shorter trace lenghts, the ability to reduce cross talk by placing analog and digital circuits on different levels, higher circuit density without the going to smaller feature sizes, lower interconnect capacitance leading to lower power, reduced chip size, and different processing for the various layers to optimize performance. There are some added advantages specifically for MAPS (Monolithic Active Pixel Sensors) in High Energy Physics: four side buttable pixel arrays, 100% diode fill factor, the ability to move PMOS transistors out of the diode sensing layer, and a increase in channel density. Fermilab began investigating 3D circuits in 2006. Many different bonding processes have been described for fabricating 3D circuits [1]. Fermilab has used three different processes to fabricate several circuits for specific applications in High Energy Physics and X-ray imaging. This paper covers some of the early 3D work at Fermilab and then moves to more recent activities. The major processes we have used are discussed and some of the problems encountered are described. An overview of pertinent 3D circuit designs is presented along with test results thus far.

Implementation of integrated circuit and design of SAR ADC for fully implantable hearing aids.

Science.gov (United States)

Kim, Jong Hoon; Lee, Jyung Hyun; Cho, Jin-Ho

2017-07-20

The hearing impaired population has been increasing; many people suffer from hearing problems. To deal with this difficulty, various types of hearing aids are being rapidly developed. In particular, fully implantable hearing aids are being actively studied to improve the performance of existing hearing aids and to reduce the stigma of hearing loss patients. It has to be of small size and low-power consumption for easy implantation and long-term use. The objective of the study was to implement a small size and low-power consumption successive approximation register analog-to-digital converter (SAR ADC) for fully implantable hearing aids. The ADC was selected as the SAR ADC because its analog circuit components are less required by the feedback circuit of the SAR ADC than the sigma-delta ADC which is conventionally used in hearing aids, and it has advantages in the area and power consumption. So, the circuit of SAR ADC is designed considering the speech region of humans because the objective is to deliver the speech signals of humans to hearing loss patients. If the switch of sample and hold works in the on/off positions, the charge injection and clock feedthrough are produced by a parasitic capacitor. These problems affect the linearity of the hold voltage, and as a result, an error of the bit conversion is generated. In order to solve the problem, a CMOS switch that consists of NMOS and PMOS was used, and it reduces the charge injection because the charge carriers in the NMOS and PMOS have inversed polarity. So, 16 bit conversion is performed before the occurrence of the Least Significant Bit (LSB) error. In order to minimize the offset voltage and power consumption of the designed comparator, we designed a preamplifier with current mirror. Therefore, the power consumption was reduced by the power control switch used in the comparator. The layout of the designed SAR ADC was performed by Virtuoso Layout Editor (Cadence, USA). In the layout result, the size of the

Design and Development of a PC- Based temperature monitoring ...

African Journals Online (AJOL)

The design of the work involves a circuit that measures the surrounding temperature using appropriate sensors and the sensor output is then converted to digital signals after due processing and conditioning of the signals. There is also an interface circuit configured to make it compatible with the PC hardware. This design ...

Digital readout alpha survey instrument

International Nuclear Information System (INIS)

Jacobs, M.E.

1976-01-01

A prototype solid-state digital readout alpha particle survey instrument has been designed and constructed. The meter incorporates a Ludlum alpha scintillator as a detector, digital logic circuits for control and timing, and a Digilin counting module with reflective liquid crystal display. The device is used to monitor alpha radiation from a surface. Sample counts are totalized over 10-second intervals and displayed digitally in counts per minute up to 19,999. Tests over source samples with counts to 15,600 cpm have shown the device to be rapid, versatile and accurate. The instrument can be fabricated in one man-week and requires about $835 in material costs. A complete set of drawings is included

Circuit Design and Implementation of Micro-Displacement Measurement System of Laser Self-Mixing Interference

Directory of Open Access Journals (Sweden)

Guang Ya LIU

2014-02-01

Full Text Available In this paper we put forward the basic structure of a micro-displacement measuring system based on the basic theory of laser feedback, and designed a hardware circuit of the system, including the LD driver and modulation circuit, photoelectric signal amplifier and filter circuit, which meet the requirements of the follow-up experimental study by theoretical analysis and Multisim simulation to the circuit.

Advances in analog and RF IC design for wireless communication systems

CERN Document Server

Manganaro, Gabriele

2013-01-01

Advances in Analog and RF IC Design for Wireless Communication Systems gives technical introductions to the latest and most significant topics in the area of circuit design of analog/RF ICs for wireless communication systems, emphasizing wireless infrastructure rather than handsets. The book ranges from very high performance circuits for complex wireless infrastructure systems to selected highly integrated systems for handsets and mobile devices. Coverage includes power amplifiers, low-noise amplifiers, modulators, analog-to-digital converters (ADCs) and digital-to-analog converters

Analog Circuit Design Low Voltage Low Power; Short Range Wireless Front-Ends; Power Management and DC-DC

CERN Document Server

Roermund, Arthur; Baschirotto, Andrea

2012-01-01

The book contains the contribution of 18 tutorials of the 20th workshop on Advances in Analog Circuit Design.  Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of Low-Voltage Low-Power Data Converters - Chaired by Prof. Anderea Baschirotto, University of Milan-Bicocca Short Range Wireless Front-Ends - Chaired by Prof. Arthur van Roermund, Eindhoven University of Technology Power management and DC-DC - Chaired by Prof. M. Steyaert, Katholieke University Leuven Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design.

Modular design of synthetic gene circuits with biological parts and pools.

Science.gov (United States)

Marchisio, Mario Andrea

2015-01-01

Synthetic gene circuits can be designed in an electronic fashion by displaying their basic components-Standard Biological Parts and Pools of molecules-on the computer screen and connecting them with hypothetical wires. This procedure, achieved by our add-on for the software ProMoT, was successfully applied to bacterial circuits. Recently, we have extended this design-methodology to eukaryotic cells. Here, highly complex components such as promoters and Pools of mRNA contain hundreds of species and reactions whose calculation demands a rule-based modeling approach. We showed how to build such complex modules via the joint employment of the software BioNetGen (rule-based modeling) and ProMoT (modularization). In this chapter, we illustrate how to utilize our computational tool for synthetic biology with the in silico implementation of a simple eukaryotic gene circuit that performs the logic AND operation.

Innovative design with learning reflexiveness for developing the Hamiltonian circuit learning games

Directory of Open Access Journals (Sweden)

Meng-Chien Yang

2018-02-01

Full Text Available In this study, we use a new proposed framework to develop the Hamiltonian circuit learning games for college students. The framework is for enhancing learners’ activities with learning reflexiveness. The design of these games is based on this framework to achieve the targeted learning outcomes. In recent years, the game-based learning is a very popular research topic. The Hamiltonian circuit is an important concepts for learning many computer science and electric engineering topics, such as IC design routing algorithm. The developed games use guiding rules to enable students to learn the Hamiltonian circuit in complicate graph problem. After the game, the learners are given a reviewing test which using the animation film for explaining the knowledge. This design concept is different from the previous studies. Through this new design, the outcome gets the better learning results under the effect of reflection. The students will have a deeper impression on the subject, and through self-learning and active thinking, in the game will have a deeper experience.

A preliminary design of mechanical device on industrial digital radiography equipment design

International Nuclear Information System (INIS)

Nur Khasan; Samuel Praptoyo

2015-01-01

A preliminary design of mechanical device on industrial digital radiography equipment has been done. this design is intended as a basis for the manufacture of complete facilities for the realization a prototype on industrial digital radiography equipment. the design and construction were carried out by paying attention to the general configuration of the basic design in which its mechanical design has several components with specific dimensions and heavy mass. this design consist of a main frame holder, flat panel detector support and hydraulic hand stacker for mounting the x-ray machine. this mechanical device design will then be fabricated to facilitate and assist work of digital radiographic retrieval. computer application programs sketch-up is used to draw this design and the analysis stress of autodesk inventor to analysis the strength construction design. the results of this design are the configuration drawing, sketch drawings of construction and the safety factor of construction design with a minimum value of 2.39 as well as a maximum value of 15 when to be simulated by the load 500 Kg which is 4 times of total workload. (author)

Hybrid integrated circuit for charge-to-time interval conversion

Energy Technology Data Exchange (ETDEWEB)

Basiladze, S.G.; Dotsenko, Yu.Yu.; Man' yakov, P.K.; Fedorchenko, S.N. (Joint Inst. for Nuclear Research, Dubna (USSR))

The hybrid integrated circuit for charge-to time interval conversion with nanosecond input fast response is described. The circuit can be used in energy measuring channels, time-to-digital converters and in the modified variant in amplitude-to-digital converters. The converter described consists of a buffer amplifier, a linear transmission circuit, a direct current source and a unit of time interval separation. The buffer amplifier represents a current follower providing low input and high output resistances by the current feedback. It is concluded that the described converter excelled the QT100B circuit analogous to it in a number of parameters especially, in thermostability.

Application-specific integrated circuit design for a typical pressurized water reactor pressure channel trip

International Nuclear Information System (INIS)

Battle, R.E.; Manges, W.W.; Emery, M.S.; Vendermolen, R.I.; Bhatt, S.

1994-01-01

This article discusses the use of application-specific integrated circuits (ASICs) in nuclear plant safety systems. ASICs have certain advantages over software-based systems because they can be simple enough to be thoroughly tested, and they can be tailored to replace existing equipment. An architecture to replace a pressurized water reactor pressure channel trip is presented. Methods of implementing digital algorithms are also discussed

Optimum Design of a Moving Coil Actuator for Fast-Switching Valves in Digital Hydraulic Pumps and Motors

DEFF Research Database (Denmark)

Roemer, Daniel Beck; Bech, Michael Møller; Johansen, Per

2015-01-01

Fast-switching seat valves suitable for digital hydraulic pumps and motors utilize direct electromagnetic actuators, which must exhibit superior transient performance to allow efficient operation of the fluid power pump/motor. A moving coil actuator resulting in a minimum valve switching time...... is designed for such valves using transient finite-element analysis of the electromagnetic circuit. The valve dynamics are coupled to the fluid restrictive forces, which significantly influence the effective actuator force. Fluid forces are modeled based on transient computational fluid dynamics models....... The electromagnetic finite-element model is verified against experimental measurement, and used to design an optimum moving coil actuator for the application considering different voltage-current ratios of the power supply. Results show that the optimum design depends on the supply voltage-current ratio, however...

Analytical Study on Thermal and Mechanical Design of Printed Circuit Heat Exchanger

Energy Technology Data Exchange (ETDEWEB)

Yoon, Su-Jong [Idaho National Lab. (INL), Idaho Falls, ID (United States); Sabharwall, Piyush [Idaho National Lab. (INL), Idaho Falls, ID (United States); Kim, Eung-Soo [Idaho National Lab. (INL), Idaho Falls, ID (United States)

2013-09-01

The analytical methodologies for the thermal design, mechanical design and cost estimation of printed circuit heat exchanger are presented in this study. In this study, three flow arrangements of parallel flow, countercurrent flow and crossflow are taken into account. For each flow arrangement, the analytical solution of temperature profile of heat exchanger is introduced. The size and cost of printed circuit heat exchangers for advanced small modular reactors, which employ various coolants such as sodium, molten salts, helium, and water, are also presented.

Digital libraries philosophies, technical design considerations, and example scenarios

CERN Document Server

Stern, David

1999-01-01

An unparalleled overview of current design considerations for your digital library! Digital Libraries: Philosophies, Technical Design Considerations, and Example Scenarios is a balanced overview of public services, collection development, administration, and systems support, for digital libraries, with advice on adopting the latest technologies that appear on the scene. As a professional in the library and information science field, you will benefit from this special issue that serves as an overview of selected directions, trends, possibilities, limitations, enhancements, design principals, an

Aeroflex Single Board Computers and Instrument Circuit Cards for Nuclear Environments Measuring and Monitoring

International Nuclear Information System (INIS)

Stratton, Sam; Stevenson, Dave; Magnifico, Mateo

2013-06-01

A Single Board Computer (SBC) is an entire computer including all of the required components and I/O interfaces built on a single circuit board. SBC's are used across numerous industrial, military and space flight applications. In the case of military and space implementations, SBC's employ advanced high reliability processors designed for rugged thermal, mechanical and even radiation environments. These processors, in turn, rely on equally advanced support components such as memory, interface, and digital logic. When all of these components are put together on a printed circuit card, the result is a highly reliable Single Board Computer that can perform a wide variety of tasks in very harsh environments. In the area of instrumentation, peripheral circuit cards can be developed that directly interface to the SBC and various radiation measuring devices and systems. Designers use signal conditioning and high reliability Analog to Digital Converters (ADC's) to convert the measuring device signals to digital data suitable for a microprocessor. The data can then be sent to the SBC via high speed communication protocols such as Ethernet or similar type of serial bus. Data received by the SBC can then be manipulated and processed into a form readily available to users. Recent events are causing some in the NPP industry to consider devices and systems with better radiation and temperature performance capability. Systems designed for space application are designed for the harsh environment of space which under certain conditions would be similar to what the electronics will see during a severe nuclear reactor event. The NPP industry should be considering higher reliability electronics for certain critical applications. (authors)