Sample records for voltage high-q soi

  1. Low Voltage, High-Q SOI MEMS Varactors for RF Applications

    DEFF Research Database (Denmark)

    Yalcinkaya, Arda Deniz; Jensen, Søren; Hansen, Ole


    A micro electromechanical tunable capacitor with a low control voltage, a wide tuning range and high electrical quality factor is presented with detailed characterizations. A 50μm thick single-crystalline silicon layer was etched using deep reactive ion etching (DRIE) for obtaining high-aspect ra......A micro electromechanical tunable capacitor with a low control voltage, a wide tuning range and high electrical quality factor is presented with detailed characterizations. A 50μm thick single-crystalline silicon layer was etched using deep reactive ion etching (DRIE) for obtaining high...

  2. Digitally Programmable High-Q Voltage Mode Universal Filter

    Directory of Open Access Journals (Sweden)

    D. Singh


    Full Text Available A new low-voltage low-power CMOS current feedback amplifier (CFA is presented in this paper. This is used to realize a novel digitally programmable CFA (DPCFA using transistor arrays and MOS switches. The proposed realizations nearly allow rail-to-rail swing capability at all the ports. Class-AB output stage ensures low power dissipation and high current drive capability. The proposed CFA/ DPCFA operates at supply voltage of ±0.75 V and exhibits bandwidth better than 95 MHz. An application of the DPCFA to realize a novel voltage mode high-Q digitally programmable universal filter (UF is given. Performances of all the proposed circuits are verified by PSPICE simulation using TSMC 0.25μm technology parameters.

  3. The effect of series resistance on threshold voltage measurement techniques for fully depleted SOI MOSFETs (United States)

    Wainwright, S. P.; Hall, S.; Flandre, D.


    Accurate measurement of the threshold voltage of fully depleted SOI MOSFETs is limited by the high values of series resistance that occur due to the thin film nature of the material. This work examines the effect of series resistance on three techniques, one of which was extended here for the first time for use with SOI MOSFETs. The new technique is particularly useful because it allows the extraction of the threshold voltage parameter corresponding to the most widely used SOI MOSFET model. The effect that series resistance has on the measured threshold voltage is discussed alongside the validity of extending bulk MOSFET measurement techniques for use with SOI MOSFETs. The new method is shown to be more accurate than the existing linear method for extracting the SOISPICE definition of threshold voltage.

  4. Nonlinear Parasitic Capacitance Modelling of High Voltage Power MOSFETs in Partial SOI Process

    DEFF Research Database (Denmark)

    Fan, Lin; Knott, Arnold; Jørgensen, Ivan Harald Holger


    : off-state, sub-threshold region, and on-state in the linear region. A high voltage power MOSFET is designed in a partial Silicon on Insulator (SOI) process, with the bulk as a separate terminal. 3D plots and contour plots of the capacitances versus bias voltages for the transistor summarize...

  5. Diamond-shaped body contact for on-state breakdown voltage improvement of SOI LDMOSFET (United States)

    Daghighi, Arash; Hematian, Hadi


    In this paper, we report a diamond-shaped body contact (DSBC) for silicon-on-insulator (SOI) LDMOSFET. Several DSBC devices along with conventional body contact (CBC) structures are laid out using 0.35 μm SOI MOSFET foundry process. The DSBC device is designed using the same standard layers as in the CBC structure and the contact layout is adapted to process design rules. Experimental characterization of the CBC and DSBC devices in terms of off-state breakdown voltage (BVoff), on-state breakdown voltage (BVon), on-resistance (Ron) and device foot print showed 19% improvement in BVon compared DSBC device with that of the CBC structure. BVoff and Ron of both of the devices are identical. The device foot print is smaller in DSBC device by 11% compared with that of the CBC structure leading to enhanced "On-resistance × Area" figure of merit where smaller high voltage SOI LDMOSEFT reduces the area and cost of power integrated circuits. In order to explain BVon improvement of DSBC structures, three-dimensional (3-D) device simulation is carried out to clarify the lateral BJT action and breakdown mechanism. It is demonstrated that the number of P+ diffusions in DSBC device can be increased to improve BVon without increasing "On-resistance × Area". The on-state breakdown voltage improvement and area efficiency of the diamond-shaped body contact proposes it as a promising candidate for reliable operation of SOI LDMOSFET.

  6. A new high-voltage interconnection shielding method for SOI monolithic ICs (United States)

    Zhang, Long; Zhu, Jing; Sun, Weifeng; Huang, Xuequan; Zhao, Minna; Chen, Jiajun; Shi, Longxing; Chen, Jian; Ding, Desheng


    The high-voltage interconnection (HVI) issue becomes severe in the high-voltage monolithic ICs when single-layer metal is used for lowering the cost. This paper proposes a dual deep-oxide trenches (DDOT) structure for 500 V Silicon-on-Insulator Lateral Insulated Gate Bipolar Transistor (SOI-LIGBT) to shield the influence of HVI on the breakdown voltage. Compared with the conventional DDOT structure, HVI region of the proposed DDOT structure is shrunk by employing a shallow trench (T1) and a deep trench (T2). Besides the breakdown mechanism in the off-state, the current density and impact ionization rate distributions in the on-state of the proposed structure are also investigated. The experiments demonstrate that the proposed DDOT structure can fully shield the influence of HVI with significant reduction in the area of silicon region beneath the HVI. With almost the same off-state breakdown voltage (BVoff) of 550 V as the conventional DDOT structure, the length of the silicon region under the HVI in the proposed structure is shortened from 45 μm to 15 μm. Meanwhile, no on-state breakdown voltage (BVon) degradation is observed according to the measured results. The new method proposed in this work can also be used for other types of high-voltage devices such as LDMOS and free-wheeling diode in SOI Monolithic ICs.

  7. Experimental and theoretical study of an improved breakdown voltage SOI LDMOS with a reduced cell pitch (United States)

    Xiaorong, Luo; Xiaowei, Wang; Gangyi, Hu; Yuanhang, Fan; Kun, Zhou; Yinchun, Luo; Ye, Fan; Zhengyuan, Zhang; Yong, Mei; Bo, Zhang


    An improved breakdown voltage (BV) SOI power MOSFET with a reduced cell pitch is proposed and fabricated. Its breakdown characteristics are investigated numerically and experimentally. The MOSFET features dual trenches (DTMOS), an oxide trench between the source and drain regions, and a trench gate extended to the buried oxide (BOX). The proposed device has three merits. First, the oxide trench increases the electric field strength in the x-direction due to the lower permittivity of oxide (ɛox) than that of Si (ɛSi). Furthermore, the trench gate, the oxide trench, and the BOX cause multi-directional depletion, improving the electric field distribution and enhancing the RESURF (reduced surface field) effect. Both increase the BV. Second, the oxide trench folds the drift region along the y-direction and thus reduces the cell pitch. Third, the trench gate not only reduces the on-resistance, but also acts as a field plate to improve the BV. Additionally, the trench gate achieves the isolation between high-voltage devices and the low voltage CMOS devices in a high-voltage integrated circuit (HVIC), effectively saving the chip area and simplifying the isolation process. An 180 V prototype DTMOS with its applied drive IC is fabricated to verify the mechanism.

  8. Thick soi films by rapid thermal processing for high voltage integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Dilhac, J.M.; Cornibert, L.; Charitat, G.; Nolhier, N.; Zerrouk, D.; Ganibal, C.


    A structure for electrical insulation of control devices used in high voltage integrated circuits, is presented, combining junction and dielectric insulation for vertical and lateral insulation respectively. The insulation performances are first theoretically assessed to estimate the required oxide thickness; then, a method for creating the buried oxide layer is presented and experimentally verified; the method consists in re-crystallizing thick polysilicon films by Lateral Epitaxial Growth over Oxide (LEGO) in order to fabricate substrates with localized SOI (silicon on insulator) layers, and avoids any horizontal thermal gradient in the solid phase and therefore produces less defects, while allowing the formation of much thicker films than in any other melt-based technique

  9. Impact of Band Nonparabolicity on Threshold Voltage of Nanoscale SOI MOSFET

    Directory of Open Access Journals (Sweden)

    Yasuhisa Omura


    Full Text Available This paper reconsiders the mathematical formulation of the conventional nonparabolic band model and proposes a model of the effective mass of conduction band electrons including the nonparabolicity of the conduction band. It is demonstrated that this model produces realistic results for a sub-10-nm-thick Si layer surrounded by an SiO2 layer. The major part of the discussion is focused on the low-dimensional electron system confined with insulator barriers. To examine the feasibility of our consideration, the model is applied to the threshold voltage of nanoscale SOI FinFETs and compared to prior experimental results. This paper also addresses a model of the effective mass of valence band holes assuming the nonparabolic condition.

  10. A novel partial SOI LDMOSFET with periodic buried oxide for breakdown voltage and self heating effect enhancement (United States)

    Jamali Mahabadi, S. E.; Rajabi, Saba; Loiacono, Julian


    In this paper a partial silicon on insulator (PSOI) lateral double diffused metal oxide semiconductor field effect transistor (LDMOSFET) with periodic buried oxide layer (PBO) for enhancing breakdown voltage (BV) and self-heating effects (SHEs) is proposed for the first time. This new structure is called periodic buried oxide partial silicon on insulator (PBO-PSOI). In this structure, periodic small pieces of SiO2 were used as the buried oxide (BOX) layer in PSOI to modulate the electric field in the structure. It was demonstrated that the electric field is distributed more evenly by producing additional electric field peaks, which decrease the common peaks near the drain and gate junctions in the PBO-PSOI structure. Hence, the area underneath the electric field curve increases which leads to higher breakdown voltage. Also a p-type Si window was introduced in the source side to force the substrate to share the vertical voltage drop, leading to a higher vertical BV. Furthermore, the Si window under the source and those between periodic pieces of SiO2 create parallel conduction paths between the active layer and substrate thereby alleviating the SHEs. Simulations with the two dimensional ATLAS device simulator from the Silvaco suite of simulation tools show that the BV of PBO-PSOI is 100% higher than that of the conventional partial SOI (C-PSOI) structure. Furthermore the PBO-PSOI structure alleviates SHEs to a greater extent than its C-PSOI counterpart. The achieved drain current for the PBO-PSOI structure (100 μA), at drain-source voltage of VDS = 100 V and gate-source voltage of VGS = 25 V, is shown to be significantly larger than that in C-PSOI and fully depleted SOI (FD-SOI) structures (87 μA and 51 μA respectively). Drain current can be further improved at the expense of BV by increasing the doping of the drift region.

  11. One-dimensional breakdown voltage model of SOI RESURF lateral power device based on lateral linearly graded approximation (United States)

    Zhang, Jun; Guo, Yu-Feng; Xu, Yue; Lin, Hong; Yang, Hui; Hong, Yang; Yao, Jia-Fei


    A novel one-dimensional (1D) analytical model is proposed for quantifying the breakdown voltage of a reduced surface field (RESURF) lateral power device fabricated on silicon on an insulator (SOI) substrate. We assume that the charges in the depletion region contribute to the lateral PN junctions along the diagonal of the area shared by the lateral and vertical depletion regions. Based on the assumption, the lateral PN junction behaves as a linearly graded junction, thus resulting in a reduced surface electric field and high breakdown voltage. Using the proposed model, the breakdown voltage as a function of device parameters is investigated and compared with the numerical simulation by the TCAD tools. The analytical results are shown to be in fair agreement with the numerical results. Finally, a new RESURF criterion is derived which offers a useful scheme to optimize the structure parameters. This simple 1D model provides a clear physical insight into the RESURF effect and a new explanation on the improvement in breakdown voltage in an SOI RESURF device. Project supported by the National Natural Science Foundation of China (Grant No. 61076073) and the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 20133223110003).

  12. A technique for simultaneously improving the product of cutoff frequency-breakdown voltage and thermal stability of SOI SiGe HBT (United States)

    Fu, Qiang; Zhang, Wan-Rong; Jin, Dong-Yue; Zhao, Yan-Xiao; Wang, Xiao


    The product of the cutoff frequency and breakdown voltage (fT×BVCEO) is an important figure of merit (FOM) to characterize overall performance of heterojunction bipolar transistor (HBT). In this paper, an approach to introducing a thin N+-buried layer into N collector region in silicon-on-insulator (SOI) SiGe HBT to simultaneously improve the FOM of fT×BVCEO and thermal stability is presented by using two-dimensional (2D) numerical simulation through SILVACO device simulator. Firstly, in order to show some disadvantages of the introduction of SOI structure, the effects of SOI insulation layer thickness (TBOX) on fT, BVCEO, and the FOM of fT×BVCEO are presented. The introduction of SOI structure remarkably reduces the electron concentration in collector region near SOI substrate insulation layer, obviously reduces fT, slightly increases BVCEO to some extent, but ultimately degrades the FOM of fT×BVCEO. Although the fT, BVCEO, and the FOM of fT×BVCEO can be improved by increasing SOI insulator SiO2 layer thickness TBOX in SOI structure, the device temperature and collector current are increased due to lower thermal conductivity of SiO2 layer, as a result, the self-heating effect of the device is enhanced, and the thermal stability of the device is degraded. Secondly, in order to alleviate the foregoing problem of low electron concentration in collector region near SOI insulation layer and the thermal stability resulting from thick TBOX, a thin N+-buried layer is introduced into collector region to not only improve the FOM of fT×BVCEO, but also weaken the self-heating effect of the device, thus improving the thermal stability of the device. Furthermore, the effect of the location of the thin N+-buried layer in collector region is investigated in detail. The result show that the FOM of fT×BVCEO is improved and the device temperature decreases as the N+-buried layer shifts toward SOI substrate insulation layer. The approach to introducing a thin N+-buried layer

  13. High-Q MEMS Resonators for Laser Beam Scanning Displays

    Directory of Open Access Journals (Sweden)

    Ulrich Hofmann


    Full Text Available This paper reports on design, fabrication and characterization of high-Q MEMS resonators to be used in optical applications like laser displays and LIDAR range sensors. Stacked vertical comb drives for electrostatic actuation of single-axis scanners and biaxial MEMS mirrors were realized in a dual layer polysilicon SOI process. High Q-factors up to 145,000 have been achieved applying wafer level vacuum packaging technology including deposition of titanium thin film getters. The effective reduction of gas damping allows the MEMS actuator to achieve large amplitudes at high oscillation frequencies while driving voltage and power consumption can be minimized. Exemplarily shown is a micro scanner that achieves a total optical scan angle of 86 degrees at a resonant frequency of 30.8 kHz, which fulfills the requirements for HD720 resolution. Furthermore, results of a new wafer based glass-forming technology for fabrication of three dimensionally shaped glass lids with tilted optical windows are presented.

  14. An analytical threshold voltage model for a short-channel dual-metal-gate (DMG) recessed-source/drain (Re-S/D) SOI MOSFET (United States)

    Saramekala, G. K.; Santra, Abirmoya; Dubey, Sarvesh; Jit, Satyabrata; Tiwari, Pramod Kumar


    In this paper, an analytical short-channel threshold voltage model is presented for a dual-metal-gate (DMG) fully depleted recessed source/drain (Re-S/D) SOI MOSFET. For the first time, the advantages of recessed source/drain (Re-S/D) and of dual-metal-gate structure are incorporated simultaneously in a fully depleted SOI MOSFET. The analytical surface potential model at Si-channel/SiO2 interface and Si-channel/buried-oxide (BOX) interface have been developed by solving the 2-D Poisson’s equation in the channel region with appropriate boundary conditions assuming parabolic potential profile in the transverse direction of the channel. Thereupon, a threshold voltage model is derived from the minimum surface potential in the channel. The developed model is analyzed extensively for a variety of device parameters like the oxide and silicon channel thicknesses, thickness of source/drain extension in the BOX, control and screen gate length ratio. The validity of the present 2D analytical model is verified with ATLAS™, a 2D device simulator from SILVACO Inc.

  15. A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) UTB SOI MOSFETs including substrate induced surface potential effects (United States)

    Kumar, Ajit; Tiwari, Pramod Kumar


    In this paper, a threshold voltage model of short-channel recessed-source/drain (Re-S/D) ultra-thin body (UTB) SOI MOSFETs has been presented considering the substrate induced surface potential (SISP) to improve the model accuracy over wide ranges of device parameters and substrate bias. The potential distribution of the front and the back surfaces of the Si-body have been derived using the evanescent mode analysis method in which the channel potential is broken into one-dimensional long-channel potential and two-dimensional short-channel potential. A one-dimensional Poisson's equation has also been solved in the substrate region to account the effect of substrate induced surface potential (SISP) at substrate/buried-oxide interface. The minimum front- and back-surface potentials of silicon body have been used to obtain front and back channel threshold voltages, respectively. However, the smaller one between front and back channel threshold voltages is considered to be the threshold voltage of the device. The accuracy of the present model has been extended up to 10 nm channel length by incorporating the quantum effects induced correction term. The model results are verified with simulation results obtained using ATLAS™ from Silvaco.

  16. Large-signal modeling of SOI MESFETs (United States)

    Balijepalli, A.; Vijayaraghavan, R.; Ervin, J.; Yang, J.; Islam, S. K.; Thornton, T. J.


    It has been demonstrated that sub-micron metal-semiconductor field-effect transistors (MESFETs) can be fabricated using a commercial 3.5 V silicon-on-insulator (SOI) CMOS foundry with no changes to the CMOS process flow. The SOI MESFETs demonstrate excellent RF capabilities and can operate at voltages that are at least 3X higher than the MOSFET breakdown voltage. If the high voltage capability is to be exploited in radio frequency integrated circuits it is important to develop an accurate empirical model of the device. This paper presents the SPICE model development of the SOI MESFET. A measurement-based approach is used to customize a commercially available, large-signal TOM3 MESFET model. Using the TOM3 model, an SOI MESFET Colpitts oscillator operating at 1.5 GHz has been simulated with an output swing of 7 V to illustrate the high voltage RF applications of the device.

  17. Electrical Analysis of 65 nm PMOS Based on SOI Technology (United States)

    Adrus, Syed Muhamad Firdauz Bin Syed; Abdullah, Mohd. Hanapiah Bin; Rusop, Mohamad


    This paper describes the fabrication and the performance analysis of 65 nm PMOS using Silicon-on-Insulator (SOI) technology. As the technology evolved towards minimizing the scaling size, the scaling activity has it own limitations. The Silicon-on-Insulator (SOI) is the primary method used to overcome the scaling limitation. In this paper, the 65 nm PMOS device with 0.4 μm thickness of Silicon-on-Insulator (SOI) Technology was fabricated and the performance of the devices was analyzed by focusing on the electrical characteristics of Id-Vd and Id-Vg curves for bulk PMOS and the one with SOI technology. The fabrication process simulation and electrical characteristic was simulated using SILVACO TCAD ATHENA and ATLAS simulator. A very promising results were obtained, the device with SOI technology shows improvement in drain saturation current of Idsat = -269 uA/um from -257 uA/um of bulk PMOS (with increment of 4.7%) and the SOI device exhibits lower threshold voltage of pVth(SOI) = -0.2165 V compared to pVth(bulk) = -0.2367 V (with decrement of 8.5%). It could also be seen that a higher Id-Vg curve obtained for SOI device which means higher drain current produced at lower control voltage thus contribute to a faster switching mechanism with low leakage over the bulk, all these would lead to a device with low power consumption and at the same time exhibit faster performance.

  18. Group Delay of High Q Antennas

    DEFF Research Database (Denmark)

    Bahramzy, Pevand; Pedersen, Gert Frølund


    become an issue, when working with high Q antennas, because of the steep phase shift over the frequency. In this paper, it is measured how large group delay variations can become, when going from a low Q antenna to a high Q antenna. The group delay of a low Q antenna is shown to be around 1.3 ns, whereas...... a high Q antenna has group delay of around 22 ns. It is due to this huge group delay variation characteristics of high Q antennas, that signal distortion might occur in the radio system with high Q antennas....

  19. An Analytical Threshold Voltage Model of Fully Depleted (FD) Recessed-Source/Drain (Re-S/D) SOI MOSFETs with Back-Gate Control (United States)

    Saramekala, Gopi Krishna; Tiwari, Pramod Kumar


    This paper presents an analytical threshold voltage model for back-gated fully depleted (FD), recessed-source drain silicon-on-insulator metal-oxide-semiconductor field-effect transistors (MOSFETs). Analytical surface potential models have been developed at front and back surfaces of the channel by solving the two-dimensional (2-D) Poisson's equation in the channel region with appropriate boundary conditions assuming a parabolic potential profile in the transverse direction of the channel. The strong inversion criterion is applied to the front surface potential as well as on the back one in order to find two separate threshold voltages for front and back channels of the device, respectively. The device threshold voltage has been assumed to be associated with the surface that offers a lower threshold voltage. The developed model was analyzed extensively for a variety of device geometry parameters like the oxide and silicon channel thicknesses, the thickness of the source/drain extension in the buried oxide, and the applied bias voltages with back-gate control. The proposed model has been validated by comparing the analytical results with numerical simulation data obtained from ATLAS™, a 2-D device simulator from SILVACO.

  20. Design of a Capacitive SOI Micromachined Accelerometer

    Directory of Open Access Journals (Sweden)

    Wenjing ZHAO


    Full Text Available A capacitive micromachined accelerometer based on the technique of silicon on insulator, is designed in this paper. The proposed microaccelerometer is designed to obtain good electrical performance and radioresistance in order to make the accelerometer integrate with the CMOS chip. The performance of the capacitive SOI microaccelerometer is calculated to determine its linear capacitance change and achieves a very linear response with input acceleration after theoretical analysis. The relationship between acceleration and output voltage is discussed. The mechanical performance of the capacitive microaccelerometer was simulated to obtain optimum design parameters and structural characteristics by the finite element method. The results show that capacitance sensitivity, range, resolution characteristic indexes and so on respectively through the simulation and theoretical analysis. Finally the fabrication process for the SOI technique suitable for batch fabrication is proposed.

  1. Characteristics of non-irradiated and irradiated double SOI integration type pixel sensor

    Energy Technology Data Exchange (ETDEWEB)

    Asano, M.; Sekigawa, D. [Institute of Pure and Applied Sciences, University of Tsukuba, Tsukuba, Ibaraki 305-8751 (Japan); Hara, K., E-mail: [Institute of Pure and Applied Sciences, University of Tsukuba, Tsukuba, Ibaraki 305-8751 (Japan); Center for Integrated Research in Fundamental Science and Engineering, University of Tsukuba, Tsukuba, Ibaraki 305-8571 (Japan); Aoyagi, W.; Honda, S.; Tobita, N. [Institute of Pure and Applied Sciences, University of Tsukuba, Tsukuba, Ibaraki 305-8751 (Japan); Arai, Y.; Miyoshi, T.; Kurachi, I.; Tsuboyama, T.; Yamada, M. [Institute of Particle and Nuclear Study, KEK, Oho 1-1, Tsukuba, Ibaraki 305-0801 (Japan)


    We are developing monolithic pixel sensors based on a 0.2 μm fully depleted silicon-on-insulator (FD-SOI) technology for high-energy physics experiment applications. With this SOI technology, the wafer resistivities for the electronics and sensor parts can be chosen separately. Therefore, a device with full depletion and fast charge collection is realized. The total ionizing dose (TID) effect is the major challenge for application in hard radiation environments. To compensate for TID damage, we introduced a double SOI structure that implements an additional middle silicon layer (SOI2 layer). Applying a negative voltage to the SOI2 layer should compensate for the effects induced by holes trapped in the buried oxide layers. We studied the recovery from TID damage induced by {sup 60}Co γ and other characteristics of the integration-type double SOI sensor INTPIXh2. When the double SOI sensor was irradiated to 100 kGy, it showed a response to the infrared laser similar to that of a non-irradiated sensor when we applied a negative voltage to the SOI2 layer. Thus, we concluded that the double SOI sensor is very effective at sufficiently enhancing the radiation hardness for application in experiments with harsh radiation environments, such as at Belle II or ILC.

  2. Un meuble à soi

    Directory of Open Access Journals (Sweden)

    Françoise Le Bouar


    Full Text Available À partir d’un souvenir d’enfance de Walter Benjamin, l’article envisage le fait d’avoir « un coin » à soi – espace ou meuble – comme constitutif de la personnalité, comme favorable à l’activité de la pensée, au travail de l’imagination. Du pupitre à l’habitacle de Bruno Munari, le « meuble à soi » serait pour l’enfant une deuxième peau lui offrant dans le même temps protection et inspiration, une cabine à sa taille où puisse se loger l’aventure de l’esprit, une chrysalide dans laquelle s’envelopper pour s’envoler.

  3. SOI technology for power management in automotive and industrial applications (United States)

    Stork, Johannes M. C.; Hosey, George P.


    Semiconductor on Insulator (SOI) technology offers an assortment of opportunities for chip manufacturers in the Power Management market. Recent advances in the automotive and industrial markets, along with emerging features, the increasing use of sensors, and the ever-expanding "Internet of Things" (IoT) are providing for continued growth in these markets while also driving more complex solutions. The potential benefits of SOI include the ability to place both high-voltage and low-voltage devices on a single chip, saving space and cost, simplifying designs and models, and improving performance, thereby cutting development costs and improving time to market. SOI also offers novel new approaches to long-standing technologies.

  4. Integrated Ultra-High-Q Optical Resonator


    Yang, Ki Youl; Oh, Dong Yoon; Lee, Seung Hoon; Yang, Qi-Fan; Yi, Xu; Vahala, Kerry


    Optical microcavities are compact, often chip-based devices, that are essential in technologies spanning frequency metrology to biosensing. They have also enabled new science in quantum information and cavity optomechanics. Performance requirements in subjects like cavity-QED and sensing have long placed emphasis on low-optical-loss (high-Q-factor) micrometer-scale resonators. However, an array of system-on-a-chip applications have emerged that also require millimeter-scale devices. To avoid ...

  5. Single-Event Upset and Scaling Trends in New Generation of the Commercial SOI PowerPC Microprocessors (United States)

    Irom, Farokh; Farmanesh, Farhad; Kouba, Coy K.


    Single-event upset effects from heavy ions are measured for Motorola silicon-on-insulator (SOI) microprocessor with 90 nm feature sizes. The results are compared with previous results for SOI microprocessors with feature sizes of 130 and 180 nm. The cross section of the 90 nm SOI processors is smaller than results for 130 and 180 nm counterparts, but the threshold is about the same. The scaling of the cross section with reduction of feature size and core voltage for SOI microprocessors is discussed.

  6. FinFET and UTBB for RF SOI communication systems (United States)

    Raskin, Jean-Pierre


    Performance of RF integrated circuit (IC) is directly linked to the analog and high frequency characteristics of the transistors, the quality of the back-end of line process as well as the electromagnetic properties of the substrate. Thanks to the introduction of the trap-rich high-resistivity Silicon-on-Insulator (SOI) substrate on the market, the ICs requirements in term of linearity are fulfilled. Today partially depleted SOI MOSFET is the mainstream technology for RF SOI systems. Future generations of mobile communication systems will require transistors with better high frequency performance at lower power consumption. The advanced MOS transistors in competition are FinFET and Ultra Thin Body and Buried oxide (UTBB) SOI MOSFETs. Both devices have been intensively studied these last years. Most of the reported data concern their digital performance. In this paper, their analog/RF behavior is described and compared. Both show similar characteristics in terms of transconductance, Early voltage, voltage gain, self-heating issue but UTBB outperforms FinFET in terms of cutoff frequencies thanks to their relatively lower fringing parasitic capacitances.

  7. A monolithic active pixel sensor for ionizing radiation using a 180 nm HV-SOI process

    Energy Technology Data Exchange (ETDEWEB)

    Hemperek, Tomasz; Kishishita, Tetsuichi; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn, Bonn (Germany)


    An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-180 nm High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. Standard FD-SOI MAPS suffer from radiation damage such as transistor threshold voltage shifts due to trapped charge in the buried oxide layer and charged interface states created at the silicon oxide boundaries (back gate effect). The X-FAB 180 nm HV-SOI technology offers an additional isolation using a deep non-depleted implant between the BOX layer and the active circuitry which mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection. The design and measurement results from first prototypes are presented including radiation tolerance to total ionizing dose and charge collection properties of neutron irradiated samples.

  8. Characteristics Comparison of SOI-type Memory Device by Hole Generation Methods


    嶋野, 彰夫


    New memory device based on Instability of SOI(semiconductor on insulator) FET has been expected to take the place of Dynamic RAM using as main memory in computer systems. This paper describes the results of investigation on data "1" writing mechanisms based on Impact Ionization and Band to Band Tunneling . Both write mechanisms create hole resulting in Si body potential raising and threshold voltage change of SOI FET. Si body potential during WRITE operation is successfully explained by diode...

  9. Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature (United States)

    Pavanello, Marcelo Antonio; de Souza, Michelly; Ribeiro, Thales Augusto; Martino, João Antonio; Flandre, Denis


    This paper presents the operation of Graded-Channel (GC) Silicon-On-Insulator (SOI) nMOSFETs at low temperatures down to liquid helium temperature in comparison to standard uniformly doped transistors. Devices from two different technologies have been measured and show that the mobility increase rate with temperature for GC SOI transistors is similar to uniformly doped devices for temperatures down to 90 K. However, at liquid helium temperature the rate of mobility increase is larger in GC SOI than in standard devices because of the different mobility scattering mechanisms. The analog properties of GC SOI devices have been investigated down to 4.16 K and show that because of its better transconductance and output conductance, an intrinsic voltage gain improvement with temperature is also obtained for devices in the whole studied temperature range. GC devices are also capable of reducing the impact ionization due to the high electric field in the drain region, increasing the drain breakdown voltage of fully-depleted SOI MOSFETs at any studied temperature and the kink voltage at 4.16 K.

  10. Advanced monolithic pixel sensors using SOI technology

    Energy Technology Data Exchange (ETDEWEB)

    Miyoshi, Toshinobu, E-mail: [High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba 305-0801 (Japan); Arai, Yasuo [High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba 305-0801 (Japan); Asano, Mari [University of Tsukuba, 1-1-1 Tennodai, Tsukuba 305-8577 (Japan); Fujita, Yowichi [High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba 305-0801 (Japan); Hamasaki, Ryutaro [SOKENDAI (The Graduate University for Advanced Studies), Shonan Village, Hayama 240-0193 (Japan); Hara, Kazuhiko; Honda, Shunsuke [University of Tsukuba, 1-1-1 Tennodai, Tsukuba 305-8577 (Japan); Ikegami, Yoichi; Kurachi, Ikuo [High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba 305-0801 (Japan); Mitsui, Shingo [Kanazawa University, Kadoma-cho, Kanazawa 920-1192 (Japan); Nishimura, Ryutaro [SOKENDAI (The Graduate University for Advanced Studies), Shonan Village, Hayama 240-0193 (Japan); Tauchi, Kazuya [High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba 305-0801 (Japan); Tobita, Naoshi [University of Tsukuba, 1-1-1 Tennodai, Tsukuba 305-8577 (Japan); Tsuboyama, Toru; Yamada, Miho [High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba 305-0801 (Japan)


    We are developing advanced pixel sensors using silicon-on-insulator (SOI) technology. A SOI wafer is used; top silicon is used for electric circuit and bottom silicon is used as a sensor. Target applications are high-energy physics, X-ray astronomy, material science, non-destructive inspection, medical application and so on. We have developed two integration-type pixel sensors, FPIXb and INTPIX7. These sensors were processed on single SOI wafers with various substrates in n- or p-type and double SOI wafers. The development status of double SOI sensors and some up-to-date test results of n-type and p-type SOI sensors are shown.

  11. Detuning effect study of High-Q Mobile Phone Antennas

    DEFF Research Database (Denmark)

    Bahramzy, Pevand; Pedersen, Gert F.


    Number of frequency bands that have to be covered by smart phones, are ever increasing. This broadband coverage can be obtained either by using a low-Q antenna or a high-Q tunable antenna. This study investigates high-Q antennas performance when placed in proximity of the user. This study...

  12. The Design of High-Q Sallen-Key Biquads with Unity-Gain Buffer Amplifiers

    DEFF Research Database (Denmark)

    Gaunholt, Hans; Guldbrandsen, Birthe


    and to implement the Sallen- Key biquad even in the high-Q case with reasonable sensitivities. The method is based on the unity gain version of the biquad and as unity gain buffer amplifiers are readily manufactured in integrated circuit technology the results may be very useful in the fabrication of integrated...... analog filters in voltage-mode as well as current-mode technology. As an example we will choose the band-pass biquad as biquads of this type often has to be designed with high-Q values. The results in the band-pass case may readily be transferred to the low-pass and high-pass cases....

  13. Novel SEU hardened PD SOI SRAM cell (United States)

    Chengmin, Xie; Zhongfang, Wang; Xihu, Wang; Longsheng, Wu; Youbao, Liu


    A novel SEU hardened 10T PD SOI SRAM cell is proposed. By dividing each pull-up and pull-down transistor in the cross-coupled inverters into two cascaded transistors, this cell suppresses the parasitic BJT and source-drain penetration charge collection effect in PD SOI transistor which causes the SEU in PD SOI SRAM. Mixed-mode simulation shows that this novel cell completely solves the SEU, where the ion affects the single transistor. Through analysis of the upset mechanism of this novel cell, SEU performance is roughly equal to the multiple-cell upset performance of a normal 6T SOI SRAM and it is thought that the SEU performance is 17 times greater than traditional 6T SRAM in 45nm PD SOI technology node based on the tested data of the references. To achieve this, the new cell adds four transistors and has a 43.4% area overhead and performance penalty.

  14. SOI-based micromechanical process (United States)

    Greiff, Paul


    A new process is being developed for fabricating micromechanical structures using SOI material. This paper will review the process and show preliminary data for accelerometers made using the process. The focus of micromechanical technology at the C.S. Draper Laboratory, Inc. has been on the developement of inertial sensors, gyros, and accelerometers. Many of our current devices are fabricated using a dissolved wafer process. The resultant devices from that process are boron-doped silicon structures suspended over thin-film electrodes on a Pyrex substrate. It is a particularly attractive feature of this process that thick structures can be fabricated with small electrode gaps. Although this process has led to many excellent device results, requirements for future devices give reason to explore alternative technologies such as the SOI process, which yields an all-silicon device while preserving many of these advantages. Experimental devices were fabricated using a geometry similar to accelerometers being made by the previous process. Although not all of the geometric goals were met, the results are promising. Among the expected advantages for the new process are: a better thermal expansion match between device and substrate, the ability to add on-chip electronics, better alignment, and the capability of fabricating new types of structures.

  15. Development of a CMOS SOI pixel detector

    CERN Document Server

    Ishino, Hirokazu; Hazumi, M; Ikegami, Y; Kohriki, T; Tajima, O; Terada, S; Tsuboyama, T; Unno, Y; Ushiroda, Y; Ikeda, H; Hara, K; Ishino, H; Kawasaki, T; Miyake, H; Martin, E; Varner, G; Tajima, H; Ohno, M; Fukuda, K; Komatsubara, H; Ida, J


    We have developed a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15 m fullydepleted- SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. The SOI TEG (Test Element Group) chips with a size of 2.5 x 2.5mm2 consisting of 20 x 20 um2 pixels have been designed and manufactured. Performance tests with a laser light illumination and a . ray radioactive source indicate successful operation of the detector. We also brie y discuss the back gate effect as well as the simulation study.

  16. SOI MESFETs for Extreme Environment Electronics Project (United States)

    National Aeronautics and Space Administration — We are proposing a new extreme environment electronics (EEE) technology based on silicon-on-insulator (SOI) metal-semiconductor field-effect transistors (MESFETs)....


    Directory of Open Access Journals (Sweden)

    Marc Smeets


    Full Text Available Le voyage en Hollande, au XIXe siècle, s'inscrit dans une longue tradition où résonnent les notions de liberté, tolérance et commerce, mais il acquiert aussi une spécificité étant donné l’importance que prend la figure du « chez soi » : les Pays-Bas, terre d'agrément où le voyageur français se sent à l'aise et où il aimerait, si possible, vivre. Proust, de ce point de vue-là, ne fait rien de neuf quand il rêve dans la Recherche d'une « vie domestique » en terre batave. Les Pays-Bas, pour le voyageur français au XIXe, c'est le home sweet home.

  18. Gate Engineering in SOI LDMOS for Device Reliability

    Directory of Open Access Journals (Sweden)



    Full Text Available A linearly graded doping drift region with step gate structure, used for improvement of reduced surface field (RESURF SOI LDMOS transistor performance has been simulated with 0.35µm technology in this paper. The proposed device has one poly gate and double metal gate arranged in a stepped manner, from channel to drift region. The first gate uses n+ poly (near source where as other two gates of aluminium. The first gate with thin gate oxide has good control over the channel charge. The third gate with thick gate oxide at drift region reduce gate to drain capacitance. The arrangement of second and third gates in a stepped manner in drift region spreads the electric field uniformly. Using two dimensional device simulations, the proposed SOI LDMOS is compared with conventional structure and the extended metal structure. We demonstrate that the proposed device exhibits significant enhancement in linearity, breakdown voltage, on-resistance and HCI. Double metal gate reduces the impact ionization area which helps to improve the Hot Carrier Injection effect..

  19. PSP-SOI: An advanced surface potential based compact model of partially depleted SOI MOSFETs for circuit simulations (United States)

    Wu, W.; Li, X.; Gildenblat, G.; Workman, G. O.; Veeraraghavan, S.; McAndrew, C. C.; van Langevelde, R.; Smit, G. D. J.; Scholten, A. J.; Klaassen, D. B. M.; Watts, J.


    This paper reports recent progress in partially depleted (PD) SOI MOSFET modeling using a surface potential based approach. The new model is formulated within the framework of the latest industry standard bulk MOSFET model PSP. In addition to its physics-based formulation and scalability inherited from PSP, PSP-SOI captures SOI specific effects by including floating body simulation capability, parasitic body currents and capacitances. A nonlinear body resistance model is included for accurate characterization and simulation of body-contacted SOI devices. The PSP-SOI model has been verified using test data from 90 nm to 65 nm PD/SOI processes.

  20. High-Q Bandpass Comb Filter for Mains Interference Extraction

    Directory of Open Access Journals (Sweden)

    Neycheva T.


    Full Text Available This paper presents a simple digital high-Q bandpass comb filter for power-line (PL or other periodical interference extraction. The filter concept relies on a correlated signal average resulting in alternating constructive and destructive spectrum interference i.e. the so-called comb frequency response. The presented filter is evaluated by Matlab simulations with real ECG signal contaminated with low amplitude PL interference. The made simulations show that this filter accurately extract the PL interference. It has high-Q notches only at PL odd harmonics and is appropriate for extraction of any kind of odd harmonic interference including rectangular shape. The filter is suitable for real-time operation with popular low-cost microcontrollers.

  1. High-Q microwave photonic filter with a tuned modulator. (United States)

    Capmany, J; Mora, J; Ortega, B; Pastor, D


    We propose the use of tuned electro-optic or electroabsorption external modulators to implement high-quality (high-Q) factor, single-bandpass photonic filters for microwave signals. Using this approach, we experimentally demonstrate a transversal finite impulse response with a Q factor of 237. This is to our knowledge the highest value ever reported for a passive finite impulse-response microwave photonic filter.

  2. High-Q Antennas with built-in coils

    DEFF Research Database (Denmark)

    Bahramzy, Pevand; Svendsen, Simon; Pedersen, Gert Frølund


    Efficiency and isolation, at low frequencies (700 MHz), are two of the most important metrics for successful multicommunication implementation. This paper presents an antenna concept, that exhibits a very high isolation between high-Q Tx and Rx antennas at 700 MHz. Furthermore, it is shown how...... coils can be integrating into the antenna structure for obtaining better efficiency. It is shown that by integrated coils into the antenna structure, the efficiency can be improved by 2dB for each antenna....

  3. Reliability challenge of ESD protection: From planner SOI MOSFET to SOI FinFET (United States)

    Jiang, Yibo; Bi, Hui; Dong, Liangwei; Li, Qinglong


    Implementation of Electrostatic Discharge (ESD) protection in Silicon on Insulator (SOI) technology is a challenge because of the inherent properties of poor heat conductor and heat trapping. In this paper, a novel device as ESD clamp is proposed as Fix-Base SOI FinFET clamp which addresses the troublesome problem of floating base. Moreover, its manufacturing process is compatible to the normal SOI process flow well. Finally, a detailed discussion including current density and thermal distribution are presented with the technique of 3D TCAD simulation.

  4. Process Optimization for Monolithic Integration of Piezoresistive Pressure Sensor and MOSFET Amplifier with SOI Approach (United States)

    Vinoth Kumar, V.; Dasgupta, A.; Bhat, K. N.; KNatarajan


    In this paper we present the design and process optimization for fabricating piezoresitive pressure sensor and MOSFET Differential Amplifier simultaneously on the same chip. Silicon On Insulator approach has been used for realizing the membrane as well as the electronics on the same chip. The amplifier circuit has been configured in the common source connection and it has been designed with PSPICE simulation to achieve a voltage gain of about 5. In the initial set of experiments the Pressure sensor and the amplifier were fabricated on separate chips to optimize the process steps and tested in the hybrid mode. In the next set of experiments, SOI wafer having the SOI layer thickness of about 11 microns was used for realizing the membrane by anisotropic etching from the backside. The piezo-resistive pressure sensor was realized on this membrane by connecting the polysilicon resistors in the form of a Wheatstone bridge. The MOSFET source follower amplifier was also fabricated on the same SOI wafer by tailoring the process steps to suit the requirement of simultaneous fabrication of piezoresistors and the amplifier for achieving MOSFET Integrated Pressure Sensor. Reproducible results have been achieved on the SOI wafers, with the process steps developed in the laboratory. Sensitivity of 270 mV /Bar/10V, with the on chip amplifier gain of 4.5, has been achieved with this process.

  5. Fast recovery SOI PiN diode with multiple trenches (United States)

    Zhang, Long; Zhu, Jing; Zhao, Minna; Ding, Desheng; Chen, Jian; Sun, Weifeng


    In this paper, a 500V SOI PiN lateral diode is proposed and investigated by simulations and experiments. The proposed structure features multiple deep-oxide trenches (MDOT) arranged in the silicon region. Two DOTs (T1 and T2) locating in the i-layer help to block the cathode-anode voltage (VCA), allowing the diode to shorten its i-layer length. With a similar breakdown voltage (BV) of 560V, the i-layer length is shortened from 47 μm for the conventional diode to 21.9 μm for the proposed MDOT diode. The shortened i-layer leads to a reduced number of stored carriers in the i-layer. Another DOT (T3) is inserted at the anode region of proposed MDOT diode and shorted with P+ anode. T3 acts as a vertical field plate, reshaping the electric potential distribution at the anode region and accelerating the depletion during the reverse recovery process. Thanks to the decreased number of the stored carriers and the accelerated depletion, the reverse recovery time (trr) of the proposed MDOT diode (211 ns) can be decreased by 56.7% compared with the conventional diode (487 ns) at the forward current density of 400 A/cm2 at T = 300 K. The proposed MDOT diode exhibits a better trade-off between forward voltage drop (VF) and reverse recovery time (trr) than the conventional and other reported diodes.

  6. Analytical modeling of surface accumulation behavior of fully depleted SOI four gate transistors (G4-FETs) (United States)

    Sayed, Shehrin; Khan, M. Ziaur Rahman


    A charge sheet model is proposed to analyze the transistor characteristics of fully depleted SOI four gate field effect transistors (G4-FETs). The model is derived assuming a parabolic potential variation between the junction-gates and by solving 2-D Poisson's equation. The proposed model facilitates the calculation of surface potential and charge densities as a function of all gate biases. Modifying this charge sheet model for non-equilibrium condition, current-voltage and capacitance-voltage characteristics are also analyzed. Different back surface charge conditions are considered for each analysis. The models are compared with 3-D Silvaco/Atlas simulation results which show good agreement.

  7. A broadband reflective filter for applying dc biases to high-Q superconducting microwave cavities (United States)

    Hao, Yu; Rouxinol, Francisco; Lahaye, Matt


    The integration of dc-bias circuitry into low-loss microwave cavities is an important technical issue for topics in many fields that include research with qubit- and cavity-coupled mechanical system, circuit QED and quantum dynamics of nonlinear systems. The applied potentials or currents serve a variety of functions such as maintaining the operating state of device or establishing tunable electrostatic interactions between devices (for example, in order to couple a nanomechanical resonator to a superconducting qubit to generate and detect quantum states of a mechanical resonator). Here we report a bias-circuit design that utilizes a broadband reflective filter to connect to a high-Q superconducting coplanar waveguide (CPW) cavity. Our design allows us to apply dc-voltages to the center trace of CPW, with negligible changes in loaded quality factors of the fundamental mode. Simulations and measurements of the filter demonstrate insertion loss greater than 20 dB in the range of 3 to 10 GHz. Transmission measurements of the voltage-biased CPW show that loaded quality factors exceeding 105 can be achieved for dc-voltages as high as V = +/- 20V for the cavity operated in the single photon regime. National Science Foundation under Grant No. DMR-1056423 and Grant No. DMR-1312421.

  8. SOI silicon on glass for optical MEMS

    DEFF Research Database (Denmark)

    Larsen, Kristian Pontoppidan; Ravnkilde, Jan Tue; Hansen, Ole


    A newly developed fabrication method for fabrication of single crystalline Si (SCS) components on glass, utilizing Deep Reactive Ion Etching (DRIE) of a Silicon On Insulator (SOI) wafer is presented. The devices are packaged at wafer level in a glass-silicon-glass (GSG) stack by anodic bonding...

  9. High-Q gold and silicon nitride bilayer nanostrings (United States)

    Biswas, T. S.; Suhel, A.; Hauer, B. D.; Palomino, A.; Beach, K. S. D.; Davis, J. P.


    Low-mass, high-Q, silicon nitride nanostrings are at the cutting edge of nanomechanical devices for sensing applications. Here we show that the addition of a chemically functionalizable gold overlayer does not adversely affect the Q of the fundamental out-of-plane mode. Instead the device retains its mechanical responsiveness while gaining sensitivity to molecular bonding. Furthermore, differences in thermal expansion within the bilayer give rise to internal stresses that can be electrically controlled. In particular, an alternating current (AC) excites resonant motion of the nanostring. This AC thermoelastic actuation is simple, robust, and provides an integrated approach to sensor actuation.

  10. High-Q terahertz reconfigurable metamaterials using graphene (United States)

    Arezoomandan, Sara; Sensale Rodriguez, Berardi


    We propose and discuss high-Q reconfigurable metamaterials based on graphene. The key components of the device are periodic concentric metallic ring resonators with interdigitated fingers, which are placed in-between the rings and provide for the large Q in the metamaterial, as well as several strategically located gaps where active graphene sheets are placed. We can easily adjust the frequency response of the metamaterial by means of varying a couple of parameters, such as the ring dimensions, number of fingers, etc., but also dynamically by means of varying conductivity in graphene.

  11. Proton structure at high Q/sup 2/

    CERN Document Server

    Nagano, K


    The H1 and ZEUS experiments at HERA have measured e/sup +/p and e/sup -/p deep inelastic scattering cross sections at high Q/sup 2/ both for neutral and charged current interactions. Results are presented from data taken during the 1994-1997 (e/sup +/p) and 1998-April 1999 (e/sup -/p) running periods. Preliminary results by H1 from the e/sup +/p data taken during the recent July 1999-2000 running period are also presented.

  12. High Q-factor tunable superconducting HF circuit

    CERN Document Server

    Vopilkin, E A; Pavlov, S A; Ponomarev, L I; Ganitsev, A Y; Zhukov, A S; Vladimirov, V V; Letyago, A G; Parshikov, V V


    Feasibility of constructing a high Q-factor (Q approx 10 sup 5) mechanically tunable in a wide range of frequencies (12-63 MHz) vibration circuit of HF range was considered. The tunable circuit integrates two single circuits made using YBaCuO films. The circuit frequency is tuned by changing distance X (capacity) between substrates. Potentiality of using substrates of lanthanum aluminate, neodymium gallate and strontium titanate for manufacture of single circuits was considered. Q-factor of the circuit amounted to 68000 at resonance frequency of 6.88 MHz

  13. Room to high temperature measurements of flexible SOI FinFETs with sub-20-nm fins

    KAUST Repository

    Diab, Amer El Hajj


    We report the temperature dependence of the core electrical parameters and transport characteristics of a flexible version of fin field-effect transistor (FinFET) on silicon-on-insulator (SOI) with sub-20-nm wide fins and high-k/metal gate-stacks. For the first time, we characterize them from room to high temperature (150 °C) to show the impact of temperature variation on drain current, gate leakage current, and transconductance. Variation of extracted parameters, such as low-field mobility, subthreshold swing, threshold voltage, and ON-OFF current characteristics, is reported too. Direct comparison is made to a rigid version of the SOI FinFETs. The mobility degradation with temperature is mainly caused by phonon scattering mechanism. The overall excellent devices performance at high temperature after release is outlined proving the suitability of truly high-performance flexible inorganic electronics with such advanced architecture.

  14. Improvement in the performance of SOI-MESFETs by T-shaped oxide part at channel region: DC and RF characteristics (United States)

    Naderi, Ali; Heirani, Fatemeh


    In this paper, a new structure for silicon on insulator (SOI) metal semiconductor field effect transistor (MESFET) is proposed. This new structure improves DC and RF characteristics of the device by embedding a region of hafnium oxide which is shaped like a reversed T letter in the channel region. This structure is named SOI-MESFET with T-Shaped oxide part (T-SOP). Hafnium oxide region increases the breakdown voltage of the device due to its higher critical electric field in comparison with silicon used in the conventional structure (C-SOI MESFET). The breakdown voltage of the conventional structure is 14 V while it raises to 19.5 V in proposed structure. Furthermore, placing this region in the channel, increases the operating frequencies of the device due to the modification in capacitances. Studying the maximum output power density shows that the proposed structure causes 31.5% improvement compared with the C-SOI MESFET. To improve the device performance, dimensions of the oxide region have been optimized and the more optimum performance achieved by varying the dimensions and finding the most suitable values. Due to the mentioned superiorities of the proposed structure over its conventional counterpart, it can be said that the proposed structure has the capability to be used as a reliable alternative for C-SOI MESFET in high voltage and high frequency applications. Also, from fabrication point of view, a fabrication process flow for T-SOP structure is proposed which shows convenient steps to develop this device.

  15. Low-Power SOI CMOS Transceiver (United States)

    Fujikawa, Gene (Technical Monitor); Cheruiyot, K.; Cothern, J.; Huang, D.; Singh, S.; Zencir, E.; Dogan, N.


    The work aims at developing a low-power Silicon on Insulator Complementary Metal Oxide Semiconductor (SOI CMOS) Transceiver for deep-space communications. RF Receiver must accomplish the following tasks: (a) Select the desired radio channel and reject other radio signals, (b) Amplify the desired radio signal and translate them back to baseband, and (c) Detect and decode the information with Low BER. In order to minimize cost and achieve high level of integration, receiver architecture should use least number of external filters and passive components. It should also consume least amount of power to minimize battery cost, size, and weight. One of the most stringent requirements for deep-space communication is the low-power operation. Our study identified that two candidate architectures listed in the following meet these requirements: (1) Low-IF receiver, (2) Sub-sampling receiver. The low-IF receiver uses minimum number of external components. Compared to Zero-IF (Direct conversion) architecture, it has less severe offset and flicker noise problems. The Sub-sampling receiver amplifies the RF signal and samples it using track-and-hold Subsampling mixer. These architectures provide low-power solution for the short- range communications missions on Mars. Accomplishments to date include: (1) System-level design and simulation of a Double-Differential PSK receiver, (2) Implementation of Honeywell SOI CMOS process design kit (PDK) in Cadence design tools, (3) Design of test circuits to investigate relationships between layout techniques, geometry, and low-frequency noise in SOI CMOS, (4) Model development and verification of on-chip spiral inductors in SOI CMOS process, (5) Design/implementation of low-power low-noise amplifier (LNA) and mixer for low-IF receiver, and (6) Design/implementation of high-gain LNA for sub-sampling receiver. Our initial results show that substantial improvement in power consumption is achieved using SOI CMOS as compared to standard CMOS

  16. Optimisation Design of Coupling Region Based on SOI Micro-Ring Resonator

    Directory of Open Access Journals (Sweden)

    Shubin Yan


    Full Text Available Design optimization of the coupling region is conducted in order to solve the difficulty of achieving a higher quality factor (Q for large size resonators based on silicon-on-insulator (SOI. Relations among coupling length, coupling ratio and quality factor of the optical cavities are theoretically analyzed. Resonators (R = 100 μm with different coupling styles, concentric, straight, and butterfly, are prepared by the micro-electro-mechanical-systems (MEMS process. Coupling experimental results show that micro-cavity of butterfly-coupled style obtains the narrowest (3 dB bandwidth, and the quality factor has been greatly improved. The results provide the foundation for realization of a large size, high-Q resonator, and its development and application in the integrated optical gyroscopes, filters, sensors, and other related fields.

  17. High-Q Supercavity Modes in Subwavelength Dielectric Resonators. (United States)

    Rybin, Mikhail V; Koshelev, Kirill L; Sadrieva, Zarina F; Samusev, Kirill B; Bogdanov, Andrey A; Limonov, Mikhail F; Kivshar, Yuri S


    Recent progress in nanoscale optical physics is associated with the development of a new branch of nanophotonics exploring strong Mie resonances in dielectric nanoparticles with a high refractive index. The high-index resonant dielectric nanostructures form building blocks for novel photonic metadevices with low losses and advanced functionalities. However, unlike extensively studied cavities in photonic crystals, such dielectric resonators demonstrate low quality factors (Q factors). Here, we uncover a novel mechanism for achieving giant Q factors of subwavelength nanoscale resonators by realizing the regime of bound states in the continuum. In contrast to the previously suggested multilayer structures with zero permittivity, we reveal strong mode coupling and Fano resonances in homogeneous high-index dielectric finite-length nanorods resulting in high-Q factors at the nanoscale. Thus, high-index dielectric resonators represent the simplest example of nanophotonic supercavities, expanding substantially the range of applications of all-dielectric resonant nanophotonics and meta-optics.

  18. High Q, Miniaturized LCP-Based Passive Components

    KAUST Repository

    Shamim, Atif


    Various methods and systems are provided for high Q, miniaturized LCP-based passive components. In one embodiment, among others, a spiral inductor includes a center connection and a plurality of inductors formed on a liquid crystal polymer (LCP) layer, the plurality of inductors concentrically spiraling out from the center connection. In another embodiment, a vertically intertwined inductor includes first and second inductors including a first section disposed on a side of the LCP layer forming a fraction of a turn and a second section disposed on another side of the LCP layer. At least a portion of the first section of the first inductor is substantially aligned with at least a portion of the second section of the second inductor and at least a portion of the first section of the second inductor is substantially aligned with at least a portion of the second section of the first inductor.

  19. Ultra-high-Q nanobeam cavity design in Diamond

    CERN Document Server

    Bayn, Igal; Kalish, Rafi


    A novel nanobeam design with a triangular cross-section is proposed. This design makes possible implementing nanocavities with improved optical properties. The dependence of a diamond-based cavity quality factor Q and mode volume Vm on geometry parameter space are studied via 3D FDTD computations. An ultra-high-Q cavity with Q\\aprox 2.51 \\times 10^6 and Vm=1.06 \\times ({\\lambda}/n)^3 is predicted. The mode preferential radiation is upward. The implications on the potential applications are discussed. The proposed nanobeam enables fabrication of the cavity without relying on a pre-existing free-standing diamond membrane as required in most previous approaches.

  20. A low on-resistance triple RESURF SOI LDMOS with planar and trench gate integration (United States)

    Luo, Xiao-Rong; Yao, Guo-Liang; Zhang, Zheng-Yuan; Jiang, Yong-Heng; Zhou, Kun; Wang, Pei; Wang, Yuan-Gang; Lei, Tian-Fei; Zhang, Yun-Xuan; Wei, Jie


    A low on-resistance (Ron,sp) integrable silicon-on-insulator (SOI) n-channel lateral double-diffused metal-oxide-semiconductor (LDMOS) is proposed and its mechanism is investigated by simulation. The LDMOS has two features: the integration of a planar gate and an extended trench gate (double gates (DGs)); and a buried P-layer in the N-drift region, which forms a triple reduced surface field (RESURF) (TR) structure. The triple RESURF not only modulates the electric field distribution, but also increases N-drift doping, resulting in a reduced specific on-resistance (Ron,sp) and an improved breakdown voltage (BV) in the off-state. The DGs form dual conduction channels and, moreover, the extended trench gate widens the vertical conduction area, both of which further reduce the Ron,sp. The BV and Ron,sp are 328 V and 8.8 mΩ·cm2, respectively, for a DG TR metal-oxide-semiconductor field-effect transistor (MOSFET) by simulation. Compared with a conventional SOI LDMOS, a DG TR MOSFET with the same dimensional device parameters as those of the DG TR MOSFET reduces Ron,Sp by 59% and increases BV by 6%. The extended trench gate synchronously acts as an isolation trench between the high-voltage device and low-voltage circuitry in a high-voltage integrated circuit, thereby saving the chip area and simplifying the fabrication processes.

  1. Design of a Capacitive SOI Micromachined Accelerometer


    Zhao, Wenjing; Xu, Limei


    A capacitive micromachined accelerometer based on the technique of silicon on insulator, is designed in this paper. The proposed microaccelerometer is designed to obtain good electrical performance and radioresistance in order to make the accelerometer integrate with the CMOS chip. The performance of the capacitive SOI microaccelerometer is calculated to determine its linear capacitance change and achieves a very linear response with input acceleration after theoretical analysis. The relation...

  2. A High-Q Resonant Pressure Microsensor with Through-Glass Electrical Interconnections Based on Wafer-Level MEMS Vacuum Packaging

    Directory of Open Access Journals (Sweden)

    Zhenyu Luo


    Full Text Available This paper presents a high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging. An approach to maintaining high-vacuum conditions by integrating the MEMS fabrication process with getter material preparation is presented in this paper. In this device, the pressure under measurement causes a deflection of a pressure-sensitive silicon square diaphragm, which is further translated to stress build up in “H” type doubly-clamped micro resonant beams, leading to a resonance frequency shift. The device geometries were optimized using FEM simulation and a 4-inch SOI wafer was used for device fabrication, which required only three photolithographic steps. In the device fabrication, a non-evaporable metal thin film as the getter material was sputtered on a Pyrex 7740 glass wafer, which was then anodically bonded to the patterned SOI wafer for vacuum packaging. Through-glass via holes predefined in the glass wafer functioned as the electrical interconnections between the patterned SOI wafer and the surrounding electrical components. Experimental results recorded that the Q-factor of the resonant beam was beyond 22,000, with a differential sensitivity of 89.86 Hz/kPa, a device resolution of 10 Pa and a nonlinearity of 0.02% F.S with the pressure varying from 50 kPa to 100 kPa. In addition, the temperature drift coefficient was less than −0.01% F.S/°C in the range of −40 °C to 70 °C, the long-term stability error was quantified as 0.01% F.S over a 5-month period and the accuracy of the microsensor was better than 0.01% F.S.

  3. Composite ULP diode fabrication, modelling and applications in multi- Vth FD SOI CMOS technology (United States)

    Levacq, David; Liber, Christophe; Dessard, Vincent; Flandre, Denis


    We present new SOI basic circuit cells architectures for ultra-low power (ULP) applications that use transistors in very weak inversion. These cells take advantage of the possibility to obtain multi-threshold transistors in fully depleted (FD) SOI CMOS with no additional cost. In particular, a new composite ULP diode is proposed and modelled. It has been fabricated on 0.18 and 2 μm FD SOI technologies and demonstrated a reduction of leakage currents by four orders of magnitude compared to standard MOS diode implementation. We demonstrate that the ULP diode can be used to realize memory cells that present strongly reduced static power consumption compared to standard SRAM cells and can work under 0.5 V supply voltage. As particular application, simulations of ULP memory latches used as level-keepers in MTCMOS circuits to maintain information on floating nodes during standby mode demonstrate static power savings of 20% when compared to the best traditional schemes with comparable speed performance. Finally, measurements show that the new proposed ULP cells keep functionality at high temperature.

  4. Stopping electric field extension in a modified nanostructure based on SOI technology - A comprehensive numerical study (United States)

    Anvarifard, Mohammad K.; Orouji, Ali A.


    This article has related a particular knowledge in order to reduce short channel effects (SCEs) in nano-devices based on silicon-on-insulator (SOI) MOSFETs. The device under study has been designed in 22 nm node technology with embedding Si3N4 extra oxide as a stopping layer of electric field and a useful heatsink for transferring generated heat. Two important subjects (DC characteristics and RF characteristics) have been investigated, simultaneously. Stopping electric field extension and enhancement of channel thermal conduction are introduced as an entrance gateway for this work so that improve the electrical characteristics, eventually. The inserted extra oxide made by the Si3N4 material has a vital impact on the modification of the electrical and thermal features in the proposed device. An immense comparison between the proposed SOI and conventional SOI showed that the proposed structure has higher electrical and thermal proficiency than the conventional structure in terms of main parameters such as short channel effects (SCEs), leakage current, floating body effect (FBE), self-heating effect (SHE), voltage gain, ratio of On-current to Off- current, transconductance, output conductance, minimum noise figure and power gain.

  5. CMOS Application of Schottky Source/Drain SOI MOSFET with Shallow Doped Extension (United States)

    Matsumoto, Sumie; Nishisaka, Mika; Asano, Tanemasa


    The silicon-on-insulator metal-oxide-semiconductor field-effect transistor (SOI MOSFET) whose source/drain is composed of Schottky contacts and a shallow-doped extension is investigated. It is demonstrated that the incorporation of the shallow-doped extension into the Schottky source/drain can increase the current drive and reduce the leakage current under reverse bias for both n-channel and p-channel devices. The shallow doping is performed by implanting Sb for n-channel devices, and BF2 or Ga for p-channel devices. The effect of Schottky contacts on the floating body effect (FBE) is investigated by analyzing the lateral bipolar characteristics of these devices. By employing the shallow-doped extension, a complementary MOS (CMOS) of the Schottky source/drain can be fabricated using single metal (cobalt, in this work) silicide. The stability of CMOS operation with the proposed devices under a high supply voltage is demonstrated by comparing it with a conventional pn-junction SOI MOSFET. It is also demonstrated from the characteristics of the CMOS-inverter ring oscillator that the proposed device operates at speeds as high as or even higher than that of the conventional SOI MOSFET.

  6. Macroscopic quantum electrodynamics of high-Q cavities

    Energy Technology Data Exchange (ETDEWEB)

    Khanbekyan, Mikayel


    In this thesis macroscopic quantum electrodynamics in linear media was applied in order to develop an universally valid quantum theory for the description of the interaction of the electromagnetic field with atomic sources in high-Q cavities. In this theory a complete description of the characteristics of the emitted radiation is given. The theory allows to show the limits of the applicability of the usually applied theory. In order to establish an as possible generally valid theory first the atom-field interaction was studied in the framework of macroscopic quantum electrodynamics in dispersive and absorptive media. In order to describe the electromagnetic field from Maxwell's equations was started, whereby the noise-current densities, which are connected with the absorption of the medium, were included. The solution of these equations expresses the electromagnetic field variables by the noise-current densities by means of Green's tensor of the macroscopic Maxwell equations. The explicit quantization is performed by means of the noise-current densities, whereby a diagonal Hamiltonian is introduced, which then guarantees the time development according to Maxwell's equation and the fulfillment of the fundamental simultaneous commutation relations of the field variables. In the case of the interaction of the medium-supported field with atoms the Hamiltonian must be extended by atom-field interactions energies, whereby the canonical coupling schemes of the minimal or multipolar coupling can be used. The dieelectric properties of the material bodies as well as their shape are coded in the Green tensor of the macroscopic Maxwell equations. As preparing step first the Green tensor was specified in order to derive three-dimensional input-output relations for the electromagnetic field operators on a plane multilayer structure. Such a general dewscription of the electromagnetic field allows the inclusion both of dispersion and absorption of the media and the

  7. Thermal Loss of High-Q Antennas in Time Domain vs. Frequency Domain Solver

    DEFF Research Database (Denmark)

    Bahramzy, Pevand; Pedersen, Gert Frølund


    High-Q structures pose great challenges to their loss simulations in Time Domain Solvers (TDS). Therefore, in this work the thermal loss of high-Q antennas is calculated both in TDS and Frequency Domain Solver (FDS), which are then compared with each other and with the actual measurements....... The thermal loss calculation in FDS is shown to be more accurate for high-Q antennas....

  8. Review of SiGe HBTs on SOI (United States)

    Mitrovic, I. Z.; Buiu, O.; Hall, S.; Bagnall, D. M.; Ashburn, P.


    This paper reviews progress in SiGe Heterojunction Bipolar Transistors (HBT) on Silicon-On-Insulator (SOI) technology. SiGe HBTs on SOI are attractive for mixed signal radio frequency (RF) applications and have been of increasing research interest due to their compatibility with SOI CMOS (Complementary Metal Oxide Semiconductor) technology. In bipolar technology, the use of SOI substrate eliminates parasitic substrate transistors and associated latch-up, and has the ability to reduce crosstalk, particularly when combined with buried groundplanes (GP). Various technological SOI bipolar concepts are reviewed with special emphasis on the state-of-the-art SOI SiGe HBT devices in vertical and lateral design. More in depth results are shown from a UK consortium advanced RF platform technology, which includes SOI SiGe HBTs. Bonded wafer technology was developed to allow incorporation of buried silicide layers both above and below the buried oxide. New electrical and noise characterisation results pointed to reduced 1/ f noise in these devices compared to bulk counterparts. The lower noise is purported to arise from strain relief of the device structure due to the elasticity of the buried oxide layer during the high temperature epitaxial layer growth. The novel concept of the silicide SOI (SSOI) SiGe HBT technology developed for targeting a reduction in collector resistance, as well as for suppressing the crosstalk, is outlined. The buried tungsten silicide layers were found to have negligible impact on junction leakage. Further to vertical SiGe HBTs on SOI, the challenges of fabricating a lateral SOI SiGe HBT structure are presented.

  9. Modeling and analysis of surface potential of single gate fully depleted SOI MOSFET using 2D-Poisson's equation (United States)

    Mani, Prashant; Tyagi, Chandra Shekhar; Srivastav, Nishant


    In this paper the analytical solution of the 2D Poisson's equation for single gate Fully Depleted SOI (FDSOI) MOSFET's is derived by using a Green's function solution technique. The surface potential is calculated and the threshold voltage of the device is minimized for the low power consumption. Due to minimization of threshold voltage the short channel effect of device is suppressed and after observation we obtain the device is kink free. The structure and characteristics of SingleGate FDSOI MOSFET were matched by using MathCAD and silvaco respectively.

  10. SEMICONDUCTOR DEVICES: A three-dimensional breakdown model of SOI lateral power transistors with a circular layout (United States)

    Yufeng, Guo; Zhigong, Wang; Gene, Sheu


    This paper presents an analytical three-dimensional breakdown model of SOI lateral power devices with a circular layout. The Poisson equation is solved in cylindrical coordinates to obtain the radial surface potential and electric field distributions for both fully- and partially-depleted drift regions. The breakdown voltages for N+N and P+N junctions are derived and employed to investigate the impact of cathode region curvature. A modified RESURF criterion is proposed to provide a design guideline for optimizing the breakdown voltage and doping concentration in the drift region in three dimensional space. The analytical results agree well with MEDICI simulation results and experimental data from earlier publications.

  11. Statistical Modeling of Soi Devices for Low-Power Electronics. (United States)

    Phelps, Mark Joseph


    This dissertation addresses the needs of low-power, large-scale integrated circuit device design, advanced materials technology, and computer simulation for statistical modeling. The main body of work comprises the creation and implementation of a software shell (STADIUM-SOI) that automates the application of statistics to commercial technology computer-aided design tools. The objective is to demonstrate that statistical design of experiments methodology can be employed for the advanced material technology of Silicon -On-Insulator (SOI) devices. The culmination of this effort was the successful modeling of the effect of manufacturing process variation on SOI device characteristics and the automation of this procedure.

  12. Fully On-chip High Q Inductors Based on Microtechnologies

    Directory of Open Access Journals (Sweden)

    Kriyang SHAH


    Full Text Available Wireless biosensor networks (WBSNs collect information about biological responses and process it using scattered battery-power sensor nodes. Such nodes demand ultra low-power consumption for longer operating time. Ultra Wide Band (UWB is a potential solution for WBSNs due to its advantage in low power consumption at reasonable data rate. However, such UBW technology requires high quality (Q factor passive components. This paper presents detailed analysis, design and optimization of physical parameters of silicon-on-sapphire (SOS and micro-electro-mechanical-systems (MEMS inductors for application in UWB transceivers. Results showed that the 1.5 nH SOS inductor achieved Q factor of 111 and MEMS inductor achieved Q factor of 45 at 4 GHz frequency. The voltage controlled oscillator (VCO designed with SOS inductor achieved more than 10 dBc/Hz reduction in phase noise and consumed half the power compared to VCO with MEMS inductor. Such low power VCO will improve battery life of a UWB wireless sensor node.

  13. Fourth-Order Contour Mode ZnO-on-SOI Disk Resonators for Mass Sensing Applications

    Directory of Open Access Journals (Sweden)

    Ivan Rivera


    Full Text Available In this work, we have investigated the design, fabrication and testing of ZnO-on-SOI fourth-order contour mode disk resonators for mass sensing applications. This study aims to unveil the possibility for real-time practical mass sensing applications by using high-Q ZnO-on-SOI contour-mode resonators while taking into account their unique modal characteristics. Through focused ion beam (FIB direct-write metal deposition techniques, the effects of localized mass loading on the surface of three extensional mode devices have been investigated. Ten microfabricated 40 mm-radius disk resonators, which all have a 20 mm-thick silicon device layer and 1 mm-thick ZnO transducer layer but varied anchor widths and numbers, have exhibited resonant frequencies ranging from 84.9 MHz to 86.7 MHz with Q factors exceeding 6000 (in air and 10,000 (in vacuum, respectively. It has been found that the added mass at the nodal locations leads to noticeable Q-factor degradation along with lower induced frequency drift, thereby resulting in reduced mass sensitivity. All three measured devices have shown a mass sensitivity of ~1.17 Hz·fg−1 at the maximum displacement points with less than 33.3 ppm of deviation in term of fractional frequency change. This mass sensitivity is significantly higher than 0.334 Hz·fg−1 at the nodal points. Moreover, the limit of detection (LOD for this resonant mass sensor was determined to be 367 ag and 1290 ag (1 ag = 10−18 g for loaded mass at the maximum and minimum displacement points, accordingly.

  14. Electrothermal simulation of SOI CMOS analog integrated circuits (United States)

    Yu, Feixia; Cheng, Ming-C.


    An analytical approach, combining a heat flow device model for SOI devices and a thermal model for interconnects, is presented for electrothermal simulation of SOI analog integrated circuits. The proposed approach is able to account for large temperature gradients in device, heat exchanges between devices, heat losses from the silicon islands and interconnects to the substrate through oxide, and temperature influences on electronic characteristics. Electrothermal simulations of SOI analog integrated circuits in SPICE coupled with the proposed approach are performed and compared with the isothermal model using the BSIMSOI thermal circuit. Heat flow, thermal coupling and self-heating effects in some SOI analog integrated circuits influenced by non-isothermal effects are examined. Limitations of the BSIMSOI isothermal is discussed.

  15. Hybrid III-V/SOI Resonant Cavity Photodetector

    DEFF Research Database (Denmark)

    Learkthanakhachon, Supannee; Taghizadeh, Alireza; Park, Gyeong Cheol


    A hybrid III-V/SOI resonant cavity photo detector has been demonstrated, which comprises an InP grating reflectorand a Si grating reflector. It can selectively detects an incident light with 1.54-µm wavelength and TM polarization.......A hybrid III-V/SOI resonant cavity photo detector has been demonstrated, which comprises an InP grating reflectorand a Si grating reflector. It can selectively detects an incident light with 1.54-µm wavelength and TM polarization....

  16. High-Q Wafer Level Package Based on Modified Tri-Layer Anodic Bonding and High Performance Getter and Its Evaluation for Micro Resonant Pressure Sensor

    Directory of Open Access Journals (Sweden)

    Liying Wang


    Full Text Available In order to achieve and maintain a high quality factor (high-Q for the micro resonant pressure sensor, this paper presents a new wafer level package by adopting cross-layer anodic bonding technique of the glass/silicon/silica (GSS stackable structure and integrated Ti getter. A double-layer structure similar to a silicon-on-insulator (SOI wafer is formed after the resonant layer and the pressure-sensitive layer are bonded by silicon direct bonding (SDB. In order to form good bonding quality between the pressure-sensitive layer and the glass cap layer, the cross-layer anodic bonding technique is proposed for vacuum package by sputtering Aluminum (Al on the combination wafer of the pressure-sensitive layer and the resonant layer to achieve electrical interconnection. The model and the bonding effect of this technique are discussed. In addition, in order to enhance the performance of titanium (Ti getter, the prepared and activation parameters of Ti getter under different sputtering conditions are optimized and discussed. Based on the optimized results, the Ti getter (thickness of 300 nm to 500 nm is also deposited on the inside of the glass groove by magnetron sputtering to maintain stable quality factor (Q. The Q test of the built testing system shows that the number of resonators with a Q value of more than 10,000 accounts for more than 73% of the total. With an interval of 1.5 years, the Q value of the samples remains almost constant. It proves the proposed cross-layer anodic bonding and getter technique can realize high-Q resonant structure for long-term stable operation.

  17. Investigation of temperature-dependent small-signal performances of TB SOI MOSFETs (United States)

    Huang, Yuping; Liu, Jun; Lü, Kai; Chen, Jing


    This paper investigated the temperature dependence of the cryogenic small-signal ac performances of multi-finger partially depleted (PD) silicon-on-insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs), with T-gate body contact (TB) structure. The measurement results show that the cut-off frequency increases from 78 GHz at 300 K to 120 GHz at 77 K and the maximum oscillation frequency increases from 54 GHz at 300 K to 80 GHz at 77 K, and these are mainly due to the effect of negative temperature dependence of threshold voltage and transconductance. By using a simple equivalent circuit model, the temperature-dependent small-signal parameters are discussed in detail. The understanding of cryogenic small-signal performance is beneficial to develop the PD SOI MOSFETs integrated circuits for ultra-low temperature applications. Project supported by the National Natural Science Foundation of China (No. 61331006) and the National Defense Pre-Research Foundation of China (No. 9140A11040114DZ04152).

  18. Electronics and Sensor Study with the OKI SOI process

    CERN Document Server

    Arai, Yasuo


    While the SOI (Silicon-On-Insulator) device concept is very old, commercialization of the technology is relatively new and growing rapidly in high-speed processor and lowpower applications. Furthermore, features such as latch-up immunity, radiation hardness and high-temperature operation are very attractive in high energy and space applications. Once high-quality bonded SOI wafers became available in the late 90s, it opened up the possibility to get two different kinds of Si on a single wafer. This makes it possible to realize an ideal pixel detector; pairing a fully-depleted radiation sensor with CMOS circuitry in an industrial technology. In 2005 we started Si pixel R&D with OKI Electric Ind. Co., Ltd. which is the first market supplier of Fully-Depleted SOI products. We have developed processes for p+/n+ implants to the substrate and for making connections between the implants and circuits in the OKI 0.15μm FD-SOI CMOS process. We have preformed two Multi Project Wafer (MPW) runs using this SOI proces...

  19. Development FD-SOI MOSFET Amplifiers for Integrated Read-Out Circuit of Superconducting-Tunnel-Junction Single-Photon-Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Kiuchi, Kenji; et al.


    We proposed a new high-resolution single-photon infrared spectrometer for search for radiative decay of cosmic neutrino background (CνB). The superconducting-tunnel-junctions(STJs) are used as a single-photon counting device. Each STJ consists of Nb/Al/AlxOy/Al/Nb layers, and their thicknesses are optimized for the operation temperature at 370 mK cooled by a 3He sorption refrigerator. Our STJs achieved the leak current 250 pA, and the measured data implies that a smaller area STJ fulfills our requirement. FD-SOI MOSFETs are employed to amplify the STJ signal current in order to increase signal-to-noise ratio (S/N). FD-SOI MOSFETs can be operated at cryogenic temperature of 370 mK, which reduces the noise of the signal amplification system. FD-SOI MOSFET characteristics are measured at cryogenic temperature. The Id-Vgs curve shows a sharper turn on with a higher threshold voltage and the Id-Vds curve shows a nonlinear shape in linear region at cryogenic temperature. Taking into account these effects, FD-SOI MOSFETs are available for read-out circuit of STJ detectors. The bias voltage for STJ detectors is 0.4 mV, and it must be well stabilized to deliver high performance. We proposed an FD-SOI MOSFET-based charge integrated amplifier design as a read-out circuit of STJ detectors. The requirements for an operational amplifier used in the amplifier is estimated using SPICE simulation. The op-amp is required to have a fast response (GBW ≥ 100 MHz), and it must have low power dissipation as compared to the cooling power of refrigerator.

  20. Reconfigurable ultra-thin film GDNMOS device for ESD protection in 28 nm FD-SOI technology (United States)

    Athanasiou, Sotirios; Legrand, Charles-Alexandre; Cristoloveanu, Sorin; Galy, Philippe


    We propose a novel ESD protection device (GDNMOS: Gated Diode merged NMOS) fabricated with 28 nm UTBB FD-SOI high-k metal gate technology. By modifying the combination of the diode and transistor gate stacks, the robustness of the device is optimized, achieving a maximum breakdown voltage (VBR) of 4.9 V. In addition, modifications of the gate length modulate the trigger voltage (Vt1) with a minimum value of 3.5 V. Variable electrostatic doping (gate-induced) in diode and transistor body enables reconfigurable operation. A lower doping of the base enhances the bipolar gain, leading to thyristor behavior. This innovative architecture demonstrates excellent capability for high-voltage protection while maintaining a latch-up free behavior.

  1. Electrothermal simulations of high-power SOI vertical DMOS transistors with lateral drain contacts under unclamped inductive switching test (United States)

    Pinardi, Kuntjoro; Heinle, Ulrich; Bengtsson, Stefan; Olsson, Jörgen; Colinge, Jean-Pierre


    Electrothermal effects during the unclamped inductive switching (UIS) of silicon-on-insulator (SOI) high power vertical double diffused MOS (VDMOS) transistors have been studied by device simulation. In the UIS test all the energy stored in the inductor during the on state is dumped directly into the device when the device is turned off. This extreme condition during the UIS test will give ratings for the power device and gives a measure for the stability of the device in the breakdown regime. Electrothermal simulations of this device are evaluated under boundary conditions imposed by the UIS circuit. Simulations show that UIS involves a substantial risk of turning the parasitic bipolar transistor (BJT) on. Our measurements of the fabricated SOI VDMOSFET in the static region are in good agreement with the expected impact of the self-heating on the saturation behaviour. The experiments at ambient temperature of 100 °C show that the breakdown voltage decreases as the drain voltage increases. This indicates that the parasitic BJT has been turned on and causes an open-base bipolar transistor breakdown voltage.

  2. Impact of Ge profile on the performance of PNP SiGe HBT on thin film SOI (United States)

    Misra, Prasanna K.; Qureshi, S.


    The pnp SiGe HBT on thin film SOI is investigated with different Ge profiles using 2D numerical simulations in MEDICI. The base current, collector current, DC current gain, AC voltage gain, unity current gain frequency and breakdown voltage is obtained for a 0.09 × 1.0 μm2 pnp SiGe HBT with triangular (0%-30%), trapezoidal (10%- 20%) and box (15%) Ge profiles in the base layer. The results obtained with the Ge profiles, has been analyzed and compared. The Ft BVCEO product for triangular, trapezoidal and box Ge profiles has been found as 190.8, 401, and 359.6 GHzV respectively. The tradeoff between voltage gain and unity current gain frequency for the Ge profiles has been analyzed. The simulation result suggests that the pnp SiGe HBT on thin film SOI with trapezoidal Ge profile is a potential candidate for the high speed complementary bipolar circuits that can be used in high performance mixed signal applications.

  3. Seebeck Coefficient of SOI Layer Induced by Phonon Transport

    Directory of Open Access Journals (Sweden)

    Faiz Salleh


    Full Text Available The Seebeck coefficient of a patterned Si wire on P-doped SOI (Si-on-insulator layer with a carrier concentration of 1018 cm-3 was measured near room temperature. The Seebeck coefficient is found to be smaller than that in the SOI layer and to be closer to the calculated Seebeck coefficient including the electronic contribution. The decrease in the Seebeck coefficient of Si wire is likely to occur due to the elimination of the contribution of phonon drag part. From the theoretical calculation of scattering rates by considering the scattering processes in phonon system, it is considered that an increase in phonon-boundary scattering and simultaneously a decrease at the cross section of SOI layer are likely responsible for eliminating the phonon drag effect.

  4. A high aspect ratio silicon-fin FinFET fabricated upon SOI wafer (United States)

    Liaw, Yue-Gie; Liao, Wen-Shiang; Wang, Mu-Chun; Lin, Cheng-Li; Zhou, Bin; Gu, Haoshuang; Li, Deshi; Zou, Xuecheng


    Three dimensional (3-D) FinFET devices with an ultra-high Si-fin aspect ratio (Height/Width = 82.9 nm/8.6 nm) have been developed after integrating a 14 Å nitrided gate oxide upon the silicon on insulator (SOI) wafers through an advanced CMOS logic platform. The drive current (ION), off current (IOFF), subthreshold swing (SS), drain-induced barrier lowering (DIBL) and transistor gate delay of 30 nm gate length (Lg) of FinFETs illustrate the promising device performance. The TCAD simulations demonstrate that both threshold voltage (Vth) and off current can be adjusted appropriately through the full silicidation (FUSI) of CoSi2 gate engineering. Moreover, the drive currents of n- and p-channel FinFETs are able to be further enhanced once applying the raised Source/Drain (S/D) approach technology for reducing the S/D resistance drastically.

  5. Nanoscale SOI silicon light source design for improved efficiency (United States)

    Venter, Petrus J.; du Plessis, Monuko; Bogalecki, Alfons W.; Janse van Rensburg, Christo


    Silicon-on-insulator (SOI) is becoming an important technology platform in nanometer scale CMOS integrated circuits. The platform offers a number of distinct advantages over bulk CMOS for materializing silicon light sources based on hot carrier luminescence. This work describes the design of nanoscale silicon structures for enhanced light emission with improved power efficiency, which allows the use of SOI light sources in short-haul optical communication links with extended possibilities for other applications. It has been shown experimentally that reducing the dimensions of the active material results in an improvement of electroluminescent power emitted from forward-biased pn-junctions. Previously published results show a similar trend for light sources based on hot carrier luminescence. Building on our previous work in SOI light sources, multiple fingerlike junctions are manufactured in an arrayed fashion for coupling into large diameter core optical fibers for CMOS optical communications up to a few hundred meters. The manufacturing methodology and associated challenges are discussed for the scaling down of device dimensions, and difficulties in realizing the structures are investigated. The optical power characteristics are discussed as well as the spectral nature of emission along with the advantages and disadvantages thereof. This work compares different architectures of light sources that were implemented where a comparison is drawn between previous SOI devices as well as bulk CMOS. We believe the improved SOI light sources are fully compatible with modern CMOS technologies based on SOI and may provide such technologies with a much needed light source as part of the circuit designer's toolkit.

  6. The Bridges SOI Model School Program at Palo Verde School, Palo Verde, Arizona. (United States)

    Stock, William A.; DiSalvo, Pamela M.

    The Bridges SOI Model School Program is an educational service based upon the SOI (Structure of Intellect) Model School curriculum. For the middle seven months of the academic year, all students in the program complete brief daily exercises that develop specific cognitive skills delineated in the SOI model. Additionally, intensive individual…

  7. Numerical study of long Josephson junctions coupled to a high-Q cavity

    DEFF Research Database (Denmark)

    Grønbech-Jensen, N.; Pedersen, Niels Falsig; Davidson, A.


    Long Josephson junctions coupled to a high-Q resonator are studied numerically and compared with recently published approximative results, obtained by using a perturbative approach to the fluxon motion in the junction. The similarities and differences in the two approaches are discussed.......Long Josephson junctions coupled to a high-Q resonator are studied numerically and compared with recently published approximative results, obtained by using a perturbative approach to the fluxon motion in the junction. The similarities and differences in the two approaches are discussed....

  8. SOI waveguide based planar reflective grating demultiplexer for FTTH (United States)

    Bidnyk, S.; Feng, D.; Balakrishnan, A.; Pearson, M.; Gao, M.; Liang, H.; Qian, W.; Kung, C.-C.; Fong, J.; Yin, J.; Asghari, M.


    Recent deployments of fiber-to-the-home (FTTH) represent the fastest growing sector of the telecommunication industry. The emergence of the silicon-on-insulator (SOI) photonics presents an opportunity to exploit the wide availability of silicon foundries and high-quality low-cost substrates for addressing the FTTH market. We have now demonstrated that a monolithically integrated FTTH demultiplexer can be built using the SOI platform. The SOI filter comprises a monolithically integrated planar reflective grating and a multi-stage Mach-Zehnder interferometer that were fabricated using a CMOS-compatible SOI process with the core thickness of 3.0 μm and optically insulating layer of silica with a thickness of 0.375 μm. The Mach-Zehnder interferometer was used to coarsely separate the 1310 nm channel from 1490 and 1550 nm channels. Subsequently, a planar reflective grating was used to demultiplex the 1490 and 1550 nm channels. The manufactured device showed the 1-dB bandwidth of 110 nm for the 1310 nm channel. For the 1490 nm and 1550 nm channels, the 1-dB bandwidth was measured to be 30 nm. The adjacent channel isolation between the 1490 nm and 1550 nm channels was better than 32 dB. The optical isolation between the 1310 nm and 1490 and 1550 nm channels was better than 45 dB. Applications of the planar reflective gratings in the FTTH networks are discussed.

  9. Hybrid III-V/SOI resonant cavity enhanced photodetector

    DEFF Research Database (Denmark)

    Learkthanakhachon, Supannee; Taghizadeh, Alireza; Park, Gyeong Cheol


    A hybrid III–V/SOI resonant-cavity-enhanced photodetector (RCE-PD) structure comprising a high-contrast grating (HCG) reflector, a hybrid grating (HG) reflector, and an air cavity between them, has been proposed and investigated. In the proposed structure, a light absorbing material is integrated...

  10. A high efficiency lateral light emitting device on SOI

    NARCIS (Netherlands)

    Hoang, T.; Le Minh, P.; Holleman, J.; Zieren, V.; Goossens, M.J.; Schmitz, Jurriaan


    The infrared light emission of lateral p/sup +/-p-n/sup +/ diodes realized on SIMOX-SOI (separation by implantation of oxygen - silicon on insulator) substrates has been studied. The confinement of the free carriers in one dimension due to the buried oxide was suggested to be a key point to increase

  11. SOI Digital Accelerometer Based on Pull-in Time Configuration

    NARCIS (Netherlands)

    Pakula, L.S.; Rajaraman, V.; French, P.J.


    The operation principle, design, fabrication and measurement results of a quasi digital accelerometer fabricated on a thin silicon-on-insulator (SOI) substrate is presented. The accelerometer features quasi-digital output, therefore eliminating the need for analogue signal conditioning. The

  12. Thermal loss and soldering effect study of high-Q antennas in handheld devices

    DEFF Research Database (Denmark)

    Bahramzy, Pevand; Jagielski, Ole; Pedersen, Gert Frølund


    High-Q antennas are attractive because, besides being narrow-band, they have the advantage of being more compact and therefore occupy less volume in a mobile device. However, they can become very lossy especially at lower frequencies. In this paper it is investigated how low a thermal loss...

  13. Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification

    NARCIS (Netherlands)

    Ghaffari, A.; Klumperink, Eric A.M.; Soer, M.C.M.; Nauta, Bram


    Abstract—A differential single-port switched-RC N-path filter with band-pass characteristic is proposed. The switching frequency defines the center frequency, while the RC-time and duty cycle of the clock define the bandwidth. This allows for high-Q highly tunable filters which can for instance be

  14. High-Q plasmonic infrared absorber for sensing of molecular resonances in hybrid lead halide perovskites (United States)

    Dayal, Govind; Solanki, Ankur; Chin, Xin Yu; Sum, Tze Chien; Soci, Cesare; Singh, Ranjan


    Plasmonic resonances in sub-wavelength metal-dielectric-metal cavities have been shown to exhibit strong optical field enhancement. The large field enhancements that occur in sub-wavelength regions of the cavity can drastically boost the performance of microcavity based detectors, electromagnetic wave absorbers, metasurface hologram, and nonlinear response of the material in a cavity. The performance efficiencies of these plasmonic devices can be further improved by designing tunable narrow-band high-Q cavities. Here, we experimentally and numerically demonstrate high-Q resonances in metal-dielectric-metal cavity consisting of an array of conductively coupled annular and rectangular apertures separated from the bottom continuous metal film by a thin dielectric spacer. Both, the in-plane and out of plane coupling between the resonators and the continuous metal film have been shown to support fundamental and higher order plasmonic resonances which result in high-Q response at mid-infrared frequencies. As a sensor application of the high-Q cavity, we sense the vibrational resonances of an ultrathin layer of solution-processed organic-inorganic hybrid lead halide perovskites.

  15. Conical and bi-conical high-Q optical nanofiber microcoil resonator


    Xu, Fei; Horak, Peter; Brambilla, Gilberto


    The Q-factor of the optical nanowire microcoil resonator is calculated and compared for different geometries. The results suggest that the Q-factor is very sensitive to the coupling conditions and high-Q resonators can be obtained more easily when the geometry of the nanowire microcoil resonator or its coupling contour has a bi-conical profile.

  16. Conical and biconical ultra-high-Q optical-fiber nanowire microcoil resonator. (United States)

    Xu, Fei; Horak, Peter; Brambilla, Gilberto


    New 3D geometries of the optical nanowire microcoil resonator are suggested and investigated theoretically. The dependence of the Q factor on coupling parameters is calculated and compared for three different profiles. Results suggest that ultra-high-Q resonators can be fabricated more easily when the nanowire microcoil resonator has a biconical profile.

  17. Theoretical and experimental study of high-Q resonant modes in terahertz optical systems

    NARCIS (Netherlands)

    Jellema, Willem; Withington, S.; Trappe, Neil; Murphy, J. A.; Wild, Wolfgang


    The existence of multiple reflections in terahertz optical system causes numerous problems in applications ranging from astronomical to medical instrumentation. We have performed a detailed theoretical study, using waveguide and free-space modal matching, of the high-Q modes that appear on THz

  18. Materials selection for low temperature processed high Q resonators using ashby approach

    NARCIS (Netherlands)

    Kazmi, S.N.R.; Salm, Cora; Schmitz, Jurriaan


    MicroElectroMechanical Systems (MEMS) is an emerging class of microfabrication technology that can truly be anticipated as an enabling technology for future radio frequency (RF) communications. This work focuses on the material selection using the Ashby approach for the high-Q resonators that need

  19. A silicon doped hafnium oxide ferroelectric p–n–p–n SOI tunneling field–effect transistor with steep subthreshold slope and high switching state current ratio

    Directory of Open Access Journals (Sweden)

    Saeid Marjani


    Full Text Available In this paper, a silicon–on–insulator (SOI p–n–p–n tunneling field–effect transistor (TFET with a silicon doped hafnium oxide (Si:HfO2 ferroelectric gate stack is proposed and investigated via 2D device simulation with a calibrated nonlocal band–to–band tunneling model. Utilization of Si:HfO2 instead of conventional perovskite ferroelectrics such as lead zirconium titanate (PbZrTiO3 and strontium bismuth tantalate (SrBi2Ta2O9 provides compatibility to the CMOS process as well as improved device scalability. By using Si:HfO2 ferroelectric gate stack, the applied gate voltage is effectively amplified that causes increased electric field at the tunneling junction and reduced tunneling barrier width. Compared with the conventional p–n–p–n SOI TFET, the on–state current and switching state current ratio are appreciably increased; and the average subthreshold slope (SS is effectively reduced. The simulation results of Si:HfO2 ferroelectric p–n–p–n SOI TFET show significant improvement in transconductance (∼9.8X enhancement at high overdrive voltage and average subthreshold slope (∼35% enhancement over nine decades of drain current at room temperature, indicating that this device is a promising candidate to strengthen the performance of p–n–p–n and conventional TFET for a switching performance.

  20. Propriété de soi et indifférence morale du rapport à soi

    Directory of Open Access Journals (Sweden)

    Nathalie Maillard Romagnoli


    Full Text Available Je m’interroge dans cet article sur les implications du principe libertarien de la pleine propriété de soi sur la question du rapport moral à soi-même. À travers le principe de la pleine propriété de soi, les libertariens défendent la liberté entière de chacun de vivre comme il l���entend, pourvu que les droits des autres soient respectés. Apparemment, ce principe n’a pas grand-chose à nous dire sur ce que nous sommes moralement autorisés à nous faire à nous-mêmes ou non. Certains libertariens, comme Vallentyne, soutiennent toutefois que le principe de la pleine propriété de soi est incompatible avec l’existence de devoirs envers soi. La pleine propriété de soi impliquerait l’indifférence morale du rapport à soi. Je soutiens dans cet article que le principe de la pleine propriété de soi n’implique pas que ce que nous nous faisons à nous-mêmes soit moralement indifférent. Je veux aussi montrer que même si les libertariens, et en particulier Vallentyne, soutiennent la thèse de l’indifférence morale du rapport à soi, celle-ci n’est pas liée à la thèse de la pleine propriété de soi, mais bien plutôt à leur subjectivisme moral.ABSTRACTI ask in this article what the libertarian principle of full self-ownership has to say about volontary actions directed towards oneself. Through the principle of full self-ownership, libertarians defend the persons’ individual liberty to live as they choose to do, as long as they don’t infringe on the rights of others. Apparently, this principle doesn’t have much to say about what we are morally allowed to do to ourselves or not. Some libertarians, however, like Vallentyne, maintain that, if we have duties or obligations to ourselves, then we cannot be full self-owner. In this perspective, full self-ownership would imply that what we do to ourselves is morally indifferent. I want to show in this article that full self-ownership is compatible with the

  1. Monolithic pixel detectors with 0.2 μm FD-SOI pixel process technology (United States)

    Miyoshi, Toshinobu; Arai, Yasuo; Chiba, Tadashi; Fujita, Yowichi; Hara, Kazuhiko; Honda, Shunsuke; Igarashi, Yasushi; Ikegami, Yoichi; Ikemoto, Yukiko; Kohriki, Takashi; Ohno, Morifumi; Ono, Yoshimasa; Shinoda, Naoyuki; Takeda, Ayaki; Tauchi, Kazuya; Tsuboyama, Toru; Tadokoro, Hirofumi; Unno, Yoshinobu; Yanagihara, Masashi


    Truly monolithic pixel detectors were fabricated with 0.2 μm SOI pixel process technology by collaborating with LAPIS Semiconductor Co., Ltd. for particle tracking experiment, X-ray imaging and medical applications. CMOS circuits were fabricated on a thin SOI layer and connected to diodes formed in the silicon handle wafer through the buried oxide layer. We can choose the handle wafer and therefore high-resistivity silicon is also available. Double SOI (D-SOI) wafers fabricated from Czochralski (CZ)-SOI wafers were newly obtained and successfully processed in 2012. The top SOI layers are used as electric circuits and the middle SOI layers used as a shield layer against the back-gate effect and cross-talk between sensors and CMOS circuits, and as an electrode to compensate for the total ionizing dose (TID) effect. In 2012, we developed two SOI detectors, INTPIX5 and INTPIX3g. A spatial resolution study was done with INTPIX5 and it showed excellent performance. The TID effect study with D-SOI INTPIX3g detectors was done and we confirmed improvement of TID tolerance in D-SOI sensors.

  2. Results and limits in the 1-D analytical modeling for the asymmetric DG SOI MOSFET

    Directory of Open Access Journals (Sweden)

    O. Cobianu


    Full Text Available This paper presents the results and the limits of 1-D analytical modeling of electrostatic potential in the low-doped p type silicon body of the asymmetric n-channel DG SOI MOSFET, where the contribution to the asymmetry comes only from p- and n-type doping of polysilicon used as the gate electrodes. Solving Poisson's equation with boundary conditions based on the continuity of normal electrical displacement at interfaces and the presence of a minimum electrostatic potential by using the Matlab code we have obtained a minimum potential with a slow variation in the central zone of silicon with the value pinned around 0.46 V, where the applied VGS voltage varies from 0.45 V to 0.95 V. The paper states clearly the validity domain of the analytical solution and the important effect of the localization of the minimum electrostatic potential value on the potential variation at interfaces as a function of the applied VGS voltage.

  3. High-Q Tunable Filters and High Efficiency Charge Pumps Project (United States)

    National Aeronautics and Space Administration — The supply voltages of modern baseband digital integrated circuits are well below the required actuation voltages for the MEMS tunable filters. Therefore, a charge...

  4. High-Q photonic crystal cavities in all-semiconductor photonic crystal heterostructures (United States)

    Bushell, Z. L.; Florescu, M.; Sweeney, S. J.


    Photonic crystal cavities enable the realization of high Q-factor and low mode-volume resonators, with typical architectures consisting of a thin suspended periodically patterned layer to maximize confinement of light by strong index guiding. We investigate a heterostructure-based approach comprising a high refractive index core and lower refractive index cladding layers. While confinement typically decreases with decreasing index contrast between the core and cladding layers, we show that, counterintuitively, due to the confinement provided by the photonic band structure in the cladding layers, it becomes possible to achieve Q factors >104 with only a small refractive index contrast. This opens up opportunities for implementing high-Q factor cavities in conventional semiconductor heterostructures, with direct applications to the design of electrically pumped nanocavity lasers using conventional fabrication approaches.

  5. A Wide Range Temperature Sensor Using SOI Technology (United States)

    Patterson, Richard L.; Elbuluk, Malik E.; Hammoud, Ahmad


    Silicon-on-insulator (SOI) technology is becoming widely used in integrated circuit chips for its advantages over the conventional silicon counterpart. The decrease in leakage current combined with lower power consumption allows electronics to operate in a broader temperature range. This paper describes the performance of an SOIbased temperature sensor under extreme temperatures and thermal cycling. The sensor comprised of a temperature-to-frequency relaxation oscillator circuit utilizing an SOI precision timer chip. The circuit was evaluated under extreme temperature exposure and thermal cycling between -190 C and +210 C. The results indicate that the sensor performed well over the entire test temperature range and it was able to re-start at extreme temperatures.

  6. A novel SOI-DTMOS structure from circuit performance considerations (United States)

    Wenbin, Song; Jinshun, Bi; Zhengsheng, Han


    The performance of a partially depleted silicon-on-insulator (PDSOI) dynamic threshold MOSFET (DT-MOS) is degraded by the large body capacitance and body resistance. Increasing silicon film thickness can reduce the body resistance greatly, but the body capacitance also increases significantly at the same time. To solve this problem, a novel SOI DTMOSFET structure (drain/source-on-local-insulator structure) is proposed. From ISE simulation, the improvement in delay, obtained by optimizing p-n junction depth and silicon film thickness, is very significant. At the same time, we find that the drive current increases significantly as the thickness of the silicon film increases. Furthermore, only one additional mask is needed to form the local SIMOX, and other fabrication processes are fully compatible with conventional CMOS/SOI technology.

  7. First-principles method for high-$Q$ photonic crystal cavity mode calculations

    CERN Document Server

    Mahmoodian, Sahand; Poulton, Christopher G; Dossou, Kokou B; Botten, Lindsay C; McPhedran, Ross C; de Sterke, C Martijn


    We present a first-principles theory to compute radiation properties of ultra-high quality factor photonic crystal (PC) cavities using a basis of bound PC waveguide states. This method is used to compute the far-field radiation pattern and quality factor of cavity modes $\\sim 100$ times more rapidly than conventional finite-difference time domain methods. Our method provides a simple rule for engineering the PC cavity far-field radiation pattern in high $Q$ cavities.

  8. STIR-Physics: Cold Atoms and Nanocrystals in Tapered Nanofiber and High-Q Resonator Potentials (United States)


    STIR-Physics: Cold Atoms and Nanocrystals in Tapered Nanofiber and High-Q Resonator Potentials We worked on a tapered fiber in cold atomic cloud...setup. At the end of this program, we had built the vacuum system, specialized cold atom chamber and were working on the fiber epoxy mount for the...Triangle Park, NC 27709-2211 Tapered Fibers, Cold atoms , Nonlinear Optics REPORT DOCUMENTATION PAGE 11. SPONSOR/MONITOR’S REPORT NUMBER(S) 10. SPONSOR

  9. All-optical tunable buffering with coupled ultra-high Q whispering gallery mode microcavities. (United States)

    Yoshiki, Wataru; Honda, Yoshihiro; Tetsumoto, Tomohiro; Furusawa, Kentaro; Sekine, Norihiko; Tanabe, Takasumi


    All-optical tunable buffering was recently achieved on a chip by using dynamically tuned coupled mode induced transparency, which is an optical analogue of electromagnetically induced transparency. However, the small Q s of about 105 used in those systems were limiting the maximum buffering time to a few hundred ps. Although employing an ultra-high Q whispering gallery mode (WGM) microcavity can significantly improve the maximum buffering time, the dynamic tuning of the WGM has remained challenging because thermo-optic and pressure tunings, which are widely used for WGM microcavities, have a very slow response. Here we demonstrate all-optical tunable buffering utilizing coupled ultra-high Q WGM cavities and the Kerr effect. The Kerr effect can change the refractive index instantaneously, and this allowed us to tune the WGM cavity very quickly. In addition, from among the various WGM cavities we employed a silica toroid microcavity for our experiments because it has an ultra-high Q factor (>2 × 107) and a small mode volume, and can be fabricated on a chip. Use of the Kerr effect and the silica toroid microcavity enabled us to observe an on-chip all-optical tunable buffering operation and achieve a maximum buffering time of 20 ns.

  10. Investigation of veritcal graded channel doping in nanoscale fully-depleted SOI-MOSFET (United States)

    Ramezani, Zeinab; Orouji, Ali A.


    For achieving reliable transistor, we investigate an amended channel doping (ACD) engineering which improves the electrical and thermal performances of fully-depleted silicon-on-insulator (SOI) MOSFET. We have called the proposed structure with the amended channel doping engineering as ACD-SOI structure and compared it with a conventional fully-depleted SOI MOSFET (C-SOI) with uniform doping distribution using 2-D ATLAS simulator. The amended channel doping is a vertical graded doping that is distributed from the surface of structure with high doping density to the bottom of channel, near the buried oxide, with low doping density. Short channel effects (SCEs) and leakage current suppress due to high barrier height near the source region and electric field modification in the ACD-SOI in comparison with the C-SOI structure. Furthermore, by lower electric field and electron temperature near the drain region that is the place of hot carrier generation, we except the improvement of reliability and gate induced drain lowering (GIDL) in the proposed structure. Undesirable Self heating effect (SHE) that become a critical challenge for SOI MOSFETs is alleviated in the ACD-SOI structure because of utilizing low doping density near the buried oxide. Thus, refer to accessible results, the ACD-SOI structure with graded distribution in vertical direction is a reliable device especially in low power and high temperature applications.

  11. Ultrabroadband Hybrid III-V/SOI Grating Reflector for On-chip Lasers

    DEFF Research Database (Denmark)

    Park, Gyeong Cheol; Taghizadeh, Alireza; Chung, Il-Sug


    We report on a new type of III-V/SOI grating reflector with a broad stopband of 350 nm. This reflector has promising prospects for applications in high-speed III-V/SOI vertical cavity lasers with an improved heat dissipation capability.......We report on a new type of III-V/SOI grating reflector with a broad stopband of 350 nm. This reflector has promising prospects for applications in high-speed III-V/SOI vertical cavity lasers with an improved heat dissipation capability....

  12. Test results of a counting type SOI device for a new x-ray area detector

    Energy Technology Data Exchange (ETDEWEB)

    Hashimoto, R., E-mail:; Igarashi, N.; Kumai, R.; Kishimoto, S. [Inst. of Materials Structure Science, KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Arai, Y.; Miyoshi, T. [Inst. of Particle and Nuclear Physics. KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan)


    Development of a new detector using Silicon-On-Insulator (SOI) technology has been started in the Photon Factory, KEK. The aim of this project is to develop a pulse-counting-type X-ray detector that can be used in synchrotron radiation experiments using soft X-rays. We started to make a Test Element Group of SOI chip, which is called CPIXPTEG1 and evaluated its performance. We succeeded in readout of output signals for 16 keV X-rays from the SOI chips. We also found that the middle-SOI structure was effective against a signal distortion caused by hole traps in the buried oxide layer.

  13. Slow light engineering for high Q high sensitivity photonic crystal microcavity biosensors in silicon. (United States)

    Chakravarty, Swapnajit; Zou, Yi; Lai, Wei-Cheng; Chen, Ray T


    Current trends in photonic crystal microcavity biosensors in silicon-on-insulator (SOI), that focus on small and smaller sensors have faced a bottleneck trying to balance two contradictory requirements of resonance quality factor and sensitivity. By simultaneous control of the radiation loss and optical mode volumes, we show that both requirements can be satisfied simultaneously. Microcavity sensors are designed in which resonances show highest Q ≈ 9300 in the bio-ambient phosphate buffered saline (PBS) as well as highest sensitivity among photonic crystal biosensors. We experimentally demonstrated mass sensitivity 8.8 atto-grams with sensitivity per unit area of 0.8 pg/mm(2). Highest sensitivity, irrespective of the dissociation constant K(d), is demonstrated among all existing label-free optical biosensors in silicon at the concentration of 0.1 μg/ml. Copyright © 2012 Elsevier B.V. All rights reserved.

  14. Impact of underlap spacer region variation on electrostatic and analog performance of symmetrical high-k SOI FinFET at 20 nm channel length (United States)

    Jain, Neeraj; Raj, Balwinder


    Continued scaling of CMOS technology to achieve high performance and low power consumption of semiconductor devices in the complex integrated circuits faces the degradation in terms of electrostatic integrity, short channel effects (SCEs), leakage currents, device variability and reliability etc. Nowadays, multigate structure has become the promising candidate to overcome these problems. SOI FinFET is one of the best multigate structures that has gained importance in all electronic design automation (EDA) industries due to its improved short channel effects (SCEs), because of its more effective gate-controlling capabilities. In this paper, our aim is to explore the sensitivity of underlap spacer region variation on the performance of SOI FinFET at 20 nm channel length. Electric field modulation is analyzed with spacer length variation and electrostatic performance is evaluated in terms of performance parameter like electron mobility, electric field, electric potential, sub-threshold slope (SS), ON current (I on), OFF current (I off) and I on/I off ratio. The potential benefits of SOI FinFET at drain-to-source voltage, V DS = 0.05 V and V DS = 0.7 V towards analog and RF design is also evaluated in terms of intrinsic gain (A V), output conductance (g d), trans-conductance (g m), gate capacitance (C gg), and cut-off frequency (f T = g m/2πC gg) with spacer region variations.

  15. Applications of High-Q Microresonators in Cavity Optomechanics and Nonlinear Photonics (United States)

    Jiang, Wei C.

    Optical microresonators confining light to small volumes are indispensable for a great variety of studies and applications. This thesis is devoted to a study of cavity optomechanical and nonlinear optical phenomena in high-Q microresonators with different materials and structures. Based on that, it proposes and demonstrates several novel schemes and device platforms that exhibit great potential for various applications ranging from frequency metrology and quantum photonics, to information processing and sensing. The thesis starts with a demonstration of a high-frequency (above 1 GHz) regenerative optomechanical oscillator based on a 2-mum-radius high-Q silicon microdisk resonator in the silicon-on-insulator platform with an ultra-low threshold pump power at room temperature and atmosphere. It then continues to explore the cavity optomechanics in single-crystal lithium niobate. A compact lithium niobate microdisk optomechanical resonator with high optical and mechanical qualities, large optomechanical coupling, and high mechanical frequency is achieved, enabling the demonstration of regenerative oscillation in the ambience. Meanwhile, I propose and investigate a novel approach for single molecule detection that utilizes the optical spring effect in a high-Q coherent optomechanical oscillator to dramatically enhance the sensing resolution by orders of magnitude compared with conventional resonator-based approaches. In particular, a high-Q silica microsphere is employed to experimentally demonstrate the detection of single Bovine Serum Albumin proteins with a molecular weight of 66 kDalton at a signal-to-noise ratio of 16.8. On the other hand, the thesis focuses on the theoretical and experimental investigation of the generation of high-purity bright photon pairs in a silicon microdisk based on the cavity enhanced four-wave mixing. The device is able to produce multiple photon pairs at different wavelengths in the telecom band with a high spectral brightness of 6.24 x

  16. Coupled high Q-factor Surface Nanoscale Axial Photonics (SNAP) microresonators

    CERN Document Server

    Sumetsky, M; DiGiovanni, D J; Dulashko, Y; Fini, J M; Monberg, E


    We experimentally demonstrate series of identical two, three, and five coupled high Q-factor Surface Nanoscale Axial Photonics (SNAP) microresonators formed by periodic nanoscale variation of the optical fiber radius. These microresonators are fabricated with a 100 \\mum period along an 18 \\mum radius optical fiber. The axial FWHM of these microresonators is 80 \\mum and their Q-factor exceeds 107. In addition, we demonstrate a SNAP microresonator with the axial FWHM as small as 30 \\mum and the axial FWHM of the fundamental mode as small as 10 \\mum. These results may potentially enable the dense integration of record low loss coupled photonic microdevices on the optical fiber platform.

  17. Two-dimensional Josephson junction arrays coupled through a high-Q cavity

    DEFF Research Database (Denmark)

    Filatrella, G.; Pedersen, Niels Falsig; Wiesenfeld, K.


    The problem of disordered two-dimensional arrays of underdamped Josephson junctions is addressed. Our simulations show that when coupled to a high-Q cavity, the array exhibits synchronized behavior, and the power emitted can be considerably increased once enough junctions are activated to pump...... emission frequency of the junctions and the cavity resonant frequency. We show with a simple argument that we can predict the scaling behavior of disorder with the size of the array. The consequences for the design of microwave oscillators in the Gigahertz region are discussed...

  18. Numerical and Experimental Study of the Q Factor of High-Q Micropillar Cavities

    DEFF Research Database (Denmark)

    Gregersen, Niels; Reitzenstein, S.; Kistner, C.


    Micropillar cavities are potential candidates for high-efficiency single-photon sources and are testbeds for cavity quantum electrodynamics experiments. In both applications a high quality (Q) factor is desired. It was recently shown that the Q of high-Q semiconductor micropillar cavities exhibit...... to the effective reflectivity of the fundamental mode arising from coupling to scattering channels involving higher-order cavity modes and propagating Bloch modes in the distributed Bragg reflectors (DBRs). We show how these weak contributions lead to strong variations of the Q factor, and we relate the average...

  19. Charged Particle Production in High Q2 Deep-Inelastic Scattering at HERA

    CERN Document Server

    Aaron, F.D.; Alexa, C.; Andreev, V.; Antunovic, B.; Aplin, S.; Asmone, A.; Astvatsatourov, A.; Backovic, S.; Baghdasaryan, A.; Baranov, P.; Barrelet, E.; Bartel, W.; Baudrand, S.; Beckingham, M.; Begzsuren, K.; Behnke, O.; Behrendt, O.; Belousov, A.; Berger, N.; Bizot, J.C.; Boenig, M.-O.; Boudry, V.; Bozovic-Jelisavcic, I.; Bracinik, J.; Brandt, G.; Brinkmann, M.; Brisson, V.; Bruncko, D.; Busser, F.W.; Bunyatyan, A.; Buschhorn, G.; Bystritskaya, L.; Campbell, A.J.; Cantun Avila, K.B.; Cassol-Brunner, F.; Cerny, K.; Cerny, V.; Chekelian, V.; Cholewa, A.; Contreras, J.G.; Coughlan, J.A.; Cozzika, G.; Cvach, J.; Dainton, J.B.; Daum, K.; Deak, M.; de Boer, Y.; Delcourt, B.; Del Degan, M.; Delvax, J.; De Roeck, A.; De Wolf, E.A.; Diaconu, C.; Dodonov, V.; Dubak, A.; Eckerlin, Guenter; Efremenko, V.; Egli, S.; Eichler, R.; Eisele, F.; Eliseev, A.; Elsen, E.; Essenov, S.; Falkiewicz, A.; Faulkner, P.J.W.; Favart, L.; Fedotov, A.; Felst, R.; Feltesse, J.; Ferencei, J.; Finke, L.; Fleischer, M.; Fomenko, A.; Franke, G.; Frisson, T.; Gabathuler, E.; Gayler, J.; Ghazaryan, Samvel; Ginzburgskaya, S.; Glazov, A.; Glushkov, I.; Goerlich, L.; Goettlich, M.; Gogitidze, N.; Gorbounov, S.; Gouzevitch, M.; Grab, C.; Greenshaw, T.; Grell, B.R.; Grindhammer, G.; Habib, S.; Haidt, D.; Hansson, M.; Heinzelmann, G.; Helebrant, C.; Henderson, R.C.W.; Henschel, H.; Herrera, G.; Hildebrandt, M.; Hiller, K.H.; Hoffmann, D.; Horisberger, R.; Hovhannisyan, A.; Hreus, T.; Jacquet, M.; Janssen, M.E.; Janssen, X.; Jemanov, V.; Jonsson, L.; Johnson, D.P.; Jung, Andreas Werner; Jung, H.; Kapichine, M.; Katzy, J.; Kenyon, I.R.; Kiesling, Christian M.; Klein, M.; Kleinwort, C.; Klimkovich, T.; Kluge, T.; Knutsson, A.; Korbel, V.; Kostka, P.; Kraemer, M.; Krastev, K.; Kretzschmar, J.; Kropivnitskaya, A.; Kruger, K.; Landon, M.P.J.; Lange, W.; Lastovicka-Medin, G.; Laycock, P.; Lebedev, A.; Leibenguth, G.; Lendermann, V.; Levonian, S.; Li, G.; Lindfeld, L.; Lipka, K.; Liptaj, A.; List, B.; List, J.; Loktionova, N.; Lopez-Fernandez, R.; Lubimov, V.; Lucaci-Timoce, A.-I.; Lytkin, L.; Makankine, A.; Malinovski, E.; Marage, P.; Marti, Ll.; Martisikova, M.; Martyn, H.-U.; Maxfield, S.J.; Mehta, A.; Meier, K.; Meyer, A.B.; Meyer, H.; Meyer, J.; Michels, V.; Mikocki, S.; Milcewicz-Mika, I.; Mohamed, A.; Moreau, F.; Morozov, A.; Morris, J.V.; Mozer, Matthias Ulrich; Muller, K.; Murin, P.; Nankov, K.; Naroska, B.; Naumann, Th.; Newman, Paul R.; Niebuhr, C.; Nikiforov, A.; Nowak, G.; Nowak, K.; Nozicka, M.; Oganezov, R.; Olivier, B.; Olsson, J.E.; Osman, S.; Ozerov, D.; Palichik, V.; Panagoulias, I.; Pandurovic, M.; Papadopoulou, Th.; Pascaud, C.; Patel, G.D.; Peng, H.; Perez, E.; Perez-Astudillo, D.; Perieanu, A.; Petrukhin, A.; Picuric, I.; Piec, S.; Pitzl, D.; Placakyte, R.; Polifka, R.; Povh, B.; Preda, T.; Prideaux, P.; Radescu, V.; Rahmat, A.J.; Raicevic, N.; Ravdandorj, T.; Reimer, P.; Risler, C.; Rizvi, E.; Robmann, P.; Roland, B.; Roosen, R.; Rostovtsev, A.; Rurikova, Z.; Rusakov, S.; Salek, D.; Salvaire, F.; Sankey, D.P.C.; Sauter, M.; Sauvan, E.; Schmidt, S.; Schmitt, S.; Schmitz, C.; Schoeffel, L.; Schoning, A.; Schultz-Coulon, H.-C.; Sefkow, F.; Shaw-West, R.N.; Sheviakov, I.; Shtarkov, L.N.; Sloan, T.; Smiljanic, Ivan; Smirnov, P.; Soloviev, Y.; South, D.; Spaskov, V.; Specka, Arnd E.; Staykova, Z.; Steder, M.; Stella, B.; Stiewe, J.; Straumann, U.; Sunar, D.; Sykora, T.; Tchoulakov, V.; Thompson, G.; Thompson, P.D.; Toll, T.; Tomasz, F.; Tran, T.H.; Traynor, D.; Trinh, T.N.; Truol, P.; Tsakov, I.; Tseepeldorj, B.; Tsipolitis, G.; Tsurin, I.; Turnau, J.; Tzamariudaki, E.; Urban, K.; Utkin, D.; Valkarova, A.; Vallee, C.; Van Mechelen, P.; Vargas Trevino, A.; Vazdik, Y.; Vinokurova, S.; Volchinski, V.; Weber, G.; Weber, R.; Wegener, D.; Werner, C.; Wessels, M.; Wissing, Ch.; Wolf, R.; Wunsch, E.; Xella, S.; Yeganov, V.; Zacek, J.; Zalesak, J.; Zhang, Z.; Zhelezov, A.; Zhokin, A.; Zhu, Y.C.; Zimmermann, T.; Zohrabyan, H.; Zomer, F.


    The average charged track multiplicity and the normalised distribution of the scaled momentum, $\\xp$, of charged final state hadrons are measured in deep-inelastic $\\ep$ scattering at high $Q^2$ in the Breit frame of reference. The analysis covers the range of photon virtuality $100 < Q^2 < 20 000 \\GeV^{2}$. Compared with previous results presented by HERA experiments this analysis has a significantly higher statistical precision and extends the phase space to higher $Q^{2}$ and to the full range of $\\xp$. The results are compared with $e^+e^-$ annihilation data and with various calculations based on perturbative QCD using different models of the hadronisation process.

  20. High-Q X-band distributed Bragg resonator utilizing an aperiodic alumina plate arrangement. (United States)

    Bale, Simon; Everard, Jeremy


    This paper describes a high-Q X-band distributed Bragg resonator that uses an aperiodic arrangement of non-lambda/4 low loss alumina plates mounted in a cylindrical waveguide. An ABCD parameter waveguide model was developed to simulate and optimize the cavity. The dielectric plates and air waveguide dimensions were optimized to achieve maximum quality factor by redistributing the energy loss within the cavity. An unloaded quality factor (Q(0)) of 196,000 was demonstrated at 9.93 GHz.

  1. Using SST, PDO and SOI for Streamflow Reconstruction (United States)

    Bukhary, S. S.; Kalra, A.; Ahmad, S.


    Recurring droughts in southwestern U.S. particularly California, have strained the existing water reserves of the region. Frequency, severity and duration of these recurring drought events may not be captured by the available instrumental records. Thus streamflow reconstruction becomes imperative to identify the historic hydroclimatic extremes of a region and assists in developing better water management strategies, vital for sustainability of water reserves. Tree ring chronologies (TRC) are conventionally used to reconstruct streamflows, since tree rings are representative of climatic information. Studies have shown that sea surface temperature (SST) and climate indices of southern oscillation index (SOI) and pacific decadal oscillation (PDO) influence U.S. streamflow volumes. The purpose of this study was to improve the traditional reconstruction methodology by incorporating the oceanic-atmospheric variables of PDO, SOI, and Pacific Ocean SST, alongwith TRC as predictors in a step-wise linear regression model. The methodology of singular value decomposition was used to identify teleconnected regions of streamflow and SST. The approach was tested on eleven gage stations in Sacramento River Basin (SRB) and San Joaquin River Basin (JRB). The reconstructions were successfully generated from 1800-1980, having an overlap period of 1932-1980. Improved results were exhibited when using the predictor variable of SST along with TRC (calibration r2=0.6-0.91) compared to when using TRC in combination with SOI and PDO (calibration r2=0.51-0.78) or when using TRC by itself (calibration r2=0.51-0.86). For future work, this approach can be replicated for other watersheds by using the oceanic-atmospheric climate variables influencing that region.

  2. SOI/MDI studies of active region seismology and evolution (United States)

    Tarbell, Ted D.; Title, Alan; Hoeksema, J. Todd; Scherrer, Phil; Zweibel, Ellen


    The solar oscillations investigation (SOI) will study solar active regions using both helioseismic and conventional observation techniques. The Michelson Doppler imager (MDI) can perform Doppler continuum and line depth imagery and can produce longitudinal magnetograms, showing either the full disk or a high resolution field of view. A dynamics program of continuous full disk Doppler observations for two months per year, campaign programs of eight hours of continuous observation per day, and a synoptic magnetic program of about 15 full disk magnetograms per day, are planned. The scientific plans, measurements and observation programs, are described.

  3. VCSELs and silicon light sources exploiting SOI grating mirrors

    DEFF Research Database (Denmark)

    Chung, Il-Sug; Mørk, Jesper


    grating works as a highly-reflective mirror as well as routes light into a Si in-plane output waveguide connected to the grating. In the vertical-cavity surface-emitting laser (VCSEL) version, there is no in-plane output waveguide connected to the grating. Thus, light is vertically emitted through...... the Bragg reflector. Numerical simulations show that both the silicon light source and the VCSEL exploiting SOI grating mirrors have superior performances, compared to existing silicon light sources and long wavelength VCSELs. These devices are highly adequate for chip-level optical interconnects as well...

  4. How the Teacher of the Gifted Can Use the S.O.I. (United States)

    Navarre, Jane


    The Structure of Intellect (SOI) Learning Abilities Test can be used in gifted education in many ways, including screening, a unit for junior or senior high students on intelligence, career exploration, help for individualizing, and training with learning disabled gifted students. Disadvantages of the SOI include its lengthy administration and…

  5. Comparative Study of Charge Trapping Type SOI-FinFET Flash Memories with Different Blocking Layer Materials

    Directory of Open Access Journals (Sweden)

    Yongxun Liu


    Full Text Available The scaled charge trapping (CT type silicon on insulator (SOI FinFET flash memories with different blocking layer materials of Al2O3 and SiO2 have successfully been fabricated, and their electrical characteristics including short-channel effect (SCE immunity, threshold voltage (Vt variability, and the memory characteristics have been comparatively investigated. It was experimentally found that the better SCE immunity and a larger memory window are obtained by introducing a high-k Al2O3 blocking layer instead of a SiO2 blocking layer. It was also confirmed that the variability of Vt before and after one program/erase (P/E cycle is almost independent of the blocking layer materials.

  6. ESD robustness concern for SOI-LIGBTs with typical latch-up immunity structures (United States)

    Ye, Ran; Liu, Siyang; Sun, Weifeng; Hou, Bo


    The ESD robustness of the lateral insulated gate bipolar transistors based on SOI substrate (SOI-LIGBTs) with two typical latch-up immunity structures, including P-sink well and P++ doping layer beneath the emitter, are compared and discussed. The SOI-LIGBT with P-sink well has the strong ESD robustness and fails at the collector side due to the concentrated current density. The SOI-LIGBT with P++ doping layer fails before it is triggered due to the large surface electric field at the PN junction between P-body and N-drift regions. Considering the comprehensive performances of both devices, the SOI-LIGBT with P-sink well is suggested as the output device, which guarantees high latch-up immunity ability and strong ESD robustness simultaneously.

  7. Raman Spectroscopy Study of Uniaxial Strained SOI with SiGe Junctions (United States)

    Du, Yan; Ozturk, Mehmet; Misra, Veena; Kasim, Johnson; Shen, Zexiang


    In bulk PMOSFETs, selective epitaxial Si1-xGex junctions have been used to introduce strain into the channel for mobility enhancement purposes. Freescale has applied this idea to SOI wafers where they demonstrated that mobility enhancement is prominent for 400A partially depleted SOI PMOSFETs. But the scaling capability of this technology for very thin SOI wafers needs to be verified. In this report, we studied the impacts of body thickness and recessing on thin SOI films down to 200A. UV-raman data confirms that even without recessing, except for silicon consumed during RCA cleaning step, epitaxial Si0.5Ge0.5 still introduces a certain amount of strain into the channel. This is beneficial for fully depleted SOI applications, in which the ultra thin body presents challenges for RIE etching.

  8. Temperature characteristics research of SOI pressure sensor based on asymmetric base region transistor (United States)

    Zhao, Xiaofeng; Li, Dandan; Yu, Yang; Wen, Dianzhong


    Based on the asymmetric base region transistor, a pressure sensor with temperature compensation circuit is proposed in this paper. The pressure sensitive structure of the proposed sensor is constructed by a C-type silicon cup and a Wheatstone bridge with four piezoresistors ({R}1, {R}2, {R}3 and {R}4) locating on the edge of a square silicon membrane. The chip was designed and fabricated on a silicon on insulator (SOI) wafer by micro electromechanical system (MEMS) technology and bipolar transistor process. When the supply voltage is 5.0 V, the corresponding temperature coefficient of the sensitivity (TCS) for the sensor before and after temperature compensation are -1862 and -1067 ppm/°C, respectively. Through varying the ratio of the base region resistances {r}1 and {r}2, the TCS for the sensor with the compensation circuit is -127 ppm/°C. It is possible to use this compensation circuit to improve the temperature characteristics of the pressure sensor. Project supported by the National Natural Science Foundation of China (No. 61471159), the Natural Science Foundation of Heilongjiang Province (No. F201433), the University Nursing Program for Young Scholars with Creative Talents in Heilongjiang Province (No. 2015018), and the Special Funds for Science and Technology Innovation Talents of Harbin in China (No. 2016RAXXJ016).

  9. Molecular sensing using monolayer floating gate, fully depleted SOI MOSFET acting as an exponential transducer. (United States)

    Takulapalli, Bharath R


    Field-effect transistor-based chemical sensors fall into two broad categories based on the principle of signal transduction-chemiresistor or Schottky-type devices and MOSFET or inversion-type devices. In this paper, we report a new inversion-type device concept-fully depleted exponentially coupled (FDEC) sensor, using molecular monolayer floating gate fully depleted silicon on insulator (SOI) MOSFET. Molecular binding at the chemical-sensitive surface lowers the threshold voltage of the device inversion channel due to a unique capacitive charge-coupling mechanism involving interface defect states, causing an exponential increase in the inversion channel current. This response of the device is in opposite direction when compared to typical MOSFET-type sensors, wherein inversion current decreases in a conventional n-channel sensor device upon addition of negative charge to the chemical-sensitive device surface. The new sensor architecture enables ultrahigh sensitivity along with extraordinary selectivity. We propose the new sensor concept with the aid of analytical equations and present results from our experiments in liquid phase and gas phase to demonstrate the new principle of signal transduction. We present data from numerical simulations to further support our theory.

  10. Thermal nonlinear effect in high Q factor silicon-on-insulator microring resonator (United States)

    Xiaogang, Tong; Jun, Liu; Chenyang, Xue


    In this paper, all-optical switching in silicon-on-insulator (SOI) serially coupled ring resonator based on thermal nonlinear effect is proposed. The radii of the silicon microring resonator are 10 μm. In experiment, firstly measured by single pump injection technology with vertical coupling surface grating coupler method, the highest notch of serially coupled ring resonator is 17 dB. The strong transverse light-confinement nature of the resonator induces nonlinear optical response with low pump power. Thermal nonlinear effect is achieved by controlling the power of the continuous-wave (CW) pump with very low tuning threshold (0.33 nm). And the slop of resonant wavelength as a function of injected pump is 220 pm/mw. Secondly, switching time measured by two pump injection technology is 3.01 μs and 1.03 μs, respectively. Which could be used in integrated photonic communication circuits based optical logic and slow-light structure.

  11. Charged particle production in high Q{sup 2} deep-inelastic scattering at HERA

    Energy Technology Data Exchange (ETDEWEB)

    Aaron, F.D.; Alexa, C. [National Institute for Physics and Nuclear Engineering (NIPNE), Bucharest (Romania); Aktas, A. [DESY, Hamburg (DE)] (and others)


    The average charged track multiplicity and the normalised distribution of the scaled momentum, x{sub p}, of charged final state hadrons are measured in deep-inelastic ep scattering at high Q{sup 2} in the Breit frame of reference. The analysis covers the range of photon virtuality 100 < Q{sup 2} < 20 000 GeV{sup 2}. Compared with previous results presented by HERA experiments this analysis has a significantly higher statistical precision and extends the phase space to higher Q{sup 2} and to the full range of x{sub p}. The results are compared with e{sup +}e{sup -} annihilation data and with various calculations based on perturbative QCD using different models of the hadronisation process. (orig.)

  12. Universal nonlinear scattering in ultra-high Q whispering gallery-mode resonators. (United States)

    Lin, Guoping; Diallo, Souleymane; Dudley, John M; Chembo, Yanne K


    Universal nonlinear scattering processes such as Brillouin, Raman, and Kerr effects are fundamental light-matter interactions of particular theoretical and experimental importance. They originate from the interaction of a laser field with an optical medium at the lattice, molecular, and electronic scale, respectively. These nonlinear effects are generally observed and analyzed separately, because they do not often occur concomitantly. In this article, we report the simultaneous excitation of these three fundamental interactions in mm-size ultra-high Q whispering gallery mode resonators under continuous wave pumping. Universal nonlinear scattering is demonstrated in barium fluoride and strontium fluoride, separately. We further propose a unified theory based on a spatiotemporal formalism for the understanding of this phenomenology.

  13. Low-threshold stimulated Brillouin scattering in high-Q whispering gallery mode tellurite microspheres. (United States)

    Guo, Changlei; Che, Kaijun; Zhang, Pan; Wu, Jinshu; Huang, Yantang; Xu, Huiying; Cai, Zhiping


    We demonstrate the first observation of stimulated Brillouin scattering (SBS) in a high-Q whispering gallery mode tellurite microsphere. Tellurite glass with composition of 70TeO₂-20ZnO-5Na₂O-5La₂O₃ (molar ratio) was prepared in-house using a melt-quenching technique. Moreover, tellurite microspheres with Q in excess of 13 millions at 1550 nm were fabricated by melting tellurite microwires using a CO₂ laser. By pumping the tellurite microspheres with a tunable single frequency laser, SBS is further realized with a threshold as low as 0.58 mW. At last, the beat notes between the pump and the Stokes signals were measured, which indicated the Brillouin frequency shift is at the 8.2 GHz band for our tellurite glass. Our results could propel significant applications utilizing SBS by employing tellurite microspheres.

  14. High Q-factor micro-cavity laser: Fabrication and lasing emission properties

    Energy Technology Data Exchange (ETDEWEB)

    Pham Van Hoi; Ha Xuan Vinh; Chu Thi Thu Ha; Tran Thi Cham [Institute of Materials Science, Vietname Academy of Science and Technology 18 Hoang Quoc Viet Road, Cau Giay District, Hanoi (Viet Nam); Bui Van Thien [Faculty of Natural Science, College of Medicine, Thai Nguyen (Viet Nam); Gruzintsev, A N [Institute of Microelectronics Technology and High Purity Materials, Russian Academy of Sciences (IPMT-RAS) (Russian Federation)], E-mail:


    In this article the fabrication method and lasing emission properties of High-Q micro-cavity lasers based on High-concentration Erbium-doped silica-alumina glasses are presented in detail. The configurations of micro-cavities were spherical and/or modified toroidal forms. The lasing threshold of micro-cavity laser pumped by laser diodes was of hundred micro-watts and Q-factor of cavity had been achieved up-to 10{sup 8} in experiment. The emission power of one whispering-gallery-mode (WGM) lasing from micro-cavity laser was of 0.05-0.5 mW that would be enough for applying in the quantum information and optical sensor techniques. The modified toroidal micro-cavity permits to decrease the polar-mode of WGMs, which help to obtain the single-mode emission from micro-cavity lasers.

  15. Fabrication of high-Q microresonators in dielectric materials using a femtosecond laser: Principle and applications (United States)

    Wang, Min; Lin, Jin-Tian; Xu, Ying-Xin; Fang, Zhi-Wei; Qiao, Ling-Ling; Liu, Zheng-Ming; Fang, Wei; Cheng, Ya


    Femtosecond laser micromachining has been a promising technique for fabricating three-dimensional (3D) micro/nano-structures in various kinds of dielectric materials with unprecedented spatial resolutions as well as flexibility in terms of the geometry and the materials can be processed. This unique capability opens opportunities for fabrication of 3D high-quality (Q) microresonators, which are one of the key elements in modern photonic applications. Here, we review the recent progress in fabrication of high-Q microresonators on glass and crystalline substrates by employing femtosecond laser direct writing. We demonstrate the applications of the fabricated microresonators in generating low-threshold lasers, high-sensitivity chemical sensing and nonlinear optical wavelength conversion.

  16. Reproducibility of High-Q SRF Cavities by High Temperature Heat Treatment

    Energy Technology Data Exchange (ETDEWEB)

    Dhakal, Pashupati [JLAB; Ciovati, Gianluigi [JLAB; Kneisel, Peter [JLAB; Myneni, Ganapati Rao [JLAB


    Recent work on high-temperature (> 600 °C) heat treatment of ingot Nb cavities in a customized vacuum furnace for several hours showed the possibility of achieving Q0-values of up to ~5×1010 at 2.0 K, 1.5 GHz and accelerating gradients of ~20 MV/m. This contribution presents results on further studies of the heat treatment process to produce cavities with high Q0 values for continuous-wave accelerator application. Single-cell cavities of different Nb purity have been processed through few cycles of heat-treatments and chemical etching. Measurements of Q0 as a function of temperature at low RF field and of Q0 as a function of the RF field at or below 2.0 K have been made after each treatment. Measurements by TOF-SIMS of the impurities depth profiles were made on samples heat treated with the cavities.

  17. Vertical integration of high-Q silicon nitride microresonators into silicon-on-insulator platform. (United States)

    Li, Qing; Eftekhar, Ali A; Sodagar, Majid; Xia, Zhixuan; Atabaki, Amir H; Adibi, Ali


    We demonstrate a vertical integration of high-Q silicon nitride microresonators into the silicon-on-insulator platform for applications at the telecommunication wavelengths. Low-loss silicon nitride films with a thickness of 400 nm are successfully grown, enabling compact silicon nitride microresonators with ultra-high intrinsic Qs (~ 6 × 10(6) for 60 μm radius and ~ 2 × 10(7) for 240 μm radius). The coupling between the silicon nitride microresonator and the underneath silicon waveguide is based on evanescent coupling with silicon dioxide as buffer. Selective coupling to a desired radial mode of the silicon nitride microresonator is also achievable using a pulley coupling scheme. In this work, a 60-μm-radius silicon nitride microresonator has been successfully integrated into the silicon-on-insulator platform, showing a single-mode operation with an intrinsic Q of 2 × 10(6).

  18. Coupling Light from a High-Q Microsphere Resonator Using a UV-induced Surface Grating (United States)

    Ilchenko, V. S.; Starodubov, D. S.; Gorodetsky, M. L.; Maleki, L.; Feinberg, J.


    High-Q microspheres with whispering-gallery modes have very narrow resonances that can be used for fiber-optic filters, ultra-compact narrow-linewidth lasers and optical/microwave oscillators. Whispering-gallery modes were previously excited in microspheres using evanescent optical fields. The necessary phase synchronism was obtained by adjusting the incident angle of input light beam (prism coupler) or adjustment of the waveguide propagation constant (fiber taper coupler). For many applications, however, bulky near-field couplers are undesirable. They compromise the symmetry and generate stray fields. Also, the control of coupling is crucial for the performance of microsphere resonators: in analogy with radio frequency circuits, the loading Q-factor should be less than the intrinsic Q-factor, Q(sub L) less than or equal to Q(sub O). Ideally one should combine a stable coupling element and a resonator into a single microsphere component.

  19. Méditation et pratique de soi chez Malebranche.

    Directory of Open Access Journals (Sweden)

    Éric Dubreucq


    Full Text Available Une étude des Méditations pour se disposer à l’Humilité et à la pénitence qui les replace dans le cadre des pratiques de son époque, par exemple, chez François de Sales, celles de l’oraison, de la méditation et de la contemplation, permet d’apercevoir que l’une des thèses majeures du malebranchisme, la vision en Dieu, est un effet instauré dans le destinataire par un dispositif textuel. Celui-ci tire sa puissance prescriptive de l’a priori pratique où il s’inscrit. C’est à une opération de production de soi que l’exercice spirituel donne lieu : l’analyse des quatre premières Méditations chrétiennes et métaphysiques, en particulier, montre que c’est une organisation de la substance personnelle que provoque le travail spirituel sur soi. Celui-ci consiste à déterminer le rapport à soi comme relation d’une vision attentive à une activité illuminante, par un décentrement textuel du « je » vers le « tu ».One of the major Malebranche’s assertion, that we see truth in God, is not a mere theoretical thesis. I study first the Méditations pour se disposer à l’Humilité et à la pénitence and compare them with François de Sales’ spiritual exercitations, and show that prayer, meditation and contemplation constitute the practical frameworks of this period. The text of the Méditations is an apparatus which is fit to cause an effect in its target – the self of the reader : the vision in God. The practical a priori of the meditation provides the text with prescriptive power to transform the self. Then I study the Méditations chrétiennes et métaphysiques i-iv : we see that Malebranche set his textual apparatus so that it prescribes its receiver a form of « work-on-one’s-self ». The self is here produced by the organisation of relationship between attentive vision and lighting action, and this structure is built in the self by a movement, induced by the text, which leads the self from

  20. L’estime de soi : un cas particulier d’estime sociale ?


    Santarelli, Matteo


    Un des traits plus originaux de la théorie intersubjective de la reconnaissance d’Axel Honneth, consiste dans la façon dont elle discute la relation entre estime sociale et estime de soi. En particulier, Honneth présente l’estime de soi comme un reflet de l’estime sociale au niveau individuel. Dans cet article, je discute cette conception, en posant la question suivante : l’estime de soi est-elle un cas particulier de l’estime sociale ? Pour ce faire, je me concentre sur deux problèmes crucia...

  1. Device physics considerations for SOI domino circuit design (United States)

    Subba, Niraj; Mitra, Souvick; Salman, Akram; Ioannou, Dimitris E.


    A feasibility study of domino circuits using partially depleted SOI technology is conducted by focusing on the OR structure, known to be particularly sensitive to current leakage. By contrast to previous belief, the simulation results indicated that for the 0.145 μm technology node, the circuit could be destabilized by the floating body effects enhanced (channel) off current rather than parasitic BJT current. It was observed that current spiking also played a major role in discharging the pre-charge node during operation. It was found that this overall leakage (discharging) limited the number of input transistors on the OR circuit. It was therefore deemed necessary to make the level-restoring transistor stronger and/or limit the number of inputs to keep the circuit robust during operation. Keeping the body grounded was found to be an alternative solution to both of these leakage problems.

  2. In depth static and low-frequency noise characterization of n-channel FinFETs on SOI substrates at cryogenic temperature (United States)

    Achour, H.; Cretu, B.; Routoure, J.-M.; Carin, R.; Talmat, R.; Benfdila, A.; Simoen, E.; Claeys, C.


    The impact of cryogenic temperature operation (10 K) on the short channel effects and low frequency noise was analysed on strained and unstrained n-channel FinFET transistors fabricated on silicon on insulator (SOI) substrates in order to evaluate the devices static performances and to study the low frequency noise mechanisms. The main electrical parameters are investigated and it is evidenced that even at very low temperatures, the strain-engineering techniques boost the devices performances in terms of mobility, threshold voltage, access resistances and drain saturation currents. The DIBL effect, Early voltage and the intrinsic gain are ameliorated only for the short channel devices. A drawback, however, is that slightly improved turn-on capabilities may be noted for standard channel devices compared to strained ones. Low frequency noise measurements show that the carrier number fluctuations dominate the flicker noise in weak inversion even at 10 K operation. Access resistance noise contributions were evidenced in strong inversion.

  3. Backside-incidence critically coupled Ge on SOI photodetector (United States)

    Liu, Yu-Hsuan; Wu, Tsung-Ting; Cheng, Szu-Lin; Liu, Han-Din; Lin, Chun-Chi; Chen, Hui-Wen; Lee, Ming-Chang M.; Na, Neil


    For present-day optical communication systems, the commonly used normal-incidence photodetectors suffer from the tradeoff between bandwidth and quantum efficiency. Such a tradeoff is especially adverse for long wavelength communication systems operating at higher data rates. For example, the maximum responsivity for a commercially available 25 Gbps photodetector operating at 1310 nm wavelength is limited to less than 0.8 A/W. In this work, we design and demonstrate a high-speed, backside-incidence, critically-coupled Ge on SOI photodetector operating at 1310 nm while maintaining a high quantum efficiency. Our device is fabricated with RPCVD epitaxy, i-line lithography, silicide contact, and Al metal wire, which are fully compatible with the state-of-art CMOS process technology. With our epitaxial scheme and surface passivation method, a low bulk (surface) dark current density of 13 mA/cm2 (0.79 μA/cm) is measured from a 700 nm thick Ge p-i-n device at -1 V bias. The responsivity at 1310 nm wavelength is measured to be 0.87 A/W, and the 3dB optical bandwidth of a 20 μm diameter device is measured to be 26 GHz. Our high-speed, backside-incidence, critically-coupled Ge on SOI photodetector may serve as a high-performance and low-cost solution for next generation high-speed optical receivers, and its benefit of decoupling bandwidth and quantum efficiency is especially prominent at higher data rates such as 40 Gbps and beyond.

  4. Versatile tissue lasers based on high-Q Fabry-Pérot microcavities. (United States)

    Chen, Yu-Cheng; Chen, Qiushu; Zhang, Tingting; Wang, Wenjie; Fan, Xudong


    Biolasers are an emerging technology for next generation biochemical detection and clinical applications. Progress has recently been made to achieve lasing from biomolecules and single living cells. Tissues, which consist of cells embedded in an extracellular matrix, mimic more closely the actual complex biological environment in a living body and therefore are of more practical significance. Here, we developed a highly versatile tissue laser platform, in which tissues stained with fluorophores are sandwiched in a high-Q Fabry-Pérot microcavity. Distinct lasing emissions from muscle and adipose tissues stained respectively with fluorescein isothiocyanate (FITC) and boron-dipyrromethene (BODIPY), and hybrid muscle/adipose tissue with dual staining were achieved with a threshold of only ∼10 μJ mm-2. Additionally, we investigated how the tissue structure/geometry, tissue thickness, and staining dye concentration affect the tissue laser. Lasing emission from FITC conjugates (FITC-phalloidin) that specifically target F-actin in muscle tissues was also realized. It is further found that, despite the large fluorescence spectral overlap between FITC and BODIPY in tissues, their lasing emissions could be clearly distinguished and controlled due to their narrow lasing bands and different lasing thresholds, thus enabling highly multiplexed detection. Our tissue laser platform can be broadly applicable to various types of tissues/diseases. It provides a new tool for a wide range of biological and biomedical applications, such as diagnostics/screening of tissues and identification/monitoring of biological transformations in tissue engineering.

  5. High-Q lattice mode matched structural resonances in terahertz metasurfaces

    Energy Technology Data Exchange (ETDEWEB)

    Xu, Ningning; Zhang, Weili, E-mail: [School of Electrical and Computer Engineering, Oklahoma State University, Stillwater, Oklahoma 74078 (United States); Singh, Ranjan, E-mail: [Division of Physics and Applied Physics, School of Physical and Mathematical Sciences, Nanyang Technological University, Singapore 637371 (Singapore); Centre for Disruptive Photonic Technologies, The Photonics Institute, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798 (Singapore)


    The quality (Q) factor of metamaterial resonances is limited by the radiative and non-radiative losses. At terahertz frequencies, the dominant loss channel is radiative in nature since the non-radiative losses are low due to high conductivity of metals. Radiative losses could be suppressed by engineering the meta-atom structure. However, such suppression usually occurs at the fundamental resonance mode which is typically a closed mode resonance such as an inductive-capacitive resonance or a Fano resonance. Here, we report an order of magnitude enhancement in Q factor of all the structural eigenresonances of a split-ring resonator fueled by the lattice mode matching. We match the fundamental order diffractive mode to each of the odd and even eigenresonances, thus leading to a tremendous line-narrowing of all the resonances. Such precise tailoring and control of the structural resonances in a metasurface lattice could have potential applications in low-loss devices, sensing, and design of high-Q metamaterial cavities.

  6. Development of Ultra High Gradient and High Q{sub 0} Superconducting Radio Frequency Cavities

    Energy Technology Data Exchange (ETDEWEB)

    Geng, Rongli [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Clemens, William A. [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Follkie, James E. [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Harris, Teena M. [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Kushnick, Peter W. [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Machie, Danny [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Martin, Robert E. [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Palczewski, Ari D. [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Perry, Era A. [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Slack, Gary L. [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Williams, R. S. [Thomas Jefferson National Accelerator Facility, Newport News, VA (United States); Adolphsen, C. [SLAC, Menlo Park, California, (United States); Li, Z. [SLAC, Menlo Park, California, (United States); Hao, J. K. [Peking University, Beijing (China); Li, Y. M. [Peking University, Beijing (China); Liu, K. X. [Peking University, Beijing (China)


    We report on the recent progress at Jefferson Lab in developing ultra high gradient and high Q{sub 0} superconducting radio frequency (SRF) cavities for future SRF based machines. A new 1300 MHz 9-cell prototype cavity is being fabricated. This cavity has an optimized shape in terms of the ratio of the peak surface field (both magnetic and electric) to the acceleration gradient, hence the name low surface field (LSF) shape. The goal of the effort is to demonstrate an acceleration gradient of 50 MV/m with Q{sub 0} of 10{sup 10} at 2 K in a 9-cell SRF cavity. Fine-grain niobium material is used. Conventional forming, machining and electron beam welding method are used for cavity fabrication. New techniques are adopted to ensure repeatable, accurate and inexpensive fabrication of components and the full assembly. The completed cavity is to be first mechanically polished to a mirror-finish, a newly acquired in-house capability at JLab, followed by the proven ILC-style processing recipe established already at JLab. In parallel, new single-cell cavities made from large-grain niobium material are made to further advance the cavity treatment and processing procedures, aiming for the demonstration of an acceleration gradient of 50 MV/m with Q{sub 0} of 2-10{sup 10} at 2K.

  7. Design of high Q-factor metallic nanocavities using plasmonic bandgaps. (United States)

    Ee, Ho-Seok; Park, Hong-Gyu; Kim, Sun-Kyung


    The surface plasmon polariton modes often excited in metallic nanocavities enable the miniaturization of photonic devices, even beyond the diffraction limit, yet their severe optical losses deteriorate device performance. This study proposes a design of metallic nanorod cavities coupled to plasmonic crystals with the aim of reducing the radiation loss of surface plasmon modes. Periodic Ag disks placed on an insulator-metal substrate open a substantial amount of plasmonic bandgaps (e.g., Δλ=290  nm at λ=1550  nm) by modifying their diameter and thickness. When an Ag nanorod with a length of ∼400  nm is surrounded by the periodic Ag disks, its Q-factor increases up to 127, yielding a 16-fold enhancement compared with a bare Ag nanorod, while its mode volume can be as small as 0.03(λ/2n)³. Ag nanorods with gradually increasing lengths exhibit high Q-factor plasmonic modes that are tunable within the plasmonic bandgap. These numerical studies on low-radiation-loss plasmonic modes excited in metallic nanocavities will promote the development of ultrasmall plasmonic devices.

  8. Mid-Infrared ultra-high-Q resonators based on fluoride crystalline materials

    CERN Document Server

    Lecaplain, C; Gorodetsky, M L; Kippenberg, T J


    Decades ago, the losses of glasses in the near infrared (near-IR) were investigated in views of developments for optical telecommunications. Today, properties in the mid-infrared (mid-IR) are of interest for molecular spectroscopy applications. In particular, high-sensitivity spectroscopic techniques based on high-finesse mid-IR cavities hold high promise for medical applications. Due to exceptional purity and low losses, whispering gallery mode microresonators based on polished alkaline earth metal fluoride crystals (i.e the $\\mathrm{XF_2}$ family, where X $=$ Ca, Mg, Ba, Sr,...) have attained ultra-high quality (Q) factor resonances (Q$>$10$^{8}$) in the near-IR and visible spectral ranges. Here we report for the first time ultra-high Q factors in the mid-IR using crystalline microresonators. Using an uncoated chalcogenide (ChG) tapered fiber, light from a continuous wave quantum cascade laser (QCL) is efficiently coupled to several crystalline microresonators at 4.4 $\\mu$m wavelength. We measure the optica...

  9. Integrating the IEP and SOI with Educational Programing for the Gifted. (United States)

    Hedbring, Charles; Rubenzer, Ronald


    The paper investigates a strategy for integrating the IEP (individualized educational plan) and J. Guilford's Structure-of-Intellect (SOI) in order to promote an accountability based approach to differentiated programing for the gifted classroom student. (Author/PHR)

  10. Computer simulation of GaAs and SOI devices using TCAD tools: an REU project


    Goel, Ashok; Bergstrom, Sarah; Mojica-Campbell, Aleli


    An undergraduate research project is outlined whose goal was to use the TCAD tools to simulate the performances of GaAs- and SOI-based devices and to compare them with the corresponding silicon-based devices. Students used the Silvaco Corporation's "Virtual Wafer Fab" (VWF) package consisting of process simulation software called ATHENA, device layout software called DevEdit and device simulation software called ATLAS to simulate GaAs, SOI as well as conventional silicon devices. They explore...

  11. Micromachined thin-film sensors for SOI-CMOS co-integration

    CERN Document Server

    Laconte, Jean; Raskin, Jean-Pierre


    Co-integration of MEMS and MOS in SOI technology is promising and well demonstrated hereThe impact of Micromachining on SOI devices is deeply analyzed for the first timeInclude extensive TMAH etching, residual stress, microheaters, gas-flow sensors reviewResidual stresses in thin films need to be more and more monitored in MEMS designsTMAH micromachining is an attractive alternative to KOH.

  12. Development of Electromechanical Architectures for AC Voltage Metrology

    Directory of Open Access Journals (Sweden)

    Alexandre BOUNOUH


    Full Text Available This paper presents results of work undertaken for exploring MEMS capabilities to fabricate AC voltage references for electrical metrology and high precision instrumentation through the mechanical-electrical coupling in MEMS. From first MEMS test structures previously realized, a second set of devices with improved characteristics has been developed and fabricated with Silicon on Insulator (SOI Surface Micromachining process. These MEMS exhibit pull-in voltages of 5 V and 10 V to match with the best performance of the read-out electronics developed for driving the MEMS. Deep Level Transient Spectroscopy measurements carried out on the new design show resonance frequencies of about only some kHz, and the stability of the MEMS output voltage measured at 100 kHz has been found very promising for the best samples where the relative deviation from the mean value over almost 12 hours showed a standard deviation of about 6.3 ppm.

  13. Turn-off failure in multi-finger SOI-LIGBT used for single chip inverter ICs (United States)

    Zhang, Long; Zhu, Jing; Zhao, Minna; Huang, Xuequan; Chen, Jiajun; Sun, Weifeng; Ding, Desheng


    In this paper, the clamped inductive turn-off failure of the Silicon-on-Insulator Lateral Insulated Gate Bipolar Transistor (SOI-LIGBT) with multiple fingers under high-voltage and high-current conditions is investigated. First, the measured turn-off waveforms combining with the on-state I-V characteristics of the failed device are discussed to distinguish the probable cause of the failure. Then, two-dimensional (2-D) electrothermal simulations are performed to reproduce the failure by using Sentaurus TCAD. The failure is originated from an inhomogeneous depletion behavior among the paralleled fingers during the turn-off, which gives rise to the non-uniform current-sharing and the subsequent current crowding in single finger. As a result, the latch-up of the device takes place. The simulation indicates that the current crowding is formed mainly through an internal path in the silicon. In order to verify the failure mechanism, an improved device with deep-oxide trenches arranged between the adjacent fingers is fabricated. The measured results demonstrate that no failure occurs when the improved device turns off under high-voltage and high-current conditions.

  14. Modeling of the Channel Thickness Influence on Electrical Characteristics and Series Resistance in Gate-Recessed Nanoscale SOI MOSFETs

    Directory of Open Access Journals (Sweden)

    A. Karsenty


    Full Text Available Ultrathin body (UTB and nanoscale body (NSB SOI-MOSFET devices, sharing a similar W/L but with a channel thickness of 46 nm and lower than 5 nm, respectively, were fabricated using a selective “gate-recessed” process on the same silicon wafer. Their current-voltage characteristics measured at room temperature were found to be surprisingly different by several orders of magnitude. We analyzed this result by considering the severe mobility degradation and the influence of a huge series resistance and found that the last one seems more coherent. Then the electrical characteristics of the NSB can be analytically derived by integrating a gate voltage-dependent drain source series resistance. In this paper, the influence of the channel thickness on the series resistance is reported for the first time. This influence is integrated to the analytical model in order to describe the trends of the saturation current with the channel thickness. This modeling approach may be useful to interpret anomalous electrical behavior of other nanodevices in which series resistance and/or mobility degradation is of a great concern.

  15. Generation and confinement of mobile charges in buried oxide of SOI substrates; Generation et confinement de charges mobiles dans les oxydes enterres de substrats SOI

    Energy Technology Data Exchange (ETDEWEB)

    Gruber, O.; Krawiec, S.; Musseau, O.; Paillet, Ph.; Courtot-Descharles, A. [CEA Bruyeres-le-Chatel, DIF, 91 (France)


    We analyze the mechanisms of generation and confinement of mobile protons resulting from hydrogen annealing of SOI buried oxides. This study of the mechanisms of generation and confinement of mobile protons in the buried oxide of SOI wafers emphasizes the importance of H+ diffusion in the oxide in the formation of a mobile charge. Under specific electric field conditions the irradiation of these devices results in a pinning of this mobile charge at the bottom Si-SiO{sub 2} interface. Ab initio calculations are in progress to investigate the possible precursor defects in the oxide and detail the mechanism for mobile proton generation and confinement. (authors)

  16. Photonic crystal nanofiber air-mode cavity with high Q-factor and high sensitivity for refractive index sensing (United States)

    Ma, Xiaoxue; Chen, Xin; Nie, Hongrui; Yang, Daquan


    Recently, due to its superior characteristics and simple manufacture, such as small size, low loss, high sensitivity and convenience to couple, the optical fiber sensor has become one of the most promising sensors. In order to achieve the most effective realization of light propagation by changing the structure of sensors, FOM(S •Q/λres) ,which is determined by two significant variables Q-factor and sensitivity, as a trade-off parameter should be optimized to a high value. In typical sensors, a high Q can be achieved by confining the optical field in the high refractive index dielectric region to make an interaction between analytes and evanescent field of the resonant mode. However, the ignored sensitivity is relatively low with a high Q achieved, which means that the resonant wavelength shift changes non-obviously when the refractive index increases. Meanwhile, the sensitivity also leads to a less desirable FOM. Therefore, a gradient structure, which can enhance the performance of sensors by achieving high Q and high sensitivity, has been developed by Kim et al. later. Here, by introducing parabolic-tapered structure, the light field localized overlaps strongly and sufficiently with analytes. And based on a one-dimensional photonic-crystal nanofiber air-mode cavity, a creative optical fiber sensor is proposed by combining good stability and transmission characteristics of fiber and strengths of tapered structure, realizing excellent FOM {4.7 x 105 with high Q-factors (Q{106) and high sensitivities (<700 nm/RIU).

  17. La mise en scène de soi

    Directory of Open Access Journals (Sweden)

    Barbara Roland


    Full Text Available Au cours de cet article, nous examinons un corpus de créations dans le champ des arts du spectacle vivant en Belgique, au sein desquelles des performeurs, à la fois sujets et lieux de l’énonciation, développent des formes esthétiques d'écriture vivante de soi. Pour certains artistes, l’art de la performance est un terrain privilégié pour évoquer l’expérience du « moi » dont ils sont les protagonistes. Des femmes et des hommes deviennent les auteurs de leur biographie, sous forme d’un langage vivant qui dépasse le cadre de la représentation et de ses codes. Avec ou sans masque fictionnel, ils mettent en place des moyens originaux pour exprimer ce que les instruments classiques de l’expression ne peuvent pas formuler. Entre réalité et imaginaire, ils communiquent « ce que dire ne veut plus dire », et traduisent des réalités mais aussi des souvenirs de la mémoire individuelle et collective sur le plan de la création artistique.

  18. High performance flexible CMOS SOI FinFETs

    KAUST Repository

    Fahad, Hossain M.


    We demonstrate the first ever CMOS compatible soft etch back based high performance flexible CMOS SOI FinFETs. The move from planar to non-planar FinFETs has enabled continued scaling down to the 14 nm technology node. This has been possible due to the reduction in off-state leakage and reduced short channel effects on account of the superior electrostatic charge control of multiple gates. At the same time, flexible electronics is an exciting expansion opportunity for next generation electronics. However, a fully integrated low-cost system will need to maintain ultra-large-scale-integration density, high performance and reliability - same as today\\'s traditional electronics. Up until recently, this field has been mainly dominated by very weak performance organic electronics enabled by low temperature processes, conducive to low melting point plastics. Now however, we show the world\\'s highest performing flexible version of 3D FinFET CMOS using a state-of-the-art CMOS compatible fabrication technique for high performance ultra-mobile consumer applications with stylish design. © 2014 IEEE.

  19. Investigation of AWG demultiplexer based SOI for CWDM application (United States)

    Juhari, Nurjuliana; Susthitha Menon, P.; Shaari, Sahbudin; Annuar Ehsan, Abang


    9-channel Arrayed Waveguide Grating (AWG) demultiplexer for conventional and tapered structure were simulated using beam propagation method (BPM) with channel spacing of 20 nm. The AWG demultiplexer was design using high refractive index (n 3.47) material namely silicon-on-insulator (SOI) with rib waveguide structure. The characteristics of insertion loss, adjacent crosstalk and output spectrum response at central wavelength of 1.55 μm for both designs were compared and analyzed. The conventional AWG produced a minimum insertion loss of 6.64 dB whereas the tapered AWG design reduced the insertion loss by 2.66 dB. The lowest adjacent crosstalk value of -16.96 dB was obtained in the conventional AWG design and this was much smaller compared to the tapered AWG design where the lowest crosstalk value is -17.23 dB. Hence, a tapered AWG design significantly reduces the insertion loss but has a slightly higher adjacent crosstalk compared to the conventional AWG design. On the other hand, the output spectrum responses that are obtained from both designs were close to the Coarse Wavelength Division Multiplexing (CWDM) wavelength grid.

  20. Higher-Order Factors in Structure-of-Intellect (SOI) Aptitude Tests Hypothesized to Portray Constructs of Military Leadership: A Re-analysis of an SOI Data Base. (United States)

    Ulosevich, Steven N.; And Others


    A correlation matrix of 21 structure-of-intellect (SOI) tests taken by 204 Marine officers at a military base in Southern California, which was intended to reflect aptitudes for military leadership, was reanalyzed through exploratory factor analysis and confirmatory maximum likelihood factor analysis. Higher order factors appeared to have…

  1. Frequency-Temperature Compensation Techniques for High-Q Microwave Resonators (United States)

    Hartnett, John G.; Tobar, Michael E.

    Low-noise high-stability resonator oscillators based on high-Q monolithic sapphire ``Whispering Gallery'' (WG)-mode resonators have become important devices for telecommunication, radar and metrological applications. The extremely high quality factor of sapphire, of 2 x10^5 at room temperature, 5 x10^7 at liquid nitrogen temperature and 5 x10^9 at liquid helium temperature has enabled the lowest phase noise and highly frequency-stable oscillators in the microwave regime to be constructed. To create an oscillator with exceptional frequency stability, the resonator must have its frequency-temperature dependence annulled at some temperature, as well as a high quality factor. The Temperature Coefficient of Permittivity (TCP) for sapphire is quite large, at 10-100parts per million/K above 77K. This mechanism allows temperature fluctuations to transform to resonator frequency fluctuations.A number of research groups worldwide have investigated various methods of compensating the TCP of a sapphire dielectric resonator at different temperatures. The usual electromagnetic technique of annulment involves the use of paramagnetic impurities contributing an opposite temperature coefficient of the magnetic susceptibility to the TCP. This technique has only been realized successfully in liquid helium environments. Near 4K the thermal expansion and permittivity effects are small and only small quantities of the paramagnetic ions are necessary to compensate the mode frequency. Compensation is due to impurity ions that were incidentally left over from the manufacturing process.Recently, there has been an effort to dispense with the need for liquid helium and make a compact flywheel oscillator for the new generation of primary frequency standards such as the cesium fountain at the Laboratoire Primaire du Temps et des Fréquences (LPTF), France. To achieve the stability limit imposed by quantum projection noise requires that the local oscillator stability is of the order of 10

  2. Inverse design of high-Q wave filters in two-dimensional phononic crystals by topology optimization. (United States)

    Dong, Hao-Wen; Wang, Yue-Sheng; Zhang, Chuanzeng


    Topology optimization of a waveguide-cavity structure in phononic crystals for designing narrow band filters under the given operating frequencies is presented in this paper. We show that it is possible to obtain an ultra-high-Q filter by only optimizing the cavity topology without introducing any other coupling medium. The optimized cavity with highly symmetric resonance can be utilized as the multi-channel filter, raising filter and T-splitter. In addition, most optimized high-Q filters have the Fano resonances near the resonant frequencies. Furthermore, our filter optimization based on the waveguide and cavity, and our simple illustration of a computational approach to wave control in phononic crystals can be extended and applied to design other acoustic devices or even opto-mechanical devices. Copyright © 2016 Elsevier B.V. All rights reserved.

  3. Switchable microwave photonic filter between high Q bandpass filter and notch filter with flat passband based on phase modulation. (United States)

    Yu, Yuan; Xu, Enming; Dong, Jianji; Zhou, Lina; Li, Xiang; Zhang, Xinliang


    We propose and demonstrate a novel switchable microwave photonic filter based on phase modulation. Both a microwave high Q bandpass filter and a microwave notch filter with flat passband are achieved respectively. And the switchability between them by tuning the two tunable optical bandpass filters is demonstrated. We also present a theoretical model and analytical expression for the proposed scheme. A frequency response of a high Q bandpass filter with a Q factor of 327 and a rejection ratio of exceeding 42 dB, and a frequency response of a notch filter with flat passband with a rejection ratio exceeding 34 dB are experimentally obtained. The operation frequency of microwave photonic filter is around 20 GHz.

  4. Observation of energy oscillation between strongly-coupled counter-propagating ultra-high Q whispering gallery modes. (United States)

    Yoshiki, Wataru; Chen-Jinnai, Akitoshi; Tetsumoto, Tomohiro; Tanabe, Takasumi


    We report the first experimental observation of an energy oscillation between two coupled ultra-high Q whispering gallery modes in the time domain. Two counter-propagating whispering gallery modes in a silica toroid microcavity were employed for this purpose. The combination of a large coupling coefficient between the two modes and an ultra-high Q factor, which creates a large Γ value of > 10, results in a clear energy oscillation. Our measurement is based on a drop-port measurement technique, which enables us to observe the light energy in the two modes directly. The oscillation period measured in the time domain precisely matched that inferred from mode splitting in the frequency domain, and the measured results showed excellent agreement with results calculated with the developed numerical model.

  5. Low-threshold Raman laser from an on-chip, high-Q, polymer-coated microcavity. (United States)

    Li, Bei-Bei; Xiao, Yun-Feng; Yan, Meng-Yuan; Clements, William R; Gong, Qihuang


    We study the stimulated Raman emission of a high-Q polydimethylsiloxane (PDMS)-coated silica microsphere on a silicon chip. In this hybrid structure, as the thickness of the PDMS coating increases, the spatial distribution of the whispering gallery modes moves inside the PDMS layer, and the light emission switches from silica Raman lasing to PDMS Raman lasing. The Raman shift of the PDMS Raman laser is measured at 2900 cm(-1), corresponding to the strongest Raman fingerprint of bulk PDMS material. The threshold for this PDMS Raman lasing is demonstrated to be as low as 1.3 mW. This type of Raman emission from a surface-coated high-Q microcavity not only provides a route for extending lasing wavelengths, but also shows potential for detecting specific analytes.

  6. Realization of high-Q/V photonic crystal cavities defined by an effective Aubry-André-Harper bichromatic potential (United States)

    Simbula, A.; Schatzl, M.; Zagaglia, L.; Alpeggiani, F.; Andreani, L. C.; Schäffler, F.; Fromherz, T.; Galli, M.; Gerace, D.


    We report on the realization of high-Q/V photonic crystal cavities in thin silicon membranes, with resonances around 1.55 μm wavelength. The cavity designs are based on a recently proposed photonic crystal implementation of the Aubry-André-Harper bichromatic potential, defined from the superposition of two one-dimensional lattices with a non-integer ratio between their periodicity constants. In photonic crystal nanocavities, this confinement mechanism is such that optimized figures of merit can be straightforwardly achieved, in particular an ultra-high-Q factor and diffraction-limited mode volume. Several silicon membrane photonic crystal nanocavities have been realized with measured Q-factors in the 1 × 106 range, as evidenced by resonant scattering. The generality of the proposed designs and their easy implementation and scalability make these results particularly interesting for realizing highly performing photonic nanocavities on different material platforms and operational wavelengths.

  7. Like-Sign Dileptons at the Fermilab Tevatron Revisited in the Light of the HERA High-$Q^2$ Anomaly

    CERN Document Server

    Choudhury, D; Choudhury, Debajyoti; Raychaudhuri, Sreerup


    We re-examine like-sign dilepton signals at the Fermilab Tevatron assuming that the excess high-$Q^2$ events recently seen at HERA are due to the production and decay of squarks of $R$-parity-violating supersymmetry. For gluinos in the mass range of 200--350 GeV, the like-sign dilepton signal can help to make the crucial distinction between the most favoured squark explanation and other proposed solutions.

  8. A minimal Beta Beam with high-Q ions to address CP violation in the leptonic sector

    CERN Document Server

    Coloma, P; Migliozzi, P; Lavina, L Scotto; Terranova, F


    In this paper we consider a Beta Beam setup that tries to leverage at most existing European facilities: i.e. a setup that takes advantage of facilities at CERN to boost high-Q ions (8Li and 8B) aiming at a far detector located at L = 732 Km in the Gran Sasso Underground Laboratory. The average neutrino energy for 8Li and 8B ions boosted at \\gamma ~ 100 is in the range E_\

  9. Carbon Nanofiber-Based, High-Frequency, High-Q, Miniaturized Mechanical Resonators (United States)

    Kaul, Anupama B.; Epp, Larry W.; Bagge, Leif


    High Q resonators are a critical component of stable, low-noise communication systems, radar, and precise timing applications such as atomic clocks. In electronic resonators based on Si integrated circuits, resistive losses increase as a result of the continued reduction in device dimensions, which decreases their Q values. On the other hand, due to the mechanical construct of bulk acoustic wave (BAW) and surface acoustic wave (SAW) resonators, such loss mechanisms are absent, enabling higher Q-values for both BAW and SAW resonators compared to their electronic counterparts. The other advantages of mechanical resonators are their inherently higher radiation tolerance, a factor that makes them attractive for NASA s extreme environment planetary missions, for example to the Jovian environments where the radiation doses are at hostile levels. Despite these advantages, both BAW and SAW resonators suffer from low resonant frequencies and they are also physically large, which precludes their integration into miniaturized electronic systems. Because there is a need to move the resonant frequency of oscillators to the order of gigahertz, new technologies and materials are being investigated that will make performance at those frequencies attainable. By moving to nanoscale structures, in this case vertically oriented, cantilevered carbon nanotubes (CNTs), that have larger aspect ratios (length/thickness) and extremely high elastic moduli, it is possible to overcome the two disadvantages of both bulk acoustic wave (BAW) and surface acoustic wave (SAW) resonators. Nano-electro-mechanical systems (NEMS) that utilize high aspect ratio nanomaterials exhibiting high elastic moduli (e.g., carbon-based nanomaterials) benefit from high Qs, operate at high frequency, and have small force constants that translate to high responsivity that results in improved sensitivity, lower power consumption, and im - proved tunablity. NEMS resonators have recently been demonstrated using topdown

  10. Estime de soi et traitement de l'erreur: quelles influences ?


    Guex, Barbara; Puozzo, Isabelle


    L’estime de soi est un concept du domaine de la psychologie, alors que l’erreur est un concept-clef des apprentissages. Ni l’un ni l’autre n’est enseigné en tant que tel. L’estime de soi a pourtant fait l’objet de nombreuses prises de position dans les ouvrages concernant l’éducation. Famose et Bertsch (2009) en ont même fait un de leurs titres : L’estime de soi, une controverse éducative. L’erreur, de son côté, est considérée différemment selon les modèles d’enseignement : quand il est trans...

  11. Development of the Stress of Immigration Survey (SOIS): a Field Test among Mexican Immigrant Women (United States)

    Sternberg, Rosa Maria; Nápoles, Anna Maria; Gregorich, Steven; Paul, Steven; Lee, Kathryn A.; Stewart, Anita L.


    The Stress of Immigration Survey (SOIS) is a screening tool used to assess immigration-related stress. The mixed methods approach included concept development, pretesting, field-testing, and psychometric evaluation in a sample of 131 low-income women of Mexican descent. The 21-item SOIS screens for stress related to language; immigrant status; work issues; yearning for family and home country; and cultural dissonance. Mean scores ranged from 3.6 to 4.4 (1-5 scale, higher is more stress). Cronbach's alphas >.80 for all sub-scales. The SOIS may be a useful screening tool for detecting high levels of immigration-related stress in low-income Mexican immigrant women. PMID:26605954

  12. Novel Si ion implantation technique for improving the radiation hardness of SOI pseudo-MOS transistor

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Yanwei [Key Laboratory of Low Dimensional Materials and Application Technology, Xiangtan University, Ministry of Education, Xiangtan, Hunan 411105 (China); State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050 (China); Huang, Huixiang; Bi, Dawei [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050 (China); Tang, Minghua, E-mail: [Key Laboratory of Low Dimensional Materials and Application Technology, Xiangtan University, Ministry of Education, Xiangtan, Hunan 411105 (China); Zhang, Zhengxuan [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050 (China)


    The pseudo-MOS transistor is a quick and effective technique for characterizing the electrical properties of silicon-on-insulator (SOI) wafer. We investigated the total ionizing dose (TID) response of pseudo-MOS transistors fabricated on SOI wafers hardened by single or multiple step Si ion implantation. It is demonstrated that the two Si ion implantation methods can both improve the radiation hardness of SOI wafers owing to the generation of deep electron traps in the buried oxide (BOX). However, the lattice damage of top silicon film caused by the single step implantation compared with the multiple degenerates the electrical properties of transistors, especially for the sub-threshold swing. The high resolution transmission electron microscopy (HRTEM) was used to observe the lattice quality.

  13. Analytical Subthreshold Current and Subthreshold Swing Models for a Fully Depleted (FD) Recessed-Source/Drain (Re-S/D) SOI MOSFET with Back-Gate Control (United States)

    Saramekala, Gopi Krishna; Tiwari, Pramod Kumar


    Two-dimensional (2D) analytical models for the subthreshold current and subthreshold swing of the back-gated fully depleted recessed-source/drain (Re-S/D) silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) are presented. The surface potential is determined by solving the 2D Poisson equation in both channel and buried-oxide (BOX) regions, considering suitable boundary conditions. To derive closed-form expressions for the subthreshold characteristics, the virtual cathode potential expression has been derived in terms of the minimum of the front and back surface potentials. The effect of various device parameters such as gate oxide and Si film thicknesses, thickness of source/drain penetration into BOX, applied back-gate bias voltage, etc. on the subthreshold current and subthreshold swing has been analyzed. The validity of the proposed models is established using the Silvaco ATLAS™ 2D device simulator.

  14. Performance of Honeywell RICMOS-IV SOI transistors after irradiation to 27 Mrad(Si) by 63.3 MeV protons

    CERN Document Server

    Pellett, D E


    We present results of an exposure of Honeywell RICMOS-IV SOI transistors produced in a developmental run to 2*10/sup 14/ 63.3 MeV protons at the UCD cyclotron radiation test beam (27 Mrad (Si)). In terms of surface damage, this corresponds to almost twice the dose expected for the CMS pixel detector during its useful life at the LHC collider. The irradiated transistors include n-channel MOSFETs similar to the front-end transistors of a pixel readout suitable for use at hadron colliders. Data are presented for MOSFETs on radiation- induced changes in thresholds, transconductance, maximum voltage gain and noise. Circuit simulations using the measured noise data indicate that the pixel readout would continue to function satisfactorily in the CMS radiation environment. (8 refs).

  15. 25-Gb/s transmission over 2.5-km SSMF by silicon MRR enhanced 1.55-μm III-V/SOI DML

    DEFF Research Database (Denmark)

    Cristofori, Valentina; Da Ros, Francesco; Ozolins, Oskars


    a 11-GHz 1.55-μm directly modulated hybrid III-V/SOI DFB laser realized by bonding III-V materials (InGaAlAs) on a silicon-on-insulator (SOI) wafer and a silicon MRR also fabricated on SOI. Such a transmitter enables error-free transmission (BER5-km SSMF without...

  16. Besoins psychosociaux et estime de soi à la préadolescence


    Portier, Séverine


    Les besoins psychosociaux de l'enfant sont d'ordre affectifs (attachement, acceptation, investissement), cognitifs (stimulation, expérimentation, renforcement) et sociaux (communication, considération, structures). Il s'agit, dans cette étude, de vérifier la corrélation entre la réalisation des besoins psychosociaux et l'estime de soi chez les préadolescents, ainsi que d'examiner les effets du genre et de l'âge sur l'estime de soi. Trois hypothèses ont été évaluées. La réalisation des besoins...

  17. Towards Polarization Diversity on the SOI Platform With Simple Fabrication Process

    DEFF Research Database (Denmark)

    Ding, Yunhong; Liu, Liu; Peucheret, Christophe


    We present a polarization diversity circuit built on the silicon-on-insulator (SOI) platform, which can be fabricated by a simple process. The polarization diversity is based on two identical air-clad asymmetrical directional couplers, which simultaneously play the roles of polarization splitter...... and rotator. A silicon polarization diversity circuit with a single microring resonator is fabricated on the SOI platform. Only ${1-dB polarization-dependent loss is demonstrated. A significant improvement of the polarization dependence is obtained for 20-Gb/s nonreturn-to-zero differential phase-shift keying...

  18. Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration

    KAUST Repository

    Pirro, Luca


    Recent experimental results have demonstrated the possibility of characterizing silicon-on-insulator (SOI) wafers through split C-V measurements in the pseudo-MOSFET configuration. This paper analyzes the capacitance and conductance versus frequency characteristics. We discuss the conditions under which it is possible to extract interface trap density in bare SOI wafers. The results indicate, through both measurements and simulations, that the signature due to interface trap density is present in small-area samples, but is masked by the RC response of the channel in regular, large-area ones, making the extraction in standard samples problematic. © 1963-2012 IEEE.

  19. Simulation of dual-gate SOI MOSFET with different dielectric layers (United States)

    Yadav, Jyoti; Chaudhary, R.; Mukhiya, R.; Sharma, R.; Khanna, V. K.


    The paper presents the process design and simulation of silicon-on-insulator (SOI)-based dual-gate metal oxide field-effect transistor (DG-MOSFET) stacked with different dielectric layers on the top of gate oxide. A detailed 2D process simulation of SOI-MOSFETs and its electrical characterization has been done using SILVACO® TCAD tool. A variation in transconductance was observed with different dielectric layers, AlN-gate MOSFET having the highest tranconductance value as compared to other three dielectric layers (SiO2, Si3N4 and Al2O3).

  20. Evaluation of circuit performance of ultra-thin-body SOI CMOS (United States)

    Pacha, Christian; Schmal, Artur; Schulz, Thomas; Göttsche, Ralf; Steinhögl, Werner


    Ultra-thin-body silicon-on-insulator (UTB-SOI) is one of the most promising candidates for future CMOS technologies with minimum feature sizes below 50 nm [1]. In this paper we analyze the impact of this emerging CMOS device concept on the performance of a representative selection of various digital CMOS circuits under different load conditions for typical ASIC/SOC applications. For compact modeling a physics-based fully depleted SOI model is used [2] and combined with a technology scenario assuming an undoped Si-body, elevated source-drain regions, and midgap gate workfunction.

  1. High-Q microsphere resonators for angular velocity sensing in gyroscopes

    Energy Technology Data Exchange (ETDEWEB)

    An, Panlong [Key Laboratory of Instrumentation Science and Dynamic Measurement, Ministry of Education, Taiyuan 030051 (China); School of Science, North University of China, Taiyuan 030051 (China); Zheng, Yongqiu [Science and Technology on Electronic Test and Measurement Laboratory, North University of China, Taiyuan 030051 (China); Yan, Shubin, E-mail:; Xue, Chenyang, E-mail:; Liu, Jun, E-mail: [Key Laboratory of Instrumentation Science and Dynamic Measurement, Ministry of Education, Taiyuan 030051 (China); Science and Technology on Electronic Test and Measurement Laboratory, North University of China, Taiyuan 030051 (China); Wang, Wanjun [Department of Mechanical Engineering, Louisiana State University, Baton Rouge, Louisiana 70803 (United States)


    A resonator gyroscope based on the Sagnac effect is proposed using a core unit that is generated by water-hydrogen flame melting. The relationship between the quality factor Q and diameter D is revealed. The Q factor of the spectral lines of the microsphere cavity coupling system, which uses tapered fibers, is found to be 10{sup 6} or more before packaging with a low refractive curable ultraviolet polymer, although it drops to approximately 10{sup 5} after packaging. In addition, a rotating test platform is built, and the transmission spectrum and discriminator curves of a microsphere cavity with Q of 3.22×10{sup 6} are measured using a semiconductor laser (linewidth less than 1 kHz) and a real-time proportional-integral circuit tracking and feedback technique. Equations fitting the relation between the voltage and angular rotation rate are obtained. According to the experimentally measured parameters, the sensitivity of the microsphere-coupled system can reach 0.095{sup ∘}/s.

  2. Voltage-driven versus current-driven spin torque in anisotropic tunneling junctions

    KAUST Repository

    Manchon, Aurelien


    Nonequilibrium spin transport in a magnetic tunnel junction comprising a single magnetic layer in the presence of interfacial spin-orbit interaction (SOI) is studied theoretically. The interfacial SOI generates a spin torque of the form T=T∥ M×(z× M)+T⊥ z× M, even in the absence of an external spin polarizer. For thick and large tunnel barriers, the torque reduces to the perpendicular component T⊥, which can be electrically tuned by applying a voltage across the insulator. In the limit of thin and low tunnel barriers, the in-plane torque T∥ emerges, proportional to the tunneling current density. Experimental implications on magnetic devices are discussed. © 2011 IEEE.

  3. Demonstration of suppressed phonon tunneling losses in phononic bandgap shielded membrane resonators for high-Q optomechanics

    DEFF Research Database (Denmark)

    Tsaturyan, Yeghishe; Barg, Andreas; Simonsen, Anders


    so that it assumes the form of a cm-sized bridge featuring a 1-dimensional periodic pattern, whose phononic density of states is tailored to exhibit one, or several, full band gaps around the membrane’s high-Q modes in the MHz-range. We quantify the effectiveness of this phononic bandgap shield......, which in practice usually necessitates delicate, and difficult-to-reproduce mounting solutions. Here, we demonstrate that a phononic bandgap shield integrated in the membrane’s silicon frame eliminates this dependence, by suppressing dissipation through phonon tunneling. We dry-etch the membrane’s frame...

  4. High-sensitivity and high-Q-factor glass photonic crystal cavity and its applications as sensors. (United States)

    Siraji, Ashfaqul Anwar; Zhao, Yang


    We investigate the properties of a planar photonic crystal cavity on glass and its applications as sensors. An airbridged twofold defect cavity on Schott glass background and Gorilla glass substrate has been designed for high Q-factor up to 4459. The average sensitivity of the cavity resonance to background refractive index is 388 nm/Refractive Index Unit. The resonant wavelength is sensitive to background temperature by 18.5 pm/°C. The designed sensors show much higher sensitivity than those based on waveguide interferometers or photonic bandgap structures without cavity resonance. The results are also useful for experimental studies of glass photonic devices.

  5. An effective thermal circuit model for electro-thermal simulation of SOI analog circuits (United States)

    Cheng, Ming-C.; Zhang, Kun


    A physics-based thermal circuit model is developed for electro-thermal simulation of SOI analog circuits. The circuit model integrates a non-isothermal device thermal circuit with interconnect thermal networks and is validated with high accuracy against finite element simulations in different layout structures. The non-isothermal circuit model is implemented in BSIMSOI to account for self-heating effect (SHE) in a Spice simulator, and applied to electro-thermal simulation of an SOI cascode current mirror constructed using different layouts. Effects of layout design on electric and thermal behaviors are investigated in detail. Influences of BOX thickness are also examined. It has been shown that the proposed non-isothermal approach is able to effectively account for influences of layout design, self-heating, high temperature gradients along the islands, interconnect temperature distributions, thermal coupling, and heat losses via BOX and interconnects, etc., in SOI current mirror structures. The model provides basic concepts and thermal circuits that can be extended to develop an effective model for electro-thermal simulation of SOI analog ICs.

  6. III-V/SOI vertical cavity laser structure for 120 Gbit/s speed

    DEFF Research Database (Denmark)

    Park, Gyeong Cheol; Xue, Weiqi; Mørk, Jesper


    Ultrashort-cavity structure for III-V/SOI vertical cavity laser with light output into a Si waveguide is proposed, enabling 17 fJ/bit efficiency or 120 Gbit/s speed. Experimentally, 27-GHz bandwidth is demonstrated at 3.5 times of threshold. © 2015 OSA....

  7. Extreme group index measured and calculated in 2D SOI-based photonic crystal waveguides

    DEFF Research Database (Denmark)

    Lavrinenko, Andrei; Jacobsen, Rune Shim; Fage-Pedersen, Jacob


    lattice of air-holes in the 216-nm thick silicon layer in an SOI material. Experimental transmission spectra show a mode cut-off around 1562.5 nm for the fundamental photonic bandgap mode. In order to measure and model the group index of modes in the PCW, a time-of-flight (ToF) method is applied....

  8. Mapping the broadband polarization properties of linear 2D SOI photonic crystal waveguides

    DEFF Research Database (Denmark)

    Canning, John; Skivesen, Nina; Kristensen, Martin


    Both quasi-TE and TM polarisation spectra for a silicon- on-insulator (SOI) waveguide are recorded over (1100-1700) nm using a broadband supercontinuum source. By studying both the input and output polarisation eigenstates we observe narrowband resonant cross coupling near the lowest quasi-TE mode...

  9. The effect of gate length on SOI-MOSFETS operation | Baedi ...

    African Journals Online (AJOL)

    The effect of gate length on the operation of silicon-on-insulator (SOI) MOSFET structure with a layer of buried silicon oxide added to isolate the device body has been simulated. Three transistors with gate lengths of 100, 200 and 500 nm were simulated. Simulations showed that with a fixed channel length, when the gate ...

  10. Quasi-Schottky-Barrier UTBB SOI MOSFET for Low-Power Robust SRAMs

    DEFF Research Database (Denmark)

    Ghanatian, Hamdam; Hosseini, Seyed Ebrahim; Zeinali, Behzad


    This paper presents a low-power robust static random access memory (SRAM) using a novel quasi-Schottky-barrier ultrathin body and ultrathin buried oxide (UTBB) silicon-on-insulator (SOI) device. In the proposed device, the drain terminal is highly doped and a metallic source terminal is used. Giv...

  11. Evaluation of a High Temperature SOI Half-Bridge MOSFET Driver, Type CHT-HYPERION (United States)

    Patterson, Richard; Hammoud, Ahmad


    Silicon-On-Insulator (SOI) technology utilizes the addition of an insulation layer in its structure to reduce leakage currents and to minimize parasitic junctions. As a result, SOIbased devices exhibit reduced internal heating as compared to the conventional silicon devices, consume less power, and can withstand higher operating temperatures. In addition, SOI electronic integrated circuits display good tolerance to radiation by virtue of introducing barriers or lengthening the path for penetrating particles and/or providing a region for trapping incident ionization. The benefits of these parts make them suitable for use in deep space and planetary exploration missions where extreme temperatures and radiation are encountered. Although designed for high temperatures, very little data exist on the operation of SOI devices and circuits at cryogenic temperatures. In this work, the performance of a commercial-off-the-shelf (COTS) SOI half-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

  12. Advanced Liquid-Free, Piezoresistive, SOI-Based Pressure Sensors for Measurements in Harsh Environments

    Directory of Open Access Journals (Sweden)

    Ha-Duong Ngo


    Full Text Available In this paper we present and discuss two innovative liquid-free SOI sensors for pressure measurements in harsh environments. The sensors are capable of measuring pressures at high temperatures. In both concepts media separation is realized using a steel membrane. The two concepts represent two different strategies for packaging of devices for use in harsh environments and at high temperatures. The first one is a “one-sensor-one-packaging_technology” concept. The second one uses a standard flip-chip bonding technique. The first sensor is a “floating-concept”, capable of measuring pressures at temperatures up to 400 °C (constant load with an accuracy of 0.25% Full Scale Output (FSO. A push rod (mounted onto the steel membrane transfers the applied pressure directly to the center-boss membrane of the SOI-chip, which is placed on a ceramic carrier. The chip membrane is realized by Deep Reactive Ion Etching (DRIE or Bosch Process. A novel propertied chip housing employing a sliding sensor chip that is fixed during packaging by mechanical preloading via the push rod is used, thereby avoiding chip movement, and ensuring optimal push rod load transmission. The second sensor can be used up to 350 °C. The SOI chips consists of a beam with an integrated centre-boss with was realized using KOH structuring and DRIE. The SOI chip is not “floating” but bonded by using flip-chip technology. The fabricated SOI sensor chip has a bridge resistance of 3250 Ω. The realized sensor chip has a sensitivity of 18 mV/µm measured using a bridge current of 1 mA.

  13. Fiber-Optic Refractometer Based on an Etched High-Q π-Phase-Shifted Fiber-Bragg-Grating

    Directory of Open Access Journals (Sweden)

    Ming Han


    Full Text Available We present a compact and highly-sensitive fiber-optic refractometer based on a high-Q p-phase-shifted fiber-Bragg-grating (pFBG that is chemically etched to the core of the fiber. Due to the p phase-shift, a strong pFBG forms a high-Q optical resonator and the reflection spectrum features an extremely narrow notch that can be used for highly sensitivity refractive index measurement. The etched pFBG demonstrated here has a diameter of ~9.3 μm and a length of only 7 mm, leading to a refractive index responsivity of 2.9 nm/RIU (RIU: refractive index unit at an ambient refractive index of 1.318. The reflection spectrum of the etched pFBG features an extremely narrow notch with a linewidth of only 2.1 pm in water centered at ~1,550 nm, corresponding to a Q-factor of 7.4 ´ 105, which allows for potentially significantly improved sensitivity over refractometers based on regular fiber Bragg gratings.

  14. Improved reverse recovery characteristics of inAlN/GaN schottky barrier diode using a SOI substrate (United States)

    Chiu, Hsien-Chin; Peng, Li-Yi; Wang, Hsiang-Chun; Kao, Hsuan-Ling; Wang, Hou-Yu; Chyi, Jen-Inn


    The low-frequency noise (LFN) and reverse recovery charge characteristics of a six-inch InAlN/AlN/GaN Schottky barrier diode (SBD) on the Si-on-insulator (SOI) substrate were demonstrated and investigated for the first time. Raman spectroscopy indicated that using SOI wafers lowered epitaxial stress. According to the DC and LFN measurements at temperatures ranging from 300 to 450 K, the InAlN/GaN SBD on the SOI substrate showed improved forward and reverse currents and achieved a lower reverse recovery charge, compared with a conventional device.

  15. DVR(Dynamic Voltage Restorer)

    Indian Academy of Sciences (India)

    First page Back Continue Last page Graphics. DVR(Dynamic Voltage Restorer). Supply voltage Sag compensation. Supply voltage Swell Compensation. Balancing the Load voltage. Compensation of Supply Voltage Harmonics.

  16. Novel Gas Sensor Arrays Based on High-Q SAM-Modified Piezotransduced Single-Crystal Silicon Bulk Acoustic Resonators

    Directory of Open Access Journals (Sweden)

    Yuan Zhao


    Full Text Available This paper demonstrates a novel micro-size (120 μm × 200 μm piezoelectric gas sensor based on a piezotransduced single-crystal silicon bulk acoustic resonator (PSBAR. The PSBARs operate at 102 MHz and possess high Q values (about 2000, ensuring the stability of the measurement. A corresponding gas sensor array is fabricated by integrating three different self-assembled monolayers (SAMs modified PSBARs. The limit of detection (LOD for ethanol vapor is demonstrated to be as low as 25 ppm with a sensitivity of about 1.5 Hz/ppm. Two sets of identification code bars based on the sensitivities and the adsorption energy constants are utilized to successfully discriminate isopropanol (IPA, ethanol, hexane and heptane vapors at low and high gas partial pressures, respectively. The proposed sensor array shows the potential to form a portable electronic nose system for volatile organic compound (VOC differentiation.

  17. Coupling single NV-centres to high-Q whispering gallery modes of a preselected frequency-matched microresonator

    Energy Technology Data Exchange (ETDEWEB)

    Schietinger, Stefan; Benson, Oliver [Nano-Optics, Institute of Physics, Humboldt-Universitaet zu Berlin, Hausvogteiplatz 5-7, D-10117 Berlin (Germany)], E-mail:


    In this paper, we report the controlled coupling of fluorescence from a single NV-centre in a single nanodiamond to the high-Q modes of a preselected microsphere. Microspheres from an ensemble with a finite size distribution can be characterized precisely via white light Mie-scattering. The mode spectrum of individual spheres can be determined with high precision. A sphere with an appropriate spectrum can be selected, and a nanodiamond containing a single NV-centre can be coupled to it. The spectral position of the calculated lowest order whispering gallery modes are found to be in very good agreement with the experimentally observed resonances of the coupled fluorescence from the single NV-re.

  18. Effects of patterning induced stress relaxation in strained SOI/SiGe layers and substrate (United States)

    Hermann, P.; Hecker, M.; Renn, F.; Rölke, M.; Kolanek, K.; Rinderknecht, J.; Eng, L. M.


    Local stress fields in strained silicon structures important for CMOS technology are essentially related to size effects and properties of involved materials. In the present investigation, Raman spectroscopy was utilized to analyze the stress distribution within strained silicon (sSi) and silicon-germanium (SiGe) island structures. As a result of the structuring of initially unpatterned strained films, a size-dependent relaxation of the intrinsic film stresses was obtained in agreement with model calculations. This changed stress state in the features also results in the appearance of opposing stresses in the substrate underneath the islands. Even for strained island structures on top of silicon-on-insulator (SOI) wafers, corresponding stresses in the silicon substrate underneath the oxide were detected. Within structures, the stress relaxation is more pronounced for islands on SOI substrates as compared to those on bulk silicon substrates.

  19. A Lateral Differential Resonant Pressure Microsensor Based on SOI-Glass Wafer-Level Vacuum Packaging. (United States)

    Xie, Bo; Xing, Yonghao; Wang, Yanshuang; Chen, Jian; Chen, Deyong; Wang, Junbo


    This paper presents the fabrication and characterization of a resonant pressure microsensor based on SOI-glass wafer-level vacuum packaging. The SOI-based pressure microsensor consists of a pressure-sensitive diaphragm at the handle layer and two lateral resonators (electrostatic excitation and capacitive detection) on the device layer as a differential setup. The resonators were vacuum packaged with a glass cap using anodic bonding and the wire interconnection was realized using a mask-free electrochemical etching approach by selectively patterning an Au film on highly topographic surfaces. The fabricated resonant pressure microsensor with dual resonators was characterized in a systematic manner, producing a quality factor higher than 10,000 (~6 months), a sensitivity of about 166 Hz/kPa and a reduced nonlinear error of 0.033% F.S. Based on the differential output, the sensitivity was increased to two times and the temperature-caused frequency drift was decreased to 25%.

  20. III-V/SOI vertical cavity laser with in-plane output into a Si waveguide

    DEFF Research Database (Denmark)

    Park, Gyeong Cheol; Xue, Weiqi; Semenova, Elizaveta


    We experimentally demonstrate an optically-pumped III-V-on-SOI hybrid vertical-cavity laser that outputs light into an in-plane Si waveguide, using CMOS-compatible processes. The laser operates at 1.49 $\\mu$m with a side-mode suppression-ratio of 27 dB and has a similar threshold as long-waveleng......We experimentally demonstrate an optically-pumped III-V-on-SOI hybrid vertical-cavity laser that outputs light into an in-plane Si waveguide, using CMOS-compatible processes. The laser operates at 1.49 $\\mu$m with a side-mode suppression-ratio of 27 dB and has a similar threshold as long...

  1. A Monolithic High-G SOI-MEMS Accelerometer for Measuring Projectile Launch and Flight Accelerations

    Directory of Open Access Journals (Sweden)

    Bradford S. Davis


    Full Text Available Analog Devices (ADI has designed and fabricated a monolithic high-g acceleration sensor (ADXSTC3-HG fabricated with the ADI silicon-on-insulator micro-electro-mechanical system (SOI-MEMS process. The SOI-MEMS sensor structure has a thickness of 10 um, allowing for the design of inertial sensors with excellent cross-axis rejection. The high-g accelerometer discussed in this paper was designed to measure in-plane acceleration to 10,000 g while subjected to 100,000 g in the orthogonal axes. These requirements were intended to meet Army munition applications. The monolithic sensor was packaged in an 8-pin leadless chip carrier (LCC-8 and was successfully demonstrated by the US Army Research Laboratory (ARL as part of an inertial measurement unit during an instrumented flight experiment of artillery projectiles launched at 15,000 g.

  2. Design and coupled-effect simulations of CMOS micro gas sensors built on SOI thin membranes (United States)

    Lu, Chih-Cheng; Udrea, Florin; Gardner, Julian W.; Setiadi, D.; Dogaru, T.; Tsai, T. H.; Covington, James A.


    This paper describes coupled-effect simulations of smart micro gas-sensors based on standard BiCMOS technology. The smart sensor features very low power consumption, high sensitivity and potential low fabrication cost achieved through full CMOS integration. For the first time the micro heaters are made of active CMOS elements (i.e. MOSFET transistors) and embedded in a thin SOI membrane consisting of Si and SiO2 thin layers. Micro gas-sensors such as chemoresistive, microcalorimeteric and Pd/polymer gate FET sensors can be made using this technology. Full numerical analyses including 3D electro- thermo-mechanical simulations, in particular stress and deflection studies on the SOI membranes are presented. The transducer circuit design and the post-CMOS fabrication process, which includes single sided back-etching, are also reported.

  3. Anomalous DIBL Effect in Fully Depleted SOI MOSFETs Using Nanoscale Gate-Recessed Channel Process

    Directory of Open Access Journals (Sweden)

    Avi Karsenty


    Full Text Available Nanoscale Gate-Recessed Channel (GRC Fully Depleted- (FD- SOI MOSFET device with a silicon channel thickness (tSi as low as 2.2 nm was first tested at room temperature for functionality check and then tested at low temperature (77 K for I-V characterizations. In spite of its FD-SOI nanoscale thickness and long channel feature, the device has surprisingly exhibited a Drain-Induced Barrier Lowering (DIBL effect at RT. However, this effect was suppressed at 77 K. If the apparition of such anomalous effect can be explained by a parasitic short channel transistor located at the edges of the channel, its suppression is explained by the decrease of the potential barrier between the drain and the channel when lowering the temperature.

  4. Visible light laser voltage probing on thinned substrates (United States)

    Beutler, Joshua; Clement, John Joseph; Miller, Mary A.; Stevens, Jeffrey; Cole, Jr., Edward I.


    The various technologies presented herein relate to utilizing visible light in conjunction with a thinned structure to enable characterization of operation of one or more features included in an integrated circuit (IC). Short wavelength illumination (e.g., visible light) is applied to thinned samples (e.g., ultra-thinned samples) to achieve a spatial resolution for laser voltage probing (LVP) analysis to be performed on smaller technology node silicon-on-insulator (SOI) and bulk devices. Thinning of a semiconductor material included in the IC (e.g., backside material) can be controlled such that the thinned semiconductor material has sufficient thickness to enable operation of one or more features comprising the IC during LVP investigation.

  5. High-Temperature SOI/SiC-Based DC-DC Converter Suite

    Directory of Open Access Journals (Sweden)

    Brice McPherson


    Full Text Available A complete design strategy (mechanical and electrical for a 25 W 28 V/5 V dc-dc converter utilizing SiC and SOI electronics is presented. The converter includes a high-temperature SOI-based PWM controller featuring 150 kHz operation, a PID feedback loop, maximum duty cycle limit, complementary or symmetrical outputs, and a bootstrapped high-side gate driver. Several passive technologies were investigated for both control and power sections. Capacitor technologies were characterized over temperature and over time at 300C∘, power inductors designed and tested up to 350C∘, and power transformers designed and tested up to 500C∘. Northrop Grumman normally-off SiC JFETs were used as power switches and were characterized up to 250C∘. Efficiency and mass optimization routines were developed with the data gained from the first prototype. The effects of radiation on SiC and SOI electronics are then discussed. The results of the first prototype module are presented, with operation from 25C∘ up to an ambient temperature of 240C∘ .

  6. A Demonstrator Analog Signal Processing Circuit in a Radiation Hard SOI-CMOS Technology

    CERN Multimedia


    % RD-9 A Demonstrator Analog Signal Processing Circuit in a Radiation Hard SOI-CMOS Technology \\\\ \\\\Radiation hardened SOI-CMOS (Silicon-On-Insulator, Complementary Metal-Oxide- \\linebreak Semiconductor planar microelectronic circuit technology) was a likely candidate technology for mixed analog-digital signal processing electronics in experiments at the future high luminosity hadron colliders. We have studied the analog characteristics of circuit designs realized in the Thomson TCS radiation hard technologies HSOI3-HD. The feature size of this technology was 1.2 $\\mu$m. We have irradiated several devices up to 25~Mrad and 3.10$^{14}$ neutrons cm$^{-2}$. Gain, noise characteristics and speed have been measured. Irradiation introduces a degradation which in the interesting bandwidth of 0.01~MHz~-~1~MHz is less than 40\\%. \\\\ \\\\Some specific SOI phenomena have been studied in detail, like the influence on the noise spectrum of series resistence in the thin silicon film that constitutes the body of the transistor...

  7. A novel sandwich capacitive accelerometer with a symmetrical structure fabricated from a D-SOI wafer (United States)

    Zhou, Xiaofeng; Che, Lufeng; Wu, Jian; Li, Xiaolin; Wang, Yuelin


    This paper presents a novel sandwich capacitance accelerometer with a symmetrical double-sided beam-mass structure. The symmetrical beam-mass structure is fabricated from a double-device-layer silicon-on-insulate (D-SOI) wafer. The proof mass is suspended by eight beams at the corners on both sides. The beams are fabricated at the device layers of the SOI wafer; the cross-section of the beams is a standard trapezoid. The thickness of the beams can be well controlled because it is determined by the thickness of the device layer in the SOI wafer, and there is no dry etching process in the accelerometer fabrication. The resonance frequency of the developed accelerometer is measured in an open-loop system by a network analyzer. The quality factor and the resonant frequency are 18 and 812 Hz, respectively. The accelerometer has an opened-loop capacitance sensitivity of 8.7 pF g-1, a closed-loop sensitivity of 1.39 V g-1 and a nonlinearity of 0.49% over the range of 1 g. The measured input, referred to as the noise floor of the accelerometers, with an interface circuit is 2.4 µg (√Hz)-1 (0-100 Hz).

  8. Fully Integrated, Miniature, High-Frequency Flow Probe Utilizing MEMS Leadless SOI Technology (United States)

    Ned, Alex; Kurtz, Anthony; Shang, Tonghuo; Goodman, Scott; Giemette. Gera (d)


    This work focused on developing, fabricating, and fully calibrating a flowangle probe for aeronautics research by utilizing the latest microelectromechanical systems (MEMS), leadless silicon on insulator (SOI) sensor technology. While the concept of angle probes is not new, traditional devices had been relatively large due to fabrication constraints; often too large to resolve flow structures necessary for modern aeropropulsion measurements such as inlet flow distortions and vortices, secondary flows, etc. Mea surements of this kind demanded a new approach to probe design to achieve sizes on the order of 0.1 in. (.3 mm) diameter or smaller, and capable of meeting demanding requirements for accuracy and ruggedness. This approach invoked the use of stateof- the-art processing techniques to install SOI sensor chips directly onto the probe body, thus eliminating redundancy in sensor packaging and probe installation that have historically forced larger probe size. This also facilitated a better thermal match between the chip and its mount, improving stability and accuracy. Further, the leadless sensor technology with which the SOI sensing element is fabricated allows direct mounting and electrical interconnecting of the sensor to the probe body. This leadless technology allowed a rugged wire-out approach that is performed at the sensor length scale, thus achieving substantial sensor size reductions. The technology is inherently capable of high-frequency and high-accuracy performance in high temperatures and harsh environments.

  9. A Three-Dimensional DRAM Using Floating Body Capacitance Cells in an FD-SOI Process

    Directory of Open Access Journals (Sweden)

    Xuelian Liu


    Full Text Available This paper describes a three- dimensional DRAM in which the floating body capacitance (FBC of a fully depleted SOI (FD-SOI device is used as a storage node. This 1T DRAM lends itself particularly well to a 3D wafer-to-wafer bonding process because of the absence of deep etched and filled trench capacitor structure, and the improved thickness control tolerance in wafer thinning. A novel three-tier, 3D, 1T embedded DRAM is presented that can be vertically integrated with a microprocessor, achieving low cost, high-density on-chip main memory. A 394Kbits test chip has been designed and fabricated using the Lincoln Labs 3-Tier 3D 0.18um fully depleted SOI CMOS process where an earlier (and previously reported successful 3D SRAM was obtained. The measured retention time under holding conditions in this 180 nm process is greater than 10 ms. The test chip measures an access time of 50 ns and operates at 10 MHz.

  10. Nanometric Integrated Temperature and Thermal Sensors in CMOS-SOI Technology. (United States)

    Malits, Maria; Nemirovsky, Yael


    This paper reviews and compares the thermal and noise characterization of CMOS (complementary metal-oxide-semiconductor) SOI (Silicon on insulator) transistors and lateral diodes used as temperature and thermal sensors. DC analysis of the measured sensors and the experimental results in a broad (300 K up to 550 K) temperature range are presented. It is shown that both sensors require small chip area, have low power consumption, and exhibit linearity and high sensitivity over the entire temperature range. However, the diode's sensitivity to temperature variations in CMOS-SOI technology is highly dependent on the diode's perimeter; hence, a careful calibration for each fabrication process is needed. In contrast, the short thermal time constant of the electrons in the transistor's channel enables measuring the instantaneous heating of the channel and to determine the local true temperature of the transistor. This allows accurate "on-line" temperature sensing while no additional calibration is needed. In addition, the noise measurements indicate that the diode's small area and perimeter causes a high 1/f noise in all measured bias currents. This is a severe drawback for the sensor accuracy when using the sensor as a thermal sensor; hence, CMOS-SOI transistors are a better choice for temperature sensing.

  11. A Temperature Sensor using a Silicon-on-Insulator (SOI) Timer for Very Wide Temperature Measurement (United States)

    Patterson, Richard L.; Hammoud, Ahmad; Elbuluk, Malik; Culley, Dennis E.


    A temperature sensor based on a commercial-off-the-shelf (COTS) Silicon-on-Insulator (SOI) Timer was designed for extreme temperature applications. The sensor can operate under a wide temperature range from hot jet engine compartments to cryogenic space exploration missions. For example, in Jet Engine Distributed Control Architecture, the sensor must be able to operate at temperatures exceeding 150 C. For space missions, extremely low cryogenic temperatures need to be measured. The output of the sensor, which consisted of a stream of digitized pulses whose period was proportional to the sensed temperature, can be interfaced with a controller or a computer. The data acquisition system would then give a direct readout of the temperature through the use of a look-up table, a built-in algorithm, or a mathematical model. Because of the wide range of temperature measurement and because the sensor is made of carefully selected COTS parts, this work is directly applicable to the NASA Fundamental Aeronautics/Subsonic Fixed Wing Program--Jet Engine Distributed Engine Control Task and to the NASA Electronic Parts and Packaging (NEPP) Program. In the past, a temperature sensor was designed and built using an SOI operational amplifier, and a report was issued. This work used an SOI 555 timer as its core and is completely new work.

  12. Features of SOI substrates heating in MBE growth process obtained by low-coherence tandem interferometry (United States)

    Volkov, P. V.; Goryunov, A.. V.; Lobanov, D. N.; Luk'yanov, A. Yu.; Novikov, A. V.; Tertyshnik, A. D.; Shaleev, M. V.; Yurasov, D. V.


    Differences in heating of silicon and silicon-on-insulator (SOI) substrates in molecular beam epitaxy were revealed by low-coherence tandem interferometry. Using this technique the interference effects which impede the correct evaluation of SOI substrate temperature by infrared pyrometers can be eliminated and so the reliable temperature readout can be achieved. It was shown that at the same thermocouple and heater power settings the real temperature of SOI substrates is higher than of silicon ones and the difference may be as high as 40-50 °C at temperatures close to 600 °C. It is supposed that such effect is caused by the additional absorption of heater radiation by the buried oxide layer in the mid-infrared range. Independent proof of this effect was obtained by growing on both types of substrates a series of structures with self-assembled Ge nanoislands whose parameters are known to be very temperature sensitive. The proposed low-coherence interferometry technique provides precise real-time control of the growth temperature and so allows formation of SiGe nanostructures with desired parameters.

  13. Silicon-On-Insulator (SOI) Devices and Mixed-Signal Circuits for Extreme Temperature Applications (United States)

    Patterson, Richard; Hammoud, Ahmad; Elbuluk, Malik


    Electronic systems in planetary exploration missions and in aerospace applications are expected to encounter extreme temperatures and wide thermal swings in their operational environments. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of the missions. Electronic parts based on silicon-on-insulator (SOI) technology are known, based on device structure, to provide faster switching, consume less power, and offer better radiation-tolerance compared to their silicon counterparts. They also exhibit reduced current leakage and are often tailored for high temperature operation. However, little is known about their performance at low temperature. The performance of several SOI devices and mixed-signal circuits was determined under extreme temperatures, cold-restart, and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these devices for use in space exploration missions under extreme temperatures. The experimental results obtained on selected SOI devices are presented and discussed in this paper.

  14. Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate (United States)

    Zheng, Xinyu (Inventor); Pain, Bedabrata (Inventor)


    Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

  15. Heterogeneously integrated long-wavelength VCSEL using silicon high contrast grating on an SOI substrate. (United States)

    Ferrara, James; Yang, Weijian; Zhu, Li; Qiao, Pengfei; Chang-Hasnain, Connie J


    We report an electrically pumped hybrid cavity AlGaInAs-silicon long-wavelength VCSEL using a high contrast grating (HCG) reflector on a silicon-on-insulator (SOI) substrate. The VCSEL operates at silicon transparent wavelengths ~1.57 μm with >1 mW CW power outcoupled from the semiconductor DBR, and single-mode operation up to 65 °C. The thermal resistance of our device is measured to be 1.46 K/mW. We demonstrate >2.5 GHz 3-dB direct modulation bandwidth, and show error-free transmission over 2.5 km single mode fiber under 5 Gb/s direct modulation. We show a theoretical design of SOI-HCG serving both as a VCSEL reflector as well as waveguide coupler for an in-plane SOI waveguide, facilitating integration of VCSEL with in-plane silicon photonic circuits. The novel HCG-VCSEL design, which employs scalable flip-chip eutectic bonding, may enable low cost light sources for integrated optical links.

  16. 25-Gb/s Transmission Over 2.5-km SSMF by Silicon MRR Enhanced 1.55-mu m III-V/SOI DML

    DEFF Research Database (Denmark)

    Cristofori, Valentina; Da Ros, Francesco; Ozolins, Oskars


    -GHz 1.55-mu m directly modulated hybrid III-V/SOI DFB laser realized by bonding III-V materials (InGaAlAs) on a silicon-on-insulator (SOI) wafer and a silicon MRR also fabricated on SOI. Such a transmitter enables error-free transmission (BER ... mode fiber without dispersion compensation nor forward error correction. As both laser and MRR are fabricated on the SOI platform, they could be combined into a single device with enhanced performance, thus providing a cost-effective transmitter for short reach applications....

  17. Performance Analysis of Si3N4 Capping Layer and SOI Technology in Sub 90 nm PMOS Device (United States)

    Rahim, Noor Ashikin Binti Abdul; Abdullah, Mohd. Hanapiah B.; Rusop, Mohamad


    This technical paper investigates the electrical analysis in sub 90 nm of PMOS. The investigation was carried out by using two different methods which is PMOS with strained silicon and Silicon-on-Insulator (SOI) technology. Strained silicon engineering has become a key innovation to enhance device on current. Recently, SOI technology has been widely accepted for use in mainstream high performance logic applications due to some advantageous offered over the bulk silicon. The performance of the devices is analyzed by focusing on the electrical characteristics of Id-Vd and Id-Vg curves for three different structures. Firstly, PMOS with strained silicon of Si3N4 capping layer covering the gate area and secondly the device with and without SOI technology. The fabrication process simulation was simulated by using SILVACO TCAD ATHENA simulator and the electrical characteristic was simulated by SILVACO TCAD ATLAS simulator to obtain Id-Vd and Id-Vg curves. A fruitful and knowledgeable results were reported from this paper, it could be seen that high tensile strain introduced to the device causing the drain current to decreased from Id(bulk) = -400 uA/um of bulk to Id(Strain) = -310 uA/um which is about 25% of decrement. Since the drain current decreased, the carrier mobility and the performance also decreased proportional to drain current. However when SOI technology is applied to the PMOS device, the drain current was increased up to Id(SOI) = -431 uA/um over the bulk, the increment of about 9.25% reported. A higher Id-Vg curve and lower threshold of about pVth(SOI) = -0.2178 V also reported from this paper which tells that the device with SOI technology exhibits low power consumption device and fast switching which in turns contribute to a faster performance.

  18. High-Q AlAs/GaAs adiabatic micropillar cavities with submicron diameters for cQED experiments

    DEFF Research Database (Denmark)

    Lermer, M.; Gregersen, Niels; Dunzer, F.

    stringent requirements to the design and the processing of the micropillars which show a drastic decrease of the Q factor in the low diameter limit due to sidewall scattering losses and mode mismatch. Indeed, these effects limit the Q factor to ~2,000 in the submicron diameter range for a standard...... microcavity design [1, 2]. To overcome the trade-off between high Q and low Vmode, we designed and implemented a novel adiabatic AlAs/GaAs cavity design (MC1) with 3 taper segments (Fig. 1 (a)) as it was suggested by Zhang et al. for SiO2/TiO2 micropillar cavities [3]. Comparative measurements of the Q factor...... were performed between a standard one-λ microcavity structure (MC2) and MC1 for pillars with diameters ranging from 0.70 μm to 1.50 μm (Fig. 1 (b; bottom)). As can be seen in Fig. 1(b) MC1 shows significantly higher Q-factors exceeding 10.000 in the submicron diameter range due to the adiabatic cavity...

  19. Measurement of the neutral current reaction at high Q{sup 2} in the H1 experiment at HERA II

    Energy Technology Data Exchange (ETDEWEB)

    Shushkevich, Stanislav


    This thesis presents inclusive e{sup {+-}}p double and single differential cross section measurements for neutral current deep inelastic scattering of longitudinally polarized leptons on protons as a function of the negative four-momentum transfer squared Q{sup 2} and the Bjorken variable x. The data were collected in the years 2003-2007 in the H1 experiment at HERA with positively and negatively longitudinally polarized lepton beams of 27 GeV and a proton beam of 920 GeV corresponding to the centre-of-mass energy of {radical}(s)=319 GeV. The integrated luminosity is about 330 pb{sup -1}. An overview of the phenomenology of the deep inelastic scattering is given and the experimental apparatus is described. The NC cross section measurement procedure is presented and discussed in details. The measured cross sections are used to investigate electroweak effects at high Q{sup 2}. The proton structure function xF{sub 3}, sensitive to the valence quarks in the proton, is measured. The polarization effects sensitive to the chiral structure of neutral currents are investigated. The Standard Model predictions are found to be in a good agreement with the measurement.

  20. Measurement of high-Q{sup 2} neutral current cross-sections with longitudinally polarised positrons with the ZEUS detector

    Energy Technology Data Exchange (ETDEWEB)

    Stewart, Trevor P.


    The cross sections for neutral current (NC) deep inelastic scattering (DIS) in e{sup +}p collisions with a longitudinally polarised positron beam are measured at high momentum transfer squared (Q{sup 2}>185 GeV{sup 2}) at the ZEUS detector at HERA. The HERA accelerator provides e{sup {+-}}p collisions at a centre-of-mass energy of 318 GeV, which allows the weak contribution to the NC process to be studied at high Q{sup 2}. The measurements are based on a data sample with an integrated luminosity of 135.5 pb{sup -1} collected with the ZEUS detector in 2006 and 2007. The single differential NC cross sections d{sigma}/dQ{sup 2}, d{sigma}/dx and d{sigma}/dy and the reduced cross section {sigma} are measured. The structure function xF{sub 3} is determined by combining the e{sup +}p NC reduced cross sections with the previously measured e{sup -}p measurements. The interference structure function xF{sub 3}{sup {gamma}Z} is extracted at Q{sup 2}=1500 GeV{sup 2}. The cross-section asymmetry between the positive and negative polarisation of the positron beam is measured and the parity violation effects of the electroweak interaction are observed. The predictions of the Standard Model of particle physics agree well with the measurements. (orig.)

  1. Microlasers based on high-Q rare-earth-doped aluminum oxide resonators on silicon (Conference Presentation) (United States)

    Bradley, Jonathan D. B.; Su, Zhan; Frankis, Henry C.; Magden, Emir Salih; Li, Nanxi; Byrd, Matthew; Purnawirman, Purnawirman; Shah Hosseini, Ehsan; Adam, Thomas N.; Leake, Gerald; Coolbaugh, Douglas; Watts, Michael R.


    One of the key challenges in the field of silicon photonics remains the development of compact integrated light sources. In one approach, rare-earth-doped glass microtoroid and microdisk lasers have been integrated on silicon and exhibit ultra-low thresholds. However, such resonator structures are isolated on the chip surface and require an external fiber to couple light to and from the cavity. Here, we review our recent work on monolithically integrated rare-earth-doped aluminum oxide microcavity lasers on silicon. The microlasers are enabled by a novel high-Q cavity design, which includes a co-integrated silicon nitride bus waveguide and a silicon dioxide trench filled with rare-earth-doped aluminum oxide. In passive (undoped) microresonators we measure internal quality factors as high as 3.8 × 105 at 0.98 µm and 5.7 × 105 at 1.5 µm. In ytterbium, erbium, and thulium-doped microcavities with diameters ranging from 80 to 200 µm we show lasing at 1.0, 1.5 and 1.9 µm, respectively. We observe sub-milliwatt lasing thresholds, approximately 10 times lower than previously demonstrated in monolithic rare-earth-doped lasers on silicon. The entire fabrication process, which includes post-processing deposition of the gain medium, is silicon-compatible and allows for integration with other silicon-based photonic devices. Applications of such rare earth microlasers in communications and sensing and recent design enhancements will be discussed.

  2. Electro-optic modulation of high-Q lithium niobate whispering gallery resonator with integrated ground plane (Conference Presentation) (United States)

    Douglas, Kenneth; Moore, Jeremy; Friedman, Thomas; Eichenfield, Matthew


    We experimentally demonstrate electro-optic modulation in thin film lithium niobate microdisk resonators with an integrated bottom electrode fabricated from a z-cut Lithium Niobate on Insulator wafer. The structure consisted of a 400nm thick crystalline z-cut lithium niobate/2um SiO2/20nm Cr/100nm Au/10nm Cr film stack on top of a z-cut lithium niobate handle wafer. The integrated bottom electrode is located 2um beneath the resonator. This proximity, coupled with positioning an electrical probe close to the top of the resonator, allows large optical frequency shifts with low voltages. We observed a 0.111pm/V resonance shift of vertically polarized (TM) optical whispering gallery modes, with the voltage applied perpendicular to the wafer surface. This corresponds to a shift of one optical linewidth at an applied voltage of 180V, using the r33 component of the eletro-optic tensor. We observed a smaller shift of 0.066pm/V for the radially polarized (TE) modes, using the r13 component of the electro-optic tensor. The experiment was performed using a 1550nm tunable laser that was coupled to the optical resonator modes using a tapered optical fiber. To measure the electro-optic shift of the resonance, a voltage was applied across the device via DC probe tips and the peak shift was calibrated with a Toptica WS6 IR wavemeter with 200 MHz absolute accuracy. We also present a finite element model that accurately predicts the resonance shift as a function of applied voltage for both polarizations.

  3. Technological Aspects: High Voltage

    CERN Document Server

    Faircloth, D.C.


    This paper covers the theory and technological aspects of high-voltage design for ion sources. Electric field strengths are critical to understanding high-voltage breakdown. The equations governing electric fields and the techniques to solve them are discussed. The fundamental physics of high-voltage breakdown and electrical discharges are outlined. Different types of electrical discharges are catalogued and their behaviour in environments ranging from air to vacuum are detailed. The importance of surfaces is discussed. The principles of designing electrodes and insulators are introduced. The use of high-voltage platforms and their relation to system design are discussed. The use of commercially available high-voltage technology such as connectors, feedthroughs and cables are considered. Different power supply technologies and their procurement are briefly outlined. High-voltage safety, electric shocks and system design rules are covered.

  4. High voltage test techniques

    CERN Document Server

    Kind, Dieter


    The second edition of High Voltage Test Techniques has been completely revised. The present revision takes into account the latest international developments in High Voltage and Measurement technology, making it an essential reference for engineers in the testing field.High Voltage Technology belongs to the traditional area of Electrical Engineering. However, this is not to say that the area has stood still. New insulating materials, computing methods and voltage levels repeatedly pose new problems or open up methods of solution; electromagnetic compatibility (EMC) or components and systems al

  5. High voltage engineering

    CERN Document Server

    Rizk, Farouk AM


    Inspired by a new revival of worldwide interest in extra-high-voltage (EHV) and ultra-high-voltage (UHV) transmission, High Voltage Engineering merges the latest research with the extensive experience of the best in the field to deliver a comprehensive treatment of electrical insulation systems for the next generation of utility engineers and electric power professionals. The book offers extensive coverage of the physical basis of high-voltage engineering, from insulation stress and strength to lightning attachment and protection and beyond. Presenting information critical to the design, selec

  6. Stray voltage mitigation

    Energy Technology Data Exchange (ETDEWEB)

    Jamali, B.; Piercy, R.; Dick, P. [Kinetrics Inc., Toronto, ON (Canada). Transmission and Distribution Technologies


    This report discussed issues related to farm stray voltage and evaluated mitigation strategies and costs for limiting voltage to farms. A 3-phase, 3-wire system with no neutral ground was used throughout North America before the 1930s. Transformers were connected phase to phase without any electrical connection between the primary and secondary sides of the transformers. Distribution voltage levels were then increased and multi-grounded neutral wires were added. The earth now forms a parallel return path for the neutral current that allows part of the neutral current to flow continuously through the earth. The arrangement is responsible for causing stray voltage. Stray voltage causes uneven milk production, increased incidences of mastitis, and can create a reluctance to drink water amongst cows when stray voltages are present. Off-farm sources of stray voltage include phase unbalances, undersized neutral wire, and high resistance splices on the neutral wire. Mitigation strategies for reducing stray voltage include phase balancing; conversion from single to 3-phase; increasing distribution voltage levels, and changing pole configurations. 22 refs., 5 tabs., 13 figs.

  7. Formation of ultra-shallow p{sup +}/n junctions in silicon-on-insulator (SOI) substrate using laser annealing

    Energy Technology Data Exchange (ETDEWEB)

    Ong, K.K. [School of Electrical and Electronic Engineering, Nanyang Technological University, Nanyang Avenue, Singapore 639798 (Singapore)]. E-mail:; Pey, K.L. [School of Electrical and Electronic Engineering, Nanyang Technological University, Nanyang Avenue, Singapore 639798 (Singapore); Lee, P.S. [School of Materials Engineering, Nanyang Technological University, Nanyang Avenue, Singapore 639798 (Singapore); Wee, A.T.S. [Department of Physics, National University of Singapore, 2 Science Drive 3, Singapore 117542 (Singapore); Chong, Y.F. [Chartered Semiconductor Manufacturing Ltd., 60 Woodlands Industrial Park D, Street 2, Singapore 738406 (Singapore); Yeo, K.L. [Chartered Semiconductor Manufacturing Ltd., 60 Woodlands Industrial Park D, Street 2, Singapore 738406 (Singapore); Wang, X.C. [Singapore Institute of Manufacturing Technology, 71 Nanyang Drive, Singapore 638075 (Singapore)


    Laser annealing (LA), in which the laser melts the surface layer of silicon and causes the dopants to be distributed uniformly within the melted region, produces abrupt, highly activated and ultrashallow junctions. The degree of melting is determined by the extent of laser absorption and rate of heat dissipation, which are dependent on the substrate properties. When applying LA on substrates such as silicon-on-insulator (SOI), the heating and cooling characteristics are expected to be different from that of a typical Si substrate. This work compares the redistribution of boron atoms in silicon (1 0 0) and SOI substrates after laser annealing. SIMS analysis shows that laser induced melting is significantly deeper for the SOI than the silicon substrates using the same laser fluence. The enhancement of melting is attributed to the heat insulating effect of the buried oxide (BOX) layer. With multiple-pulse LA, the junction depth in the SOI substrate increases with subsequent laser pulses, a feature that is absent in silicon substrate. In the SOI substrate, the sheet resistance remains relatively constant regardless of deeper junction formed with multiple pulse conditions, implying the maximum dopant activation at a given laser fluence is reached. Boron profiles annealed in the non-melt regime with 20 laser pulses or less overlap with the as-implanted profiles, suggesting that no melting has occurred. However, significant melting is observed at 50-pulse annealing. The corresponding sheet resistance shows a sharp decrease with the initial pulses and consequently decreases slightly with increasing pulses.

  8. Opacity-driven volume clipping for slice of interest (SOI) visualisation of multi-modality PET-CT volumes. (United States)

    Jung, Younhyun; Kim, Jinman; Fulham, Michael; Feng, David Dagan


    Multi-modality positron emission tomography and computed tomography (PET-CT) imaging depicts biological and physiological functions (from PET) within a higher resolution anatomical reference frame (from CT). The need to efficiently assimilate the information from these co-aligned volumes simultaneously has resulted in 3D visualisation methods that depict e.g., slice of interest (SOI) from PET combined with direct volume rendering (DVR) of CT. However because DVR renders the whole volume, regions of interests (ROIs) such as tumours that are embedded within the volume may be occluded from view. Volume clipping is typically used to remove occluding structures by `cutting away' parts of the volume; this involves tedious trail-and-error tweaking of the clipping attempts until a satisfied visualisation is made, thus restricting its application. Hence, we propose a new automated opacity-driven volume clipping method for PET-CT using DVR-SOI visualisation. Our method dynamically calculates the volume clipping depth by considering the opacity information of the CT voxels in front of the PET SOI, thereby ensuring that only the relevant anatomical information from the CT is visualised while not impairing the visibility of the PET SOI. We outline the improvements of our method when compared to conventional 2D and traditional DVR-SOI visualisations.

  9. High-Q Wafer Level Package Based on Modified Tri-Layer Anodic Bonding and High Performance Getter and Its Evaluation for Micro Resonant Pressure Sensor

    National Research Council Canada - National Science Library

    Liying Wang; Xiaohui Du; Lingyun Wang; Zhanhao Xu; Chenying Zhang; Dandan Gu


    In order to achieve and maintain a high quality factor (high-Q) for the micro resonant pressure sensor, this paper presents a new wafer level package by adopting cross-layer anodic bonding technique of the glass/silicon/silica (GSS...

  10. The effect of the user's body on high-Q and low-Q planar inverted F antennas for LTE frequencies

    DEFF Research Database (Denmark)

    Barrio, Samantha Caporal Del; Pelosi, Mauro; Franek, Ondrej


    The influence of the user's body degrades small antenna performances. This paper investigates the detuning and the losses on high-Q planar antennas for small devices due to user proximity. The results at low frequencies for the Long Term Evolution (LTE) standard are compared to the results...

  11. Microfluidic High-Q Circular Substrate-Integrated Waveguide (SIW) Cavity for Radio Frequency (RF) Chemical Liquid Sensing. (United States)

    Memon, Muhammad Usman; Lim, Sungjoon


    In this study, a high-Q circular substrate-integrated waveguide (SIW) cavity resonator is proposed as a non-contact and non-invasive radio frequency (RF) sensor for chemical sensing applications. The design of the structure utilizes SIW technology along with a circular shape to achieve a high unloaded Q factor, which is one of the important requirements for RF sensors. The resonant frequency of the proposed circular SIW cavity sensor changes when a liquid material or a chemical (microliters) is inserted in the sensitive area of the structure. The sensing of liquid materials with different permittivities is accomplished via the perturbation of the electric fields in the SIW configuration. When a microwell that is 4 mm in radius is installed vertically through the center of the bare circular SIW cavity, the operating frequency varies from 5.26 to 5.34 GHz. Similarly, when the microwell contains ethanol, the frequency shifts from 5.26 to 5.18 GHz, and the amplitude of reflection coefficient is shifted from -29 dB to -17 dB; when the microwell contains mixing deionized (DI)-water, the frequency moves from 5.26 to 4.98 GHz (which is also 0% Ethanol in our study), and the amplitude of reflection coefficient is shifted from -29 dB to -8 dB. A high unloaded Q factor is maintained throughout all experimental results. To demonstrate our idea, different concentrations of ethanol are tested and recorded. The experimental validation yields a close agreement between the simulations and the measurements.

  12. An SOI CMOS-Based Multi-Sensor MEMS Chip for Fluidic Applications. (United States)

    Mansoor, Mohtashim; Haneef, Ibraheem; Akhtar, Suhail; Rafiq, Muhammad Aftab; De Luca, Andrea; Ali, Syed Zeeshan; Udrea, Florin


    An SOI CMOS multi-sensor MEMS chip, which can simultaneously measure temperature, pressure and flow rate, has been reported. The multi-sensor chip has been designed keeping in view the requirements of researchers interested in experimental fluid dynamics. The chip contains ten thermodiodes (temperature sensors), a piezoresistive-type pressure sensor and nine hot film-based flow rate sensors fabricated within the oxide layer of the SOI wafers. The silicon dioxide layers with embedded sensors are relieved from the substrate as membranes with the help of a single DRIE step after chip fabrication from a commercial CMOS foundry. Very dense sensor packing per unit area of the chip has been enabled by using technologies/processes like SOI, CMOS and DRIE. Independent apparatuses were used for the characterization of each sensor. With a drive current of 10 µA-0.1 µA, the thermodiodes exhibited sensitivities of 1.41 mV/°C-1.79 mV/°C in the range 20-300 °C. The sensitivity of the pressure sensor was 0.0686 mV/(Vexcit kPa) with a non-linearity of 0.25% between 0 and 69 kPa above ambient pressure. Packaged in a micro-channel, the flow rate sensor has a linearized sensitivity of 17.3 mV/(L/min)(-0.1) in the tested range of 0-4.7 L/min. The multi-sensor chip can be used for simultaneous measurement of fluid pressure, temperature and flow rate in fluidic experiments and aerospace/automotive/biomedical/process industries.

  13. Voltage verification unit (United States)

    Martin, Edward J [Virginia Beach, VA


    A voltage verification unit and method for determining the absence of potentially dangerous potentials within a power supply enclosure without Mode 2 work is disclosed. With this device and method, a qualified worker, following a relatively simple protocol that involves a function test (hot, cold, hot) of the voltage verification unit before Lock Out/Tag Out and, and once the Lock Out/Tag Out is completed, testing or "trying" by simply reading a display on the voltage verification unit can be accomplished without exposure of the operator to the interior of the voltage supply enclosure. According to a preferred embodiment, the voltage verification unit includes test leads to allow diagnostics with other meters, without the necessity of accessing potentially dangerous bus bars or the like.

  14. Comparison of SOI Microdosimeter and Tissue Equivalent Proportional Counter Measurements at the CERF Facility (United States)

    Prokopovich, Dale A.; Reinhard, Mark I.; Taylor, Graeme C.; Hands, Alex; Rosenfeld, Anatoly B.


    The CERN-EU High Energy Reference Field (CERF) facility is used in the calibration of neutron dosimeters for radiation protection applications in aviation and high energy physics. A comparison of the facility's microdosimetric spectra obtained with a new Silicon on Insulator (SOI) Microdosimeter and a HAWK Tissue Equivalent Proportional Counter (TEPC) is presented. Experimental data obtained with both devices indicates the presence of a small charged particle flux within the neutron dominated field which makes a non negligible contribution to the dose equivalent.

  15. A New Nonlinear Model of Body Resistance in Nanometer PD SOI MOSFETs

    Directory of Open Access Journals (Sweden)

    Arash Daghighi


    Full Text Available In this paper, a nonlinear model for the body resistance of a 45nm PD SOI MOSFET is developed. This model verified on the base of the small signal three-dimensional simulation results. In this paper by using the three-dimensional simulation of ISE-TCAD software, the indicating factors of body resistance in nanometer transistors and then are shown, using the surface potential model. A mathematical relation to calculat the body resistance incorporating device width and body potential was derived. Excellent agreement was obtained by comparing the model outputs and three-dimensional simulation results.

  16. FAMOSE Jean-Pierre & BERTSCH Jean. L’estime de soi : une controverse éducative


    Nurra, Cécile


    L’ouvrage porte sur l’estime de soi, sujet très prisé dans la sphère sociale en général et dans le monde éducatif en particulier. Plus précisément, il pose la question de l’augmentation de l’estime de soi en tant qu’objectif éducatif prioritaire, sujet controversé dans le monde scientifique. En effet l’augmentation de l’estime de soi est souvent mise en avant comme un objectif à atteindre lorsqu’il s’agit de bien-être ou encore de la réussite scolaire, mais ce point de vue est contesté par di...

  17. Development of a pixel sensor with fine space-time resolution based on SOI technology for the ILC vertex detector (United States)

    Ono, Shun; Togawa, Manabu; Tsuji, Ryoji; Mori, Teppei; Yamada, Miho; Arai, Yasuo; Tsuboyama, Toru; Hanagaki, Kazunori


    We have been developing a new monolithic pixel sensor with silicon-on-insulator (SOI) technology for the International Linear Collider (ILC) vertex detector system. The SOI monolithic pixel detector is realized using standard CMOS circuits fabricated on a fully depleted sensor layer. The new SOI sensor SOFIST can store both the position and timing information of charged particles in each 20×20 μm2 pixel. The position resolution is further improved by the position weighted with the charges spread to multiple pixels. The pixel also records the hit timing with an embedded time-stamp circuit. The sensor chip has column-parallel analog-to-digital conversion (ADC) circuits and zero-suppression logic for high-speed data readout. We are designing and evaluating some prototype sensor chips for optimizing and minimizing the pixel circuit.

  18. MOVPE growth of GaN on 6-inch SOI-substrates: effect of substrate parameters on layer quality and strain (United States)

    Lemettinen, J.; Kauppinen, C.; Rudzinski, M.; Haapalinna, A.; Tuomi, T. O.; Suihkonen, S.


    We demonstrate that higher crystalline quality, lower strain and improved electrical characteristics can be achieved in gallium nitride (GaN) epitaxy by using a silicon-on-insulator (SOI) substrate compared to a bulk silicon (Si) substrate. GaN layers were grown by metal-organic vapor phase epitaxy on 6-inch bulk Si and SOI wafers using the standard step graded AlGaN and AlN approach. The GaN layers grown on SOI exhibited lower strain according to x-ray diffraction analysis. Defect selective etching measurements suggested that the use of SOI substrate for GaN epitaxy reduces the dislocation density approximately by a factor of two. Furthermore, growth on SOI substrate allows one to use a significantly thinner AlGaN buffer compared to bulk Si. Synchrotron radiation x-ray topography analysis confirmed that the stress relief mechanism in GaN on SOI epitaxy is the formation of a dislocation network to the SOI device Si layer. In addition, the buried oxide layer significantly improves the vertical leakage characteristics as the onset of the breakdown is delayed by approximately 400 V. These results show that the GaN on the SOI platform is promising for power electronics applications.

  19. The Hungarian Version of Sociosexual Orientation Inventory Revised (SOI-R: Sex and Age Differences

    Directory of Open Access Journals (Sweden)

    Norbert Meskó


    Full Text Available Affectionless, uncommitted sexual behavior was formerly interpreted in psychology as a function of individual decisions, a kind of intrapsychic variable. Sociosexual orientation is directly linked to reproductive success, so among other issues, measuring sociosexual orientation has been of great interest for evolutionary scientists. Most recently Penke and Asendorpf (2008 prepared the revised version of Sociosexual Orientation Inventory (SOI-R, which has been used in dozens of studies since its publication. The aim of the current study was to test the usability of the Hungarian version and to analyze the factor structure and internal reliability of the inventory. It was translated and the structure was analyzed on a Hungarian sample (n = 1345, females = 832, males = 513; age: M = 26.37 years, SD = 8.75, range: 16-74. Our results show that the Hungarian version has the same three-factor structure as proposed by Penke and Asendorpf (2008 and is a reliable inventory for further studies of sociosexuality. The sociosexual scores of the two sexes statistically differ in the expected direction: women show lower SOI scores than men. Sociosexual desire decreases with age, whereas older participants report less restricted sociosexual behavior. Sociosexual attitude is uneffected by age. Results are discussed from both evolutionary and life-span developmental points of view.

  20. A 320-year AMM+SOI Index Reconstruction from Historical Atlantic Tropical Cyclone Records (United States)

    Chenoweth, M.; Divine, D.


    Trends in the frequency of North Atlantic tropical cyclones, including major hurricanes, are dominated by those originating in the deep tropics. In addition, these tropical cyclones are stronger when making landfall and their total power dissipation is higher than storms forming elsewhere in the Atlantic basin. Both the Atlantic Meridional Mode (AMM) and El Nino-Southern Oscillation (ENSO) are the leading modes of coupled air-sea interaction in the Atlantic and Pacific, respectively, and have well-established relationships with Atlantic hurricane variability. Here we use a 320-year record of tropical cyclone activity in the Lesser Antilles region of the North Atlantic from historical manuscript and newspaper records to reconstruct a normalized seasonal (July-October) index combining the Southern Oscillation Index (SOI) and AMM employing both the modern analog technique and back-propagation artificial neural networks. Our results indicate that the AMM+SOI index since 1690 shows no long-term trend but is dominated by both short-term (<10 years) and long-term (quasi-decadal to bi-decadal) variations. The decadal-scale variation is consistent with both instrumental and proxy records elsewhere from the global tropics. Distinct periods of high and low index values, corresponding to high and low tropical cyclone frequency, are regularly-appearing features in the record and provides further evidence that natural decadal -scale variability in Atlantic tropical cyclone frequency must be accounted for when determining trends in records and attribution of climate change.

  1. A demonstrator analog signal processing circuit in a radiation hard SOI-CMOS technology

    CERN Document Server

    Anghinolfi, Francis; Campbell, M; Heijne, Erik H M; Jarron, Pierre; Meddeler, G; CERN. Geneva. Detector Research and Development Committee


    It is proposed to develop a demonstrator integrated circuit for particle detector analog signal processing using the advanced 1.2 micron HSOI3-HD Silicon-on-Insulator (SOI) CMOS radiation hard technology of Thomson-TMS, which has recently become accessible for selected civilian applications. The characteristics announced for this process promise survivability after a total dose in excess of 10 Mrad (SiO2) and 10**14 to 10**15 n/cm2, which is probably satisfactory for applications in LHC detector systems. The properties of such a SOI process look promising, in particular regarding speed. In view of the special analog requirements in the particle physics environment,one should verify the analog characteristics before and after irradiation by producing a demonstrator signal processing circuit which incorporates the most vital functional blocks. This demonstrator would consist of a low noise front-end amplifier, a comparator and an analog pipeline element with associated logic, following the scheme of the Hierarc...

  2. Development of an X-ray imaging system with SOI pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Nishimura, Ryutaro, E-mail: [School of High Energy Accelerator Science, SOKENDAI (The Graduate University for Advanced Studies), Oho 1-1, Tsukuba, Ibaraki 305-0801 (Japan); Arai, Yasuo; Miyoshi, Toshinobu [Institute of Particle and Nuclear Studies, High Energy Accelerator Research Organization (KEK-IPNS), Oho 1-1, Tsukuba, Ibaraki 305-0801 (Japan); Hirano, Keiichi; Kishimoto, Shunji; Hashimoto, Ryo [Institute of Materials Structure Science, High Energy Accelerator Research Organization (KEK-IMSS), Oho 1-1, Tsukuba, Ibaraki 305-0801 (Japan)


    An X-ray imaging system employing pixel sensors in silicon-on-insulator technology is currently under development. The system consists of an SOI pixel detector (INTPIX4) and a DAQ system based on a multi-purpose readout board (SEABAS2). To correct a bottleneck in the total throughput of the DAQ of the first prototype, parallel processing of the data taking and storing processes and a FIFO buffer were implemented for the new DAQ release. Due to these upgrades, the DAQ throughput was improved from 6 Hz (41 Mbps) to 90 Hz (613 Mbps). The first X-ray imaging system with the new DAQ software release was tested using 33.3 keV and 9.5 keV mono X-rays for three-dimensional computerized tomography. The results of these tests are presented. - Highlights: • The X-ray imaging system employing the SOI pixel sensor is currently under development. • The DAQ of the first prototype has the bottleneck in the total throughput. • The new DAQ release solve the bottleneck by parallel processing and FIFO buffer. • The new DAQ release was tested using 33.3 keV and 9.5 keV mono X-rays.

  3. Imaging voltage in neurons (United States)

    Peterka, Darcy S.; Takahashi, Hiroto; Yuste, Rafael


    In the last decades, imaging membrane potential has become a fruitful approach to study neural circuits, especially in invertebrate preparations with large, resilient neurons. At the same time, particularly in mammalian preparations, voltage imaging methods suffer from poor signal to noise and secondary side effects, and they fall short of providing single-cell resolution when imaging of the activity of neuronal populations. As an introduction to these techniques, we briefly review different voltage imaging methods (including organic fluorophores, SHG chromophores, genetic indicators, hybrid, nanoparticles and intrinsic approaches), and illustrate some of their applications to neuronal biophysics and mammalian circuit analysis. We discuss their mechanisms of voltage sensitivity, from reorientation, electrochromic or electro-optical phenomena, to interaction among chromophores or membrane scattering, and highlight their advantages and shortcomings, commenting on the outlook for development of novel voltage imaging methods. PMID:21220095

  4. Calibration of Voltage Transformers and High- Voltage Capacitors at NIST (United States)

    Anderson, William E.


    The National Institute of Standards and Technology (NIST) calibration service for voltage transformers and high-voltage capacitors is described. The service for voltage transformers provides measurements of ratio correction factors and phase angles at primary voltages up to 170 kV and secondary voltages as low as 10 V at 60 Hz. Calibrations at frequencies from 50–400 Hz are available over a more limited voltage range. The service for high-voltage capacitors provides measurements of capacitance and dissipation factor at applied voltages ranging from 100 V to 170 kV at 60 Hz depending on the nominal capacitance. Calibrations over a reduced voltage range at other frequencies are also available. As in the case with voltage transformers, these voltage constraints are determined by the facilities at NIST. PMID:28053409

  5. High voltage engineering fundamentals

    CERN Document Server

    Kuffel, E; Hammond, P


    Provides a comprehensive treatment of high voltage engineering fundamentals at the introductory and intermediate levels. It covers: techniques used for generation and measurement of high direct, alternating and surge voltages for general application in industrial testing and selected special examples found in basic research; analytical and numerical calculation of electrostatic fields in simple practical insulation system; basic ionisation and decay processes in gases and breakdown mechanisms of gaseous, liquid and solid dielectrics; partial discharges and modern discharge detectors; and over

  6. Du désespoir: écriture de soi en souffrance dans l’œuvre de Danielle Collobert

    Directory of Open Access Journals (Sweden)

    Corinne Godmer


    Full Text Available Quel sens donner à l’écriture de soi en poésie? Figure du poète, représentation sociale, personne physique, et jeu narratif, le sujet de l’écriture se présente comme une entité complexe. L’œuvre poétique cependant se nourrit de ces différentes individualités, en quelque sorte, qui parviennent, entre union et tension, à produire une unité de sens. Quelle serait dès lors la place d’un auteur singulier dont l’œuvre s’envisage en souffrance? (... Écriture de soi ou écrire malgré soi, le poète compose ainsi avec sa psyché propre, il se dévoile de façon plus ou moins explicite mais imprègne l’œuvre de sa subjectivité. L’écriture de soi, finalement, consiste peut-être en ce qui reste de l’émotion lorsque forme et style ne déstabilisent plus notre lecture du poème.

  7. Performance of an SOI Boot-Strapped Full-Bridge MOSFET Driver, Type CHT-FBDR, under Extreme Temperatures (United States)

    Patterson, Richard; Hammoud, Ahmad


    Electronic systems designed for use in deep space and planetary exploration missions are expected to encounter extreme temperatures and wide thermal swings. Silicon-based devices are limited in their wide-temperature capability and usually require extra measures, such as cooling or heating mechanisms, to provide adequate ambient temperature for proper operation. Silicon-On-Insulator (SOI) technology, on the other hand, lately has been gaining wide spread use in applications where high temperatures are encountered. Due to their inherent design, SOI-based integrated circuit chips are able to operate at temperatures higher than those of the silicon devices by virtue of reducing leakage currents, eliminating parasitic junctions, and limiting internal heating. In addition, SOI devices provide faster switching, consume less power, and offer improved radiation-tolerance. Very little data, however, exist on the performance of such devices and circuits under cryogenic temperatures. In this work, the performance of an SOI bootstrapped, full-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

  8. Device for monitoring cell voltage (United States)

    Doepke, Matthias [Garbsen, DE; Eisermann, Henning [Edermissen, DE


    A device for monitoring a rechargeable battery having a number of electrically connected cells includes at least one current interruption switch for interrupting current flowing through at least one associated cell and a plurality of monitoring units for detecting cell voltage. Each monitoring unit is associated with a single cell and includes a reference voltage unit for producing a defined reference threshold voltage and a voltage comparison unit for comparing the reference threshold voltage with a partial cell voltage of the associated cell. The reference voltage unit is electrically supplied from the cell voltage of the associated cell. The voltage comparison unit is coupled to the at least one current interruption switch for interrupting the current of at least the current flowing through the associated cell, with a defined minimum difference between the reference threshold voltage and the partial cell voltage.

  9. Arrays of SOI photonic wire biosensors for label-free molecular detection (United States)

    Densmore, Adam; Xu, Dan-Xia; Vachon, Martin; Janz, Siegfried; Ma, Rubin; Li, Yunhui; Lopinski, Gregory; Luebbert, Christian C.; Liu, Qing Y.; Schmid, Jens H.; Delâge, André; Cheben, Pavel


    We present an SOI biosensor microarray chip that allows multiple molecular binding reactions to be simultaneously monitored. The individual biosensors are formed using 0.26 × 0.45 μm2 silicon photonic wire waveguides, which are arranged in compact Mach-Zehnder interferometer geometries with near temperature independent response. The sharp bend radius permitted by the photonic wires is exploited to form dense spiral waveguide structures that provide several millimeters of path length in a compact 130 μm diameter circular area. This design provides the high sensitivity of a long waveguide, while maintaining compatibility with commercial microarray spotting tools. For low volume analyte delivery the sensor array chip contains a monolithically integrated microfluidic channel formed in an SU-8 overlayer. Multiple antibody-antigen reactions are observed in real-time by using an infrared camera to monitor the optical powers emerging from the sensor array output waveguides.

  10. Design of novel SOI 1 × 4 optical power splitter using seven horizontally slotted waveguides (United States)

    Katz, Oded; Malka, Dror


    In this paper, we demonstrate a compact silicon on insulator (SOI) 1 × 4 optical power splitter using seven horizontal slotted waveguides. Aluminum nitride (AIN) surrounded by silicon (Si) was used to confine the optical field in the slot region. All of the power analysis has been done in transverse magnetic (TM) polarization mode and a compact optical power splitter as short as 14.5 μm was demonstrated. The splitter was designed by using full vectorial beam propagation method (FV-BPM) simulations. Numerical investigations show that this device can work across the whole C-band (1530-1565 nm) with excess loss better than 0.23 dB.

  11. Optimizing SOI Slot Waveguide Fabrication Tolerances and Strip-Slot Coupling for Very Efficient Optical Sensing

    Directory of Open Access Journals (Sweden)

    Vittorio M. N. Passaro


    Full Text Available Slot waveguides are becoming more and more attractive optical components, especially for chemical and bio-chemical sensing. In this paper an accurate analysis of slot waveguide fabrication tolerances is carried out, in order to find optimum design criteria for either homogeneous or absorption sensing mechanisms, in cases of low and high aspect ratio slot waveguides. In particular, we have focused on Silicon On Insulator (SOI technology, representing the most popular technology for this kind of devices, simultaneously achieving high integration capabilities, small dimensions and low cost. An accurate analysis of single mode behavior for high aspect ratio slot waveguide has been also performed, in order to provide geometric limits for waveguide design purposes. Finally, the problem of coupling into a slot waveguide is addressed and a very compact and efficient slot coupler is proposed, whose geometry has been optimized to give a strip-slot-strip coupling efficiency close to 100%.

  12. Characterisation of a Thin Fully Depleted SOI Pixel Sensor with High Momentum Charged Particles

    CERN Document Server

    Battaglia, Marco; Contarato, Devis; Denes, Peter; Giubilato, Piero; Mattiazzo, Serena; Pantano, Devis


    This paper presents the results of the characterisation of a thin, fully depleted pixel sensor manufactured in SOI technology on high-resistivity substrate with high momentum charged particles. The sensor is thinned to 70 $\\mu$m and a thin phosphor layer contact is implanted on the back-plane. Its response is compared to that of thick sensors of same design in terms of signal and noise, detection efficiency and single point resolution based on data collected with 300 GeV pions at the CERN SPS. We observe that the charge collected and the signal-to-noise ratio scale according to the estimated thickness of the sensitive volume and the efficiency and single point resolution of the thinned chip are comparable to those measured for the thick sensors.

  13. Monolithic optical phased-array transceiver in a standard SOI CMOS process. (United States)

    Abediasl, Hooman; Hashemi, Hossein


    Monolithic microwave phased arrays are turning mainstream in automotive radars and high-speed wireless communications fulfilling Gordon Moores 1965 prophecy to this effect. Optical phased arrays enable imaging, lidar, display, sensing, and holography. Advancements in fabrication technology has led to monolithic nanophotonic phased arrays, albeit without independent phase and amplitude control ability, integration with electronic circuitry, or including receive and transmit functions. We report the first monolithic optical phased array transceiver with independent control of amplitude and phase for each element using electronic circuitry that is tightly integrated with the nanophotonic components on one substrate using a commercial foundry CMOS SOI process. The 8 × 8 phased array chip includes thermo-optical tunable phase shifters and attenuators, nano-photonic antennas, and dedicated control electronics realized using CMOS transistors. The complex chip includes over 300 distinct optical components and over 74,000 distinct electrical components achieving the highest level of integration for any electronic-photonic system.

  14. Corpo e sujeito em soi-même comme un autre : um estudo em Ricoeur


    Pereirinha, Carlos Alberto Duarte


    A questão filosófica da pessoa, no sentido de um fazer-se, um tornar-se pessoa, constituiu o nosso primeiro interesse. A sua análise obrigou-nos a relacionar identidade pessoal e corpo próprio, tomando esta última noção como central para a compreensão do que, em nós, há de humano e, ademais, pessoal. A dissertação tem, assim, como principal objetivo um estudo da presença do corpo, no âmbito da problemática de constituição da identidade pessoal, tal como Ricoeur no-la apresenta em Soi-même com...

  15. An accurate model for predicting high frequency noise of nanoscale NMOS SOI transistors (United States)

    Shen, Yanfei; Cui, Jie; Mohammadi, Saeed


    A nonlinear and scalable model suitable for predicting high frequency noise of N-type Metal Oxide Semiconductor (NMOS) transistors is presented. The model is developed for a commercial 45 nm CMOS SOI technology and its accuracy is validated through comparison with measured performance of a microwave low noise amplifier. The model employs the virtual source nonlinear core and adds parasitic elements to accurately simulate the RF behavior of multi-finger NMOS transistors up to 40 GHz. For the first time, the traditional long-channel thermal noise model is supplemented with an injection noise model to accurately represent the noise behavior of these short-channel transistors up to 26 GHz. The developed model is simple and easy to extract, yet very accurate.

  16. Mitigation of Voltage Sags in CIGRE Low Voltage Distribution Network

    DEFF Research Database (Denmark)

    Mustafa, Ghullam; Bak-Jensen, Birgitte; Mahat, Pukar


    problems in the distribution system. The voltage problems dealt with in this paper are to show how to mitigate voltage sags in the CIGRE Low Voltage (LV) test network and networks like this. The voltage sags, for the tested cases in the CIGRE LV test network are mainly due to three phase faults....... The compensation of voltage sags in the different parts of CIGRE distribution network is done by using the four STATCOM compensators already existing in the test grid. The simulations are carried out in DIgSILENT power factory software version 15.0.......Any problem in voltage in a power network is undesirable as it aggravates the quality of the power. Power electronic devices such as Voltage Source Converter (VSC) based Static Synchronous Compensator (STATCOM), Dynamic Voltage Restorer (DVR) etc. are commonly used for the mitigation of voltage...

  17. Mitigation of Unbalanced Voltage Sags and Voltage Unbalance in CIGRE Low Voltage Distribution Network

    DEFF Research Database (Denmark)

    Mustafa, Ghullam; Bak-Jensen, Birgitte; Mahat, Pukar


    . The voltage problems dealt with in this paper are to show how to mitigate unbalanced voltage sags and voltage unbalance in the CIGRE Low Voltage (LV) test network and net-works like this. The voltage unbalances, for the tested cases in the CIGRE LV test network are mainly due to single phase loads and due...... to unbalanced faults. The compensation of unbalanced voltage sags and voltage unbalance in the CIGRE distribution network is done by using the four STATCOM compensators already existing in the test grid. The simulations are carried out in DIgSILENT power factory software version 15.0.......Any problem with voltage in a power network is undesirable as it aggravates the quality of the power. Power electronic devices such as Voltage Source Converter (VSC) based Static Synchronous Compensator (STATCOM) etc. can be used to mitigate the voltage problems in the distribution system...

  18. Geomagnetism and Induced Voltage (United States)

    Abdul-Razzaq, W.; Biller, R. D.


    Introductory physics laboratories have seen an influx of "conceptual integrated science" over time in their classrooms with elements of other sciences such as chemistry, biology, Earth science, and astronomy. We describe a laboratory to introduce this development, as it attracts attention to the voltage induced in the human brain as it…

  19. Jean-Pierre Famose et Jean Bertsch, L’estime de soi : une controverse éducative, Paris, PUF, 2009, 192 p


    Benamar, Aïcha


    L’ouvrage porte sur l’estime de soi, dans la sphère sociale en général et le monde éducatif en particulier. L’estime de soi est au cœur du comportement individuel, apportant confiance et assurance, permettant de progresser et in fine de réussir. Une faible estime de soi est fréquemment à l’origine de difficultés pour un individu : doutes, hésitations, ou à l’inverse vanité et arrogance. Un bon niveau d’estime de soi confère à la personnalité : capacité à s’affirmer et respect des autres. Cent...

  20. Caractérisation électrique et modélisation du transport dans matériaux et dispositifs SOI avancés


    Liu, Fanyu


    This thesis is dedicated to the electrical characterization and transport modeling in advanced SOImaterials and devices for ultimate micro-nano-electronics. SOI technology is an efficient solution tothe technical challenges facing further downscaling and integration. Our goal was to developappropriate characterization methods and determine the key parameters. Firstly, the conventionalpseudo-MOSFET characterization was extended to heavily-doped SOI wafers and an adapted modelfor parameters ext...

  1. High sensitivity and high Q-factor nanoslotted parallel quadrabeam photonic crystal cavity for real-time and label-free sensing

    Energy Technology Data Exchange (ETDEWEB)

    Yang, Daquan [Rowland Institute at Harvard University, Cambridge, Massachusetts 02142 (United States); State Key Laboratory of Information Photonics and Optical Communications, School of Information and Communication Engineering, Beijing University of Posts and Telecommunications, Beijing 100876 (China); School of Engineering and Applied Sciences, Harvard University, Cambridge, Massachusetts 02138 (United States); Kita, Shota; Wang, Cheng; Lončar, Marko [School of Engineering and Applied Sciences, Harvard University, Cambridge, Massachusetts 02138 (United States); Liang, Feng; Quan, Qimin [Rowland Institute at Harvard University, Cambridge, Massachusetts 02142 (United States); Tian, Huiping; Ji, Yuefeng [State Key Laboratory of Information Photonics and Optical Communications, School of Information and Communication Engineering, Beijing University of Posts and Telecommunications, Beijing 100876 (China)


    We experimentally demonstrate a label-free sensor based on nanoslotted parallel quadrabeam photonic crystal cavity (NPQC). The NPQC possesses both high sensitivity and high Q-factor. We achieved sensitivity (S) of 451 nm/refractive index unit and Q-factor >7000 in water at telecom wavelength range, featuring a sensor figure of merit >2000, an order of magnitude improvement over the previous photonic crystal sensors. In addition, we measured the streptavidin-biotin binding affinity and detected 10 ag/mL concentrated streptavidin in the phosphate buffered saline solution.

  2. FUNDAMENTAL AREAS OF PHENOMENOLOGY (INCLUDING APPLICATIONS): Teleportation of Entangled States through Divorce of Entangled Pair Mediated by a Weak Coherent Field in a High-Q Cavity (United States)

    Cardoso B., W.; Almeida G. de, N.


    We propose a scheme to partially teleport an unknown entangled atomic state. A high-Q cavity, supporting one mode of a weak coherent state, is needed to accomplish this process. By partial teleportation we mean that teleportation will occur by changing one of the partners of the entangled state to be teleported. The entangled state to be teleported is composed by one pair of particles, we called this surprising characteristic of maintaining the entanglement, even when one of the particle of the entangled pair being teleported is changed, of divorce of entangled states.

  3. Investigations of a voltage-biased microwave cavity for quantum measurements of nanomechanical resonators (United States)

    Rouxinol, Francisco; Hao, Hugo; Lahaye, Matt


    Quantum electromechanical systems incorporating superconducting qubits have received extensive interest in recent years due to their promising prospects for studying fundamental topics of quantum mechanics such as quantum measurement, entanglement and decoherence in new macroscopic limits, also for their potential as elements in technological applications in quantum information network and weak force detector, to name a few. In this presentation we will discuss ours efforts toward to devise an electromechanical circuit to strongly couple a nanomechanical resonator to a superconductor qubit, where a high voltage dc-bias is required, to study quantum behavior of a mechanical resonator. Preliminary results of our latest generation of devices integrating a superconductor qubit into a high-Q voltage biased microwave cavities are presented. Developments in the circuit design to couple a mechanical resonator to a qubit in the high-Q voltage bias CPW cavity is discussed as well prospects of achieving single-phonon measurement resolution. National Science Foundation under Grant No. DMR-1056423 and Grant No. DMR-1312421.

  4. Deployment of low-voltage regulator considering existing voltage control in medium-voltage distribution systems

    Directory of Open Access Journals (Sweden)

    Hiroshi Kikusato


    Full Text Available Many photovoltaic (PV systems have been installed in distribution systems. This installation complicates the maintenance of all voltages within the appropriate range in all low-voltage distribution systems (LVDSs because the trends in voltage fluctuation differ in each LVDS. The installation of a low-voltage regulator (LVR that can accordingly control the voltage in each LVDS has been studied as a solution to this problem. Voltage control in a medium-voltage distribution system must be considered to study the deployment of LVRs. In this study, we installed LVRs in the LVDSs in which the existing voltage-control scheme cannot prevent voltage deviation and performed a numerical simulation by using a distribution system model with PV to evaluate the deployment of the LVRs.

  5. Confrontation d'opinions sur l'estime de soi d'enseignantes et de futures enseignantes


    Vizcaino, Nastasia


    L'objectif de mon mémoire consiste à savoir : - si des futures enseignantes, ainsi que des enseignantes, voient de la même manière le lien de leur propre estime d'elles-mêmes avec leur pratique en classe. - Et dans quelle mesure ce lien peut atteindre l'estime de soi de leurs élèves. Pour cette recherche, j'ai mené dix entretiens semi-directifs dans lesquels les sujets ont dû répondre à plusieurs questions dites « ouvertes » concernant l'estime de soi. Le questionnaire était divisé en six par...

  6. Comparison of short-circuit characteristics of trench gate and planar gate U-shaped channel SOI-LIGBTs (United States)

    Zhang, Long; Zhu, Jing; Sun, Weifeng; Zhao, Minna; Huang, Xuequan; Chen, Jiajun; Shi, Longxing; Chen, Jian; Ding, Desheng


    Comparison of short-circuit (SC) characteristics of 500 V rated trench gate U-shaped channel (TGU) SOI-LIGBT and planar gate U-shaped channel (PGU) SOI-LIGBT is made for the first time in this paper. The on-state carrier profile of the TGU structure is reshaped by the dual trenches (a gate trench G1 and a hole barrier trench G2), which leads to a different conduction behavior from that of the PGU structure. The TGU structure exhibits a higher latchup immunity but a severer self-heating effect. At current density (JC) lattice temperature rise caused by the high current density at the emitter side in the TGU structure, the PGU exhibits a better JC-tSC trade-off at JC > 640 A/cm2. Comparison of layouts and fabrication processes are also made between the two types of devices.

  7. Properties of HfLaO MOS capacitor deposited on SOI with plasma enhanced atomic layer deposition

    Energy Technology Data Exchange (ETDEWEB)

    Wan, Wenyan; Cheng, Xinhong, E-mail:; Cao, Duo; Zheng, Li; Xu, Dawei; Wang, Zhongjian; Xia, Chao; Shen, Lingyan; Yu, Yuehui [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences, Changning Road 865, Shanghai 200050 (China); Shen, DaShen [Department of Electrical and Computer Engineering, University of Alabama in Huntsville, Huntsville, Alabama 35899 (United States)


    Amorphous HfLaO dielectric film was successfully deposited on a silicon-on-insulator (SOI) substrate by plasma enhanced atomic layer deposition with in situ plasma treatment. The HfLaO film retained its insulating characteristics and is thermally stable even after annealing at 800 °C. The film has a dielectric constant of 27.3 and leakage of only 0.03 mA/cm{sup 2} at a gate bias of |Vg − V{sub fb}| = 1 V. The capacitance equivalent oxide thickness is 0.7 nm. A new parallel electrode testing structure was applied to measure C–V and J–V characteristics for the SOI samples. This testing method for metal–oxide–semiconductor capacitors has potential uses for measuring other layered substrates.

  8. La place de l'estime de soi globale et physique dans la construction identitaire de l'adolescent


    Fourchard, Frédéric; Courtinat-Camps, A.


    International audience; A partir d'un recueil de données réalisé auprès de plus de 500 collégien(ne)s, nous proposons d'évaluer l'estime de soi dans les domaines global et physique. En effet, de profondes modifications physiques, psychologiques et sociales interviennent à l'adolescence et l'objet de cette recherche est de préciser les répercussions possibles de ces transformations physiques et psychologiques sur l'estime de soi, en fonction de l'âge et du genre. À un moment où le corps se mét...

  9. High Voltage Charge Pump

    KAUST Repository

    Emira, Ahmed A.


    Various embodiments of a high voltage charge pump are described. One embodiment is a charge pump circuit that comprises a plurality of switching stages each including a clock input, a clock input inverse, a clock output, and a clock output inverse. The circuit further comprises a plurality of pumping capacitors, wherein one or more pumping capacitors are coupled to a corresponding switching stage. The circuit also comprises a maximum selection circuit coupled to a last switching stage among the plurality of switching stages, the maximum selection circuit configured to filter noise on the output clock and the output clock inverse of the last switching stage, the maximum selection circuit further configured to generate a DC output voltage based on the output clock and the output clock inverse of the last switching stage.

  10. High Voltage Seismic Generator (United States)

    Bogacz, Adrian; Pala, Damian; Knafel, Marcin


    This contribution describes the preliminary result of annual cooperation of three student research groups from AGH UST in Krakow, Poland. The aim of this cooperation was to develop and construct a high voltage seismic wave generator. Constructed device uses a high-energy electrical discharge to generate seismic wave in ground. This type of device can be applied in several different methods of seismic measurement, but because of its limited power it is mainly dedicated for engineering geophysics. The source operates on a basic physical principles. The energy is stored in capacitor bank, which is charged by two stage low to high voltage converter. Stored energy is then released in very short time through high voltage thyristor in spark gap. The whole appliance is powered from li-ion battery and controlled by ATmega microcontroller. It is possible to construct larger and more powerful device. In this contribution the structure of device with technical specifications is resented. As a part of the investigation the prototype was built and series of experiments conducted. System parameter was measured, on this basis specification of elements for the final device were chosen. First stage of the project was successful. It was possible to efficiently generate seismic waves with constructed device. Then the field test was conducted. Spark gap wasplaced in shallowborehole(0.5 m) filled with salt water. Geophones were placed on the ground in straight line. The comparison of signal registered with hammer source and sparker source was made. The results of the test measurements are presented and discussed. Analysis of the collected data shows that characteristic of generated seismic signal is very promising, thus confirms possibility of practical application of the new high voltage generator. The biggest advantage of presented device after signal characteristics is its size which is 0.5 x 0.25 x 0.2 m and weight approximately 7 kg. This features with small li-ion battery makes

  11. Increased voltage photovoltaic cell (United States)

    Ross, B.; Bickler, D. B.; Gallagher, B. D. (Inventor)


    A photovoltaic cell, such as a solar cell, is provided which has a higher output voltage than prior cells. The improved cell includes a substrate of doped silicon, a first layer of silicon disposed on the substrate and having opposite doping, and a second layer of silicon carbide disposed on the first layer. The silicon carbide preferably has the same type of doping as the first layer.

  12. Light emission from thermally generated electron-hole plasma in a field-effect soi-transistor

    CERN Document Server

    Dobrovol's'kij, V M; Nyinyidze, G K; Pavlyuk, S P


    Field-effect silicon-on-insulator (SOI) transistors are investigated at extremely high drain currents.These currents heat the silicon film of a transistor and cause the generation of thermal electron-hole plasma there.We discovered the red light emission from such a plasma.Plasma stratification and formation of lighting spots are explained by the occurrence of thermodiffusion auto solitons.

  13. Device fabrication and transport measurements of FinFETs built with $^{28}$Si SOI wafers towards donor qubits in silicon


    Lo, CC; Persaud, A.; Dhuey, S; Olynick, D.; Borondics, F.; Martin, MC; Bechtel, HA; Bokor, J.; Schenkel, T.


    We report fabrication of transistors in a FinFET geometry using isotopically purified silicon-28 -on-insulator (28-SOI) substrates. Donor electron spin coherence in natural silicon is limited by spectral diffusion due to the residual $^{29}$Si nuclear spin bath, making isotopically enriched nuclear spin-free $^{28}$Si substrates a promising candidate for forming spin quantum bit devices. The FinFET architecture is fully compatible with single-ion implant detection for donor-based qubits, and ...

  14. Fully etched apodized grating coupler on the SOI platform with −058 dB coupling efficiency

    DEFF Research Database (Denmark)

    Ding, Yunhong; Peucheret, Christophe; Ou, Haiyan


    We design and fabricate an ultrahigh coupling efficiency (CE) fully etched apodized grating coupler on the silicon- on-insulator (SOI) platform using subwavelength photonic crystals and bonded aluminum mirror. Fabrication error sensitivity andcoupling angle dependence are experimentally investiga...... investigated. A recordultrahighCE of − 0 . 58 dB with a 3 dB bandwidth of 71 nm and low back reflection are demonstrated....

  15. Voltage Controlled Dynamic Demand Response

    DEFF Research Database (Denmark)

    Bhattarai, Bishnu Prasad; Bak-Jensen, Birgitte; Mahat, Pukar


    central or dispersed generations might not be sufficient for future scenario. One of the effective methods to cope with this scenario is to enable demand response. This paper proposes a dynamic voltage regulation based demand response technique to be applied in low voltage (LV) distribution feeders....... An adaptive dynamic model has been developed to determine composite voltage dependency of an aggregated load on feeder level. Following the demand dispatch or control signal, optimum voltage setting at the LV substation is determined based on the voltage dependency of the load. Furthermore, a new technique...... has been proposed to estimate the voltage at consumer point of connection (POC) to ensure operation within voltage limits. Finally, the effectiveness of the proposed method is analyzed comprehensively with reference to three different scenarios on a low voltage (LV) feeder (Borup feeder) owned...

  16. Low-voltage polyphasic circuits (United States)

    Baird, William H.; Jaynes, Michael L.


    Experimentation with polyphasic voltages is greatly simplified when microcontrollers are used to generate multiple square waves with fixed phase offsets. Each square wave is sent through a simple second-order Sallen-Key filter to produce an approximately sinusoidal voltage signal. The microcontroller allows the reproduction of split-phase and three-phase voltage relationships, mirroring those commonly distributed on the North American power grid, at safe voltage levels.

  17. High voltage variable diameter insulator (United States)

    Vanecek, David L.; Pike, Chester D.


    A high voltage feedthrough assembly (10) having a tubular insulator (15) extending between the ground plane ring (16) and the high voltage ring (30). The insulator (15) is made of Pyrex and decreases in diameter from the ground plane ring (16) to the high voltage ring (30), producing equipotential lines almost perpendicular to the wall (27) of the insulator (15) to optimize the voltage-holding capability of the feedthrough assembly (10).

  18. Total Ionizing Dose Influence on the Single-Event Upset Sensitivity of 130-nm PD SOI SRAMs (United States)

    Zheng, Qiwen; Cui, Jiangwei; Liu, Mengxin; Zhou, Hang; Liu, Mohan; Wei, Ying; Su, Dandan; Ma, Teng; Lu, Wu; Yu, Xuefeng; Guo, Qi; He, Chengfa


    Effect of total ionizing dose (TID) on single-event upset (SEU) hardness of 130 nm partially depleted (PD) silicon-on-insulator (SOI) static random access memories (SRAMs) is investigated in this paper. The measurable synergistic effect of TID on SEU sensitivity of 130-nm PD SOI SRAM was observed in our experiment, even though that is far less than micrometer and submicrometer devices. Moreover, SEU cross section after TID irradiation has no dependence on the data pattern that was applied during TID exposure: SEU cross sections are characterized by TID data pattern and its complement data pattern are decreased consistently rather than a preferred state and a nonpreferred state as micrometer and sub-micrometer SRAMs. The memory cell test structure allowing direct measurement of static noise margin (SNM) under standby operation was designed using identical memory cell layout of SRAM. Direct measurement of the memory cell SNM shows that both data sides' SNM is decreased by TID, indicating that SEU cross section of 130-nm PD SOI SRAM will be increased by TID. And, the decreased SNM is caused by threshold shift in memory cell transistors induced by “radiation-induced narrow channel effect”.

  19. Multi-field simulations and characterization of CMOS-MEMS high-temperature smart gas sensors based on SOI technology (United States)

    Lu, Chih-Cheng; Liao, Kuan-Hsun; Udrea, F.; Covington, J. A.; Gardner, J. W.


    This paper describes multiple field-coupled simulations and device characterization of fully CMOS-MEMS-compatible smart gas sensors. The sensor structure is designated for gas/vapour detection at high temperatures (>300 °C) with low power consumption, high sensitivity and competent mechanic robustness employing the silicon-on-insulator (SOI) wafer technology, CMOS process and micromachining techniques. The smart gas sensor features micro-heaters using p-type MOSFETs or polysilicon resistors and differentially transducing circuits for in situ temperature measurement. Physical models and 3D electro-thermo-mechanical simulations of the SOI micro-hotplate induced by Joule, self-heating, mechanic stress and piezoresistive effects are provided. The electro-thermal effect initiates and thus affects electronic and mechanical characteristics of the sensor devices at high temperatures. Experiments on variation and characterization of micro-heater resistance, power consumption, thermal imaging, deformation interferometry and dynamic thermal response of the SOI micro-hotplate have been presented and discussed. The full integration of the smart gas sensor with automatically temperature-reading ICs demonstrates the lowest power consumption of 57 mW at 300 °C and fast thermal response of 10 ms.

  20. Study of millisecond laser annealing on ion implanted soi and application to scaled finfet technology (United States)

    Michalak, Tyler J.

    The fabrication of metal-oxide-semiconductor field effect transistors (MOSFET) requires the engineering of low resistance, low leakage, and extremely precise p-n junctions. The introduction of finFET technology has introduced new challenges for traditional ion implantation and annealing techniques in junction design as the fin widths continue to decrease for improved short channel control. This work investigates the use of millisecond scanning laser annealing in the formation of n-type source/drain junctions in next generation MOSFET. We present a model to approximate the true thermal profile for a commercial laser annealing process which allows us to represent more precisely specific thermal steps using Technology Computer Aided Design (TCAD). Sheet resistance and Hall Effect measurements for blanket films are used to correlate dopant activation and mobility with the regrowth process during laser anneal. We show the onset of high conductivity associated with completion of solid phase epitaxial regrowth (SPER) in the films. The Lattice Kinetic Monte Carlo (LKMC) model shows excellent agreement with cross section transmission electron microscopy (TEM), correlating the increase of conductivity with completion of crystal regrowth, increased activation, and crystal quality at various temperatures. As scaled devices move into the non-planar geometries and possibly adopt silicon-on-insulator (SOI) substrates, the crystal regrowth and dopant activation of amorphizing implants becomes more complicated and doping methods must adapt accordingly. Following the concept of the more recently proposed hot ion implantation and the benefits of laser anneal, we investigate a possible process flow for a 10/14 nm node SOI finFET by utilizing process and device TCAD. Device simulation parameters for the 10/14 nm node device are taken from a calibrated model based on fabricated non-planar 40 nm gate length device finFET. The implications on device performance are considered for the

  1. Charge-pump voltage converter (United States)

    Brainard, John P [Albuquerque, NM; Christenson, Todd R [Albuquerque, NM


    A charge-pump voltage converter for converting a low voltage provided by a low-voltage source to a higher voltage. Charge is inductively generated on a transfer rotor electrode during its transit past an inductor stator electrode and subsequently transferred by the rotating rotor to a collector stator electrode for storage or use. Repetition of the charge transfer process leads to a build-up of voltage on a charge-receiving device. Connection of multiple charge-pump voltage converters in series can generate higher voltages, and connection of multiple charge-pump voltage converters in parallel can generate higher currents. Microelectromechanical (MEMS) embodiments of this invention provide a small and compact high-voltage (several hundred V) voltage source starting with a few-V initial voltage source. The microscale size of many embodiments of this invention make it ideally suited for MEMS- and other micro-applications where integration of the voltage or charge source in a small package is highly desirable.

  2. Transient voltage sharing in series-coupled high voltage switches

    Directory of Open Access Journals (Sweden)

    Editorial Office


    Full Text Available For switching voltages in excess of the maximum blocking voltage of a switching element (for example, thyristor, MOSFET or bipolar transistor such elements are often coupled in series - and additional circuitry has to be provided to ensure equal voltage sharing. Between each such series element and system ground there is a certain parasitic capacitance that may draw a significant current during high-speed voltage transients. The "open" switch is modelled as a ladder network. Analy­sis reveals an exponential progression in the distribution of the applied voltage across the elements. Overstressing thus oc­curs in some of the elements at levels of the total voltage that are significantly below the design value. This difficulty is overcome by grading the voltage sharing circuitry, coupled in parallel with each element, in a prescribed manner, as set out here.

  3. Coordinated Voltage Control of Distributed PV Inverters for Voltage Regulation in Low Voltage Distribution Networks

    DEFF Research Database (Denmark)

    Nainar, Karthikeyan; Pokhrel, Basanta Raj; Pillai, Jayakrishnan Radhakrishna


    This paper reviews and analyzes the existing voltage control methods of distributed solar PV inverters to improve the voltage regulation and thereby the hosting capacity of a low-voltage distribution network. A novel coordinated voltage control method is proposed based on voltage sensitivity...... optimization. The proposed method is used to calculate the voltage bands and droop settings of PV inverters at each node by the supervisory controller. The local controller of each PV inverter implements the volt/var control and if necessary, the active power curtailment as per the received settings and based...... on measured local voltages. The advantage of the proposed method is that the calculated reactive power and active power droop settings enable fair contribution of the PV inverters at each node to the voltage regulation. Simulation studies are conducted using DigSilent Power factory software on a simplified...

  4. SOI detector with drift field due to majority carrier flow - an alternative to biasing in depletion

    Energy Technology Data Exchange (ETDEWEB)

    Trimpl, M.; Deptuch, G.; Yarema, R.; /Fermilab


    This paper reports on a SOI detector with drift field induced by the flow of majority carriers. It is proposed as an alternative method of detector biasing compared to standard depletion. N-drift rings in n-substrate are used at the front side of the detector to provide charge collecting field in depth as well as to improve the lateral charge collection. The concept was verified on a 2.5 x 2.5 mm{sup 2} large detector array with 20 {micro}m and 40 {micro}m pixel pitch fabricated in August 2009 using the OKI semiconductor process. First results, obtained with a radioactive source to demonstrate spatial resolution and spectroscopic performance of the detector for the two different pixel sizes will be shown and compared to results obtained with a standard depletion scheme. Two different diode designs, one using a standard p-implantation and one surrounded by an additional BPW implant will be compared as well.

  5. Development of MEMS Multi-Mode Electrostatic Energy Harvester Based on the SOI Process

    Directory of Open Access Journals (Sweden)

    Bongwon Jeong


    Full Text Available Multi-vibrational-mode electrostatic energy harvesters are designed and micro-machined utilizing a simple silicon-on-insulator (SOI wafer-based process. Enhanced adaptability to various vibrational environments is achieved in the proposed design by using serpentine springs attached to the fishbone-shaped inertial mass. The experimental results show that the developed device could convert an input vibration of 6 g at 1272 Hz to 2.96, 3.28, and 2.30 μW for different vibrational directions of 0°, 30°, and 45° with respect to a reference direction, respectively, when all serpentine springs are identical. An alternative device design using serpentine springs with different stiffnesses between x- and y-axes exhibited resonance frequencies at 1059 and 1635 Hz for an input vibrational direction of 45° and acceleration amplitude of 4 g, successfully generating 0.723 and 0.927 μW of electrical power at each resonance, respectively.

  6. Compact electrode design for an in-plane accelerometer on SOI with refilled isolation trench (United States)

    Xie, Jin; Agarwal, Rahul; Liu, Youhe; Minglin Tsai, Julius; Ranganathan, Nagarajan; Singh, Janak


    A two-axis in-plane capacitive accelerometer containing a refilled isolation trench is fabricated in 50 µm silicon-on-insulator (SOI). In the accelerometer, each stationary electrode is split into two sub-stationary electrodes by the refilled isolation trench, and the two sub-stationary electrodes form a pair of differential capacitors with the adjacent movable electrodes. With this deployment, there is no necessity to keep a wide gap between the split stationary combs to avoid stiction, and the sensing electrodes are arranged compactly. Compared with a typical design without isolation trench across the stationary comb, the presented accelerometer allows more pairs of differential capacitors arranged in a given sensing area, and thus has higher capacitance sensitivity. Experimental results show that the capacitance sensitivity is 0.19 pF g-1 and nonlinearity is 0.4%. In addition, the overlap area-changed capacitor enables the accelerometer to reduce the damping coefficient and minimize the possibility of stiction.

  7. Development of monolithic pixel detector with SOI technology for the ILC vertex detector (United States)

    Yamada, M.; Ono, S.; Tsuboyama, T.; Arai, Y.; Haba, J.; Ikegami, Y.; Kurachi, I.; Togawa, M.; Mori, T.; Aoyagi, W.; Endo, S.; Hara, K.; Honda, S.; Sekigawa, D.


    We have been developing a monolithic pixel sensor for the International Linear Collider (ILC) vertex detector with the 0.2 μm FD-SOI CMOS process by LAPIS Semiconductor Co., Ltd. We aim to achieve a 3 μm single-point resolution required for the ILC with a 20×20 μm2 pixel. Beam bunch crossing at the ILC occurs every 554 ns in 1-msec-long bunch trains with an interval of 200 ms. Each pixel must record the charge and time stamp of a hit to identify a collision bunch for event reconstruction. Necessary functions include the amplifier, comparator, shift register, analog memory and time stamp implementation in each pixel, and column ADC and Zero-suppression logic on the chip. We tested the first prototype sensor, SOFIST ver.1, with a 120 GeV proton beam at the Fermilab Test Beam Facility in January 2017. SOFIST ver.1 has a charge sensitive amplifier and two analog memories in each pixel, and an 8-bit Wilkinson-type ADC is implemented for each column on the chip. We measured the residual of the hit position to the reconstructed track. The standard deviation of the residual distribution fitted by a Gaussian is better than 3 μm.

  8. Small Signals’ Study of Thermal Induced Current in Nanoscale SOI Sensor

    Directory of Open Access Journals (Sweden)

    Yaakov Mandelbaum


    Full Text Available A new nanoscale SOI dual-mode modulator is investigated as a function of optical and thermal activation modes. In order to accurately characterize the device specifications towards its future integration in microelectronics circuitry, current time variations are studied and compared for “large signal” constant temperature changes, as well as for “small signal” fluctuating temperature sources. An equivalent circuit model is presented to define the parameters which are assessed by numerical simulation. Assuring that the thermal response is fast enough, the device can be operated as a modulator via thermal stimulation or, on the other hand, can be used as thermal sensor/imager. We present here the design, simulation, and model of the next generation which seems capable of speeding up the processing capabilities. This novel device can serve as a building block towards the development of optical/thermal data processing while breaking through the way to all optic processors based on silicon chips that are fabricated via typical microelectronics fabrication process.

  9. 1.55-μm VCSEL with polarization-independent HCG mirror on SOI. (United States)

    Tsunemi, Yoshihiro; Yokota, Nobuhide; Majima, Shota; Ikeda, Kazuhiro; Katayama, Takeo; Kawaguchi, Hitoshi


    We designed and fabricated a vertical-cavity surface-emitting laser (VCSEL) incorporating a polarization-independent high-index-contrast subwavelength grating (HCG) mirror on silicon-on-insulator (SOI) for a novel polarization-bistable device on a silicon substrate. The VCSEL consists of the HCG mirror, an active layer with InGaAsP quantum wells having optical gain around 1.55 μm, and an Al0.9Ga0.1As/Al0.16Ga0.84As DBR. We used direct wafer bonding for the bonding between the active layer and the AlGaAs DBR, and benzocyclobutene (BCB) bonding for the bonding between the active layer and the polarization-independent HCG mirror. The reflectivity of the HCG embedded with BCB was measured, resulting in a 200-nm-high reflectivity band with reflectivity higher than 99% and a small polarization dependence of ± 1%. We achieved lasing of the fabricated HCG-VCSEL at 1527 nm under an optical short pulse excitation with an average power of 50 mW (~0.2 mJ/cm2) at 240 K.

  10. SoiLique: A MATLAB® Based Program to analyze soil Liquefaction and some applications/comparisons (United States)

    Bekin, Ekrem; Özçep, Ferhat


    Soil liquefaction is one of the ground failures induced by earthquakes. During dynamic loading, i.e. an earthquake, pore water pressure increases in undrained and cohesionless soils. Therefore, soils lose their solid behavior and act as if liquefied materials. In general, the earthquake hazard risk increases because of the liquefied behavior. In order to decrease liquefaction-induced failures and hazards, some empirical formulas have been used over decades. A unitless parameter, the safety factor, can be calculated by the help of these empirical formulas. The safety factor of liquefaction can be calculated from different in-situ tests (i.e. SPT or CPT) and the shear wave velocity of a corresponding research area. In addition to the safety factor, the consolidation depending on soil liquefaction can be calculated. The aim of this study is writing a MATLAB® gui to make soil liquefaction analysis (namely, calculations mentioned above). In other words, SoiLique calculates Cyclic Stress Ratio, Cyclic Resistance Ratio (from SPT, CPT, and shear wave velocity), the safety factor of liquefaction and consolidation depending on liquefaction. Some applications from liquefied sites in Turkey and some comparisons with other liquefaction software will be carried out.

  11. Benchmarking of Voltage Sag Generators

    DEFF Research Database (Denmark)

    Yang, Yongheng; Blaabjerg, Frede; Zou, Zhixiang


    to guide these grid-connected distributed power generation systems. In order to verify the response of such systems for voltage disturbance, mainly for evaluation of voltage sags/dips, a Voltage Sag Generator (VSG) is needed. This paper evaluates such sag test devices according to IEC 61000 in order...... to provide cheaper solutions to test against voltage sags. Simulation and experimental results demonstrate that the shunt impedance based VSG solution is the easiest and cheapest one for laboratory test applications. The back-to-back fully controlled converter based VSG is the most flexible solution......The increased penetration of renewable energy systems, like photovoltaic and wind power systems, rises the concern about the power quality and stability of the utility grid. Some regulations for Low Voltage Ride-Through (LVRT) for medium voltage or high voltage applications, are coming into force...

  12. High figure-of-merit SOI power LDMOS for power integrated circuits


    Singh, Yashvir; Rawat, Rahul Singh


    The structural modifications in the conventional power laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOS) are carried out to improve the breakdown voltage, on-resistance, gate-charge and figure-of-merits of the device with reduced cell pitch. The modified device has planer structure implemented on silicon-on-insulator which is suitable for low to medium voltage power integrated circuits. The proposed LDMOS consists of two gate electrodes placed vertically in two sepa...

  13. Heat-pump performance: voltage dip/sag, under-voltage and over-voltage

    Directory of Open Access Journals (Sweden)

    William J.B. Heffernan


    Full Text Available Reverse cycle air-source heat-pumps are an increasingly significant load in New Zealand and in many other countries. This has raised concern over the impact wide-spread use of heat-pumps may have on the grid. The characteristics of the loads connected to the power system are changing because of heat-pumps. Their performance during under-voltage events such as voltage dips has the potential to compound the event and possibly cause voltage collapse. In this study, results from testing six heat-pumps are presented to assess their performance at various voltages and hence their impact on voltage stability.

  14. Coordinated Voltage Control of Distributed PV Inverters for Voltage Regulation in Low Voltage Distribution Networks

    DEFF Research Database (Denmark)

    Nainar, Karthikeyan; Pokhrel, Basanta Raj; Pillai, Jayakrishnan Radhakrishna


    This paper reviews and analyzes the existing voltage control methods of distributed solar PV inverters to improve the voltage regulation and thereby the hosting capacity of a low-voltage distribution network. A novel coordinated voltage control method is proposed based on voltage sensitivity...... analysis, which is simple for computation and requires moderate automation and communication infrastructure. The proposed method is suitable for a hierarchical control structure where a supervisory controller has the provision to adapt the settings of local PV inverter controllers for overall system...

  15. Test of the FDTD accuracy in the analysis of the scattering resonances associated with high-Q whispering-gallery modes of a circular cylinder. (United States)

    Boriskin, Artem V; Boriskina, Svetlana V; Rolland, Anthony; Sauleau, Ronan; Nosich, Alexander I


    Our objective is the assessment of the accuracy of a conventional finite-difference time-domain (FDTD) code in the computation of the near- and far-field scattering characteristics of a circular dielectric cylinder. We excite the cylinder with an electric or magnetic line current and demonstrate the failure of the two-dimensional FDTD algorithm to accurately characterize the emission rate and the field patterns near high-Q whispering-gallery-mode resonances. This is proven by comparison with the exact series solutions. The computational errors in the emission rate are then studied at the resonances still detectable with FDTD, i.e., having Q-factors up to 10(3).

  16. InP on SOI devices for optical communication and optical network on chip (United States)

    Fedeli, J.-M.; Ben Bakir, B.; Olivier, N.; Grosse, Ph.; Grenouillet, L.; Augendre, E.; Phillippe, P.; Gilbert, K.; Bordel, D.; Harduin, J.


    For about ten years, we have been developing InP on Si devices under different projects focusing first on μlasers then on semicompact lasers. For aiming the integration on a CMOS circuit and for thermal issue, we relied on SiO2 direct bonding of InP unpatterned materials. After the chemical removal of the InP substrate, the heterostructures lie on top of silicon waveguides of an SOI wafer with a separation of about 100nm. Different lasers or photodetectors have been achieved for off-chip optical communication and for intra-chip optical communication within an optical network. For high performance computing with high speed communication between cores, we developed InP microdisk lasers that are coupled to silicon waveguide and produced 100μW of optical power and that can be directly modulated up to 5G at different wavelengths. The optical network is based on wavelength selective circuits with ring resonators. InGaAs photodetectors are evanescently coupled to the silicon waveguide with an efficiency of 0.8A/W. The fabrication has been demonstrated at 200mm wafer scale in a microelectronics clean room for CMOS compatibility. For off-chip communication, silicon on InP evanescent laser have been realized with an innovative design where the cavity is defined in silicon and the gain localized in the QW of bonded InP hererostructure. The investigated devices operate at continuous wave regime with room temperature threshold current below 100 mA, the side mode suppression ratio is as high as 20dB, and the fibercoupled output power is {7mW. Direct modulation can be achieved with already 6G operation.

  17. Voltage Dependence of Supercapacitor Capacitance

    Directory of Open Access Journals (Sweden)

    Szewczyk Arkadiusz


    Full Text Available Electronic Double-Layer Capacitors (EDLC, called Supercapacitors (SC, are electronic devices that are capable to store a relatively high amount of energy in a small volume comparing to other types of capacitors. They are composed of an activated carbon layer and electrolyte solution. The charge is stored on electrodes, forming the Helmholtz layer, and in electrolyte. The capacitance of supercapacitor is voltage- dependent. We propose an experimental method, based on monitoring of charging and discharging a supercapacitor, which enables to evaluate the charge in an SC structure as well as the Capacitance-Voltage (C-V dependence. The measurement setup, method and experimental results of charging/discharging commercially available supercapacitors in various voltage and current conditions are presented. The total charge stored in an SC structure is proportional to the square of voltage at SC electrodes while the charge on electrodes increases linearly with the voltage on SC electrodes. The Helmholtz capacitance increases linearly with the voltage bias while a sublinear increase of total capacitance was found. The voltage on SC increases after the discharge of electrodes due to diffusion of charges from the electrolyte to the electrodes. We have found that the recovery voltage value is linearly proportional to the initial bias voltage value.

  18. Blog : un journal intime comme mémoire de soi

    Directory of Open Access Journals (Sweden)

    Nolwenn Hénaff


    Full Text Available Tenir un journal est devenu, pour un individu, une manière possible de vivre, ou d’accompagner un moment de sa vie (Lejeune, 2006. Les usages sont donc multiples : construction d’une identité narrative, fixation du temps, libération du moi, introspection, outil de contrôle, de soutien, méthode d’organisation de la pensée, plaisir d’écrire. Si l’écriture papier reste la forme la plus courante du récit biographique, d’autres supports médiatiques comme la télévision ou la radio sont venus offrir de nouveaux terrains d’expérimentation de ces récits de soi. Plus récemment, l’avènement d’Internet et de ses outils simplifiés de publication ont fait émerger des formes biographiques innovantes. Pourtant, qu’il s’agisse de traverser une crise, de garder la mémoire d’une expérience forte, ou, plus ordinairement, de relater ses vacances et ses voyages, le journal se positionne avant tout, et résolument, comme un espace de liberté : on écrit quand on veut, comme on veut. Le « Souci de soi » comme dirait Foucault, l’espace dominé par les sensations, et la temporalité marquée par la notion d’instants, de moments ayant une connotation expressément personnelle sont autant d’indices révélant la pratique de l’écriture intime en ligne. Le blog apparaît à des moments de vie et accompagne souvent des tournants biographiques (ruptures, questionnement mais aussi nouveaux apprentissages, nouvelles rencontres, etc.. Nous proposons dans cet article d’analyser le blog en tant que support de mémoire personnelle et d’étudier à travers des exemples concrets les stratégies développées par les blogueurs pour se créer via ce dispositif communicationnel innovant un « espace de conserverie de soi » en ligne.Keeping a journal has become a way of live, or to moment a moment in one’s life (Lejeune, 2006. It has multiple uses: construction of a narrative identity, marking time, liberating the

  19. Investigation of the stability of polysilicon layers in SOI-structures under irradiation by electrons and hard magnetic field influence

    Directory of Open Access Journals (Sweden)

    Khoverko Yu. N.


    Full Text Available The properties of recrystallized polysilicon on insulator layers of p-type conductive SOI-structures with different carrier concentration irradiated with high-energy electrons flow about 1017 сm–2 in temperature range 4,2—300 К and high magnetic fields were investigated. It was found that heavily doped laser recrystallized polysilicon on insulator layers show its radiation resistance under irradiation with high-energy electrons and magnetoresistance of such material remains quite low in magnetic field about 14 T does not exceed 1—2%. Such qulity can be applied in designing of microelectronic sensors of mechanical values operable in hard conditions of exploitation.

  20. Bonding III-V material to SOI with transparent and conductive ZnO film at low temperature. (United States)

    Huang, Xinnan; Gao, Yonghao; Xu, Xingsheng


    A procedure of bonding III-V material to SOI at low temperature using conductive and transparent adhesive ZnO as intermediate layer is demonstrated. Bonding layer thickness of less than 100 nm was achieved in our experiment that guaranteed good light coupling efficiency between III-V and silicon. This bonding method showed good bonding strength with shear stress of 80 N/cm(2). The lowest resistance of the bonded samples was 48.9 Ω and the transmittance of the spin-coated ZnO layer was above 99%. This procedure is applicable for fabricating hybrid III-V/Si lasers.

  1. Device fabrication and transport measurements of FinFETs built with 28Si SOI wafers towards donor qubits in silicon

    Energy Technology Data Exchange (ETDEWEB)

    Lo, Cheuk Chi; Persaud, Arun; Dhuey, Scott; Olynick, Deirdre; Borondics, Ferenc; Martin, Michael C.; Bechtel, Hans A.; Bokor, Jeffrey; Schenkel, Thomas


    We report fabrication of transistors in a FinFET geometry using isotopically purified silicon-28 -on-insulator (28-SOI) substrates. Donor electron spin coherence in natural silicon is limited by spectral diffusion due to the residual 29Si nuclear spin bath, making isotopically enriched nuclear spin-free 28Si substrates a promising candidate for forming spin quantum bit devices. The FinFET architecture is fully compatible with single-ion implant detection for donor-based qubits, and the donor spin-state readout through electrical detection of spin resonance. We describe device processing steps and discuss results on electrical transport measurements at 0.3 K.

  2. Device fabrication and transport measurements of FinFETs built with 28Si SOI wafers toward donor qubits in silicon (United States)

    Lo, Cheuk Chi; Persaud, Arun; Dhuey, Scott; Olynick, Deirdre; Borondics, Ferenc; Martin, Michael C.; Bechtel, Hans A.; Bokor, Jeffrey; Schenkel, Thomas


    We report on the fabrication of transistors in a FinFET geometry using isotopically purified silicon-28-on-insulator (28-SOI) substrates. Donor electron spin coherence in natural silicon is limited by spectral diffusion due to the residual 29Si nuclear spin bath, making isotopically enriched nuclear spin-free 28Si substrates a promising candidate for forming spin quantum bit devices. The FinFET architecture is fully compatible with single-ion implant detection for donor-based qubits and the donor spin-state readout through electrical detection of spin resonance. We describe device processing steps and discuss results on electrical transport measurements at 0.3 K.

  3. Device fabrication and transport measurements of FinFETs built with 28Si SOI wafers towards donor qubits in silicon


    Lo, Cheuk Chi


    We report fabrication of transistors in a FinFET geometry using isotopically purified silicon-28 -on-insulator (28-SOI) substrates. Donor electron spin coherence in natural silicon is limited by spectral diffusion due to the residual 29Si nuclear spin bath, making isotopically enriched nuclear spin-free 28Si substrates a promising candidate for forming spin quantum bit devices. The FinFET architecture is fully compatible with single-ion implant detection for donor-based qubits, and the donor ...

  4. Identification of Si film traps in p-channel SOI FinFETs using low temperature noise spectroscopy (United States)

    Achour, H.; Cretu, B.; Simoen, E.; Routoure, J.-M.; Carin, R.; Benfdila, A.; Aoulaiche, M.; Claeys, C.


    The aim of this study is to analyse the excess low frequency noise from 100 K up to room temperature in p-channel triple-gate standard and strained FinFET transistors fabricated on silicon on insulator (SOI) substrates. The low frequency noise measurements as a function of temperature can be successfully used as a non-destructive device characterisation tool in order to evaluate the quality of the silicon film and to identify traps induced during the device processing. Several identified traps which can be related to boron and carbon, in particular for strained substrate devices, were observed.

  5. Mechanisms of Low-Energy Operation of XCT-SOI CMOS Devices—Prospect of Sub-20-nm Regime

    Directory of Open Access Journals (Sweden)

    Yasuhisa Omura


    Full Text Available This paper describes the performance prospect of scaled cross-current tetrode (XCT CMOS devices and demonstrates the outstanding low-energy aspects of sub-30-nm-long gate XCT-SOI CMOS by analyzing device operations. The energy efficiency improvement of such scaled XCT CMOS circuits (two orders higher stems from the “source potential floating effect”, which offers the dynamic reduction of effective gate capacitance. It is expected that this feature will be very important in many medical implant applications that demand a long device lifetime without recharging the battery.

  6. High figure-of-merit SOI power LDMOS for power integrated circuits

    Directory of Open Access Journals (Sweden)

    Yashvir Singh


    Full Text Available The structural modifications in the conventional power laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOS are carried out to improve the breakdown voltage, on-resistance, gate-charge and figure-of-merits of the device with reduced cell pitch. The modified device has planer structure implemented on silicon-on-insulator which is suitable for low to medium voltage power integrated circuits. The proposed LDMOS consists of two gate electrodes placed vertically in two separate trenches build in the drift region and single source and drain contacts are taken on the top. The trench structure reduces the electric field inside the drift region and allow increased drift layer doping concentration leading to higher breakdown voltage, lower specific on-resistance, reduced gate-drain charge, and substantial improvement in the figure-of-merits. Using two-dimensional simulations, the performance of the proposed LDMOS is optimized and results are compared with the conventional LDMOS. Our simulation results show that the proposed device exhibits 110% higher breakdown voltage, 40% reduction in cell pitch, 19% lower specific on-resistance, 30% lower gate-to-drain charge leading to 5.5 times improvement in Baliga's figure-of-merit and 43% reduction in dynamic figure-of-merit over the conventional device.

  7. Hybrid III-V/SOI single-mode vertical-cavity laser with in-plane emission into a silicon waveguide

    DEFF Research Database (Denmark)

    Park, Gyeong Cheol; Xue, Weiqi; Semenova, Elizaveta


    We report a III-V-on-SOI vertical-cavity laser emitting into an in-plane Si waveguide fabricated by using CMOS-compatible processes. The fabricated laser operates at 1.54 µm with a SMSR of 33 dB and a low threshold.......We report a III-V-on-SOI vertical-cavity laser emitting into an in-plane Si waveguide fabricated by using CMOS-compatible processes. The fabricated laser operates at 1.54 µm with a SMSR of 33 dB and a low threshold....

  8. Error-free Dispersion-uncompensated Transmission at 20 Gb/s over SSMF using a Hybrid III-V/SOI DML with MRR Filtering

    DEFF Research Database (Denmark)

    Cristofori, Valentina; Kamchevska, Valerija; Ding, Yunhong


    Error-free 20-Gb/s directly-modulated transmission is achieved by enhancing the dispersion tolerance of a III-V/SOI DFB laser with a silicon micro-ring resonator. Low (∼0.4 dB) penalty compared to back-to-back without ring is demonstrated after 5-km SSMF.......Error-free 20-Gb/s directly-modulated transmission is achieved by enhancing the dispersion tolerance of a III-V/SOI DFB laser with a silicon micro-ring resonator. Low (∼0.4 dB) penalty compared to back-to-back without ring is demonstrated after 5-km SSMF....

  9. Charge collection properties in an irradiated pixel sensor built in a thick-film HV-SOI process (United States)

    Hiti, B.; Cindro, V.; Gorišek, A.; Hemperek, T.; Kishishita, T.; Kramberger, G.; Krüger, H.; Mandić, I.; Mikuž, M.; Wermes, N.; Zavrtanik, M.


    Investigation of HV-CMOS sensors for use as a tracking detector in the ATLAS experiment at the upgraded LHC (HL-LHC) has recently been an active field of research. A potential candidate for a pixel detector built in Silicon-On-Insulator (SOI) technology has already been characterized in terms of radiation hardness to TID (Total Ionizing Dose) and charge collection after a moderate neutron irradiation. In this article we present results of an extensive irradiation hardness study with neutrons up to a fluence of 1× 1016 neq/cm2. Charge collection in a passive pixelated structure was measured by Edge Transient Current Technique (E-TCT). The evolution of the effective space charge concentration was found to be compliant with the acceptor removal model, with the minimum of the space charge concentration being reached after 5× 1014 neq/cm2. An investigation of the in-pixel uniformity of the detector response revealed parasitic charge collection by the epitaxial silicon layer characteristic for the SOI design. The results were backed by a numerical simulation of charge collection in an equivalent detector layout.

  10. Single crystal silicon filaments fabricated in SOI: A potential IR source for a microfabricated photometric CO2 sensor (United States)

    Tu, Juliana; Smith, Rosemary L.


    The objective of this project was to design, fabricate, and test single crystal silicon filaments as potential black body IR sources for a spectrophotometric CO2 sensing microsystem. The design and fabrication of the silicon-on-insulator (SOI) filaments are summarized and figures showing the composite layout of the filament die (which contains four filaments of different lengths -- 500 microns, 1 mm, 1.5 mm and 2 mm -- and equal widths of 15 microns) are presented. The composite includes four mask layers: (1) silicon - defines the filament dimensions and contact pads; (2) release pit - defines the oxide removed from under the filament and hence, the length of the released filament; (3) Pyrex pit - defines the pit etched in the Pyrex cap (not used); and (4) metal - defines a metal pattern on the contact pads or used as a contact hole etch. I/V characteristics testing of the fabricated SOI filaments is described along with the nitride-coating procedures carried out to prevent oxidation and resistance instability.

  11. Optimal Design of an Ultrasmall SOI-Based 1 × 8 Flat-Top AWG by Using an MMI

    Directory of Open Access Journals (Sweden)

    Hongqiang Li


    Full Text Available Four methods based on a multimode interference (MMI structure are optimally designed to flatten the spectral response of silicon-on-insulator- (SOI- based arrayed-waveguide grating (AWG applied in a demodulation integration microsystem. In the design for each method, SOI is selected as the material, the beam propagation method is used, and the performances (including the 3 dB passband width, the crosstalk, and the insertion loss of the flat-top AWG are studied. Moreover, the output spectrum responses of AWGs with or without a flattened structure are compared. The results show that low insertion loss, crosstalk, and a flat and efficient spectral response are simultaneously achieved for each kind of structure. By comparing the four designs, the design that combines a tapered MMI with tapered input/output waveguides, which has not been previously reported, was shown to yield better results than others. The optimized design reduced crosstalk to approximately −21.9 dB and had an insertion loss of −4.36 dB and a 3 dB passband width, that is, approximately 65% of the channel spacing.

  12. Electrode Placement for Active Tuning of Silicon-on-Insulator (SOI) Ring Resonator Structure Clad in Nematic Liquid Crystals (United States)


    1.573, and its threshold voltage is Vt = 1.61V, and saturation voltage Vsat = 2.51 V. LIXON’s clearing point temperature is 123 °C. Figure 4 depicts...applied potential. The field for most of the sample is 1.68 V/μm, which is above the threshold voltage of LIXON™. Saturation voltage, Vsat = 2.51 V

  13. Voltage Sensors Monitor Harmful Static (United States)


    A tiny sensor, small enough to be worn on clothing, now monitors voltage changes near sensitive instruments after being created to alert Agency workers to dangerous static buildup near fuel operations and avionics. San Diego s Quasar Federal Systems received a Small Business Innovation Research (SBIR) contract from Kennedy Space Center to develop its remote voltage sensor (RVS), a dime-sized electrometer designed to measure triboelectric changes in the environment. One of the unique qualities of the RVS is that it can detect static at greater distances than previous devices, measuring voltage changes from a few centimeters to a few meters away, due to its much-improved sensitivity.

  14. Power-MOSFET Voltage Regulator (United States)

    Miller, W. N.; Gray, O. E.


    Ninety-six parallel MOSFET devices with two-stage feedback circuit form a high-current dc voltage regulator that also acts as fully-on solid-state switch when fuel-cell out-put falls below regulated voltage. Ripple voltage is less than 20 mV, transient recovery time is less than 50 ms. Parallel MOSFET's act as high-current dc regulator and switch. Regulator can be used wherever large direct currents must be controlled. Can be applied to inverters, industrial furnaces photovoltaic solar generators, dc motors, and electric autos.

  15. voltage compensation using artificial neural network

    African Journals Online (AJOL)

    Offor Theophilos

    VOLTAGE COMPENSATION USING ARTIFICIAL NEURAL NETWORK: A CASE STUDY OF. RUMUOLA ... using artificial neural network (ANN) controller based dynamic voltage restorer (DVR). ... substation by simulating with sample of average voltage for Omerelu, Waterlines, Rumuola, Shell Industrial and Barracks.

  16. Voltage Controlled Perpendicular Magnetic Anisotropy. (United States)

    Noviasky, Nicholas; Sabirianov, Ildar; Cao, Shi; Zhang, Xiaozhe; Sokolov, Andrei; Kirianov, Eugene; Dowben, Peter; Ilie, Carolina C.; University of Nebraska at Lincoln Team; State University of New York at Oswego Collaboration

    Here we report the voltage controlled perpendicular magnetic anisotropy of a multilayer stack composed of P-type silicon substrate/ Gd2O3/ Co/ Pt grown by pulsed laser deposition (PLD) under ultra-high vacuum conditions. For examination of the voltage effect on magnetic properties of the samples, we performed magneto optical Kerr effect (MOKE) measurements. The results show a clear inverse relationship between voltage and coercivity. The exchange of oxygen ions which occurs at the interface between gadolinium oxide and cobalt may increase the cobalt oxide concentration within the optical interface layer. One potential application for this research could be the creation of a voltage controlled magnetic tunneling junction memory storage device. Proper implementation may be able to combine non-volatility with higher areal densities and low power consumption. NSF Research Experience for Faculty and Students at Undergraduate Institutions Program, UNL- MRSEC.

  17. Modular High Voltage Power Supply

    Energy Technology Data Exchange (ETDEWEB)

    Newell, Matthew R. [Los Alamos National Lab. (LANL), Los Alamos, NM (United States)


    The goal of this project is to develop a modular high voltage power supply that will meet the needs of safeguards applications and provide a modular plug and play supply for use with standard electronic racks.

  18. On-chip grating coupler array on the SOI platform for fan-in/fan-out of multi-core fibers with low insertion loss and crosstalk

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ye, Feihong; Peucheret, Christophe


    We design and fabricate a compact multi-core fiber fan-in/fan-out using a fully-etched grating coupler array on the SOI platform. Lowest coupling loss of 6.8 dB with 3 dB bandwidth of 48 nm and crosstalk lower than ×32 dB are demonstrated....

  19. 1.5-μm Directly modulated transmission over 66 km of SSMF with an integrated hybrid III-V/SOI DFB laser

    DEFF Research Database (Denmark)

    Cristofori, Valentina; Da Ros, Francesco; Chaibi, M. E.


    A hybrid III-V/SOI directly modulated DFB laser operating at 1.5 μο is fabricated, showing a side mode suppression ratio above 50 dB and a 3-dB bandwidth of 12 GHz. Error-free transmission (BERkm SSMF is demonstrated without dispersion compensation and FEC....

  20. Study of proton radiation effects on analog IC designed for high energy physics in a BICMOS-JFET Radhard SOI technology

    Energy Technology Data Exchange (ETDEWEB)

    Dentan, M.; Delagnes, E.; Fourches, N.; Rouger, M. [CEA Centre d`Etudes de Saclay, 91 - Gif-sur-Yvette (France). Dept. d`Astrophysique, de la Physique des Particules, de la Physique Nucleaire et de l`Instrumentation Associee; Truche, R.; Delevoye, E.; Pontcharra, J. de; Blanc, J.P. [CEA Centre d`Etudes de Grenoble, 38 (France). Lab. d`Electronique et d`Instrumentation; Flament, O.; Leray, J.L.; Musseau, O. [CEA Centre d`Etudes de Bruyeres-le-Chatel, 91 (France); Blanquart, L.; Habrard, M.C.; Clemens, J.C.; Delpierre, P.; Mouthuy, T.


    We present results from a fast charge amplifier and a wideband analog buffer fabricated in a BiCMOS-JFET Radhard SOI technology and irradiated up to 4.5 10{sup 14} protons/cm{sup 2}. Simulations using main parameters from irradiated components fit roughly these results. (authors). 6 refs., 6 figs.

  1. A Voltage Quality Detection Method

    DEFF Research Database (Denmark)

    Chen, Zhe; Wei, Mu


    This paper presents a voltage quality detection method based on a phase-locked loop (PLL) technique. The technique can detect the voltage magnitude and phase angle of each individual phase under both normal and fault power system conditions. The proposed method has the potential to evaluate various...... power quality disturbances, such as interruptions, sags and imbalances. Simulation studies have been performed. The effectiveness of the proposed method has been demonstrated under the simulated typical power disturbances....

  2. Medium voltage substation insulation coordination

    Energy Technology Data Exchange (ETDEWEB)

    Caccia, M.; Gambirasio, D. (SAE Sadelmi, Milan (Italy))


    With reference to the provisions contained in applicable CEI (Italian Electrotechnical Committee) and IEC (International Electrotechnical Commission) normatives, a review is made of design criteria for the coordination of medium voltage substation switchgear and control gear. The design problematics are discussed with reference to optimization of neutral grounding, three phase ac short circuit calculation methods, and methods for the evaluation of voltages in fault conditions.

  3. Reliability criteria for voltage stability

    Energy Technology Data Exchange (ETDEWEB)

    Taylor, Carson W.; Silverstein, Brian L. [Bonneville Power Administration, Portland, OR (United States)


    In face of costs pressures, there is need to allocate scare resources more effectively in order to achieve voltage stability. This naturally leads to development of probabilistic criteria and notions of rick management. In this paper it is presented a discussion about criteria for long term voltage stability limited to the case in which the time frames are topically several minutes. (author) 14 refs., 1 fig.

  4. Structural Make-up, Biopolymer Conformation, and Biodegradation Characteristics of Newly Developed Super Genotype of Oats (CDC SO-I vs. Conventional Varieties): Novel Approach

    Energy Technology Data Exchange (ETDEWEB)

    Damiran, D.; Yu, P


    Recently, a new 'super' genotype of oats (CDC SO-I or SO-I) has been developed. The objectives of this study were to determine structural makeup (features) of oat grain in endosperm and pericarp regions and to reveal and identify differences in protein amide I and II and carbohydrate structural makeup (conformation) between SO-I and two conventional oats (CDC Dancer and Derby) grown in western Canada in 2006, using advanced synchrotron radiation based Fourier transform infrared microspectroscopy (SRFTIRM). The SRFTIRM experiments were conducted at National Synchrotron Light Sources, Brookhaven National Laboratory (NSLS, BNL, U.S. Department of Energy). From the results, it was observed that comparison between the new genotype oats and conventional oats showed (1) differences in basic chemical and protein subfraction profiles and energy values with the new SO-I oats containing lower lignin (21 g/kg of DM) and higher soluble crude protein (530 g/kg CP), crude fat (59 g/kg of DM), and energy values (TDN, 820 g/kg of DM; NE{sub L3x}, 7.8 MJ/kg of DM); (2) significant differences in rumen biodegradation kinetics of dry matter, starch, and protein with the new SO-I oats containing lower EDDM (638 g/kg of DM) and higher EDCP (103 g/kg of DM); (3) significant differences in nutrient supply with highest truly absorbed rumen undegraded protein (ARUP, 23 g/kg of DM) and total metabolizable protein supply (MP, 81 g/kg of DM) from the new SO-I oats; and (4) significant differences in structural makeup in terms of protein amide I in the endosperm region (with amide I peak height from 0.13 to 0.22 IR absorbance unit) and cellulosic compounds to carbohydrate ratio in the pericarp region (ratio from 0.02 to 0.06). The results suggest that with the SRFTIRM technique, the structural makeup differences between the new genotype oats (SO-I) and two conventional oats (Dancer and Derby) could be revealed.

  5. Structural makeup, biopolymer conformation, and biodegradation characteristics of a newly developed super genotype of oats (CDC SO-I versus conventional varieties): a novel approach. (United States)

    Damiran, Daalkhaijav; Yu, Peiqiang


    Recently, a new "super" genotype of oats (CDC SO-I or SO-I) has been developed. The objectives of this study were to determine structural makeup (features) of oat grain in endosperm and pericarp regions and to reveal and identify differences in protein amide I and II and carbohydrate structural makeup (conformation) between SO-I and two conventional oats (CDC Dancer and Derby) grown in western Canada in 2006, using advanced synchrotron radiation based Fourier transform infrared microspectroscopy (SRFTIRM). The SRFTIRM experiments were conducted at National Synchrotron Light Sources, Brookhaven National Laboratory (NSLS, BNL, U.S. Department of Energy). From the results, it was observed that comparison between the new genotype oats and conventional oats showed (1) differences in basic chemical and protein subfraction profiles and energy values with the new SO-I oats containing lower lignin (21 g/kg of DM) and higher soluble crude protein (530 g/kg CP), crude fat (59 g/kg of DM), and energy values (TDN, 820 g/kg of DM; NE(L3x), 7.8 MJ/kg of DM); (2) significant differences in rumen biodegradation kinetics of dry matter, starch, and protein with the new SO-I oats containing lower EDDM (638 g/kg of DM) and higher EDCP (103 g/kg of DM); (3) significant differences in nutrient supply with highest truly absorbed rumen undegraded protein (ARUP, 23 g/kg of DM) and total metabolizable protein supply (MP, 81 g/kg of DM) from the new SO-I oats; and (4) significant differences in structural makeup in terms of protein amide I in the endosperm region (with amide I peak height from 0.13 to 0.22 IR absorbance unit) and cellulosic compounds to carbohydrate ratio in the pericarp region (ratio from 0.02 to 0.06). The results suggest that with the SRFTIRM technique, the structural makeup differences between the new genotype oats (SO-I) and two conventional oats (Dancer and Derby) could be revealed.

  6. Macroeconomic Assessment of Voltage Sags

    Directory of Open Access Journals (Sweden)

    Sinan Küfeoğlu


    Full Text Available The electric power sector has changed dramatically since the 1980s. Electricity customers are now demanding uninterrupted and high quality service from both utilities and authorities. By becoming more and more dependent on the voltage sensitive electronic equipment, the industry sector is the one which is affected the most by voltage disturbances. Voltage sags are one of the most crucial problems for these customers. The utilities, on the other hand, conduct cost-benefit analyses before going through new investment projects. At this point, understanding the costs of voltage sags become imperative for planning purposes. The characteristics of electric power consumption and hence the susceptibility against voltage sags differ considerably among different industry subsectors. Therefore, a model that will address the estimation of worth of electric power reliability for a large number of customer groups is necessary. This paper introduces a macroeconomic model to calculate Customer Voltage Sag Costs (CVSCs for the industry sector customers. The proposed model makes use of analytical data such as value added, annual energy consumption, working hours, and average outage durations and provides a straightforward, credible, and easy to follow methodology for the estimation of CVSCs.

  7. Electro-optical voltage transformer (United States)

    Xu, Yan; Ye, Miaoyuan; Cui, Ying


    The work introduces an optical fiber voltage transformer based on the Pockels effect. The transformer is different from a conventional electric-magnetic voltage transformer. A crystal BGO is used as sensor that is sealed in SF6 gas container; the measured signal is transferred by optical fiber in the Electro-Optical Voltage Transformer (EOVT). The principles and composition of EOVT is described here. The system consists of three parts: capacitive divider, optical sensor and electronics module. According to the analysis of factors that influence on the accuracy of measurement, the main ones, temperature and pressure of SF6, are corrected by means of signal digital process. The performances of 110kV EOVT were tested. The results show that the accuracy of EOVT could achieve 0.5 percent. Compared to a conventional electric-magnetic voltage transformer, the advantages of 110kV EOVT are higher accuracy, low cost, small volume, excellent dynamic characteristics and immunity from electromagnetic interference. In particular the low voltage is effectively isolated from the high voltage by means of the optical fiber.

  8. Le tourisme gay : aller ailleurs pour être soi-même ?

    Directory of Open Access Journals (Sweden)

    Emmanuel Jaurand


    Full Text Available L’orientation dominante des études sur le tourisme, longtemps marquées par l’importance de la dimension économique et par un désintérêt pour les questions touchant au corps, au sexe ou au genre, explique le silence autour du tourisme gay (qui n’est pas le tourisme des gays jusqu’aux années 1990. Pourtant, ce tourisme identitaire existe depuis longtemps et sa visibilité se développe, surtout dans les pays développés occidentaux. La métaphore du voyage et la recherche du paradis (sexuel perdu sont au cœur de l’identité homosexuelle depuis le 19 e siècle. Le tourisme gay se caractérise par des structures (tour-opérateurs, hébergements, croisières… et des destinations spécifiques. Pour les gays il s’agit, dans l’espace-temps des vacances, propice au relâchement et à la recréation de soi, de fuir un monde structuré par le système hétérosexiste et de rejoindre les autres (gays. La recherche de la rencontre du semblable et la sexualisation assumée du tourisme gay, à travers la libération et la dénudation des corps, participent d’une véritable quête pour valider son identité de gay. Elles font que les destinations préférées par les gays sont les stations balnéaires et les grandes villes : elles sont en effet dotées d’espaces publics, d’équipements commerciaux et de formes d’hébergement fermées favorables aux interactions et à la réalisation d’une éphémère « communauté gay ». The mainstream orientation of tourism studies, focused on the sole economic dimension for a long time, without any interest for questions about the body, sex or gender, explains the silence surrounding gay tourism (which is not the tourism of gay men since the 1990s. However, this identity tourism has existed for a long time and its visibility is growing, especially in Western developed countries. The metaphor of the journey and the search for a (sexual paradise lost have been at the core of the

  9. Unbalanced Voltage Compensation in Low Voltage Residential AC Grids

    DEFF Research Database (Denmark)

    Trintis, Ionut; Douglass, Philip; Munk-Nielsen, Stig


    This paper describes the design and test of a control algorithm for active front-end rectifiers that draw power from a residential AC grid to feed heat pump loads. The control algorithm is able to control the phase to neutral or phase to phase RMS voltages at the point of common coupling. The vol......This paper describes the design and test of a control algorithm for active front-end rectifiers that draw power from a residential AC grid to feed heat pump loads. The control algorithm is able to control the phase to neutral or phase to phase RMS voltages at the point of common coupling....... The voltage control was evaluated with either active or reactive independent phase load current control. The control performance in field operation in a residential grid situated in Bornholm, Denmark was investigated for different use cases....

  10. High-speed receiver based on waveguide germanium photodetector wire-bonded to 90nm SOI CMOS amplifier. (United States)

    Pan, Huapu; Assefa, Solomon; Green, William M J; Kuchta, Daniel M; Schow, Clint L; Rylyakov, Alexander V; Lee, Benjamin G; Baks, Christian W; Shank, Steven M; Vlasov, Yurii A


    The performance of a receiver based on a CMOS amplifier circuit designed with 90nm ground rules wire-bonded to a waveguide germanium photodetector is characterized at data rates up to 40Gbps. Both chips were fabricated through the IBM Silicon CMOS Integrated Nanophotonics process on specialty photonics-enabled SOI wafers. At the data rate of 28Gbps which is relevant to the new generation of optical interconnects, a sensitivity of -7.3dBm average optical power is demonstrated with 3.4pJ/bit power-efficiency and 0.6UI horizontal eye opening at a bit-error-rate of 10(-12). The receiver operates error-free (bit-error-rate optical power of -0.8dBm.

  11. Electrode voltage fall and total voltage of a transient arc (United States)

    Valensi, F.; Ratovoson, L.; Razafinimanana, M.; Masquère, M.; Freton, P.; Gleizes, A.


    This paper deals with an experimental study of the components of a transient arc total voltage with duration of a few tens of ms and a current peak close to 1000 A. The cathode tip is made of graphite whereas the flat anode is made either of copper or of graphite; the electrodes gap is a few mm. The analysis of the electrical parameters is supported and validated by fast imaging and by two models: the first one is a 2D physical model of the arc allowing to calculate both the plasma temperature field and the arc voltage; the second model is able to estimate the transient heating of the graphite electrode. The main aim of the study was to detect the possible change of the cathode voltage fall (CVF) during the first instants of the arc. Indeed it is expected that during the first ms the graphite cathode is rather cool and the main mechanism of the electron emission should be the field effect emission, whereas after several tens of ms the cathode is strongly heated and thermionic emission should be predominant. We have observed some change in the apparent CVF but we have shown that this apparent change can be attributed to the variation of the solid cathode resistance. On the other hand, the possible change of CVF corresponding to the transition between a ‘cold’ and a ‘hot’ cathode should be weak and could not be characterized considering our measurement uncertainty of about 2 V. The arc column voltage (ACV) was estimated by subtracting the electrode voltage fall from the total arc voltage. The experimental transient evolution of the ACV is in very good agreement with the theoretical variation predicted by the model, showing the good ability of the model to study this kind of transient arc.

  12. Food security among individuals experiencing homelessness and mental illness in the At Home/Chez Soi Trial. (United States)

    O'Campo, Patricia; Hwang, Stephen W; Gozdzik, Agnes; Schuler, Andrée; Kaufman-Shriqui, Vered; Poremski, Daniel; Lazgare, Luis Ivan Palma; Distasio, Jino; Belbraouet, Slimane; Addorisio, Sindi


    Individuals experiencing homelessness are particularly vulnerable to food insecurity. The At Home/Chez Soi study provides a unique opportunity to first examine baseline levels of food security among homeless individuals with mental illness and second to evaluate the effect of a Housing First (HF) intervention on food security in this population. At Home/Chez Soi was a 2-year randomized controlled trial comparing the effectiveness of HF compared with usual care among homeless adults with mental illness, stratified by level of need for mental health services (high or moderate). Logistic regressions tested baseline associations between food security (US Food Security Survey Module), study site, sociodemographic variables, duration of homelessness, alcohol/substance use, physical health and service utilization. Negative binomial regression determined the impact of the HF intervention on achieving levels of high or marginal food security over an 18-month follow-up period (6 to 24 months). Community settings at five Canadian sites (Moncton, Montreal, Toronto, Winnipeg and Vancouver). Homeless adults with mental illness (n 2148). Approximately 41 % of our sample reported high or marginal food security at baseline, but this figure varied with gender, age, mental health issues and substance use problems. High need participants who received HF were more likely to achieve marginal or high food security than those receiving usual care, but only at the Toronto and Moncton sites. Our large multi-site study demonstrated low levels of food security among homeless experiencing mental illness. HF showed promise for improving food security among participants with high levels of need for mental health services, with notable site differences.

  13. Automated Voltage Control in LHCb

    CERN Document Server

    Granado Cardoso, L; Jacobsson, R


    LHCb is one of the 4 LHC experiments. In order to ensure the safety of the detector and to maximize efficiency, LHCb needs to coordinate its own operations, in particular the voltage configuration of the different subdetectors, according to the accelerator status. A control software has been developed for this purpose, based on the Finite State Machine toolkit and the SCADA system used for control throughout LHCb (and the other LHC experiments). This software permits to efficiently drive both the Low Voltage (LV) and High Voltage (HV) systems of the 10 different sub-detectors that constitute LHCb, setting each sub-system to the required voltage (easily configurable at run-time) based on the accelerator state. The control software is also responsible for monitoring the state of the Sub-detector voltages and adding it to the event data in the form of status-bits. Safe and yet flexible operation of the LHCb detector has been obtained and automatic actions, triggered by the state changes of the ...

  14. Electrical control simulation of near infrared emission in SOI-MOSFET quantum well devices (United States)

    Bendayan, Michael; Sabo, Roi; Zolberg, Roee; Mandelbaum, Yaakov; Chelly, Avraham; Karsenty, Avi


    In the race to realize ultrahigh-speed processors, silicon photonics research is part of the efforts. Overcoming the silicon indirect bandgap with special geometry, we developed a concept of a metal-oxide-semiconductor field-effect transistor, based on a silicon quantum well structure that enables control of light emission. This quantum well consists of a recessed ultrathin silicon layer, obtained by a gate-recessed channel and limited between two oxide layers. The device's coupled optical and electrical properties have been simulated for channel thicknesses, varying from 2 to 9 nm. The results show that this device can emit near infrared radiation in the 1 to 2 μm range, compatible with the optical networking spectrum. The emitted light intensity can be electrically controlled by the drain voltage Vds while the peak emission wavelength depends on the channel thickness and slightly on Vds. Moreover, the location of the radiative recombination source inside the channel, responsible for the light emission, is also controllable through the applied voltages.

  15. Development of a New Cascade Voltage-Doubler for Voltage Multiplication

    Directory of Open Access Journals (Sweden)

    Arash Toudeshki


    Full Text Available For more than eight decades, cascade voltage-doubler circuits are used as a method to produce DC output voltage higher than the input voltage. In this paper, the topological developments of cascade voltage-doublers are reviewed. A new circuit configuration for cascade voltage-doubler is presented. This circuit can produce a higher value of the DC output voltage and better output quality compared to the conventional cascade voltage-doubler circuits, with the same number of stages.

  16. Development of a New Cascade Voltage-Doubler for Voltage Multiplication


    Toudeshki, Arash; Mariun, Norman; Hizam, Hashim; Abdul Wahab, Noor Izzri


    For more than eight decades, cascade voltage-doubler circuits are used as a method to produce DC output voltage higher than the input voltage. In this paper, the topological developments of cascade voltage-doublers are reviewed. A new circuit configuration for cascade voltage-doubler is presented. This circuit can produce a higher value of the DC output voltage and better output quality compared to the conventional cascade voltage-doubler circuits, with the same number of stages.

  17. Low-Energy Real-Time OS Using Voltage Scheduling Algorithm for Variable Voltage Processors


    Okuma, Takanori; Yasuura, Hiroto


    This paper presents a real-time OS based on $ mu $ITRON using proposed voltage scheduling algorithm for variable voltage processors which can vary supply voltage dynamically. The proposed voltage scheduling algorithms assign voltage level for each task dynamically in order to minimize energy consumption under timing constraints. Using the presented real-time OS, running tasks with low supply voltage leads to drastic energy reduction. In addition, the presented voltage scheduling algorithm is ...

  18. Voltage Quality of Grid Connected Wind Turbines

    DEFF Research Database (Denmark)

    Chen, Zhe; Blaabjerg, Frede; Sun, Tao


    Grid connected wind turbines may cause quality problems, such as voltage variation and flicker. This paper discusses the voltage variation and flicker emission of grid connected wind turbines with doubly-fed induction generators. A method to compensate flicker by using a voltage source converter...... (VSC) based STATCOM is presented, which shows it is an efficient mean to improve voltage quality....

  19. Portable High Voltage Impulse Generator

    Directory of Open Access Journals (Sweden)

    S. Gómez


    Full Text Available This paper presents a portable high voltage impulse generator which was designed and built with insulation up to 20 kV. This design was based on previous work in which simulation software for standard waves was developed. Commercial components and low-cost components were used in this work; however, these particular elements are not generally used for high voltage applications. The impulse generators used in industry and laboratories are usually expensive; they are built to withstand extra high voltage and they are big, making them impossible to transport. The proposed generator is portable, thereby allowing tests to be made on devices that cannot be moved from their location. The results obtained with the proposed impulse generator were satisfactory in terms of time and waveforms compared to other commercial impulse generators and the standard impulse wave simulator.

  20. Voltage Control of Magnetic Anisotropy (United States)

    Hao, Guanhua; Cao, Shi; Noviasky, Nick; Ilie, Carolina; Sokolov, Andre; Yin, Yuewei; Xu, Xiaoshan; Dowben, Peter

    Pd/Co/Gd2O3/Si heterostructures were fabricated via pulsed laser deposition and e-beam evaporation. Hysteresis loops, obtained by longitudinal magneto-optical Kerr-effect (MOKE) measurements, indicates an initial in-plane magnetic anisotropy. Applying a perpendicular voltage on the sample, the differences between the polar and longitudinal MOKE and anomalous Hall effect data indicates there is a reversible change in magnetic anisotropy, from in-plane to out-of-plane, with applied voltage. Prior work by others suggests that the change in magnetic anisotropy is due to redox reactions at the Co/Gd2O3 interference. Voltage controlled magnetism can result from changing interfacial chemistry and does not always require a magneto-electric coupling tensor.

  1. Resilient architecture design for voltage variation

    CERN Document Server

    Reddi, Vijay Janapa


    Shrinking feature size and diminishing supply voltage are making circuits sensitive to supply voltage fluctuations within the microprocessor, caused by normal workload activity changes. If left unattended, voltage fluctuations can lead to timing violations or even transistor lifetime issues that degrade processor robustness. Mechanisms that learn to tolerate, avoid, and eliminate voltage fluctuations based on program and microarchitectural events can help steer the processor clear of danger, thus enabling tighter voltage margins that improve performance or lower power consumption. We describe

  2. Capacitor Voltages Measurement and Balancing in Flying Capacitor Multilevel Converters Utilizing a Single Voltage Sensor

    DEFF Research Database (Denmark)

    Farivar, Glen; Ghias, Amer M. Y. M.; Hredzak, Branislav


    This paper proposes a new method for measuring capacitor voltages in multilevel flying capacitor (FC) converters that requires only one voltage sensor per phase leg. Multiple dc voltage sensors traditionally used to measure the capacitor voltages are replaced with a single voltage sensor at the ac...

  3. Design, Implementation, Modeling, and Optimization of Next Generation Low-Voltage Power MOSFETs (United States)

    Yoo, Abraham

    In this thesis, next generation low-voltage integrated power semiconductor devices are proposed and analyzed in terms of device structure and layout optimization techniques. Both approaches strive to minimize the power consumption of the output stage in DC-DC converters. In the first part of this thesis, we present a low-voltage CMOS power transistor layout technique, implemented in a 0.25mum, 5 metal layer standard CMOS process. The hybrid waffle (HW) layout was designed to provide an effective trade-off between the width of diagonal source/drain metal and the active device area, allowing more effective optimization between switching and conduction losses. In comparison with conventional layout schemes, the HW layout exhibited a 30% reduction in overall on-resistance with 3.6 times smaller total gate charge for CMOS devices with a current rating of 1A. Integrated DC-DC buck converters using HW output stages were found to have higher efficiencies at switching frequencies beyond multi-MHz. In the second part of the thesis, we present a CMOS-compatible lateral superjunction FINFET (SJ-FINFET) on a SOI platform. One drawback associated with low-voltage SJ devices is that the on-resistance is not only strongly dependent on the drift doping concentration but also on the channel resistance as well. To resolve the issue, a SJ-FINFET structure consisting of a 3D trench gate and SJ drift region was developed to minimize both channel and drift resistances. Several prototype devices were fabricated in a 0.5mum CMOS compatible process with nine masking layers. In comparison with conventional SJ-LDMOSFETs, the fabricated SJ-FINFETs demonstrated approximately 30% improvement in Ron,sp. This is a positive indication that the SJ-FINFET can become a competitive power device for sub-100V rating applications.

  4. Voltage control of ferromagnetic resonance

    Directory of Open Access Journals (Sweden)

    Ziyao Zhou


    Full Text Available Voltage control of magnetism in multiferroics, where the ferromagnetism and ferroelectricity are simultaneously exhibiting, is of great importance to achieve compact, fast and energy efficient voltage controllable magnetic/microwave devices. Particularly, these devices are widely used in radar, aircraft, cell phones and satellites, where volume, response time and energy consumption is critical. Researchers realized electric field tuning of magnetic properties like magnetization, magnetic anisotropy and permeability in varied multiferroic heterostructures such as bulk, thin films and nanostructure by different magnetoelectric (ME coupling mechanism: strain/stress, interfacial charge, spin–electromagnetic (EM coupling and exchange coupling, etc. In this review, we focus on voltage control of ferromagnetic resonance (FMR in multiferroics. ME coupling-induced FMR change is critical in microwave devices, where the electric field tuning of magnetic effective anisotropic field determines the tunability of the performance of microwave devices. Experimentally, FMR measurement technique is also an important method to determine the small effective magnetic field change in small amount of magnetic material precisely due to its high sensitivity and to reveal the deep science of multiferroics, especially, voltage control of magnetism in novel mechanisms like interfacial charge, spin–EM coupling and exchange coupling.

  5. (ann) based dynamic voltage restorer

    African Journals Online (AJOL)


    artificial intelligence to provide smart triggering pulses for the DVR to mitigate and to provide compensation against voltage sags and swells. The Artificial Neural Network (ANN) was trained ... 90% of the nominal rms value and lasting for 0.5cycles. (10msec for 50Hz power system) up to 1 minute. It is considered as the most ...

  6. Nonlinear electrokinetics at large voltages

    Energy Technology Data Exchange (ETDEWEB)

    Bazant, Martin Z [Department of Chemical Engineering and Institute for Soldier Nanotechnologies, Massachusetts Institute of Technology, Cambridge, MA 02139 (United States); Sabri Kilic, Mustafa; Ajdari, Armand [Department of Mathematics, Massachusetts Institute of Technology, Cambridge, MA 02139 (United States); Storey, Brian D [Franklin W Olin College of Engineering, Needham, MA 02492 (United States)], E-mail:


    The classical theory of electrokinetic phenomena assumes a dilute solution of point-like ions in chemical equilibrium with a surface whose double-layer voltage is of order the thermal voltage, k{sub B}T/e=25 mV. In nonlinear 'induced-charge' electrokinetic phenomena, such as ac electro-osmosis, several volts {approx}100k{sub B}T/e are applied to the double layer, and the theory breaks down and cannot explain many observed features. We argue that, under such a large voltage, counterions 'condense' near the surface, even for dilute bulk solutions. Based on simple models, we predict that the double-layer capacitance decreases and the electro-osmotic mobility saturates at large voltages, due to steric repulsion and increased viscosity of the condensed layer, respectively. The former suffices to explain observed high-frequency flow reversal in ac electro-osmosis; the latter leads to a salt concentration dependence of induced-charge flows comparable to experiments, although a complete theory is still lacking.

  7. High-Voltage Droplet Dispenser (United States)

    Eichenberg, Dennis J.


    An apparatus that is extremely effective in dispensing a wide range of droplets has been developed. This droplet dispenser is unique in that it utilizes a droplet bias voltage, as well as an ionization pulse, to release a droplet. Apparatuses that deploy individual droplets have been used in many applications, including, notably, study of combustion of liquid fuels. Experiments on isolated droplets are useful in that they enable the study of droplet phenomena under well-controlled and simplified conditions. In this apparatus, a syringe dispenses a known value of liquid, which emerges from, and hangs onto, the outer end of a flat-tipped, stainless steel needle. Somewhat below the needle tip and droplet is a ring electrode. A bias high voltage, followed by a high-voltage pulse, is applied so as to attract the droplet sufficiently to pull it off the needle. The voltages are such that the droplet and needle are negatively charged and the ring electrode is positively charged.

  8. Voltage Weak DC Distribution Grids

    NARCIS (Netherlands)

    Hailu, T.G.; Mackay, L.J.; Ramirez Elizondo, L.M.; Ferreira, J.A.


    This paper describes the behavior of voltage weak DC distribution systems. These systems have relatively small system capacitance. The size of system capacitance, which stores energy, has a considerable effect on the value of fault currents, control complexity, and system reliability. A number of

  9. (SPWM) Voltage Source Inverter (VSI)

    African Journals Online (AJOL)

    The quest to achieve less-distorted dc-ac power conversion has resulted in the proliferation of many multilevel inverter configurations. This paper presents an experimental report of a simplified topology for single-phase, SPWM, three-level voltage source inverter wit R-L load. To keep the power circuit component count to a ...

  10. (ann) based dynamic voltage restorer

    African Journals Online (AJOL)


    artificial intelligence to provide smart triggering pulses for the DVR to mitigate and to provide compensation against ... the starting of large induction motor [6]. ... ANN-based DVR under voltage sags and swells phenomena. In this case, the ANN is trained off-line, and the trained network is employed for on-line control.

  11. High voltage MOSFET switching circuit (United States)

    McEwan, Thomas E.


    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET.

  12. Voltage-gated Proton Channels (United States)

    DeCoursey, Thomas E.


    Voltage-gated proton channels, HV1, have vaulted from the realm of the esoteric into the forefront of a central question facing ion channel biophysicists, namely the mechanism by which voltage-dependent gating occurs. This transformation is the result of several factors. Identification of the gene in 2006 revealed that proton channels are homologues of the voltage-sensing domain of most other voltage-gated ion channels. Unique, or at least eccentric, properties of proton channels include dimeric architecture with dual conduction pathways, perfect proton selectivity, a single-channel conductance ~103 smaller than most ion channels, voltage-dependent gating that is strongly modulated by the pH gradient, ΔpH, and potent inhibition by Zn2+ (in many species) but an absence of other potent inhibitors. The recent identification of HV1 in three unicellular marine plankton species has dramatically expanded the phylogenetic family tree. Interest in proton channels in their own right has increased as important physiological roles have been identified in many cells. Proton channels trigger the bioluminescent flash of dinoflagellates, facilitate calcification by coccolithophores, regulate pH-dependent processes in eggs and sperm during fertilization, secrete acid to control the pH of airway fluids, facilitate histamine secretion by basophils, and play a signaling role in facilitating B-cell receptor mediated responses in B lymphocytes. The most elaborate and best-established functions occur in phagocytes, where proton channels optimize the activity of NADPH oxidase, an important producer of reactive oxygen species. Proton efflux mediated by HV1 balances the charge translocated across the membrane by electrons through NADPH oxidase, minimizes changes in cytoplasmic and phagosomal pH, limits osmotic swelling of the phagosome, and provides substrate H+ for the production of H2O2 and HOCl, reactive oxygen species crucial to killing pathogens. PMID:23798303

  13. Tailoring the High-Q LC Filter Arrays for Readout of Kilo-Pixel TES Arrays in the SPICA-SAFARI Instrument (United States)

    Bruijn, M. P.; Gottardi, L.; den Hartog, R. H.; van der Kuur, J.; van der Linden, A. J.; Jackson, B. D.


    Following earlier presentations of arrays of high quality factor (Q 10.000) superconducting resonators in the MHz regime, we report on improvement of the packing density of resonance frequencies to 160 in the 1-3 MHz band. Spread in the spacing of resonances is found to be limited to 1 kHz (1 with the present fabrication procedure. The present packing density of frequencies and chip area approaches the requirements for the SAFARI instrument on the SPICA mission (in preparation). The a-Si:H dielectric layer in the planar S-I-S capacitors shows a presently unexplained apparent negative effective series resistance, depending on operating temperature and applied testing voltage.

  14. Liens entre genre psychologique, estime de soi corporelle et interactions enseignant d'EPS-élèves en lycée professionnel


    Moniotte, Julien; Druel , Vincent; Ségura, Clément


    Cet article a été rédigé à partir des données recueillies par les deuxième et troisième auteurs dans le cadre de la construction de leur mémoire de recherche lors de leurs deux années de Master MEEF parcours EPS.; A notre connaissance, peu d’études se sont intéressées à l’enseignement de l’EPS dans les lycées professionnels, notamment sur l’estime de soi corporelle des élèves fréquentant ces établissements. Le présent article s’intéresse aux liens entre estime de soi corporelle, genre psychol...

  15. A. Damasio. L’erreur de Descartes (1995) ; Le sentiment même de soi (1999) ; Spinoza avait raison (2003)


    Grandguillaume, Arnaud; Piroux, Charles


    Dans son premier livre qui l’a fait connaître au grand public, intitulé « l’erreur de Descartes », Antonio Damasio traite du rôle de l’émotion et du sentiment dans la prise de décision, en faisant référence à la théorie fonctionnaliste de W. James. Son deuxième livre, « le sentiment même de soi », nous éclaire sur le rôle des émotions et des sentiments dans la construction du soi. Enfin, dans son dernier ouvrage, « Spinoza avait raison », l’auteur concentre son propos sur les sentiments eux-m...

  16. 1.5-μm Directly modulated transmission over 66 km of SSMF with an integrated hybrid III-V/SOI DFB laser

    DEFF Research Database (Denmark)

    Cristofori, Valentina; Da Ros, Francesco; Chaibi, M. E.


    A hybrid III-V/SOI directly modulated DFB laser operating at 1.5 μο is fabricated, showing a side mode suppression ratio above 50 dB and a 3-dB bandwidth of 12 GHz. Error-free transmission (BER<10−9) at 10 Gb/s over 66-km SSMF is demonstrated without dispersion compensation and FEC.......A hybrid III-V/SOI directly modulated DFB laser operating at 1.5 μο is fabricated, showing a side mode suppression ratio above 50 dB and a 3-dB bandwidth of 12 GHz. Error-free transmission (BERkm SSMF is demonstrated without dispersion compensation and FEC....

  17. Over-voltage protection system and method (United States)

    Chi, Song; Dong, Dong; Lai, Rixin


    An over-voltage protection system includes an electronic valve connected across two terminals of a circuit and an over-voltage detection circuit connected across one of the plurality of semiconductor devices for detecting an over-voltage across the circuit. The electronic valve includes a plurality of semiconductor devices connected in series. The over-voltage detection circuit includes a voltage divider circuit connected to a break-over diode in a way to provide a representative low voltage to the break-over diode and an optocoupler configured to receive a current from the break-over diode when the representative low voltage exceeds a threshold voltage of the break-over diode indicating an over-voltage condition. The representative low voltage provided to the break-over diode represents a voltage across the one semiconductor device. A plurality of self-powered gate drive circuits are connected to the plurality of semiconductor devices, wherein the plurality of self-powered gate drive circuits receive over-voltage triggering pulses from the optocoupler during the over-voltage condition and switch on the plurality of semiconductor devices to bypass the circuit.


    Driver, G.E.


    High voltage, direct current power supplies are described for use with battery powered nuclear detection equipment. The particular advantages of the power supply described, are increased efficiency and reduced size and welght brought about by the use of transistors in the circuit. An important feature resides tn the employment of a pair of transistors in an alternatefiring oscillator circuit having a coupling transformer and other circuit components which are used for interconnecting the various electrodes of the transistors.

  19. Advances in high voltage engineering

    CERN Document Server

    Haddad, A


    This book addresses the very latest research and development issues in high voltage technology and is intended as a reference source for researchers and students in the field, specifically covering developments throughout the past decade. This unique blend of expert authors and comprehensive subject coverage means that this book is ideally suited as a reference source for engineers and academics in the field for years to come.



    Grigorash O. V.; Korzenkov P. G.; Popuchieva M. A.


    Synchronous generators are the primary source of electrical power autonomous electrosupply systems, including backup systems. They are also used in a structure of rotating electricity converters and are widely used in renewable energy as part of wind power plants of small, mini and micro hydroelectric plants. Increasing the speed and the accuracy of the system of the voltage regulation of synchronous generators is possible due to the development of combined systems containing more stabilizers...

  1. Low voltage electron beam accelerators

    Energy Technology Data Exchange (ETDEWEB)

    Ochi, Masafumi [Iwasaki Electric Co., Ltd., Tokyo (Japan)


    Widely used electron accelerators in industries are the electron beams with acceleration voltage at 300 kV or less. The typical examples are shown on manufactures in Japan, equipment configuration, operation, determination of process parameters, and basic maintenance requirement of the electron beam processors. New electron beam processors with acceleration voltage around 100 kV were introduced maintaining the relatively high dose speed capability of around 10,000 kGy x mpm at production by ESI (Energy Science Inc. USA, Iwasaki Electric Group). The application field like printing and coating for packaging requires treating thickness of 30 micron or less. It does not require high voltage over 110 kV. Also recently developed is a miniature bulb type electron beam tube with energy less than 60 kV. The new application area for this new electron beam tube is being searched. The drive force of this technology to spread in the industries would be further development of new application, process and market as well as the price reduction of the equipment, upon which further acknowledgement and acceptance of the technology to societies and industries would entirely depend. (Y. Tanaka)


    African Journals Online (AJOL)

    A study of hourly voltage log taken over a period of six months from Rumuola Distribution network Port Harcourt, Rivers State indicates that power quality problems prevalent in the Network are undervoltage/voltage sags and overvoltage/voltage swells. This paper aims at addressing these power quality problems in the ...

  3. 49 CFR 234.221 - Lamp voltage. (United States)


    ... 49 Transportation 4 2010-10-01 2010-10-01 false Lamp voltage. 234.221 Section 234.221 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION..., Inspection, and Testing Maintenance Standards § 234.221 Lamp voltage. The voltage at each lamp shall be...

  4. Image based overlay measurement improvements of 28nm FD-SOI CMOS front-end critical steps (United States)

    Dettoni, F.; Shapoval, T.; Bouyssou, R.; Itzkovich, T.; Haupt, R.; Dezauzier, C.


    Technology shrinkage leads to tight specifications in advanced semiconductor industries. For several years', metrology for lithography has been a key technology to address this challenge and to improve yield. More specifically overlay metrology is the object of special attention for tool suppliers and semiconductor manufacturers. This work focuses on Image Based Overlay (IBO) metrology for 28 nm FD-SOI CMOS front-end critical steps (gate and contact). With Overlay specifications below 10 nm, accuracy of the measurement is critical. In this study we show specific cases where target designs need to be optimized in order to minimize process effects (CMP, etch, deposition, etc.) that could lead to overlay measurement errors. Another important aspect of the metrology target is that its design must be device-like in order to better control and correct overlay errors leading to yield loss. Methodologies to optimize overlay metrology recipes are also presented. If the process effects cannot be removed entirely by target design optimization, recipe parameters have to be carefully chosen and controlled to minimize the influence of the target imperfection on measured overlay. With target asymmetry being one of the main contributors to those residual overlay measurement errors the Qmerit accuracy flag can be used to quantify the measurement error and recipe parameters can be set accordingly in order to minimize the target asymmetry impact. Reference technique measurements (CD-SEM) were used to check accuracy of the optimized overlay measurements.

  5. Photographie et représentation de soi dans W ou le Souvenir d’enfance de Georges Perec

    Directory of Open Access Journals (Sweden)

    Siriki Ouattara


    Full Text Available W ou le souvenir d’enfance convoque ouvertement en son sein des éléments paralittéraires comme la photographie qui le déconstruit. Le désir de Georges Perec de reconstituer ou de reconstruire son histoire est si ardent qu’il lui a consacré ce roman particulier. Dans cette œuvre autobiographique atypique, l’auteur fait appel à diverses techniques de représentation de soi, la photographie. Cette dernière est un élément nouveau en littérature (même s´elle y est prise en compte depuis le dix-neuvième siècle qui redéfinit nombre d´habitudes littéraires. Ainsi, elle occasionne un renouvellement de l´écriture à travers l´institution de nouveaux rapports qui, tout en changeant les vieux rôles narratifs, invitent à dire autrement, voire à raconter différemment. La photographie offre alors l´occasion d´expérimenter une nouvelle discursivité de la représentation.

  6. Three-Dimensional Wafer Stacking Using Cu TSV Integrated with 45 nm High Performance SOI-CMOS Embedded DRAM Technology

    Directory of Open Access Journals (Sweden)

    Pooja Batra


    Full Text Available For high-volume production of 3D-stacked chips with through-silicon-vias (TSVs, wafer-scale bonding offers lower production cost compared with bump bond technology and is promising for interconnect pitches smaller than 5 µ using available tooling. Prior work has presented wafer-scale integration with tungsten TSV for low-power applications. This paper reports the first use of low-temperature oxide bonding and copper TSV to stack high performance cache cores manufactured in 45 nm Silicon On Insulator-Complementary Metal Oxide Semiconductor (SOI-CMOS embedded DRAM (EDRAM having 12 to 13 copper wiring levels per strata and upto 11000 TSVs at 13 µm pitch for power and signal delivery. The wafers are thinned to 13 µm using grind polish and etch. TSVs are defined post bonding and thinning using conventional alignment techniques. Up to four additional metal levels are formed post bonding and TSV definition. A key feature of this process is its compatibility with the existing high performance POWER7™ EDRAM core requiring neither modification of the existing CMOS fabrication process nor re-design since the TSV RC characteristic is similar to typical 100–200 µm length wiring load enabling 3D macro-to-macro signaling without additional buffering Hardware measurements show no significant impact on device drive and off-current. Functional test at wafer level confirms 2.1 GHz 3D stacked EDRAM operation.

  7. 76 FR 70721 - Voltage Coordination on High Voltage Grids; Notice of Staff Workshop (United States)


    ... Energy Regulatory Commission Voltage Coordination on High Voltage Grids; Notice of Staff Workshop Take notice that the Federal Energy Regulatory Commission will hold a Workshop on Voltage Coordination on High Voltage Grids on Thursday, December 1, 2011 from 9 a.m. to 4:30 p.m. This staff-led workshop will be held...

  8. 76 FR 72203 - Voltage Coordination on High Voltage Grids; Notice of Reliability Workshop Agenda (United States)


    ... Energy Regulatory Commission Voltage Coordination on High Voltage Grids; Notice of Reliability Workshop... between voltage control, reliability, and economic dispatch. In addition, the Commission will consider how improvements to dispatch and voltage control software could improve reliability and market efficiency. This...

  9. Improving transition voltage spectroscopy of molecular junctions

    DEFF Research Database (Denmark)

    Markussen, Troels; Chen, Jingzhe; Thygesen, Kristian Sommer


    Transition voltage spectroscopy (TVS) is a promising spectroscopic tool for molecular junctions. The principles in TVS is to find the minimum on a Fowler-Nordheim plot where ln(I/V2) is plotted against 1/V and relate the voltage at the minimum Vmin to the closest molecular level. Importantly, Vmin...... is approximately half the voltage required to see a peak in the dI/dV curve. Information about the molecular level position can thus be obtained at relatively low voltages. In this work we show that the molecular level position can be determined at even lower voltages, Vmin(α), by finding the minimum of ln...

  10. A dynamic voltage restorer (DVR) with selective harmonic compensation at medium voltage level

    DEFF Research Database (Denmark)

    Newman, M.J.; Holmes, D.G.; Nielsen, J.G.


    Dynamic voltage restorers (DVRs) are now becoming more established in industry to reduce the impact of voltage sags to sensitive loads. However, DVRs spend most of their time in standby mode, since voltage sags occur very infrequently, and hence their utilization is low. In principle, it would...... voltage harmonic compensation capabilities with minimal effect on the sag compensation performance of the basic DVR. The proposed controller has been experimentally verified on a medium-voltage (10 kV) three-phase DVR prototype under a range of conditions, including distorted supply voltages, nonlinear...... loads, and operation during distorted voltage sags....

  11. Low power, scalable multichannel high voltage controller (United States)

    Stamps, James Frederick [Livermore, CA; Crocker, Robert Ward [Fremont, CA; Yee, Daniel Dadwa [Dublin, CA; Dils, David Wright [Fort Worth, TX


    A low voltage control circuit is provided for individually controlling high voltage power provided over bus lines to a multitude of interconnected loads. An example of a load is a drive for capillary channels in a microfluidic system. Control is distributed from a central high voltage circuit, rather than using a number of large expensive central high voltage circuits to enable reducing circuit size and cost. Voltage is distributed to each individual load and controlled using a number of high voltage controller channel switches connected to high voltage bus lines. The channel switches each include complementary pull up and pull down photo isolator relays with photo isolator switching controlled from the central high voltage circuit to provide a desired bus line voltage. Switching of the photo isolator relays is further controlled in each channel switch using feedback from a resistor divider circuit to maintain the bus voltage swing within desired limits. Current sensing is provided using a switched resistive load in each channel switch, with switching of the resistive loads controlled from the central high voltage circuit.

  12. Voltage Management in Unbalanced Low Voltage Networks Using a Decoupled Phase-Tap-Changer Transformer


    Coppo, Massimiliano; Turri, Roberto; Marinelli, Mattia; Han, Xue


    The paper studies a medium voltage-low voltage transformer with a decoupled on load tap changer capability on each phase. The overall objective is the evaluation of the potential benefits on a low voltage network of such possibility. A realistic Danish low voltage network is used for the analysis. The load profiles are characterized by using single phase measurement data on voltages, currents and active powers with a 10 minutes resolution. Different scenarios are considered: no tap action, th...

  13. 49 CFR 236.551 - Power supply voltage; requirement. (United States)


    ... 49 Transportation 4 2010-10-01 2010-10-01 false Power supply voltage; requirement. 236.551 Section... supply voltage; requirement. The voltage of power supply shall be maintained within 10 percent of rated voltage. ...

  14. Invention de soi et compétences à l’ère des réseaux sociaux

    Directory of Open Access Journals (Sweden)

    Daniel Apollon


    Full Text Available Les réseaux sociaux en ligne encouragent de nouvelles approches de la compétence centrées sur la construction biographique de l’individu et l’invention de soi. Ce nouvel art de faire des « produsagers », répond au besoin d’inventer une réponse individuelle et collective au sentiment aliénant de vacuité des sociétés post-industrielles et post-traditionnelles. Combinant opposition et soumission aux éléments structurants et aliénants de cette modernité tardive, ces produsagers réactualisent diverses ruses, tactiques et schèmes immémoriaux déjà explorés par divers auteurs avant Internet. Sur cette toile de fond, l’auteur propose une réinterprétation plus large de la notion de compétence.Social media practices encourage new approaches and visions of competence focusing on the construction of individual biography and the "invention of oneself". The new "artful skills" of "produsers" address the need to invent individual and collective responses to the sense of alienating emptiness pervading postindustrial and posttraditional societies. Combining and submission and opposition to both structuring and alienating aspects of late modernity, these produsagers actualize various tricks, tactics and immemorial schemes already mapped by various authors before the Internet. On this backdrop the author proposes a broader reinterpretation of the concept of competence.

  15. Analysis of photonic spot profile converter and bridge structure on SOI platform for horizontal and vertical integration (United States)

    Majumder, Saikat; Jha, Amit Kr.; Biswas, Aishik; Banerjee, Debasmita; Ganguly, Dipankar; Chakraborty, Rajib


    Horizontal spot size converter required for horizontal light coupling and vertical bridge structure required for vertical integration are designed on high index contrast SOI platform in order to form more compact integrated photonic circuits. Both the structures are based on the concept of multimode interference. The spot size converter can be realized by successive integration of multimode interference structures with reducing dimension on horizontal plane, whereas the optical bridge structure consists of a number of vertical multimode interference structure connected by single mode sections. The spot size converter can be modified to a spot profile converter when the final single mode waveguide is replaced by a slot waveguide. Analysis have shown that by using three multimode sections in a spot size converter, an Gaussian input having spot diameter of 2.51 μm can be converted to a spot diameter of 0.25 μm. If the output single mode section is replaced by a slot waveguide, this input profile can be converted to a flat top profile of width 50 nm. Similarly, vertical displacement of 8μm is possible by using a combination of two multimode sections and three single mode sections in the vertical bridge structure. The analyses of these two structures are carried out for both TE and TM modes at 1550 nm wavelength using the semi analytical matrix method which is simple and fast in computation time and memory. This work shows that the matrix method is equally applicable for analysis of horizontally as well as vertically integrated photonic circuit.

  16. Écritures autobiographiques, remémoration et mise en représentation de soi

    Directory of Open Access Journals (Sweden)

    Christine Plasse Bouteyre


    Full Text Available Une pratique d’écriture aussi liée que le « genre autobiographique » à la remémoration, à la construction et à la formalisation de l’identité personnelle, comme image de soi pour autrui et à la question essentielle de l’individualité dans la modernité ne saurait rester étrangère au questionnement sur le pourquoi et le comment de tels récits. Cette interrogation ne va pas sans quelques difficultés à la fois théoriques et méthodologiques. Tout au long des XIXème et XXème siècles, les professeurs français des différents ordres d’enseignement ont été amenés à rédiger des mémoires ou des souvenirs professionnels. Si certains de ces récits ont pu devenir célèbres ou passer à la postérité du fait de la notoriété de leurs auteurs, il semble bien que la quasi-totalité de la production littéraire produite par les différentes catégories d’enseignants soit tombée dans un impressionnant oubli. Pour comprendre la réalité de ces pratiques nous avons été conduit à étudier les différents aspects des récits autobiographiques rédigés par quelques professeurs de lettres de la Sorbonne entre 1880 et 1940.

  17. Thick-SOI Echelle grating for any-to-any wavelength routing interconnection in multi-socket computing environments (United States)

    Dabos, G.; Pitris, S.; Mitsolidou, C.; Alexoudi, T.; Fitsios, D.; Cherchi, M.; Harjanne, M.; Aalto, T.; Kanellos, G. T.; Pleros, N.


    As data centers constantly expand, electronic switches are facing the challenge of enhanced scalability and the request for increased pin-count and bandwidth. Photonic technology and wavelength division multiplexing have always been a strong alternative for efficient routing and their potential was already proven in the telecoms. CWDM transceivers have emerged in the board-to-board level interconnection, revealing the potential for wavelength-routing to be applied in the datacom and an AWGR-based approach has recently been proposed towards building an optical multi-socket interconnection to offer any-to-any connectivity with high aggregated throughput and reduced power consumption. Echelle gratings have long been recognized as the multiplexing block exhibiting smallest footprint and robustness in a wide number of applications compared to other alternatives such as the Arrayed Waveguide Grating. Such filtering devices can also perform in a similar way to cyclical AWGR and serve as mid-board routing platforms in multi-socket environments. In this communication, we present such a 3x3 Echelle grating integrated on thick SOI platform with aluminum-coated facets that is shown to perform successful wavelength-routing functionality at 10 Gb/s. The device exhibits a footprint of 60x270 μm2, while the static characterization showed a 3 dB on-chip loss for the best channel. The 3 dB-bandwidth of the channels was 4.5 nm and the free spectral range was 90 nm. The echelle was evaluated in a 2x2 wavelength routing topology, exhibiting a power penalty of below 0.4 dB at 10-9 BER for the C-band. Further experimental evaluations of the platform involve commercially available CWDM datacenter transceivers, towards emulating an optically-interconnected multi-socket environment traffic scenario.

  18. Power conditioning using dynamic voltage restorers under different voltage sag types

    Directory of Open Access Journals (Sweden)

    Ahmed M. Saeed


    Full Text Available Voltage sags can be symmetrical or unsymmetrical depending on the causes of the sag. At the present time, one of the most common procedures for mitigating voltage sags is by the use of dynamic voltage restorers (DVRs. By definition, a DVR is a controlled voltage source inserted between the network and a sensitive load through a booster transformer injecting voltage into the network in order to correct any disturbance affecting a sensitive load voltage. In this paper, modelling of DVR for voltage correction using MatLab software is presented. The performance of the device under different voltage sag types is described, where the voltage sag types are introduced using the different types of short-circuit faults included in the environment of the MatLab/Simulink package. The robustness of the proposed device is evaluated using the common voltage sag indices, while taking into account voltage and current unbalance percentages, where maintaining the total harmonic distortion percentage of the load voltage within a specified range is desired. Finally, several simulation results are shown in order to highlight that the DVR is capable of effective correction of the voltage sag while minimizing the grid voltage unbalance and distortion, regardless of the fault type.

  19. Power conditioning using dynamic voltage restorers under different voltage sag types. (United States)

    Saeed, Ahmed M; Abdel Aleem, Shady H E; Ibrahim, Ahmed M; Balci, Murat E; El-Zahab, Essam E A


    Voltage sags can be symmetrical or unsymmetrical depending on the causes of the sag. At the present time, one of the most common procedures for mitigating voltage sags is by the use of dynamic voltage restorers (DVRs). By definition, a DVR is a controlled voltage source inserted between the network and a sensitive load through a booster transformer injecting voltage into the network in order to correct any disturbance affecting a sensitive load voltage. In this paper, modelling of DVR for voltage correction using MatLab software is presented. The performance of the device under different voltage sag types is described, where the voltage sag types are introduced using the different types of short-circuit faults included in the environment of the MatLab/Simulink package. The robustness of the proposed device is evaluated using the common voltage sag indices, while taking into account voltage and current unbalance percentages, where maintaining the total harmonic distortion percentage of the load voltage within a specified range is desired. Finally, several simulation results are shown in order to highlight that the DVR is capable of effective correction of the voltage sag while minimizing the grid voltage unbalance and distortion, regardless of the fault type.

  20. Silicone elastomers with aromatic voltage stabilizers

    DEFF Research Database (Denmark)

    A Razak, Aliff Hisyam; Skov, Anne Ladegaard

    elastomers with high relative permittivity and low Young’s modulus in order to increase the actuation performance at a given voltage, but the optimised elastomers often possess relatively low electrical breakdown strength. On the other hand, increasing the electrical breakdown strength of DEs allows...... modifications. In order to increase the electrical breakdown strength of polymers for e.g. the cable industry, additives like aromatic voltage stabilizers are used. Earlier works on using voltage stabilizers in polymers have mainly focused on polyethylene with the purpose of reducing power loss for high voltage...... insulation cables.3–5 As an alternative to utilise additives as voltage stabilizers, grafting aromatic compounds to silicone backbones may overcome the common problem of insolubility of the aromatic voltage stabilizer in the silicone elastomers due to phase separation. Preventing phase separation during...

  1. Voltage-Controlled Floating Resistor Using DDCC

    Directory of Open Access Journals (Sweden)

    M. Kumngern


    Full Text Available This paper presents a new simple configuration to realize the voltage-controlled floating resistor, which is suitable for integrated circuit implementation. The proposed resistor is composed of three main components: MOS transistor operating in the non-saturation region, DDCC, and MOS voltage divider. The MOS transistor operating in the non-saturation region is used to configure a floating linear resistor. The DDCC and the MOS transistor voltage divider are used for canceling the nonlinear component term of MOS transistor in the non-saturation region to obtain a linear current/voltage relationship. The DDCC is employed to provide a simple summer of the circuit. This circuit offers an ease for realizing the voltage divider circuit and the temperature effect that includes in term of threshold voltage can be compensated. The proposed configuration employs only 16 MOS transistors. The performances of the proposed circuit are simulated with PSPICE to confirm the presented theory.

  2. High-voltage power supply unit

    CERN Document Server

    Garipov, G K; Silaev, A A; Shirokov, A V


    A unit comprising four high-voltage power sources (HPS) is designed for power supply of four independent photomultipliers. Each HPS comprises a pulse-width modulator, digital-to-analog converter, base voltage source and digital interface. HPS unit supplies up to 2000 V output voltage, up to 2.5 mA current and long-term stability equal to +- 0.03%

  3. Technical feasibility study of Voltage Optimization Unit

    DEFF Research Database (Denmark)

    Hu, Junjie; Marinelli, Mattia; Coppo, Massimiliano

    is performed using the soft-wares DigSilent PowerFactory and Matlab. In this simulation study, a real low voltage network from Dong Eldistribution is modeled in Powerfactory. The measured data of the real low voltage network is analyzed and the resulting loading profiles including active and reactive power...... are used as load basics for the analysis. In term of PV genera-tion profiles, a realistic PV output power is assumed. Four relevant indicies such as phase neutral voltage, netural potential voltage, unbalanced factor (VUF), and power losses are evaluated in the present study. The simulation tests include...

  4. Excitation of voltage oscillations in an induction voltage adder

    Directory of Open Access Journals (Sweden)

    Nichelle Bruner


    Full Text Available The induction voltage adder is an accelerator architecture used in recent designs of pulsed-power driven x-ray radiographic systems such as Sandia National Laboratories’ Radiographic Integrated Test Stand (RITS, the Atomic Weapons Establishment’s planned Hydrus Facility, and the Naval Research Laboratory’s Mercury. Each of these designs relies on magnetic insulation to prevent electron loss across the anode-cathode gap in the vicinity of the adder as well as in the coaxial transmission line. Particle-in-cell simulations of the RITS adder and transmission line show that, as magnetic insulation is being established during a pulse, some electron loss occurs across the gap. Sufficient delay in the cavity pulse timings provides an opportunity for high-momentum electrons to deeply penetrate the cavities of the adder cells where they can excite radio-frequency resonances. These oscillations may be amplified in subsequent gaps, resulting in oscillations in the output power. The specific modes supported by the RITS-6 accelerator and details of the mechanism by which they are excited are presented in this paper.

  5. Enhancement of AC high voltage measurements’ uncertainty using a high voltage divider calibration method

    Directory of Open Access Journals (Sweden)

    El-Rifaie Ali M.


    Full Text Available This paper discusses enhancing of the measurements’ uncertainty for AC high voltage up to 100 kV. This is achieved by using a high voltage divider calibration method. Voltage measurements have been carried out at the Egyptian national institute for standards (NIS, using a high voltage measuring system (Phenix-KVM100, that consists of a high voltage divider and a voltage display. The voltage divider and display have been calibrated in low and high voltage ranges. Reference standard digital voltmeter and a multifunction calibrator have been used to calibrate the KVM100 for achieving accurate and traceable results. All calibrations have been performed automatically using Laboratory Virtual Instrument Engineering Workbench (LabVIEW programs specially designed for this task. Uncertainty budget has been evaluated to get the measurements’ expanded uncertainties.

  6. Evaluation of the Voltage Support Strategies for the Low Voltage Grid Connected PV

    DEFF Research Database (Denmark)

    Demirok, Erhan; Sera, Dezso; Teodorescu, Remus


    Admissible range of grid voltage is one of the strictest constraints for the penetration of distributed photovoltaic (PV) generators especially connection to low voltage (LV) public networks. Voltage limits are usually fulfilled either by network reinforcements or limiting of power injections fro...

  7. Voltage-Sensitive Load Controllers for Voltage Regulation and Increased Load Factor in Distribution Systems

    DEFF Research Database (Denmark)

    Douglass, Philip James; Garcia-Valle, Rodrigo; Østergaard, Jacob


    This paper presents a novel controller design for controlling appliances based on local measurements of voltage. The controller finds the normalized voltage deviation accounting for the sensitivity of voltage measurements to appliance state. The controller produces a signal indicating desired pow...

  8. Voltage stability in low voltage microgrids in aspects of active and reactive power demand

    Directory of Open Access Journals (Sweden)

    Parol Mirosław


    Full Text Available Low voltage microgrids are autonomous subsystems, in which generation, storage and power and electrical energy consumption appear. In the paper the main attention has been paid to the voltage stability issue in low voltage microgrid for different variants of its operation. In the introduction a notion of microgrid has been presented, and also the issue of influence of active and reactive power balance on node voltage level has been described. Then description of voltage stability issue has been presented. The conditions of voltage stability and indicators used to determine voltage stability margin in the microgrid have been described. Description of the low voltage test microgrid, as well as research methodology along with definition of considered variants of its operation have been presented further. The results of exemplary calculations carried out for the daily changes in node load of the active and reactive power, i.e. the voltage and the voltage stability margin indexes in nodes have been presented. Furthermore, the changes of voltage stability margin indexes depending on the variant of the microgrid operation have been presented. Summary and formulation of conclusions related to the issue of voltage stability in microgrids have been included at the end of the paper.

  9. High-voltage engineering and testing

    CERN Document Server

    Ryan, Hugh M


    This 3rd edition of High Voltage Engineering Testing describes strategic developments in the field and reflects on how they can best be managed. All the key components of high voltage and distribution systems are covered including electric power networks, UHV and HV. Distribution systems including HVDC and power electronic systems are also considered.

  10. Reduced Voltage Scaling in Clock Distribution Networks

    Directory of Open Access Journals (Sweden)

    Khader Mohammad


    Full Text Available We propose a novel circuit technique to generate a reduced voltage swing (RVS signals for active power reduction on main buses and clocks. This is achieved without performance degradation, without extra power supply requirement, and with minimum area overhead. The technique stops the discharge path on the net that is swinging low at a certain voltage value. It reduces active power on the target net by as much as 33% compared to traditional full swing signaling. The logic 0 voltage value is programmable through control bits. If desired, the reduced-swing mode can also be disabled. The approach assumes that the logic 0 voltage value is always less than the threshold voltage of the nMOS receivers, which eliminate the need of the low to high voltage translation. The reduced noise margin and the increased leakage on the receiver transistors using this approach have been addressed through the selective usage of multithreshold voltage (MTV devices and the programmability of the low voltage value.

  11. Modeling and Simulation of Low Voltage Arcs

    NARCIS (Netherlands)

    Ghezzi, L.; Balestrero, A.


    Modeling and Simulation of Low Voltage Arcs is an attempt to improve the physical understanding, mathematical modeling and numerical simulation of the electric arcs that are found during current interruptions in low voltage circuit breakers. An empirical description is gained by refined electrical

  12. Low-Voltage Continuous Electrospinning Patterning. (United States)

    Li, Xia; Li, Zhaoying; Wang, Liyun; Ma, Guokun; Meng, Fanlong; Pritchard, Robyn H; Gill, Elisabeth L; Liu, Ye; Huang, Yan Yan Shery


    Electrospinning is a versatile technique for the construction of microfibrous and nanofibrous structures with considerable potential in applications ranging from textile manufacturing to tissue engineering scaffolds. In the simplest form, electrospinning uses a high voltage of tens of thousands volts to draw out ultrafine polymer fibers over a large distance. However, the high voltage limits the flexible combination of material selection, deposition substrate, and control of patterns. Prior studies show that by performing electrospinning with a well-defined "near-field" condition, the operation voltage can be decreased to the kilovolt range, and further enable more precise patterning of fibril structures on a planar surface. In this work, by using solution dependent "initiators", we demonstrate a further lowering of voltage with an ultralow voltage continuous electrospinning patterning (LEP) technique, which reduces the applied voltage threshold to as low as 50 V, simultaneously permitting direct fiber patterning. The versatility of LEP is shown using a wide range of combination of polymer and solvent systems for thermoplastics and biopolymers. Novel functionalities are also incorporated when a low voltage mode is used in place of a high voltage mode, such as direct printing of living bacteria; the construction of suspended single fibers and membrane networks. The LEP technique reported here should open up new avenues in the patterning of bioelements and free-form nano- to microscale fibrous structures.

  13. Very low and broad threshold voltage fluctuation caused by ion implantation to silicon-on-insulator triple-gate fin-type field effect transistor using three-dimensional process and device simulations (United States)

    Tsutsumi, Toshiyuki


    The threshold voltage (V th) fluctuation induced by the ion implantation to the source and drain extensions (SDE) of a silicon-on-insulator (SOI) triple-gate (tri-gate) fin-type field-effect transistor (FinFET) was analyzed for the first time with the use of realistic positional information of discretely doped ions by both three-dimensional (3D) process and device simulations. Interestingly, it was found that the V th fluctuation induced by SDE ion implantation has a very low and broad distribution on the low-V th side even in the case of a robust device structure such as SOI tri-gate FinFET. Furthermore, for the first time, it was quantitatively demonstrated using a proposed cluster percolation model that the origin of the very low and broad V th fluctuation is the conductive percolation among unintentionally doped ions in the channel region of the device. These results would contribute to the realization of robust transistors.

  14. arXiv Charge collection properties in an irradiated pixel sensor built in a thick-film HV-SOI process

    CERN Document Server

    INSPIRE-00541780; Cindro, V.; Gorišek, A.; Hemperek, T.; Kishishita, T.; Kramberger, G.; Krüger, H.; Mandić, I.; Mikuž, M.; Wermes, N.; Zavrtanik, M.


    Investigation of HV-CMOS sensors for use as a tracking detector in the ATLAS experiment at the upgraded LHC (HL-LHC) has recently been an active field of research. A potential candidate for a pixel detector built in Silicon-On-Insulator (SOI) technology has already been characterized in terms of radiation hardness to TID (Total Ionizing Dose) and charge collection after a moderate neutron irradiation. In this article we present results of an extensive irradiation hardness study with neutrons up to a fluence of 1x10e16 neq/cm2. Charge collection in a passive pixelated structure was measured by Edge Transient Current Technique (E-TCT). The evolution of the effective space charge concentration was found to be compliant with the acceptor removal model, with the minimum of the space charge concentration being reached after 5x10e14 neq/cm2. An investigation of the in-pixel uniformity of the detector response revealed parasitic charge collection by the epitaxial silicon layer characteristic for the SOI design. The r...

  15. Edge Couplers with relaxed Alignment Tolerance for Pick-and-Place Hybrid Integration of III-V Lasers with SOI Waveguides

    CERN Document Server

    Romero-García, Sebastian; Merget, Florian; Shen, Bin; Witzens, Jeremy


    We report on two edge-coupling and power splitting devices for hybrid integration of III-V lasers with sub-micrometric silicon-on-insulator (SOI) waveguides. The proposed devices relax the horizontal alignment tolerances required to achieve high coupling efficiencies and are suitable for passively aligned assembly with pick-and-place tools. Light is coupled to two on-chip single mode SOI waveguides with almost identical power coupling efficiency, but with a varying relative phase accommodating the lateral misalignment between the laser diode and the coupling devices, and is suitable for the implementation of parallel optics transmitters. Experimental characterization with both a lensed fiber and a Fabry-P\\'erot semiconductor laser diode has been performed. Excess insertion losses (in addition to the 3 dB splitting) taken as the worst case over both waveguides of respectively 2 dB and 3.1 dB, as well as excellent 1 dB horizontal loss misalignment ranges of respectively 2.8 um and 3.8 um (worst case over both i...

  16. Analog and radio-frequency (RF) performance evaluation of fully-depleted (FD) recessed-source/drain (Re-S/D) SOI MOSFETs (United States)

    Saramekala, Gopi Krishna; Dubey, Sarvesh; Tiwari, Pramod Kumar


    Ultrathin-body (UTB) SOI MOSFETs, which possess excellent short-channel effect immunity and high current on-off ratio, are expected to put back the conventional MOSFETs in high performance digital integrated circuits by the end of year 2014 to continue the current scaling trend. In this paper, targeting systems-on-a-chip (SOC) applications, a simulation based extensive study is carried out to evaluate the analog and RF performance of source/drain and gate engineered ultrathin body SOI MOSFETs, as both the digital and analog performance of the device must be excellent for SOC applications. The performance evaluation has been done in terms of device parameters like device capacitances (Cgs and Cgd), drain current (Id), transconductance (gm), transconductance generation efficiency (gm/Id), intrinsic gain (gm/gd), cut-off frequency (fT) and the maximum frequency of oscillation (fmax). The RF figures-of-merit (FoM) i.e., fT and fmax have been determined by using H and Y parameters obtained from high frequency simulation of the structure. The numerical simulation is performed using ATLASTM, a 2-D device simulator from SILVACO Inc.

  17. L’empathie comme outil herméneutique du soi: Note sur Paul Ricœur et Heinz Kohut

    Directory of Open Access Journals (Sweden)

    Michel Dupuis


    Full Text Available Le bref texte que Paul Ricœur consacre en 1986 à la psychanalyse développée par Heinz Kohut révèle une réinterprétation phénoménologique à la fois du contenu et des fonctions de l'empathie, au total considérée comme un véritable outil à l'œuvre dans l'herméneutique du soi. La vision kohutienne de la constitution du soi et du processus thérapeutique analytique produit une espèce de “dé-sentimentalisation” de l'empathie, en soulignant le rôle crucial du transfert intersubjectif, fort à distance de la théorie (freudienne solipsiste de l'ego.The short text published in 1986 by Paul Ricoeur about Heinz Kohut's psychoanalysis of the self reveals a phenomenological reinterpretation of the content and the functions of empathy, finally considered as an effective tool of the hermeneutics of the self. Kohut's model of constitution of the self and of the therapeutic analytical process produces a kind of “de-sentimentalization” of empathy, pointing to the crucial role of intersubjective transfer, far from a (Freudian solipsistic theory of the ego.

  18. Voltage-gated lipid ion channels

    DEFF Research Database (Denmark)

    Blicher, Andreas; Heimburg, Thomas Rainer


    probability as a function of voltage. The voltage-dependence of the lipid pores is found comparable to that of protein channels. Lifetime distributions of open and closed events indicate that the channel open distribution does not follow exponential statistics but rather power law behavior for long open times......Synthetic lipid membranes can display channel-like ion conduction events even in the absence of proteins. We show here that these events are voltage-gated with a quadratic voltage dependence as expected from electrostatic theory of capacitors. To this end, we recorded channel traces and current...... histograms in patch-experiments on lipid membranes. We derived a theoretical current-voltage relationship for pores in lipid membranes that describes the experimental data very well when assuming an asymmetric membrane. We determined the equilibrium constant between closed and open state and the open...

  19. Coordinated Voltage Control of Active Distribution Network

    Directory of Open Access Journals (Sweden)

    Xie Jiang


    Full Text Available This paper presents a centralized coordinated voltage control method for active distribution network to solve off-limit problem of voltage after incorporation of distributed generation (DG. The proposed method consists of two parts, it coordinated primal-dual interior point method-based voltage regulation schemes of DG reactive powers and capacitors with centralized on-load tap changer (OLTC controlling method which utilizes system’s maximum and minimum voltages, to improve the qualified rate of voltage and reduce the operation numbers of OLTC. The proposed coordination has considered the cost of capacitors. The method is tested using a radial edited IEEE-33 nodes distribution network which is modelled using MATLAB.

  20. Non-contact current and voltage sensor (United States)

    Carpenter, Gary D; El-Essawy, Wael; Ferreira, Alexandre Peixoto; Keller, Thomas Walter; Rubio, Juan C; Schappert, Michael A


    A detachable current and voltage sensor provides an isolated and convenient device to measure current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing that contains the current and voltage sensors, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternative a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage.

  1. Practical considerations in voltage stability assessment

    Energy Technology Data Exchange (ETDEWEB)

    Kundur, P.; Gao, B. [Powertech Labs. Inc., Surrey, BC (Canada)


    This paper deals with some of the most important practical issues related to voltage stability assessment of large practical systems. A brief discussion of the practical aspects of voltage stability problem and prevention of voltage instability is given first, followed by descriptions of different analytical techniques and tools for voltage stability analysis. Presentations of analytical tools is focused on the VSTAB program which incorporates the modal analysis, continuation power flow, and shortest distance to instability techniques, Finally, an example case study of a practical large system is presented. The case study illustrates how modal analysis is used to determine the most effective load shedding scheme for preventing voltage instability. (author) 15 refs., 2 figs., 2 tabs.

  2. Hysteresis in voltage-gated channels. (United States)

    Villalba-Galea, Carlos A


    Ion channels constitute a superfamily of membrane proteins found in all living creatures. Their activity allows fast translocation of ions across the plasma membrane down the ion's transmembrane electrochemical gradient, resulting in a difference in electrical potential across the plasma membrane, known as the membrane potential. A group within this superfamily, namely voltage-gated channels, displays activity that is sensitive to the membrane potential. The activity of voltage-gated channels is controlled by the membrane potential, while the membrane potential is changed by these channels' activity. This interplay produces variations in the membrane potential that have evolved into electrical signals in many organisms. These signals are essential for numerous biological processes, including neuronal activity, insulin release, muscle contraction, fertilization and many others. In recent years, the activity of the voltage-gated channels has been observed not to follow a simple relationship with the membrane potential. Instead, it has been shown that the activity of voltage-gated channel displays hysteresis. In fact, a growing number of evidence have demonstrated that the voltage dependence of channel activity is dynamically modulated by activity itself. In spite of the great impact that this property can have on electrical signaling, hysteresis in voltage-gated channels is often overlooked. Addressing this issue, this review provides examples of voltage-gated ion channels displaying hysteretic behavior. Further, this review will discuss how Dynamic Voltage Dependence in voltage-gated channels can have a physiological role in electrical signaling. Furthermore, this review will elaborate on the current thoughts on the mechanism underlying hysteresis in voltage-gated channels.

  3. Voltage Management in Unbalanced Low Voltage Networks Using a Decoupled Phase-Tap-Changer Transformer

    DEFF Research Database (Denmark)

    Coppo, Massimiliano; Turri, Roberto; Marinelli, Mattia


    The paper studies a medium voltage-low voltage transformer with a decoupled on load tap changer capability on each phase. The overall objective is the evaluation of the potential benefits on a low voltage network of such possibility. A realistic Danish low voltage network is used for the analysis....... The load profiles are characterized by using single phase measurement data on voltages, currents and active powers with a 10 minutes resolution. Different scenarios are considered: no tap action, three-phase coordinated tap action, single phase discrete step and single phase continuous tap action...

  4. Fuel Cell/Electrochemical Cell Voltage Monitor (United States)

    Vasquez, Arturo


    A concept has been developed for a new fuel cell individual-cell-voltage monitor that can be directly connected to a multi-cell fuel cell stack for direct substack power provisioning. It can also provide voltage isolation for applications in high-voltage fuel cell stacks. The technology consists of basic modules, each with an 8- to 16-cell input electrical measurement connection port. For each basic module, a power input connection would be provided for direct connection to a sub-stack of fuel cells in series within the larger stack. This power connection would allow for module power to be available in the range of 9-15 volts DC. The relatively low voltage differences that the module would encounter from the input electrical measurement connection port, coupled with the fact that the module's operating power is supplied by the same substack voltage input (and so will be at similar voltage), provides for elimination of high-commonmode voltage issues within each module. Within each module, there would be options for analog-to-digital conversion and data transfer schemes. Each module would also include a data-output/communication port. Each of these ports would be required to be either non-electrical (e.g., optically isolated) or electrically isolated. This is necessary to account for the fact that the plurality of modules attached to the stack will normally be at a range of voltages approaching the full range of the fuel cell stack operating voltages. A communications/ data bus could interface with the several basic modules. Options have been identified for command inputs from the spacecraft vehicle controller, and for output-status/data feeds to the vehicle.

  5. Fully-etched apodized fiber-to-chip grating coupler on the SOI platform with -0.78 dB coupling efficiency using photonic crystals and bonded Al mirror

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ou, Haiyan; Peucheret, Christophe


    We design and fabricate an ultra-high coupling efficiency fully-etched apodized grating coupler on the SOI platform using photonic crystals and bonded aluminum mirror. Ultra-high coupling efficiency of -0.78 dB with a 3 dB bandwidth of 74 nm are demonstrated....

  6. Mourir chez soi (United States)

    Kiyanda, Brigitte Gagnon; Dechêne, Geneviève; Marchand, Robert


    Résumé Objectif Démontrer que des infirmières dédiées en soins palliatifs d’un centre local de services communautaires (CLSC) urbain peuvent garder à domicile jusqu’au décès plus de 50 % de leurs patients en fin de vie et que le suivi médical à domicile est un facteur déterminant du décès à domicile. Type d’étude Analyse du lieu de décès des patients décédés en 2012 et 2013 suivis par les infirmières dédiées (N = 212), en fonction du suivi médical. Contexte Soins palliatifs du CLSC de Verdun, un territoire urbain situé dans le sud-ouest de Montréal. Participants Un total de 212 patients en fin de vie décédés en 2012 et 2013, suivis par 3 infirmières dédiées en soins palliatifs. Principaux paramètres à l’étude Le pourcentage de décès à domicile. Résultats Des 212 patients suivis à domicile par les infirmières en soins palliatifs, 56,6 % sont décédés à domicile, 62,6 % lorsque suivis par des médecins à domicile du CLSC, contre 5,0 % lorsque sans médecin à domicile. Conclusion Le développement des services médicaux à domicile au Québec, couplé à une simple restructuration des services de soins infirmiers des CLSC, permettrait à plus de 50 % des patients en fin de vie à domicile suivis par ces CLSC d’y demeurer jusqu’au décès, le souhait d’une majorité.

  7. High voltage electricity installations a planning perspective

    CERN Document Server

    Jay, Stephen Andrew


    The presence of high voltage power lines has provoked widespread concern for many years. High Voltage Electricity Installations presents an in-depth study of policy surrounding the planning of high voltage installations, discussing the manner in which they are percieved by the public, and the associated environmental issues. An analysis of these concerns, along with the geographical, environmental and political influences that shape their expression, is presented. Investigates local planning policy in an area of the energy sector that is of highly topical environmental and public concern Cover

  8. Direct observation of voltage barriers in ZnO varistors (United States)

    Krivanek, O. L.; Williams, P.; Lin, Y.-C.


    Voltage barriers in a ZnO varistor have been imaged by voltage-contrast scanning electron microscopy. They are due to grain boundaries and are capable of supporting voltage differences of up to about 4 V.

  9. Thermal Loss in High-Q Antennas

    DEFF Research Database (Denmark)

    Barrio, Samantha Caporal Del; Bahramzy, Pevand; Svendsen, Simon


    Tunable antennas are very promising for future generations of mobile communications, where antennas are required to cover a wide range operating bands. This letter aims at characterizing the loss mechanism of tunable antennas. Tunable antennas typically exhibit a high Quality factor (Q), which can...

  10. N*(1535) electroproduction at high Q2

    Energy Technology Data Exchange (ETDEWEB)

    G. Ramalho, M.T. Pena, K. Tsushima


    A covariant spectator quark model is applied to study the {gamma}N {yields} N*(1535) reaction in the large Q{sup 2} region. Starting from the relation between the nucleon and N*(1535) systems, the N*(1535) valence quark wave function is determined without the addition of any parameters. The model is then used to calculate the {gamma}N {yields} N*(1535) transition form factors. A very interesting, useful relation between the A{sub 1/2} and S{sub 1/2} helicity amplitudes for Q{sup 2} > GeV{sup 2}, is also derived.

  11. High-Q antennas: Simulator limitations

    DEFF Research Database (Denmark)

    Barrio, Samantha Caporal Del; Pedersen, Gert Frølund


    Increasing the mesh steps - i.e. the accuracy of the model - of a structure leads to converging results towards reality. With high-field structures, discretization of the domain in a transient simulation becomes of important matter. It is shown in this work that for these structures convergence...

  12. High voltage and electrical insulation engineering

    CERN Document Server

    Arora, Ravindra


    "The book is written for students as well as for teachers and researchers in the field of High Voltage and Insulation Engineering. It is based on the advance level courses conducted at TU Dresden, Germany and Indian Institute of Technology Kanpur, India. The book has a novel approach describing the fundamental concept of field dependent behavior of dielectrics subjected to high voltage. There is no other book in the field of high voltage engineering following this new approach in describing the behavior of dielectrics. The contents begin with the description of fundamental terminology in the subject of high voltage engineering. It is followed by the classification of electric fields and the techniques of field estimation. Performance of gaseous, liquid and solid dielectrics under different field conditions is described in the subsequent chapters. Separate chapters on vacuum as insulation and the lightning phenomenon are included"--

  13. Pyrotechnic Simulator/Stray-Voltage Detector (United States)

    Greenfield, Terry


    The concept for a dual test item has been developed for use in simulating live initiators/detonators during ground testing to verify the proper operation of the safing and firing circuitry for ground and flight systems ordnance as well as continuous monitoring for any stray voltages. Previous ordnance simulators have consisted of fuses, flash bulbs, inert devices with bridge wires, and actual live ordnance items mounted in test chambers. Stray voltage detectors have included devices connected to the firing circuits for continuous monitoring and a final no-voltage test just prior to ordnance connection. The purpose of this combined ordnance simulation and stray-voltage detection is to provide an improved and comprehensive method to ensure the ordnance circuitry is verified safe and operational.

  14. Compact, Lightweight, High Voltage Propellant Isolators Project (United States)

    National Aeronautics and Space Administration — TA&T, Inc. proposes an enabling fabrication process for high voltage isolators required in high power solar electric and nuclear electric propulsion (SEP and...

  15. Cascode-based voltage-amplifier stage

    Directory of Open Access Journals (Sweden)

    Pospisilik Martin


    Full Text Available Voltage-amplifier stages are the basic components of commonly used high gain amplifiers the bias and other parameters of whose are set by the external negative feedback. The typical device that uses the voltage-amplifier stage is the operational amplifier. Similar constructions can also be created on the basis of discrete transistors. From the circuit designer’s point of view, the voltage-amplifier stage defines the crucial parameters of the whole unit - the amplification factor, dominant pole of its transfer function and the slew rate. In this paper the proposal on construction of the voltage-amplifier stage based on discrete transistors is described. When connected between the input differential amplifier and the output stage, it allows creating of cheap amplifier for HiFi applications with considerable performance.

  16. Modular high voltage power supply for chemical analysis (United States)

    Stamps, James F [Livermore, CA; Yee, Daniel D [Dublin, CA


    A high voltage power supply for use in a system such as a microfluidics system, uses a DC-DC converter in parallel with a voltage-controlled resistor. A feedback circuit provides a control signal for the DC-DC converter and voltage-controlled resistor so as to regulate the output voltage of the high voltage power supply, as well as, to sink or source current from the high voltage supply.

  17. Ultra-low Voltage CMOS Cascode Amplifier

    DEFF Research Database (Denmark)

    Lehmann, Torsten; Cassia, Marco


    In this paper, we design a folded cascode operational transconductance amplifier in a standard CMOS process, which has a measured 69 dB DC gain, a 2 MHz bandwidth and compatible input- and output voltage levels at a 1 V power supply. This is done by a novel Current Driven Bulk (CDB) technique......, which reduces the MOST threshold voltage by forcing a constant current though the transistor bulk terminal. We also look at limitations and improvements of this CDB technique....

  18. Voltage, Temperature, Frequency Margin Test Report

    DEFF Research Database (Denmark)

    Denver, Troelz


    The purpose of the tests is to establish the camera functionality when it is exposed to an extreme environment for prolonged periods, thus simulating the end of life performance. This environment covers temperature, input clock frequency and supply voltage variation......The purpose of the tests is to establish the camera functionality when it is exposed to an extreme environment for prolonged periods, thus simulating the end of life performance. This environment covers temperature, input clock frequency and supply voltage variation...

  19. RF Voltage Measurements on ICRF Antennas (United States)

    Bell, G. L.; Goulding, R. H.; Hoffman, D. J.; Wilgen, J. B.; Zhang, H. M.; Ryan, P. M.; Syed, G. M. S.; Kaye, A. S.


    Particle and heat flux on the plasma facing surfaces of high-power RF antennas used in fusion devices can result in damage to the antenna structures. High impedance capacitive probe measurements of the RF voltages on Faraday shields of several loop antennas indicate that voltages as high as 30% of the drive voltage can exist for 0/0 phasing (D.J. Hoffman, et al., AIP Conf. Proc. 355), 368 (Palm Spgs., CA, 1995).. These voltages can contribute to increased energy deposition on the antenna owing to increased RF sheath voltages. We report on continued efforts to understand the source and to control these RF voltages. E and B field distributions have been measured on the mock-up of the JET A2 antenna using standard B-dot probes and novel E-field probes positioned with a new automated scanning system. These data are compared with calculated fields from 3-D antenna models. The measurements demonstrate the dependency of the surface E-fields on the phasing of the strap currents and show the charge accumulation at the antenna top and bottom predicted by the models.

  20. VKCDB: Voltage-gated potassium channel database

    Directory of Open Access Journals (Sweden)

    Gallin Warren J


    Full Text Available Abstract Background The family of voltage-gated potassium channels comprises a functionally diverse group of membrane proteins. They help maintain and regulate the potassium ion-based component of the membrane potential and are thus central to many critical physiological processes. VKCDB (Voltage-gated potassium [K] Channel DataBase is a database of structural and functional data on these channels. It is designed as a resource for research on the molecular basis of voltage-gated potassium channel function. Description Voltage-gated potassium channel sequences were identified by using BLASTP to search GENBANK and SWISSPROT. Annotations for all voltage-gated potassium channels were selectively parsed and integrated into VKCDB. Electrophysiological and pharmacological data for the channels were collected from published journal articles. Transmembrane domain predictions by TMHMM and PHD are included for each VKCDB entry. Multiple sequence alignments of conserved domains of channels of the four Kv families and the KCNQ family are also included. Currently VKCDB contains 346 channel entries. It can be browsed and searched using a set of functionally relevant categories. Protein sequences can also be searched using a local BLAST engine. Conclusions VKCDB is a resource for comparative studies of voltage-gated potassium channels. The methods used to construct VKCDB are general; they can be used to create specialized databases for other protein families. VKCDB is accessible at

  1. Prediction of breakdown voltages in novel gases for high voltage insulation

    Energy Technology Data Exchange (ETDEWEB)

    Koch, M.


    This thesis submitted to the Swiss Federal Institute of Technology ETH in Zurich examines the use of sulphur hexafluoride (SF{sub 6}) and similar gases as important insulation media for high voltage equipment. Due to its superior insulation properties, SF{sub 6} is widely used in gas-insulated switchgear. However, the gas also has a very high global warming potential and the content of SF{sub 6} in the atmosphere is constantly increasing. The search for new insulation gases using classical breakdown experiments is discussed. A model for SF{sub 6} based on the stepped leader model is described. This calculates the breakdown voltages in arbitrary electrode configurations and under standard voltage waveforms. Thus, the thesis provides a method for the prediction of breakdown voltages of arbitrary field configurations under standard voltage waveforms for gases with electron-attaching properties. With this, further gases can be characterized for usage as high voltage insulation media.

  2. A quels impératifs de la loi répond le plaisir d’affliger la violence à soi ?


    Bencheikh, Farid


    Deux questions préalables engagent la présente réflexion sur la violence à soi : L’une, qu’est-ce qui légitime la supposition à priori d’une charnière entre une conduite dont l’interprétation relèverait du domaine de la psychologie, ou de la psychologie sociale dans le cas du suicide collectif, et la loi pénale dont l’objet principal est censé être limité à l’acte nuisible à autrui ? L’autre, non moins importante que la première, nous contraint, quant à elle, à justifier l’intérêt de notre ...

  3. Covariation des styles décisionnels : perception d’échec cognitif, estime de soi ou traits de personnalité ?


    Fabio, Annamaria Di; Busoni, Lara


    Les processus de prise de décision représentent un thème majeur dans le domaine de l’orientation. L’étude des styles décisionnels y constitue un champ de recherche prometteur. Le but de cette recherche est d’analyser leurs covariations avec des traits de personnalité et des mesures de l’estime de soi et de perception d’échec cognitif. À un échantillon de 258 sujets lycéens ont été administrés les tests suivants : Questionnaire de prise de décision de Melbourne, Questionnaire des cinq facteurs...

  4. Mitigation of Voltage Dip and Voltage Flickering by Multilevel D-STATCOM

    Directory of Open Access Journals (Sweden)

    M. S. Ballal


    Full Text Available The basic power quality problems in the distribution network are voltage sag (dip, voltage flickering, and the service interruptions. STATCOM is a Flexible AC Transmission Systems (FACTS technology device which can independently control the flow of reactive power. This paper presents the simulation and analysis of a STATCOM for voltage dip and voltage flickering mitigation. Simulations are carried out in MATLAB/Simulink to validate the performance of the STATCOM. A comparison between the six-pulse inverter and the five-level diode-clamped inverter is carried out for the performance of 66/11 KV distribution system.

  5. Control and Testing of a Dynamic Voltage Restorer (DVR) at Medium Voltage Level

    DEFF Research Database (Denmark)

    Nielsen, John Godsk; Newman, Michael; Nielsen, Hans Ove


    The dynamic voltage restorer (DVR) has become popular as a cost effective solution for the protection of sensitive loads from voltage sags. Implementations of the DVR have been proposed at both a low voltage (LV) level, as well as a medium voltage (MV) level; and give an opportunity to protect high...... power sensitive loads from voltage sags. This paper reports practical test results obtained on a medium voltage (10 kV) level using a DVR at a Distribution test facility in Kyndby, Denmark. The DVR was designed to protect a 400-kVA load from a 0.5-p.u. maximum voltage sag. The reported DVR verifies...... duration voltage sags were created using a controllable LV breaker fed by a 630 kVA Distribution transformer placed upstream of the sensitive load. The fault currents in excess of 12 kA were designed and created to obtain the required voltage sags. It is concluded the DVR works well in all operating...

  6. Voltage Unbalance Compensation with Smart Three-phase Loads

    DEFF Research Database (Denmark)

    Douglass, Philip; Trintis, Ionut; Munk-Nielsen, Stig


    This paper describes the design, proof-of-concept simulations and laboratory test of an algorithm for controlling active front-end rectifiers to reduce voltage unbalance. Using inputs of RMS voltage, the rectifier controller allocates load unevenly on its 3 phases to compensate for voltage...... unbalance originating in the power supply network. Two variants of the algorithm are tested: first, using phase-neutral voltage as input, second, using phase-phase voltage. The control algorithm is described, and evaluated in simulations and laboratory tests. Two metrics for quantifying voltage unbalance...... are evaluated: one metric based on the maximum deviation of RMS phaseneutral voltage from the average voltage and one metric based on negative sequence voltage. The tests show that controller that uses phase-neutral voltage as input can in most cases eliminate the deviations of phase voltage from the average...

  7. Investigation of phase-wise voltage regulator control logics for compensating voltage deviations in an experimental low voltage network

    DEFF Research Database (Denmark)

    Hu, Junjie; Zecchino, Antonio; Marinelli, Mattia


    This paper investigates the control logics of an on-load tap-changer (OLTC) transformer by means of an experimental system validation. The experimental low-voltage unbalanced system consists of a decoupled single-phase OLTC transformer, a 75-metre 16 mm2 cable, a controllable single-phase resistive...... load and an electric vehicle, which has the vehicle-to-grid function. Three control logics of the OLTC transformer are described in the study. The three control logics are classified based on their control objectives and control inputs, which include network currents and voltages, and can be measured...... either locally or remotely. To evaluate and compare the control performances of the three control logics, all the tests use the same loading profiles. The experimental results indicate that the modified line compensation control can regulate voltage in a safe band in the case of various load...


    Energy Technology Data Exchange (ETDEWEB)



    International workshop on II Polarized Partons at High Q2 region 11 was held at the Yukawa Institute for Theoretical Physics, Kyoto University, Kyoto, Japan on October 13-14, 2000, as a satellite of the international conference ''SPIN 2000'' (Osaka, Japan, October 16-21,2000). This workshop was supported by RIKEN (The Institute of Physical and Chemical Research) and by Yukawa Institute. The scientific program was focused on the upcoming polarized collider RHIC. The workshop was also an annual meeting of RHIC Spin Collaboration (RSC). The number of participants was 55, including 28 foreign visitors and 8 foreign-resident Japanese participants, reflecting the international nature of the RHIC spin program. At the workshop there were 25 oral presentations in four sessions, (1) RHIC Spin Commissioning, (2) Polarized Partons, Present and Future, (3) New Ideas on Polarization Phenomena, (4) Strategy for the Coming Spin Running. In (1) the successful polarized proton commissioning and the readiness of the accelerator for the physics program impressed us. In (2) and (3) active discussions were made on the new structure function to be firstly measured at RHIC, and several new theoretical ideas were presented. In session (4) we have established a plan for the beam time requirement toward the first collision of polarized protons. These proceedings include the transparencies presented at the workshop. The discussion on ''Strategy for the Coming Spin Running'' was summarized by the chairman of the session, S. Vigdor and G. Bunce.

  9. High voltage testing for the Majorana Demonstrator

    Energy Technology Data Exchange (ETDEWEB)

    Abgrall, N.; Arnquist, Isaac J.; Avignone, F. T.; Barabash, A.; Bertrand, F.; Bradley, A. W.; Brudanin, V.; Busch, Matthew; Buuck, M.; Byram, D.; Caldwell, A. S.; Chan, Yuen-Dat; Christofferson, C. D.; Chu, Pamela M.; Cuesta, C.; Detwiler, Jason A.; Doe, P. J.; Dunagan, C.; Efremenko, Yuri; Ejiri, H.; Elliott, S. R.; Fu, Z.; Galindo-Uribarri, A.; Giovanetti, G. K.; Goett, J.; Green, M. P.; Gruszko, J.; Guinn, I.; Guiseppe, V. E.; Henning, R.; Hoppe, Eric W.; Howard, S.; Howe, M. A.; Jasinski, B. R.; Keeter, K.; Kidd, M. F.; Konovalov, S.; Kouzes, Richard T.; Laferriere, Brian D.; Leon, Jonathan D.; Li, Alexander D.; MacMullin, J.; Martin, R. D.; Massarcyk, R.; Meijer, S. J.; Mertens, S.; Orrell, John L.; O' Shaughnessy, C.; Poon, Alan W.; Radford, D. C.; Rager, J.; Rielage, Keith; Robertson, R. G. H.; Romero Romo, M.; Shanks, B.; Shirchenko, M.; Snyder, N.; Suriano, Anne-Marie E.; Tedeschi, D.; Thompson, Andrew; Ton, K. T.; Trimble, J. E.; Varner, R. L.; Vasilyev, Sergey; Vetter, Kai; Vorren, Kris R.; White, Brandon R.; Wilkerson, J. F.; Wiseman, C.; Xu, W.; Yakushev, E.; Yu, Chang-Hong; Yumatov, V.


    The Majorana Collaboration is constructing theMajorana Demonstrator, an ultra-low background, 44-kg modular high-purity Ge (HPGe) detector array to search for neutrinoless double-beta decay in 76Ge. The phenomenon of surface micro-discharge induced by high-voltage has been studied in the context of theMajorana Demonstrator. This effect can damage the front-end electronics or mimic detector signals. To ensure the correct performance, every high-voltage cable and feedthrough must be capable of supplying HPGe detector operating voltages as high as 5 kV without exhibiting discharge. R&D measurements were carried out to understand the testing system and determine the optimum design configuration of the high-voltage path, including different improvements of the cable layout and feedthrough flange model selection. Every cable and feedthrough to be used at the Majorana Demonstrator was characterized and the micro-discharge effects during theMajorana Demonstrator commissioning phase were studied. A stable configuration has been achieved, and the cables and connectors can supply HPGe detector operating voltages without exhibiting discharge.

  10. Induced Voltage in an Open Wire (United States)

    Morawetz, K.; Gilbert, M.; Trupp, A.


    A puzzle arising from Faraday's law has been considered and solved concerning the question which voltage will be induced in an open wire with a time-varying homogeneous magnetic field. In contrast to closed wires where the voltage is determined by the time variance of the magnetic field and the enclosed area, in an open wire we have to integrate the electric field along the wire. It is found that the longitudinal electric field with respect to the wave vector contributes with 1/3 and the transverse field with 2/3 to the induced voltage. In order to find the electric fields the sources of the magnetic fields are necessary to know. The representation of a spatially homogeneous and time-varying magnetic field implies unavoidably a certain symmetry point or symmetry line which depend on the geometry of the source. As a consequence the induced voltage of an open wire is found to be the area covered with respect to this symmetry line or point perpendicular to the magnetic field. This in turn allows to find the symmetry points of a magnetic field source by measuring the voltage of an open wire placed with different angles in the magnetic field. We present exactly solvable models of the Maxwell equations for a symmetry point and for a symmetry line, respectively. The results are applicable to open circuit problems like corrosion and for astrophysical applications.

  11. Low-Voltage Consumption Coordination for Loss Minimization and Voltage Control

    DEFF Research Database (Denmark)

    Juelsgaard, Morten; Sloth, Christoffer; Wisniewski, Rafal


    This work presents a strategy for minimizing active power losses in low-voltage grids, by coordinating the consumption of electric vehicles and power generation from solar panels. We show that minimizing losses, also reduces voltage variations, and illustrate how this may be employed for increasing...

  12. Synchronised Voltage Space Vector Modulation for Three-level Inverters with Common-mode Voltage Elimination

    DEFF Research Database (Denmark)

    Oleschuk, Valentin; Blaabjerg, Frede


    A novel method of direct synchronous pulse-width modulation (PWM) is disseminated to three-level voltage source inverters with control algorithms with elimination of the common-mode voltages in three-phase drive systems with PWM. It provides smooth pulses-ratio changing and a quarter-wave symmetry...

  13. Voltage-gated proton (H(v)1) channels, a singular voltage sensing domain. (United States)

    Castillo, Karen; Pupo, Amaury; Baez-Nieto, David; Contreras, Gustavo F; Morera, Francisco J; Neely, Alan; Latorre, Ramon; Gonzalez, Carlos


    The main role of voltage-gated proton channels (Hv1) is to extrude protons from the intracellular milieu when, mediated by different cellular processes, the H(+) concentration increases. Hv1 are exquisitely selective for protons and their structure is homologous to the voltage sensing domain (VSD) of other voltage-gated ion channels like sodium, potassium, and calcium channels. In clear contrast to the classical voltage-dependent channels, Hv1 lacks a pore domain and thus permeation necessarily occurs through the voltage sensing domain. Hv1 channels are activated by depolarizing voltages, and increases in internal proton concentration. It has been proposed that local conformational changes of the transmembrane segment S4, driven by depolarization, trigger the molecular rearrangements that open Hv1. However, it is still unclear how the electromechanical coupling is achieved between the VSD and the potential pore, allowing the proton flux from the intracellular to the extracellular side. Here we provide a revised view of voltage activation in Hv1 channels, offering a comparative scenario with other voltage sensing channels domains. Copyright © 2015 Federation of European Biochemical Societies. Published by Elsevier B.V. All rights reserved.

  14. On Secondary Control Approaches for Voltage Regulation in DC Microgrids

    DEFF Research Database (Denmark)

    Peyghami Akhuleh, Saeed; Mokhtari, Hossein; Davari, Pooya


    regulation on the load busses within a suitable range. Therefore, in addition to compensate the voltage drop of the primary controller, it is necessary to regulate the voltage of critical loads. In this paper, a new voltage regulation strategy is proposed to regulate the voltage of Micro-Grid (MG...

  15. 30 CFR 75.804 - Underground high-voltage cables. (United States)


    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Underground high-voltage cables. 75.804 Section... AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Underground High-Voltage Distribution § 75.804 Underground high-voltage cables. (a) Underground high-voltage cables used in resistance...

  16. 46 CFR 120.324 - Dual voltage generators. (United States)


    ... 46 Shipping 4 2010-10-01 2010-10-01 false Dual voltage generators. 120.324 Section 120.324... INSTALLATION Power Sources and Distribution Systems § 120.324 Dual voltage generators. (a) A dual voltage generator installed on a vessel shall be of the grounded type, where: (1) The neutral of a dual voltage...

  17. 30 CFR 77.810 - High-voltage equipment; grounding. (United States)


    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage equipment; grounding. 77.810... COAL MINES Surface High-Voltage Distribution § 77.810 High-voltage equipment; grounding. Frames, supporting structures, and enclosures of stationary, portable, or mobile high-voltage equipment shall be...

  18. 47 CFR 17.54 - Rated lamp voltage. (United States)


    ... 47 Telecommunication 1 2010-10-01 2010-10-01 false Rated lamp voltage. 17.54 Section 17.54... voltage. To insure the necessary lumen output by obstruction lights, the rated voltage of incandescent lamps used shall correspond to be within 3 percent higher than the voltage across the lamp socket during...

  19. 46 CFR 129.326 - Dual-voltage generators. (United States)


    ... 46 Shipping 4 2010-10-01 2010-10-01 false Dual-voltage generators. 129.326 Section 129.326... INSTALLATIONS Power Sources and Distribution Systems § 129.326 Dual-voltage generators. If a dual-voltage generator is installed on an OSV— (a) The neutral of the dual-voltage system must be solidly grounded at the...

  20. Improving Low Voltage Ride Through Capability of Wind Generators Using Dynamic Voltage Restorer (United States)

    Sivasankar, Gangatharan; Suresh Kumar, Velu


    The increasing wind power integration with power grid has forced the situation to improve the reliability of wind generators for stable operation. One important problem with induction generator based wind farm is its low ride through capability to the grid voltage disturbance. Any disturbance such as voltage dip may cause wind farm outages. Since wind power contribution is in predominant percentage, such outages may lead to stability problem. The proposed strategy is to use dynamic voltage controller (DVR) to compensate the voltage disturbance. The DVR provides the wind generator the ability to remain connected in grid and improve the reliability. The voltage dips due to symmetrical and unsymmetrical faults are considered for analysis. The vector control scheme is employed for fault compensation which uses software phase locked loop scheme and park dq0 transformation technique. Extensive simulation results are included to illustrate the control and operation of DVR.

  1. Voltage control in active, intelligent low-voltage distribution networks; Spannungshaltung in aktiven, intelligenten Niederspannungsnetzen

    Energy Technology Data Exchange (ETDEWEB)

    Buelo, Thorsten; Mende, Denis [SMA Solar Technology AG, Niestetal (Germany); Geibel, Dominik [Fraunhofer Institut fuer Windenergie und Energiesystemtechnik (IWES), Kassel (Germany)] [and others


    This paper describes approaches for the voltage control in low-voltage distribution networks with a high share of distributed energy resources (DER). Taken into account are devices such as distribution transformers with on-load tap changer (OLTC), photovoltaic-inverters with reactive power capability and electronic voltage controllers (EVC). After a short description regarding voltage control, the devices and selected system concepts as well as the advantages and disadvantages of the different devices are described. Finally, the system-concepts are compared using the example of a real low voltage network, taking into account the possible increase of hosting capacity of the network, curtailing losses and the amount of reactive energy to be provided. (orig.)

  2. Energy Storage Options for Voltage Support in Low-Voltage Grids with High Penetration of Photovoltaic

    DEFF Research Database (Denmark)

    Marra, Francesco; Tarek Fawzy, Y.; Bülo, Thorsten


    The generation of power by photovoltaic (PV) systems is constantly increasing in low-voltage (LV) distribution grids, in line with the European environmental targets. To cope with the effects on grid voltage profiles during high generation and low demand periods, new solutions need to be establis......The generation of power by photovoltaic (PV) systems is constantly increasing in low-voltage (LV) distribution grids, in line with the European environmental targets. To cope with the effects on grid voltage profiles during high generation and low demand periods, new solutions need...... to be established. In the long term, these solutions should also aim to allow further more PV installed capacity, while meeting the power quality requirements. In this paper, different concepts of energy storage are proposed to ensure the voltage quality requirements in a LV grid with high PV penetration...

  3. Determination of the cathode fall voltage in fluorescent lamps by measurement of the operating voltage

    Energy Technology Data Exchange (ETDEWEB)

    Hilscher, A. [OSRAM GmbH, Augsburg (Germany)


    A new method for the determination of the cathode fall voltage of fluorescent lamps is shown. The cathode fall voltage can be determined by measurement of the lamp operating voltage at constant lamp wall temperature, constant discharge current and variation of the electrode heating current. Commercial lamps, which do not need to be specially prepared, can be used for the measurement. The results show good correlation to other measurements of the cathode fall voltage at various discharge currents by means of capacitive coupling. The measured values of the cathode fall voltage are used for determining the minimum, target and maximum setting of the sum of the squares of the pin currents of one electrode (the so-called SOS value) as a function of the discharge current in fluorescent lamp dimming. (author)

  4. Electrocardiogram voltage discordance: Interpretation of low QRS voltage only in the precordial leads. (United States)

    Kim, Diana H; Verdino, Ralph J

    To define clinical correlates of low voltage isolated to precordial leads on the surface electrocardiogram (ECG). Low voltage (V) on the ECG is defined as QRS Vvoltage isolated to the precordial leads with normal limb lead voltages is unclear. Twelve-lead ECGs with QRS V>5mm in one or more limb leads and voltage was found in 256 of 150,000 ECGs (~0.2%). 50.4% of patients had discordant ECGs that correlated with classic etiologies, with a higher incidence of LV dilation in those with classic etiologies than those without. Low precordial voltage is associated with classic etiologies and LV dilation. Copyright © 2017 Elsevier Inc. All rights reserved.

  5. On Secondary Control Approaches for Voltage Regulation in DC Microgrids

    DEFF Research Database (Denmark)

    Peyghami, Saeed; Mokhtari, Hossein; Davari, Pooya


    regulation on the load busses within a suitable range. Therefore, in addition to compensate the voltage drop of the primary controller, it is necessary to regulate the voltage of critical loads. In this paper, a new voltage regulation strategy is proposed to regulate the voltage of Micro-Grid (MG......Centralized or decentralized secondary controller is commonly employed to regulate the voltage drop raised by the primary controller. However, in the case of high capacity MGs and long feeders with much voltage drop on the line resistances, the conventional methods may not guarantee the voltage...

  6. A thermoelectric voltage effect in polyethylene oxide

    CERN Document Server

    Martin, B; Kliem, H


    The conductivity of polyethylene oxide (PEO) is described with a three-dimensional hopping model considering electrostatic interactions between the ions. Ions fluctuate over energy-barriers in a multi-well potential. To decide whether positive or negative charges are responsible for this conductivity, the thermoelectric voltage is measured. The samples are embedded between two aluminium-electrodes. The oxide on the interface between the electrodes and the PEO serves as a blocking layer. The temperature of each electrode is controlled by a Peltier element. A temperature step is applied to one electrode by changing the temperature of one of the Peltier elements. Due to this temperature gradient, the mobile charges fluctuate thermally activated from the warmer side to the colder side of the sample. The direction of the measured thermoelectric voltage indicates the type of mobile charges. It is found that positive charges are mobile. Further, it is shown that the absolute value of the thermoelectric voltage depen...

  7. Bias-voltage-controlled interlayer exchange coupling.

    Energy Technology Data Exchange (ETDEWEB)

    You, C.-Y.


    We propose a new system whose magnetization direction can be controlled by an applied bias voltage without an external magnetic field. The system consists of a four layered structure F{sub 1}/S/I/F{sub 2} (F{sub 1}, F{sub 2}: ferromagnets, S: spacer, I: insulator). An analytic expression for bias-voltage-controlled interlayer exchange coupling in this system is developed within a simple free-electron-like, one-dimensional approximation. According to the approach, the magnetic configurations of the two magnetic layers oscillate from antiferromagnetic to ferromagnetic with applied bias voltage. This implies that we can switch/rotate the magnetization direction without an external magnetic field. Possible applications of such a system are also discussed.

  8. A comprehensive review of dynamic voltage restorers

    DEFF Research Database (Denmark)

    Farhadi-Kangarlu, Mohammad; Babaei, Ebrahim; Blaabjerg, Frede


    will consider all of the fast voltage compensators, i.e. the devices called Static Series Compensator (SSC), sag corrector, Dynamic Sag Corrector (DySC), and other similar devices are also considered. All of these devices will be called DVR since they operate almost in the same way. Some comparative conclusions......During the last half century the Power Quality (PQ) related problems have become important issues. Many solutions have been proposed to address the PQ problems. The most attractive and flexible way is to use power electronic converter based devices such as Dynamic Voltage Restorer (DVR......), Distribution Static Compensator (DSTATCOM), Unified Power Quality Conditioner (UPQC), Uninterruptible Power Supply (UPS), and other devices usually called custom power devices. Among custom power devices, the DVR is the most economical solution to overcome the voltage-related PQ problems. Intensive research...

  9. Voltage control of cavity magnon polariton

    Energy Technology Data Exchange (ETDEWEB)

    Kaur, S., E-mail:; Rao, J. W.; Gui, Y. S.; Hu, C.-M., E-mail: [Department of Physics and Astronomy, University of Manitoba, Winnipeg, Manitoba R3T 2N2 (Canada); Yao, B. M. [Department of Physics and Astronomy, University of Manitoba, Winnipeg, Manitoba R3T 2N2 (Canada); National Laboratory for Infrared Physics, Chinese Academy of Sciences, Shanghai 200083 (China)


    We have experimentally investigated the microwave transmission of the cavity-magnon-polariton (CMP) generated by integrating a low damping magnetic insulator onto a 2D microwave cavity. The high tunability of our planar cavity allows the cavity resonance frequency to be precisely controlled using a DC voltage. By appropriately tuning the voltage and magnetic bias, we can observe the cavity photon magnon coupling and the magnetic coupling between a magnetostatic mode and the generated CMP. The dispersion of the generated CMP was measured by either tuning the magnetic field or the applied voltage. This electrical control of CMP may open up avenues for designing advanced on-chip microwave devices that utilize light-matter interaction.

  10. Semisupervised Community Detection by Voltage Drops

    Directory of Open Access Journals (Sweden)

    Min Ji


    Full Text Available Many applications show that semisupervised community detection is one of the important topics and has attracted considerable attention in the study of complex network. In this paper, based on notion of voltage drops and discrete potential theory, a simple and fast semisupervised community detection algorithm is proposed. The label propagation through discrete potential transmission is accomplished by using voltage drops. The complexity of the proposal is OV+E for the sparse network with V vertices and E edges. The obtained voltage value of a vertex can be reflected clearly in the relationship between the vertex and community. The experimental results on four real networks and three benchmarks indicate that the proposed algorithm is effective and flexible. Furthermore, this algorithm is easily applied to graph-based machine learning methods.

  11. Analysis of NSTX TF Joint Voltage Measurements

    Energy Technology Data Exchange (ETDEWEB)

    R, Woolley


    This report presents findings of analyses of recorded current and voltage data associated with 72 electrical joints operating at high current and high mechanical stress. The analysis goal was to characterize the mechanical behavior of each joint and thus evaluate its mechanical supports. The joints are part of the toroidal field (TF) magnet system of the National Spherical Torus Experiment (NSTX) pulsed plasma device operating at the Princeton Plasma Physics Laboratory (PPPL). Since there is not sufficient space near the joints for much traditional mechanical instrumentation, small voltage probes were installed on each joint and their voltage monitoring waveforms have been recorded on sampling digitizers during each NSTX ''shot''.

  12. Sensorless Control of IPMSM by Voltage Injection

    DEFF Research Database (Denmark)

    Matzen, Torben N.; Bech, Michael Møller


    In this paper a sensorless discrete current control of an Interior Permanent Magnet Synchrouns Motor (IPMSM) by voltage injection is designed and tested. The whole controller is operating in the dq-frame and for this reason the rotor position is essential to know, to transform between the station......In this paper a sensorless discrete current control of an Interior Permanent Magnet Synchrouns Motor (IPMSM) by voltage injection is designed and tested. The whole controller is operating in the dq-frame and for this reason the rotor position is essential to know, to transform between...... the stationary frame and the rotor xed dq-frame. To obtain the position even at standstill a sensorless scheme using voltage injection is added to the current controller....

  13. Voltage stability, bifurcation parameters and continuation methods

    Energy Technology Data Exchange (ETDEWEB)

    Alvarado, F.L. [Wisconsin Univ., Madison, WI (United States)


    This paper considers the importance of the choice of bifurcation parameter in the determination of the voltage stability limit and the maximum power load ability of a system. When the bifurcation parameter is power demand, the two limits are equivalent. However, when other types of load models and bifurcation parameters are considered, the two concepts differ. The continuation method is considered as a method for determination of voltage stability margins. Three variants of the continuation method are described: the continuation parameter is the bifurcation parameter the continuation parameter is initially the bifurcation parameter, but is free to change, and the continuation parameter is a new `arc length` parameter. Implementations of voltage stability software using continuation methods are described. (author) 23 refs., 9 figs.

  14. ESR melting under constant voltage conditions

    Energy Technology Data Exchange (ETDEWEB)

    Schlienger, M.E.


    Typical industrial ESR melting practice includes operation at a constant current. This constant current operation is achieved through the use of a power supply whose output provides this constant current characteristic. Analysis of this melting mode indicates that the ESR process under conditions of constant current is inherently unstable. Analysis also indicates that ESR melting under the condition of a constant applied voltage yields a process which is inherently stable. This paper reviews the process stability arguments for both constant current and constant voltage operation. Explanations are given as to why there is a difference between the two modes of operation. Finally, constant voltage process considerations such as melt rate control, response to electrode anomalies and impact on solidification will be discussed.

  15. CNFET Based Voltage Differencing Transconductance Amplifier (United States)

    Laxya; Prasad, Dinesh; Mainuddin; Islam, S. S.


    In CMOS Technology basic Problem mainly includes dopant fluctuation, tunnelling effect and line edge roughness below 45nm technology. Carbon Nanotube based structures is better option for widen the Moore’s law due to its scalability channel electrostatics and higher mobility. In this manuscript we demonstrate an optimum design for linear property of CNTFET based VDTA at 32nm technology node. The proposed circuit consist of VDTA with CNTFET having two voltage input and two current outputs so that it works as voltage and transconductance operation to obtain the high performance. The minimum supply voltages of ±0.9V with 32nm technology mode are used. The CNTFET-VDTA performance is simulated on HSPICE. In this paper CNFET-based VDTA provides better results of DC transfer characteristics as compared with CMOS. All the simulation results are performed on HSPICE.

  16. Experimental validation of a high voltage pulse measurement method.

    Energy Technology Data Exchange (ETDEWEB)

    Cular, Stefan; Patel, Nishant Bhupendra; Branch, Darren W.


    This report describes X-cut lithium niobates (LiNbO3) utilization for voltage sensing by monitoring the acoustic wave propagation changes through LiNbO3 resulting from applied voltage. Direct current (DC), alternating current (AC) and pulsed voltage signals were applied to the crystal. Voltage induced shift in acoustic wave propagation time scaled quadratically for DC and AC voltages and linearly for pulsed voltages. The measured values ranged from 10 - 273 ps and 189 ps 2 ns for DC and non-DC voltages, respectively. Data suggests LiNbO3 has a frequency sensitive response to voltage. If voltage source error is eliminated through physical modeling from the uncertainty budget, the sensors U95 estimated combined uncertainty could decrease to ~0.025% for DC, AC, and pulsed voltage measurements.

  17. High-voltage test and measuring techniques

    CERN Document Server

    Hauschild, Wolfgang


    It is the intent of this book to combine high-voltage (HV) engineering with HV testing technique and HV measuring technique. Based on long-term experience gained by the authors as lecturer and researcher as well as member in international organizations, such as IEC and CIGRE, the book will reflect the state of the art as well as the future trends in testing and diagnostics of HV equipment to ensure a reliable generation, transmission and distribution of electrical energy. The book is intended not only for experts but also for students in electrical engineering and high-voltage engineering.

  18. Voltage control of DC islanded microgrids

    DEFF Research Database (Denmark)

    Tucci, Michele; Riverso, Stefano; Quintero, Juan Carlos Vasquez


    We propose a new decentralized control scheme for DC Islanded microGrids (ImGs) composed by several Distributed Generation Units (DGUs) with a general interconnection topology. Each local controller regulates to a reference value the voltage of the Point of Common Coupling (PCC) of the correspond......We propose a new decentralized control scheme for DC Islanded microGrids (ImGs) composed by several Distributed Generation Units (DGUs) with a general interconnection topology. Each local controller regulates to a reference value the voltage of the Point of Common Coupling (PCC...


    Directory of Open Access Journals (Sweden)

    Y. L. Anokhin


    Full Text Available Introduction. Determination of power quality indices in high-voltage power grids allows to find the reasons for the deterioration of the power quality. The relevant national and International Standards for power quality contain relevant norms of quality indices and requirements for their accuracy measurement. Problem. The most complicated part in the process of measuring the power quality indices at high voltage is the selection of the corresponding high-voltage scale voltage converters. Therefore, comparing the requirements of IEC 61000-4-30 to high voltage scale voltage converters is an important task. Goal. Analysis of the International Standard IEC 61000-4-30 requirements feasibility for measuring the indices of power quality in high-voltage electrical networks using different types of high-voltage scale voltage converters. Methodology. Comparison of the requirements of IEC 61000-4-30 Standard to high-voltage scale voltage converters, when measuring power quality indices, with the characteristics of high voltage electromagnetic transformers used in Ukraine, and with promising developments of high-voltage converters of other types. Results. It is shown in the study that in order to fulfill some of the requirements for class A of IEC 61000-4-30, the characteristics of electromagnetic voltage transformers should be determined in the substation conditions using mobile calibration high-voltage laboratories. To meet all the requirements for Class A IEC 61000-4-30, it is recommended to use broadband high-voltage dividers of resistive-capacitive type. Originality. In study it is shown firstly that all the requirements of the IEC 61000-4-30 Standard for high-voltage scale voltage converters can be performed on the basis of the use of broadband resistive-capacitive damped voltage dividers. Practical value. Expositions of specific types of resistive-capacitive high-voltage dividers are presented, their parameters are confirmed by the results of state

  20. Low-loss and flatband silicon-nanowire-based 5th-order coupled resonator optical waveguides (CROW) fabricated by ArF-immersion lithography process on a 300-mm SOI wafer (United States)

    Jeong, Seok-Hwan; Shimura, Daisuke; Simoyama, Takasi; Seki, Miyoshi; Yokoyama, Nobuyuki; Ohtsuka, Minoru; Koshino, Keiji; Horikawa, Tsuyoshi; Tanaka, Yu; Morito, Ken


    We present flatband, low-loss and low-crosstalk characteristics of Si-nanowire-based 5th-order coupled resonator optical waveguides (CROW) fabricated by ArF-immersion lithography process on a 300-mm silicon-on-insulator (SOI) wafer. We theoretically specified why phase controllability over Si-nanowire waveguides is prerequisite to attain desired spectral response, discussing spectral degradation by random phase errors during fabrication process. It was experimentally demonstrated that advanced patterning technology based on ArF-immersion lithography process showed extremely low phase errors even for Si-nanowire channel waveguides. As a result, the device exhibited extremely low loss of CROW. We believe these high-precision fabrication technologies based on 300-mm SOI wafer scale ArF-immersion lithography would be promising for several kinds of WDM multiplexers/demultiplexers having much complicated configurations and requiring much finer phase controllability.

  1. Low-voltage and high-voltage TEM observations on MWCNTs of rat in vivo. (United States)

    Sakaguchi, Norihito; Watari, Fumio; Yokoyama, Atsuro; Nodasaka, Yoshinobu; Ichinose, Hideki


    In the present study, we focused on the optimal conditions for observation of morphology and atomic structure of carbon nanotube (CNT) in vivo by transmission electron microscopy (TEM). Either low-voltage or high-voltage TEMs was chosen for the high-contrast or high-resolution imaging of subcutaneous tissue and the multi-wall CNT (MWCNT). The morphology and structure of each cell organelle were well recognized using the low-voltage TEM at 75 kV. Individual MWCNTs forming the cluster were also visible by the low-voltage TEM. On the contrary, the high-voltage TEM image at 1250 kV shows poor contrast on both the cell organelles and MWCNTs. However, graphene layers of MWCNT were clearly visible in the HRTEM image using the high-voltage TEM. The influence of the surrounding biological tissue can be disregarded by the high-energy electrons due to their weak scattering/absorption effect in the tissue. It was indicated that the usage of the high-voltage TEM is quite effective to the atomic structure analysis of nano-crystalline materials in vivo.

  2. Capturing power at higher voltages from arrays of microbial fuel cells without voltage reversal

    KAUST Repository

    Kim, Younggy


    Voltages produced by microbial fuel cells (MFCs) cannot be sustainably increased by linking them in series due to voltage reversal, which substantially reduces stack voltages. It was shown here that MFC voltages can be increased with continuous power production using an electronic circuit containing two sets of multiple capacitors that were alternately charged and discharged (every one second). Capacitors were charged in parallel by the MFCs, but linked in series while discharging to the circuit load (resistor). The parallel charging of the capacitors avoided voltage reversal, while discharging the capacitors in series produced up to 2.5 V with four capacitors. There were negligible energy losses in the circuit compared to 20-40% losses typically obtained with MFCs using DC-DC converters to increase voltage. Coulombic efficiencies were 67% when power was generated via four capacitors, compared to only 38% when individual MFCs were operated with a fixed resistance of 250 Ω. The maximum power produced using the capacitors was not adversely affected by variable performance of the MFCs, showing that power generation can be maintained even if individual MFCs perform differently. Longer capacitor charging and discharging cycles of up to 4 min maintained the average power but increased peak power by up to 2.6 times. These results show that capacitors can be used to easily obtain higher voltages from MFCs, allowing for more useful capture of energy from arrays of MFCs. © 2011 The Royal Society of Chemistry.

  3. Performance evaluation of automatic voltage regulators ...

    African Journals Online (AJOL)

    Performance of various Automatic Voltage Regulators (AVR's) in Nigeria and the causes of their inability to regulate at their set points have been investigated. The result indicates that the imported AVRs fail to give the 220 volts as displayed on the name plate at the specified low set point (such as 100, 120 volts etc) on ...

  4. Pulsed high voltage discharge induce hematologic changes

    African Journals Online (AJOL)



    Oct 19, 2009 ... The aim of this work to examine the effect of the gas-liquid hybrid discharge treatment system on some hematological ... liquid phase. The high energy plasma arc produces a pressure shock wave, electromagnetic radiations, .... through a 50 kilo-ohm resistor by a negative dc high-voltage power supply and ...

  5. Intermediate state trapping of a voltage sensor

    DEFF Research Database (Denmark)

    Lacroix, Jérôme J; Pless, Stephan Alexander; Maragliano, Luca


    transition pathway determined using the string method. The experimental results and computational analysis suggest that the phenotype of I241W may originate in the formation of a hydrogen bond between the indole nitrogen atom and the backbone carbonyl of R2. This work provides new information on intermediate...... states in voltage-gated ion channels with an approach that produces minimum chemical perturbation....

  6. Protection of Low Voltage CIGRE distribution Network

    DEFF Research Database (Denmark)

    Mustafa, Ghullam; Bak-Jensen, Birgitte; Bak, Claus Leth


    the inverters used for Photovoltaic (PV) and battery applications. The disconnection of the PV solar panels when in island mode is made by proposing switch dis-connecting devices. ABB is currently using these kinds of disconnection devices for the purpose of protecting solar panels against over voltages...


    Directory of Open Access Journals (Sweden)

    V.A. Sapryka


    Full Text Available A mathematical model of voltage fluctuation versus parameters of power quality and power consumption is developed to allow predicting parameters of the power quality in electric grids. Application of the model will result in an electrical complex functioning optimization

  8. Stray voltage and milk quality: a review. (United States)

    Reinemann, Douglas J


    If animal contact voltage reaches sufficient levels, animals coming into contact with grounded devices may receive a mild electric shock that can cause a behavioral response. At voltage levels that are just perceptible to the animal, behaviors indicative of perception (eg, flinches) may result with little change in normal routines. At higher exposure levels, avoidance behaviors may result. The direct effect of animal contact with electrical current can range from: • Mild behavioral reactions indicative of sensation, to • Involuntary muscle contraction, or twitching, to • Intense behavioral responses indicative of pain. The indirect effects of these behaviors can vary considerably depending on the specifics of the contact location, level of current flow, body pathway, frequency of occurrence, and many other factors related to the daily activities of animals. There are several common situations of concern in animal environments: • Animals avoiding certain exposure locations, which may result in: X Reduced water intake if exposure is required for animals to access watering devices, X Reduced feed intake if exposure is required for animals to accesses feeding devices or locations. • Difficulty of moving or handling animals in areas of voltage/current exposure• The physiologic implications of the release of stress hormones produced by contact with painful stimuli. The severity of response will depend on the amount of electrical current (measured in milliamps) flowing through the animal’s body, the pathway it takes through the body, and the sensitivity of the individual animal. The results of the combined current dose-response experiments, voltage exposure response experiments, and measurements of body and contact resistances is consistent with the lowest (worst case) cow + contact resistance as low as 500 as estimated by Lefcourt that may occur in some unusual situations on farms (firm application of the muzzle to a wet metallic watering device and hoof

  9. An Inexpensive Source of High Voltage (United States)

    Saraiva, Carlos


    As a physics teacher I like recycling old apparatus and using them for demonstrations in my classes. In physics laboratories in schools, sources of high voltage include induction coils or electronic systems that can be bought from companies that sell lab equipment. But these sources can be very expensive. In this article, I will explain how you…

  10. Alternating current breakdown voltage of ice electret (United States)

    Oshika, Y.; Tsuchiya, Y.; Okumura, T.; Muramoto, Y.


    Ice has low environmental impact. Our research objectives are to study the availability of ice as a dielectric insulating material at cryogenic temperatures. We focus on ferroelectric ice (iceXI) at cryogenic temperatures. The properties of iceXI, including its formation, are not clear. We attempted to obtain the polarized ice that was similar to iceXI under the applied voltage and cooling to 77 K. The polarized ice have a wide range of engineering applications as electronic materials at cryogenic temperatures. This polarized ice is called ice electret. The structural difference between ice electret and normal ice is only the positions of protons. The effects of the proton arrangement on the breakdown voltage of ice electret were shown because electrical properties are influenced by the structure of ice. We observed an alternating current (ac) breakdown voltage of ice electret and normal ice at 77 K. The mean and minimum ac breakdown voltage values of ice electret were higher than those of normal ice. We considered that the electrically weak part of the normal ice was improved by applied a direct electric field.

  11. Modeling and Simulation of Dynamic Voltage Restorer (DVR for Enhancing Voltage Sag

    Directory of Open Access Journals (Sweden)

    Amrita RAI


    Full Text Available The aim of this paper is to summaries the fundamental aspects of voltage sag production and their effects on power quality as well as enhancing this power quality in distribution network, using FACTS (Flexible AC Transmission System Devices i.e. Dynamic Voltage Restorer (DVR. DVR is a powerful custom power device for short duration voltage compensation, which is connected in series with the load & hence it possesses some advantages. (In this paper detailed modeling and simulation and analysis of the DVR device is presented.

  12. Analysis of Voltage Support by Electric Vehicles and Photovoltaic in a Real Danish Low Voltage Network

    DEFF Research Database (Denmark)

    Knezovic, Katarina; Marinelli, Mattia; Juul Møller, René


    With conventional generating units being replaced by renewable sources which are not required to provide same high level of ancillary services, there is an increasing need for additional resources to achieve certain standards regarding frequency and voltage. This paper investigates the potential ...... with addressing the issues regarding voltage control at the expense of increased loading. Analysed real Danish low voltage network has been modelled in Matlab SimPowerSystems and is based on consumption and PV production data measured individually for number of households....

  13. Grid Voltage Modulated Control of Grid-Connected Voltage Source Inverters under Unbalanced Grid Conditions

    DEFF Research Database (Denmark)

    Li, Mingshen; Gui, Yonghao; Quintero, Juan Carlos Vasquez


    In this paper, an improved grid voltage modulated control (GVM) with power compensation is proposed for grid-connected voltage inverters when the grid voltage is unbalanced. The objective of the proposed control is to remove the power ripple and to improve current quality. Three power compensation...... objectives are selected to eliminate the negative sequence components of currents. The modified GVM method is designed to obtain two separate second-order systems for not only the fast convergence rate of the instantaneous active and reactive powers but also the robust performance. In addition, this method...

  14. Simple and compact capacitive voltage probe for measuring voltage impulses up to 0.5 MV. (United States)

    Pecquois, R; Pecastaing, L; de Ferron, A; Rivaletto, M; Pignolet, P; Novac, B M; Smith, I R; Adler, R J


    The paper describes a simple and compact 0.5 MV high-voltage capacitive probe developed in common by Université de Pau (France) and Loughborough University (UK). Design details are provided, together with a simple and straightforward methodology developed to assess the characteristics of high-voltage probes. The technique uses a 4 kV pulsed arrangement combined with results from a 2D electric field solver and a thorough PSpice circuit analysis. Finally, a practical example of high-voltage measurement performed using such a probe during the development phase of a high power microwave generator is provided.

  15. Voltage harmonic elimination with RLC based interface smoothing filter (United States)

    Chandrasekaran, K.; Ramachandaramurthy, V. K.


    A method is proposed for designing a Dynamic Voltage Restorer (DVR) with RLC interface smoothing filter. The RLC filter connected between the IGBT based Voltage Source Inverter (VSI) is attempted to eliminate voltage harmonics in the busbar voltage and switching harmonics from VSI by producing a PWM controlled harmonic voltage. In this method, the DVR or series active filter produces PWM voltage that cancels the existing harmonic voltage due to any harmonic voltage source. The proposed method is valid for any distorted busbar voltage. The operating VSI handles no active power but only harmonic power. The DVR is able to suppress the lower order switching harmonics generated by the IGBT based VSI. Good dynamic and transient results obtained. The Total Harmonic Distortion (THD) is minimized to zero at the sensitive load end. Digital simulations are carried out using PSCAD/EMTDC to validate the performance of RLC filter. Simulated results are presented.

  16. Vécu des situations scolaires, estime de soi et Développement : du jugement moral a la période de la latence

    Directory of Open Access Journals (Sweden)

    Emile-Henri Riard


    Full Text Available Suivant une approche de psychologie sociale clinique, le point de vue adopté dans cet article est triple : 1- considérer les situations scolaires “ ordinaires ” comme potentiellement génératrices de difficultés; 2- s’inscrire en amont de l’adolescence afin d’améliorer la compréhension de cette dernière; 3 – considérer le vécu des élèves. La recherche menée en France (enfants de 6 à 11 ans, par questionnaire (48 situations relevant de la scolarité : classe, cour de récréation, trajet domicile/école et domicile ont été proposées ; test d’estime de soi (Coopersmith ; développement moral (Kohlberg. Variables : âge, sexe, mode d’habitat, position scolaire, classement, département. Les résultats (analyse de variance démontrent un fonctionnement “ en bloc ” du niveau de vécu de difficulté. Ressortent comme variables significatives, par ordre d’importance décroissante: le sexe (les garçons ressentent davantage les difficultés que les filles; l’âge (le niveau de difficulté vécue décroît avec l’âge mais concerne surtout la cour de récréation ; le mode d’habitat (collectif. La classe est l’espace le plus porteur de différences de vécu de difficultés indépendamment des variables. Le niveau d’autonomie et l’estime de soi sont schématiquement inversement proportionnés au niveau de difficulté vécu. La conclusion met l’accent sur l’importance des effets interactif et d’accumulation des situations.

  17. Conservation voltage regulation (CVR) applied to energy savings by voltage-adjusting equipment through AMI (United States)

    Lan, B.-R.; Chang, C.-A.; Huang, P.-Y.; Kuo, C.-H.; Ye, Z.-J.; Shen, B.-C.; Chen, B.-K.


    Conservation voltage reduction (CVR) includes peak demand reduction, energy conservation, carbon emission reduction, and electricity bill reduction. This paper analyzes the energy-reduction of Siwei Feeders with applying CVR, which are situated in Penghu region and equipped with smart meters. Furthermore, the applicable voltage reduction range for the feeders will be explored. This study will also investigate how the CVR effect and energy conservation are improved with the voltage control devices integrated. The results of this study can serve as a reference for the Taiwan Power Company to promote and implement voltage reduction and energy conservation techniques. This study is expected to enhance the energy-reduction performance of the Penghu Low Carbon Island Project.

  18. Analysis and Mathematical Model for Restitution of Voltage Using Dynamic Voltage Restorer

    Directory of Open Access Journals (Sweden)

    C. Gopinath


    Full Text Available Voltage sag and swell have a major concern in the distribution systems. In order to mitigate the voltage sag and swell, a custom power device called dynamic voltage restorer (DVR is used. The proposed system is a polymer electrolyte membrane (PEM fuel cell based DVR. The energy from the fuel cell is stored in the super capacitor to restitute the voltage. In this proposed DVR, Z-source inverter is used instead of traditional inverter because of buck-boost and shoot through capability. The simulation is performed using three controller topologies: PI controller, synchronous reference frame controller and fuzzy controller and the results are verified using Matlab-Simulink environment.

  19. Impact of Voltage Conditions on Distributed Generation Connectivity in Medium Voltage Grids

    Directory of Open Access Journals (Sweden)

    Ireneusz Grządzielski


    Full Text Available A significant increase in the distributed generating sources connected and planned for connection to medium voltage (MV grids makes voltage criteria very important in assessing the sources’ connectivity. Many requests have been submitted for connection of distributed generation sources at a considerable distance (even a dozen or so kilometres from a main supply substation’s MV buses. As a rule, these are requests for the interconnection deep in an existing MV bus, but also directly to MV switching substation bays. Then maintaining appropriate voltage levels becomes a basic technical problem. Another technical problem relates to meeting the power quality criteria. THD index, and the level of individual harmonics, significantly increases, in many cases reaching or even exceeding the boundary values. With their extensive experience, the authors present examples and results of some analyses herewith. They indicate the impact of voltage conditions on the connection possibilities of distributed generation to MV grids.

  20. Structure of the voltage-gated K+ channel Eag1 reveals an alternative voltage sensing mechanism (United States)

    Whicher, Jonathan R.; MacKinnon, Roderick


    Voltage-gated potassium channels (Kv) are gated by the movement of the transmembrane voltage sensor, which is coupled, through the helical S4–S5 linker, to the potassium pore. We determined the single-particle cryo-EM structure of mammalian Kv10.1 or Eag1, bound to the channel inhibitor calmodulin, at 3.78Å resolution. Unlike previous Kv structures, the S4–S5 linker of Eag1 is a 5-residue loop and the transmembrane segments are not domain swapped, suggesting an alternative mechanism of voltage-dependent gating. Additionally, the structure and position of the S4–S5 linker allows calmodulin to bind to the intracellular domains and close the potassium pore independent of voltage sensor position. The structure reveals an alternative gating mechanism for Kv channels and provides a template to further understand the gating properties of Eag1 and related channels. PMID:27516594

  1. Distribution System Voltage Regulation by Distributed Energy Resources

    Energy Technology Data Exchange (ETDEWEB)

    Ceylan, Oguzhan [ORNL; Liu, Guodong [ORNL; Xu, Yan [ORNL; Tomsovic, Kevin [University of Tennessee, Knoxville (UTK)


    This paper proposes a control method to regulate voltages in 3 phase unbalanced electrical distribution systems. A constrained optimization problem to minimize voltage deviations and maximize distributed energy resource (DER) active power output is solved by harmony search algorithm. IEEE 13 Bus Distribution Test System was modified to test three different cases: a) only voltage regulator controlled system b) only DER controlled system and c) both voltage regulator and DER controlled system. The simulation results show that systems with both voltage regulators and DER control provide better voltage profile.

  2. Increasing Integration of Wind Power in Medium Voltage Grid by Voltage Support of Smart Transformer


    Gao, Xiang; De Carne, Giovanni; Liserre, Marco; Vournas, Costas


    The voltage rise during wind energy penetration represents a limit of the wind power integration in the distribution grid. The Smart Transformer (ST), a power electronics-based transformer, can provide additional services to the distribution grids, for instance the voltage support in MV grid by means of reactive power injection. In this paper, this service is applied to increase the hosting capacity of wind power in MV grids.

  3. Impact of Voltage Conditions on Distributed Generation Connectivity in Medium Voltage Grids


    Ireneusz Grządzielski; Krzysztof Marszałkiewicz; Andrzej Trzeciak


    A significant increase in the distributed generating sources connected and planned for connection to medium voltage (MV) grids makes voltage criteria very important in assessing the sources’ connectivity. Many requests have been submitted for connection of distributed generation sources at a considerable distance (even a dozen or so kilometres) from a main supply substation’s MV buses. As a rule, these are requests for the interconnection deep in an existing MV bus, but also directly to MV sw...

  4. Intelligent Distribution Voltage Control with Distributed Generation = (United States)

    Castro Mendieta, Jose

    In this thesis, three methods for the optimal participation of the reactive power of distributed generations (DGs) in unbalanced distributed network have been proposed, developed, and tested. These new methods were developed with the objectives of maintain voltage within permissible limits and reduce losses. The first method proposes an optimal participation of reactive power of all devices available in the network. The propose approach is validated by comparing the results with other methods reported in the literature. The proposed method was implemented using Simulink of Matlab and OpenDSS. Optimization techniques and the presentation of results are from Matlab. The co-simulation of Electric Power Research Institute's (EPRI) OpenDSS program solves a three-phase optimal power flow problem in the unbalanced IEEE 13 and 34-node test feeders. The results from this work showed a better loss reduction compared to the Coordinated Voltage Control (CVC) method. The second method aims to minimize the voltage variation on the pilot bus on distribution network using DGs. It uses Pareto and Fuzzy-PID logic to reduce the voltage variation. Results indicate that the proposed method reduces the voltage variation more than the other methods. Simulink of Matlab and OpenDSS is used in the development of the proposed approach. The performance of the method is evaluated on IEEE 13-node test feeder with one and three DGs. Variables and unbalanced loads are used, based on real consumption data, over a time window of 48 hours. The third method aims to minimize the reactive losses using DGs on distribution networks. This method analyzes the problem using the IEEE 13-node test feeder with three different loads and the IEEE 123-node test feeder with four DGs. The DGs can be fixed or variables. Results indicate that integration of DGs to optimize the reactive power of the network helps to maintain the voltage within the allowed limits and to reduce the reactive power losses. The thesis is

  5. Engineering of a genetically encodable fluorescent voltage sensor exploiting fast Ci-VSP voltage-sensing movements

    DEFF Research Database (Denmark)

    Lundby, Alicia; Mutoh, Hiroki; Dimitrov, Dimitar


    Ci-VSP contains a voltage-sensing domain (VSD) homologous to that of voltage-gated potassium channels. Using charge displacement ('gating' current) measurements we show that voltage-sensing movements of this VSD can occur within 1 ms in mammalian membranes. Our analysis lead to development of a g...... of a genetically encodable fluorescent protein voltage sensor (VSFP) in which the fast, voltage-dependent conformational changes of the Ci-VSP voltage sensor are transduced to similarly fast fluorescence read-outs....

  6. Écritures de soi en souffrance: une lecture des régimes structurant l’imaginaire du texte social vivant

    Directory of Open Access Journals (Sweden)

    Orazio Maria Valastro


    Full Text Available Les études ici réunies vont nous permettre d’examiner différentes genres d’écritures et typologies d’écrivains (poétique et épistolaire, roman autobiographique et autofiction, narratif et témoignage, explorant un corpus considérable (œuvres littéraires et littératures personnelles et des pratiques significatives (activités narratives et autobiographiques. Le thème proposé, les écritures de soi en souffrance, se dénoue sollicitant une réflexion sur les rapports entre les œuvres et les différents contextes sociaux et historiques. Nous pouvons envisager et saisir l’ensemble du corpus et des pratiques considérées en tant que texte social vivant, inscrivant l’expérience de l’existence et du monde dans la pratique de l’écriture. (... Nous allons solliciter et proposer une lecture sociologique et anthropologique de l’ensemble des études proposés au sein du numéro monographique, privilégiant une analyse de la matrice du discours social structurant la conscience individuelle et collective.

  7. Analog photonic link based on the Aulter-Townes splitting induced dual-band filter for OCS and the SOI signal processor. (United States)

    Yu, Hongchen; Li, Pengxiao; Chen, Minghua; Chen, Hongwei; Yang, Sigang; Xie, Shizhong


    Analog photonic link (APL) is attractive for its potential high performance of larger dynamic range, tunability, and immunity to electromagnetic interference (EMI). An APL based on the Aulter-Townes splitting (ATS)-effect-induced dual-band filter for optical carrier suppression (OCS) and the SOI signal processor has been proposed and experimentally demonstrated. The bandwidths of the two passbands are approximately 780 MHz, and the interval could be tuned from 8 GHz to more than 80 GHz in simulation. The extinction ratio is larger than 20 dB, which can provide a 20-dB suppression of the optical carrier and higher order sidebands to obtain clean optical carrier and local oscillator (LO) for modulation and down-conversion. The down-conversion APL based on the proposed dual-band OCS filter at X-band has been presented, and the spurious free dynamic range (SFDR) of the link is measured to be as high as 102.2  dB-Hz(2/3).

  8. What Happens After the Demonstration Phase? The Sustainability of Canada's At Home/Chez Soi Housing First Programs for Homeless Persons with Mental Illness. (United States)

    Nelson, Geoffrey; Caplan, Rachel; MacLeod, Timothy; Macnaughton, Eric; Cherner, Rebecca; Aubry, Tim; Méthot, Christian; Latimer, Eric; Piat, Myra; Plenert, Erin; McCullough, Scott; Zell, Sarah; Patterson, Michelle; Stergiopoulos, Vicky; Goering, Paula


    This research examined the sustainability of Canada's At Home/Chez Soi Housing First (HF) programs for homeless persons with mental illness 2 years after the end of the demonstration phase of a large (more than 2000 participants enrolled), five-site, randomized controlled trial. Qualitative interviews were conducted with 142 participants (key informants, HF staff, and persons with lived experience) to understand sustainability outcomes and factors that influenced those outcomes. Also, a self-report HF fidelity measure was completed for nine HF programs that continued after the demonstration project. A cross-site analysis was performed, using the five sites as case studies. The findings revealed that nine of the 12 HF programs (75%) were sustained, and that seven of the nine programs reported a high level of fidelity (achieving an overall score of 3.5 or higher on a 4-point scale). The sites varied in terms of the level of systems integration and expansion of HF that were achieved. Factors that promoted or impeded sustainability were observed at multiple ecological levels: broad contextual (i.e., dissemination of research evidence, the policy context), community (i.e., partnerships, the presence of HF champions), organizational (i.e., leadership, ongoing training, and technical assistance), and individual (i.e., staff turnover, changes, and capacity). The findings are discussed in terms of the implementation science literature and their implications for how evidence-based programs like HF can be sustained. © Society for Community Research and Action 2017.

  9. Investigation of the Low-Temperature Behavior of FD-SOI MOSFETs in the Saturation Regime Using Y and Z Functions

    Directory of Open Access Journals (Sweden)

    A. Karsenty


    Full Text Available The saturation regime of two types of fully depleted (FD SOI MOSFET devices was studied. Ultrathin body (UTB and gate recessed channel (GRC devices were fabricated simultaneously on the same silicon wafer through a selective “gate recessed” process. They share the same W/L ratio but have a channel film thickness of 46 nm and 2.2 nm, respectively. Their standard characteristics (IDS-VDS and IDS-VGS of the devices were measured at room temperature before cooling down to 77 K. Surprisingly, their respective temperature dependence is found to be opposite. In this paper, we focus our comparative analysis on the devices' conduction using a Y-function applied to the saturation domain. The influence of the temperature in this domain is presented for the first time. We point out the limits of the Y-function analysis and show that a new function called Z can be used to extract the series resistance in the saturation regime.

  10. Voltage-programmable liquid optical interface (United States)

    Brown, C. V.; Wells, G. G.; Newton, M. I.; McHale, G.


    Recently, there has been intense interest in photonic devices based on microfluidics, including displays and refractive tunable microlenses and optical beamsteerers that work using the principle of electrowetting. Here, we report a novel approach to optical devices in which static wrinkles are produced at the surface of a thin film of oil as a result of dielectrophoretic forces. We have demonstrated this voltage-programmable surface wrinkling effect in periodic devices with pitch lengths of between 20 and 240 µm and with response times of less than 40 µs. By a careful choice of oils, it is possible to optimize either for high-amplitude sinusoidal wrinkles at micrometre-scale pitches or more complex non-sinusoidal profiles with higher Fourier components at longer pitches. This opens up the possibility of developing rapidly responsive voltage-programmable, polarization-insensitive transmission and reflection diffraction devices and arbitrary surface profile optical devices.

  11. Electronic Voltage and Current Transformers Testing Device

    Directory of Open Access Journals (Sweden)

    Yong Xiao


    Full Text Available A method for testing electronic instrument transformers is described, including electronic voltage and current transformers (EVTs, ECTs with both analog and digital outputs. A testing device prototype is developed. It is based on digital signal processing of the signals that are measured at the secondary outputs of the tested transformer and the reference transformer when the same excitation signal is fed to their primaries. The test that estimates the performance of the prototype has been carried out at the National Centre for High Voltage Measurement and the prototype is approved for testing transformers with precision class up to 0.2 at the industrial frequency (50 Hz or 60 Hz. The device is suitable for on-site testing due to its high accuracy, simple structure and low-cost hardware.

  12. Electronic voltage and current transformers testing device. (United States)

    Pan, Feng; Chen, Ruimin; Xiao, Yong; Sun, Weiming


    A method for testing electronic instrument transformers is described, including electronic voltage and current transformers (EVTs, ECTs) with both analog and digital outputs. A testing device prototype is developed. It is based on digital signal processing of the signals that are measured at the secondary outputs of the tested transformer and the reference transformer when the same excitation signal is fed to their primaries. The test that estimates the performance of the prototype has been carried out at the National Centre for High Voltage Measurement and the prototype is approved for testing transformers with precision class up to 0.2 at the industrial frequency (50 Hz or 60 Hz). The device is suitable for on-site testing due to its high accuracy, simple structure and low-cost hardware.

  13. High-voltage multijunction photovoltaic solar cell

    Energy Technology Data Exchange (ETDEWEB)

    Doroshenko, V.G.; Zaks, M.B.; Kalash' yan, V.A.; Lozovskiy, V.N.; Skokov, Yu.V.; Solodukha, O.I.


    The possibility of developing a high-voltage multijunction photovoltaic cell (HMPC) based on a single crystal with multiple vertical p-n junctions formed by heavily doped zones at right angles to the illuminated surface of the instrument is demonstrated. A laboratory technology for producing HMPC based on the zone recrystallization method with a temperature gradient and linear zones is presented. The investigated variant of HMPC was made of n-type silicon with resistivity of 1 in which are formed vertical p/sup +/ type zones doped with aluminum or an aluminum-boron alloy. The performance HMPC (with 11 and 5 vertical p-n junctions) was experimentally investigated in the presence of 400 to 500 ms light pulses from a xenon lamp with a near-solar spectrum and the current-voltage characteristic of the HMPC was found to be then virtually unaffected.

  14. Energy harvesting in high voltage measuring techniques (United States)

    Żyłka, Pawel; Doliński, Marcin


    The paper discusses selected problems related to application of energy harvesting (that is, generating electricity from surplus energy present in the environment) to supply autonomous ultra-low-power measurement systems applicable in high voltage engineering. As a practical example of such implementation a laboratory model of a remote temperature sensor is presented, which is self-powered by heat generated in a current-carrying busbar in HV- switchgear. Presented system exploits a thermoelectric harvester based on a passively cooled Peltier module supplying micro-power low-voltage dc-dc converter driving energy-efficient temperature sensor, microcontroller and a fibre-optic transmitter. Performance of the model in laboratory simulated conditions are presented and discussed.

  15. Electrical system architecture having high voltage bus (United States)

    Hoff, Brian Douglas [East Peoria, IL; Akasam, Sivaprasad [Peoria, IL


    An electrical system architecture is disclosed. The architecture has a power source configured to generate a first power, and a first bus configured to receive the first power from the power source. The architecture also has a converter configured to receive the first power from the first bus and convert the first power to a second power, wherein a voltage of the second power is greater than a voltage of the first power, and a second bus configured to receive the second power from the converter. The architecture further has a power storage device configured to receive the second power from the second bus and deliver the second power to the second bus, a propulsion motor configured to receive the second power from the second bus, and an accessory motor configured to receive the second power from the second bus.

  16. Supply Voltage Glitches Effects on CMOS Circuits


    Djellid-Ouar, Anissa; Cathébras, Guy; Bancel, Frédéric


    International audience; Among the attacks applied on secure circuits, fault injection techniques consist in the use of a combination of environmental conditions that induce computational errors in the chip that can leak protected informations. The purpose of our study is to build an accurate model able to describe the behaviour of CMOS circuits in presence of deliberated short supply voltage variations. This behaviour depends strongly on the basic gates (combinational logic, registers. . . ) ...

  17. Voltage Control of Spin Waves in Nanostructures


    Chen, Yu-Jin


    This dissertation describes the experiments that investigate new methods to control spin waves by electric field. In one experiment, we excite parametric resonance of magnetization in nanoscale magnetic tunnel junctions, which are multilayer thin film devices patterned into nanopillar shape. One of the layers possesses strong perpendicular magnetic anisotropy and exhibits strong voltage-controlled magnetic anisotropy. This magneto-electric effect allows one to modulate the perpendicular magne...

  18. Printing low-voltage dielectric elastomer actuators (United States)

    Poulin, Alexandre; Rosset, Samuel; Shea, Herbert R.


    We demonstrate the fabrication of fully printed thin dielectric elastomer actuators (DEAs), reducing the operation voltage below 300 V while keeping good actuation strain. DEAs are soft actuators capable of strains greater than 100% and response times below 1 ms, but they require driving voltage in the kV range, limiting the possible applications. One way to reduce the driving voltage of DEAs is to decrease the dielectric membrane thickness, which is typically in the 20-100 μm range, as reliable fabrication becomes challenging below this thickness. We report here the use of pad-printing to produce μm thick silicone membranes, on which we pad-print μm thick compliant electrodes to create DEAs. We achieve a lateral actuation strain of 7.5% at only 245 V on a 3 μm thick pad-printed membrane. This corresponds to a ratio of 125%/kV2, by far the highest reported value for DEAs. To quantify the increasing stiffening impact of the electrodes on DEA performance as the membrane thickness decreases, we compare two circular actuators, one with 3 μm- and one with 30 μm-thick membranes. Our experimental measurements show that the strain uniformity of the 3 μm-DEA is indeed affected by the mechanical impact of the electrodes. We developed a simple DEA model that includes realistic electrodes of finite stiffness, rather than assuming zero stiffness electrodes as is commonly done. The simulation results confirm that the stiffening impact of the electrodes is an important parameter that should not be neglected in the design of thin-DEAs. This work presents a practical approach towards low-voltage DEAs, a critical step for the development of real world applications.

  19. Multiagent voltage and reactive power control system

    Directory of Open Access Journals (Sweden)

    I. Arkhipov


    Full Text Available This paper is devoted to the research of multiagent voltage and reactive power control system development. The prototype of the system has been developed by R&D Center at FGC UES (Russia. The control system architecture is based on the innovative multiagent system theory application that leads to the achievement of several significant advantages (in comparison to traditional control systems implementation such as control system efficiency enhancement, control system survivability and cyber security.

  20. DC Voltage Interface Standards for Naval Applications (United States)


    from MIL-STD-1399 Section 300b. • Maximum Load Line-to-Ground Capacitance : The maximum line to ground capacitance from each terminal of the load...conversion equipment or switchgear) may have a length limit to prevent excessive voltage drop due to the cable inductance when subjected to a high power...excursion. Sonar and radar are cited as examples of this type of power user. The magnitude of the pulse is presumably uniform. In [1] and [2], a