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Sample records for vlsi physical design

  1. VLSI design

    CERN Document Server

    Chandrasetty, Vikram Arkalgud

    2011-01-01

    This book provides insight into the practical design of VLSI circuits. It is aimed at novice VLSI designers and other enthusiasts who would like to understand VLSI design flows. Coverage includes key concepts in CMOS digital design, design of DSP and communication blocks on FPGAs, ASIC front end and physical design, and analog and mixed signal design. The approach is designed to focus on practical implementation of key elements of the VLSI design process, in order to make the topic accessible to novices. The design concepts are demonstrated using software from Mathworks, Xilinx, Mentor Graphic

  2. VLSI design

    CERN Document Server

    Basu, D K

    2014-01-01

    Very Large Scale Integrated Circuits (VLSI) design has moved from costly curiosity to an everyday necessity, especially with the proliferated applications of embedded computing devices in communications, entertainment and household gadgets. As a result, more and more knowledge on various aspects of VLSI design technologies is becoming a necessity for the engineering/technology students of various disciplines. With this goal in mind the course material of this book has been designed to cover the various fundamental aspects of VLSI design, like Categorization and comparison between various technologies used for VLSI design Basic fabrication processes involved in VLSI design Design of MOS, CMOS and Bi CMOS circuits used in VLSI Structured design of VLSI Introduction to VHDL for VLSI design Automated design for placement and routing of VLSI systems VLSI testing and testability The various topics of the book have been discussed lucidly with analysis, when required, examples, figures and adequate analytical and the...

  3. VLSI design

    CERN Document Server

    Einspruch, Norman G

    1986-01-01

    VLSI Electronics Microstructure Science, Volume 14: VLSI Design presents a comprehensive exposition and assessment of the developments and trends in VLSI (Very Large Scale Integration) electronics. This volume covers topics that range from microscopic aspects of materials behavior and device performance to the comprehension of VLSI in systems applications. Each article is prepared by a recognized authority. The subjects discussed in this book include VLSI processor design methodology; the RISC (Reduced Instruction Set Computer); the VLSI testing program; silicon compilers for VLSI; and special

  4. Compact MOSFET models for VLSI design

    CERN Document Server

    Bhattacharyya, A B

    2009-01-01

    Practicing designers, students, and educators in the semiconductor field face an ever expanding portfolio of MOSFET models. In Compact MOSFET Models for VLSI Design , A.B. Bhattacharyya presents a unified perspective on the topic, allowing the practitioner to view and interpret device phenomena concurrently using different modeling strategies. Readers will learn to link device physics with model parameters, helping to close the gap between device understanding and its use for optimal circuit performance. Bhattacharyya also lays bare the core physical concepts that will drive the future of VLSI.

  5. Technology computer aided design simulation for VLSI MOSFET

    CERN Document Server

    Sarkar, Chandan Kumar

    2013-01-01

    Responding to recent developments and a growing VLSI circuit manufacturing market, Technology Computer Aided Design: Simulation for VLSI MOSFET examines advanced MOSFET processes and devices through TCAD numerical simulations. The book provides a balanced summary of TCAD and MOSFET basic concepts, equations, physics, and new technologies related to TCAD and MOSFET. A firm grasp of these concepts allows for the design of better models, thus streamlining the design process, saving time and money. This book places emphasis on the importance of modeling and simulations of VLSI MOS transistors and

  6. VLSI electronics microstructure science

    CERN Document Server

    1981-01-01

    VLSI Electronics: Microstructure Science, Volume 3 evaluates trends for the future of very large scale integration (VLSI) electronics and the scientific base that supports its development.This book discusses the impact of VLSI on computer architectures; VLSI design and design aid requirements; and design, fabrication, and performance of CCD imagers. The approaches, potential, and progress of ultra-high-speed GaAs VLSI; computer modeling of MOSFETs; and numerical physics of micron-length and submicron-length semiconductor devices are also elaborated. This text likewise covers the optical linewi

  7. Optimal Solution for VLSI Physical Design Automation Using Hybrid Genetic Algorithm

    Directory of Open Access Journals (Sweden)

    I. Hameem Shanavas

    2014-01-01

    Full Text Available In Optimization of VLSI Physical Design, area minimization and interconnect length minimization is an important objective in physical design automation of very large scale integration chips. The objective of minimizing the area and interconnect length would scale down the size of integrated chips. To meet the above objective, it is necessary to find an optimal solution for physical design components like partitioning, floorplanning, placement, and routing. This work helps to perform the optimization of the benchmark circuits with the above said components of physical design using hierarchical approach of evolutionary algorithms. The goal of minimizing the delay in partitioning, minimizing the silicon area in floorplanning, minimizing the layout area in placement, minimizing the wirelength in routing has indefinite influence on other criteria like power, clock, speed, cost, and so forth. Hybrid evolutionary algorithm is applied on each of its phases to achieve the objective. Because evolutionary algorithm that includes one or many local search steps within its evolutionary cycles to obtain the minimization of area and interconnect length. This approach combines a hierarchical design like genetic algorithm and simulated annealing to attain the objective. This hybrid approach can quickly produce optimal solutions for the popular benchmarks.

  8. VLSI Design with Alliance Free CAD Tools: an Implementation Example

    Directory of Open Access Journals (Sweden)

    Chávez-Bracamontes Ramón

    2015-07-01

    Full Text Available This paper presents the methodology used for a digital integrated circuit design that implements the communication protocol known as Serial Peripheral Interface, using the Alliance CAD System. The aim of this paper is to show how the work of VLSI design can be done by graduate and undergraduate students with minimal resources and experience. The physical design was sent to be fabricated using the CMOS AMI C5 process that features 0.5 micrometer in transistor size, sponsored by the MOSIS Educational Program. Tests were made on a platform that transfers data from inertial sensor measurements to the designed SPI chip, which in turn sends the data back on a parallel bus to a common microcontroller. The results show the efficiency of the employed methodology in VLSI design, as well as the feasibility of ICs manufacturing from school projects that have insufficient or no source of funding

  9. Multi-valued LSI/VLSI logic design

    Science.gov (United States)

    Santrakul, K.

    A procedure for synthesizing any large complex logic system, such as LSI and VLSI integrated circuits is described. This scheme uses Multi-Valued Multi-plexers (MVMUX) as the basic building blocks and the tree as the structure of the circuit realization. Simple built-in test circuits included in the network (the main current), provide a thorough functional checking of the network at any time. In brief, four major contributions are made: (1) multi-valued Algorithmic State Machine (ASM) chart for describing an LSI/VLSI behavior; (2) a tree-structured multi-valued multiplexer network which can be obtained directly from an ASM chart; (3) a heuristic tree-structured synthesis method for realizing any combinational logic with minimal or nearly-minimal MVMUX; and (4) a hierarchical design of LSI/VLSI with built-in parallel testing capability.

  10. Handbook of VLSI chip design and expert systems

    CERN Document Server

    Schwarz, A F

    1993-01-01

    Handbook of VLSI Chip Design and Expert Systems provides information pertinent to the fundamental aspects of expert systems, which provides a knowledge-based approach to problem solving. This book discusses the use of expert systems in every possible subtask of VLSI chip design as well as in the interrelations between the subtasks.Organized into nine chapters, this book begins with an overview of design automation, which can be identified as Computer-Aided Design of Circuits and Systems (CADCAS). This text then presents the progress in artificial intelligence, with emphasis on expert systems.

  11. VLSI Design of Trusted Virtual Sensors

    Directory of Open Access Journals (Sweden)

    Macarena C. Martínez-Rodríguez

    2018-01-01

    Full Text Available This work presents a Very Large Scale Integration (VLSI design of trusted virtual sensors providing a minimum unitary cost and very good figures of size, speed and power consumption. The sensed variable is estimated by a virtual sensor based on a configurable and programmable PieceWise-Affine hyper-Rectangular (PWAR model. An algorithm is presented to find the best values of the programmable parameters given a set of (empirical or simulated input-output data. The VLSI design of the trusted virtual sensor uses the fast authenticated encryption algorithm, AEGIS, to ensure the integrity of the provided virtual measurement and to encrypt it, and a Physical Unclonable Function (PUF based on a Static Random Access Memory (SRAM to ensure the integrity of the sensor itself. Implementation results of a prototype designed in a 90-nm Complementary Metal Oxide Semiconductor (CMOS technology show that the active silicon area of the trusted virtual sensor is 0.86 mm 2 and its power consumption when trusted sensing at 50 MHz is 7.12 mW. The maximum operation frequency is 85 MHz, which allows response times lower than 0.25 μ s. As application example, the designed prototype was programmed to estimate the yaw rate in a vehicle, obtaining root mean square errors lower than 1.1%. Experimental results of the employed PUF show the robustness of the trusted sensing against aging and variations of the operation conditions, namely, temperature and power supply voltage (final value as well as ramp-up time.

  12. VLSI Design of Trusted Virtual Sensors.

    Science.gov (United States)

    Martínez-Rodríguez, Macarena C; Prada-Delgado, Miguel A; Brox, Piedad; Baturone, Iluminada

    2018-01-25

    This work presents a Very Large Scale Integration (VLSI) design of trusted virtual sensors providing a minimum unitary cost and very good figures of size, speed and power consumption. The sensed variable is estimated by a virtual sensor based on a configurable and programmable PieceWise-Affine hyper-Rectangular (PWAR) model. An algorithm is presented to find the best values of the programmable parameters given a set of (empirical or simulated) input-output data. The VLSI design of the trusted virtual sensor uses the fast authenticated encryption algorithm, AEGIS, to ensure the integrity of the provided virtual measurement and to encrypt it, and a Physical Unclonable Function (PUF) based on a Static Random Access Memory (SRAM) to ensure the integrity of the sensor itself. Implementation results of a prototype designed in a 90-nm Complementary Metal Oxide Semiconductor (CMOS) technology show that the active silicon area of the trusted virtual sensor is 0.86 mm 2 and its power consumption when trusted sensing at 50 MHz is 7.12 mW. The maximum operation frequency is 85 MHz, which allows response times lower than 0.25 μ s. As application example, the designed prototype was programmed to estimate the yaw rate in a vehicle, obtaining root mean square errors lower than 1.1%. Experimental results of the employed PUF show the robustness of the trusted sensing against aging and variations of the operation conditions, namely, temperature and power supply voltage (final value as well as ramp-up time).

  13. Harnessing VLSI System Design with EDA Tools

    CERN Document Server

    Kamat, Rajanish K; Gaikwad, Pawan K; Guhilot, Hansraj

    2012-01-01

    This book explores various dimensions of EDA technologies for achieving different goals in VLSI system design. Although the scope of EDA is very broad and comprises diversified hardware and software tools to accomplish different phases of VLSI system design, such as design, layout, simulation, testability, prototyping and implementation, this book focuses only on demystifying the code, a.k.a. firmware development and its implementation with FPGAs. Since there are a variety of languages for system design, this book covers various issues related to VHDL, Verilog and System C synergized with EDA tools, using a variety of case studies such as testability, verification and power consumption. * Covers aspects of VHDL, Verilog and Handel C in one text; * Enables designers to judge the appropriateness of each EDA tool for relevant applications; * Omits discussion of design platforms and focuses on design case studies; * Uses design case studies from diversified application domains such as network on chip, hospital on...

  14. NASA Space Engineering Research Center for VLSI systems design

    Science.gov (United States)

    1991-01-01

    This annual review reports the center's activities and findings on very large scale integration (VLSI) systems design for 1990, including project status, financial support, publications, the NASA Space Engineering Research Center (SERC) Symposium on VLSI Design, research results, and outreach programs. Processor chips completed or under development are listed. Research results summarized include a design technique to harden complementary metal oxide semiconductors (CMOS) memory circuits against single event upset (SEU); improved circuit design procedures; and advances in computer aided design (CAD), communications, computer architectures, and reliability design. Also described is a high school teacher program that exposes teachers to the fundamentals of digital logic design.

  15. Digital VLSI systems design a design manual for implementation of projects on FPGAs and ASICs using Verilog

    CERN Document Server

    Ramachandran, S

    2007-01-01

    Digital VLSI Systems Design is written for an advanced level course using Verilog and is meant for undergraduates, graduates and research scholars of Electrical, Electronics, Embedded Systems, Computer Engineering and interdisciplinary departments such as Bio Medical, Mechanical, Information Technology, Physics, etc. It serves as a reference design manual for practicing engineers and researchers as well. Diligent freelance readers and consultants may also start using this book with ease. The book presents new material and theory as well as synthesis of recent work with complete Project Designs

  16. Design of two easily-testable VLSI array multipliers

    Energy Technology Data Exchange (ETDEWEB)

    Ferguson, J.; Shen, J.P.

    1983-01-01

    Array multipliers are well-suited to VLSI implementation because of the regularity in their iterative structure. However, most VLSI circuits are very difficult to test. This paper shows that, with appropriate cell design, array multipliers can be designed to be very easily testable. An array multiplier is called c-testable if all its adder cells can be exhaustively tested while requiring only a constant number of test patterns. The testability of two well-known array multiplier structures are studied. The conventional design of the carry-save array multipler is shown to be not c-testable. However, a modified design, using a modified adder cell, is generated and shown to be c-testable and requires only 16 test patterns. Similar results are obtained for the baugh-wooley two's complement array multiplier. A modified design of the baugh-wooley array multiplier is shown to be c-testable and requires 55 test patterns. The implementation of a practical c-testable 16*16 array multiplier is also presented. 10 references.

  17. Microfluidic very large scale integration (VLSI) modeling, simulation, testing, compilation and physical synthesis

    CERN Document Server

    Pop, Paul; Madsen, Jan

    2016-01-01

    This book presents the state-of-the-art techniques for the modeling, simulation, testing, compilation and physical synthesis of mVLSI biochips. The authors describe a top-down modeling and synthesis methodology for the mVLSI biochips, inspired by microelectronics VLSI methodologies. They introduce a modeling framework for the components and the biochip architecture, and a high-level microfluidic protocol language. Coverage includes a topology graph-based model for the biochip architecture, and a sequencing graph to model for biochemical application, showing how the application model can be obtained from the protocol language. The techniques described facilitate programmability and automation, enabling developers in the emerging, large biochip market. · Presents the current models used for the research on compilation and synthesis techniques of mVLSI biochips in a tutorial fashion; · Includes a set of "benchmarks", that are presented in great detail and includes the source code of several of the techniques p...

  18. vPELS: An E-Learning Social Environment for VLSI Design with Content Security Using DRM

    Science.gov (United States)

    Dewan, Jahangir; Chowdhury, Morshed; Batten, Lynn

    2014-01-01

    This article provides a proposal for personal e-learning system (vPELS [where "v" stands for VLSI: very large scale integrated circuit])) architecture in the context of social network environment for VLSI Design. The main objective of vPELS is to develop individual skills on a specific subject--say, VLSI--and share resources with peers.…

  19. VLSI top-down design based on the separation of hierarchies

    NARCIS (Netherlands)

    Spaanenburg, L.; Broekema, A.; Leenstra, J.; Huys, C.

    1986-01-01

    Despite the presence of structure, interactions between the three views on VLSI design still lead to lengthy iterations. By separating the hierarchies for the respective views, the interactions are reduced. This separated hierarchy allows top-down design with functional abstractions as exemplified

  20. Synthesis of on-chip control circuits for mVLSI biochips

    DEFF Research Database (Denmark)

    Potluri, Seetal; Schneider, Alexander Rüdiger; Hørslev-Petersen, Martin

    2017-01-01

    them to laboratory environments. To address this issue, researchers have proposed methods to reduce the number of offchip pressure sources, through integration of on-chip pneumatic control logic circuits fabricated using three-layer monolithic membrane valve technology. Traditionally, mVLSI biochip......-chip control circuit design and (iii) the integration of on-chip control in the placement and routing design tasks. In this paper we present a design methodology for logic synthesis and physical synthesis of mVLSI biochips that use on-chip control. We show how the proposed methodology can be successfully...... applied to generate biochip layouts with integrated on-chip pneumatic control....

  1. Digital VLSI design with Verilog a textbook from Silicon Valley Technical Institute

    CERN Document Server

    Williams, John

    2008-01-01

    This unique textbook is structured as a step-by-step course of study along the lines of a VLSI IC design project. In a nominal schedule of 12 weeks, two days and about 10 hours per week, the entire verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer - deserializer, including synthesizable PLLs. Digital VLSI Design With Verilog is all an engineer needs for in-depth understanding of the verilog language: Syntax, synthesis semantics, simulation, and test. Complete solutions for the 27 labs are provided on the

  2. VLSI Architecture for Configurable and Low-Complexity Design of Hard-Decision Viterbi Decoding Algorithm

    Directory of Open Access Journals (Sweden)

    Rachmad Vidya Wicaksana Putra

    2016-06-01

    Full Text Available Convolutional encoding and data decoding are fundamental processes in convolutional error correction. One of the most popular error correction methods in decoding is the Viterbi algorithm. It is extensively implemented in many digital communication applications. Its VLSI design challenges are about area, speed, power, complexity and configurability. In this research, we specifically propose a VLSI architecture for a configurable and low-complexity design of a hard-decision Viterbi decoding algorithm. The configurable and low-complexity design is achieved by designing a generic VLSI architecture, optimizing each processing element (PE at the logical operation level and designing a conditional adapter. The proposed design can be configured for any predefined number of trace-backs, only by changing the trace-back parameter value. Its computational process only needs N + 2 clock cycles latency, with N is the number of trace-backs. Its configurability function has been proven for N = 8, N = 16, N = 32 and N = 64. Furthermore, the proposed design was synthesized and evaluated in Xilinx and Altera FPGA target boards for area consumption and speed performance.

  3. DPL/Daedalus design environment (for VLSI)

    Energy Technology Data Exchange (ETDEWEB)

    Batali, J; Mayle, N; Shrobe, H; Sussman, G; Weise, D

    1981-01-01

    The DPL/Daedalus design environment is an interactive VLSI design system implemented at the MIT Artificial Intelligence Laboratory. The system consists of several components: a layout language called DPL (for design procedure language); an interactive graphics facility (Daedalus); and several special purpose design procedures for constructing complex artifacts such as PLAs and microprocessor data paths. Coordinating all of these is a generalized property list data base which contains both the data representing circuits and the procedures for constructing them. The authors first review the nature of the data base and then turn to DPL and Daedalus, the two most common ways of entering information into the data base. The next two sections review the specialized procedures for constructing PLAs and data paths; the final section describes a tool for hierarchical node extraction. 5 references.

  4. Formal verification an essential toolkit for modern VLSI design

    CERN Document Server

    Seligman, Erik; Kumar, M V Achutha Kiran

    2015-01-01

    Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation, with hands-on advice for working engineers integrating these techniques into their work. Building on a basic knowledge of System Verilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes at Intel and other companies. The text prepares readers to effectively introduce FV in their organization and deploy FV techniques to increase design and validation productivity. Presents formal verific

  5. VLSI architecture and design for the Fermat Number Transform implementation

    Energy Technology Data Exchange (ETDEWEB)

    Pajayakrit, A.

    1987-01-01

    A new technique of sectioning a pipelined transformer, using the Fermat Number Transform (FNT), is introduced. Also, a novel VLSI design which overcomes the problems of implementing FNTs, for use in fast convolution/correlation, is described. The design comprises one complete section of a pipelined transformer and may be programmed to function at any point in a forward or inverse pipeline, so allowing the construction of a pipelined convolver or correlator using identical chips, thus the favorable properties of the transform can be exploited. This overcomes the difficulty of fitting a complete pipeline onto one chip without resorting to the use of several different designs. The implementation of high-speed convolver/correlator using the VLSI chips has been successfully developed and tested. For impulse response lengths of up to 16 points the sampling rates of 0.5 MHz can be achieved. Finally, the filter speed performance using the FNT chips is compared to other designs and conclusions drawn on the merits of the FNT for this application. Also, the advantages and limitations of the FNT are analyzed, with respect to the more conventional FFT, and the results are provided.

  6. Design of a VLSI Decoder for Partially Structured LDPC Codes

    Directory of Open Access Journals (Sweden)

    Fabrizio Vacca

    2008-01-01

    of their parity matrix can be partitioned into two disjoint sets, namely, the structured and the random ones. For the proposed class of codes a constructive design method is provided. To assess the value of this method the constructed codes performance are presented. From these results, a novel decoding method called split decoding is introduced. Finally, to prove the effectiveness of the proposed approach a whole VLSI decoder is designed and characterized.

  7. VLSI in medicine

    CERN Document Server

    Einspruch, Norman G

    1989-01-01

    VLSI Electronics Microstructure Science, Volume 17: VLSI in Medicine deals with the more important applications of VLSI in medical devices and instruments.This volume is comprised of 11 chapters. It begins with an article about medical electronics. The following three chapters cover diagnostic imaging, focusing on such medical devices as magnetic resonance imaging, neurometric analyzer, and ultrasound. Chapters 5, 6, and 7 present the impact of VLSI in cardiology. The electrocardiograph, implantable cardiac pacemaker, and the use of VLSI in Holter monitoring are detailed in these chapters. The

  8. VLSI Design of SVM-Based Seizure Detection System With On-Chip Learning Capability.

    Science.gov (United States)

    Feng, Lichen; Li, Zunchao; Wang, Yuanfa

    2018-02-01

    Portable automatic seizure detection system is very convenient for epilepsy patients to carry. In order to make the system on-chip trainable with high efficiency and attain high detection accuracy, this paper presents a very large scale integration (VLSI) design based on the nonlinear support vector machine (SVM). The proposed design mainly consists of a feature extraction (FE) module and an SVM module. The FE module performs the three-level Daubechies discrete wavelet transform to fit the physiological bands of the electroencephalogram (EEG) signal and extracts the time-frequency domain features reflecting the nonstationary signal properties. The SVM module integrates the modified sequential minimal optimization algorithm with the table-driven-based Gaussian kernel to enable efficient on-chip learning. The presented design is verified on an Altera Cyclone II field-programmable gate array and tested using the two publicly available EEG datasets. Experiment results show that the designed VLSI system improves the detection accuracy and training efficiency.

  9. VLSI electronics microstructure science

    CERN Document Server

    1982-01-01

    VLSI Electronics: Microstructure Science, Volume 4 reviews trends for the future of very large scale integration (VLSI) electronics and the scientific base that supports its development.This book discusses the silicon-on-insulator for VLSI and VHSIC, X-ray lithography, and transient response of electron transport in GaAs using the Monte Carlo method. The technology and manufacturing of high-density magnetic-bubble memories, metallic superlattices, challenge of education for VLSI, and impact of VLSI on medical signal processing are also elaborated. This text likewise covers the impact of VLSI t

  10. Using Software Technology to Specify Abstract Interfaces in VLSI Design.

    Science.gov (United States)

    1985-01-01

    with the complexity lev- els inherent in VLSI design, in that they can capitalize on their foundations in discrete mathemat- ics and the theory of...basis, rather than globally. Such a partitioning of module semantics makes the specification easier to construct and verify intelectual !y; it also...access function definitions. A standard language improves executability characteristics by capitalizing on portable, optimized system software developed

  11. VLSI structures for track finding

    International Nuclear Information System (INIS)

    Dell'Orso, M.

    1989-01-01

    We discuss the architecture of a device based on the concept of associative memory designed to solve the track finding problem, typical of high energy physics experiments, in a time span of a few microseconds even for very high multiplicity events. This ''machine'' is implemented as a large array of custom VLSI chips. All the chips are equal and each of them stores a number of ''patterns''. All the patterns in all the chips are compared in parallel to the data coming from the detector while the detector is being read out. (orig.)

  12. VLSI Architectures for Computing DFT's

    Science.gov (United States)

    Truong, T. K.; Chang, J. J.; Hsu, I. S.; Reed, I. S.; Pei, D. Y.

    1986-01-01

    Simplifications result from use of residue Fermat number systems. System of finite arithmetic over residue Fermat number systems enables calculation of discrete Fourier transform (DFT) of series of complex numbers with reduced number of multiplications. Computer architectures based on approach suitable for design of very-large-scale integrated (VLSI) circuits for computing DFT's. General approach not limited to DFT's; Applicable to decoding of error-correcting codes and other transform calculations. System readily implemented in VLSI.

  13. VLSI implementations for image communications

    CERN Document Server

    Pirsch, P

    1993-01-01

    The past few years have seen a rapid growth in image processing and image communication technologies. New video services and multimedia applications are continuously being designed. Essential for all these applications are image and video compression techniques. The purpose of this book is to report on recent advances in VLSI architectures and their implementation for video signal processing applications with emphasis on video coding for bit rate reduction. Efficient VLSI implementation for video signal processing spans a broad range of disciplines involving algorithms, architectures, circuits

  14. Parallel algorithms for placement and routing in VLSI design. Ph.D. Thesis

    Science.gov (United States)

    Brouwer, Randall Jay

    1991-01-01

    The computational requirements for high quality synthesis, analysis, and verification of very large scale integration (VLSI) designs have rapidly increased with the fast growing complexity of these designs. Research in the past has focused on the development of heuristic algorithms, special purpose hardware accelerators, or parallel algorithms for the numerous design tasks to decrease the time required for solution. Two new parallel algorithms are proposed for two VLSI synthesis tasks, standard cell placement and global routing. The first algorithm, a parallel algorithm for global routing, uses hierarchical techniques to decompose the routing problem into independent routing subproblems that are solved in parallel. Results are then presented which compare the routing quality to the results of other published global routers and which evaluate the speedups attained. The second algorithm, a parallel algorithm for cell placement and global routing, hierarchically integrates a quadrisection placement algorithm, a bisection placement algorithm, and the previous global routing algorithm. Unique partitioning techniques are used to decompose the various stages of the algorithm into independent tasks which can be evaluated in parallel. Finally, results are presented which evaluate the various algorithm alternatives and compare the algorithm performance to other placement programs. Measurements are presented on the parallel speedups available.

  15. Spike Neuromorphic VLSI-Based Bat Echolocation for Micro-Aerial Vehicle Guidance

    National Research Council Canada - National Science Library

    Horiuchi, Timothy K; Krishnaprasad, P. S

    2007-01-01

    .... This includes multiple efforts related to a VLSI-based echolocation system being developed in one of our laboratories from algorithm development, bat flight data analysis, to VLSI circuit design...

  16. VLSI and system architecture-the new development of system 5G

    Energy Technology Data Exchange (ETDEWEB)

    Sakamura, K.; Sekino, A.; Kodaka, T.; Uehara, T.; Aiso, H.

    1982-01-01

    A research and development proposal is presented for VLSI CAD systems and for a hardware environment called system 5G on which the VLSI CAD systems run. The proposed CAD systems use a hierarchically organized design language to enable design of anything from basic architectures of VLSI to VLSI mask patterns in a uniform manner. The cad systems will eventually become intelligent cad systems that acquire design knowledge and perform automatic design of VLSI chips when the characteristic requirements of VLSI chip is given. System 5G will consist of superinference machines and the 5G communication network. The superinference machine will be built based on a functionally distributed architecture connecting inferommunication network. The superinference machine will be built based on a functionally distributed architecture connecting inference machines and relational data base machines via a high-speed local network. The transfer rate of the local network will be 100 mbps at the first stage of the project and will be improved to 1 gbps. Remote access to the superinference machine will be possible through the 5G communication network. Access to system 5G will use the 5G network architecture protocol. The users will access the system 5G using standardized 5G personal computers. 5G personal logic programming stations, very high intelligent terminals providing an instruction set that supports predicate logic and input/output facilities for audio and graphical information.

  17. The AMchip: A VLSI associative memory for track finding

    International Nuclear Information System (INIS)

    Morsani, F.; Galeotti, S.; Passuello, D.; Amendolia, S.R.; Ristori, L.; Turini, N.

    1992-01-01

    An associative memory to be used for super-fast track finding in future high energy physics experiments, has been implemented on silicon as a full-custom CMOS VLSI chip (the AMchip). The first prototype has been designed and successfully tested at INFN in Pisa. It is implemented in 1.6 μm, double metal, silicon gate CMOS technology and contains about 140 000 MOS transistors on a 1x1 cm 2 silicon chip. (orig.)

  18. Carbon nanotube based VLSI interconnects analysis and design

    CERN Document Server

    Kaushik, Brajesh Kumar

    2015-01-01

    The brief primarily focuses on the performance analysis of CNT based interconnects in current research scenario. Different CNT structures are modeled on the basis of transmission line theory. Performance comparison for different CNT structures illustrates that CNTs are more promising than Cu or other materials used in global VLSI interconnects. The brief is organized into five chapters which mainly discuss: (1) an overview of current research scenario and basics of interconnects; (2) unique crystal structures and the basics of physical properties of CNTs, and the production, purification and applications of CNTs; (3) a brief technical review, the geometry and equivalent RLC parameters for different single and bundled CNT structures; (4) a comparative analysis of crosstalk and delay for different single and bundled CNT structures; and (5) various unique mixed CNT bundle structures and their equivalent electrical models.

  19. Multi-net optimization of VLSI interconnect

    CERN Document Server

    Moiseev, Konstantin; Wimer, Shmuel

    2015-01-01

    This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.  • Describes the evolution of interconnect scaling and provides new techniques for layout migration and optimization, focusing on multi-net optimization; • Presents research results that provide a level of design optimization which does not exist in commercially-available design automation software tools; • Includes mathematical properties and conditions for optimal...

  20. VLSI 'smart' I/O module development

    Science.gov (United States)

    Kirk, Dan

    The developmental history, design, and operation of the MIL-STD-1553A/B discrete and serial module (DSM) for the U.S. Navy AN/AYK-14(V) avionics computer are described and illustrated with diagrams. The ongoing preplanned product improvement for the AN/AYK-14(V) includes five dual-redundant MIL-STD-1553 channels based on DSMs. The DSM is a front-end processor for transferring data to and from a common memory, sharing memory with a host processor to provide improved 'smart' input/output performance. Each DSM comprises three hardware sections: three VLSI-6000 semicustomized CMOS arrays, memory units to support the arrays, and buffers and resynchronization circuits. The DSM hardware module design, VLSI-6000 design tools, controlware and test software, and checkout procedures (using a hardware simulator) are characterized in detail.

  1. VLSI signal processing technology

    CERN Document Server

    Swartzlander, Earl

    1994-01-01

    This book is the first in a set of forthcoming books focussed on state-of-the-art development in the VLSI Signal Processing area. It is a response to the tremendous research activities taking place in that field. These activities have been driven by two factors: the dramatic increase in demand for high speed signal processing, especially in consumer elec­ tronics, and the evolving microelectronic technologies. The available technology has always been one of the main factors in determining al­ gorithms, architectures, and design strategies to be followed. With every new technology, signal processing systems go through many changes in concepts, design methods, and implementation. The goal of this book is to introduce the reader to the main features of VLSI Signal Processing and the ongoing developments in this area. The focus of this book is on: • Current developments in Digital Signal Processing (DSP) pro­ cessors and architectures - several examples and case studies of existing DSP chips are discussed in...

  2. Hybrid VLSI/QCA Architecture for Computing FFTs

    Science.gov (United States)

    Fijany, Amir; Toomarian, Nikzad; Modarres, Katayoon; Spotnitz, Matthew

    2003-01-01

    A data-processor architecture that would incorporate elements of both conventional very-large-scale integrated (VLSI) circuitry and quantum-dot cellular automata (QCA) has been proposed to enable the highly parallel and systolic computation of fast Fourier transforms (FFTs). The proposed circuit would complement the QCA-based circuits described in several prior NASA Tech Briefs articles, namely Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), Vol. 25, No. 10 (October 2001), page 42; Compact Interconnection Networks Based on Quantum Dots (NPO-20855) Vol. 27, No. 1 (January 2003), page 32; and Bit-Serial Adder Based on Quantum Dots (NPO-20869), Vol. 27, No. 1 (January 2003), page 35. The cited prior articles described the limitations of very-large-scale integrated (VLSI) circuitry and the major potential advantage afforded by QCA. To recapitulate: In a VLSI circuit, signal paths that are required not to interact with each other must not cross in the same plane. In contrast, for reasons too complex to describe in the limited space available for this article, suitably designed and operated QCAbased signal paths that are required not to interact with each other can nevertheless be allowed to cross each other in the same plane without adverse effect. In principle, this characteristic could be exploited to design compact, coplanar, simple (relative to VLSI) QCA-based networks to implement complex, advanced interconnection schemes.

  3. Application of evolutionary algorithms for multi-objective optimization in VLSI and embedded systems

    CERN Document Server

    2015-01-01

    This book describes how evolutionary algorithms (EA), including genetic algorithms (GA) and particle swarm optimization (PSO) can be utilized for solving multi-objective optimization problems in the area of embedded and VLSI system design. Many complex engineering optimization problems can be modelled as multi-objective formulations. This book provides an introduction to multi-objective optimization using meta-heuristic algorithms, GA and PSO, and how they can be applied to problems like hardware/software partitioning in embedded systems, circuit partitioning in VLSI, design of operational amplifiers in analog VLSI, design space exploration in high-level synthesis, delay fault testing in VLSI testing, and scheduling in heterogeneous distributed systems. It is shown how, in each case, the various aspects of the EA, namely its representation, and operators like crossover, mutation, etc. can be separately formulated to solve these problems. This book is intended for design engineers and researchers in the field ...

  4. Development methods for VLSI-processors

    International Nuclear Information System (INIS)

    Horninger, K.; Sandweg, G.

    1982-01-01

    The aim of this project, which was originally planed for 3 years, was the development of modern system and circuit concepts, for VLSI-processors having a 32 bit wide data path. The result of this first years work is the concept of a general purpose processor. This processor is not only logically but also physically (on the chip) divided into four functional units: a microprogrammable instruction unit, an execution unit in slice technique, a fully associative cache memory and an I/O unit. For the ALU of the execution unit circuits in PLA and slice techniques have been realized. On the basis of regularity, area consumption and achievable performance the slice technique has been prefered. The designs utilize selftesting circuitry. (orig.) [de

  5. Plasma processing for VLSI

    CERN Document Server

    Einspruch, Norman G

    1984-01-01

    VLSI Electronics: Microstructure Science, Volume 8: Plasma Processing for VLSI (Very Large Scale Integration) discusses the utilization of plasmas for general semiconductor processing. It also includes expositions on advanced deposition of materials for metallization, lithographic methods that use plasmas as exposure sources and for multiple resist patterning, and device structures made possible by anisotropic etching.This volume is divided into four sections. It begins with the history of plasma processing, a discussion of some of the early developments and trends for VLSI. The second section

  6. Design Implementation and Testing of a VLSI High Performance ASIC for Extracting the Phase of a Complex Signal

    National Research Council Canada - National Science Library

    Altmeyer, Ronald

    2002-01-01

    This thesis documents the research, circuit design, and simulation testing of a VLSI ASIC which extracts phase angle information from a complex sampled signal using the arctangent relationship: (phi=tan/-1 (Q/1...

  7. The VLSI handbook

    CERN Document Server

    Chen, Wai-Kai

    2007-01-01

    Written by a stellar international panel of expert contributors, this handbook remains the most up-to-date, reliable, and comprehensive source for real answers to practical problems. In addition to updated information in most chapters, this edition features several heavily revised and completely rewritten chapters, new chapters on such topics as CMOS fabrication and high-speed circuit design, heavily revised sections on testing of digital systems and design languages, and two entirely new sections on low-power electronics and VLSI signal processing. An updated compendium of references and othe

  8. Pursuit, Avoidance, and Cohesion in Flight: Multi-Purpose Control Laws and Neuromorphic VLSI

    Science.gov (United States)

    2010-10-01

    spatial navigation in mammals. We have designed, fabricated, and are now testing a neuromorphic VLSI chip that implements a spike-based, attractor...Control Laws and Neuromorphic VLSI 5a. CONTRACT NUMBER 070402-7705 5b. GRANT NUMBER FA9550-07-1-0446 5c. PROGRAM ELEMENT NUMBER 6. AUTHOR(S...implementations (custom Neuromorphic VLSI and robotics) we will apply important practical constraints that can lead to deeper insight into how and why efficient

  9. Artificial immune system algorithm in VLSI circuit configuration

    Science.gov (United States)

    Mansor, Mohd. Asyraf; Sathasivam, Saratha; Kasihmuddin, Mohd Shareduwan Mohd

    2017-08-01

    In artificial intelligence, the artificial immune system is a robust bio-inspired heuristic method, extensively used in solving many constraint optimization problems, anomaly detection, and pattern recognition. This paper discusses the implementation and performance of artificial immune system (AIS) algorithm integrated with Hopfield neural networks for VLSI circuit configuration based on 3-Satisfiability problems. Specifically, we emphasized on the clonal selection technique in our binary artificial immune system algorithm. We restrict our logic construction to 3-Satisfiability (3-SAT) clauses in order to outfit with the transistor configuration in VLSI circuit. The core impetus of this research is to find an ideal hybrid model to assist in the VLSI circuit configuration. In this paper, we compared the artificial immune system (AIS) algorithm (HNN-3SATAIS) with the brute force algorithm incorporated with Hopfield neural network (HNN-3SATBF). Microsoft Visual C++ 2013 was used as a platform for training, simulating and validating the performances of the proposed network. The results depict that the HNN-3SATAIS outperformed HNN-3SATBF in terms of circuit accuracy and CPU time. Thus, HNN-3SATAIS can be used to detect an early error in the VLSI circuit design.

  10. Design of a Low-Power VLSI Macrocell for Nonlinear Adaptive Video Noise Reduction

    Directory of Open Access Journals (Sweden)

    Sergio Saponara

    2004-09-01

    Full Text Available A VLSI macrocell for edge-preserving video noise reduction is proposed in the paper. It is based on a nonlinear rational filter enhanced by a noise estimator for blind and dynamic adaptation of the filtering parameters to the input signal statistics. The VLSI filter features a modular architecture allowing the extension of both mask size and filtering directions. Both spatial and spatiotemporal algorithms are supported. Simulation results with monochrome test videos prove its efficiency for many noise distributions with PSNR improvements up to 3.8 dB with respect to a nonadaptive solution. The VLSI macrocell has been realized in a 0.18 μm CMOS technology using a standard-cells library; it allows for real-time processing of main video formats, up to 30 fps (frames per second 4CIF, with a power consumption in the order of few mW.

  11. A VLSI image processor via pseudo-mersenne transforms

    International Nuclear Information System (INIS)

    Sei, W.J.; Jagadeesh, J.M.

    1986-01-01

    The computational burden on image processing in medical fields where a large amount of information must be processed quickly and accurately has led to consideration of special-purpose image processor chip design for some time. The very large scale integration (VLSI) resolution has made it cost-effective and feasible to consider the design of special purpose chips for medical imaging fields. This paper describes a VLSI CMOS chip suitable for parallel implementation of image processing algorithms and cyclic convolutions by using Pseudo-Mersenne Number Transform (PMNT). The main advantages of the PMNT over the Fast Fourier Transform (FFT) are: (1) no multiplications are required; (2) integer arithmetic is used. The design and development of this processor, which operates on 32-point convolution or 5 x 5 window image, are described

  12. Computer-aided design of microfluidic very large scale integration (mVLSI) biochips design automation, testing, and design-for-testability

    CERN Document Server

    Hu, Kai; Ho, Tsung-Yi

    2017-01-01

    This book provides a comprehensive overview of flow-based, microfluidic VLSI. The authors describe and solve in a comprehensive and holistic manner practical challenges such as control synthesis, wash optimization, design for testability, and diagnosis of modern flow-based microfluidic biochips. They introduce practical solutions, based on rigorous optimization and formal models. The technical contributions presented in this book will not only shorten the product development cycle, but also accelerate the adoption and further development of modern flow-based microfluidic biochips, by facilitating the full exploitation of design complexities that are possible with current fabrication techniques. Offers the first practical problem formulation for automated control-layer design in flow-based microfluidic biochips and provides a systematic approach for solving this problem; Introduces a wash-optimization method for cross-contamination removal; Presents a design-for-testability (DfT) technique that can achieve 100...

  13. Digital VLSI design with Verilog a textbook from Silicon Valley Polytechnic Institute

    CERN Document Server

    Williams, John Michael

    2014-01-01

    This book is structured as a step-by-step course of study along the lines of a VLSI integrated circuit design project.  The entire Verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer-deserializer, including synthesizable PLLs.  The author includes everything an engineer needs for in-depth understanding of the Verilog language:  Syntax, synthesis semantics, simulation, and test. Complete solutions for the 27 labs are provided in the downloadable files that accompany the book.  For readers with access to appropriate electronic design tools, all solutions can be developed, simulated, and synthesized as described in the book.   A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test.   A concluding presentation of special topics inclu...

  14. Lithography for VLSI

    CERN Document Server

    Einspruch, Norman G

    1987-01-01

    VLSI Electronics Microstructure Science, Volume 16: Lithography for VLSI treats special topics from each branch of lithography, and also contains general discussion of some lithographic methods.This volume contains 8 chapters that discuss the various aspects of lithography. Chapters 1 and 2 are devoted to optical lithography. Chapter 3 covers electron lithography in general, and Chapter 4 discusses electron resist exposure modeling. Chapter 5 presents the fundamentals of ion-beam lithography. Mask/wafer alignment for x-ray proximity printing and for optical lithography is tackled in Chapter 6.

  15. Trace-based post-silicon validation for VLSI circuits

    CERN Document Server

    Liu, Xiao

    2014-01-01

    This book first provides a comprehensive coverage of state-of-the-art validation solutions based on real-time signal tracing to guarantee the correctness of VLSI circuits.  The authors discuss several key challenges in post-silicon validation and provide automated solutions that are systematic and cost-effective.  A series of automatic tracing solutions and innovative design for debug (DfD) techniques are described, including techniques for trace signal selection for enhancing visibility of functional errors, a multiplexed signal tracing strategy for improving functional error detection, a tracing solution for debugging electrical errors, an interconnection fabric for increasing data bandwidth and supporting multi-core debug, an interconnection fabric design and optimization technique to increase transfer flexibility and a DfD design and associated tracing solution for improving debug efficiency and expanding tracing window. The solutions presented in this book improve the validation quality of VLSI circuit...

  16. Surface and interface effects in VLSI

    CERN Document Server

    Einspruch, Norman G

    1985-01-01

    VLSI Electronics Microstructure Science, Volume 10: Surface and Interface Effects in VLSI provides the advances made in the science of semiconductor surface and interface as they relate to electronics. This volume aims to provide a better understanding and control of surface and interface related properties. The book begins with an introductory chapter on the intimate link between interfaces and devices. The book is then divided into two parts. The first part covers the chemical and geometric structures of prototypical VLSI interfaces. Subjects detailed include, the technologically most import

  17. VLSI Architectures for the Multiplication of Integers Modulo a Fermat Number

    Science.gov (United States)

    Chang, J. J.; Truong, T. K.; Reed, I. S.; Hsu, I. S.

    1984-01-01

    Multiplication is central in the implementation of Fermat number transforms and other residue number algorithms. There is need for a good multiplication algorithm that can be realized easily on a very large scale integration (VLSI) chip. The Leibowitz multiplier is modified to realize multiplication in the ring of integers modulo a Fermat number. This new algorithm requires only a sequence of cyclic shifts and additions. The designs developed for this new multiplier are regular, simple, expandable, and, therefore, suitable for VLSI implementation.

  18. UW VLSI chip tester

    Science.gov (United States)

    McKenzie, Neil

    1989-12-01

    We present a design for a low-cost, functional VLSI chip tester. It is based on the Apple MacIntosh II personal computer. It tests chips that have up to 128 pins. All pin drivers of the tester are bidirectional; each pin is programmed independently as an input or an output. The tester can test both static and dynamic chips. Rudimentary speed testing is provided. Chips are tested by executing C programs written by the user. A software library is provided for program development. Tests run under both the Mac Operating System and A/UX. The design is implemented using Xilinx Logic Cell Arrays. Price/performance tradeoffs are discussed.

  19. Towards an Analogue Neuromorphic VLSI Instrument for the Sensing of Complex Odours

    Science.gov (United States)

    Ab Aziz, Muhammad Fazli; Harun, Fauzan Khairi Che; Covington, James A.; Gardner, Julian W.

    2011-09-01

    Almost all electronic nose instruments reported today employ pattern recognition algorithms written in software and run on digital processors, e.g. micro-processors, microcontrollers or FPGAs. Conversely, in this paper we describe the analogue VLSI implementation of an electronic nose through the design of a neuromorphic olfactory chip. The modelling, design and fabrication of the chip have already been reported. Here a smart interface has been designed and characterised for thisneuromorphic chip. Thus we can demonstrate the functionality of the a VLSI neuromorphic chip, producing differing principal neuron firing patterns to real sensor response data. Further work is directed towards integrating 9 separate neuromorphic chips to create a large neuronal network to solve more complex olfactory problems.

  20. Advanced symbolic analysis for VLSI systems methods and applications

    CERN Document Server

    Shi, Guoyong; Tlelo Cuautle, Esteban

    2014-01-01

    This book provides comprehensive coverage of the recent advances in symbolic analysis techniques for design automation of nanometer VLSI systems. The presentation is organized in parts of fundamentals, basic implementation methods and applications for VLSI design. Topics emphasized include  statistical timing and crosstalk analysis, statistical and parallel analysis, performance bound analysis and behavioral modeling for analog integrated circuits . Among the recent advances, the Binary Decision Diagram (BDD) based approaches are studied in depth. The BDD-based hierarchical symbolic analysis approaches, have essentially broken the analog circuit size barrier. In particular, this book   • Provides an overview of classical symbolic analysis methods and a comprehensive presentation on the modern  BDD-based symbolic analysis techniques; • Describes detailed implementation strategies for BDD-based algorithms, including the principles of zero-suppression, variable ordering and canonical reduction; • Int...

  1. Parallel computation of nondeterministic algorithms in VLSI

    Energy Technology Data Exchange (ETDEWEB)

    Hortensius, P D

    1987-01-01

    This work examines parallel VLSI implementations of nondeterministic algorithms. It is demonstrated that conventional pseudorandom number generators are unsuitable for highly parallel applications. Efficient parallel pseudorandom sequence generation can be accomplished using certain classes of elementary one-dimensional cellular automata. The pseudorandom numbers appear in parallel on each clock cycle. Extensive study of the properties of these new pseudorandom number generators is made using standard empirical random number tests, cycle length tests, and implementation considerations. Furthermore, it is shown these particular cellular automata can form the basis of efficient VLSI architectures for computations involved in the Monte Carlo simulation of both the percolation and Ising models from statistical mechanics. Finally, a variation on a Built-In Self-Test technique based upon cellular automata is presented. These Cellular Automata-Logic-Block-Observation (CALBO) circuits improve upon conventional design for testability circuitry.

  2. Electro-optic techniques for VLSI interconnect

    Science.gov (United States)

    Neff, J. A.

    1985-03-01

    A major limitation to achieving significant speed increases in very large scale integration (VLSI) lies in the metallic interconnects. They are costly not only from the charge transport standpoint but also from capacitive loading effects. The Defense Advanced Research Projects Agency, in pursuit of the fifth generation supercomputer, is investigating alternatives to the VLSI metallic interconnects, especially the use of optical techniques to transport the information either inter or intrachip. As the on chip performance of VLSI continues to improve via the scale down of the logic elements, the problems associated with transferring data off and onto the chip become more severe. The use of optical carriers to transfer the information within the computer is very appealing from several viewpoints. Besides the potential for gigabit propagation rates, the conversion from electronics to optics conveniently provides a decoupling of the various circuits from one another. Significant gains will also be realized in reducing cross talk between the metallic routings, and the interconnects need no longer be constrained to the plane of a thin film on the VLSI chip. In addition, optics can offer an increased programming flexibility for restructuring the interconnect network.

  3. Development of Radhard VLSI electronics for SSC calorimeters

    International Nuclear Information System (INIS)

    Dawson, J.W.; Nodulman, L.J.

    1989-01-01

    A new program of development of integrated electronics for liquid argon calorimeters in the SSC detector environment is being started at Argonne National Laboratory. Scientists from Brookhaven National Laboratory and Vanderbilt University together with an industrial participants are expected to collaborate in this work. Interaction rates, segmentation, and the radiation environment dictate that front-end electronics of SSC calorimeters must be implemented in the form of highly integrated, radhard, analog, low noise, VLSI custom monolithic devices. Important considerations are power dissipation, choice of functions integrated on the front-end chips, and cabling requirements. An extensive level of expertise in radhard electronics exists within the industrial community, and a primary objective of this work is to bring that expertise to bear on the problems of SSC detector design. Radiation hardness measurements and requirements as well as calorimeter design will be primarily the responsibility of Argonne scientists and our Brookhaven and Vanderbilt colleagues. Radhard VLSI design and fabrication will be primarily the industrial participant's responsibility. The rapid-cycling synchrotron at Argonne will be used for radiation damage studies involving response to neutrons and charged particles, while damage from gammas will be investigated at Brookhaven. 10 refs., 6 figs., 2 tabs

  4. Power gating of VLSI circuits using MEMS switches in low power applications

    KAUST Repository

    Shobak, Hosam

    2011-12-01

    Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods. © 2011 IEEE.

  5. VLSI scaling methods and low power CMOS buffer circuit

    International Nuclear Information System (INIS)

    Sharma Vijay Kumar; Pattanaik Manisha

    2013-01-01

    Device scaling is an important part of the very large scale integration (VLSI) design to boost up the success path of VLSI industry, which results in denser and faster integration of the devices. As technology node moves towards the very deep submicron region, leakage current and circuit reliability become the key issues. Both are increasing with the new technology generation and affecting the performance of the overall logic circuit. The VLSI designers must keep the balance in power dissipation and the circuit's performance with scaling of the devices. In this paper, different scaling methods are studied first. These scaling methods are used to identify the effects of those scaling methods on the power dissipation and propagation delay of the CMOS buffer circuit. For mitigating the power dissipation in scaled devices, we have proposed a reliable leakage reduction low power transmission gate (LPTG) approach and tested it on complementary metal oxide semiconductor (CMOS) buffer circuit. All simulation results are taken on HSPICE tool with Berkeley predictive technology model (BPTM) BSIM4 bulk CMOS files. The LPTG CMOS buffer reduces 95.16% power dissipation with 84.20% improvement in figure of merit at 32 nm technology node. Various process, voltage and temperature variations are analyzed for proving the robustness of the proposed approach. Leakage current uncertainty decreases from 0.91 to 0.43 in the CMOS buffer circuit that causes large circuit reliability. (semiconductor integrated circuits)

  6. Power gating of VLSI circuits using MEMS switches in low power applications

    KAUST Repository

    Shobak, Hosam; Ghoneim, Mohamed T.; El Boghdady, Nawal; Halawa, Sarah; Iskander, Sophinese M.; Anis, Mohab H.

    2011-01-01

    -designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result

  7. Wavelength-encoded OCDMA system using opto-VLSI processors.

    Science.gov (United States)

    Aljada, Muhsen; Alameh, Kamal

    2007-07-01

    We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg wavelengths. The FBG array spectrally and temporally slices the broadband input pulse into several components and the opto-VLSI processor generates codewords using digital phase holograms. System performance is measured in terms of the autocorrelation and cross-correlation functions as well as the eye diagram.

  8. Wavelength-encoded OCDMA system using opto-VLSI processors

    Science.gov (United States)

    Aljada, Muhsen; Alameh, Kamal

    2007-07-01

    We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg wavelengths. The FBG array spectrally and temporally slices the broadband input pulse into several components and the opto-VLSI processor generates codewords using digital phase holograms. System performance is measured in terms of the autocorrelation and cross-correlation functions as well as the eye diagram.

  9. Design of 10Gbps optical encoder/decoder structure for FE-OCDMA system using SOA and opto-VLSI processors.

    Science.gov (United States)

    Aljada, Muhsen; Hwang, Seow; Alameh, Kamal

    2008-01-21

    In this paper we propose and experimentally demonstrate a reconfigurable 10Gbps frequency-encoded (1D) encoder/decoder structure for optical code division multiple access (OCDMA). The encoder is constructed using a single semiconductor optical amplifier (SOA) and 1D reflective Opto-VLSI processor. The SOA generates broadband amplified spontaneous emission that is dynamically sliced using digital phase holograms loaded onto the Opto-VLSI processor to generate 1D codewords. The selected wavelengths are injected back into the same SOA for amplifications. The decoder is constructed using single Opto-VLSI processor only. The encoded signal can successfully be retrieved at the decoder side only when the digital phase holograms of the encoder and the decoder are matched. The system performance is measured in terms of the auto-correlation and cross-correlation functions as well as the eye diagram.

  10. VLSI design of an RSA encryption/decryption chip using systolic array based architecture

    Science.gov (United States)

    Sun, Chi-Chia; Lin, Bor-Shing; Jan, Gene Eu; Lin, Jheng-Yi

    2016-09-01

    This article presents the VLSI design of a configurable RSA public key cryptosystem supporting the 512-bit, 1024-bit and 2048-bit based on Montgomery algorithm achieving comparable clock cycles of current relevant works but with smaller die size. We use binary method for the modular exponentiation and adopt Montgomery algorithm for the modular multiplication to simplify computational complexity, which, together with the systolic array concept for electric circuit designs effectively, lower the die size. The main architecture of the chip consists of four functional blocks, namely input/output modules, registers module, arithmetic module and control module. We applied the concept of systolic array to design the RSA encryption/decryption chip by using VHDL hardware language and verified using the TSMC/CIC 0.35 m 1P4 M technology. The die area of the 2048-bit RSA chip without the DFT is 3.9 × 3.9 mm2 (4.58 × 4.58 mm2 with DFT). Its average baud rate can reach 10.84 kbps under a 100 MHz clock.

  11. Parallel VLSI Architecture

    Science.gov (United States)

    Truong, T. K.; Reed, I.; Yeh, C.; Shao, H.

    1985-01-01

    Fermat number transformation convolutes two digital data sequences. Very-large-scale integration (VLSI) applications, such as image and radar signal processing, X-ray reconstruction, and spectrum shaping, linear convolution of two digital data sequences of arbitrary lenghts accomplished using Fermat number transform (ENT).

  12. The GLUEchip: A custom VLSI chip for detectors readout and associative memories circuits

    International Nuclear Information System (INIS)

    Amendolia, S.R.; Galeotti, S.; Morsani, F.; Passuello, D.; Ristori, L.; Turini, N.

    1993-01-01

    An associative memory full-custom VLSI chip for pattern recognition has been designed and tested in the past years. It's the AMchip, that contains 128 patterns of 60 bits each. To expand the pattern capacity of an Associative Memory bank, the custom VLSI GLUEchip has been developed. The GLUEchip allows the interconnection of up to 16 AMchips or up to 16 GLUEchips: the resulting tree-like structure works like a single AMchip with an output pipelined structure and a pattern capacity increased by a factor 16 for each GLUEchip used

  13. Monolithic active pixel sensors (MAPS) in a VLSI CMOS technology

    CERN Document Server

    Turchetta, R; Manolopoulos, S; Tyndel, M; Allport, P P; Bates, R; O'Shea, V; Hall, G; Raymond, M

    2003-01-01

    Monolithic Active Pixel Sensors (MAPS) designed in a standard VLSI CMOS technology have recently been proposed as a compact pixel detector for the detection of high-energy charged particle in vertex/tracking applications. MAPS, also named CMOS sensors, are already extensively used in visible light applications. With respect to other competing imaging technologies, CMOS sensors have several potential advantages in terms of low cost, low power, lower noise at higher speed, random access of pixels which allows windowing of region of interest, ability to integrate several functions on the same chip. This brings altogether to the concept of 'camera-on-a-chip'. In this paper, we review the use of CMOS sensors for particle physics and we analyse their performances in term of the efficiency (fill factor), signal generation, noise, readout speed and sensor area. In most of high-energy physics applications, data reduction is needed in the sensor at an early stage of the data processing before transfer of the data to ta...

  14. Drift chamber tracking with a VLSI neural network

    International Nuclear Information System (INIS)

    Lindsey, C.S.; Denby, B.; Haggerty, H.; Johns, K.

    1992-10-01

    We have tested a commercial analog VLSI neural network chip for finding in real time the intercept and slope of charged particles traversing a drift chamber. Voltages proportional to the drift times were input to the Intel ETANN chip and the outputs were recorded and later compared off line to conventional track fits. We will discuss the chamber and test setup, the chip specifications, and results of recent tests. We'll briefly discuss possible applications in high energy physics detector triggers

  15. Opto-VLSI-based reconfigurable free-space optical interconnects architecture

    DEFF Research Database (Denmark)

    Aljada, Muhsen; Alameh, Kamal; Chung, Il-Sug

    2007-01-01

    is the Opto-VLSI processor which can be driven by digital phase steering and multicasting holograms that reconfigure the optical interconnects between the input and output ports. The optical interconnects architecture is experimentally demonstrated at 2.5 Gbps using high-speed 1×3 VCSEL array and 1......×3 photoreceiver array in conjunction with two 1×4096 pixel Opto-VLSI processors. The minimisation of the crosstalk between the output ports is achieved by appropriately aligning the VCSEL and PD elements with respect to the Opto-VLSI processors and driving the latter with optimal steering phase holograms....

  16. Development of an integrated circuit VLSI used for time measurement and selective read out in the front end electronics of the DIRC for the Babar experience at SLAC; Developpement d'un circuit integre VLSI assurant mesure de temps et lecture selective dans l'electronique frontale du compteur DIRC de l'experience babar a slac

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, B

    1999-07-01

    This thesis deals with the design the development and the tests of an integrated circuit VLSI, supplying selective read and time measure for 16 channels. This circuit has been developed for a experiment of particles physics, BABAR, that will take place at SLAC (Stanford Linear Accelerator Center). A first part describes the physical stakes of the experiment, the electronic architecture and the place of the developed circuit in the research program. The second part presents the technical drawings of the circuit, the prototypes leading to the final design and the validity tests. (A.L.B.)

  17. VLSI architectures for modern error-correcting codes

    CERN Document Server

    Zhang, Xinmiao

    2015-01-01

    Error-correcting codes are ubiquitous. They are adopted in almost every modern digital communication and storage system, such as wireless communications, optical communications, Flash memories, computer hard drives, sensor networks, and deep-space probing. New-generation and emerging applications demand codes with better error-correcting capability. On the other hand, the design and implementation of those high-gain error-correcting codes pose many challenges. They usually involve complex mathematical computations, and mapping them directly to hardware often leads to very high complexity. VLSI

  18. The test of VLSI circuits

    Science.gov (United States)

    Baviere, Ph.

    Tests which have proven effective for evaluating VLSI circuits for space applications are described. It is recommended that circuits be examined after each manfacturing step to gain fast feedback on inadequacies in the production system. Data from failure modes which occur during operational lifetimes of circuits also permit redefinition of the manufacturing and quality control process to eliminate the defects identified. Other tests include determination of the operational envelope of the circuits, examination of the circuit response to controlled inputs, and the performance and functional speeds of ROM and RAM memories. Finally, it is desirable that all new circuits be designed with testing in mind.

  19. VLSI Architecture and Design

    OpenAIRE

    Johnsson, Lennart

    1980-01-01

    Integrated circuit technology is rapidly approaching a state where feature sizes of one micron or less are tractable. Chip sizes are increasing slowly. These two developments result in considerably increased complexity in chip design. The physical characteristics of integrated circuit technology are also changing. The cost of communication will be dominating making new architectures and algorithms both feasible and desirable. A large number of processors on a single chip will be possible....

  20. Recovery Act - CAREER: Sustainable Silicon -- Energy-Efficient VLSI Interconnect for Extreme-Scale Computing

    Energy Technology Data Exchange (ETDEWEB)

    Chiang, Patrick [Oregon State Univ., Corvallis, OR (United States)

    2014-01-31

    The research goal of this CAREER proposal is to develop energy-efficient, VLSI interconnect circuits and systems that will facilitate future massively-parallel, high-performance computing. Extreme-scale computing will exhibit massive parallelism on multiple vertical levels, from thou­ sands of computational units on a single processor to thousands of processors in a single data center. Unfortunately, the energy required to communicate between these units at every level (on­ chip, off-chip, off-rack) will be the critical limitation to energy efficiency. Therefore, the PI's career goal is to become a leading researcher in the design of energy-efficient VLSI interconnect for future computing systems.

  1. Ant System-Corner Insertion Sequence: An Efficient VLSI Hard Module Placer

    Directory of Open Access Journals (Sweden)

    HOO, C.-S.

    2013-02-01

    Full Text Available Placement is important in VLSI physical design as it determines the time-to-market and chip's reliability. In this paper, a new floorplan representation which couples with Ant System, namely Corner Insertion Sequence (CIS is proposed. Though CIS's search complexity is smaller than the state-of-the-art representation Corner Sequence (CS, CIS adopts a preset boundary on the placement and hence, leading to search bound similar to CS. This enables the previous unutilized corner edges to become viable. Also, the redundancy of CS representation is eliminated in CIS leads to a lower search complexity of CIS. Experimental results on Microelectronics Center of North Carolina (MCNC hard block benchmark circuits show that the proposed algorithm performs comparably in terms of area yet at least two times faster than CS.

  2. Memory Based Machine Intelligence Techniques in VLSI hardware

    OpenAIRE

    James, Alex Pappachen

    2012-01-01

    We briefly introduce the memory based approaches to emulate machine intelligence in VLSI hardware, describing the challenges and advantages. Implementation of artificial intelligence techniques in VLSI hardware is a practical and difficult problem. Deep architectures, hierarchical temporal memories and memory networks are some of the contemporary approaches in this area of research. The techniques attempt to emulate low level intelligence tasks and aim at providing scalable solutions to high ...

  3. VLSI System Implementation of 200 MHz, 8-bit, 90nm CMOS Arithmetic and Logic Unit (ALU Processor Controller

    Directory of Open Access Journals (Sweden)

    Fazal NOORBASHA

    2012-08-01

    Full Text Available In this present study includes the Very Large Scale Integration (VLSI system implementation of 200MHz, 8-bit, 90nm Complementary Metal Oxide Semiconductor (CMOS Arithmetic and Logic Unit (ALU processor control with logic gate design style and 0.12µm six metal 90nm CMOS fabrication technology. The system blocks and the behaviour are defined and the logical design is implemented in gate level in the design phase. Then, the logic circuits are simulated and the subunits are converted in to 90nm CMOS layout. Finally, in order to construct the VLSI system these units are placed in the floor plan and simulated with analog and digital, logic and switch level simulators. The results of the simulations indicates that the VLSI system can control different instructions which can divided into sub groups: transfer instructions, arithmetic and logic instructions, rotate and shift instructions, branch instructions, input/output instructions, control instructions. The data bus of the system is 16-bit. It runs at 200MHz, and operating power is 1.2V. In this paper, the parametric analysis of the system, the design steps and obtained results are explained.

  4. Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems

    Directory of Open Access Journals (Sweden)

    Urard Pascal

    2006-01-01

    Full Text Available We propose an efficient IP-block-based design environment for high-throughput VLSI systems. The flow generates SystemC register-transfer-level (RTL architecture, starting from a Matlab functional model described as a netlist of functional IP. The refinement model inserts automatically control structures to manage delays induced by the use of RTL IPs. It also inserts a control structure to coordinate the execution of parallel clocked IP. The delays may be managed by registers or by counters included in the control structure. The flow has been used successfully in three real-world DSP systems. The experimentations show that the approach can produce efficient RTL architecture and allows to save huge amount of time.

  5. Nano lasers in photonic VLSI

    NARCIS (Netherlands)

    Hill, M.T.; Oei, Y.S.; Smit, M.K.

    2007-01-01

    We examine the use of micro and nano lasers to form digital photonic VLSI building blocks. Problems such as isolation and cascading of building blocks are addressed, and the potential of future nano lasers explored.

  6. An engineering methodology for implementing and testing VLSI (Very Large Scale Integrated) circuits

    Science.gov (United States)

    Corliss, Walter F., II

    1989-03-01

    The engineering methodology for producing a fully tested VLSI chip from a design layout is presented. A 16-bit correlator, NPS CORN88, that was previously designed, was used as a vehicle to demonstrate this methodology. The study of the design and simulation tools, MAGIC and MOSSIM II, was the focus of the design and validation process. The design was then implemented and the chip was fabricated by MOSIS. This fabricated chip was then used to develop a testing methodology for using the digital test facilities at NPS. NPS CORN88 was the first full custom VLSI chip, designed at NPS, to be tested with the NPS digital analysis system, Tektronix DAS 9100 series tester. The capabilities and limitations of these test facilities are examined. NPS CORN88 test results are included to demonstrate the capabilities of the digital test system. A translator, MOS2DAS, was developed to convert the MOSSIM II simulation program to the input files required by the DAS 9100 device verification software, 91DVS. Finally, a tutorial for using the digital test facilities, including the DAS 9100 and associated support equipments, is included as an appendix.

  7. Fast-prototyping of VLSI

    International Nuclear Information System (INIS)

    Saucier, G.; Read, E.

    1987-01-01

    Fast-prototyping will be a reality in the very near future if both straightforward design methods and fast manufacturing facilities are available. This book focuses, first, on the motivation for fast-prototyping. Economic aspects and market considerations are analysed by European and Japanese companies. In the second chapter, new design methods are identified, mainly for full custom circuits. Of course, silicon compilers play a key role and the introduction of artificial intelligence techniques sheds a new light on the subject. At present, fast-prototyping on gate arrays or on standard cells is the most conventional technique and the third chapter updates the state-of-the art in this area. The fourth chapter concentrates specifically on the e-beam direct-writing for submicron IC technologies. In the fifth chapter, a strategic point in fast-prototyping, namely the test problem is addressed. The design for testability and the interface to the test equipment are mandatory to fulfill the test requirement for fast-prototyping. Finally, the last chapter deals with the subject of education when many people complain about the lack of use of fast-prototyping in higher education for VLSI

  8. Las Vegas is better than determinism in VLSI and distributed computing

    DEFF Research Database (Denmark)

    Mehlhorn, Kurt; Schmidt, Erik Meineche

    1982-01-01

    In this paper we describe a new method for proving lower bounds on the complexity of VLSI - computations and more generally distributed computations. Lipton and Sedgewick observed that the crossing sequence arguments used to prove lower bounds in VLSI (or TM or distributed computing) apply to (ac...

  9. Point DCT VLSI Architecture for Emerging HEVC Standard

    OpenAIRE

    Ahmed, Ashfaq; Shahid, Muhammad Usman; Rehman, Ata ur

    2012-01-01

    This work presents a flexible VLSI architecture to compute the -point DCT. Since HEVC supports different block sizes for the computation of the DCT, that is, 4 × 4 up to 3 2 × 3 2 , the design of a flexible architecture to support them helps reducing the area overhead of hardware implementations. The hardware proposed in this work is partially folded to save area and to get speed for large video sequences sizes. The proposed architecture relies on the decomposition of the DCT matrices into ...

  10. Lithography requirements in complex VLSI device fabrication

    International Nuclear Information System (INIS)

    Wilson, A.D.

    1985-01-01

    Fabrication of complex very large scale integration (VLSI) circuits requires continual advances in lithography to satisfy: decreasing minimum linewidths, larger chip sizes, tighter linewidth and overlay control, increasing topography to linewidth ratios, higher yield demands, increased throughput, harsher device processing, lower lithography cost, and a larger part number set with quick turn-around time. Where optical, electron beam, x-ray, and ion beam lithography can be applied to judiciously satisfy the complex VLSI circuit fabrication requirements is discussed and those areas that are in need of major further advances are addressed. Emphasis will be placed on advanced electron beam and storage ring x-ray lithography

  11. VLSI micro- and nanophotonics science, technology, and applications

    CERN Document Server

    Lee, El-Hang; Razeghi, Manijeh; Jagadish, Chennupati

    2011-01-01

    Addressing the growing demand for larger capacity in information technology, VLSI Micro- and Nanophotonics: Science, Technology, and Applications explores issues of science and technology of micro/nano-scale photonics and integration for broad-scale and chip-scale Very Large Scale Integration photonics. This book is a game-changer in the sense that it is quite possibly the first to focus on ""VLSI Photonics"". Very little effort has been made to develop integration technologies for micro/nanoscale photonic devices and applications, so this reference is an important and necessary early-stage pe

  12. VLSI Implementation of a Fixed-Complexity Soft-Output MIMO Detector for High-Speed Wireless

    Directory of Open Access Journals (Sweden)

    Di Wu

    2010-01-01

    Full Text Available This paper presents a low-complexity MIMO symbol detector with close-Maximum a posteriori performance for the emerging multiantenna enhanced high-speed wireless communications. The VLSI implementation is based on a novel MIMO detection algorithm called Modified Fixed-Complexity Soft-Output (MFCSO detection, which achieves a good trade-off between performance and implementation cost compared to the referenced prior art. By including a microcode-controlled channel preprocessing unit and a pipelined detection unit, it is flexible enough to cover several different standards and transmission schemes. The flexibility allows adaptive detection to minimize power consumption without degradation in throughput. The VLSI implementation of the detector is presented to show that real-time MIMO symbol detection of 20 MHz bandwidth 3GPP LTE and 10 MHz WiMAX downlink physical channel is achievable at reasonable silicon cost.

  13. Circuit design for reliability

    CERN Document Server

    Cao, Yu; Wirth, Gilson

    2015-01-01

    This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.

  14. A novel configurable VLSI architecture design of window-based image processing method

    Science.gov (United States)

    Zhao, Hui; Sang, Hongshi; Shen, Xubang

    2018-03-01

    Most window-based image processing architecture can only achieve a certain kind of specific algorithms, such as 2D convolution, and therefore lack the flexibility and breadth of application. In addition, improper handling of the image boundary can cause loss of accuracy, or consume more logic resources. For the above problems, this paper proposes a new VLSI architecture of window-based image processing operations, which is configurable and based on consideration of the image boundary. An efficient technique is explored to manage the image borders by overlapping and flushing phases at the end of row and the end of frame, which does not produce new delay and reduce the overhead in real-time applications. Maximize the reuse of the on-chip memory data, in order to reduce the hardware complexity and external bandwidth requirements. To perform different scalar function and reduction function operations in pipeline, this can support a variety of applications of window-based image processing. Compared with the performance of other reported structures, the performance of the new structure has some similarities to some of the structures, but also superior to some other structures. Especially when compared with a systolic array processor CWP, this structure at the same frequency of approximately 12.9% of the speed increases. The proposed parallel VLSI architecture was implemented with SIMC 0.18-μm CMOS technology, and the maximum clock frequency, power consumption, and area are 125Mhz, 57mW, 104.8K Gates, respectively, furthermore the processing time is independent of the different window-based algorithms mapped to the structure

  15. ORGANIZATION OF GRAPHIC INFORMATION FOR VIEWING THE MULTILAYER VLSI TOPOLOGY

    Directory of Open Access Journals (Sweden)

    V. I. Romanov

    2016-01-01

    Full Text Available One of the possible ways to reorganize of graphical information describing the set of topology layers of modern VLSI. The method is directed on the use in the conditions of the bounded size of video card memory. An additional effect, providing high performance of forming multi- image layout a multi-layer topology of modern VLSI, is achieved by preloading the required texture by means of auxiliary background process.

  16. An efficient interpolation filter VLSI architecture for HEVC standard

    Science.gov (United States)

    Zhou, Wei; Zhou, Xin; Lian, Xiaocong; Liu, Zhenyu; Liu, Xiaoxiang

    2015-12-01

    The next-generation video coding standard of High-Efficiency Video Coding (HEVC) is especially efficient for coding high-resolution video such as 8K-ultra-high-definition (UHD) video. Fractional motion estimation in HEVC presents a significant challenge in clock latency and area cost as it consumes more than 40 % of the total encoding time and thus results in high computational complexity. With aims at supporting 8K-UHD video applications, an efficient interpolation filter VLSI architecture for HEVC is proposed in this paper. Firstly, a new interpolation filter algorithm based on the 8-pixel interpolation unit is proposed in this paper. It can save 19.7 % processing time on average with acceptable coding quality degradation. Based on the proposed algorithm, an efficient interpolation filter VLSI architecture, composed of a reused data path of interpolation, an efficient memory organization, and a reconfigurable pipeline interpolation filter engine, is presented to reduce the implement hardware area and achieve high throughput. The final VLSI implementation only requires 37.2k gates in a standard 90-nm CMOS technology at an operating frequency of 240 MHz. The proposed architecture can be reused for either half-pixel interpolation or quarter-pixel interpolation, which can reduce the area cost for about 131,040 bits RAM. The processing latency of our proposed VLSI architecture can support the real-time processing of 4:2:0 format 7680 × 4320@78fps video sequences.

  17. PLA realizations for VLSI state machines

    Science.gov (United States)

    Gopalakrishnan, S.; Whitaker, S.; Maki, G.; Liu, K.

    1990-01-01

    A major problem associated with state assignment procedures for VLSI controllers is obtaining an assignment that produces minimal or near minimal logic. The key item in Programmable Logic Array (PLA) area minimization is the number of unique product terms required by the design equations. This paper presents a state assignment algorithm for minimizing the number of product terms required to implement a finite state machine using a PLA. Partition algebra with predecessor state information is used to derive a near optimal state assignment. A maximum bound on the number of product terms required can be obtained by inspecting the predecessor state information. The state assignment algorithm presented is much simpler than existing procedures and leads to the same number of product terms or less. An area-efficient PLA structure implemented in a 1.0 micron CMOS process is presented along with a summary of the performance for a controller implemented using this design procedure.

  18. Assimilation of Biophysical Neuronal Dynamics in Neuromorphic VLSI.

    Science.gov (United States)

    Wang, Jun; Breen, Daniel; Akinin, Abraham; Broccard, Frederic; Abarbanel, Henry D I; Cauwenberghs, Gert

    2017-12-01

    Representing the biophysics of neuronal dynamics and behavior offers a principled analysis-by-synthesis approach toward understanding mechanisms of nervous system functions. We report on a set of procedures assimilating and emulating neurobiological data on a neuromorphic very large scale integrated (VLSI) circuit. The analog VLSI chip, NeuroDyn, features 384 digitally programmable parameters specifying for 4 generalized Hodgkin-Huxley neurons coupled through 12 conductance-based chemical synapses. The parameters also describe reversal potentials, maximal conductances, and spline regressed kinetic functions for ion channel gating variables. In one set of experiments, we assimilated membrane potential recorded from one of the neurons on the chip to the model structure upon which NeuroDyn was designed using the known current input sequence. We arrived at the programmed parameters except for model errors due to analog imperfections in the chip fabrication. In a related set of experiments, we replicated songbird individual neuron dynamics on NeuroDyn by estimating and configuring parameters extracted using data assimilation from intracellular neural recordings. Faithful emulation of detailed biophysical neural dynamics will enable the use of NeuroDyn as a tool to probe electrical and molecular properties of functional neural circuits. Neuroscience applications include studying the relationship between molecular properties of neurons and the emergence of different spike patterns or different brain behaviors. Clinical applications include studying and predicting effects of neuromodulators or neurodegenerative diseases on ion channel kinetics.

  19. Synthesis algorithm of VLSI multipliers for ASIC

    Science.gov (United States)

    Chua, O. H.; Eldin, A. G.

    1993-01-01

    Multipliers are critical sub-blocks in ASIC design, especially for digital signal processing and communications applications. A flexible multiplier synthesis tool is developed which is capable of generating multiplier blocks for word size in the range of 4 to 256 bits. A comparison of existing multiplier algorithms is made in terms of speed, silicon area, and suitability for automated synthesis and verification of its VLSI implementation. The algorithm divides the range of supported word sizes into sub-ranges and provides each sub-range with a specific multiplier architecture for optimal speed and area. The algorithm of the synthesis tool and the multiplier architectures are presented. Circuit implementation and the automated synthesis methodology are discussed.

  20. Spike Neuromorphic VLSI-Based Bat Echolocation for Micro-Aerial Vehicle Guidance

    Science.gov (United States)

    2007-03-31

    IFinal 03/01/04 - 02/28/07 4. TITLE AND SUBTITLE 5a. CONTRACT NUMBER Neuromorphic VLSI-based Bat Echolocation for Micro-aerial 5b.GRANTNUMBER Vehicle...uncovered interesting new issues in our choice for representing the intensity of signals. We have just finished testing the first chip version of an echo...timing-based algorithm (’openspace’) for sonar-guided navigation amidst multiple obstacles. 15. SUBJECT TERMS Neuromorphic VLSI, bat echolocation

  1. International Conference on VLSI, Communication, Advanced Devices, Signals & Systems and Networking

    CERN Document Server

    Shirur, Yasha; Prasad, Rekha

    2013-01-01

    This book is a collection of papers presented by renowned researchers, keynote speakers and academicians in the International Conference on VLSI, Communication, Analog Designs, Signals and Systems, and Networking (VCASAN-2013), organized by B.N.M. Institute of Technology, Bangalore, India during July 17-19, 2013. The book provides global trends in cutting-edge technologies in electronics and communication engineering. The content of the book is useful to engineers, researchers and academicians as well as industry professionals.

  2. An Asynchronous Low Power and High Performance VLSI Architecture for Viterbi Decoder Implemented with Quasi Delay Insensitive Templates

    Directory of Open Access Journals (Sweden)

    T. Kalavathi Devi

    2015-01-01

    Full Text Available Convolutional codes are comprehensively used as Forward Error Correction (FEC codes in digital communication systems. For decoding of convolutional codes at the receiver end, Viterbi decoder is often used to have high priority. This decoder meets the demand of high speed and low power. At present, the design of a competent system in Very Large Scale Integration (VLSI technology requires these VLSI parameters to be finely defined. The proposed asynchronous method focuses on reducing the power consumption of Viterbi decoder for various constraint lengths using asynchronous modules. The asynchronous designs are based on commonly used Quasi Delay Insensitive (QDI templates, namely, Precharge Half Buffer (PCHB and Weak Conditioned Half Buffer (WCHB. The functionality of the proposed asynchronous design is simulated and verified using Tanner Spice (TSPICE in 0.25 µm, 65 nm, and 180 nm technologies of Taiwan Semiconductor Manufacture Company (TSMC. The simulation result illustrates that the asynchronous design techniques have 25.21% of power reduction compared to synchronous design and work at a speed of 475 MHz.

  3. BioCMOS Interfaces and Co-Design

    CERN Document Server

    Carrara, Sandro

    2013-01-01

    The application of CMOS circuits and ASIC VLSI systems to problems in medicine and system biology has led to the emergence of Bio/CMOS Interfaces and Co-Design as an exciting and rapidly growing area of research. The mutual inter-relationships between VLSI-CMOS design and the biophysics of molecules interfacing with silicon and/or onto metals has led to the emergence of the interdisciplinary engineering approach to Bio/CMOS interfaces. This new approach, facilitated by 3D circuit design and nanotechnology, has resulted in new concepts and applications for VLSI systems in the bio-world. This book offers an invaluable reference to the state-of-the-art in Bio/CMOS interfaces. It describes leading-edge research in the field of CMOS design and VLSI development for applications requiring integration of biological molecules onto the chip. It provides multidisciplinary content ranging from biochemistry to CMOS design in order to address Bio/CMOS interface co-design in bio-sensing applications.

  4. Physico-topological methods of increasing stability of the VLSI circuit components to irradiation. Fiziko-topologhicheskie sposoby uluchsheniya radiatsionnoj stojkosti komponentov BIS

    Energy Technology Data Exchange (ETDEWEB)

    Pereshenkov, V S [MIFI, Moscow, (Russian Federation); Shishianu, F S; Rusanovskij, V I [S. Lazo KPI, Chisinau, (Moldova, Republic of)

    1992-01-01

    The paper presents the method used and the experimental results obtained for 8-bit microprocessor irradiated with [gamma]-rays and neutrons. The correlation between the electrical and technological parameters with the irradiation ones is revealed. The influence of leakage current between devices incorporated in VLSI circuits was studied. The obtained results create the possibility to determine the technological parameters necessary for designing the circuit able to work at predetermined doses. The necessary substrate doping concentration for isolation which eliminates the leakage current between devices prevents the VLSI circuit break down was determined. (Author).

  5. A second generation 50 Mbps VLSI level zero processing system prototype

    Science.gov (United States)

    Harris, Jonathan C.; Shi, Jeff; Speciale, Nick; Bennett, Toby

    1994-01-01

    Level Zero Processing (LZP) generally refers to telemetry data processing functions performed at ground facilities to remove all communication artifacts from instrument data. These functions typically include frame synchronization, error detection and correction, packet reassembly and sorting, playback reversal, merging, time-ordering, overlap deletion, and production of annotated data sets. The Data Systems Technologies Division (DSTD) at Goddard Space Flight Center (GSFC) has been developing high-performance Very Large Scale Integration Level Zero Processing Systems (VLSI LZPS) since 1989. The first VLSI LZPS prototype demonstrated 20 Megabits per second (Mbp's) capability in 1992. With a new generation of high-density Application-specific Integrated Circuits (ASIC) and a Mass Storage System (MSS) based on the High-performance Parallel Peripheral Interface (HiPPI), a second prototype has been built that achieves full 50 Mbp's performance. This paper describes the second generation LZPS prototype based upon VLSI technologies.

  6. Flow-Based Biochips: Fault-Tolerant Design and Error Recovery

    DEFF Research Database (Denmark)

    Pop, Paul

    2015-01-01

    VLSI). Biochips are currently being designed manually using tools such as AutoCAD. Physical defects can be introduced during the fabrication process, which reduces the yield, and may lead to the failure of the biochemical application. Failure is costly because of the need to redo lengthy experiments, using...

  7. A multi coding technique to reduce transition activity in VLSI circuits

    International Nuclear Information System (INIS)

    Vithyalakshmi, N.; Rajaram, M.

    2014-01-01

    Advances in VLSI technology have enabled the implementation of complex digital circuits in a single chip, reducing system size and power consumption. In deep submicron low power CMOS VLSI design, the main cause of energy dissipation is charging and discharging of internal node capacitances due to transition activity. Transition activity is one of the major factors that also affect the dynamic power dissipation. This paper proposes power reduction analyzed through algorithm and logic circuit levels. In algorithm level the key aspect of reducing power dissipation is by minimizing transition activity and is achieved by introducing a data coding technique. So a novel multi coding technique is introduced to improve the efficiency of transition activity up to 52.3% on the bus lines, which will automatically reduce the dynamic power dissipation. In addition, 1 bit full adders are introduced in the Hamming distance estimator block, which reduces the device count. This coding method is implemented using Verilog HDL. The overall performance is analyzed by using Modelsim and Xilinx Tools. In total 38.2% power saving capability is achieved compared to other existing methods. (semiconductor technology)

  8. Emerging Applications for High K Materials in VLSI Technology

    Science.gov (United States)

    Clark, Robert D.

    2014-01-01

    The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI) manufacturing for leading edge Dynamic Random Access Memory (DRAM) and Complementary Metal Oxide Semiconductor (CMOS) applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM) diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD) is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing. PMID:28788599

  9. Emerging Applications for High K Materials in VLSI Technology

    Directory of Open Access Journals (Sweden)

    Robert D. Clark

    2014-04-01

    Full Text Available The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI manufacturing for leading edge Dynamic Random Access Memory (DRAM and Complementary Metal Oxide Semiconductor (CMOS applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing.

  10. VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-Based Communication Systems

    Directory of Open Access Journals (Sweden)

    Jen-Chih Kuo

    2003-12-01

    Full Text Available The technique of {orthogonal frequency division multiplexing (OFDM} is famous for its robustness against frequency-selective fading channel. This technique has been widely used in many wired and wireless communication systems. In general, the {fast Fourier transform (FFT} and {inverse FFT (IFFT} operations are used as the modulation/demodulation kernel in the OFDM systems, and the sizes of FFT/IFFT operations are varied in different applications of OFDM systems. In this paper, we design and implement a variable-length prototype FFT/IFFT processor to cover different specifications of OFDM applications. The cached-memory FFT architecture is our suggested VLSI system architecture to design the prototype FFT/IFFT processor for the consideration of low-power consumption. We also implement the twiddle factor butterfly {processing element (PE} based on the {{coordinate} rotation digital computer (CORDIC} algorithm, which avoids the use of conventional multiplication-and-accumulation unit, but evaluates the trigonometric functions using only add-and-shift operations. Finally, we implement a variable-length prototype FFT/IFFT processor with TSMC 0.35 μm 1P4M CMOS technology. The simulations results show that the chip can perform (64-2048-point FFT/IFFT operations up to 80 MHz operating frequency which can meet the speed requirement of most OFDM standards such as WLAN, ADSL, VDSL (256∼2K, DAB, and 2K-mode DVB.

  11. Embedded Processor Based Automatic Temperature Control of VLSI Chips

    Directory of Open Access Journals (Sweden)

    Narasimha Murthy Yayavaram

    2009-01-01

    Full Text Available This paper presents embedded processor based automatic temperature control of VLSI chips, using temperature sensor LM35 and ARM processor LPC2378. Due to the very high packing density, VLSI chips get heated very soon and if not cooled properly, the performance is very much affected. In the present work, the sensor which is kept very near proximity to the IC will sense the temperature and the speed of the fan arranged near to the IC is controlled based on the PWM signal generated by the ARM processor. A buzzer is also provided with the hardware, to indicate either the failure of the fan or overheating of the IC. The entire process is achieved by developing a suitable embedded C program.

  12. An SEU analysis approach for error propagation in digital VLSI CMOS ASICs

    International Nuclear Information System (INIS)

    Baze, M.P.; Bartholet, W.G.; Dao, T.A.; Buchner, S.

    1995-01-01

    A critical issue in the development of ASIC designs is the ability to achieve first pass fabrication success. Unsuccessful fabrication runs have serious impact on ASIC costs and schedules. The ability to predict an ASICs radiation response prior to fabrication is therefore a key issue when designing ASICs for military and aerospace systems. This paper describes an analysis approach for calculating static bit error propagation in synchronous VLSI CMOS circuits developed as an aid for predicting the SEU response of ASIC's. The technique is intended for eventual application as an ASIC development simulation tool which can be used by circuit design engineers for performance evaluation during the pre-fabrication design process in much the same way that logic and timing simulators are used

  13. An analog VLSI real time optical character recognition system based on a neural architecture

    International Nuclear Information System (INIS)

    Bo, G.; Caviglia, D.; Valle, M.

    1999-01-01

    In this paper a real time Optical Character Recognition system is presented: it is based on a feature extraction module and a neural network classifier which have been designed and fabricated in analog VLSI technology. Experimental results validate the circuit functionality. The results obtained from a validation based on a mixed approach (i.e., an approach based on both experimental and simulation results) confirm the soundness and reliability of the system

  14. An analog VLSI real time optical character recognition system based on a neural architecture

    Energy Technology Data Exchange (ETDEWEB)

    Bo, G.; Caviglia, D.; Valle, M. [Genoa Univ. (Italy). Dip. of Biophysical and Electronic Engineering

    1999-03-01

    In this paper a real time Optical Character Recognition system is presented: it is based on a feature extraction module and a neural network classifier which have been designed and fabricated in analog VLSI technology. Experimental results validate the circuit functionality. The results obtained from a validation based on a mixed approach (i.e., an approach based on both experimental and simulation results) confirm the soundness and reliability of the system.

  15. Point DCT VLSI Architecture for Emerging HEVC Standard

    Directory of Open Access Journals (Sweden)

    Ashfaq Ahmed

    2012-01-01

    Full Text Available This work presents a flexible VLSI architecture to compute the -point DCT. Since HEVC supports different block sizes for the computation of the DCT, that is, 4×4 up to 32×32, the design of a flexible architecture to support them helps reducing the area overhead of hardware implementations. The hardware proposed in this work is partially folded to save area and to get speed for large video sequences sizes. The proposed architecture relies on the decomposition of the DCT matrices into sparse submatrices in order to reduce the multiplications. Finally, multiplications are completely eliminated using the lifting scheme. The proposed architecture sustains real-time processing of 1080P HD video codec running at 150 MHz.

  16. A Knowledge Based Approach to VLSI CAD

    Science.gov (United States)

    1983-09-01

    Avail-and/or Dist ISpecial L| OI. SEICURITY CLASIIrCATION OP THIS IPA.lErllm S Daene." A KNOwLEDE BASED APPROACH TO VLSI CAD’ Louis L Steinberg and...major issues lies in building up and managing the knowledge base of oesign expertise. We expect that, as with many recent expert systems, in order to

  17. Power efficient and high performance VLSI architecture for AES algorithm

    Directory of Open Access Journals (Sweden)

    K. Kalaiselvi

    2015-09-01

    Full Text Available Advanced encryption standard (AES algorithm has been widely deployed in cryptographic applications. This work proposes a low power and high throughput implementation of AES algorithm using key expansion approach. We minimize the power consumption and critical path delay using the proposed high performance architecture. It supports both encryption and decryption using 256-bit keys with a throughput of 0.06 Gbps. The VHDL language is utilized for simulating the design and an FPGA chip has been used for the hardware implementations. Experimental results reveal that the proposed AES architectures offer superior performance than the existing VLSI architectures in terms of power, throughput and critical path delay.

  18. Possible applications of the sigma delta digitizer in particle physics

    International Nuclear Information System (INIS)

    Hallgren, B.

    1991-01-01

    The sigma delta (ΣΔ) principle is an analog-to-digital conversion technique based on high-frequency sampling and low-pass filtering of the quantization noise. Resolution in time is exchanged for that in amplitude so as to avoid the difficulty of implementing complex precision analog circuits, in favour of digital circuits. The approach is attractive because it will make it possible to integrate complete channels of high resolution analog-to-digital converters and time digitizers in submicron digital VLSI technologies. Advantage is taken of the fact that the state-of-the-art VLSI is better suited for providing fast digital circuits than for providing precise analog circuits. This article describes the principle and the performance of the ideal ΣΔ digitizer. The design and measurements of a new 10 MHz prototype circuit of a second-order ΣΔ is presented to show the high speed operation of such a circuit. The expected performance of a CMOS test design using the same principles is discussed. Digital filters, useful for particle physics, are introduced. A comparison to other digitizing techniques is made and the potential applications of the ΣΔ digitizer in particle physics are outlined. (orig.)

  19. Real time track finding in a drift chamber with a VLSI neural network

    International Nuclear Information System (INIS)

    Lindsey, C.S.; Denby, B.; Haggerty, H.; Johns, K.

    1992-01-01

    In a test setup, a hardware neural network determined track parameters of charged particles traversing a drift chamber. Voltages proportional to the drift times in 6 cells of the 3-layer chamber were inputs to the Intel ETANN neural network chip which had been trained to give the slope and intercept of tracks. We compare network track parameters to those obtained from off-line track fits. To our knowledge this is the first on-line application of a VLSI neural network to a high energy physics detector. This test explored the potential of the chip and the practical problems of using it in a real world setting. We compare the chip performance to a neural network simulation on a conventional computer. We discuss possible applications of the chip in high energy physics detector triggers. (orig.)

  20. Built-in self-repair of VLSI memories employing neural nets

    Science.gov (United States)

    Mazumder, Pinaki

    1998-10-01

    The decades of the Eighties and the Nineties have witnessed the spectacular growth of VLSI technology, when the chip size has increased from a few hundred devices to a staggering multi-millon transistors. This trend is expected to continue as the CMOS feature size progresses towards the nanometric dimension of 100 nm and less. SIA roadmap projects that, where as the DRAM chips will integrate over 20 billion devices in the next millennium, the future microprocessors may incorporate over 100 million transistors on a single chip. As the VLSI chip size increase, the limited accessibility of circuit components poses great difficulty for external diagnosis and replacement in the presence of faulty components. For this reason, extensive work has been done in built-in self-test techniques, but little research is known concerning built-in self-repair. Moreover, the extra hardware introduced by conventional fault-tolerance techniques is also likely to become faulty, therefore causing the circuit to be useless. This research demonstrates the feasibility of implementing electronic neural networks as intelligent hardware for memory array repair. Most importantly, we show that the neural network control possesses a robust and degradable computing capability under various fault conditions. Overall, a yield analysis performed on 64K DRAM's shows that the yield can be improved from as low as 20 percent to near 99 percent due to the self-repair design, with overhead no more than 7 percent.

  1. Numerical analysis of electromigration in thin film VLSI interconnections

    NARCIS (Netherlands)

    Petrescu, V.; Mouthaan, A.J.; Schoenmaker, W.; Angelescu, S.; Vissarion, R.; Dima, G.; Wallinga, Hans; Profirescu, M.D.

    1995-01-01

    Due to the continuing downscaling of the dimensions in VLSI circuits, electromigration is becoming a serious reliability hazard. A software tool based on finite element analysis has been developed to solve the two partial differential equations of the two particle vacancy/imperfection model.

  2. Heavy ion tests on programmable VLSI

    International Nuclear Information System (INIS)

    Provost-Grellier, A.

    1989-11-01

    The radiation from space environment induces operation damages in onboard computers systems. The definition of a strategy, for the Very Large Scale Integrated Circuitry (VLSI) qualification and choice, is needed. The 'upset' phenomena is known to be the most critical integrated circuit radiation effect. The strategies for testing integrated circuits are reviewed. A method and a test device were developed and applied to space applications candidate circuits. Cyclotron, synchrotron and Californium source experiments were carried out [fr

  3. Techniques for Computing the DFT Using the Residue Fermat Number Systems and VLSI

    Science.gov (United States)

    Truong, T. K.; Chang, J. J.; Hsu, I. S.; Pei, D. Y.; Reed, I. S.

    1985-01-01

    The integer complex multiplier and adder over the direct sum of two copies of a finite field is specialized to the direct sum of the rings of integers modulo Fermat numbers. Such multiplications and additions can be used in the implementation of a discrete Fourier transform (DFT) of a sequence of complex numbers. The advantage of the present approach is that the number of multiplications needed for the DFT can be reduced substantially over the previous approach. The architectural designs using this approach are regular, simple, expandable and, therefore, naturally suitable for VLSI implementation.

  4. An electron undulating ring for VLSI lithography

    International Nuclear Information System (INIS)

    Tomimasu, T.; Mikado, T.; Noguchi, T.; Sugiyama, S.; Yamazaki, T.

    1985-01-01

    The development of the ETL storage ring ''TERAS'' as an undulating ring has been continued to achieve a wide area exposure of synchrotron radiation (SR) in VLSI lithography. Stable vertical and horizontal undulating motions of stored beams are demonstrated around a horizontal design orbit of TERAS, using two small steering magnets of which one is used for vertical undulating and another for horizontal one. Each steering magnet is inserted into one of the periodic configulation of guide field elements. As one of useful applications of undulaing electron beams, a vertically wide exposure of SR has been demonstrated in the SR lithography. The maximum vertical deviation from the design orbit nCcurs near the steering magnet. The maximum vertical tilt angle of the undulating beam near the nodes is about + or - 2mrad for a steering magnetic field of 50 gauss. Another proposal is for hith-intensity, uniform and wide exposure of SR from a wiggler installed in TERAS, using vertical and horizontal undulating motions of stored beams. A 1.4 m long permanent magnet wiggler has been installed for this purpose in this April

  5. Convolving optically addressed VLSI liquid crystal SLM

    Science.gov (United States)

    Jared, David A.; Stirk, Charles W.

    1994-03-01

    We designed, fabricated, and tested an optically addressed spatial light modulator (SLM) that performs a 3 X 3 kernel image convolution using ferroelectric liquid crystal on VLSI technology. The chip contains a 16 X 16 array of current-mirror-based convolvers with a fixed kernel for finding edges. The pixels are located on 75 micron centers, and the modulators are 20 microns on a side. The array successfully enhanced edges in illumination patterns. We developed a high-level simulation tool (CON) for analyzing the performance of convolving SLM designs. CON has a graphical interface and simulates SLM functions using SPICE-like device models. The user specifies the pixel function along with the device parameters and nonuniformities. We discovered through analysis, simulation and experiment that the operation of current-mirror-based convolver pixels is degraded at low light levels by the variation of transistor threshold voltages inherent to CMOS chips. To function acceptable, the test SLM required the input image to have an minimum irradiance of 10 (mu) W/cm2. The minimum required irradiance can be further reduced by adding a photodarlington near the photodetector or by increasing the size of the transistors used to calculate the convolution.

  6. Applications of VLSI circuits to medical imaging

    International Nuclear Information System (INIS)

    O'Donnell, M.

    1988-01-01

    In this paper the application of advanced VLSI circuits to medical imaging is explored. The relationship of both general purpose signal processing chips and custom devices to medical imaging is discussed using examples of fabricated chips. In addition, advanced CAD tools for silicon compilation are presented. Devices built with these tools represent a possible alternative to custom devices and general purpose signal processors for the next generation of medical imaging systems

  7. Associative Memory Design for the Fast TracKer Processor (FTK)at ATLAS

    CERN Document Server

    Annovi, A; The ATLAS collaboration; Beretta, M; Bossini, E; Crescioli, F; Dell'Orso, M; Giannetti, P; Hoff, J; Liu, T; Liberali, V; Sacco, I; Schoening, A; Soltveit, H K; Stabile, A; Tripiccione, R

    2011-01-01

    We describe a VLSI processor for pattern recognition based on Content Addressable Memory (CAM) architecture, optimized for on-line track finding in high-energy physics experiments. A large CAM bank stores all trajectories of interest and extracts the ones compatible with a given event. This task is naturally parallelized by a CAM architecture able to output identified trajectories, recognized among a huge amount of possible combinations, in just a few 100 MHz clock cycles. We have developed this device (called the AMchip03 processor), using 180 nm technology, for the Silicon Vertex Trigger (SVT) upgrade at CDF [1] using a standard-cell VLSI design methodology. We propose a new design that introduces a full custom CAM cell and takes advantage of 65 nm technology. The customized design maximizes the pattern density, minimizes the power consumption and implements the functionalities needed for the planned Fast Tracker (FTK) [2], an ATLAS trigger upgrade project at LHC. We introduce a new variable resolution patt...

  8. A multichip aVLSI system emulating orientation selectivity of primary visual cortical cells.

    Science.gov (United States)

    Shimonomura, Kazuhiro; Yagi, Tetsuya

    2005-07-01

    In this paper, we designed and fabricated a multichip neuromorphic analog very large scale integrated (aVLSI) system, which emulates the orientation selective response of the simple cell in the primary visual cortex. The system consists of a silicon retina and an orientation chip. An image, which is filtered by a concentric center-surround (CS) antagonistic receptive field of the silicon retina, is transferred to the orientation chip. The image transfer from the silicon retina to the orientation chip is carried out with analog signals. The orientation chip selectively aggregates multiple pixels of the silicon retina, mimicking the feedforward model proposed by Hubel and Wiesel. The chip provides the orientation-selective (OS) outputs which are tuned to 0 degrees, 60 degrees, and 120 degrees. The feed-forward aggregation reduces the fixed pattern noise that is due to the mismatch of the transistors in the orientation chip. The spatial properties of the orientation selective response were examined in terms of the adjustable parameters of the chip, i.e., the number of aggregated pixels and size of the receptive field of the silicon retina. The multichip aVLSI architecture used in the present study can be applied to implement higher order cells such as the complex cell of the primary visual cortex.

  9. Memory Efficient VLSI Implementation of Real-Time Motion Detection System Using FPGA Platform

    Directory of Open Access Journals (Sweden)

    Sanjay Singh

    2017-06-01

    Full Text Available Motion detection is the heart of a potentially complex automated video surveillance system, intended to be used as a standalone system. Therefore, in addition to being accurate and robust, a successful motion detection technique must also be economical in the use of computational resources on selected FPGA development platform. This is because many other complex algorithms of an automated video surveillance system also run on the same platform. Keeping this key requirement as main focus, a memory efficient VLSI architecture for real-time motion detection and its implementation on FPGA platform is presented in this paper. This is accomplished by proposing a new memory efficient motion detection scheme and designing its VLSI architecture. The complete real-time motion detection system using the proposed memory efficient architecture along with proper input/output interfaces is implemented on Xilinx ML510 (Virtex-5 FX130T FPGA development platform and is capable of operating at 154.55 MHz clock frequency. Memory requirement of the proposed architecture is reduced by 41% compared to the standard clustering based motion detection architecture. The new memory efficient system robustly and automatically detects motion in real-world scenarios (both for the static backgrounds and the pseudo-stationary backgrounds in real-time for standard PAL (720 × 576 size color video.

  10. VLSI-based video event triggering for image data compression

    Science.gov (United States)

    Williams, Glenn L.

    1994-02-01

    Long-duration, on-orbit microgravity experiments require a combination of high resolution and high frame rate video data acquisition. The digitized high-rate video stream presents a difficult data storage problem. Data produced at rates of several hundred million bytes per second may require a total mission video data storage requirement exceeding one terabyte. A NASA-designed, VLSI-based, highly parallel digital state machine generates a digital trigger signal at the onset of a video event. High capacity random access memory storage coupled with newly available fuzzy logic devices permits the monitoring of a video image stream for long term (DC-like) or short term (AC-like) changes caused by spatial translation, dilation, appearance, disappearance, or color change in a video object. Pre-trigger and post-trigger storage techniques are then adaptable to archiving only the significant video images.

  11. A new VLSI complex integer multiplier which uses a quadratic-polynomial residue system with Fermat numbers

    Science.gov (United States)

    Shyu, H. C.; Reed, I. S.; Truong, T. K.; Hsu, I. S.; Chang, J. J.

    1987-01-01

    A quadratic-polynomial Fermat residue number system (QFNS) has been used to compute complex integer multiplications. The advantage of such a QFNS is that a complex integer multiplication requires only two integer multiplications. In this article, a new type Fermat number multiplier is developed which eliminates the initialization condition of the previous method. It is shown that the new complex multiplier can be implemented on a single VLSI chip. Such a chip is designed and fabricated in CMOS-Pw technology.

  12. New domain for image analysis: VLSI circuits testing, with Romuald, specialized in parallel image processing

    Energy Technology Data Exchange (ETDEWEB)

    Rubat Du Merac, C; Jutier, P; Laurent, J; Courtois, B

    1983-07-01

    This paper describes some aspects of specifying, designing and evaluating a specialized machine, Romuald, for the capture, coding, and processing of video and scanning electron microscope (SEM) pictures. First the authors present the functional organization of the process unit of romuald and its hardware, giving details of its behaviour. Then they study the capture and display unit which, thanks to its flexibility, enables SEM images coding. Finally, they describe an application which is now being developed in their laboratory: testing VLSI circuits with new methods: sem+voltage contrast and image processing. 15 references.

  13. An area-efficient topology for VLSI implementation of Viterbi decoders and other shuffle-exchange type structures

    DEFF Research Database (Denmark)

    Sparsø, Jens; Jørgensen, Henrik Nordtorp; Paaske, Erik

    1991-01-01

    A topology for single-chip implementation of computing structures based on shuffle-exchange (SE)-type interconnection networks is presented. The topology is suited for structures with a small number of processing elements (i.e. 32-128) whose area cannot be neglected compared to the area required....... The topology has been used in a VLSI implementation of the add-compare-select (ACS) module of a fully parallel K=7, R=1/2 Viterbi decoder. Both the floor-planning issues and some of the important algorithm and circuit-level aspects of this design are discussed. The chip has been designed and fabricated in a 2....... The interconnection network occupies 32% of the area.>...

  14. Driving a car with custom-designed fuzzy inferencing VLSI chips and boards

    Science.gov (United States)

    Pin, Francois G.; Watanabe, Yutaka

    1993-01-01

    Vehicle control in a-priori unknown, unpredictable, and dynamic environments requires many calculational and reasoning schemes to operate on the basis of very imprecise, incomplete, or unreliable data. For such systems, in which all the uncertainties can not be engineered away, approximate reasoning may provide an alternative to the complexity and computational requirements of conventional uncertainty analysis and propagation techniques. Two types of computer boards including custom-designed VLSI chips were developed to add a fuzzy inferencing capability to real-time control systems. All inferencing rules on a chip are processed in parallel, allowing execution of the entire rule base in about 30 microseconds, and therefore, making control of 'reflex-type' of motions envisionable. The use of these boards and the approach using superposition of elemental sensor-based behaviors for the development of qualitative reasoning schemes emulating human-like navigation in a-priori unknown environments are first discussed. Then how the human-like navigation scheme implemented on one of the qualitative inferencing boards was installed on a test-bed platform to investigate two control modes for driving a car in a-priori unknown environments on the basis of sparse and imprecise sensor data is described. In the first mode, the car navigates fully autonomously, while in the second mode, the system acts as a driver's aid providing the driver with linguistic (fuzzy) commands to turn left or right and speed up or slow down depending on the obstacles perceived by the sensors. Experiments with both modes of control are described in which the system uses only three acoustic range (sonar) sensor channels to perceive the environment. Simulation results as well as indoors and outdoors experiments are presented and discussed to illustrate the feasibility and robustness of autonomous navigation and/or safety enhancing driver's aid using the new fuzzy inferencing hardware system and some human

  15. Main physics features driving design concept and physics design constraints

    International Nuclear Information System (INIS)

    Fujisawa, Noboru; Sugihara, Masayoshi; Yamamoto, Shin

    1987-07-01

    Major physics design philosophies are described, which are essential bases for a plasma design and may have significant impacts on a reactor design concept. Those design philosophies are classified into two groups, physics design drivers and physics design constraints. The design drivers are featured by the fact that a designer is free to choose and the choice may be guided by his opinion, such as ignition, a pulse length, an operation scenario, etc.. The design constraints may follow a physical law, such as plasma confinement, β-limit, density limit, and so on. (author)

  16. High-energy heavy ion testing of VLSI devices for single event ...

    Indian Academy of Sciences (India)

    Unknown

    per describes the high-energy heavy ion radiation testing of VLSI devices for single event upset (SEU) ... The experimental set up employed to produce low flux of heavy ions viz. silicon ... through which they pass, leaving behind a wake of elec- ... for use in Bus Management Unit (BMU) and bulk CMOS ... was scheduled.

  17. Practical guide to organic field effect transistor circuit design

    CERN Document Server

    Sou, Antony

    2016-01-01

    The field of organic electronics spans a very wide range of disciplines from physics and chemistry to hardware and software engineering. This makes the field of organic circuit design a daunting prospect full of intimidating complexities, yet to be exploited to its true potential. Small focussed research groups also find it difficult to move beyond their usual boundaries and create systems-on-foil that are comparable with the established silicon world.This book has been written to address these issues, intended for two main audiences; firstly, physics or materials researchers who have thus far designed circuits using only basic drawing software; and secondly, experienced silicon CMOS VLSI design engineers who are already knowledgeable in the design of full custom transistor level circuits but are not familiar with organic devices or thin film transistor (TFT) devices.In guiding the reader through the disparate and broad subject matters, a concise text has been written covering the physics and chemistry of the...

  18. A High Performance VLSI Computer Architecture For Computer Graphics

    Science.gov (United States)

    Chin, Chi-Yuan; Lin, Wen-Tai

    1988-10-01

    A VLSI computer architecture, consisting of multiple processors, is presented in this paper to satisfy the modern computer graphics demands, e.g. high resolution, realistic animation, real-time display etc.. All processors share a global memory which are partitioned into multiple banks. Through a crossbar network, data from one memory bank can be broadcasted to many processors. Processors are physically interconnected through a hyper-crossbar network (a crossbar-like network). By programming the network, the topology of communication links among processors can be reconfigurated to satisfy specific dataflows of different applications. Each processor consists of a controller, arithmetic operators, local memory, a local crossbar network, and I/O ports to communicate with other processors, memory banks, and a system controller. Operations in each processor are characterized into two modes, i.e. object domain and space domain, to fully utilize the data-independency characteristics of graphics processing. Special graphics features such as 3D-to-2D conversion, shadow generation, texturing, and reflection, can be easily handled. With the current high density interconnection (MI) technology, it is feasible to implement a 64-processor system to achieve 2.5 billion operations per second, a performance needed in most advanced graphics applications.

  19. Design and Implementation of a Sort-Free K-Best Sphere Decoder

    KAUST Repository

    Mondal, Sudip

    2012-10-18

    This paper describes the design and VLSI architecture for a 4x4 breadth first K-Best MIMO decoder using a 64 QAM scheme. A novel sort free approach to path extension, as well as quantized metrics result in a high throughput VLSI architecture with lower power and area consumption compared to state of the art published systems. Functionality is confirmed via an FPGA implementation on a Xilinx Virtex II Pro FPGA. Comparison of simulation and measurements are given and FPGA utilization figures are provided. Finally, VLSI architectural tradeoffs are explored for a synthesized ASIC implementation in a 65nm CMOS technology.

  20. A Single Chip VLSI Implementation of a QPSK/SQPSK Demodulator for a VSAT Receiver Station

    Science.gov (United States)

    Kwatra, S. C.; King, Brent

    1995-01-01

    This thesis presents a VLSI implementation of a QPSK/SQPSK demodulator. It is designed to be employed in a VSAT earth station that utilizes the FDMA/TDM link. A single chip architecture is used to enable this chip to be easily employed in the VSAT system. This demodulator contains lowpass filters, integrate and dump units, unique word detectors, a timing recovery unit, a phase recovery unit and a down conversion unit. The design stages start with a functional representation of the system by using the C programming language. Then it progresses into a register based representation using the VHDL language. The layout components are designed based on these VHDL models and simulated. Component generators are developed for the adder, multiplier, read-only memory and serial access memory in order to shorten the design time. These sub-components are then block routed to form the main components of the system. The main components are block routed to form the final demodulator.

  1. High performance VLSI telemetry data systems

    Science.gov (United States)

    Chesney, J.; Speciale, N.; Horner, W.; Sabia, S.

    1990-01-01

    NASA's deployment of major space complexes such as Space Station Freedom (SSF) and the Earth Observing System (EOS) will demand increased functionality and performance from ground based telemetry acquisition systems well above current system capabilities. Adaptation of space telemetry data transport and processing standards such as those specified by the Consultative Committee for Space Data Systems (CCSDS) standards and those required for commercial ground distribution of telemetry data, will drive these functional and performance requirements. In addition, budget limitations will force the requirement for higher modularity, flexibility, and interchangeability at lower cost in new ground telemetry data system elements. At NASA's Goddard Space Flight Center (GSFC), the design and development of generic ground telemetry data system elements, over the last five years, has resulted in significant solutions to these problems. This solution, referred to as the functional components approach includes both hardware and software components ready for end user application. The hardware functional components consist of modern data flow architectures utilizing Application Specific Integrated Circuits (ASIC's) developed specifically to support NASA's telemetry data systems needs and designed to meet a range of data rate requirements up to 300 Mbps. Real-time operating system software components support both embedded local software intelligence, and overall system control, status, processing, and interface requirements. These components, hardware and software, form the superstructure upon which project specific elements are added to complete a telemetry ground data system installation. This paper describes the functional components approach, some specific component examples, and a project example of the evolution from VLSI component, to basic board level functional component, to integrated telemetry data system.

  2. VLSI Technology for Cognitive Radio

    Science.gov (United States)

    VIJAYALAKSHMI, B.; SIDDAIAH, P.

    2017-08-01

    One of the most challenging tasks of cognitive radio is the efficiency in the spectrum sensing scheme to overcome the spectrum scarcity problem. The popular and widely used spectrum sensing technique is the energy detection scheme as it is very simple and doesn’t require any previous information related to the signal. We propose one such approach which is an optimised spectrum sensing scheme with reduced filter structure. The optimisation is done in terms of area and power performance of the spectrum. The simulations of the VLSI structure of the optimised flexible spectrum is done using verilog coding by using the XILINX ISE software. Our method produces performance with 13% reduction in area and 66% reduction in power consumption in comparison to the flexible spectrum sensing scheme. All the results are tabulated and comparisons are made. A new scheme for optimised and effective spectrum sensing opens up with our model.

  3. A Compact VLSI System for Bio-Inspired Visual Motion Estimation.

    Science.gov (United States)

    Shi, Cong; Luo, Gang

    2018-04-01

    This paper proposes a bio-inspired visual motion estimation algorithm based on motion energy, along with its compact very-large-scale integration (VLSI) architecture using low-cost embedded systems. The algorithm mimics motion perception functions of retina, V1, and MT neurons in a primate visual system. It involves operations of ternary edge extraction, spatiotemporal filtering, motion energy extraction, and velocity integration. Moreover, we propose the concept of confidence map to indicate the reliability of estimation results on each probing location. Our algorithm involves only additions and multiplications during runtime, which is suitable for low-cost hardware implementation. The proposed VLSI architecture employs multiple (frame, pixel, and operation) levels of pipeline and massively parallel processing arrays to boost the system performance. The array unit circuits are optimized to minimize hardware resource consumption. We have prototyped the proposed architecture on a low-cost field-programmable gate array platform (Zynq 7020) running at 53-MHz clock frequency. It achieved 30-frame/s real-time performance for velocity estimation on 160 × 120 probing locations. A comprehensive evaluation experiment showed that the estimated velocity by our prototype has relatively small errors (average endpoint error < 0.5 pixel and angular error < 10°) for most motion cases.

  4. VLSI architecture of a K-best detector for MIMO-OFDM wireless communication systems

    International Nuclear Information System (INIS)

    Jian Haifang; Shi Yin

    2009-01-01

    The K-best detector is considered as a promising technique in the MIMO-OFDM detection because of its good performance and low complexity. In this paper, a new K-best VLSI architecture is presented. In the proposed architecture, the metric computation units (MCUs) expand each surviving path only to its partial branches, based on the novel expansion scheme, which can predetermine the branches' ascending order by their local distances. Then a distributed sorter sorts out the new K surviving paths from the expanded branches in pipelines. Compared to the conventional K-best scheme, the proposed architecture can approximately reduce fundamental operations by 50% and 75% for the 16-QAM and the 64-QAM cases, respectively, and, consequently, lower the demand on the hardware resource significantly. Simulation results prove that the proposed architecture can achieve a performance very similar to conventional K-best detectors. Hence, it is an efficient solution to the K-best detector's VLSI implementation for high-throughput MIMO-OFDM systems.

  5. VLSI architecture of a K-best detector for MIMO-OFDM wireless communication systems

    Energy Technology Data Exchange (ETDEWEB)

    Jian Haifang; Shi Yin, E-mail: jhf@semi.ac.c [Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083 (China)

    2009-07-15

    The K-best detector is considered as a promising technique in the MIMO-OFDM detection because of its good performance and low complexity. In this paper, a new K-best VLSI architecture is presented. In the proposed architecture, the metric computation units (MCUs) expand each surviving path only to its partial branches, based on the novel expansion scheme, which can predetermine the branches' ascending order by their local distances. Then a distributed sorter sorts out the new K surviving paths from the expanded branches in pipelines. Compared to the conventional K-best scheme, the proposed architecture can approximately reduce fundamental operations by 50% and 75% for the 16-QAM and the 64-QAM cases, respectively, and, consequently, lower the demand on the hardware resource significantly. Simulation results prove that the proposed architecture can achieve a performance very similar to conventional K-best detectors. Hence, it is an efficient solution to the K-best detector's VLSI implementation for high-throughput MIMO-OFDM systems.

  6. Analog VLSI Models of Range-Tuned Neurons in the Bat Echolocation System

    Directory of Open Access Journals (Sweden)

    Horiuchi Timothy

    2003-01-01

    Full Text Available Bat echolocation is a fascinating topic of research for both neuroscientists and engineers, due to the complex and extremely time-constrained nature of the problem and its potential for application to engineered systems. In the bat's brainstem and midbrain exist neural circuits that are sensitive to the specific difference in time between the outgoing sonar vocalization and the returning echo. While some of the details of the neural mechanisms are known to be species-specific, a basic model of reafference-triggered, postinhibitory rebound timing is reasonably well supported by available data. We have designed low-power, analog VLSI circuits to mimic this mechanism and have demonstrated range-dependent outputs for use in a real-time sonar system. These circuits are being used to implement range-dependent vocalization amplitude, vocalization rate, and closest target isolation.

  7. An area-efficient path memory structure for VLSI Implementation of high speed Viterbi decoders

    DEFF Research Database (Denmark)

    Paaske, Erik; Pedersen, Steen; Sparsø, Jens

    1991-01-01

    Path storage and selection methods for Viterbi decoders are investigated with special emphasis on VLSI implementations. Two well-known algorithms, the register exchange, algorithm, REA, and the trace back algorithm, TBA, are considered. The REA requires the smallest number of storage elements...

  8. Physical database design using Oracle

    CERN Document Server

    Burleson, Donald K

    2004-01-01

    INTRODUCTION TO ORACLE PHYSICAL DESIGNPrefaceRelational Databases and Physical DesignSystems Analysis and Physical Database DesignIntroduction to Logical Database DesignEntity/Relation ModelingBridging between Logical and Physical ModelsPhysical Design Requirements Validation PHYSICAL ENTITY DESIGN FOR ORACLEData Relationships and Physical DesignMassive De-Normalization: STAR Schema DesignDesigning Class HierarchiesMaterialized Views and De-NormalizationReferential IntegrityConclusionORACLE HARDWARE DESIGNPlanning the Server EnvironmentDesigning the Network Infrastructure for OracleOracle Netw

  9. First results from a silicon-strip detector with VLSI readout

    International Nuclear Information System (INIS)

    Anzivino, G.; Horisberger, R.; Hubbeling, L.; Hyams, B.; Parker, S.; Breakstone, A.; Litke, A.M.; Walker, J.T.; Bingefors, N.

    1986-01-01

    A 256-strip silicon detector with 25 μm strip pitch, connected to two 128-channel NMOS VLSI chips (Microplex), has been tested using straight-through tracks from a ruthenium beta source. The readout channels have a pitch of 47.5 μm. A single multiplexed output provides voltages proportional to the integrated charge from each strip. The most probable signal height from the beta traversals is approximately 14 times the rms noise in any single channel. (orig.)

  10. A novel low-voltage low-power analogue VLSI implementation of neural networks with on-chip back-propagation learning

    Science.gov (United States)

    Carrasco, Manuel; Garde, Andres; Murillo, Pilar; Serrano, Luis

    2005-06-01

    In this paper a novel design and implementation of a VLSI Analogue Neural Net based on Multi-Layer Perceptron (MLP) with on-chip Back Propagation (BP) learning algorithm suitable for the resolution of classification problems is described. In order to implement a general and programmable analogue architecture, the design has been carried out in a hierarchical way. In this way the net has been divided in synapsis-blocks and neuron-blocks providing an easy method for the analysis. These blocks basically consist on simple cells, which are mainly, the activation functions (NAF), derivatives (DNAF), multipliers and weight update circuits. The analogue design is based on current-mode translinear techniques using MOS transistors working in the weak inversion region in order to reduce both the voltage supply and the power consumption. Moreover, with the purpose of minimizing the noise, offset and distortion of even order, the topologies are fully-differential and balanced. The circuit, named ANNE (Analogue Neural NEt), has been prototyped and characterized as a proof of concept on CMOS AMI-0.5A technology occupying a total area of 2.7mm2. The chip includes two versions of neural nets with on-chip BP learning algorithm, which are respectively a 2-1 and a 2-2-1 implementations. The proposed nets have been experimentally tested using supply voltages from 2.5V to 1.8V, which is suitable for single cell lithium-ion battery supply applications. Experimental results of both implementations included in ANNE exhibit a good performance on solving classification problems. These results have been compared with other proposed Analogue VLSI implementations of Neural Nets published in the literature demonstrating that our proposal is very efficient in terms of occupied area and power consumption.

  11. Implementation of a VLSI Level Zero Processing system utilizing the functional component approach

    Science.gov (United States)

    Shi, Jianfei; Horner, Ward P.; Grebowsky, Gerald J.; Chesney, James R.

    1991-01-01

    A high rate Level Zero Processing system is currently being prototyped at NASA/Goddard Space Flight Center (GSFC). Based on state-of-the-art VLSI technology and the functional component approach, the new system promises capabilities of handling multiple Virtual Channels and Applications with a combined data rate of up to 20 Megabits per second (Mbps) at low cost.

  12. Efficient physical embedding of topologically complex information processing networks in brains and computer circuits.

    Directory of Open Access Journals (Sweden)

    Danielle S Bassett

    2010-04-01

    Full Text Available Nervous systems are information processing networks that evolved by natural selection, whereas very large scale integrated (VLSI computer circuits have evolved by commercially driven technology development. Here we follow historic intuition that all physical information processing systems will share key organizational properties, such as modularity, that generally confer adaptivity of function. It has long been observed that modular VLSI circuits demonstrate an isometric scaling relationship between the number of processing elements and the number of connections, known as Rent's rule, which is related to the dimensionality of the circuit's interconnect topology and its logical capacity. We show that human brain structural networks, and the nervous system of the nematode C. elegans, also obey Rent's rule, and exhibit some degree of hierarchical modularity. We further show that the estimated Rent exponent of human brain networks, derived from MRI data, can explain the allometric scaling relations between gray and white matter volumes across a wide range of mammalian species, again suggesting that these principles of nervous system design are highly conserved. For each of these fractal modular networks, the dimensionality of the interconnect topology was greater than the 2 or 3 Euclidean dimensions of the space in which it was embedded. This relatively high complexity entailed extra cost in physical wiring: although all networks were economically or cost-efficiently wired they did not strictly minimize wiring costs. Artificial and biological information processing systems both may evolve to optimize a trade-off between physical cost and topological complexity, resulting in the emergence of homologous principles of economical, fractal and modular design across many different kinds of nervous and computational networks.

  13. Mixed-Dimensionality VLSI-Type Configurable Tools for Virtual Prototyping of Biomicrofluidic Devices and Integrated Systems

    Science.gov (United States)

    Makhijani, Vinod B.; Przekwas, Andrzej J.

    2002-10-01

    This report presents results of a DARPA/MTO Composite CAD Project aimed to develop a comprehensive microsystem CAD environment, CFD-ACE+ Multiphysics, for bio and microfluidic devices and complete microsystems. The project began in July 1998, and was a three-year team effort between CFD Research Corporation, California Institute of Technology (CalTech), University of California, Berkeley (UCB), and Tanner Research, with Mr. Don Verlee from Abbott Labs participating as a consultant on the project. The overall objective of this project was to develop, validate and demonstrate several applications of a user-configurable VLSI-type mixed-dimensionality software tool for design of biomicrofluidics devices and integrated systems. The developed tool would provide high fidelity 3-D multiphysics modeling capability, l-D fluidic circuits modeling, and SPICE interface for system level simulations, and mixed-dimensionality design. It would combine tools for layouts and process fabrication, geometric modeling, and automated grid generation, and interfaces to EDA tools (e.g. Cadence) and MCAD tools (e.g. ProE).

  14. Three-dimensional design methodologies for tree-based FPGA architecture

    CERN Document Server

    Pangracious, Vinod; Mehrez, Habib

    2015-01-01

    This book focuses on the development of 3D design and implementation methodologies for Tree-based FPGA architecture. It also stresses the needs for new and augmented 3D CAD tools to support designs such as, the design for 3D, to manufacture high performance 3D integrated circuits and reconfigurable FPGA-based systems. This book was written as a text that covers the foundations of 3D integrated system design and FPGA architecture design. It was written for the use in an elective or core course at the graduate level in field of Electrical Engineering, Computer Engineering and Doctoral Research programs. No previous background on 3D integration is required, nevertheless fundamental understanding of 2D CMOS VLSI design is required. It is assumed that reader has taken the core curriculum in Electrical Engineering or Computer Engineering, with courses like CMOS VLSI design, Digital System Design and Microelectronics Circuits being the most important. It is accessible for self-study by both senior students and profe...

  15. Design and implementation of interface units for high speed fiber optics local area networks and broadband integrated services digital networks

    Science.gov (United States)

    Tobagi, Fouad A.; Dalgic, Ismail; Pang, Joseph

    1990-01-01

    The design and implementation of interface units for high speed Fiber Optic Local Area Networks and Broadband Integrated Services Digital Networks are discussed. During the last years, a number of network adapters that are designed to support high speed communications have emerged. This approach to the design of a high speed network interface unit was to implement package processing functions in hardware, using VLSI technology. The VLSI hardware implementation of a buffer management unit, which is required in such architectures, is described.

  16. Motion-sensor fusion-based gesture recognition and its VLSI architecture design for mobile devices

    Science.gov (United States)

    Zhu, Wenping; Liu, Leibo; Yin, Shouyi; Hu, Siqi; Tang, Eugene Y.; Wei, Shaojun

    2014-05-01

    With the rapid proliferation of smartphones and tablets, various embedded sensors are incorporated into these platforms to enable multimodal human-computer interfaces. Gesture recognition, as an intuitive interaction approach, has been extensively explored in the mobile computing community. However, most gesture recognition implementations by now are all user-dependent and only rely on accelerometer. In order to achieve competitive accuracy, users are required to hold the devices in predefined manner during the operation. In this paper, a high-accuracy human gesture recognition system is proposed based on multiple motion sensor fusion. Furthermore, to reduce the energy overhead resulted from frequent sensor sampling and data processing, a high energy-efficient VLSI architecture implemented on a Xilinx Virtex-5 FPGA board is also proposed. Compared with the pure software implementation, approximately 45 times speed-up is achieved while operating at 20 MHz. The experiments show that the average accuracy for 10 gestures achieves 93.98% for user-independent case and 96.14% for user-dependent case when subjects hold the device randomly during completing the specified gestures. Although a few percent lower than the conventional best result, it still provides competitive accuracy acceptable for practical usage. Most importantly, the proposed system allows users to hold the device randomly during operating the predefined gestures, which substantially enhances the user experience.

  17. A parallel VLSI architecture for a digital filter of arbitrary length using Fermat number transforms

    Science.gov (United States)

    Truong, T. K.; Reed, I. S.; Yeh, C. S.; Shao, H. M.

    1982-01-01

    A parallel architecture for computation of the linear convolution of two sequences of arbitrary lengths using the Fermat number transform (FNT) is described. In particular a pipeline structure is designed to compute a 128-point FNT. In this FNT, only additions and bit rotations are required. A standard barrel shifter circuit is modified so that it performs the required bit rotation operation. The overlap-save method is generalized for the FNT to compute a linear convolution of arbitrary length. A parallel architecture is developed to realize this type of overlap-save method using one FNT and several inverse FNTs of 128 points. The generalized overlap save method alleviates the usual dynamic range limitation in FNTs of long transform lengths. Its architecture is regular, simple, and expandable, and therefore naturally suitable for VLSI implementation.

  18. Technical Training: ELEC-2005: Electronics in High Energy Physics

    CERN Multimedia

    Monique Duval

    2005-01-01

    CERN Technical Training 2005: Learning for the LHC! ELEC-2005: Electronics in High Energy Physics - Spring Term ELEC-2005 is a new course series on modern electronics, given by CERN physicists and engineers within the framework of the 2005 Technical Training Programme, in an extended format of the successful ELEC-2002 course series. This comprehensive course series is designed for people who are not electronics specialists, for example physicists, engineers and technicians working at or visiting the laboratory, who use or will use electronics in their present or future activities, in particular in the context of the LHC accelerator and experiments. ELEC-2005 is composed of four Terms: the Winter Term, Introduction to electronics in HEP, already took place; the next three Terms will run throughout the year: Spring Term: Integrated circuits and VLSI technology for physics (March, 6 lectures) - now open for registration Summer Term: System electronics for physics: Issues (May, 7 lectures) Autumn Term: Ele...

  19. Proceedings of the workshop on new solid state devices for high energy physics

    International Nuclear Information System (INIS)

    1987-12-01

    This paper contains articles on semiconductor devices used in the detection of high energy particles. Some articles reported: Position sensitive semiconductor devices; Scintillation techniques and optical devices; Radiation damage to detectors; VLSI for physics; and experience with Si detectors in NA32

  20. Radiation hardness tests with a demonstrator preamplifier circuit manufactured in silicon on sapphire (SOS) VLSI technology

    International Nuclear Information System (INIS)

    Bingefors, N.; Ekeloef, T.; Eriksson, C.; Paulsson, M.; Moerk, G.; Sjoelund, A.

    1992-01-01

    Samples of the preamplifier circuit, as well as of separate n and p channel transistors of the type contained in the circuit, were irradiated with gammas from a 60 Co source up to an integrated dose of 3 Mrad (30 kGy). The VLSI manufacturing technology used is the SOS4 process of ABB Hafo. A first analysis of the tests shows that the performance of the amplifier remains practically unaffected by the radiation for total doses up to 1 Mrad. At higher doses up to 3 Mrad the circuit amplification factor decreases by a factor between 4 and 5 whereas the output noise level remains unchanged. It is argued that it may be possible to reduce the decrease in amplification factor in future by optimizing the amplifier circuit design further. (orig.)

  1. ELEC-2005: Electronics in High Energy Physics

    CERN Multimedia

    Monique Duval

    2004-01-01

    ELEC-2005 is a new course series on modern electronics, given by CERN physicists and engineers in the format of the successful ELEC-2002 course series, and within the framework of the 2005 Technical Training Programme. This comprehensive course series is designed for people who are not electronics specialists, for example physicists, engineers and technicians working at or visiting the laboratory, who use or will use electronics in their present or future activities, in particular in the context of the LHC accelerator and experiments. ELEC-2005 will composed of four Terms throughout the year: Winter Term: Introduction to electronics in HEP (January-February, 6 lectures) Spring Term: Integrated circuits and VLSI technology for physics (March, 6 lectures) Summer Term: System electronics for physics: Issues (May, 7 lectures) Winter Term: Electronics applications in HEP experiments (November-December, 10 lectures) Lectures within each Term will take place on Tuesdays and Thursdays, from 10:00 to 12:30. The...

  2. Ambient Temperature Based Thermal Aware Energy Efficient ROM Design on FPGA

    DEFF Research Database (Denmark)

    Saini, Rishita; Bansal, Neha; Bansal, Meenakshi

    2015-01-01

    Thermal aware design is currently gaining importance in VLSI research domain. In this work, we are going to design thermal aware energy efficient ROM on Virtex-5 FPGA. Ambient Temperature, airflow, and heat sink profile play a significant role in thermal aware hardware design life cycle. Ambient...

  3. Operation of a Fast-RICH Prototype with VLSI readout electronics

    Energy Technology Data Exchange (ETDEWEB)

    Guyonnet, J.L. (CRN, IN2P3-CNRS / Louis Pasteur Univ., Strasbourg (France)); Arnold, R. (CRN, IN2P3-CNRS / Louis Pasteur Univ., Strasbourg (France)); Jobez, J.P. (Coll. de France, 75 - Paris (France)); Seguinot, J. (Coll. de France, 75 - Paris (France)); Ypsilantis, T. (Coll. de France, 75 - Paris (France)); Chesi, E. (CERN / ECP Div., Geneve (Switzerland)); Racz, A. (CERN / ECP Div., Geneve (Switzerland)); Egger, J. (Paul Scherrer Inst., Villigen (Switzerland)); Gabathuler, K. (Paul Scherrer Inst., Villigen (Switzerland)); Joram, C. (Karlsruhe Univ. (Germany)); Adachi, I. (KEK, Tsukuba (Japan)); Enomoto, R. (KEK, Tsukuba (Japan)); Sumiyoshi, T. (KEK, Tsukuba (Japan))

    1994-04-01

    We discuss the first test results, obtained with cosmic rays, of a full-scale Fast-RICH Prototype with proximity-focused 10 mm thick LiF (CaF[sub 2]) solid radiators, TEA as photosensor in CH[sub 4], and readout of 12 x 10[sup 3] cathode pads (5.334 x 6.604 mm[sup 2]) using dedicated VLSI electronics we have developed. The number of detected photoelectrons is 7.7 (6.9) for the CaF[sub 2] (LiF) radiator, very near to the expected values 6.4 (7.5) from Monte Carlo simulations. The single-photon Cherenkov angle resolution [sigma][sub [theta

  4. Design of delay insensitive circuits using multi-ring structures

    DEFF Research Database (Denmark)

    Sparsø, Jens; Staunstrup, Jørgen; Dantzer-Sørensen, Michael

    1992-01-01

    The design and VLSI implementation of a delay insensitive circuit that computes the inner product of two vec·tors is described. The circuit is based on an iterative serial-parallel multiplication algorithm. The design is based on a data flow approach using pipelines and rings that are combined...

  5. Flip-flop design in nanometer CMOS from high speed to low energy

    CERN Document Server

    Alioto, Massimo; Palumbo, Gaetano

    2015-01-01

    This book provides a unified treatment of Flip-Flop design and selection in nanometer CMOS VLSI systems. The design aspects related to the energy-delay tradeoff in Flip-Flops are discussed, including their energy-optimal selection according to the targeted application, and the detailed circuit design in nanometer CMOS VLSI systems. Design strategies are derived in a coherent framework that includes explicitly nanometer effects, including leakage, layout parasitics and process/voltage/temperature variations, as main advances over the existing body of work in the field. The related design tradeoffs are explored in a wide range of applications and the related energy-performance targets. A wide range of existing and recently proposed Flip-Flop topologies are discussed. Theoretical foundations are provided to set the stage for the derivation of design guidelines, and emphasis is given on practical aspects and consequences of the presented results. Analytical models and derivations are introduced when needed to gai...

  6. Application of artificial neural networks in particle physics

    International Nuclear Information System (INIS)

    Kolanoski, H.

    1995-04-01

    The application of Artificial Neural Networks in Particle Physics is reviewed. Most common is the use of feed-forward nets for event classification and function approximation. This network type is best suited for a hardware implementation and special VLSI chips are available which are used in fast trigger processors. Also discussed are fully connected networks of the Hopfield type for pattern recognition in tracking detectors. (orig.)

  7. Vlsi implementation of flexible architecture for decision tree classification in data mining

    Science.gov (United States)

    Sharma, K. Venkatesh; Shewandagn, Behailu; Bhukya, Shankar Nayak

    2017-07-01

    The Data mining algorithms have become vital to researchers in science, engineering, medicine, business, search and security domains. In recent years, there has been a terrific raise in the size of the data being collected and analyzed. Classification is the main difficulty faced in data mining. In a number of the solutions developed for this problem, most accepted one is Decision Tree Classification (DTC) that gives high precision while handling very large amount of data. This paper presents VLSI implementation of flexible architecture for Decision Tree classification in data mining using c4.5 algorithm.

  8. Technical Training: ELEC-2005 - Electronics in High Energy Physics

    CERN Multimedia

    Monique Duval

    2005-01-01

    Learning for the LHC! ELEC-2005 is a new course series on modern electronics, given by CERN physicists and engineers within the framework of the 2005 Technical Training Programme, in an extended format of the successful ELEC-2002 course series. This comprehensive course series is designed for people who are not electronics specialists, for example physicists, engineers and technicians working at or visiting the laboratory, who use or will use electronics in their present or future activities, in particular in the context of the LHC accelerator and experiments. ELEC-2005 is composed of four Terms that will run throughout the year: Winter Term: Introduction to electronics in HEP (January-February, 6 lectures) Spring Term: Integrated circuits and VLSI technology for physics (March, 6 lectures) Summer Term: System electronics for physics: Issues (May, 7 lectures) Autumn Term: Electronics applications in HEP experiments (November-December, 10 lectures) Lectures within each Term will take place on Tuesdays an...

  9. Global floor planning approach for VLSI design

    International Nuclear Information System (INIS)

    LaPotin, D.P.

    1986-01-01

    Within a hierarchical design environment, initial decisions regarding the partitioning and choice of module attributes greatly impact the quality of the resulting IC in terms of area and electrical performance. This dissertation presents a global floor-planning approach which allows designers to quickly explore layout issues during the initial stages of the IC design process. In contrast to previous efforts, which address the floor-planning problem from a strict module placement point of view, this approach considers floor-planning from an area planning point of view. The approach is based upon a combined min-cut and slicing paradigm, which ensures routability. To provide flexibility, modules may be specified as having a number of possible dimensions and orientations, and I/O pads as well as layout constraints are considered. A slicing-tree representation is employed, upon which a sequence of traversal operations are applied in order to obtain an area efficient layout. An in-place partitioning technique, which provides an improvement over previous min-cut and slicing-based efforts, is discussed. Global routing and module I/O pin assignment are provided for floor-plan evaluation purposes. A computer program, called Mason, has been developed which efficiently implements the approach and provides an interactive environment for designers to perform floor-planning. Performance of this program is illustrated via several industrial examples

  10. Design automation, languages, and simulations

    CERN Document Server

    Chen, Wai-Kai

    2003-01-01

    As the complexity of electronic systems continues to increase, the micro-electronic industry depends upon automation and simulations to adapt quickly to market changes and new technologies. Compiled from chapters contributed to CRC's best-selling VLSI Handbook, this volume covers a broad range of topics relevant to design automation, languages, and simulations. These include a collaborative framework that coordinates distributed design activities through the Internet, an overview of the Verilog hardware description language and its use in a design environment, hardware/software co-design, syst

  11. Design study of a low-power, low-noise front-end for multianode silicon drift detectors

    International Nuclear Information System (INIS)

    Caponetto, L.; Presti, D. Lo; Randazzo, N.; Russo, G.V.; Leonora, E.; Lo Nigro, L.; Petta, C.; Reito, S.; Sipala, V.

    2005-01-01

    The read-out for Silicon Drift Detectors in the form of a VLSI chip is presented, with a view to applications in High Energy Physics and space experiments. It is characterised by extremely low power dissipation, small noise and size

  12. Physical protection system design and evaluation

    International Nuclear Information System (INIS)

    Williams, J.D.

    1997-01-01

    The design of an effective physical protection system includes the determination of physical protection system objectives, initial design of a physical protection system, design evaluation, and probably a redesign or refinement. To develop the objectives, the designer must begin by gathering information about facility operation and conditions, such as a comprehensive description of the facility, operating conditions, and the physical protection requirements. The designer then needs to define the threat. This involves considering factors about potential adversaries: class of adversary, adversary's capabilities, and range of adversary's tactics. Next, the designer should identify targets. Determination of whether or not the materials being protected are attractive targets is based mainly on the ease or difficulty of acquisition and desirability of the material. The designer now knows the objectives of the physical protection system, that is, open-quotes what to protect against whom.close quotes The next step is to design the system by determining how best to combine such elements as fences, vaults, sensors and assessment devices, entry control elements, procedures, communication devices, and protective forces personnel to meet the objectives of the system. Once a physical protection system is designed, it must be analyzed and evaluated to ensure it meets the physical protection objectives. Evaluation must allow for features working together to ensure protection rather than regarding each feature separately. Due to the complexity of the protection systems, an evaluation usually requires modeling techniques. If any vulnerabilities are found, the initial system must be redesigned to correct the vulnerabilities and a reevaluation conducted. This paper reviews the physical protection system design and methodology mentioned above. Examples of the steps required and a brief introduction to some of the technologies used in modem physical protections system are given

  13. VLSI Architectures for Sliding-Window-Based Space-Time Turbo Trellis Code Decoders

    Directory of Open Access Journals (Sweden)

    Georgios Passas

    2012-01-01

    Full Text Available The VLSI implementation of SISO-MAP decoders used for traditional iterative turbo coding has been investigated in the literature. In this paper, a complete architectural model of a space-time turbo code receiver that includes elementary decoders is presented. These architectures are based on newly proposed building blocks such as a recursive add-compare-select-offset (ACSO unit, A-, B-, Γ-, and LLR output calculation modules. Measurements of complexity and decoding delay of several sliding-window-technique-based MAP decoder architectures and a proposed parameter set lead to defining equations and comparison between those architectures.

  14. Initial beam test results from a silicon-strip detector with VLSI readout

    International Nuclear Information System (INIS)

    Adolphsen, C.; Litke, A.; Schwarz, A.

    1986-01-01

    Silicon detectors with 256 strips, having a pitch of 25 μm, and connected to two 128 channel NMOS VLSI chips each (Microplex), have been tested in relativistic charged particle beams at CERN and at the Stanford Linear Accelerator Center. The readout chips have an input channel pitch of 47.5 μm and a single multiplexed output which provides voltages proportional to the integrated charge from each strip. The most probable signal height from minimum ionizing tracks was 15 times the rms noise in any single channel. Two-track traversals with a separation of 100 μm were cleanly resolved

  15. Integration of SPICE with TEK LV500 ASIC Design Verification System

    Directory of Open Access Journals (Sweden)

    A. Srivastava

    1996-01-01

    Full Text Available The present work involves integration of the simulation stage of design of a VLSI circuit and its testing stage. The SPICE simulator, TEK LV500 ASIC Design Verification System, and TekWaves, a test program generator for LV500, were integrated. A software interface in ‘C’ language in UNIX ‘solaris 1.x’ environment has been developed between SPICE and the testing tools (TekWAVES and LV500. The function of the software interface developed is multifold. It takes input from either SPICE2G.6 or SPICE 3e.1. The output generated by the interface software can be given as an input to either TekWAVES or LV500. A graphical user interface has also been developed with OPENWlNDOWS using Xview tool kit on SUN workstation. As an example, a two phase clock generator circuit has been considered and usefulness of the software demonstrated. The interface software could be easily linked with VLSI design such as MAGIC layout editor.

  16. CERN Technical Training 2005 - ELEC-2005: Electronics in High Energy Physics

    CERN Multimedia

    Monique Duval

    2004-01-01

    Learning for the LHC!ELEC-2005 is a new course series on modern electronics, given by CERN physicists and engineers within the framework of the 2005 Technical Training Programme, in an extended format of the successful ELEC-2002 course series. This comprehensive course series is designed for people who are not electronics specialists, for example physicists, engineers and technicians working at or visiting the laboratory, who use or will use electronics in their present or future activities, in particular in the context of the LHC accelerator and experiments.ELEC-2005 is composed of four Terms that will run throughout the year:Winter Term: Introduction to electronics in HEP (January-February, 6 lectures) Spring Term: Integrated circuits and VLSI technology for physics (March, 6 lectures) Summer Term: System electronics for physics: Issues (May, 7 lectures) Winter Term: Electronics applications in HEP experiments (November-December, 10 lectures) Lectures within each Term will take place on Tuesdays and Thursd...

  17. Designing the next generation (fifth generation computers)

    International Nuclear Information System (INIS)

    Wallich, P.

    1983-01-01

    A description is given of the designs necessary to develop fifth generation computers. An analysis is offered of problems and developments in parallelism, VLSI, artificial intelligence, knowledge engineering and natural language processing. Software developments are outlined including logic programming, object-oriented programming and exploratory programming. Computer architecture is detailed including concurrent computer architecture

  18. CASTOR a VLSI CMOS mixed analog-digital circuit for low noise multichannel counting applications

    International Nuclear Information System (INIS)

    Comes, G.; Loddo, F.; Hu, Y.; Kaplon, J.; Ly, F.; Turchetta, R.; Bonvicini, V.; Vacchi, A.

    1996-01-01

    In this paper we present the design and first experimental results of a VLSI mixed analog-digital 1.2 microns CMOS circuit (CASTOR) for multichannel radiation detectors applications demanding low noise amplification and counting of radiation pulses. This circuit is meant to be connected to pixel-like detectors. Imaging can be obtained by counting the number of hits in each pixel during a user-controlled exposure time. Each channel of the circuit features an analog and a digital part. In the former one, a charge preamplifier is followed by a CR-RC shaper with an output buffer and a threshold discriminator. In the digital part, a 16-bit counter is present together with some control logic. The readout of the counters is done serially on a common tri-state output. Daisy-chaining is possible. A 4-channel prototype has been built. This prototype has been optimised for use in the digital radiography Syrmep experiment at the Elettra synchrotron machine in Trieste (Italy): its main design parameters are: shaping time of about 850 ns, gain of 190 mV/fC and ENC (e - rms)=60+17 C (pF). The counting rate per channel, limited by the analog part, can be as high as about 200 kHz. Characterisation of the circuit and first tests with silicon microstrip detectors are presented. They show the circuit works according to design specification and can be used for imaging applications. (orig.)

  19. Analysis of pre-service physics teacher skills designing simple physics experiments based technology

    Science.gov (United States)

    Susilawati; Huda, C.; Kurniawan, W.; Masturi; Khoiri, N.

    2018-03-01

    Pre-service physics teacher skill in designing simple experiment set is very important in adding understanding of student concept and practicing scientific skill in laboratory. This study describes the skills of physics students in designing simple experiments based technologicall. The experimental design stages include simple tool design and sensor modification. The research method used is descriptive method with the number of research samples 25 students and 5 variations of simple physics experimental design. Based on the results of interviews and observations obtained the results of pre-service physics teacher skill analysis in designing simple experimental physics charged technology is good. Based on observation result, pre-service physics teacher skill in designing simple experiment is good while modification and sensor application are still not good. This suggests that pre-service physics teacher still need a lot of practice and do experiments in designing physics experiments using sensor modifications. Based on the interview result, it is found that students have high enough motivation to perform laboratory activities actively and students have high curiosity to be skilled at making simple practicum tool for physics experiment.

  20. Modeling selective attention using a neuromorphic analog VLSI device.

    Science.gov (United States)

    Indiveri, G

    2000-12-01

    Attentional mechanisms are required to overcome the problem of flooding a limited processing capacity system with information. They are present in biological sensory systems and can be a useful engineering tool for artificial visual systems. In this article we present a hardware model of a selective attention mechanism implemented on a very large-scale integration (VLSI) chip, using analog neuromorphic circuits. The chip exploits a spike-based representation to receive, process, and transmit signals. It can be used as a transceiver module for building multichip neuromorphic vision systems. We describe the circuits that carry out the main processing stages of the selective attention mechanism and provide experimental data for each circuit. We demonstrate the expected behavior of the model at the system level by stimulating the chip with both artificially generated control signals and signals obtained from a saliency map, computed from an image containing several salient features.

  1. VLSI IMPLEMENTATION OF NOVEL ROUND KEYS GENERATION SCHEME FOR CRYPTOGRAPHY APPLICATIONS BY ERROR CONTROL ALGORITHM

    Directory of Open Access Journals (Sweden)

    B. SENTHILKUMAR

    2015-05-01

    Full Text Available A novel implementation of code based cryptography (Cryptocoding technique for multi-layer key distribution scheme is presented. VLSI chip is designed for storing information on generation of round keys. New algorithm is developed for reduced key size with optimal performance. Error Control Algorithm is employed for both generation of round keys and diffusion of non-linearity among them. Two new functions for bit inversion and its reversal are developed for cryptocoding. Probability of retrieving original key from any other round keys is reduced by diffusing nonlinear selective bit inversions on round keys. Randomized selective bit inversions are done on equal length of key bits by Round Constant Feedback Shift Register within the error correction limits of chosen code. Complexity of retrieving the original key from any other round keys is increased by optimal hardware usage. Proposed design is simulated and synthesized using VHDL coding for Spartan3E FPGA and results are shown. Comparative analysis is done between 128 bit Advanced Encryption Standard round keys and proposed round keys for showing security strength of proposed algorithm. This paper concludes that chip based multi-layer key distribution of proposed algorithm is an enhanced solution to the existing threats on cryptography algorithms.

  2. VLSI ARCHITECTURE FOR IMAGE COMPRESSION THROUGH ADDER MINIMIZATION TECHNIQUE AT DCT STRUCTURE

    Directory of Open Access Journals (Sweden)

    N.R. Divya

    2014-08-01

    Full Text Available Data compression plays a vital role in multimedia devices to present the information in a succinct frame. Initially, the DCT structure is used for Image compression, which has lesser complexity and area efficient. Similarly, 2D DCT also has provided reasonable data compression, but implementation concern, it calls more multipliers and adders thus its lead to acquire more area and high power consumption. To contain an account of all, this paper has been dealt with VLSI architecture for image compression using Rom free DA based DCT (Discrete Cosine Transform structure. This technique provides high-throughput and most suitable for real-time implementation. In order to achieve this image matrix is subdivided into odd and even terms then the multiplication functions are removed by shift and add approach. Kogge_Stone_Adder techniques are proposed for obtaining a bit-wise image quality which determines the new trade-off levels as compared to the previous techniques. Overall the proposed architecture produces reduced memory, low power consumption and high throughput. MATLAB is used as a funding tool for receiving an input pixel and obtaining output image. Verilog HDL is used for implementing the design, Model Sim for simulation, Quatres II is used to synthesize and obtain details about power and area.

  3. Emergent Auditory Feature Tuning in a Real-Time Neuromorphic VLSI System.

    Science.gov (United States)

    Sheik, Sadique; Coath, Martin; Indiveri, Giacomo; Denham, Susan L; Wennekers, Thomas; Chicca, Elisabetta

    2012-01-01

    Many sounds of ecological importance, such as communication calls, are characterized by time-varying spectra. However, most neuromorphic auditory models to date have focused on distinguishing mainly static patterns, under the assumption that dynamic patterns can be learned as sequences of static ones. In contrast, the emergence of dynamic feature sensitivity through exposure to formative stimuli has been recently modeled in a network of spiking neurons based on the thalamo-cortical architecture. The proposed network models the effect of lateral and recurrent connections between cortical layers, distance-dependent axonal transmission delays, and learning in the form of Spike Timing Dependent Plasticity (STDP), which effects stimulus-driven changes in the pattern of network connectivity. In this paper we demonstrate how these principles can be efficiently implemented in neuromorphic hardware. In doing so we address two principle problems in the design of neuromorphic systems: real-time event-based asynchronous communication in multi-chip systems, and the realization in hybrid analog/digital VLSI technology of neural computational principles that we propose underlie plasticity in neural processing of dynamic stimuli. The result is a hardware neural network that learns in real-time and shows preferential responses, after exposure, to stimuli exhibiting particular spectro-temporal patterns. The availability of hardware on which the model can be implemented, makes this a significant step toward the development of adaptive, neurobiologically plausible, spike-based, artificial sensory systems.

  4. Emergent auditory feature tuning in a real-time neuromorphic VLSI system

    Directory of Open Access Journals (Sweden)

    Sadique eSheik

    2012-02-01

    Full Text Available Many sounds of ecological importance, such as communication calls, are characterised by time-varying spectra. However, most neuromorphic auditory models to date have focused on distinguishing mainly static patterns, under the assumption that dynamic patterns can be learned as sequences of static ones. In contrast, the emergence of dynamic feature sensitivity through exposure to formative stimuli has been recently modeled in a network of spiking neurons based on the thalamocortical architecture. The proposed network models the effect of lateral and recurrent connections between cortical layers, distance-dependent axonal transmission delays, and learning in the form of Spike Timing Dependent Plasticity (STDP, which effects stimulus-driven changes in the pattern of network connectivity. In this paper we demonstrate how these principles can be efficiently implemented in neuromorphic hardware. In doing so we address two principle problems in the design of neuromorphic systems: real-time event-based asynchronous communication in multi-chip systems, and the realization in hybrid analog/digital VLSI technology of neural computational principles that we propose underlie plasticity in neural processing of dynamic stimuli. The result is a hardware neural network that learns in real-time and shows preferential responses, after exposure, to stimuli exhibiting particular spectrotemporal patterns. The availability of hardware on which the model can be implemented, makes this a significant step towards the development of adaptive, neurobiologically plausible, spike-based, artificial sensory systems.

  5. ELEC-2005 - Electronics in High Energy Physics: Autumn Term (November-December 2005)

    CERN Multimedia

    Davide Vitè

    2005-01-01

    ELEC-2005 is a new course series on modern electronics, given by CERN physicists and engineers within the framework of the 2005 Technical Training Programme, in an extended format of the ELEC-2002 course series. This new, comprehensive course series is designed for people who are not electronics specialists, for example physicists, engineers and technicians working at or visiting the laboratory, who use or will use electronics in their present or future activities, in particular in the context of the LHC accelerator and experiments. ELEC-2005 is composed of four Terms. The Winter (Introduction to electronics in HEP), Spring (Integrated circuits and VLSI technology for physics), and Summer (System electronics for physics: Issues) Terms already took place. The Autumn Term - Electronics applications in HEP experiments (November-December, 10 lectures) is still open for registration, and has started on November 8th with the following programme: Tuesday 8.11 - Tracking (Geoff Hall). Thursday 10.11 - Calorimetr...

  6. Implementation of neuromorphic systems: from discrete components to analog VLSI chips (testing and communication issues).

    Science.gov (United States)

    Dante, V; Del Giudice, P; Mattia, M

    2001-01-01

    We review a series of implementations of electronic devices aiming at imitating to some extent structure and function of simple neural systems, with particular emphasis on communication issues. We first provide a short overview of general features of such "neuromorphic" devices and the implications of setting up "tests" for them. We then review the developments directly related to our work at the Istituto Superiore di Sanità (ISS): a pilot electronic neural network implementing a simple classifier, autonomously developing internal representations of incoming stimuli; an output network, collecting information from the previous classifier and extracting the relevant part to be forwarded to the observer; an analog, VLSI (very large scale integration) neural chip implementing a recurrent network of spiking neurons and plastic synapses, and the test setup for it; a board designed to interface the standard PCI (peripheral component interconnect) bus of a PC with a special purpose, asynchronous bus for communication among neuromorphic chips; a short and preliminary account of an application-oriented device, taking advantage of the above communication infrastructure.

  7. PERFORMANCE OF LEAKAGE POWER MINIMIZATION TECHNIQUE FOR CMOS VLSI TECHNOLOGY

    Directory of Open Access Journals (Sweden)

    T. Tharaneeswaran

    2012-06-01

    Full Text Available Leakage power of CMOS VLSI Technology is a great concern. To reduce leakage power in CMOS circuits, a Leakage Power Minimiza-tion Technique (LPMT is implemented in this paper. Leakage cur-rents are monitored and compared. The Comparator kicks the charge pump to give body voltage (Vbody. Simulations of these circuits are done using TSMC 0.35µm technology with various operating temper-atures. Current steering Digital-to-Analog Converter (CSDAC is used as test core to validate the idea. The Test core (eg.8-bit CSDAC had power consumption of 347.63 mW. LPMT circuit alone consumes power of 6.3405 mW. This technique results in reduction of leakage power of 8-bit CSDAC by 5.51mW and increases the reliability of test core. Mentor Graphics ELDO and EZ-wave are used for simulations.

  8. Physical Activity Design Guidelines for School Architecture.

    Science.gov (United States)

    Brittin, Jeri; Sorensen, Dina; Trowbridge, Matthew; Lee, Karen K; Breithecker, Dieter; Frerichs, Leah; Huang, Terry

    2015-01-01

    Increasing children's physical activity at school is a national focus in the U.S. to address childhood obesity. While research has demonstrated associations between aspects of school environments and students' physical activity, the literature currently lacks a synthesis of evidence to serve as a practical, spatially-organized resource for school designers and decision-makers, as well as to point to pertinent research opportunities. This paper describes the development of a new practical tool: Physical Activity Design Guidelines for School Architecture. Its aims are to provide architects and designers, as well as school planners, educators, and public health professionals, with strategies for making K-12 school environments conducive to healthy physical activity, and to engage scientists in transdisciplinary perspectives toward improved knowledge of the school environment's impact. We used a qualitative review process to develop evidence-based and theory-driven school design guidelines that promote increased physical activity among students. The design guidelines include specific strategies in 10 school design domains. Implementation of the guidelines is expected to enable students to adopt healthier physical activity behaviors. The tool bridges a translational gap between research and environmental design practice, and may contribute to setting new industry and education standards.

  9. Technical Training: ELEC-2005 - Electronics in High Energy Physics: Summer Term (May 2005)

    CERN Multimedia

    Monique Duval

    2005-01-01

    ELEC-2005 is a new course series on modern electronics, given by CERN physicists and engineers within the framework of the 2005 Technical Training Programme, in an extended format of the successful ELEC-2002 course series. This comprehensive course series is designed for people who are not electronics specialists, for example physicists, engineers and technicians working at or visiting the laboratory, who use or will use electronics in their present or future activities, in particular in the context of the LHC accelerator and experiments. ELEC-2005 is composed of four Terms. The Winter (Introduction to electronics in HEP) and Spring (Integrated circuits and VLSI technology for physics) Terms already took place; the next two Terms will run with the following schedule: Summer Term: System electronics for physics: Issues (May, 7 lectures) - now open for registration Autumn Term: Electronics applications in HEP experiments (November-December, 10 lectures) Lectures within each Term will take place on Tuesday...

  10. ITER physics design guidelines: 1989

    International Nuclear Information System (INIS)

    Uckan, N.A.

    1990-01-01

    The physics basis for ITER has been developed from an assessment of the results of the last twenty-five years of tokamak research and from detailed analysis of important physics issues specifically for the ITER design. This assessment has been carried out with direct participation of members of the experimental teams of each of the major tokamaks in the world fusion program through participation in ITER workshops, contributions to the ITER Physics R and D Program, and by direct contacts between the ITER team and the cognizant experimentalists. Extrapolations to the present data base, where needed, are made in the most cautious way consistent with engineering constraints and performance goals of the ITER. In cases where a working assumptions had to be introduced, which is insufficiently supported by the present data base, is explicitly stated. While a strong emphasis has been placed on the physics credibility of the design, the guidelines also take into account that ITER should be designed to be able to take advantage of potential improvements in tokamak physics that may occur before and during the operation of ITER. (author). 33 refs

  11. Testable physics by design

    International Nuclear Information System (INIS)

    Choi, Chansoo; Han, Min Cheol; Kim, Chan Hyeong; Kim, Sung Hun; Hoff, Gabriela; Pia, Maria Grazia; Saracco, Paolo; Weidenspointner, Georg

    2015-01-01

    The ability to test scientific software needs to be supported by adequate software design. Legacy software systems are often characterized by the difficulty to test parts of the software, mainly due to existing dependencies on other parts. Methods to improve the testability of physics software are discussed, along with open issues specific to physics software for Monte Carlo particle transport. The discussion is supported by examples drawn from the experience with validating Geant4 physics. (paper)

  12. Custom VLSI circuits for high energy physics

    International Nuclear Information System (INIS)

    Parker, S.

    1998-06-01

    This article provides a brief guide to integrated circuits, including their design, fabrication, testing, radiation hardness, and packaging. It was requested by the Panel on Instrumentation, Innovation, and Development of the International Committee for Future Accelerators, as one of a series of articles on instrumentation for future experiments. Their original request emphasized a description of available custom circuits and a set of recommendations for future developments. That has been done, but while traps that stop charge in solid-state devices are well known, those that stop physicists trying to develop the devices are not. Several years spent dodging the former and developing the latter made clear the need for a beginner's guide through the maze, and that is the main purpose of this text

  13. Custom VLSI circuits for high energy physics

    Energy Technology Data Exchange (ETDEWEB)

    Parker, S. [Univ. of Hawaii, Honolulu, HI (United States)

    1998-06-01

    This article provides a brief guide to integrated circuits, including their design, fabrication, testing, radiation hardness, and packaging. It was requested by the Panel on Instrumentation, Innovation, and Development of the International Committee for Future Accelerators, as one of a series of articles on instrumentation for future experiments. Their original request emphasized a description of available custom circuits and a set of recommendations for future developments. That has been done, but while traps that stop charge in solid-state devices are well known, those that stop physicists trying to develop the devices are not. Several years spent dodging the former and developing the latter made clear the need for a beginner`s guide through the maze, and that is the main purpose of this text.

  14. Microfluidic very large-scale integration for biochips: Technology, testing and fault-tolerant design

    DEFF Research Database (Denmark)

    Araci, Ismail Emre; Pop, Paul; Chakrabarty, Krishnendu

    2015-01-01

    of this paper is on continuous-flow biochips, where the basic building block is a microvalve. By combining these microvalves, more complex units such as mixers, switches, multiplexers can be built, hence the name of the technology, “microfluidic Very Large-Scale Integration” (mVLSI). A roadblock......Microfluidic biochips are replacing the conventional biochemical analyzers by integrating all the necessary functions for biochemical analysis using microfluidics. Biochips are used in many application areas, such as, in vitro diagnostics, drug discovery, biotech and ecology. The focus...... presents the state-of-the-art in the mVLSI platforms and emerging research challenges in the area of continuous-flow microfluidics, focusing on testing techniques and fault-tolerant design....

  15. Physical Activity Design Guidelines for School Architecture.

    Directory of Open Access Journals (Sweden)

    Jeri Brittin

    Full Text Available Increasing children's physical activity at school is a national focus in the U.S. to address childhood obesity. While research has demonstrated associations between aspects of school environments and students' physical activity, the literature currently lacks a synthesis of evidence to serve as a practical, spatially-organized resource for school designers and decision-makers, as well as to point to pertinent research opportunities. This paper describes the development of a new practical tool: Physical Activity Design Guidelines for School Architecture. Its aims are to provide architects and designers, as well as school planners, educators, and public health professionals, with strategies for making K-12 school environments conducive to healthy physical activity, and to engage scientists in transdisciplinary perspectives toward improved knowledge of the school environment's impact. We used a qualitative review process to develop evidence-based and theory-driven school design guidelines that promote increased physical activity among students. The design guidelines include specific strategies in 10 school design domains. Implementation of the guidelines is expected to enable students to adopt healthier physical activity behaviors. The tool bridges a translational gap between research and environmental design practice, and may contribute to setting new industry and education standards.

  16. FILTRES: a 128 channels VLSI mixed front-end readout electronic development for microstrip detectors

    International Nuclear Information System (INIS)

    Anstotz, F.; Hu, Y.; Michel, J.; Sohler, J.L.; Lachartre, D.

    1998-01-01

    We present a VLSI digital-analog readout electronic chain for silicon microstrip detectors. The characteristics of this circuit have been optimized for the high resolution tracker of the CERN CMS experiment. This chip consists of 128 channels at 50 μm pitch. Each channel is composed by a charge amplifier, a CR-RC shaper, an analog memory, an analog processor, an output FIFO read out serially by a multiplexer. This chip has been processed in the radiation hard technology DMILL. This paper describes the architecture of the circuit and presents test results of the 128 channel full chain chip. (orig.)

  17. Transformational VLSI Design

    DEFF Research Database (Denmark)

    Rasmussen, Ole Steen

    constructed. It contains a semantical embedding of Ruby in Zermelo-Fraenkel set theory (ZF) implemented in the Isabelle theorem prover. A small subset of Ruby, called Pure Ruby, is embedded as a conservative extension of ZF and characterised by an inductive definition. Many useful structures used...

  18. Physics of short-wavelength-laser design

    Energy Technology Data Exchange (ETDEWEB)

    Hagelstein, P.L.

    1981-01-01

    The physics and design of vuv and soft x-ray lasers pumped by ICF class high intensity infrared laser drivers are described (for example, the SHIVA laser facility at LLNL). Laser design and physics issues are discussed in the case of a photoionization pumping scheme involving Ne II and line pumping schemes involving H-like and He-like neon.

  19. A Sequential Circuit-Based IP Watermarking Algorithm for Multiple Scan Chains in Design-for-Test

    Directory of Open Access Journals (Sweden)

    C. Wu

    2011-06-01

    Full Text Available In Very Large Scale Integrated Circuits (VLSI design, the existing Design-for-Test(DFT based watermarking techniques usually insert watermark through reordering scan cells, which causes large resource overhead, low security and coverage rate of watermark detection. A novel scheme was proposed to watermark multiple scan chains in DFT for solving the problems. The proposed scheme adopts DFT scan test model of VLSI design, and uses a Linear Feedback Shift Register (LFSR for pseudo random test vector generation. All of the test vectors are shifted in scan input for the construction of multiple scan chains with minimum correlation. Specific registers in multiple scan chains will be changed by the watermark circuit for watermarking the design. The watermark can be effectively detected without interference with normal function of the circuit, even after the chip is packaged. The experimental results on several ISCAS benchmarks show that the proposed scheme has lower resource overhead, probability of coincidence and higher coverage rate of watermark detection by comparing with the existing methods.

  20. Pre-Service Physics Teachers' Views on Designing and Developing Physics Digital Stories

    Science.gov (United States)

    Kocakaya, Serhat; Kotluk, Nihat; Karakoyun, Ferit

    2016-01-01

    The aim of this study is to determine the pre-service physics teachers' views on the effect of designing and developing physics digital stories (DST) on improving their 21st century skills. The study is a qualitative research carried out with 13 pre-service physics teachers, who participated in the course of designing and developing DST, during 6…

  1. A novel VLSI processor for high-rate, high resolution spectroscopy

    CERN Document Server

    Pullia, Antonio; Gatti, E; Longoni, A; Buttler, W

    2000-01-01

    A novel time-variant VLSI shaper amplifier, suitable for multi-anode Silicon Drift Detectors or other multi-element solid-state X-ray detection systems, is proposed. The new read-out scheme has been conceived for demanding applications with synchrotron light sources, such as X-ray holography or EXAFS, where both high count-rates and high-energy resolutions are required. The circuit is of the linear time-variant class, accepts randomly distributed events and features: a finite-width (1-10 mu s) quasi-optimal weight function, an ultra-low-level energy discrimination (approx 150 eV), and a full compatibility for monolithic integration in CMOS technology. Its impulse response has a staircase-like shape, but the weight function (which is in general different from the impulse response in time-variant systems) is quasi trapezoidal. The operation principles of the new scheme as well as the first experimental results obtained with a prototype of the circuit are presented and discussed in the work.

  2. Principles of VLSI RTL design a practical guide

    CERN Document Server

    Churiwala, Sanjay; Gianfagna, Mike

    2011-01-01

    This book examines the impact of register transfer level (RTL) design choices that may result in issues of testability, data synchronization across clock domains, synthesizability, power consumption and routability, that appear later in the product lifecycle.

  3. Positron emission tomographic images and expectation maximization: A VLSI architecture for multiple iterations per second

    International Nuclear Information System (INIS)

    Jones, W.F.; Byars, L.G.; Casey, M.E.

    1988-01-01

    A digital electronic architecture for parallel processing of the expectation maximization (EM) algorithm for Positron Emission tomography (PET) image reconstruction is proposed. Rapid (0.2 second) EM iterations on high resolution (256 x 256) images are supported. Arrays of two very large scale integration (VLSI) chips perform forward and back projection calculations. A description of the architecture is given, including data flow and partitioning relevant to EM and parallel processing. EM images shown are produced with software simulating the proposed hardware reconstruction algorithm. Projected cost of the system is estimated to be small in comparison to the cost of current PET scanners

  4. DESIGN OF LOW EPI AND HIGH THROUGHPUT CORDIC CELL TO IMPROVE THE PERFORMANCE OF MOBILE ROBOT

    Directory of Open Access Journals (Sweden)

    P. VELRAJKUMAR

    2014-04-01

    Full Text Available This paper mainly focuses on pass logic based design, which gives an low Energy Per Instruction (EPI and high throughput COrdinate Rotation Digital Computer (CORDIC cell for application of robotic exploration. The basic components of CORDIC cell namely register, multiplexer and proposed adder is designed using pass transistor logic (PTL design. The proposed adder is implemented in bit-parallel iterative CORDIC circuit whereas designed using DSCH2 VLSI CAD tool and their layouts are generated by Microwind 3 VLSI CAD tool. The propagation delay, area and power dissipation are calculated from the simulated results for proposed adder based CORDIC cell. The EPI, throughput and effect of temperature are calculated from generated layout. The output parameter of generated layout is analysed using BSIM4 advanced analyzer. The simulated result of the proposed adder based CORDIC circuit is compared with other adder based CORDIC circuits. From the analysis of these simulated results, it was found that the proposed adder based CORDIC circuit dissipates low power, gives faster response, low EPI and high throughput.

  5. Experiment Design and Analysis Guide - Neutronics & Physics

    Energy Technology Data Exchange (ETDEWEB)

    Misti A Lillo

    2014-06-01

    The purpose of this guide is to provide a consistent, standardized approach to performing neutronics/physics analysis for experiments inserted into the Advanced Test Reactor (ATR). This document provides neutronics/physics analysis guidance to support experiment design and analysis needs for experiments irradiated in the ATR. This guide addresses neutronics/physics analysis in support of experiment design, experiment safety, and experiment program objectives and goals. The intent of this guide is to provide a standardized approach for performing typical neutronics/physics analyses. Deviation from this guide is allowed provided that neutronics/physics analysis details are properly documented in an analysis report.

  6. Designing learning environments to teach interactive Quantum Physics

    NARCIS (Netherlands)

    Gómez Puente, S.M.; Swagten, H.J.M.

    2012-01-01

    This study aims at describing and analysing systematically an interactive learning environment designed to teach Quantum Physics, a second-year physics course. The instructional design of Quantum Physics is a combination of interactive lectures (using audience response systems), tutorials and

  7. Design and Implementation of a New Real-Time Frequency Sensor Used as Hardware Countermeasure

    Directory of Open Access Journals (Sweden)

    Manuel Pedro-Carrasco

    2013-09-01

    Full Text Available A new digital countermeasure against attacks related to the clock frequency is presented. This countermeasure, known as frequency sensor, consists of a local oscillator, a transition detector, a measurement element and an output block. The countermeasure has been designed using a full-custom technique implemented in an Application-Specific Integrated Circuit (ASIC, and the implementation has been verified and characterized with an integrated design using a 0.35 mm standard Complementary Metal Oxide Semiconductor (CMOS technology (Very Large Scale Implementation—VLSI implementation. The proposed solution is configurable in resolution time and allowed range of period, achieving a minimum resolution time of only 1.91 ns and an initialization time of 5.84 ns. The proposed VLSI implementation shows better results than other solutions, such as digital ones based on semi-custom techniques and analog ones based on band pass filters, all design parameters considered. Finally, a counter has been used to verify the good performance of the countermeasure in avoiding the success of an attack.

  8. High speed VLSI neural network for high energy physics

    NARCIS (Netherlands)

    Masa, P.; Masa, P.; Hoen, K.; Hoen, Klaas; Wallinga, Hans

    1994-01-01

    A CMOS neural network IC is discussed which was designed for very high speed applications. The parallel architecture, analog computing and digital weight storage provides unprecedented computing speed combined with ease of use. The circuit classifies up to 70 dimensional vectors within 20

  9. Designing Learning Environments to Teach Interactive Quantum Physics

    Science.gov (United States)

    Puente, Sonia M. Gomez; Swagten, Henk J. M.

    2012-01-01

    This study aims at describing and analysing systematically an interactive learning environment designed to teach Quantum Physics, a second-year physics course. The instructional design of Quantum Physics is a combination of interactive lectures (using audience response systems), tutorials and self-study in unit blocks, carried out with small…

  10. Design and demonstration of a multitechnology FPGA for photonic information processing

    Science.gov (United States)

    Mal, Prosenjit; Hawk, Chris; Toshniwal, Kavita; Beyette, Fred R., Jr.

    2003-11-01

    We present here a novel architecture for a multi-technology field programmabler gate array (MT-FPGA). Implemented with a conventional CMOS VLSI technology the architecture is suitable for prototyping photonic information processing systems. We report here that this new FPGA architecture will enable the design of reconfigurable systems that incorporate technologies outside the traditional electronic domain.

  11. ARCHITECTURAL FORM CREATION IN THE DESIGN STUDIO: PHYSICAL MODELING AS AN EFFECTIVE DESIGN TOOL

    Directory of Open Access Journals (Sweden)

    Wael Abdelhameed

    2011-11-01

    Full Text Available This research paper attempts to shed more light on an area of the design studio, which concerns with the use of physical modeling as a design medium in architectural form creation. An experiment has been carried out during an architectural design studio in order to not only investigate physical modeling as a tool of form creation but also improve visual design thinking that students employ while using this manual tool. To achieve the research objective, a method was proposed and applied to track form creation processes, based upon three types of operation, namely: sketching transformations, divergent physical-modeling transformations, and convergent physical-modeling transformations. The method helps record the innovative transitions of form during conceptual designing in a simple way. Investigating form creation processes and activities associated with visual design thinking enables the research to conclude to general results of the role of physical modeling in the conceptual phase of designing, and to specific results of the methods used in this architectural design studio experiment.

  12. Adaptive WTA with an analog VLSI neuromorphic learning chip.

    Science.gov (United States)

    Häfliger, Philipp

    2007-03-01

    In this paper, we demonstrate how a particular spike-based learning rule (where exact temporal relations between input and output spikes of a spiking model neuron determine the changes of the synaptic weights) can be tuned to express rate-based classical Hebbian learning behavior (where the average input and output spike rates are sufficient to describe the synaptic changes). This shift in behavior is controlled by the input statistic and by a single time constant. The learning rule has been implemented in a neuromorphic very large scale integration (VLSI) chip as part of a neurally inspired spike signal image processing system. The latter is the result of the European Union research project Convolution AER Vision Architecture for Real-Time (CAVIAR). Since it is implemented as a spike-based learning rule (which is most convenient in the overall spike-based system), even if it is tuned to show rate behavior, no explicit long-term average signals are computed on the chip. We show the rule's rate-based Hebbian learning ability in a classification task in both simulation and chip experiment, first with artificial stimuli and then with sensor input from the CAVIAR system.

  13. A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search.

    Science.gov (United States)

    Chang, Yuan-Jyun; Hwang, Wen-Jyi; Chen, Chih-Chang

    2016-12-07

    The goal of this paper is to present a novel VLSI architecture for spike sorting with high classification accuracy, low area costs and low power consumption. A novel feature extraction algorithm with low computational complexities is proposed for the design of the architecture. In the feature extraction algorithm, a spike is separated into two portions based on its peak value. The area of each portion is then used as a feature. The algorithm is simple to implement and less susceptible to noise interference. Based on the algorithm, a novel architecture capable of identifying peak values and computing spike areas concurrently is proposed. To further accelerate the computation, a spike can be divided into a number of segments for the local feature computation. The local features are subsequently merged with the global ones by a simple hardware circuit. The architecture can also be easily operated in conjunction with the circuits for commonly-used spike detection algorithms, such as the Non-linear Energy Operator (NEO). The architecture has been implemented by an Application-Specific Integrated Circuit (ASIC) with 90-nm technology. Comparisons to the existing works show that the proposed architecture is well suited for real-time multi-channel spike detection and feature extraction requiring low hardware area costs, low power consumption and high classification accuracy.

  14. Pre-service Physics Teachers Views on Designing and Developing Physics Digital Stories

    OpenAIRE

    Kocakaya, Serhat; Karakoyun, Ferit; Kotluk, Nihat

    2016-01-01

    The aim of this study is to determine the pre-service physics teachers views on the effect of designing and developing physics digital stories (DST) on improving their 21st centuries skills. The study is a qualitative research carried out with 13 pre-service physics teachers, who participated in the course of designing and developing DST, during 6 weeks, at Yuzuncu Yil University, Turkey, in the spring term of 2013-2014 academic year. Data were collected using semi-structured interview...

  15. ELEC-2002: Electronics in HEP

    CERN Multimedia

    Davide Vitè

    2002-01-01

    ELEC-2002 is a 15-session modern electronic course, given by CERN physicists and engineers, in a new format within the framework of the Technical Training Programme. This course is designed for people who are not electronics specialists, for example physicists, engineers and technicians working at or visiting the laboratory, who use or will use electronics in their present or future activities, in particular in the context of the LHC accelerator and experiments. ELEC-2002 is composed of two terms: sessions take place on Tuesdays and Thursdays from 14h00 to 16h30. Spring term: Integrated circuits and VLSI technology for physics (April 2002) Introduction to VLSI (Paulo Moreira, 9 April) Basic digital design (Paulo Moreira, 11 April) Analogue design technologies (Francis Anghinolfi, 16 April) Radiation effects in electronics devices and circuits (Federico Faccio, 18 April) Digital design: design methodology and tools (Jorgen Christiansen, 23 April) Digital design: production (Jorgen Christiansen, 25 Apr...

  16. Physical Design Factors Contributing to Patient Falls.

    Science.gov (United States)

    Pati, Debajyoti; Valipoor, Shabboo; Cloutier, Aimee; Yang, James; Freier, Patricia; Harvey, Thomas E; Lee, Jaehoon

    2017-02-03

    The aim of this study was to identify physical design elements that contribute to potential falls in patient rooms. An exploratory, physical simulation-based approach was adopted for the study. Twenty-seven subjects, older than 70 years (11 male and 16 female subjects), conducted scripted tasks in a mockup of a patient bathroom and clinician zone. Activities were captured using motion-capture technology and video recording. After biomechanical data processing, video clips associated with potential fall moments were extracted and then examined and coded by a group of registered nurses and health care designers. Exploratory analyses of the coded data were conducted followed by a series of multivariate analyses using regression models. In multivariate models with all personal, environmental, and postural variables, only the postural variables demonstrated statistical significance-turning, grabbing, pushing, and pulling in the bathroom and pushing and pulling in the clinician zone. The physical elements/attributes associated with the offending postures include bathroom configuration, intravenous pole, door, toilet seat height, flush, grab bars, over-bed table, and patient chair. Postural changes, during interactions with the physical environment, constitute the source of most fall events. Physical design must include simultaneous examination of postural changes in day-to-day activities in patient rooms and bathrooms. Among discussed testable recommendations in the article, the followings design strategies should be considered: (a) designing bathrooms to reduce turning as much as possible and (b) designing to avoid motions that involve 2 or more of the offending postures, such as turning and grabbing or grabbing and pulling, and so on.

  17. Hardware/software co-design and optimization for cyberphysical integration in digital microfluidic biochips

    CERN Document Server

    Luo, Yan; Ho, Tsung-Yi

    2015-01-01

    This book describes a comprehensive framework for hardware/software co-design, optimization, and use of robust, low-cost, and cyberphysical digital microfluidic systems. Readers with a background in electronic design automation will find this book to be a valuable reference for leveraging conventional VLSI CAD techniques for emerging technologies, e.g., biochips or bioMEMS. Readers from the circuit/system design community will benefit from methods presented to extend design and testing techniques from microelectronics to mixed-technology microsystems. For readers from the microfluidics domain,

  18. The engineering design of the Tokamak Physics Experiment

    International Nuclear Information System (INIS)

    Schmidt, J.A.

    1994-01-01

    A mission and supporting physics objectives have been developed, which establishes an important role for the Tokamak Physics Experiment (TPX) in developing the physic basis for a future fusion reactor. The design of TPX include advanced physics features, such as shaping and profile control, along with the capability of operating for very long pulses. The development of the superconducting magnets, actively cooled internal hardware, and remote maintenance will be an important technology contribution to future fusion projects, such as ITER. The Conceptual Design and Management Systems for TPX have been developed and reviewed, and the project is beginning Preliminary Design. If adequately funded the construction project should be completed in the year 2000

  19. CAPCAL, 3-D Capacitance Calculator for VLSI Purposes

    International Nuclear Information System (INIS)

    Seidl, Albert; Klose, Helmut; Svoboda, Mildos

    2004-01-01

    1 - Description of program or function: CAPCAL is devoted to the calculation of capacitances of three-dimensional wiring configurations are typically used in VLSI circuits. Due to analogies in the mathematical description also conductance and heat transport problems can be treated by CAPCAL. To handle the problem using CAPCAL same approximations have to be applied to the structure under investigation: - the overall geometry has to be confined to a finite domain by using symmetry-properties of the problem - Non-rectangular structures have to be simplified into an artwork of multiple boxes. 2 - Method of solution: The electrical field is described by the Laplace-equation. The differential equation is discretized by using the finite difference method. NEA-1327/01: The linear equation system is solved by using a combined ADI-multigrid method. NEA-1327/04: The linear equation system is solved by using a conjugate gradient method for CAPCAL V1.3. NEA-1327/05: The linear equation system is solved by using a conjugate gradient method for CAPCAL V1.3. 3 - Restrictions on the complexity of the problem: NEA-1327/01: Certain restrictions of use may arise from the dimensioning of arrays. Field lengths are defined via PARAMETER-statements which can easily by modified. If the geometry of the problem is defined such that Neumann boundaries are dominating the convergence of the iterative equation system solver is affected

  20. A New Physical Protection System Design and Evaluation Process

    Energy Technology Data Exchange (ETDEWEB)

    Lim, Heoksoon; Kim, Myungsu; Bae, Yeongkyoung; Na, Janghwan [KHNP-CRI, Daejeon (Korea, Republic of)

    2014-10-15

    International Atomic Energy Agency(IAEA) had established security-related department and has been strengthening security measures against possible sabotage. IAEA enforces the recommendations for the physical protection of NPPs in the INFCIRC/ 225/Rev.5 to the member states and U.S. NRC also enforces the similar requirements in 10 CFR 73.55. Thus, in order to let Korean NPPs meet the new requirements in INFCIRC/225/Rev.5 or U.S. NRC requirements, Korea nuclear licensee should develop or establish appropriate physical protection system (PPS) design methods for the physical protection of the operating NPPs and new NPPs. KHNP is doing the project of 'Development of APR1400 Physical Protection System Design (2012- 2015, KHNP/KAERI /KEPCO E-C)'. This paper describes overview of a physical protection system (PPS) design and evaluation for an advanced nuclear power plant. It found that a new physical protection system (PPS)design and evaluation. KHNP is doing the project of Physical Protection System design according to U.S. NRC requirements and IAEA requirements in INFCIRC /225 /Rev.5 and will complete by 7.31, 2015 for development of APR1400 Physical Protection System. After completing this project, the results of project are expected to apply new NPPs.

  1. CMOS VLSI Active-Pixel Sensor for Tracking

    Science.gov (United States)

    Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

    2004-01-01

    An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

  2. Physics design requirements for the Tokamak Physics Experiment (TPX)

    International Nuclear Information System (INIS)

    Neilson, G.H.; Goldston, R.J.; Jardin, S.C.; Reiersen, W.T.; Porkolab, M.; Ulrickson, M.

    1993-01-01

    The design of TPX is driven by physics requirements that follow from its mission. The tokamak and heating systems provide the performance and profile controls needed to study advanced steady state tokamak operating modes. The magnetic control systems provide substantial flexibility for the study of regimes with high beta and bootstrap current. The divertor is designed for high steady state power and particle exhaust

  3. Generating Physics Content for the Designers.

    Science.gov (United States)

    Bishop, Mary Jean; Bross, Thomas R.; Nelson, James H.

    2001-01-01

    Each designer contributing to this special issue was asked to prepare an introductory lesson on the physics of motion aimed at eighth to eleventh graders. This article presents a brief description of how a detailed physics content was researched, edited, and refined by subject-matter experts, and then ultimately presented to the instructional…

  4. New trends in reactor physics design methods

    International Nuclear Information System (INIS)

    Jagannathan, V.

    1993-01-01

    Reactor physics design methods are aimed at safe and efficient management of nuclear materials in a reactor core. The design methodologies require a high level of integration of different calculational modules of many a key areas like neutronics, thermal hydraulics, radiation transport etc in order to follow different 3-D phenomena under normal and transient operating conditions. The evolution of computer hardware technology is far more rapid than the software development and has rendered such integration a meaningful and realizable proposition. The aim of this paper is to assess the state of art of the physics design codes used in Indian thermal power reactor applications with respect to meeting the design, operational and safety requirements. (author). 50 refs

  5. Biophysical synaptic dynamics in an analog VLSI network of Hodgkin-Huxley neurons.

    Science.gov (United States)

    Yu, Theodore; Cauwenberghs, Gert

    2009-01-01

    We study synaptic dynamics in a biophysical network of four coupled spiking neurons implemented in an analog VLSI silicon microchip. The four neurons implement a generalized Hodgkin-Huxley model with individually configurable rate-based kinetics of opening and closing of Na+ and K+ ion channels. The twelve synapses implement a rate-based first-order kinetic model of neurotransmitter and receptor dynamics, accounting for NMDA and non-NMDA type chemical synapses. The implemented models on the chip are fully configurable by 384 parameters accounting for conductances, reversal potentials, and pre/post-synaptic voltage-dependence of the channel kinetics. We describe the models and present experimental results from the chip characterizing single neuron dynamics, single synapse dynamics, and multi-neuron network dynamics showing phase-locking behavior as a function of synaptic coupling strength. The 3mm x 3mm microchip consumes 1.29 mW power making it promising for applications including neuromorphic modeling and neural prostheses.

  6. A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search

    Directory of Open Access Journals (Sweden)

    Yuan-Jyun Chang

    2016-12-01

    Full Text Available The goal of this paper is to present a novel VLSI architecture for spike sorting with high classification accuracy, low area costs and low power consumption. A novel feature extraction algorithm with low computational complexities is proposed for the design of the architecture. In the feature extraction algorithm, a spike is separated into two portions based on its peak value. The area of each portion is then used as a feature. The algorithm is simple to implement and less susceptible to noise interference. Based on the algorithm, a novel architecture capable of identifying peak values and computing spike areas concurrently is proposed. To further accelerate the computation, a spike can be divided into a number of segments for the local feature computation. The local features are subsequently merged with the global ones by a simple hardware circuit. The architecture can also be easily operated in conjunction with the circuits for commonly-used spike detection algorithms, such as the Non-linear Energy Operator (NEO. The architecture has been implemented by an Application-Specific Integrated Circuit (ASIC with 90-nm technology. Comparisons to the existing works show that the proposed architecture is well suited for real-time multi-channel spike detection and feature extraction requiring low hardware area costs, low power consumption and high classification accuracy.

  7. Guided exploration of physically valid shapes for furniture design

    KAUST Repository

    Umetani, Nobuyuki

    2012-07-01

    Geometric modeling and the physical validity of shapes are traditionally considered independently. This makes creating aesthetically pleasing yet physically valid models challenging. We propose an interactive design framework for efficient and intuitive exploration of geometrically and physically valid shapes. During any geometric editing operation, the proposed system continuously visualizes the valid range of the parameter being edited. When one or more constraints are violated after an operation, the system generates multiple suggestions involving both discrete and continuous changes to restore validity. Each suggestion also comes with an editing mode that simultaneously adjusts multiple parameters in a coordinated way to maintain validity. Thus, while the user focuses on the aesthetic aspects of the design, our computational design framework helps to achieve physical realizability by providing active guidance to the user. We demonstrate our framework on plankbased furniture design with nail-joint and frictional constraints. We use our system to design a range of examples, conduct a user study, and also fabricate a physical prototype to test the validity and usefulness of the system. © 2012 ACM 0730-0301/2012/08- ART86.

  8. An Analogue VLSI Implementation of the Meddis Inner Hair Cell Model

    Science.gov (United States)

    McEwan, Alistair; van Schaik, André

    2003-12-01

    The Meddis inner hair cell model is a widely accepted, but computationally intensive computer model of mammalian inner hair cell function. We have produced an analogue VLSI implementation of this model that operates in real time in the current domain by using translinear and log-domain circuits. The circuit has been fabricated on a chip and tested against the Meddis model for (a) rate level functions for onset and steady-state response, (b) recovery after masking, (c) additivity, (d) two-component adaptation, (e) phase locking, (f) recovery of spontaneous activity, and (g) computational efficiency. The advantage of this circuit, over other electronic inner hair cell models, is its nearly exact implementation of the Meddis model which can be tuned to behave similarly to the biological inner hair cell. This has important implications on our ability to simulate the auditory system in real time. Furthermore, the technique of mapping a mathematical model of first-order differential equations to a circuit of log-domain filters allows us to implement real-time neuromorphic signal processors for a host of models using the same approach.

  9. Biophysical Neural Spiking, Bursting, and Excitability Dynamics in Reconfigurable Analog VLSI.

    Science.gov (United States)

    Yu, T; Sejnowski, T J; Cauwenberghs, G

    2011-10-01

    We study a range of neural dynamics under variations in biophysical parameters underlying extended Morris-Lecar and Hodgkin-Huxley models in three gating variables. The extended models are implemented in NeuroDyn, a four neuron, twelve synapse continuous-time analog VLSI programmable neural emulation platform with generalized channel kinetics and biophysical membrane dynamics. The dynamics exhibit a wide range of time scales extending beyond 100 ms neglected in typical silicon models of tonic spiking neurons. Circuit simulations and measurements show transition from tonic spiking to tonic bursting dynamics through variation of a single conductance parameter governing calcium recovery. We similarly demonstrate transition from graded to all-or-none neural excitability in the onset of spiking dynamics through the variation of channel kinetic parameters governing the speed of potassium activation. Other combinations of variations in conductance and channel kinetic parameters give rise to phasic spiking and spike frequency adaptation dynamics. The NeuroDyn chip consumes 1.29 mW and occupies 3 mm × 3 mm in 0.5 μm CMOS, supporting emerging developments in neuromorphic silicon-neuron interfaces.

  10. A neuromorphic VLSI device for implementing 2-D selective attention systems.

    Science.gov (United States)

    Indiveri, G

    2001-01-01

    Selective attention is a mechanism used to sequentially select and process salient subregions of the input space, while suppressing inputs arriving from nonsalient regions. By processing small amounts of sensory information in a serial fashion, rather than attempting to process all the sensory data in parallel, this mechanism overcomes the problem of flooding limited processing capacity systems with sensory inputs. It is found in many biological systems and can be a useful engineering tool for developing artificial systems that need to process in real-time sensory data. In this paper we present a neuromorphic hardware model of a selective attention mechanism implemented on a very large scale integration (VLSI) chip, using analog circuits. The chip makes use of a spike-based representation for receiving input signals, transmitting output signals and for shifting the selection of the attended input stimulus over time. It can be interfaced to neuromorphic sensors and actuators, for implementing multichip selective attention systems. We describe the characteristics of the circuits used in the architecture and present experimental data measured from the system.

  11. Design Steps for Physic STEM Education Learning in Secondary School

    Science.gov (United States)

    Teevasuthonsakul, C.; Yuvanatheeme, V.; Sriput, V.; Suwandecha, S.

    2017-09-01

    This study aimed to develop the process of STEM Education activity design used in Physics subjects in the Thai secondary schools. The researchers have conducted the study by reviewing the literature and related works, interviewing Physics experts, designing and revising the process accordingly, and experimenting the designed process in actual classrooms. This brought about the five-step process of STEM Education activity design which Physics teachers applied to their actual teaching context. The results from the after-class evaluation revealed that the students’ satisfaction level toward Physics subject and critical thinking skill was found higher statistically significant at p technology, and engineering design process as the foundation when creating case study of problems and solutions.

  12. State-of-the-art assessment of testing and testability of custom LSI/VLSI circuits. Volume 8: Fault simulation

    Science.gov (United States)

    Breuer, M. A.; Carlan, A. J.

    1982-10-01

    Fault simulation is widely used by industry in such applications as scoring the fault coverage of test sequences and construction of fault dictionaries. For use in testing VLSI circuits a simulator is evaluated by its accuracy, i.e., modelling capability. To be accurate simulators must employ multi-valued logic in order to represent unknown signal values, impedance, signal transitions, etc., circuit delays such as transport rise/fall, inertial, and the fault modes it is capable of handling. Of the three basic fault simulators now in use (parallel, deductive and concurrent) concurrent fault simulation appears most promising.

  13. The physics design of EBR-II

    International Nuclear Information System (INIS)

    Loewenstein, W.B.

    1962-01-01

    The physics design oi EBR-II. Calculations of the static, dynamic and long-term reactivity behaviour of EBR-II are reported together with results and analysis of EBR-II dry critical and ZPR-III mock-up experiments. Particular emphasis is given to reactor-physics design problems which arise after the conceptual design is established and before the reactor is built or placed into operation. Reactor-safety analyses and hazards-evaluation considerations are described with their influence on the reactor design. The manner of utilizing the EBR-II mock-up on ZPR-III data and the EBR-II dry critical data is described. These experiments, their analysis and theoretical predictions are the basis for predetermining the physics behaviour of the reactor system. The limitations inherent in applying the experimental data to the performance of the power-reactor system are explored in some detail. This includes the specification of reactor core size and/or fuel-alloy enrichment, provisions for adequate operating and shut-down reactivity, determination of operative temperature and power coefficients of reactivity, and details of power- and flux-distribution as a function of position within the reactor structure. The overall problem of transferring information from simple idealized analytical or experimental geometry to actual hexagonal reactor geometry is described. Nuclear performance, including breeding, of the actual reactor system is compared with that of the idealized conceptual system. The long-term reactivity and power behaviour of the reactor blanket is described within the framework of the proposed cycling of the fuel and blanket alloy. Safety considerations, including normal and abnormal rates of reactivity-insertion, the implication of postulated reactivity effects based on the physical behaviour of the fuel alloy and reactor structure as well as extrapolation of TREAT experiments to the EBR-II system are analysed. The EBR-II core melt-down problem is reviewed. (author

  14. Low-Power Differential SRAM design for SOC Based on the 25-um Technology

    Science.gov (United States)

    Godugunuri, Sivaprasad; Dara, Naveen; Sambasiva Nayak, R.; Nayeemuddin, Md; Singh, Yadu, Dr.; Veda, R. N. S. Sunil

    2017-08-01

    In recent, the SOC styles area unit the vast complicated styles in VLSI these SOC styles having important low-power operations problems, to comprehend this we tend to enforced low-power SRAM. However these SRAM Architectures critically affects the entire power of SOC and competitive space. To beat the higher than disadvantages, during this paper, a low-power differential SRAM design is planned. The differential SRAM design stores multiple bits within the same cell, operates at minimum in operation low-tension and space per bit. The differential SRAM design designed supported the 25-um technology using Tanner-EDA Tool.

  15. The effects of advanced digital signal processing concepts on VLSIC/VHSIC design

    Science.gov (United States)

    Jankowski, C.

    Implementations of sophisticated mathematical techniques in advanced digital signal processors can significantly improve performance. Future VLSI and VHSI circuit designs must include the practical realization of these algorithms. A structured design approach is described and illustrated with examples from a RNS FIR filter processor development project. The CAE hardware and software required to support tasks of this complexity are also discussed. An EWS is recommended for controlling essential functions such as logic optimization, simulation and verification. The total IC design system is illustrated with the implementation of a new high performance algorithm for computing complex magnitude.

  16. DESIGN AND IMPLEMENTATION OF A VHDL PROCESSOR FOR DCT BASED IMAGE COMPRESSION

    Directory of Open Access Journals (Sweden)

    Md. Shabiul Islam

    2017-11-01

    Full Text Available This paper describes the design and implementation of a VHDL processor meant for performing 2D-Discrete Cosine Transform (DCT to use in image compression applications. The design flow starts from the system specification to implementation on silicon and the entire process is carried out using an advanced workstation based design environment for digital signal processing. The software allows the bit-true analysis to ensure that the designed VLSI processor satisfies the required specifications. The bit-true analysis is performed on all levels of abstraction (behavior, VHDL etc.. The motivation behind the work is smaller size chip area, faster processing, reducing the cost of the chip

  17. An Analogue VLSI Implementation of the Meddis Inner Hair Cell Model

    Directory of Open Access Journals (Sweden)

    Alistair McEwan

    2003-06-01

    Full Text Available The Meddis inner hair cell model is a widely accepted, but computationally intensive computer model of mammalian inner hair cell function. We have produced an analogue VLSI implementation of this model that operates in real time in the current domain by using translinear and log-domain circuits. The circuit has been fabricated on a chip and tested against the Meddis model for (a rate level functions for onset and steady-state response, (b recovery after masking, (c additivity, (d two-component adaptation, (e phase locking, (f recovery of spontaneous activity, and (g computational efficiency. The advantage of this circuit, over other electronic inner hair cell models, is its nearly exact implementation of the Meddis model which can be tuned to behave similarly to the biological inner hair cell. This has important implications on our ability to simulate the auditory system in real time. Furthermore, the technique of mapping a mathematical model of first-order differential equations to a circuit of log-domain filters allows us to implement real-time neuromorphic signal processors for a host of models using the same approach.

  18. 10 K gate I(2)L and 1 K component analog compatible bipolar VLSI technology - HIT-2

    Science.gov (United States)

    Washio, K.; Watanabe, T.; Okabe, T.; Horie, N.

    1985-02-01

    An advanced analog/digital bipolar VLSI technology that combines on the same chip 2-ns 10 K I(2)L gates with 1 K analog devices is proposed. The new technology, called high-density integration technology-2, is based on a new structure concept that consists of three major techniques: shallow grooved-isolation, I(2)L active layer etching, and I(2)L current gain increase. I(2)L circuits with 80-MHz maximum toggle frequency have developed compatibly with n-p-n transistors having a BV(CE0) of more than 10 V and an f(T) of 5 GHz, and lateral p-n-p transistors having an f(T) of 150 MHz.

  19. Photonic Design: From Fundamental Solar Cell Physics to Computational Inverse Design

    Science.gov (United States)

    Miller, Owen Dennis

    Photonic innovation is becoming ever more important in the modern world. Optical systems are dominating shorter and shorter communications distances, LED's are rapidly emerging for a variety of applications, and solar cells show potential to be a mainstream technology in the energy space. The need for novel, energy-efficient photonic and optoelectronic devices will only increase. This work unites fundamental physics and a novel computational inverse design approach towards such innovation. The first half of the dissertation is devoted to the physics of high-efficiency solar cells. As solar cells approach fundamental efficiency limits, their internal physics transforms. Photonic considerations, instead of electronic ones, are the key to reaching the highest voltages and efficiencies. Proper photon management led to Alta Device's recent dramatic increase of the solar cell efficiency record to 28.3%. Moreover, approaching the Shockley-Queisser limit for any solar cell technology will require light extraction to become a part of all future designs. The second half of the dissertation introduces inverse design as a new computational paradigm in photonics. An assortment of techniques (FDTD, FEM, etc.) have enabled quick and accurate simulation of the "forward problem" of finding fields for a given geometry. However, scientists and engineers are typically more interested in the inverse problem: for a desired functionality, what geometry is needed? Answering this question breaks from the emphasis on the forward problem and forges a new path in computational photonics. The framework of shape calculus enables one to quickly find superior, non-intuitive designs. Novel designs for optical cloaking and sub-wavelength solar cell applications are presented.

  20. Designing for social interaction through physical play

    NARCIS (Netherlands)

    Bekker, M.M.; Sturm, J.A.; Barakova, E.I.; Sturm, J.A.; Bekker, M.M.

    2008-01-01

    Nine very interesting position papers were submitted to our workshop on Design for Social Interactioll and Physical Play. The papers, present.ed in these proceedings, cover design concepts for very diverse user groups and eontexts of use. Creating novel concepts is often done using theories about

  1. Physical protection system design and evaluation

    International Nuclear Information System (INIS)

    Williams, J.D.

    1997-11-01

    The design of an effective physical protection system (PPS) includes the determination of the PPS objectives, the initial design of a PPS, the evaluation of the design, and probably, the redesign or refinement of the system. To develop the objectives, the designer must begin by gathering information about facility operation and conditions, such as a comprehensive description of the facility, operating conditions, and the physical protection requirements. The designer then needs to define the threat. This involves considering factors about potential adversaries: class of adversary, adversary's capabilities, and range of adversary's tactics. Next, the designer should identify targets. Determination of whether or not the materials being protected are attractive targets is based mainly on the ease or difficulty of acquisition and desirability of the material. The designer now knows the objectives of the PPS, that is, ''what to protect against whom.'' The next step is to design the system by determining how best to combine such elements as fences, vaults, sensors and assessment devices, entry control devices, communication devices, procedures, and protective force personnel to meet the objectives of the system. Once a PPS is designed, it must be analyzed and evaluated to ensure it meets the PPS objectives. Evaluation must allow for features working together to ensure protection rather than regarding each feature separately. Due to the complexity of the protection systems, an evaluation usually requires modeling techniques. If any vulnerabilities are found, the initial system must be redesigned to correct the vulnerabilities and a reevaluation conducted. After the system is installed, the threat and system parameters may change with time. If they do, the analysis must be performed periodically to ensure the system objectives are still being met

  2. Designing learning environments to teach interactive Quantum Physics

    Science.gov (United States)

    Gómez Puente, Sonia M.; Swagten, Henk J. M.

    2012-10-01

    This study aims at describing and analysing systematically an interactive learning environment designed to teach Quantum Physics, a second-year physics course. The instructional design of Quantum Physics is a combination of interactive lectures (using audience response systems), tutorials and self-study in unit blocks, carried out with small groups. Individual formative feedback was introduced as a rapid assessment tool to provide an overview on progress and identify gaps by means of questioning students at three levels: conceptual; prior knowledge; homework exercises. The setup of Quantum Physics has been developed as a result of several loops of adjustments and improvements from a traditional-like type of teaching to an interactive classroom. Results of this particular instructional arrangement indicate significant gains in students' achievements in comparison with the traditional structure of this course, after recent optimisation steps such as the implementation of an individual feedback system.

  3. Security Implications of Physical Design Attributes in the Emergency Department.

    Science.gov (United States)

    Pati, Debajyoti; Pati, Sipra; Harvey, Thomas E

    2016-07-01

    Security, a subset of safety, is equally important in the efficient delivery of patient care. The emergency department (ED) is susceptible to violence creating concerns for the safety and security of patients, staff, and visitors and for the safe and efficient delivery of care. Although there is an implicit and growing recognition of the role of the physical environment, interventions typically have been at the microlevel. The objective of this study was to identify physical design attributes that potentially influence safety and efficiency of ED operations. An exploratory, qualitative research design was adopted to examine the efficiency and safety correlates of ED physical design attributes. The study comprised a multimeasure approach involving multidisciplinary gaming, semistructured interviews, and touring interviews of frontline staff in four EDs at three hospital systems across three states. Five macro physical design attributes (issues that need to be addressed at the design stage and expensive to rectify once built) emerged from the data as factors substantially associated with security issues. They are design issues pertaining to (a) the entry zone, (b) traffic management, (c) patient room clustering, (d) centralization versus decentralization, and (e) provisions for special populations. Data from this study suggest that ED security concerns are generally associated with three sources: (a) gang-related violence, (b) dissatisfied patients, and (c) behavioral health patients. Study data show that physical design has an important role in addressing the above-mentioned concerns. Implications for ED design are outlined in the article. © The Author(s) 2016.

  4. Design and evaluation of physical protection systems of nuclear facilities

    Energy Technology Data Exchange (ETDEWEB)

    An, Jin Soo; Lee, Hyun Chul; Hwang, In Koo; Kwack, Eun Ho; Choi, Yung Myung

    2001-06-01

    Nuclear material and safety equipment of nuclear facilities are required to be protected against any kind of theft or sabotage. Physical protection is one of the measures to prevent such illegally potential threats for public security. It should cover all the cases of use, storage, and transportation of nuclear material. A physical protection system of a facility consists of exterior intrusion sensors, interior intrusion sensors, an alarm assessment and communication system, entry control systems, access delay equipment, etc. The design of an effective physical protection system requires a comprehensive approach in which the designers define the objective of the system, establish an initial design, and evaluate the proposed design. The evaluation results are used to determine whether or not the initial design should be modified and improved. Some modelling techniques are commonly used to analyse and evaluate the performance of a physical protection system. Korea Atomic Energy Research Institute(KAERI) has developed a prototype of software as a part of a full computer model for effectiveness evaluation for physical protection systems. The input data elements for the prototype, contain the type of adversary, tactics, protection equipment, and the attributes of each protection component. This report contains the functional and structural requirements defined in the development of the evaluation computer model.

  5. An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm

    Directory of Open Access Journals (Sweden)

    Ying-Lun Chen

    2015-08-01

    Full Text Available A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO, and the feature extraction is carried out by the generalized Hebbian algorithm (GHA. To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and feature extraction operations. Each channel has dedicated buffers for storing the detected spikes and the principal components of that channel. The proposed circuit also contains a clock gating system supplying the clock to only the buffers of channels currently using the computation core to further reduce the power consumption. The architecture has been implemented by an application-specific integrated circuit (ASIC with 90-nm technology. Comparisons to the existing works show that the proposed architecture has lower power consumption and hardware area costs for real-time multi-channel spike detection and feature extraction.

  6. An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm.

    Science.gov (United States)

    Chen, Ying-Lun; Hwang, Wen-Jyi; Ke, Chi-En

    2015-08-13

    A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO), and the feature extraction is carried out by the generalized Hebbian algorithm (GHA). To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and feature extraction operations. Each channel has dedicated buffers for storing the detected spikes and the principal components of that channel. The proposed circuit also contains a clock gating system supplying the clock to only the buffers of channels currently using the computation core to further reduce the power consumption. The architecture has been implemented by an application-specific integrated circuit (ASIC) with 90-nm technology. Comparisons to the existing works show that the proposed architecture has lower power consumption and hardware area costs for real-time multi-channel spike detection and feature extraction.

  7. An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm

    Science.gov (United States)

    Chen, Ying-Lun; Hwang, Wen-Jyi; Ke, Chi-En

    2015-01-01

    A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO), and the feature extraction is carried out by the generalized Hebbian algorithm (GHA). To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and feature extraction operations. Each channel has dedicated buffers for storing the detected spikes and the principal components of that channel. The proposed circuit also contains a clock gating system supplying the clock to only the buffers of channels currently using the computation core to further reduce the power consumption. The architecture has been implemented by an application-specific integrated circuit (ASIC) with 90-nm technology. Comparisons to the existing works show that the proposed architecture has lower power consumption and hardware area costs for real-time multi-channel spike detection and feature extraction. PMID:26287193

  8. Guided exploration of physically valid shapes for furniture design

    KAUST Repository

    Umetani, Nobuyuki; Igarashi, Takeo; Mitra, Niloy J.

    2012-01-01

    Geometric modeling and the physical validity of shapes are traditionally considered independently. This makes creating aesthetically pleasing yet physically valid models challenging. We propose an interactive design framework for efficient

  9. Design, Characterization and Test of the Associative Memory Chip AM06 for the Fast TracKer System

    CERN Document Server

    Liberali, Valentino; The ATLAS collaboration

    2016-01-01

    We present the performance of the new Associative Memory (AM) chip, designed and manufactured in 65 nm CMOS technology. The AM06 is the 6th version of a highly parallel ASIC processor for pattern recognition in high energy physics experiments. The AM06 is based on the XORAM cell architecture, which has been specifically designed to reduce power consumption and control complexity. The AM06 is a large chip, which contains memory banks that store all data of interest. The basic unit is a word of 18 bit. A group of 8 words (each of them related to a detector layer) is called a “pattern”. Each AM06 chip stores 2^17 patterns. The AM06 integrates serializer and deserializer IP blocks (working up to 2.4 GHz), to avoid routing congestion at the board level. AM06 is a complex VLSI chip, designed combining full-custom memory arrays, standard logic cells and IP blocks. It occupies a silicon area of 168 mm^2 and it contains about 421 millions transistors. The AM06 chip is able to perform a synchronous bitwise comparis...

  10. Teaching for physical literacy: Implications to instructional design and PETE

    Directory of Open Access Journals (Sweden)

    Stephen Silverman

    2015-06-01

    Full Text Available Physical education teachers play an important role in helping students' development of the motor skills needed to be physically literate individuals. Research suggests that teacher made instructional design decisions can lead to enhanced motor skill learning. After presenting a model of evidence-based research this paper presents information that will help teachers plan and execute lessons designed to improve students' motor skills. Variables that impact motor skill learning in physical education including time, type of practice, content, presentation and organizational strategies, and student skill level are presented and discussed. A brief section on student attitudes, their relation to motor skill learning and to physical literacy is included. Motor skills are needed for physically literate people to enjoy lifelong physical activity. Physical education teachers and the decisions they make contribute to students' learning and whether the goal of physical literacy is met.

  11. Review Committee report on the conceptual design of the Tokamak Physics Experiment

    International Nuclear Information System (INIS)

    1993-04-01

    This report discusses the following topics on the conceptual design of the Tokamak Physics Experiment: Role and mission of TPX; overview of design; physics design assessment; engineering design assessment; evaluation of cost, schedule, and management plans; and, environment safety and health

  12. Prototype architecture for a VLSI level zero processing system. [Space Station Freedom

    Science.gov (United States)

    Shi, Jianfei; Grebowsky, Gerald J.; Horner, Ward P.; Chesney, James R.

    1989-01-01

    The prototype architecture and implementation of a high-speed level zero processing (LZP) system are discussed. Due to the new processing algorithm and VLSI technology, the prototype LZP system features compact size, low cost, high processing throughput, and easy maintainability and increased reliability. Though extensive control functions have been done by hardware, the programmability of processing tasks makes it possible to adapt the system to different data formats and processing requirements. It is noted that the LZP system can handle up to 8 virtual channels and 24 sources with combined data volume of 15 Gbytes per orbit. For greater demands, multiple LZP systems can be configured in parallel, each called a processing channel and assigned a subset of virtual channels. The telemetry data stream will be steered into different processing channels in accordance with their virtual channel IDs. This super system can cope with a virtually unlimited number of virtual channels and sources. In the near future, it is expected that new disk farms with data rate exceeding 150 Mbps will be available from commercial vendors due to the advance in disk drive technology.

  13. ASIC design used in high energy physics experiments

    International Nuclear Information System (INIS)

    Zhang Hongyu; Lin Tao; Wu Ling; Zhao jingwei; Gu Shudi

    1997-01-01

    The author introduces an ASIC (Application Specific Integrated Circuit) design environment based on PC. Some design tools used in such environment are also introduced. A kind of ASIC chip used in high energy physics experiment, weighting mean timer, is being developed now

  14. Learning physics: A comparative analysis between instructional design methods

    Science.gov (United States)

    Mathew, Easow

    The purpose of this research was to determine if there were differences in academic performance between students who participated in traditional versus collaborative problem-based learning (PBL) instructional design approaches to physics curricula. This study utilized a quantitative quasi-experimental design methodology to determine the significance of differences in pre- and posttest introductory physics exam performance between students who participated in traditional (i.e., control group) versus collaborative problem solving (PBL) instructional design (i.e., experimental group) approaches to physics curricula over a college semester in 2008. There were 42 student participants (N = 42) enrolled in an introductory physics course at the research site in the Spring 2008 semester who agreed to participate in this study after reading and signing informed consent documents. A total of 22 participants were assigned to the experimental group (n = 22) who participated in a PBL based teaching methodology along with traditional lecture methods. The other 20 students were assigned to the control group (n = 20) who participated in the traditional lecture teaching methodology. Both the courses were taught by experienced professors who have qualifications at the doctoral level. The results indicated statistically significant differences (p traditional (i.e., lower physics posttest scores and lower differences between pre- and posttest scores) versus collaborative (i.e., higher physics posttest scores, and higher differences between pre- and posttest scores) instructional design approaches to physics curricula. Despite some slight differences in control group and experimental group demographic characteristics (gender, ethnicity, and age) there were statistically significant (p = .04) differences between female average academic improvement which was much higher than male average academic improvement (˜63%) in the control group which may indicate that traditional teaching methods

  15. Top Five Physical Design Factors Contributing to Fall Initiation.

    Science.gov (United States)

    Pati, Debajyoti; Lee, Jaehoon; Mihandoust, Sahar; Kazem-Zadeh, Mahshad; Oh, Youngha

    2018-01-01

    To develop a prioritized list of physical design questions/interventions to reduce patient falls by conducting expanded analysis (Phase II) of data generated from a completed study phase. Patient falls continue to be a critical concern for healthcare providers, patients, and families. While substantial literature exist on intrinsic factors, scientific evidence on the role of the physical environment is scarce. Expanded analysis of data from 180 videos of trials conducted in a physical mock-up of a medical-surgical inpatient room in a previously completed study phase. The odds of subject's exhibited postures (predictors) on fall initiation (outcome) were examined in a series of generalized linear mixed effects models. Physical design elements and attributes associated with postures exhibiting statistical significance were examined. Turning, pulling, pushing, and bending forward exhibited the highest odds of contributing to fall initiation in the bathroom. Grabbing, pushing, and sitting exhibited the highest odds of contributing to fall initiation around the patient bed. Physical design elements/attributes associated with the above postures are the (1) bathroom door; (2) bathroom spatial configuration-relative locations of door, toilet bowl, and the sink; (3) door, toilet, and sink hardware; (4) space availability/tightness inside the clinician zone; and (5) spatial configuration around patient bed-relative locations of bed, patient chair, and overbed table, in relation to bathroom door, and resulting obstructions originating from the configuration. Patient falls during unassisted ambulation may be reduced through appropriate examination of these five physical elements/attributes.

  16. Tokamak Physics Experiment (TPX) design

    International Nuclear Information System (INIS)

    Schmidt, J.A.

    1995-01-01

    TPX is a national project involving a large number of US fusion laboratories, universities, and industries. The element of the TPX requirements that is a primary driver for the hardware design is the fact that TPX tokamak hardware is being designed to accommodate steady state operation if the external systems are upgraded from the 1,000 second initial operation. TPX not only incorporates new physics, but also pioneers new technologies to be used in ITER and other future reactors. TPX will be the first tokamak with fully superconducting magnetic field coils using advanced conductors, will have internal nuclear shielding, will use robotics for machine maintenance, and will remove the continuous, concentrated heat flow from the plasma with new dispersal techniques and with special materials that are actively cooled. The Conceptual Design for TPX was completed during Fiscal Year 1993. The Preliminary Design formally began at the beginning of Fiscal Year 1994. Industrial contracts have been awarded for the design, with options for fabrication, of the primary tokamak hardware. A large fraction of the design and R and D effort during FY94 was focused on the tokamak and in turn on the tokamak magnets. The reason for this emphasis is because the magnets require a large design and R and D effort, and are critical to the project schedule. The magnet development is focused on conductor development, quench protection, and manufacturing R and D. The Preliminary Design Review for the Magnets is planned for fall, 1995

  17. Model, analysis, and evaluation of the effects of analog VLSI arithmetic on linear subspace-based image recognition.

    Science.gov (United States)

    Carvajal, Gonzalo; Figueroa, Miguel

    2014-07-01

    Typical image recognition systems operate in two stages: feature extraction to reduce the dimensionality of the input space, and classification based on the extracted features. Analog Very Large Scale Integration (VLSI) is an attractive technology to achieve compact and low-power implementations of these computationally intensive tasks for portable embedded devices. However, device mismatch limits the resolution of the circuits fabricated with this technology. Traditional layout techniques to reduce the mismatch aim to increase the resolution at the transistor level, without considering the intended application. Relating mismatch parameters to specific effects in the application level would allow designers to apply focalized mismatch compensation techniques according to predefined performance/cost tradeoffs. This paper models, analyzes, and evaluates the effects of mismatched analog arithmetic in both feature extraction and classification circuits. For the feature extraction, we propose analog adaptive linear combiners with on-chip learning for both Least Mean Square (LMS) and Generalized Hebbian Algorithm (GHA). Using mathematical abstractions of analog circuits, we identify mismatch parameters that are naturally compensated during the learning process, and propose cost-effective guidelines to reduce the effect of the rest. For the classification, we derive analog models for the circuits necessary to implement Nearest Neighbor (NN) approach and Radial Basis Function (RBF) networks, and use them to emulate analog classifiers with standard databases of face and hand-writing digits. Formal analysis and experiments show how we can exploit adaptive structures and properties of the input space to compensate the effects of device mismatch at the application level, thus reducing the design overhead of traditional layout techniques. Results are also directly extensible to multiple application domains using linear subspace methods. Copyright © 2014 Elsevier Ltd. All rights

  18. Rethinking Physics for Biologists: A design-based research approach

    Science.gov (United States)

    Sawtelle, Vashti

    2015-03-01

    Biology majors at the University of Maryland are required to take courses in biology, chemistry, and physics - but they often see these courses as disconnected. Over the past three years the NEXUS/Physics course has been working to develop an interdisciplinary learning environment that bridges the disciplinary domains of biology and physics. Across the three years we have gone from teaching in a small class with one instructor to teaching in a large lecture hall with multiple instructors. We have used a design-based research approach to support critical reflection of the course at multiple-time scales. In this presentation I will detail our process of collecting systematic data, listening to and valuing students' reasoning, and bridging diverse perspectives led. I will demonstrate how this process led to improved curricular design, refined assessment objectives, and new design heuristics. This work is supported by NSF-TUES DUE 11-22818, the HHMI NEXUS grant, and a NSF Graduate Research Fellowship (DGE 0750616).

  19. Neighborhood Design, Physical Activity, and Wellbeing: Applying the Walkability Model.

    Science.gov (United States)

    Zuniga-Teran, Adriana A; Orr, Barron J; Gimblett, Randy H; Chalfoun, Nader V; Guertin, David P; Marsh, Stuart E

    2017-01-13

    Neighborhood design affects lifestyle physical activity, and ultimately human wellbeing. There are, however, a limited number of studies that examine neighborhood design types. In this research, we examine four types of neighborhood designs: traditional development, suburban development, enclosed community, and cluster housing development, and assess their level of walkability and their effects on physical activity and wellbeing. We examine significant associations through a questionnaire ( n = 486) distributed in Tucson, Arizona using the Walkability Model. Among the tested neighborhood design types, traditional development showed significant associations and the highest value for walkability, as well as for each of the two types of walking (recreation and transportation) representing physical activity. Suburban development showed significant associations and the highest mean values for mental health and wellbeing. Cluster housing showed significant associations and the highest mean value for social interactions with neighbors and for perceived safety from crime. Enclosed community did not obtain the highest means for any wellbeing benefit. The Walkability Model proved useful in identifying the walkability categories associated with physical activity and perceived crime. For example, the experience category was strongly and inversely associated with perceived crime. This study provides empirical evidence of the importance of including vegetation, particularly trees, throughout neighborhoods in order to increase physical activity and wellbeing. Likewise, the results suggest that regular maintenance is an important strategy to improve mental health and overall wellbeing in cities.

  20. A system for designing and simulating particle physics experiments

    International Nuclear Information System (INIS)

    Zelazny, R.; Strzalkowski, P.

    1987-01-01

    In view of the rapid development of experimental facilities and their costs, the systematic design and preparation of particle physics experiments have become crucial. A software system is proposed as an aid for the experimental designer, mainly for experimental geometry analysis and experimental simulation. The following model is adopted: the description of an experiment is formulated in a language (here called XL) and put by its processor in a data base. The language is based on the entity-relationship-attribute approach. The information contained in the data base can be reported and analysed by an analyser (called XA) and modifications can be made at any time. In particular, the Monte Carlo methods can be used in experiment simulation for both physical phenomena in experimental set-up and detection analysis. The general idea of the system is based on the design concept of ISDOS project information systems. The characteristics of the simulation module are similar to those of the CERN Geant system, but some extensions are proposed. The system could be treated as a component of greater, integrated software environment for the design of particle physics experiments, their monitoring and data processing. (orig.)

  1. Physical and Emotional Benefits of Different Exercise Environments Designed for Treadmill Running.

    Science.gov (United States)

    Yeh, Hsiao-Pu; Stone, Joseph A; Churchill, Sarah M; Brymer, Eric; Davids, Keith

    2017-07-11

    (1) Background: Green physical activity promotes physical health and mental wellbeing and interesting questions concern effects of this information on designing indoor exercise environments. This study examined the physical and emotional effects of different nature-based environments designed for indoor treadmill running; (2) Methods: In a counterbalanced experimental design, 30 participants performed three, twenty-minute treadmill runs at a self-selected pace while viewing either a static nature image, a dynamic nature image or self-selected entertainment. Distance ran, heart rate (HR) and five pre-and post-exercise emotional states were measured; (3) Results: Participants ran farther, and with higher HRs, with self-selected entertainment compared to the two nature-based environment designs. Participants attained lowered anger, dejection, anxiety and increased excitement post exercise in all of the designed environments. Happiness increased during the two nature-based environment designs compared with self-selected entertainment; (4) Conclusions: Self-selected entertainment encouraged greater physical performances whereas running in nature-based exercise environments elicited greater happiness immediately after running.

  2. Physics design of the CIADS 25 MeV demo facility

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Shu-Hui, E-mail: liush@impcas.ac.cn [Institute of Modern Physics, the Chinese Academy of Sciences, Lanzhou 730000 (China); Wang, Zhi-Jun; Jia, Huan [Institute of Modern Physics, the Chinese Academy of Sciences, Lanzhou 730000 (China); He, Yuan, E-mail: hey@impcas.ac.cn [Institute of Modern Physics, the Chinese Academy of Sciences, Lanzhou 730000 (China); Dou, Wei-Ping; Qin, Yuan-Shuai; Chen, Wei-Long [Institute of Modern Physics, the Chinese Academy of Sciences, Lanzhou 730000 (China); Yan, Fang [Institute of High Energy Physics, the Chinese Academy of Sciences, Beijing 100049 (China)

    2017-01-21

    A superconducting linac has been proposed and under constructed to demonstrate the key technology and the feasibility for CIADS(China Initiative Accelerator Driven System)linac. This linac will accelerate the 10 mA proton beam to 25 MeV. There are some challenges in the physics design for the high power superconducting accelerator. In this paper, we focus on the matching between different cryomodules (CMs) and the frequency jump. This paper presents the physics design study together with the design principles and the simulation results with machine errors.

  3. Update of ZTH physics and design issues and physics goals of ZTH and role in the Fusion Program

    International Nuclear Information System (INIS)

    DiMarco, J.N.

    1990-01-01

    The ZTH construction program is scheduled for completion in December of 1992. Some design features are still amenable to changes directed by new physics or computational information. Numerical results for the ZTH tapered poloidal field gap show that a relatively simple linear taper results in substantial reduction in field error. This design is simpler to manufacture compared with the compound curve predicted by analytical calculations. Also, ongoing analysis of ZT-40M data indicates that the fluctuation levels of magnetic fields and x-rays at high θ (1.7), can be reduced to the fluctuation levels at ''standard'' operational θ (1.4) by changing the winding configuration of the toroidal field (TF) coils. The effect is thought to depend on the shell-like action of the TF coils when they consist of many turns in parallel. Magnetic-field effects, such as field errors, at the unshielded toroidal-field butt-joint gap in the shell can be reduced by this effective external shell. Design implications for installing a second low-current TF coil on ZTH are presented. ZTH has the capability of operating at 4 MA with the addition of power supplies. The projected parameters of ZTH are discussed in the context of various conceptual design. The sensitivity of the conceptual design to the physics results from machines like RFX and ZTH is reviewed. It is shown that the 4 MA ZTH physics results will make a significant advance for the RFP program toward the programmatic RFP fusion goals. Finally, the influence of RFP and tokamak physics on the conceptual design of high mass-power-density (MPD) fusion reactors is investigated through the TITAN and ARIES studies. The confinement characteristics required of these conceptual designs are compared; physics issues are identified that are required to bring the MPD and fusion-power-core of the tokamak designs into coincidence with the RFP designs

  4. Sandia's experience in designing and implementing integrated high security physical protection systems

    International Nuclear Information System (INIS)

    Caskey, D.L.

    1986-01-01

    As DOE's lead laboratory for physical security, Sandia National Laboratories has had a major physical security program for over ten years. Activities have ranged from component development and evaluation, to full scale system design and implementation. This paper presents some of the lessons learned in designing and implementing state-of-the-art high security physical protection systems for a number of government facilities. A generic system design is discussed for illustration purposes. Sandia efforts to transfer technology to industry are described

  5. Neighborhood Design, Physical Activity, and Wellbeing: Applying the Walkability Model

    Directory of Open Access Journals (Sweden)

    Adriana A. Zuniga-Teran

    2017-01-01

    Full Text Available Neighborhood design affects lifestyle physical activity, and ultimately human wellbeing. There are, however, a limited number of studies that examine neighborhood design types. In this research, we examine four types of neighborhood designs: traditional development, suburban development, enclosed community, and cluster housing development, and assess their level of walkability and their effects on physical activity and wellbeing. We examine significant associations through a questionnaire (n = 486 distributed in Tucson, Arizona using the Walkability Model. Among the tested neighborhood design types, traditional development showed significant associations and the highest value for walkability, as well as for each of the two types of walking (recreation and transportation representing physical activity. Suburban development showed significant associations and the highest mean values for mental health and wellbeing. Cluster housing showed significant associations and the highest mean value for social interactions with neighbors and for perceived safety from crime. Enclosed community did not obtain the highest means for any wellbeing benefit. The Walkability Model proved useful in identifying the walkability categories associated with physical activity and perceived crime. For example, the experience category was strongly and inversely associated with perceived crime. This study provides empirical evidence of the importance of including vegetation, particularly trees, throughout neighborhoods in order to increase physical activity and wellbeing. Likewise, the results suggest that regular maintenance is an important strategy to improve mental health and overall wellbeing in cities.

  6. Physics and Its Interfaces with Medicinal Chemistry and Drug Design

    Science.gov (United States)

    Santos, Ricardo N.; Andricopulo, Adriano D.

    2013-08-01

    Medicinal chemistry is a multidisciplinary subject that integrates knowledge from a variety of fields of science, including, but not limited to, chemistry, biology, and physics. The area of drug design involves the cooperative work of scientists with a diverse range of backgrounds and technical skills, trying to tackle complex problems using an integration of approaches and methods. One important contribution to this field comes from physics through studies that attempt to identify and quantify the molecular interactions between small molecules (drugs) and biological targets (receptors), such as the forces that govern the interactions, the thermodynamics of the drug-receptor interactions, and so on. In this context, the interfaces of physics, medicinal chemistry, and drug design are of vital importance for the development of drugs that not only have the right chemistry but also the right intermolecular properties to interact at the macromolecular level, providing useful information about the principles and molecular mechanisms underlying the therapeutic action of drugs. This article highlights some of the most important connections between physics and medicinal chemistry in the design of new drugs.

  7. Physical explosion analysis in heat exchanger network design

    Science.gov (United States)

    Pasha, M.; Zaini, D.; Shariff, A. M.

    2016-06-01

    The failure of shell and tube heat exchangers is being extensively experienced by the chemical process industries. This failure can create a loss of production for long time duration. Moreover, loss of containment through heat exchanger could potentially lead to a credible event such as fire, explosion and toxic release. There is a need to analyse the possible worst case effect originated from the loss of containment of the heat exchanger at the early design stage. Physical explosion analysis during the heat exchanger network design is presented in this work. Baker and Prugh explosion models are deployed for assessing the explosion effect. Microsoft Excel integrated with process design simulator through object linking and embedded (OLE) automation for this analysis. Aspen HYSYS V (8.0) used as a simulation platform in this work. A typical heat exchanger network of steam reforming and shift conversion process was presented as a case study. It is investigated from this analysis that overpressure generated from the physical explosion of each heat exchanger can be estimated in a more precise manner by using Prugh model. The present work could potentially assist the design engineer to identify the critical heat exchanger in the network at the preliminary design stage.

  8. Integrated Circuit Design in US High-Energy Physics

    Energy Technology Data Exchange (ETDEWEB)

    Geronimo, G. D. [Brookhaven National Lab. (BNL), Upton, NY (United States); Christian, D. [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Bebek, C. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Garcia-Sciveres, M. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Lippe, H. V. D. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Haller, G. [SLAC National Accelerator Lab., Menlo Park, CA (United States); Grillo, AA [Univ. of California, Santa Cruz, CA (United States); Newcomer, M [Univ. of Pennsylvania, Philadelphia, PA (United States)

    2013-07-10

    This whitepaper summarizes the status, plans, and challenges in the area of integrated circuit design in the United States for future High Energy Physics (HEP) experiments. It has been submitted to CPAD (Coordinating Panel for Advanced Detectors) and the HEP Community Summer Study 2013(Snowmass on the Mississippi) held in Minnesota July 29 to August 6, 2013. A workshop titled: US Workshop on IC Design for High Energy Physics, HEPIC2013 was held May 30 to June 1, 2013 at Lawrence Berkeley National Laboratory (LBNL). A draft of the whitepaper was distributed to the attendees before the workshop, the content was discussed at the meeting, and this document is the resulting final product. The scope of the whitepaper includes the following topics: Needs for IC technologies to enable future experiments in the three HEP frontiers Energy, Cosmic and Intensity Frontiers; Challenges in the different technology and circuit design areas and the related R&D needs; Motivation for using different fabrication technologies; Outlook of future technologies including 2.5D and 3D; Survey of ICs used in current experiments and ICs targeted for approved or proposed experiments; IC design at US institutes and recommendations for collaboration in the future.

  9. Enhancing pre-service physics teachers' creative thinking skills through HOT lab design

    Science.gov (United States)

    Malik, Adam; Setiawan, Agus; Suhandi, Andi; Permanasari, Anna

    2017-08-01

    A research on the implementation of HOT (Higher Order Thinking) Laboratory has been carried out. This research is aimed to compare increasing of creative thinking skills of pre-service physics teachers who receive physics lesson with HOT Lab and with verification lab for the topic of electric circuit. This research used a quasi-experiment methods with control group pretest-posttest design. The subject of the research is 40 Physics Education pre-service physics teachers of UIN Sunan Gunung Djati Bandung. Research samples were selected by class random sampling technique. Data on pre-service physics teachers' creative thinking skills were collected using test of creative thinking skills in the form of essay. The results of the research reveal that average of N-gain of creative thinking skills are for pre-service physics teachers who received lesson with HOT Lab design and for pre-service physics teachers who received lesson with verification lab, respectively. Therefore, we conclude that application of HOT Lab design is more effective to increase creative thinking skills in the lesson of electric circuit.

  10. Security-aware design for cyber-physical systems a platform-based approach

    CERN Document Server

    Lin, Chung-Wei

    2017-01-01

    Addressing the rising security issues during the design stages of cyber-physical systems, this book develops a systematic approach to address security at early design stages together with all other design constraints. Cyber-attacks become more threatening as systems are becoming more connected with the surrounding environment, infrastructures, and other systems. Security mechanisms can be designed to protect against attacks and meet security requirements, but there are many challenges of applying security mechanisms to cyber-physical systems including open environments, limited resources, strict timing requirements, and large number of devices. Designed for researchers and professionals, this book is valuable for individuals working in network systems, security mechanisms, and system design. It is also suitable for advanced-level students of computer science. .

  11. Design of an instrument to measure the quality of care in Physical Therapy.

    Science.gov (United States)

    Cavalheiro, Leny Vieira; Eid, Raquel Afonso Caserta; Talerman, Claudia; Prado, Cristiane do; Gobbi, Fátima Cristina Martorano; Andreoli, Paola Bruno de Araujo

    2015-01-01

    To design an instrument composed of domains that would demonstrate physical therapy activities and generate a consistent index to represent the quality of care in physical therapy. The methodology Lean Six Sigma was used to design the tool. The discussion involved seven different management groups staff. By means of brainstorming and Cause & Effect Matrix, we set up the process map. Five requirements composed the quality of care index in physical therapy, after application of the tool called Cause & Effect Matrix. The following requirements were assessed: physical therapist performance, care outcome indicator, adherence to physical therapy protocols, measure whether the prognosis and treatment outcome was achieved and Infrastructure. The proposed design allowed evaluating several items related to physical therapy service, enabling customization, reproducibility and benchmarking with other organizations. For management, this index provides the opportunity to identify areas for improvement and the strengths of the team and process of physical therapy care.

  12. Design of two-terminal PNPN diode for high-density and high-speed memory applications

    International Nuclear Information System (INIS)

    Tong Xiaodong; Wu Hao; Liang Qingqing; Zhong Huicai; Zhu Huilong; Zhao Chao; Ye Tianchun

    2014-01-01

    A vertical two-terminal silicon PNPN diode is presented for use in a high-density memory cell. The device design for high-speed operations was studied with experiments and calibrated simulations, which proves that the proposed memory cell can be operated at nanosecond range. The static and dynamic power dissipations were also studied, which indicated the availability of the proposed memory cell for VLSI applications. Moreover, the memory cell is compatible with CMOS process, has little impact from process variation, and has good reliability. (semiconductor devices)

  13. ReleQuant – Improving teaching and learning in quantum physics through educational design research

    Directory of Open Access Journals (Sweden)

    Berit Bungum

    2015-05-01

    Full Text Available Quantum physics and relativity are demanding for teachers and students, but have the potential for students to experience physics as fascinating and meaningful. Project ReleQuant engaged in educational design research to improve teaching and learning in these topics in Norwegian upper secondary schools. The paper focuses on the first cycle of development of a teaching module on quantum physics and how design principles were developed. We construct the design principles by reviewing relevant research literature and conducting three pilot studies. The process resulted in the following principles for designing the quantum physics teaching module: 1 clarify how quantum physics breaks with classical physics; 2 use simulations of phenomena that cannot be experienced directly; 3 provide students to use written and oral language; 4 address and discuss wave-particle duality and the uncertainty

  14. On the impact of communication complexity in the design of parallel numerical algorithms

    Science.gov (United States)

    Gannon, D.; Vanrosendale, J.

    1984-01-01

    This paper describes two models of the cost of data movement in parallel numerical algorithms. One model is a generalization of an approach due to Hockney, and is suitable for shared memory multiprocessors where each processor has vector capabilities. The other model is applicable to highly parallel nonshared memory MIMD systems. In the second model, algorithm performance is characterized in terms of the communication network design. Techniques used in VLSI complexity theory are also brought in, and algorithm independent upper bounds on system performance are derived for several problems that are important to scientific computation.

  15. Robust working memory in an asynchronously spiking neural network realized in neuromorphic VLSI

    Directory of Open Access Journals (Sweden)

    Massimiliano eGiulioni

    2012-02-01

    Full Text Available We demonstrate bistable attractor dynamics in a spiking neural network implemented with neuromorphic VLSI hardware. The on-chip network consists of three interacting populations (two excitatory, one inhibitory of integrate-and-fire (LIF neurons. One excitatory population is distinguished by strong synaptic self-excitation, which sustains meta-stable states of ‘high’ and ‘low’-firing activity. Depending on the overall excitability, transitions to the ‘high’ state may be evoked by external stimulation, or may occur spontaneously due to random activity fluctuations. In the former case, the ‘high’ state retains a working memory of a stimulus until well after its release. In the latter case, ‘high’ states remain stable for seconds, three orders of magnitude longer than the largest time-scale implemented in the circuitry. Evoked and spontaneous transitions form a continuum and may exhibit a wide range of latencies, depending on the strength of external stimulation and of recurrent synaptic excitation. In addition, we investigated corrupted ‘high’ states comprising neurons of both excitatory populations. Within a basin of attraction, the network dynamics corrects such states and re-establishes the prototypical ‘high’ state. We conclude that, with effective theoretical guidance, full-fledged attractor dynamics can be realized with comparatively small populations of neuromorphic hardware neurons.

  16. Robust Working Memory in an Asynchronously Spiking Neural Network Realized with Neuromorphic VLSI.

    Science.gov (United States)

    Giulioni, Massimiliano; Camilleri, Patrick; Mattia, Maurizio; Dante, Vittorio; Braun, Jochen; Del Giudice, Paolo

    2011-01-01

    We demonstrate bistable attractor dynamics in a spiking neural network implemented with neuromorphic VLSI hardware. The on-chip network consists of three interacting populations (two excitatory, one inhibitory) of leaky integrate-and-fire (LIF) neurons. One excitatory population is distinguished by strong synaptic self-excitation, which sustains meta-stable states of "high" and "low"-firing activity. Depending on the overall excitability, transitions to the "high" state may be evoked by external stimulation, or may occur spontaneously due to random activity fluctuations. In the former case, the "high" state retains a "working memory" of a stimulus until well after its release. In the latter case, "high" states remain stable for seconds, three orders of magnitude longer than the largest time-scale implemented in the circuitry. Evoked and spontaneous transitions form a continuum and may exhibit a wide range of latencies, depending on the strength of external stimulation and of recurrent synaptic excitation. In addition, we investigated "corrupted" "high" states comprising neurons of both excitatory populations. Within a "basin of attraction," the network dynamics "corrects" such states and re-establishes the prototypical "high" state. We conclude that, with effective theoretical guidance, full-fledged attractor dynamics can be realized with comparatively small populations of neuromorphic hardware neurons.

  17. Compact Interconnection Networks Based on Quantum Dots

    Science.gov (United States)

    Fijany, Amir; Toomarian, Nikzad; Modarress, Katayoon; Spotnitz, Matthew

    2003-01-01

    Architectures that would exploit the distinct characteristics of quantum-dot cellular automata (QCA) have been proposed for digital communication networks that connect advanced digital computing circuits. In comparison with networks of wires in conventional very-large-scale integrated (VLSI) circuitry, the networks according to the proposed architectures would be more compact. The proposed architectures would make it possible to implement complex interconnection schemes that are required for some advanced parallel-computing algorithms and that are difficult (and in many cases impractical) to implement in VLSI circuitry. The difficulty of implementation in VLSI and the major potential advantage afforded by QCA were described previously in Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), NASA Tech Briefs, Vol. 25, No. 10 (October 2001), page 42. To recapitulate: Wherever two wires in a conventional VLSI circuit cross each other and are required not to be in electrical contact with each other, there must be a layer of electrical insulation between them. This, in turn, makes it necessary to resort to a noncoplanar and possibly a multilayer design, which can be complex, expensive, and even impractical. As a result, much of the cost of designing VLSI circuits is associated with minimization of data routing and assignment of layers to minimize crossing of wires. Heretofore, these considerations have impeded the development of VLSI circuitry to implement complex, advanced interconnection schemes. On the other hand, with suitable design and under suitable operating conditions, QCA-based signal paths can be allowed to cross each other in the same plane without adverse effect. In principle, this characteristic could be exploited to design compact, coplanar, simple (relative to VLSI) QCA-based networks to implement complex, advanced interconnection schemes. The proposed architectures require two advances in QCA-based circuitry beyond basic QCA-based binary

  18. HSTL IO Standard Based Energy Efficient Multiplier Design using Nikhilam Navatashcaramam Dashatah on 28nm FPGA

    DEFF Research Database (Denmark)

    Madhok, Shivani; Pandey, Bishwajeet; Kaur, Amanpreet

    2015-01-01

    standards. Frequency scaling is one of the best energy efficient techniques for FPGA based VLSI design and is used in this paper. At the end we can conclude that we can conclude that there is 23-40% saving of total power dissipation by using SSTL IO standard at 25 degree Celsius. The main reason for power...... consumption is leakage power at different IO Standards and at different frequencies. In this research work only FPGA work has been performed not ultra scale FPGA....

  19. The impact of gameful design on sedentary adults' motivation for physical activity and physical activity levels

    OpenAIRE

    Gummelt, Dominique

    2017-01-01

    Background: Gameful design has been shown to have the potential to increase motivation for and engagement with physical activity (PA). However, at present, there is a significant lack of well-designed frameworks identifying effective pathways to increase PA behaviour.Purpose: To design a rigorous, methodologically sound, theory-grounded framework for developing gamefully designed PA interventions.Methods: Intervention Mapping (IM) was used to develop the study protocol, consisting of three st...

  20. Physical Layer Design in Wireless Sensor Networks for Fading Mitigation

    Directory of Open Access Journals (Sweden)

    Nuo Chen

    2013-09-01

    Full Text Available This paper presents the theoretical analysis, simulation results and suggests design in digital technology of a physical layer for wireless sensor networks. The proposed design is able to mitigate fading inside communication channel. To mitigate fading the chip interleaving technique is proposed. For the proposed theoretical model of physical layer, a rigorous mathematical analysis is conducted, where all signals are presented and processed in discrete time domain form which is suitable for further direct processing necessary for devices design in digital technology. Three different channels are used to investigate characteristics of the physical layer: additive white Gaussian noise channel (AWGN, AWG noise and flat fading channel and AWG noise and flat fading channel with interleaver and deinterleaver blocks in the receiver and transmitter respectively. Firstly, the mathematical model of communication system representing physical layer is developed based on the discrete time domain signal representation and processing. In the existing theory, these signals and their processing are represented in continuous time form, which is not suitable for direct implementation in digital technology. Secondly, the expressions for the probability of chip, symbol and bit error are derived. Thirdly, the communication system simulators are developed in MATLAB. The simulation results confirmed theoretical findings.

  1. Design and multi-physics optimization of rotary MRF brakes

    Science.gov (United States)

    Topcu, Okan; Taşcıoğlu, Yiğit; Konukseven, Erhan İlhan

    2018-03-01

    Particle swarm optimization (PSO) is a popular method to solve the optimization problems. However, calculations for each particle will be excessive when the number of particles and complexity of the problem increases. As a result, the execution speed will be too slow to achieve the optimized solution. Thus, this paper proposes an automated design and optimization method for rotary MRF brakes and similar multi-physics problems. A modified PSO algorithm is developed for solving multi-physics engineering optimization problems. The difference between the proposed method and the conventional PSO is to split up the original single population into several subpopulations according to the division of labor. The distribution of tasks and the transfer of information to the next party have been inspired by behaviors of a hunting party. Simulation results show that the proposed modified PSO algorithm can overcome the problem of heavy computational burden of multi-physics problems while improving the accuracy. Wire type, MR fluid type, magnetic core material, and ideal current inputs have been determined by the optimization process. To the best of the authors' knowledge, this multi-physics approach is novel for optimizing rotary MRF brakes and the developed PSO algorithm is capable of solving other multi-physics engineering optimization problems. The proposed method has showed both better performance compared to the conventional PSO and also has provided small, lightweight, high impedance rotary MRF brake designs.

  2. Work and Home Neighborhood Design and Physical Activity.

    Science.gov (United States)

    Carlson, Jordan A; Frank, Lawrence D; Ulmer, Jared; Conway, Terry L; Saelens, Brian E; Cain, Kelli L; Sallis, James F

    2018-01-01

    To investigate relations of perceived worksite neighborhood environments to total physical activity and active transportation, over and above home neighborhood built environments. Observational epidemiologic study. Baltimore, Maryland-Washington, DC, and Seattle-King County, Washington metropolitan areas. One thousand eighty-five adults (mean age = 45.0 [10.2]; 46% women) recruited from 32 neighborhoods stratified by high/low neighborhood income and walkability. The Neighborhood Environment Walkability Survey assessed perceptions of worksite and home neighborhood environments. Accelerometers assessed total moderate-to-vigorous physical activity (MVPA). The International Physical Activity Questionnaire assessed total active transportation and active transportation to and around work. Mixed-effects regression tested relations of home and worksite neighborhood environments to each physical activity outcome, adjusted for demographics. Home and worksite mixed land use and street connectivity had the most consistent positive associations with physical activity outcomes. Worksite traffic and pedestrian safety were also associated with multiple physical activity outcomes. The worksite neighborhood explained additional variance in physical activity outcomes than explained by the home neighborhood. Worksite and home neighborhood environments interacted in explaining active transportation to work, with the greatest impacts occurring when both neighborhoods were activity supportive. Both worksite and home neighborhood environments were independently related to total MVPA and active transportation. Community design policies should target improving the physical activity supportiveness of worksite neighborhood environments and integrating commercial and residential development.

  3. Photonic Design: From Fundamental Solar Cell Physics to Computational Inverse Design

    OpenAIRE

    Miller, Owen Dennis

    2012-01-01

    Photonic innovation is becoming ever more important in the modern world. Optical systems are dominating shorter and shorter communications distances, LED's are rapidly emerging for a variety of applications, and solar cells show potential to be a mainstream technology in the energy space. The need for novel, energy-efficient photonic and optoelectronic devices will only increase. This work unites fundamental physics and a novel computational inverse design approach towards such innovation....

  4. DESIGN OF LOW POWER 8T SRAM WITH SCHMITT TRIGGER LOGIC

    Directory of Open Access Journals (Sweden)

    A. KISHORE KUMAR

    2014-12-01

    Full Text Available Static Random Access Memory (SRAM has become a key element in modern VLSI systems. In this paper, a low power design of 8 Transistor SRAM cell with Schmitt Trigger (ST logic is proposed. The main intention of this paper is to design a new SRAM cell architecture to reduce the power consumption during both read / write operations and to improve SRAM access stability. The proposed design is simulated using 0.18 µm process technology and compared with conventional 6T cell. Simulation results show that the proposed memory cell achieves significant improvements in power consumption during read and write operations. It can retain data at a lower supply voltage of 300 mV. This new type of SRAM design can operate at a maximum frequency of 1 GHz at 1 V supply voltage. These qualities of the proposed design make it a best choice for high performance memory chips in the semiconductor industry where reliability and power consumption are of great interest.

  5. A General Design Methodology for Synchronous Early-Completion-Prediction Adders in Nano-CMOS DSP Architectures

    Directory of Open Access Journals (Sweden)

    Mauro Olivieri

    2013-01-01

    Full Text Available Synchronous early-completion-prediction adders (ECPAs are used for high clock rate and high-precision DSP datapaths, as they allow a dominant amount of single-cycle operations even if the worst-case carry propagation delay is longer than the clock period. Previous works have also demonstrated ECPA advantages for average leakage reduction and NBTI effects reduction in nanoscale CMOS technologies. This paper illustrates a general systematic methodology to design ECPA units, targeting nanoscale CMOS technologies, which is not available in the current literature yet. The method is fully compatible with standard VLSI macrocell design tools and standard adder structures and includes automatic definition of critical test patterns for postlayout verification. A design example is included, reporting speed and power data superior to previous works.

  6. Physical design correlates of efficiency and safety in emergency departments: a qualitative examination.

    Science.gov (United States)

    Pati, Debajyoti; Harvey, Thomas E; Pati, Sipra

    2014-01-01

    The objective of this study was to explore and identify physical design correlates of safety and efficiency in emergency department (ED) operations. This study adopted an exploratory, multimeasure approach to (1) examine the interactions between ED operations and physical design at 4 sites and (2) identify domains of physical design decision-making that potentially influence efficiency and safety. Multidisciplinary gaming and semistructured interviews were conducted with stakeholders at each site. Study data suggest that 16 domains of physical design decisions influence safety, efficiency, or both. These include (1) entrance and patient waiting, (2) traffic management, (3) subwaiting or internal waiting areas, (4) triage, (5) examination/treatment area configuration, (6) examination/treatment area centralization versus decentralization, (7) examination/treatment room standardization, (8) adequate space, (9) nurse work space, (10) physician work space, (11) adjacencies and access, (12) equipment room, (13) psych room, (14) staff de-stressing room, (15) hallway width, and (16) results waiting area. Safety and efficiency from a physical environment perspective in ED design are mutually reinforcing concepts--enhancing efficiency bears positive implications for safety. Furthermore, safety and security emerged as correlated concepts, with security issues bearing implications for safety, thereby suggesting important associations between safety, security, and efficiency.

  7. Trends in integrated circuit design for particle physics experiments

    International Nuclear Information System (INIS)

    Atkin, E V

    2017-01-01

    Integrated circuits are one of the key complex units available to designers of multichannel detector setups. A whole number of factors makes Application Specific Integrated Circuits (ASICs) valuable for Particle Physics and Astrophysics experiments. Among them the most important ones are: integration scale, low power dissipation, radiation tolerance. In order to make possible future experiments in the intensity, cosmic, and energy frontiers today ASICs should provide new level of functionality at a new set of constraints and trade-offs, like low-noise high-dynamic range amplification and pulse shaping, high-speed waveform sampling, low power digitization, fast digital data processing, serialization and data transmission. All integrated circuits, necessary for physical instrumentation, should be radiation tolerant at an earlier not reached level (hundreds of Mrad) of total ionizing dose and allow minute almost 3D assemblies. The paper is based on literary source analysis and presents an overview of the state of the art and trends in nowadays chip design, using partially own ASIC lab experience. That shows a next stage of ising micro- and nanoelectronics in physical instrumentation. (paper)

  8. Physics and Detectors at CLIC CLIC Conceptual Design Report

    CERN Document Server

    Miyamoto, Akiya; Stanitzki,Marcel; Weerts, Harry

    2012-01-01

    This report describes the physics potential and experiments at a future multi- TeV e+e− collider based on the Compact Linear Collider (CLIC) technology. The physics scenarios considered include precision measurements of known quantities as well as the discovery potential of physics beyond the Standard Model. The report describes the detector performance required at CLIC, taking into account the interaction point environment and especially beaminduced backgrounds. Two detector concepts, designed around highly granular calorimeters and based on concepts studied for the International Linear Collider (ILC), are described and used to study the physics reach and potential of such a collider. Detector subsystems and the principal engineering challenges are illustrated. The overall performance of these CLIC detector concepts is demonstrated by studies of the performance of individual subdetector systems as well as complete simulation studies of six benchmark physics processes. These full detector simulation and rec...

  9. Ontological Knowledge Base of Physical and Technical Effects for Conceptual Design of Sensors

    International Nuclear Information System (INIS)

    ASTRAKHAN CIVIL ENGINEERING INSTITUTE, Astrakhan (Russian Federation))" data-affiliation=" (Department of CAD Systems, State Autonomous Educational Institution of Astrakhan Region of Higher Professional Education ASTRAKHAN CIVIL ENGINEERING INSTITUTE, Astrakhan (Russian Federation))" >Zaripova, V M; ASTRAKHAN CIVIL ENGINEERING INSTITUTE, Astrakhan (Russian Federation))" data-affiliation=" (Department of CAD Systems, State Autonomous Educational Institution of Astrakhan Region of Higher Professional Education ASTRAKHAN CIVIL ENGINEERING INSTITUTE, Astrakhan (Russian Federation))" >Petrova, I Yu

    2015-01-01

    This article discusses design of the knowledge base of physical phenomena based on domain-specific ontology. Classification of various physical phenomena in the knowledge base is based on energy-information model of circuits (EIMC) suggested by the authors. This model is specially aimed at design of new operating principles of sensing elements (sensors). Such a knowledge base can be used to train intended engineers, specialists in sensors design

  10. Research-design model for professional development of teachers: Designing lessons with physics education research

    Science.gov (United States)

    Eylon, Bat-Sheva; Bagno, Esther

    2006-12-01

    How can one increase the awareness of teachers to the existence and importance of knowledge gained through physics education research (PER) and provide them with capabilities to use it? How can one enrich teachers’ physics knowledge and the related pedagogical content knowledge of topics singled out by PER? In this paper we describe a professional development model that attempts to respond to these needs. We report on a study of the model’s implementation in a program for 22 high-school experienced physics teachers. In this program teachers (in teams of 5-6) developed during a year and a half (about 330h ), several lessons (minimodules) dealing with a topic identified as problematic by PER. The teachers employed a systematic research-based approach and used PER findings. The program consisted of three stages, each culminating with a miniconference: 1. Defining teaching and/or learning goals based on content analysis and diagnosis of students’ prior knowledge. 2. Designing the lessons using PER-based instructional strategies. 3. Performing a small-scale research study that accompanies the development process and publishing the results. We describe a case study of one of the groups and bring evidence that demonstrates how the workshop advanced: (a) Teachers’ awareness of deficiencies in their own knowledge of physics and pedagogy, and their perceptions about their students’ knowledge; (b) teachers’ knowledge of physics and physics pedagogy; (c) a systematic research-based approach to the design of lessons; (d) the formation of a community of practice; and (e) acquaintance with central findings of PER. There was a clear effect on teachers’ practice in the context of the study as indicated by the materials brought to the workshop. The teachers also reported that they continued to use the insights gained, mainly in the topics that were investigated by themselves and by their peers.

  11. Research-design model for professional development of teachers: Designing lessons with physics education research

    Directory of Open Access Journals (Sweden)

    Esther Bagno

    2006-09-01

    Full Text Available How can one increase the awareness of teachers to the existence and importance of knowledge gained through physics education research (PER and provide them with capabilities to use it? How can one enrich teachers’ physics knowledge and the related pedagogical content knowledge of topics singled out by PER? In this paper we describe a professional development model that attempts to respond to these needs. We report on a study of the model’s implementation in a program for 22 high-school experienced physics teachers. In this program teachers (in teams of 5-6 developed during a year and a half (about 330 h , several lessons (minimodules dealing with a topic identified as problematic by PER. The teachers employed a systematic research-based approach and used PER findings. The program consisted of three stages, each culminating with a miniconference: 1. Defining teaching and/or learning goals based on content analysis and diagnosis of students’ prior knowledge. 2. Designing the lessons using PER-based instructional strategies. 3. Performing a small-scale research study that accompanies the development process and publishing the results. We describe a case study of one of the groups and bring evidence that demonstrates how the workshop advanced: (a Teachers’ awareness of deficiencies in their own knowledge of physics and pedagogy, and their perceptions about their students’ knowledge; (b teachers’ knowledge of physics and physics pedagogy; (c a systematic research-based approach to the design of lessons; (d the formation of a community of practice; and (e acquaintance with central findings of PER. There was a clear effect on teachers’ practice in the context of the study as indicated by the materials brought to the workshop. The teachers also reported that they continued to use the insights gained, mainly in the topics that were investigated by themselves and by their peers.

  12. Research-design model for professional development of teachers: Designing lessons with physics education research

    Directory of Open Access Journals (Sweden)

    Bat-Sheva Eylon

    2006-09-01

    Full Text Available How can one increase the awareness of teachers to the existence and importance of knowledge gained through physics education research (PER and provide them with capabilities to use it? How can one enrich teachers’ physics knowledge and the related pedagogical content knowledge of topics singled out by PER? In this paper we describe a professional development model that attempts to respond to these needs. We report on a study of the model’s implementation in a program for 22 high-school experienced physics teachers. In this program teachers (in teams of 5-6 developed during a year and a half (about 330h, several lessons (minimodules dealing with a topic identified as problematic by PER. The teachers employed a systematic research-based approach and used PER findings. The program consisted of three stages, each culminating with a miniconference: 1. Defining teaching and/or learning goals based on content analysis and diagnosis of students’ prior knowledge. 2. Designing the lessons using PER-based instructional strategies. 3. Performing a small-scale research study that accompanies the development process and publishing the results. We describe a case study of one of the groups and bring evidence that demonstrates how the workshop advanced: (a Teachers’ awareness of deficiencies in their own knowledge of physics and pedagogy, and their perceptions about their students’ knowledge; (b teachers’ knowledge of physics and physics pedagogy; (c a systematic research-based approach to the design of lessons; (d the formation of a community of practice; and (e acquaintance with central findings of PER. There was a clear effect on teachers’ practice in the context of the study as indicated by the materials brought to the workshop. The teachers also reported that they continued to use the insights gained, mainly in the topics that were investigated by themselves and by their peers.

  13. On public space design for Chinese urban residential area based on integrated architectural physics environment evaluation

    Science.gov (United States)

    Dong, J. Y.; Cheng, W.; Ma, C. P.; Tan, Y. T.; Xin, L. S.

    2017-04-01

    The residential public space is an important part in designing the ecological residence, and a proper physics environment of public space is of greater significance to urban residence in China. Actually, the measure to apply computer aided design software into residential design can effectively avoid an inconformity of design intent with actual using condition, and a negative impact on users due to bad architectural physics environment of buildings, etc. The paper largely adopts a design method of analyzing architectural physics environment of residential public space. By analyzing and evaluating various physics environments, a suitability assessment is obtained for residential public space, thereby guiding the space design.

  14. Modelling physics detectors in a computer aided design system for simulation purposes

    International Nuclear Information System (INIS)

    Ahvenainen, J.; Oksakivi, T.; Vuoskoski, J.

    1995-01-01

    The possibility of transferring physics detector models from computer aided design systems into physics simulation packages like GEANT is receiving increasing attention. The problem of exporting detector models constructed in CAD systems into GEANT is well known. We discuss the problem and describe an application, called DDT, which allows one to design detector models in a CAD system and then transfer the models into GEANT for simulation purposes. (orig.)

  15. How Games are Designed to Increase Students’ Motivation in Learning Physics? A Literature Review

    Science.gov (United States)

    Tinedi, V.; Yohandri, Y.; Djamas, D.

    2018-04-01

    Game is a promising tool to help students in understanding physics concept. It can motivate and provide the opportunities for students to become independent in learning. In order to fulfil these functions, games should be carefully designed. Thus, the objective of this paper is to present how games are designed to increase students’ motivation in learning physics based on several literature reviews. The results showed that there are several ways to increase students’ motivation in learning physics and to achieve that, game dimensions are needed to be considered when designing a game. This literature review may have useful to assist teachers and contribute in improving the design of games.

  16. ITER-EDA physics design requirements and plasma performance assessments

    International Nuclear Information System (INIS)

    Uckan, N.A.; Galambos, J.; Wesley, J.; Boucher, D.; Perkins, F.; Post, D.; Putvinski, S.

    1996-01-01

    Physics design guidelines, plasma performance estimates, and sensitivity of performance to changes in physics assumptions are presented for the ITER-EDA Interim Design. The overall ITER device parameters have been derived from the performance goals using physics guidelines based on the physics R ampersand D results. The ITER-EDA design has a single-null divertor configuration (divertor at the bottom) with a nominal plasma current of 21 MA, magnetic field of 5.68 T, major and minor radius of 8.14 m and 2.8 m, and a plasma elongation (at the 95% flux surface) of ∼1.6 that produces a nominal fusion power of ∼1.5 GW for an ignited burn pulse length of ≥1000 s. The assessments have shown that ignition at 1.5 GW of fusion power can be sustained in ITER for 1000 s given present extrapolations of H-mode confinement (τ E = 0.85 x τ ITER93H ), helium exhaust (τ* He /τ E = 10), representative plasma impurities (n Be /n e = 2%), and beta limit [β N = β(%)/(I/aB) ≤ 2.5]. The provision of 100 MW of auxiliary power, necessary to access to H-mode during the approach to ignition, provides for the possibility of driven burn operations at Q = 15. This enables ITER to fulfill its mission of fusion power (∼ 1--1.5 GW) and fluence (∼1 MWa/m 2 ) goals if confinement, impurity levels, or operational (density, beta) limits prove to be less favorable than present projections. The power threshold for H-L transition, confinement uncertainties, and operational limits (Greenwald density limit and beta limit) are potential performance limiting issues. Improvement of the helium exhaust (τ* He /τ E ≤ 5) and potential operation in reverse-shear mode significantly improve ITER performance

  17. An Asynchronous Circuit Design Technique for a Flexible 8-Bit Microprocessor

    Science.gov (United States)

    Karaki, Nobuo; Nanmoto, Takashi; Inoue, Satoshi

    This paper presents an asynchronous design technique, an enabler for the emerging technology of flexible microelectronics that feature low-temperature processed polysilicon (LTPS) thin-film transistors (TFT) and surface-free technology by laser annealing/ablation (SUFTLA®). The first design instance chosen is an 8-bit microprocessor. LTPS TFTs are good for realizing displays having integrated VLSI circuit at lower costs. However, LTPS TFTs have drawbacks, including substantial deviations in characteristics and the self-heating phenomenon. To solve these problems, the authors adopted the asynchronous circuit design technique and developed an asynchronous design language called Verilog+, which is based on a subset of Verilog HDL® and includes minimal primitives used for describing the communications between modules, and the dedicated tools including a translator called xlator and a synthesizer called ctrlsyn. The flexible 8-bit microprocessor stably operates at 500kHz, drawing 180μA from a 5V power source. The microprocessor's electromagnetic emissions are 21dB less than those of the synchronous counterpart.

  18. Description of research design of articles published in four Brazilian physical therapy journals.

    Science.gov (United States)

    Saragiotto, Bruno T; Costa, Lucíola C M; Oliveira, Ronaldo F; Lopes, Alexandre D; Moseley, Anne M; Costa, Leonardo O P

    2014-01-01

    While the research design of articles published in medical journals and in some physical therapy journals has already been evaluated, this has not been investigated in Brazilian physical therapy journals. Objective : To describe the research design used in all articles published in Brazilian scientific journals that are freely available, have high Qualis rankings, and are relevant to physical therapy over a 7-year period. We extracted the bibliometric data, research design, research type (human or animal), and clinical area for all articles published. The articles were grouped into their level of evidence, and descriptive analyses were performed. We calculated the frequency, proportions of articles, and 95% confidence interval of these proportions with each research design in each journal. We cross-tabulated the clinical areas with research designs (expressed as number and percentages). A total of 1,458 articles from four Brazilian journals were found: Revista Brasileira de Fisioterapia, Revista Fisioterapia em Movimento, Revista Fisioterapia e Pesquisa, and Revista Acta Fisiátrica. The majority of articles were classified as level II of evidence (60%), followed by level III (29%) and level I (10%). The most prevalent research designs were cross-sectional studies (38%), single-case or case-series studies, and narrative reviews. Most articles reported human research and were in the musculoskeletal, neurologic, and cardiothoracic areas. Most of the research published in Brazilian physical therapy journals used levels II and III of evidence. Increasing the publication rate of systematic reviews and randomized controlled trials would provide more high-quality evidence to guide evidence-based physical therapy practice.

  19. Community Design and Transportation Policies: New Ways To Promote Physical Activity.

    Science.gov (United States)

    Killingsworth, Richard E.; Schmid, Thomas L.

    2001-01-01

    Public health, city planning, and transportation officials can work toward reducing the public health burden of physical inactivity by promoting the integration of walking and bicycling into daily routines. The paper discusses urban design challenges, promotion of walking and bicycling, and the importance of physical activity for children.…

  20. Design and physical features of inductive coaxial copper vapor lasers

    Energy Technology Data Exchange (ETDEWEB)

    Batenin, V. M. [Russian Academy of Sciences, Joint Institute for High Temperatures (Russian Federation); Kazaryan, M. A. [Russian Academy of Sciences, Lebedev Physical Institute (Russian Federation); Karpukhin, V. T. [Russian Academy of Sciences, Joint Institute for High Temperatures (Russian Federation); Lyabin, N. A. [Istok Research and Production Corporation (Russian Federation); Malikov, M. M., E-mail: mmalikov@oivtran.ru [Russian Academy of Sciences, Joint Institute for High Temperatures (Russian Federation)

    2016-11-15

    A physical model of a copper vapor laser pumped by a pulse-periodic inductive (electrodeless) discharge is considered. The feasibility of efficient laser pumping by an inductive discharge and reaching high output parameters comparable to those of conventional copper vapor lasers pumped by a longitudinal electrode discharge is demonstrated. The design and physical features of an inductive copper vapor laser with an annular working volume are discussed.

  1. Design of the sex hormones and physical exercise (SHAPE study

    Directory of Open Access Journals (Sweden)

    Peeters Petra HM

    2007-09-01

    Full Text Available Abstract Background Physical activity has been associated with a decreased risk for breast cancer. The biological mechanismn(s underlying the association between physical activity and breast cancer is not clear. Most prominent hypothesis is that physical activity may protect against breast cancer through reduced lifetime exposure to endogenous hormones either direct, or indirect by preventing overweight and abdominal adiposity. In order to get more insight in the causal pathway between physical activity and breast cancer risk, we designed the Sex Hormones and Physical Exercise (SHAPE study. Purpose of SHAPE study is to examine the effects of a 1-year moderate-to-vigorous intensity exercise programme on endogenous hormone levels associated with breast cancer among sedentary postmenopausal women and whether the amount of total body fat or abdominal fat mediates the effects. Methods/Design In the SHAPE study, 189 sedentary postmenopausal women, aged 50–69 years, are randomly allocated to an intervention or a control group. The intervention consists of an 1-year moderate-to-vigorous intensity aerobic and strenght training exercise programme. Partcipants allocated to the control group are requested to retain their habitual exercise pattern. Primary study parameters measured at baseline, at four months and at 12 months are: serum concentrations of endogenous estrogens, endogenous androgens, sex hormone binding globuline and insuline. Other study parameters include: amount of total and abdominal fat, weight, BMI, body fat distribution, physical fitness, blood pressure and lifestyle factors. Discussion This study will contribute to the body of evidence relating physical activity and breast cancer risk and will provide insight into possible mechanisms through which physical activity might be associated with reduced risk of breast cancer in postmenopausal women. Trial registration NCT00359060

  2. General design methodology applied to the research domain of physical programming for computer illiterate

    CSIR Research Space (South Africa)

    Smith, Andrew C

    2011-09-01

    Full Text Available The authors discuss the application of the 'general design methodology‘ in the context of a physical computing project. The aim of the project was to design and develop physical objects that could serve as metaphors for computer programming elements...

  3. Communicating Emotion through Haptic Design: A Study Using Physical Keys

    DEFF Research Database (Denmark)

    Kjellerup, Marie Kjær; Larsen, Anne Cathrine; Maier, Anja

    2014-01-01

    This paper explores how designers may communicate with the users of their products through haptic design. More specifically, how tactile properties of materials evoke emotions such as satisfaction, joy, or disgust. A research through design approach has been followed; mood- and material boards...... and prototypes of four ‘haptically enhanced’ (physical) keys were created. Types of keys selected include home, bicycle, hobby, and basement. An experiment with ten participants was conducted, using word association and a software to elicit product emotions (PrEmo). Results show a mapping between the designer...

  4. Physics Considerations in the Design of NCSX

    International Nuclear Information System (INIS)

    Neilson, G.H.; Zarnstorff, M.C.; Ku, L.P.; Lazarus, E.A.; Mioduszewski, P.K.; Fenstermacher, M.; Fredrickson, E.; Fu, G.Y.; Grossman, A.; Heitzenroeder, P.J.; Hatcher, R.H.; Hirshman, S.P.; Hudson, S.R.; Johnson, D.W.; Kugel, H.W.; Lyon, J.F.; Majeski, R.; Mikkelsen, D.R.; Monticello, D.A.; Nelson, B.E.; Pomphrey, N.; Reiersen, W.T.; Reiman, A.H.; Rutherford, P.H.; Schmidt, J.A.; Spong, D.A.; Strickler, D.J.

    2002-01-01

    Compact stellarators have the potential to make steady-state, disruption-free magnetic fusion systems with beta approximately 5% and relatively low aspect ratio (R/ < 4.5) compared to most drift-optimized stellarators. Magnetic quasi-symmetry can be used to reduce orbit losses. The National Compact Stellarator Experiment (NCSX) is designed to test compact stellarator physics in a high-beta quasi-axisymmetric configuration and to determine the conditions for high-beta disruption-free operation. It is designed around a reference plasma with low ripple, good magnetic surfaces, and stability to the important ideal instabilities at beta approximately 4%. The device size, available heating power, and pulse lengths provide access to a high-beta target plasma state. The NCSX has magnetic flexibility to explore a wide range of equilibrium conditions and has operational flexibility to achieve a wide range of beta and collisionality values. The design provides space to accommodate plasma-facing components for divertor operation and ports for an extensive array of diagnostics

  5. DESIGNING ALGORITHMS FOR SOLVING PHYSICS PROBLEMS ON THE BASIS OF MIVAR APPROACH

    Directory of Open Access Journals (Sweden)

    Dmitry Alekseevich Chuvikov

    2017-05-01

    Full Text Available The paper considers the process of designing algorithms for solving physics problems on the basis of mivar approach. The work also describes general principles of mivar theory. The concepts of parameter, relation and class in mivar space are considered. There are descriptions of properties which every object in Wi!Mi model should have. An experiment in testing capabilities of the Wi!Mi software has been carried out, thus the model has been designed which solves physics problems from year 8 school course in Russia. To conduct the experiment a new version of Wi!Mi 2.1 software has been used. The physics model deals with the following areas: thermal phenomena, electric and electromagnetic phenomena, optical phenomena.

  6. Game theoretic analysis of physical protection system design

    International Nuclear Information System (INIS)

    Canion, B.; Schneider, E.; Bickel, E.; Hadlock, C.; Morton, D.

    2013-01-01

    The physical protection system (PPS) of a fictional small modular reactor (SMR) facility have been modeled as a platform for a game theoretic approach to security decision analysis. To demonstrate the game theoretic approach, a rational adversary with complete knowledge of the facility has been modeled attempting a sabotage attack. The adversary adjusts his decisions in response to investments made by the defender to enhance the security measures. This can lead to a conservative physical protection system design. Since defender upgrades were limited by a budget, cost benefit analysis may be conducted upon security upgrades. One approach to cost benefit analysis is the efficient frontier, which depicts the reduction in expected consequence per incremental increase in the security budget

  7. Impact of the 37M fuel design on reactor physics characteristics

    International Nuclear Information System (INIS)

    Perez, R.; Ta, P.

    2013-01-01

    For CANDU nuclear reactors, aging of the Heat Transport System (HTS) leads to, among other effects, a reduction on the Critical Heat Flux (CHF) and dryout margin. In an effort to mitigate the impact of aging of the HTS on safety margins, Bruce Power is introducing a design change to the standard 37-element fuel bundle known as the modified 37-element fuel bundle, or 37M for short. As part of the overall design change process it was necessary to assess the impact of the modified fuel bundle design on key reactor physics parameters. Quantification of this impact on lattice cell properties, core reactivity properties, etc., was reached through a series of calculations using state-of-the-art lattice and core physics models, and comparisons against results for the standard fuel bundle. (author)

  8. Advances in the physics basis for the European DEMO design

    Science.gov (United States)

    Wenninger, R.; Arbeiter, F.; Aubert, J.; Aho-Mantila, L.; Albanese, R.; Ambrosino, R.; Angioni, C.; Artaud, J.-F.; Bernert, M.; Fable, E.; Fasoli, A.; Federici, G.; Garcia, J.; Giruzzi, G.; Jenko, F.; Maget, P.; Mattei, M.; Maviglia, F.; Poli, E.; Ramogida, G.; Reux, C.; Schneider, M.; Sieglin, B.; Villone, F.; Wischmeier, M.; Zohm, H.

    2015-06-01

    In the European fusion roadmap, ITER is followed by a demonstration fusion power reactor (DEMO), for which a conceptual design is under development. This paper reports the first results of a coherent effort to develop the relevant physics knowledge for that (DEMO Physics Basis), carried out by European experts. The program currently includes investigations in the areas of scenario modeling, transport, MHD, heating & current drive, fast particles, plasma wall interaction and disruptions.

  9. Controlling Underwater Robots with Electronic Nervous Systems

    Directory of Open Access Journals (Sweden)

    Joseph Ayers

    2010-01-01

    Full Text Available We are developing robot controllers based on biomimetic design principles. The goal is to realise the adaptive capabilities of the animal models in natural environments. We report feasibility studies of a hybrid architecture that instantiates a command and coordinating level with computed discrete-time map-based (DTM neuronal networks and the central pattern generators with analogue VLSI (Very Large Scale Integration electronic neuron (aVLSI networks. DTM networks are realised using neurons based on a 1-D or 2-D Map with two additional parameters that define silent, spiking and bursting regimes. Electronic neurons (ENs based on Hindmarsh–Rose (HR dynamics can be instantiated in analogue VLSI and exhibit similar behaviour to those based on discrete components. We have constructed locomotor central pattern generators (CPGs with aVLSI networks that can be modulated to select different behaviours on the basis of selective command input. The two technologies can be fused by interfacing the signals from the DTM circuits directly to the aVLSI CPGs. Using DTMs, we have been able to simulate complex sensory fusion for rheotaxic behaviour based on both hydrodynamic and optical flow senses. We will illustrate aspects of controllers for ambulatory biomimetic robots. These studies indicate that it is feasible to fabricate an electronic nervous system controller integrating both aVLSI CPGs and layered DTM exteroceptive reflexes.

  10. Physics constraints on the design of fast reactor safety test facilities

    International Nuclear Information System (INIS)

    Travelli, A.; Meneghetti, D.; Matos, J.; Snelgrove, J.; Shaftman, D.H.; Tzanos, C.; Lam, S.K.; Pennington, E.M.; Woodruff, W.L.

    1976-01-01

    This paper discusses the physics foundations common to all fast reactor safety test facilities and the constraints which they impose on the design. While detailed design discussions are confined to the experience with six ANL designs, available data from other designs are used to confirm the validity of the considerations and to broaden the scope of the discussion. This helps to view the various designs as a unified effort, to define their potential capabilities, and to assess how they could best complement each other

  11. Lecture note on digital circuit design for high energy physics experiment

    International Nuclear Information System (INIS)

    Ikeda, Hirokazu.

    1993-08-01

    This lecture gives basic ideas and practice of the digital circuit design for high energy physics experiment. The lecture has a special emphasis on a simulation study with a hardware description language. The student could complete a design of a simple RISC based computer after finishing this course. (author)

  12. Design and fabrication of advanced hybrid circuits for high energy physics

    International Nuclear Information System (INIS)

    Haller, G.M.; Moss, J.; Freytag, D.R.; Nelson, D.; Yim, A.; Lo, C.C.

    1987-10-01

    Current design and fabrication techniques of hybrid devices are explained for the Drift Chamber and the Liquid Argon Calorimeter for the Stanford Linear Collider Large Detector (SLD) at SLAC. Methods of developing layouts, ranging from hand-cut templates to advanced designs utilizing CAD tools with special hybrid design software were applied. Physical and electrical design rules for good yield and performance are discussed. Fabrication and assembly of the SLD hybrids are described. 7 refs., 10 figs

  13. Entropy coders of the H.264/AVC standard

    CERN Document Server

    Tian, Xiaohua; Lian, Yong

    2010-01-01

    This book presents a collection of algorithms and VLSI architectures of entropy (or statistical) codecs of recent video compression standards, with focus on the H.264/AVC standard. For any visual data compression scheme, there exists a combination of two, or all of the following three stages: spatial, temporal, and statistical compression. General readers are first introduced with the various algorithms of the statistical coders. The VLSI implementations are also reviewed and discussed. Readers with limited hardware design background are also introduced with a design methodology starting from

  14. Designing a Physical Security System for Risk Reduction in a Hypothetical Nuclear Facility

    International Nuclear Information System (INIS)

    Saleh, A.A.; Abd Elaziz, M.

    2017-01-01

    Physical security in a nuclear facility means detection, prevention and response to threat, the ft, sabotage, unauthorized access and illegal transfer involving radioactive and nuclear material. This paper proposes a physical security system designing concepts to reduce the risk associated with variant threats to a nuclear facility. This paper presents a study of the unauthorized removal and sabotage in a hypothetical nuclear facility considering deter, delay and response layers. More over, the study involves performing any required upgrading to the security system by investigating the nuclear facility layout and considering all physical security layers design to enhance the weakness for risk reduction

  15. Design Impedance Mismatch Physical Unclonable Functions for IoT Security

    Directory of Open Access Journals (Sweden)

    Xiaomin Zheng

    2017-01-01

    Full Text Available We propose a new design, Physical Unclonable Function (PUF scheme, for the Internet of Things (IoT, which has been suffering from multiple-level security threats. As more and more objects interconnect on IoT networks, the identity of each thing is very important. To authenticate each object, we design an impedance mismatch PUF, which exploits random physical factors of the transmission line to generate a security unique private key. The characteristic impedance of the transmission line and signal transmission theory of the printed circuit board (PCB are also analyzed in detail. To improve the reliability, current feedback amplifier (CFA method is applied on the PUF. Finally, the proposed scheme is implemented and tested. The measure results show that impedance mismatch PUF provides better unpredictability and randomness.

  16. Fast breeder physics and nuclear core design

    International Nuclear Information System (INIS)

    Marth, W.; Schroeder, R.

    1983-07-01

    This report gathers the papers that have been presented on January 18/19, 1983 at a seminar ''Fast breeder physics and nuclear core design'' held at KfK. These papers cover the results obtained within about the last five years in the r+d program and give some indication, what still has to be done. To begin with, the ''tools'' of the core designer, i.e. nuclear data and neutronics codes are covered in a comprehensive way, the seminar emphasized the applications, however. First of all the accuracies obtained for the most important parameters are presented for the design of homogeneous and heterogeneous cores of about 1000 MWe, they are based on the results of critical experiments. This is followed by a survey on activities related to the KNK II reactor, i.e. calculations concerning a modification of the core as well as critical experiments done with respect to re-loads. Finally, work concerning reactivity worths of accident configurations is presented: the generation of reactivity worths for the input of safety-related calculations of a SNR 2 design, and critical experiments to investigate the requirements for the codes to be used for these calculations. These papers are accompanied by two contributions from the industrial partners. The first one deals with the requirements to nuclear design methods as seen by the reactor designer and then shows what has been achieved. The latter one presents state, trends, and methods of the SNR 2 design. The concluding remarks compare the state of the art reached within DeBeNe with international achievements. (orig.) [de

  17. Model-implementation fidelity in cyber physical system design

    CERN Document Server

    Fabre, Christian

    2017-01-01

    This book puts in focus various techniques for checking modeling fidelity of Cyber Physical Systems (CPS), with respect to the physical world they represent. The authors' present modeling and analysis techniques representing different communities, from very different angles, discuss their possible interactions, and discuss the commonalities and differences between their practices. Coverage includes model driven development, resource-driven development, statistical analysis, proofs of simulator implementation, compiler construction, power/temperature modeling of digital devices, high-level performance analysis, and code/device certification. Several industrial contexts are covered, including modeling of computing and communication, proof architectures models and statistical based validation techniques. Addresses CPS design problems such as cross-application interference, parsimonious modeling, and trustful code production Describes solutions, such as simulation for extra-functional properties, extension of cod...

  18. The Contribution of Virtual Reality Software to Design in Teaching Physical Education

    Directory of Open Access Journals (Sweden)

    Esther Zaretsky

    2011-08-01

    Full Text Available Up to date research shows that training with virtual software develops the design of virtual simulations by physical education pre service teachers. The design of virtual simulations improved spatial skills, especially visualization of the body

  19. Coupled Physics Environment (CouPE) library - Design, Implementation, and Release

    Energy Technology Data Exchange (ETDEWEB)

    Mahadevan, Vijay S. [Argonne National Lab. (ANL), Argonne, IL (United States)

    2014-09-30

    Over several years, high fidelity, validated mono-­physics solvers with proven scalability on peta-­scale architectures have been developed independently. Based on a unified component-­based architecture, these existing codes can be coupled with a unified mesh-­data backplane and a flexible coupling-­strategy-­based driver suite to produce a viable tool for analysts. In this report, we present details on the design decisions and developments on CouPE, an acronym that stands for Coupled Physics Environment that orchestrates a coupled physics solver through the interfaces exposed by MOAB array-­based unstructured mesh, both of which are part of SIGMA (Scalable Interfaces for Geometry and Mesh-­Based Applications) toolkit. The SIGMA toolkit contains libraries that enable scalable geometry and unstructured mesh creation and handling in a memory and computationally efficient implementation. The CouPE version being prepared for a full open-­source release along with updated documentation will contain several useful examples that will enable users to start developing their applications natively using the native MOAB mesh and couple their models to existing physics applications to analyze and solve real world problems of interest. An integrated multi-­physics simulation capability for the design and analysis of current and future nuclear reactor models is also being investigated as part of the NEAMS RPL, to tightly couple neutron transport, thermal-­hydraulics and structural mechanics physics under the SHARP framework. This report summarizes the efforts that have been invested in CouPE to bring together several existing physics applications namely PROTEUS (neutron transport code), Nek5000 (computational fluid-dynamics code) and Diablo (structural mechanics code). The goal of the SHARP framework is to perform fully resolved coupled physics analysis of a reactor on heterogeneous geometry, in order to reduce the overall numerical uncertainty while leveraging

  20. MOD/R : A knowledge assisted approach towards top-down only CMOS VLSI design

    NARCIS (Netherlands)

    Spaanenburg, L.; Beunder, M.; Beune, F.A.; Gerez, Sabih H.; Holstein, B.; Luchtmeyer, R.C.C.; Smit, Jaap; van der Werf, A.; Willems, H.

    1985-01-01

    MOD/R models all views on the design space in relations. This is achieved by eliminating the package constraints, as are apparent in PCB oriented hardware description languages. Assisted by knowledge engineering it allows for a top-down, mostly hierarchical decomposition, virtually eliminating the

  1. Switched-capacitor techniques for high-accuracy filter and ADC design

    NARCIS (Netherlands)

    Quinn, P.J.; Roermund, van A.H.M.

    2007-01-01

    Switched capacitor (SC) techniques are well proven to be excellent candidates for implementing critical analogue functions with high accuracy, surpassing other analogue techniques when embedded in mixed-signal CMOS VLSI. Conventional SC circuits are primarily limited in accuracy by a) capacitor

  2. The VLSI design of the sub-band filterbank in MP3 decoding

    Science.gov (United States)

    Liu, Jia-Xin; Luo, Li

    2018-03-01

    The sub-band filterbank is one of the most important modules which has the largest amount of calculation in MP3 decoding. In order to save CPU resources and integrate the sub-band filterbank part into MP3 IP core, the hardware circuit of the sub-band filterbank module is designed in this paper. A fast algorithm suit for hardware implementation is proposed and achieved on FPGA development board. The results show that the sub-band filterbank function is correct in the case of using very few registers and the amount of calculation and ROM resources are reduced greatly.

  3. Therese: presentation of the project

    Energy Technology Data Exchange (ETDEWEB)

    Pendibidu, J M

    1982-05-01

    Therese (Terabit Reseau) is a project built around a powerful local network with high transmission speed. A lot of goodies have been incorporated to the product in order that it can be used as a general multi-purpose tool in such areas as software engineering, artificial intelligence, robotics, office automation, VLSI design, fundamental mechanics, theoretical physics, applied mathematics, computer assisted education, high speed satellite communications, performance evaluation, general system theory, reliability, high resolution graphics, public messages, private messages, fast Fourier transform, personal computing, image processing, etc. 11 references.

  4. A Near-Lossless Image Compression Algorithm Suitable for Hardware Design in Wireless Endoscopy System

    Directory of Open Access Journals (Sweden)

    Xie Xiang

    2007-01-01

    Full Text Available In order to decrease the communication bandwidth and save the transmitting power in the wireless endoscopy capsule, this paper presents a new near-lossless image compression algorithm based on the Bayer format image suitable for hardware design. This algorithm can provide low average compression rate ( bits/pixel with high image quality (larger than dB for endoscopic images. Especially, it has low complexity hardware overhead (only two line buffers and supports real-time compressing. In addition, the algorithm can provide lossless compression for the region of interest (ROI and high-quality compression for other regions. The ROI can be selected arbitrarily by varying ROI parameters. In addition, the VLSI architecture of this compression algorithm is also given out. Its hardware design has been implemented in m CMOS process.

  5. KIT multi-physics tools for the analysis of design and beyond design basis accidents of light water reactors

    International Nuclear Information System (INIS)

    Sanchez, Victor Hugo; Miassoedov, Alexei; Steinbrueck, M.; Tromm, W.

    2016-01-01

    This paper describes the KIT numerical simulation tools under extension and validation for the analysis of design and beyond design basis accidents (DBA) of Light Water Reactors (LWR). The description of the complex thermal hydraulic, neutron kinetics and chemo-physical phenomena going on during off-normal conditions requires the development of multi-physics and multi-scale simulations tools which are fostered by the rapid increase in computer power nowadays. The KIT numerical tools for DBA and beyond DBA are validated using experimental data of KIT or from abroad. The developments, extensions, coupling approaches and validation work performed at KIT are shortly outlined and discussed in this paper.

  6. KIT multi-physics tools for the analysis of design and beyond design basis accidents of light water reactors

    Energy Technology Data Exchange (ETDEWEB)

    Sanchez, Victor Hugo; Miassoedov, Alexei; Steinbrueck, M.; Tromm, W. [Karlsruhe Institute of Technology (KIT), Eggenstein-Leopoldshafen (Germany)

    2016-05-15

    This paper describes the KIT numerical simulation tools under extension and validation for the analysis of design and beyond design basis accidents (DBA) of Light Water Reactors (LWR). The description of the complex thermal hydraulic, neutron kinetics and chemo-physical phenomena going on during off-normal conditions requires the development of multi-physics and multi-scale simulations tools which are fostered by the rapid increase in computer power nowadays. The KIT numerical tools for DBA and beyond DBA are validated using experimental data of KIT or from abroad. The developments, extensions, coupling approaches and validation work performed at KIT are shortly outlined and discussed in this paper.

  7. Physical models and primary design of reactor based slow positron source at CMRR

    Science.gov (United States)

    Wang, Guanbo; Li, Rundong; Qian, Dazhi; Yang, Xin

    2018-07-01

    Slow positron facilities are widely used in material science. A high intensity slow positron source is now at the design stage based on the China Mianyang Research Reactor (CMRR). This paper describes the physical models and our primary design. We use different computer programs or mathematical formula to simulate different physical process, and validate them by proper experiments. Considering the feasibility, we propose a primary design, containing a cadmium shield, a honeycomb arranged W tubes assembly, electrical lenses, and a solenoid. It is planned to be vertically inserted in the Si-doping channel. And the beam intensity is expected to be 5 ×109

  8. Automated Design of Board and MCM Level Digital Systems.

    Science.gov (United States)

    1997-10-01

    Object- Oriented Programming, 7(6):39-49, October 1994. 46 December 14, 1994 33 [3] Stephen J. Garland, John V. Guttag, and James J. Horning...of Digital Circuits. Mc Graw Hill, 1994. 15 APPENDIX G: ... 93 Multicomponent Partitioning for VLSI System Synthesis Nand Kumar and Ranga Vemuri

  9. Neuromorphic neural interfaces: from neurophysiological inspiration to biohybrid coupling with nervous systems

    Science.gov (United States)

    Broccard, Frédéric D.; Joshi, Siddharth; Wang, Jun; Cauwenberghs, Gert

    2017-08-01

    Objective. Computation in nervous systems operates with different computational primitives, and on different hardware, than traditional digital computation and is thus subjected to different constraints from its digital counterpart regarding the use of physical resources such as time, space and energy. In an effort to better understand neural computation on a physical medium with similar spatiotemporal and energetic constraints, the field of neuromorphic engineering aims to design and implement electronic systems that emulate in very large-scale integration (VLSI) hardware the organization and functions of neural systems at multiple levels of biological organization, from individual neurons up to large circuits and networks. Mixed analog/digital neuromorphic VLSI systems are compact, consume little power and operate in real time independently of the size and complexity of the model. Approach. This article highlights the current efforts to interface neuromorphic systems with neural systems at multiple levels of biological organization, from the synaptic to the system level, and discusses the prospects for future biohybrid systems with neuromorphic circuits of greater complexity. Main results. Single silicon neurons have been interfaced successfully with invertebrate and vertebrate neural networks. This approach allowed the investigation of neural properties that are inaccessible with traditional techniques while providing a realistic biological context not achievable with traditional numerical modeling methods. At the network level, populations of neurons are envisioned to communicate bidirectionally with neuromorphic processors of hundreds or thousands of silicon neurons. Recent work on brain-machine interfaces suggests that this is feasible with current neuromorphic technology. Significance. Biohybrid interfaces between biological neurons and VLSI neuromorphic systems of varying complexity have started to emerge in the literature. Primarily intended as a

  10. 78 FR 69139 - Physical Security-Design Certification and Operating Reactors

    Science.gov (United States)

    2013-11-18

    ... Operating Reactors AGENCY: Nuclear Regulatory Commission. ACTION: Standard review plan--draft section..., ``Physical Security--Design Certification and Operating Reactors.'' The public comment period was originally....regulations.gov and search for Docket ID NRC-2013-0225. Address questions about NRC dockets to Carol Gallagher...

  11. Research in Geant4 electromagnetic physics design, and its effects on computational performance and quality assurance

    CERN Document Server

    Augelli, M; Hauf, S; Kim, C H; Kuster, M; Pia, M G; Filho, P Queiroz; Quintieri, L; Saracco, P; Santos, D Souza; Weidenspointner, G; Zoglauer, A

    2009-01-01

    The Geant4 toolkit offers a rich variety of electromagnetic physics models; so far the evaluation of this Geant4 domain has been mostly focused on its physics functionality, while the features of its design and their impact on simulation accuracy, computational performance and facilities for verification and validation have not been the object of comparable attention yet, despite the critical role they play in many experimental applications. A new project is in progress to study the application of new design concepts and software techniques in Geant4 electromagnetic physics, and to evaluate how they can improve on the current simulation capabilities. The application of a policy-based class design is investigated as a means to achieve the objective of granular decomposition of processes; this design technique offers various advantages in terms of flexibility of configuration and computational performance. The current Geant4 physics models have been re-implemented according to the new design as a pilot project....

  12. Modeling Organizational Design - Applying A Formalism Model From Theoretical Physics

    Directory of Open Access Journals (Sweden)

    Robert Fabac

    2008-06-01

    Full Text Available Modern organizations are exposed to diverse external environment influences. Currently accepted concepts of organizational design take into account structure, its interaction with strategy, processes, people, etc. Organization design and planning aims to align this key organizational design variables. At the higher conceptual level, however, completely satisfactory formulation for this alignment doesn’t exist. We develop an approach originating from the application of concepts of theoretical physics to social systems. Under this approach, the allocation of organizational resources is analyzed in terms of social entropy, social free energy and social temperature. This allows us to formalize the dynamic relationship between organizational design variables. In this paper we relate this model to Galbraith's Star Model and we also suggest improvements in the procedure of the complex analytical method in organizational design.

  13. Designing quantum information processing via structural physical approximation.

    Science.gov (United States)

    Bae, Joonwoo

    2017-10-01

    In quantum information processing it may be possible to have efficient computation and secure communication beyond the limitations of classical systems. In a fundamental point of view, however, evolution of quantum systems by the laws of quantum mechanics is more restrictive than classical systems, identified to a specific form of dynamics, that is, unitary transformations and, consequently, positive and completely positive maps to subsystems. This also characterizes classes of disallowed transformations on quantum systems, among which positive but not completely maps are of particular interest as they characterize entangled states, a general resource in quantum information processing. Structural physical approximation offers a systematic way of approximating those non-physical maps, positive but not completely positive maps, with quantum channels. Since it has been proposed as a method of detecting entangled states, it has stimulated fundamental problems on classifications of positive maps and the structure of Hermitian operators and quantum states, as well as on quantum measurement such as quantum design in quantum information theory. It has developed efficient and feasible methods of directly detecting entangled states in practice, for which proof-of-principle experimental demonstrations have also been performed with photonic qubit states. Here, we present a comprehensive review on quantum information processing with structural physical approximations and the related progress. The review mainly focuses on properties of structural physical approximations and their applications toward practical information applications.

  14. Designing a questionnaire on physical activity habits and lifestyle from the Delphi method

    Directory of Open Access Journals (Sweden)

    Estefanía Castillo Viera

    2012-02-01

    Full Text Available Nowadays there are numerous questionnaires studying physical activity habits, lifestyle and health (IPAQ, SF-36, EQ-5D. The problem arises when trying to design a new tool for use in a specific population that has specific characteristics and which seeks to explore aspects related to the area in which it develops. The main objective of this study was to design a questionnaire on physical activity and lifestyle of the university population. To prepare this Delphi method was used, a procedure based on expert consultation through a steering group and a group of experts to cast their opinions on a cyclical basis of the topic until they reach a consensus. In our case, a questionnaire was developed with seven dimensions and 55 items. The results lead us to make a positive assessment of the use of the Delphi method to design the questionnaire and ensuring greater validity.Key words: Physical activity habits, lifestyle, Delphi method.

  15. Physics design and scaling of recirculating induction accelerators: from benchtop prototypes to drivers

    International Nuclear Information System (INIS)

    Barnard, J.J.; Cable, M.D.; Callahan, D.A.

    1996-01-01

    Recirculating induction accelerators (recirculators) have been investigated as possible drivers for inertial fusion energy production because of their potential cost advantage over linear induction accelerators. Point designs were obtained and many of the critical physics and technology issues that would need to be addressed were detailed. A collaboration involving Lawrence Livermore National Laboratory and Lawrence Berkeley National Laboratory researchers is now developing a small prototype recirculator in order to demonstrate an understanding of nearly all of the critical beam dynamics issues that have been raised. We review the design equations for recirculators and demonstrate how, by keeping crucial dimensionless quantities constant, a small prototype recirculator was designed which will simulate the essential beam physics of a driver. We further show how important physical quantities such as the sensitivity to errors of optical elements (in both field strength and placement), insertion/extraction, vacuum requirements, and emittance growth, scale from small-prototype to driver-size accelerator

  16. Physical protection design and analysis training for the former Soviet Union

    International Nuclear Information System (INIS)

    Soo Hoo, M.S.; Chapek, J.F.; Ebel, P.E.

    1996-01-01

    Since 1978, Sandia National Laboratories has provided training courses in the systematic design of Physical Protection Systems (PPS). One such course, the International Training Course (TC) on the Physical Protection of Nuclear Facilities and Materials, is sponsored by the Department of Energy's International Safeguards Division , the International Atomic Energy Agency, and the Department of State. Since 1978, twelve 3- and 4-week classes have been conducted by Sandia for these sponsors. One- and two-week adaptations of this course have been developed for other customers, and, since 1994, nine of these abbreviated courses have been presented in the Russian language to participants from the Former Soviet Union (SU). These courses have been performed in support of the Department of Energy's program on Material Protection, Control and Accounting (MPC ampersand A) for the Russian Federation and the Newly Independent States. MPC ampersand A physical protection training assumes participants have more narrowly defined backgrounds. In using affective approaches, the overall goal of training in the context of the MPC ampersand A Program is to develop modern and effective, indigenous capabilities for physical protection system design and analysis within the SU. This paper contrasts the cognitive and affective approaches to training and indicates why different approaches are required for the ITC and the MPC ampersand A Programs

  17. Handbook of Modern Sensors Physics, Designs, and Applications

    CERN Document Server

    Fraden, Jacob

    2010-01-01

    This book is about devices commonly called sensors. Digital systems, however complex and intelligent they might be, must receive information from the outside world that is generally analog and not electrical. Sensors are interface devices between various physical values and the electronic circuits who "understand" only a language of moving electrical charges. In other words, sensors are the eyes, ears, and noses of silicon chips. Unlike other books on sensors, this book is organized according to the measured variables (temperature, pressure, position, etc.) that make it much more practical and easier to read. In this new edition recent ideas and developments have been added while less important and non-essential designs were dropped. Sections on practical designs and use of the modern micro-machining technologies have been revised substantially. This book is a reference text that can be used by students, researchers interested in modern instrumentation (applied physicists and engineers), sensor designers, app...

  18. Physical and Model Uncertainty for Fatigue Design of Composite Material

    DEFF Research Database (Denmark)

    Toft, Henrik Stensgaard; Sørensen, John Dalsgaard

    The main aim of the present report is to establish stochastic models for the uncertainties related to fatigue design of composite materials. The uncertainties considered are the physical uncertainty related to the static and fatigue strength and the model uncertainty related to Miners rule...

  19. Physical Plant Design and Engineering Controls to Reduce Hospital-Acquired Infections

    Directory of Open Access Journals (Sweden)

    JM Conly

    2006-01-01

    Full Text Available The importance of the environment as a reservoir for microorganisms implicated in disease transmission in the hospital setting has been increasingly recognized, especially with respect to dialysis units, ventilation in specialized areas, and the proper use of disinfectants (1. Inherent within the environmental setting is the importance of physical plant design. Several studies have underscored the importance of optimizing design standards to maximize patient and health care worker (HCW safety, including the prevention of hospital-acquired infections in patients (2-6. Ulrich et al (7 recently completed an evidence-based review, entitled 'The role of the physical environment in the hospital of the 21st century: A once-in-a-lifetime opportunity', for the Center for Health Design in California (USA, which was funded by the Robert Wood Johnson Foundation. Ulrich and colleagues identified over 600 studies that examined the hospital environment and its effects on staff effectiveness, patient safety, patient and family stress, quality and costs. They suggested that one of the important elements in improving patient safety is the reduction of the risk of hospital-acquired infections through improved facility design.

  20. A Mixed Analog-Digital Radiation Hard Technology for High Energy Physics Electronics: DMILL~(Durci~Mixte~sur~Isolant~Logico-Lineaire)

    CERN Multimedia

    Lugiez, F; Leray, J; Rouger, M; Fourches, N T; Musseau, O; Potheau, R

    2002-01-01

    %RD29 %title\\\\ \\\\Physics experiments under preparation with the future LHC require a fast, low noise, very rad-hard (>10 Mrad and >10$^{14}$ neutron/cm$^{2}$), mixed analog-digital microelectronics VLSI technology.\\\\ \\\\The DMILL microelectronics technology (RD29) was developed between 1990 and 1995 by a Consortium gathering the CEA and the firm Thomson-TCS, with the collaboration of IN2P3. The goal of the DMILL program, which is now completed, was to provide the High Energy Physics community, space industry, nuclear industry, and other applications, with an industrial very rad-hard mixed analog-digital microelectronics technology.\\\\ \\\\DMILL integrates mixed analog-digital very rad-hard (>10 Mrad and >10$^{14}$ neutron/cm$^{2}$) vertical bipolar, 0.8 $\\mu$m CMOS and 1.2 $\\mu$m PJFET transistors. Its SOI substrate and its dielectric trenches strongly reduce SEU sensitivity and completely eliminate any possibility of latch-up. Its four transistors are optimized to obtain low-noise features. DMILL also integrates...

  1. Physics design of the upgraded TREAT reactor

    International Nuclear Information System (INIS)

    Bhattacharyya, S.K.; Lell, R.M.; Liaw, J.R.; Ulrich, A.J.; Wade, D.C.; Yang, S.T.

    1980-01-01

    With the deferral of the Safety Test Facility (STF), the TREAT Upgrade (TU) reactor has assumed a lead role in the US LMFBR safety test program for the foreseeable future. The functional requirements on TU require a significant enhancement of the capability of the current TREAT reactor. A design of the TU reactor has been developed that modifies the central 11 x 11 fuel assembly array of the TREAT reactor such as to provide the increased source of hard spectrum neutrons necessary to meet the functional requirements. A safety consequence of the increased demands on TU is that the self limiting operation capability of TREAT has proved unattainable, and reliance on a safety grade Plant Protection System is necessary to ensure that no clad damage occurs under postulated low-probability reactivity accidents. With that constraint, the physics design of TU provides a means of meeting the functional requirements with a high degree of confidence

  2. CLIC CDR - physics and detectors: CLIC conceptual design report.

    Energy Technology Data Exchange (ETDEWEB)

    Berger, E.; Demarteau, M.; Repond, J.; Xia, L.; Weerts, H. (High Energy Physics); (Many)

    2012-02-10

    This report forms part of the Conceptual Design Report (CDR) of the Compact LInear Collider (CLIC). The CLIC accelerator complex is described in a separate CDR volume. A third document, to appear later, will assess strategic scenarios for building and operating CLIC in successive center-of-mass energy stages. It is anticipated that CLIC will commence with operation at a few hundred GeV, giving access to precision standard-model physics like Higgs and top-quark physics. Then, depending on the physics landscape, CLIC operation would be staged in a few steps ultimately reaching the maximum 3 TeV center-of-mass energy. Such a scenario would maximize the physics potential of CLIC providing new physics discovery potential over a wide range of energies and the ability to make precision measurements of possible new states previously discovered at the Large Hadron Collider (LHC). The main purpose of this document is to address the physics potential of a future multi-TeV e{sup +}e{sup -} collider based on CLIC technology and to describe the essential features of a detector that are required to deliver the full physics potential of this machine. The experimental conditions at CLIC are significantly more challenging than those at previous electron-positron colliders due to the much higher levels of beam-induced backgrounds and the 0.5 ns bunch-spacing. Consequently, a large part of this report is devoted to understanding the impact of the machine environment on the detector with the aim of demonstrating, with the example of realistic detector concepts, that high precision physics measurements can be made at CLIC. Since the impact of background increases with energy, this document concentrates on the detector requirements and physics measurements at the highest CLIC center-of-mass energy of 3 TeV. One essential output of this report is the clear demonstration that a wide range of high precision physics measurements can be made at CLIC with detectors which are challenging, but

  3. Towards Primary School Physics Teaching and Learning: Design Research Approach. Research Report 256

    Science.gov (United States)

    Juuti, Kalle

    2005-01-01

    This thesis describes a project to design a primary school physics learning environment which takes into account teachers' needs, design procedures, properties of the learning environment, and pupil learning outcomes. The project's design team has wide experience in research and development work in relation to science education, the use of ICT in…

  4. Research on PCPV for BWR - physical model as design tool - main results

    International Nuclear Information System (INIS)

    Fumagalli, E.; Verdelli, G.

    1975-01-01

    ISMES (Experimental Institute for Models and Structures) is now carrying out a series of tests on physical models as a part of a research programme sponsored by DSR (Studies and Research Direction) of ENEL (Italian State Electricity Board) on behalf of CPN (Nuclear Design and Construction Centre) of ENEL with the aim to experience a 'Thin'-walled PCPV for 'BWR'. The physical model, together with the mathematical model and the rheological model of the materials, is intended as a meaningful design tool. The mathematical model covers the overall structural design phase, (geometries) and the linear behaviour, whereas the physical model, besides of a global information to be compared with the results of the mathematical model, supplies a number of data as the non-linear behaviour up to failure and local conditions (penetration area etc.) are concerned. The aim of the first phase of this research programme is to make a comparison between the calculation and experiment tests as the thicknesses of the wall and the bottom slab are concerned, whereas the second phase of the research deals with the behaviour of the removable lid and its connection with the main structure. To do this, a model in scale 1:10 has been designed which symmetrically reproduces with respect to the equator, the bottom part of the structure. In the bottom slab the penetrations of the prototype design are reproduced, whereas the upper slab is plain. This paper describes the model, and illustrates the main results, underlining the different behaviour of the upper and bottom slabs up to collapse

  5. Multi-Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization

    National Research Council Canada - National Science Library

    Selvakkumaran, Navaratnasothie; Karypis, George

    2004-01-01

    ... subdomain degree are simultaneously minimized. This type of partitionings are critical for existing and emerging applications in VLSI CAD as they allow to both minimize and evenly distribute the interconnects across the physical devices...

  6. Identification and sensitivity analysis of a correlated ground rule system (design arc)

    Science.gov (United States)

    Eastman, Eric; Chidambarrao, Dureseti; Rausch, Werner; Topaloglu, Rasit O.; Shao, Dongbing; Ramachandran, Ravikumar; Angyal, Matthew

    2017-04-01

    We demonstrate a tool which can function as an interface between VLSI designers and process-technology engineers throughout the Design-Technology Co-optimization (DTCO) process. This tool uses a Monte Carlo algorithm on the output of lithography simulations to model the frequency of fail mechanisms on wafer. Fail mechanisms are defined according to process integration flow: by Boolean operations and measurements between original and derived shapes. Another feature of this design rule optimization methodology is the use of a Markov-Chain-based algorithm to perform a sensitivity analysis, the output of which may be used by process engineers to target key process-induced variabilities for improvement. This tool is used to analyze multiple Middle-Of-Line fail mechanisms in a 10nm inverter design and identify key process assumptions that will most strongly affect the yield of the structures. This tool and the underlying algorithm are also shown to be scalable to arbitrarily complex geometries in three dimensions. Such a characteristic which is becoming more important with the introduction of novel patterning technologies and more complex 3-D on-wafer structures.

  7. Design of data sampler in intelligent physical start-up system for nuclear reactor

    International Nuclear Information System (INIS)

    Wang Yinli; Ling Qiu

    2007-01-01

    It introduces the design of data sampler in intelligent physical start-up system for nuclear reactor. The hardware frame taking STμPSD3234A as the core and the firmware design based on USB interface are discussed. (authors)

  8. Multichannel readout ASIC design flow for high energy physics and cosmic rays experiments

    International Nuclear Information System (INIS)

    Voronin, A; Malankin, E

    2016-01-01

    In the large-scale high energy physics and astrophysics experiments multi-channel readout application specific integrated circuits (ASICs) are widely used. The ASICs for such experiments are complicated systems, which usually include both analog and digital building blocks. The complexity and large number of channels in such ASICs require the proper methodological approach to their design. The paper represents the mixed-signal design flow of the ASICs for high energy physics and cosmic rays experiments. This flow was successfully embedded to the development of the read-out ASIC prototype for the muon chambers of the CBM experiment. The approach was approved in UMC CMOS MMRF 180 nm process. The design flow enable to analyse the mixed-signal system operation on the different levels: functional, behavioural, schematic and post layout including parasitic elements. The proposed design flow allows reducing the simulation period and eliminating the functionality mismatches on the very early stage of the design. (paper)

  9. Physically Connected Stacked Patch Antenna Design with 100% Bandwidth

    KAUST Repository

    Klionovski, Kirill; Shamim, Atif

    2017-01-01

    Typically, stacked patch antennas are parasitically coupled and provide larger bandwidth than a single patch antenna. Here, we show a stacked patch antenna design where square patches with semi-circular cutouts are physically connected to each other. This arrangement provides 100% bandwidth from 23.9–72.2 GHz with consistent high gain (5 dBi or more) across the entire bandwidth. In another variation, a single patch loaded with a superstrate provides 83.5% bandwidth from 25.6–62.3 GHz. The mechanism of bandwidth enhancement is explained through electromagnetic simulations. Measured reflection coefficient, radiation patterns and gain results confirm the extremely wideband performance of the design.

  10. Physically Connected Stacked Patch Antenna Design with 100% Bandwidth

    KAUST Repository

    Klionovski, Kirill

    2017-11-01

    Typically, stacked patch antennas are parasitically coupled and provide larger bandwidth than a single patch antenna. Here, we show a stacked patch antenna design where square patches with semi-circular cutouts are physically connected to each other. This arrangement provides 100% bandwidth from 23.9–72.2 GHz with consistent high gain (5 dBi or more) across the entire bandwidth. In another variation, a single patch loaded with a superstrate provides 83.5% bandwidth from 25.6–62.3 GHz. The mechanism of bandwidth enhancement is explained through electromagnetic simulations. Measured reflection coefficient, radiation patterns and gain results confirm the extremely wideband performance of the design.

  11. Physics design of the HL-2A tokamak

    International Nuclear Information System (INIS)

    Gao Qingdi; Li Fangzhu; Zhang Jinhua; Pan Yudong; Jiao Yiming

    2005-10-01

    An overview report for the physics design of the HL-2A tokamak is presented. By numerically analyzing the plasma shaping and the vertical instability due to plasma elongation, the requirements for the currents of poloidal magnetic field coils and the control system are put forward. Controlling the plasma profile by using NBI (neutral beam injection) and LHCD (lower hybrid current drive) is investigated, and the high performance modes of operation in HL-2A and modeled and designed. The magnetohydrodynamic instabilities in improved confinement configuration (RS configuration) are studied so as to point out the way of plasma control to perform stationary high performance discharges in HL-2A. In order to offer data for updating the HL-2A divertor, performances of the divertor plasma are simulated. (authors)

  12. The Effectiveness of Scaffolding Design in Training Writing Skills Physics Teaching Materials

    Directory of Open Access Journals (Sweden)

    Parlindungan Sinaga

    2015-01-01

    Full Text Available Result of field studies showed low writing skill of teachers in teaching material. The root of the problem lies in their inability on translating description of teaching material into writing. This research focused on the effectiveness of scaffolding design. The scaffolding design was tested in the selected topics of physics courses for pre-service teachers through learning to write activity approach. The treatment effectiveness was determined by considering the effect size and normalized gain percentage, while the hypothesis was tested using “the Kruskal-Wallis test”. The research results showed that scaffolding between the stages of planning and translating plans into text was effective in improving pre-service physics teachers’ ability of writing physics teaching materials and was similarly effective in improving their conceptual understanding of the topics of electromagnetism, waves, and optics. Learning to write activity implemented in the course of physics with selected topics was effective in improving the ability of pre-service teachers in translating among different modes of representation and making multiple concept representations. The hypothesis test demonstrated that there was a significant difference in the abilities of writing teaching materials and conceptual understanding between experimental and control classes.

  13. Architecture and program structures for a special purpose finite element computer

    Energy Technology Data Exchange (ETDEWEB)

    Norrie, D.H.; Norrie, C.W.

    1983-01-01

    The development of very large scale integration (VLSI) has made special-purpose computers economically possible. With such a machine, the loss of flexibility compared with a general-purpose computer can be offset by the increased speed which can be obtained by tailoring the architecture to the particular problem or class of problem. The first kind of special-purpose machine has its architecture modelled on the physical structure of the problem and the second kind has its design tailored to the computational algorithm used. The parallel finite element machine (PARFEM) being designed at the University of Calgary for the solution of finite element problems is of the second kind. Its conceptual design is described and progress to date outlined. 14 references.

  14. Municipal Officials’ Perceived Barriers to Consideration of Physical Activity in Community Design Decision Making

    Science.gov (United States)

    Goins, Karin Valentine; Schneider, Kristin L.; Brownson, Ross; Carnoske, Cheryl; Evenson, Kelly; Eyler, Amy; Heinrich, Katie; Litt, Jill; Lyn, Rodney; Maddock, Jay; Reed, Hannah; Tompkins, Nancy O’Hara; Lemon, Stephenie C.

    2016-01-01

    Context Built environment-focused interventions and policies are recommended as sustainable approaches for promoting physical activity. Physical activity has not traditionally been considered in land use and transportation decision making. Effective collaboration with non-public health partners requires knowledge of their perceived barriers to consideration of physical activity in decision making. Objective This study aimed to 1) identify barriers to the consideration of physical activity in community design and planning decisions among municipal decision makers and 2) explore differences in these barriers among a wide range of job functions and departments in a geographically diverse sample. Design A web-based survey was conducted among municipal officials in 94 cities and towns with populations of at least 50,000 residents in eight states. Participants 453 municipal officials from public health, planning, transportation/public works, community and economic development, parks and recreation, city management, and municipal legislatures responded to the survey. Main Outcome Measures Five barriers to consideration of physical activity in community design and layout were assessed. Results The most common barriers included lack of political will (23.5%), limited staff (20.4%) and lack of collaboration across municipal departments (16.2%). Fewer participants reported opposition from the business community or residents as barriers. Compared to other professionals, public health department personnel were more likely to report the barriers of limited staff and lack of collaboration across municipal departments. They were also more likely to report lack of political will compared to city managers or mayors and municipal legislators. Conclusions Barriers to increasing consideration of physical activity in decision making about community design and layout are encouragingly low. Implications for public health practice include the need to strategically increase political will

  15. Physics design of fissile mass-flow monitoring system

    International Nuclear Information System (INIS)

    Mattingly, J.K.; March-Leuba, J.; Valentine, T.E.; Mihalczo, J.T.; Uckan, T.

    1997-01-01

    The system measures the flow rate and uranium-235 content in liquid or gas streams; it does not penetrate the process piping. A moderated fission neutron source is used to periodicially introduce a burst of thermal neutrons into the fluid stream to induce fission; delayed gamma emissions from the resulting fission fragments are detected by high-efficiency scintillators downstream of the neutron source. The fluid flow rate is measure from the time between initiation of the thermal neutron burst and detection of the fission product gamma emissions, and the U-235 content is inferred from the intensity of the gamma burst detected. Design of the fissile mass flow monitor requires satisfaction of several competing constraints. Efficient operation of the monitor requires that source-induced fission rate and detection efficiency be maximized while the source-induced background rate is simultaneoulsy minimized. Near optical nuclear design of the system was achieved using numerous Monte Carlo calculations and measurements. This paper addresses calculational aspects of the physics design for the system applied to UF 6 gas

  16. Evaluating the Physical Environment of Design Studios: A Case study in Malaysian Private Architecture Schools

    Directory of Open Access Journals (Sweden)

    Shanthi Muniandy

    2015-09-01

    Full Text Available Understanding the notion of learner’s experiences in the design of physical environment of an architecture design studio is a necessity as it contains certain values of influence. It is due to the unique learning experiences which are accrued particularly in design studio that is continued during professional practice as well. Most architectural campuses in Malaysian Private Higher Education Institutions (MPHEI are devoid of certain important elements and this issue needs to be looked into seriously. Apparently, most architectural design studios today have different physical settings, and have developed their own learning culture based on the typical space that they have. Reviewing the physical environment and how it contributes to the social environ-ment in MPHEI’s architectural context requires certain understanding on the learner’s psycho-logical needs, expectations and in the same time to meet the educational objective which is never an easy task. Hence, this paper reviewed the studies of the possible physical environment approaches in connecting the learner’s connections in architecture studio learning environ-ment. A questionnaire survey with Likert-scale components, and semi-structured interview on learners of five distinguished Private Architectural schools in Malaysia unveiled several signifi-cant findings that can lead entrepreneurs to upgrade the physical environment of these MPHEIs in order to cope with the demands of the stakeholders.

  17. Application specific Tester-On-a-Resident-Chip (TORCH{trademark}) - innovation in the area of semiconductor testing

    Energy Technology Data Exchange (ETDEWEB)

    Bowles, M. [L& M Technologies, Albuquerque, NM (United States); Peterson, T. [New Mexico Highlands Univ., Las Vegas, NM (United States); Savignon, D.; Campbell, D. [Sandia National Labs., Albuquerque, NM (United States)

    1997-12-01

    Manufacturers widely recognize testing as a major factor in the cost, producability, and delivery of product in the $100 billion integrated circuit business: {open_quotes}The rapid development of VLSI using sub-micron CMOS technology has suddenly exposed traditional test techniques as a major cost factor that could restrict the development of VLSI devices exceeding 512 pins an operating frequencies above 200 MHz.{close_quotes} -- 1994 Semiconductor Industry Association Roadmap, Design and Test, Summary, pg. 43. This problem increases dramatically for stockpile electronics, where small production quantities make it difficult to amortize the cost of increasingly expensive testers. Application of multiple ICs in Multi-Chip Modules (MCM) greatly multiplies testing problems for commercial and defense users alike. By traditional test methods, each new design requires custom test hardware and software and often dedicated testing equipment costing millions of dollars. Also, physical properties of traditional test systems often dedicated testing equipment costing millions of dollars. Also, physical properties of traditional test systems limit capabilities in testing at-speed (>200 MHz), high-impedance, and high-accuracy analog signals. This project proposed a revolutionary approach to these problems: replace the multi-million dollar external test system with an inexpensive test system integrated onto the product wafer. Such a methodology enables testing functions otherwise unachievable by conventional means, particularly in the areas of high-frequency, at-speed testing, high impedance analog circuits, and known good die assessment. The techniques apply specifically to low volume applications, typical of Defense Programs, where testing costs represent an unusually high proportional of product costs, not easily amortized.

  18. Handbook of modern sensors physics, designs, and applications

    CERN Document Server

    Fraden, Jacob

    2016-01-01

    This book presents a comprehensive and up-to-date account of the theory (physical principles), design, and practical implementations of various sensors for scientific, industrial, and consumer applications. This latest edition focuses on the sensing technologies driven by the expanding use of sensors in mobile devices. These new miniature sensors will be described, with an emphasis on smart sensors which have embedded processing systems. The chapter on chemical sensors has also been expanded to present the latest developments. Digital systems, however complex and intelligent they may be, must receive information from the outside world that is generally analog and not electrical. Sensors are interface devices between various physical values and the electronic circuits that "understand" only a language of moving electrical charges. In other words, sensors are the eyes, ears, and noses of silicon chips. Unlike other books on sensors, the Handbook of Modern Sensors is organized according to the measured variables...

  19. Public open space, physical activity, urban design and public health: Concepts, methods and research agenda.

    Science.gov (United States)

    Koohsari, Mohammad Javad; Mavoa, Suzanne; Villanueva, Karen; Sugiyama, Takemi; Badland, Hannah; Kaczynski, Andrew T; Owen, Neville; Giles-Corti, Billie

    2015-05-01

    Public open spaces such as parks and green spaces are key built environment elements within neighbourhoods for encouraging a variety of physical activity behaviours. Over the past decade, there has been a burgeoning number of active living research studies examining the influence of public open space on physical activity. However, the evidence shows mixed associations between different aspects of public open space (e.g., proximity, size, quality) and physical activity. These inconsistencies hinder the development of specific evidence-based guidelines for urban designers and policy-makers for (re)designing public open space to encourage physical activity. This paper aims to move this research agenda forward, by identifying key conceptual and methodological issues that may contribute to inconsistencies in research examining relations between public open space and physical activity. Copyright © 2015 Elsevier Ltd. All rights reserved.

  20. Physical design of the positron induced auger electron spectrometer

    International Nuclear Information System (INIS)

    Qin Xiubo; Jiang Xiaopan; Wang Ping; Yu Runsheng; Wang Baoyi; Wei Long

    2009-01-01

    Positron Annihilation Induced Auger Electron Spectroscopy (PAES) has several advantages over those excited by X-rays, high energy electrons or neutrons, such as excellent surface selectivity, high signal-to-noise ratio, low radiation damage,etc. A physical design of time of flight PAES (TOF-PAES) apparatus based on the Beijing Intense Slow Positron Beam (BIPB) is described in this paper. The positrons and electrons are transported in a 4 x 10 -3 T uniform magnetic field, and the gradient of magnetic field is designed to pluralize the Auger electrons emitted with 2π angle. The Auger electron energy is adjusted by a Faraday cage to optimize the energy resolution,which can be better than 2 eV. (authors)

  1. Physical Properties for Lipids Based Process and Product Design

    DEFF Research Database (Denmark)

    Ana Perederic, Olivia; Kalakul, Sawitree; Sarup, Bent

    Lipid processing covers several oil and fats technologies such as: edible oil production, biodieselproduction, oleochemicals (e.g.: food additives, detergents) and pharmaceutical product manufacturing. New demands regarding design and development of better products and more sustainable processes...... related to lipids technology, emerge according to consumers demanding improved product manufacturing from sustainable resources and new legislation regarding environmental safety [1]. Physical and thermodynamic property data and models for prediction of pure compound properties and mixtures properties...... involving lipids represent the basic and most important requirements for process product design, simulation and optimization. Experimentally measured values of involved compounds are desirable, but in most of the cases these are not available for all the compounds and properties needed. The lack...

  2. Nanometer CMOS ICs from basics to ASICs

    CERN Document Server

    J M Veendrick, Harry

    2017-01-01

    This textbook provides a comprehensive, fully-updated introduction to the essentials of nanometer CMOS integrated circuits. It includes aspects of scaling to even beyond 12nm CMOS technologies and designs. It clearly describes the fundamental CMOS operating principles and presents substantial insight into the various aspects of design implementation and application. Coverage includes all associated disciplines of nanometer CMOS ICs, including physics, lithography, technology, design, memories, VLSI, power consumption, variability, reliability and signal integrity, testing, yield, failure analysis, packaging, scaling trends and road blocks. The text is based upon in-house Philips, NXP Semiconductors, Applied Materials, ASML, IMEC, ST-Ericsson, TSMC, etc., courseware, which, to date, has been completed by more than 4500 engineers working in a large variety of related disciplines: architecture, design, test, fabrication process, packaging, failure analysis and software.

  3. Evaluation of a course designed to teach physics to students of physiotherapy

    Science.gov (United States)

    Simpson, Ian A.; Singer, Kevin P.; Treagust, David; Zadnik, Marjan G.

    1990-01-01

    This paper describes the development and evaluation of a course in physiotherapy whereby the physics fundamental to the modalities of cold, heat and ultrasound therapies was integrated in lectures and actual physiotherapy activities. The design of the course is described together with the perceptions of physiotherapy students regarding the organisation of the course, safety aspects and how well the integration contributed to their understanding of the physics involved in electrotherapy.

  4. Worksite interventions for preventing physical deterioration among employees in job-groups with high physical work demands: background, design and conceptual model of FINALE

    DEFF Research Database (Denmark)

    Holtermann, Andreas; Jørgensen, Marie B; Gram, Bibi

    2010-01-01

    physical demands remains to be established. This paper describes the background, design and conceptual model of the FINALE programme, a framework for health promoting interventions at 4 Danish job groups (i.e. cleaners, health-care workers, construction workers and industrial workers) characterized by high......A mismatch between individual physical capacities and physical work demands enhance the risk for musculoskeletal disorders, poor work ability and sickness absence, termed physical deterioration. However, effective intervention strategies for preventing physical deterioration in job groups with high...... physical work demands, musculoskeletal disorders, poor work ability and sickness absence....

  5. Physics design of a 70 MeV high intensity cyclotron, CYCIAE-70

    International Nuclear Information System (INIS)

    Zhang Tianjue; An Shizhong; Wang Chuan; Yin Zhiguo; Wei Sumin; Li Ming; Yang Jianjun; Ji Bin; Jia Xianlu; Zhong Junqing; Yang Fang

    2011-01-01

    This paper introduces the physics design of a 70 MeV high intensity cyclotron at China Institute of Atomic Energy (CIAE), which is aimed for multiple uses including radioactive ion-beam (RIB) production. The machine adopts a compact structure of four straight sectors, capable of accelerating two kinds of beams, i.e. H − and D − . The proton and deuteron beam will be extracted in dual opposite directions by charge exchange stripping devices. The energy of the extracted proton beam is in the range 35–70 MeV with an intensity up to 700 μA. The corresponding values for the deuteron beam are 18–33 MeV and 40 μA. This paper will present the main characteristics and parameters in the design of the 70 MeV cyclotron, the results of the basic beam dynamics study, as well as the physics in the design of the different systems, including the main magnet, RF, injection and extraction systems, etc.

  6. Scalable System Design for Covert MIMO Communications

    Science.gov (United States)

    2014-06-01

    Vehicles US United States VHDL VHSIC Hardware Description Language VLSI Very Large Scale Integration WARP Wireless open-Access Research Platform WLAN ...communications, satellite radio and Wireless Local Area Network ( WLAN ) OFDM has been utilized for its multi-path resistance. OFDM relies on the...develop hardware specific to the application provides faster computation times, making FPGA development a very powerful tool. 2.5.1 MIMO Receiver Latency

  7. Design of a Modular Monolithic Implicit Solver for Multi-Physics Applications

    Science.gov (United States)

    Carton De Wiart, Corentin; Diosady, Laslo T.; Garai, Anirban; Burgess, Nicholas; Blonigan, Patrick; Ekelschot, Dirk; Murman, Scott M.

    2018-01-01

    The design of a modular multi-physics high-order space-time finite-element framework is presented together with its extension to allow monolithic coupling of different physics. One of the main objectives of the framework is to perform efficient high- fidelity simulations of capsule/parachute systems. This problem requires simulating multiple physics including, but not limited to, the compressible Navier-Stokes equations, the dynamics of a moving body with mesh deformations and adaptation, the linear shell equations, non-re effective boundary conditions and wall modeling. The solver is based on high-order space-time - finite element methods. Continuous, discontinuous and C1-discontinuous Galerkin methods are implemented, allowing one to discretize various physical models. Tangent and adjoint sensitivity analysis are also targeted in order to conduct gradient-based optimization, error estimation, mesh adaptation, and flow control, adding another layer of complexity to the framework. The decisions made to tackle these challenges are presented. The discussion focuses first on the "single-physics" solver and later on its extension to the monolithic coupling of different physics. The implementation of different physics modules, relevant to the capsule/parachute system, are also presented. Finally, examples of coupled computations are presented, paving the way to the simulation of the full capsule/parachute system.

  8. Physics Analyses in the Design of the HFIR Cold Neutron Source

    International Nuclear Information System (INIS)

    Bucholz, J.A.

    1999-01-01

    Physics analyses have been performed to characterize the performance of the cold neutron source to be installed in the High Flux Isotope Reactor at the Oak Ridge National Laboratory in the near future. This paper provides a description of the physics models developed, and the resulting analyses that have been performed to support the design of the cold source. These analyses have provided important parametric performance information, such as cold neutron brightness down the beam tube and the various component heat loads, that have been used to develop the reference cold source concept

  9. Electronic shift register memory based on molecular electron-transfer reactions

    Science.gov (United States)

    Hopfield, J. J.; Onuchic, Jose Nelson; Beratan, David N.

    1989-01-01

    The design of a shift register memory at the molecular level is described in detail. The memory elements are based on a chain of electron-transfer molecules incorporated on a very large scale integrated (VLSI) substrate, and the information is shifted by photoinduced electron-transfer reactions. The design requirements for such a system are discussed, and several realistic strategies for synthesizing these systems are presented. The immediate advantage of such a hybrid molecular/VLSI device would arise from the possible information storage density. The prospect of considerable savings of energy per bit processed also exists. This molecular shift register memory element design solves the conceptual problems associated with integrating molecular size components with larger (micron) size features on a chip.

  10. Impact of line edge roughness on the performance of 14-nm FinFET: Device-circuit Co-design

    Science.gov (United States)

    Rathore, Rituraj Singh; Rana, Ashwani K.

    2018-01-01

    With the evolution of sub-20 nm FinFET technology, line edge roughness (LER) has been identified as a critical problem and may result in critical device parameter variation and performance limitation in the future VLSI circuit application. In the present work, an analytical model of fin-LER has been presented, which shows the impact of correlated and uncorrelated LER on FinFET structure. Further, the influence of correlated and uncorrelated fin- LER on all electrical performance parameters is thoroughly investigated using the three-dimensional (3-D) Technology Computer Aided Design (TCAD) simulations for 14-nm technology node. Moreover, the impact of all possible fin shapes on threshold voltage (VTH), drain induced barrier lowering (DIBL), on-current (ION), and off-current (IOFF) has been compared with the well calibrated rectangular FinFET structure. In addition, the influence of all possible fin geometries on the read stability of six-transistor (6-T) Static-Random-Access-Memory (SRAM) has been investigated. The study reveals that fin-LER plays a vital role as it directly governs the electrostatics of the FinFET structure. This has been found that there is a high degree of fluctuations in all performance parameters for uncorrelated fin-LER type FinFETs as compared to correlated fin-LER with respect to rectangular FinFET structure. This paper gives physical insight of FinFET design, especially in sub-20 nm technology nodes by concluding that the impact of LER on electrical parameters are minimum for correlated LER.

  11. Developing a Conceptual Framework for Participatory Design of Psychosocial and Physical Learning Environments

    Science.gov (United States)

    Mäkelä, Tiina; Helfenstein, Sacha

    2016-01-01

    The present study shows how the mixed-methods approach can be used in capturing and organising learning environment (LE) characteristics for the participatory design of psychosocial and physical LEs involving learners. Theoretical constructs were tested and further elaborated on in the analysis of two similar educational design research studies:…

  12. Physical Environment as a 3-D Textbook: Design and Development of a Prototype

    Science.gov (United States)

    Kong, Seng Yeap; Yaacob, Naziaty Mohd; Ariffin, Ati Rosemary Mohd

    2015-01-01

    The use of the physical environment as a three-dimensional (3-D) textbook is not a common practice in educational facilities design. Previous researches documented that little progress has been made to incorporate environmental education (EE) into architecture, especially among the conventional designers who are often constrained by the budget and…

  13. Design of a Website on Nutrition and Physical Activity for Adolescents: Results From Formative Research

    OpenAIRE

    Thompson, Debbe; Cullen, Karen Weber; Boushey, Carol; Konzelmann, Karen

    2012-01-01

    Background Teens do not meet guidelines for healthy eating and physical activity. The Internet may be an effective method for delivering programs that help them adopt healthy behaviors. Objective To collect information to design content and structure for a teen-friendly website promoting healthy eating and physical activity behaviors. Methods Qualitative research, encompassing both focus group and interview techniques, were used to design the website. Participants were 12-17 year olds in Hous...

  14. Design methodology for the physical protection upgrade rule requirements for fixed sites. Technical report

    International Nuclear Information System (INIS)

    Evans, L.J. Jr.; Allen, T.

    1980-06-01

    This Design Methodology document aids the licensee in understanding how the fixed site requirements of the Physical Protection Upgrade Rule affect the design of physical protection systems for fuel processing plants, fuel manufacturing plants, or other fixed site special nuclear material operations involving possession or use of formula quantities of strategic special nuclear material. The document consists of three major elements: Logic Trees, Safeguards Jobs and Component Matrices, and Effectiveness Test Questionnaires. The work is based upon a previous study conducted by Sandia Laboratories for the Nuclear Regulatory Commission

  15. Physics design of fast reactor safety test facilities for in-pile experiments

    International Nuclear Information System (INIS)

    Travelli, A.; Matos, J.E.; Snelgrove, J.L.; Shaftman, D.H.; Tzanos, C.P.; Lam, S.K.; Pennington, E.M.; Woodruff, W.L.

    1976-01-01

    A determined effort to identify and resolve current Fast Breeder Reactor safety testing needs has recently resulted in a number of conceptual designs for FBR safety test facilities which are very complex and diverse both in their features and in their purpose. The paper discusses the physics foundations common to most fast reactor safety test facilities and the constraints which they impose on the design. The logical evolution, features, and capabilities of several major conceptual designs are discussed on the basis of this common background

  16. Rapid Industrial Prototyping and SoC Design of 3G/4G Wireless Systems Using an HLS Methodology

    Directory of Open Access Journals (Sweden)

    Andres Takach

    2006-07-01

    Full Text Available Many very-high-complexity signal processing algorithms are required in future wireless systems, giving tremendous challenges to real-time implementations. In this paper, we present our industrial rapid prototyping experiences on 3G/4G wireless systems using advanced signal processing algorithms in MIMO-CDMA and MIMO-OFDM systems. Core system design issues are studied and advanced receiver algorithms suitable for implementation are proposed for synchronization, MIMO equalization, and detection. We then present VLSI-oriented complexity reduction schemes and demonstrate how to interact these high-complexity algorithms with an HLS-based methodology for extensive design space exploration. This is achieved by abstracting the main effort from hardware iterations to the algorithmic C/C++ fixed-point design. We also analyze the advantages and limitations of the methodology. Our industrial design experience demonstrates that it is possible to enable an extensive architectural analysis in a short-time frame using HLS methodology, which significantly shortens the time to market for wireless systems.

  17. Rapid Industrial Prototyping and SoC Design of 3G/4G Wireless Systems Using an HLS Methodology

    Directory of Open Access Journals (Sweden)

    Cavallaro JosephR

    2006-01-01

    Full Text Available Many very-high-complexity signal processing algorithms are required in future wireless systems, giving tremendous challenges to real-time implementations. In this paper, we present our industrial rapid prototyping experiences on 3G/4G wireless systems using advanced signal processing algorithms in MIMO-CDMA and MIMO-OFDM systems. Core system design issues are studied and advanced receiver algorithms suitable for implementation are proposed for synchronization, MIMO equalization, and detection. We then present VLSI-oriented complexity reduction schemes and demonstrate how to interact these high-complexity algorithms with an HLS-based methodology for extensive design space exploration. This is achieved by abstracting the main effort from hardware iterations to the algorithmic C/C++ fixed-point design. We also analyze the advantages and limitations of the methodology. Our industrial design experience demonstrates that it is possible to enable an extensive architectural analysis in a short-time frame using HLS methodology, which significantly shortens the time to market for wireless systems.

  18. A new Variable Resolution Associative Memory for High Energy Physics

    CERN Document Server

    Annovi, A; The ATLAS collaboration; Beretta, M; Bossini, E; Crescioli, F; Dell'Orso, M; Giannetti, P; Hoff, J; Liberali, V; Liu, T; Magalotti, D; Piendibene, M; Sacco, A; Schoening, A; Soltveit, H K; Stabile, A; Tripiccione, R; Vitillo, R; Volpi, G

    2011-01-01

    We describe an important advancement for the Associative Memory device (AM). The AM is a VLSI processor for pattern recognition based on Content Addressable Memory (CAM) architecture. The AM is optimized for on-line track finding in high-energy physics experiments. Pattern matching is carried out finding track candidates in coarse resolution “roads”. A large AM bank stores all trajectories of interest, called “patterns”, for a given detector resolution. The AM extracts roads compatible with a given event during detector read-out. Two important variables characterize the quality of the AM bank: its “coverage” and the level of “found fakes”. The coverage, which describes the geometric efficiency of a bank, is defined as the fraction of tracks that match at least a pattern in the bank. Given a certain road size, the coverage of the bank can be increased just adding patterns to the bank, while the number of found fakes unfortunately is roughly proportional to this number of patterns in the bank. M...

  19. The physics design of the Australian synchrotron storage ring

    International Nuclear Information System (INIS)

    Boldeman, J.W.; Einfeld, D.

    2004-01-01

    This paper describes the physics design of the Australian Synchrotron Storage Ring--Boomerang, which is currently under construction on a site adjacent to Monash University in Melbourne, Victoria. It also includes brief historical notes on the development of the proposal, some background material on the Australian synchrotron research community and preliminary information on possible research programs on the new facility. The facility itself is now in the early stages of construction under the leadership of Seaborne and Jackson

  20. Visual-Simulation-Based Personalized Garment Block Design Method for Physically Disabled People with Scoliosis (PDPS

    Directory of Open Access Journals (Sweden)

    Hong Yan

    2018-03-01

    Full Text Available This research presented a novel method using 3D simulation methods to design customized garments for physically disabled people with scoliosis (PDPS. The proposed method is based on the virtual human model created from 3D scanning, permitting to simulate the consumer’s morphological shape with atypical physical deformations. Next, customized 2D and 3D virtual garment prototyping tools will be used to create products through interactions. The proposed 3D garment design method is based on the concept of knowledge-based design, using the design knowledge and process already applied to normal body shapes successfully. The characters of the PDPS and the relationship between human body and garment are considered in the prototyping process. As a visualized collaborative design process, the communication between designer and consumer is ensured, permitting to adapt the finished product to disabled people afflicted with severe scoliosis.

  1. Development and characterization of high-resolution neutron pixel detectors based on Timepix read-out chips

    Czech Academy of Sciences Publication Activity Database

    Krejčí, F.; Žemlička, J.; Jakoubek, J.; Dudák, J.; Vavřík, D.; Koster, U.; Atkins, D.; Kaestner, A.; Šoltéš, J.; Viererbl, L.; Vacík, Jiří; Tomandl, Ivo

    2016-01-01

    Roč. 11, DEC (2016), č. článku C12026. ISSN 1748-0221 R&D Projects: GA TA ČR TA01010237 Institutional support: RVO:61389005 Keywords : neutron detector s * Pixalated detector s and associated VLSI electronics Subject RIV: BG - Nuclear, Atomic and Molecular Physics, Colliders OBOR OECD: Nuclear physics Impact factor: 1.220, year: 2016

  2. An optimal adder-based hardware architecture for the DCT/SA-DCT

    Science.gov (United States)

    Kinane, Andrew; Muresan, Valentin; O'Connor, Noel

    2005-07-01

    The explosive growth of the mobile multimedia industry has accentuated the need for ecient VLSI implemen- tations of the associated computationally demanding signal processing algorithms. This need becomes greater as end-users demand increasingly enhanced features and more advanced underpinning video analysis. One such feature is object-based video processing as supported by MPEG-4 core profile, which allows content-based in- teractivity. MPEG-4 has many computationally demanding underlying algorithms, an example of which is the Shape Adaptive Discrete Cosine Transform (SA-DCT). The dynamic nature of the SA-DCT processing steps pose significant VLSI implementation challenges and many of the previously proposed approaches use area and power consumptive multipliers. Most also ignore the subtleties of the packing steps and manipulation of the shape information. We propose a new multiplier-less serial datapath based solely on adders and multiplexers to improve area and power. The adder cost is minimised by employing resource re-use methods. The number of (physical) adders used has been derived using a common sub-expression elimination algorithm. Additional energy eciency is factored into the design by employing guarded evaluation and local clock gating. Our design implements the SA-DCT packing with minimal switching using ecient addressing logic with a transpose mem- ory RAM. The entire design has been synthesized using TSMC 0.09µm TCBN90LP technology yielding a gate count of 12028 for the datapath and its control logic.

  3. The Dit nuclear fuel assembly physics design code

    International Nuclear Information System (INIS)

    Jonsson, A.

    1987-01-01

    DIT is the Combustion Engineering, Inc. (C-E) nuclear fuel assembly design code. It belongs to a class of codes, all similar in structure and strategy, which may be characterized by the spectrum and spatial calculations being performed in 2D and in a single job step for the entire assembly. The forerunner of this class of codes is the U.K.A.E.A. WIMS code, the first version of which was completed 25 years ago. The structure and strategy of assembly spectrum codes have remained remarkably similar to the original concept thus proving its usefulness. As other organizations, including C-E, have developed their own versions of the concept, many important variations have been added which significantly influence the accuracy and performance of the resulting computational tool. This paper describes and discusses those features which are unique to the DIT code and which might be of interest to the community of fuel assembly physics design code users and developers

  4. The DIT nuclear fuel assembly physics design code

    International Nuclear Information System (INIS)

    Jonsson, A.

    1988-01-01

    The DIT code is the Combustion Engineering, Inc. (C-E) nuclear fuel assembly design code. It belongs to a class of codes, all similar in structure and strategy, that may be characterized by the spectrum and spatial calculations being performed in two dimensions and in a single job step for the entire assembly. The forerunner of this class of codes is the United Kingdom Atomic Energy Authority WIMS code, the first version of which was completed 25 yr ago. The structure and strategy of assembly spectrum codes have remained remarkably similar to the original concept thus proving its usefulness. As other organizations, including C-E, have developed their own versions of the concept, many important variations have been added that significantly influence the accuracy and performance of the resulting computational tool. Those features, which are unique to the DIT code and which might be of interest to the community of fuel assembly physics design code users and developers, are described and discussed

  5. A unified modeling approach for physical experiment design and optimization in laser driven inertial confinement fusion

    Energy Technology Data Exchange (ETDEWEB)

    Li, Haiyan [Mechatronics Engineering School of Guangdong University of Technology, Guangzhou 510006 (China); Huang, Yunbao, E-mail: Huangyblhy@gmail.com [Mechatronics Engineering School of Guangdong University of Technology, Guangzhou 510006 (China); Jiang, Shaoen, E-mail: Jiangshn@vip.sina.com [Laser Fusion Research Center, China Academy of Engineering Physics, Mianyang 621900 (China); Jing, Longfei, E-mail: scmyking_2008@163.com [Laser Fusion Research Center, China Academy of Engineering Physics, Mianyang 621900 (China); Tianxuan, Huang; Ding, Yongkun [Laser Fusion Research Center, China Academy of Engineering Physics, Mianyang 621900 (China)

    2015-11-15

    Highlights: • A unified modeling approach for physical experiment design is presented. • Any laser facility can be flexibly defined and included with two scripts. • Complex targets and laser beams can be parametrically modeled for optimization. • Automatically mapping of laser beam energy facilitates targets shape optimization. - Abstract: Physical experiment design and optimization is very essential for laser driven inertial confinement fusion due to the high cost of each shot. However, only limited experiments with simple structure or shape on several laser facilities can be designed and evaluated in available codes, and targets are usually defined by programming, which may lead to it difficult for complex shape target design and optimization on arbitrary laser facilities. A unified modeling approach for physical experiment design and optimization on any laser facilities is presented in this paper. Its core idea includes: (1) any laser facility can be flexibly defined and included with two scripts, (2) complex shape targets and laser beams can be parametrically modeled based on features, (3) an automatically mapping scheme of laser beam energy onto discrete mesh elements of targets enable targets or laser beams be optimized without any additional interactive modeling or programming, and (4) significant computation algorithms are additionally presented to efficiently evaluate radiation symmetry on the target. Finally, examples are demonstrated to validate the significance of such unified modeling approach for physical experiments design and optimization in laser driven inertial confinement fusion.

  6. Design and Implementation of a linear-phase equalizer in digital audio signal processing

    NARCIS (Netherlands)

    Slump, Cornelis H.; van Asma, C.G.M.; Barels, J.K.P.; Barels, J.K.P.; Brunink, W.J.A; Drenth, F.B.; Pol, J.V.; Schouten, D.S.; Samsom, M.M.; Samsom, M.M.; Herrmann, O.E.

    1992-01-01

    This contribution presents the four phases of a project aiming at the realization in VLSI of a digital audio equalizer with a linear phase characteristic. The first step includes the identification of the system requirements, based on experience and (psycho-acoustical) literature. Secondly, the

  7. Integration of educational methods and physical settings: design guidelines for High/Scope methodology in pre-schools

    Directory of Open Access Journals (Sweden)

    Shirin Izadpanah

    2014-06-01

    Full Text Available Quality design and appropriate space organization in preschool settings can support preschool children's educational activities. Although the relationship between the well-being and development of children and physical settings has been emphasized by many early childhood researchers, there is still a need for theoretical design guidelines that are geared towards the improvement of this issue. This research focuses on High/Scope education and aims to shape a theoretical guideline that raises teachers' awareness about the potential of learning spaces and guides them to improve the quality of the physical spaces. To create a theoretical framework, reliable sources are investigated in the light of High/Scope education and the requirements of pre-school children educational spaces. Physical space characteristics, the preschool child's requirements and High/Scope methodology identified design inputs, design considerations and recommendations that shape the final guideline for spatial arrangement in a High/Scope setting are integrated. Discussions and suggestions in this research benefit both designers and High/ Scope teaching staff. Results help High/Scope teaching staff increase the quality of a space in an educational setting without having an architectural background. The theoretical framework of the research allows designers to consider key features and users' possible activities in High/ Scope settings and shape their designs accordingly.

  8. Design of multiple representations e-learning resources based on a contextual approach for the basic physics course

    Science.gov (United States)

    Bakri, F.; Muliyati, D.

    2018-05-01

    This research aims to design e-learning resources with multiple representations based on a contextual approach for the Basic Physics Course. The research uses the research and development methods accordance Dick & Carey strategy. The development carried out in the digital laboratory of Physics Education Department, Mathematics and Science Faculty, Universitas Negeri Jakarta. The result of the process of product development with Dick & Carey strategy, have produced e-learning design of the Basic Physics Course is presented in multiple representations in contextual learning syntax. The appropriate of representation used in the design of learning basic physics include: concept map, video, figures, data tables of experiment results, charts of data tables, the verbal explanations, mathematical equations, problem and solutions example, and exercise. Multiple representations are presented in the form of contextual learning by stages: relating, experiencing, applying, transferring, and cooperating.

  9. New developments in double sided silicon strip detectors

    International Nuclear Information System (INIS)

    Becker, H.; Boulos, T.; Cattaneo, P.; Dietl, H.; Hauff, D.; Holl, P.; Lange, E.; Lutz, G.; Moser, H.G.; Schwarz, A.S.; Settles, R.; Struder, L.; Kemmer, J.; Buttler, W.

    1990-01-01

    A new type of double sided silicon strip detector has been built and tested using highly density VLSI readout electronics connected to both sides. Capacitive coupling of the strips to the readout electronics has been achieved by integrating the capacitors into the detector design, which was made possible by introducing a new detector biasing concept. Schemes to simplify the technology of the fabrication of the detectors are discussed. The static performance properties of the devices as well as implications of the use of VLSI electronics in their readout are described. Prototype detectors of the described design equipped with high density readout electronics have been installed in the ALEPH detector at LEP. Test results on the performance are given

  10. Designing and Inhabiting Virtual Environments: Bridging the gap between physical and virtual

    Directory of Open Access Journals (Sweden)

    Matevž Juvančič

    2012-01-01

    Full Text Available Bringing the trilogy of the Erasmus intensive programme together in 2010, the Faculty of Architecture organised the third workshop in the series “Designing and Inhabiting Virtual Environments - DIVE”, addressing an elusive issue: “Bridging the gap between the physical and virtual” with the reference site of Križanke. During the 10-day intensive workshop, the participants developed a theoretical discussion based on a series of lectures, and afterwards pursued analyses of the reference site and designed spatial interventions with an emphasis on respecting the fragile nature of the site. From the very beginning to the end of their work, the participants analysed the boundaries between physical and virtual reality, examined the pros and cons of each, and sought possible integrations of both entities within a seamless and effective conceptual and actual representation.

  11. Modularly Integrated MEMS Technology

    National Research Council Canada - National Science Library

    Eyoum, Marie-Angie N

    2006-01-01

    Process design, development and integration to fabricate reliable MEMS devices on top of VLSI-CMOS electronics without damaging the underlying circuitry have been investigated throughout this dissertation...

  12. Design of Video Games for Children’s Diet and Physical Activity Behavior Change

    OpenAIRE

    Baranowski, Tom; Thompson, Debbe; Buday, Richard; Lu, Amy Shirong; Baranowski, Janice

    2010-01-01

    Serious video games (VG) offer new opportunities for promoting health related diet and physical activity change among children. Games can be designed to use storylines, characters, and behavior change procedures, including modeling (e.g., engaging characters make changes themselves, and face and overcome challenges related to fruit and vegetable (FV) and physical activity (PA) goal attainment and/or consumption), skill development (e.g., asking behaviors; virtual recipe preparation), self reg...

  13. ClassBeacons: designing distributed visualization of teachers’ physical proximity in the classroom.

    NARCIS (Netherlands)

    An, P.; Bakker, S.; Ordanovski, S.; Taconis, R.; Eggen, J.H.

    2018-01-01

    Pengcheng An, Saskia Bakker, Sara Ordanovski, Ruurd Taconis, Berry Eggen. 2018 (accepted at Oct 2017). ClassBeacons: designing distributed visualization of teachers’ physical proximity in the classroom. In Proceedings of Tangible and Embodied Interaction, TEI 2018, Mar 18-21, 2018,

  14. The physical work environment and end-user requirements: Investigating marine engineering officers' operational demands and ship design.

    Science.gov (United States)

    Mallam, Steven C; Lundh, Monica

    2016-08-12

    Physical environments influence how individuals perceive a space and behave within it. Previous research has revealed deficiencies in ship engine department work environments, and their impact on crew productivity, health and wellbeing. Connect operational task demands to pragmatic physical design and layout solutions by implementing a user-centric perspective. Three focus groups, each consisting of three marine engineers participated in this study. Focus groups were divided into two sessions: first, to investigate the end-user's operational requirements and their relationship with ship physical design and layout. Second, criteria formulated from group discussions were applied to a ship design case study. All focus group sessions were audio recorded and transcribed verbatim. The data were analyzed using Grounded Theory. Design choices made in a ships general arrangement were described to inherently influence how individuals and teams are able to function within the system. Participants detailed logistical relationships between key areas, stressing that the work environment and physical linkages must allow for flexibility of work organization and task execution. Traditional engine control paradigms do not allow effective mitigation of traditional engine department challenges. The influence of technology and modernization of ship systems can facilitate improvement of physical environments and work organization if effectively utilized.

  15. A new “Variable Resolution Associative Memory” for High Energy Physics

    CERN Document Server

    Annovi, A; The ATLAS collaboration; Beretta, M; Bossini, E; Crescioli, F; Dell'Orso, M; Giannetti, P; Hoff, J; Liberali, V; Liu, T; Magalotti, D; Piendibene, M; Sacco, A; Schoening, A; Soltveit, H K; Stabile, A; Tripiccione, R; Vitillo, R; Volpi, G

    2011-01-01

    We describe an important advancement for the Associative Memory device (AM). The AM is a VLSI processor for pattern recognition based on Content Addressable Memory (CAM) architecture. The AM is optimized for on-line track finding in high-energy physics experiments. Pattern matching is carried out finding track candidates in coarse resolution “roads”. A large AM bank stores all trajectories of interest, called “patterns”, for a given detector resolution. The AM extracts roads compatible with a given event during detector read-out. Two important variables characterize the quality of the AM bank: its “coverage” and the level of “found fakes”. The coverage, which describes the geometric efficiency of a bank, is defined as the fraction of tracks that match at least a pattern in the bank. Given a certain road size, the coverage of the bank can be increased just adding patterns to the bank, while the number of found fakes unfortunately is roughly proportional to this number of patterns in the bank. M...

  16. Dr Julia King CBE FREng, Chief Executive Designate, Institute of Physics (United Kingdom), visiting the NA48 experiment.

    CERN Multimedia

    Patrice Loïez

    2002-01-01

    Photo 02: Visiting the NA48 experiment, Dr Julia King, Chief Executive Designate, Institute of Physics (Britain and Ireland) (right) with A. Ceccucci and K. Peach. Photo 05: Visiting the NA48 experiment, Dr Julia King, Chief Executive Designate, Institute of Physics (Britain and Ireland) (centre) with A. Ceccucci and C. Lazzeroni. Photo 08: Visiting the NA48 experiment, Dr Julia King, Chief Executive Designate, Institute of Physics (Britain and Ireland) (second from left) with (left to right) R. Barlow, J. Wood, N. McCubbin, K. Peach, A. Ceccucci, C. Lazzeroni, M. Patel and D. Munday.

  17. Meeting the physics design challenges of modern LWRs being inducted into the Indian nuclear power programme

    International Nuclear Information System (INIS)

    Jagannathan, V.; Pal, Usha; Karthikeyan, R.; Raj, Devesh; Srivastava, Argala; Khan, Suhail Ahmad

    2007-01-01

    Indian nuclear power programme started with the two Boiling Water Reactors (BWR) of 210 MWe capacity at Tarapur. Two VVER-1000 MWe reactors which are Pressurized Water Reactors (PWR) of Russian design are being constructed at Kudankulam, Tamilnadu and are expected to be commissioned by end 2008. There may be also a possibility of inducting some western PWRs in future. These reactors belong to the category of light water reactors (LWR). The LWRs are compact and have complex physical characteristics distinctly different from those of the Pressurized Heavy Water Reactors (PHWR) which, currently form the mainstay of our indigenous nuclear power programme. The physics design and analysis capability for the modern LWRs (BWR, PWR and VVER) has been developed at Light Water Reactors Physics Section, BARC. This paper presents the current state of art in this key technology area to meet the physics design and operation challenges when LWRs would be inducted in a major way into the Indian nuclear power programme and commence operating in the coming decades. (author)

  18. Exergames for physical education: an overview about interaction design perspectives

    Directory of Open Access Journals (Sweden)

    Francesco Sgrò

    2013-08-01

    Full Text Available Exertion games represent an interesting, funny and innovative way to involve people in physical activities, fighting with troublesome phenomenon of obesity in children and young. In the educational context ICT technologies represent a basic instruments of the learning process. In literature several studies addressed the videogame’s implication in the learning process. In this work the interaction design aspects dealing with the use of exergames in physical activities educational process will be analysed using the same approach proposed by Mueller et al. (2011. In detail we will focus on the corporeal experience descended from the interaction procedure. An ideal graphical user interface for exergames is also presented. Moreover, an analysis of the most shared devices for exergames will be depictured. The paper infers the useful interaction elements that can improve the learning process of physical education, as well as transfer effect that may correlate with health and social outcomes. Furthermore, this work suggests the theoretical approach which has to guide the development of exergames for educational environment.

  19. Design of video games for children's diet and physical activity behavior change

    Science.gov (United States)

    Serious video games (VG) offer new opportunities for promoting health related diet, and physical activity change among children. Games can be designed to use storylines, characters, and behavior change procedures, including modeling (e.g., engaging characters make changes themselves, and face and ov...

  20. Physics issues in the design of a high β quasi-axisymmetric stellarator

    International Nuclear Information System (INIS)

    Reiman, A.; Ku, L.; Monticello, D.

    2001-01-01

    Present days stellarators have aspect ratios large compared to those of tokamaks. We have been pursuing the design of compact stellarator configurations with aspect ratios comparable to those of tokamaks and good transport and stability properties. To provide good drift trajectories, we focus on configurations that are close to quasi-symmetric (QA), an approach that is well suited to lower aspect ratios. In this paper the physics issues and configuration design of QA stellarators are presented

  1. Three tenets for secure cyber-physical system design and assessment

    Science.gov (United States)

    Hughes, Jeff; Cybenko, George

    2014-06-01

    This paper presents a threat-driven quantitative mathematical framework for secure cyber-physical system design and assessment. Called The Three Tenets, this originally empirical approach has been used by the US Air Force Research Laboratory (AFRL) for secure system research and development. The Tenets were first documented in 2005 as a teachable methodology. The Tenets are motivated by a system threat model that itself consists of three elements which must exist for successful attacks to occur: - system susceptibility; - threat accessibility and; - threat capability. The Three Tenets arise naturally by countering each threat element individually. Specifically, the tenets are: Tenet 1: Focus on What's Critical - systems should include only essential functions (to reduce susceptibility); Tenet 2: Move Key Assets Out-of-Band - make mission essential elements and security controls difficult for attackers to reach logically and physically (to reduce accessibility); Tenet 3: Detect, React, Adapt - confound the attacker by implementing sensing system elements with dynamic response technologies (to counteract the attackers' capabilities). As a design methodology, the Tenets mitigate reverse engineering and subsequent attacks on complex systems. Quantified by a Bayesian analysis and further justified by analytic properties of attack graph models, the Tenets suggest concrete cyber security metrics for system assessment.

  2. Worksite interventions for preventing physical deterioration among employees in job-groups with high physical work demands: Background, design and conceptual model of FINALE

    Directory of Open Access Journals (Sweden)

    Mortensen Ole S

    2010-03-01

    Full Text Available Abstract Background A mismatch between individual physical capacities and physical work demands enhance the risk for musculoskeletal disorders, poor work ability and sickness absence, termed physical deterioration. However, effective intervention strategies for preventing physical deterioration in job groups with high physical demands remains to be established. This paper describes the background, design and conceptual model of the FINALE programme, a framework for health promoting interventions at 4 Danish job groups (i.e. cleaners, health-care workers, construction workers and industrial workers characterized by high physical work demands, musculoskeletal disorders, poor work ability and sickness absence. Methods/Design A novel approach of the FINALE programme is that the interventions, i.e. 3 randomized controlled trials (RCT and 1 exploratory case-control study are tailored to the physical work demands, physical capacities and health profile of workers in each job-group. The RCT among cleaners, characterized by repetitive work tasks and musculoskeletal disorders, aims at making the cleaners less susceptible to musculoskeletal disorders by physical coordination training or cognitive behavioral theory based training (CBTr. Because health-care workers are reported to have high prevalence of overweight and heavy lifts, the aim of the RCT is long-term weight-loss by combined physical exercise training, CBTr and diet. Construction work, characterized by heavy lifting, pushing and pulling, the RCT aims at improving physical capacity and promoting musculoskeletal and cardiovascular health. At the industrial work-place characterized by repetitive work tasks, the intervention aims at reducing physical exertion and musculoskeletal disorders by combined physical exercise training, CBTr and participatory ergonomics. The overall aim of the FINALE programme is to improve the safety margin between individual resources (i.e. physical capacities, and

  3. VLSI Design Tools, Reference Manual, Release 2.0.

    Science.gov (United States)

    1984-08-01

    eder. 2.3 ITACV: Libary ofC readne. far oesumdg a layoit 1-,, tiling. V ~2.4 "QUILT: CeinS"Wbesa-i-M-8euar ray f atwok til 2.5 "TIL: Tockmeleff...8217patterns package was added so that complex and repetitive digital waveforms could be generated far more easily. The recently written program MTP (Multiple...circuit model to estimate timing delays through digital circuits. It also has a mode that allows it to be used as a switch (gate) level simulator

  4. Multi-operation cryptographic engine: VLSI design and implementation

    International Nuclear Information System (INIS)

    Selimis, George; Koufopavlou, Odysseas

    2005-01-01

    The environment of smart card lacks of system resources but the commercial and economic transactions via smart cards demand the use of certificated and secure cryptographic methods. In this paper a cryptographic approach in hardware for smart cards is proposed. The proposed system supports two basic operations of cryptography, authentication and encryption. The basic component of system is the one round of DES algorithm which supports the DES, Triple DES and the ANSI X9.17 standards. The proposed system is efficient in terms of area resources and techniques for low power consumption have applied. Due to the fact that the system is for smart card applications the overall throughput outperforms the typical smart card throughput standards

  5. Physics design of a 10 MeV injector test stand for an accelerator-driven subcritical system

    Science.gov (United States)

    Yan, Fang; Pei, Shilun; Geng, Huiping; Meng, Cai; Zhao, Yaliang; Sun, Biao; Cheng, Peng; Yang, Zheng; Ouyang, Huafu; Li, Zhihui; Tang, Jingyu; Wang, Jianli; Sui, Yefeng; Dai, Jianping; Sha, Peng; Ge, Rui

    2015-05-01

    The 10 MeV accelerator-driven subcritical system (ADS) Injector I test stand at Institute of High Energy Physics (IHEP) is a testing facility dedicated to demonstrate one of the two injector design schemes [Injector Scheme-I, which works at 325 MHz], for the ADS project in China. The injector is composed of two parts, the linac part and the beam dump line. The former is designed on the basis of 325 MHz four-vane type copper structure radio frequency quadrupole and superconducting (SC) spoke cavities with β =0.12 . The latter is designed to transport the beam coming out of the SC section of the linac to the beam dump, where the beam transverse profile is fairly enlarged and unformed to simplify the beam target design. The SC section consists of two cryomodules with 14 β =0.12 Spoke cavities, 14 solenoid and 14 BPMs in total. The first challenge in the physics design comes from the necessary space required for the cryomodule separation where the periodical lattice is destroyed at a relatively lower energy of ˜5 MeV . Another challenge is the beam dump line design, as it will be the first beam dump line being built by using a step field magnet for the transverse beam expansion and uniformity in the world. This paper gives an overview of the physics design study together with the design principles and machine construction considerations. The results of an optimized design, fabrication status and end to end simulations including machine errors are presented.

  6. Design, modelling, simulation and integration of cyber physical systems: Methods and applications

    OpenAIRE

    Hehenberger, P.; Vogel-Heuser, B.; Bradley, D.; Eynard, B.; Tomiyama, Tetsuo; Achiche, S.

    2016-01-01

    The main drivers for the development and evolution of Cyber Physical Systems (CPS) are the reduction of development costs and time along with the enhancement of the designed products. The aim of this survey paper is to provide an overview of different types of system and the associated transition process from mechatronics to CPS and cloud-based (IoT) systems. It will further consider the requirement that methodologies for CPS-design should be part of a multi-disciplinary development process w...

  7. Design of Chebychev’s Low Pass Filters Using Nonuniform Transmission Lines

    Directory of Open Access Journals (Sweden)

    Said Attamimi

    2016-03-01

    Full Text Available Transmission lines are utilized in many applications to convey energy as well as information. Nonuniform transmission lines (NTLs are obtained through variation of the characteristic quantities along the axial direction. Such NTLs can be used to design network elements, like matching circuits, delay equalizers, filters, VLSI interconnections, etc. In this work, NTLs were analyzed with a numerical method based on the implementation of method of moment. In order to approximate the voltage and current distribution along the transmission line, a sum of basis functions with unknown amplitudes was introduced. As basis function, a constant function was used. In this work, we observed several cases such as lossless and lossy uniform transmission lines with matching and arbitrary load. These cases verified the algorithm developed in this work. The second example consists of nonuniform transmission lines in the form of abruptly changing transmission lines. This structure was used to design a Chebychev’s low pass filter. The calculated reflection and transmission factors of the filters showed some coincidences with the measurements.

  8. Design of a physical model of the PBMR with the aid of Flownet

    International Nuclear Information System (INIS)

    Greyvenstein, G.P.; Rousseau, P.G.

    2002-01-01

    The design of a physical model of the PBMR with the aid of the code Flownet is discussed in this paper. The purpose of the physical model is to test the control strategies and operating procedures of the PBMR and also to demonstrate the accuracy of Flownet. Flownet is first used to do component matching and to determine the detail steady-state performance of the system. It is then demonstrated how the code was used to simulate the start-up procedure as well as a load following and a load rejection scenario. The study demonstrates how a micro model of the PBMR can be designed with the aid of a powerful simulation tool in a relatively short period of time and at low cost using commercially available turbochargers. (author)

  9. Development of an Easy-to-Use Tool for the Assessment of Emergency Department Physical Design

    Directory of Open Access Journals (Sweden)

    Alireza Majidi

    2014-03-01

    Full Text Available Physical design of the emergency department (ED has an important effect on its role and function. To date, no guidelines have been introduced to set the standards for the construction of EDs in Iran. In this study we aim to devise an easy-to-use tool based on the available literature and expert opinion for the quick and effective assessment of EDs in regards to their physical design. For this purpose, based on current literature on emergency design, a comprehensive checklist was developed.  Then, this checklist was analyzed by a panel consisting of heads of three major EDs and contradicting items were decided. Overall 178 crude items were derived from available literature. The Items were categorized in to three major domains of Physical space, Equipment, and Accessibility. The final checklist approved by the panel consisted of 163 items categorized into six domains. Each item was phrased as a “Yes or No” question for ease of analysis, meaning that the criterion is either met or not. 

  10. Design and Simulation of a Quaternary Memory Cell based on a Physical Memristor

    DEFF Research Database (Denmark)

    Nannarelli, Alberto; Taylor, Jonathan

    2016-01-01

    Memristors were theorized more than fifty years ago, but only recently physical devices with memristor’s behavior have been fabricated and shipped. In this work, we experiment on one of these physical memristors by designing a memristorbased memory cell, implementing the cell, and testing it. Our...... experiments demonstrate that the memristor technology is not yet mature for practical applications, but, nevertheless, when production will provide reliable and dependable devices, memristorbased memory systems may replace CMOS memories with some advantages....

  11. Safety Analysis in Design and Assessment of the Physical Protection of the OKG NPP

    Energy Technology Data Exchange (ETDEWEB)

    Lindahl, P., E-mail: par.lindahl@okg.eon.se [OKG Aktiebolag, Oskarshamn (Sweden)

    2014-10-15

    OKG AB operates a three unit nuclear power plant in the southern parts of Sweden. As a result of recent development of the legislation regarding physical protection of nuclear facilities, OKG has upgraded the protection against antagonistic actions. The new legislation includes requirements both on specific protective measures and on the performance of the physical protection as a whole. In short, the performance related requirements state that sufficient measures shall be implemented to protect against antagonistic actions, as defined by the regulator in the “Design Basis Threat” (DBT). Historically, physical protection and nuclear safety has been managed much as separate issues with different, sometimes contradicting, objectives. Now, insights from the work with the security upgrade have emphasized that physical protection needs to be regarded as an important part of the Defence-In-Depth (DiD) against nuclear accidents. Specifically, OKG has developed new DBT-based analysis methods, which may be characterized as probabilistically informed deterministic analysis, conformed to a format similar to the one used for conventional internal events analysis. The result is a powerful tool for design and assessment of the performance of the protection against antagonistic actions, using a nuclear safety perspective. (author)

  12. Effect of Uncertainties in Physical Property Estimates on Process Design - Sensitivity Analysis

    DEFF Research Database (Denmark)

    Hukkerikar, Amol; Jones, Mark Nicholas; Sin, Gürkan

    for performing sensitivity of process design subject to uncertainties in the property estimates. To this end, first uncertainty analysis of the property models of pure components and their mixtures was performed in order to obtain the uncertainties in the estimated property values. As a next step, sensitivity......Chemical process design calculations require accurate and reliable physical and thermodynamic property data and property models of pure components and their mixtures in order to obtain reliable design parameters which help to achieve desired specifications. The uncertainties in the property values...... can arise from the experiments itself or from the property models employed. It is important to consider the effect of these uncertainties on the process design in order to assess the quality and reliability of the final design. The main objective of this work is to develop a systematic methodology...

  13. Design and performance evaluations of generic programming techniques in a R and D prototype of Geant4 physics

    Energy Technology Data Exchange (ETDEWEB)

    Pia, M G; Saracco, P; Sudhakar, M [INFN Sezione di Genova, Via Dodecaneso 33, 16146 Genova (Italy); Zoglauer, A [University of California at Berkeley, Berkeley, CA 94720-7450 (United States); Augelli, M [CNES, 18 Av. Edouard Belin, 31401 Toulouse (France); Gargioni, E [University Medical Center Hamburg-Eppendorf, D-20246 Hamburg (Germany); Kim, C H [Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul, 133-791 (Korea, Republic of); Quintieri, L [INFN Laboratori Nazionali di Frascati, Via Enrico Fermi 40, I-00044 Frascati (Italy); Filho, P P de Queiroz; Santos, D de Souza [IRD, Av. Salvador Allende, s/n. 22780-160, Rio de Janeiro, RJ (Brazil); Weidenspointner, G [MPI fuer extraterrestrische Physik Postfach 1603, D-85740 Garching (Germany); Begalli, M, E-mail: mariagrazia.pia@ge.infn.i [UERJ, R. Sao Francisco Xavier, 524. 20550-013, Rio de Janeiro, RJ (Brazil)

    2010-04-01

    A R and D project has been recently launched to investigate Geant4 architectural design in view of addressing new experimental issues in HEP and other related physics disciplines. In the context of this project the use of generic programming techniques besides the conventional object oriented is investigated. Software design features and preliminary results from a new prototype implementation of Geant4 electromagnetic physics are illustrated. Performance evaluations are presented. Issues related to quality assurance in Geant4 physics modelling are discussed.

  14. Municipal officials' perceived barriers to consideration of physical activity in community design decision making.

    Science.gov (United States)

    Goins, Karin Valentine; Schneider, Kristin L; Brownson, Ross; Carnoske, Cheryl; Evenson, Kelly R; Eyler, Amy; Heinrich, Katie; Litt, Jill; Lyn, Rodney; Maddock, Jay; Reed, Hannah; Tompkins, Nancy Oʼhara; Lemon, Stephenie C

    2013-01-01

    Built environment-focused interventions and policies are recommended as sustainable approaches for promoting physical activity. Physical activity has not traditionally been considered in land use and transportation decision making. Effective collaboration with non-public health partners requires knowledge of their perceived barriers to such consideration. This analysis sought to (a) establish prevalence estimates of selected barriers to the consideration of physical activity in community design and layout decisions and (b) describe how barrier reporting by public health officials differs from other municipal officials among a wide range of job functions and departments in a geographically diverse sample. A Web-based survey was conducted among municipal officials in 94 cities and towns with populations of at least 50 000 residents in 8 states. A total of 453 municipal officials from public health, planning, transportation/public works, community and economic development, parks and recreation, city management, and municipal legislatures in 83 cities and towns responded to the survey. Five barriers to consideration of physical activity in community design and layout were assessed. The most common barriers included lack of political will (23.5%), limited staff (20.4%), and lack of collaboration across municipal departments (16.2%). Fewer participants reported opposition from the business community or residents as barriers. Public health department personnel were more likely to report the barriers of limited staff and lack of collaboration across municipal departments than other professionals. They were also more likely to report lack of political will than city managers or mayors and municipal legislators. Barriers to increasing consideration of physical activity in decision making about community design and layout are encouragingly low. Implications for public health practice include the need to strategically increase political will despite public health staffing

  15. Design and implementation of space physics multi-model application integration based on web

    Science.gov (United States)

    Jiang, Wenping; Zou, Ziming

    independent modules according to different business needs is applied to solve the problem of the independence of the physical space between multiple models. The classic MVC(Model View Controller) software design pattern is concerned to build the architecture of space physics multi-model application integrated system. The JSP+servlet+javabean technology is used to integrate the web application programs of space physics multi-model. It solves the problem of multi-user requesting the same job of model computing and effectively balances each server computing tasks. In addition, we also complete follow tasks: establishing standard graphical user interface based on Java Applet application program; Designing the interface between model computing and model computing results visualization; Realizing three-dimensional network visualization without plug-ins; Using Java3D technology to achieve a three-dimensional network scene interaction; Improved ability to interact with web pages and dynamic execution capabilities, including rendering three-dimensional graphics, fonts and color control. Through the design and implementation of the SPMAIS based on Web, we provide an online computing and application runtime environment of space physics multi-model. The practical application improves that researchers could be benefit from our system in space physics research and engineering applications.

  16. Preliminary physical design of 7 MeV proton RFQ for the accelerator driven-energy system

    International Nuclear Information System (INIS)

    Luo Zihua

    2000-01-01

    The preliminary physical design of 7 MeV proton RFQ for the ADS (Accelerator Driven-energy System) is briefly described. The design features and the basic parameters and the design version of the RFQ are discussed. The matches between IS and RFQ and between RFQ and CCDTL/DTL are also discussed. The ideas of research for the RFQ are presented

  17. The AMchip

    International Nuclear Information System (INIS)

    Amendolia, S.R.; Galeotti, S.; Morsani, F.; Passuello, D.; Ristori, L.; Sciacca, G.; Turini, N.

    1992-01-01

    An Associative Memory full-custom CMOS VLSI chip (AMchip), to be used in fast Trigger Systems for pattern recognition, has been designed and is being successfully tested at INFN in Pisa. The AMchip is the first full-custom associative memory IC developed for high energy physics until today. It contains about 140,000 mos transistors, has been realized in 1.5 micron, double metal, silicon gate CMOS technology, and is housed in a 120 pins package. The AMchip has been designed to be used with any kind of detector which provides in output the hits coordinates, such as, for example, a silicon microstrips detector. In this paper, the authors plan to realize a new AMchip version using sub-micron technology (available in 1992) and new circuital solutions, improving the patterns capacity of a factor 4, and improving significantly the speed. These versions will be developed to match new high energy physics experiments' specific requirements (see, for example, the CDF Silicon Vertex Tracker)

  18. Cost and performance analysis of conceptual designs of physical protection systems

    International Nuclear Information System (INIS)

    Hicks, M.J.; Snell, M.S.; Sandoval, J.S.; Potter, C.S.

    1998-01-01

    CPA -- Cost and Performance Analysis -- is a methodology that joins Activity Based Cost (ABC) estimation with performance based analysis of physical protection systems. CPA offers system managers an approach that supports both tactical decision making and strategic planning. Current exploratory applications of the CPA methodology are addressing analysis of alternative conceptual designs. To support these activities, the original architecture for CPA, is being expanded to incorporate results from a suite of performance and consequence analysis tools such as JTS (Joint Tactical Simulation), ERAD (Explosive Release Atmospheric Dispersion) and blast effect models. The process flow for applying CPA to the development and analysis conceptual designs is illustrated graphically

  19. Design of the Model of Constructivist Learning Theory for Moral Education in Physical Education Teaching

    Science.gov (United States)

    Wang, Chenyu

    2011-01-01

    In order to achieve better effect of moral education in physical education teaching, this article employed constructivist learning theory to design the model of moral education according to the characteristics of physical education teaching, in order that the majority of P.E. teachers draw lessons from it in their teaching practice, and service to…

  20. A Large Hadron Electron Collider at CERN: Report on the Physics and Design Concepts for Machine and Detector

    CERN Document Server

    Abelleira Fernandez, J.L.; Akay, A.N.; Aksakal, H.; Albacete, J.L.; Alekhin, S.; Allport, P.; Andreev, V.; Appleby, R.B.; Arikan, E.; Armesto, N.; Azuelos, G.; Bai, M.; Barber, D.; Bartels, J.; Behnke, O.; Behr, J.; Belyaev, A.S.; Ben-Zvi, I.; Bernard, N.; Bertolucci, S.; Bettoni, S.; Biswal, S.; Blumlein, J.; Bottcher, H.; Bogacz, A.; Bracco, C.; Brandt, G.; Braun, H.; Brodsky, S.; Buning, O.; Bulyak, E.; Buniatyan, A.; Burkhardt, H.; Cakir, I.T.; Cakir, O.; Calaga, R.; Cetinkaya, V.; Ciapala, E.; Ciftci, R.; Ciftci, A.K.; Cole, B.A.; Collins, J.C.; Dadoun, O.; Dainton, J.; De Roeck, A.; d'Enterria, D.; Dudarev, A.; Eide, A.; Enberg, R.; Eroglu, E.; Eskola, K.J.; Favart, L.; Fitterer, M.; Forte, S.; Gaddi, A.; Gambino, P.; Garcia Morales, H.; Gehrmann, T.; Gladkikh, P.; Glasman, C.; Godbole, R.; Goddard, B.; Greenshaw, T.; Guffanti, A.; Guzey, V.; Gwenlan, C.; Han, T.; Hao, Y.; Haug, F.; Herr, W.; Herve, A.; Holzer, B.J.; Ishitsuka, M.; Jacquet, M.; Jeanneret, B.; Jimenez, J.M.; Jowett, J.M.; Jung, H.; Karadeniz, H.; Kayran, D.; Kilic, A.; Kimura, K.; Klein, M.; Klein, U.; Kluge, T.; Kocak, F.; Korostelev, M.; Kosmicki, A.; Kostka, P.; Kowalski, H.; Kramer, G.; Kuchler, D.; Kuze, M.; Lappi, T.; Laycock, P.; Levichev, E.; Levonian, S.; Litvinenko, V.N.; Lombardi, A.; Maeda, J.; Marquet, C.; Mellado, B.; Mess, K.H.; Milanese, A.; Moch, S.; Morozov, I.I.; Muttoni, Y.; Myers, S.; Nandi, S.; Nergiz, Z.; Newman, P.R.; Omori, T.; Osborne, J.; Paoloni, E.; Papaphilippou, Y.; Pascaud, C.; Paukkunen, H.; Perez, E.; Pieloni, T.; Pilicer, E.; Pire, B.; Placakyte, R.; Polini, A.; Ptitsyn, V.; Pupkov, Y.; Radescu, V.; Raychaudhuri, S.; Rinol, L.; Rohini, R.; Rojo, J.; Russenschuck, S.; Sahin, M.; Salgado, C.A.; Sampei, K.; Sassot, R.; Sauvan, E.; Schneekloth, U.; Schorner-Sadenius, T.; Schulte, D.; Senol, A.; Seryi, A.; Sievers, P.; Skrinsky, A.N.; Smith, W.; Spiesberger, H.; Stasto, A.M.; Strikman, M.; Sullivan, M.; Sultansoy, S.; Sun, Y.P.; Surrow, B.; Szymanowski, L.; Taels, P.; Tapan, I.; Tasci, T.; Tassi, E.; Ten Kate, H.; Terron, J.; Thiesen, H.; Thompson, L.; Tokushuku, K.; Tomas Garcia, R.; Tommasini, D.; Trbojevic, D.; Tsoupas, N.; Tuckmantel, J.; Turkoz, S.; Trinh, T.N.; Tywoniuk, K.; Unel, G.; Urakawa, J.; VanMechelen, P.; Variola, A.; Veness, R.; Vivoli, A.; Vobly, P.; Wagner, J.; Wallny, R.; Wallon, S.; Watt, G.; Weiss, C.; Wiedemann, U.A.; Wienands, U.; Willeke, F.; Xiao, B.W.; Yakimenko, V.; Zarnecki, A.F.; Zhang, Z.; Zimmermann, F.; Zlebcik, R.; Zomer, F.

    2012-01-01

    The physics programme and the design are described of a new collider for particle and nuclear physics, the Large Hadron Electron Collider (LHeC), in which a newly built electron beam of 60 GeV, up to possibly 140 GeV, energy collides with the intense hadron beams of the LHC. Compared to HERA, the kinematic range covered is extended by a factor of twenty in the negative four-momentum squared, $Q^2$, and in the inverse Bjorken $x$, while with the design luminosity of $10^{33}$ cm$^{-2}$s$^{-1}$ the LHeC is projected to exceed the integrated HERA luminosity by two orders of magnitude. The physics programme is devoted to an exploration of the energy frontier, complementing the LHC and its discovery potential for physics beyond the Standard Model with high precision deep inelastic scattering measurements. These are designed to investigate a variety of fundamental questions in strong and electroweak interactions. The physics programme also includes electron-deuteron and electron-ion scattering in a $(Q^2, 1/x)$ ran...

  1. Core physics design calculation of mini-type fast reactor based on Monte Carlo method

    International Nuclear Information System (INIS)

    He Keyu; Han Weishi

    2007-01-01

    An accurate physics calculation model has been set up for the mini-type sodium-cooled fast reactor (MFR) based on MCNP-4C code, then a detailed calculation of its critical physics characteristics, neutron flux distribution, power distribution and reactivity control has been carried out. The results indicate that the basic physics characteristics of MFR can satisfy the requirement and objectives of the core design. The power density and neutron flux distribution are symmetrical and reasonable. The control system is able to make a reliable reactivity balance efficiently and meets the request for long-playing operation. (authors)

  2. HT-7U superconducting tokamak: Physics design, engineering progress and schedule

    International Nuclear Information System (INIS)

    Wan Yuanxi

    2002-01-01

    The superconducting tokamak research program begun in China in ASIPP since 1994. The program is included in existent superconducting tokamak HT-7 and the next new superconducting tokamak HT-7U which is one of national key research projects in China. With the elongation cross-section, divertor and higher plasma parameter the main objectives of HT-7U are widely investigation both of the physics and technology for steady state advanced tokamak as well as the investigation of power and particle handle under steady-state operation condition. The physics and engineering design have been completed and significant progresses on R and D and fabrication have been achieved. HT-7U will begin assembly at 2003 and possible to get first plasma around 2004. (author)

  3. Sustainable Manufacturing via Multi-Scale, Physics-Based Process Modeling and Manufacturing-Informed Design

    Energy Technology Data Exchange (ETDEWEB)

    None

    2017-04-01

    This factsheet describes a project that developed and demonstrated a new manufacturing-informed design framework that utilizes advanced multi-scale, physics-based process modeling to dramatically improve manufacturing productivity and quality in machining operations while reducing the cost of machined components.

  4. Physical criteria for the design and assessment of restoration schemes in the United Kingdom

    International Nuclear Information System (INIS)

    Humphries, R.N.; McQuire, G.E.

    1994-01-01

    The restoration of colliery wastes and open pit coal sites in the United Kingdom (UK) is undertaken according to a land use strategy plan and detailed specifications that have been agreed upon with the planning authorities. For two of the major land uses in the UK, agriculture and forestry, data on physical criteria (climate, site features and soils) are available to assist in the planning and design of land use strategies and specification of restoration treatments. Similar criteria could also be developed for the restoration of semi natural vegetation and habitats for landscape, wildlife, and amenity uses. Three examples are described illustrating the use of the physical criteria in the design of schemes, the specification of treatments, and the assessment of achievements

  5. Principles of designing cyber-physical system of producing mechanical assembly components at Industry 4.0 enterprise

    Science.gov (United States)

    Gurjanov, A. V.; Zakoldaev, D. A.; Shukalov, A. V.; Zharinov, I. O.

    2018-03-01

    The task of developing principles of cyber-physical system constitution at the Industry 4.0 company of the item designing components of mechanical assembly production is being studied. The task has been solved by analyzing the components and technologies, which have some practical application in the digital production organization. The list of components has been defined and the authors proposed the scheme of the components and technologies interconnection in the Industry 4.0 of mechanical assembly production to make an uninterrupted manufacturing route of the item designing components with application of some cyber-physical systems.

  6. Cyber and physical equipment digital control system in Industry 4.0 item designing company

    Science.gov (United States)

    Gurjanov, A. V.; Zakoldaev, D. A.; Shukalov, A. V.; Zharinov, I. O.

    2018-05-01

    The problem of organization of digital control of the item designing company equipped with cyber and physical systems is being studied. A scheme of cyber and physical systems and personnel interaction in the Industry 4.0 smart factory company is presented. A scheme of assembly units transportation in the Industry 4.0 smart factory company is provided. A scheme of digital control system in the Industry 4.0 smart factory company is given.

  7. The effect of structural design parameters on FPGA-based feed-forward space-time trellis coding-orthogonal frequency division multiplexing channel encoders

    Science.gov (United States)

    Passas, Georgios; Freear, Steven; Fawcett, Darren

    2010-08-01

    Orthogonal frequency division multiplexing (OFDM)-based feed-forward space-time trellis code (FFSTTC) encoders can be synthesised as very high speed integrated circuit hardware description language (VHDL) designs. Evaluation of their FPGA implementation can lead to conclusions that help a designer to decide the optimum implementation, given the encoder structural parameters. VLSI architectures based on 1-bit multipliers and look-up tables (LUTs) are compared in terms of FPGA slices and block RAMs (area), as well as in terms of minimum clock period (speed). Area and speed graphs versus encoder memory order are provided for quadrature phase shift keying (QPSK) and 8 phase shift keying (8-PSK) modulation and two transmit antennas, revealing best implementation under these conditions. The effect of number of modulation bits and transmit antennas on the encoder implementation complexity is also investigated.

  8. Physics design of a 10 MeV injector test stand for an accelerator-driven subcritical system

    Directory of Open Access Journals (Sweden)

    Fang Yan

    2015-05-01

    Full Text Available The 10 MeV accelerator-driven subcritical system (ADS Injector I test stand at Institute of High Energy Physics (IHEP is a testing facility dedicated to demonstrate one of the two injector design schemes [Injector Scheme-I, which works at 325 MHz], for the ADS project in China. The injector is composed of two parts, the linac part and the beam dump line. The former is designed on the basis of 325 MHz four-vane type copper structure radio frequency quadrupole and superconducting (SC spoke cavities with β=0.12. The latter is designed to transport the beam coming out of the SC section of the linac to the beam dump, where the beam transverse profile is fairly enlarged and unformed to simplify the beam target design. The SC section consists of two cryomodules with 14 β=0.12 Spoke cavities, 14 solenoid and 14 BPMs in total. The first challenge in the physics design comes from the necessary space required for the cryomodule separation where the periodical lattice is destroyed at a relatively lower energy of ∼5  MeV. Another challenge is the beam dump line design, as it will be the first beam dump line being built by using a step field magnet for the transverse beam expansion and uniformity in the world. This paper gives an overview of the physics design study together with the design principles and machine construction considerations. The results of an optimized design, fabrication status and end to end simulations including machine errors are presented.

  9. Discrete-event simulation for the design and evaluation of physical protection systems

    International Nuclear Information System (INIS)

    Jordan, S.E.; Snell, M.K.; Madsen, M.M.; Smith, J.S.; Peters, B.A.

    1998-01-01

    This paper explores the use of discrete-event simulation for the design and control of physical protection systems for fixed-site facilities housing items of significant value. It begins by discussing several modeling and simulation activities currently performed in designing and analyzing these protection systems and then discusses capabilities that design/analysis tools should have. The remainder of the article then discusses in detail how some of these new capabilities have been implemented in software to achieve a prototype design and analysis tool. The simulation software technology provides a communications mechanism between a running simulation and one or more external programs. In the prototype security analysis tool, these capabilities are used to facilitate human-in-the-loop interaction and to support a real-time connection to a virtual reality (VR) model of the facility being analyzed. This simulation tool can be used for both training (in real-time mode) and facility analysis and design (in fast mode)

  10. Design of Video Games for Children's Diet and Physical Activity Behavior Change.

    Science.gov (United States)

    Baranowski, Tom; Thompson, Debbe; Buday, Richard; Lu, Amy Shirong; Baranowski, Janice

    2010-01-01

    Serious video games (VG) offer new opportunities for promoting health related diet and physical activity change among children. Games can be designed to use storylines, characters, and behavior change procedures, including modeling (e.g., engaging characters make changes themselves, and face and overcome challenges related to fruit and vegetable (FV) and physical activity (PA) goal attainment and/or consumption), skill development (e.g., asking behaviors; virtual recipe preparation), self regulatory behaviors (problem solving, goal setting, goal review, decision making), rewards (e.g., points and positive statements generated by the program), immediate feedback (e.g., through characters and/or statements that appear on the computer screen at critical decision points), and personalization (e.g., tailored choices offered at critical junctures, based on responses to baselines questions related to preferences, outcome expectancies, etc). We are in the earliest stages of learning how to optimally design effective behavior change procedures for use in VG, and yet they have been demonstrated to change behavior. As we learn, VG offer more and better opportunities for obesity prevention that can adjust to individual needs and preferences.

  11. ACCELERATOR PHYSICS CHALLENGES IN THE DESIGN OF MULTI-BEND-ACHROMAT-BASED STORAGE RINGS

    Energy Technology Data Exchange (ETDEWEB)

    Borland, M.; Hettel, R.; Leemann, S. C.; Robin, D. S.

    2017-06-01

    With the recent success in commissioning of MAX IV, the multi-bend achromat (MBA) lattice has begun to deliver on its promise to usher in a new generation of higher-brightness synchrotron light sources. In this paper, we begin by reviewing the challenges, recent success, and lessons learned of the MAX-IV project. Drawing on these lessons, we then describe the physics challenges in even more ambitious rings and how these can be met. In addition, we touch on engineering issues and choices that are tightly linked with the physics design.

  12. Physical design of time-of-flight mass spectrometer in energetic cluster impact deposition apparatus

    International Nuclear Information System (INIS)

    Yu Guoqing; Shi Ying; Chen Jingsheng; Zhu Dezhang; Pan Haochang; Xu Hongjie

    1999-01-01

    The principle and physical design of the time-of-flight mass spectrometer equipped in the energetic cluster impact deposition apparatus are introduced. Some problems existed in experiments and their solutions are also discussed

  13. Can Building Design Impact Physical Activity? A Natural Experiment.

    Science.gov (United States)

    Eyler, Amy A; Hipp, Aaron; Valko, Cheryl Ann; Ramadas, Ramya; Zwald, Marissa

    2018-05-01

    Workplace design can impact workday physical activity (PA) and sedentary time. The purpose of this study was to evaluate PA behavior among university employees before and after moving into a new building. A pre-post, experimental versus control group study design was used. PA data were collected using surveys and accelerometers from university faculty and staff. Accelerometry was used to compare those moving into the new building (MOVERS) and those remaining in existing buildings (NONMOVERS) and from a control group (CONTROLS). Survey results showed increased self-reported PA for MOVERS and NONMOVERS. All 3 groups significantly increased in objectively collected daily energy expenditure and steps per day. The greatest steps per day increase was in CONTROLS (29.8%) compared with MOVERS (27.5%) and NONMOVERS (15.9%), but there were no significant differences between groups at pretest or posttest. Self-reported and objectively measured PA increased from pretest to posttest in all groups; thus, the increase cannot be attributed to the new building. Confounding factors may include contamination bias due to proximity of control site to experimental site and introduction of a university PA tracking contest during postdata collection. Methodology and results can inform future studies on best design practices for increasing PA.

  14. Divertor design for the Tokamak Physics Experiment

    International Nuclear Information System (INIS)

    Hill, D.N.; Braams, B.

    1994-05-01

    In this paper we discuss the present divertor design for the planned TPX tokamak, which will explore the physics and technology of steady-state (1000s pulses) heat and particle removal in high confinement (2--4x L-mode), high beta (β N ≥ 3) divertor plasmas sustained by non-inductive current drive. The TPX device will operate in the double-null divertor configuration, with actively cooled graphite targets forming a deep (0.5 m) slot at the outer strike point. The peak heat flux on, the highly tilted (74 degrees from normal) re-entrant (to recycle ions back toward the separatrix) will be in the range of 4--6 MW/m 2 with 18 MW of neutral beams and RF heating power. The combination of active pumping and gas puffing (deuterium plus impurities), along with higher heating power (45 MW maximum) will allow testing of radiative divertor concepts at ITER-like power densities

  15. Conceptual design of technical security systems for Russian nuclear facilities physical protection

    International Nuclear Information System (INIS)

    Izmailov, A.V.

    1995-01-01

    Conceptual design of technical security systems (TSS) used in the early stages of physical protection systems (PPS) design for Russia nuclear facilities is discussed. The importance of work carried out in the early stages was noted since the main design solutions are being made within this period (i.e. selection of a structure of TSS and its components). The methods of analysis and synthesis of TSS developed by ''Eleron'' (MINATOM of Russia) which take into account the specific conditions of Russian nuclear facilities and a scope of equipment available are described in the review. TSS effectiveness assessment is based on a probability theory and a simulation. The design procedure provides for a purposeful choice of TSS competitive options including a ''cost-benefit'' criterion and taking into account a prechosen list of design basis threats to be used for a particular facility. The attention is paid to a practical aspect of the methods application as well as to the bilateral Russian-American scientific and technical co-operation in the PPS design field

  16. Utility of Social Cognitive Theory in Intervention Design for Promoting Physical Activity among African-American Women: A Qualitative Study.

    Science.gov (United States)

    Joseph, Rodney P; Ainsworth, Barbara E; Mathis, LaTanya; Hooker, Steven P; Keller, Colleen

    2017-09-01

    We examined the cultural relevance of Social Cognitive Theory (SCT) in the design of a physical activity intervention for African-American women. A qualitative study design was used. Twenty-five African-American women (Mean age = 38.5 years, Mean BMI = 39.4 kg·m2) were enrolled in a series of focus groups (N = 9) to elucidate how 5 SCT constructs (ie, Behavioral Capability, Outcome Expectations, Self-efficacy, Self-regulation, Social Support) can be culturally tailored in the design of a physical activity program for African-American women. For the construct of Behavioral Capability, participants were generally unaware of the amount, intensity, and types of physical activity needed for health benefits. Outcome Expectations associated with physical activity included increased energy, improved health, weight loss, and positive role modeling behaviors. Constructs of Self-efficacy and Self-regulation were elicited through the women perceiving themselves as a primary barrier to physical activity. Participants endorsed the need of a strong social support component and identified a variety of acceptable sources to include in a physical activity program (ie, family, friends, other program participants). Findings explicate the utility of SCT as a behavioral change theoretical basis for tailoring physical activity programs to African-American women.

  17. Design of a website on nutrition and physical activity for adolescents: results from formative research.

    Science.gov (United States)

    Thompson, Debbe; Cullen, Karen Weber; Boushey, Carol; Konzelmann, Karen

    2012-04-26

    Teens do not meet guidelines for healthy eating and physical activity. The Internet may be an effective method for delivering programs that help them adopt healthy behaviors. To collect information to design content and structure for a teen-friendly website promoting healthy eating and physical activity behaviors. Qualitative research, encompassing both focus group and interview techniques, were used to design the website. Participants were 12-17 year olds in Houston, Texas, and West Lafayette, Indiana. A total of 133 participants took part in 26 focus groups while 15 participated in one-on-one interviews to provide guidance for the development of teen-friendly content and structure for an online behavior change program promoting healthy eating and physical activity to 12-17 year olds. The youth made suggestions to overcome common barriers to healthy eating and physical activity. Their feedback was used to develop "Teen Choice: Food & Fitness," a 12-week online behavior change program, populated by 4 cartoon character role models. It is critical that members of the target audience be included in formative research to develop behavior change programs that are relevant, appealing, and address their needs and interests.

  18. High-resolution coupled physics solvers for analysing fine-scale nuclear reactor design problems

    Science.gov (United States)

    Mahadevan, Vijay S.; Merzari, Elia; Tautges, Timothy; Jain, Rajeev; Obabko, Aleksandr; Smith, Michael; Fischer, Paul

    2014-01-01

    An integrated multi-physics simulation capability for the design and analysis of current and future nuclear reactor models is being investigated, to tightly couple neutron transport and thermal-hydraulics physics under the SHARP framework. Over several years, high-fidelity, validated mono-physics solvers with proven scalability on petascale architectures have been developed independently. Based on a unified component-based architecture, these existing codes can be coupled with a mesh-data backplane and a flexible coupling-strategy-based driver suite to produce a viable tool for analysts. The goal of the SHARP framework is to perform fully resolved coupled physics analysis of a reactor on heterogeneous geometry, in order to reduce the overall numerical uncertainty while leveraging available computational resources. The coupling methodology and software interfaces of the framework are presented, along with verification studies on two representative fast sodium-cooled reactor demonstration problems to prove the usability of the SHARP framework. PMID:24982250

  19. Advanced field-solver techniques for RC extraction of integrated circuits

    CERN Document Server

    Yu, Wenjian

    2014-01-01

    Resistance and capacitance (RC) extraction is an essential step in modeling the interconnection wires and substrate coupling effect in nanometer-technology integrated circuits (IC). The field-solver techniques for RC extraction guarantee the accuracy of modeling, and are becoming increasingly important in meeting the demand for accurate modeling and simulation of VLSI designs. Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits presents a systematic introduction to, and treatment of, the key field-solver methods for RC extraction of VLSI interconnects and substrate coupling in mixed-signal ICs. Various field-solver techniques are explained in detail, with real-world examples to illustrate the advantages and disadvantages of each algorithm. This book will benefit graduate students and researchers in the field of electrical and computer engineering, as well as engineers working in the IC design and design automation industries. Dr. Wenjian Yu is an Associate Professor at the Department of ...

  20. FPGA-Based Real-Time Motion Detection for Automated Video Surveillance Systems

    Directory of Open Access Journals (Sweden)

    Sanjay Singh

    2016-03-01

    Full Text Available Design of automated video surveillance systems is one of the exigent missions in computer vision community because of their ability to automatically select frames of interest in incoming video streams based on motion detection. This research paper focuses on the real-time hardware implementation of a motion detection algorithm for such vision based automated surveillance systems. A dedicated VLSI architecture has been proposed and designed for clustering-based motion detection scheme. The working prototype of a complete standalone automated video surveillance system, including input camera interface, designed motion detection VLSI architecture, and output display interface, with real-time relevant motion detection capabilities, has been implemented on Xilinx ML510 (Virtex-5 FX130T FPGA platform. The prototyped system robustly detects the relevant motion in real-time in live PAL (720 × 576 resolution video streams directly coming from the camera.

  1. Human-centered design of a cyber-physical system for advanced response to Ebola (CARE).

    Science.gov (United States)

    Dimitrov, Velin; Jagtap, Vinayak; Skorinko, Jeanine; Chernova, Sonia; Gennert, Michael; Padir, Taşkin

    2015-01-01

    We describe the process towards the design of a safe, reliable, and intuitive emergency treatment unit to facilitate a higher degree of safety and situational awareness for medical staff, leading to an increased level of patient care during an epidemic outbreak in an unprepared, underdeveloped, or disaster stricken area. We start with a human-centered design process to understand the design challenge of working with Ebola treatment units in Western Africa in the latest Ebola outbreak, and show preliminary work towards cyber-physical technologies applicable to potentially helping during the next outbreak.

  2. A VLSI-Based High-Performance Raster Image System.

    Science.gov (United States)

    1986-05-08

    and data in broadcast form to the array of memory -hips in the frame buffer, shown in the bottom block. This is simply a physical structure to hold up...Principal Investigator: John Poulton Collaboration on algorithm development: Prof. Jack Goldfeather (Dept. of Mathematics, Carleton Collge ...1983) Cheng-Hong Hsieh (MS, Computer Science, May, 1985) Jeff P. Hultquist Susan Spach Undergraduate ResearLh Assistant: Sonya Holder (BS, Physics , May

  3. An example of technological transfer to industry: the 'IMI' project

    International Nuclear Information System (INIS)

    Stefanini, A.; Amendolia, S.R.; Annovazzi, A.; Baldelli, P.; Bigongiari, A.; Bisogni, M.G.; Catarsi, F.; Cetronio, A.; Chianella, M.; Cinti, M.N.; Delogu, P.; Fantacci, M.E.; Galimberti, D.; Gambaccini, M.; Gilardoni, C.; Iurlaro, G.; Lanzieri, C.; Meoni, M.; Novelli, M.; Pani, R.; Passuello, G.; Pellegrini, R.; Pieracci, M.; Quattrocchi, M.; Rosso, V.; Venturelli, L.

    2004-01-01

    Several INFN Sections and Departments of Physics of Italian Universities have spent many man-years in the attempt to adapt detector and read-out technologies, originally developed in the field of High Energy Physics, to the domain of biomedical apparatuses. The research covered such areas as the exploitation of crystals for the production of monochromatic X-ray beams, the development of devices for efficient X-ray detection, the design of advanced VLSI electronics, the improvement of Position Sensitive Photomultiplier Tubes and crystals for Nuclear Medicine gamma-cameras. These studies have been integrated in the Integrated Mammographic Imaging (IMI) project, funded by the Italian Government through the law 46/82 (art.10) and is carried on by five high-technology industries in Italy, namely LABEN, CAEN, AMS, GILARDONI and POL.HI.TECH. We report on the status of this technological transfer project

  4. An example of technological transfer to industry: the 'IMI' project

    Energy Technology Data Exchange (ETDEWEB)

    Stefanini, A.; Amendolia, S.R.; Annovazzi, A.; Baldelli, P.; Bigongiari, A.; Bisogni, M.G.; Catarsi, F.; Cetronio, A.; Chianella, M.; Cinti, M.N.; Delogu, P.; Fantacci, M.E.; Galimberti, D.; Gambaccini, M.; Gilardoni, C.; Iurlaro, G.; Lanzieri, C.; Meoni, M.; Novelli, M.; Pani, R.; Passuello, G.; Pellegrini, R.; Pieracci, M.; Quattrocchi, M.; Rosso, V. E-mail: valeria.rosso@pi.infn.it; Venturelli, L

    2004-02-01

    Several INFN Sections and Departments of Physics of Italian Universities have spent many man-years in the attempt to adapt detector and read-out technologies, originally developed in the field of High Energy Physics, to the domain of biomedical apparatuses. The research covered such areas as the exploitation of crystals for the production of monochromatic X-ray beams, the development of devices for efficient X-ray detection, the design of advanced VLSI electronics, the improvement of Position Sensitive Photomultiplier Tubes and crystals for Nuclear Medicine gamma-cameras. These studies have been integrated in the Integrated Mammographic Imaging (IMI) project, funded by the Italian Government through the law 46/82 (art.10) and is carried on by five high-technology industries in Italy, namely LABEN, CAEN, AMS, GILARDONI and POL.HI.TECH. We report on the status of this technological transfer project.

  5. Systematic approach to the conceptual design of physical protection systems for nuclear facilities

    International Nuclear Information System (INIS)

    1978-05-01

    A three-step approach is described which includes (1) facility characterization, (2) development and evaluation of hardware-based safeguards systems configurations, and (3) hardware and response force trade-off analysis. The purpose of the report is to establish a vehicle for initial examination and discussion by potential industry and government users of a formal sequence of activities for the conceptual design of physical protection systems and to identify currently available design tools, such as application reports, handbooks, and computer codes which might support these activities. 17 figs

  6. Sampling Design of Soil Physical Properties in a Conilon Coffee Field

    Directory of Open Access Journals (Sweden)

    Eduardo Oliveira de Jesus Santos

    Full Text Available ABSTRACT Establishing the number of samples required to determine values of soil physical properties ultimately results in optimization of labor and allows better representation of such attributes. The objective of this study was to analyze the spatial variability of soil physical properties in a Conilon coffee field and propose a soil sampling method better attuned to conditions of the management system. The experiment was performed in a Conilon coffee field in Espírito Santo state, Brazil, under a 3.0 × 2.0 × 1.0 m (4,000 plants ha-1 double spacing design. An irregular grid, with dimensions of 107 × 95.7 m and 65 sampling points, was set up. Soil samples were collected from the 0.00-0.20 m depth from each sampling point. Data were analyzed under descriptive statistical and geostatistical methods. Using statistical parameters, the adequate number of samples for analyzing the attributes under study was established, which ranged from 1 to 11 sampling points. With the exception of particle density, all soil physical properties showed a spatial dependence structure best fitted to the spherical model. Establishment of the number of samples and spatial variability for the physical properties of soils may be useful in developing sampling strategies that minimize costs for farmers within a tolerable and predictable level of error.

  7. Evaluating the Physical Environment of Design Studios: A Case study in Malaysian Private Architecture Schools

    OpenAIRE

    Shanthi Muniandy; Tareef Hayat Khan; Abdullah Sani Ahmad

    2015-01-01

    Understanding the notion of learner’s experiences in the design of physical environment of an architecture design studio is a necessity as it contains certain values of influence. It is due to the unique learning experiences which are accrued particularly in design studio that is continued during professional practice as well. Most architectural campuses in Malaysian Private Higher Education Institutions (MPHEI) are devoid of certain important elements and this issue needs to be looked into s...

  8. HDL to verification logic translator

    Science.gov (United States)

    Gambles, J. W.; Windley, P. J.

    1992-01-01

    The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models.

  9. A capacitive CMOS-MEMS sensor designed by multi-physics simulation for integrated CMOS-MEMS technology

    Science.gov (United States)

    Konishi, Toshifumi; Yamane, Daisuke; Matsushima, Takaaki; Masu, Kazuya; Machida, Katsuyuki; Toshiyoshi, Hiroshi

    2014-01-01

    This paper reports the design and evaluation results of a capacitive CMOS-MEMS sensor that consists of the proposed sensor circuit and a capacitive MEMS device implemented on the circuit. To design a capacitive CMOS-MEMS sensor, a multi-physics simulation of the electromechanical behavior of both the MEMS structure and the sensing LSI was carried out simultaneously. In order to verify the validity of the design, we applied the capacitive CMOS-MEMS sensor to a MEMS accelerometer implemented by the post-CMOS process onto a 0.35-µm CMOS circuit. The experimental results of the CMOS-MEMS accelerometer exhibited good agreement with the simulation results within the input acceleration range between 0.5 and 6 G (1 G = 9.8 m/s2), corresponding to the output voltages between 908.6 and 915.4 mV, respectively. Therefore, we have confirmed that our capacitive CMOS-MEMS sensor and the multi-physics simulation will be beneficial method to realize integrated CMOS-MEMS technology.

  10. Ultra-lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design

    OpenAIRE

    Cui, Yijun; Gu, Chongyan; Wang, Chenghua; O'Neill, Maire; Liu, Weiqiang

    2018-01-01

    A physical unclonable function (PUF) is a promising security primitive which utilizes the manufacturing process variations to generate a unique unclonable digital fingerprint for a chip. It is especially suitable for resource constrained security applications, e.g. internet of things (IoT) devices. The ring oscillator (RO) PUF and the static RAM (SRAM) PUF are two of the most extensively studied PUFdesigns. However, previous RO PUF designs require a lot of hardware resources for ROs to be rob...

  11. Integration of Educational Methods and Physical Settings: Design Guidelines for High/Scope Methodology in Pre-Schools

    Science.gov (United States)

    Izadpanah, Shirin; Günçe, Kaðan

    2014-01-01

    Quality design and appropriate space organization in preschool settings can support preschool children's educational activities. Although the relationship between the well-being and development of children and physical settings has been emphasized by many early childhood researchers, there is still a need for theoretical design guidelines that are…

  12. Technical Training: ELEC-2005

    CERN Multimedia

    Davide Vitè

    2005-01-01

    ELEC-2005 - Electronics in High Energy Physics: Autumn Term (November-December 2005) ELEC-2005 is a new course series on modern electronics, given by CERN physicists and engineers within the framework of the 2005 Technical Training Programme, in an extended format of the ELEC-2002 course series. This new, comprehensive course series is designed for people who are not electronics specialists, for example physicists, engineers and technicians working at or visiting the laboratory, who use or will use electronics in their present or future activities, in particular in the context of the LHC accelerator and experiments. ELEC-2005 is composed of four Terms. The Winter (Introduction to electronics in HEP), Spring (Integrated circuits and VLSI technology for physics), and Summer (System electronics for physics: Issues) Terms already took place. The Autumn Term: Electronics applications in HEP experiments (November-December, 10 lectures) is now open for online registration, and will start on November 8th with the...

  13. Reactor physics computer code development for neutronic design, fuel-management, reactor operation and safety analysis of PHWRs

    International Nuclear Information System (INIS)

    Rastogi, B.P.

    1989-01-01

    This report discusses various reactor physics codes developed for neutronic design, fuel-management, reactor operation and safety analysis of PHWRs. These code packages have been utilized for nuclear design of 500 MWe and new 235 MWe PHWRs. (author)

  14. High Energy Physics

    Science.gov (United States)

    Untitled Document [Argonne Logo] [DOE Logo] High Energy Physics Home Division ES&H Personnel Collider Physics Cosmic Frontier Cosmic Frontier Theory & Computing Detector R&D Electronic Design Mechanical Design Neutrino Physics Theoretical Physics Seminars HEP Division Seminar HEP Lunch Seminar HEP

  15. Co-simulation Design towards Cyber-Physical Robotic Applications : Leveraging FMI Standard and CSP Semantics

    NARCIS (Netherlands)

    Lu, Zhou; Broenink, Johannes F.

    2017-01-01

    Designing a software controller for multi-task automated service robotics is becoming increasingly complex. The combination of discrete (cyber) and continuous (physical) domains and multiple engineering fields makes it quite challenging to couple different subsystems as a whole for further

  16. A CMOS front-end for SiPM devices aimed to TOF applications with adjustable threshold and high dynamical range

    International Nuclear Information System (INIS)

    Badoni, D.; Gonnella, F.; Messi, R.; Moricciani, D.; Archilli, F.; Iafolla, L.

    2010-01-01

    In recent works we presented the results of the characterization and the study of performance of several Silicon Photomultipliers delivered from MEPHI (Moscow Engineering and Physics Institute) and we proposed an electrical model of the SiPM to be used in analog simulations for the VLSI design of the pilot chip with 0.35μm technology produced. The results of the simulations was also presented. In this work we present the results of several test performed on the SiPM connected to the pilot chip. We also describe the prototype board with a micro-controller designed to adjust the parameters of the chip and to provide an adjustable and temperature controlled power supply to the SiPM. The results of the tests obtained allow us to refine the circuits design for the next chip. This chip has been developed inside the ALTCRISS and KLOE collaboration.

  17. Study of some physical aspects previous to design of an exponential experiment

    International Nuclear Information System (INIS)

    Caro, R.; Francisco, J. L. de

    1961-01-01

    This report presents the theoretical study of some physical aspects previous to the design of an exponential facility. The are: Fast and slow flux distribution in the multiplicative medium and in the thermal column, slowing down in the thermal column, geometrical distribution and minimum needed intensity of sources access channels and perturbations produced by possible variations in its position and intensity. (Author) 4 refs

  18. Communication Complexity A treasure house of lower bounds

    Indian Academy of Sciences (India)

    Prahladh Harsha TIFR

    Applications. Data structures, VLSI design, time-space tradeoffs, circuit complexity, streaming, auctions, combinatorial optimization . . . Randomized Communication Complexity of INTER: Ω(n). ▷ There is no parallelizable monotone circuit that computes a matching in a given graph ...

  19. Computer problem-solving coaches for introductory physics: Design and usability studies

    Science.gov (United States)

    Ryan, Qing X.; Frodermann, Evan; Heller, Kenneth; Hsu, Leonardo; Mason, Andrew

    2016-06-01

    The combination of modern computing power, the interactivity of web applications, and the flexibility of object-oriented programming may finally be sufficient to create computer coaches that can help students develop metacognitive problem-solving skills, an important competence in our rapidly changing technological society. However, no matter how effective such coaches might be, they will only be useful if they are attractive to students. We describe the design and testing of a set of web-based computer programs that act as personal coaches to students while they practice solving problems from introductory physics. The coaches are designed to supplement regular human instruction, giving students access to effective forms of practice outside class. We present results from large-scale usability tests of the computer coaches and discuss their implications for future versions of the coaches.

  20. The Design and Semi-Physical Simulation Test of Fault-Tolerant Controller for Aero Engine

    Science.gov (United States)

    Liu, Yuan; Zhang, Xin; Zhang, Tianhong

    2017-11-01

    A new fault-tolerant control method for aero engine is proposed, which can accurately diagnose the sensor fault by Kalman filter banks and reconstruct the signal by real-time on-board adaptive model combing with a simplified real-time model and an improved Kalman filter. In order to verify the feasibility of the method proposed, a semi-physical simulation experiment has been carried out. Besides the real I/O interfaces, controller hardware and the virtual plant model, semi-physical simulation system also contains real fuel system. Compared with the hardware-in-the-loop (HIL) simulation, semi-physical simulation system has a higher degree of confidence. In order to meet the needs of semi-physical simulation, a rapid prototyping controller with fault-tolerant control ability based on NI CompactRIO platform is designed and verified on the semi-physical simulation test platform. The result shows that the controller can realize the aero engine control safely and reliably with little influence on controller performance in the event of fault on sensor.

  1. Design of Video Games for Children’s Diet and Physical Activity Behavior Change

    Science.gov (United States)

    Baranowski, Tom; Thompson, Debbe; Buday, Richard; Lu, Amy Shirong; Baranowski, Janice

    2012-01-01

    Serious video games (VG) offer new opportunities for promoting health related diet and physical activity change among children. Games can be designed to use storylines, characters, and behavior change procedures, including modeling (e.g., engaging characters make changes themselves, and face and overcome challenges related to fruit and vegetable (FV) and physical activity (PA) goal attainment and/or consumption), skill development (e.g., asking behaviors; virtual recipe preparation), self regulatory behaviors (problem solving, goal setting, goal review, decision making), rewards (e.g., points and positive statements generated by the program), immediate feedback (e.g., through characters and/or statements that appear on the computer screen at critical decision points), and personalization (e.g., tailored choices offered at critical junctures, based on responses to baselines questions related to preferences, outcome expectancies, etc). We are in the earliest stages of learning how to optimally design effective behavior change procedures for use in VG, and yet they have been demonstrated to change behavior. As we learn, VG offer more and better opportunities for obesity prevention that can adjust to individual needs and preferences. PMID:25364331

  2. SPACE for physical activity - a multicomponent intervention study: study design and baseline findings from a cluster randomized controlled trial

    Directory of Open Access Journals (Sweden)

    Kristensen Peter L

    2011-10-01

    Full Text Available Abstract Background The aim of the School site, Play Spot, Active transport, Club fitness and Environment (SPACE Study was to develop, document, and assess a comprehensive intervention in local school districts that promote everyday physical activity (PA among 11-15-year-old adolescents. The study is based on a social ecological framework, and is designed to implement organizational and structural changes in the physical environment. Methods/design The SPACE Study used a cluster randomized controlled study design. Twenty-one eligible schools in the Region of Southern Denmark were matched and randomized in seven pairs according to eight matching variables summarized in an audit tool (crow-fly distance from residence to school for 5-6th graders; area household income; area education level; area ethnicity distribution; school district urbanity; condition and characteristics of school outdoor areas; school health policy; and active transport in the local area. Baseline measurements with accelerometers, questionnaires, diaries, and physical fitness tests were obtained in Spring 2010 in 5-6th grade in 7 intervention and 7 control schools, with follow-up measurements to be taken in Spring 2012 in 7-8th grade. The primary outcome measure is objective average daily physical activity and will be supported by analyses of time spent in moderate to vigorous activity and time spent sedentary. Other secondary outcome measures will be obtained, such as, overweight, physical fitness, active commuting to/from school and physical activity in recess periods. Discussion A total of 1348 adolescents in 5-6th grade in the Region of Southern Denmark participated at baseline (n = 14 schools. The response rate was high in all type of measurements (72.6-97.4%. There were no significant differences between intervention and control groups at baseline according to selected background variables and outcome measures: gender (p = .54, age (p = .17, BMI (p = .59, waist

  3. Design of a cross-sectional study on physical fitness and physical activity in children and adolescents after burn injury

    Directory of Open Access Journals (Sweden)

    Disseldorp Laurien M

    2012-12-01

    Full Text Available Abstract Background Burn injuries have a major impact on the patient’s physical and psychological functioning. The consequences can, especially in pediatric burns, persist long after the injury. A decrease in physical fitness seems logical as people survive burn injuries after an often extensive period of decreased activity and an increased demand of proteins leading to catabolism, especially of muscle mass. However, knowledge on the possibly affected levels of physical fitness in children and adolescents after burn injury is limited and pertains only to children with major burns. The current multidimensional study aims to determine the level of physical fitness, the level of physical activity, health-related quality of life and perceived fatigue in children after a burn injury. Furthermore, interrelations between those levels will be explored, as well as associations with burn characteristics. Methods/design Children and adolescents in the age range of 6 up to and including 18 years are invited to participate in this cross-sectional descriptive study if they have been admitted to one of the three Dutch burn centers between 6 months and 5 years ago with a burn injury involving at least 10% of the total body surface area and/or were hospitalized ≥ 6 weeks. Physical fitness assessments will take place in a mobile exercise lab. Quantitative measures of cardiorespiratory endurance, muscular strength, body composition and flexibility will be obtained. Outcomes will be compared with Dutch reference values. Physical activity, health-related quality of life and fatigue will be assessed using accelerometry and age-specific questionnaires. Discussion The findings of the current study will contribute to a better understanding of the long-term consequences of burn injury in children and adolescents after burns. The results can guide rehabilitation to facilitate a timely and optimal physical recovery. Trial registration The study is registered in

  4. Analogue and Mixed-Signal Integrated Circuits for Space Applications

    CERN Document Server

    2014-01-01

    The purpose of AMICSA 2014 (organised in collaboration of ESA and CERN) is to provide an international forum for the presentation and discussion of recent advances in analogue and mixed-signal VLSI design techniques and technologies for space applications.

  5. Evaluation of Standard Concepts Design of Library Interior Physical Environment

    Directory of Open Access Journals (Sweden)

    Debri Harindya Putri

    2018-01-01

    Full Text Available Currently the function of a room is not only used as a shelter, the function of the room itself to be increased as a refreshing or relaxation area for users to follow the development of creativity and technology in the field of design. The comfortable factor becomes the main factor that indicates a successful process of creating a space. No exception library. The nature of library seemed stiff because of its function as a place to read, now can be developed and made into more dynamic with the special design concepts or color patterns used. Libraries can be created a special concept that suits the characteristics of the users themselves. Most users of the library, especially in college libraries are teenagers. Naturally, teenagers like to gather with their friends and we have to facilitate this activity in our library design concept. In addition we can also determine the needs of users through research by questionnaire method. The answers of users can be mapped and drawn conclusions. To explore the research, the author reviewed some literature about library interior design and observed the library of Ma Chung University as a case study. The combined results of the method can be concluded and the discovery of ideal standards of physical environment. So, the library can be made as a comfortable reading environment so as to increased interest in reading behavior and the frequent visits of students in the library

  6. Effects of physical activity calorie expenditure (PACE) labeling: study design and baseline sample characteristics.

    Science.gov (United States)

    Viera, Anthony J; Tuttle, Laura; Olsson, Emily; Gras-Najjar, Julie; Gizlice, Ziya; Hales, Derek; Linnan, Laura; Lin, Feng-Chang; Noar, Seth M; Ammerman, Alice

    2017-09-12

    Obesity and physical inactivity are responsible for more than 365,000 deaths per year and contribute substantially to rising healthcare costs in the US, making clear the need for effective public health interventions. Calorie labeling on menus has been implemented to guide consumer ordering behaviors, but effects on calories purchased has been minimal. In this project, we tested the effect of physical activity calorie expenditure (PACE) food labels on actual point-of-decision food purchasing behavior as well as physical activity. Using a two-group interrupted time series cohort study design in three worksite cafeterias, one cafeteria was assigned to the intervention condition, and the other two served as controls. Calories from food purchased in the cafeteria were assessed by photographs of meals (accompanied by notes made on-site) using a standardized calorie database and portion size-estimation protocol. Primary outcomes will be average calories purchased and minutes of moderate to vigorous physical activity (MVPA) by individuals in the cohorts. We will compare pre-post changes in study outcomes between study groups using piecewise generalized linear mixed model regressions (segmented regressions) with a single change point in our interrupted time-series study. The results of this project will provide evidence of the effectiveness of worksite cafeteria menu labeling, which could potentially inform policy intervention approaches. Labels that convey information in a more readily understandable manner may be more effective at motivating behavior change. Strengths of this study include its cohort design and its robust data capture methods using food photographs and accelerometry.

  7. The design of the high energy physics massive data migration system

    International Nuclear Information System (INIS)

    Shi Jingyan; Zang Dongsong; Cheng Yaodong

    2010-01-01

    High energy physics is the typical data massive computing application due to its huge experiment data. For example, the amount of BESⅢ experiment data reaches to 4PB. Hierarchical storage system is adapted for the application in which disk array and tape library are used. It is quite important to migrate massive data from disk array to tape library. The article introduces the design and realization for the high performance data migration system between disk array and tape library. Besides, the system provides web page as the friendly user interface. (authors)

  8. Physics Design of the National Compact Stellarator Experiment

    International Nuclear Information System (INIS)

    Neilson, G.H.; Zarnstorff, M.C.; Lyon, J.F.

    2002-01-01

    Compact quasi-axisymmetric stellarators offer the possibility of combining the steady-state low-recirculating power, external control, and disruption resilience of previous stellarators with the low-aspect ratio, high beta-limit, and good confinement of advanced tokamaks. Quasi-axisymmetric equilibria have been developed for the proposed National Compact Stellarator Experiment (NCSX) with average aspect ratio approximately 4.4 and average elongation approximately 1.8. Even with bootstrap-current consistent profiles, they are passively stable to the ballooning, kink, vertical, Mercier, and neoclassical-tearing modes for b > 4%, without the need for external feedback or conducting walls. The bootstrap current generates only 1/4 of the magnetic rotational transform at b = 4% (the rest is from the coils). Transport simulations show adequate fast-ion confinement and thermal neoclassical transport similar to equivalent tokamaks. Modular coils have been designed which reproduce the physics properties, provide good flux surfaces, and allow flexible variation of the plasma shape to control the predicted MHD stability and transport properties

  9. Designing physical protection technology for insider protection

    International Nuclear Information System (INIS)

    Trujillo, A.A.; Waddoups, I.G.

    1986-01-01

    Since its inception, the nuclear industry has been engaged in providing protection against an insider threat. Although insider protection activities have been fairly successful in the past, present societal conditions require increased protection to further minimize the existence of an insider or the consequences of an insider-perpetrated incident. Integration of insider protection techniques into existing administrative and operational procedures has resulted in economic and operational impacts. Future increases in insider protection may result in even greater impacts, so we must proceed wisely as new approaches are developed. Increased emphasis on background investigations, security clearances, human reliability programs, security awareness activities, and the development of technology to address the insider threat are evidence of continuing concern in this area. Experience ranging from operational test and evaluation of developmental equipment to conceptual designs for new facilities has led to the development of general principles and conclusions for mitigating the insider threat while minimizing adverse impacts on site operations. Important principles include real-time monitoring of personnel and material and requiring that the physical protection and material control and accounting systems to be much more coordinated and integrated than in the past

  10. Final definition and preliminary design study for the initial atmospheric cloud physics laboratory, a spacelab mission payload

    Science.gov (United States)

    1976-01-01

    The Atmospheric Cloud Physics Laboratory (ACPL) task flow is shown. Current progress is identified. The requirements generated in task 1 have been used to formulate an initial ACPL baseline design concept. ACPL design/functional features are illustrated. A timetable is presented of the routines for ACPL integration with the spacelab system.

  11. Worksite interventions for preventing physical deterioration among employees in job-groups with high physical work demands: background, design and conceptual model of FINALE.

    Science.gov (United States)

    Holtermann, Andreas; Jørgensen, Marie B; Gram, Bibi; Christensen, Jeanette R; Faber, Anne; Overgaard, Kristian; Ektor-Andersen, John; Mortensen, Ole S; Sjøgaard, Gisela; Søgaard, Karen

    2010-03-09

    A mismatch between individual physical capacities and physical work demands enhance the risk for musculoskeletal disorders, poor work ability and sickness absence, termed physical deterioration. However, effective intervention strategies for preventing physical deterioration in job groups with high physical demands remains to be established. This paper describes the background, design and conceptual model of the FINALE programme, a framework for health promoting interventions at 4 Danish job groups (i.e. cleaners, health-care workers, construction workers and industrial workers) characterized by high physical work demands, musculoskeletal disorders, poor work ability and sickness absence. A novel approach of the FINALE programme is that the interventions, i.e. 3 randomized controlled trials (RCT) and 1 exploratory case-control study are tailored to the physical work demands, physical capacities and health profile of workers in each job-group. The RCT among cleaners, characterized by repetitive work tasks and musculoskeletal disorders, aims at making the cleaners less susceptible to musculoskeletal disorders by physical coordination training or cognitive behavioral theory based training (CBTr). Because health-care workers are reported to have high prevalence of overweight and heavy lifts, the aim of the RCT is long-term weight-loss by combined physical exercise training, CBTr and diet. Construction work, characterized by heavy lifting, pushing and pulling, the RCT aims at improving physical capacity and promoting musculoskeletal and cardiovascular health. At the industrial work-place characterized by repetitive work tasks, the intervention aims at reducing physical exertion and musculoskeletal disorders by combined physical exercise training, CBTr and participatory ergonomics. The overall aim of the FINALE programme is to improve the safety margin between individual resources (i.e. physical capacities, and cognitive and behavioral skills) and physical work demands

  12. Metal semiconductor contacts and devices

    CERN Document Server

    Cohen, Simon S; Einspruch, Norman G

    1986-01-01

    VLSI Electronics Microstructure Science, Volume 13: Metal-Semiconductor Contacts and Devices presents the physics, technology, and applications of metal-semiconductor barriers in digital integrated circuits. The emphasis is placed on the interplay among the theory, processing, and characterization techniques in the development of practical metal-semiconductor contacts and devices.This volume contains chapters that are devoted to the discussion of the physics of metal-semiconductor interfaces and its basic phenomena; fabrication procedures; and interface characterization techniques, particularl

  13. Physics design and experimental study of tokamak divertor

    International Nuclear Information System (INIS)

    Yan Jiancheng; Gao Qingdi; Yan Longwen; Wang Mingxu; Deng Baiquan; Zhang Fu; Zhang Nianman; Ran Hong; Cheng Fayin; Tang Yiwu; Chen Xiaoping

    2007-06-01

    The divertor configuration of HL-2A tokamak is optimized, and the plasma performance in divertor is simulated with B2-code. The effects of collisionality on plasma-wall transition in the scrape-off layer of divertor are investigated, high performances of the divertor plasma in HL-2A are simulated, and a quasi- stationary RS operation mode is established with the plasma controlled by LHCD and NBI. HL-2A tokamak has been successfully operated in divertor configuration. The major parameters: plasma current I p =320 kA, toroidal field B t =2.2 T, plasma discharger duration T d =1580 ms ware achieved at the end of 2004. The preliminary experimental researches of advanced diverter have been carried out. Design studies of divertor target plate for high power density fusion reactor have been carried out, especially, the physical processes on the surface of flowing liquid lithium target plate. The exploration research of improving divertor ash removal efficiency and reducing tritium inventory resulting from applying the RF ponderomotive force potential is studied. The optimization structure design studies of FEB-E reactor divertor are performed. High flux thermal shock experiments were carried on tungsten and carbon based materials. Hot Isostatic Press (HIP) method was employed to bond tungsten to copper alloys. Electron beam simulated thermal fatigue tests were also carried out to W/Cu bondings. Thermal desorption and surface modification of He + implanted into tungsten have been studied. (authors)

  14. Rationale, design and methods for a randomised and controlled trial to evaluate "Animal Fun" - a program designed to enhance physical and mental health in young children

    Directory of Open Access Journals (Sweden)

    McLaren Sue

    2010-11-01

    Full Text Available Abstract Background Children with poor motor ability have been found to engage less in physical activities than other children, and a lack of physical activity has been linked to problems such as obesity, lowered bone mineral density and cardiovascular risk factors. Furthermore, if children are confident with their fine and gross motor skills, they are more likely to engage in physical activities such as sports, crafts, dancing and other physical activity programs outside of the school curriculum which are important activities for psychosocial development. The primary objective of this project is to comprehensively evaluate a whole of class physical activity program called Animal Fun designed for Pre-Primary children. This program was designed to improve the child's movement skills, both fine and gross, and their perceptions of their movement ability, promote appropriate social skills and improve social-emotional development. Methods The proposed randomized and controlled trial uses a multivariate nested cohort design to examine the physical (motor coordination and psychosocial (self perceptions, anxiety, social competence outcomes of the program. The Animal Fun program is a teacher delivered universal program incorporating animal actions to facilitate motor skill and social skill acquisition and practice. Pre-intervention scores on motor and psychosocial variables for six control schools and six intervention schools will be compared with post-intervention scores (end of Pre-Primary year and scores taken 12 months later after the children's transition to primary school Year 1. 520 children aged 4.5 to 6 years will be recruited and it is anticipated that 360 children will be retained to the 1 year follow-up. There will be equal numbers of boys and girls. Discussion If this program is found to improve the child's motor and psychosocial skills, this will assist in the child's transition into the first year of school. As a result of these changes

  15. The International Linear Collider Technical Design Report - Volume 2: Physics

    CERN Document Server

    Barklow, Tim; Fujii, Keisuke; Gao, Yuanning; Hoang, Andre; Kanemura, Shinya; List, Jenny; Logan, Heather E; Nomerotski, Andrei; Perelstein, Maxim; Peskin, Michael E; Pöschl, Roman; Reuter, Jürgen; Riemann, Sabine; Savoy-Navarro, Aurore; Servant, Geraldine; Tait, Tim M P

    2013-01-01

    The International Linear Collider Technical Design Report (TDR) describes in four volumes the physics case and the design of a 500 GeV centre-of-mass energy linear electron-positron collider based on superconducting radio-frequency technology using Niobium cavities as the accelerating structures. The accelerator can be extended to 1 TeV and also run as a Higgs factory at around 250 GeV and on the Z0 pole. A comprehensive value estimate of the accelerator is give, together with associated uncertainties. It is shown that no significant technical issues remain to be solved. Once a site is selected and the necessary site-dependent engineering is carried out, construction can begin immediately. The TDR also gives baseline documentation for two high-performance detectors that can share the ILC luminosity by being moved into and out of the beam line in a "push-pull" configuration. These detectors, ILD and SiD, are described in detail. They form the basis for a world-class experimental programme that promises to incr...

  16. DEVELOPING THE PHYSICS DESIGN FOR NDCX-II, A UNIQUE PULSE-COMPRESSING ION ACCELERATOR

    International Nuclear Information System (INIS)

    Friedman, A.; Barnard, J.J.; Cohen, R.H.; Grote, D.P.; Lund, S.M.; Sharp, W.M.; Faltens, A.; Henestroza, E.; Jung, J.-Y.; Kwan, J.W.; Lee, E.P.; Leitner, M.A.; Logan, B.G.; Vay, J.-L.; Waldron, W.L.; Davidson, R.C.; Dorf, M.; Gilson, E.P.; Kaganovich, I.

    2009-01-01

    The Heavy Ion Fusion Science Virtual National Laboratory (a collaboration of LBNL, LLNL, and PPPL) is using intense ion beams to heat thin foils to the 'warm dense matter' regime at ∼ + ions to ∼1 ns while accelerating it to 3-4 MeV over ∼15 m. Strong space charge forces are incorporated into the machine design at a fundamental level. We are using analysis, an interactive 1D PIC code (ASP) with optimizing capabilities and centroid tracking, and multi-dimensional Warpcode PIC simulations, to develop the NDCX-II accelerator. This paper describes the computational models employed, and the resulting physics design for the accelerator.

  17. The Impact of Learning Task Design on Students' Situational Interest in Physical Education

    Science.gov (United States)

    Roure, Cédric; Pasco, Denis

    2018-01-01

    Purpose: Based on the framework of interest, studies have shown that teachers can enhance students' situational interest (SI) by manipulating the components of learning tasks. The purpose of this study was to examine the impact of learning task design on students' SI in physical education (PE). Method: The participants were 167 secondary school…

  18. Physics design of a 10 MeV, 6 kW travelling wave electron linac

    Indian Academy of Sciences (India)

    We present the physics design of a 10 MeV, 6 kW S-band (2856 MHz) electron linear accelerator (linac), which has been recently built and successfully operated at Raja Ramanna Centre for Advanced Technology, Indore. The accelerating structure is a 2 π / 3 mode constant impedance travelling wave structure, which ...

  19. ELEC-2002

    CERN Multimedia

    Technical Training; Tel 74924

    2001-01-01

    In the framework of the Technical Training Programme, a new format of course will be inaugurated in 2002. ELEC-2002 is a 15-session modern electronic course given by Cern physicists and engineers. It is designed for people who are not electronics specialists, for example physicists, engineers and technicians working at or visiting the laboratory, who use or will use electronics in their present or future activities, in particular in the context of the LHC accelerator and experiments. Starting from a review of general electronics and analogue signal processing, the first term will present data transmission, digital design, modular electronics and electromagnetic compatibility. Applications to physics experiments at the LHC will include first and high level trigger and data acquisition systems. The second term will focus on VLSI, digital and analogue design technologies, radiation effects in devices and circuits, and new trends in microelectronics. ELEC-2002 will take place on Tuesdays and Thursdays, from 14h00...

  20. Hardware Descriptive Languages: An Efficient Approach to Device ...

    African Journals Online (AJOL)

    Contemporarily, owing to astronomical advancements in the very large scale integration (VLSI) market segments, hardware engineers are now focusing on how to develop their new digital system designs in programmable languages like very high speed integrated circuit hardwaredescription language (VHDL) and Verilog ...

  1. Chakrabarti, Prof. Partha Pratim

    Indian Academy of Sciences (India)

    Elected: 2000 Section: Engineering & Technology. Chakrabarti, Prof. Partha Pratim Ph.D. (IIT, Kharagpur), FNA, FNAE. Date of birth: 1 October 1962. Specialization: Artificial Intelligence, Computer Aided Design for VLSI and Algorithms Address: Director, Indian Institute of Technology, Kharagpur 721 302, W.B.. Contact:

  2. Shuffle-Exchange Mesh Topology for Networks-on-Chip

    OpenAIRE

    Sabbaghi-Nadooshan, Reza; Modarressi, Mehdi; Sarbazi-Azad, Hamid

    2010-01-01

    The mesh topology has been used in a variety of interconnection network applications especially for NoC designs due to its desirable properties in VLSI implementation. In this chapter, we proposed a new topology based on the shuffle-exchange topology, the 2D

  3. Low Convergence path to Fusion I: Ignition physics and high margin design

    Science.gov (United States)

    Molvig, Kim; Schmitt, M. J.; McCall, G. H.; Betti, R.; Foula, D. H.; Campbell, E. M.

    2016-10-01

    A new class of inertial fusion capsules is presented that combines multi-shell targets with laser direct drive at low intensity (280 TW/cm2) to achieve robust ignition. These Revolver targets consist of three concentric metal shells, enclosing a volume of 10s of µg of liquid deuterium-tritium fuel. The inner shell pusher, nominally of gold, is compressed to over 2000 g/cc, effectively trapping the radiation and enabling ignition at low temperature (2.5 keV) and relatively low implosion velocity (20 cm/micro-sec) at a fuel convergence of 9. Ignition is designed to occur well ``upstream'' from stagnation, with implosion velocity at 90% of maximum, so that any deceleration phase mix will occur only after ignition. Mix, in all its non-predictable manifestations, will effect net yield in a Revolver target - but not the achievement of ignition and robust burn. Simplicity of the physics is the dominant principle. There is no high gain requirement. These basic physics elements can be combined into a simple analytic model that generates a complete target design specification given the fuel mass and the kinetic energy needed in the middle (drive) shell (of order 80 kJ). This research supported by the US DOE/NNSA, performed in part at LANL, operated by LANS LLC under contract DE-AC52-06NA25396.

  4. Silicon microstrip detector development in the Institute for High Energy Physics Zeuthen, GDR

    International Nuclear Information System (INIS)

    Lange, W.; Nowak, W.D.; Truetzschler, K.

    1990-01-01

    This paper reports that in regard of the growing interest to study short living particles demanding for high resolution vertex detectors the authors started to build Si microstrip detectors. The first detector generation was characterized by a small area of silicon and a readout via printed circuit board fan out. Now they can assemble detectors with larger areas and VLSI readout. A special cleanroom has been built. Equipment and tools necessary are available. Silicon wafers and thick film hybrid circuits are fabricated under collaboration by the GDR industry. Applications of their detectors were several test-runs at CERN to calibrate the L3 time expansion chamber (TEC) and the L3 muon chambers. A 10-layer telescope is designed now and it is planned to calibrate a high resolution scintillation fiber target. Future applications will be high resolution vertex detectors, e.g. L3 upgrading (LEP, CERN) or KEDR (VEPP-5, Novosibirsk). Further investigations will concern AC coupled strip detectors (single and double sided) and pixel and/or pad detectors

  5. Physics design of an ultra-long pulsed tokamak reactor

    International Nuclear Information System (INIS)

    Ogawa, Y.; Inoue, N.; Wang, J.; Yamamoto, T.; Okano, K.

    1993-01-01

    A pulsed tokamak reactor driven only by inductive current drive has recently revived, because the non-inductive current drive efficiency seems to be too low to realize a steady-state tokamak reactor with sufficiently high energy gain Q. Essential problems in pulsed operation mode is considered to be material fatigue due to cyclic operation and expensive energy storage system to keep continuous electric output during a dwell time. To overcome these problems, we have proposed an ultra-long pulsed tokamak reactor called IDLT (abbr. Inductively operated Day-Long Tokamak), which has the major and minor radii of 10 m and 1.87 m, respectively, sufficiently to ensure the burning period of about ten hours. Here we discuss physical features of inductively operated tokamak plasmas, employing the similar constraints with ITER CDA design for engineering issues. (author) 9 refs., 2 figs., 1 tab

  6. Physics design of experimental metal fuelled fast reactor cores for full scale demonstration

    International Nuclear Information System (INIS)

    Devan, K.; Bachchan, Abhitab; Riyas, A.; Sathiyasheela, T.; Mohanakrishnan, P.; Chetal, S.C.

    2011-01-01

    Highlights: → In this study we made physics designs of experimental metal fast reactor cores. → Aim is for full-scale demonstration of fuel assemblies in a commercial power reactor. → Minimum power with adequate safety is considered. → In addition, fuel sustainability is also considered in the design. → Sodium bonded U-Pu-6%Zr and mechanically bonded U-Pu alloys are used. - Abstract: Fast breeder reactors based on metal fuel are planned to be in operation for the year beyond 2025 to meet the growing energy demand in India. A road map is laid towards the development of technologies required for launching 1000 MWe commercial metal breeder reactors with closed fuel cycle. Construction of a test reactor with metallic fuel is also envisaged to provide full-scale testing of fuel sub-assemblies planned for a commercial power reactor. Physics design studies have been carried out to arrive at a core configuration for this experimental facility. The aim of this study is to find out minimum power of the core to meet the requirements of safety as well as full-scale demonstration. In addition, fuel sustainability is also a consideration in the design. Two types of metallic fuel pins, viz. a sodium bonded ternary (U-Pu-6% Zr) alloy and a mechanically bonded binary (U-Pu) alloy with 125 μm thickness zirconium liner, are considered for this study. Using the European fast reactor neutronics code system, ERANOS 2.1, four metallic fast reactor cores are optimized and estimated their important steady state parameters. The ABBN-93 system is also used for estimating the important safety parameters. Minimum achievable power from the converter metallic core is 220 MWt. A 320 MWt self-sustaining breeder metal core is recommended for the test facility.

  7. Preliminary evaluation of PSCM and BIPP melter design and operating conditions using physical modeling

    International Nuclear Information System (INIS)

    Skarda, R.J.; Hauser, S.G.; Fort, J.A.

    1985-05-01

    The Glass Melter Physical Modeling investigation was initiated to support Pacific Northwest Laboratory (PNL) Hanford Waste Vitrification Program. Specifically, results discussed herein are those of the modeled B-Plant Immobilization Pilot Plant (BIPP) and Pilot Scale Ceramic Melter (PSCM) designs. The purpose of this study was to evaluate various melter design features using laboratory scale models. Hydrodynamic, thermal, and electrical similarity between the modeling fluid and the molten glass were primary objectives. Stroboscopic velocity measurements (flow visualization), temperature measurements, and electrical potential measurements were used to investigate the molten glass behavior. Results from this effort are to provide input to melter design and proposed operation in addition to providing a data base for verifying numerical models. 13 refs., 48 figs., 24 tabs

  8. A VLSI recurrent network of integrate-and-fire neurons connected by plastic synapses with long-term memory.

    Science.gov (United States)

    Chicca, E; Badoni, D; Dante, V; D'Andreagiovanni, M; Salina, G; Carota, L; Fusi, S; Del Giudice, P

    2003-01-01

    Electronic neuromorphic devices with on-chip, on-line learning should be able to modify quickly the synaptic couplings to acquire information about new patterns to be stored (synaptic plasticity) and, at the same time, preserve this information on very long time scales (synaptic stability). Here, we illustrate the electronic implementation of a simple solution to this stability-plasticity problem, recently proposed and studied in various contexts. It is based on the observation that reducing the analog depth of the synapses to the extreme (bistable synapses) does not necessarily disrupt the performance of the device as an associative memory, provided that 1) the number of neurons is large enough; 2) the transitions between stable synaptic states are stochastic; and 3) learning is slow. The drastic reduction of the analog depth of the synaptic variable also makes this solution appealing from the point of view of electronic implementation and offers a simple methodological alternative to the technological solution based on floating gates. We describe the full custom analog very large-scale integration (VLSI) realization of a small network of integrate-and-fire neurons connected by bistable deterministic plastic synapses which can implement the idea of stochastic learning. In the absence of stimuli, the memory is preserved indefinitely. During the stimulation the synapse undergoes quick temporary changes through the activities of the pre- and postsynaptic neurons; those changes stochastically result in a long-term modification of the synaptic efficacy. The intentionally disordered pattern of connectivity allows the system to generate a randomness suited to drive the stochastic selection mechanism. We check by a suitable stimulation protocol that the stochastic synaptic plasticity produces the expected pattern of potentiation and depression in the electronic network.

  9. Elementary particle physics in early physics education

    CERN Document Server

    Wiener, Gerfried

    2017-01-01

    Current physics education research is faced with the important question of how best to introduce elementary particle physics in the classroom early on. Therefore, a learning unit on the subatomic structure of matter was developed, which aims to introduce 12-year-olds to elementary particles and fundamental interactions. This unit was iteratively evaluated and developed by means of a design-based research project with grade-6 students. In addition, dedicated professional development programmes were set up to instruct high school teachers about the learning unit and enable them to investigate its didactical feasibility. Overall, the doctoral research project led to successful results and showed the topic of elementary particle physics to be a viable candidate for introducing modern physics in the classroom. Furthermore, thanks to the design-based research methodology, the respective findings have implications for both physics education and physics education research, which will be presented during the PhD defen...

  10. Designing and using multiple-possibility physics problems in physics courses

    Science.gov (United States)

    Shekoyan, Vazgen

    2012-02-01

    One important aspect of physics instruction is helping students develop better problem solving expertise. Besides enhancing the content knowledge, problems help students develop different cognitive abilities and skills. This presentation focuses on multiple-possibility problems (alternatively called ill-structured problems). These problems are different from traditional ``end of chapter'' single-possibility problems. They do not have one right answer and thus the student has to examine different possibilities, assumptions and evaluate the outcomes. To solve such problems one has to engage in a cognitive monitoring called epistemic cognition. It is an important part of thinking in real life. Physicists routinely use epistemic cognition when they solve problems. I have explored the instructional value of using such problems in introductory physics courses.

  11. The International Linear Collider Technical Design Report - Volume 2: Physics

    Energy Technology Data Exchange (ETDEWEB)

    Baer, Howard [Univ. of Oklahoma, Norman, OK (United States); Barklow, Tim [SLAC National Accelerator Lab., Menlo Park, CA (United States); Fujii, Keisuke [National Lab. for High Energy Physics (KEK), Tokai (Japan); Gao, Yuanning [Unlisted; Hoang, Andre [Univ. of Vienna (Austria); Kanemura, Shinya [Univ. of Toyama (Japan); List, Jenny [Deutsches Elektronen-Synchrotron (DESY), Hamburg (Germany); Logan, Heather E. [Carleton Univ., Ottawa, ON (Canada); Nomerotski, Andrei [Univ. of Oxford (United Kingdom); Perelstein, Maxim [Cornell Univ., Ithaca, NY (United States); Peskin, Michael E. [SLAC National Accelerator Lab., Menlo Park, CA (United States); Pöschl, Roman [Univ. Paris-Sud, Orsay (France). Linear Accelerator Lab. (LAL); Reuter, Jürgen [Deutsches Elektronen-Synchrotron (DESY), Hamburg (Germany); Riemann, Sabine [Deutsches Elektronen-Synchrotron (DESY), Hamburg (Germany); Savoy-Navarro, Aurore [CNRS/IN2P3. Univ. Paris (France). Observatoire de Paris. AstroParticule et Cosmologie (APC); Servant, Geraldine [European Organization for Nuclear Research (CERN), Geneva (Switzerland); Tait, Tim P. [Univ. of California, Los Angeles, CA (United States); Yu, Jaehoon [Univ. of Science and Technology of China, Hefei (China)

    2013-06-26

    The International Linear Collider Technical Design Report (TDR) describes in four volumes the physics case and the design of a 500 GeV centre-of-mass energy linear electron-positron collider based on superconducting radio-frequency technology using Niobium cavities as the accelerating structures. The accelerator can be extended to 1 TeV and also run as a Higgs factory at around 250 GeV and on the Z0 pole. A comprehensive value estimate of the accelerator is give, together with associated uncertainties. It is shown that no significant technical issues remain to be solved. Once a site is selected and the necessary site-dependent engineering is carried out, construction can begin immediately. The TDR also gives baseline documentation for two high-performance detectors that can share the ILC luminosity by being moved into and out of the beam line in a "push-pull" configuration. These detectors, ILD and SiD, are described in detail. They form the basis for a world-class experimental programme that promises to increase significantly our understanding of the fundamental processes that govern the evolution of the Universe.

  12. A one-semester course in modeling of VSLI interconnections

    CERN Document Server

    Goel, Ashok

    2015-01-01

    Quantitative understanding of the parasitic capacitances and inductances, and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits. More than 65 percent of the delays on the integrated circuit chip occur in the interconnections and not in the transistors on the chip. Mathematical techniques to model the parasitic capacitances, inductances, propagation delays, crosstalk noise, and electromigration-induced failure associated with the interconnections in the realistic high-density environment on a chip will be discussed. A One-Semester Course in Modeling of VLSI Interconnections also includes an overview of the future interconnection technologies for the nanotechnology circuits.

  13. Physics and design issues of asymmetric storage ring colliders as B-factories

    International Nuclear Information System (INIS)

    Chattopadhyay, S.

    1989-08-01

    This paper concentrates on generic R ampersand D and design issues of asymmetric colliders via a specific example, namely a 9 GeV x 3 GeV collider based on PEP at SLAC. An asymmetric e + -e - collider at the Y(4s) and with sufficiently high luminosity (10 33 -10 34 cm -2 s -1 ) offers the possibility of studying mixing, rare decays, and CP violation in the B bar B meson system, as well as ''beautiful'' tau-charm physics, and has certain qualitative advantages from detection and machine design points of view. These include: the energy constraint; clean environment (∼25% B + B - , B 0 bar B 0 ); large cross section (1 nb); vertex reconstruction (from the time development of space-time separated B and bar B decays due to moving center-of-mass); reduced backgrounds; greatest sensitivity to CP violation in B → CP eigenstate; the possibility of using higher collision frequencies, up to 100 MHz, in a head-on colliding mode using magnetic separation. It is estimated that for B → ΨK s , an asymmetric collider has an advantage equivalent to a factor of five in luminosity relative to a symmetric one. There are, however, questions with regard to the physics of the asymmetric beam-beam coulomb interaction that may limit the intrinsic luminosity and the possibility of realizing the small beam pipes necessary to determine the vertices. 16 refs., 2 figs

  14. Evaluation of a social cognitive theory-based email intervention designed to influence the physical activity of survivors of breast cancer.

    Science.gov (United States)

    Hatchett, Andrew; Hallam, Jeffrey S; Ford, M Allison

    2013-04-01

    The aim of this study is to evaluate a 12-week social cognitive theory (SCT)-based email intervention designed to influence the physical activity of survivors of breast cancer. Seventy-four volunteers (intervention group, n = 36; control group, n = 38) were recruited by mass email and written letter solicitation. Participants completed a series of online questionnaires measuring demographic characteristics, physical activity readiness, level of physical activity and selected SCT variables at baseline, 6 and 12 weeks. The intervention group received email messages based on SCT designed specifically for breast cancer survivors and targeting physical activity. For the first 6 weeks of the intervention, participants assigned to the intervention group received messages weekly, from weeks 7 to 12, participants received messages every other week and had access to an e-counselor. The control group did not receive email messages, nor did they have access to an e-counselor. Significant differences in levels of self-reported vigorous physical activity were found between groups at 6 and 12 weeks. Significant differences were also found for self-reported moderate physical activity at 12 weeks. Email-based interventions based on SCT can significantly influence levels of self-reported physical activity of breast cancer survivors. Copyright © 2012 John Wiley & Sons, Ltd.

  15. Learning Design of Problem Based Learning Model Based on Recommendations of Sintax Study and Contents Issues on Physics Impulse Materials with Experimental Activities

    Directory of Open Access Journals (Sweden)

    Kristia Agustina

    2017-08-01

    Full Text Available This study aims to design learning Problem Based Learning Model based on syntax study recommendations and content issues on Physics Impulse materials through experiments. This research is a development research with Kemp model. The reference for making the learning design is the result of the syntax study and the content of existing PBL implementation problems from Agustina research. This instructional design is applied to the physics material about Impulse done through experimental activity. Limited trials were conducted on the SWCU Physics Education Study Program students group Salatiga, while the validity test was conducted by high school teachers and physics education lecturers. The results of the trial evaluation are limited and the validity test is used to improve the designs that have been made. The conclusion of this research is the design of learning by using PBL model on Impuls material by referring the result of syntax study and the problem content of existing PBL implementation can be produced by learning activity designed in laboratory experiment activity. The actual problem for Impuls material can be used car crash test video at factory. The results of validation tests and limited trials conducted by researchers assessed that the design of learning made by researchers can be used with small revisions. Suggestions from this research are in making learning design by using PBL model to get actual problem can by collecting news that come from newspaper, YouTube, internet, and television.

  16. Physical and Mechanical Properties of Palm Oil Frond and Stem Bunch for Developing Pruner and Harvester Machinery Design

    Directory of Open Access Journals (Sweden)

    Yazid Ismi Intara

    2013-06-01

    Full Text Available A development of oil palm pruner and harvester machinery design implemented in the field still faces a problem due to the lack of effective and efficient design which is need to be solved. It was noted that in order to develop the design, an early data and information of physical and mechanical properties of palm oil frond and stem fruits is critically important. The objective of the research was to obtain the physical and mechanical properties of palm oil frond and stem in order to develop the design of pruner and harvester machinery. The result showed that tool machinery was been advantageous by the physical properties of the plant i.e. the total weight of frond and leaf which enable to support the cutting process. The average of total weight of frond and leaf was 16.8 kg. The diagonal cutting trajectory was been more advantageous because of total weight and frond shape toward to the different of the plant tissue area. The measurement result shows that cutting curve follows the time required for cutting. The comparison among cutting curve shows differences in cutting thickness or length. In this case, the thickness is linear with cutting time. Besides, those curves show differences at the height which determine the maximum value of tested material cutting resistance. Alternative solution for machinery development design is pruner-harvester for height plant below 6 m and among 6 to 12 m. For below 6 m, pruner-harvester was designed by incorporating motor as power source and cutter-disc as the knife cutter. That condition was relied on that estate which was maintenance intensively commonly used cutter-disc. Pruner-harvester above 6 m and up to 12 m was improved based on manual egrek-designed by adding fresh fruit bunch alley supply glide in order to keep the fruits still in intact form. The consideration was based on affectivity and efficiency. It also considers homogenous ecological of palm oil plant which should be maintained to reduce global

  17. Electromagnetic design, engineering development and magnetic qualification of a horizontal layered scaled magnet for physics experiments

    Energy Technology Data Exchange (ETDEWEB)

    Trivedi, Praveen; Teotia, Vikas; Malhotra, Sanjay; Taly, Y.K., E-mail: praveent@barc.gov.in [Control Instrumentation Division, Bhabha Atomic Research Centre, Mumbai (India)

    2014-07-01

    Neutrino detectors around the world have shown evidence that these weakly interacting, little-understood particles are not really mass less, as was thought so far. Not only do they have non-zero masses, different species (or flavors) of neutrinos seem to mix and oscillate into one another as they traverse through the cosmos. If this is true, this is not only one of the first pieces of evidence for physics beyond the so-called Standard Model of Particle Physics, but would also have great impact on diverse fields such as nuclear and particle physics, astrophysics and cosmology. It is thus imperative to study the details of the interactions of these particles. These will be detected by means of an iron calorimeter (ICAL), comprising detectors sandwiched in alternate layers of soft magnetic iron. The iron core is magnetized to allow bending of the charged particles. The direction and the energy of the original incoming neutrino, that caused the interaction, can then be accurately determined. Racetrack coils through slots cut in the iron core create a uniform magnetic field in the iron core. A highly uniform magnetic field in the soft iron core is required to accurately determine the mass and energy of incident particle. The charged particles bend in this magnetic field; oppositely charged particles bending in opposite directions. The charge, energy and momentum of the emitted particle is thus determined. An electromagnet was designed as a laboratory facility for conducting experimental studies in particle physics. This paper discusses the electromagnetic design, development, fabrication, magnetic qualification and magnetic measurement issues of an electromagnet developed for physics studies. (author)

  18. Hardware Algorithm Implementation for Mission Specific Processing

    Science.gov (United States)

    2008-03-01

    knowledge about the VLSI technology and understands VHDL, scripting, and intergrating the script in Cadencersoftware pro- gram or Modelsimr. The main...possible to have a trade off between parallel and serial logic design for the circuit. Power can be saved by using parallization, pipelining, or a

  19. Advanced BDD optimization

    CERN Document Server

    Ebendt, Rudiger; Drechsler, Rolf

    2005-01-01

    BDD and SAT are major concepts in VLSI CADNew objective functions for design space exploration require new algorithms for BDD optimizationLatest trend: fusion of the concepts BDD and SATMajor impulses come from Artificial Intelligence (AI)Unifying view, transfers the latest theoretical insights into practical applications.

  20. fast minimization on the xiao map using row group structure rules

    African Journals Online (AJOL)

    user

    1989-09-01

    Sep 1, 1989 ... insignificant thereby changing the focus of digital design from gate minimization to package or chip minmisation [1]. Gate level minimization still remains relevant despite the advent of large scale integrated circuit (LSI) and very large scale integrated circuit. (VLSI). For example, map entered variable.