Bias-induced migration of ionized donors in amorphous oxide semiconductor thin-film transistors with full bottom-gate and partial top-gate structures

Directory of Open Access Journals (Sweden)

Mallory Mativenga

2012-09-01

Full Text Available Bias-induced charge migration in amorphous oxide semiconductor thin-film transistors (TFTs confirmed by overshoots of mobility after bias stressing dual gated TFTs is presented. The overshoots in mobility are reversible and only occur in TFTs with a full bottom-gate (covers the whole channel and partial top-gate (covers only a portion of the channel, indicating a bias-induced uneven distribution of ionized donors: Ionized donors migrate towards the region of the channel that is located underneath the partial top-gate and the decrease in the density of ionized donors in the uncovered portion results in the reversible increase in mobility.

Indium-gallium-zinc-oxide thin-film transistor with a planar split dual-gate structure

Science.gov (United States)

Liu, Yu-Rong; Liu, Jie; Song, Jia-Qi; Lai, Pui-To; Yao, Ruo-He

2017-12-01

An amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) with a planar split dual gate (PSDG) structure has been proposed, fabricated and characterized. Experimental results indicate that the two independent gates can provide dynamical control of device characteristics such as threshold voltage, sub-threshold swing, off-state current and saturation current. The transconductance extracted from the output characteristics of the device increases from 4.0 × 10-6S to 1.6 × 10-5S for a change of control gate voltage from -2 V to 2 V, and thus the device could be used in a variable-gain amplifier. A significant advantage of the PSDG structure is its flexibility in controlling the device performance according to the need of practical applications.

Spectroelectrochemical properties of ultra-thin indium tin oxide films under electric potential modulation

Energy Technology Data Exchange (ETDEWEB)

Han, Xue, E-mail: x0han004@louisville.edu; Mendes, Sergio B., E-mail: sbmend01@louisville.edu

2016-03-31

In this work, the spectroscopic properties of ultra-thin ITO films are characterized under an applied electric potential modulation. To detect minute spectroscopic features, the ultra-thin ITO film was coated over an extremely sensitive single-mode integrated optical waveguide, which provided a long pathlength with more than adequate sensitivity for optical interrogation of the ultra-thin film. Experimental configurations with broadband light and several laser lines at different modulation schemes of an applied electric potential were utilized to elucidate the nature of intrinsic changes. The imaginary component of the refractive index (absorption coefficient) of the ultra-thin ITO film is unequivocally shown to have a dependence on the applied potential and the profile of this dependence changes substantially even for wavelengths inside a small spectral window (500–600 nm). The characterization technique and the data reported here can be crucial to several applications of the ITO material as a transparent conductive electrode, as for example in spectroelectrochemical investigations of surface-confined redox species. - Highlights: • Optical waveguides are applied for spectroscopic investigations of ultra-thin films. • Ultra-thin ITO films in aqueous environment are studied under potential modulation. • Unique spectroscopic features of ultra-thin ITO films are unambiguously observed.

Ultra-thin Oxide Membranes: Synthesis and Carrier Transport

Science.gov (United States)

Sim, Jai Sung

Self-supported freestanding membranes are films that are devoid of any underlying supporting layers. The key advantage of such structures is that, due to the lack of substrate effects - both mechanical and chemical, the true native properties of the material can be probed. This is crucial since many of the studies done on materials that are used as freestanding membranes are done as films clamped to substrates or in the bulk form. This thesis focuses on the synthesis and fabrication as well as electrical studies of free standing ultrathin controllable thin film deposition process. Taking things a step further, to electrically probe these membranes required design of complex device architecture and extensive optimization of nano-fabrication processes. The challenges and optimized fabrication method of such membranes are demonstrated. Three materials are probed in this study, VO2, TiO2, and CeO2. VO2 for understanding structural considerations for electronic phase change and nature of ionic liquid gating, TiO2 and CeO2 for understanding surface conduction properties and surface chemistry. The VO2 study shows shift in metal-insulator transition (MIT) temperature arising from stress relaxation and opening of the hysteresis. The ionic liquid gating studies showed reversible modulation of channel resistance and allowed distinguishing bulk process from the surface effects. Comparing the ionic liquid gating experiments to hydrogen doping experiments illustrated that ionic liquid gating can be a surface limited electrostatic effect, if the critical voltage threshold is not exceeded. TiO2 study shows creation of non-stoichiometric forms under ion milling. Utilizing focused ion beam milling, thin membranes of Ti xOy of 100-300 nm thickness have been created. TEM studies indicated polycrystallinity and presence of twins in the FIB-milled nanowalls. Compositional analysis in the transmission electron microscope also showed reduced content of oxygen, confirming non

Temperature Effects on a-IGZO Thin Film Transistors Using HfO2 Gate Dielectric Material

OpenAIRE

Lin, Yu-Hsien; Chou, Jay-Chi

2014-01-01

This study investigated the temperature effect on amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) using hafnium oxide (HfO2) gate dielectric material. HfO2 is an attractive candidate as a high-κ dielectric material for gate oxide because it has great potential to exhibit superior electrical properties with a high drive current. In the process of integrating the gate dielectric and IGZO thin film, postannealing treatment is an essential process for completing the chem...

Ultra-thin film encapsulation processes for micro-electro-mechanical devices and systems

International Nuclear Information System (INIS)

Stoldt, Conrad R; Bright, Victor M

2006-01-01

A range of physical properties can be achieved in micro-electro-mechanical systems (MEMS) through their encapsulation with solid-state, ultra-thin coatings. This paper reviews the application of single source chemical vapour deposition and atomic layer deposition (ALD) in the growth of submicron films on polycrystalline silicon microstructures for the improvement of microscale reliability and performance. In particular, microstructure encapsulation with silicon carbide, tungsten, alumina and alumina-zinc oxide alloy ultra-thin films is highlighted, and the mechanical, electrical, tribological and chemical impact of these overlayers is detailed. The potential use of solid-state, ultra-thin coatings in commercial microsystems is explored using radio frequency MEMS as a case study for the ALD alloy alumina-zinc oxide thin film. (topical review)

Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

Directory of Open Access Journals (Sweden)

Yu-Hsien Lin

2015-01-01

Full Text Available We investigated amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using different high-k gate dielectric materials such as silicon nitride (Si3N4 and aluminum oxide (Al2O3 at low temperature process (<300°C and compared them with low temperature silicon dioxide (SiO2. The IGZO device with high-k gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, postannealing treatment is an essential process for completing the process. The chemical reaction of the high-k/IGZO interface due to heat formation in high-k/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-k gate dielectric materials and explained the interface effect by charge band diagram.

Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

International Nuclear Information System (INIS)

Lin, Y. H.; Chou, J. C.

2015-01-01

We investigated amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFT_s) using different high-Κ gate dielectric materials such as silicon nitride (Si_3N_4) and aluminum oxide (Al_2O_3) at low temperature process (<300 degree) and compared them with low temperature silicon dioxide (SiO_2). The IGZO device with high-Κ gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, post annealing treatment is an essential process for completing the process. The chemical reaction of the high-κ/IGZO interface due to heat formation in high-Κ/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-Κ gate dielectric materials and explained the interface effect by charge band diagram.

Radiation induced leakage current and stress induced leakage current in ultra-thin gate oxides

International Nuclear Information System (INIS)

Ceschia, M.; Paccagnella, A.; Cester, A.; Scarpa, A.

1998-01-01

Low-field leakage current has been measured in thin oxides after exposure to ionizing radiation. This Radiation Induced Leakage Current (RILC) can be described as an inelastic tunneling process mediated by neutral traps in the oxide, with an energy loss of about 1 eV. The neutral trap distribution is influenced by the oxide field applied during irradiation, thus indicating that the precursors of the neutral defects are charged, likely being defects associated to trapped holes. The maximum leakage current is found under zero-field condition during irradiation, and it rapidly decreases as the field is enhanced, due to a displacement of the defect distribution across the oxide towards the cathodic interface. The RILC kinetics are linear with the cumulative dose, in contrast with the power law found on electrically stressed devices

Investigation of interface property in Al/SiO2/ n-SiC structure with thin gate oxide by illumination

Science.gov (United States)

Chang, P. K.; Hwu, J. G.

2017-04-01

The reverse tunneling current of Al/SiO2/ n-SiC structure employing thin gate oxide is introduced to examine the interface property by illumination. The gate current at negative bias decreases under blue LED illumination, yet increases under UV lamp illumination. Light-induced electrons captured by interface states may be emitted after the light sources are off, leading to the recovery of gate currents. Based on transient characteristics of gate current, the extracted trap level is close to the light energy for blue LED, indicating that electron capture induced by lighting may result in the reduction of gate current. Furthermore, bidirectional C- V measurements exhibit a positive voltage shift caused by electron trapping under blue LED illumination, while a negative voltage shift is observed under UV lamp illumination. Distinct trapping and detrapping behaviors can be observed from variations in I- V and C- V curves utilizing different light sources for 4H-SiC MOS capacitors with thin insulators.

TiN/Al2O3/ZnO gate stack engineering for top-gate thin film transistors by combination of post oxidation and annealing

Science.gov (United States)

Kato, Kimihiko; Matsui, Hiroaki; Tabata, Hitoshi; Takenaka, Mitsuru; Takagi, Shinichi

2018-04-01

Control of fabrication processes for a gate stack structure with a ZnO thin channel layer and an Al2O3 gate insulator has been examined for enhancing the performance of a top-gate ZnO thin film transistor (TFT). The Al2O3/ZnO interface and the ZnO layer are defective just after the Al2O3 layer formation by atomic layer deposition. Post treatments such as plasma oxidation, annealing after the Al2O3 deposition, and gate metal formation (PMA) are promising to improve the interfacial and channel layer qualities drastically. Post-plasma oxidation effectively reduces the interfacial defect density and eliminates Fermi level pinning at the Al2O3/ZnO interface, which is essential for improving the cut-off of the drain current of TFTs. A thermal effect of post-Al2O3 deposition annealing at 350 °C can improve the crystalline quality of the ZnO layer, enhancing the mobility. On the other hand, impacts of post-Al2O3 deposition annealing and PMA need to be optimized because the annealing can also accompany the increase in the shallow-level defect density and the resulting electron concentration, in addition to the reduction in the deep-level defect density. The development of the interfacial control technique has realized the excellent TFT performance with a large ON/OFF ratio, steep subthreshold characteristics, and high field-effect mobility.

Enhanced cooling in mono-crystalline ultra-thin silicon by embedded micro-air channels

KAUST Repository

Ghoneim, Mohamed T.; Fahad, Hossain M.; Hussain, Aftab M.; Rojas, Jhonathan Prieto; Sevilla, Galo T.; Alfaraj, Nasir; Lizardo, Ernesto B.; Hussain, Muhammad Mustafa

2015-01-01

In today’s digital world, complementary metal oxide semiconductor (CMOS) technology enabled scaling of bulk mono-crystalline silicon (100) based electronics has resulted in their higher performance but with increased dynamic and off-state power consumption. Such trade-off has caused excessive heat generation which eventually drains the charge of battery in portable devices. The traditional solution utilizing off-chip fans and heat sinks used for heat management make the whole system bulky and less mobile. Here we show, an enhanced cooling phenomenon in ultra-thin (>10 μm) mono-crystalline (100) silicon (detached from bulk substrate) by utilizing deterministic pattern of porous network of vertical “through silicon” micro-air channels that offer remarkable heat and weight management for ultra-mobile electronics, in a cost effective way with 20× reduction in substrate weight and a 12% lower maximum temperature at sustained loads. We also show the effectiveness of this event in functional MOS field effect transistors (MOSFETs) with high-κ/metal gate stacks.

Enhanced cooling in mono-crystalline ultra-thin silicon by embedded micro-air channels

KAUST Repository

Ghoneim, Mohamed T.

2015-12-11

In today’s digital world, complementary metal oxide semiconductor (CMOS) technology enabled scaling of bulk mono-crystalline silicon (100) based electronics has resulted in their higher performance but with increased dynamic and off-state power consumption. Such trade-off has caused excessive heat generation which eventually drains the charge of battery in portable devices. The traditional solution utilizing off-chip fans and heat sinks used for heat management make the whole system bulky and less mobile. Here we show, an enhanced cooling phenomenon in ultra-thin (>10 μm) mono-crystalline (100) silicon (detached from bulk substrate) by utilizing deterministic pattern of porous network of vertical “through silicon” micro-air channels that offer remarkable heat and weight management for ultra-mobile electronics, in a cost effective way with 20× reduction in substrate weight and a 12% lower maximum temperature at sustained loads. We also show the effectiveness of this event in functional MOS field effect transistors (MOSFETs) with high-κ/metal gate stacks.

Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric

Science.gov (United States)

Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

2016-05-01

Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm2 V-1 sec-1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 104), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process.

High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

KAUST Repository

Sevilla, Galo T.

2016-02-29

Thinned silicon based complementary metal oxide semiconductor(CMOS)electronics can be physically flexible. To overcome challenges of limited thinning and damaging of devices originated from back grinding process, we show sequential reactive ion etching of silicon with the assistance from soft polymeric materials to efficiently achieve thinned (40 μm) and flexible (1.5 cm bending radius) silicon based functional CMOSinverters with high-κ/metal gate transistors. Notable advances through this study shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using excimer laser. The impact of various mechanical bending and bending cycles show undeterred high performance of flexible siliconCMOSinverters. Future work will include transfer of diced silicon chips to destination site, interconnects, and packaging to obtain fully flexible electronic systems in CMOS compatible way.

Metal-oxide assisted surface treatment of polyimide gate insulators for high-performance organic thin-film transistors.

Science.gov (United States)

Kim, Sohee; Ha, Taewook; Yoo, Sungmi; Ka, Jae-Won; Kim, Jinsoo; Won, Jong Chan; Choi, Dong Hoon; Jang, Kwang-Suk; Kim, Yun Ho

2017-06-14

We developed a facile method for treating polyimide-based organic gate insulator (OGI) surfaces with self-assembled monolayers (SAMs) by introducing metal-oxide interlayers, called the metal-oxide assisted SAM treatment (MAST). To create sites for surface modification with SAM materials on polyimide-based OGI (KPI) surfaces, the metal-oxide interlayer, here amorphous alumina (α-Al 2 O 3 ), was deposited on the KPI gate insulator using spin-coating via a rapid sol-gel reaction, providing an excellent template for the formation of a high-quality SAM with phosphonic acid anchor groups. The SAM of octadecylphosphonic acid (ODPA) was successfully treated by spin-coating onto the α-Al 2 O 3 -deposited KPI film. After the surface treatment by ODPA/α-Al 2 O 3 , the surface energy of the KPI thin film was remarkably decreased and the molecular compatibility of the film with an organic semiconductor (OSC), 2-decyl-7-phenyl-[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT-C 10 ), was increased. Ph-BTBT-C 10 molecules were uniformly deposited on the treated gate insulator surface and grown with high crystallinity, as confirmed by atomic force microscopy (AFM) and X-ray diffraction (XRD) analysis. The mobility of Ph-BTBT-C 10 thin-film transistors (TFTs) was approximately doubled, from 0.56 ± 0.05 cm 2 V -1 s -1 to 1.26 ± 0.06 cm 2 V -1 s -1 , after the surface treatment. The surface treatment of α-Al 2 O 3 and ODPA significantly decreased the threshold voltage from -21.2 V to -8.3 V by reducing the trap sites in the OGI and improving the interfacial properties with the OSC. We suggest that the MAST method for OGIs can be applied to various OGI materials lacking reactive sites using SAMs. It may provide a new platform for the surface treatment of OGIs, similar to that of conventional SiO 2 gate insulators.

Structure of a zinc oxide ultra-thin film on Rh(100)

Energy Technology Data Exchange (ETDEWEB)

Yuhara, J.; Kato, D.; Matsui, T. [Department of Materials, Physics and Energy Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603 (Japan); Mizuno, S. [Department of Molecular and Material Sciences, Kyushu University, Kasuga, Fukuoka 816–8580 (Japan)

2015-11-07

The structural parameters of ultra-thin zinc oxide films on Rh(100) are investigated using low-energy electron diffraction intensity (LEED I–V) curves, scanning tunneling microscopy (STM), and first-principles density functional theory (DFT) calculations. From the analysis of LEED I–V curves and DFT calculations, two optimized models A and B are determined. Their structures are basically similar to the planer h-BN ZnO(0001) structure, although some oxygen atoms protrude from the surface, associated with an in-plane shift of Zn atoms. From a comparison of experimental STM images and simulated STM images, majority and minority structures observed in the STM images represent the two optimized models A and B, respectively.

Highly stable thin film transistors using multilayer channel structure

KAUST Repository

Nayak, Pradipta K.

2015-03-09

We report highly stable gate-bias stress performance of thin film transistors (TFTs) using zinc oxide (ZnO)/hafnium oxide (HfO2) multilayer structure as the channel layer. Positive and negative gate-bias stress stability of the TFTs was measured at room temperature and at 60°C. A tremendous improvement in gate-bias stress stability was obtained in case of the TFT with multiple layers of ZnO embedded between HfO2 layers compared to the TFT with a single layer of ZnO as the semiconductor. The ultra-thin HfO2 layers act as passivation layers, which prevent the adsorption of oxygen and water molecules in the ZnO layer and hence significantly improve the gate-bias stress stability of ZnO TFTs.

Analysis of switching characteristics for negative capacitance ultra-thin-body germanium-on-insulator MOSFETs

Science.gov (United States)

Pi-Ho Hu, Vita; Chiu, Pin-Chieh

2018-04-01

The impact of device parameters on the switching characteristics of negative capacitance ultra-thin-body (UTB) germanium-on-insulator (NC-GeOI) MOSFETs is analyzed. NC-GeOI MOSFETs with smaller gate length (L g), EOT, and buried oxide thickness (T box) and thicker ferroelectric layer thickness (T FE) exhibit larger subthreshold swing improvements over GeOI MOSFETs due to better capacitance matching. Compared with GeOI MOSFETs, NC-GeOI MOSFETs exhibit better switching time due to improvements in effective drive current (I eff) and subthreshold swing. NC-GeOI MOSFET exhibits larger ST improvements at V dd = 0.3 V (-82.9%) than at V dd = 0.86 V (-9.7%), because NC-GeOI MOSFET shows 18.2 times higher I eff than the GeOI MOSFET at V dd = 0.3 V, while 2.5 times higher I eff at V dd = 0.86 V. This work provides the device design guideline of NC-GeOI MOSFETs for ultra-low power applications.

Impact of metal-ion contaminated silica particles on gate oxide integrity

NARCIS (Netherlands)

Rink, Ingrid; Wali, F.; Knotter, D.M.

2009-01-01

The impact of metal-ion contamination (present on wafer surface before oxidation) on gate oxide integrity (GOI) is well known in literature, which is not the case for clean silica particles [1, 2]. However, it is known that particles present in ultra-pure water (UPW) decrease the random yield in

High-density carrier-accumulated and electrically stable oxide thin-film transistors from ion-gel gate dielectric.

Science.gov (United States)

Fujii, Mami N; Ishikawa, Yasuaki; Miwa, Kazumoto; Okada, Hiromi; Uraoka, Yukiharu; Ono, Shimpei

2015-12-18

The use of indium-gallium-zinc oxide (IGZO) has paved the way for high-resolution uniform displays or integrated circuits with transparent and flexible devices. However, achieving highly reliable devices that use IGZO for low-temperature processes remains a technological challenge. We propose the use of IGZO thin-film transistors (TFTs) with an ionic-liquid gate dielectric in order to achieve high-density carrier-accumulated IGZO TFTs with high reliability, and we discuss a distinctive mechanism for the degradation of this organic-inorganic hybrid device under long-term electrical stress. Our results demonstrated that an ionic liquid or gel gate dielectric provides highly reliable and low-voltage operation with IGZO TFTs. Furthermore, high-density carrier accumulation helps improve the TFT characteristics and reliability, and it is highly relevant to the electronic phase control of oxide materials and the degradation mechanism for organic-inorganic hybrid devices.

Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium–gallium–zinc oxide gate stack

Science.gov (United States)

Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

2018-07-01

We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium–gallium–zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>104). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium-gallium-zinc oxide gate stack.

Science.gov (United States)

Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

2018-07-20

We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium-gallium-zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>10 4 ). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

Enhanced cooling in mono-crystalline ultra-thin silicon by embedded micro-air channels

Directory of Open Access Journals (Sweden)

Mohamed T. Ghoneim

2015-12-01

Full Text Available In today’s digital world, complementary metal oxide semiconductor (CMOS technology enabled scaling of bulk mono-crystalline silicon (100 based electronics has resulted in their higher performance but with increased dynamic and off-state power consumption. Such trade-off has caused excessive heat generation which eventually drains the charge of battery in portable devices. The traditional solution utilizing off-chip fans and heat sinks used for heat management make the whole system bulky and less mobile. Here we show, an enhanced cooling phenomenon in ultra-thin (>10 μm mono-crystalline (100 silicon (detached from bulk substrate by utilizing deterministic pattern of porous network of vertical “through silicon” micro-air channels that offer remarkable heat and weight management for ultra-mobile electronics, in a cost effective way with 20× reduction in substrate weight and a 12% lower maximum temperature at sustained loads. We also show the effectiveness of this event in functional MOS field effect transistors (MOSFETs with high-κ/metal gate stacks.

Ultra-thin Metal and Dielectric Layers for Nanophotonic Applications

DEFF Research Database (Denmark)

Shkondin, Evgeniy; Leandro, Lorenzo; Malureanu, Radu

2015-01-01

In our talk we first give an overview of the various thin films used in the field of nanophotonics. Then we describe our own activity in fabrication and characterization of ultra-thin films of high quality. We particularly focus on uniform gold layers having thicknesses down to 6 nm fabricated by......-beam deposition on dielectric substrates and Al-oxides/Ti-oxides multilayers prepared by atomic layer deposition in high aspect ratio trenches. In the latter case we show more than 1:20 aspect ratio structures can be achieved....

Quantum confinement effects and source-to-drain tunneling in ultra-scaled double-gate silicon n-MOSFETs

International Nuclear Information System (INIS)

Jiang Xiang-Wei; Li Shu-Shen

2012-01-01

By using the linear combination of bulk band (LCBB) method incorporated with the top of the barrier splitting (TBS) model, we present a comprehensive study on the quantum confinement effects and the source-to-drain tunneling in the ultra-scaled double-gate (DG) metal—oxide—semiconductor field-effect transistors (MOSFETs). A critical body thickness value of 5 nm is found, below which severe valley splittings among different X valleys for the occupied charge density and the current contributions occur in ultra-thin silicon body structures. It is also found that the tunneling current could be nearly 100% with an ultra-scaled channel length. Different from the previous simulation results, it is found that the source-to-drain tunneling could be effectively suppressed in the ultra-thin body thickness (2.0 nm and below) by the quantum confinement and the tunneling could be suppressed down to below 5% when the channel length approaches 16 nm regardless of the body thickness. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Design and Analysis of Double-Gate MOSFETs for Ultra-Low Power Radio Frequency Identification (RFID: Device and Circuit Co-Design

Directory of Open Access Journals (Sweden)

Tony T. Kim

2011-07-01

Full Text Available Recently, double-gate MOSFETs (DGMOSFETs have been shown to be more optimal for ultra-low power circuit design due to the improved subthreshold slope and the reduced leakage current compared to bulk CMOS. However, DGMOSFETs for subthreshold circuit design have not been much explored in comparison to those for strong inversion-based design. In this paper, various configurations of DGMOSFETs, such as tied/independent gates and symmetric/asymmetric gate oxide thickness are explored for ultra-low power and high efficient radio frequency identification (RFID design. Comparison of bulk CMOS with DGMOSFETs has been conducted in ultra-low power subthreshold digital logic design and rectifier design, emphasizing the scope of the nano-scale DGMOSFET technology for future ultra-low power systems. The DGMOSFET-based subthreshold logic improves energy efficiency by more than 40% compared to the bulk CMOS-based logic at 32 nm. Among the various DGMOSFET configurations for RFID rectifiers, symmetric tied-gate DGMOSFET has the best power conversion efficiency and the lowest power consumption.

Semiconductor to metallic transition in bulk accumulated amorphous indium-gallium-zinc-oxide dual gate thin-film transistor

Directory of Open Access Journals (Sweden)

Minkyu Chun

2015-05-01

Full Text Available We investigated the effects of top gate voltage (VTG and temperature (in the range of 25 to 70 oC on dual-gate (DG back-channel-etched (BCE amorphous-indium-gallium-zinc-oxide (a-IGZO thin film transistors (TFTs characteristics. The increment of VTG from -20V to +20V, decreases the threshold voltage (VTH from 19.6V to 3.8V and increases the electron density to 8.8 x 1018cm−3. Temperature dependent field-effect mobility in saturation regime, extracted from bottom gate sweep, show a critical dependency on VTG. At VTG of 20V, the mobility decreases from 19.1 to 15.4 cm2/V ⋅ s with increasing temperature, showing a metallic conduction. On the other hand, at VTG of - 20V, the mobility increases from 6.4 to 7.5cm2/V ⋅ s with increasing temperature. Since the top gate bias controls the position of Fermi level, the temperature dependent mobility shows metallic conduction when the Fermi level is above the conduction band edge, by applying high positive bias to the top gate.

Self-aligned top-gate InGaZnO thin film transistors using SiO{sub 2}/Al{sub 2}O{sub 3} stack gate dielectric

Energy Technology Data Exchange (ETDEWEB)

Chen, Rongsheng; Zhou, Wei; Zhang, Meng; Wong, Man; Kwok, Hoi Sing

2013-12-02

Self-aligned top-gate amorphous indium–gallium–zinc oxide (a-IGZO) thin film transistors (TFTs) utilizing SiO{sub 2}/Al{sub 2}O{sub 3} stack thin films as gate dielectric are developed in this paper. Due to high quality of the high-k Al{sub 2}O{sub 3} and good interface between active layer and gate dielectric, the resulting a-IGZO TFT exhibits good electrical performance including field-effect mobility of 9 cm{sup 2}/Vs, threshold voltage of 2.2 V, subthreshold swing of 0.2 V/decade, and on/off current ratio of 1 × 10{sup 7}. With scaling down of the channel length, good characteristics are also obtained with a small shift of the threshold voltage and no degradation of subthreshold swing. - Highlights: • Self-aligned top-gate indium–gallium–zinc oxide thin-film transistor is proposed. • SiO{sub 2}/Al{sub 2}O{sub 3} stack gate dielectric is proposed. • The source/drain areas are hydrogen-doped by CHF{sub 3} plasma. • The devices show good electrical performance and scaling down behavior.

Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

Science.gov (United States)

An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

2016-11-01

Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures

International Nuclear Information System (INIS)

Chakraborty, Gargi; Sarkar, C K; Lu, X B; Dai, J Y

2008-01-01

The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter

Ultra-thin chip technology and applications

CERN Document Server

2010-01-01

Ultra-thin chips are the "smart skin" of a conventional silicon chip. This book shows how very thin and flexible chips can be fabricated and used in many new applications in microelectronics, microsystems, biomedical and other fields. It provides a comprehensive reference to the fabrication technology, post processing, characterization and the applications of ultra-thin chips.

Improvement of transistor characteristics and stability for solution-processed ultra-thin high-valence niobium doped zinc-tin oxide thin film transistors

Energy Technology Data Exchange (ETDEWEB)

Jeng, Jiann-Shing, E-mail: jsjeng@mail.nutn.edu.tw

2016-08-15

Nb-doped Zinc tin oxide (NZTO) channel materials have been prepared by solution process in combination with the spin-coating method. All NZTO thin film transistors (TFTs) are n-type enhancement-mode devices, either without or with Nb additives. High-valence niobium ion (ionic charge = +5) has a larger ionic potential and similar ionic radius to Zn{sup 2+} and Sn{sup 4+} ions. As compared with the pure ZTO device, introducing Nb{sup 5+} ions into the ZTO channel layers can improve the electrical properties and bias stability of TFTs because of the reduction of the oxygen vacancies. This study discusses the connection among the material properties of the NZTO films and the electrical performance and bias stability of NZTO TFTs and how they are influenced by the Nb/(Nb + Sn) molar ratios of NZTO films. - Highlights: • Ultra-thin high-valence niobium doped zinc-tin oxide (NZTO) thin films are prepared using a solution process. • Nb dopants in ZTO films reduce the oxygen vacancy and subgap adsorption of the ZTO films. • The Nb-doping concentration of the NZTO channel layer has a strong influence on the TFT performance.

Junctionless Thin-Film Transistors Gated by an H₃PO₄-Incorporated Chitosan Proton Conductor.

Science.gov (United States)

Liu, Huixuan; Xun, Damao

2018-04-01

We fabricated an H3PO4-incorporated chitosan proton conductor film that exhibited the electric double layer effect and showed a high specific capacitance of 4.42 μF/cm2. Transparent indium tin oxide thin-film transistors gated by H3PO4-incorporated chitosan films were fabricated by sputtering through a shadow mask. The operating voltage was as low as 1.2 V because of the high specific capacitance of the H3PO4-incorporated chitosan dielectrics. The junctionless transparent indium tin oxide thin film transistors exhibited good performance, including an estimated current on/off ratio and field-effect mobility of 1.2 × 106 and 6.63 cm2V-1s-1, respectively. These low-voltage thin-film electric-double-layer transistors gated by H3PO4-incorporated chitosan are promising for next generation battery-powered "see-through" portable sensors.

Electronic structure evolution in doping of fullerene (C{sub 60}) by ultra-thin layer molybdenum trioxide

Energy Technology Data Exchange (ETDEWEB)

Wang, Chenggong; Wang, Congcong; Kauppi, John [Department of Physics and Astronomy, University of Rochester, Rochester, New York 14627 (United States); Liu, Xiaoliang [Institute for Super-microstructure and Ultrafast Process in Advanced Materials (ISUPAM), Central South University, Changsha, Hunan 410083 (China); Gao, Yongli, E-mail: ygao@pas.rochester.edu [Department of Physics and Astronomy, University of Rochester, Rochester, New York 14627 (United States); Institute for Super-microstructure and Ultrafast Process in Advanced Materials (ISUPAM), Central South University, Changsha, Hunan 410083 (China)

2015-08-28

Ultra-thin layer molybdenum oxide doping of fullerene has been investigated using ultraviolet photoemission spectroscopy (UPS) and X-ray photoemission spectroscopy (XPS). The highest occupied molecular orbital (HOMO) can be observed directly with UPS. It is observed that the Fermi level position in fullerene is modified by ultra-thin-layer molybdenum oxide doping, and the HOMO onset is shifted to less than 1.3 eV below the Fermi level. The XPS results indicate that charge transfer was observed from the C{sub 60} to MoO{sub x} and Mo{sup 6+} oxides is the basis as hole dopants.

Long-Term Synaptic Plasticity Emulated in Modified Graphene Oxide Electrolyte Gated IZO-Based Thin-Film Transistors.

Science.gov (United States)

Yang, Yi; Wen, Juan; Guo, Liqiang; Wan, Xiang; Du, Peifu; Feng, Ping; Shi, Yi; Wan, Qing

2016-11-09

Emulating neural behaviors at the synaptic level is of great significance for building neuromorphic computational systems and realizing artificial intelligence. Here, oxide-based electric double-layer (EDL) thin-film transistors were fabricated using 3-triethoxysilylpropylamine modified graphene oxide (KH550-GO) electrolyte as the gate dielectrics. Resulting from the EDL effect and electrochemical doping between mobile protons and the indium-zinc-oxide channel layer, long-term synaptic plasticity was emulated in our devices. Synaptic functions including long-term memory, synaptic temporal integration, and dynamic filters were successfully reproduced. In particular, spike rate-dependent plasticity (SRDP), one of the basic learning rules of long-term plasticity in the neural network where the synaptic weight changes according to the rate of presynaptic spikes, was emulated in our devices. Our results may facilitate the development of neuromorphic computational systems.

In-Ga-Zn-oxide thin-film transistors with Sb2TeOx gate insulators fabricated by reactive sputtering using a metallic Sb2Te target

International Nuclear Information System (INIS)

Cheong, Woo-Seok

2011-01-01

Using reactive sputtering, we made transparent amorphous Sb 2 TeO x thin films from a metallic Sb 2 Te target in an oxidizing atmosphere. In-Ga-Zn-oxide thin-film transistors (IGZO TFTs) with Sb 2 TeO x gate insulators deposited at room temperature showed a large hysteresis with a counter clockwise direction, which was caused by mobile charges in the gate insulators. The problems of the mobile charges was solved by using Sb 2 TeO x films formed at 250 .deg. C. After the IGZO TFT had been annealed at 200 .deg. C for 1 hour in an O 2 ambient, the mobility of the IGZO TFT was 22.41 cm 2 /Vs, and the drain current on-off ratio was ∼10 8 .

Tungsten trioxide as high-{kappa} gate dielectric for highly transparent and temperature-stable zinc-oxide-based thin-film transistors

Energy Technology Data Exchange (ETDEWEB)

Lorenz, Michael; Wenckstern, Holger von; Grundmann, Marius [Universitaet Leipzig, Fakultaet fuer Physik und Geowissenschaften, Institut fuer Experimentelle Physik II, Linnestr. 5, 04103 Leipzig (Germany)

2012-07-01

We demonstrate metal-insulator-semiconductor field-effect transistors with high-{kappa}, room-temperature deposited, highly transparent tungsten trioxide (WO{sub 3}) as gate dielectric. The channel material consists of a zinc oxide (ZnO) thin-film. The transmittance and resistivity of WO{sub 3} films was tuned in order to obtain a highly transparent and insulating WO{sub 3} dielectric. The devices were processed by standard photolithography using lift-off technique. On top of the WO{sub 3} dielectric a highly transparent and conductive oxide consisting of ZnO: Al 3% wt. was deposited. The gate structure of the devices exhibits an average transmittance in the visible spectral range of 86%. The on/off-current ratio is larger than 10{sup 8} with off- and gate leakage-currents below 3 x 10{sup -8} A/cm{sup 2}. Due to the high relative permittivity of {epsilon}{sub r} {approx} 70, a gate voltage sweep of only 2 V is necessary to turn the transistor on and off with a minimum subthreshold swing of 80 mV/decade. The channel mobility of the transistors equals the Hall-effect mobility with a value of 5 cm{sup 2}/Vs. It is furthermore shown, that the devices are stable up to operating temperatures of at least 150 C.

Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

KAUST Repository

Ghoneim, Mohamed T.

2015-06-01

We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

Semiconductor to metallic transition in bulk accumulated amorphous indium-gallium-zinc-oxide dual gate thin-film transistor

Energy Technology Data Exchange (ETDEWEB)

Chun, Minkyu; Chowdhury, Md Delwar Hossain; Jang, Jin, E-mail: jjang@khu.ac.kr [Advanced Display Research Center and Department of Information Display, Kyung Hee University, Seoul 130-701 (Korea, Republic of)

2015-05-15

We investigated the effects of top gate voltage (V{sub TG}) and temperature (in the range of 25 to 70 {sup o}C) on dual-gate (DG) back-channel-etched (BCE) amorphous-indium-gallium-zinc-oxide (a-IGZO) thin film transistors (TFTs) characteristics. The increment of V{sub TG} from -20V to +20V, decreases the threshold voltage (V{sub TH}) from 19.6V to 3.8V and increases the electron density to 8.8 x 10{sup 18}cm{sup −3}. Temperature dependent field-effect mobility in saturation regime, extracted from bottom gate sweep, show a critical dependency on V{sub TG}. At V{sub TG} of 20V, the mobility decreases from 19.1 to 15.4 cm{sup 2}/V ⋅ s with increasing temperature, showing a metallic conduction. On the other hand, at V{sub TG} of - 20V, the mobility increases from 6.4 to 7.5cm{sup 2}/V ⋅ s with increasing temperature. Since the top gate bias controls the position of Fermi level, the temperature dependent mobility shows metallic conduction when the Fermi level is above the conduction band edge, by applying high positive bias to the top gate.

Characteristics of dual-gate thin-film transistors for applications in digital radiology

International Nuclear Information System (INIS)

Waechter, D.; Huang, Z.; Zhao, W.; Blevis, I.; Rowlands, J.A.

1996-01-01

A large-area flat-panel detector for digital radiology is being developed. The detector uses an array of dual-gate thin-film transistors (TFTs) to read out X-ray-generated charge produced in an amorphous selenium (a-Se) layer. The TFTs use CdSe as the semiconductor and use the bottom gate for row selection. The top gate can be divided into a 'deliberate' gate, covering most of the channel length, and small 'parasitic' gates that consist of: overlap of source or drain metal over the top-gate oxide; and gap regions in the metal that are covered only by the a-Se. In this paper we present the properties of dual-gate TFTs and examine the effect of both the deliberate and parasitic gates on the detector operation. Various options for controlling the top-gate potential are analyzed and discussed. (author)

Ultra-thin silicon oxide layers on crystalline silicon wafers: Comparison of advanced oxidation techniques with respect to chemically abrupt SiO{sub 2}/Si interfaces with low defect densities

Energy Technology Data Exchange (ETDEWEB)

Stegemann, Bert, E-mail: bert.stegemann@htw-berlin.de [HTW Berlin - University of Applied Sciences, 12459 Berlin (Germany); Gad, Karim M. [University of Freiburg, Department of Microsystems Engineering - IMTEK, 79110 Freiburg (Germany); Balamou, Patrice [HTW Berlin - University of Applied Sciences, 12459 Berlin (Germany); Helmholtz Center Berlin for Materials and Energy (HZB), 12489 Berlin (Germany); Sixtensson, Daniel [Helmholtz Center Berlin for Materials and Energy (HZB), 12489 Berlin (Germany); Vössing, Daniel; Kasemann, Martin [University of Freiburg, Department of Microsystems Engineering - IMTEK, 79110 Freiburg (Germany); Angermann, Heike [Helmholtz Center Berlin for Materials and Energy (HZB), 12489 Berlin (Germany)

2017-02-15

Highlights: • Fabrication of ultrathin SiO{sub 2} tunnel layers on c-Si. • Correlation of electronic and chemical SiO{sub 2}/Si interface properties revealed by XPS/SPV. • Chemically abrupt SiO{sub 2}/Si interfaces generate less interface defect states considerable. - Abstract: Six advanced oxidation techniques were analyzed, evaluated and compared with respect to the preparation of high-quality ultra-thin oxide layers on crystalline silicon. The resulting electronic and chemical SiO{sub 2}/Si interface properties were determined by a combined x-ray photoemission (XPS) and surface photovoltage (SPV) investigation. Depending on the oxidation technique, chemically abrupt SiO{sub 2}/Si interfaces with low densities of interface states were fabricated on c-Si either at low temperatures, at short times, or in wet-chemical environment, resulting in each case in excellent interface passivation. Moreover, the beneficial effect of a subsequent forming gas annealing (FGA) step for the passivation of the SiO{sub 2}/Si interface of ultra-thin oxide layers has been proven. Chemically abrupt SiO{sub 2}/Si interfaces have been shown to generate less interface defect states.

Facile design of ultra-thin anodic aluminum oxide membranes for the fabrication of plasmonic nanoarrays

Science.gov (United States)

Hao, Qi; Huang, Hao; Fan, Xingce; Hou, Xiangyu; Yin, Yin; Li, Wan; Si, Lifang; Nan, Haiyan; Wang, Huaiyu; Mei, Yongfeng; Qiu, Teng; Chu, Paul K.

2017-03-01

Ultra-thin anodic aluminum oxide (AAO) membranes are efficient templates for the fabrication of patterned nanostructures. Herein, a three-step etching method to control the morphology of AAO is described. The morphological evolution of the AAO during phosphoric acid etching is systematically investigated and a nonlinear growth mechanism during unsteady-state anodization is revealed. The thickness of the AAO can be quantitatively controlled from ˜100 nm to several micrometers while maintaining the tunablity of the pore diameter. The AAO membranes are robust and readily transferable to different types of substrates to prepare patterned plasmonic nanoarrays such as nanoislands, nanoclusters, ultra-small nanodots, and core-satellite superstructures. The localized surface plasmon resonance from these nanostructures can be easily tuned by adjusting the morphology of the AAO template. The custom AAO template provides a platform for the fabrication of low-cost and large-scale functional nanoarrays suitable for fundamental studies as well as applications including biochemical sensing, imaging, photocatalysis, and photovoltaics.

III-V Ultra-Thin-Body InGaAs/InAs MOSFETs for Low Standby Power Logic Applications

Science.gov (United States)

Huang, Cheng-Ying

As device scaling continues to sub-10-nm regime, III-V InGaAs/InAs metal- oxide-semiconductor ?eld-e?ect transistors (MOSFETs) are promising candidates for replacing Si-based MOSFETs for future very-large-scale integration (VLSI) logic applications. III-V InGaAs materials have low electron effective mass and high electron velocity, allowing higher on-state current at lower VDD and reducing the switching power consumption. However, III-V InGaAs materials have a narrower band gap and higher permittivity, leading to large band-to-band tunneling (BTBT) leakage or gate-induced drain leakage (GIDL) at the drain end of the channel, and large subthreshold leakage due to worse electrostatic integrity. To utilize III-V MOSFETs in future logic circuits, III-V MOSFETs must have high on-state performance over Si MOSFETs as well as very low leakage current and low standby power consumption. In this dissertation, we will report InGaAs/InAs ultra-thin-body MOSFETs. Three techniques for reducing the leakage currents in InGaAs/InAs MOSFETs are reported as described below. 1) Wide band-gap barriers: We developed AlAs0.44Sb0.56 barriers lattice-match to InP by molecular beam epitaxy (MBE), and studied the electron transport in In0.53Ga0.47As/AlAs 0.44Sb0.56 heterostructures. The InGaAs channel MOSFETs using AlAs0.44Sb0.56 bottom barriers or p-doped In0.52 Al0.48As barriers were demonstrated, showing significant suppression on the back barrier leakage. 2) Ultra-thin channels: We investigated the electron transport in InGaAs and InAs ultra-thin quantum wells and ultra-thin body MOSFETs (t ch ~ 2-4 nm). For high performance logic, InAs channels enable higher on-state current, while for low power logic, InGaAs channels allow lower BTBT leakage current. 3) Source/Drain engineering: We developed raised InGaAs and recessed InP source/drain spacers. The raised InGaAs source/drain spacers improve electrostatics, reducing subthreshold leakage, and smooth the electric field near drain, reducing

Interface analysis of Ge ultra thin layers intercalated between GaAs substrates and oxide stacks

Energy Technology Data Exchange (ETDEWEB)

Molle, Alessandro, E-mail: alessandro.molle@mdm.infm.i [Laboratorio Nazionale MDM, CNR-INFM, Via C. Olivetti 2, 20041 Agrate Brianza (Italy); Lamagna, Luca; Spiga, Sabina [Laboratorio Nazionale MDM, CNR-INFM, Via C. Olivetti 2, 20041 Agrate Brianza (Italy); Fanciulli, Marco [Laboratorio Nazionale MDM, CNR-INFM, Via C. Olivetti 2, 20041 Agrate Brianza (MI) (Italy); Dipartimento di Scienza dei Materiali, Universita di Milano Bicocca, Milano (Italy); Brammertz, Guy; Meuris, Marc [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium)

2010-01-01

Capping III-V compound surfaces with Ge ultra-thin layer might be a viable pathway to passivate the electrically active interface traps which usually jeopardize the integration of III-V materials in metal-oxide-semiconductor devices. As the physical nature of such traps is intrinsically related to the chemical details of the interface composition, the structural and compositional features of the Ge/GaAs interface were thoroughly investigated in two different configurations, the atomic layer deposition of La-doped ZrO{sub 2} films on Ge-capped GaAs and the ultra-high vacuum based molecular beam deposition of GeO{sub 2}/Ge double stack on in situ prepared GaAs. In the former case, the intercalation of a Ge interface layer is shown to suppress the concentration of interface Ga-O, As-O and elemental As bonding which were significantly detected in case of the direct oxide deposition on GaAs. In the latter case, the incidence of two different in situ surface preparations, the Ar sputtering and the atomic H cleaning, on the interface composition is elucidated and the beneficial role played by the atomic H exposure in reducing the semiconductor-oxygen bonds at the interface level is demonstrated.

Oxidation of ultra low carbon and silicon bearing steels

Energy Technology Data Exchange (ETDEWEB)

Suarez, Lucia [CTM - Technologic Centre, Materials Technology Area, Manresa, Barcelona (Spain)], E-mail: lucia.suarez@ctm.com.es; Rodriguez-Calvillo, Pablo [CTM - Technologic Centre, Materials Technology Area, Manresa, Barcelona (Spain)], E-mail: pablo.rodriguez@ctm.com.es; Houbaert, Yvan [Department of Materials Science and Engineering, University of Ghent (Belgium)], E-mail: Yvan.Houbaert@UGent.be; Colas, Rafael [Facultad de Ingenieria Mecanica y Electrica, Universidad Autonoma de Nuevo Leon (Mexico)], E-mail: rcolas@mail.uanl.mx

2010-06-15

Oxidation tests were carried out in samples from an ultra low carbon and two silicon bearing steels to determine the distribution and morphology of the oxide species present. The ultra low carbon steel was oxidized for short periods of time within a chamber designed to obtain thin oxide layers by controlling the atmosphere, and for longer times in an electric furnace; the silicon steels were reheated only in the electric furnace. The chamber was constructed to study the behaviour encountered during the short period of time between descaling and rolling in modern continuous mills. It was found that the oxide layers formed on the samples reheated in the electric furnace were made of different oxide species. The specimens treated in the chamber had layers made almost exclusively of wustite. Selected oxide samples were studied by scanning electron microscopy to obtain electron backscattered diffraction patterns, which were used to identify the oxide species in the layer.

Paraffin wax passivation layer improvements in electrical characteristics of bottom gate amorphous indium–gallium–zinc oxide thin-film transistors

International Nuclear Information System (INIS)

Chang, Geng-Wei; Chang, Ting-Chang; Syu, Yong-En; Tsai, Tsung-Ming; Chang, Kuan-Chang; Tu, Chun-Hao; Jian, Fu-Yen; Hung, Ya-Chi; Tai, Ya-Hsiang

2011-01-01

In this research, paraffin wax is employed as the passivation layer of the bottom gate amorphous indium–gallium–zinc oxide thin-film transistors (a-IGZO TFTs), and it is formed by sol–gel process in the atmosphere. The high yield and low cost passivation layer of sol–gel process technology has attracted much attention for current flat-panel-display manufacturing. Comparing with passivation-free a-IGZO TFTs, passivated devices exhibit a superior stability against positive gate bias stress in different ambient gas, demonstrating that paraffin wax shows gas-resisting characteristics for a-IGZO TFTs application. Furthermore, light-induced stretch-out phenomenon for paraffin wax passivated device is suppressed. This superior stability of the passivated device was attributed to the reduced total density of states (DOS) including the interfacial and semiconductor bulk trap densities.

Synchrotron-radiation XPS analysis of ultra-thin silane films: Specifying the organic silicon

Energy Technology Data Exchange (ETDEWEB)

Dietrich, Paul M., E-mail: paul.dietrich@yahoo.de [Bundesanstalt für Materialforschung und – prüfung (BAM), Unter den Eichen 87, 12205 Berlin (Germany); Glamsch, Stephan [Bundesanstalt für Materialforschung und – prüfung (BAM), Unter den Eichen 87, 12205 Berlin (Germany); Freie Universität Berlin, Institut für Chemie und Biochemie, Fabeckstr. 34/36, 14195 Berlin (Germany); Ehlert, Christopher [Bundesanstalt für Materialforschung und – prüfung (BAM), Unter den Eichen 87, 12205 Berlin (Germany); Institut für Chemie, Universität Potsdam, Karl-Liebknecht-Straße 24-25, 14476 Potsdam (Germany); Lippitz, Andreas [Bundesanstalt für Materialforschung und – prüfung (BAM), Unter den Eichen 87, 12205 Berlin (Germany); Kulak, Nora [Freie Universität Berlin, Institut für Chemie und Biochemie, Fabeckstr. 34/36, 14195 Berlin (Germany); Unger, Wolfgang E.S. [Bundesanstalt für Materialforschung und – prüfung (BAM), Unter den Eichen 87, 12205 Berlin (Germany)

2016-02-15

Graphical abstract: - Highlights: • A synchrotron-based XPS method to analyze ultra-thin silane films is presented. • Specification and quantification of organic next to inorganic silicon is demonstrated. • Non-destructive chemical depth profiles of the silane monolayers were obtained. - Abstract: The analysis of chemical and elemental in-depth variations in ultra-thin organic layers with thicknesses below 5 nm is very challenging. Energy- and angle-resolved XPS (ER/AR-XPS) opens up the possibility for non-destructive chemical ultra-shallow depth profiling of the outermost surface layer of ultra-thin organic films due to its exceptional surface sensitivity. For common organic materials a reliable chemical in-depth analysis with a lower limit of the XPS information depth z{sub 95} of about 1 nm can be performed. As a proof-of-principle example with relevance for industrial applications the ER/AR-XPS analysis of different organic monolayers made of amino- or benzamidosilane molecules on silicon oxide surfaces is presented. It is demonstrated how to use the Si 2p core-level region to non-destructively depth-profile the organic (silane monolayer) – inorganic (SiO{sub 2}/Si) interface and how to quantify Si species, ranging from elemental silicon over native silicon oxide to the silane itself. The main advantage of the applied ER/AR-XPS method is the improved specification of organic from inorganic silicon components in Si 2p core-level spectra with exceptional low uncertainties compared to conventional laboratory XPS.

Study on characteristics of a double-conductible channel organic thin-film transistor with an ultra-thin hole-blocking layer

International Nuclear Information System (INIS)

Guang-Cai, Yuan; Zheng, Xu; Su-Ling, Zhao; Fu-Jun, Zhang; Xue-Yan, Tian; Xu-Rong, Xu; Na, Xu

2009-01-01

The properties of top-contact organic thin-film transistors (TC-OTFTs) using ultra-thin 2, 9-dimethyl-4, 7-diphenyl-1, 10-phenanthroline (BCP) as a hole-blocking interlayer have been improved significantly and a BCP interlayer was inserted into the middle of the pentacene active layer. This paper obtains a fire-new transport mode of an OTFT device with double-conductible channels. The accumulation and transfer of the hole carriers are limited by the BCP interlayer in the vertical region of the channel. A huge amount of carriers is located not only at the interface between pentacene and the gate insulator, but also at the two interfaces of pentacene/BCP interlayer and pentacene/gate insulator, respectively. The results suggest that the BCP interlayer may be useful to adjust the hole accumulation and transfer, and can increase the hole mobility and output current of OTFTs. The TC-OTFTs with a BCP interlayer at V DS = −20 V showed excellent hole mobility μFE and threshold voltage V TH of 0.58 cm 2 /(V·s) and −4.6 V, respectively

XPS and angle resolved XPS, in the semiconductor industry: Characterization and metrology control of ultra-thin films

International Nuclear Information System (INIS)

Brundle, C.R.; Conti, Giuseppina; Mack, Paul

2010-01-01

This review discusses the development of X-ray photoelectron spectroscopy, XPS, used as a characterization and metrology method for ultra-thin films in the semiconductor wafer processing industry. After a brief explanation of how the relative roles of XPS and Auger electron spectroscopy, AES, have changed over the last 15 years or so in the semiconductor industry, we go into some detail as to what is implied by metrology, as opposed to characterization, for thin films in the industry, and then describe how XPS, and particularly angle resolved XPS, ARXPS, have been implemented as a metrology 'tool' for thickness, chemical composition, and non-destructive depth profiling, of transistor gate oxide material, a key requirement in front-end processing. We take a historical approach, dealing first with the early use for SiO 2 films on Si(1 0 0), then moving to silicon oxynitride, SiO x N y in detail, and finally and briefly HfO 2 -based material, which is used today in the most advanced devices (32 nm node).

Improvement in gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors using microwave irradiation

Energy Technology Data Exchange (ETDEWEB)

Jo, Kwang-Won; Cho, Won-Ju, E-mail: chowj@kw.ac.kr [Department of Electronic Materials Engineering, Kwangwoon University, 447-1, Wolgye-dong, Nowon-gu, Seoul 139-701 (Korea, Republic of)

2014-11-24

In this study, we evaluated the effects of microwave irradiation (MWI) post-deposition-annealing (PDA) treatment on the gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) and compared the results with a conventional thermal annealing PDA treatment. The MWI-PDA-treated a-IGZO TFTs exhibited enhanced electrical performance as well as improved long-term stability with increasing microwave power. The positive turn-on voltage shift (ΔV{sub ON}) as a function of stress time with positive bias and varying temperature was precisely modeled on a stretched-exponential equation, suggesting that charge trapping is a dominant mechanism in the instability of MWI-PDA-treated a-IGZO TFTs. The characteristic trapping time and average effective barrier height for electron transport indicate that the MWI-PDA treatment effectively reduces the defects in a-IGZO TFTs, resulting in a superior resistance against gate bias stress.

Improvement in gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors using microwave irradiation

International Nuclear Information System (INIS)

Jo, Kwang-Won; Cho, Won-Ju

2014-01-01

In this study, we evaluated the effects of microwave irradiation (MWI) post-deposition-annealing (PDA) treatment on the gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) and compared the results with a conventional thermal annealing PDA treatment. The MWI-PDA-treated a-IGZO TFTs exhibited enhanced electrical performance as well as improved long-term stability with increasing microwave power. The positive turn-on voltage shift (ΔV ON ) as a function of stress time with positive bias and varying temperature was precisely modeled on a stretched-exponential equation, suggesting that charge trapping is a dominant mechanism in the instability of MWI-PDA-treated a-IGZO TFTs. The characteristic trapping time and average effective barrier height for electron transport indicate that the MWI-PDA treatment effectively reduces the defects in a-IGZO TFTs, resulting in a superior resistance against gate bias stress

Yttrium scandate thin film as alternative high-permittivity dielectric for germanium gate stack formation

Energy Technology Data Exchange (ETDEWEB)

Lu, Cimang, E-mail: cimang@adam.t.u-tokyo.ac.jp; Lee, Choong Hyun; Nishimura, Tomonori; Toriumi, Akira [Department of Materials Engineering, The University of Tokyo, 7-3-1 Hongo, Tokyo 113-8656 (Japan); JST, CREST, 7-3-1 Hongo, Tokyo 113-8656 (Japan)

2015-08-17

We investigated yttrium scandate (YScO{sub 3}) as an alternative high-permittivity (k) dielectric thin film for Ge gate stack formation. Significant enhancement of k-value is reported in YScO{sub 3} comparing to both of its binary compounds, Y{sub 2}O{sub 3} and Sc{sub 2}O{sub 3}, without any cost of interface properties. It suggests a feasible approach to a design of promising high-k dielectrics for Ge gate stack, namely, the formation of high-k ternary oxide out of two medium-k binary oxides. Aggressive scaling of equivalent oxide thickness (EOT) with promising interface properties is presented by using YScO{sub 3} as high-k dielectric and yttrium-doped GeO{sub 2} (Y-GeO{sub 2}) as interfacial layer, for a demonstration of high-k gate stack on Ge. In addition, we demonstrate Ge n-MOSFET performance showing the peak electron mobility over 1000 cm{sup 2}/V s in sub-nm EOT region by YScO{sub 3}/Y-GeO{sub 2}/Ge gate stack.

Designable ultra-smooth ultra-thin solid-electrolyte interphases of three alkali metal anodes.

Science.gov (United States)

Gu, Yu; Wang, Wei-Wei; Li, Yi-Juan; Wu, Qi-Hui; Tang, Shuai; Yan, Jia-Wei; Zheng, Ming-Sen; Wu, De-Yin; Fan, Chun-Hai; Hu, Wei-Qiang; Chen, Zhao-Bin; Fang, Yuan; Zhang, Qing-Hong; Dong, Quan-Feng; Mao, Bing-Wei

2018-04-09

Dendrite growth of alkali metal anodes limited their lifetime for charge/discharge cycling. Here, we report near-perfect anodes of lithium, sodium, and potassium metals achieved by electrochemical polishing, which removes microscopic defects and creates ultra-smooth ultra-thin solid-electrolyte interphase layers at metal surfaces for providing a homogeneous environment. Precise characterizations by AFM force probing with corroborative in-depth XPS profile analysis reveal that the ultra-smooth ultra-thin solid-electrolyte interphase can be designed to have alternating inorganic-rich and organic-rich/mixed multi-layered structure, which offers mechanical property of coupled rigidity and elasticity. The polished metal anodes exhibit significantly enhanced cycling stability, specifically the lithium anodes can cycle for over 200 times at a real current density of 2 mA cm -2 with 100% depth of discharge. Our work illustrates that an ultra-smooth ultra-thin solid-electrolyte interphase may be robust enough to suppress dendrite growth and thus serve as an initial layer for further improved protection of alkali metal anodes.

Controllable growth of stable germanium dioxide ultra-thin layer by means of capacitively driven radio frequency discharge

Energy Technology Data Exchange (ETDEWEB)

Svarnas, P., E-mail: svarnas@ece.upatras.gr [High Voltage Laboratory, Department of Electrical and Computer Engineering, University of Patras, Rion 26 504, Patras (Greece); Botzakaki, M.A. [Department of Physics, University of Patras, Rion 26 504 (Greece); Skoulatakis, G.; Kennou, S.; Ladas, S. [Surface Science Laboratory, Department of Chemical Engineering, University of Patras, Rion 26 504 (Greece); Tsamis, C. [NCSR “Demokritos”, Institute of Advanced Materials, Physicochemical Processes, Nanotechnology & Microsystems, Aghia Paraskevi 15 310, Athens (Greece); Georga, S.N.; Krontiras, C.A. [Department of Physics, University of Patras, Rion 26 504 (Greece)

2016-01-29

It is well recognized that native oxide of germanium is hygroscopic and water soluble, while germanium dioxide is thermally unstable and it is converted to volatile germanium oxide at approximately 400 °C. Different techniques, implementing quite complicated plasma setups, gas mixtures and substrate heating, have been used in order to grow a stable germanium oxide. In the present work a traditional “RF diode” is used for germanium oxidation by cold plasma. Following growth, X-ray photoelectron spectroscopy demonstrates that traditional capacitively driven radio frequency discharges, using molecular oxygen as sole feedstock gas, provide the possibility of germanium dioxide layer growth in a fully reproducible and controllable manner. Post treatment ex-situ analyses on day-scale periods disclose the stability of germanium oxide at room ambient conditions, offering thus the ability to grow (ex-situ) ultra-thin high-k dielectrics on top of germanium oxide layers. Atomic force microscopy excludes any morphological modification in respect to the bare germanium surface. These results suggest a simple method for a controllable and stable germanium oxide growth, and contribute to the challenge to switch to high-k dielectrics as gate insulators for high-performance metal-oxide-semiconductor field-effect transistors and to exploit in large scale the superior properties of germanium as an alternative channel material in future technology nodes. - Highlights: • Simple one-frequency reactive ion etcher develops GeO{sub 2} thin layers controllably. • The layers remain chemically stable at ambient conditions over day-scale periods. • The layers are unaffected by the ex-situ deposition of high-k dielectrics onto them. • GeO{sub 2} oxidation and high-k deposition don't affect the Ge morphology significantly. • These conditions contribute to improved Ge-based MOS structure fabrication.

Effects of DC gate and drain bias stresses on the degradation of excimer laser crystallized polysilicon thin film transistors

International Nuclear Information System (INIS)

Kouvatsos, D N; Michalas, L; Voutsas, A T; Papaioannou, G J

2005-01-01

The effects of gate and drain bias stresses on thin film transistors fabricated in polysilicon films crystallized using the advanced sequential lateral solidification excimer laser annealing (SLS ELA) process, which yields very elongated polysilicon grains and allows the fabrication of TFTs without grain boundary barriers to current flow, are investigated as a function of the active layer thickness and of the TFT orientation relative to the grains. The application of hot carrier stress, with a condition of V GS = V DS /2, was determined to induce threshold voltage, subthreshold swing and transconductance degradation for TFTs in thicker polysilicon films and the associated stress-induced increase in the active layer trap density was evaluated. However, this device degradation was drastically reduced for TFTs fabricated in ultra-thin films. Furthermore, the application of the same stress condition to TFTs oriented vertically to the elongated grains resulted in similar threshold voltage shift but in substantially decreased subthreshold swing and transconductance degradation. The immunity of ultra-thin active layer devices to degradation under hot carrier stress clearly suggests the implementation of ultra thin SLS ELA polysilicon films for the fabrication of TFTs exhibiting not only high performance but, especially, the high reliability needed for integrated systems on panel

High permittivity materials for oxide gate stack in Ge-based metal oxide semiconductor capacitors

Energy Technology Data Exchange (ETDEWEB)

Molle, Alessandro, E-mail: alessandro.molle@mdm.infm.i [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Baldovino, Silvia [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Dipartimento di Scienza dei Materiali, Universita degli Studi di Milano Bicocca, Milano (Italy); Spiga, Sabina [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Fanciulli, Marco [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Dipartimento di Scienza dei Materiali, Universita degli Studi di Milano Bicocca, Milano (Italy)

2010-01-01

In the effort to ultimately shrink the size of logic devices towards a post-Si era, the integration of Ge as alternative channel material for high-speed p-MOSFET devices and the concomitant coupling with high permittivity dielectrics (high-k) as gate oxides is currently a key-challenge in microelectronics. However, the Ge option still suffers from a number of unresolved drawbacks and open issues mainly related to the thermodynamic and electrical compatibility of Ge substrates with high-k gate stack. Strictly speaking, two main concerns can be emphasized. On one side is the dilemma on which chemical/physical passivation is more suitable to minimize the unavoidable presence of electrically active defects at the oxide/semiconductor interface. On the other side, overcoming the SiO{sub 2} gate stack opens the route to a number of potentially outperforming high-k oxides. Two deposition approaches were here separately adopted to investigate the high-k oxide growth on Ge substrates, the molecular beam deposition (MBD) of Gd{sub 2}O{sub 3} and the atomic layer deposition (ALD) of HfO{sub 2}. In the MBD framework epitaxial and amorphous Gd{sub 2}O{sub 3} films were grown onto GeO{sub 2}-passivated Ge substrates. In this case, Ge passivation was achieved by exploiting the Ge{sup 4+} bonding state in GeO{sub 2} ultra-thin interface layers intentionally deposited in between Ge and the high-k oxide by means of atomic oxygen exposure to Ge. The composition of the interface layer has been characterized as a function of the oxidation temperature and evidence of Ge dangling bonds at the GeO{sub 2}/Ge interface has been reported. Finally, the electrical response of MOS capacitors incorporating Gd{sub 2}O{sub 3} and GeO{sub 2}-passivated Ge substrates has been checked by capacitance-voltage measurements. On the other hand, the structural and electrical properties of HfO{sub 2} films grown by ALD on Ge by using different oxygen precursors, i.e. H{sub 2}O, Hf(O{sup t}Bu){sub 2}(mmp

Nanocoatings and ultra-thin films technologies and applications

CERN Document Server

Tiginyanu, Ion

2011-01-01

Gives a comprehensive account of the developments of nanocoatings and ultra-thin films. This book covers the fundamentals, processes of deposition and characterisation of nanocoatings, as well as the applications. It is suitable for the glass and glazing, automotive, electronics, aerospace, construction and biomedical industries in particular.$bCoatings are used for a wide range of applications, from anti-fogging coatings for glass through to corrosion control in the aerospace and automotive industries. Nanocoatings and ultra-thin films provides an up-to-date review of the fundamentals, processes of deposition, characterisation and applications of nanocoatings. Part one covers technologies used in the creation and analysis of thin films, including chapters on current and advanced coating technologies in industry, nanostructured thin films from amphiphilic molecules, chemical and physical vapour deposition methods and methods for analysing nanocoatings and ultra-thin films. Part two focuses on the applications...

Thermal oxidation of Ni films for p-type thin-film transistors

KAUST Repository

Jiang, Jie; Wang, Xinghui; Zhang, Qing; Li, Jingqi; Zhang, Xixiang

2013-01-01

p-Type nanocrystal NiO-based thin-film transistors (TFTs) are fabricated by simply oxidizing thin Ni films at temperatures as low as 400 °C. The highest field-effect mobility in a linear region and the current on-off ratio are found to be 5.2 cm2 V-1 s-1 and 2.2 × 103, respectively. X-ray diffraction, transmission electron microscopy and electrical performances of the TFTs with "top contact" and "bottom contact" channels suggest that the upper parts of the Ni films are clearly oxidized. In contrast, the lower parts in contact with the gate dielectric are partially oxidized to form a quasi-discontinuous Ni layer, which does not fully shield the gate electric field, but still conduct the source and drain current. This simple method for producing p-type TFTs may be promising for the next-generation oxide-based electronic applications. © 2013 the Owner Societies.

Femtosecond all-optical parallel logic gates based on tunable saturable to reverse saturable absorption in graphene-oxide thin films

International Nuclear Information System (INIS)

Roy, Sukhdev; Yadav, Chandresh

2013-01-01

A detailed theoretical analysis of ultrafast transition from saturable absorption (SA) to reverse saturable absorption (RSA) has been presented in graphene-oxide thin films with femtosecond laser pulses at 800 nm. Increase in pulse intensity leads to switching from SA to RSA with increased contrast due to two-photon absorption induced excited-state absorption. Theoretical results are in good agreement with reported experimental results. Interestingly, it is also shown that increase in concentration results in RSA to SA transition. The switching has been optimized to design parallel all-optical femtosecond NOT, AND, OR, XOR, and the universal NAND and NOR logic gates

Feasibility of Ultra-Thin Fiber-Optic Dosimeters for Radiotherapy Dosimetry.

Science.gov (United States)

Lee, Bongsoo; Kwon, Guwon; Shin, Sang Hun; Kim, Jaeseok; Yoo, Wook Jae; Ji, Young Hoon; Jang, Kyoung Won

2015-11-17

In this study, prototype ultra-thin fiber-optic dosimeters were fabricated using organic scintillators, wavelength shifting fibers, and plastic optical fibers. The sensor probes of the ultra-thin fiber-optic dosimeters consisted of very thin organic scintillators with thicknesses of 100, 150 and 200 μm. These types of sensors cannot only be used to measure skin or surface doses but also provide depth dose measurements with high spatial resolution. With the ultra-thin fiber-optic dosimeters, surface doses for gamma rays generated from a Co-60 therapy machine were measured. Additionally, percentage depth doses in the build-up regions were obtained by using the ultra-thin fiber-optic dosimeters, and the results were compared with those of external beam therapy films and a conventional fiber-optic dosimeter.

Process development of ITO source/drain electrode for the top-gate indium-gallium-zinc oxide transparent thin-film transistor

International Nuclear Information System (INIS)

Cheong, Woo-Seok; Yoon, Young-sun; Shin, Jae-Heon; Hwang, Chi-Sun; Chu, Hye Yong

2009-01-01

Indium-tin oxide (ITO) has been widely used as electrodes for LCDs and OLEDs. The applications are expanding to the transparent thin-film transistors (TTFT S ) for the versatile circuits or transparent displays. This paper is related with optimization of ITO source and drain electrode for TTFTs on glass substrates. For example, un-etched ITO remnants, which frequently found in the wet etching process, often originate from unsuitable ITO formation processes. In order to improve them, an ion beam deposition method is introduced, which uses for forming a seed layer before the main ITO deposition. We confirm that ITO films with seed layers are effective to obtain clean and smooth glass surfaces without un-etched ITO remnants, resulting in a good long-run electrical stability of the top-gate indium-gallium-zinc oxide-TTFT.

Tungsten oxide proton conducting films for low-voltage transparent oxide-based thin-film transistors

International Nuclear Information System (INIS)

Zhang, Hongliang; Wan, Qing; Wan, Changjin; Wu, Guodong; Zhu, Liqiang

2013-01-01

Tungsten oxide (WO x ) electrolyte films deposited by reactive magnetron sputtering showed a high room temperature proton conductivity of 1.38 × 10 −4 S/cm with a relative humidity of 60%. Low-voltage transparent W-doped indium-zinc-oxide thin-film transistors gated by WO x -based electrolytes were self-assembled on glass substrates by one mask diffraction method. Enhancement mode operation with a large current on/off ratio of 4.7 × 10 6 , a low subthreshold swing of 108 mV/decade, and a high field-effect mobility 42.6 cm 2 /V s was realized. Our results demonstrated that WO x -based proton conducting films were promising gate dielectric candidates for portable low-voltage oxide-based devices.

Investigation of high- k yttrium copper titanate thin films as alternative gate dielectrics

International Nuclear Information System (INIS)

Monteduro, Anna Grazia; Ameer, Zoobia; Rizzato, Silvia; Martino, Maurizio; Caricato, Anna Paola; Maruccio, Giuseppe; Tasco, Vittorianna; Lekshmi, Indira Chaitanya; Hazarika, Abhijit; Choudhury, Debraj; Sarma, D D

2016-01-01

Nearly amorphous high- k yttrium copper titanate thin films deposited by laser ablation were investigated in both metal–oxide–semiconductor (MOS) and metal–insulator–metal (MIM) junctions in order to assess the potentialities of this material as a gate oxide. The trend of dielectric parameters with film deposition shows a wide tunability for the dielectric constant and AC conductivity, with a remarkably high dielectric constant value of up to 95 for the thick films and conductivity as low as 6  ×  10 −10 S cm −1 for the thin films deposited at high oxygen pressure. The AC conductivity analysis points out a decrease in the conductivity, indicating the formation of a blocking interface layer, probably due to partial oxidation of the thin films during cool-down in an oxygen atmosphere. Topography and surface potential characterizations highlight differences in the thin film microstructure as a function of the deposition conditions; these differences seem to affect their electrical properties. (paper)

Electrical characteristics of GdTiO{sub 3} gate dielectric for amorphous InGaZnO thin-film transistors

Energy Technology Data Exchange (ETDEWEB)

Her, Jim-Long [Division of Natural Science, Center for General Education, Chang Gung University, Taoyuan 333, Taiwan (China); Pan, Tung-Ming, E-mail: tmpan@mail.cgu.edu.tw [Department of Electronics Engineering, Chang Gung University, Taoyuan 333, Taiwan (China); Liu, Jiang-Hung; Wang, Hong-Jun; Chen, Ching-Hung [Department of Electronics Engineering, Chang Gung University, Taoyuan 333, Taiwan (China); Koyama, Keiichi [Graduate School of Science and Engineering, Kagoshima University, Kagoshima 890-0065 (Japan)

2014-10-31

In this article, we studied the structural properties and electrical characteristics of GdTiO{sub 3} gate dielectric for amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistor (TFT) applications. The a-IGZO TFT device featuring the GdTiO{sub 3} gate dielectric exhibited better electrical characteristics, including a small threshold voltage of 0.14 V, a large field-effect mobility of 32.3 cm{sup 2}/V-s, a high I{sub on}/I{sub off} current ratio of 4.2 × 10{sup 8}, and a low subthreshold swing of 213 mV/decade. Furthermore, the electrical instability of GdTiO{sub 3} a-IGZO TFTs was investigated under both positive gate-bias stress (PGBS) and negative gate-bias stress (NGBS) conditions. The electron charge trapping in the gate dielectric dominates the PGBS degradation, while the oxygen vacancies control the NGBS degradation. - Highlights: • Indium–gallium–zinc oxide (a-IGZO) thin-film transistor (TFT) • Structural and electrical properties of the GdTiO{sub 3} film were studied. • a-IGZO TFT featuring GdTi{sub x}O{sub y} dielectric exhibited better electrical characteristics. • TFT instability investigated under positive and negative gate-bias stress conditions.

Technology breakthroughs in high performance metal-oxide-semiconductor devices for ultra-high density, low power non-volatile memory applications

Science.gov (United States)

Hong, Augustin Jinwoo

Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.

Ultra thin continuously reinforced concrete pavement research in south Africa

CSIR Research Space (South Africa)

Perrie, BD

2007-08-01

Full Text Available Ultra thin continuously reinforced concrete pavements (UTCRCP), in literature also referred to as Ultra Thin Reinforced High Performance Concrete (UTHRHPC), have been used in Europe successfully as a rehabilitation measure on steel bridge decks...

Trap state passivation improved hot-carrier instability by zirconium-doping in hafnium oxide in a nanoscale n-metal-oxide semiconductor-field effect transistors with high-k/metal gate

International Nuclear Information System (INIS)

Liu, Hsi-Wen; Tsai, Jyun-Yu; Liu, Kuan-Ju; Lu, Ying-Hsin; Chang, Ting-Chang; Chen, Ching-En; Tseng, Tseung-Yuen; Lin, Chien-Yu; Cheng, Osbert; Huang, Cheng-Tung; Ye, Yi-Han

2016-01-01

This work investigates the effect on hot carrier degradation (HCD) of doping zirconium into the hafnium oxide high-k layer in the nanoscale high-k/metal gate n-channel metal-oxide-semiconductor field-effect-transistors. Previous n-metal-oxide semiconductor-field effect transistor studies demonstrated that zirconium-doped hafnium oxide reduces charge trapping and improves positive bias temperature instability. In this work, a clear reduction in HCD is observed with zirconium-doped hafnium oxide because channel hot electron (CHE) trapping in pre-existing high-k bulk defects is the main degradation mechanism. However, this reduced HCD became ineffective at ultra-low temperature, since CHE traps in the deeper bulk defects at ultra-low temperature, while zirconium-doping only passivates shallow bulk defects.

SEMICONDUCTOR DEVICES: Structural and electrical characteristics of lanthanum oxide gate dielectric film on GaAs pHEMT technology

Science.gov (United States)

Chia-Song, Wu; Hsing-Chung, Liu

2009-11-01

This paper investigates the feasibility of using a lanthanum oxide thin film (La2O3) with a high dielectric constant as a gate dielectric on GaAs pHEMTs to reduce gate leakage current and improve the gate to drain breakdown voltage relative to the conventional GaAs pHEMT. An E/D mode pHEMT in a single chip was realized by selecting the appropriate La2O3 thickness. The thin La2O3 film was characterized: its chemical composition and crystalline structure were determined by X-ray photoelectron spectroscopy and X-ray diffraction, respectively. La2O3 exhibited good thermal stability after post-deposition annealing at 200, 400 and 600 °C because of its high binding-energy (835.6 eV). Experimental results clearly demonstrated that the La2O3 thin film was thermally stable. The DC and RF characteristics of Pt/La2O3/Ti/Au gate and conventional Pt/Ti/Au gate pHEMTs were examined. The measurements indicated that the transistor with the Pt/La2O3/Ti/Au gate had a higher breakdown voltage and lower gate leakage current. Accordingly, the La2O3 thin film is a potential high-k material for use as a gate dielectric to improve electrical performance and the thermal effect in high-power applications.

Influence of ultra-thin TiN thickness (1.4 nm and 2.4 nm) on positive bias temperature instability (PBTI) of high-k/metal gate nMOSFETs with gate-last process

International Nuclear Information System (INIS)

Qi Lu-Wei; Yang Hong; Ren Shang-Qing; Xu Ye-Feng; Luo Wei-Chun; Xu Hao; Wang Yan-Rong; Tang Bo; Wang Wen-Wu; Yan Jiang; Zhu Hui-Long; Zhao Chao; Chen Da-Peng; Ye Tian-Chun

2015-01-01

The positive bias temperature instability (PBTI) degradations of high-k/metal gate (HK/MG) nMOSFETs with thin TiN capping layers (1.4 nm and 2.4 nm) are systemically investigated. In this paper, the trap energy distribution in gate stack during PBTI stress is extracted by using ramped recovery stress, and the temperature dependences of PBTI (90 °C, 125 °C, 160 °C) are studied and activation energy (E a ) values (0.13 eV and 0.15 eV) are extracted. Although the equivalent oxide thickness (EOT) values of two TiN thickness values are almost similar (0.85 nm and 0.87 nm), the 2.4-nm TiN one (thicker TiN capping layer) shows better PBTI reliability (13.41% at 0.9 V, 90 °C, 1000 s). This is due to the better interfacial layer/high-k (IL/HK) interface, and HK bulk states exhibited through extracting activation energy and trap energy distribution in the high-k layer. (paper)

Analysis of chemical bond states and electrical properties of stacked AlON/HfO{sub 2} gate oxides formed by using a layer-by-layer technique

Energy Technology Data Exchange (ETDEWEB)

Choi, Wonjoon; Lee, Jonghyun; Yang, Jungyup; Kim, Chaeok; Hong, Jinpyo; Nahm, Tschanguh; Byun, Byungsub; Kim, Moseok [Hanyang University, Seoul (Korea, Republic of)

2006-06-15

Stacked AlON/HfO{sub 2} thin films for gate oxides in metal-oxide-semiconductor devices are successfully prepared on Si substrates by utilizing a layer-by-layer technique integrated with an off-axis RF remote plasma sputtering process at room temperature. This off-axis structure is designed to improve the uniformity and the quality of gate oxide films. Also, a layer-by-layer technique is used to control the interface layer between the gate oxide and the Si substrate. The electrical properties of our stacked films are characterized by using capacitance versus voltage and leakage current versus voltage measurements. The stacked AlON/HfO{sub 2} gate oxide exhibits a low leakage current of about 10{sup -6} A/cm{sup 2} and a high dielectric constant value of 14.26 by effectively suppressing the interface layer between gate oxide and Si substrate. In addition, the chemical bond states and the optimum thickness of each AlON and HfO{sub 2} thin film are analyzed using X-ray photoemission spectroscopy and transmission electron microscopy measurement.

Non-classical polycrystalline silicon thin-film transistor with embedded block-oxide for suppressing the short channel effect

International Nuclear Information System (INIS)

Lin, Jyi-Tsong; Huang, Kuo-Dong; Hu, Shu-Fen

2008-01-01

In this paper, a polycrystalline silicon (polysilicon) thin-film transistor with a block oxide enclosing body, BTFT, is fabricated and investigated. By utilizing the block-oxide structure of thin-film transistors, the BTFT is shown to suppress the short channel effect. This proposed structure is formed by burying self-aligned oxide spacers along the sidewalls of the source and drain junctions, which reduces the P–N junction area, thereby reducing the junction capacitance and leakage current. Measurements demonstrate that the BTFT eliminates the punch-through effect even down to gate lengths of 1.5 µm, whereas the conventional TFT suffers serious short channel effects at this gate length

Influence of Oxygen Concentration on the Performance of Ultra-Thin RF Magnetron Sputter Deposited Indium Tin Oxide Films as a Top Electrode for Photovoltaic Devices

Directory of Open Access Journals (Sweden)

Jephias Gwamuri

2016-01-01

Full Text Available The opportunity for substantial efficiency enhancements of thin film hydrogenated amorphous silicon (a-Si:H solar photovoltaic (PV cells using plasmonic absorbers requires ultra-thin transparent conducting oxide top electrodes with low resistivity and high transmittances in the visible range of the electromagnetic spectrum. Fabricating ultra-thin indium tin oxide (ITO films (sub-50 nm using conventional methods has presented a number of challenges; however, a novel method involving chemical shaving of thicker (greater than 80 nm RF sputter deposited high-quality ITO films has been demonstrated. This study investigates the effect of oxygen concentration on the etch rates of RF sputter deposited ITO films to provide a detailed understanding of the interaction of all critical experimental parameters to help create even thinner layers to allow for more finely tune plasmonic resonances. ITO films were deposited on silicon substrates with a 98-nm, thermally grown oxide using RF magnetron sputtering with oxygen concentrations of 0, 0.4 and 1.0 sccm and annealed at 300 °C air ambient. Then the films were etched using a combination of water and hydrochloric and nitric acids for 1, 3, 5 and 8 min at room temperature. In-between each etching process cycle, the films were characterized by X-ray diffraction, atomic force microscopy, Raman Spectroscopy, 4-point probe (electrical conductivity, and variable angle spectroscopic ellipsometry. All the films were polycrystalline in nature and highly oriented along the (222 reflection. Ultra-thin ITO films with record low resistivity values (as low as 5.83 × 10−4 Ω·cm were obtained and high optical transparency is exhibited in the 300–1000 nm wavelength region for all the ITO films. The etch rate, preferred crystal lattice growth plane, d-spacing and lattice distortion were also observed to be highly dependent on the nature of growth environment for RF sputter deposited ITO films. The structural, electrical

Nanowire decorated, ultra-thin, single crystalline silicon for photovoltaic devices.

Science.gov (United States)

Aurang, Pantea; Turan, Rasit; Unalan, Husnu Emrah

2017-10-06

Reducing silicon (Si) wafer thickness in the photovoltaic industry has always been demanded for lowering the overall cost. Further benefits such as short collection lengths and improved open circuit voltages can also be achieved by Si thickness reduction. However, the problem with thin films is poor light absorption. One way to decrease optical losses in photovoltaic devices is to minimize the front side reflection. This approach can be applied to front contacted ultra-thin crystalline Si solar cells to increase the light absorption. In this work, homojunction solar cells were fabricated using ultra-thin and flexible single crystal Si wafers. A metal assisted chemical etching method was used for the nanowire (NW) texturization of ultra-thin Si wafers to compensate weak light absorption. A relative improvement of 56% in the reflectivity was observed for ultra-thin Si wafers with the thickness of 20 ± 0.2 μm upon NW texturization. NW length and top contact optimization resulted in a relative enhancement of 23% ± 5% in photovoltaic conversion efficiency.

Thermoluminescent characterization of thin films of aluminium oxide submitted to beta and gamma radiation

International Nuclear Information System (INIS)

Villagran, E.; Escobar A, L.; Camps, E.; Gonzalez, P.R.; Martinez A, L.

2002-01-01

By mean of the laser ablation technique, thin films of aluminium oxide have been deposited on kapton substrates. These films present thermoluminescent response (Tl) when they are exposed to beta and gamma radiation. The brilliance curves show two peaks between 112 C and 180 C. A dose-response relationship study was realized and the Tl kinetic parameters were determined using the computerized deconvolution of the brilliance curve (CGCD). The thin films of aluminium oxide have potential applications as ultra.thin radiation dosemeters. (Author)

Comparison of gate dielectric plasma damage from plasma-enhanced atomic layer deposited and magnetron sputtered TiN metal gates

Energy Technology Data Exchange (ETDEWEB)

Brennan, Christopher J.; Neumann, Christopher M.; Vitale, Steven A., E-mail: steven.vitale@ll.mit.edu [Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, Massachusetts 02420 (United States)

2015-07-28

Fully depleted silicon-on-insulator transistors were fabricated using two different metal gate deposition mechanisms to compare plasma damage effects on gate oxide quality. Devices fabricated with both plasma-enhanced atomic-layer-deposited (PE-ALD) TiN gates and magnetron plasma sputtered TiN gates showed very good electrostatics and short-channel characteristics. However, the gate oxide quality was markedly better for PE-ALD TiN. A significant reduction in interface state density was inferred from capacitance-voltage measurements as well as a 1200× reduction in gate leakage current. A high-power magnetron plasma source produces a much higher energetic ion and vacuum ultra-violet (VUV) photon flux to the wafer compared to a low-power inductively coupled PE-ALD source. The ion and VUV photons produce defect states in the bulk of the gate oxide as well as at the oxide-silicon interface, causing higher leakage and potential reliability degradation.

Lithium ion intercalation in thin crystals of hexagonal TaSe2 gated by a polymer electrolyte

Science.gov (United States)

Wu, Yueshen; Lian, Hailong; He, Jiaming; Liu, Jinyu; Wang, Shun; Xing, Hui; Mao, Zhiqiang; Liu, Ying

2018-01-01

Ionic liquid gating has been used to modify the properties of layered transition metal dichalcogenides (TMDCs), including two-dimensional (2D) crystals of TMDCs used extensively recently in the device work, which has led to observations of properties not seen in the bulk. The main effect comes from the electrostatic gating due to the strong electric field at the interface. In addition, ionic liquid gating also leads to ion intercalation when the ion size of the gate electrolyte is small compared to the interlayer spacing of TMDCs. However, the microscopic processes of ion intercalation have rarely been explored in layered TMDCs. Here, we employed a technique combining photolithography device fabrication and electrical transport measurements on the thin crystals of hexagonal TaSe2 using multiple channel devices gated by a polymer electrolyte LiClO4/Polyethylene oxide (PEO). The gate voltage and time dependent source-drain resistances of these thin crystals were used to obtain information on the intercalation process, the effect of ion intercalation, and the correlation between the ion occupation of allowed interstitial sites and the device characteristics. We found a gate voltage controlled modulation of the charge density waves and a scattering rate of charge carriers. Our work suggests that ion intercalation can be a useful tool for layered materials engineering and 2D crystal device design.

Low-Temperature Solution-Processed Gate Dielectrics for High-Performance Organic Thin Film Transistors

Directory of Open Access Journals (Sweden)

Jaekyun Kim

2015-10-01

Full Text Available A low-temperature solution-processed high-k gate dielectric layer for use in a high-performance solution-processed semiconducting polymer organic thin-film transistor (OTFT was demonstrated. Photochemical activation of sol-gel-derived AlOx films under 150 °C permitted the formation of a dense film with low leakage and relatively high dielectric-permittivity characteristics, which are almost comparable to the results yielded by the conventionally used vacuum deposition and high temperature annealing method. Octadecylphosphonic acid (ODPA self-assembled monolayer (SAM treatment of the AlOx was employed in order to realize high-performance (>0.4 cm2/Vs saturation mobility and low-operation-voltage (<5 V diketopyrrolopyrrole (DPP-based OTFTs on an ultra-thin polyimide film (3-μm thick. Thus, low-temperature photochemically-annealed solution-processed AlOx film with SAM layer is an attractive candidate as a dielectric-layer for use in high-performance organic TFTs operated at low voltages.

Ultra-thin ZnSe: Anisotropic and flexible crystal structure

Energy Technology Data Exchange (ETDEWEB)

Bacaksiz, C., E-mail: cihanbacaksiz@iyte.edu.tr [Department of Physics, Izmir Institute of Technology, 35430 Izmir (Turkey); Senger, R.T. [Department of Physics, Izmir Institute of Technology, 35430 Izmir (Turkey); Sahin, H. [Department of Photonics, Izmir Institute of Technology, 35430 Izmir (Turkey)

2017-07-01

Highlights: • Ultra-thin ZnSe is dynamically stable. • Ultra-thin ZnSe is electronically direct-gap semiconductor. • Ultra-thin ZnSe is ultra-flexible. • Ultra-thin ZnSe is mechanically in-plane anisotropic. - Abstract: By performing density functional theory-based calculations, we investigate the structural, electronic, and mechanical properties of the thinnest ever ZnSe crystal . The vibrational spectrum analysis reveals that the monolayer ZnSe is dynamically stable and has flexible nature with its soft phonon modes. In addition, a direct electronic band gap is found at the gamma point for the monolayer structure of ZnSe. We also elucidate that the monolayer ZnSe has angle dependent in-plane elastic parameters. In particular, the in-plane stiffness values are found to be 2.07 and 6.89 N/m for the arm-chair and zig-zag directions, respectively. The angle dependency is also valid for the Poisson ratio of the monolayer ZnSe. More significantly, the in-plane stiffness of the monolayer ZnSe is the one-tenth of Young modulus of bulk zb-ZnSe which indicates that the monolayer ZnSe is a quite flexible single layer crystal. With its flexible nature and in-plane anisotropic mechanical properties, the monolayer ZnSe is a good candidate for nanoscale mechanical applications.

Ultra-thin ZnSe: Anisotropic and flexible crystal structure

International Nuclear Information System (INIS)

Bacaksiz, C.; Senger, R.T.; Sahin, H.

2017-01-01

Highlights: • Ultra-thin ZnSe is dynamically stable. • Ultra-thin ZnSe is electronically direct-gap semiconductor. • Ultra-thin ZnSe is ultra-flexible. • Ultra-thin ZnSe is mechanically in-plane anisotropic. - Abstract: By performing density functional theory-based calculations, we investigate the structural, electronic, and mechanical properties of the thinnest ever ZnSe crystal . The vibrational spectrum analysis reveals that the monolayer ZnSe is dynamically stable and has flexible nature with its soft phonon modes. In addition, a direct electronic band gap is found at the gamma point for the monolayer structure of ZnSe. We also elucidate that the monolayer ZnSe has angle dependent in-plane elastic parameters. In particular, the in-plane stiffness values are found to be 2.07 and 6.89 N/m for the arm-chair and zig-zag directions, respectively. The angle dependency is also valid for the Poisson ratio of the monolayer ZnSe. More significantly, the in-plane stiffness of the monolayer ZnSe is the one-tenth of Young modulus of bulk zb-ZnSe which indicates that the monolayer ZnSe is a quite flexible single layer crystal. With its flexible nature and in-plane anisotropic mechanical properties, the monolayer ZnSe is a good candidate for nanoscale mechanical applications.

Electrical Performance and Reliability Improvement of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors with HfO₂ Gate Dielectrics by CF₄ Plasma Treatment.

Science.gov (United States)

Fan, Ching-Lin; Tseng, Fan-Ping; Tseng, Chiao-Yuan

2018-05-17

In this work, amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) with a HfO₂ gate insulator and CF₄ plasma treatment was demonstrated for the first time. Through the plasma treatment, both the electrical performance and reliability of the a-IGZO TFT with HfO₂ gate dielectric were improved. The carrier mobility significantly increased by 80.8%, from 30.2 cm²/V∙s (without treatment) to 54.6 cm²/V∙s (with CF₄ plasma treatment), which is due to the incorporated fluorine not only providing an extra electron to the IGZO, but also passivating the interface trap density. In addition, the reliability of the a-IGZO TFT with HfO₂ gate dielectric has also been improved by the CF₄ plasma treatment. By applying the CF₄ plasma treatment to the a-IGZO TFT, the hysteresis effect of the device has been improved and the device's immunity against moisture from the ambient atmosphere has been enhanced. It is believed that the CF₄ plasma treatment not only significantly improves the electrical performance of a-IGZO TFT with HfO₂ gate dielectric, but also enhances the device's reliability.

Plasma-Induced Damage on the Reliability of Hf-Based High-k/Dual Metal-Gates Complementary Metal Oxide Semiconductor Technology

International Nuclear Information System (INIS)

Weng, W.T.; Lin, H.C.; Huang, T.Y.; Lee, Y.J.; Lin, H.C.

2009-01-01

This study examines the effects of plasma-induced damage (PID) on Hf-based high-k/dual metal-gates transistors processed with advanced complementary metal-oxide-semiconductor (CMOS) technology. In addition to the gate dielectric degradations, this study demonstrates that thinning the gate dielectric reduces the impact of damage on transistor reliability including the positive bias temperature instability (PBTI) of n-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs) and the negative bias temperature instability (NBTI) of p-channel MOSFETs. This study shows that high-k/metal-gate transistors are more robust against PID than conventional SiO 2 /poly-gate transistors with similar physical thickness. Finally this study proposes a model that successfully explains the observed experimental trends in the presence of PID for high-k/metal-gate CMOS technology.

Fabrication of Ultra-thin Color Films with Highly Absorbing Media Using Oblique Angle Deposition.

Science.gov (United States)

Yoo, Young Jin; Lee, Gil Ju; Jang, Kyung-In; Song, Young Min

2017-08-29

Ultra-thin film structures have been studied extensively for use as optical coatings, but performance and fabrication challenges remain.  We present an advanced method for fabricating ultra-thin color films with improved characteristics. The proposed process addresses several fabrication issues, including large area processing. Specifically, the protocol describes a process for fabricating ultra-thin color films using an electron beam evaporator for oblique angle deposition of germanium (Ge) and gold (Au) on silicon (Si) substrates.  Film porosity produced by the oblique angle deposition induces color changes in the ultra-thin film. The degree of color change depends on factors such as deposition angle and film thickness. Fabricated samples of the ultra-thin color films showed improved color tunability and color purity. In addition, the measured reflectance of the fabricated samples was converted into chromatic values and analyzed in terms of color. Our ultra-thin film fabricating method is expected to be used for various ultra-thin film applications such as flexible color electrodes, thin film solar cells, and optical filters. Also, the process developed here for analyzing the color of the fabricated samples is broadly useful for studying various color structures.

Ultra-thin distributed Bragg reflectors via stacked single-crystal silicon nanomembranes

Energy Technology Data Exchange (ETDEWEB)

Cho, Minkyu; Seo, Jung-Hun; Lee, Jaeseong; Mi, Hongyi; Kim, Munho; Ma, Zhenqiang, E-mail: mazq@engr.wisc.edu [Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, Wisconsin 53706 (United States); Zhao, Deyin; Zhou, Weidong [Nanophotonics Lab, Department of Electrical Engineering, University of Texas at Arlington, Arlington, Texas 76019 (United States); Yin, Xin; Wang, Xudong [Department of Material Science and Engineering, University of Wisconsin-Madison, Madison, Wisconsin 53706 (United States)

2015-05-04

In this paper, we report ultra-thin distributed Bragg reflectors (DBRs) via stacked single-crystal silicon (Si) nanomembranes (NMs). Mesh hole-free single-crystal Si NMs were released from a Si-on-insulator substrate and transferred to quartz and Si substrates. Thermal oxidation was applied to the transferred Si NM to form high-quality SiO{sub 2} and thus a Si/SiO{sub 2} pair with uniform and precisely controlled thicknesses. The Si/SiO{sub 2} layers, as smooth as epitaxial grown layers, minimize scattering loss at the interface and in between the layers. As a result, a reflection of 99.8% at the wavelength range from 1350 nm to 1650 nm can be measured from a 2.5-pair DBR on a quartz substrate and 3-pair DBR on a Si substrate with thickness of 0.87 μm and 1.14 μm, respectively. The high reflection, ultra-thin DBRs developed here, which can be applied to almost any devices and materials, holds potential for application in high performance optoelectronic devices and photonics applications.

Development and characterization of ultra-thin dosemeters of aluminium oxide

International Nuclear Information System (INIS)

Villagran V, E.

2003-01-01

The aim of the present thesis work has been to investigate the thermoluminescent (Tl) response of aluminium oxide thin films with thicknesses of the order of 300 nm prepared by laser ablation. Aluminium oxide thin films show Tl response after they are subject to ultraviolet, beta and gamma radiation. The Tl curves exhibit peaks around 75 C and 169 C for UV radiation, 112 C and 180 C for beta particles and 110 C and 176 C for gamma radiation. In order to improve the Tl response some growth parameters such as power density and distance target-substrate were varied. The relation dose-response shows a non-linear behavior for UV irradiation; a linear behavior for beta-particles dose from 150 mGy to 50 Gy, and a linear behavior for gamma radiation dose from 5 Gy to 100 Gy. The kinetic Tl parameters were determined by Computerized Glow Curve Deconvolution (CGCD) method as well as using analytical methods. The CGCD results show that the high temperature peak is composed by four peaks with maximums in 165.7, 188.1, 215.3, 246.5 C. These obey a second order kinetics. The trap depth (E) values are 1.4, 1.6, 1.8 and 2.0 eV respectively. The different analytical results show a trap depth values of 0.914, 0.82 and 0.656 eV respectively. Oxide aluminium thin films obtained would be a suitable tool owing to their potential applications in clinical dosimetry, in the dose distributions due to weekly penetrating radiation determination, and in interfaces dosimetry. (Author)

Structural and Optical Studies of Magnesium Doped Zinc Oxide Thin Films

OpenAIRE

Arpana Agrawal; Tanveer Ahmad Dar; Pratima Sen

2013-01-01

The paper describes the structural and optical properties of Magnesium doped Zinc Oxide (Mg  3.5 %, 6 %, 9 %, 12 % by weight) thin films prepared by pulsed laser deposition technique. The samples are characterized by X-ray diffraction technique, Ultra-violet visible absorption spectroscopy, X-ray photoelectron spectroscopy. X-ray diffraction results reveal the polycrystalline nature of samples with no impurity or secondary phase formation. Ultra-violet visible absorption spectroscopy studies...

Direct deposition of aluminum oxide gate dielectric on graphene channel using nitrogen plasma treatment

International Nuclear Information System (INIS)

Lim, Taekyung; Kim, Dongchool; Ju, Sanghyun

2013-01-01

Deposition of high-quality dielectric on a graphene channel is an essential technology to overcome structural constraints for the development of nano-electronic devices. In this study, we investigated a method for directly depositing aluminum oxide (Al 2 O 3 ) on a graphene channel through nitrogen plasma treatment. The deposited Al 2 O 3 thin film on graphene demonstrated excellent dielectric properties with negligible charge trapping and de-trapping in the gate insulator. A top-gate-structural graphene transistor was fabricated using Al 2 O 3 as the gate dielectric with nitrogen plasma treatment on graphene channel region, and exhibited p-type transistor characteristics

A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under positive gate bias stress

Energy Technology Data Exchange (ETDEWEB)

Niang, K. M.; Flewitt, A. J., E-mail: ajf@eng.cam.ac.uk [Electrical Engineering Division, Cambridge University, J J Thomson Avenue, Cambridge CB3 0FA (United Kingdom); Barquinha, P. M. C.; Martins, R. F. P. [i3N/CENIMAT, Department of Materials Science, Faculty of Science and Technology, Universidade NOVA de Lisboa and CEMOP/UNINOVA, Campus de Caparica, 2829-516 Caparica (Portugal); Cobb, B. [Holst Centre/TNO, High Tech Campus 31, 5656AE Eindhoven (Netherlands); Powell, M. J. [252, Valley Drive, Kendal LA9 7SL (United Kingdom)

2016-02-29

Thin film transistors (TFTs) employing an amorphous indium gallium zinc oxide (a-IGZO) channel layer exhibit a positive shift in the threshold voltage under the application of positive gate bias stress (PBS). The time and temperature dependence of the threshold voltage shift was measured and analysed using the thermalization energy concept. The peak energy barrier to defect conversion is extracted to be 0.75 eV and the attempt-to-escape frequency is extracted to be 10{sup 7} s{sup −1}. These values are in remarkable agreement with measurements in a-IGZO TFTs under negative gate bias illumination stress (NBIS) reported recently (Flewitt and Powell, J. Appl. Phys. 115, 134501 (2014)). This suggests that the same physical process is responsible for both PBS and NBIS, and supports the oxygen vacancy defect migration model that the authors have previously proposed.

Structural and Optical Properties of Ultra-high Pure Hot Water Processed Ga2O3 Thin Film

Directory of Open Access Journals (Sweden)

Subramani SHANMUGAN

2016-05-01

Full Text Available Thin film based gas sensor is an advanced application of thin film especially Ga2O3 (GO thin film gas sensor is useful for high temperature gas sensor. The effect of moisture or environment on thin film properties has more influence on gas sensing properties. Radio Frequency sputtered Ga2O3 thin film was synthesized and processed in ultra-high pure hot water at 95 °C for different time durations. The structural properties were verified by the Xray Diffraction technique and the observed spectra revealed the formation of hydroxyl compound of Gallium (Gallium Oxide Dueterate – GOD on the surface of the thin film and evidenced for structural defects as an effect of moisture. Decreased crystallite size and increased dislocation density was showed the crystal defects of prepared film. From the Ultra Violet – Visible spectra, decreased optical transmittance was noticed for various processing time. The formation of needle like GOD was confirmed using Field Emission Secondary Electron Microscope (FESEM images.DOI: http://dx.doi.org/10.5755/j01.ms.22.2.7186

SWNT array resonant gate MOS transistor.

Science.gov (United States)

Arun, A; Campidelli, S; Filoramo, A; Derycke, V; Salet, P; Ionescu, A M; Goffman, M F

2011-02-04

We show that thin horizontal arrays of single wall carbon nanotubes (SWNTs) suspended above the channel of silicon MOSFETs can be used as vibrating gate electrodes. This new class of nano-electromechanical system (NEMS) combines the unique mechanical and electronic properties of SWNTs with an integrated silicon-based motion detection. Its electrical response exhibits a clear signature of the mechanical resonance of SWNT arrays (120-150 MHz) showing that these thin horizontal arrays behave as a cohesive, rigid and elastic body membrane with a Young's modulus in the order of 1-10 GPa and ultra-low mass. The resonant frequency can be tuned by the gate voltage and its dependence is well understood within the continuum mechanics framework.

SWNT array resonant gate MOS transistor

International Nuclear Information System (INIS)

Arun, A; Salet, P; Ionescu, A M; Campidelli, S; Filoramo, A; Derycke, V; Goffman, M F

2011-01-01

We show that thin horizontal arrays of single wall carbon nanotubes (SWNTs) suspended above the channel of silicon MOSFETs can be used as vibrating gate electrodes. This new class of nano-electromechanical system (NEMS) combines the unique mechanical and electronic properties of SWNTs with an integrated silicon-based motion detection. Its electrical response exhibits a clear signature of the mechanical resonance of SWNT arrays (120-150 MHz) showing that these thin horizontal arrays behave as a cohesive, rigid and elastic body membrane with a Young's modulus in the order of 1-10 GPa and ultra-low mass. The resonant frequency can be tuned by the gate voltage and its dependence is well understood within the continuum mechanics framework.

Molecular-beam-deposited yttrium-oxide dielectrics in aluminum-gated metal - oxide - semiconductor field-effect transistors: Effective electron mobility

International Nuclear Information System (INIS)

Ragnarsson, L.-A degree.; Guha, S.; Copel, M.; Cartier, E.; Bojarczuk, N. A.; Karasinski, J.

2001-01-01

We report on high effective mobilities in yttrium-oxide-based n-channel metal - oxide - semiconductor field-effect transistors (MOSFETs) with aluminum gates. The yttrium oxide was grown in ultrahigh vacuum using a reactive atomic-beam-deposition system. Medium-energy ion-scattering studies indicate an oxide with an approximate composition of Y 2 O 3 on top of a thin layer of interfacial SiO 2 . The thickness of this interfacial oxide as well as the effective mobility are found to be dependent on the postgrowth anneal conditions. Optimum conditions result in mobilities approaching that of SiO 2 -based MOSFETs at higher fields with peak mobilities at approximately 210 cm 2 /Vs. [copyright] 2001 American Institute of Physics

Performance regeneration of InGaZnO transistors with ultra-thin channels

Energy Technology Data Exchange (ETDEWEB)

Zhang, Binglei; Li, He; Zhang, Xijian, E-mail: zhangxijian@sdu.edu.cn, E-mail: songam@sdu.edu.cn; Luo, Yi; Wang, Qingpu [School of Physics, Shandong University, Jinan 250100 (China); Song, Aimin, E-mail: zhangxijian@sdu.edu.cn, E-mail: songam@sdu.edu.cn [School of Physics, Shandong University, Jinan 250100 (China); School of Electrical and Electronic Engineering, University of Manchester, Manchester M13 9PL (United Kingdom)

2015-03-02

Thin-film transistors (TFTs) based on ultra-thin amorphous indium gallium zinc oxide (a-IGZO) semiconductors down to 4 nm were studied motivated by the increasing cost of indium. At and below 5 nm, it was found that the field-effect mobility was severely degraded, the threshold voltage increased, and the output characteristics became abnormal showing no saturated current. By encapsulating a layer of polymethyl methacrylate on the IGZO TFTs, the performance of the 5-nm-thick device was effectively recovered. The devices also showed much higher on/off ratios, improved hysteresis, and normal output characteristic curves as compared with devices not encapsulated. The stability of the encapsulated devices was also studied over a four month period.

Demonstration of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with silicon-oxy-nitride as the gate insulator

International Nuclear Information System (INIS)

Balachander, K.; Arulkumaran, S.; Egawa, T.; Sano, Y.; Baskar, K.

2005-01-01

AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs) were fabricated with plasma enhanced chemical vapor deposited silicon oxy-nitride (SiON) as an insulating layer. The compositions of SiON thin films were confirmed using X-ray photoelectron spectroscopy. The fabricated MOSHEMTs exhibited a very high saturation current density of 1.1 A/mm coupled with high positive operational gate voltage up to +7 V. The MOSHEMTs also exhibited four orders of low gate leakage current and high forward-on voltage when compared with the conventional HEMTs. The drain current collapse using gate pulse measurements showed only a negligible difference in the saturation current density revealing the drastic improvement in passivation of the surface states due to the high quality of dielectric thin films deposited. Thus, based on the improved direct-current operation, SiON can be considered to be a potential gate oxide comparable with other dielectric insulators

Plasma nitridation optimization for sub-15 A gate dielectrics

NARCIS (Netherlands)

Cubaynes, F.N; Schmitz, Jurriaan; van der Marel, C.; Snijders, J.H.M.; Veloso, A.; Rothschild, A.; Olsen, C.; Date, L.

The work investigates the impact of plasma nitridation process parameters upon the physical properties and upon the electrical performance of sub-15 A plasma nitrided gate dielectrics. The nitrogen distribution and chemical bonding of ultra-thin plasma nitrided films have been investigated using

Native oxidation of ultra high purity Cu bulk and thin films

International Nuclear Information System (INIS)

Iijima, J.; Lim, J.-W.; Hong, S.-H.; Suzuki, S.; Mimura, K.; Isshiki, M.

2006-01-01

The effect of microstructure and purity on the native oxidation of Cu was studied by using angle-resolved X-ray photoelectron spectroscopy (AR-XPS) and spectroscopic ellipsometry (SE). A high quality copper film prepared by ion beam deposition under a substrate bias voltage of -50 V (IBD Cu film at V s = -50 V) showed an oxidation resistance as high as an ultra high purity copper (UHP Cu) bulk, whereas a Cu film deposited without substrate bias voltage (IBD Cu film at V s = 0 V) showed lower oxidation resistance. The growth of Cu 2 O layer on the UHP Cu bulk and both types of the films obeyed in principle a logarithmic rate law. However, the growth of oxide layer on the IBD Cu films at V s = 0 and -50 V deviated upward from the logarithmic rate law after the exposure time of 320 and 800 h, respectively. The deviation from the logarithmic law is due to the formation of CuO on the Cu 2 O layer after a critical time

Ion beam-based characterization of multicomponent oxide thin films and thin film layered structures

International Nuclear Information System (INIS)

Krauss, A.R.; Rangaswamy, M.; Lin, Yuping; Gruen, D.M.; Schultz, J.A.; Schmidt, H.K.; Chang, R.P.H.

1992-01-01

Fabrication of thin film layered structures of multi-component materials such as high temperature superconductors, ferroelectric and electro-optic materials, and alloy semiconductors, and the development of hybrid materials requires understanding of film growth and interface properties. For High Temperature Superconductors, the superconducting coherence length is extremely short (5--15 Angstrom), and fabrication of reliable devices will require control of film properties at extremely sharp interfaces; it will be necessary to verify the integrity of thin layers and layered structure devices over thicknesses comparable to the atomic layer spacing. Analytical techniques which probe the first 1--2 atomic layers are therefore necessary for in-situ characterization of relevant thin film growth processes. However, most surface-analytical techniques are sensitive to a region within 10--40 Angstrom of the surface and are physically incompatible with thin film deposition and are typically restricted to ultra high vacuum conditions. A review of ion beam-based analytical methods for the characterization of thin film and multi-layered thin film structures incorporating layers of multicomponent oxides is presented. Particular attention will be paid to the use of time-of-flight techniques based on the use of 1- 15 key ion beams which show potential for use as nondestructive, real-time, in-situ surface diagnostics for the growth of multicomponent metal and metal oxide thin films

SWNT array resonant gate MOS transistor

Energy Technology Data Exchange (ETDEWEB)

Arun, A; Salet, P; Ionescu, A M [NanoLab, Ecole Polytechnique Federale de Lausanne, CH-1015, Lausanne (Switzerland); Campidelli, S; Filoramo, A; Derycke, V; Goffman, M F, E-mail: marcelo.goffman@cea.fr [Laboratoire d' Electronique Moleculaire, SPEC (CNRS URA 2454), IRAMIS, CEA, Gif-sur-Yvette (France)

2011-02-04

We show that thin horizontal arrays of single wall carbon nanotubes (SWNTs) suspended above the channel of silicon MOSFETs can be used as vibrating gate electrodes. This new class of nano-electromechanical system (NEMS) combines the unique mechanical and electronic properties of SWNTs with an integrated silicon-based motion detection. Its electrical response exhibits a clear signature of the mechanical resonance of SWNT arrays (120-150 MHz) showing that these thin horizontal arrays behave as a cohesive, rigid and elastic body membrane with a Young's modulus in the order of 1-10 GPa and ultra-low mass. The resonant frequency can be tuned by the gate voltage and its dependence is well understood within the continuum mechanics framework.

Effect of top gate bias on photocurrent and negative bias illumination stress instability in dual gate amorphous indium-gallium-zinc oxide thin-film transistor

Energy Technology Data Exchange (ETDEWEB)

Lee, Eunji; Chowdhury, Md Delwar Hossain; Park, Min Sang; Jang, Jin, E-mail: jjang@khu.ac.kr [Advanced Display Research Center and Department of Information Display, Kyung Hee University, Seoul 130-701 (Korea, Republic of)

2015-12-07

We have studied the effect of top gate bias (V{sub TG}) on the generation of photocurrent and the decay of photocurrent for back channel etched inverted staggered dual gate structure amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film-transistors. Upon 5 min of exposure of 365 nm wavelength and 0.7 mW/cm{sup 2} intensity light with negative bottom gate bias, the maximum photocurrent increases from 3.29 to 322 pA with increasing the V{sub TG} from −15 to +15 V. By changing V{sub TG} from negative to positive, the Fermi level (E{sub F}) shifts toward conduction band edge (E{sub C}), which substantially controls the conversion of neutral vacancy to charged one (V{sub O} → V{sub O}{sup +}/V{sub O}{sup 2+} + e{sup −}/2e{sup −}), peroxide (O{sub 2}{sup 2−}) formation or conversion of ionized interstitial (O{sub i}{sup 2−}) to neutral interstitial (O{sub i}), thus electron concentration at conduction band. With increasing the exposure time, more carriers are generated, and thus, maximum photocurrent increases until being saturated. After negative bias illumination stress, the transfer curve shows −2.7 V shift at V{sub TG} = −15 V, which gradually decreases to −0.42 V shift at V{sub TG} = +15 V. It clearly reveals that the position of electron quasi-Fermi level controls the formation of donor defects (V{sub O}{sup +}/V{sub O}{sup 2+}/O{sub 2}{sup 2−}/O{sub i}) and/or hole trapping in the a-IGZO /interfaces.

Ultra thin metallic coatings to control near field radiative heat transfer

Science.gov (United States)

Esquivel-Sirvent, R.

2016-09-01

We present a theoretical calculation of the changes in the near field radiative heat transfer between two surfaces due to the presence of ultra thin metallic coatings on semiconductors. Depending on the substrates, the radiative heat transfer is modulated by the thickness of the ultra thin film. In particular we consider gold thin films with thicknesses varying from 4 to 20 nm. The ultra-thin film has an insulator-conductor transition close to a critical thickness of dc = 6.4 nm and there is an increase in the near field spectral heat transfer just before the percolation transition. Depending on the substrates (Si or SiC) and the thickness of the metallic coatings we show how the near field heat transfer can be increased or decreased as a function of the metallic coating thickness. The calculations are based on available experimental data for the optical properties of ultrathin coatings.

High-performance a-IGZO thin-film transistor with conductive indium-tin-oxide buried layer

Science.gov (United States)

Ahn, Min-Ju; Cho, Won-Ju

2017-10-01

In this study, we fabricated top-contact top-gate (TCTG) structure of amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with a thin buried conductive indium-tin oxide (ITO) layer. The electrical performance of a-IGZO TFTs was improved by inserting an ITO buried layer under the IGZO channel. Also, the effect of the buried layer's length on the electrical characteristics of a-IGZO TFTs was investigated. The electrical performance of the transistors improved with increasing the buried layer's length: a large on/off current ratio of 1.1×107, a high field-effect mobility of 35.6 cm2/Vs, a small subthreshold slope of 116.1 mV/dec, and a low interface trap density of 4.2×1011 cm-2eV-1 were obtained. The buried layer a-IGZO TFTs exhibited enhanced transistor performance and excellent stability against the gate bias stress.

Nonvolatile memory thin-film transistors using biodegradable chicken albumen gate insulator and oxide semiconductor channel on eco-friendly paper substrate.

Science.gov (United States)

Kim, So-Jung; Jeon, Da-Bin; Park, Jung-Ho; Ryu, Min-Ki; Yang, Jong-Heon; Hwang, Chi-Sun; Kim, Gi-Heon; Yoon, Sung-Min

2015-03-04

Nonvolatile memory thin-film transistors (TFTs) fabricated on paper substrates were proposed as one of the eco-friendly electronic devices. The gate stack was composed of chicken albumen gate insulator and In-Ga-Zn-O semiconducting channel layers. All the fabrication processes were performed below 120 °C. To improve the process compatibility of the synthethic paper substrate, an Al2O3 thin film was introduced as adhesion and barrier layers by atomic layer deposition. The dielectric properties of biomaterial albumen gate insulator were also enhanced by the preparation of Al2O3 capping layer. The nonvolatile bistabilities were realized by the switching phenomena of residual polarization within the albumen thin film. The fabricated device exhibited a counterclockwise hysteresis with a memory window of 11.8 V, high on/off ratio of approximately 1.1 × 10(6), and high saturation mobility (μsat) of 11.5 cm(2)/(V s). Furthermore, these device characteristics were not markedly degraded even after the delamination and under the bending situration. When the curvature radius was set as 5.3 cm, the ION/IOFF ratio and μsat were obtained to be 5.9 × 10(6) and 7.9 cm(2)/(V s), respectively.

Study on influences of TiN capping layer on time-dependent dielectric breakdown characteristic of ultra-thin EOT high- k metal gate NMOSFET with kMC TDDB simulations

International Nuclear Information System (INIS)

Xu Hao; Yang Hong; Luo Wei-Chun; Xu Ye-Feng; Wang Yan-Rong; Tang Bo; Wang Wen-Wu; Qi Lu-Wei; Li Jun-Feng; Yan Jiang; Zhu Hui-Long; Zhao Chao; Chen Da-Peng; Ye Tian-Chun

2016-01-01

The thickness effect of the TiN capping layer on the time dependent dielectric breakdown (TDDB) characteristic of ultra-thin EOT high- k metal gate NMOSFET is investigated in this paper. Based on experimental results, it is found that the device with a thicker TiN layer has a more promising reliability characteristic than that with a thinner TiN layer. From the charge pumping measurement and secondary ion mass spectroscopy (SIMS) analysis, it is indicated that the sample with the thicker TiN layer introduces more Cl passivation at the IL/Si interface and exhibits a lower interface trap density. In addition, the influences of interface and bulk trap density ratio N it / N ot are studied by TDDB simulations through combining percolation theory and the kinetic Monte Carlo (kMC) method. The lifetime reduction and Weibull slope lowering are explained by interface trap effects for TiN capping layers with different thicknesses. (paper)

The strength limits of ultra-thin copper films

Energy Technology Data Exchange (ETDEWEB)

Wiederhirn, Guillaume

2007-07-02

Elucidating size effects in ultra-thin films is essential to ensure the performance and reliability of MEMS and electronic devices. In this dissertation, the influence of a capping layer on the mechanical behavior of copper (Cu) films was analyzed. Passivation is expected to shut down surface diffusion and thus to alter the contributions of dislocation- and diffusion-based plasticity in thin films. Experiments were carried out on 25 nm to 2 {mu}m thick Cu films magnetron-sputtered onto amorphous-silicon nitride coated silicon (111) substrates. These films were capped with 10 nm of aluminum oxide or silicon nitride passivation without breaking vacuum either directly after Cu deposition or after a 500 C anneal. The evolution of thermal stresses in these films was investigated mainly by the substrate curvature method between -160 C and 500 C. Negligible differences were detected for the silicon nitride vs. the aluminum oxide passivated Cu films. The processing parameters associated with the passivation deposition also had no noticeable effect on the stress-temperature behavior of the Cu. However, the thermomechanical behavior of passivated Cu films strongly depended on the Cu film thickness. For films in the micrometer range, the influence of the passivation layer was not significant, which suggests that the Cu deformed mainly by dislocation plasticity. However, diffusional creep plays an increasing role with decreasing film thickness since it becomes increasingly difficult to nucleate dislocations in smaller grains. Size effects were investigated by plotting the stress at room temperature after thermal cycling as a function of the inverse film thickness. Between 2 {mu}m and 200 nm, the room temperature stress was inversely proportional to the film thickness. The passivation exerted a strong effect on Cu films thinner than 100 nm by effectively shutting down surface diffusion mechanisms. Since dislocation processes were also shut off in these ultra-thin films, they

Electrical Performance and Reliability Improvement of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors with HfO2 Gate Dielectrics by CF4 Plasma Treatment

Science.gov (United States)

Fan, Ching-Lin; Tseng, Fan-Ping; Tseng, Chiao-Yuan

2018-01-01

In this work, amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) with a HfO2 gate insulator and CF4 plasma treatment was demonstrated for the first time. Through the plasma treatment, both the electrical performance and reliability of the a-IGZO TFT with HfO2 gate dielectric were improved. The carrier mobility significantly increased by 80.8%, from 30.2 cm2/V∙s (without treatment) to 54.6 cm2/V∙s (with CF4 plasma treatment), which is due to the incorporated fluorine not only providing an extra electron to the IGZO, but also passivating the interface trap density. In addition, the reliability of the a-IGZO TFT with HfO2 gate dielectric has also been improved by the CF4 plasma treatment. By applying the CF4 plasma treatment to the a-IGZO TFT, the hysteresis effect of the device has been improved and the device’s immunity against moisture from the ambient atmosphere has been enhanced. It is believed that the CF4 plasma treatment not only significantly improves the electrical performance of a-IGZO TFT with HfO2 gate dielectric, but also enhances the device’s reliability. PMID:29772767

Electrical Performance and Reliability Improvement of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors with HfO2 Gate Dielectrics by CF4 Plasma Treatment

Directory of Open Access Journals (Sweden)

Ching-Lin Fan

2018-05-01

Full Text Available In this work, amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs with a HfO2 gate insulator and CF4 plasma treatment was demonstrated for the first time. Through the plasma treatment, both the electrical performance and reliability of the a-IGZO TFT with HfO2 gate dielectric were improved. The carrier mobility significantly increased by 80.8%, from 30.2 cm2/V∙s (without treatment to 54.6 cm2/V∙s (with CF4 plasma treatment, which is due to the incorporated fluorine not only providing an extra electron to the IGZO, but also passivating the interface trap density. In addition, the reliability of the a-IGZO TFT with HfO2 gate dielectric has also been improved by the CF4 plasma treatment. By applying the CF4 plasma treatment to the a-IGZO TFT, the hysteresis effect of the device has been improved and the device’s immunity against moisture from the ambient atmosphere has been enhanced. It is believed that the CF4 plasma treatment not only significantly improves the electrical performance of a-IGZO TFT with HfO2 gate dielectric, but also enhances the device’s reliability.

Ultra-fine metal gate operated graphene optical intensity modulator

Science.gov (United States)

Kou, Rai; Hori, Yosuke; Tsuchizawa, Tai; Warabi, Kaori; Kobayashi, Yuzuki; Harada, Yuichi; Hibino, Hiroki; Yamamoto, Tsuyoshi; Nakajima, Hirochika; Yamada, Koji

2016-12-01

A graphene based top-gate optical modulator on a standard silicon photonic platform is proposed for the future optical telecommunication networks. On the basis of the device simulation, we proposed that an electro-absorption light modulation can be realized by an ultra-narrow metal top-gate electrode (width less than 400 nm) directly located on the top of a silicon wire waveguide. The designed structure also provides excellent features such as carrier doping and waveguide-planarization free fabrication processes. In terms of the fabrication, we established transferring of a CVD-grown mono-layer graphene sheet onto a CMOS compatible silicon photonic sample followed by a 25-nm thick ALD-grown Al2O3 deposition and Source-Gate-Drain electrodes formation. In addition, a pair of low-loss spot-size converter for the input and output area is integrated for the efficient light source coupling. The maximum modulation depth of over 30% (1.2 dB) is observed at a device length of 50 μm, and a metal width of 300 nm. The influence of the initial Fermi energy obtained by experiment on the modulation performance is discussed with simulation results.

An analytical gate tunneling current model for MOSFETs

Energy Technology Data Exchange (ETDEWEB)

Kazerouni, Iman Abaspur, E-mail: imanabaspur@gmail.com; Hosseini, Seyed Ebrahim [Sabzevar Tarbiat Moallem University, Electrical and Computer Department (Iran, Islamic Republic of)

2012-03-15

Gate tunneling current of MOSFETs is an important factor in modeling ultra small devices. In this paper, gate tunneling in present-generation MOSFETs is studied. In the proposed model, we calculate the electron wave function at the semiconductor-oxide interface and inversion charge by treating the inversion layer as a potential well, including some simplifying assumptions. Then we compute the gate tunneling current using the calculated wave function. The proposed model results have an excellent agreement with experimental results in the literature.

Investigations on MGy ionizing dose effects in thin oxides of micro-electronic devices

Energy Technology Data Exchange (ETDEWEB)

Gaillardin, M.; Paillet, P.; Raine, M.; Martinez, M.; Marcandella, C.; Duhamel, O.; Richard, N.; Leray, J.L. [CEA, DAM, DIF, F-91297 Arpajon (France); Goiffon, V.; Corbiere, F.; Rolando, S.; Molina, R.; Magnan, P. [ISAE, Universite de Toulouse, 10 avenue Edouard Belin, BP 54032, 31055 Toulouse Cedex 4 (France); Girard, S.; Ouerdane, Y.; Boukenter, A. [Universite de Saint-Etienne, Laboratoire H. Curien, UMR-5516, 42000, Saint-Etienne (France)

2015-07-01

Total ionizing dose (TID) effects have been studied for a long time in micro-electronic components designed to operate in natural and artificial environments. In most cases, TID induces both charge trapping in the bulk of irradiated oxides and the buildup of interface traps located at semiconductor/dielectric interfaces. Such effects result from basic mechanisms driven by both the shape of the electric field which stands into the oxide and by fabrication process parameters inducing pre-existing traps in the oxide's bulk. From the pioneering studies based on 'thick' oxide technologies to the most recent ones dedicated to innovative technologies, most studies concluded that the impact of total ionizing dose effects reduces with the oxide thinning. This is specifically the case for the gate-oxide of Metal-Oxide-Semiconductor Field Effect Transistors (MOSFET) for which it is generally considered that TID is not a major issue anymore at kGy dose ranges. TID effects are now mainly due to charge trapping in the field oxides such as Shallow Trench Isolation. This creates either parasitic conduction paths or Radiation-Induced Narrow Channel Effects (RINCE). Static current-voltage (I-V) electrical characteristics are then modified through a significant increase of the off-current of NMOS transistors or by shifting the whole I-V curves (of both NMOS and PMOS transistors). Based on these assumptions, no significant shift of I-V curves should be observed in modern bulk CMOS technologies. However, such phenomenon may not be directly extrapolated to higher TID ranges, typically of several MGy for which only few data are available in the literature. This paper presents evidences of large threshold voltage shifts measured at MGy dose levels despite the fact that transistors are designed in a submicron bulk technology which features a 7-nm thin gate-oxide on GO2 transistors dedicated to mixed analog/digital integrated circuits. Such electrical shifts are encountered

Investigations on MGy ionizing dose effects in thin oxides of micro-electronic devices

International Nuclear Information System (INIS)

Gaillardin, M.; Paillet, P.; Raine, M.; Martinez, M.; Marcandella, C.; Duhamel, O.; Richard, N.; Leray, J.L.; Goiffon, V.; Corbiere, F.; Rolando, S.; Molina, R.; Magnan, P.; Girard, S.; Ouerdane, Y.; Boukenter, A.

2015-01-01

Total ionizing dose (TID) effects have been studied for a long time in micro-electronic components designed to operate in natural and artificial environments. In most cases, TID induces both charge trapping in the bulk of irradiated oxides and the buildup of interface traps located at semiconductor/dielectric interfaces. Such effects result from basic mechanisms driven by both the shape of the electric field which stands into the oxide and by fabrication process parameters inducing pre-existing traps in the oxide's bulk. From the pioneering studies based on 'thick' oxide technologies to the most recent ones dedicated to innovative technologies, most studies concluded that the impact of total ionizing dose effects reduces with the oxide thinning. This is specifically the case for the gate-oxide of Metal-Oxide-Semiconductor Field Effect Transistors (MOSFET) for which it is generally considered that TID is not a major issue anymore at kGy dose ranges. TID effects are now mainly due to charge trapping in the field oxides such as Shallow Trench Isolation. This creates either parasitic conduction paths or Radiation-Induced Narrow Channel Effects (RINCE). Static current-voltage (I-V) electrical characteristics are then modified through a significant increase of the off-current of NMOS transistors or by shifting the whole I-V curves (of both NMOS and PMOS transistors). Based on these assumptions, no significant shift of I-V curves should be observed in modern bulk CMOS technologies. However, such phenomenon may not be directly extrapolated to higher TID ranges, typically of several MGy for which only few data are available in the literature. This paper presents evidences of large threshold voltage shifts measured at MGy dose levels despite the fact that transistors are designed in a submicron bulk technology which features a 7-nm thin gate-oxide on GO2 transistors dedicated to mixed analog/digital integrated circuits. Such electrical shifts are encountered

The gate oxide integrity of CVD tungsten polycide

International Nuclear Information System (INIS)

Wu, N.W.; Su, W.D.; Chang, S.W.; Tseng, M.F.

1988-01-01

CVD tungsten polycide has been demonstrated as a good gate material in recent very large scale integration (VLSI) technology. CVD tungsten silicide offers advantages of low resistivity, high temperature stability and good step coverage. On the other hand, the polysilicon underlayer preserves most characteristics of the polysilicon gate and acts as a stress buffer layer to absorb part of the thermal stress origin from the large thermal expansion coefficient of tungsten silicide. Nevertheless, the gate oxide of CVD tungsten polycide is less stable or reliable than that of polysilicon gate. In this paper, the gate oxide integrity of CVD tungsten polycide with various thickness combinations and different thermal processes have been analyzed by several electrical measurements including breakdown yield, breakdown fluence, room temperature TDDB, I-V characteristics, electron traps and interface state density

Molecular doping for control of gate bias stress in organic thin film transistors

Energy Technology Data Exchange (ETDEWEB)

Hein, Moritz P., E-mail: hein@iapp.de; Lüssem, Björn; Jankowski, Jens; Tietze, Max L.; Riede, Moritz K. [Institut für Angewandte Photophysik, Technische Universität Dresden, George-Bähr-Straße 1, 01069 Dresden (Germany); Zakhidov, Alexander A. [Fraunhofer COMEDD, Maria-Reiche-Str. 2, 01109 Dresden (Germany); Leo, Karl [Institut für Angewandte Photophysik, Technische Universität Dresden, George-Bähr-Straße 1, 01069 Dresden (Germany); Fraunhofer COMEDD, Maria-Reiche-Str. 2, 01109 Dresden (Germany)

2014-01-06

The key active devices of future organic electronic circuits are organic thin film transistors (OTFTs). Reliability of OTFTs remains one of the most challenging obstacles to be overcome for broad commercial applications. In particular, bias stress was identified as the key instability under operation for numerous OTFT devices and interfaces. Despite a multitude of experimental observations, a comprehensive mechanism describing this behavior is still missing. Furthermore, controlled methods to overcome these instabilities are so far lacking. Here, we present the approach to control and significantly alleviate the bias stress effect by using molecular doping at low concentrations. For pentacene and silicon oxide as gate oxide, we are able to reduce the time constant of degradation by three orders of magnitude. The effect of molecular doping on the bias stress behavior is explained in terms of the shift of Fermi Level and, thus, exponentially reduced proton generation at the pentacene/oxide interface.

Molecular doping for control of gate bias stress in organic thin film transistors

International Nuclear Information System (INIS)

Hein, Moritz P.; Lüssem, Björn; Jankowski, Jens; Tietze, Max L.; Riede, Moritz K.; Zakhidov, Alexander A.; Leo, Karl

2014-01-01

The key active devices of future organic electronic circuits are organic thin film transistors (OTFTs). Reliability of OTFTs remains one of the most challenging obstacles to be overcome for broad commercial applications. In particular, bias stress was identified as the key instability under operation for numerous OTFT devices and interfaces. Despite a multitude of experimental observations, a comprehensive mechanism describing this behavior is still missing. Furthermore, controlled methods to overcome these instabilities are so far lacking. Here, we present the approach to control and significantly alleviate the bias stress effect by using molecular doping at low concentrations. For pentacene and silicon oxide as gate oxide, we are able to reduce the time constant of degradation by three orders of magnitude. The effect of molecular doping on the bias stress behavior is explained in terms of the shift of Fermi Level and, thus, exponentially reduced proton generation at the pentacene/oxide interface

Nanometric thin film membranes manufactured on square meter scale: ultra-thin films for CO 2 capture

KAUST Repository

Yave, Wilfredo

2010-09-01

Miniaturization and manipulation of materials at nanometer scale are key challenges in nanoscience and nanotechnology. In membrane science and technology, the fabrication of ultra-thin polymer films (defect-free) on square meter scale with uniform thickness (<100 nm) is crucial. By using a tailor-made polymer and by controlling the nanofabrication conditions, we developed and manufactured defect-free ultra-thin film membranes with unmatched carbon dioxide permeances, i.e. >5 m3 (STP) m-2 h -1 bar-1. The permeances are extremely high, because the membranes are made from a CO2 philic polymer material and they are only a few tens of nanometers thin. Thus, these thin film membranes have potential application in the treatment of large gas streams under low pressure like, e.g., carbon dioxide separation from flue gas. © 2010 IOP Publishing Ltd.

Drying Temperature Dependence of Sol-gel Spin Coated Bilayer Composite ZnO/TiO2 Thin Films for Extended Gate Field Effect Transistor pH Sensor

Science.gov (United States)

Rahman, R. A.; Zulkefle, M. A.; Yusoff, K. A.; Abdullah, W. F. H.; Rusop, M.; Herman, S. H.

2018-03-01

This study presents an investigation on zinc oxide (ZnO) and titanium dioxide (TiO2) bilayer film applied as the sensing membrane for extended-gate field effect transistor (EGFET) for pH sensing application. The influences of the drying temperatures on the pH sensing capability of ZnO/TiO2 were investigated. The sensing performance of the thin films were measured by connecting the thin film to a commercial MOSFET to form the extended gates. By varying the drying temperature, we found that the ZnO/TiO2 thin film dried at 150°C gave the highest sensitivity compared to other drying conditions, with the sensitivity value of 48.80 mV/pH.

Organic photovoltaics using thin gold film as an alternative anode to indium tin oxide

International Nuclear Information System (INIS)

Haldar, Amrita; Yambem, Soniya D.; Liao, Kang-Shyang; Alley, Nigel J.; Dillon, Eoghan P.; Barron, Andrew R.; Curran, Seamus A.

2011-01-01

Indium Tin Oxide (ITO) is the most commonly used anode as a transparent electrode and more recently as an anode for organic photovoltaics (OPVs). However, there are significant drawbacks in using ITO which include high material costs, mechanical instability including brittleness and poor electrical properties which limit its use in low-cost flexible devices. We present initial results of poly(3-hexylthiophene): phenyl-C 61 -butyric acid methyl ester OPVs showing that an efficiency of 1.9% (short-circuit current 7.01 mA/cm 2 , open-circuit voltage 0.55 V, fill factor 0.49) can be attained using an ultra thin film of gold coated glass as the device anode. The initial I-V characteristics demonstrate that using high work function metals when the thin film is kept ultra thin can be used as a replacement to ITO due to their greater stability and better morphological control.

Electroresistance effect in gold thin film induced by ionic-liquid-gated electric double layer

International Nuclear Information System (INIS)

Nakayama, Hiroyasu; Ohtani, Takashi; Fujikawa, Yasunori; Ando, Kazuya; Saitoh, Eiji; Ye, Jianting; Iwasa, Yoshihiro

2012-01-01

Electroresistance effect was detected in a metallic thin film using ionic-liquid-gated electric-double-layer transistors (EDLTs). We observed reversible modulation of the electric resistance of a Au thin film. In this system, we found that an electric double layer works as a nanogap capacitor with 27 (-25) MV cm -1 of electric field by applying only 1.7 V of positive (negative) gate voltage. The experimental results indicate that the ionic-liquid-gated EDLT technique can be used for controlling the surface electronic states on metallic systems. (author)

Impact of ultra-thin Al2O3-y layers on TiO2-x ReRAM switching characteristics

Science.gov (United States)

Trapatseli, Maria; Cortese, Simone; Serb, Alexander; Khiat, Ali; Prodromakis, Themistoklis

2017-05-01

Transition metal-oxide resistive random access memory devices have demonstrated excellent performance in switching speed, versatility of switching and low-power operation. However, this technology still faces challenges like poor cycling endurance, degradation due to high electroforming (EF) switching voltages and low yields. Approaches such as engineering of the active layer by doping or addition of thin oxide buffer layers have been often adopted to tackle these problems. Here, we have followed a strategy that combines the two; we have used ultra-thin Al2O3-y buffer layers incorporated between TiO2-x thin films taking into account both 3+/4+ oxidation states of Al/Ti cations. Our devices were tested by DC and pulsed voltage sweeping and in both cases demonstrated improved switching voltages. We believe that the Al2O3-y layers act as reservoirs of oxygen vacancies which are injected during EF, facilitate a filamentary switching mechanism and provide enhanced filament stability, as shown by the cycling endurance measurements.

Study of neural cells on organic semiconductor ultra thin films

Energy Technology Data Exchange (ETDEWEB)

Bystrenova, Eva; Tonazzini, Ilaria; Stoliar, Pablo; Greco, Pierpaolo; Lazar, Adina; Dutta, Soumya; Dionigi, Chiara; Cacace, Marcello; Biscarini, Fabio [ISMN-CNR, Bologna (Italy); Jelitai, Marta; Madarasz, Emilia [IEM- HAS, Budapest (Hungary); Huth, Martin; Nickel, Bert [LMU, Munich (Germany); Martini, Claudia [Dept. PNPB, Univ. of Pisa (Italy)

2008-07-01

Many technological advances are currently being developed for nano-fabrication, offering the ability to create and control patterns of soft materials. We report the deposition of cells on organic semiconductor ultra-thin films. This is a first step towards the development of active bio/non bio systems for electrical transduction. Thin films of pentacene, whose thickness was systematically varied, were grown by high vacuum sublimation. We report adhesion, growth, and differentiation of human astroglial cells and mouse neural stem cells on an organic semiconductor. Viability of astroglial cells in time was measured as a function of the roughness and the characteristic morphology of ultra thin organic film, as well as the features of the patterned molecules. Optical fluorescence microscope coupled to atomic force microscope was used to monitor the presence, density and shape of deposited cells. Neural stem cells remain viable, differentiate by retinoic acid and form dense neuronal networks. We have shown the possibility to integrate living neural cells on organic semiconductor thin films.

Mechanical and electrical properties of ultra-thin chips and flexible electronics assemblies during bending

NARCIS (Netherlands)

Van Den Ende, D.A.; Van De Wiel, H.J.; Kusters, R.H.L.; Sridhar, A.; Schram, J.F.M.; Cauwe, M.; Van Den Brand, J.

2014-01-01

Ultra-thin chips of less than 20 μm become flexible, allowing integration of silicon IC technology with highly flexible electronics such as food packaging sensor systems or healthcare and sport monitoring tags as wearable patches or even directly in clothing textile. The ultra-thin chips in these

Backside versus frontside advanced chemical analysis of high-k/metal gate stacks

Energy Technology Data Exchange (ETDEWEB)

Martinez, E., E-mail: eugenie.martinez@cea.fr [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Saidi, B. [STMicroelectronics, 850 rue Jean Monnet, 38926 Rousset Cedex, Crolles (France); Veillerot, M. [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Caubet, P. [STMicroelectronics, 850 rue Jean Monnet, 38926 Rousset Cedex, Crolles (France); Fabbri, J-M. [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Piallat, F. [STMicroelectronics, 850 rue Jean Monnet, 38926 Rousset Cedex, Crolles (France); Gassilloud, R. [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Schamm-Chardon, S. [CEMES-CNRS et Université de Toulouse, 29 rue Jeanne Marvig, 31055 Toulouse (France)

2015-08-15

Highlights: • The backside approach is a promising solution for advanced chemical characterization of future MOSFETs. • Frontside ToF-SIMS and Auger depth profiles are affected by cumulative mixing effects and thus not relevant for analyzing ultra-thin layers. • Higher in-depth resolution is possible in the backside approach for Auger and ToF-SIMS depth profiling. • Backside depth profiling allows revealing ultra-thin layers and elemental in-depth redistribution inside high-k/metal gate stacks. • Backside XPS allows preserving the full metal gate, thus enabling the analysis of real technological samples. - Abstract: Downscaling of transistors beyond the 14 nm technological node requires the implementation of new architectures and materials. Advanced characterization methods are needed to gain information about the chemical composition of buried layers and interfaces. An effective approach based on backside analysis is presented here. X-ray photoelectron spectroscopy, Auger depth profiling and time-of-flight secondary ions mass spectrometry are combined to investigate inter-diffusion phenomena. To highlight improvements related to the backside method, backside and frontside analyses are compared. Critical information regarding nitrogen, oxygen and aluminium redistribution inside the gate stacks is obtained only in the backside configuration.

Flexible Proton-Gated Oxide Synaptic Transistors on Si Membrane.

Science.gov (United States)

Zhu, Li Qiang; Wan, Chang Jin; Gao, Ping Qi; Liu, Yang Hui; Xiao, Hui; Ye, Ji Chun; Wan, Qing

2016-08-24

Ion-conducting materials have received considerable attention for their applications in fuel cells, electrochemical devices, and sensors. Here, flexible indium zinc oxide (InZnO) synaptic transistors with multiple presynaptic inputs gated by proton-conducting phosphorosilicate glass-based electrolyte films are fabricated on ultrathin Si membranes. Transient characteristics of the proton gated InZnO synaptic transistors are investigated, indicating stable proton-gating behaviors. Short-term synaptic plasticities are mimicked on the proposed proton-gated synaptic transistors. Furthermore, synaptic integration regulations are mimicked on the proposed synaptic transistor networks. Spiking logic modulations are realized based on the transition between superlinear and sublinear synaptic integration. The multigates coupled flexible proton-gated oxide synaptic transistors may be interesting for neuroinspired platforms with sophisticated spatiotemporal information processing.

Investigating degradation behavior of hole-trapping effect under static and dynamic gate-bias stress in a dual gate a-InGaZnO thin film transistor with etch stop layer

Energy Technology Data Exchange (ETDEWEB)

Liao, Po-Yung [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang3708@gmail.com [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Taiwan (China); Hsieh, Tien-Yu [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo [Department of Photonics, National Sun Yat-Sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chou, Cheng-Hsu; Chang, Jung-Fang [Product Technology Center, Chimei Innolux Corp., Tainan 741, Taiwan (China)

2016-03-31

The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V{sub T}) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V{sub T} shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V{sub T} shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V{sub T} shift increases with decreasing frequency of the top gate pulses.

Investigating degradation behavior of hole-trapping effect under static and dynamic gate-bias stress in a dual gate a-InGaZnO thin film transistor with etch stop layer

International Nuclear Information System (INIS)

Liao, Po-Yung; Chang, Ting-Chang; Hsieh, Tien-Yu; Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo; Chou, Cheng-Hsu; Chang, Jung-Fang

2016-01-01

The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V T ) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V T shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V T shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V T shift increases with decreasing frequency of the top gate pulses.

Ultra-low damping in lift-off structured yttrium iron garnet thin films

Science.gov (United States)

Krysztofik, A.; Coy, L. E.; Kuświk, P.; Załeski, K.; Głowiński, H.; Dubowik, J.

2017-11-01

We show that using maskless photolithography and the lift-off technique, patterned yttrium iron garnet thin films possessing ultra-low Gilbert damping can be accomplished. The films of 70 nm thickness were grown on (001)-oriented gadolinium gallium garnet by means of pulsed laser deposition, and they exhibit high crystalline quality, low surface roughness, and the effective magnetization of 127 emu/cm3. The Gilbert damping parameter is as low as 5 ×10-4. The obtained structures have well-defined sharp edges which along with good structural and magnetic film properties pave a path in the fabrication of high-quality magnonic circuits and oxide-based spintronic devices.

Reliability assessment of ultra-thin HfO2 films deposited on silicon wafer

International Nuclear Information System (INIS)

Fu, Wei-En; Chang, Chia-Wei; Chang, Yong-Qing; Yao, Chih-Kai; Liao, Jiunn-Der

2012-01-01

Highlights: ► Nano-mechanical properties on annealed ultra-thin HfO 2 film are studied. ► By AFM analysis, hardness of the crystallized HfO 2 film significantly increases. ► By nano-indention, the film hardness increases with less contact stiffness. ► Quality assessment on the annealed ultra-thin films can thus be achieved. - Abstract: Ultra-thin hafnium dioxide (HfO 2 ) is used to replace silicon dioxide to meet the required transistor feature size in advanced semiconductor industry. The process integration compatibility and long-term reliability for the transistors depend on the mechanical performance of ultra-thin HfO 2 films. The criteria of reliability including wear resistance, thermal fatigue, and stress-driven failure rely on film adhesion significantly. The adhesion and variations in mechanical properties induced by thermal annealing of the ultra-thin HfO 2 films deposited on silicon wafers (HfO 2 /SiO 2 /Si) are not fully understood. In this work, the mechanical properties of an atomic layer deposited HfO 2 (nominal thickness ≈10 nm) on a silicon wafer were characterized by the diamond-coated tip of an atomic force microscope and compared with those of annealed samples. The results indicate that the annealing process leads to the formation of crystallized HfO 2 phases for the atomic layer deposited HfO 2 . The HfSi x O y complex formed at the interface between HfO 2 and SiO 2 /Si, where the thermal diffusion of Hf, Si, and O atoms occurred. The annealing process increases the surface hardness of crystallized HfO 2 film and therefore the resistance to nano-scratches. In addition, the annealing process significantly decreases the harmonic contact stiffness (or thereafter eliminate the stress at the interface) and increases the nano-hardness, as measured by vertically sensitive nano-indentation. Quality assessments on as-deposited and annealed HfO 2 films can be thereafter used to estimate the mechanical properties and adhesion of ultra-thin HfO 2

Negative charge induced degradation of PMOSFETs with BF2-implanted p+-poly gate

International Nuclear Information System (INIS)

Lu, C.Y.; Sung, J.M.

1989-01-01

A new degradation phenomenon on thin gate oxide PMOS-FETs with BF 2 implanted p + -poly gate has been demonstrated and investigated. The cause of this type of degradation is a combination of the boron penetration through the gate oxide and charge trap generation due to the presence of fluorine in the gate oxide and some other processing-induced effects. The negative charge-induced degradation other than enhanced boron diffusion has been studied in detail here. The impact of this process-sensitive p + -poly gate structure on deep submicron CMOS process integration has been discussed. (author)

Nano-Photonic Structures for Light Trapping in Ultra-Thin Crystalline Silicon Solar Cells

Directory of Open Access Journals (Sweden)

Prathap Pathi

2017-01-01

Full Text Available Thick wafer-silicon is the dominant solar cell technology. It is of great interest to develop ultra-thin solar cells that can reduce materials usage, but still achieve acceptable performance and high solar absorption. Accordingly, we developed a highly absorbing ultra-thin crystalline Si based solar cell architecture using periodically patterned front and rear dielectric nanocone arrays which provide enhanced light trapping. The rear nanocones are embedded in a silver back reflector. In contrast to previous approaches, we utilize dielectric photonic crystals with a completely flat silicon absorber layer, providing expected high electronic quality and low carrier recombination. This architecture creates a dense mesh of wave-guided modes at near-infrared wavelengths in the absorber layer, generating enhanced absorption. For thin silicon (<2 μm and 750 nm pitch arrays, scattering matrix simulations predict enhancements exceeding 90%. Absorption approaches the Lambertian limit at small thicknesses (<10 μm and is slightly lower (by ~5% at wafer-scale thicknesses. Parasitic losses are ~25% for ultra-thin (2 μm silicon and just 1%–2% for thicker (>100 μm cells. There is potential for 20 μm thick cells to provide 30 mA/cm2 photo-current and >20% efficiency. This architecture has great promise for ultra-thin silicon solar panels with reduced material utilization and enhanced light-trapping.

Improvements in the reliability of a-InGaZnO thin-film transistors with triple stacked gate insulator in flexible electronics applications

Energy Technology Data Exchange (ETDEWEB)

Chen, Hua-Mao [Department of Photonics & Institute of Electro-Optical Engineering, National Chiao Tung University, Hsinchu, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang3708@gmail.com [Department of Physics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Department of Photonics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Taiwan (China); Tai, Ya-Hsiang [Department of Photonics & Institute of Electro-Optical Engineering, National Chiao Tung University, Hsinchu, Taiwan (China); Chen, Kuan-Fu [Department of Physics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Chiang, Hsiao-Cheng [Department of Photonics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Liu, Kuan-Hsien [Department of Electrophysics, National Chiao Tung University, Hsinchu, Taiwan (China); Lee, Chao-Kuei [Department of Photonics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Lin, Wei-Ting; Cheng, Chun-Cheng; Tu, Chun-Hao; Liu, Chu-Yu [Advanced Technology Research Center, AU Optronics Corp, Hsinchu, Taiwan (China)

2015-11-30

This study examined the impact of the low-temperature stacking gate insulator on the gate bias instability of a-InGaZnO thin film transistors in flexible electronics applications. Although the quality of SiN{sub x} at low process/deposition temperature is better than that of SiO{sub x} at similarly low process/deposition temperature, there is still a very large positive threshold voltage (V{sub th}) shift of 9.4 V for devices with a single low-temperature SiN{sub x} gate insulator under positive gate bias stress. However, a suitable oxide–nitride–oxide-stacked gate insulator exhibits a V{sub th} shift of only 0.23 V. This improvement results from the larger band offset and suitable gate insulator thickness that can effectively suppress carrier trapping behavior. - Highlights: • The cause of the bias instability for a low-temperature gate insulator is verified. • A triple-stacked gate insulator was fabricated. • A suitable triple stacked gate insulator shows only 0.23 V threshold voltage shift.

Effect of Coercive Voltage and Charge Injection on Performance of a Ferroelectric-Gate Thin-Film Transistor

Directory of Open Access Journals (Sweden)

P. T. Tue

2013-01-01

Full Text Available We adopted a lanthanum oxide capping layer between semiconducting channel and insulator layers for fabrication of a ferroelectric-gate thin-film transistor memory (FGT which uses solution-processed indium-tin-oxide (ITO and lead-zirconium-titanate (PZT film as a channel layer and a gate insulator, respectively. Good transistor characteristics such as a high “on/off” current ratio, high channel mobility, and a large memory window of 108, 15.0 cm2 V−1 s−1, and 3.5 V were obtained, respectively. Further, a correlation between effective coercive voltage, charge injection effect, and FGT’s memory window was investigated. It is found that the charge injection from the channel to the insulator layer, which occurs at a high electric field, dramatically influences the memory window. The memory window’s enhancement can be explained by a dual effect of the capping layer: (1 a reduction of the charge injection and (2 an increase of effective coercive voltage dropped on the insulator.

Growth Related Carrier Mobility Enhancement of Pentacene Thin-Film Transistors with High-k Oxide Gate Dielectric

International Nuclear Information System (INIS)

Ai-Fang, Yu; Qiong, Qi; Peng, Jiang; Chao, Jiang

2009-01-01

Carrier mobility enhancement from 0.09 to 0.59 cm 2 /Vs is achieved for pentacene-based thin-film transistors (TFTs) by modifying the HfO 2 gate dielectric with a polystyrene (PS) thin film. The improvement of the transistor's performance is found to be strongly related to the initial film morphologies of pentacene on the dielectrics. In contrast to the three-dimensional island-like growth mode on the HfO 2 surface, the Stranski-Krastanov growth mode on the smooth and nonpolar PS/HfO 2 surface is believed to be the origin of the excellent carrier mobility of the TFTs. A large well-connected first monolayer with fewer boundaries is formed via the Stranski–Krastanov growth mode, which facilitates a charge transport parallel to the substrate and promotes higher carrier mobility. (cross-disciplinary physics and related areas of science and technology)

Anomalous degradation behaviors under illuminated gate bias stress in a-Si:H thin film transistor

International Nuclear Information System (INIS)

Tsai, Ming-Yen; Chang, Ting-Chang; Chu, Ann-Kuo; Hsieh, Tien-Yu; Lin, Kun-Yao; Wu, Yi-Chun; Huang, Shih-Feng; Chiang, Cheng-Lung; Chen, Po-Lin; Lai, Tzu-Chieh; Lo, Chang-Cheng; Lien, Alan

2014-01-01

This study investigates the impact of gate bias stress with and without light illumination in a-Si:H thin film transistors. It has been observed that the I–V curve shifts toward the positive direction after negative and positive gate bias stress due to interface state creation at the gate dielectric. However, this study found that threshold voltages shift negatively and that the transconductance curve maxima are anomalously degraded under illuminated positive gate bias stress. In addition, threshold voltages shift positively under illuminated negative gate bias stress. These degradation behaviors can be ascribed to charge trapping in the passivation layer dominating degradation instability and are verified by a double gate a-Si:H device. - Highlights: • There is abnormal V T shift induced by illuminated gate bias stress in a-Si:H thin film transistors. • Electron–hole pair is generated via trap-assisted photoexcitation. • Abnormal transconductance hump is induced by the leakage current from back channel. • Charge trapping in the passivation layer is likely due to the fact that a constant voltage has been applied to the top gate

Highly stable thin film transistors using multilayer channel structure

KAUST Repository

Nayak, Pradipta K.; Wang, Zhenwei; Anjum, Dalaver H.; Hedhili, Mohamed N.; Alshareef, Husam N.

2015-01-01

We report highly stable gate-bias stress performance of thin film transistors (TFTs) using zinc oxide (ZnO)/hafnium oxide (HfO2) multilayer structure as the channel layer. Positive and negative gate-bias stress stability of the TFTs was measured

Ultra-thin lithium micro-batteries. Performances and applications; Microaccumulateurs ultra minces au lithium. Performances et applications

Energy Technology Data Exchange (ETDEWEB)

Martin, M.; Terrat, J.P. [Hydromecanique et frottement (HEF), 42 - Andrezieux Boutheon (France); Levasseur, A.; Vinatier, P.; Meunier, G. [Centre National de la Recherche Scientifique (CNRS), 33 - Talence (France). Institut de Chimie de la Matiere Condensee et Physique de Bordeaux

1996-12-31

This short paper (abstract) describes the characteristics and performances of prototypes of ultra-thin lithium micro-batteries (thickness < 0.2 mm) which can be incorporated into microelectronic circuits. (J.S.)

Ultra-thin lithium micro-batteries. Performances and applications; Microaccumulateurs ultra minces au lithium. Performances et applications

Energy Technology Data Exchange (ETDEWEB)

Martin, M; Terrat, J P [Hydromecanique et frottement (HEF), 42 - Andrezieux Boutheon (France); Levasseur, A; Vinatier, P; Meunier, G [Centre National de la Recherche Scientifique (CNRS), 33 - Talence (France). Institut de Chimie de la Matiere Condensee et Physique de Bordeaux

1997-12-31

This short paper (abstract) describes the characteristics and performances of prototypes of ultra-thin lithium micro-batteries (thickness < 0.2 mm) which can be incorporated into microelectronic circuits. (J.S.)

High Mobility Thin Film Transistors Based on Amorphous Indium Zinc Tin Oxide

Directory of Open Access Journals (Sweden)

Imas Noviyana

2017-06-01

Full Text Available Top-contact bottom-gate thin film transistors (TFTs with zinc-rich indium zinc tin oxide (IZTO active layer were prepared at room temperature by radio frequency magnetron sputtering. Sintered ceramic target was prepared and used for deposition from oxide powder mixture having the molar ratio of In2O3:ZnO:SnO2 = 2:5:1. Annealing treatment was carried out for as-deposited films at various temperatures to investigate its effect on TFT performances. It was found that annealing treatment at 350 °C for 30 min in air atmosphere yielded the best result, with the high field effect mobility value of 34 cm2/Vs and the minimum subthreshold swing value of 0.12 V/dec. All IZTO thin films were amorphous, even after annealing treatment of up to 350 °C.

Pulsed laser deposition of oxide gate dielectrics for pentacene organic field-effect transistors

International Nuclear Information System (INIS)

Yaginuma, S.; Yamaguchi, J.; Itaka, K.; Koinuma, H.

2005-01-01

We have fabricated Al 2 O 3 , LaAlO 3 (LAO), CaHfO 3 (CHO) and CaZrO 3 (CZO) thin films for the dielectric layers of field-effect transistors (FETs) by pulsed laser deposition (PLD). The films exhibited very smooth surfaces with root-mean-squares (rms) roughnesses of ∼1.3 A as evaluated by using atomic force microscopy (AFM). The breakdown electric fields of Al 2 O 3 , LAO, CHO and CZO films were 7, 6, 10 and 2 MV/cm, respectively. The magnitude of the leak current in each film was low enough to operate FET. We performed a comparative study of pentacene FET fabricated using these oxide dielectrics as gate insulators. High field-effect mobility of 1.4 cm 2 /V s and on/off current ratio of 10 7 were obtained in the pentacene FET using LAO gate insulating film. Use of the LAO films as gate dielectrics has been found to suppress the hysteresis of pentacene FET operations. The LAO films are relevant to the dielectric layer of organic FETs

Controllable film densification and interface flatness for high-performance amorphous indium oxide based thin film transistors

Energy Technology Data Exchange (ETDEWEB)

Ou-Yang, Wei, E-mail: OUYANG.Wei@nims.go.jp, E-mail: TSUKAGOSHI.Kazuhito@nims.go.jp; Mitoma, Nobuhiko; Kizu, Takio; Gao, Xu; Lin, Meng-Fang; Tsukagoshi, Kazuhito, E-mail: OUYANG.Wei@nims.go.jp, E-mail: TSUKAGOSHI.Kazuhito@nims.go.jp [International Center for Materials Nanoarchitectronics (WPI-MANA), National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Nabatame, Toshihide [MANA Foundry and MANA Advanced Device Materials Group, National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan)

2014-10-20

To avoid the problem of air sensitive and wet-etched Zn and/or Ga contained amorphous oxide transistors, we propose an alternative amorphous semiconductor of indium silicon tungsten oxide as the channel material for thin film transistors. In this study, we employ the material to reveal the relation between the active thin film and the transistor performance with aid of x-ray reflectivity study. By adjusting the pre-annealing temperature, we find that the film densification and interface flatness between the film and gate insulator are crucial for achieving controllable high-performance transistors. The material and findings in the study are believed helpful for realizing controllable high-performance stable transistors.

Thin film metal-oxides

CERN Document Server

Ramanathan, Shriram

2009-01-01

Presents an account of the fundamental structure-property relations in oxide thin films. This title discusses the functional properties of thin film oxides in the context of applications in the electronics and renewable energy technologies.

Static and low frequency noise characterization of ultra-thin body InAs MOSFETs

Science.gov (United States)

Karatsori, T. A.; Pastorek, M.; Theodorou, C. G.; Fadjie, A.; Wichmann, N.; Desplanque, L.; Wallart, X.; Bollaert, S.; Dimitriadis, C. A.; Ghibaudo, G.

2018-05-01

A complete static and low frequency noise characterization of ultra-thin body InAs MOSFETs is presented. Characterization techniques, such as the well-known Y-function method established for Si MOSFETs, are applied in order to extract the electrical parameters and study the behavior of these research grade devices. Additionally, the Lambert-W function parameter extraction methodology valid from weak to strong inversion is also used in order to verify its applicability in these experimental level devices. Moreover, a low-frequency noise characterization of the UTB InAs MOSFETs is presented, revealing carrier trapping/detrapping in slow oxide traps and remote Coulomb scattering as origin of 1/f noise, which allowed for the extraction of the oxide trap areal density. Finally, Lorentzian-like noise is also observed in the sub-micron area devices and attributed to both Random Telegraph Noise from oxide individual traps and g-r noise from the semiconductor interface.

Rare Earth Oxide Thin Films

CERN Document Server

Fanciulli, Marco

2007-01-01

Thin rare earth (RE) oxide films are emerging materials for microelectronic, nanoelectronic, and spintronic applications. The state-of-the-art of thin film deposition techniques as well as the structural, physical, chemical, and electrical properties of thin RE oxide films and of their interface with semiconducting substrates are discussed. The aim is to identify proper methodologies for the development of RE oxides thin films and to evaluate their effectiveness as innovative materials in different applications.

Gate Engineering in SOI LDMOS for Device Reliability

Directory of Open Access Journals (Sweden)

Aanand

2016-01-01

Full Text Available A linearly graded doping drift region with step gate structure, used for improvement of reduced surface field (RESURF SOI LDMOS transistor performance has been simulated with 0.35µm technology in this paper. The proposed device has one poly gate and double metal gate arranged in a stepped manner, from channel to drift region. The first gate uses n+ poly (near source where as other two gates of aluminium. The first gate with thin gate oxide has good control over the channel charge. The third gate with thick gate oxide at drift region reduce gate to drain capacitance. The arrangement of second and third gates in a stepped manner in drift region spreads the electric field uniformly. Using two dimensional device simulations, the proposed SOI LDMOS is compared with conventional structure and the extended metal structure. We demonstrate that the proposed device exhibits significant enhancement in linearity, breakdown voltage, on-resistance and HCI. Double metal gate reduces the impact ionization area which helps to improve the Hot Carrier Injection effect..

Electrical characteristics of vapor deposited amorphous MoS2 two-terminal structures and back gate thin film transistors with Al, Au, Cu and Ni-Au contacts

International Nuclear Information System (INIS)

Kouvatsos, Dimitrios N.; Papadimitropoulos, Georgios; Spiliotis, Thanassis; Vasilopoulou, Maria; Davazoglou, Dimitrios; Barreca, Davide; Gasparotto, Alberto

2015-01-01

Amorphous molybdenum sulphide (a-MoS 2 ) thin films were deposited at near room temperature on oxidized silicon substrates and were electrically characterized with the use of two-terminal structures and of back-gated thin film transistors utilizing the substrate silicon as gate. Current-voltage characteristics were extracted for various metals used as pads, showing significant current variations attributable to different metal-sulphide interface properties and contact resistances, while the effect of a forming gas anneal was determined. With the use of heavily doped silicon substrates and aluminum backside deposition, thin film transistor (TFT) structures with the a-MoS 2 film as active layer were fabricated and characterized. Transfer characteristics showing a gate field effect, despite a leakage often present, were extracted for these devices, indicating that high mobility devices can be fabricated. SEM and EDXA measurements were also performed in an attempt to clarify issues related to material properties and fabrication procedures, so as to achieve a reliable and optimized a-MoS 2 TFT fabrication process. (copyright 2015 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

High-Performance Ink-Synthesized Cu-Gate Thin-Film Transistor with Diffusion Barrier Formation

Science.gov (United States)

Woo, Whang Je; Nam, Taewook; Oh, Il-Kwon; Maeng, Wanjoo; Kim, Hyungjun

2018-05-01

The improved electrical properties of Cu-gate thin-film transistors (TFTs) using an ink-synthesizing process were studied; this technology enables a low-cost and large area process for the display industry. We investigated the film properties and the effects of the ink-synthesized Cu layer in detail with respect to device characteristics. The mobility and reliability of the devices were significantly improved by applying a diffusion barrier at the interface between the Cu gate and the gate insulator. By using a TaN diffusion barrier layer, considerably improved and stabilized ink-Cu gated TFTs could be realized, comparable to sputtered-Cu gated TFTs under positive bias temperature stress measurements.

High-Performance Ink-Synthesized Cu-Gate Thin-Film Transistor with Diffusion Barrier Formation

Science.gov (United States)

Woo, Whang Je; Nam, Taewook; Oh, Il-Kwon; Maeng, Wanjoo; Kim, Hyungjun

2018-02-01

The improved electrical properties of Cu-gate thin-film transistors (TFTs) using an ink-synthesizing process were studied; this technology enables a low-cost and large area process for the display industry. We investigated the film properties and the effects of the ink-synthesized Cu layer in detail with respect to device characteristics. The mobility and reliability of the devices were significantly improved by applying a diffusion barrier at the interface between the Cu gate and the gate insulator. By using a TaN diffusion barrier layer, considerably improved and stabilized ink-Cu gated TFTs could be realized, comparable to sputtered-Cu gated TFTs under positive bias temperature stress measurements.

Improved integration of ultra-thin high-k dielectrics in few-layer MoS2 FET by remote forming gas plasma pretreatment

Science.gov (United States)

Wang, Xiao; Zhang, Tian-Bao; Yang, Wen; Zhu, Hao; Chen, Lin; Sun, Qing-Qing; Zhang, David Wei

2017-01-01

The effective and high-quality integration of high-k dielectrics on two-dimensional (2D) crystals is essential to the device structure engineering and performance improvement of field-effect transistor (FET) based on the 2D semiconductors. We report a 2D MoS2 transistor with ultra-thin Al2O3 top-gate dielectric (6.1 nm) and extremely low leakage current. Remote forming gas plasma pretreatment was carried out prior to the atomic layer deposition, providing nucleation sites with the physically adsorbed ions on the MoS2 surface. The top gate MoS2 FET exhibited excellent electrical performance, including high on/off current ratio over 109, subthreshold swing of 85 mV/decade and field-effect mobility of 45.03 cm2/V s. Top gate leakage current less than 0.08 pA/μm2 at 4 MV/cm has been obtained, which is the smallest compared with the reported top-gated MoS2 transistors. Such an optimized integration of high-k dielectric in 2D semiconductor FET with enhanced performance is very attractive, and it paves the way towards the realization of more advanced 2D nanoelectronic devices and integrated circuits.

Electroluminescence of organic light-emitting diodes with an ultra-thin layer of dopant

Energy Technology Data Exchange (ETDEWEB)

Li Weizhi [State Key Lab of Electronic Thin Films and Integrated Devices, School of Optoelectronic Information, University of Electronic Science and Technology of China (UESTC), Chengdu 610054 (China); Yu Junsheng [State Key Lab of Electronic Thin Films and Integrated Devices, School of Optoelectronic Information, University of Electronic Science and Technology of China (UESTC), Chengdu 610054 (China)], E-mail: jsyu@uestc.edu.cn; Wang, Tao [State Key Lab of Electronic Thin Films and Integrated Devices, School of Optoelectronic Information, University of Electronic Science and Technology of China (UESTC), Chengdu 610054 (China); Jiang, Yadong [State Key Lab of Electronic Thin Films and Integrated Devices, School of Optoelectronic Information, University of Electronic Science and Technology of China (UESTC), Chengdu 610054 (China)], E-mail: jiangyd@uestc.edu.cn; Wei, Bangxiong [State Key Lab of Electronic Thin Films and Integrated Devices, School of Optoelectronic Information, University of Electronic Science and Technology of China (UESTC), Chengdu 610054 (China)

2008-03-15

Conventional fluorescent dyes, i.e., 4-(dicyanomethylene)-2-t-butyl-6(1,1,7,7-tetramethyljulolidyl-9-enyl)-4H-pyran (DCJTB), 5,12-dihydro-5,12-dimethylquino [2,3-b]acridine-7,14-dione (DMQA) and 5,6,11,12-tetraphenylnaphthacene (Rubrene), were used to investigate the performance of organic light-emitting diodes (OLEDs) based on indium tin oxide (ITO)/N,N'-bis-(1-naphthyl)-N,N'-diphenyl-1,1'-biphenyl-4,4'-diamine (NPB)/tris-(8-hydroxyquinolate)-aluminum (Alq{sub 3})/MgAg. The dyes were either inserted into devices as an ultra-thin film at the NPB/Alq{sub 3} interface by sequential evaporation, or doped into the Alq{sub 3} emission layer by co-evaporation with the doping ratio about 2%. Electroluminescence (EL) spectra of devices indicated that concentration quenching effect (CQE) of the dye-dopant was slightly bigger in the former than in the latter, while the degrees of CQE for three dopants are in the order of DMQA > DCJTB > Rubrene suggested by the difference in EL spectra and performances of devices. In addition, EL process of device with an ultra-thin layer of dopant is dominated by direct carrier trapping (DCT) process due to almost no holes recombine with electrons in Alq{sub 3}-host layer.

Non-ohmic transport behavior in ultra-thin gold films

International Nuclear Information System (INIS)

Alkhatib, A.; Souier, T.; Chiesa, M.

2011-01-01

Highlights: → C-AFM study on ultra-thin gold films. → Connection between ultra-thin film morphology and lateral electrical transport. → Transition between ohmic and non-ohmic behavior. → Electrical transition correlation to the film structure continuity. → Direct and indirect tunneling regimes related to discontinuous structures. - Abstract: Structure and local lateral electrical properties of Au films of thicknesses ranging from 10 to 140 nm are studied using conductive atomic force microscopy. Comparison of current maps taken at different thicknesses reveals surprising highly resistive regions (10 10 -10 11 Ω), the density of which increases strongly at lower thickness. The high resistivity is shown to be directly related to discontinuities in the metal sheet. Local I-V curves are acquired to show the nature of electrical behavior relative to thickness. Results show that in Au films of higher thickness the electrical behavior is ohmic, while it is non-ohmic in highly discontinuous films of lower thickness, with the transition happening between 34 and 39 nm. The non-ohmic behavior is explained with tunneling occurring between separated Au islands. The results explain the abrupt increase of electrical resistivity at lower thin film thicknesses.

Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

International Nuclear Information System (INIS)

Han, Jinhua; Wang, Wei; Ying, Jun; Xie, Wenfa

2014-01-01

An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized

Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

Energy Technology Data Exchange (ETDEWEB)

Han, Jinhua; Wang, Wei, E-mail: wwei99@jlu.edu.cn; Ying, Jun; Xie, Wenfa [State Key Laboratory on Integrated Optoelectronics, College of Electronic Science and Engineering, Jilin University, 2699 Qianjin Street, Changchun 130012 (China)

2014-01-06

An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized.

Ultra Low Voltage Class AB Switched Current Memory Cells Based on Floating Gate Transistors

DEFF Research Database (Denmark)

Mucha, Igor

1999-01-01

current memory cells were designed using a CMOS process with threshold voltages V-T0n = \\V-T0p\\ = 0.9 V for the n- and p-channel devices. Both hand calculations and PSPICE simulations showed that the designed example switched current memory cell allowed a maximum signal range better than +/-18 mu......A proposal for a class AB switched current memory cell, suitable for ultra-low-voltage applications is presented. The proposal employs transistors with floating gates, allowing to build analog building blocks for ultralow supply voltage operation also in CMOS processes with high threshold voltages....... This paper presents the theoretical basis for the design of "floating-gate'' switched current memory cells by giving a detailed description and analysis of the most important impacts degrading the performance of the cells. To support the theoretical assumptions circuits based on "floating-gate'' switched...

Sol–gel deposited ceria thin films as gate dielectric for CMOS ...

Indian Academy of Sciences (India)

Sol–gel deposited ceria thin films as gate dielectric for CMOS technology. ANIL G KHAIRNAR ... The semiconductor roadmap following Moore's law is responsible for ..... The financial support from University Grants Commi- ssion (UGC), New ...

Film-thickness dependence of structure formation in ultra-thin polymer blend films

CERN Document Server

Gutmann, J S; Stamm, M

2002-01-01

We investigated the film-thickness dependence of structure formation in ultra-thin polymer blend films prepared from solution. As a model system we used binary blends of statistical poly(styrene-co-p-bromostyrene) copolymers of different degrees of bromination. Ultra-thin-film samples differing in miscibility and film thickness were prepared via spin coating of common toluene solutions onto silicon (100) substrates. The resulting morphologies were investigated with scanning force microscopy, reflectometry and grazing-incidence scattering techniques using both X-rays and neutrons in order to obtain a picture of the sample structure at and below the sample surface. (orig.)

Influence of Surface Passivation on AlN Barrier Stress and Scattering Mechanism in Ultra-thin AlN/GaN Heterostructure Field-Effect Transistors.

Science.gov (United States)

Lv, Y J; Song, X B; Wang, Y G; Fang, Y L; Feng, Z H

2016-12-01

Ultra-thin AlN/GaN heterostructure field-effect transistors (HFETs) with, and without, SiN passivation were fabricated by the same growth and device processes. Based on the measured DC characteristics, including the capacitance-voltage (C-V) and output current-voltage (I-V) curves, the variation of electron mobility with gate bias was found to be quite different for devices with, and without, SiN passivation. Although the AlN barrier layer is ultra thin (c. 3 nm), it was proved that SiN passivation induces no additional tensile stress and has no significant influence on the piezoelectric polarization of the AlN layer using Hall and Raman measurements. The SiN passivation was found to affect the surface properties, thereby increasing the electron density of the two-dimensional electron gas (2DEG) under the access region. The higher electron density in the access region after SiN passivation enhanced the electrostatic screening for the non-uniform distributed polarization charges, meaning that the polarization Coulomb field scattering has a weaker effect on the electron drift mobility in AlN/GaN-based devices.

Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

International Nuclear Information System (INIS)

Yan-Rong, Cao; Xiao-Hua, Ma; Yue, Hao; Shi-Gang, Hu

2010-01-01

This paper studies the effect of drain bias on ultra-short p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET) degradation during negative bias temperature (NBT) stress. When a relatively large gate voltage is applied, the degradation magnitude is much more than the drain voltage which is the same as the gate voltage supplied, and the time exponent gets larger than that of the NBT instability (NBTI). With decreasing drain voltage, the degradation magnitude and the time exponent all get smaller. At some values of the drain voltage, the degradation magnitude is even smaller than that of NBTI, and when the drain voltage gets small enough, the exhibition of degradation becomes very similar to the NBTI degradation. When a relatively large drain voltage is applied, with decreasing gate voltage, the degradation magnitude gets smaller. However, the time exponent becomes larger. With the help of electric field simulation, this paper concludes that the degradation magnitude is determined by the vertical electric field of the oxide, the amount of hot holes generated by the strong channel lateral electric field at the gate/drain overlap region, and the time exponent is mainly controlled by localized damage caused by the lateral electric field of the oxide in the gate/drain overlap region where hot carriers are produced. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Temporal and voltage stress stability of high performance indium-zinc-oxide thin film transistors

Science.gov (United States)

Song, Yang; Katsman, Alexander; Butcher, Amy L.; Paine, David C.; Zaslavsky, Alexander

2017-10-01

Thin film transistors (TFTs) based on transparent oxide semiconductors, such as indium zinc oxide (IZO), are of interest due to their improved characteristics compared to traditional a-Si TFTs. Previously, we reported on top-gated IZO TFTs with an in-situ formed HfO2 gate insulator and IZO active channel, showing high performance: on/off ratio of ∼107, threshold voltage VT near zero, extracted low-field mobility μ0 = 95 cm2/V·s, and near-perfect subthreshold slope at 62 mV/decade. Since device stability is essential for technological applications, in this paper we report on the temporal and voltage stress stability of IZO TFTs. Our devices exhibit a small negative VT shift as they age, consistent with an increasing carrier density resulting from an increasing oxygen vacancy concentration in the channel. Under gate bias stress, freshly annealed TFTs show a negative VT shift during negative VG gate bias stress, while aged (>1 week) TFTs show a positive VT shift during negative VG stress. This indicates two competing mechanisms, which we identify as the field-enhanced generation of oxygen vacancies and the field-assisted migration of oxygen vacancies, respectively. A simplified kinetic model of the vacancy concentration evolution in the IZO channel under electrical stress is provided.

Role of interlayer coupling in ultra thin MoS2

KAUST Repository

Cheng, Yingchun; Zhu, Zhiyong; Schwingenschlö gl, Udo

2012-01-01

The effects of interlayer coupling on the vibrational and electronic properties of ultra thin MoS 2 were studied by ab initio calculations. For smaller slab thickness, the interlayer distance is significantly elongated because of reduced interlayer

Reliability assessment of ultra-thin HfO{sub 2} films deposited on silicon wafer

Energy Technology Data Exchange (ETDEWEB)

Fu, Wei-En [Center for Measurement Standards, Industrial Technology Research Institute, Room 216, Building 8, 321 Kuang Fu Road Sec. 2, Hsinchu, Taiwan (China); Chang, Chia-Wei [Department of Materials Science and Engineering, National Cheng Kung University, 1 University Road, Tainan 70101, Taiwan (China); Chang, Yong-Qing [Center for Measurement Standards, Industrial Technology Research Institute, Room 216, Building 8, 321 Kuang Fu Road Sec. 2, Hsinchu, Taiwan (China); Yao, Chih-Kai [Department of Materials Science and Engineering, National Cheng Kung University, 1 University Road, Tainan 70101, Taiwan (China); Liao, Jiunn-Der, E-mail: jdliao@mail.ncku.edu.tw [Department of Materials Science and Engineering, National Cheng Kung University, 1 University Road, Tainan 70101, Taiwan (China)

2012-09-01

Highlights: Black-Right-Pointing-Pointer Nano-mechanical properties on annealed ultra-thin HfO{sub 2} film are studied. Black-Right-Pointing-Pointer By AFM analysis, hardness of the crystallized HfO{sub 2} film significantly increases. Black-Right-Pointing-Pointer By nano-indention, the film hardness increases with less contact stiffness. Black-Right-Pointing-Pointer Quality assessment on the annealed ultra-thin films can thus be achieved. - Abstract: Ultra-thin hafnium dioxide (HfO{sub 2}) is used to replace silicon dioxide to meet the required transistor feature size in advanced semiconductor industry. The process integration compatibility and long-term reliability for the transistors depend on the mechanical performance of ultra-thin HfO{sub 2} films. The criteria of reliability including wear resistance, thermal fatigue, and stress-driven failure rely on film adhesion significantly. The adhesion and variations in mechanical properties induced by thermal annealing of the ultra-thin HfO{sub 2} films deposited on silicon wafers (HfO{sub 2}/SiO{sub 2}/Si) are not fully understood. In this work, the mechanical properties of an atomic layer deposited HfO{sub 2} (nominal thickness Almost-Equal-To 10 nm) on a silicon wafer were characterized by the diamond-coated tip of an atomic force microscope and compared with those of annealed samples. The results indicate that the annealing process leads to the formation of crystallized HfO{sub 2} phases for the atomic layer deposited HfO{sub 2}. The HfSi{sub x}O{sub y} complex formed at the interface between HfO{sub 2} and SiO{sub 2}/Si, where the thermal diffusion of Hf, Si, and O atoms occurred. The annealing process increases the surface hardness of crystallized HfO{sub 2} film and therefore the resistance to nano-scratches. In addition, the annealing process significantly decreases the harmonic contact stiffness (or thereafter eliminate the stress at the interface) and increases the nano-hardness, as measured by vertically

Nanometric thin film membranes manufactured on square meter scale: ultra-thin films for CO 2 capture

KAUST Repository

Yave, Wilfredo; Car, Anja; Wind, Jan; Peinemann, Klaus Viktor

2010-01-01

Miniaturization and manipulation of materials at nanometer scale are key challenges in nanoscience and nanotechnology. In membrane science and technology, the fabrication of ultra-thin polymer films (defect-free) on square meter scale with uniform

Transport physics and device modeling of zinc oxide thin-film transistors. Pt. II: Contact Resistance in Short Channel Devices

NARCIS (Netherlands)

Torricelli, F.; Meijboom, J.R.; Smits, E.; Tripathi, A.K.; Gelinck, G.H.; Colalongo, L.; Kovacs-Vajna, Z.M.; Leeuw, D. de; Cantatore, E.

2011-01-01

Abstract—Short-channel zinc oxide (ZnO) thin-film transistors (TFTs) are investigated in a wide range of temperatures and bias conditions. Scaling down the channel length, the TFT performance is seriously affected by contact resistances, which depend on gate voltage and temperature. To account for

Transport physics and device modeling of zinc oxide thin film transistors - part II : contact resistance in short channel devices

NARCIS (Netherlands)

Torricelli, F.; Smits, E.C.P.; Meijboom, J.R.; Tripathi, A.K.; Gelinck, G.H.; Colalongo, L.; Kovacs-Vajna, Z.M.; Cantatore, E.

2011-01-01

Short-channel zinc oxide (ZnO) thin-film transistors (TFTs) are investigated in a wide range of temperatures and bias conditions. Scaling down the channel length, the TFT performance is seriously affected by contact resistances, which depend on gate voltage and temperature. To account for the

Research on precision grinding technology of large scale and ultra thin optics

Science.gov (United States)

Zhou, Lian; Wei, Qiancai; Li, Jie; Chen, Xianhua; Zhang, Qinghua

2018-03-01

The flatness and parallelism error of large scale and ultra thin optics have an important influence on the subsequent polishing efficiency and accuracy. In order to realize the high precision grinding of those ductile elements, the low deformation vacuum chuck was designed first, which was used for clamping the optics with high supporting rigidity in the full aperture. Then the optics was planar grinded under vacuum adsorption. After machining, the vacuum system was turned off. The form error of optics was on-machine measured using displacement sensor after elastic restitution. The flatness would be convergenced with high accuracy by compensation machining, whose trajectories were integrated with the measurement result. For purpose of getting high parallelism, the optics was turned over and compensation grinded using the form error of vacuum chuck. Finally, the grinding experiment of large scale and ultra thin fused silica optics with aperture of 430mm×430mm×10mm was performed. The best P-V flatness of optics was below 3 μm, and parallelism was below 3 ″. This machining technique has applied in batch grinding of large scale and ultra thin optics.

Bias stress instability of double-gate a-IGZO TFTs on polyimide substrate

Science.gov (United States)

Cho, Won-Ju; Ahn, Min-Ju

2017-09-01

In this study, flexible double-gate thin-film transistor (TFT)-based amorphous indium-galliumzinc- oxide (a-IGZO) was fabricated on a polyimide substrate. Double-gate operation with connected front and back gates was compared with a single-gate operation. As a result, the double-gate a- IGZO TFT exhibited enhanced electrical characteristics as well as improved long-term reliability. Under positive- and negative-bias temperature stress, the threshold voltage shift of the double-gate operation was much smaller than that of the single-gate operation.

Electrical dependence on the chemical composition of the gate dielectric in indium gallium zinc oxide thin-film transistors

Energy Technology Data Exchange (ETDEWEB)

Tari, Alireza, E-mail: atari@uwaterloo.ca; Lee, Czang-Ho; Wong, William S. [Department of Electrical and Computer Engineering, University of Waterloo, 200 University Avenue West, Waterloo, Ontario N2L 3G1 (Canada)

2015-07-13

Bottom-gate thin-film transistors were fabricated by depositing a 50 nm InGaZnO (IGZO) channel layer at 150 °C on three separate gate dielectric films: (1) thermal SiO{sub 2}, (2) plasma-enhanced chemical-vapor deposition (PECVD) SiN{sub x}, and (3) a PECVD SiO{sub x}/SiN{sub x} dual-dielectric. X-ray photoelectron and photoluminescence spectroscopy showed the V{sub o} concentration was dependent on the hydrogen concentration of the underlying dielectric film. IGZO films on SiN{sub x} (high V{sub o}) and SiO{sub 2} (low V{sub o}) had the highest and lowest conductivity, respectively. A PECVD SiO{sub x}/SiN{sub x} dual-dielectric layer was effective in suppressing hydrogen diffusion from the nitride layer into the IGZO and resulted in higher resistivity films.

Facing-target sputtering deposition of ZnO films with Pt ultra-thin layers for gas-phase photocatalytic application

International Nuclear Information System (INIS)

Zhang Zhonghai; Hossain, Md. Faruk.; Arakawa, Takuya; Takahashi, Takakazu

2010-01-01

In this paper, various zinc oxide (ZnO) films are deposited by a versatile and effective dc-reactive facing-target sputtering method. The ratios of Ar to O 2 in the mixture gas are varied from 8:2 to 6:4 at a fixed sputtering pressure of 1.0 Pa. X-ray diffraction, spectrophotometer and scanning electron microscope are used to study the crystal structure, optical property and surface morphology of the as-deposited films. The Pt ultra-thin layer, ∼2 nm thick, is deposited on the surface of ZnO film by dc diode sputtering with a mesh mask controlling the coated area. The photocatalytic activity of ZnO films and Pt-ZnO films is evaluated by decomposition of methanol under UV-vis light irradiation. The variation of photocatalytic activity depends on the ratios of Ar to O 2 , which is mainly attributed to the different grain size and carrier mobility. Though the pure ZnO film normally shows a low gas-phase photocatalytic activity, its activity is significantly enhanced by depositing Pt ultra-thin layer.

Indium Sulfide and Indium Oxide Thin Films Spin-Coated from Triethylammonium Indium Thioacetate Precursor for n-Channel Thin Film Transistor

Energy Technology Data Exchange (ETDEWEB)

Tung, Duy Dao; Jeong, Hyun Dam [Chonnam Natioal University, Gwangju (Korea, Republic of)

2014-09-15

The In{sub 2}S{sub 3} thin films of tetragonal structure and In{sub 2}O{sub 3} films of cubic structure were synthesized by a spin coating method from the organometallic compound precursor triethylammonium indium thioacetate ([(Et){sub 3}NH]+ [In(SCOCH{sub 3}){sub 4}]''-; TEA-InTAA). In order to determine the electron mobility of the spin-coated TEA-InTAA films, thin film transistors (TFTs) with an inverted structure using a gate dielectric of thermal oxide (SiO{sub 2}) was fabricated. These devices exhibited n-channel TFT characteristics with a field-effect electron mobility of 10.1 cm''2 V''-1s''-1 at a curing temperature of 500 o C, indicating that the semiconducting thin film material is applicable for use in low-cost, solution-processed printable electronics.

Uncorrelated multiple conductive filament nucleation and rupture in ultra-thin high-κ dielectric based resistive random access memory

KAUST Repository

Wu, Xing

2011-08-29

Resistive switching in transition metal oxides could form the basis for next-generation non-volatile memory (NVM). It has been reported that the current in the high-conductivity state of several technologically relevant oxide materials flows through localized filaments, but these filaments have been characterized only individually, limiting our understanding of the possibility of multiple conductive filaments nucleation and rupture and the correlation kinetics of their evolution. In this study, direct visualization of uncorrelated multiple conductive filaments in ultra-thin HfO2-based high-κ dielectricresistive random access memory (RRAM) device has been achieved by high-resolution transmission electron microscopy (HRTEM), along with electron energy loss spectroscopy(EELS), for nanoscale chemical analysis. The locations of these multiple filaments are found to be spatially uncorrelated. The evolution of these microstructural changes and chemical properties of these filaments will provide a fundamental understanding of the switching mechanism for RRAM in thin oxide films and pave way for the investigation into improving the stability and scalability of switching memory devices.

Discharge amplified photo-emission from ultra-thin films applied to tuning work function of transparent electrodes in organic opto-electronic devices

International Nuclear Information System (INIS)

Gentle, A.R.; Smith, G.B.; Watkins, S.E.

2013-01-01

A novel photoemission technique utilising localised discharge amplification of photo-yield is reported. It enables fast, accurate measurement of work function and ionisation potential for ultra-thin buffer layers vacuum deposited onto single and multilayer transparent conducting electrodes for organic solar cells and OLED's. Work function in most traditional transparent electrodes has to be raised to maximise charge transfer while high transmittance and high conductance must be retained. Results are presented for a range of metal oxide buffers, which achieve this goal. This compact photo-yield spectroscopy tool with its fast turn-around has been a valuable development aid since ionisation potential can vary significantly as deposition conditions change slightly, and as ultra-thin films grow. It has also been useful in tracking the impact of different post deposition cleaning treatments along with some storage and transport protocols, which can adversely reduce ionisation potential and hence subsequent device performance.

Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits

Science.gov (United States)

Sporea, R. A.; Trainor, M. J.; Young, N. D.; Shannon, J. M.; Silva, S. R. P.

2014-03-01

Ultra-large-scale integrated (ULSI) circuits have benefited from successive refinements in device architecture for enormous improvements in speed, power efficiency and areal density. In large-area electronics (LAE), however, the basic building-block, the thin-film field-effect transistor (TFT) has largely remained static. Now, a device concept with fundamentally different operation, the source-gated transistor (SGT) opens the possibility of unprecedented functionality in future low-cost LAE. With its simple structure and operational characteristics of low saturation voltage, stability under electrical stress and large intrinsic gain, the SGT is ideally suited for LAE analog applications. Here, we show using measurements on polysilicon devices that these characteristics lead to substantial improvements in gain, noise margin, power-delay product and overall circuit robustness in digital SGT-based designs. These findings have far-reaching consequences, as LAE will form the technological basis for a variety of future developments in the biomedical, civil engineering, remote sensing, artificial skin areas, as well as wearable and ubiquitous computing, or lightweight applications for space exploration.

How Do Organic Vapors Swell Ultra-Thin PIM-1 Films?

KAUST Repository

Ogieglo, Wojciech; Rahimi, Khosrow; Rauer, Sebastian Bernhard; Ghanem, Bader; Ma, Xiao-Hua; Pinnau, Ingo; Wessling, Matthias

2017-01-01

Dynamic sorption of ethanol and toluene vapor into ultra-thin supported PIM-1 films down to 6 nm are studied with a combination of in-situ spectroscopic ellipsometry and in-situ X-ray reflectivity. Both ethanol and toluene significantly swell

Ultra-thin films for plasmonics: a technology overview

DEFF Research Database (Denmark)

Malureanu, Radu; Lavrinenko, Andrei

2015-01-01

Ultra-thin films with low surface roughness that support surface plasmon-polaritons in the infra-red and visible ranges are needed in order to improve the performance of devices based on the manipulation of plasmon propagation. Increasing amount of efforts is made in order not only to improve...... the quality of the deposited layers but also to diminish their thickness and to find new materials that could be used in this field. In this review, we consider various thin films used in the field of plasmonics and metamaterials in the visible and IR range. We focus our presentation on technological issues...... of their deposition and reported characterization of film plasmonic performance....

Solid-State Densification of Spun-Cast Self-Assembled Monolayers for Use in Ultra-Thin Hybrid Dielectrics.

Science.gov (United States)

Hutchins, Daniel O; Acton, Orb; Weidner, Tobias; Cernetic, Nathan; Baio, Joe E; Castner, David G; Ma, Hong; Jen, Alex K-Y

2012-11-15

Ultra-thin self-assembled monolayer (SAM)-oxide hybrid dielectrics have gained significant interest for their application in low-voltage organic thin film transistors (OTFTs). A [8-(11-phenoxy-undecyloxy)-octyl]phosphonic acid (PhO-19-PA) SAM on ultrathin AlO x (2.5 nm) has been developed to significantly enhance the dielectric performance of inorganic oxides through reduction of leakage current while maintaining similar capacitance to the underlying oxide structure. Rapid processing of this SAM in ambient conditions is achieved by spin coating, however, as-cast monolayer density is not sufficient for dielectric applications. Thermal annealing of a bulk spun-cast PhO-19-PA molecular film is explored as a mechanism for SAM densification. SAM density, or surface coverage, and order are examined as a function of annealing temperature. These SAM characteristics are probed through atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS), and near edge X-ray absorption fine structure spectroscopy (NEXAFS). It is found that at temperatures sufficient to melt the as-cast bulk molecular film, SAM densification is achieved; leading to a rapid processing technique for high performance SAM-oxide hybrid dielectric systems utilizing a single wet processing step. To demonstrate low-voltage devices based on this hybrid dielectric (with leakage current density of 7.7×10 -8 A cm -2 and capacitance density of 0.62 µF cm -2 at 3 V), pentacene thin-film transistors (OTFTs) are fabricated and yield sub 2 V operation and charge carrier mobilites of up to 1.1 cm 2 V -1 s -1 .

Transparent field-effect transistors based on AlN-gate dielectric and IGZO-channel semiconductor

International Nuclear Information System (INIS)

Besleaga, C.; Stan, G.E.; Pintilie, I.; Barquinha, P.; Fortunato, E.; Martins, R.

2016-01-01

Highlights: • TFTs based on IGZO channel semiconductor and AlN gate dielectric were fabricated. • AlN films – a viable and cheap gate dielectric alternative for transparent TFTs. • Influence of gate dielectric layer thickness on TFTs electrical characteristics. • No degradation of AlN gate dielectric was observed during devices stress testing. - Abstract: The degradation of thin-film transistors (TFTs) caused by the self-heating effect constitutes a problem to be solved for the next generation of displays. Aluminum nitride (AlN) is a viable alternative for gate dielectric of TFTs due to its good thermal conductivity, matching coefficient of thermal expansion to indium–gallium–zinc-oxide, and excellent stability at high temperatures. Here, AlN thin films of different thicknesses were fabricated by a low temperature reactive radio-frequency magnetron sputtering process, using a low cost, metallic Al target. Their electrical properties have been thoroughly assessed. Furthermore, the 200 nm and 500 nm thick AlN layers have been integrated as gate-dielectric in transparent TFTs with indium–gallium–zinc-oxide as channel semiconductor. Our study emphasizes the potential of AlN thin films for transparent electronics, whilst the functionality of the fabricated field-effect transistors is explored and discussed.

Transparent field-effect transistors based on AlN-gate dielectric and IGZO-channel semiconductor

Energy Technology Data Exchange (ETDEWEB)

Besleaga, C.; Stan, G.E.; Pintilie, I. [National Institute of Materials Physics, 405A Atomistilor, 077125 Magurele-Ilfov (Romania); Barquinha, P.; Fortunato, E. [CENIMAT/I3N, Departamento de Ciência dos Materiais, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa, and CEMOP-UNINOVA, 2829-516 Caparica (Portugal); Martins, R., E-mail: rm@uninova.pt [CENIMAT/I3N, Departamento de Ciência dos Materiais, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa, and CEMOP-UNINOVA, 2829-516 Caparica (Portugal)

2016-08-30

Highlights: • TFTs based on IGZO channel semiconductor and AlN gate dielectric were fabricated. • AlN films – a viable and cheap gate dielectric alternative for transparent TFTs. • Influence of gate dielectric layer thickness on TFTs electrical characteristics. • No degradation of AlN gate dielectric was observed during devices stress testing. - Abstract: The degradation of thin-film transistors (TFTs) caused by the self-heating effect constitutes a problem to be solved for the next generation of displays. Aluminum nitride (AlN) is a viable alternative for gate dielectric of TFTs due to its good thermal conductivity, matching coefficient of thermal expansion to indium–gallium–zinc-oxide, and excellent stability at high temperatures. Here, AlN thin films of different thicknesses were fabricated by a low temperature reactive radio-frequency magnetron sputtering process, using a low cost, metallic Al target. Their electrical properties have been thoroughly assessed. Furthermore, the 200 nm and 500 nm thick AlN layers have been integrated as gate-dielectric in transparent TFTs with indium–gallium–zinc-oxide as channel semiconductor. Our study emphasizes the potential of AlN thin films for transparent electronics, whilst the functionality of the fabricated field-effect transistors is explored and discussed.

Thin film surface processing by UltraShort Laser Pulses (USLP)

NARCIS (Netherlands)

Scorticati, D.; Skolski, J.Z.P.; Römer, G.R.B.E.; Huis in 't Veld, A.J.; Workum, M.; Theelen, M.J.; Zeman, M.

2012-01-01

In this work, we studied the feasibility of surface texturing of thin molybdenum layers on a borosilicate glass substrate with Ultra-Short Laser Pulses (USLP). Large areas of regular diffraction gratings were produced consisting of Laserinduced periodic surface structures (LIPSS). A short pulsed

Effect of gate voltage polarity on the ionic liquid gating behavior of NdNiO3/NdGaO3 heterostructures

Directory of Open Access Journals (Sweden)

Yongqi Dong

2017-05-01

Full Text Available The effect of gate voltage polarity on the behavior of NdNiO3 epitaxial thin films during ionic liquid gating is studied using in situ synchrotron X-ray techniques. We show that while negative biases have no discernible effect on the structure or composition of the films, large positive gate voltages result in the injection of a large concentration of oxygen vacancies (∼3% and pronounced lattice expansion (0.17% in addition to a 1000-fold increase in sheet resistance at room temperature. Despite the creation of large defect densities, the heterostructures exhibit a largely reversible switching behavior when sufficient time is provided for the vacancies to migrate in and out of the thin film surface. The results confirm that electrostatic gating takes place at negative gate voltages for p-type complex oxides while positive voltages favor the electrochemical reduction of Ni3+. Switching between positive and negative gate voltages therefore involves a combination of electronic and ionic doping processes that may be utilized in future electrochemical transistors.

Multi-material gate poly-crystalline thin film transistors: Modeling and simulation for an improved gate transport efficiency

International Nuclear Information System (INIS)

Sehgal, Amit; Mangla, Tina; Gupta, Mridula; Gupta, R.S.

2008-01-01

In this work, a two-dimensional potential distribution formulation is presented for multi-material gate poly-crystalline silicon thin film transistors. The developed formulation incorporates the effects due to traps and grain-boundaries. In short-channel devices, short-channel effects and drain-induced barrier lowering (DIBL) effect exists, and are accounted for in the analysis. The work aims at the reduction of DIBL effect and grain-boundary effects i.e. to reduce the potential barriers generated in the channel by employing gate-engineered structures. A study of work-functions and electrode lengths of multi-material gate electrode is done to suppress the potential barriers, hot electron effect and to improve the carrier transport efficiency. Green's function approach is adopted for the two-dimensional potential solution. The results obtained show a good agreement with simulated results, thus, demonstrating the validity of our model

Enhancement of absorption and color contrast in ultra-thin highly absorbing optical coatings

Science.gov (United States)

Kats, Mikhail A.; Byrnes, Steven J.; Blanchard, Romain; Kolle, Mathias; Genevet, Patrice; Aizenberg, Joanna; Capasso, Federico

2013-09-01

Recently a new class of optical interference coatings was introduced which comprises ultra-thin, highly absorbing dielectric layers on metal substrates. We show that these lossy coatings can be augmented by an additional transparent subwavelength layer. We fabricated a sample comprising a gold substrate, an ultra-thin film of germanium with a thickness gradient, and several alumina films. The experimental reflectivity spectra showed that the additional alumina layer increases the color range that can be obtained, in agreement with calculations. More generally, this transparent layer can be used to enhance optical absorption, protect against erosion, or as a transparent electrode for optoelectronic devices.

Comparative studies of MOS-gate/oxide-passivated AlGaAs/InGaAs pHEMTs by using ozone water oxidation technique

International Nuclear Information System (INIS)

Lee, Ching-Sung; Hung, Chun-Tse; Chou, Bo-Yi; Hsu, Wei-Chou; Liu, Han-Yin; Ho, Chiu-Sheng; Lai, Ying-Nan

2012-01-01

Al 0.22 Ga 0.78 As/In 0.24 Ga 0.76 As pseudomorphic high-electron-mobility transistors (pHEMTs) with metal-oxide-semiconductor (MOS)-gate structure or oxide passivation by using ozone water oxidation treatment have been comprehensively investigated. Annihilated surface states, enhanced gate insulating property and improved device gain have been achieved by the devised MOS-gate structure and oxide passivation. The present MOS-gated or oxide-passivated pHEMTs have demonstrated superior device performances, including superior breakdown, device gain, noise figure, high-frequency characteristics and power performance. Temperature-dependent device characteristics of the present designs at 300–450 K are also studied. (paper)

Electroresistance Effect in Gold Thin Film Induced by Ionic-Liquid-Gated Electric Double Layer

NARCIS (Netherlands)

Nakayama, Hiroyasu; Ye, Jianting; Ohtani, Takashi; Fujikawa, Yasunori; Ando, Kazuya; Iwasa, Yoshihiro; Saitoh, Eiji

Electroresistance effect was detected in a metallic thin film using ionic-liquid-gated electric-double-layer transistors (EDLTs). We observed reversible modulation of the electric resistance of a Au thin film. In this system, we found that an electric double layer works as a nanogap capacitor with

Thin-film transistors with a channel composed of semiconducting metal oxide nanoparticles deposited from the gas phase

International Nuclear Information System (INIS)

Busch, C.; Schierning, G.; Theissmann, R.; Nedic, A.; Kruis, F. E.; Schmechel, R.

2012-01-01

The fabrication of semiconducting functional layers using low-temperature processes is of high interest for flexible printable electronics applications. Here, the one-step deposition of semiconducting nanoparticles from the gas phase for an active layer within a thin-film transistor is described. Layers of semiconducting nanoparticles with a particle size between 10 and 25 nm were prepared by the use of a simple aerosol deposition system, excluding potentially unwanted technological procedures like substrate heating or the use of solvents. The nanoparticles were deposited directly onto standard thin-film transistor test devices, using thermally grown silicon oxide as gate dielectric. Proof-of-principle experiments were done deploying two different wide-band gap semiconducting oxides, tin oxide, SnO x , and indium oxide, In 2 O 3 . The tin oxide spots prepared from the gas phase were too conducting to be used as channel material in thin-film transistors, most probably due to a high concentration of oxygen defects. Using indium oxide nanoparticles, thin-film transistor devices with significant field effect were obtained. Even though the electron mobility of the investigated devices was only in the range of 10 −6 cm 2V−1s−1 , the operability of this method for the fabrication of transistors was demonstrated. With respect to the possibilities to control the particle size and layer morphology in situ during deposition, improvements are expected.

Development and characterization of ultra-thin dosemeters of aluminium oxide; Desarrollo y caracterizacion de dosimetros ultra-delgados de oxido de aluminio

Energy Technology Data Exchange (ETDEWEB)

Villagran V, E

2003-07-01

The aim of the present thesis work has been to investigate the thermoluminescent (Tl) response of aluminium oxide thin films with thicknesses of the order of 300 nm prepared by laser ablation. Aluminium oxide thin films show Tl response after they are subject to ultraviolet, beta and gamma radiation. The Tl curves exhibit peaks around 75 C and 169 C for UV radiation, 112 C and 180 C for beta particles and 110 C and 176 C for gamma radiation. In order to improve the Tl response some growth parameters such as power density and distance target-substrate were varied. The relation dose-response shows a non-linear behavior for UV irradiation; a linear behavior for beta-particles dose from 150 mGy to 50 Gy, and a linear behavior for gamma radiation dose from 5 Gy to 100 Gy. The kinetic Tl parameters were determined by Computerized Glow Curve Deconvolution (CGCD) method as well as using analytical methods. The CGCD results show that the high temperature peak is composed by four peaks with maximums in 165.7, 188.1, 215.3, 246.5 C. These obey a second order kinetics. The trap depth (E) values are 1.4, 1.6, 1.8 and 2.0 eV respectively. The different analytical results show a trap depth values of 0.914, 0.82 and 0.656 eV respectively. Oxide aluminium thin films obtained would be a suitable tool owing to their potential applications in clinical dosimetry, in the dose distributions due to weekly penetrating radiation determination, and in interfaces dosimetry. (Author)

Ultra-thin infrared metamaterial detector for multicolor imaging applications.

Science.gov (United States)

Montoya, John A; Tian, Zhao-Bing; Krishna, Sanjay; Padilla, Willie J

2017-09-18

The next generation of infrared imaging systems requires control of fundamental electromagnetic processes - absorption, polarization, spectral bandwidth - at the pixel level to acquire desirable information about the environment with low system latency. Metamaterial absorbers have sparked interest in the infrared imaging community for their ability to enhance absorption of incoming radiation with color, polarization and/or phase information. However, most metamaterial-based sensors fail to focus incoming radiation into the active region of a ultra-thin detecting element, thus achieving poor detection metrics. Here our multifunctional metamaterial absorber is directly integrated with a novel mid-wave infrared (MWIR) and long-wave infrared (LWIR) detector with an ultra-thin (~λ/15) InAs/GaSb Type-II superlattice (T2SL) interband cascade detector. The deep sub-wavelength metamaterial detector architecture proposed and demonstrated here, thus significantly improves the detection quantum efficiency (QE) and absorption of incoming radiation in a regime typically dominated by Fabry-Perot etalons. Our work evinces the ability of multifunctional metamaterials to realize efficient wavelength selective detection across the infrared spectrum for enhanced multispectral infrared imaging applications.

Structural and interfacial characteristics of thin (2 films grown by electron cyclotron resonance plasma oxidation on [100] Si substrates

International Nuclear Information System (INIS)

Nguyen, T.D.; Carl, D.A.; Hess, D.W.; Lieberman, M.A.; Gronsky, R.

1991-04-01

The feasibility of fabricating ultra-thin SiO 2 films on the order of a few nanometer thickness has been demonstrated. SiO 2 thin films of approximately 7 nm thickness have been produced by ion flux-controlled Electron Cyclotron Resonance plasma oxidation at low temperature on [100] Si substrates, in reproducible fashion. Electrical measurements of these films indicate that they have characteristics comparable to those of thermally grown oxides. The thickness of the films was determined by ellipsometry, and further confirmed by cross-sectional High-Resolution Transmission Electron Microscopy. Comparison between the ECR and the thermal oxide films shows that the ECR films are uniform and continuous over at least a few microns in lateral direction, similar to the thermal oxide films grown at comparable thickness. In addition, HRTEM images reveal a thin (1--1.5 nm) crystalline interfacial layer between the ECR film and the [100] substrate. Thinner oxide films of approximately 5 nm thickness have also been attempted, but so far have resulted in nonuniform coverage. Reproducibility at this thickness is difficult to achieve

Determining surface coverage of ultra-thin gold films from X-ray reflectivity measurements

International Nuclear Information System (INIS)

Kossoy, A.; Simakov, D.; Olafsson, S.; Leosson, K.

2013-01-01

The paper describes usage of X-ray reflectivity for characterization of surface coverage (i.e. film continuity) of ultra-thin gold films which are widely studied for optical, plasmonic and electronic applications. The demonstrated method is very sensitive and can be applied for layers below 1 nm. It has several advantages over other techniques which are often employed in characterization of ultra-thin metal films, such as optical absorption, Atomic Force Microscopy, Transmission Electron Microscopy or Scanning Electron Microscopy. In contrast to those techniques our method does not require specialized sample preparation and measurement process is insensitive to electrostatic charge and/or presence of surface absorbed water. We validate our results with image processing of Scanning Electron Microscopy images. To ensure precise quantitative analysis of the images we developed a generic local thresholding algorithm which allowed us to treat series of images with various values of surface coverage with similar image processing parameters. - Highlights: • Surface coverage/continuity of ultra-thin Au films (up to 7 nm) was determined. • Results from X-ray reflectivity were verified by scanning electron microscopy. • We developed local thresholding algorithm to treat non-homogeneous image contrast

Study of interfaces and band offsets in TiN/amorphous LaLuO3 gate stacks

KAUST Repository

Mitrovic, Ivona Z.

2011-07-01

TiN/LaLuO3 (LLO) gate stacks formed by molecular beam deposition have been investigated by X-ray photoelectron spectroscopy, medium energy ion scattering, spectroscopic ellipsometry, scanning transmission electron microscopy, electron energy loss spectroscopy and atomic force microscopy. The results indicate an amorphous structure for deposited LLO films. The band offset between the Fermi level of TiN and valence band of LLO is estimated to be 2.65 ± 0.05 eV. A weaker La-O-Lu bond and a prominent Ti2p sub-peak which relates to Ti bond to interstitial oxygen have been identified for an ultra-thin 1.7 nm TiN/3 nm LLO gate stack. The angle-dependent XPS analysis of Si2s spectra as well as shifts of La4d, La3d and Lu4d core levels suggests a silicate-type with Si-rich SiOx LLO/Si interface. Symmetrical valence and conduction band offsets for LLO to Si of 2.2 eV and the bandgap of 5.5 ± 0.1 eV have been derived from the measurements. The band alignment for ultra-thin TiN/LLO gate stack is affected by structural changes. Copyright © 2011 Published by Elsevier B.V. All rights reserved.

Ultra-thin titanium nanolayers for plasmon-assisted enhancement of bioluminescence of chloroplast in biological light emitting devices

Energy Technology Data Exchange (ETDEWEB)

Hsun Su, Yen [Department of Materials Science and Engineering, National Cheng Kung University, Tainan 70101, Taiwan (China); Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 70101, Taiwan (China); Hsu, Chia-Yun; Chang, Chung-Chien [Science and Technology of Accelerator Light Source, Hsinchu 300, Taiwan (China); Department of Materials Science and Engineering, National Chiao Tung University, Hsinchu 300, Taiwan (China); Tu, Sheng-Lung; Shen, Yun-Hwei [Department of Resource Engineering, National Cheng Kung University, Tainan 70101, Taiwan (China)

2013-08-05

Ultra-thin titanium films were deposited via ultra-high vacuum ion beam sputter deposition. Since the asymmetric electric field of the metal foil plane matches the B-band absorption of chlorophyll a, the ultra-thin titanium nanolayers were able to generate surface plasmon resonance, thus enhancing the photoluminescence of chlorophyll a. Because the density of the states of plasmon resonance increases, the enhancement of photoluminescence also rises. Due to the biocompatibility and inexpensiveness of titanium, it can be utilized to enhance the bioluminescence of chloroplast in biological light emitting devices, bio-laser, and biophotonics.

Electrical properties of ZnO-based bottom-gate thin film transistors fabricated by using radio frequency magnetron sputtering

Energy Technology Data Exchange (ETDEWEB)

Navamathavan, R. [Nano Thin Film Materials Laboratory, Department of Physics, Cheju National University, Jeju 690-756 (Korea, Republic of)], E-mail: n_mathavan@yahoo.com; Choi, Chi Kyu [Nano Thin Film Materials Laboratory, Department of Physics, Cheju National University, Jeju 690-756 (Korea, Republic of); Park, Seong-Ju [Nanophotonic Semiconductors Laboratory, Department of Materials Science and Engineering, Gwangju Institute of Science and Technology, Gwangju 500-712 (Korea, Republic of)

2009-05-05

We report on enhancement-mode thin film transistors (TFTs) using ZnO as an active channel layer deposited by radio frequency (rf) magnetron sputtering at 300 deg. C. The TFT structure consisted of ZnO as a channel, SiN{sub x} as a gate insulator and indium tin oxide (ITO) as a gate which were deposited onto a Corning glass substrate. X-ray diffraction pattern revealed that dense columnar structure of closely packed ZnO nano grains along the c-axis. The transfer characteristics of a typical ZnO TFT exhibited a field effect mobility of 31 cm{sup 2}/V s, a drain current on/off ratio of 10{sup 4}, the low off-current value in the order of 10{sup -10} A, and a threshold voltage of 1.7 V. The transparent ZnO TFT exhibited n-channel enhancement mode behavior.

Atomic Layer Deposition of Gallium Oxide Films as Gate Dielectrics in AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors.

Science.gov (United States)

Shih, Huan-Yu; Chu, Fu-Chuan; Das, Atanu; Lee, Chia-Yu; Chen, Ming-Jang; Lin, Ray-Ming

2016-12-01

In this study, films of gallium oxide (Ga2O3) were prepared through remote plasma atomic layer deposition (RP-ALD) using triethylgallium and oxygen plasma. The chemical composition and optical properties of the Ga2O3 thin films were investigated; the saturation growth displayed a linear dependence with respect to the number of ALD cycles. These uniform ALD films exhibited excellent uniformity and smooth Ga2O3-GaN interfaces. An ALD Ga2O3 film was then used as the gate dielectric and surface passivation layer in a metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT), which exhibited device performance superior to that of a corresponding conventional Schottky gate HEMT. Under similar bias conditions, the gate leakage currents of the MOS-HEMT were two orders of magnitude lower than those of the conventional HEMT, with the power-added efficiency enhanced by up to 9 %. The subthreshold swing and effective interfacial state density of the MOS-HEMT were 78 mV decade(-1) and 3.62 × 10(11) eV(-1) cm(-2), respectively. The direct-current and radio-frequency performances of the MOS-HEMT device were greater than those of the conventional HEMT. In addition, the flicker noise of the MOS-HEMT was lower than that of the conventional HEMT.

High Mobility Flexible Amorphous IGZO Thin-Film Transistors with a Low Thermal Budget Ultra-Violet Pulsed Light Process.

Science.gov (United States)

Benwadih, M; Coppard, R; Bonrad, K; Klyszcz, A; Vuillaume, D

2016-12-21

Amorphous, sol-gel processed, indium gallium zinc oxide (IGZO) transistors on plastic substrate with a printable gate dielectric and an electron mobility of 4.5 cm 2 /(V s), as well as a mobility of 7 cm 2 /(V s) on solid substrate (Si/SiO 2 ) are reported. These performances are obtained using a low temperature pulsed light annealing technique. Ultraviolet (UV) pulsed light system is an innovative technique compared to conventional (furnace or hot-plate) annealing process that we successfully implemented on sol-gel IGZO thin film transistors (TFTs) made on plastic substrate. The photonic annealing treatment has been optimized to obtain IGZO TFTs with significant electrical properties. Organic gate dielectric layers deposited on this pulsed UV light annealed films have also been optimized. This technique is very promising for the development of amorphous IGZO TFTs on plastic substrates.

Influence of the charge trap density distribution in a gate insulator on the positive-bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors

Energy Technology Data Exchange (ETDEWEB)

Kim, Eungtaek; Kim, Choong-Ki; Lee, Myung Keun; Bang, Tewook; Choi, Yang-Kyu; Choi, Kyung Cheol, E-mail: shkp@kaist.ac.kr, E-mail: kyungcc@kaist.ac.kr [School of Electrical Engineering, KAIST, Daejeon 34141 (Korea, Republic of); Park, Sang-Hee Ko, E-mail: shkp@kaist.ac.kr, E-mail: kyungcc@kaist.ac.kr [Department of Material Science and Engineering, KAIST, Daejeon 34141 (Korea, Republic of)

2016-05-02

We investigated the positive-bias stress (PBS) instability of thin film transistors (TFTs) composed of different types of first-gate insulators, which serve as a protection layer of the active surface. Two different deposition methods, i.e., the thermal atomic layer deposition (THALD) and plasma-enhanced ALD (PEALD) of Al{sub 2}O{sub 3}, were applied for the deposition of the first GI. When THALD was used to deposit the GI, amorphous indium-gallium-zinc oxide (a-IGZO) TFTs showed superior stability characteristics under PBS. For example, the threshold voltage shift (ΔV{sub th}) was 0 V even after a PBS time (t{sub stress}) of 3000 s under a gate voltage (V{sub G}) condition of 5 V (with an electrical field of 1.25 MV/cm). On the other hand, when the first GI was deposited by PEALD, the ΔV{sub th} value of a-IGZO TFTs was 0.82 V after undergoing an identical amount of PBS. In order to interpret the disparate ΔV{sub th} values resulting from PBS quantitatively, the average oxide charge trap density (N{sub T}) in the GI and its spatial distribution were investigated through low-frequency noise characterizations. A higher N{sub T} resulted during in the PEALD type GI than in the THALD case. Specifically, the PEALD process on a-IGZO layer surface led to an increasing trend of N{sub T} near the GI/a-IGZO interface compared to bulk GI owing to oxygen plasma damage on the a-IGZO surface.

Influence of the charge trap density distribution in a gate insulator on the positive-bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors

International Nuclear Information System (INIS)

Kim, Eungtaek; Kim, Choong-Ki; Lee, Myung Keun; Bang, Tewook; Choi, Yang-Kyu; Choi, Kyung Cheol; Park, Sang-Hee Ko

2016-01-01

We investigated the positive-bias stress (PBS) instability of thin film transistors (TFTs) composed of different types of first-gate insulators, which serve as a protection layer of the active surface. Two different deposition methods, i.e., the thermal atomic layer deposition (THALD) and plasma-enhanced ALD (PEALD) of Al_2O_3, were applied for the deposition of the first GI. When THALD was used to deposit the GI, amorphous indium-gallium-zinc oxide (a-IGZO) TFTs showed superior stability characteristics under PBS. For example, the threshold voltage shift (ΔV_t_h) was 0 V even after a PBS time (t_s_t_r_e_s_s) of 3000 s under a gate voltage (V_G) condition of 5 V (with an electrical field of 1.25 MV/cm). On the other hand, when the first GI was deposited by PEALD, the ΔV_t_h value of a-IGZO TFTs was 0.82 V after undergoing an identical amount of PBS. In order to interpret the disparate ΔV_t_h values resulting from PBS quantitatively, the average oxide charge trap density (N_T) in the GI and its spatial distribution were investigated through low-frequency noise characterizations. A higher N_T resulted during in the PEALD type GI than in the THALD case. Specifically, the PEALD process on a-IGZO layer surface led to an increasing trend of N_T near the GI/a-IGZO interface compared to bulk GI owing to oxygen plasma damage on the a-IGZO surface.

Thermoluminescent characterization of thin films of aluminium oxide submitted to beta and gamma radiation; Caracterizacion termoluminiscente de peliculas delgadas de oxido de aluminio sometidas a radiacion beta y gamma

Energy Technology Data Exchange (ETDEWEB)

Villagran, E.; Escobar A, L.; Camps, E.; Gonzalez, P.R.; Martinez A, L. [Instituto Nacional de Investigaciones Nucleares, A.P. 18-1027, 11801 Mexico D.F. (Mexico)

2002-07-01

By mean of the laser ablation technique, thin films of aluminium oxide have been deposited on kapton substrates. These films present thermoluminescent response (Tl) when they are exposed to beta and gamma radiation. The brilliance curves show two peaks between 112 C and 180 C. A dose-response relationship study was realized and the Tl kinetic parameters were determined using the computerized deconvolution of the brilliance curve (CGCD). The thin films of aluminium oxide have potential applications as ultra.thin radiation dosemeters. (Author)

High-Resolution Inkjet-Printed Oxide Thin-Film Transistors with a Self-Aligned Fine Channel Bank Structure.

Science.gov (United States)

Zhang, Qing; Shao, Shuangshuang; Chen, Zheng; Pecunia, Vincenzo; Xia, Kai; Zhao, Jianwen; Cui, Zheng

2018-05-09

A self-aligned inkjet printing process has been developed to construct small channel metal oxide (a-IGZO) thin-film transistors (TFTs) with independent bottom gates on transparent glass substrates. Poly(methylsilsesquioxane) was used to pattern hydrophobic banks on the transparent substrate instead of commonly used self-assembled octadecyltrichlorosilane. Photolithographic exposure from backside using bottom-gate electrodes as mask formed hydrophilic channel areas for the TFTs. IGZO ink was selectively deposited by an inkjet printer in the hydrophilic channel region and confined by the hydrophobic bank structure, resulting in the precise deposition of semiconductor layers just above the gate electrodes. Inkjet-printed IGZO TFTs with independent gate electrodes of 10 μm width have been demonstrated, avoiding completely printed channel beyond the broad of the gate electrodes. The TFTs showed on/off ratios of 10 8 , maximum mobility of 3.3 cm 2 V -1 s -1 , negligible hysteresis, and good uniformity. This method is conductive to minimizing the area of printed TFTs so as to the development of high-resolution printing displays.

Electrochemical Thinning for Anodic Aluminum Oxide and Anodic Titanium Oxide

Energy Technology Data Exchange (ETDEWEB)

Lee, In Hae; Jo, Yun Kyoung; Kim, Yong Tae; Tak, Yong Sug; Choi, Jin Sub [Inha University, Incheon (Korea, Republic of)

2012-05-15

For given electrolytes, different behaviors of anodic aluminum oxide (AAO) and anodic titanium oxide (ATO) during electrochemical thinning are explained by ionic and electronic current modes. Branched structures are unavoidably created in AAO since the switch of ionic to electronic current is slow, whereas the barrier oxide in ATO is thinned without formation of the branched structures. In addition, pore opening can be possible in ATO if chemical etching is performed after the thinning process. The thinning was optimized for complete pore opening in ATO and potential-current behavior is interpreted in terms of ionic current-electronic current switching.

Study of interfaces and band offsets in TiN/amorphous LaLuO3 gate stacks

KAUST Repository

Mitrovic, Ivona Z.; Simutis, G.; Davey, W. M.; Sedghi, Naser; Hall, Stephen D.; Dhanak, Vinod R.; Alexandrou, Ioannis; Wang, Qingxiao; Lopes, Joao Marcelo J.; Schubert, Jü rgen M.

2011-01-01

sub-peak which relates to Ti bond to interstitial oxygen have been identified for an ultra-thin 1.7 nm TiN/3 nm LLO gate stack. The angle-dependent XPS analysis of Si2s spectra as well as shifts of La4d, La3d and Lu4d core levels suggests a silicate-type

Structural studies on Langmuir-Blodgett ultra-thin films on tin (IV) stearate using X-ray diffraction technique

International Nuclear Information System (INIS)

Mohamad Deraman; Muhamad Mat Salleh; Mohd Ali Sulaiman; Mohd Ali Sufi

1991-01-01

X-ray diffraction measurements were carried out on Langmuir-Blodgett (LB) ultra-thin films of tin (IV) stearate for different numbers of layers. The structural information such as interplanar spacing, unit cells spacing, molecular length and orientation of molecular chains were obtained from the diffraction data. This information is discussed and compared with that previously published for LB ultra-thin films of manganese stearate and cadmium stearate

Large-scale complementary macroelectronics using hybrid integration of carbon nanotubes and IGZO thin-film transistors.

Science.gov (United States)

Chen, Haitian; Cao, Yu; Zhang, Jialu; Zhou, Chongwu

2014-06-13

Carbon nanotubes and metal oxide semiconductors have emerged as important materials for p-type and n-type thin-film transistors, respectively; however, realizing sophisticated macroelectronics operating in complementary mode has been challenging due to the difficulty in making n-type carbon nanotube transistors and p-type metal oxide transistors. Here we report a hybrid integration of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors to achieve large-scale (>1,000 transistors for 501-stage ring oscillators) complementary macroelectronic circuits on both rigid and flexible substrates. This approach of hybrid integration allows us to combine the strength of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors, and offers high device yield and low device variation. Based on this approach, we report the successful demonstration of various logic gates (inverter, NAND and NOR gates), ring oscillators (from 51 stages to 501 stages) and dynamic logic circuits (dynamic inverter, NAND and NOR gates).

Ab initio thermodynamics for the growth of ultra-thin Cu film on a perfect Mg O(001) surface

Energy Technology Data Exchange (ETDEWEB)

Zhukovskii, Yuri F. [Institute for Solid State Physics, University of Latvia, Kengaraga str. 8, Riga LV-1063 (Latvia)]. E-mail: quantzh@latnet.lv; Fuks, David [Materials Engineering Department, Ben-Gurion University of the Negev, POB 653, Beer-Sheva IL-84105 (Israel); Kotomin, Eugene A. [Institute for Solid State Physics, University of Latvia, Kengaraga str. 8, Riga LV-1063 (Latvia); Dorfman, Simon [Department of Physics, Israel Institute of Technology-Technion, Haifa IL-32000 (Israel)

2005-12-15

Controlled growth of thin metallic films on oxide substrates is important for numerous micro-and nano electronic applications. Our ab initio study is devoted to the periodic slab simulations for a series of ordered 2a Cu superlattices on the regular Mg O(001) substrate. Submonolayer and monolayer substrate Cu coverages were calculated using the Daft-Gaga method, as implemented into the Crystal-98 code. The results of ab initio calculations have been combined with thermodynamic theory which allows US to predict the growth mode of ultra-thin metal films (spinodal decomposition vs. nucleation-and-growth regime) as a function of the metal coverage and the temperature, and to estimate the metal density in clusters. We show that 3a cluster formation becomes predominant already at low Cu coverages, in agreement with the experiment.

Ab initio thermodynamics for the growth of ultra-thin Cu film on a perfect Mg O(001) surface

International Nuclear Information System (INIS)

Zhukovskii, Yuri F.; Fuks, David; Kotomin, Eugene A.; Dorfman, Simon

2005-01-01

Controlled growth of thin metallic films on oxide substrates is important for numerous micro-and nano electronic applications. Our ab initio study is devoted to the periodic slab simulations for a series of ordered 2a Cu superlattices on the regular Mg O(001) substrate. Submonolayer and monolayer substrate Cu coverages were calculated using the Daft-Gaga method, as implemented into the Crystal-98 code. The results of ab initio calculations have been combined with thermodynamic theory which allows US to predict the growth mode of ultra-thin metal films (spinodal decomposition vs. nucleation-and-growth regime) as a function of the metal coverage and the temperature, and to estimate the metal density in clusters. We show that 3a cluster formation becomes predominant already at low Cu coverages, in agreement with the experiment

UV absorption by cerium oxide nanoparticles/epoxy composite thin films

International Nuclear Information System (INIS)

Dao, Ngoc Nhiem; Luu, Minh Dai; Nguyen, Quang Khuyen; Kim, Byung Sun

2011-01-01

Cerium oxide (CeO 2 ) nanoparticles have been used to modify properties of an epoxy matrix in order to improve the ultra-violet (UV) absorption property of epoxy thin films. The interdependence of mechanical properties, UV absorption property and the dispersed concentration of CeO 2 nanoparticles was investigated. Results showed that, by increasing the dispersed concentration of CeO 2 nanoparticles up to 3 wt%, tensile modulus increases while two other mechanical properties, namely tensile strength and elongation, decrease. The UV absorption peak and the absorption edges of the studied thin films were observed in the UV-Vis absorption spectra. By incorporating CeO 2 nanoparticles into the epoxy matrix, an absorption peak appears at around 318 nm in UV-Vis spectra with increasing CeO 2 concentration from 0.1 to 1.0 wt%. Scanning electron microscopy (SEM) images revealed that a good dispersion of nanoparticles in the epoxy matrix by an ultrasonic method was achieved

COVALENTLY ATTACHED MULTILAYER ULTRA-THIN FILMS FROM DIAZORESIN AND CALIXARENES

Institute of Scientific and Technical Information of China (English)

Zhao-hui Yang; Wei-xiao Cao

2003-01-01

A kind of photosensitive ultra-thin film was fabricated from diazoresin (DR) and various calixarenes by using the self-assembly technique. Under UV irradiation both the ionic- and hydrogen bonds between the layers of the film will convert into covalent bonds. As a result, the stability of the film toward polar solvents increases dramatically.

Culturing of primary rat neurons and glia on ultra-thin parylene-C

International Nuclear Information System (INIS)

Unsworth, C.P.; Delivopoulos, E.; Murray, A.F.

2010-01-01

Full text: In this article, we will describe how we have successfully cultured dissociated embryonic cortical neurons and glia from the postnatal rat hippocampus on extremely thin layers (up to 10 nm) of Parylene-C on a silicon dioxide substrate. Silicon wafers were oxidised, deposited with the biomaterial, Parylene-C, photo-lithographically patterned and plasma etched to produce chips that consisted of lines of Paryl ene-C with varying widths, thickness and lengths. The chips produced were then immersed in Horse Serum and plated with the cells. Ratios of Neurons; Glia; Cell Body were measured on, adjacent to and away from the Parylene-C. Our initial results show how these ratios remained roughly constant for ultra-thin Parylene-C thicknesses of 10 nm as compared to a benchmark thickness of 100 nm (where such cells are known to grow well). Thus, our findings demonstrate that it is possible to culture primary rat neurons and glia to practically cell membrane thicknesses of Parylene-C. Being able to culture cells on such ultra thin levels of Parylene-C will open up the possibility to develop Multi-Electrode Arrays (MEA) that can capacitively couple embedded electrodes through the parylene to the cells on its surface. Thus, providing a neat, insulated passive electrode. Only the ultra-thin thicknesses of Parylene demonstrated here would allow for the rea isation of such a technology. Hence, the outcome of this work, will be of great interest to the Neuroengineering and the Multi-Electrode Array (MEA) community, as an alternative material for the fabric tion of passive electrodes, used in capacitive coupling mode.

All-metallic electrically gated 2H-TaSe2 thin-film switches and logic circuits

International Nuclear Information System (INIS)

Renteria, J.; Jiang, C.; Yan, Z.; Samnakay, R.; Goli, P.; Pope, T. R.; Salguero, T. T.; Wickramaratne, D.; Lake, R. K.; Khitun, A. G.; Balandin, A. A.

2014-01-01

We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe 2 were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe 2 –Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials

All-metallic electrically gated 2H-TaSe2 thin-film switches and logic circuits

Science.gov (United States)

Renteria, J.; Samnakay, R.; Jiang, C.; Pope, T. R.; Goli, P.; Yan, Z.; Wickramaratne, D.; Salguero, T. T.; Khitun, A. G.; Lake, R. K.; Balandin, A. A.

2014-01-01

We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe2 were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe2-Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials.

The uniformity study of non-oxide thin film at device level using electron energy loss spectroscopy

Science.gov (United States)

Li, Zhi-Peng; Zheng, Yuankai; Li, Shaoping; Wang, Haifeng

2018-05-01

Electron energy loss spectroscopy (EELS) has been widely used as a chemical analysis technique to characterize materials chemical properties, such as element valence states, atoms/ions bonding environment. This study provides a new method to characterize physical properties (i.e., film uniformity, grain orientations) of non-oxide thin films in the magnetic device by using EELS microanalysis on scanning transmission electron microscope. This method is based on analyzing white line ratio of spectra and related extended energy loss fine structures so as to correlate it with thin film uniformity. This new approach can provide an effective and sensitive method to monitor/characterize thin film quality (i.e., uniformity) at atomic level for thin film development, which is especially useful for examining ultra-thin films (i.e., several nanometers) or embedded films in devices for industry applications. More importantly, this technique enables development of quantitative characterization of thin film uniformity and it would be a remarkably useful technique for examining various types of devices for industrial applications.

Proton probing of ultra-thin foil dynamics in high intensity regime

Science.gov (United States)

Prasad, Rajendra; Aktan, Esin; Aurand, Bastian; Cerchez, Mirela; Willi, Oswald

2017-10-01

The field of laser driven ion acceleration has been enriched significantly over the past decade, thanks to the advanced laser technologies. Already, from 100s TW class systems, laser driven sources of particles and radiations are being considered in number of potential applications in science and medicine due to their unique properties. New physical effects unearthed at these systems may help understand and conduct successful experiments at several PW class multi-beam facilities with high rep rate systems, e.g. ELI. Here we present the first experimental results on ultra-thin foil dynamics irradiated by an ultra-high intensity (1020 W/cm2) , ultra-high contrast (10-12) laser pulse at ARCTURUS laser facility at HHU Duesseldorf. By employing the elegant proton probing technique it is observed that for the circular polarization of laser light, a 100nm thin target is pushed forward as a compressed layer due to the radiation pressure of light. Whereas, the linear polarization seems to decompress the target drastically. 2D particle-in-cell simulations corroborate the experimental findings. Our results confirm the previous simulation studies investigating the fundamental role played by light polarization, finite focus spot size effect and eventually electron heating including the oblique incidence at the target edges.

Charge carrier mobility in thin films of organic semiconductors by the gated van der Pauw method

Science.gov (United States)

Rolin, Cedric; Kang, Enpu; Lee, Jeong-Hwan; Borghs, Gustaaf; Heremans, Paul; Genoe, Jan

2017-01-01

Thin film transistors based on high-mobility organic semiconductors are prone to contact problems that complicate the interpretation of their electrical characteristics and the extraction of important material parameters such as the charge carrier mobility. Here we report on the gated van der Pauw method for the simple and accurate determination of the electrical characteristics of thin semiconducting films, independently from contact effects. We test our method on thin films of seven high-mobility organic semiconductors of both polarities: device fabrication is fully compatible with common transistor process flows and device measurements deliver consistent and precise values for the charge carrier mobility and threshold voltage in the high-charge carrier density regime that is representative of transistor operation. The gated van der Pauw method is broadly applicable to thin films of semiconductors and enables a simple and clean parameter extraction independent from contact effects. PMID:28397852

Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

International Nuclear Information System (INIS)

Hanna, A. N.; Ghoneim, M. T.; Bahabry, R. R.; Hussain, A. M.; Hussain, M. M.

2013-01-01

We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions

Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

KAUST Repository

Hanna, Amir; Ghoneim, Mohamed T.; Bahabry, Rabab R.; Hussain, Aftab M.; Hussain, Muhammad Mustafa

2013-01-01

We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.

Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

KAUST Repository

Hanna, Amir

2013-11-26

We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.

Ultra-thin Cu2ZnSnS4 solar cell by pulsed laser deposition

DEFF Research Database (Denmark)

Cazzaniga, Andrea Carlo; Crovetto, Andrea; Yan, Chang

2017-01-01

We report on the fabrication of a 5.2% efficiency Cu2ZnSnS4 (CZTS) solar cell made by pulsed laser deposition (PLD) featuring an ultra-thin absorber layer (less than 450 nm). Solutions to the issues of reproducibility and micro-particulate ejection often encountered with PLD are proposed. At the ......We report on the fabrication of a 5.2% efficiency Cu2ZnSnS4 (CZTS) solar cell made by pulsed laser deposition (PLD) featuring an ultra-thin absorber layer (less than 450 nm). Solutions to the issues of reproducibility and micro-particulate ejection often encountered with PLD are proposed...

Thin Solid Oxide Cell

DEFF Research Database (Denmark)

2010-01-01

The present invention relates to a thin and in principle unsupported solid oxide cell, comprising at least a porous anode layer, an electrolyte layer and a porous cathode layer, wherein the anode layer and the cathode layer comprise an electrolyte material, at least one metal and a catalyst...... material, and wherein the overall thickness of the thin reversible cell is about 150 [mu]m or less, and to a method for producing same. The present invention also relates to a thin and in principle unsupported solid oxide cell, comprising at least a porous anode layer, an electrolyte layer and a porous...... cathode layer, wherein the anode layer and the cathode layer comprise an electrolyte material and a catalyst material, wherein the electrolyte material is doper zirconia, and wherein the overall thickness of the thin reversible cell is about 150 [mu]m or less, and to a method for producing same...

Lateral protonic/electronic hybrid oxide thin-film transistor gated by SiO2 nanogranular films

International Nuclear Information System (INIS)

Zhu, Li Qiang; Chao, Jin Yu; Xiao, Hui

2014-01-01

Ionic/electronic interaction offers an additional dimension in the recent advancements of condensed materials. Here, lateral gate control of conductivities of indium-zinc-oxide (IZO) films is reported. An electric-double-layer (EDL) transistor configuration was utilized with a phosphorous-doped SiO 2 nanogranular film to provide a strong lateral electric field. Due to the strong lateral protonic/electronic interfacial coupling effect, the IZO EDL transistor could operate at a low-voltage of 1 V. A resistor-loaded inverter is built, showing a high voltage gain of ∼8 at a low supply voltage of 1 V. The lateral ionic/electronic coupling effects are interesting for bioelectronics and portable electronics

Low temperature synthesis of Mo2C/W2C superlattices via ultra-thin modulated reactants

International Nuclear Information System (INIS)

Johnson, C.D.; Johnson, D.C.

1996-01-01

The authors report here a synthesis method of preparing carbide superlattices using ultra-thin modulated reactants. Initial investigations into the synthesis of the binary systems, Mo 2 C and W 2 C using ultra-thin modulated reactants revealed that both can be formed at relatively low temperatures (500 and 600 C respectively). DSC and XRD data suggested a two step reaction pathway involving interdiffusion of the initial modulated reactant followed by crystallization of the final product, if the modulation length is on the order of 10 angstrom. This information was used to form Mo 2 C/W 2 C superlattices using the structure of the ultra-thin modulated reactant to control the final superlattice period. Relatively large superlattice modulations were kinetically trapped by having several repeat units of each binary within the total repeat of the initial reactant. DSC and XRD data again are consistent with a two step reaction pathway leading to the formation of carbide superlattices

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

Directory of Open Access Journals (Sweden)

Paul C. McIntyre

2012-07-01

Full Text Available The literature on polar Gallium Nitride (GaN surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

Field emission mechanism from a single-layer ultra-thin semiconductor film cathode

International Nuclear Information System (INIS)

Duan Zhiqiang; Wang Ruzhi; Yuan Ruiyang; Yang Wei; Wang Bo; Yan Hui

2007-01-01

Field emission (FE) from a single-layer ultra-thin semiconductor film cathode (SUSC) on a metal substrate has been investigated theoretically. The self-consistent quantum FE model is developed by synthetically considering the energy band bending and electron scattering. As a typical example, we calculate the FE properties of ultra-thin AlN film with an adjustable film thickness from 1 to 10 nm. The calculated results show that the FE characteristic is evidently modulated by varying the film thickness, and there is an optimum thickness of about 3 nm. Furthermore, a four-step FE mechanism is suggested such that the distinct FE current of a SUSC is rooted in the thickness sensitivity of its quantum structure, and the optimum FE properties of the SUSC should be attributed to the change in the effective potential combined with the attenuation of electron scattering

Dual-Input AND Gate From Single-Channel Thin-Film FET

Science.gov (United States)

Miranda, F. A.; Pinto, N. J.; Perez, R.; Mueller, C. H.

2008-01-01

A regio-regular poly(3-hexylthiophene) (RRP3HT) thin-film transistor having a split-gate architecture has been fabricated on a doped silicon/silicon nitride substrate and characterized. RRP3HT is a semiconducting polymer that has a carrier mobility and on/off ratio when used in a field effect transistor (FET) configuration. This commercially available polymer is very soluble in common organic solvents and is easily processed to form uniform thin films. The most important polymer-based device fabricated and studied is the FET, since it forms the building block in logic circuits and switches for active matrix (light-emitting-diode) (LED) displays, smart cards, and radio frequency identification (RFID) cards.

Femtosecond laser surface structuring and oxidation of chromium thin coatings: Black chromium

Energy Technology Data Exchange (ETDEWEB)

Kotsedi, L., E-mail: Kotsedi@tlabs.ac.za [UNESCO-UNISA Africa Chair in Nanosciences-Nanotechnology, College of Graduate Studies, University of South Africa, Muckleneuk Ridge, P.O. Box 392, Pretoria (South Africa); Nanosciences African Network (NANOAFNET), iThemba LABS-National Research Foundation, 1 Old Faure Road, Somerset West 7129, P.O. Box 722, Somerset West, Western Cape (South Africa); Nuru, Z.Y. [UNESCO-UNISA Africa Chair in Nanosciences-Nanotechnology, College of Graduate Studies, University of South Africa, Muckleneuk Ridge, P.O. Box 392, Pretoria (South Africa); Nanosciences African Network (NANOAFNET), iThemba LABS-National Research Foundation, 1 Old Faure Road, Somerset West 7129, P.O. Box 722, Somerset West, Western Cape (South Africa); Mthunzi, P. [National Laser Centre, Council for Scientific and Industrial Research, 0001 Pretoria (South Africa); Muller, T.F.G. [University of the Western Cape, Physics Department, Bellville, 7535 Cape Town (South Africa); Eaton, S.M. [Physics Department, Politecnico di Milano, Piazza Leonardo Da Vinci, 32, 20133 Milano (Italy); Julies, B. [University of the Western Cape, Physics Department, Bellville, 7535 Cape Town (South Africa); Manikandan, E. [UNESCO-UNISA Africa Chair in Nanosciences-Nanotechnology, College of Graduate Studies, University of South Africa, Muckleneuk Ridge, P.O. Box 392, Pretoria (South Africa); Nanosciences African Network (NANOAFNET), iThemba LABS-National Research Foundation, 1 Old Faure Road, Somerset West 7129, P.O. Box 722, Somerset West, Western Cape (South Africa); Ramponi, R. [Physics Department, Politecnico di Milano, Piazza Leonardo Da Vinci, 32, 20133 Milano (Italy); Maaza, M. [UNESCO-UNISA Africa Chair in Nanosciences-Nanotechnology, College of Graduate Studies, University of South Africa, Muckleneuk Ridge, P.O. Box 392, Pretoria (South Africa); Nanosciences African Network (NANOAFNET), iThemba LABS-National Research Foundation, 1 Old Faure Road, Somerset West 7129, P.O. Box 722, Somerset West, Western Cape (South Africa)

2014-12-01

Highlights: • Oxidation of the chromium thin film to chromium oxide by femtosecond laser with a fundamental wavelength of 1064 nm. • Solar absorber from chromium oxide that low percentage reflectance. • Femtosecond laser oxidation, with a de-focused laser. • Chromium oxide formation by femtosecond laser in normal ambient. - Abstract: In view of their potential applications as selective solar absorbers, chromium coatings on float glass substrates were nano/micro structured by femtosecond laser in air. Raman and X-rays diffraction investigations confirmed the formation of an ultra-porous α-Cr{sub 2}O{sub 3} layer at the surface; higher is the input laser power, enhanced is the crystallinity of the α-Cr{sub 2}O{sub 3} layer. The α-Cr{sub 2}O{sub 3} layer with the Cr underneath it in addition to the photo-induced porosity acted as a classical ceramic–metal nano-composite making the reflectance to decrease significantly within the spectral range of 190–1100 nm. The average reflectance decreased from 70 to 2%.

Effects of vacuum annealing on the optical and electrical properties of p-type copper-oxide thin-film transistors

International Nuclear Information System (INIS)

Sohn, Joonsung; Song, Sang-Hun; Kwon, Hyuck-In; Nam, Dong-Woo; Cho, In-Tak; Lee, Jong-Ho; Cho, Eou-Sik

2013-01-01

We have investigated the effects of vacuum annealing on the optical and electrical properties of the p-type copper-oxide thin-film transistors (TFTs). The vacuum annealing of the copper-oxide thin-film was performed using the RF magnetron sputter at various temperatures. From the x-ray diffraction and UV-vis spectroscopy, it is demonstrated that the high-temperature vacuum annealing reduces the copper-oxide phase from CuO to Cu 2 O, and increases the optical transmittance in the visible part of the spectrum. The fabricated copper-oxide TFT does not exhibit the switching behavior under low-temperature vacuum annealing conditions. However, as the annealing temperature increases, the drain current begins to be modulated by a gate voltage, and the TFT exhibits a high current on–off ratio over 10 4 as the vacuum annealing temperature increases over 450 °C. These results show that the vacuum annealing process can be an effective method of simultaneously improving the optical and electrical performances in p-type copper-oxide TFTs. (paper)

Stress-induced leakage current characteristics of PMOS fabricated by a new multi-deposition multi-annealing technique with full gate last process

International Nuclear Information System (INIS)

Wang Yanrong; Yang Hong; Xu Hao; Luo Weichun; Qi Luwei; Zhang Shuxiang; Wang Wenwu; Zhu Huilong; Zhao Chao; Chen Dapeng; Ye Tianchun; Yan Jiang

2017-01-01

In the process of high- k films fabrication, a novel multi deposition multi annealing (MDMA) technique is introduced to replace simple post deposition annealing. The leakage current decreases with the increase of the post deposition annealing (PDA) times. The equivalent oxide thickness (EOT) decreases when the annealing time(s) change from 1 to 2. Furthermore, the characteristics of SILC (stress-induced leakage current) for an ultra-thin SiO 2 /HfO 2 gate dielectric stack are studied systematically. The increase of the PDA time(s) from 1 to 2 can decrease the defect and defect generation rate in the HK layer. However, increasing the PDA times to 4 and 7 may introduce too much oxygen, therefore the type of oxygen vacancy changes. (paper)

Management of light absorption in extraordinary optical transmission based ultra-thin-film tandem solar cells

International Nuclear Information System (INIS)

Mashooq, Kishwar; Talukder, Muhammad Anisuzzaman

2016-01-01

Although ultra-thin-film solar cells can be attractive in reducing the cost, they suffer from low absorption as the thickness of the active layer is usually much smaller than the wavelength of incident light. Different nano-photonic techniques, including plasmonic structures, are being explored to increase the light absorption in ultra-thin-film solar cells. More than one layer of active materials with different energy bandgaps can be used in tandem to increase the light absorption as well. However, due to different amount of light absorption in different active layers, photo-generated currents in different active layers will not be the same. The current mismatch between the tandem layers makes them ineffective in increasing the efficiency. In this work, we investigate the light absorption properties of tandem solar cells with two ultra-thin active layers working as two subcells and a metal layer with periodically perforated holes in-between the two subcells. While the metal layer helps to overcome the current mismatch, the periodic holes increase the absorption of incident light by helping extraordinary optical transmission of the incident light from the top to the bottom subcell, and by coupling the incident light to plasmonic and photonic modes within ultra-thin active layers. We extensively study the effects of the geometry of holes in the intermediate metal layer on the light absorption properties of tandem solar cells with ultra-thin active layers. We also study how different metals in the intermediate layer affect the light absorption; how the geometry of holes in the intermediate layer affects the absorption when the active layer materials are changed; and how the intermediate metal layer affects the collection of photo-generated electron-hole pairs at the terminals. We find that in a solar cell with 6,6-phenyl C61-butyric acid methyl ester top subcell and copper indium gallium selenide bottom subcell, if the periodic holes in the metal layer are square or

Management of light absorption in extraordinary optical transmission based ultra-thin-film tandem solar cells

Energy Technology Data Exchange (ETDEWEB)

Mashooq, Kishwar; Talukder, Muhammad Anisuzzaman, E-mail: anis@eee.buet.ac.bd [Department of Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, Dhaka 1205 (Bangladesh)

2016-05-21

Although ultra-thin-film solar cells can be attractive in reducing the cost, they suffer from low absorption as the thickness of the active layer is usually much smaller than the wavelength of incident light. Different nano-photonic techniques, including plasmonic structures, are being explored to increase the light absorption in ultra-thin-film solar cells. More than one layer of active materials with different energy bandgaps can be used in tandem to increase the light absorption as well. However, due to different amount of light absorption in different active layers, photo-generated currents in different active layers will not be the same. The current mismatch between the tandem layers makes them ineffective in increasing the efficiency. In this work, we investigate the light absorption properties of tandem solar cells with two ultra-thin active layers working as two subcells and a metal layer with periodically perforated holes in-between the two subcells. While the metal layer helps to overcome the current mismatch, the periodic holes increase the absorption of incident light by helping extraordinary optical transmission of the incident light from the top to the bottom subcell, and by coupling the incident light to plasmonic and photonic modes within ultra-thin active layers. We extensively study the effects of the geometry of holes in the intermediate metal layer on the light absorption properties of tandem solar cells with ultra-thin active layers. We also study how different metals in the intermediate layer affect the light absorption; how the geometry of holes in the intermediate layer affects the absorption when the active layer materials are changed; and how the intermediate metal layer affects the collection of photo-generated electron-hole pairs at the terminals. We find that in a solar cell with 6,6-phenyl C61-butyric acid methyl ester top subcell and copper indium gallium selenide bottom subcell, if the periodic holes in the metal layer are square or

Ultra-thin silicon/electro-optic polymer hybrid waveguide modulators

Energy Technology Data Exchange (ETDEWEB)

Qiu, Feng; Spring, Andrew M. [Institute for Materials Chemistry and Engineering, Kyushu University, 6-1 Kasuga-koen Kasuga, Fukuoka 816-8580 (Japan); Sato, Hiromu [Department of Molecular and Material Sciences, Kyushu University, 6-1 Kasuga-koen Kasuga, Fukuoka 816-8580 (Japan); Maeda, Daisuke; Ozawa, Masa-aki; Odoi, Keisuke [Nissan Chemical Industries, Ltd., 2-10-1 Tuboi Nishi, Funabashi, Chiba 274-8507 (Japan); Aoki, Isao; Otomo, Akira [National Institute of Information and Communications Technology, 588-2 Iwaoka, Nishi-ku, Kobe 651-2492 (Japan); Yokoyama, Shiyoshi, E-mail: s-yokoyama@cm.kyushu-u.ac.jp [Institute for Materials Chemistry and Engineering, Kyushu University, 6-1 Kasuga-koen Kasuga, Fukuoka 816-8580 (Japan); Department of Molecular and Material Sciences, Kyushu University, 6-1 Kasuga-koen Kasuga, Fukuoka 816-8580 (Japan)

2015-09-21

Ultra-thin silicon and electro-optic (EO) polymer hybrid waveguide modulators have been designed and fabricated. The waveguide consists of a silicon core with a thickness of 30 nm and a width of 2 μm. The cladding is an EO polymer. Optical mode calculation reveals that 55% of the optical field around the silicon extends into the EO polymer in the TE mode. A Mach-Zehnder interferometer (MZI) modulator was prepared using common coplanar electrodes. The measured half-wave voltage of the MZI with 7 μm spacing and 1.3 cm long electrodes is 4.6 V at 1550 nm. The evaluated EO coefficient is 70 pm/V, which is comparable to that of the bulk EO polymer film. Using ultra-thin silicon is beneficial in order to reduce the side-wall scattering loss, yielding a propagation loss of 4.0 dB/cm. We also investigated a mode converter which couples light from the hybrid EO waveguide into a strip silicon waveguide. The calculation indicates that the coupling loss between these two devices is small enough to exploit the potential fusion of a hybrid EO polymer modulator together with a silicon micro-photonics device.

Low voltage operation of IGZO thin film transistors enabled by ultrathin Al2O3 gate dielectric

Science.gov (United States)

Ma, Pengfei; Du, Lulu; Wang, Yiming; Jiang, Ran; Xin, Qian; Li, Yuxiang; Song, Aimin

2018-01-01

An ultrathin, 5 nm, Al2O3 film grown by atomic-layer deposition was used as a gate dielectric for amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). The Al2O3 layer showed a low surface roughness of 0.15 nm, a low leakage current, and a high breakdown voltage of 6 V. In particular, a very high gate capacitance of 720 nF/cm2 was achieved, making it possible for the a-IGZO TFTs to not only operate at a low voltage of 1 V but also exhibit desirable properties including a low threshold voltage of 0.3 V, a small subthreshold swing of 100 mV/decade, and a high on/off current ratio of 1.2 × 107. Furthermore, even under an ultralow operation voltage of 0.6 V, well-behaved transistor characteristics were still observed with an on/off ratio as high as 3 × 106. The electron transport through the Al2O3 layer has also been analyzed, indicating the Fowler-Nordheim tunneling mechanism.

Thin film complementary metal oxide semiconductor (CMOS) device using a single-step deposition of the channel layer

KAUST Repository

Nayak, Pradipta K.

2014-04-14

We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n-and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications.

Heat wave propagation in a thin film irradiated by ultra-short laser pulses

International Nuclear Information System (INIS)

Yoo, Jae Gwon; Kim, Cheol Jung; Lim, C. H.

2004-01-01

A thermal wave solution of a hyperbolic heat conduction equation in a thin film is developed on the basis of the Green's function formalism. Numerical computations are carried out to investigate the temperature response and the propagation of the thermal wave inside a thin film due to a heat pulse generated by ultra-short laser pulses with various laser pulse durations and thickness of the film

Solid-state densification of spun-cast self-assembled monolayers for use in ultra-thin hybrid dielectrics

Energy Technology Data Exchange (ETDEWEB)

Hutchins, Daniel O.; Acton, Orb [Department of Materials Science and Engineering, University of Washington, Seattle, WA 98195 (United States); Weidner, Tobias [Department of Bioengineering, University of Washington, Seattle, WA 98195 (United States); Cernetic, Nathan [Department of Materials Science and Engineering, University of Washington, Seattle, WA 98195 (United States); Baio, Joe E. [Department of Chemical Engineering, University of Washington, Seattle, WA 98195 (United States); Castner, David G. [Department of Bioengineering, University of Washington, Seattle, WA 98195 (United States); Department of Chemical Engineering, University of Washington, Seattle, WA 98195 (United States); Ma, Hong, E-mail: hma@uw.edu [Department of Materials Science and Engineering, University of Washington, Seattle, WA 98195 (United States); Jen, Alex K.-Y., E-mail: ajen@uw.edu [Department of Materials Science and Engineering, University of Washington, Seattle, WA 98195 (United States); Department of Chemistry, University of Washington, Seattle, WA 98195 (United States)

2012-11-15

Highlights: Black-Right-Pointing-Pointer Rapid processing of SAM in ambient conditions is achieved by spin coating. Black-Right-Pointing-Pointer Thermal annealing of a bulk spun-cast molecular film is explored as a mechanism for SAM densification. Black-Right-Pointing-Pointer High-performance SAM-oxide hybrid dielectric is obtained utilizing a single wet processing step. - Abstract: Ultra-thin self-assembled monolayer (SAM)-oxide hybrid dielectrics have gained significant interest for their application in low-voltage organic thin film transistors (OTFTs). A [8-(11-phenoxy-undecyloxy)-octyl]phosphonic acid (PhO-19-PA) SAM on ultrathin AlO{sub x} (2.5 nm) has been developed to significantly enhance the dielectric performance of inorganic oxides through reduction of leakage current while maintaining similar capacitance to the underlying oxide structure. Rapid processing of this SAM in ambient conditions is achieved by spin coating, however, as-cast monolayer density is not sufficient for dielectric applications. Thermal annealing of a bulk spun-cast PhO-19-PA molecular film is explored as a mechanism for SAM densification. SAM density, or surface coverage, and order are examined as a function of annealing temperature. These SAM characteristics are probed through atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS), and near edge X-ray absorption fine structure spectroscopy (NEXAFS). It is found that at temperatures sufficient to melt the as-cast bulk molecular film, SAM densification is achieved; leading to a rapid processing technique for high performance SAM-oxide hybrid dielectric systems utilizing a single wet processing step. To demonstrate low-voltage devices based on this hybrid dielectric (with leakage current density of 7.7 Multiplication-Sign 10{sup -8} A cm{sup -2} and capacitance density of 0.62 {mu}F cm{sup -2} at 3 V), pentacene thin-film transistors (OTFTs) are fabricated and yield sub 2 V operation and charge carrier mobilites of up to

Cyclical Annealing Technique To Enhance Reliability of Amorphous Metal Oxide Thin Film Transistors.

Science.gov (United States)

Chen, Hong-Chih; Chang, Ting-Chang; Lai, Wei-Chih; Chen, Guan-Fu; Chen, Bo-Wei; Hung, Yu-Ju; Chang, Kuo-Jui; Cheng, Kai-Chung; Huang, Chen-Shuo; Chen, Kuo-Kuang; Lu, Hsueh-Hsing; Lin, Yu-Hsin

2018-02-26

This study introduces a cyclical annealing technique that enhances the reliability of amorphous indium-gallium-zinc-oxide (a-IGZO) via-type structure thin film transistors (TFTs). By utilizing this treatment, negative gate-bias illumination stress (NBIS)-induced instabilities can be effectively alleviated. The cyclical annealing provides several cooling steps, which are exothermic processes that can form stronger ionic bonds. An additional advantage is that the total annealing time is much shorter than when using conventional long-term annealing. With the use of cyclical annealing, the reliability of the a-IGZO can be effectively optimized, and the shorter process time can increase fabrication efficiency.

Design of Higher-k and More Stable Rare Earth Oxides as Gate Dielectrics for Advanced CMOS Devices

Directory of Open Access Journals (Sweden)

Yi Zhao

2012-08-01

Full Text Available High permittivity (k gate dielectric films are widely studied to substitute SiO₂ as gate oxides to suppress the unacceptable gate leakage current when the traditional SiO₂ gate oxide becomes ultrathin. For high-k gate oxides, several material properties are dominantly important. The first one, undoubtedly, is permittivity. It has been well studied by many groups in terms of how to obtain a higher permittivity for popular high-k oxides, like HfO₂ and La₂O₃. The second one is crystallization behavior. Although it’s still under the debate whether an amorphous film is definitely better than ploy-crystallized oxide film as a gate oxide upon considering the crystal boundaries induced leakage current, the crystallization behavior should be well understood for a high-k gate oxide because it could also, to some degree, determine the permittivity of the high-k oxide. Finally, some high-k gate oxides, especially rare earth oxides (like La₂O₃, are not stable in air and very hygroscopic, forming hydroxide. This topic has been well investigated in over the years and significant progresses have been achieved. In this paper, I will intensively review the most recent progresses of the experimental and theoretical studies for preparing higher-k and more stable, in terms of hygroscopic tolerance and crystallization behavior, Hf- and La-based ternary high-k gate oxides.

All-metallic electrically gated 2H-TaSe{sub 2} thin-film switches and logic circuits

Energy Technology Data Exchange (ETDEWEB)

Renteria, J.; Jiang, C.; Yan, Z. [Nano-Device Laboratory, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Samnakay, R.; Goli, P. [Materials Science and Engineering Program, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Pope, T. R.; Salguero, T. T. [Department of Chemistry, University of Georgia, Athens, Georgia 30602 (United States); Wickramaratne, D.; Lake, R. K. [Laboratory for Terascale and Terahertz Electronics, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Khitun, A. G. [Nano-Device Laboratory, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Materials Science and Engineering Program, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Balandin, A. A., E-mail: balandin@ee.ucr.edu [Nano-Device Laboratory, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Department of Chemistry, University of Georgia, Athens, Georgia 30602 (United States)

2014-01-21

We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe{sub 2} were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe{sub 2}–Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials.

Hydrogen ion sensors based on indium tin oxide thin film using radio frequency sputtering system

International Nuclear Information System (INIS)

Chiang, Jung-Lung; Jhan, Syun-Sheng; Hsieh, Shu-Chen; Huang, An-Li

2009-01-01

Indium tin oxide (ITO) thin films were deposited onto Si and SiO 2 /Si substrates using a radio frequency sputtering system with a grain size of 30-50 nm and thickness of 270-280 nm. ITO/Si and ITO/SiO 2 /Si sensing structures were achieved and connected to a standard metal-oxide-semiconductor field-effect transistor (MOSFET) as an ITO pH extended-gate field-effect transistor (ITO pH-EGFET). The semiconductor parameter analysis measurement (Keithley 4200) was utilized to measure the current-voltage (I-V) characteristics curves and study the sensing properties of the ITO pH-EGFET. The linear pH voltage sensitivities were about 41.43 and 43.04 mV/pH for the ITO/Si and ITO/SiO 2 /Si sensing structures, respectively. At the same time, both pH current sensitivities were about 49.86 and 51.73 μA/pH, respectively. Consequently, both sensing structures can be applied as extended-gate sensing heads. The separative structure is suitable for application as a disposable pH sensor.

Low operating voltage InGaZnO thin-film transistors based on Al2O3 high-k dielectrics fabricated using pulsed laser deposition

International Nuclear Information System (INIS)

Geng, G. Z.; Liu, G. X.; Zhang, Q.; Shan, F. K.; Lee, W. J.; Shin, B. C.; Cho, C. R.

2014-01-01

Low-voltage-driven amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) with an Al 2 O 3 dielectric were fabricated on a Si substrate by using pulsed laser deposition. Both Al 2 O 3 and IGZO thin films are amorphous, and the thin films have very smooth surfaces. The Al 2 O 3 gate dielectric exhibits a very low leakage current density of 1.3 x 10 -8 A/cm 2 at 5 V and a high capacitance density of 60.9 nF/cm 2 . The IGZO TFT with a structure of Ni/IGZO/Al 2 O 3 /Si exhibits high performance with a low threshold voltage of 1.18 V, a high field effect mobility of 20.25 cm 2 V -1 s -1 , an ultra small subthreshold swing of 87 mV/decade, and a high on/off current ratio of 3 x 10 7 .

The growth and evolution of thin oxide films on delta-plutonium surfaces

Energy Technology Data Exchange (ETDEWEB)

Garcia Flores, Harry G [Los Alamos National Laboratory; Pugmire, David L [Los Alamos National Laboratory

2009-01-01

The common oxides of plutonium are the dioxide (PuO{sub 2}) and the sesquioxide (Pu{sub 2}O{sub 3}). The structure of an oxide on plutonium metal under air at room temperature is typically described as a thick PuO{sub 2} film at the gas-oxide interface with a thinner PuO{sub 2} film near the oxide-metal substrate interface. In a reducing environment, such as ultra high vacuum, the dioxide (Pu{sup 4+}; O/Pu = 2.0) readily converts to the sesquioxide (Pu{sup 3+}; O/Pu = 1.5) with time. In this work, the growth and evolution of thin plutonium oxide films is studied with x-ray photoelectron spectroscopy (XPS) under varying conditions. The results indicate that, like the dioxide, the sesquioxide is not stable on a very clean metal substrate under reducing conditions, resulting in substoichiometric films (Pu{sub 2}O{sub 3-y}). The Pu{sub 2}O{sub 3-y} films prepared exhibit a variety of stoichiometries (y = 0.2-1) as a function of preparation conditions, highlighting the fact that caution must be exercised when studying plutonium oxide surfaces under these conditions and interpreting resulting data.

Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

Energy Technology Data Exchange (ETDEWEB)

Dib, E., E-mail: elias.dib@for.unipi.it [Dipartimento di Ingegneria dell' Informazione, Università di Pisa, 56122 Pisa (Italy); Carrillo-Nuñez, H. [Integrated Systems Laboratory ETH Zürich, Gloriastrasse 35, 8092 Zürich (Switzerland); Cavassilas, N.; Bescond, M. [IM2NP, UMR CNRS 6242, Bât. IRPHE, Technopôle de Château-Gombert, 13384 Marseille Cedex 13 (France)

2016-01-28

Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations.

Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

International Nuclear Information System (INIS)

Dib, E.; Carrillo-Nuñez, H.; Cavassilas, N.; Bescond, M.

2016-01-01

Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations

Effect of ZnO channel thickness on the device behaviour of nonvolatile memory thin film transistors with double-layered gate insulators of Al2O3 and ferroelectric polymer

International Nuclear Information System (INIS)

Yoon, Sung-Min; Yang, Shin-Hyuk; Ko Park, Sang-Hee; Jung, Soon-Won; Cho, Doo-Hee; Byun, Chun-Won; Kang, Seung-Youl; Hwang, Chi-Sun; Yu, Byoung-Gon

2009-01-01

Poly(vinylidene fluoride trifluoroethylene) and ZnO were employed for nonvolatile memory thin film transistors as ferroelectric gate insulator and oxide semiconducting channel layers, respectively. It was proposed that the thickness of the ZnO layer be carefully controlled for realizing the lower programming voltage, because the serially connected capacitor by the formation of a fully depleted ZnO channel had a critical effect on the off programming voltage. The fabricated memory transistor with Al/P(VDF-TrFE) (80 nm)/Al 2 O 3 (4 nm)/ZnO (5 nm) exhibits encouraging behaviour such as a memory window of 3.8 V at the gate voltage of -10 to 12 V, and 10 7 on/off ratio, and a gate leakage current of 10 -11 A.

Investigation of Rapid Low-Power Microwave-Induction Heating Scheme on the Cross-Linking Process of the Poly(4-vinylphenol) for the Gate Insulator of Pentacene-Based Thin-Film Transistors

Science.gov (United States)

Fan, Ching-Lin; Shang, Ming-Chi; Wang, Shea-Jue; Hsia, Mao-Yuan; Lee, Win-Der; Huang, Bohr-Ran

2017-01-01

In this study, a proposed Microwave-Induction Heating (MIH) scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO) metal below the Poly(4-vinylphenol) (PVP) film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit) was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min) and low-power microwave-irradiation (50 W). PMID:28773101

Investigation of Rapid Low-Power Microwave-Induction Heating Scheme on the Cross-Linking Process of the Poly(4-vinylphenol for the Gate Insulator of Pentacene-Based Thin-Film Transistors

Directory of Open Access Journals (Sweden)

Ching-Lin Fan

2017-07-01

Full Text Available In this study, a proposed Microwave-Induction Heating (MIH scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO metal below the Poly(4-vinylphenol (PVP film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min and low-power microwave-irradiation (50 W.

Ultra-Thin Solid-State Nanopores: Fabrication and Applications

Science.gov (United States)

Kuan, Aaron Tzeyang

Solid-state nanopores are a nanofluidic platform with unique advantages for single-molecule analysis and filtration applications. However, significant improvements in device performance and scalable fabrication methods are needed to make nanopore devices competitive with existing technologies. This dissertation investigates the potential advantages of ultra-thin nanopores in which the thickness of the membrane is significantly smaller than the nanopore diameter. Novel, scalable fabrication methods were first developed and then utilized to examine device performance for water filtration and single molecule sensing applications. Fabrication of nanometer-thin pores in silicon nitride membranes was achieved using a feedback-controlled ion beam method in which ion sputtering is arrested upon detection of the first few ions that drill through the membrane. Performing fabrication at liquid nitrogen temperatures prevents surface atom rearrangements that have previously complicated similar processes. A novel cross-sectional imaging method was also developed to allow careful examination of the full nanopore geometry. Atomically-thin graphene nanopores were fabricated via an electrical pulse method in which sub-microsecond electrical pulses applied across a graphene membrane in electrolyte solution are used to create a defect in the membrane and controllably enlarge it into a nanopore. This method dramatically increases the accuracy and reliability of graphene nanopore production, allowing consistent production of single nanopores down to subnanometer sizes. In filtration applications in which nanopores are used to selectively restrict the passage of dissolved contaminants, ultra-thin nanopores minimize the flow resistance, increasing throughput and energy-efficiency. The ability of graphene nanopores to separate different ions was characterized via ionic conductance and reversal potential measurements. Graphene nanopores were observed to conduct cations preferentially over

Accurate characterization of organic thin film transistors in the presence of gate leakage current

Directory of Open Access Journals (Sweden)

Vinay K. Singh

2011-12-01

Full Text Available The presence of gate leakage through polymer dielectric in organic thin film transistors (OTFT prevents accurate estimation of transistor characteristics especially in subthreshold regime. To mitigate the impact of gate leakage on transfer characteristics and allow accurate estimation of mobility, subthreshold slope and on/off current ratio, a measurement technique involving simultaneous sweep of both gate and drain voltages is proposed. Two dimensional numerical device simulation is used to illustrate the validity of the proposed technique. Experimental results obtained with Pentacene/PMMA OTFT with significant gate leakage show a low on/off current ratio of ∼ 102 and subthreshold is 10 V/decade obtained using conventional measurement technique. The proposed technique reveals that channel on/off current ratio is more than two orders of magnitude higher at ∼104 and subthreshold slope is 4.5 V/decade.

Integration of plasmonic Ag nanoparticles as a back reflector in ultra-thin Cu(In,Ga)Se_2 solar cells

International Nuclear Information System (INIS)

Yin, Guanchao; Steigert, Alexander; Andrae, Patrick; Goebelt, Manuela; Latzel, Michael; Manley, Phillip; Lauermann, Iver; Christiansen, Silke; Schmid, Martina

2015-01-01

Graphical abstract: Plasmonic Ag nanoparticles as a back reflector in ultra-thin Cu(In,Ga)Se_2 (CIGSe) solar cells are investigated. Ag diffusion is successfully passivated by reducing the substrate temperature and introducing a 50 nm atomic layer deposition (ALD) prepared Al_2O_3 film. This clears the thermal obstacle in incorporating Ag nanoparticles in CIGSe solar cells. Simulations show that Ag nanoparticles have the potential to greatly enhance the light absorption in ultra-thin CIGSe solar cells. - Highlights: • Ag nanoparticles are able to diffuse through ITO substrate into CIGSe absorber even at a low substrate temperature of 440 °C. • The direction (inserting a dielectric passivation layer) to thermally block the Ag diffusion and the requirements for the passivation layer are indicated and generalized. • An atomic layer deposited Al_2O_3 layer is experimentally proved to be able to thermally passivate the Ag nanoparticles, which clears the thermal obstacle in using Ag nanoparticles as a back reflector in ultra-thin CIGSe solar cells. • It is theoretically proved that the Ag nanoparticles as a back reflector have the potential to effectively enhance the absorption in ultra-thin CIGSe solar cells. - Abstract: Integration of plasmonic Ag nanoparticles as a back reflector in ultra-thin Cu(In,Ga)Se_2 (CIGSe) solar cells is investigated. X-ray photoelectron spectroscopy results show that Ag nanoparticles underneath a Sn:In_2O_3 back contact could not be thermally passivated even at a low substrate temperature of 440 °C during CIGSe deposition. It is shown that a 50 nm thick Al_2O_3 film prepared by atomic layer deposition is able to block the diffusion of Ag, clearing the thermal obstacle in utilizing Ag nanoparticles as a back reflector in ultra-thin CIGSe solar cells. Via 3-D finite element optical simulation, it is proved that the Ag nanoparticles show the potential to contribute the effective absorption in CIGSe solar cells.

In situ X-ray synchrotron study of organic semiconductor ultra-thin films growth

International Nuclear Information System (INIS)

Moulin, J.-F.; Dinelli, F.; Massi, M.; Albonetti, C.; Kshirsagar, R.; Biscarini, F.

2006-01-01

In this work we present an X-ray diffraction study of the early stages of growth of an organic semiconductor (sexithiophene, T 6 ) thin film prepared by high vacuum sublimation. Specular reflectometry and grazing incidence X-ray diffraction were used to monitor the formation of T 6 films on silicon oxide. Our results show that T 6 grows as a crystalline layer from the beginning of the evaporation. The reflectometry analysis suggests that, in the range of rates and temperatures studied, the growth is never layer by layer but rather 3D in nature. In-plane GIXD has allowed us to observe for the first time a thin film phase of T 6 formed of molecules standing normal to the substrate and arranged in a compressed unit cell with respect to the bulk, i.e. the unit cell parameters b and c are relatively smaller. We have followed the dynamics of formation of this new phase and identified the threshold of appearance of the bulk phase, which occurs above ∼5-6 monolayers. These results are relevant to the problem of organic thin film transistors, for which we have previously demonstrated experimentally that only the first two monolayers of T 6 films are involved in the electrical transport. The layers above the second one do not effectively contribute to charge mobility, either because they are more 'disordered' or because of a screening of the gate field

Manganese oxide micro-supercapacitors with ultra-high areal capacitance

Science.gov (United States)

Wang, Xu; Myers, Benjamin D.; Yan, Jian; Shekhawat, Gajendra; Dravid, Vinayak; Lee, Pooi See

2013-05-01

A symmetric micro-supercapacitor is constructed by electrochemically depositing manganese oxide onto micro-patterned current collectors. High surface-to-volume ratio of manganese oxide and short diffusion distance between electrodes give an ultra-high areal capacitance of 56.3 mF cm-2 at a current density of 27.2 μA cm-2.A symmetric micro-supercapacitor is constructed by electrochemically depositing manganese oxide onto micro-patterned current collectors. High surface-to-volume ratio of manganese oxide and short diffusion distance between electrodes give an ultra-high areal capacitance of 56.3 mF cm-2 at a current density of 27.2 μA cm-2. Electronic supplementary information (ESI) available: Experimental procedures; optical images of micro-supercapacitors; areal capacitances of samples M-0.3C, M-0.6C and M-0.9C; illustration of interdigital finger electrodes; Nyquist plot of Co(OH)2 deposited on micro-electrodes. See DOI: 10.1039/c3nr00210a

Role of Electrical Double Layer Structure in Ionic Liquid Gated Devices.

Science.gov (United States)

Black, Jennifer M; Come, Jeremy; Bi, Sheng; Zhu, Mengyang; Zhao, Wei; Wong, Anthony T; Noh, Joo Hyon; Pudasaini, Pushpa R; Zhang, Pengfei; Okatan, Mahmut Baris; Dai, Sheng; Kalinin, Sergei V; Rack, Philip D; Ward, Thomas Zac; Feng, Guang; Balke, Nina

2017-11-22

Ionic liquid gating of transition metal oxides has enabled new states (magnetic, electronic, metal-insulator), providing fundamental insights into the physics of strongly correlated oxides. However, despite much research activity, little is known about the correlation of the structure of the liquids in contact with the transition metal oxide surface, its evolution with the applied electric potential, and its correlation with the measured electronic properties of the oxide. Here, we investigate the structure of an ionic liquid at a semiconducting oxide interface during the operation of a thin film transistor where the electrical double layer gates the device using experiment and theory. We show that the transition between the ON and OFF states of the amorphous indium gallium zinc oxide transistor is accompanied by a densification and preferential spatial orientation of counterions at the oxide channel surface. This process occurs in three distinct steps, corresponding to ion orientations, and consequently, regimes of different electrical conductivity. The reason for this can be found in the surface charge densities on the oxide surface when different ion arrangements are present. Overall, the field-effect gating process is elucidated in terms of the interfacial ionic liquid structure, and this provides unprecedented insight into the working of a liquid gated transistor linking the nanoscopic structure to the functional properties. This knowledge will enable both new ionic liquid design as well as advanced device concepts.

Annealing of SnO2 thin films by ultra-short laser pulses

NARCIS (Netherlands)

Scorticati, D.; Illiberi, A.; Bor, T.; Eijt, S.W.H.; Schut, H.; Römer, G.R.B.E.; Lange, D.F. de; Huis In't Veld, A.J.

2014-01-01

Post-deposition annealing by ultra-short laser pulses can modify the optical properties of SnO2 thin films by means of thermal processing. Industrial grade SnO2 films exhibited improved optical properties after picosecond laser irradiation, at the expense of a slightly increased sheet resistance

Structural study and fabrication of nano-pattern on ultra thin film of Ag grown by magnetron sputtering

International Nuclear Information System (INIS)

Banerjee, S.; Mukherjee, S.; Kundu, S.

2001-01-01

We present the structural study of ultra thin Ag films using grazing incidence x-ray reflectivity and the modification of these films with the tip of an atomic force microscope. Ag thin films are deposited using dc magnetron sputtering on a Si(001) substrate. Initially, the growth of the film is carpet like and above a certain thickness (∼42 A) the film structure changes to form mounds. This ultra thin film of Ag having carpet-like growth can be modified by the tip of an atomic force microscope, which occurs due to the porous nature of the film. A periodic pattern of nanometer dimensions has been fabricated on this film using the atomic force microscope tip. (author)

Towards ultra-thin plasmonic silicon wafer solar cells with minimized efficiency loss.

Science.gov (United States)

Zhang, Yinan; Stokes, Nicholas; Jia, Baohua; Fan, Shanhui; Gu, Min

2014-05-13

The cost-effectiveness of market-dominating silicon wafer solar cells plays a key role in determining the competiveness of solar energy with other exhaustible energy sources. Reducing the silicon wafer thickness at a minimized efficiency loss represents a mainstream trend in increasing the cost-effectiveness of wafer-based solar cells. In this paper we demonstrate that, using the advanced light trapping strategy with a properly designed nanoparticle architecture, the wafer thickness can be dramatically reduced to only around 1/10 of the current thickness (180 μm) without any solar cell efficiency loss at 18.2%. Nanoparticle integrated ultra-thin solar cells with only 3% of the current wafer thickness can potentially achieve 15.3% efficiency combining the absorption enhancement with the benefit of thinner wafer induced open circuit voltage increase. This represents a 97% material saving with only 15% relative efficiency loss. These results demonstrate the feasibility and prospect of achieving high-efficiency ultra-thin silicon wafer cells with plasmonic light trapping.

Ultra-thin flexible polyimide neural probe embedded in a dissolvable maltose-coated microneedle

International Nuclear Information System (INIS)

Xiang, Zhuolin; Yen, Shih-Cheng; Zhang, Songsong; Lee, Chengkuo; Xue, Ning; Sun, Tao; Tsang, Wei Mong; Liao, Lun-De; Thakor, Nitish V

2014-01-01

The ultra-thin flexible polyimide neural probe can reduce the glial sheath growth on the probe body while its flexibility can minimize the micromotion between the probe and brain tissue. To provide sufficient stiffness for penetration purposes, we developed a drawing lithography technology for uniform maltose coating to make the maltose-coated polyimide neural probe become a stiff microneedle. The coating thicknesses under different temperature and the corresponding stiffness are studied. It has been proven that the coated maltose is dissolved by body fluids after implantation for a few seconds. Moreover, carbon nanotubes are coated on the neural probe recording electrodes to improve the charge delivery ability and reduce the impedance. Last but not least, the feasibility and recording characteristic of this ultra-thin polyimide neural probe embedded in a maltose-coated microneedle are further demonstrated by in vivo tests. (paper)

Ultra-thin flexible polyimide neural probe embedded in a dissolvable maltose-coated microneedle

Science.gov (United States)

Xiang, Zhuolin; Yen, Shih-Cheng; Xue, Ning; Sun, Tao; Mong Tsang, Wei; Zhang, Songsong; Liao, Lun-De; Thakor, Nitish V.; Lee, Chengkuo

2014-06-01

The ultra-thin flexible polyimide neural probe can reduce the glial sheath growth on the probe body while its flexibility can minimize the micromotion between the probe and brain tissue. To provide sufficient stiffness for penetration purposes, we developed a drawing lithography technology for uniform maltose coating to make the maltose-coated polyimide neural probe become a stiff microneedle. The coating thicknesses under different temperature and the corresponding stiffness are studied. It has been proven that the coated maltose is dissolved by body fluids after implantation for a few seconds. Moreover, carbon nanotubes are coated on the neural probe recording electrodes to improve the charge delivery ability and reduce the impedance. Last but not least, the feasibility and recording characteristic of this ultra-thin polyimide neural probe embedded in a maltose-coated microneedle are further demonstrated by in vivo tests.

Oxidation of ruthenium thin films using atomic oxygen

Energy Technology Data Exchange (ETDEWEB)

McCoy, A.P.; Bogan, J.; Brady, A.; Hughes, G.

2015-12-31

In this study, the use of atomic oxygen to oxidise ruthenium thin films is assessed. Atomic layer deposited (ALD) ruthenium thin films (~ 3 nm) were exposed to varying amounts of atomic oxygen and the results were compared to the impact of exposures to molecular oxygen. X-ray photoelectron spectroscopy studies reveal substantial oxidation of metallic ruthenium films to RuO{sub 2} at exposures as low as ~ 10{sup 2} L at 575 K when atomic oxygen was used. Higher exposures of molecular oxygen resulted in no metal oxidation highlighting the benefits of using atomic oxygen to form RuO{sub 2}. Additionally, the partial oxidation of these ruthenium films occurred at temperatures as low as 293 K (room temperature) in an atomic oxygen environment. - Highlights: • X-ray photoelectron spectroscopy study of the oxidation of Ru thin films • Oxidation of Ru thin films using atomic oxygen • Comparison between atomic oxygen and molecular oxygen treatments on Ru thin films • Fully oxidised RuO{sub 2} thin films formed with low exposures to atomic oxygen.

Lateral protonic/electronic hybrid oxide thin-film transistor gated by SiO{sub 2} nanogranular films

Energy Technology Data Exchange (ETDEWEB)

Zhu, Li Qiang, E-mail: lqzhu@nimte.ac.cn; Chao, Jin Yu; Xiao, Hui [Ningbo Institute of Material Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201 (China)

2014-12-15

Ionic/electronic interaction offers an additional dimension in the recent advancements of condensed materials. Here, lateral gate control of conductivities of indium-zinc-oxide (IZO) films is reported. An electric-double-layer (EDL) transistor configuration was utilized with a phosphorous-doped SiO{sub 2} nanogranular film to provide a strong lateral electric field. Due to the strong lateral protonic/electronic interfacial coupling effect, the IZO EDL transistor could operate at a low-voltage of 1 V. A resistor-loaded inverter is built, showing a high voltage gain of ∼8 at a low supply voltage of 1 V. The lateral ionic/electronic coupling effects are interesting for bioelectronics and portable electronics.

Characterization of a high performance ultra-thin heat pipe cooling module for mobile hand held electronic devices

Science.gov (United States)

Ahamed, Mohammad Shahed; Saito, Yuji; Mashiko, Koichi; Mochizuki, Masataka

2017-11-01

In recent years, heat pipes have been widely used in various hand held mobile electronic devices such as smart phones, tablet PCs, digital cameras. With the development of technology these devices have different user friendly features and applications; which require very high clock speeds of the processor. In general, a high clock speed generates a lot of heat, which needs to be spreaded or removed to eliminate the hot spot on the processor surface. However, it is a challenging task to achieve proper cooling of such electronic devices mentioned above because of their confined spaces and concentrated heat sources. Regarding this challenge, we introduced an ultra-thin heat pipe; this heat pipe consists of a special fiber wick structure named as "Center Fiber Wick" which can provide sufficient vapor space on the both sides of the wick structure. We also developed a cooling module that uses this kind of ultra-thin heat pipe to eliminate the hot spot issue. This cooling module consists of an ultra-thin heat pipe and a metal plate. By changing the width, the flattened thickness and the effective length of the ultra-thin heat pipe, several experiments have been conducted to characterize the thermal properties of the developed cooling module. In addition, other experiments were also conducted to determine the effects of changes in the number of heat pipes in a single module. Characterization and comparison of the module have also been conducted both experimentally and theoretically.

The kinetics of dewetting ultra-thin Si layers from silicon dioxide

International Nuclear Information System (INIS)

Aouassa, M; Favre, L; Ronda, A; Berbezier, I; Maaref, H

2012-01-01

In this study, we investigate the kinetically driven dewetting of ultra-thin silicon films on silicon oxide substrate under ultra-high vacuum, at temperatures where oxide desorption and silicon lost could be ruled out. We show that in ultra-clean experimental conditions, the three different regimes of dewetting, namely (i) nucleation of holes, (ii) film retraction and (iii) coalescence of holes, can be quantitatively measured as a function of temperature, time and thickness. For a nominal flat clean sample these three regimes co-exist during the film retraction until complete dewetting. To discriminate their roles in the kinetics of dewetting, we have compared the dewetting evolution of flat unpatterned crystalline silicon layers (homogeneous dewetting), patterned crystalline silicon layers (heterogeneous dewetting) and amorphous silicon layers (crystallization-induced dewetting). The first regime (nucleation) is described by a breaking time which follows an exponential evolution with temperature with an activation energy E H ∼ 3.2 eV. The second regime (retraction) is controlled by surface diffusion of matter from the edges of the holes. It involves a very fast redistribution of matter onto the flat Si layer, which prevents the formation of a rim on the edges of the holes during both heterogeneous and homogeneous dewetting. The time evolution of the linear dewetting front measured during heterogeneous dewetting follows a characteristic power law x ∼ t 0.45 consistent with a surface diffusion-limited mechanism. It also evolves as x ∼ h -1 as expected from mass conservation in the absence of thickened rim. When the surface energy is isotropic (during dewetting of amorphous Si) the dynamics of dewetting is considerably modified: firstly, there is no measurable breaking time; secondly, the speed of dewetting is two orders of magnitude larger than for crystalline Si; and thirdly, the activation energy of dewetting is much smaller due to the different driving

Phosphorus oxide gate dielectric for black phosphorus field effect transistors

Science.gov (United States)

Dickerson, W.; Tayari, V.; Fakih, I.; Korinek, A.; Caporali, M.; Serrano-Ruiz, M.; Peruzzini, M.; Heun, S.; Botton, G. A.; Szkopek, T.

2018-04-01

The environmental stability of the layered semiconductor black phosphorus (bP) remains a challenge. Passivation of the bP surface with phosphorus oxide, POx, grown by a reactive ion etch with oxygen plasma is known to improve photoluminescence efficiency of exfoliated bP flakes. We apply phosphorus oxide passivation in the fabrication of bP field effect transistors using a gate stack consisting of a POx layer grown by reactive ion etching followed by atomic layer deposition of Al2O3. We observe room temperature top-gate mobilities of 115 cm2 V-1 s-1 in ambient conditions, which we attribute to the low defect density of the bP/POx interface.

Light-induced hysteresis and recovery behaviors in photochemically activated solution-processed metal-oxide thin-film transistors

Energy Technology Data Exchange (ETDEWEB)

Jo, Jeong-Wan; Park, Sung Kyu, E-mail: yhkim76@skku.edu, E-mail: skpark@cau.ac.kr [School of Electrical and Electronics Engineering, Chung-Ang University, Seoul 156-756 (Korea, Republic of); Kim, Yong-Hoon, E-mail: yhkim76@skku.edu, E-mail: skpark@cau.ac.kr [School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon 440-746 (Korea, Republic of); SKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon 440-746 (Korea, Republic of)

2014-07-28

In this report, photo-induced hysteresis, threshold voltage (V{sub T}) shift, and recovery behaviors in photochemically activated solution-processed indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) are investigated. It was observed that a white light illumination caused negative V{sub T} shift along with creation of clockwise hysteresis in electrical characteristics which can be attributed to photo-generated doubly ionized oxygen vacancies at the semiconductor/gate dielectric interface. More importantly, the photochemically activated IGZO TFTs showed much reduced overall V{sub T} shift compared to thermally annealed TFTs. Reduced number of donor-like interface states creation under light illumination and more facile neutralization of ionized oxygen vacancies by electron capture under positive gate potential are claimed to be the origin of the less V{sub T} shift in photochemically activated TFTs.

Oxide Semiconductor-Based Flexible Organic/Inorganic Hybrid Thin-Film Transistors Fabricated on Polydimethylsiloxane Elastomer.

Science.gov (United States)

Jung, Soon-Won; Choi, Jeong-Seon; Park, Jung Ho; Koo, Jae Bon; Park, Chan Woo; Na, Bock Soon; Oh, Ji-Young; Lim, Sang Chul; Lee, Sang Seok; Chu, Hye Yong

2016-03-01

We demonstrate flexible organic/inorganic hybrid thin-film transistors (TFTs) on a polydimethysilox- ane (PDMS) elastomer substrate. The active channel and gate insulator of the hybrid TFT are composed of In-Ga-Zn-O (IGZO) and blends of poly(vinylidene fluoride-trifluoroethylene) [P(VDF- TrFE)] with poly(methyl methacrylate) (PMMA), respectively. It has been confirmed that the fabri- cated TFT display excellent characteristics: the recorded field-effect mobility, sub-threshold voltage swing, and I(on)/I(off) ratio were approximately 0.35 cm2 V(-1) s(-1), 1.5 V/decade, and 10(4), respectively. These characteristics did not experience any degradation at a bending radius of 15 mm. These results correspond to the first demonstration of a hybrid-type TFT using an organic gate insulator/oxide semiconducting active channel structure fabricated on PDMS elastomer, and demonstrate the feasibility of a promising device in a flexible electronic system.

Controlling the Performance of P-type Cu2O/SnO Bilayer Thin-Film Transistors by Adjusting the Thickness of the Copper Oxide Layer

KAUST Repository

Al-Jawhari, Hala A.

2014-11-11

The effect of copper oxide layer thickness on the performance of Cu2O/SnO bilayer thin-film transistors was investigated. By using sputtered Cu2O films produced at an oxygen partial pressure, Opp, of 10% as the upper layer and 3% Opp SnO films as the lower layer we built a matrix of bottom-gate Cu2O/SnO bilayer thin-film transistors of different thickness. We found that the thickness of the Cu2O layer is of major importance in oxidation of the SnO layer underneath. The thicker the Cu2O layer, the more the underlying SnO layer is oxidized, and, hence, the more transistor mobility is enhanced at a specific temperature. Both device performance and the annealing temperature required could be adjusted by controlling the thickness of each layer of Cu2O/SnO bilayer thin-film transistors.

High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

KAUST Repository

Sevilla, Galo T.; Almuslem, A. S.; Gumus, Abdurrahman; Hussain, Aftab M.; Hussain, Aftab M.; Cruz, Melvin; Hussain, Muhammad Mustafa

2016-01-01

shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using

PREFACE: Proceedings Symposium G of E-MRS Spring Meeting on Fundamentals and Technology of Multifunctional Oxide Thin Films

Science.gov (United States)

2010-07-01

Oxide materials exhibit a large variety of functional properties that are useful in a plethora of applications. Symposium G focused on oxide thin films that include dielectric or switching properties. Its program mirrored very well the strong worldwide search for high-K thin films for gate, memory, and on-chip capacitors, as well as the emerging field of functional thin films for MEMS. A complete session was devoted to the colossal effect of dielectric response in (Ca,Cu)TiO3, representing the major European research groups in this field. A comprehensive overview on this phenomenon was given by D Sinclair J Wolfman presented the latest results on CCTO thin films obtained by wafer scale pulsed laser deposition. A Loidl showed the analytical power of dielectric spectroscopy when covering the complete frequency range from 1-1012 Hz, i.e. from space charge to phonon contributions at the example of CCTO. Another session was devoted to applications in non-volatile memories, covering various effects including ferroelectric and resistive switching, the complex behavior of oxide tunnel junctions (H Kohlstedt), the possibility to manipulate the magnetic state of a 2d-electron gas by the polarization of an adjacent ferroelectric gate (I Stolitchnov). Latest advancements in ALD processing for high-K thin films in dynamic RAM were reported by S Ramanathan. The advancement of piezoelectric PZT thin film MEMS devices was well documented by outstanding talks on their developments in industry (M Klee, F Tyholdt), new possibilities in GHz filters (T Matshushima), advancements in sol-gel processing (B Tuttle, H Suzuki), and low temperature integration approaches by UV light curing (S Trolier-McKinstry). Recent advances in incipient ferroelectric thin films and nano composites for tunable capacitors in microwave applications were present by A Vorobiev and T Yamada. Integrated electro-optics is another field to be conquered by thin film structures. The impressive progress made in this

Atomic-Layer-Deposited SnO2 as Gate Electrode for Indium-Free Transparent Electronics

KAUST Repository

Alshammari, Fwzah Hamud

2017-08-04

Atomic-layer-deposited SnO2 is used as a gate electrode to replace indium tin oxide (ITO) in thin-film transistors and circuits for the first time. The SnO2 films deposited at 200 °C show low electrical resistivity of ≈3.1 × 10−3 Ω cm with ≈93% transparency in most of the visible range of the electromagnetic spectrum. Thin-film transistors fabricated with SnO2 gates show excellent transistor properties including saturation mobility of 15.3 cm2 V−1 s−1, a low subthreshold swing of ≈130 mV dec−1, a high on/off ratio of ≈109, and an excellent electrical stability under constant-voltage stressing conditions to the gate terminal. Moreover, the SnO2-gated thin-film transistors show excellent electrical characteristics when used in electronic circuits such as negative channel metal oxide semiconductor (NMOS) inverters and ring oscillators. The NMOS inverters exhibit a low propagation stage delay of ≈150 ns with high DC voltage gain of ≈382. A high oscillation frequency of ≈303 kHz is obtained from the output sinusoidal signal of the 11-stage NMOS inverter-based ring oscillators. These results show that SnO2 can effectively replace ITO in transparent electronics and sensor applications.

Unidirectional oxide hetero-interface thin-film diode

International Nuclear Information System (INIS)

Park, Youngmin; Lee, Eungkyu; Lee, Jinwon; Lim, Keon-Hee; Kim, Youn Sang

2015-01-01

The unidirectional thin-film diode based on oxide hetero-interface, which is well compatible with conventional thin-film fabrication process, is presented. With the metal anode/electron-transporting oxide (ETO)/electron-injecting oxide (EIO)/metal cathode structure, it exhibits that electrical currents ohmically flow at the ETO/EIO hetero-interfaces for only positive voltages showing current density (J)-rectifying ratio of ∼10 5 at 5 V. The electrical properties (ex, current levels, and working device yields) of the thin-film diode (TFD) are systematically controlled by changing oxide layer thickness. Moreover, we show that the oxide hetero-interface TFD clearly rectifies an AC input within frequency (f) range of 10 2  Hz < f < 10 6  Hz, providing a high feasibility for practical applications

Unidirectional oxide hetero-interface thin-film diode

Energy Technology Data Exchange (ETDEWEB)

Park, Youngmin; Lee, Eungkyu; Lee, Jinwon; Lim, Keon-Hee [Program in Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Seoul 151-742 (Korea, Republic of); Kim, Youn Sang, E-mail: younskim@snu.ac.kr [Program in Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Seoul 151-742 (Korea, Republic of); Advanced Institute of Convergence Technology, Gyeonggi-do 443-270 (Korea, Republic of)

2015-10-05

The unidirectional thin-film diode based on oxide hetero-interface, which is well compatible with conventional thin-film fabrication process, is presented. With the metal anode/electron-transporting oxide (ETO)/electron-injecting oxide (EIO)/metal cathode structure, it exhibits that electrical currents ohmically flow at the ETO/EIO hetero-interfaces for only positive voltages showing current density (J)-rectifying ratio of ∼10{sup 5} at 5 V. The electrical properties (ex, current levels, and working device yields) of the thin-film diode (TFD) are systematically controlled by changing oxide layer thickness. Moreover, we show that the oxide hetero-interface TFD clearly rectifies an AC input within frequency (f) range of 10{sup 2} Hz < f < 10{sup 6} Hz, providing a high feasibility for practical applications.

Ultra-high current density thin-film Si diode

Science.gov (United States)

Wang, Qi [Littleton, CO

2008-04-22

A combination of a thin-film .mu.c-Si and a-Si:H containing diode structure characterized by an ultra-high current density that exceeds 1000 A/cm.sup.2, comprising: a substrate; a bottom metal layer disposed on the substrate; an n-layer of .mu.c-Si deposited the bottom metal layer; an i-layer of .mu.c-Si deposited on the n-layer; a buffer layer of a-Si:H deposited on the i-layer, a p-layer of .mu.c-Si deposited on the buffer layer; and a top metal layer deposited on the p-layer.

Time response of fast-gated microchannel plates used as x-ray detectors

International Nuclear Information System (INIS)

Turner, R.E.; Bell, P.; Hanks, R.; Kilkenny, J.D.; Landen, N.; Power, G.; Wiedwald, J.; Meier, M.

1990-01-01

We report measurements of the time response of fast-gated, micro- channel plate (MCP) detectors, using a <10 ps pulsewidth ultra-violet laser and an electronic sampling system to measure time resolutions to better than 25 ps. The results show that framing times of less than 100 ps are attainable with high gain. The data is compared to a Monte Carlo calculation, which shows good agreement. We also measured the relative sensitivity as a function of DC bias, and saturation effects for large signal inputs. In part B, we briefly describe an electrical ''time-of-flight'' technique, which we have used to measure the response time of a fast-gated microchannel plate (MCP). Thinner MCP's than previously used have been tested, and, as expected, show fast gating times and smaller electron multiplication. A preliminary design for an x-ray pinhole camera, using a thin MCP, is presented. 7 refs., 6 figs

Creation of a longitudinally polarized subwavelength hotspot with an ultra-thin planar lens: vectorial Rayleigh–Sommerfeld method

International Nuclear Information System (INIS)

Ye, Huapeng; Qiu, Cheng-Wei; Huang, Kun; Yeo, Swee Ping; Teng, Jinghua; Luk’yanchuk, Boris

2013-01-01

This letter shows how a longitudinally polarized hotspot can be created by a planar ultra-thin lens that beats the diffraction limit. On the imaging plane, a subwavelength optical resolution 0.39λ with almost purely longitudinal electric component has been demonstrated in air ambient. This novel paradigm addresses simultaneously both longitudinal polarization and deep sub-diffraction imaging, by a planar lens composed of ultra-thin opaque concentric annuli. The vectorial Rayleigh–Sommerfeld (VRS) approach, offering the advantage of significant reduction in computation, has been developed for a particular optimization of a flat lens with full control of polarization. Empowered by the robustness of VRS in dealing with polarization states, the proposed roadmap may be universally and efficiently integrated with other optimization algorithms to design super-resolution imaging with controlled polarization states at any wavelength without luminescence of the object. The lens, which is empowered by the proposed method, opens an avenue for the first time toward a highly integrated imaging system with advanced functionalities in far-field super-imaging, tailored polarization states and flat ultra-thin geometry simultaneously. (letter)

Electrical characteristics of AlO sub x N sub y prepared by oxidation of sub-10-nm-thick AlN films for MOS gate dielectric applications

CERN Document Server

Jeon, S H; Kim, H S; Noh, D Y; Hwang, H S

2000-01-01

In this research, the feasibility of ultrathin AlO sub x N sub y prepared by oxidation of sub 100-A-thick AlN thin films for metal-oxide-semiconductor (MOS) gate dielectric applications was investigated. Oxidation of 51-A-and 98-A-thick as-deposited AlN at 800 .deg. C was used to form 72-A-and 130-A-thick AlO sub x N sub y , respectively. Based on the capacitance-voltage (C-V) measurements of the MOS capacitor, the dielectric constants of 72 A-thick and 130 A-thick Al-oxynitride were 5.15 and 7, respectively. The leakage current of Al-oxynitride at low field was almost the same as that of thermal SiO sub 2. based on the CV data, the interface state density of Al-oxynitride was relatively higher than that of SiO sub 2. Although process optimization is still necessary, the Al-oxynitride exhibits some possibility for future MOS gate dielectric applications.

Electrical characteristics of AlO{sub x}N{sub y} prepared by oxidation of sub-10-nm-thick AlN films for MOS gate dielectric applications

Energy Technology Data Exchange (ETDEWEB)

Jeon, Sang Hun; Jang, Hyeon Woo; Kim, Hyun Soo; Noh, Do Young; Hwang, Hyun Sang [Kwangju Institute of Science and Technology, Kwangju (Korea, Republic of)

2000-12-01

In this research, the feasibility of ultrathin AlO{sub x}N{sub y} prepared by oxidation of sub 100-A-thick AlN thin films for metal-oxide-semiconductor (MOS) gate dielectric applications was investigated. Oxidation of 51-A-and 98-A-thick as-deposited AlN at 800 .deg. C was used to form 72-A-and 130-A-thick AlO{sub x}N{sub y}, respectively. Based on the capacitance-voltage (C-V) measurements of the MOS capacitor, the dielectric constants of 72 A-thick and 130 A-thick Al-oxynitride were 5.15 and 7, respectively. The leakage current of Al-oxynitride at low field was almost the same as that of thermal SiO{sub 2}. based on the CV data, the interface state density of Al-oxynitride was relatively higher than that of SiO{sub 2}. Although process optimization is still necessary, the Al-oxynitride exhibits some possibility for future MOS gate dielectric applications.

Structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics for a-IGZO thin-film transistors.

Science.gov (United States)

Chen, Fa-Hsyang; Her, Jim-Long; Shao, Yu-Hsuan; Matsuda, Yasuhiro H; Pan, Tung-Ming

2013-01-08

In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs, a small subthreshold swing of 143 mV/decade, and a high Ion/Ioff current ratio of 4.23 × 107, presumably because of the reduction in the oxygen vacancies and the formation of the smooth surface roughness as a result of the incorporation of Ti into the Er2TiO5 film. Furthermore, the reliability of voltage stress can be improved using an Er2TiO5 gate dielectric.

Carbon nanotube transistors with graphene oxide films as gate dielectrics

Institute of Scientific and Technical Information of China (English)

无

2010-01-01

Carbon nanomaterials,including the one-dimensional(1-D) carbon nanotube(CNT) and two-dimensional(2-D) graphene,are heralded as ideal candidates for next generation nanoelectronics.An essential component for the development of advanced nanoelectronics devices is processing-compatible oxide.Here,in analogy to the widespread use of silicon dioxide(SiO2) in silicon microelectronic industry,we report the proof-of-principle use of graphite oxide(GO) as a gate dielectrics for CNT field-effect transistor(FET) via a fast and simple solution-based processing in the ambient condition.The exceptional transistor characteristics,including low operation voltage(2 V),high carrier mobility(950 cm2/V-1 s-1),and the negligible gate hysteresis,suggest a potential route to the future all-carbon nanoelectronics.

Opto-electrical approaches for high efficiency and ultra-thin c-Si solar cells

NARCIS (Netherlands)

Ingenito, A.; Isabella, O.; Zeman, M.

2014-01-01

The need for cost reduction requires using less raw material and cost-effective processes without sacrificing the conversion efficiency. For keeping high the generated photo-current, an advanced light trapping scheme for ultra-thin silicon wafers is here proposed, exhibiting absorptances up to 99%

Photoinduced hydrophobic surface of graphene oxide thin films

International Nuclear Information System (INIS)

Zhang Xiaoyan; Song Peng; Cui Xiaoli

2012-01-01

Graphene oxide (GO) thin films were deposited on transparent conducting oxide substrates and glass slides by spin coating method at room temperature. The wettability of GO thin films before and after ultraviolet (UV) irradiation was characterized with water contact angles, which increased from 27.3° to 57.6° after 3 h of irradiation, indicating a photo-induced hydrophobic surface. The UV–vis absorption spectra, Raman spectroscopy, X-ray photoelectron spectroscopy, and conductivity measurements of GO films before and after UV irradiation were taken to study the mechanism of photoinduced hydrophobic surface of GO thin films. It is demonstrated that the photoinduced hydrophobic surface is ascribed to the elimination of oxygen-containing functional groups on GO molecules. This work provides a simple strategy to control the wettability properties of GO thin films by UV irradiation. - Highlights: ► Photoinduced hydrophobic surface of graphene oxide thin films has been demonstrated. ► Elimination of oxygen-containing functional groups in graphene oxide achieved by UV irradiation. ► We provide novel strategy to control surface wettability of GO thin films by UV irradiation.

Impact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics

KAUST Repository

Salas-Villasenor, A. L.; Mejia, I.; Hovarth, J.; Alshareef, Husam N.; Cha, D. K.; Ramirez-Bon, R.; Gnade, B. E.; Quevedo-Lopez, M. A.

2010-01-01

Cadmium sulfide thin film transistors were demonstrated as the n-type device for use in flexible electronics. CdS thin films were deposited by chemical bath deposition (70° C) on either 100 nm HfO2 or SiO2 as the gate dielectrics. Common gate transistors with channel lengths of 40-100 μm were fabricated with source and drain aluminum top contacts defined using a shadow mask process. No thermal annealing was performed throughout the device process. X-ray diffraction results clearly show the hexagonal crystalline phase of CdS. The electrical performance of HfO 2 /CdS -based thin film transistors shows a field effect mobility and threshold voltage of 25 cm2 V-1 s-1 and 2 V, respectively. Improvement in carrier mobility is associated with better nucleation and growth of CdS films deposited on HfO2. © 2010 The Electrochemical Society.

Impact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics

KAUST Repository

Salas-Villasenor, A. L.

2010-06-29

Cadmium sulfide thin film transistors were demonstrated as the n-type device for use in flexible electronics. CdS thin films were deposited by chemical bath deposition (70° C) on either 100 nm HfO2 or SiO2 as the gate dielectrics. Common gate transistors with channel lengths of 40-100 μm were fabricated with source and drain aluminum top contacts defined using a shadow mask process. No thermal annealing was performed throughout the device process. X-ray diffraction results clearly show the hexagonal crystalline phase of CdS. The electrical performance of HfO 2 /CdS -based thin film transistors shows a field effect mobility and threshold voltage of 25 cm2 V-1 s-1 and 2 V, respectively. Improvement in carrier mobility is associated with better nucleation and growth of CdS films deposited on HfO2. © 2010 The Electrochemical Society.

Chemical gating of epitaxial graphene through ultrathin oxide layers.

Science.gov (United States)

Larciprete, Rosanna; Lacovig, Paolo; Orlando, Fabrizio; Dalmiglio, Matteo; Omiciuolo, Luca; Baraldi, Alessandro; Lizzit, Silvano

2015-08-07

We achieved a controllable chemical gating of epitaxial graphene grown on metal substrates by exploiting the electrostatic polarization of ultrathin SiO2 layers synthesized below it. Intercalated oxygen diffusing through the SiO2 layer modifies the metal-oxide work function and hole dopes graphene. The graphene/oxide/metal heterostructure behaves as a gated plane capacitor with the in situ grown SiO2 layer acting as a homogeneous dielectric spacer, whose high capacity allows the Fermi level of graphene to be shifted by a few hundreds of meV when the oxygen coverage at the metal substrate is of the order of 0.5 monolayers. The hole doping can be finely tuned by controlling the amount of interfacial oxygen, as well as by adjusting the thickness of the oxide layer. After complete thermal desorption of oxygen the intrinsic doping of SiO2 supported graphene is evaluated in the absence of contaminants and adventitious adsorbates. The demonstration that the charge state of graphene can be changed by chemically modifying the buried oxide/metal interface hints at the possibility of tuning the level and sign of doping by the use of other intercalants capable of diffusing through the ultrathin porous dielectric and reach the interface with the metal.

Effects of Cold Rolling Reduction and Initial Goss Grains Orientation on Texture Evolution and Magnetic Performance of Ultra-thin Grain-oriented Silicon Steel

Directory of Open Access Journals (Sweden)

LIANG Rui-yang

2017-06-01

Full Text Available The ultra-thin grain-oriented silicon steel strips with a thickness of 0.06-0.12mm were produced by one-step-rolling methods with different Goss-orientation of grain-oriented silicon steel sheets. The effect of cold rolling reduction and initial Goss-orientation of samples on texture evolution and magnetic performance of ultra-thin grain-oriented silicon steel strips was studied by EBSD. The result shows that with the increase of cold rolling reduction and decrease of strips thickness, the recrystallization texture is enhanced after annealing.When the cold rolling reduction is 70%,RD//〈001〉 recrystallization texture is the sharpest, and the magnetic performance is the best. The higher degree of Goss orientation in initial sample is, the better magnetic performance of ultra-thin grain-oriented silicon steel.Therefore, for producing an ultra-thin grain-oriented silicon steel with high performance, a material with a concentrated orientation of Goss grains can be used.

High mobility bottom gate InGaZnO thin film transistors with SiOx etch stopper

Science.gov (United States)

Kim, Minkyu; Jeong, Jong Han; Lee, Hun Jung; Ahn, Tae Kyung; Shin, Hyun Soo; Park, Jin-Seong; Jeong, Jae Kyeong; Mo, Yeon-Gon; Kim, Hye Dong

2007-05-01

The authors report on the fabrication of thin film transistors (TFTs), which use an amorphous indium gallium zinc oxide (a-IGZO) channel, by rf sputtering at room temperature and for which the channel length and width are patterned by photolithography and dry etching. To prevent plasma damage to the active channel, a 100-nm-thick SiOx layer deposited by plasma enhanced chemical vapor deposition was adopted as an etch stopper structure. The a-IGZO TFT (W /L=10μm/50μm) fabricated on glass exhibited a high field-effect mobility of 35.8cm2/Vs, a subthreshold gate swing value of 0.59V/decade, a thrseshold voltage of 5.9V, and an Ion/off ratio of 4.9×106, which is acceptable for use as the switching transistor of an active-matrix TFT backplane.

Direct imprinting of indium-tin-oxide precursor gel and simultaneous formation of channel and source/drain in thin-film transistor

Science.gov (United States)

Haga, Ken-ichi; Kamiya, Yuusuke; Tokumitsu, Eisuke

2018-02-01

We report on a new fabrication process for thin-film transistors (TFTs) with a new structure and a new operation principle. In this process, both the channel and electrode (source/drain) are formed simultaneously, using the same oxide material, using a single nano-rheology printing (n-RP) process, without any conventional lithography process. N-RP is a direct thermal imprint technique and deforms oxide precursor gel. To reduce the source/drain resistance, the material common to the channel and electrode is conductive indium-tin-oxide (ITO). The gate insulator is made of a ferroelectric material, whose high charge density can deplete the channel of the thin ITO film, which realizes the proposed operation principle. First, we have examined the n-RP conditions required for the channel and source/drain patterning, and found that the patterning properties are strongly affected by the cooling rate before separating the mold. Second, we have fabricated the TFTs as proposed and confirmed their TFT operation.

Optical properties of vacuum deposited polyaniline ultra-thin film

International Nuclear Information System (INIS)

Wahab, M. R. A.; Din, M.; Yunus, W. M. M.; Hasan, Z. A.; Kasim, A.

2005-01-01

Full text: Ultra-thin films of emeraldine base (EB) and emeraldine salt (ES) form of polyaniline (PANi) were prepared using electron-gun vacuum deposition. Thickness range studied was between 100AA and 450AA. Dielectric permittivity of the films determined from Kretchmann Configuration Surface Plasmon Resonance (SPR) angles-scanning set-up show shifts and narrowing of the SPR dip. Absorbance spectra of S-polarized and P-polarized light show the aging effect on orientation of the film. The effect of aging on its conductivity and photoluminescence is also correlated to the surface morphology

Self-aligned indium–gallium–zinc oxide thin-film transistors with SiNx/SiO2/SiNx/SiO2 passivation layers

International Nuclear Information System (INIS)

Chen, Rongsheng; Zhou, Wei; Zhang, Meng; Kwok, Hoi-Sing

2014-01-01

Self-aligned top-gate amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) with SiN x /SiO 2 /SiN x /SiO 2 passivation layers are developed in this paper. The resulting a-IGZO TFT exhibits high reliability against bias stress and good electrical performance including field-effect mobility of 5 cm 2 /Vs, threshold voltage of 2.5 V, subthreshold swing of 0.63 V/decade, and on/off current ratio of 5 × 10 6 . With scaling down of the channel length, good characteristics are also obtained with a small shift of the threshold voltage and no degradation of subthreshold swing. The proposed a-IGZO TFTs in this paper can act as driving devices in the next generation flat panel displays. - Highlights: • Self-aligned top-gate indium–gallium–zinc oxide thin-film transistor is proposed. • SiN x /SiO 2 /SiN x /SiO 2 passivation layers are developed. • The source/drain areas are hydrogen-doped by CHF3 plasma. • The devices show good electrical performance and high reliability against bias stress

Estimating the thickness of ultra thin sections for electron microscopy by image statistics

DEFF Research Database (Denmark)

Sporring, Jon; Khanmohammadi, Mahdieh; Darkner, Sune

2014-01-01

We propose a method for estimating the thickness of ultra thin histological sections by image statistics alone. Our method works for images, that are the realisations of a stationary and isotropic stochastic process, and it relies on the existence of statistical image-measures that are strictly m...

Wavelength-tunable colloidal quantum dot laser on ultra-thin flexible glass

Energy Technology Data Exchange (ETDEWEB)

Foucher, C.; Guilhabert, B.; Laurand, N.; Dawson, M. D. [Institute of Photonics, SUPA, University of Strathclyde, Glasgow (United Kingdom)

2014-04-07

A mechanically flexible and wavelength-tunable laser with an ultra-thin glass membrane as substrate is demonstrated. The optically pumped hybrid device has a distributed feedback cavity that combines a colloidal quantum dot gain film with a grating-patterned polymeric underlayer, all on a 30-μm thick glass sheet. The total thickness of the structure is only 75 μm. The hybrid laser has an average threshold fluence of 450 ± 80 μJ/cm{sup 2} (for 5-ns excitation pulses) at an emitting wavelength of 607 nm. Mechanically bending the thin-glass substrate enables continuous tuning of the laser emission wavelength over an 18-nm range, from 600 nm to 618 nm. The correlation between the wavelength tunability and the mechanical properties of the thin laser structure is verified theoretically and experimentally.

Characterization of ultra-thin TiO2 films grown on Mo(112)

International Nuclear Information System (INIS)

Kumar, D.; Chen, M.S.; Goodman, D.W.

2006-01-01

Ultra-thin TiO 2 films were grown on a Mo(112) substrate by stepwise vapor depositing of Ti onto the sample surface followed by oxidation at 850 K. X-ray photoelectron spectroscopy showed that the Ti 2p peak position shifts from lower to higher binding energy with an increase in the Ti coverage from sub- to multilayer. The Ti 2p peak of a TiO 2 film with more than a monolayer coverage can be resolved into two peaks, one at 458.1 eV corresponding to the first layer, where Ti atoms bind to the substrate Mo atoms through Ti-O-Mo linkages, and a second feature at 458.8 eV corresponding to multilayer TiO 2 where the Ti atoms are connected via Ti-O-Ti linkages. Based on these assignments, the single Ti 2p 3/2 peak at 455.75 eV observed for the Mo(112)-(8 x 2)-TiO x monolayer film can be assigned to Ti 3+ , consistent with our previous results obtained with high-resolution electron energy loss spectroscopy

ZnO nanowire-based nano-floating gate memory with Pt nanocrystals embedded in Al2O3 gate oxides

International Nuclear Information System (INIS)

Yeom, Donghyuk; Kang, Jeongmin; Lee, Myoungwon; Jang, Jaewon; Yun, Junggwon; Jeong, Dong-Young; Yoon, Changjoon; Koo, Jamin; Kim, Sangsig

2008-01-01

The memory characteristics of ZnO nanowire-based nano-floating gate memory (NFGM) with Pt nanocrystals acting as the floating gate nodes were investigated in this work. Pt nanocrystals were embedded between Al 2 O 3 tunneling and control oxide layers deposited on ZnO nanowire channels. For a representative ZnO nanowire-based NFGM with embedded Pt nanocrystals, a threshold voltage shift of 3.8 V was observed in its drain current versus gate voltage (I DS -V GS ) measurements for a double sweep of the gate voltage, revealing that the deep effective potential wells built into the nanocrystals provide our NFGM with a large charge storage capacity. Details of the charge storage effect observed in this memory device are discussed in this paper

Low operating voltage InGaZnO thin-film transistors based on Al{sub 2}O{sub 3} high-k dielectrics fabricated using pulsed laser deposition

Energy Technology Data Exchange (ETDEWEB)

Geng, G. Z.; Liu, G. X.; Zhang, Q.; Shan, F. K. [Qingdao University, Qingdao (China); DongEui University, Busan (Korea, Republic of); Lee, W. J.; Shin, B. C. [DongEui University, Busan (Korea, Republic of); Cho, C. R. [Pusan National University, Busan (Korea, Republic of)

2014-05-15

Low-voltage-driven amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) with an Al{sub 2}O{sub 3} dielectric were fabricated on a Si substrate by using pulsed laser deposition. Both Al{sub 2}O{sub 3} and IGZO thin films are amorphous, and the thin films have very smooth surfaces. The Al{sub 2}O{sub 3} gate dielectric exhibits a very low leakage current density of 1.3 x 10{sup -8} A/cm{sup 2} at 5 V and a high capacitance density of 60.9 nF/cm{sup 2}. The IGZO TFT with a structure of Ni/IGZO/Al{sub 2}O{sub 3}/Si exhibits high performance with a low threshold voltage of 1.18 V, a high field effect mobility of 20.25 cm{sup 2}V{sup -1}s{sup -1}, an ultra small subthreshold swing of 87 mV/decade, and a high on/off current ratio of 3 x 10{sup 7}.

Impact of oxide thickness on gate capacitance – Modelling and ...

Indian Academy of Sciences (India)

Department of Electronics and Communication Engineering, National ... conventional HEMT, Schottky barrier diode is formed at the gate electrode. .... term corresponds to the energy required for the electric field in the oxide layer and the.

High stability mechanisms of quinary indium gallium zinc aluminum oxide multicomponent oxide films and thin film transistors

International Nuclear Information System (INIS)

Lee, Ching-Ting; Lin, Yung-Hao; Lin, Jhong-Ham

2015-01-01

Quinary indium gallium zinc aluminum oxide (IGZAO) multicomponent oxide films were deposited using indium gallium zinc oxide (IGZO) target and Al target by radio frequency magnetron cosputtering system. An extra carrier transport pathway could be provided by the 3 s orbitals of Al cations to improve the electrical properties of the IGZO films, and the oxygen instability could be stabilized by the strong Al-O bonds in the IGZAO films. The electron concentration change and the electron mobility change of the IGZAO films for aging time of 10 days under an air environment at 40 °C and 75% humidity were 20.1% and 2.4%, respectively. The experimental results verified the performance stability of the IGZAO films. Compared with the thin film transistors (TFTs) using conventional IGZO channel layer, in conducting the stability of TFTs with IGZAO channel layer, the transconductance g m change, threshold voltage V T change, and the subthreshold swing S value change under the same aging condition were improved to 7.9%, 10.5%, and 14.8%, respectively. Furthermore, the stable performances of the IGZAO TFTs were also verified by the positive gate bias stress. In this research, the quinary IGZAO multicomponent oxide films and that applied in TFTs were the first studied in the literature

High stability mechanisms of quinary indium gallium zinc aluminum oxide multicomponent oxide films and thin film transistors

Energy Technology Data Exchange (ETDEWEB)

Lee, Ching-Ting, E-mail: ctlee@ee.ncku.edu.tw; Lin, Yung-Hao; Lin, Jhong-Ham [Institute of Microelectronics, Department of Electrical Engineering, Research Center for Energy Technology and Strategy (RCETS), National Cheng Kung University, Tainan, Taiwan (China)

2015-01-28

Quinary indium gallium zinc aluminum oxide (IGZAO) multicomponent oxide films were deposited using indium gallium zinc oxide (IGZO) target and Al target by radio frequency magnetron cosputtering system. An extra carrier transport pathway could be provided by the 3 s orbitals of Al cations to improve the electrical properties of the IGZO films, and the oxygen instability could be stabilized by the strong Al-O bonds in the IGZAO films. The electron concentration change and the electron mobility change of the IGZAO films for aging time of 10 days under an air environment at 40 °C and 75% humidity were 20.1% and 2.4%, respectively. The experimental results verified the performance stability of the IGZAO films. Compared with the thin film transistors (TFTs) using conventional IGZO channel layer, in conducting the stability of TFTs with IGZAO channel layer, the transconductance g{sub m} change, threshold voltage V{sub T} change, and the subthreshold swing S value change under the same aging condition were improved to 7.9%, 10.5%, and 14.8%, respectively. Furthermore, the stable performances of the IGZAO TFTs were also verified by the positive gate bias stress. In this research, the quinary IGZAO multicomponent oxide films and that applied in TFTs were the first studied in the literature.

Solvothermal synthesis of gallium-indium-zinc-oxide nanoparticles for electrolyte-gated transistors.

Science.gov (United States)

Santos, Lídia; Nunes, Daniela; Calmeiro, Tomás; Branquinho, Rita; Salgueiro, Daniela; Barquinha, Pedro; Pereira, Luís; Martins, Rodrigo; Fortunato, Elvira

2015-01-14

Solution-processed field-effect transistors are strategic building blocks when considering low-cost sustainable flexible electronics. Nevertheless, some challenges (e.g., processing temperature, reliability, reproducibility in large areas, and cost effectiveness) are requirements that must be surpassed in order to achieve high-performance transistors. The present work reports electrolyte-gated transistors using as channel layer gallium-indium-zinc-oxide nanoparticles produced by solvothermal synthesis combined with a solid-state electrolyte based on aqueous dispersions of vinyl acetate stabilized with cellulose derivatives, acrylic acid ester in styrene and lithium perchlorate. The devices fabricated using this approach display a ION/IOFF up to 1 × 10(6), threshold voltage (VTh) of 0.3-1.9 V, and mobility up to 1 cm(2)/(V s), as a function of gallium-indium-zinc-oxide ink formulation and two different annealing temperatures. These results validates the usage of electrolyte-gated transistors as a viable and promising alternative for nanoparticle based semiconductor devices as the electrolyte improves the interface and promotes a more efficient step coverage of the channel layer, reducing the operating voltage when compared with conventional dielectrics gating. Moreover, it is shown that by controlling the applied gate potential, the operation mechanism of the electrolyte-gated transistors can be modified from electric double layer to electrochemical doping.

The electrical performance and gate bias stability of an amorphous InGaZnO thin-film transistor with HfO2 high-k dielectrics

Science.gov (United States)

Wang, Ruo Zheng; Wu, Sheng Li; Li, Xin Yu; Zhang, Jin Tao

2017-07-01

In this study, we set out to fabricate an amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) with SiNx/HfO2/SiNx (SHS) sandwiched dielectrics. The J-V and C-V of this SHS film were extracted by the Au/p-Si/SHS/Ti structure. At room temperature the a-IGZO with SHS dielectrics showed the following electrical properties: a threshold voltage of 2.9 V, a subthreshold slope of 0.35 V/decade, an on/off current ratio of 3.5 × 107, and a mobility of 12.8 cm2 V-1 s-1. Finally, we tested the influence of gate bias stress on the TFT, and the result showed that the threshold voltage shifted to a positive voltage when applying a positive gate voltage to the TFT.

Enhancement of Heat and Mass Transfer in Mechanically Contstrained Ultra Thin Films

Energy Technology Data Exchange (ETDEWEB)

Kevin Drost; Jim Liburdy; Brian Paul; Richard Peterson

2005-01-01

Oregon State University (OSU) and the Pacific Northwest National Laboratory (PNNL) were funded by the U.S. Department of Energy to conduct research focused on resolving the key technical issues that limited the deployment of efficient and extremely compact microtechnology based heat actuated absorption heat pumps and gas absorbers. Success in demonstrating these technologies will reduce the main barriers to the deployment of a technology that can significantly reduce energy consumption in the building, automotive and industrial sectors while providing a technology that can improve our ability to sequester CO{sub 2}. The proposed research cost $939,477. $539,477 of the proposed amount funded research conducted at OSU while the balance ($400,000) was used at PNNL. The project lasted 42 months and started in April 2001. Recent developments at the Pacific Northwest National Laboratory and Oregon State University suggest that the performance of absorption and desorption systems can be significantly enhanced by the use of an ultra-thin film gas/liquid contactor. This device employs microtechnology-based structures to mechanically constrain the gas/liquid interface. This technology can be used to form very thin liquid films with a film thickness less then 100 microns while still allowing gas/liquid contact. When the resistance to mass transfer in gas desorption and absorption is dominated by diffusion in the liquid phase the use of extremely thin films (<100 microns) for desorption and absorption can radically reduce the size of a gas desorber or absorber. The development of compact absorbers and desorbers enables the deployment of small heat-actuated absorption heat pumps for distributed space heating and cooling applications, heat-actuated automotive air conditioning, manportable cooling, gas absorption units for the chemical process industry and the development of high capacity CO{sub 2} absorption devices for CO{sub 2} collection and sequestration. The energy

Improvement of Self-Heating of Indium Gallium Zinc Aluminum Oxide Thin-Film Transistors Using Al2O3 Barrier Layer

Science.gov (United States)

Jian, Li-Yi; Lee, Hsin-Ying; Lin, Yung-Hao; Lee, Ching-Ting

2018-02-01

To study the self-heating effect, aluminum oxide (Al2O3) barrier layers of various thicknesses have been inserted between the channel layer and insulator layer in bottom-gate-type indium gallium zinc aluminum oxide (IGZAO) thin-film transistors (TFTs). Each IGZAO channel layer was deposited on indium tin oxide (ITO)-coated glass substrate by using a magnetron radiofrequency cosputtering system with dual targets composed of indium gallium zinc oxide (IGZO) and Al. The 3 s orbital of Al cation provided an extra transport pathway and widened the conduction-band bottom, thus increasing the electron mobility of the IGZAO films. The Al-O bonds were able to sustain the oxygen stability of the IGZAO films. The self-heating behavior of the resulting IGZAO TFTs was studied by Hall measurements on the IGZAO films as well as the electrical performance of the IGZAO TFTs with Al2O3 barrier layers of various thicknesses at different temperatures. IGZAO TFTs with 50-nm-thick Al2O3 barrier layer were stressed by positive gate bias stress (PGBS, at gate-source voltage V GS = 5 V and drain-source voltage V DS = 0 V); at V GS = 5 V and V DS = 10 V, the threshold voltage shifts were 0.04 V and 0.2 V, respectively, much smaller than for the other IGZAO TFTs without Al2O3 barrier layer, which shifted by 0.2 V and 1.0 V when stressed under the same conditions.

Excitation of epsilon-near-zero resonance in ultra-thin indium tin oxide shell embedded nanostructured optical fiber.

Science.gov (United States)

Minn, Khant; Anopchenko, Aleksei; Yang, Jingyi; Lee, Ho Wai Howard

2018-02-05

We report a novel optical waveguide design of a hollow step index fiber modified with a thin layer of indium tin oxide (ITO). We show an excitation of highly confined waveguide mode in the proposed fiber near the wavelength where permittivity of ITO approaches zero. Due to the high field confinement within thin ITO shell inside the fiber, the epsilon-near-zero (ENZ) mode can be characterized by a peak in modal loss of the hybrid waveguide. Our results show that such in-fiber excitation of ENZ mode is due to the coupling of the guided core mode to the thin-film ENZ mode. We also show that the phase matching wavelength, where the coupling takes place, varies depending on the refractive index of the constituents inside the central bore of the fiber. These ENZ nanostructured optical fibers have many potential applications, for example, in ENZ nonlinear and magneto-optics, as in-fiber wavelength-dependent filters, and as subwavelength fluid channel for optical and bio-photonic sensing.

Area efficient digital logic NOT gate using single electron box (SEB

Directory of Open Access Journals (Sweden)

Bahrepour Davoud

2017-01-01

Full Text Available The continuing scaling down of complementary metal oxide semiconductor (CMOS has led researchers to build new devices with nano dimensions, whose behavior will be interpreted based on quantum mechanics. Single-electron devices (SEDs are promising candidates for future VLSI applications, due to their ultra small dimensions and lower power consumption. In most SED based digital logic designs, a single gate is introduced and its performance discussed. While in the SED based circuits the fan out of designed gate circuit should be considered and measured. In the other words, cascaded SED based designs must work properly so that the next stage(s should be driven by the previous stage. In this paper, previously NOT gate based on single electron box (SEB which is an important structure in SED technology, is reviewed in order to obtain correct operation in series connections. The correct operation of the NOT gate is investigated in a buffer circuit which uses two connected NOT gate in series. Then, for achieving better performance the designed buffer circuit is improved by the use of scaling process.

Ultra-fast movies of thin-film laser ablation

Science.gov (United States)

Domke, Matthias; Rapp, Stephan; Schmidt, Michael; Huber, Heinz P.

2012-11-01

Ultra-short-pulse laser irradiation of thin molybdenum films from the glass substrate side initiates an intact Mo disk lift off free from thermal effects. For the investigation of the underlying physical effects, ultra-fast pump-probe microscopy is used to produce stop-motion movies of the single-pulse ablation process, initiated by a 660-fs laser pulse. The ultra-fast dynamics in the femtosecond and picosecond ranges are captured by stroboscopic illumination of the sample with an optically delayed probe pulse of 510-fs duration. The nanosecond and microsecond delay ranges of the probe pulse are covered by an electronically triggered 600-ps laser. Thus, the setup enables an observation of general laser ablation processes from the femtosecond delay range up to the final state. A comparison of time- and space-resolved observations of film and glass substrate side irradiation of a 470-nm molybdenum layer reveals the driving mechanisms of the Mo disk lift off initiated by glass-side irradiation. Observations suggest that a phase explosion generates a liquid-gas mixture in the molybdenum/glass interface about 10 ps after the impact of the pump laser pulse. Then, a shock wave and gas expansion cause the molybdenum layer to bulge, while the enclosed liquid-gas mixture cools and condenses at delay times in the 100-ps range. The bulging continues for approximately 20 ns, when an intact Mo disk shears and lifts off at a velocity of above 70 m/s. As a result, the remaining hole is free from thermal effects.

A Manganin Thin Film Ultra-High Pressure Sensor for Microscale Detonation Pressure Measurement

Directory of Open Access Journals (Sweden)

Guodong Zhang

2018-03-01

Full Text Available With the development of energetic materials (EMs and microelectromechanical systems (MEMS initiating explosive devices, the measurement of detonation pressure generated by EMs in the microscale has become a pressing need. This paper develops a manganin thin film ultra-high pressure sensor based on MEMS technology for measuring the output pressure from micro-detonator. A reliable coefficient is proposed for designing the sensor’s sensitive element better. The sensor employs sandwich structure: the substrate uses a 0.5 mm thick alumina ceramic, the manganin sensitive element with a size of 0.2 mm × 0.1 mm × 2 μm and copper electrodes of 2 μm thick are sputtered sequentially on the substrate, and a 25 μm thick insulating layer of polyimide is wrapped on the sensitive element. The static test shows that the piezoresistive coefficient of manganin thin film is 0.0125 GPa−1. The dynamic experiment indicates that the detonation pressure of micro-detonator is 12.66 GPa, and the response time of the sensor is 37 ns. In a word, the sensor developed in this study is suitable for measuring ultra-high pressure in microscale and has a shorter response time than that of foil-like manganin gauges. Simultaneously, this study could be beneficial to research on ultra-high-pressure sensors with smaller size.

Thermodynamical fluctuations and critical behavior in weakly disordered YBCO thin and ultra-thin films

International Nuclear Information System (INIS)

Lesueur, J.; Aprili, M.; Degoy, S.; Chambonnet, D.; Keller, D.

1996-01-01

The specific role of disorder in the transport properties of YBCO has been investigated, using both light-ion irradiation of thin films to finely tune the amount of atomic disorder, and ultra-thin films grown to study possible dimensional effects. For weak disorder, the samples display a resistive transition typical of the mean-field paraconductive regime of a homogeneous media, well described by the Lawrence and Doniach model for layered superconductors. As the disorder increases, two effects take place. First, the c-axis coherence length becomes shorter, leading to a more anisotropic material, as shown by the excess conductivity above T c . Second, an incipient granularity is revealed, leading to a less sharper transition, which is analyzed within the random 3D XY critical model for the paracoherence transition. Two main results are derived: an experimental test of the Ginzburg criteria for the paracoherence transition, and a new fluctuation regime in nanometric grain size superconductors

Investigation of ferromagnetism in oxygen deficient hafnium oxide thin films

Energy Technology Data Exchange (ETDEWEB)

Hildebrandt, Erwin; Kurian, Jose; Krockenberger, Yoshiharu; Alff, Lambert [Institut fuer Materialwissenschaft, TU Darmstadt (Germany); Suter, Andreas [PSI, Villingen (Switzerland); Wilhelm, Fabrice; Rogalev, Andrei [ESRF, Grenoble (France)

2008-07-01

Oxygen deficient thin films of hafnium oxide were grown on single crystal r-cut and c-cut sapphire by reactive molecular beam epitaxy. RF-activated oxygen was used for the in situ oxidation of hafnium oxide thin films. Oxidation conditions were varied substantially in order to create oxygen deficiency in hafnium oxide films intentionally. The films were characterized by X-ray and magnetic measurements. X-ray diffraction studies show an increase in lattice parameter with increasing oxygen deficiency. Oxygen deficient hafnium oxide thin films also showed a decreasing bandgap with increase in oxygen deficiency. The magnetisation studies carried out with SQUID did not show any sign of ferromagnetism in the whole oxygen deficiency range. X-ray magnetic circular dichroism measurements also confirmed the absence of ferromagnetism in oxygen deficient hafnium oxide thin films.

High mobility bottom gate InGaZnO thin film transistors with SiOx etch stopper

International Nuclear Information System (INIS)

Kim, Minkyu; Jeong, Jong Han; Lee, Hun Jung; Ahn, Tae Kyung; Shin, Hyun Soo; Park, Jin-Seong; Jeong, Jae Kyeong; Mo, Yeon-Gon; Kim, Hye Dong

2007-01-01

The authors report on the fabrication of thin film transistors (TFTs), which use an amorphous indium gallium zinc oxide (a-IGZO) channel, by rf sputtering at room temperature and for which the channel length and width are patterned by photolithography and dry etching. To prevent plasma damage to the active channel, a 100-nm-thick SiO x layer deposited by plasma enhanced chemical vapor deposition was adopted as an etch stopper structure. The a-IGZO TFT (W/L=10 μm/50 μm) fabricated on glass exhibited a high field-effect mobility of 35.8 cm 2 /V s, a subthreshold gate swing value of 0.59 V/decade, a thrseshold voltage of 5.9 V, and an I on/off ratio of 4.9x10 6 , which is acceptable for use as the switching transistor of an active-matrix TFT backplane

Temperature-dependent gate-swing hysteresis of pentacene thin film transistors

Directory of Open Access Journals (Sweden)

Yow-Jon Lin

2014-10-01

Full Text Available The temperature-dependent hysteresis-type transfer characteristics of pentacene-based organic thin film transistors (OTFTs were researched. The temperature-dependent transfer characteristics exhibit hopping conduction behavior. The fitting data for the temperature-dependent off-to-on and on-to-off transfer characteristics of OTFTs demonstrate that the hopping distance (ah and the barrier height for hopping (qϕt control the carrier flow, resulting in the hysteresis-type transfer characteristics of OTFTs. The hopping model gives an explanation of the gate-swing hysteresis and the roles played by qϕt and ah.

An oxide filled extended trench gate super junction MOSFET structure

International Nuclear Information System (INIS)

Cai-Lin, Wang; Jun, Sun

2009-01-01

This paper proposes an oxide filled extended trench gate super junction (SJ) MOSFET structure to meet the need of higher frequency power switches application. Compared with the conventional trench gate SJ MOSFET, new structure has the smaller input and output capacitances, and the remarkable improvements in the breakdown voltage, on-resistance and switching speed. Furthermore, the SJ in the new structure can be realized by the existing trench etching and shallow angle implantation, which offers more freedom to SJ MOSFET device design and fabrication. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Semi-transparent a-IGZO thin-film transistors with polymeric gate dielectric.

Science.gov (United States)

Hyung, Gun Woo; Wang, Jian-Xun; Li, Zhao-Hui; Koo, Ja-Ryong; Kwon, Sang Jik; Cho, Eou-Sik; Kim, Young Kwan

2013-06-01

We report the fabrication of semi-transparent a-IGZO-based thin-film transistors (TFTs) with crosslinked poly-4-vinylphenol (PVP) gate dielectric layers on PET substrate and thermally-evaporated Al/Ag/Al source and drain (S&D) electrodes, which showed a transmittance of 64% at a 500-nm wavelength and sheet resistance of 16.8 omega/square. The semi-transparent a-IGZO TFTs with a PVP layer exhibited decent saturation mobilities (maximum approximately 5.8 cm2Ns) and on/off current ratios of approximately 10(6).

A two-dimensional analytical subthreshold behavior model for junctionless dual-material cylindrical surrounding-gate MOSFETs

International Nuclear Information System (INIS)

Li Cong; Zhuang Yi-Qi; Zhang Li; Jin Gang

2014-01-01

A two-dimensional analytical subthreshold behavior model for junctionless dual-material cylindrical surrounding-gate (JLDMCSG) metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed. It is derived by solving the two-dimensional Poisson's equation in two continuous cylindrical regions with any simplifying assumption. Using this analytical model, the subthreshold characteristics of JLDMCSG MOSFETs are investigated in terms of channel electrostatic potential, horizontal electric field, and subthreshold current. Compared to junctionless single-material cylindrical surrounding-gate MOSFETs, JLDMCSG MOSFETs can effectively suppress short-channel effects and simultaneously improve carrier transport efficiency. It is found that the subthreshold current of JLDMCSG MOSFETs can be significantly reduced by adopting both a thin oxide and thin silicon channel. The accuracy of the analytical model is verified by its good agreement with the three-dimensional numerical simulator ISE TCAD

Function and application of ultra thin films

Energy Technology Data Exchange (ETDEWEB)

Sasabe, Hiroyuki

1988-02-01

A film 10-100mm thick which is strong dynamically to some extent and has possibility to manifest fuctions of high degree different from the nature extrapolated from the normal thin film is called an ultra thin film. As an example of its concrete application, there is an electro-luminescence element which is made by laminating 5 layers of LB films of poly-L-phenylalanine on a n-GaP and has vapor-deposited gold electrodes. When voltage of 5V is imposed to it, light emission of 565nm can be observed and the emission efficiency of 2% is obtained. Besides, it has an excellent stability through the lapse of time. There is also a junction element and the ion concentration injected into macromolecule films of this element has a Gaussian distribution from the surface towards the direction of depth. Accordingly, the most active domain in terms of semiconductor as the result of doping is the location in the neighborhood of the peak. Furthermore, a photo memory is also proposed. It is applied to the artificial hemoglobine which is made of LB films, suggesting the feasibility of creating the artificial protein capable of functioning in the conditions in which the natural protein is unable to function. (5 figs, 1 tab, 7 refs)

Surface Acoustic Wave Monitor for Deposition and Analysis of Ultra-Thin Films

Science.gov (United States)

Hines, Jacqueline H. (Inventor)

2015-01-01

A surface acoustic wave (SAW) based thin film deposition monitor device and system for monitoring the deposition of ultra-thin films and nanomaterials and the analysis thereof is characterized by acoustic wave device embodiments that include differential delay line device designs, and which can optionally have integral reference devices fabricated on the same substrate as the sensing device, or on a separate device in thermal contact with the film monitoring/analysis device, in order to provide inherently temperature compensated measurements. These deposition monitor and analysis devices can include inherent temperature compensation, higher sensitivity to surface interactions than quartz crystal microbalance (QCM) devices, and the ability to operate at extreme temperatures.

Colored ultra-thin hybrid photovoltaics with high quantum efficiency for decorative PV applications (Presentation Recording)

Science.gov (United States)

Guo, L. Jay

2015-10-01

This talk will describe an approach to create architecturally compatible and decorative thin-film-based hybrid photovoltaics [1]. Most current solar panels are fabricated via complex processes using expensive semiconductor materials, and they are rigid and heavy with a dull, black appearance. As a result of their non-aesthetic appearance and weight, they are primarily installed on rooftops to minimize their negative impact on building appearance. Recently we introduced dual-function solar cells based on ultra-thin dopant-free amorphous silicon embedded in an optical cavity that not only efficiently extract the photogenerated carriers but also display distinctive colors with the desired angle-insensitive appearances [1,2]. The angle-insensitive behavior is the result of an interesting phase cancellation effect in the optical cavity with respect to angle of light propagation [3]. In order to produce the desired optical effect, the semiconductor layer should be ultra-thin and the traditional doped layers need to be eliminated. We adopted the approach of employing charge transport/blocking layers used in organic solar cells to meet this demand. We showed that the ultra-thin (6 to 31 nm) undoped amorphous silicon/organic hybrid solar cell can transmit desired wavelength of light and that most of the absorbed photons in the undoped a-Si layer contributed to the extracted electric charges. This is because the a-Si layer thickness is smaller than the charge diffusion length, therefore the electron-hole recombination is strongly suppressed in such ultra-thin layer. Reflective colored PVs can be made in a similar fashion. Light-energy-harvesting colored signage was demonstrated. Furthermore, a cascaded photovoltaics scheme based on tunable spectrum splitting can be employed to increase power efficiency by absorbing a broader band of light energy. Our work provides a guideline for optimizing a photoactive layer thickness in high efficiency hybrid PV design, which can be

The Bipolar Field-Effect Transistor: XIII. Physical Realizations of the Transistor and Circuits (One-Two-MOS-Gates on Thin-Thick Pure-Impure Base)

International Nuclear Information System (INIS)

Sah, C.-T.; Jie Binbin

2009-01-01

This paper reports the physical realization of the Bipolar Field-Effect Transistor (BiFET) and its one-transistor basic building block circuits. Examples are given for the one and two MOS gates on thin and thick, pure and impure base, with electron and hole contacts, and the corresponding theoretical current-voltage characteristics previously computed by us, without generation-recombination-trapping-tunneling of electrons and holes. These examples include the one-MOS-gate on semi-infinite thick impure base transistor (the bulk transistor) and the impurethin-base Silicon-on-Insulator (SOI) transistor and the two-MOS-gates on thin base transistors (the FinFET and the Thin Film Transistor TFT). Figures are given with the cross-section views containing the electron and hole concentration and current density distributions and trajectories and the corresponding DC current-voltage characteristics.

Understanding the Structure of High-K Gate Oxides - Oral Presentation

Energy Technology Data Exchange (ETDEWEB)

Miranda, Andre [SLAC National Accelerator Lab., Menlo Park, CA (United States)

2015-08-25

Hafnium Oxide (HfO₂) amorphous thin films are being used as gate oxides in transistors because of their high dielectric constant (κ) over Silicon Dioxide. The present study looks to find the atomic structure of HfO₂ thin films which hasn’t been done with the technique of this study. In this study, two HfO₂ samples were studied. One sample was made with thermal atomic layer deposition (ALD) on top of a Chromium and Gold layer on a silicon wafer. The second sample was made with plasma ALD on top of a Chromium and Gold layer on a Silicon wafer. Both films were deposited at a thickness of 50nm. To obtain atomic structure information, Grazing Incidence X-ray diffraction (GIXRD) was carried out on the HfO₂ samples. Because of this, absorption, footprint, polarization, and dead time corrections were applied to the scattering intensity data collected. The scattering curves displayed a difference in structure between the ALD processes. The plasma ALD sample showed the broad peak characteristic of an amorphous structure whereas the thermal ALD sample showed an amorphous structure with characteristics of crystalline materials. This appears to suggest that the thermal process results in a mostly amorphous material with crystallites within. Further, the scattering intensity data was used to calculate a pair distribution function (PDF) to show more atomic structure. The PDF showed atom distances in the plasma ALD sample had structure up to 10 Å, while the thermal ALD sample showed the same structure below 10 Å. This structure that shows up below 10 Å matches the bond distances of HfO₂ published in literature. The PDF for the thermal ALD sample also showed peaks up to 20 Å, suggesting repeating atomic spacing outside the HfO₂ molecule in the sample. This appears to suggest that there is some crystalline structure within the thermal ALD sample.

Ultimate Scaling of High-κ Gate Dielectrics: Higher-κ or Interfacial Layer Scavenging?

Directory of Open Access Journals (Sweden)

Takashi Ando

2012-03-01

Full Text Available Current status and challenges of aggressive equivalent-oxide-thickness (EOT scaling of high-κ gate dielectrics via higher-κ ( > 20 materials and interfacial layer (IL scavenging techniques are reviewed. La-based higher-κ materials show aggressive EOT scaling (0.5–0.8 nm, but with effective workfunction (EWF values suitable only for n-type field-effect-transistor (FET. Further exploration for p-type FET-compatible higher-κ materials is needed. Meanwhile, IL scavenging is a promising approach to extend Hf-based high-κ dielectrics to future nodes. Remote IL scavenging techniques enable EOT scaling below 0.5 nm. Mobility-EOT trends in the literature suggest that short-channel performance improvement is attainable with aggressive EOT scaling via IL scavenging or La-silicate formation. However, extreme IL scaling (e.g., zero-IL is accompanied by loss of EWF control and with severe penalty in reliability. Therefore, highly precise IL thickness control in an ultra-thin IL regime ( < 0.5 nm will be the key technology to satisfy both performance and reliability requirements for future CMOS devices.

Characterization of ultrasonic spray pyrolysed ruthenium oxide thin films

Energy Technology Data Exchange (ETDEWEB)

Patil, P.S.; Ennaoui, E.A.; Lokhande, C.D.; Mueller, M.; Giersig, M.; Diesner, K.; Tributsch, H. [Hahn-Meitner-Institut Berlin GmbH (Germany). Bereich Physikalische Chemie

1997-11-21

The ultrasonic spray pyrolysis (USP) technique was employed to deposit ruthenium oxide thin films. The films were prepared at 190 C substrate temperature and further annealed at 350 C for 30 min in air. The films were 0.22 {mu} thick and black grey in color. The structural, compositional and optical properties of ruthenium oxide thin films are reported. Contactless transient photoconductivity measurement was carried out to calculate the decay time of excess charge carriers in ruthenium oxide thin films. (orig.) 28 refs.

Highly reflective rear surface passivation design for ultra-thin Cu(In,Ga)Se{sub 2} solar cells

Energy Technology Data Exchange (ETDEWEB)

Vermang, Bart, E-mail: Bart.Vermang@angstrom.uu.se [Ångström Solar Center, University of Uppsala, Uppsala 75121 (Sweden); ESAT-KU Leuven, University of Leuven, Leuven 3001 (Belgium); Wätjen, Jörn Timo; Fjällström, Viktor; Rostvall, Fredrik; Edoff, Marika [Ångström Solar Center, University of Uppsala, Uppsala 75121 (Sweden); Gunnarsson, Rickard; Pilch, Iris; Helmersson, Ulf [Plasma & Coatings Physics, University of Linköping, Linköping 58183 (Sweden); Kotipalli, Ratan; Henry, Frederic; Flandre, Denis [ICTEAM/IMNC, Université Catholique de Louvain, Louvain-la-Neuve 1348 (Belgium)

2015-05-01

Al{sub 2}O{sub 3} rear surface passivated ultra-thin Cu(In,Ga)Se{sub 2} (CIGS) solar cells with Mo nano-particles (NPs) as local rear contacts are developed to demonstrate their potential to improve optical confinement in ultra-thin CIGS solar cells. The CIGS absorber layer is 380 nm thick and the Mo NPs are deposited uniformly by an up-scalable technique and have typical diameters of 150 to 200 nm. The Al{sub 2}O{sub 3} layer passivates the CIGS rear surface between the Mo NPs, while the rear CIGS interface in contact with the Mo NP is passivated by [Ga]/([Ga] + [In]) (GGI) grading. It is shown that photon scattering due to the Mo NP contributes to an absolute increase in short circuit current density of 3.4 mA/cm{sup 2}; as compared to equivalent CIGS solar cells with a standard back contact. - Highlights: • Proof-of-principle ultra-thin CIGS solar cells have been fabricated. • The cells have Mo nano-particles (NPs) as local rear contacts. • An Al{sub 2}O{sub 3} film passivates the CIGS rear surface between these nano-particles. • [Ga]/([Ga] + [In]) grading is used to reduce Mo-NP/CIGS interface recombination.

Electronic States of High-k Oxides in Gate Stack Structures

Science.gov (United States)

Zhu, Chiyu

In this dissertation, in-situ X-ray and ultraviolet photoemission spectroscopy have been employed to study the interface chemistry and electronic structure of potential high-k gate stack materials. In these gate stack materials, HfO2 and La2O3 are selected as high-k dielectrics, VO2 and ZnO serve as potential channel layer materials. The gate stack structures have been prepared using a reactive electron beam system and a plasma enhanced atomic layer deposition system. Three interrelated issues represent the central themes of the research: 1) the interface band alignment, 2) candidate high-k materials, and 3) band bending, internal electric fields, and charge transfer. 1) The most highlighted issue is the band alignment of specific high-k structures. Band alignment relationships were deduced by analysis of XPS and UPS spectra for three different structures: a) HfO2/VO2/SiO2/Si, b) HfO 2-La2O3/ZnO/SiO2/Si, and c) HfO 2/VO2/ HfO2/SiO2/Si. The valence band offset of HfO2/VO2, ZnO/SiO2 and HfO 2/SiO2 are determined to be 3.4 +/- 0.1, 1.5 +/- 0.1, and 0.7 +/- 0.1 eV. The valence band offset between HfO2-La2O3 and ZnO was almost negligible. Two band alignment models, the electron affinity model and the charge neutrality level model, are discussed. The results show the charge neutrality model is preferred to describe these structures. 2) High-k candidate materials were studied through comparison of pure Hf oxide, pure La oxide, and alloyed Hf-La oxide films. An issue with the application of pure HfO2 is crystallization which may increase the leakage current in gate stack structures. An issue with the application of pure La2O3 is the presence of carbon contamination in the film. Our study shows that the alloyed Hf-La oxide films exhibit an amorphous structure along with reduced carbon contamination. 3) Band bending and internal electric fields in the gate stack structure were observed by XPS and UPS and indicate the charge transfer during the growth and process. The oxygen

Role of Oxygen in Ionic Liquid Gating on Two-Dimensional Cr2Ge2Te6: A Non-oxide Material.

Science.gov (United States)

Chen, Yangyang; Xing, Wenyu; Wang, Xirui; Shen, Bowen; Yuan, Wei; Su, Tang; Ma, Yang; Yao, Yunyan; Zhong, Jiangnan; Yun, Yu; Xie, X C; Jia, Shuang; Han, Wei

2018-01-10

Ionic liquid gating can markedly modulate a material's carrier density so as to induce metallization, superconductivity, and quantum phase transitions. One of the main issues is whether the mechanism of ionic liquid gating is an electrostatic field effect or an electrochemical effect, especially for oxide materials. Recent observation of the suppression of the ionic liquid gate-induced metallization in the presence of oxygen for oxide materials suggests the electrochemical effect. However, in more general scenarios, the role of oxygen in the ionic liquid gating effect is still unclear. Here, we perform ionic liquid gating experiments on a non-oxide material: two-dimensional ferromagnetic Cr 2 Ge 2 Te 6 . Our results demonstrate that despite the large increase of the gate leakage current in the presence of oxygen, the oxygen does not affect the ionic liquid gating effect on  the channel resistance of Cr 2 Ge 2 Te 6 devices (ionic liquid gating is more effective on the modulation of the channel resistances compared to the back gating across the 300 nm thick SiO 2 .

Optical and electrical properties of SnO2 thin films after ultra-short pulsed laser annealing

OpenAIRE

Scorticati, D.; Illiberi, A.; Römer, G.R.B.E.; Bor, T.; Ogieglo, W.; Klein Gunnewiek, M.; Lenferink, A.; Otto, C.; Skolski, J.Z.P.; Grob, F.; Lange, D.F. de; Huis in 't Veld, A.J.

2013-01-01

Ultra-short pulsed laser sources, with pulse durations in the ps and fs regime, are commonly exploited for cold ablation. However, operating ultra-short pulsed laser sources at fluence levels well below the ablation threshold allows for fast and selective thermal processing. The latter is especially advantageous for the processing of thin films. A precise control of the heat affected zone, as small as tens of nanometers, depending on the material and laser conditions, can be achieved. It enab...

Development and implementation of ultra-thin concrete road technology for suburban streets in South Africa

CSIR Research Space (South Africa)

Louw, MR

2011-01-01

Full Text Available Louw, FC Rust, AO Bergh and AH McKay DEVELOPMENT AND IMPLEMENTATIONN OF ULTRA- THIN CONCRETE ROAD TECHNOLOGY FOR SUBURBAN STREETS IN SOUTH AFRICA MR Louw, FC Rust, AO Bergh and AH McKay CSIR, Republic of South Africa rlouw...

Low-voltage organic thin film transistors (OTFTs) using crosslinked polyvinyl alcohol (PVA)/neodymium oxide (Nd2O3) bilayer gate dielectrics

Science.gov (United States)

Khound, Sagarika; Sarma, Ranjit

2018-01-01

We have reported here on the design, processing and dielectric properties of pentacene-based organic thin film transitors (OTFTs) with a bilayer gate dilectrics of crosslinked PVA/Nd2O3 which enables low-voltage organic thin film operations. The dielectric characteristics of PVA/Nd2O3 bilayer films are studied by capacitance-voltage ( C- V) and current-voltage ( I- V) curves in the metal-insulator-metal (MIM) structure. We have analysed the output electrical responses and transfer characteristics of the OTFT devices to determine their performance of OTFT parameters. The mobility of 0.94 cm2/Vs, the threshold voltage of - 2.8 V, the current on-off ratio of 6.2 × 105, the subthreshold slope of 0.61 V/decade are evaluated. Low leakage current of the device is observed from current density-electric field ( J- E) curve. The structure and the morphology of the device are studied using X-ray diffraction (XRD) and atomic force microscope (AFM), respectively. The study demonstrates an effective way to realize low-voltage, high-performance OTFTs at low cost.

Design of an ultra-thin dual band infrared system

Science.gov (United States)

Du, Ke; Cheng, Xuemin; Lv, Qichao; Hu, YiFei

2014-11-01

The ultra-thin imaging system using reflective multiple-fold structure has smaller volume and less weight while maintaining high resolution compared with conventional optical systems. The multi-folded approach can significantly extend focal distance within wide spectral range without incurring chromatic aberrations. In this paper, we present a dual infrared imaging system of four-folded reflection with two air-spaced concentric reflective surfaces. The dual brand IR system has 107mm effective focal length, 0.7NA, +/-4° FOV, and 50mm effective aperture with 80mm outer diameter into a 25mm total thickness, which spectral response is 3~12μm.

Crystalline-like temperature dependence of the electrical characteristics in amorphous Indium-Gallium-Zinc-Oxide thin film transistors

Science.gov (United States)

Estrada, M.; Hernandez-Barrios, Y.; Cerdeira, A.; Ávila-Herrera, F.; Tinoco, J.; Moldovan, O.; Lime, F.; Iñiguez, B.

2017-09-01

A crystalline-like temperature dependence of the electrical characteristics of amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) thin film transistors (TFTs) is reported, in which the drain current reduces as the temperature is increased. This behavior appears for values of drain and gate voltages above which a change in the predominant conduction mechanism occurs. After studying the possible conduction mechanisms, it was determined that, for gate and drain voltages below these values, hopping is the predominant mechanism with the current increasing with temperature, while for values above, the predominant conduction mechanism becomes percolation in the conduction band or band conduction and IDS reduces as the temperature increases. It was determined that this behavior appears, when the effect of trapping is reduced, either by varying the density of states, their characteristic energy or both. Simulations were used to further confirm the causes of the observed behavior.

Ferroelectric transistors with monolayer molybdenum disulfide and ultra-thin aluminum-doped hafnium oxide

Science.gov (United States)

Yap, Wui Chung; Jiang, Hao; Liu, Jialun; Xia, Qiangfei; Zhu, Wenjuan

2017-07-01

In this letter, we demonstrate ferroelectric memory devices with monolayer molybdenum disulfide (MoS2) as the channel material and aluminum (Al)-doped hafnium oxide (HfO2) as the ferroelectric gate dielectric. Metal-ferroelectric-metal capacitors with 16 nm thick Al-doped HfO2 are fabricated, and a remnant polarization of 3 μC/cm2 under a program/erase voltage of 5 V is observed. The capability of potential 10 years data retention was estimated using extrapolation of the experimental data. Ferroelectric transistors based on embedded ferroelectric HfO2 and MoS2 grown by chemical vapor deposition are fabricated. Clockwise hysteresis is observed at low program/erase voltages due to slow bulk traps located near the 2D/dielectric interface, while counterclockwise hysteresis is observed at high program/erase voltages due to ferroelectric polarization. In addition, the endurances of the devices are tested, and the effects associated with ferroelectric materials, such as the wake-up effect and polarization fatigue, are observed. Reliable writing/reading in MoS2/Al-doped HfO2 ferroelectric transistors over 2 × 104 cycles is achieved. This research can potentially lead to advances of two-dimensional (2D) materials in low-power logic and memory applications.

Performance of organic field effect transistors with high-k gate oxide after application of consecutive bias stress

Energy Technology Data Exchange (ETDEWEB)

Lee, Sunwoo; Choi, Changhwan; Lee, Kilbock [Department of Materials Science and Engineering, Hanyang University, Seoul, 133-791 (Korea, Republic of); Cho, Joong Hwee [Department of Embedded Systems Engineering,University of Incheon, Incheon 406-722 (Korea, Republic of); Ko, Ki-Young [Korea Institute of Patent Information, Seoul, 146-8 (Korea, Republic of); Ahn, Jinho, E-mail: jhahn@hanyang.ac.kr [Department of Materials Science and Engineering, Hanyang University, Seoul, 133-791 (Korea, Republic of)

2012-10-30

We report the effect of consecutive electrical stress on the performance of organic field effect transistors (OFETs). Sputtered aluminum oxide (Al{sub 2}O{sub 3}) and hafnium oxide (HfO{sub 2}) were used as gate oxide layers. After the electrical stress, the threshold voltage, which strongly depends on bulk defects, was remarkably shifted to the negative direction, while the other performance characteristics of OFETs such as on-current, transconductance and mobility, which are sensitive to interface defects, were slightly decreased. This result implies that the defects in the bulk layer are significantly affected compared to the defects in the interface layer. Thus, it is important to control the defects in the pentacene bulk layer in order to maintain the good reliabilities of pentacene devices. Those defects in HfO{sub 2} gate oxide devices were larger compared to those in Al{sub 2}O{sub 3} gate oxide devices.

Influence of implantation energy on the electrical properties of ultrathin gate oxides grown on nitrogen implanted Si substrates

International Nuclear Information System (INIS)

Kapetanakis, E.; Skarlatos, D.; Tsamis, C.; Normand, P.; Tsoukalas, D.

2003-01-01

Metal-oxide-semiconductor tunnel diodes with gate oxides, in the range of 2.5-3.5 nm, grown either on 25 or 3 keV nitrogen-implanted Si substrates at (0.3 or 1) x10 15 cm -2 dose, respectively, are investigated. The dependence of N 2 + ion implant energy on the electrical quality of the growing oxide layers is studied through capacitance, equivalent parallel conductance, and gate current measurements. Superior electrical characteristics in terms of interface state trap density, leakage current, and breakdown fields are found for oxides obtained through 3 keV nitrogen implants. These findings together with the full absence of any extended defect in the silicon substrate make the low-energy nitrogen implantation technique an attractive option for reproducible low-cost growth of nanometer-thick gate oxides

Ultra-Low Power Consuming Direct Radiation Sensors Based on Floating Gate Structures

Directory of Open Access Journals (Sweden)

Evgeny Pikhay

2017-07-01

Full Text Available In this paper, we report on ultra-low power consuming single poly floating gate direct radiation sensors. The developed devices are intended for total ionizing dose (TID measurements and fabricated in a standard CMOS process flow. Sensor design and operation is discussed in detail. Original array sensors were suggested and fabricated that allowed high statistical significance of the radiation measurements and radiation imaging functions. Single sensors and array sensors were analyzed in combination with the specially developed test structures. This allowed insight into the physics of sensor operations and exclusion of the phenomena related to material degradation under irradiation in the interpretation of the measurement results. Response of the developed sensors to various sources of ionizing radiation (Gamma, X-ray, UV, energetic ions was investigated. The optimal design of sensor for implementation in dosimetry systems was suggested. The roadmap for future improvement of sensor performance is suggested.

Impedance Characterization of the Capacitive field-Effect pH-Sensor Based on a thin-Layer Hafnium Oxide Formed by Atomic Layer Deposition

Directory of Open Access Journals (Sweden)

Michael LEE

2014-05-01

Full Text Available As a sensing element, silicon dioxide (SiO2 has been applied within ion-sensitive field effect transistors (ISFET. However, a requirement of increasing pH-sensitivity and stability has observed an increased number of insulating materials that obtain high-k gate being applied as FETs. The increased high-k gate reduces the required metal oxide layer and, thus, the fabrication of thin hafnium oxide (HfO2 layers by atomic layer deposition (ALD has grown with interest in recent years. This metal oxide presents advantageous characteristics that can be beneficial for the advancements within miniaturization of complementary metal oxide semiconductor (CMOS technology. In this article, we describe a process for fabrication of HfO2 based on ALD by applying water (H2O as the oxygen precursor. As a first, electrochemical impedance spectroscopy (EIS measurements were performed with varying pH (2-10 to demonstrate the sensitivity of HfO2 as a potential pH sensing material. The Nyquist plot demonstrates a high clear shift of the polarization resistance (Rp between pH 6-10 (R2 = 0.9986, Y = 3,054X + 12,100. At acidic conditions (between pH 2-10, the Rp change was small due to the unmodified oxide gate (R2 = 0.9655, Y = 2,104X + 4,250. These preliminary results demonstrate the HfO2 substrate functioned within basic to neutral conditions and establishes a great potential for applying HfO2 as a dielectric material for future pH measuring FET sensors.

Anomalous aging and strain induced time dependent phenomena in ultra-thin La0.65Ca0.35MnO3 films

International Nuclear Information System (INIS)

Egilmez, M.; Saber, M.M.; Abdelhadi, M.; Chow, K.H.; Jung, J.

2011-01-01

We have shown that ultra-thin La 0.65 Ca 0.35 MnO 3 films exhibit strong metastable behavior. The resistance can vary with time significantly, suggesting that a state of dynamic phase separation exists whereby one phase grows at the expense of another. Physical properties associated with the metastable behavior have been investigated on the films grown on different substrates. We have found that ultra-thin films age much faster than the thicker counterparts and more interestingly the metastability in the resistance of these films enhanced when aged. -- Highlights: → Ultra-thin La 0.67 Ca 0.33 MnO 3 films exhibit metastable behavior. → Physical properties associated with metastable behavior have been investigated. → The metastability in resistance of the films enhanced when films are aged. → Relaxation rates were used as a relative measure the metastability. → The metastable behavior is sensitive to the strain state of the film.

A study on the optics of copper indium gallium (di)selenide (CIGS) solar cells with ultra-thin absorber layers.

Science.gov (United States)

Xu, Man; Wachters, Arthur J H; van Deelen, Joop; Mourad, Maurice C D; Buskens, Pascal J P

2014-03-10

We present a systematic study of the effect of variation of the zinc oxide (ZnO) and copper indium gallium (di)selenide (CIGS) layer thickness on the absorption characteristics of CIGS solar cells using a simulation program based on finite element method (FEM). We show that the absorption in the CIGS layer does not decrease monotonically with its layer thickness due to interference effects. Ergo, high precision is required in the CIGS production process, especially when using ultra-thin absorber layers, to accurately realize the required thickness of the ZnO, cadmium sulfide (CdS) and CIGS layer. We show that patterning the ZnO window layer can strongly suppress these interference effects allowing a higher tolerance in the production process.

High-performance carbon-nanotube-based complementary field-effect-transistors and integrated circuits with yttrium oxide

Energy Technology Data Exchange (ETDEWEB)

Liang, Shibo; Zhang, Zhiyong, E-mail: zyzhang@pku.edu.cn; Si, Jia; Zhong, Donglai; Peng, Lian-Mao, E-mail: lmpeng@pku.edu.cn [Key Laboratory for the Physics and Chemistry of Nanodevices, Department of Electronics, Peking University, Beijing 100871 (China)

2014-08-11

High-performance p-type carbon nanotube (CNT) transistors utilizing yttrium oxide as gate dielectric are presented by optimizing oxidization and annealing processes. Complementary metal-oxide-semiconductor (CMOS) field-effect-transistors (FETs) are then fabricated on CNTs, and the p- and n-type devices exhibit symmetrical high performances, especially with low threshold voltage near to zero. The corresponding CMOS CNT inverter is demonstrated to operate at an ultra-low supply voltage down to 0.2 V, while displaying sufficient voltage gain, high noise margin, and low power consumption. Yttrium oxide is proven to be a competitive gate dielectric for constructing high-performance CNT CMOS FETs and integrated circuits.

A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under simultaneous negative gate bias and illumination

Energy Technology Data Exchange (ETDEWEB)

Flewitt, A. J., E-mail: ajf@eng.cam.ac.uk [Electrical Engineering Division, Cambridge University, J J Thomson Avenue, Cambridge CB3 0FA (United Kingdom); Powell, M. J. [252, Valley Drive, Kendal LA9 7SL (United Kingdom)

2014-04-07

It has been previously observed that thin film transistors (TFTs) utilizing an amorphous indium gallium zinc oxide (a-IGZO) semiconducting channel suffer from a threshold voltage shift when subjected to a negative gate bias and light illumination simultaneously. In this work, a thermalization energy analysis has been applied to previously published data on negative bias under illumination stress (NBIS) in a-IGZO TFTs. A barrier to defect conversion of 0.65–0.75 eV is extracted, which is consistent with reported energies of oxygen vacancy migration. The attempt-to-escape frequency is extracted to be 10{sup 6}−10{sup 7} s{sup −1}, which suggests a weak localization of carriers in band tail states over a 20–40 nm distance. Models for the NBIS mechanism based on charge trapping are reviewed and a defect pool model is proposed in which two distinct distributions of defect states exist in the a-IGZO band gap: these are associated with states that are formed as neutrally charged and 2+ charged oxygen vacancies at the time of film formation. In this model, threshold voltage shift is not due to a defect creation process, but to a change in the energy distribution of states in the band gap upon defect migration as this allows a state formed as a neutrally charged vacancy to be converted into one formed as a 2+ charged vacancy and vice versa. Carrier localization close to the defect migration site is necessary for the conversion process to take place, and such defect migration sites are associated with conduction and valence band tail states. Under negative gate bias stressing, the conduction band tail is depleted of carriers, but the bias is insufficient to accumulate holes in the valence band tail states, and so no threshold voltage shift results. It is only under illumination that the quasi Fermi level for holes is sufficiently lowered to allow occupation of valence band tail states. The resulting charge localization then allows a negative threshold voltage

Finite Element Modelling of Bends and Creases during Folding Ultra Thin Stainless Steel Foils

NARCIS (Netherlands)

Datta, K.; Akagi, H.; Geijselaers, Hubertus J.M.; Huetink, Han

2003-01-01

Finite Element Modelling of an ultra thin foil of SUS 304 stainless steel is carried out. These foils are 20 mm and below in thickness. The development of stresses and strains during folding of these foils is studied. The objective of this study is to induce qualities of paper in the foils of

Silver nanoparticle formation in thin oxide layer on silicon by silver-negative-ion implantation for Coulomb blockade at room temperature

International Nuclear Information System (INIS)

Tsuji, Hiroshi; Arai, Nobutoshi; Matsumoto, Takuya; Ueno, Kazuya; Gotoh, Yasuhito; Adachi, Kouichiro; Kotaki, Hiroshi; Ishikawa, Junzo

2004-01-01

Formation of silver nanoparticles formed by silver negative-ion implantation in a thin SiO 2 layer and its I-V characteristics were investigated for development single electron devices. In order to obtain effective Coulomb blockade phenomenon at room temperature, the isolated metal nanoparticles should be in very small size and be formed in a thin insulator layer such as gate oxide on the silicon substrate. Therefore, conditions of a fine particles size, high particle density and narrow distribution should be controlled at their formation without any electrical breakdown of the thin insulator layer. We have used a negative-ion implantation technique with an advantage of 'charge-up free' for insulators, with which no breakdown of thin oxide layer on Si was obtained. In the I-V characteristics with Au electrode, the current steps were observed with a voltage interval of about 0.12 V. From the step voltage the corresponded capacitance was calculated to be 0.7 aF. In one nanoparticle system, this value of capacitance could be given by a nanoparticle of about 3 nm in diameter. This consideration is consistent to the measured particle size in the cross-sectional TEM observation. Therefore, the observed I-V characteristics with steps are considered to be Coulomb staircase by the Ag nanoparticles

Combustion synthesized indium-tin-oxide (ITO) thin film for source/drain electrodes in all solution-processed oxide thin-film transistors

International Nuclear Information System (INIS)

Tue, Phan Trong; Inoue, Satoshi; Takamura, Yuzuru; Shimoda, Tatsuya

2016-01-01

We report combustion solution synthesized (SCS) indium-tin-oxide (ITO) thin film, which is a well-known transparent conductive oxide, for source/drain (S/D) electrodes in solution-processed amorphous zirconium-indium-zinc-oxide TFT. A redox-based combustion synthetic approach is applied to ITO thin film using acetylacetone as a fuel and metal nitrate as oxidizer. The structural and electrical properties of SCS-ITO precursor solution and thin films were systematically investigated with changes in tin concentration, indium metal precursors, and annealing conditions such as temperature, time, and ambient. It was found that at optimal conditions the SCS-ITO thin film exhibited high crystalline quality, atomically smooth surface (RMS ∝ 4.1 Aa), and low electrical resistivity (4.2 x 10 -4 Ω cm). The TFT using SCS-ITO film as the S/D electrodes showed excellent electrical properties with negligible hysteresis. The obtained ''on/off'' current ratio, subthreshold swing factor, subthreshold voltage, and field-effect mobility were 5 x 10 7 , 0.43 V/decade, 0.7 V, and 2.1 cm 2 /V s, respectively. The performance and stability of the SCS-ITO TFT are comparable to those of the sputtered-ITO TFT, emphasizing that the SCS-ITO film is a promising candidate for totally solution-processed oxide TFTs. (orig.)

How Do Organic Vapors Swell Ultra-Thin PIM-1 Films?

KAUST Repository

Ogieglo, Wojciech

2017-06-22

Dynamic sorption of ethanol and toluene vapor into ultra-thin supported PIM-1 films down to 6 nm are studied with a combination of in-situ spectroscopic ellipsometry and in-situ X-ray reflectivity. Both ethanol and toluene significantly swell the PIM-1 matrix and, at the same time, induce persistent structural relaxations of the frozen-in glassy PIM-1 morphology. For ethanol below 20 nm three effects were identified. First, the swelling magnitude at high vapor pressures is reduced by about 30% as compared to thicker films. Second, at low penetrant activities (below 0.3 p/p0) films below 20 nm are able to absorb slightly more penetrant as compared with thicker films despite similar swelling magnitude. Third, for the ultra-thin films the onset of the dynamic penetrant-induced glass transition Pg has been found to shift to higher values indicating higher resistance to plasticization. All of these effects are consistent with a view where immobilization of the super-glassy PIM-1 at the substrate surface leads to an arrested, even more rigid and plasticization-resistant, yet still very open, microporous structure. PIM-1 in contact with the larger and more condensable toluene shows very complex, heterogeneous swelling dynamics and two distinct penetrant-induced relaxation phenomena, probably associated with the film outer surface and the bulk, are detected. Following the direction of the penetrant\\'s diffusion the surface seems to plasticize earlier than the bulk and the two relaxations remain well separated down to 6 nm film thickness, where they remarkably merge to form just a single relaxation.

Amorphous Zinc Oxide Integrated Wavy Channel Thin Film Transistor Based High Performance Digital Circuits

KAUST Repository

Hanna, Amir

2015-12-04

High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (ZnO) present promising opportunity in that regard, still wide area of improvement exists to increase the performance further. Here, we show a wavy channel (WC) architecture for ZnO integrated TFT which increases transistor width without chip area penalty, enabling high performance in material agnostic way. We further demonstrate digital logic NAND circuit using the WC architecture and compare it to the conventional planar architecture. The WC architecture circuits have shown 2× higher peak-to-peak output voltage for the same input voltage. They also have 3× lower high-to-low propagation delay times, respectively, when compared to the planar architecture. The performance enhancement is attributed to both extra device width and enhanced field effect mobility due to higher gate field electrostatics control.

ZnO nanowire-based nano-floating gate memory with Pt nanocrystals embedded in Al{sub 2}O{sub 3} gate oxides

Energy Technology Data Exchange (ETDEWEB)

Yeom, Donghyuk; Kang, Jeongmin; Lee, Myoungwon; Jang, Jaewon; Yun, Junggwon; Jeong, Dong-Young; Yoon, Changjoon; Koo, Jamin; Kim, Sangsig [Department of Electrical Engineering and Institute for Nano Science, Korea University, Seoul 136-701 (Korea, Republic of)], E-mail: sangsig@korea.ac.kr

2008-10-01

The memory characteristics of ZnO nanowire-based nano-floating gate memory (NFGM) with Pt nanocrystals acting as the floating gate nodes were investigated in this work. Pt nanocrystals were embedded between Al{sub 2}O{sub 3} tunneling and control oxide layers deposited on ZnO nanowire channels. For a representative ZnO nanowire-based NFGM with embedded Pt nanocrystals, a threshold voltage shift of 3.8 V was observed in its drain current versus gate voltage (I{sub DS}-V{sub GS}) measurements for a double sweep of the gate voltage, revealing that the deep effective potential wells built into the nanocrystals provide our NFGM with a large charge storage capacity. Details of the charge storage effect observed in this memory device are discussed in this paper.

Transport properties of ultra-thin granular YBa2Cu3O7−δ nanobridges

International Nuclear Information System (INIS)

Bar, E.; Levi, D.; Koren, G.; Shaulov, A.; Yeshurun, Y.

2014-01-01

Highlights: • Nano bridges were patterned on laser ablated ultra-thin YBa 2 Cu 3 O 7 films. • Magneto-transport measurements reveal phenomena that are usually absent in the bulk. • Magnetoresistance (MR) oscillation point to effect of granularity. • Negative MR at low fields and negative MR slope at high fields were observed. • V-I curves exhibit voltage jumps at temperatures well below T c . - Abstract: Magneto-transport measurements in YBa 2 Cu 3 O 7 nanobridges, patterned on laser ablated ultra-thin films, reveal phenomena that are usually absent in the bulk of the material. These include broadening of the resistive transition, magnetoresistance oscillation, negative magnetoresistance at low fields, negative magnetoresistance slope at high fields, and V–I curves that exhibit voltage jumps at temperatures well below T c . These phenomena, attributed to the granular nature of the bridges, should be taken into account in any future attempts to utilize such bridges in technological applications

The Performance Improvement of N2 Plasma Treatment on ZrO2 Gate Dielectric Thin-Film Transistors with Atmospheric Pressure Plasma-Enhanced Chemical Vapor Deposition IGZO Channel.

Science.gov (United States)

Wu, Chien-Hung; Huang, Bo-Wen; Chang, Kow-Ming; Wang, Shui-Jinn; Lin, Jian-Hong; Hsu, Jui-Mei

2016-06-01

The aim of this paper is to illustrate the N2 plasma treatment for high-κ ZrO2 gate dielectric stack (30 nm) with indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs). Experimental results reveal that a suitable incorporation of nitrogen atoms could enhance the device performance by eliminating the oxygen vacancies and provide an amorphous surface with better surface roughness. With N2 plasma treated ZrO2 gate, IGZO channel is fabricated by atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) technique. The best performance of the AP-PECVD IGZO TFTs are obtained with 20 W-90 sec N2 plasma treatment with field-effect mobility (μ(FET)) of 22.5 cm2/V-s, subthreshold swing (SS) of 155 mV/dec, and on/off current ratio (I(on)/I(off)) of 1.49 x 10(7).

Mixed-Penetrant Sorption in Ultra-Thin Films of Polymer of Intrinsic Microporosity PIM-1

KAUST Repository

Ogieglo, Wojciech; Furchner, Andreas; Ghanem, Bader; Ma, Xiao-Hua; Pinnau, Ingo; Wessling, Matthias

2017-01-01

Mixed penetrant sorption into ultra-thin films of a super-glassy polymer of intrinsic microporosity (PIM-1) was studied for the first time by using interference-enhanced in-situ spectroscopic ellipsometry. PIM-1 swelling and the concurrent changes in its refractive index were determined in ultra-thin (12 - 14 nm) films exposed to pure and mixed penetrants. The penetrants included water, n-hexane and ethanol and were chosen based on their significantly different penetrant-penetrant and penetrant-polymer affinities. This allowed studying microporous polymer responses at diverse ternary compositions and revealed effects such as competition for the sorption sites (for water / n-hexane or ethanol / n-hexane) or enhancement in sorption of typically weakly sorbing water in the presence of more highly sorbing ethanol. The results reveal details of the mutual sorption effects which often complicate comprehension of glassy polymers' behavior in applications such as high-performance membranes, adsorbents or catalysts. Mixed-penetrant effects are typically very challenging to study directly and their understanding is necessary owing to a broadly recognized inadequacy of simple extrapolations from measurements in pure component environment.

Mixed-Penetrant Sorption in Ultra-Thin Films of Polymer of Intrinsic Microporosity PIM-1

KAUST Repository

Ogieglo, Wojciech

2017-10-12

Mixed penetrant sorption into ultra-thin films of a super-glassy polymer of intrinsic microporosity (PIM-1) was studied for the first time by using interference-enhanced in-situ spectroscopic ellipsometry. PIM-1 swelling and the concurrent changes in its refractive index were determined in ultra-thin (12 - 14 nm) films exposed to pure and mixed penetrants. The penetrants included water, n-hexane and ethanol and were chosen based on their significantly different penetrant-penetrant and penetrant-polymer affinities. This allowed studying microporous polymer responses at diverse ternary compositions and revealed effects such as competition for the sorption sites (for water / n-hexane or ethanol / n-hexane) or enhancement in sorption of typically weakly sorbing water in the presence of more highly sorbing ethanol. The results reveal details of the mutual sorption effects which often complicate comprehension of glassy polymers\\' behavior in applications such as high-performance membranes, adsorbents or catalysts. Mixed-penetrant effects are typically very challenging to study directly and their understanding is necessary owing to a broadly recognized inadequacy of simple extrapolations from measurements in pure component environment.

Development and characterization of ultrathin hafnium titanates as high permittivity gate insulators

Science.gov (United States)

Li, Min

High permittivity or high-kappa materials are being developed for use as gate insulators for future ultrascaled metal oxide semiconductor field effect transistors (MOSFETs). Hafnium containing compounds are the leading candidates. Due to its moderate permittivity, however, it is difficult to achieve HfO2 gate structures with an EOT well below 1.0 nm. One approach to increase HfO2 permittivity is combining it with a very high-kappa material, such as TiO2. In this thesis, we systematically studied the electrical and physical characteristics of high-kappa hafnium titanates films as gate insulators. A series of HfxTi1-xO2 films with well-controlled composition were deposited using an MOCVD system. The physical properties of the films were analyzed using a variety of characterization techniques. X-ray micro diffraction indicates that the Ti-rich thin film is more immune to crystallization. TEM analysis showed that the thick stoichiometric HfTiO 4 film has an orthorhombic structure and large anisotropic grains. The C-V curves from the devices with the hafnium titanates films displayed relatively low hysteresis. In a certain composition range, the interfacial layer (IL) EOT and permittivity of HfxTi1-x O2 increases linearly with increasing Ti. The charge is negative for HfxTi1-xO2/IL and positive for Si/IL interface, and the magnitude increases as Hf increases. For ultra-thin films (less than 2 nm EOT), the leakage current increases with increasing HE Moreover, the Hf-rich sample has weaker temperature dependence of the current. In the MOSFET devices with the hafnium titanates films, normal transistor characteristics were observed, also electron mobility degradation. Next, we investigated the effects that different pre-deposition surface treatments, including HF dipping, NH3 surface nitridation, and HfO2 deposition, have on the electrical properties of hafnium titanates. Surface nitridation shows stronger effect than the thin HfO2 layer. The nitrided samples displayed a

Characterizations of photoconductivity of graphene oxide thin films

Directory of Open Access Journals (Sweden)

Shiang-Kuo Chang-Jian

2012-06-01

Full Text Available Characterizations of photoresponse of a graphene oxide (GO thin film to a near infrared laser light were studied. Results showed the photocurrent in the GO thin film was cathodic, always flowing in an opposite direction to the initial current generated by the preset bias voltage that shows a fundamental discrepancy from the photocurrent in the reduced graphene oxide thin film. Light illumination on the GO thin film thus results in more free electrons that offset the initial current. By examining GO thin films reduced at different temperatures, the critical temperature for reversing the photocurrent from cathodic to anodic was found around 187°C. The dynamic photoresponse for the GO thin film was further characterized through the response time constants within the laser on and off durations, denoted as τon and τoff, respectively. τon for the GO thin film was comparable to the other carbon-based thin films such as carbon nanotubes and graphenes. τoff was, however, much larger than that of the other's. This discrepancy was attributable to the retardation of exciton recombination rate thanks to the existing oxygen functional groups and defects in the GO thin films.

Nanosecond Time-Resolved Microscopic Gate-Modulation Imaging of Polycrystalline Organic Thin-Film Transistors

Science.gov (United States)

Matsuoka, Satoshi; Tsutsumi, Jun'ya; Matsui, Hiroyuki; Kamata, Toshihide; Hasegawa, Tatsuo

2018-02-01

We develop a time-resolved microscopic gate-modulation (μ GM ) imaging technique to investigate the temporal evolution of the channel current and accumulated charges in polycrystalline pentacene thin-film transistors (TFTs). A time resolution of as high as 50 ns is achieved by using a fast image-intensifier system that could amplify a series of instantaneous optical microscopic images acquired at various time intervals after the stepped gate bias is switched on. The differential images obtained by subtracting the gate-off image allows us to acquire a series of temporal μ GM images that clearly show the gradual propagation of both channel charges and leaked gate fields within the polycrystalline channel layers. The frontal positions for the propagations of both channel charges and leaked gate fields coincide at all the time intervals, demonstrating that the layered gate dielectric capacitors are successively transversely charged up along the direction of current propagation. The initial μ GM images also indicate that the electric field effect is originally concentrated around a limited area with a width of a few micrometers bordering the channel-electrode interface, and that the field intensity reaches a maximum after 200 ns and then decays. The time required for charge propagation over the whole channel region with a length of 100 μ m is estimated at about 900 ns, which is consistent with the measured field-effect mobility and the temporal-response model for organic TFTs. The effect of grain boundaries can be also visualized by comparison of the μ GM images for the transient and the steady states, which confirms that the potential barriers at the grain boundaries cause the transient shift in the accumulated charges or the transient accumulation of additional charges around the grain boundaries.

On the difference between optically and electrically determined resistivity of ultra-thin titanium nitride films

NARCIS (Netherlands)

Van Hao, B.; Kovalgin, Alexeij Y.; Wolters, Robertus A.M.

2013-01-01

This work reports on the determination and comparison of the resistivity of ultra-thin atomic layer deposited titanium nitride films in the thickness range 0.65–20 nm using spectroscopic ellipsometry and electrical test structures. We found that for films thicker than 4 nm, the resistivity values

ANALYSIS ON THE BEHAVIOR OF PRECIPITATES IN ULTRA-THIN HOT STRIP OF PLAIN LOW CARBON STEEL PRODUCED BY COMPACT STRIP PRODUCTION

Institute of Scientific and Technical Information of China (English)

H. Yu; Y.L. Kang; H.B. Dong; D.L. Liu; J. Fu

2002-01-01

This paper investigated the mechanism of precipitation and its influence upon prop-erties of ultra-thin hot strips of low carbon steel produced by CSP techniques usingexperiment and thermodynamics theory. The experimental results show that thereare lots of fine and dispersive precipitates in microstructures. By analysis, most ofaluminum nitrides are in grains, while coexisted precipitates of MnS are along grainboundaries. Coexisted precipitates compose cation-vacancy type oxides such as Al2O3in the core, while MnS is at the fringe of surface. The precipitation behavior of AlNand MnS in the hot strip is studied by thermodynamic calculation. At last, implica-tions between strengthening effect and techniques are analyzed using obtained solubilityproducts.

Achieving high carrier mobility exceeding 70 cm2/Vs in amorphous zinc tin oxide thin-film transistors

Science.gov (United States)

Kim, Sang Tae; Shin, Yeonwoo; Yun, Pil Sang; Bae, Jong Uk; Chung, In Jae; Jeong, Jae Kyeong

2017-09-01

This paper proposes a new defect engineering concept for low-cost In- and Ga-free zinc tin oxide (ZTO) thin-film transistors (TFTs). This concept is comprised of capping ZTO films with tantalum (Ta) and a subsequent modest thermal annealing treatment at 200 °C. The Ta-capped ZTO TFTs exhibited a remarkably high carrier mobility of 70.8 cm2/Vs, low subthreshold gate swing of 0.18 V/decade, threshold voltage of -1.3 V, and excellent ION/OFF ratio of 2 × 108. The improvement (> two-fold) in the carrier mobility compared to the uncapped ZTO TFT can be attributed to the effective reduction of the number of adverse tailing trap states, such as hydroxyl groups or oxygen interstitial defects, which stems from the scavenging effect of the Ta capping layer on the ZTO channel layer. Furthermore, the Ta-capped ZTO TFTs showed excellent positive and negative gate bias stress stabilities. [Figure not available: see fulltext.

Oxide Thin-Film Electronics using All-MXene Electrical Contacts

KAUST Repository

Wang, Zhenwei

2018-02-23

2D MXenes have shown great promise in electrochemical and electromagnetic shielding applications. However, their potential use in electronic devices is significantly less explored. The unique combination of metallic conductivity and hydrophilic surface suggests that MXenes can also be promising in electronics and sensing applications. Here, it is shown that metallic Ti3C2 MXene with work function of 4.60 eV can make good electrical contact with both zinc oxide (ZnO) and tin monoxide (SnO) semiconductors, with negligible band offsets. Consequently, both n-type ZnO and p-type SnO thin-film transistors (TFTs) have been fabricated entirely using large-area MXene (Ti3C2) electrical contacts, including gate, source, and drain. The n- and p-type TFTs show balanced performance, including field-effect mobilities of 2.61 and 2.01 cm2 V−1 s−1 and switching ratios of 3.6 × 106 and 1.1 × 103, respectively. Further, complementary metal oxide semiconductor (CMOS) inverters are demonstrated. The CMOS inverters show large voltage gain of 80 and excellent noise margin of 3.54 V, which is 70.8% of the ideal value. Moreover, the operation of CMOS inverters is shown to be very stable under a 100 Hz square waveform input. The current results suggest that MXene (Ti3C2) can play an important role as contact material in nanoelectronics.

Review of recent developments in amorphous oxide semiconductor thin-film transistor devices

International Nuclear Information System (INIS)

Park, Joon Seok; Maeng, Wan-Joo; Kim, Hyun-Suk; Park, Jin-Seong

2012-01-01

The present article is a review of the recent progress and major trends in the field of thin-film transistor (TFT) research involving the use of amorphous oxide semiconductors (AOS). First, an overview is provided on how electrical performance may be enhanced by the adoption of specific device structures and process schemes, the combination of various oxide semiconductor materials, and the appropriate selection of gate dielectrics and electrode metals in contact with the semiconductor. As metal oxide TFT devices are excellent candidates for switching or driving transistors in next generation active matrix liquid crystal displays (AMLCD) or active matrix organic light emitting diode (AMOLED) displays, the major parameters of interest in the electrical characteristics involve the field effect mobility (μ FE ), threshold voltage (V th ), and subthreshold swing (SS). A study of the stability of amorphous oxide TFT devices is presented next. Switching or driving transistors in AMLCD or AMOLED displays inevitably involves voltage bias or constant current stress upon prolonged operation, and in this regard many research groups have examined and proposed device degradation mechanisms under various stress conditions. The most recent studies involve stress experiments in the presence of visible light irradiating the semiconductor, and different degradation mechanisms have been proposed with respect to photon radiation. The last part of this review consists of a description of methods other than conventional vacuum deposition techniques regarding the formation of oxide semiconductor films, along with some potential application fields including flexible displays and information storage.

Ultra-high performance supercritical fluid chromatography of lignin-derived phenols from alkaline cupric oxide oxidation.

Science.gov (United States)

Sun, Mingzhe; Lidén, Gunnar; Sandahl, Margareta; Turner, Charlotta

2016-08-01

Traditional chromatographic methods for the analysis of lignin-derived phenolic compounds in environmental samples are generally time consuming. In this work, an ultra-high performance supercritical fluid chromatography method with a diode array detector for the analysis of major lignin-derived phenolic compounds produced by alkaline cupric oxide oxidation was developed. In an analysis of a collection of 11 representative monomeric lignin phenolic compounds, all compounds were clearly separated within 6 min with excellent peak shapes, with a limit of detection of 0.5-2.5 μM, a limit of quantification of 2.5-5.0 μM, and a dynamic range of 5.0-2.0 mM (R(2) > 0.997). The new ultra-high performance supercritical fluid chromatography method was also applied for the qualitative and quantitative analysis of lignin-derived phenolic compounds obtained upon alkaline cupric oxide oxidation of a commercial humic acid. Ten out of the previous eleven model compounds could be quantified in the oxidized humic acid sample. The high separation power and short analysis time obtained demonstrate for the first time that supercritical fluid chromatography is a fast and reliable technique for the analysis of lignin-derived phenols in complex environmental samples. © 2016 The Authors, Journal of Separation Science Published by WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

Energy Technology Data Exchange (ETDEWEB)

Held, Martin; Schießl, Stefan P.; Gannott, Florentina [Department of Materials Science and Engineering, Friedrich-Alexander-Universität Erlangen-Nürnberg, Erlangen D-91058 (Germany); Institute for Physical Chemistry, Universität Heidelberg, Heidelberg D-69120 (Germany); Miehler, Dominik [Department of Materials Science and Engineering, Friedrich-Alexander-Universität Erlangen-Nürnberg, Erlangen D-91058 (Germany); Zaumseil, Jana, E-mail: zaumseil@uni-heidelberg.de [Institute for Physical Chemistry, Universität Heidelberg, Heidelberg D-69120 (Germany)

2015-08-24

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.

CMOS compatible fabrication of flexible and semi-transparent FeRAM on ultra-thin bulk monocrystalline silicon (100) fabric

KAUST Repository

Ghoneim, Mohamed T.; Hanna, Amir; Hussain, Muhammad Mustafa

2014-01-01

Commercialization of flexible electronics requires reliable, high performance, ultra-compact and low power devices. To achieve them, we fabricate traditional electronics on bulk mono-crystalline silicon (100) and transform the top portion into an ultra-thin flexible silicon fabric with prefabricated devices, preserving ultra-large-scale-integration density and same device performance. This can be done in a cost effective manner due to its full compatibility with standard CMOS processes. In this paper, using the same approach, for the first time we demonstrate a ferroelectric random access memory (FeRAM) cell on flexible silicon fabric platform and assess its functionality and practical potential.

CMOS compatible fabrication of flexible and semi-transparent FeRAM on ultra-thin bulk monocrystalline silicon (100) fabric

KAUST Repository

Ghoneim, Mohamed T.

2014-08-01

Commercialization of flexible electronics requires reliable, high performance, ultra-compact and low power devices. To achieve them, we fabricate traditional electronics on bulk mono-crystalline silicon (100) and transform the top portion into an ultra-thin flexible silicon fabric with prefabricated devices, preserving ultra-large-scale-integration density and same device performance. This can be done in a cost effective manner due to its full compatibility with standard CMOS processes. In this paper, using the same approach, for the first time we demonstrate a ferroelectric random access memory (FeRAM) cell on flexible silicon fabric platform and assess its functionality and practical potential.

Ultra-thin flexible GaAs photovoltaics in vertical forms printed on metal surfaces without interlayer adhesives

Energy Technology Data Exchange (ETDEWEB)

Kim, Juho; Song, Kwangsun; Kim, Namyun; Lee, Jongho, E-mail: jong@gist.ac.kr [School of Mechanical Engineering, Gwangju Institute of Science and Technology (GIST), Gwangju 61005 (Korea, Republic of); Research Institute for Solar and Sustainable Energies (RISE), Gwangju Institute of Science and Technology (GIST), Gwangju 61005 (Korea, Republic of); Hwang, Jeongwoo [Photonic Bio Research Center, Korea Photonics Technology Institute (KOPTI), 9 Cheomdanventure-ro 108beon-gil, Gwangju 61007 (Korea, Republic of); Shin, Jae Cheol [Department of Physics, Yeungnam University, Gyeongsan, Gyeongbuk 38541 (Korea, Republic of)

2016-06-20

Wearable flexible electronics often require sustainable power sources that are also mechanically flexible to survive the extreme bending that accompanies their general use. In general, thinner microelectronic devices are under less strain when bent. This paper describes strategies to realize ultra-thin GaAs photovoltaics through the interlayer adhesiveless transfer-printing of vertical-type devices onto metal surfaces. The vertical-type GaAs photovoltaic devices recycle reflected photons by means of bottom electrodes. Systematic studies with four different types of solar microcells indicate that the vertical-type solar microcells, at only a quarter of the thickness of similarly designed lateral-type cells, generate a level of electric power similar to that of thicker cells. The experimental results along with the theoretical analysis conducted here show that the ultra-thin vertical-type solar microcells are durable under extreme bending and thus suitable for use in the manufacturing of wearable flexible electronics.

3.4-Inch Quarter High Definition Flexible Active Matrix Organic Light Emitting Display with Oxide Thin Film Transistor

Science.gov (United States)

Hatano, Kaoru; Chida, Akihiro; Okano, Tatsuya; Sugisawa, Nozomu; Inoue, Tatsunori; Seo, Satoshi; Suzuki, Kunihiko; Oikawa, Yoshiaki; Miyake, Hiroyuki; Koyama, Jun; Yamazaki, Shunpei; Eguchi, Shingo; Katayama, Masahiro; Sakakura, Masayuki

2011-03-01

In this paper, we report a 3.4-in. flexible active matrix organic light emitting display (AMOLED) display with remarkably high definition (quarter high definition: QHD) in which oxide thin film transistors (TFTs) are used. We have developed a transfer technology in which a TFT array formed on a glass substrate is separated from the substrate by physical force and then attached to a flexible plastic substrate. Unlike a normal process in which a TFT array is directly fabricated on a thin plastic substrate, our transfer technology permits a high integration of high performance TFTs, such as low-temperature polycrystalline silicon TFTs (LTPS TFTs) and oxide TFTs, on a plastic substrate, because a flat, rigid, and thermally-stable glass substrate can be used in the TFT fabrication process in our transfer technology. As a result, this technology realized an oxide TFT array for an AMOLED on a plastic substrate. Furthermore, in order to achieve a high-definition AMOLED, color filters were incorporated in the TFT array and a white organic light-emitting diode (OLED) was combined. One of the features of this device is that the whole body of the device can be bent freely because a source driver and a gate driver can be integrated on the substrate due to the high mobility of an oxide TFT. This feature means “true” flexibility.

A study on the degradation mechanism of InGaZnO thin-film transistors under simultaneous gate and drain bias stresses based on the electronic trap characterization

International Nuclear Information System (INIS)

Jeong, Chan-Yong; Lee, Daeun; Song, Sang-Hun; Kwon, Hyuck-In; Kim, Jong In; Lee, Jong-Ho

2014-01-01

We discuss the device degradation mechanism of amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) under simultaneous gate and drain bias stresses based on the electronic trap characterization results. The transfer curve exhibits an apparent negative shift as the stress time increases, and a formation of hump is observed in the transfer curve after stresses. A notable increase of the frequency dispersion is observed after stresses in both gate-to-drain capacitance–voltage (C GD –V G ) and gate-to-source capacitance–voltage (C GS –V G ) curves, which implies that the subgap states are generated by simultaneous gate and drain bias stresses, and the damaged location is not limited to the drain side of TFTs. The larger frequency dispersion is observed in C GD –V G  curves after stresses in a wider channel device, which implies that the heat is an important factor in the generation of the subgap states under simultaneous gate and drain bias stresses in a-IGZO TFTs. Based on the electronic trap characterization results, we conclude that the impact ionization near the drain side of the device is not a dominant mechanism causing the generation of subgap states and device degradation in a-IGZO TFTs under simultaneous gate and drain bias stresses. The generation of oxygen vacancy-related donor-like traps near the conduction band edge is considered as a possible mechanism causing the device degradation under simultaneous gate and drain bias stresses in a-IGZO TFTs. (paper)

Effect of anionic dopants on thickness, morphology and electrical properties of polypyrrole ultra-thin films prepared by in situ chemical polymerization

Energy Technology Data Exchange (ETDEWEB)

Mahmoodian, Mehrnoosh [Dep. of Polymer Engineering, Nanostructured Materials Research Center, Sahand University of Technology, Tabriz 51335-1996 (Iran, Islamic Republic of); Pourabbas, Behzad, E-mail: pourabas@sut.ac.ir [Dep. of Polymer Engineering, Nanostructured Materials Research Center, Sahand University of Technology, Tabriz 51335-1996 (Iran, Islamic Republic of); Mohajerzadeh, Shams [Nano-Electronics and Thin Film Lab, School of Electrical and Computer Engineering, University of Tehran, P.O. Box 14395/515, Tehran (Iran, Islamic Republic of)

2015-05-29

The effect of different dopant anions on deposition and characteristics of polypyrrole (PPy) thin film has been studied in this work. Ultra-thin films of conducting PPy were deposited on insulating surfaces of glass and oxidized silicon wafer by in situ chemical polymerization in the presence of different anionic dopants including sodium dodecylbenzenesulfonate, sodium dodecyl sulfate, α-naphthalene sulfonic acid, anthraquinone-2-sulfonic acid sodium salt monohydrate/5-sulfosalicylic acid dehydrate, and camphor sulfonic acid. Hydrophilic/hydrophobic properties and morphology of the self-assembled monolayer of N-(3-trimethoxysilylpropyl)pyrrole, the surface modifying agent in this work, and PPy thin films were characterized before and after deposition by contact angle measurements, field emission scanning electron microscopy, and atomic force microscopy. Chemical structure, thickness, and conductivity of the thin films were also studied by attenuated total reflectance Fourier transform infrared spectrometer, ellipsometry, and four-point probe measurements. The results showed deposition of thin films of conducting PPy with comparable thickness in the range of 6-31 nm and different morphologies, uniformity, and smoothness with average roughness in the range of 0.3-6 nm and relatively high range of conductivity on the modified surfaces. - Highlights: • Conducting thin films of polypyrrole were deposited on glass and SiO{sub 2} substrates. • Surface modification using pyrrole-silane was employed prior to polymerization. • Films as thin as ≈ 7 nm were deposited using different surfactant/counter ions. • Chemistry of the counter ion affects thickness, conductivity and morphology. • Lower thickness/higher conductivity were obtained by structurally flexible dopants.

Synthesis of ultra-thin tellurium nanoflakes on textiles for high-performance flexible and wearable nanogenerators

Energy Technology Data Exchange (ETDEWEB)

He, Wen; Van Ngoc, Huynh; Qian, Yong Teng; Hwang, Jae Seok; Yan, Ya Ping [Department of Physics and Interdisciplinary Course of Physics and Chemistry, Sungkyunkwan University, 2066, Seobu-ro, Jangan-gu, Suwon 16419, Gyeoggi-do (Korea, Republic of); Choi, Hongsoo [Department of Robotics Engineering, Daegu Gyeongbuk Institute of Science and Technology (DGIST), 711-873, Daegu (Korea, Republic of); Kang, Dae Joon, E-mail: djkang@skku.edu [Department of Physics and Interdisciplinary Course of Physics and Chemistry, Sungkyunkwan University, 2066, Seobu-ro, Jangan-gu, Suwon 16419, Gyeoggi-do (Korea, Republic of)

2017-01-15

Highlights: • Ultra-thin tellurium (Te) nanoflakes were successfully grown on textile and used as an active piezoelectric material. • Te nanoflake nanogenerator device was systematically studied by bending and compressing test. • The ultra-high output power during compressing test can light up 10 LEDs without any external power source. • The device can offer a breakthrough in applying tellurium nanoflakes into high-performance flexible and wearable piezoelectric nanogenerator. - Abstract: We report that ultra-thin tellurium (Te) nanoflakes were successfully grown on a sample of a gold-coated textile, which then was used as an active piezoelectric material. An output voltage of 4 V and a current of 300 nA were obtained from the bending test under a driving frequency of 10 Hz. To test the practical applications, Te nanoflake nanogenerator (TFNG) device was attached to the subject’s arm, and mechanical energy was converted to electrical energy by means of periodic arm-bending motions. The optimized open-circuit voltage and short-circuit current density of approximately 125 V and 17 μA/cm{sup 2}, respectively, were observed when a TFNG device underwent a compression test with a compressive force of 8 N and driving frequency of 10 Hz. This high-power generation enabled the instantaneous powering of 10 green light-emitting diodes that shone without any assistance from an external power source.

Hydrogen-terminated diamond vertical-type metal oxide semiconductor field-effect transistors with a trench gate

Energy Technology Data Exchange (ETDEWEB)

Inaba, Masafumi, E-mail: inaba-ma@ruri.waseda.jp; Muta, Tsubasa; Kobayashi, Mikinori; Saito, Toshiki; Shibata, Masanobu; Matsumura, Daisuke; Kudo, Takuya; Hiraiwa, Atsushi [Graduate School of Science and Engineering, Waseda University, 3-4-1 Okubo, Shinjuku, Tokyo 169-8555 (Japan); Kawarada, Hiroshi [Graduate School of Science and Engineering, Waseda University, 3-4-1 Okubo, Shinjuku, Tokyo 169-8555 (Japan); Kagami Memorial Laboratory for Materials Science and Technology, Waseda University, 2-8-26 Nishiwaseda, Shinjuku, Tokyo 169-0051 (Japan)

2016-07-18

The hydrogen-terminated diamond surface (C-H diamond) has a two-dimensional hole gas (2DHG) layer independent of the crystal orientation. A 2DHG layer is ubiquitously formed on the C-H diamond surface covered by atomic-layer-deposited-Al{sub 2}O{sub 3}. Using Al{sub 2}O{sub 3} as a gate oxide, C-H diamond metal oxide semiconductor field-effect transistors (MOSFETs) operate in a trench gate structure where the diamond side-wall acts as a channel. MOSFETs with a side-wall channel exhibit equivalent performance to the lateral C-H diamond MOSFET without a side-wall channel. Here, a vertical-type MOSFET with a drain on the bottom is demonstrated in diamond with channel current modulation by the gate and pinch off.

Nanoscale gadolinium oxide capping layers on compositionally variant gate dielectrics

KAUST Repository

Alshareef, Husam N.

2010-11-19

Metal gate work function enhancement using nanoscale (1.0 nm) Gd2O3 interfacial layers has been evaluated as a function of silicon oxide content in the HfxSiyOz gate dielectric and process thermal budget. It is found that the effective work function tuning by the Gd2O3 capping layer varied by nearly 400 mV as the composition of the underlying dielectric changed from 0% to 100% SiO2, and by nearly 300 mV as the maximum process temperature increased from ambient to 1000 °C. A qualitative model is proposed to explain these results, expanding the existing models for the lanthanide capping layer effect.

Nanoscale gadolinium oxide capping layers on compositionally variant gate dielectrics

KAUST Repository

Alshareef, Husam N.; Caraveo-Frescas, J. A.; Cha, D. K.

2010-01-01

Metal gate work function enhancement using nanoscale (1.0 nm) Gd2O3 interfacial layers has been evaluated as a function of silicon oxide content in the HfxSiyOz gate dielectric and process thermal budget. It is found that the effective work function tuning by the Gd2O3 capping layer varied by nearly 400 mV as the composition of the underlying dielectric changed from 0% to 100% SiO2, and by nearly 300 mV as the maximum process temperature increased from ambient to 1000 °C. A qualitative model is proposed to explain these results, expanding the existing models for the lanthanide capping layer effect.

Solar cell array for driving MOS type FET gate. MOS gata EFT gate kudoyo taiyo denchi array

Energy Technology Data Exchange (ETDEWEB)

Murakami, S; Yoshida, K; Yoshiki, T; Yamaguchi, Y; Nakayama, T; Owada, Y

1990-03-12

There has been a semiconductor relay utilizing MOS type FET (field effect transistor). Concerning the solar cells used for a semiconductor relay, it is required to separate the cells by forming insulating oxide films first and to form semiconductor layers by using many mask patterns, since a crystal semiconductor is used. Thereby its manufacturing process becomes complicated and laminification as well as thin film formation are difficult, In view of the above, this invention proposes a solar cell array for driving a MOS type FET gate consisting of amorphous silicon semiconductor cells, which are used for a semiconductor relay with solar cells generating electromotive power by the light of a light emitting diode and a MOS type FET that the power output of the above solar cells is supplied to its gate, and which are connected in series with many steps. 9 figs.

Single-electron-occupation metal-oxide-semiconductor quantum dots formed from efficient poly-silicon gate layout

Energy Technology Data Exchange (ETDEWEB)

Carroll, Malcolm S.; rochette, sophie; Rudolph, Martin; Roy, A. -M.; Curry, Matthew Jon; Ten Eyck, Gregory A.; Manginell, Ronald P.; Wendt, Joel R.; Pluym, Tammy; Carr, Stephen M; Ward, Daniel Robert; Lilly, Michael; pioro-ladriere, michel

2017-07-01

We introduce a silicon metal-oxide-semiconductor quantum dot structure that achieves dot-reservoir tunnel coupling control without a dedicated barrier gate. The elementary structure consists of two accumulation gates separated spatially by a gap, one gate accumulating a reservoir and the other a quantum dot. Control of the tunnel rate between the dot and the reservoir across the gap is demonstrated in the single electron regime by varying the reservoir accumulation gate voltage while compensating with the dot accumulation gate voltage. The method is then applied to a quantum dot connected in series to source and drain reservoirs, enabling transport down to the single electron regime. Finally, tuning of the valley splitting with the dot accumulation gate voltage is observed. This split accumulation gate structure creates silicon quantum dots of similar characteristics to other realizations but with less electrodes, in a single gate stack subtractive fabrication process that is fully compatible with silicon foundry manufacturing.

Ultra-thin smart acoustic metasurface for low-frequency sound insulation

Science.gov (United States)

Zhang, Hao; Xiao, Yong; Wen, Jihong; Yu, Dianlong; Wen, Xisen

2016-04-01

Insulating low-frequency sound is a conventional challenge due to the high areal mass required by mass law. In this letter, we propose a smart acoustic metasurface consisting of an ultra-thin aluminum foil bonded with piezoelectric resonators. Numerical and experimental results show that the metasurface can break the conventional mass law of sound insulation by 30 dB in the low frequency regime (sound insulation performance is attributed to the infinite effective dynamic mass density produced by the smart resonators. It is also demonstrated that the excellent sound insulation property can be conveniently tuned by simply adjusting the external circuits instead of modifying the structure of the metasurface.

Role of interlayer coupling in ultra thin MoS2

KAUST Repository

Cheng, Yingchun

2012-01-01

The effects of interlayer coupling on the vibrational and electronic properties of ultra thin MoS 2 were studied by ab initio calculations. For smaller slab thickness, the interlayer distance is significantly elongated because of reduced interlayer coupling. This explains the anomalous thickness dependence of the lattice vibrations observed by Lee et al. (ACS Nano, 2010, 4, 2695). The absence of interlayer coupling in mono-layer MoS 2 induces a transition from direct to indirect band gap behaviour. Our results demonstrate a strong interplay between the intralayer chemical bonding and the interlayer van-der-Waals interaction. This journal is © 2012 The Royal Society of Chemistry.

Comprehensive Study of Lanthanum Aluminate High-Dielectric-Constant Gate Oxides for Advanced CMOS Devices

Directory of Open Access Journals (Sweden)

Masamichi Suzuki

2012-03-01

Full Text Available A comprehensive study of the electrical and physical characteristics of Lanthanum Aluminate (LaAlO3 high-dielectric-constant gate oxides for advanced CMOS devices was performed. The most distinctive feature of LaAlO3 as compared with Hf-based high-k materials is the thermal stability at the interface with Si, which suppresses the formation of a low-permittivity Si oxide interfacial layer. Careful selection of the film deposition conditions has enabled successful deposition of an LaAlO3 gate dielectric film with an equivalent oxide thickness (EOT of 0.31 nm. Direct contact with Si has been revealed to cause significant tensile strain to the Si in the interface region. The high stability of the effective work function with respect to the annealing conditions has been demonstrated through comparison with Hf-based dielectrics. It has also been shown that the effective work function can be tuned over a wide range by controlling the La/(La + Al atomic ratio. In addition, gate-first n-MOSFETs with ultrathin EOT that use sulfur-implanted Schottky source/drain technology have been fabricated using a low-temperature process.

Oxidative stability of pullulan electrospun fibers containing fish oil

DEFF Research Database (Denmark)

García Moreno, Pedro Jesús; Damberg, Cecilie; Chronakis, Ioannis S.

2017-01-01

The effect of oil content and addition of natural antioxidants on the morphology and oxidative stability of pullulan ultra-thin fibers loaded with fish oil and obtained by electrospinning was investigated. Pullulan sub-micron fibers containing 10 and 30wt% fish oil were prepared and both presented...... into food matrices. These results show the feasibility to encapsulate fish oil in pullulan ultra-thin fibers and to improve their oxidative stability by adding natural antioxidants such as δ-tocopherol and rosemary extract. Therefore, this study might open up new opportunities for further technological...... development in the production of omega-3 nanodelivery systems, which have potential applications in different types of fortified foods. Encapsulation of fish oil in electrospun pullulan fibers stabilized by natural antioxidants....

Conduction and stability of holmium titanium oxide thin films grown by atomic layer deposition

Energy Technology Data Exchange (ETDEWEB)

Castán, H., E-mail: helena@ele.uva.es [Department of Electronic, University of Valladolid, 47011 Valladolid (Spain); García, H.; Dueñas, S.; Bailón, L. [Department of Electronic, University of Valladolid, 47011 Valladolid (Spain); Miranda, E. [Departament d' Enginyería Electrònica, Universitat Autónoma de Barcelona, 08193 Bellaterra (Spain); Kukli, K. [Department of Chemistry, University of Helsinki, FI-00014 Helsinki (Finland); Institute of Physics, University of Tartu, EE-50411,Tartu (Estonia); Kemell, M.; Ritala, M.; Leskelä, M. [Department of Chemistry, University of Helsinki, FI-00014 Helsinki (Finland)

2015-09-30

Holmium titanium oxide (HoTiO{sub x}) thin films of variable chemical composition grown by atomic layer deposition are studied in order to assess their suitability as dielectric materials in metal–insulator–metal electronic devices. The correlation between thermal and electrical stabilities as well as the potential usefulness of HoTiO{sub x} as a resistive switching oxide are also explored. It is shown that the layer thickness and the relative holmium content play important roles in the switching behavior of the devices. Cycled current–voltage measurements showed that the resistive switching is bipolar with a resistance window of up to five orders of magnitude. In addition, it is demonstrated that the post-breakdown current–voltage characteristics in HoTiO{sub x} are well described by a power-law model in a wide voltage and current range which extends from the soft to the hard breakdown regimes. - Highlights: • Gate and memory suitabilities of atomic layer deposited holmium titanium oxide. • Holmium titanium oxide exhibits resistive switching. • Layer thickness and holmium content influence the resistive switching. • Low and high resistance regimes follow a power-law model. • The power-law model can be extended to the hard breakdown regime.

Stability Study of Flexible 6,13-Bis(triisopropylsilylethynylpentacene Thin-Film Transistors with a Cross-Linked Poly(4-vinylphenol/Yttrium Oxide Nanocomposite Gate Insulator

Directory of Open Access Journals (Sweden)

Jin-Hyuk Kwon

2016-03-01

Full Text Available We investigated the electrical and mechanical stability of flexible 6,13-bis(triisopropylsilylehtynylpentacene (TIPS-pentacene thin-film transistors (TFTs that were fabricated on polyimide (PI substrates using cross-linked poly(4-vinylphenol (c-PVP and c-PVP/yttrium oxide (Y2O3 nanocomposite films as gate insulators. Compared with the electrical characteristics of TIPS-pentacene TFTs with c-PVP insulators, the TFTs with c-PVP/Y2O3 nanocomposite insulators exhibited enhancements in the drain current and the threshold voltage due to an increase in the dielectric capacitance. In electrical stability experiments, a gradual decrease in the drain current and a negative shift in the threshold voltage occurred during prolonged bias stress tests, but these characteristic variations were comparable for both types of TFT. On the other hand, the results of mechanical bending tests showed that the characteristic degradation of the TIPS-pentacene TFTs with c-PVP/Y2O3 nanocomposite insulators was more critical than that of the TFTs with c-PVP insulators. In this study, the detrimental effect of the nanocomposite insulator on the mechanical stability of flexible TIPS-pentacene TFTs was found to be caused by physical adhesion of TIPS-pentacene molecules onto the rough surfaces of the c-PVP/Y2O3 nanocomposite insulator. These results indicate that the dielectric and morphological properties of polymeric nanocomposite insulators are significant when considering practical applications of flexible electronics operated at low voltages.

Comment on 'extrinsic versus intrinsic ferroelectric switching : experimental investigations using ultra-thin PVDF Langmuir-Blodgett films'

NARCIS (Netherlands)

Naber, R.C.G.; Blom, P.W.M.; de Leeuw, DM

2006-01-01

Previous work on ultra-thin P(VDF-TrFE) Langmuir-Blodgett films has indicated a transition from extrinsic to intrinsic ferroelectric switching. The lack of several key features of intrinsic switching in the experimental work reported by Kliem et al argues against intrinsic switching. In this Comment

Self-aligned indium–gallium–zinc oxide thin-film transistors with SiN{sub x}/SiO{sub 2}/SiN{sub x}/SiO{sub 2} passivation layers

Energy Technology Data Exchange (ETDEWEB)

Chen, Rongsheng, E-mail: rschen@ust.hk; Zhou, Wei; Zhang, Meng; Kwok, Hoi-Sing

2014-08-01

Self-aligned top-gate amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) with SiN{sub x}/SiO{sub 2}/SiN{sub x}/SiO{sub 2} passivation layers are developed in this paper. The resulting a-IGZO TFT exhibits high reliability against bias stress and good electrical performance including field-effect mobility of 5 cm{sup 2}/Vs, threshold voltage of 2.5 V, subthreshold swing of 0.63 V/decade, and on/off current ratio of 5 × 10{sup 6}. With scaling down of the channel length, good characteristics are also obtained with a small shift of the threshold voltage and no degradation of subthreshold swing. The proposed a-IGZO TFTs in this paper can act as driving devices in the next generation flat panel displays. - Highlights: • Self-aligned top-gate indium–gallium–zinc oxide thin-film transistor is proposed. • SiN{sub x}/SiO{sub 2}/SiN{sub x}/SiO{sub 2} passivation layers are developed. • The source/drain areas are hydrogen-doped by CHF3 plasma. • The devices show good electrical performance and high reliability against bias stress.

Fatigue-resistant epitaxial Pb(Zr,Ti)O3 capacitors on Pt electrode with ultra-thin SrTiO3 template layers

International Nuclear Information System (INIS)

Takahara, Seiichi; Morimoto, Akiharu; Kawae, Takeshi; Kumeda, Minoru; Yamada, Satoru; Ohtsubo, Shigeru; Yonezawa, Yasuto

2008-01-01

Lead zirconate-titanate Pb(Zr,Ti)O 3 (PZT) capacitors with Pt bottom electrodes were prepared on MgO substrates by pulsed laser deposition (PLD) technique employing SrTiO 3 (STO) template layer. Perovskite PZT thin films are prepared via stoichiometric target using the ultra-thin STO template layers while it is quite difficult to obtain the perovskite PZT on Pt electrode via stoichiometric target in PLD process. The PZT capacitor prepared with the STO template layer showed good hysteresis and leakage current characteristics, and it showed an excellent fatigue resistance. The ultra-thin STO template layers were characterized by angle-resolved X-ray photoelectron spectroscopy measurement. The effect of the STO template layer is discussed based on the viewpoint of the perovskite nucleation and diffusion of Pb and O atoms

Modelling ionising radiation induced defect generation in bipolar oxides with gated diodes

International Nuclear Information System (INIS)

Barnaby, H.J.; Cirba, C.; Schrimpf, R.D.; Kosier, St.; Fouillat, P.; Montagner, X.

1999-01-01

Radiation-induced oxide defects that degrade electrical characteristics of bipolar junction transistor (BJTs) can be measured with the use of gated diodes. The buildup of defects and their effect on device radiation response are modeled with computer simulation. (authors)

Atomic-Layer-Deposited SnO2 as Gate Electrode for Indium-Free Transparent Electronics

KAUST Repository

Alshammari, Fwzah Hamud; Hota, Mrinal Kanti; Wang, Zhenwei; Aljawhari, Hala; Alshareef, Husam N.

2017-01-01

Atomic-layer-deposited SnO2 is used as a gate electrode to replace indium tin oxide (ITO) in thin-film transistors and circuits for the first time. The SnO2 films deposited at 200 °C show low electrical resistivity of ≈3.1 × 10−3 Ω cm with ≈93

Mechanistic analysis of temperature-dependent current conduction through thin tunnel oxide in n+-polySi/SiO2/n+-Si structures

Science.gov (United States)

Samanta, Piyas

2017-09-01

We present a detailed investigation on temperature-dependent current conduction through thin tunnel oxides grown on degenerately doped n-type silicon (n+-Si) under positive bias ( VG ) on heavily doped n-type polycrystalline silicon (n+-polySi) gate in metal-oxide-semiconductor devices. The leakage current measured between 298 and 573 K and at oxide fields ranging from 6 to 10 MV/cm is primarily attributed to Poole-Frenkel (PF) emission of trapped electrons from the neutral electron traps located in the silicon dioxide (SiO2) band gap in addition to Fowler-Nordheim (FN) tunneling of electrons from n+-Si acting as the drain node in FLOating gate Tunnel OXide Electrically Erasable Programmable Read-Only Memory devices. Process-induced neutral electron traps are located at 0.18 eV and 0.9 eV below the SiO2 conduction band. Throughout the temperature range studied here, PF emission current IPF dominates FN electron tunneling current IFN at oxide electric fields Eox between 6 and 10 MV/cm. A physics based new analytical formula has been developed for FN tunneling of electrons from the accumulation layer of degenerate semiconductors at a wide range of temperatures incorporating the image force barrier rounding effect. FN tunneling has been formulated in the framework of Wentzel-Kramers-Brilloiun taking into account the correction factor due to abrupt variation of the energy barrier at the cathode/oxide interface. The effect of interfacial and near-interfacial trapped-oxide charges on FN tunneling has also been investigated in detail at positive VG . The mechanism of leakage current conduction through SiO2 films plays a crucial role in simulation of time-dependent dielectric breakdown of the memory devices and to precisely predict the normal operating field or applied floating gate (FG) voltage for lifetime projection of the devices. In addition, we present theoretical results showing the effect of drain doping concentration on the FG leakage current.

Valence control of cobalt oxide thin films by annealing atmosphere

International Nuclear Information System (INIS)

Wang Shijing; Zhang Boping; Zhao Cuihua; Li Songjie; Zhang Meixia; Yan Liping

2011-01-01

The cobalt oxide (CoO and Co 3 O 4 ) thin films were successfully prepared using a spin-coating technique by a chemical solution method with CH 3 OCH 2 CH 2 OH and Co(NO 3 ) 2 .6H 2 O as starting materials. The grayish cobalt oxide films had uniform crystalline grains with less than 50 nm in diameter. The phase structure is able to tailor by controlling the annealing atmosphere and temperature, in which Co 3 O 4 thin film was obtained by annealing in air at 300-600, and N 2 at 300, and transferred to CoO thin film by raising annealing temperature in N 2 . The fitted X-ray photoelectron spectroscopy (XPS) spectra of the Co2p electrons are distinguishable from different valence states of cobalt oxide especially for their satellite structure. The valence control of cobalt oxide thin films by annealing atmosphere contributes to the tailored optical absorption property.

High performance solution processed zirconium oxide gate dielectric appropriate for low temperature device application

Energy Technology Data Exchange (ETDEWEB)

Hasan, Musarrat; Nguyen, Manh-Cuong; Kim, Hyojin; You, Seung-Won; Jeon, Yoon-Seok; Tong, Duc-Tai; Lee, Dong-Hwi; Jeong, Jae Kyeong; Choi, Rino, E-mail: rino.choi@inha.ac.kr

2015-08-31

This paper reports a solution processed electrical device with zirconium oxide gate dielectric that was fabricated at a low enough temperature appropriate for flexible electronics. Both inorganic dielectric and channel materials were synthesized in the same organic solvent. The dielectric constant achieved was 13 at 250 °C with a reasonably low leakage current. The bottom gate transistor devices showed the highest mobility of 75 cm{sup 2}/V s. The device is operated at low voltage with high-k dielectric with excellent transconductance and low threshold voltage. Overall, the results highlight the potential of low temperature solution based deposition in fabricating more complicated circuits for a range of applications. - Highlights: • We develop a low temperature inorganic dielectric deposition process. • We fabricate oxide semiconductor channel devices using all-solution processes. • Same solvent is used for dielectric and oxide semiconductor deposition.

Control of magnetism by electrical charge doping or redox reactions in a surface-oxidized Co thin film with a solid-state capacitor structure

Science.gov (United States)

Hirai, T.; Koyama, T.; Chiba, D.

2018-03-01

We have investigated the electric field (EF) effect on magnetism in a Co thin film with a naturally oxidized surface. The EF was applied to the oxidized Co surface through a gate insulator layer made of HfO2, which was formed using atomic layer deposition (ALD). The efficiency of the EF effect on the magnetic anisotropy in the sample with the HfO2 layer deposited at the appropriate temperature for the ALD process was relatively large compared to the previously reported values with an unoxidized Co film. The coercivity promptly and reversibly followed the variation in gate voltage. The modulation of the channel resistance was at most ˜0.02%. In contrast, a dramatic change in the magnetic properties including the large change in the saturation magnetic moment and a much larger EF-induced modulation of the channel resistance (˜10%) were observed in the sample with a HfO2 layer deposited at a temperature far below the appropriate temperature range. The response of these properties to the gate voltage was very slow, suggesting that a redox reaction dominated the EF effect on the magnetism in this sample. The frequency response for the capacitive properties was examined to discuss the difference in the mechanism of the EF effect observed here.

Silicon nitride gradient film as the underlayer of ultra-thin tetrahedral amorphous carbon overcoat for magnetic recording slider

Energy Technology Data Exchange (ETDEWEB)

Wang Guigen, E-mail: wanggghit@yahoo.com [Shenzhen Graduate School, Harbin Institute of Technology, Shenzhen 518055 (China); Kuang Xuping; Zhang Huayu; Zhu Can [Shenzhen Graduate School, Harbin Institute of Technology, Shenzhen 518055 (China); Han Jiecai [Shenzhen Graduate School, Harbin Institute of Technology, Shenzhen 518055 (China); Center for Composite Materials, Harbin Institute of Technology, Harbin 150080 (China); Zuo Hongbo [Center for Composite Materials, Harbin Institute of Technology, Harbin 150080 (China); Ma Hongtao [SAE Technologies Development (Dongguan) Co., Ltd., Dongguan 523087 (China)

2011-12-15

Highlights: Black-Right-Pointing-Pointer The ultra-thin carbon films with different silicon nitride (Si-N) film underlayers were prepared. Black-Right-Pointing-Pointer It highlighted the influences of Si-N underlayers. Black-Right-Pointing-Pointer The carbon films with Si-N underlayers obtained by nitriding especially at the substrate bias of -150 V, can exhibit better corrosion protection properties - Abstract: There are higher technical requirements for protection overcoat of magnetic recording slider used in high-density storage fields for the future. In this study, silicon nitride (Si-N) composition-gradient films were firstly prepared by nitriding of silicon thin films pre-sputtered on silicon wafers and magnetic recording sliders, using microwave electron cyclotron resonance plasma source. The ultra-thin tetrahedral amorphous carbon films were then deposited on the Si-N films by filtered cathodic vacuum arc method. Compared with amorphous carbon overcoats with conventional silicon underlayers, the overcoats with Si-N underlayers obtained by plasma nitriding especially at the substrate bias of -150 V, can provide better corrosion protection for high-density magnetic recording sliders.

Silicon nitride gradient film as the underlayer of ultra-thin tetrahedral amorphous carbon overcoat for magnetic recording slider

International Nuclear Information System (INIS)

Wang Guigen; Kuang Xuping; Zhang Huayu; Zhu Can; Han Jiecai; Zuo Hongbo; Ma Hongtao

2011-01-01

Highlights: ► The ultra-thin carbon films with different silicon nitride (Si-N) film underlayers were prepared. ► It highlighted the influences of Si-N underlayers. ► The carbon films with Si-N underlayers obtained by nitriding especially at the substrate bias of −150 V, can exhibit better corrosion protection properties - Abstract: There are higher technical requirements for protection overcoat of magnetic recording slider used in high-density storage fields for the future. In this study, silicon nitride (Si-N) composition-gradient films were firstly prepared by nitriding of silicon thin films pre-sputtered on silicon wafers and magnetic recording sliders, using microwave electron cyclotron resonance plasma source. The ultra-thin tetrahedral amorphous carbon films were then deposited on the Si-N films by filtered cathodic vacuum arc method. Compared with amorphous carbon overcoats with conventional silicon underlayers, the overcoats with Si-N underlayers obtained by plasma nitriding especially at the substrate bias of −150 V, can provide better corrosion protection for high-density magnetic recording sliders.

Growth and hydrogenation of ultra-thin Mg films on Mo(111)

DEFF Research Database (Denmark)

Ostenfeld, Christopher Worsøe; Davies, Jonathan Conrad; Vegge, Tejs

2005-01-01

. Hydrogen cannot be adsorbed on magnesium films under UHV conditions. However, when evaporating Mg in a hydrogen background, a hydrogen overlayer is seen to adsorb at the Mg surface, due to the catalytic interaction with the Mo(1 1 1) substrate and subsequent spill-over. We show that two monolayers of Mg......The growth and hydrogenation of ultra-thin magnesium overlayers have been investigated on a Mo(1 1 1) single crystal substrate. For increasing magnesium coverages we observe intermediate stages in the TPD and LEISS profiles, which illustrate the transition from one monolayer to multilayer growth...

Zinc-oxide nanorod / copper-oxide thin-film heterojunction for a nitrogen-monoxide gas sensor

International Nuclear Information System (INIS)

Yoo, Hwansu; Kim, Hyojin; Kim, Dojin

2014-01-01

A novel p - n oxide heterojunction structure was fabricated by employing n-type zinc-oxide (ZnO) nanorods grown on an indium-tin-oxide-coated glass substrate by using the hydrothermal method and a p-type copper-oxide (CuO) thin film deposited onto the ZnO nanorod array by using the sputtering method. The crystallinities and microstructures of the heterojunction materials were examined by using X-ray diffraction and scanning electron microscopy. The observed current - voltage characteristics of the p - n oxide heterojunction showed a nonlinear diode-like rectifying behavior. The effects of an oxidizing or electron acceptor gas, such as nitrogen monoxide (NO), on the ZnO nanorod/CuO thin-film heterojunction were investigated to determine the potential applications of the fabricated material for use in gas sensors. The forward current of the p - n heterojunction was remarkably reduced when NO gas was introduced into dry air at temperatures from 100 to 250 .deg. C. The NO gas response of the oxide heterojunction reached a maximum value at an operating temperature of 180 .deg. C and linearly increased as the NO gas concentration was increased from 5 to 30 ppm. The sensitivity value was observed to be as high as 170% at 180 .deg. C when biased at 2 V in the presence of 20-ppm NO. The ZnO nanorod/CuO thin-film heterojunction also exhibited a stable and repeatable response to NO gas. The experimental results suggest that the ZnO nanorod/CuO thin-film heterojunction structure may be a novel candidate for gas sensors.

Zinc-oxide nanorod / copper-oxide thin-film heterojunction for a nitrogen-monoxide gas sensor

Energy Technology Data Exchange (ETDEWEB)

Yoo, Hwansu; Kim, Hyojin; Kim, Dojin [Chungnam National University, Daejeon (Korea, Republic of)

2014-11-15

A novel p - n oxide heterojunction structure was fabricated by employing n-type zinc-oxide (ZnO) nanorods grown on an indium-tin-oxide-coated glass substrate by using the hydrothermal method and a p-type copper-oxide (CuO) thin film deposited onto the ZnO nanorod array by using the sputtering method. The crystallinities and microstructures of the heterojunction materials were examined by using X-ray diffraction and scanning electron microscopy. The observed current - voltage characteristics of the p - n oxide heterojunction showed a nonlinear diode-like rectifying behavior. The effects of an oxidizing or electron acceptor gas, such as nitrogen monoxide (NO), on the ZnO nanorod/CuO thin-film heterojunction were investigated to determine the potential applications of the fabricated material for use in gas sensors. The forward current of the p - n heterojunction was remarkably reduced when NO gas was introduced into dry air at temperatures from 100 to 250 .deg. C. The NO gas response of the oxide heterojunction reached a maximum value at an operating temperature of 180 .deg. C and linearly increased as the NO gas concentration was increased from 5 to 30 ppm. The sensitivity value was observed to be as high as 170% at 180 .deg. C when biased at 2 V in the presence of 20-ppm NO. The ZnO nanorod/CuO thin-film heterojunction also exhibited a stable and repeatable response to NO gas. The experimental results suggest that the ZnO nanorod/CuO thin-film heterojunction structure may be a novel candidate for gas sensors.

Modeling drain current of indium zinc oxide thin film transistors prepared by solution deposition technique

Science.gov (United States)

Qiang, Lei; Liang, Xiaoci; Cai, Guangshuo; Pei, Yanli; Yao, Ruohe; Wang, Gang

2018-06-01

Indium zinc oxide (IZO) thin film transistor (TFT) deposited by solution method is of considerable technological interest as it is a key component for the fabrication of flexible and cheap transparent electronic devices. To obtain a principal understanding of physical properties of solution-processed IZO TFT, a new drain current model that account for the charge transport is proposed. The formulation is developed by incorporating the effect of gate voltage on mobility and threshold voltage with the carrier charges. It is demonstrated that in IZO TFTs the below threshold regime should be divided into two sections: EC - EF > 3kT and EC - EF ≤ 3kT, where kT is the thermal energy, EF and EC represent the Fermi level and the conduction band edge, respectively. Additionally, in order to describe conduction mechanisms more accurately, the extended mobility edge model is conjoined, which can also get rid of the complicated and lengthy computations. The good agreement between measured and calculated results confirms the efficiency of this model for the design of integrated large-area thin film circuits.

Characterization of low-temperature microwave loss of thin aluminum oxide formed by plasma oxidation

Energy Technology Data Exchange (ETDEWEB)

Deng, Chunqing, E-mail: cdeng@uwaterloo.ca; Otto, M.; Lupascu, A., E-mail: alupascu@uwaterloo.ca [Institute for Quantum Computing, Department of Physics and Astronomy, and Waterloo Institute for Nanotechnology, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada)

2014-01-27

We report on the characterization of microwave loss of thin aluminum oxide films at low temperatures using superconducting lumped resonators. The oxide films are fabricated using plasma oxidation of aluminum and have a thickness of 5 nm. We measure the dielectric loss versus microwave power for resonators with frequencies in the GHz range at temperatures from 54 to 303 mK. The power and temperature dependence of the loss are consistent with the tunneling two-level system theory. These results are relevant to understanding decoherence in superconducting quantum devices. The obtained oxide films are thin and robust, making them suitable for capacitors in compact microwave resonators.

Effect of annealing temperature on structural and electrical properties of high-κ YbTixOy gate dielectrics for InGaZnO thin film transistors

International Nuclear Information System (INIS)

Pan, Tung-Ming; Chen, Fa-Hsyang; Hung, Meng-Ning

2015-01-01

This paper describes the effect of annealing temperature on the structural properties and electrical characteristics of high–κ YbTi x O y gate dielectrics for indium–gallium–zinc–oxide (IGZO) thin-film transistors (TFTs). X-ray diffraction, x-ray photoelectron spectroscopy and atomic force microscopy were used to study the structural, chemical and morphological features, respectively, of these dielectric films annealed at 200, 300 and 400 °C. The YbTi x O y IGZO TFT that had been annealed at 400 °C exhibited better electrical characteristics, such as a small threshold voltage of 0.53 V, a large field-effect mobility of 19.1 cm 2 V −1 s −1 , a high I on /I off ratio of 2.8 × 10 7 , and a low subthreshold swing of 176 mV dec. −1 , relative to those of the systems that had been subjected to other annealing conditions. This result suggests that YbTi x O y dielectric possesses a higher dielectric constant as well as lower oxygen vacancies (or defects) in the film. In addition, the instability of YbTi x O y IGZO TFT was studied under positive gate-bias stress and negative gate-bias stress conditions. (paper)

Influence of gating design on microstructure and fluidity of thin sections AA320.0 cast hypo-eutectic Al-Si alloy

Science.gov (United States)

Ramadan, Mohamed

2018-05-01

Influence of gating design especially number of ingrates on microstructure and fluidity of thin sections of 2, 4, 6 mm AA320.0 cast hypo-eutectic Al-Si alloy was evaluated for sand casting molding technique. Increasing the number of ingates improves the microstructe to be fine and more globular. About 87 μm of α-Al grain size, 0.6 α-Al grain sphericity and 37 μm dendrite arm spacing DAS are achieved by using 4 ingates in gating system. Increasing the number of ingates up to 3 increases hardness, filling area and related fluditiy of all cast samples. The minimum thickness of 2.5 mm for each ingate should be considered in order to successfully production of high quality light weight thin sections castings in sand mold.

Probing the surface swelling in ultra-thin supported polystyrene films during case II diffusion of n-hexane

NARCIS (Netherlands)

Ogieglo, Wojciech; Wormeester, Herbert; Wessling, Matthias; Benes, Nieck Edwin

2013-01-01

In situ time-resolved spectroscopic ellipsometry is used to study the dynamics of n-hexane diffusion into, and the corresponding induced swelling of, ultra-thin polystyrene films. The experimental conditions are carefully selected to facilitate the observation of anomalous Case II diffusion in the

Fabrication and stability investigation of ultra-thin transparent and flexible Cu-Ag-Au tri-layer film on PET

Science.gov (United States)

Prakasarao, Ch Surya; D'souza, Slavia Deeksha; Hazarika, Pratim; Karthiselva N., S.; Ramesh Babu, R.; Kovendhan, M.; Kumar, R. Arockia; Joseph, D. Paul

2018-04-01

The need for transparent conducting electrodes with high transmittance, low sheet resistance and flexibility to replace Indium Tin Oxide is ever growing. We have deposited and studied the performance of ultra-thin Cu-Ag-Au tri-layer films over a flexible poly-ethylene terephthalate substrate. Scotch tape test showed good adhesion of the metallic film. Transmittance of the tri-layer was around 40 % in visible region. Optical profiler measurements were done to study the surface features. The XRD pattern revealed that film was amorphous. Sheet resistance measured by four probe technique was around 7.7 Ohm/Δ and was stable up to 423 K. The transport parameters by Hall effect showed high conductivity and carrier concentration with a mobility of 5.58 cm2/Vs. Tests performed in an indigenously designed bending unit indicated the films to be stable both mechanically and electrically even after 50,000 bending cycles.

Thin film transistors for flexible electronics: Contacts, dielectrics and semiconductors

KAUST Repository

Quevedo-López, Manuel Angel Quevedo

2011-06-01

The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed. Copyright © 2011 American Scientific Publishers.

Thin film transistors for flexible electronics: Contacts, dielectrics and semiconductors

KAUST Repository

Quevedo-Ló pez, Manuel Angel Quevedo; Wondmagegn, Wudyalew T.; Alshareef, Husam N.; Ramí rez-Bon, Rafael; Gnade, Bruce E.

2011-01-01

The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed. Copyright © 2011 American Scientific Publishers.

Low-voltage high-speed programming gate-all-around floating gate memory cell with tunnel barrier engineering

Science.gov (United States)

Hamzah, Afiq; Ezaila Alias, N.; Ismail, Razali

2018-06-01

The aim of this study is to investigate the memory performances of gate-all-around floating gate (GAA-FG) memory cell implementing engineered tunnel barrier concept of variable oxide thickness (VARIOT) of low-k/high-k for several high-k (i.e., Si3N4, Al2O3, HfO2, and ZrO2) with low-k SiO2 using three-dimensional (3D) simulator Silvaco ATLAS. The simulation work is conducted by initially determining the optimized thickness of low-k/high-k barrier-stacked and extracting their Fowler–Nordheim (FN) coefficients. Based on the optimized parameters the device performances of GAA-FG for fast program operation and data retention are assessed using benchmark set by 6 and 8 nm SiO2 tunnel layer respectively. The programming speed has been improved and wide memory window with 30% increment from conventional SiO2 has been obtained using SiO2/Al2O3 tunnel layer due to its thin low-k dielectric thickness. Furthermore, given its high band edges only 1% of charge-loss is expected after 10 years of ‑3.6/3.6 V gate stress.

Enhanced electrical properties of oxide semiconductor thin-film transistors with high conductivity thin layer insertion for the channel region

Energy Technology Data Exchange (ETDEWEB)

Nguyen, Cam Phu Thi; Raja, Jayapal; Kim, Sunbo; Jang, Kyungsoo; Le, Anh Huy Tuan; Lee, Youn-Jung; Yi, Junsin, E-mail: junsin@skku.edu

2017-02-28

Highlights: • The characteristics of thin film transistors using double active layers are examined. • Electrical characteristics have been improved for the double active layers devices. • The total trap density can be decreased by insert-ion of ultrathin ITO film. - Abstract: This study examined the performance and the stability of indium tin zinc oxide (ITZO) thin film transistors (TFTs) by inserting an ultra-thin indium tin oxide (ITO) layer at the active/insulator interface. The electrical properties of the double channel device (ITO thickness of 5 nm) were improved in comparison with the single channel ITZO or ITO devices. The TFT characteristics of the device with an ITO thickness of less than 5 nm were degraded due to the formation of an island-like morphology and the carriers scattering at the active/insulator interface. The 5 nm-thick ITO inserted ITZO TFTs (optimal condition) exhibited a superior field effect mobility (∼95 cm{sup 2}/V·s) compared with the ITZO-only TFTs (∼34 cm{sup 2}/V·s). The best characteristics of the TFT devices with double channel layer are due to the lowest surface roughness (0.14 nm) and contact angle (50.1°) that result in the highest hydrophicility, and the most effective adhesion at the surface. Furthermore, the threshold voltage shifts for the ITO/ITZO double layer device decreased to 0.80 and −2.39 V compared with 6.10 and −6.79 V (for the ITZO only device) under positive and negative bias stress, respectively. The falling rates of E{sub A} were 0.38 eV/V and 0.54 eV/V for the ITZO and ITO/ITZO bi-layer devices, respectively. The faster falling rate of the double channel devices suggests that the trap density, including interface trap and semiconductor bulk trap, can be decreased by the ion insertion of a very thin ITO film into the ITZO/SiO{sub 2} reference device. These results demonstrate that the double active layer TFT can potentially be applied to the flat panel display.

Review on analog/radio frequency performance of advanced silicon MOSFETs

Science.gov (United States)

Passi, Vikram; Raskin, Jean-Pierre

2017-12-01

Aggressive gate-length downscaling of the metal-oxide-semiconductor field-effect transistor (MOSFET) has been the main stimulus for the growth of the integrated circuit industry. This downscaling, which has proved beneficial to digital circuits, is primarily the result of the need for improved circuit performance and cost reduction and has resulted in tremendous reduction of the carrier transit time across the channel, thereby resulting in very high cut-off frequencies. It is only in recent decades that complementary metal-oxide-semiconductor (CMOS) field-effect transistor (FET) has been considered as the radio frequency (RF) technology of choice. In this review, the status of the digital, analog and RF figures of merit (FoM) of silicon-based FETs is presented. State-of-the-art devices with very good performance showing low values of drain-induced barrier lowering, sub-threshold swing, high values of gate transconductance, Early voltage, cut-off frequencies, and low minimum noise figure, and good low-frequency noise characteristic values are reported. The dependence of these FoM on the device gate length is also shown, helping the readers to understand the trends and challenges faced by shorter CMOS nodes. Device performance boosters including silicon-on-insulator substrates, multiple-gate architectures, strain engineering, ultra-thin body and buried-oxide and also III-V and 2D materials are discussed, highlighting the transistor characteristics that are influenced by these boosters. A brief comparison of the two main contenders in continuing Moore’s law, ultra-thin body buried-oxide and fin field-effect transistors are also presented. The authors would like to mention that despite extensive research carried out in the semiconductor industry, silicon-based MOSFET will continue to be the driving force in the foreseeable future.

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

Science.gov (United States)

Deen, David A.; Storm, David F.; Scott Katzer, D.; Bass, R.; Meyer, David J.

2016-08-01

A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from distributed surface and interface states. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. HEMTs fabricated with 300 nm long recessed gates demonstrated a gate lag ratio (GLR) of 0.88 with no degradation in drain current after bias stressed in subthreshold. These structures additionally achieved small signal metrics ft/fmax of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with ft/fmax of 48/60 GHz.

Controlling the competing magnetic anisotropy energies in FineMET amorphous thin films with ultra-soft magnetic properties

Directory of Open Access Journals (Sweden)

Ansar Masood

2017-05-01

Full Text Available Thickness dependent competing magnetic anisotropy energies were investigated to explore the global magnetic behaviours of FineMET amorphous thin films. A dominant perpendicular magnetization component in the as-deposited state of thinner films was observed due to high magnetoelastic anisotropy energy which arises from stresses induced at the substrate-film interface. This perpendicular magnetization component decreases with increasing film thickness. Thermal annealing at elevated temperature revealed a significant influence on the magnetization state of the FineMET thin films and controlled annealing steps leads to ultra-soft magnetic properties, making these thin films alloys ideal for a wide range of applications.

Ultra-sensitive suspended atomically thin-layered black phosphorus mercury sensors.

Science.gov (United States)

Li, Peng; Zhang, Dongzhi; Jiang, Chuanxing; Zong, Xiaoqi; Cao, Yuhua

2017-12-15

The extraordinary properties of black phosphorus (BP) make it a promising candidate for next-generation transistor chemical sensors. However, BP films reported so far are supported on substrate, and substrate scattering drastically deteriorates its electrical properties. Consequentially, the potential sensing capability of intrinsic BP is highly underestimated and its sensing mechanism is masked. Additionally, the optimum sensing regime of BP remains unexplored. This article is the first demonstration of suspended BP sensor operated in subthreshold regime. BP exhibited significant enhancement of sensitivity for ultra-low-concentration mercury detection in the absence of substrate, and the sensitivity reached maximum in subthreshold regime. Without substrate scattering, the suspended BP device demonstrated 10 times lower 1/f noise which contributed to better signal-to-noise ratio. Therefore, rapid label-free trace detection of Hg 2+ was achieved with detection limit of 0.01 ppb, lower than the world health organization (WHO) tolerance level (1 ppb). The time constant for ion detection extracted was 3s. Additionally, experimental results revealed that good stability, repeatability, and selectivity were achieved. BP sensors also demonstrated the ability of detecting mercury ions in environment water samples. The underling sensing mechanism of intrinsic BP was ascribed to the carrier density variation resulted from surface charge gating effect, so suspended BP in subthreshold regime with optimum gating effect demonstrated the best sensitivity. Our results show the prominent advantages of intrinsic BP as a sensing material. Copyright © 2017 The Authors. Published by Elsevier B.V. All rights reserved.

Optimized ultra-thin manganin alloy passivated fine-pitch damascene compatible bump-less Cu-Cu bonding at sub 200 °C for three-dimensional Integration applications

Science.gov (United States)

Panigrahi, Asisa Kumar; Hemanth Kumar, C.; Bonam, Satish; Ghosh, Tamal; Rama Krishna Vanjari, Siva; Govind Singh, Shiv

2018-02-01

Enhanced Cu diffusion, Cu surface passivation, and smooth surface at the bonding interface are the key essentials for high quality Cu-Cu bonding. Previously, we have demonstrated optimized 3 nm thin Manganin metal-alloy passivation from oxidation and also helps to reduce the surface roughness to about 0.8 nm which substantially led to high quality Cu-Cu bonding. In this paper, we demonstrated an ultra fine-pitch (indication of high quality bonding for future multilayer integrations. Furthermore, electrical characterization of the bonded structure was performed under various robust conditions as per International Technology Roadmap for Semiconductors (ITRS Roadmap) in order to satisfy the stability of the bonded structure.

The effects of gate oxide thickness on radiation damage in MOS system

International Nuclear Information System (INIS)

Zhu Hui; Yan Rongliang; Wang Yu; He Jinming

1988-01-01

The dependences of the flatband voltage shift (ΔV FB ) and the threshold voltage shift (ΔV TH ) in MOS system on the oxide thickness (T ox ) and on total irradiated dose (D) of electron-beam and 60 Co γ-ray have been studied. It has been found that ΔV FB ∝ T ox 3 , with +10V of gate bias during irradiation for n-Si substrate MOS capacitors; ΔV TH ∝ T ox 3 D 2/3 , with 'on' gate bias during irradiation for n- and P-channel MOS transistors; ΔV TP ∝ T ox 2 D 2/3 , with 'off' gate bias during irradiation for P-channel MOS transistors. These results are explained by Viswanathan model. According to ∼T ox 3 dependence, the optimization of radiation hardening process for MOS system is also simply discussed

Valence control of cobalt oxide thin films by annealing atmosphere

Energy Technology Data Exchange (ETDEWEB)

Wang Shijing [School of Materials Science and Engineering, University of Science and Technology Beijing, No. 30 Xueyuan Road, Beijing 100083 (China); Zhang Boping, E-mail: bpzhang@ustb.edu.cn [School of Materials Science and Engineering, University of Science and Technology Beijing, No. 30 Xueyuan Road, Beijing 100083 (China); Zhao Cuihua; Li Songjie; Zhang Meixia; Yan Liping [School of Materials Science and Engineering, University of Science and Technology Beijing, No. 30 Xueyuan Road, Beijing 100083 (China)

2011-02-01

The cobalt oxide (CoO and Co{sub 3}O{sub 4}) thin films were successfully prepared using a spin-coating technique by a chemical solution method with CH{sub 3}OCH{sub 2}CH{sub 2}OH and Co(NO{sub 3}){sub 2}.6H{sub 2}O as starting materials. The grayish cobalt oxide films had uniform crystalline grains with less than 50 nm in diameter. The phase structure is able to tailor by controlling the annealing atmosphere and temperature, in which Co{sub 3}O{sub 4} thin film was obtained by annealing in air at 300-600, and N{sub 2} at 300, and transferred to CoO thin film by raising annealing temperature in N{sub 2}. The fitted X-ray photoelectron spectroscopy (XPS) spectra of the Co2p electrons are distinguishable from different valence states of cobalt oxide especially for their satellite structure. The valence control of cobalt oxide thin films by annealing atmosphere contributes to the tailored optical absorption property.

Mechanisms involved in the hydrothermal growth of ultra-thin and high aspect ratio ZnO nanowires

Energy Technology Data Exchange (ETDEWEB)

Demes, Thomas [Univ. Grenoble Alpes, CNRS, Grenoble-INP, LMGP, F-38000 Grenoble (France); Ternon, Céline, E-mail: celine.ternon@grenoble-inp.fr [Univ. Grenoble Alpes, CNRS, Grenoble-INP, LMGP, F-38000 Grenoble (France); Univ. Grenoble Alpes, CNRS, LTM, F-38000 Grenoble (France); Morisot, Fanny [Univ. Grenoble Alpes, CNRS, Grenoble-INP, LMGP, F-38000 Grenoble (France); Univ. Grenoble Alpes, CNRS, Grenoble-INP" 2, IMEP-LaHC, F-38000 Grenoble (France); Riassetto, David [Univ. Grenoble Alpes, CNRS, Grenoble-INP, LMGP, F-38000 Grenoble (France); Legallais, Maxime [Univ. Grenoble Alpes, CNRS, Grenoble-INP, LMGP, F-38000 Grenoble (France); Univ. Grenoble Alpes, CNRS, Grenoble-INP" 2, IMEP-LaHC, F-38000 Grenoble (France); Roussel, Hervé; Langlet, Michel [Univ. Grenoble Alpes, CNRS, Grenoble-INP, LMGP, F-38000 Grenoble (France)

2017-07-15

Highlights: • ZnO nanowires are grown on sol-gel ZnO seed layers by hydrothermal synthesis. • Ultra-thin and high aspect ratio nanowires are obtained without using additives. • Nanowire diameter is 20–25 nm regardless of growth time and seed morphology. • A nanowire growth model is developed on the basis of thermodynamic considerations. • The nanowires are intended for integration into electrically conductive nanonets. - Abstract: Hydrothermal synthesis of ZnO nanowires (NWs) with tailored dimensions, notably high aspect ratios (AR) and small diameters, is a major concern for a wide range of applications and still represents a challenging and recurring issue. In this work, an additive-free and reproducible hydrothermal procedure has been developed to grow ultra-thin and high AR ZnO NWs on sol-gel deposited ZnO seed layers. Controlling the substrate temperature and using a low reagent concentration (1 mM) has been found to be essential for obtaining such NWs. We show that the NW diameter remains constant at about 20–25 nm with growth time contrary to the NW length that can be selectively increased leading to NWs with ARs up to 400. On the basis of investigated experimental conditions along with thermodynamic and kinetic considerations, a ZnO NW growth mechanism has been developed which involves the formation and growth of nuclei followed by NW growth when the nuclei reach a critical size of about 20–25 nm. The low reagent concentration inhibits NW lateral growth leading to ultra-thin and high AR NWs. These NWs have been assembled into electrically conductive ZnO nanowire networks, which opens attractive perspectives toward the development of highly sensitive low-cost gas- or bio-sensors.

Amorphous semiconducting and conducting transparent metal oxide thin films and production thereof

Science.gov (United States)

Perkins, John; Van Hest, Marinus Franciscus Antonius Maria; Ginley, David; Taylor, Matthew; Neuman, George A.; Luten, Henry A.; Forgette, Jeffrey A.; Anderson, John S.

2010-07-13

Metal oxide thin films and production thereof are disclosed. An exemplary method of producing a metal oxide thin film may comprise introducing at least two metallic elements and oxygen into a process chamber to form a metal oxide. The method may also comprise depositing the metal oxide on a substrate in the process chamber. The method may also comprise simultaneously controlling a ratio of the at least two metallic elements and a stoichiometry of the oxygen during deposition. Exemplary amorphous metal oxide thin films produced according to the methods herein may exhibit highly transparent properties, highly conductive properties, and/or other opto-electronic properties.

Operando SXRD of E-ALD deposited sulphides ultra-thin films: Crystallite strain and size

Science.gov (United States)

Giaccherini, Andrea; Russo, Francesca; Carlà, Francesco; Guerri, Annalisa; Picca, Rosaria Anna; Cioffi, Nicola; Cinotti, Serena; Montegrossi, Giordano; Passaponti, Maurizio; Di Benedetto, Francesco; Felici, Roberto; Innocenti, Massimo

2018-02-01

Electrochemical Atomic Layer Deposition (E-ALD), exploiting surface limited electrodeposition of atomic layers, can easily grow highly ordered ultra-thin films and 2D structures. Among other compounds CuxZnyS grown by means of E-ALD on Ag(111) has been found particularly suitable for the solar energy conversion due to its band gap (1.61 eV). However its growth seems to be characterized by a micrometric thread-like structure, probably overgrowing a smooth ultra-thin films. On this ground, a SXRD investigation has been performed, to address the open questions about the structure and the growth of CuxZnyS by means of E-ALD. The experiment shows a pseudo single crystal pattern as well as a powder pattern, confirming that part of the sample grows epitaxially on the Ag(111) substrate. The growth of the film was monitored by following the evolution of the Bragg peaks and Debye rings during the E-ALD steps. Breadth and profile analysis of the Bragg peaks lead to a qualitative interpretation of the growth mechanism. This study confirms that Zn lead to the growth of a strained Cu2S-like structure, while the growth of the thread-like structure is probably driven by the release of the stress from the epitaxial phase.

Sensitive thermal transitions of nanoscale polymer samples using the bimetallic effect: application to ultra-thin polythiophene.

Science.gov (United States)

Ahumada, O; Pérez-Madrigal, M M; Ramirez, J; Curcó, D; Esteves, C; Salvador-Matar, A; Luongo, G; Armelin, E; Puiggalí, J; Alemán, C

2013-05-01

A sensitive nanocalorimetric technology based on microcantilever sensors is presented. The technology, which combines very short response times with very small sample consumption, uses the bimetallic effect to detect thermal transitions. Specifically, abrupt variations in the Young's modulus and the thermal expansion coefficient produced by temperature changes have been employed to detect thermodynamic transitions. The technology has been used to determine the glass transition of poly(3-thiophene methyl acetate), a soluble semiconducting polymer with different nanotechnological applications. The glass transition temperature determined using microcantilevers coated with ultra-thin films of mass = 10(-13) g is 5.2 °C higher than that obtained using a conventional differential scanning calorimeter for bulk powder samples of mass = 5 × 10(-3) g. Atomistic molecular dynamics simulations on models that represent the bulk powder and the ultra-thin films have been carried out to provide understanding and rationalization of this feature. Simulations indicate that the film-air interface plays a crucial role in films with very small thickness, affecting both the organization of the molecular chains and the response of the molecules against the temperature.

Dependence of the organic nonvolatile memory performance on the location of ultra-thin Ag film

International Nuclear Information System (INIS)

Jiao Bo; Wu Zhaoxin; He Qiang; Mao Guilin; Hou Xun; Tian Yuan

2010-01-01

We demonstrated organic nonvolatile memory devices based on 4,4',4''-tris[N-(3-methylphenyl)-N-phenylamino] triphenylamine (m-MTDATA) inserted by an ultra-thin Ag film. The memory devices with different locations of ultra-thin Ag film in m-MTDATA were investigated, and it was found that the location of the Ag film could affect the performance of the organic memory, such as ON/OFF ratio, retention time and cycling endurance. When the Ag film was located at the ITO/m-MTDATA interface, the largest ON/OFF ratio (about 10 5 ) could be achieved, but the cycling endurance was poor. When the Ag film was located in the middle region of the m-MTDATA layer, the ON/OFF ratios came down by about 10 3 , but better performance of cycling endurance was exhibited. When the Ag film was located close to the Al electrode, the ON/OFF ratios and the retention time of this device decreased sharply and the bistable phenomenon almost disappeared. Our works show a simple approach to improve the performance of organic memory by adjusting the location of the metal film.

Magnetic structures in ultra-thin Holmium films: Influence of external magnetic field

Energy Technology Data Exchange (ETDEWEB)

Rodrigues, L.J. [Departamento de Física Teórica e Experimental, Universidade Federal do Rio Grande do Norte, Natal 59600-900, RN (Brazil); Departamento de Física, Universidade do Estado do Rio Grande do Norte, Mossoró 59625-620, RN (Brazil); Mello, V.D. [Departamento de Física, Universidade do Estado do Rio Grande do Norte, Mossoró 59625-620, RN (Brazil); Anselmo, D.H.A.L. [Departamento de Física Teórica e Experimental, Universidade Federal do Rio Grande do Norte, Natal 59600-900, RN (Brazil); Vasconcelos, M.S., E-mail: mvasconcelos@ect.ufrn.br [Escola de Ciência e Tecnologia, Universidade Federal do Rio Grande do Norte, 59072-970 Natal, RN (Brazil)

2015-03-01

We address the magnetic phases in very thin Ho films at the temperature interval between 20 K and 132 K. We show that slab size, surface effects and magnetic field due to spin ordering impact significantly the magnetic phase diagram. Also we report that there is a relevant reduction of the external field strength required to saturate the magnetization and for ultra-thin films the helical state does not form. We explore the specific heat and the susceptibility as auxiliary tools to discuss the nature of the phase transitions, when in the presence of an external magnetic field and temperature effects. The presence of an external field gives rise to the magnetic phase Fan and the spin-slip structures. - Highlights: • We analyze the magnetic phases of very thin Ho films in the temperature interval 20–132 K. • We show that slab size, etc. due to spin ordering may impact the magnetic phase diagram. • All magnetic phase transitions, for strong magnetic fields, are marked by the specific heat. • The presence of an external field gives rise to the magnetic phase Fan and the spin-slip one.

Application of calendering for improving the electrical characteristics of a printed top-gate, bottom-contact organic thin film transistors

Science.gov (United States)

Lee, Sang Hoon; Lee, Dong Geun; Jung, Hoeryong; Lee, Sangyoon

2018-05-01

Interface between the channel and the gate dielectric of organic thin film transistors (OTFTs) needs to be smoothed in order to improve the electrical characteristics. In this study, an optimized calendering process was proposed to improve the surface roughness of the channel. Top-gate, bottom-contact structural p-type OTFT samples were fabricated using roll-to-roll gravure printing (source/drain, channel), spin coating (gate dielectric), and inkjet printing (gate electrode). The calendering process was optimized using the grey-based Taguchi method. The channel surface roughness and electrical characteristics of calendered and non-calendered samples were measured and compared. As a result, the average improvement in the surface roughness of the calendered samples was 26.61%. The average on–off ratio and field-effect mobility of the calendered samples were 3.574 × 104 and 0.1113 cm2 V‑1 s‑1, respectively, which correspond to the improvements of 16.72 and 10.20%, respectively.

Intrinsic radiation tolerance of ultra-thin GaAs solar cells

Energy Technology Data Exchange (ETDEWEB)

Hirst, L. C.; Yakes, M. K.; Warner, J. H.; Schmieder, K. J.; Walters, R. J.; Jenkins, P. P. [U.S. Naval Research Laboratory, 4555 Overlook Ave. SW., Washington, D.C. 20375 (United States); Bennett, M. F. [Sotera Defense Solutions, Inc., Annapolis Junction, Maryland 20701-1067 (United States)

2016-07-18

Radiation tolerance is a critical performance criterion of photovoltaic devices for space power applications. In this paper we demonstrate the intrinsic radiation tolerance of an ultra-thin solar cell geometry. Device characteristics of GaAs solar cells with absorber layer thicknesses 80 nm and 800 nm were compared before and after 3 MeV proton irradiation. Both cells showed a similar degradation in V{sub oc} with increasing fluence; however, the 80 nm cell showed no degradation in I{sub sc} for fluences up to 10{sup 14 }p{sup +} cm{sup −2}. For the same exposure, the I{sub sc} of the 800 nm cell had severely degraded leaving a remaining factor of 0.26.

Visible-light-induced instability in amorphous metal-oxide based TFTs for transparent electronics

Directory of Open Access Journals (Sweden)

Tae-Jun Ha

2014-10-01

Full Text Available We investigate the origin of visible-light-induced instability in amorphous metal-oxide based thin film transistors (oxide-TFTs for transparent electronics by exploring the shift in threshold voltage (Vth. A large hysteresis window in amorphous indium-gallium-zinc-oxide (a-IGZO TFTs possessing large optical band-gap (≈3 eV was observed in a visible-light illuminated condition whereas no hysteresis window was shown in a dark measuring condition. We also report the instability caused by photo irradiation and prolonged gate bias stress in oxide-TFTs. Larger Vth shift was observed after photo-induced stress combined with a negative gate bias than the sum of that after only illumination stress and only negative gate bias stress. Such results can be explained by trapped charges at the interface of semiconductor/dielectric and/or in the gate dielectric which play a role in a screen effect on the electric field applied by gate voltage, for which we propose that the localized-states-assisted transitions by visible-light absorption can be responsible.

Visible-light-induced instability in amorphous metal-oxide based TFTs for transparent electronics

Energy Technology Data Exchange (ETDEWEB)

Ha, Tae-Jun [Department of Electronic Materials Engineering, Kwangwoon University, Seoul 139-701 (Korea, Republic of)

2014-10-15

We investigate the origin of visible-light-induced instability in amorphous metal-oxide based thin film transistors (oxide-TFTs) for transparent electronics by exploring the shift in threshold voltage (V{sub th}). A large hysteresis window in amorphous indium-gallium-zinc-oxide (a-IGZO) TFTs possessing large optical band-gap (≈3 eV) was observed in a visible-light illuminated condition whereas no hysteresis window was shown in a dark measuring condition. We also report the instability caused by photo irradiation and prolonged gate bias stress in oxide-TFTs. Larger V{sub th} shift was observed after photo-induced stress combined with a negative gate bias than the sum of that after only illumination stress and only negative gate bias stress. Such results can be explained by trapped charges at the interface of semiconductor/dielectric and/or in the gate dielectric which play a role in a screen effect on the electric field applied by gate voltage, for which we propose that the localized-states-assisted transitions by visible-light absorption can be responsible.

Ultra-violet absorption induced modifications in bulk and nanoscale electrical transport properties of Al-doped ZnO thin films

Energy Technology Data Exchange (ETDEWEB)

Kumar, Mohit; Basu, Tanmoy; Som, Tapobrata, E-mail: tsom@iopb.res.in [SUNAG Laboratory, Institute of Physics, Sachivalaya Marg, Bhubaneswar 751 005 (India)

2015-08-07

Using conductive atomic force microscopy and Kelvin probe force microscopy, we study local electrical transport properties in aluminum-doped zinc oxide (ZnO:Al or AZO) thin films. Current mapping shows a spatial variation in conductivity which corroborates well with the local mapping of donor concentration (∼10{sup 20 }cm{sup −3}). In addition, a strong enhancement in the local current at grains is observed after exposing the film to ultra-violet (UV) light which is attributed to persistent photocurrent. Further, it is shown that UV absorption gives a smooth conduction in AZO film which in turn gives rise to an improvement in the bulk photoresponsivity of an n-AZO/p-Si heterojunction diode. This finding is in contrast to the belief that UV absorption in an AZO layer leads to an optical loss for the underneath absorbing layer of a heterojunction solar cell.

Comparison between bulk and thin foil ion irradiation of ultra high purity Fe

Energy Technology Data Exchange (ETDEWEB)

Prokhodtseva, A., E-mail: anna.prokhodtseva@psi.ch [Ecole Polytechnique Fédérale de Lausanne (EPFL), Centre de Recherches en Physique des Plasmas, Association Euratom-Confédération Suisse, 5232 Villigen PSI (Switzerland); Décamps, B. [Centre de Spectrométrie Nucléaire et de Spectrométrie de Masse (CSNSM), CNRS-IN2P3-Univ. Paris-Sud 11, UMR 8609, Bât. 108, 91405 Orsay (France); Schäublin, R. [Ecole Polytechnique Fédérale de Lausanne (EPFL), Centre de Recherches en Physique des Plasmas, Association Euratom-Confédération Suisse, 5232 Villigen PSI (Switzerland)

2013-11-15

Accumulation of radiation damage in ultra high purity iron under self ion irradiation without and with simultaneous He implantation was investigated in bulk and thin foil form to assess, on the one hand, the effect of free surfaces and, on the other hand, the influence of He. Specimens were irradiated at room temperature to a dose of 0.8 dpa and ∼900 appm He content. We found in thin foils after irradiation with single beam a majority of a{sub 0} 〈1 0 0〉 type loops, while in the presence of He it is the ½ a{sub 0} 〈1 1 1〉 type loops that prevail. In single beam irradiated bulk samples most of the loops are of ½ a{sub 0} 〈1 1 1〉 type. In both bulk and thin foils density of defects visible in transmission electron microscope is considerably higher when He is implanted with prevailing ½ a{sub 0} 〈1 1 1〉 dislocation loops, indicating that He stabilizes them.

Photo-galvanic effect in Bi2Se3 thin films with ionic liquid gating

Science.gov (United States)

Pan, Yu; Richardella, Anthony; Lee, Joon Sue; Flanagan, Thomas; Samarth, Nitin

2013-03-01

A key challenge in three dimensional (3D) topological insulators (TIs) is to reveal the helical spin-polarized surface states via electrical transport measurements. A recent study [Nature Nanotech. 7, 96 (2012)] showed that circularly polarized light can be used to generate and control photocurrents in the 3D TI Bi2Se3, even at photon energies that are well above the bulk band gap. Symmetry considerations suggest that this ``photo-galvanic effect'' arises purely from photo-currents induced in the surface Dirac states. To gain insights into this phenomenon, we have carried out systematic measurements of the photo-galvanic effect in electrically gated MBE-grown Bi2Se3 thin films of varying thickness. By using an ionic liquid as an optically transparent gate, we map out the behavior of the photo-galvanic effect as a function of Fermi energy over a temperature range 5 K <= T <= 300 K. Supported by ONR and NSF.

Balancing Hole and Electron Conduction in Ambipolar Split-Gate Thin-Film Transistors.

Science.gov (United States)

Yoo, Hocheon; Ghittorelli, Matteo; Lee, Dong-Kyu; Smits, Edsger C P; Gelinck, Gerwin H; Ahn, Hyungju; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

2017-07-10

Complementary organic electronics is a key enabling technology for the development of new applications including smart ubiquitous sensors, wearable electronics, and healthcare devices. High-performance, high-functionality and reliable complementary circuits require n- and p-type thin-film transistors with balanced characteristics. Recent advancements in ambipolar organic transistors in terms of semiconductor and device engineering demonstrate the great potential of this route but, unfortunately, the actual development of ambipolar organic complementary electronics is currently hampered by the uneven electron (n-type) and hole (p-type) conduction in ambipolar organic transistors. Here we show ambipolar organic thin-film transistors with balanced n-type and p-type operation. By manipulating air exposure and vacuum annealing conditions, we show that well-balanced electron and hole transport properties can be easily obtained. The method is used to control hole and electron conductions in split-gate transistors based on a solution-processed donor-acceptor semiconducting polymer. Complementary logic inverters with balanced charging and discharging characteristics are demonstrated. These findings may open up new opportunities for the rational design of complementary electronics based on ambipolar organic transistors.

Polymer-electrolyte-gated nanowire synaptic transistors for neuromorphic applications

Science.gov (United States)

Zou, Can; Sun, Jia; Gou, Guangyang; Kong, Ling-An; Qian, Chuan; Dai, Guozhang; Yang, Junliang; Guo, Guang-hua

2017-09-01

Polymer-electrolytes are formed by dissolving a salt in polymer instead of water, the conducting mechanism involves the segmental motion-assisted diffusion of ion in the polymer matrix. Here, we report on the fabrication of tin oxide (SnO2) nanowire synaptic transistors using polymer-electrolyte gating. A thin layer of poly(ethylene oxide) and lithium perchlorate (PEO/LiClO4) was deposited on top of the devices, which was used to boost device performances. A voltage spike applied on the in-plane gate attracts ions toward the polymer-electrolyte/SnO2 nanowire interface and the ions are gradually returned after the pulse is removed, which can induce a dynamic excitatory postsynaptic current in the nanowire channel. The SnO2 synaptic transistors exhibit the behavior of short-term plasticity like the paired-pulse facilitation and self-adaptation, which is related to the electric double-effect regulation. In addition, the synaptic logic functions and the logical function transformation are also discussed. Such single SnO2 nanowire-based synaptic transistors are of great importance for future neuromorphic devices.

Contact resistance and overlapping capacitance in flexible sub-micron long oxide thin-film transistors for above 100 MHz operation

Energy Technology Data Exchange (ETDEWEB)

Münzenrieder, Niko, E-mail: muenzenrieder@ife.ee.ethz.ch; Salvatore, Giovanni A.; Petti, Luisa; Zysset, Christoph; Büthe, Lars; Vogt, Christian; Cantarella, Giuseppe; Tröster, Gerhard [Electronics Laboratory Swiss Federal Institute of Technology (ETH) Zürich, Gloriastrasse 35, 8092 Zürich (Switzerland)

2014-12-29

In recent years new forms of electronic devices such as electronic papers, flexible displays, epidermal sensors, and smart textiles have become reality. Thin-film transistors (TFTs) are the basic blocks of the circuits used in such devices and need to operate above 100 MHz to efficiently treat signals in RF systems and address pixels in high resolution displays. Beyond the choice of the semiconductor, i.e., silicon, graphene, organics, or amorphous oxides, the junctionless nature of TFTs and its geometry imply some limitations which become evident and important in devices with scaled channel length. Furthermore, the mechanical instability of flexible substrates limits the feature size of flexible TFTs. Contact resistance and overlapping capacitance are two parasitic effects which limit the transit frequency of transistors. They are often considered independent, while a deeper analysis of TFTs geometry imposes to handle them together; in fact, they both depend on the overlapping length (L{sub OV}) between source/drain and the gate contacts. Here, we conduct a quantitative analysis based on a large number of flexible ultra-scaled IGZO TFTs. Devices with three different values of overlap length and channel length down to 0.5 μm are fabricated to experimentally investigate the scaling behavior of the transit frequency. Contact resistance and overlapping capacitance depend in opposite ways on L{sub OV}. These findings establish routes for the optimization of the dimension of source/drain contact pads and suggest design guidelines to achieve megahertz operation in flexible IGZO TFTs and circuits.

Study of surface-modified PVP gate dielectric in organic thin film transistors with the nano-particle silver ink source/drain electrode.

Science.gov (United States)

Yun, Ho-Jin; Ham, Yong-Hyun; Shin, Hong-Sik; Jeong, Kwang-Seok; Park, Jeong-Gyu; Choi, Deuk-Sung; Lee, Ga-Won

2011-07-01

We have fabricated the flexible pentacene based organic thin film transistors (OTFTs) with formulated poly[4-vinylphenol] (PVP) gate dielectrics treated by CF4/O2 plasma on poly[ethersulfones] (PES) substrate. The solution of gate dielectrics is made by adding methylated poly[melamine-co-formaldehyde] (MMF) to PVP. The PVP gate dielectric layer was cross linked at 90 degrees under UV ozone exposure. Source/drain electrodes are formed by micro contact printing (MCP) method using nano particle silver ink for the purposes of low cost and high throughput. The optimized OTFT shows the device performance with field effect mobility of the 0.88 cm2/V s, subthreshold slope of 2.2 V/decade, and on/off current ratios of 1.8 x 10(-6) at -40 V gate bias. We found that hydrophobic PVP gate dielectric surface can influence on the initial film morphologies of pentacene making dense, which is more important for high performance OTFTs than large grain size. Moreover, hydrophobic gate dielelctric surface reduces voids and -OH groups that interrupt the carrier transport in OTFTs.

r-Universal reversible logic gates

International Nuclear Information System (INIS)

Vos, A de; Storme, L

2004-01-01

Reversible logic plays a fundamental role both in ultra-low power electronics and in quantum computing. It is therefore important to know which reversible logic gates can be used as building block for the reversible implementation of an arbitrary boolean function and which cannot

Low-cost label-free electrical detection of artificial DNA nanostructures using solution-processed oxide thin-film transistors.

Science.gov (United States)

Kim, Si Joon; Jung, Joohye; Lee, Keun Woo; Yoon, Doo Hyun; Jung, Tae Soo; Dugasani, Sreekantha Reddy; Park, Sung Ha; Kim, Hyun Jae

2013-11-13

A high-sensitivity, label-free method for detecting deoxyribonucleic acid (DNA) using solution-processed oxide thin-film transistors (TFTs) was developed. Double-crossover (DX) DNA nanostructures with different concentrations of divalent Cu ion (Cu(2+)) were immobilized on an In-Ga-Zn-O (IGZO) back-channel surface, which changed the electrical performance of the IGZO TFTs. The detection mechanism of the IGZO TFT-based DNA biosensor is attributed to electron trapping and electrostatic interactions caused by negatively charged phosphate groups on the DNA backbone. Furthermore, Cu(2+) in DX DNA nanostructures generates a current path when a gate bias is applied. The direct effect on the electrical response implies that solution-processed IGZO TFTs could be used to realize low-cost and high-sensitivity DNA biosensors.

High-Mobility 6,13-Bis(triisopropylsilylethynyl) Pentacene Transistors Using Solution-Processed Polysilsesquioxane Gate Dielectric Layers.

Science.gov (United States)

Matsuda, Yu; Nakahara, Yoshio; Michiura, Daisuke; Uno, Kazuyuki; Tanaka, Ichiro

2016-04-01

Polysilsesquioxane (PSQ) is a low-temperature curable polymer that is compatible with low-cost plastic substrates. We cured PSQ gate dielectric layers by irradiation with ultraviolet light at ~60 °C, and used them for 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) thin film transistors (TFTs). The fabricated TFTs have shown the maximum and average hole mobility of 1.3 and 0.78 ± 0.3 cm2V-1s-1, which are comparable to those of the previously reported transistors using single-crystalline TIPS-pentacene micro-ribbons for their active layers and thermally oxidized SiO2 for their gate dielectric layers. Itis therefore demonstrated that PSQ is a promising polymer gate dielectric material for low-cost organic TFTs.

Deposition and characterisation of epitaxial oxide thin films for SOFCs

KAUST Repository

Santiso, José