SU-F-T-526: A Comparative Study On Gating Efficiency of Varian RPM Device and Calypso System

Energy Technology Data Exchange (ETDEWEB)

Ravindran, P [Christian Medical College Hospital, Vellore (India); Wui Ann, W; Lim, Y [The Brunei Cancer Center (Brunei Darussalam)

2016-06-15

Purpose: In general, the linear accelerator is gated using respiratory signal obtained by way of external sensors to account for the breathing motion during radiotherapy. One of the commonly used gating devices is the Varian RPM device. Calypso system that uses electromagnetic tracking of implanted or surface transponders could also be used for gating. The aim of this study is to compare the gating efficiency of RPM device and the calypso system by phantom studies. Methods: An ArcCheck insert was used as the phantom with a Gafchromic film placed in its holder. The ArcCheck insert was placed on a Motion Sim platform and moved in the longitudinal direction simulating a respiratory motion with a period of 5 seconds and amplitude of ±6mm. The Gafchromic film was exposed to a 2 × 2cm{sup 2} field, i) with the phantom static, ii) phantom moving but ungated iii) gated with gating window of 2mm and 3mm. This was repeated with Calypso system using surface transponders with the same gating window. The Gafchromic films were read with an EPSON 11000 flatbed scanner and analysed with ‘Medphysto’ software. Results: The full width at half maximum (FWHM) as measured with film at the level of the film holder was 1.65cm when the phantom was static. FWHM measured with phantom moving and without gating was 1.16 cm and penumbra was 7 mm (80–20%) on both sides. When the beam was gated with 2 mm gating window the FWHM was 1.8 cm with RPM device and 1.9 cm with Calypso. Similarly, when the beam was gated with 3 mm window, the FWHM was 1.9cm with RPM device and 2cm with Calypso. Conclusion: This work suggests that the gating efficiency of RPM device is better than that of the Calypso with surface transponder, with reference to the latency in gating.

Suspended graphene devices with local gate control on an insulating substrate

International Nuclear Information System (INIS)

Ong, Florian R; Cui, Zheng; Vojvodin, Cameron; Papaj, Michał; Deng, Chunqing; Bal, Mustafa; Lupascu, Adrian; Yurtalan, Muhammet A; Orgiazzi, Jean-Luc F X

2015-01-01

We present a fabrication process for graphene-based devices where a graphene monolayer is suspended above a local metallic gate placed in a trench. As an example we detail the fabrication steps of a graphene field-effect transistor. The devices are built on a bare high-resistivity silicon substrate. At temperatures of 77 K and below, we observe the field-effect modulation of the graphene resistivity by a voltage applied to the gate. This fabrication approach enables new experiments involving graphene-based superconducting qubits and nano-electromechanical resonators. The method is applicable to other two-dimensional materials. (paper)

GaN MOSHEMT employing HfO2 as a gate dielectric with partially etched barrier

Science.gov (United States)

Han, Kefeng; Zhu, Lin

2017-09-01

In order to suppress the gate leakage current of a GaN high electron mobility transistor (GaN HEMT), a GaN metal-oxide-semiconductor high electron mobility transistor (MOSHEMT) is proposed, in which a metal-oxide-semiconductor gate with high-dielectric-constant HfO2 as an insulating dielectric is employed to replace the traditional GaN HEMT Schottky gate. A 0.5 μm gate length GaN MOSHEMT was fabricated based on the proposed structure, the {{{Al}}}0.28{{{Ga}}}0.72{{N}} barrier layer is partially etched to produce a higher transconductance without deteriorating the transport characteristics of the two-dimensional electron gas in the channel, the gate dielectric is HfO2 deposited by atomic layer deposition. Current-voltage characteristics and radio frequency characteristics are obtained after device preparation, the maximum current density of the device is 900 mA mm-1, the source-drain breakdown voltage is 75 V, gate current is significantly suppressed and the forward gate voltage swing range is about ten times higher than traditional GaN HEMTs, the GaN MOSHEMT also demonstrates radio frequency characteristics comparable to traditional GaN HEMTs with the same gate length.

Photovoltaic and photothermoelectric effect in a double-gated WSe2 device.

Science.gov (United States)

Groenendijk, Dirk J; Buscema, Michele; Steele, Gary A; Michaelis de Vasconcellos, Steffen; Bratschitsch, Rudolf; van der Zant, Herre S J; Castellanos-Gomez, Andres

2014-10-08

Tungsten diselenide (WSe2), a semiconducting transition metal dichalcogenide (TMDC), shows great potential as active material in optoelectronic devices due to its ambipolarity and direct bandgap in its single-layer form. Recently, different groups have exploited the ambipolarity of WSe2 to realize electrically tunable PN junctions, demonstrating its potential for digital electronics and solar cell applications. In this Letter, we focus on the different photocurrent generation mechanisms in a double-gated WSe2 device by measuring the photocurrent (and photovoltage) as the local gate voltages are varied independently in combination with above- and below-bandgap illumination. This enables us to distinguish between two main photocurrent generation mechanisms, the photovoltaic and photothermoelectric effect. We find that the dominant mechanism depends on the defined gate configuration. In the PN and NP configurations, photocurrent is mainly generated by the photovoltaic effect and the device displays a maximum responsivity of 0.70 mA/W at 532 nm illumination and rise and fall times close to 10 ms. Photocurrent generated by the photothermoelectric effect emerges in the PP configuration and is a factor of 2 larger than the current generated by the photovoltaic effect (in PN and NP configurations). This demonstrates that the photothermoelectric effect can play a significant role in devices based on WSe2 where a region of strong optical absorption, caused by, for example, an asymmetry in flake thickness or optical absorption of the electrodes, generates a sizable thermal gradient upon illumination.

Gate-tunable large magnetoresistance in an all-semiconductor spin valve device.

Science.gov (United States)

Oltscher, M; Eberle, F; Kuczmik, T; Bayer, A; Schuh, D; Bougeard, D; Ciorga, M; Weiss, D

2017-11-27

A large spin-dependent and electric field-tunable magnetoresistance of a two-dimensional electron system is a key ingredient for the realization of many novel concepts for spin-based electronic devices. The low magnetoresistance observed during the last few decades in devices with lateral semiconducting transport channels between ferromagnetic source and drain contacts has been the main obstacle for realizing spin field effect transistor proposals. Here, we show both a large two-terminal magnetoresistance in a lateral spin valve device with a two-dimensional channel, with up to 80% resistance change, and tunability of the magnetoresistance by an electric gate. The enhanced magnetoresistance is due to finite electric field effects at the contact interface, which boost spin-to-charge conversion. The gating scheme that we use is based on switching between uni- and bidirectional spin diffusion, without resorting to spin-orbit coupling. Therefore, it can also be employed in materials with low spin-orbit coupling.

Modeling and simulation of floating gate nanocrystal FET devices and circuits

Science.gov (United States)

Hasaneen, El-Sayed A. M.

The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to

Role of Electrical Double Layer Structure in Ionic Liquid Gated Devices.

Science.gov (United States)

Black, Jennifer M; Come, Jeremy; Bi, Sheng; Zhu, Mengyang; Zhao, Wei; Wong, Anthony T; Noh, Joo Hyon; Pudasaini, Pushpa R; Zhang, Pengfei; Okatan, Mahmut Baris; Dai, Sheng; Kalinin, Sergei V; Rack, Philip D; Ward, Thomas Zac; Feng, Guang; Balke, Nina

2017-11-22

Ionic liquid gating of transition metal oxides has enabled new states (magnetic, electronic, metal-insulator), providing fundamental insights into the physics of strongly correlated oxides. However, despite much research activity, little is known about the correlation of the structure of the liquids in contact with the transition metal oxide surface, its evolution with the applied electric potential, and its correlation with the measured electronic properties of the oxide. Here, we investigate the structure of an ionic liquid at a semiconducting oxide interface during the operation of a thin film transistor where the electrical double layer gates the device using experiment and theory. We show that the transition between the ON and OFF states of the amorphous indium gallium zinc oxide transistor is accompanied by a densification and preferential spatial orientation of counterions at the oxide channel surface. This process occurs in three distinct steps, corresponding to ion orientations, and consequently, regimes of different electrical conductivity. The reason for this can be found in the surface charge densities on the oxide surface when different ion arrangements are present. Overall, the field-effect gating process is elucidated in terms of the interfacial ionic liquid structure, and this provides unprecedented insight into the working of a liquid gated transistor linking the nanoscopic structure to the functional properties. This knowledge will enable both new ionic liquid design as well as advanced device concepts.

Cryogenic on-chip multiplexer for the study of quantum transport in 256 split-gate devices

International Nuclear Information System (INIS)

Al-Taie, H.; Kelly, M. J.; Smith, L. W.; Xu, B.; Griffiths, J. P.; Beere, H. E.; Jones, G. A. C.; Ritchie, D. A.; Smith, C. G.; See, P.

2013-01-01

We present a multiplexing scheme for the measurement of large numbers of mesoscopic devices in cryogenic systems. The multiplexer is used to contact an array of 256 split gates on a GaAs/AlGaAs heterostructure, in which each split gate can be measured individually. The low-temperature conductance of split-gate devices is governed by quantum mechanics, leading to the appearance of conductance plateaux at intervals of 2e 2 /h. A fabrication-limited yield of 94% is achieved for the array, and a “quantum yield” is also defined, to account for disorder affecting the quantum behaviour of the devices. The quantum yield rose from 55% to 86% after illuminating the sample, explained by the corresponding increase in carrier density and mobility of the two-dimensional electron gas. The multiplexer is a scalable architecture, and can be extended to other forms of mesoscopic devices. It overcomes previous limits on the number of devices that can be fabricated on a single chip due to the number of electrical contacts available, without the need to alter existing experimental set ups

Spatio-temporal evolution of apparent resistivity during coal-seam hydraulic flushing

Science.gov (United States)

Li, Dexing; Wang, Enyuan; Song, Dazhao; Qiu, Liming; Kong, Xiangguo

2018-06-01

Hydraulic flushing in gas predrainage is widely used, but the hydraulic-flushing effect is evaluated in a traditional way, by determining the desorption volume, moisture content, gas drainage rate and other conventional indices. To verify the rationality and feasibility of the multielectrode resistivity method in the evaluation of coal-seam hydraulic flushing and to research the spatio-temporal evolution of apparent resistivity during hydraulic flushing, a field test was conducted in 17# coal seam at Nuodong Mine, Guizhou. During hydraulic flushing, four stages were defined according to the variation in coal rock resistivity with time, namely, the preparation stage, the sharply decreasing stage, the rapidly increasing stage and the steady stage. The apparent resistivity of the coal rock mass is affected mainly by its own degree of fragmentation and flushing volume. A more serious rupture and a greater flushing volume yield a smaller apparent resistivity during the sharply decreasing stage and a higher resistivity during the stable stage. After three months of gas predrainage, the residual gas content and the gas pressure at different points in the expected affected area decrease below the critical value. Changes in the residual gas content and gas pressure at these points are consistent with the apparent resistivity, which validates the rationality and feasibility of the multielectrode resistivity method in evaluating coal-seam hydraulic flushing.

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities

Science.gov (United States)

Jung, Han Sae; Tsai, Hsin-Zon; Wong, Dillon; Germany, Chad; Kahn, Salman; Kim, Youngkyou; Aikawa, Andrew S.; Desai, Dhruv K.; Rodgers, Griffin F.; Bradley, Aaron J.; Velasco, Jairo; Watanabe, Kenji; Taniguchi, Takashi; Wang, Feng; Zettl, Alex; Crommie, Michael F.

2015-01-01

Owing to its relativistic low-energy charge carriers, the interaction between graphene and various impurities leads to a wealth of new physics and degrees of freedom to control electronic devices. In particular, the behavior of graphene’s charge carriers in response to potentials from charged Coulomb impurities is predicted to differ significantly from that of most materials. Scanning tunneling microscopy (STM) and scanning tunneling spectroscopy (STS) can provide detailed information on both the spatial and energy dependence of graphene's electronic structure in the presence of a charged impurity. The design of a hybrid impurity-graphene device, fabricated using controlled deposition of impurities onto a back-gated graphene surface, has enabled several novel methods for controllably tuning graphene’s electronic properties.1-8 Electrostatic gating enables control of the charge carrier density in graphene and the ability to reversibly tune the charge2 and/or molecular5 states of an impurity. This paper outlines the process of fabricating a gate-tunable graphene device decorated with individual Coulomb impurities for combined STM/STS studies.2-5 These studies provide valuable insights into the underlying physics, as well as signposts for designing hybrid graphene devices. PMID:26273961

Flexible semi-transparent silicon (100) fabric with high-k/metal gate devices

KAUST Repository

Rojas, Jhonathan Prieto

2013-01-07

Can we build a flexible and transparent truly high performance computer? High-k/metal gate stack based metal-oxide-semiconductor capacitor devices are monolithically fabricated on industry\\'s most widely used low-cost bulk single-crystalline silicon (100) wafers and then released as continuous, mechanically flexible, optically semi-transparent and high thermal budget compatible silicon fabric with devices. This is the first ever demonstration with this set of materials which allows full degree of freedom to fabricate nanoelectronics devices using state-of-the-art CMOS compatible processes and then to utilize them in an unprecedented way for wide deployment over nearly any kind of shape and architecture surfaces. Electrical characterization shows uncompromising performance of post release devices. Mechanical characterization shows extra-ordinary flexibility (minimum bending radius of 1 cm) making this generic process attractive to extend the horizon of flexible electronics for truly high performance computers. Schematic and photograph of flexible high-k/metal gate MOSCAPs showing high flexibility and C-V plot showing uncompromised performance. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Rotation gate for a three-level superconducting quantum interference device qubit with resonant interaction

International Nuclear Information System (INIS)

Yang, C.-P.; Han Siyuan

2006-01-01

We show a way to realize an arbitrary rotation gate in a three-level superconducting quantum interference device (SQUID) qubit using resonant interaction. In this approach, the two logical states of the qubit are represented by the two lowest levels of the SQUID and a higher-energy intermediate level is utilized for the gate manipulation. By considering spontaneous decay from the intermediate level during the gate operation, we present a formula for calculating average fidelity over all possible initial states. Finally, based on realistic system parameters, we show that an arbitrary rotation gate can be achieved with a high fidelity in a SQUID

High performance solution processed zirconium oxide gate dielectric appropriate for low temperature device application

Energy Technology Data Exchange (ETDEWEB)

Hasan, Musarrat; Nguyen, Manh-Cuong; Kim, Hyojin; You, Seung-Won; Jeon, Yoon-Seok; Tong, Duc-Tai; Lee, Dong-Hwi; Jeong, Jae Kyeong; Choi, Rino, E-mail: rino.choi@inha.ac.kr

2015-08-31

This paper reports a solution processed electrical device with zirconium oxide gate dielectric that was fabricated at a low enough temperature appropriate for flexible electronics. Both inorganic dielectric and channel materials were synthesized in the same organic solvent. The dielectric constant achieved was 13 at 250 °C with a reasonably low leakage current. The bottom gate transistor devices showed the highest mobility of 75 cm{sup 2}/V s. The device is operated at low voltage with high-k dielectric with excellent transconductance and low threshold voltage. Overall, the results highlight the potential of low temperature solution based deposition in fabricating more complicated circuits for a range of applications. - Highlights: • We develop a low temperature inorganic dielectric deposition process. • We fabricate oxide semiconductor channel devices using all-solution processes. • Same solvent is used for dielectric and oxide semiconductor deposition.

Dual-Gate p-GaN Gate High Electron Mobility Transistors for Steep Subthreshold Slope.

Science.gov (United States)

Bae, Jong-Ho; Lee, Jong-Ho

2016-05-01

A steep subthreshold slope characteristic is achieved through p-GaN gate HEMT with dual-gate structure. Obtained subthreshold slope is less than 120 μV/dec. Based on the measured and simulated data obtained from single-gate device, breakdown of parasitic floating-base bipolar transistor and floating gate charged with holes are responsible to increase abruptly in drain current. In the dual-gate device, on-current degrades with high temperature but subthreshold slope is not changed. To observe the switching speed of dual-gate device and transient response of drain current are measured. According to the transient responses of drain current, switching speed of the dual-gate device is about 10(-5) sec.

Impact of the shape of the implantable ports on their efficiency of flow (injection and flushing

Directory of Open Access Journals (Sweden)

Guiffant G

2014-09-01

Full Text Available Gérard Guiffant,1 Patrice Flaud,1 Jean Jacques Durussel,1 Jacques Merckx1,2 1Université Paris Diderot, Paris, France; 2University Teaching Hospital Necker-Enfants Malades, Paris, FranceAbstract: Now widely used, totally implantable venous access devices allow mid- and long-term, frequent, repeated, or continuous injection of therapeutic products by vascular, cavitary, or perineural access. The effective flushing of these devices is a key factor that ensures their long-lasting use. We present experimental results and a numerical simulation to demonstrate that the implementation of rounded edge wall cavities improves flushing efficiency. We use the same approaches to suggest that the deposit amount may be reduced by the use of rounded edge wall cavities. Keywords: implantable ports, totally implantable venous access devices, flushing, obstruction, prevention

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

Directory of Open Access Journals (Sweden)

Paul C. McIntyre

2012-07-01

Full Text Available The literature on polar Gallium Nitride (GaN surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

An intelligent 1:2 demultiplexer as an intracellular theranostic device based on DNA/Ag cluster-gated nanovehicles

Science.gov (United States)

Ran, Xiang; Wang, Zhenzhen; Ju, Enguo; Pu, Fang; Song, Yanqiu; Ren, Jinsong; Qu, Xiaogang

2018-02-01

The logic device demultiplexer can convey a single input signal into one of multiple output channels. The choice of the output channel is controlled by a selector. Several molecules and biomolecules have been used to mimic the function of a demultiplexer. However, the practical application of logic devices still remains a big challenge. Herein, we design and construct an intelligent 1:2 demultiplexer as a theranostic device based on azobenzene (azo)-modified and DNA/Ag cluster-gated nanovehicles. The configuration of azo and the conformation of the DNA ensemble can be regulated by light irradiation and pH, respectively. The demultiplexer which uses light as the input and acid as the selector can emit red fluorescence or a release drug under different conditions. Depending on different cells, the intelligent logic device can select the mode of cellular imaging in healthy cells or tumor therapy in tumor cells. The study incorporates the logic gate with the theranostic device, paving the way for tangible applications of logic gates in the future.

33 CFR 162.20 - Flushing Bay near La Guardia Airport, Flushing, N.Y.; restricted area.

Science.gov (United States)

2010-07-01

... 33 Navigation and Navigable Waters 2 2010-07-01 2010-07-01 false Flushing Bay near La Guardia Airport, Flushing, N.Y.; restricted area. 162.20 Section 162.20 Navigation and Navigable Waters COAST... NAVIGATION REGULATIONS § 162.20 Flushing Bay near La Guardia Airport, Flushing, N.Y.; restricted area. (a...

'You know I've joined your club… I'm the hot flush boy': a qualitative exploration of hot flushes and night sweats in men undergoing androgen deprivation therapy for prostate cancer.

Science.gov (United States)

Eziefula, C U; Grunfeld, E A; Hunter, M S

2013-12-01

Hot flushes and night sweats are common amongst menopausal women, and psychological interventions for managing these symptoms have recently been developed for women. However, flushes in men with prostate cancer, which commonly occur following androgen deprivation therapy (ADT), remain under-researched. This study is a qualitative exploration of flush-related cognitive appraisals and behavioural reactions reported by a sample of these men. Semi-structured, in-depth interviews were conducted with 19 men who were experiencing flushes after receiving ADT for prostate cancer. Framework analysis was used to generate and categorise emergent themes and explore associations between themes. Five main cognitive appraisals included the following: changes in oneself, impact on masculinity, embarrassment/social-evaluative concerns, perceived control and acceptance/adjustment. There were men who held beliefs about the impact of flushes on their perceptions of traditional gender roles, who experienced shame and embarrassment due to concerns about the salience of flushes and perceptions by others and who experienced feelings of powerlessness over flushes. Powerlessness was associated with beliefs about the potentially fatal consequences of discontinuing treatment. Two other dominant themes included awareness/knowledge about flushes and management strategies. Experiences of flushes appeared to be influenced by upbringing and general experiences of prostate cancer and ADT. The range of men's appraisals of, and reactions to, flushes generated from this qualitative exploration were broadly similar to those of menopausal women but differed in terms of the influence of masculinity beliefs. These findings could be used to inform future research and psychological interventions in this under-researched field. Copyright © 2013 John Wiley & Sons, Ltd.

Highly scalable 3-D NAND-NOR hybrid-type dual bit per cell flash memory devices with an additional cut-off gate

International Nuclear Information System (INIS)

Cho, Seongjae; Shim, Wonbo; Park, Ilhan; Kim, Yoon; Park, Byunggook

2010-01-01

In this work, a nonvolatile memory (NVM) device of novel structure in 3 dimensions is introduced, and its operation physics is validated. It is based on a pillar structure in which two identical storage nodes are located for dual-bit operation. The two storage nodes on neighboring pillars are controlled by using one common control gate so that the space between silicon pillars can be further reduced. For compatibility with conventional memory operations, an additional cut-off gate is constructed under the common control gate. This is considered as the ultimate form for a 3-D nonvolatile memory device based on a double-gate structure. The underlying physics is explained, and the operational schemes are validated in various aspects by using a numerical device simulation. Also, critical issues in device design for higher reliability are discussed.

Effect of the gate scaling on the analogue performance of s-Si CMOS devices

International Nuclear Information System (INIS)

Fobelets, K; Calvo-Gallego, J; Velázquez-Pérez, J E

2011-01-01

In this contribution, we present a detailed study of the analogue performance of deep submicron strained n-channel Si/SiGe (s-Si) MOSFETs. The study was carried out using a 2D device simulator based on the hydrodynamic model and the impedance field method to self-consistently obtain the current noise at the device's terminals. The analysis focused on the possible benefits of the gate scaling on the ac and noise performance of the transistor for low-power applications while keeping constant the oxide thickness equal to 2 nm to guarantee negligible level of the gate tunnel current. For a drain to source bias of 50 mV, it was found that a pure scaling of the transistor's gate length under 32 nm is detrimental for subthreshold operation in terms of the subthreshold slope (S) and transconductance (g m ) but would lead to reasonably low values of the minimum noise figure (NF min ). For the sake of comparison, SOI MOSFETs with the same layout and operating under the same conditions were simulated. The SOI MOSFETs showed better immunity against the gate scaling in terms of S than the s-Si MOSFETs, but lower values of g m and a higher value of NF min at the same level of the drain current. Finally, the devices have been studied in the saturation region for a drain to source bias of 1 V. In this region, it was found that the dependence of the current level SOI or s-Si MOSFET may outperform its counterparts

Odor control in swine buildings: recycle flush vs. automated scraper

Science.gov (United States)

A research project was conducted to compare odor concentrations in exhaust of traditional flush barns and barns equipped with automated scrapers. The study was conducted at commercial tunnel-ventilated swine barns in northwest Missouri. Odor samples were collected from the barn exhaust in polyvinyl ...

Multiqubit quantum phase gate using four-level superconducting quantum interference devices coupled to superconducting resonator

Energy Technology Data Exchange (ETDEWEB)

Waseem, Muhammad; Irfan, Muhammad [Department of Physics and Applied Mathematics, Pakistan Institute of Engineering and Applied Sciences, Nilore, Islamabad 45650 (Pakistan); Qamar, Shahid, E-mail: shahid_qamar@pieas.edu.pk [Department of Physics and Applied Mathematics, Pakistan Institute of Engineering and Applied Sciences, Nilore, Islamabad 45650 (Pakistan)

2012-07-15

In this paper, we propose a scheme to realize three-qubit quantum phase gate of one qubit simultaneously controlling two target qubits using four-level superconducting quantum interference devices (SQUIDs) coupled to a superconducting resonator. The two lowest levels Divides 0 Right-Pointing-Angle-Bracket and Divides 1 Right-Pointing-Angle-Bracket of each SQUID are used to represent logical states while the higher energy levels Divides 2 Right-Pointing-Angle-Bracket and Divides 3 Right-Pointing-Angle-Bracket are utilized for gate realization. Our scheme does not require adiabatic passage, second order detuning, and the adjustment of the level spacing during gate operation which reduce the gate time significantly. The scheme is generalized for an arbitrary n-qubit quantum phase gate. We also apply the scheme to implement three-qubit quantum Fourier transform.

Low band-to-band tunnelling and gate tunnelling current in novel nanoscale double-gate architecture: simulations and investigation

International Nuclear Information System (INIS)

Datta, Deepanjan; Ganguly, Samiran; Dasgupta, S

2007-01-01

Large band-to-band tunnelling (BTBT) and gate leakage current can limit scalability of nanoscale devices. In this paper, we have proposed a novel nanoscale parallel connected heteromaterial double gate (PCHEM-DG) architecture with triple metal gate which significantly suppress BTBT leakage, making it efficient for low power design in the sub-10 nm regime. We have also proposed a triple gate device with p + poly-n + poly-p + poly gate which has substantially low gate leakage over symmetric DG MOSFET. Simulations are performed using a 2D Poisson-Schroedinger simulator and verified with a 2D device simulator ATLAS. We conclude that, due to intrinsic body doping, negligible gate leakage, suppressed BTBT over symmetric DG devices, metal gate (MG) PCHEM-DG MOSFET is efficient for low power circuit design in the nanometre regime

Low band-to-band tunnelling and gate tunnelling current in novel nanoscale double-gate architecture: simulations and investigation

Energy Technology Data Exchange (ETDEWEB)

Datta, Deepanjan [Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47906 (United States); Ganguly, Samiran [Department of Electronics Engineering, Indian School of Mines, Dhanbad-826004 (India); Dasgupta, S [Department of Electronics and Computer Engineering, Indian Institute of Technology, Roorkee-247667 (India)

2007-05-30

Large band-to-band tunnelling (BTBT) and gate leakage current can limit scalability of nanoscale devices. In this paper, we have proposed a novel nanoscale parallel connected heteromaterial double gate (PCHEM-DG) architecture with triple metal gate which significantly suppress BTBT leakage, making it efficient for low power design in the sub-10 nm regime. We have also proposed a triple gate device with p{sup +} poly-n{sup +} poly-p{sup +} poly gate which has substantially low gate leakage over symmetric DG MOSFET. Simulations are performed using a 2D Poisson-Schroedinger simulator and verified with a 2D device simulator ATLAS. We conclude that, due to intrinsic body doping, negligible gate leakage, suppressed BTBT over symmetric DG devices, metal gate (MG) PCHEM-DG MOSFET is efficient for low power circuit design in the nanometre regime.

Power port contrast medium flushing and trapping: impact of temperature, an in vitro experimental study

Directory of Open Access Journals (Sweden)

Guiffant G

2013-09-01

Full Text Available Gérard Guiffant,1 Jean Jacques Durussel,1 Patrice Flaud,1 Laurent Royon,1 Pierre Yves Marcy,2 Jacques Merckx1,31University Paris Diderot, Paris, France; 2Radiodiagnosis and Interventional Radiology Department, Caen, France; 3University Teaching Hospital Necker-Enfants Malades, Paris, FrancePurpose: The use of totally implantable venous access devices (TIVADs certified as "high pressure resistant" or "power port" has begun to spread worldwide as a safe procedure for power contrast injection. Owing to the thermo-rheological properties of the contrast media, the primary aim of this work is to present an in vitro experimental impact study concerning the impact of the temperature level on flushing efficiency after contrast medium injection. Moreover, we report experimental data that confirms the role of needle bevel orientation. The secondary aim is to answer the following questions: Is there significant device contrast medium trapping after contrast medium injection? Is saline flushing efficient? And, finally, is it safe to inject contrast medium through an indwelled port catheter?Results: The experimental results show that in addition to hydrodynamics, temperature is a key parameter for the efficiency of device flushing after contrast medium injection. It appears that this is the case when the cavity is incompletely rinsed after three calibrated flushing volumes of 10 mL saline solution, even by using the Huber needle bevel opposite to the port exit. This leads to a potentially important trapped volume of contrast medium in the port, and consequently to the possibility of subsequent salt precipitates and long term trisubstituted benzene nuclei delivery that might impair the solute properties, which may be further injected via the power port later on.Conclusion: We thus suggest, in TIVADS patients, the use of a temporary supplementary intravenous line rather than the port to perform contrast medium injections in daily radiology routine practice

A gate drive circuit for gate-turn-off (GTO) devices in series stack

International Nuclear Information System (INIS)

Despe, O.

1999-01-01

A gate-turn-off (GTO) switch is under development at the Advanced Photon Source as a replacement for a thyratron switch in high power pulsed application. The high voltage in the application requires multiple GTOs connected in series. One component that is critical to the success of GTO operation is the gate drive circuit. The gate drive circuit has to provide fast high-current pulses to the GTO gate for fast turn-on and turn-off. It also has to be able to operate while floating at high voltage. This paper describes a gate drive circuit that meets these requirements

A time-gated near-infrared spectroscopic imaging device for clinical applications.

Science.gov (United States)

Poulet, Patrick; Uhring, Wilfried; Hanselmann, Walter; Glazenborg, René; Nouizi, Farouk; Zint, Virginie; Hirschi, Werner

2013-03-01

A time-resolved, spectroscopic, diffuse optical tomography device was assembled for clinical applications like brain functional imaging. The entire instrument lies in a unique setup that includes a light source, an ultrafast time-gated intensified camera and all the electronic control units. The light source is composed of four near infrared laser diodes driven by a nanosecond electrical pulse generator working in a sequential mode at a repetition rate of 100 MHz. The light pulses are less than 80 ps FWHM. They are injected in a four-furcated optical fiber ended with a frontal light distributor to obtain a uniform illumination spot directed towards the head of the patient. Photons back-scattered by the subject are detected by the intensified CCD camera. There are resolved according to their time of flight inside the head. The photocathode is powered by an ultrafast generator producing 50 V pulses, at 100 MHz and a width corresponding to a 200 ps FWHM gate. The intensifier has been specially designed for this application. The whole instrument is controlled by an FPGA based module. All the acquisition parameters are configurable via software through an USB plug and the image data are transferred to a PC via an Ethernet link. The compactness of the device makes it a perfect device for bedside clinical applications. The instrument will be described and characterized. Preliminary data recorded on test samples will be presented.

Saline flushing fluids restricting contamination of the near-face zone

Energy Technology Data Exchange (ETDEWEB)

Weil, W

1982-01-01

Questions are covered which concern the characteristics and main properties of saline solutions without solid phase and their use as flushing fluids. Attention is drawn to the fact that these solutions are universally used in flushing and other operations of wells with high gradients of bed pressures, and also in those cases where the oil and gas levels are especially sensitive to negative influence of traditional clay solutions which cause irreversible decrease in permeability of the reservoirs through contamination and plugging of the pores in the near-face zone, and consequently, influence the decrease in bed productivity. The described methods and chemical reagents decrease the filtering of these solutions in the reservoirs, improve viscosity and stabilize the near-face zone.

Power port contrast medium flushing and trapping: impact of temperature, an in vitro experimental study.

Science.gov (United States)

Guiffant, Gérard; Durussel, Jean Jacques; Flaud, Patrice; Royon, Laurent; Marcy, Pierre Yves; Merckx, Jacques

2013-01-01

The use of totally implantable venous access devices (TIVADs) certified as "high pressure resistant" or "power port" has begun to spread worldwide as a safe procedure for power contrast injection. Owing to the thermo-rheological properties of the contrast media, the primary aim of this work is to present an in vitro experimental impact study concerning the impact of the temperature level on flushing efficiency after contrast medium injection. Moreover, we report experimental data that confirms the role of needle bevel orientation. The secondary aim is to answer the following questions: Is there significant device contrast medium trapping after contrast medium injection? Is saline flushing efficient? And, finally, is it safe to inject contrast medium through an indwelled port catheter? The experimental results show that in addition to hydrodynamics, temperature is a key parameter for the efficiency of device flushing after contrast medium injection. It appears that this is the case when the cavity is incompletely rinsed after three calibrated flushing volumes of 10 mL saline solution, even by using the Huber needle bevel opposite to the port exit. This leads to a potentially important trapped volume of contrast medium in the port, and consequently to the possibility of subsequent salt precipitates and long term trisubstituted benzene nuclei delivery that might impair the solute properties, which may be further injected via the power port later on. We thus suggest, in TIVADS patients, the use of a temporary supplementary intravenous line rather than the port to perform contrast medium injections in daily radiology routine practice.

Graphene barristor, a triode device with a gate-controlled Schottky barrier.

Science.gov (United States)

Yang, Heejun; Heo, Jinseong; Park, Seongjun; Song, Hyun Jae; Seo, David H; Byun, Kyung-Eun; Kim, Philip; Yoo, InKyeong; Chung, Hyun-Jong; Kim, Kinam

2012-06-01

Despite several years of research into graphene electronics, sufficient on/off current ratio I(on)/I(off) in graphene transistors with conventional device structures has been impossible to obtain. We report on a three-terminal active device, a graphene variable-barrier "barristor" (GB), in which the key is an atomically sharp interface between graphene and hydrogenated silicon. Large modulation on the device current (on/off ratio of 10(5)) is achieved by adjusting the gate voltage to control the graphene-silicon Schottky barrier. The absence of Fermi-level pinning at the interface allows the barrier's height to be tuned to 0.2 electron volt by adjusting graphene's work function, which results in large shifts of diode threshold voltages. Fabricating GBs on respective 150-mm wafers and combining complementary p- and n-type GBs, we demonstrate inverter and half-adder logic circuits.

Scan direction induced charging dynamics and the application for detection of gate to S/D shorts in logic devices

Science.gov (United States)

Lei, Ming; Tian, Qing; Wu, Kevin; Zhao, Yan

2016-03-01

Gate to source/drain (S/D) short is the most common and detrimental failure mechanism for advanced process technology development in Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET) device manufacturing. Especially for sub-1Xnm nodes, MOSFET device is more vulnerable to gate-S/D shorts due to the aggressive scaling. The detection of this kind of electrical short defect is always challenging for in-line electron beam inspection (EBI), especially new shorting mechanisms on atomic scale due to new material/process flow implementation. The second challenge comes from the characterization of the shorts including identification of the exact shorting location. In this paper, we demonstrate unique scan direction induced charging dynamics (SDCD) phenomenon which stems from the transistor level response from EBI scan at post metal contact chemical-mechanical planarization (CMP) layers. We found that SDCD effect is exceptionally useful for gate-S/D short induced voltage contrast (VC) defect detection, especially for identification of shorting locations. The unique SDCD effect signatures of gate-S/D shorts can be used as fingerprint for ground true shorting defect detection. Correlation with other characterization methods on the same defective location from EBI scan shows consistent results from various shorting mechanism. A practical work flow to implement the application of SDCD effect for in-line EBI monitor of critical gate-S/D short defects is also proposed, together with examples of successful application use cases which mostly focus on static random-access memory (SRAM) array regions. Although the capability of gate-S/D short detection as well as expected device response is limited to passing transistors and pull-down transistors due to the design restriction from standard 6-cell SRAM structure, SDCD effect is proven to be very effective for gate-S/D short induced VC defect detection as well as yield learning for advanced technology development.

Optical XOR gate

Science.gov (United States)

Vawter, G. Allen

2013-11-12

An optical XOR gate is formed as a photonic integrated circuit (PIC) from two sets of optical waveguide devices on a substrate, with each set of the optical waveguide devices including an electroabsorption modulator electrically connected in series with a waveguide photodetector. The optical XOR gate utilizes two digital optical inputs to generate an XOR function digital optical output. The optical XOR gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.

Analytical drain current formulation for gate dielectric engineered dual material gate-gate all around-tunneling field effect transistor

Science.gov (United States)

Madan, Jaya; Gupta, R. S.; Chaujar, Rishu

2015-09-01

In this work, an analytical drain current model for gate dielectric engineered (hetero dielectric)-dual material gate-gate all around tunnel field effect transistor (HD-DMG-GAA-TFET) has been developed. Parabolic approximation has been used to solve the two-dimensional (2D) Poisson equation with appropriate boundary conditions and continuity equations to evaluate analytical expressions for surface potential, electric field, tunneling barrier width and drain current. Further, the analog performance of the device is studied for three high-k dielectrics (Si3N4, HfO2, and ZrO2), and it has been investigated that the problem of lower ION, can be overcome by using the hetero-gate architecture. Moreover, the impact of scaling the gate oxide thickness and bias variations has also been studied. The HD-DMG-GAA-TFET shows an enhanced ION of the order of 10-4 A. The effectiveness of the proposed model is validated by comparing it with ATLAS device simulations.

Quality assurance device for four-dimensional IMRT or SBRT and respiratory gating using patient-specific intrafraction motion kernels.

Science.gov (United States)

Nelms, Benjamin E; Ehler, Eric; Bragg, Henry; Tomé, Wolfgang A

2007-09-17

Emerging technologies such as four-dimensional computed tomography (4D CT) and implanted beacons are expected to allow clinicians to accurately model intrafraction motion and to quantitatively estimate internal target volumes (ITVs) for radiation therapy involving moving targets. In the case of intensity-modulated (IMRT) and stereotactic body radiation therapy (SBRT) delivery, clinicians must consider the interplay between the temporal nature of the modulation and the target motion within the ITV. A need exists for a 4D IMRT/SBRT quality assurance (QA) device that can incorporate and analyze customized intrafraction motion as it relates to dose delivery and respiratory gating. We built a 4D IMRT/SBRT prototype device and entered (X, Y, Z)(T) coordinates representing a motion kernel into a software application that 1. transformed the kernel into beam-specific two-dimensional (2D) motion "projections," 2. previewed the motion in real time, and 3. drove a recision X-Y motorized device that had, atop it, a mounted planar IMRT QA measurement device. The detectors that intersected the target in the beam's-eye-view of any single phase of the breathing cycle (a small subset of all the detectors) were defined as "target detectors" to be analyzed for dose uniformity between multiple fractions. Data regarding the use of this device to quantify dose variation fraction-to-fraction resulting from target motion (for several delivery modalities and with and without gating) have been recently published. A combined software and hardware solution for patient-customized 4D IMRT/SBRT QA is an effective tool for assessing IMRT delivery under conditions of intrafraction motion. The 4D IMRT QA device accurately reproduced the projected motion kernels for all beam's-eye-view motion kernels. This device has been proved to, effectively quantify the degradation in dose uniformity resulting from a moving target within a static planning target volume, and, integrate with a commercial

Quality assurance device for four‐dimensional IMRT or SBRT and respiratory gating using patient‐specific intrafraction motion kernels

Science.gov (United States)

Ehler, Eric; Bragg, Henry; Tomé, Wolfgang A.

2007-01-01

Emerging technologies such as four‐dimensional computed tomography (4D CT) and implanted beacons are expected to allow clinicians to accurately model intrafraction motion and to quantitatively estimate internal target volumes (ITVs) for radiation therapy involving moving targets. In the case of intensity‐modulated (IMRT) and stereotactic body radiation therapy (SBRT) delivery, clinicians must consider the interplay between the temporal nature of the modulation and the target motion within the ITV. A need exists for a 4D IMRT/SBRT quality assurance (QA) device that can incorporate and analyze customized intrafraction motion as it relates to dose delivery and respiratory gating. We built a 4D IMRT/SBRT prototype device and entered (X, Y, Z)(T) coordinates representing a motion kernel into a software application that transformed the kernel into beam‐specific two‐dimensional (2D) motion “projections,”previewed the motion in real time, anddrove a precision X–Y motorized device that had, atop it, a mounted planar IMRT QA measurement device. The detectors that intersected the target in the beam's‐eye‐view of any single phase of the breathing cycle (a small subset of all the detectors) were defined as “target detectors” to be analyzed for dose uniformity between multiple fractions. Data regarding the use of this device to quantify dose variation fraction‐to‐fraction resulting from target motion (for several delivery modalities and with and without gating) have been recently published. A combined software and hardware solution for patient‐customized 4D IMRT/ SBRT QA is an effective tool for assessing IMRT delivery under conditions of intrafraction motion. The 4D IMRT QA device accurately reproduced the projected motion kernels for all beam's‐eye‐view motion kernels. This device has been proved to • effectively quantify the degradation in dose uniformity resulting from a moving target within a static planning target volume, and • integrate

Gating-ML: XML-based gating descriptions in flow cytometry.

Science.gov (United States)

Spidlen, Josef; Leif, Robert C; Moore, Wayne; Roederer, Mario; Brinkman, Ryan R

2008-12-01

The lack of software interoperability with respect to gating due to lack of a standardized mechanism for data exchange has traditionally been a bottleneck, preventing reproducibility of flow cytometry (FCM) data analysis and the usage of multiple analytical tools. To facilitate interoperability among FCM data analysis tools, members of the International Society for the Advancement of Cytometry (ISAC) Data Standards Task Force (DSTF) have developed an XML-based mechanism to formally describe gates (Gating-ML). Gating-ML, an open specification for encoding gating, data transformations and compensation, has been adopted by the ISAC DSTF as a Candidate Recommendation. Gating-ML can facilitate exchange of gating descriptions the same way that FCS facilitated for exchange of raw FCM data. Its adoption will open new collaborative opportunities as well as possibilities for advanced analyses and methods development. The ISAC DSTF is satisfied that the standard addresses the requirements for a gating exchange standard.

Tunable Tribotronic Dual-Gate Logic Devices Based on 2D MoS2 and Black Phosphorus.

Science.gov (United States)

Gao, Guoyun; Wan, Bensong; Liu, Xingqiang; Sun, Qijun; Yang, Xiaonian; Wang, Longfei; Pan, Caofeng; Wang, Zhong Lin

2018-03-01

With the Moore's law hitting the bottleneck of scaling-down in size (below 10 nm), personalized and multifunctional electronics with an integration of 2D materials and self-powering technology emerge as a new direction of scientific research. Here, a tunable tribotronic dual-gate logic device based on a MoS 2 field-effect transistor (FET), a black phosphorus FET and a sliding mode triboelectric nanogenerator (TENG) is reported. The triboelectric potential produced from the TENG can efficiently drive the transistors and logic devices without applying gate voltages. High performance tribotronic transistors are achieved with on/off ratio exceeding 106 and cutoff current below 1 pA μm -1 . Tunable electrical behaviors of the logic device are also realized, including tunable gains (improved to ≈13.8) and power consumptions (≈1 nW). This work offers an active, low-power-consuming, and universal approach to modulate semiconductor devices and logic circuits based on 2D materials with TENG, which can be used in microelectromechanical systems, human-machine interfacing, data processing and transmission. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Gate length variation effect on performance of gate-first self-aligned In₀.₅₃Ga₀.₄₇As MOSFET.

Science.gov (United States)

Mohd Razip Wee, Mohd F; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y

2013-01-01

A multi-gate n-type In₀.₅₃Ga₀.₄₇As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm(2)/Vs are achieved for the gate length and width of 0.2 µm and 30 µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10(-8) A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared.

Gate Length Variation Effect on Performance of Gate-First Self-Aligned In0.53Ga0.47As MOSFET

Science.gov (United States)

Mohd Razip Wee, Mohd F.; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y.

2013-01-01

A multi-gate n-type In0.53Ga0.47As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm2/Vs are achieved for the gate length and width of 0.2 µm and 30µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10−8 A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared. PMID:24367548

Device performance of in situ steam generated gate dielectric nitrided by remote plasma nitridation

International Nuclear Information System (INIS)

Al-Shareef, H. N.; Karamcheti, A.; Luo, T. Y.; Bersuker, G.; Brown, G. A.; Murto, R. W.; Jackson, M. D.; Huff, H. R.; Kraus, P.; Lopes, D.

2001-01-01

In situ steam generated (ISSG) oxides have recently attracted interest for use as gate dielectrics because of their demonstrated reliability improvement over oxides formed by dry oxidation. [G. Minor, G. Xing, H. S. Joo, E. Sanchez, Y. Yokota, C. Chen, D. Lopes, and A. Balakrishna, Electrochem. Soc. Symp. Proc. 99-10, 3 (1999); T. Y. Luo, H. N. Al-Shareef, G. A. Brown, M. Laughery, V. Watt, A. Karamcheti, M. D. Jackson, and H. R. Huff, Proc. SPIE 4181, 220 (2000).] We show in this letter that nitridation of ISSG oxide using a remote plasma decreases the gate leakage current of ISSG oxide by an order of magnitude without significantly degrading transistor performance. In particular, it is shown that the peak normalized transconductance of n-channel devices with an ISSG oxide gate dielectric decreases by only 4% and the normalized drive current by only 3% after remote plasma nitridation (RPN). In addition, it is shown that the reliability of the ISSG oxide exhibits only a small degradation after RPN. These observations suggest that the ISSG/RPN process holds promise for gate dielectric applications. [copyright] 2001 American Institute of Physics

Tunnel field-effect transistor with two gated intrinsic regions

Directory of Open Access Journals (Sweden)

Y. Zhang

2014-07-01

Full Text Available In this paper, we propose and validate (using simulations a novel design of silicon tunnel field-effect transistor (TFET, based on a reverse-biased p+-p-n-n+ structure. 2D device simulation results show that our devices have significant improvements of switching performance compared with more conventional devices based on p-i-n structure. With independent gate voltages applied to two gated intrinsic regions, band-to-band tunneling (BTBT could take place at the p-n junction, and no abrupt degenerate doping profile is required. We developed single-side-gate (SSG structure and double-side-gate (DSG structure. SSG devices with HfO2 gate dielectric have a point subthreshold swing of 9.58 mV/decade, while DSG devices with polysilicon gate electrode material and HfO2 gate dielectric have a point subthreshold swing of 16.39 mV/decade. These DSG devices have ON-current of 0.255 μA/μm, while that is lower for SSG devices. Having two nano-scale independent gates will be quite challenging to realize with good uniformity across the wafer and the improved behavior of our TFET makes it a promising steep-slope switch candidate for further investigations.

Data processing correction of the irising effect of a fast-gating intensified charge-coupled device on laser-pulse-excited luminescence spectra.

Science.gov (United States)

Ondic, L; Dohnalová, K; Pelant, I; Zídek, K; de Boer, W D A M

2010-06-01

Intensified charge-coupled devices (ICCDs) comprise the advantages of both fast gating detectors and spectrally broad CCDs into one device that enables temporally and spectrally resolved measurements with a few nanosecond resolution. Gating of the measured signal occurs in the image intensifier tube, where a high voltage is applied between the detector photocathode and a microchannel plate electron multiplier. An issue arises in time-resolved luminescence spectroscopy when signal onset characterization is required. In this case, the transient gate closing process that causes the detected signal always arises in the middle of the ICCD chip regardless of the spectral detection window--the so-called irising effect. We demonstrate that in case when the detection gate width is comparable to the opening/closing time and the gate is pretriggered with respect to the signal onset, the irising effect causes the obtained data to be strongly distorted. At the same time, we propose a software procedure that leads to the spectral correction of the irising effect and demonstrate its validity on the distorted data.

46 CFR 194.20-11 - Flushing systems.

Science.gov (United States)

2010-10-01

... 46 Shipping 7 2010-10-01 2010-10-01 false Flushing systems. 194.20-11 Section 194.20-11 Shipping... Flushing systems. (a) Provision shall be made for flushing away chemical spills. (b) If a drainage system is installed, it shall be separate from any other drainage system. ...

Time-Gating Processes in Intra-Cavity Mode-Locking Devices Like Saturable Absorbers and Kerr Cells

Science.gov (United States)

Prasad, Narasimha; Roychoudhuri, Chandrasekhar

2010-01-01

Photons are non-interacting entities. Light beams do not interfere by themselves. Light beams constituting different laser modes (frequencies) are not capable of re-arranging their energies from extended time-domain to ultra-short time-domain by themselves without the aid of light-matter interactions with suitable intra-cavity devices. In this paper we will discuss the time-gating properties of intra-cavity "mode-locking" devices that actually help generate a regular train of high energy wave packets.

Oligo- and polymeric FET devices: Thiophene-based active materials and their interaction with different gate dielectrics

International Nuclear Information System (INIS)

Porzio, W.; Destri, S.; Pasini, M.; Bolognesi, A.; Angiulli, A.; Di Gianvincenzo, P.; Natali, D.; Sampietro, M.; Caironi, M.; Fumagalli, L.; Ferrari, S.; Peron, E.; Perissinotti, F.

2006-01-01

Derivatives of both oligo- and polythiophene-based FET were recently considered for low cost electronic applications. In the device optimization, factors like redox reversibility of the molecule/polymer, electronic level compatibility with source/drain electrodes, packing closeness, and orientation versus the electrodes, can determine the overall performance. In addition, a gate insulator with a high dielectric constant, a low leakage current, and capability to promote ordering in the semiconductor is required to increase device performances and to lower the FET operating voltage. In this view, Al 2 O 3 appears a good candidate, although its widespread adoption is limited by the disorder that such oxide induces on the semiconductor with detrimental consequences on semiconductor electrical properties. In this contribution, an overview of recent results obtained on thiophene-derivative-based FET devices, fabricated by different growth techniques, and using both thermally grown SiO 2 and Al 2 O 3 from atomic layer deposition gate insulators will be reported and discussed with particular reference to organic solid state aggregation, morphology, and organic-inorganic interface

Active Thermal Control for Reliability Improvement of MOS-gated Power Devices

DEFF Research Database (Denmark)

Soldati, Alessandro; Concari, Carlo; Dossena, Fabrizio

2017-01-01

reliability and lifetime. These figures can then be improved, which eases the adoption of electrification in markets, such as transportation, where they are still below target values. The proposed ATC method leaves electric load parameters untouched, while acting dynamically on gate parameters, namely voltage...... and resistance. A model-predictive control (MPC) strategy is used to determine the most suitable parameters to use. Simulations of the control scheme are presented first, to predict the potential benefits on temperature swing amplitude, and the consequent improvements in terms of device lifetime are inferred...

Silicon photonic crystal all-optical logic gates

Energy Technology Data Exchange (ETDEWEB)

Fu, Yulan [State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871 (China); Hu, Xiaoyong, E-mail: xiaoyonghu@pku.edu.cn [State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871 (China); Gong, Qihuang, E-mail: qhgong@pku.edu.cn [State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871 (China)

2013-01-03

All-optical logic gates, including OR, XOR, NOT, XNOR, and NAND gates, are realized theoretically in a two-dimensional silicon photonic crystal using the light beam interference effect. The ingenious photonic crystal waveguide component design, the precisely controlled optical path difference, and the elaborate device configuration ensure the simultaneous realization of five types of logic gate with low-power and a contrast ratio between the logic states of “1” and “0” as high as 20 dB. High power is not necessary for operation of these logic gate devices. This offers a simple and effective approach for the realization of integrated all-optical logic devices.

Mechanical characteristics of plastic base Ports and impact on flushing efficacy.

Science.gov (United States)

Guiffant, Gérard; Flaud, Patrice; Royon, Laurent; Burnet, Espérie; Merckx, Jacques

2017-01-01

Three types of totally implantable venous access devices, Ports, are currently in use: titanium, plastic (polyoxymethylene, POM), and mixed (titanium base with a POM shell). Physics theory suggests that the interaction between a non-coring needle (NCN, made of stainless steel) and a plastic base would lead to the stronger material (steel) altering the more malleable material (plastic). To investigate whether needle impacts can alter a plastic base's surface, thus potentially reducing flushing efficacy. A Port made of POM was punctured 200 times with a 19-gauge NCN. Following the existing guidelines, the needle tip pricked the base with each puncture. The Port's base was then examined using a two-dimensional optical instrument, and a bi-dimensional numerical simulation using COMSOL ® was performed to investigate potential surface irregularities and their impact on fluid flow. Each needle impact created a hole (mean depth, 0.12 mm) with a small bump beside it (mean height, 0.02 mm) the Reynolds number Re k ≈10. A numerical simulation of the one hole/bump set showed that the flushing efficacy was 60% that of flushing along a flat surface. In clinical practice, the number of times a Port is punctured depends on patient and treatment characteristics, but each needle impact on the plastic base may increase the risk of decreased flushing effectiveness. Therefore, the more a plastic Port is accessed, the greater the risk of microorganisms, blood products, and medication accumulation. Multiple needle impacts created an irregular surface on the Port's base, which decreased flushing efficacy. Clinical investigation is needed to determine whether plastic base Ports are associated with an increased risk of Port infection and occlusion compared to titanium base Ports.

Multiplexed charge-locking device for large arrays of quantum devices

Energy Technology Data Exchange (ETDEWEB)

Puddy, R. K., E-mail: rkp27@cam.ac.uk; Smith, L. W; Chong, C. H.; Farrer, I.; Griffiths, J. P.; Ritchie, D. A.; Smith, C. G. [Cavendish Laboratory, University of Cambridge, Cambridge CB3 0HE (United Kingdom); Al-Taie, H.; Kelly, M. J. [Cavendish Laboratory, University of Cambridge, Cambridge CB3 0HE (United Kingdom); Centre for Advanced Photonics and Electronics, Electrical Engineering Division, Department of Engineering, 9 J. J. Thomson Avenue, University of Cambridge, Cambridge CB3 0FA (United Kingdom); Pepper, M. [Department of Electronic and Electrical Engineering, University College London, WC1E 7JE (United Kingdom)

2015-10-05

We present a method of forming and controlling large arrays of gate-defined quantum devices. The method uses an on-chip, multiplexed charge-locking system and helps to overcome the restraints imposed by the number of wires available in cryostat measurement systems. The device architecture that we describe here utilises a multiplexer-type scheme to lock charge onto gate electrodes. The design allows access to and control of gates whose total number exceeds that of the available electrical contacts and enables the formation, modulation and measurement of large arrays of quantum devices. We fabricate such devices on n-type GaAs/AlGaAs substrates and investigate the stability of the charge locked on to the gates. Proof-of-concept is shown by measurement of the Coulomb blockade peaks of a single quantum dot formed by a floating gate in the device. The floating gate is seen to drift by approximately one Coulomb oscillation per hour.

Heavy-ion-induced, gate-rupture in power MOSFETs

International Nuclear Information System (INIS)

Fischer, T.A.

1987-01-01

A new, heavy-ion-induced, burnout mechanism has been experimentally observed in power metal-oxide-semiconductor field-effect transistors (MOSFETs). This mechanism occurs when a heavy, charged particle passes through the gate oxide region of n- or p-channel devices having sufficient gate-to-source or gate-to-drain bias. The gate-rupture leads to significant permanent degradation of the device. A proposed failure mechanism is discussed and experimentally verified. In addition, the absolute immunity of p-channel devices to heavy-ion-induced, semiconductor burnout is demonstrated and discussed along with new, non-destructive, burnout testing methods

Near-thermal limit gating in heavily doped III-V semiconductor nanowires using polymer electrolytes

Science.gov (United States)

Ullah, A. R.; Carrad, D. J.; Krogstrup, P.; Nygârd, J.; Micolich, A. P.

2018-02-01

Doping is a common route to reducing nanowire transistor on-resistance but it has limits. A high doping level gives significant loss in gate performance and ultimately complete gate failure. We show that electrolyte gating remains effective even when the Be doping in our GaAs nanowires is so high that traditional metal-oxide gates fail. In this regime we obtain a combination of subthreshold swing and contact resistance that surpasses the best existing p -type nanowire metal-oxide semiconductor field-effect transistors (MOSFETs). Our subthreshold swing of 75 mV/dec is within 25 % of the room-temperature thermal limit and comparable with n -InP and n -GaAs nanowire MOSFETs. Our results open a new path to extending the performance and application of nanowire transistors, and motivate further work on improved solid electrolytes for nanoscale device applications.

C-V characterization of Schottky- and MIS-gate SiGe/Si HEMT structures

International Nuclear Information System (INIS)

Onojima, Norio; Kasamatsu, Akihumi; Hirose, Nobumitsu; Mimura, Takashi; Matsui, Toshiaki

2008-01-01

Electrical properties of Schottky- and metal-insulator-semiconductor (MIS)-gate SiGe/Si high electron mobility transistors (HEMTs) were investigated with capacitance-voltage (C-V) measurements. The MIS-gate HEMT structure was fabricated using a SiN gate insulator formed by catalytic chemical vapor deposition (Cat-CVD). The Cat-CVD SiN thin film (5 nm) was found to be an effective gate insulator with good gate controllability and dielectric properties. We previously investigated device characteristics of sub-100-nm-gate-length Schottky- and MIS-gate HEMTs, and reported that the MIS-gate device had larger maximum drain current density and transconductance (g m ) than the Schottky-gate device. The radio frequency (RF) measurement of the MIS-gate device, however, showed a relatively lower current gain cutoff frequency f T compared with that of the Schottky-gate device. In this study, C-V characterization of the MIS-gate HEMT structure demonstrated that two electron transport channels existed, one at the SiGe/Si buried channel and the other at the SiN/Si surface channel

C-V characterization of Schottky- and MIS-gate SiGe/Si HEMT structures

Energy Technology Data Exchange (ETDEWEB)

Onojima, Norio [National Institute of Information and Communications Technology (NICT), Koganei, Tokyo 184-8795 (Japan)], E-mail: nonojima@nict.go.jp; Kasamatsu, Akihumi; Hirose, Nobumitsu [National Institute of Information and Communications Technology (NICT), Koganei, Tokyo 184-8795 (Japan); Mimura, Takashi [National Institute of Information and Communications Technology (NICT), Koganei, Tokyo 184-8795 (Japan); Fujitsu Laboratories Ltd., Atsugi, Kanagawa 243-0197 (Japan); Matsui, Toshiaki [National Institute of Information and Communications Technology (NICT), Koganei, Tokyo 184-8795 (Japan)

2008-07-30

Electrical properties of Schottky- and metal-insulator-semiconductor (MIS)-gate SiGe/Si high electron mobility transistors (HEMTs) were investigated with capacitance-voltage (C-V) measurements. The MIS-gate HEMT structure was fabricated using a SiN gate insulator formed by catalytic chemical vapor deposition (Cat-CVD). The Cat-CVD SiN thin film (5 nm) was found to be an effective gate insulator with good gate controllability and dielectric properties. We previously investigated device characteristics of sub-100-nm-gate-length Schottky- and MIS-gate HEMTs, and reported that the MIS-gate device had larger maximum drain current density and transconductance (g{sub m}) than the Schottky-gate device. The radio frequency (RF) measurement of the MIS-gate device, however, showed a relatively lower current gain cutoff frequency f{sub T} compared with that of the Schottky-gate device. In this study, C-V characterization of the MIS-gate HEMT structure demonstrated that two electron transport channels existed, one at the SiGe/Si buried channel and the other at the SiN/Si surface channel.

Automatic Flushing Unit With Cleanliness Monitor

Science.gov (United States)

Hildebrandt, N. E.

1982-01-01

Liquid-level probe kept clean, therefore at peak accuracy, by unit that flushes probe with solvent, monitors effluent for contamination, and determines probe is particle-free. Approach may be adaptable to industrial cleaning such as flushing filters and pipes, and ensuring that manufactured parts have been adequately cleaned.

Mechanical characteristics of plastic base Ports and impact on flushing efficacy

Directory of Open Access Journals (Sweden)

Guiffant G

2017-01-01

Full Text Available Gérard Guiffant,1 Patrice Flaud,1 Laurent Royon,1 Espérie Burnet,2 Jacques Merckx1–3 1University Paris Diderot, Biofluidic Group, UMR CNRS, 2Pulmonary Department and Adult Cystic Fibrosis Centre, Cochin Hospital, 3University Teaching Hospital, Necker-Enfants Malades, Paris, France Background: Three types of totally implantable venous access devices, Ports, are currently in use: titanium, plastic (polyoxymethylene, POM, and mixed (titanium base with a POM shell. Physics theory suggests that the interaction between a non-coring needle (NCN, made of stainless steel and a plastic base would lead to the stronger material (steel altering the more malleable material (plastic. Objectives: To investigate whether needle impacts can alter a plastic base’s surface, thus potentially reducing flushing efficacy. Study design and methods: A Port made of POM was punctured 200 times with a 19-gauge NCN. Following the existing guidelines, the needle tip pricked the base with each puncture. The Port’s base was then examined using a two-dimensional optical instrument, and a bi-dimensional numerical simulation using COMSOL® was performed to investigate potential surface irregularities and their impact on fluid flow. Results: Each needle impact created a hole (mean depth, 0.12 mm with a small bump beside it (mean height, 0.02 mm the Reynolds number Rek≈10. A numerical simulation of the one hole/bump set showed that the flushing efficacy was 60% that of flushing along a flat surface. Discussion: In clinical practice, the number of times a Port is punctured depends on patient and treatment characteristics, but each needle impact on the plastic base may increase the risk of decreased flushing effectiveness. Therefore, the more a plastic Port is accessed, the greater the risk of microorganisms, blood products, and medication accumulation. Conclusions: Multiple needle impacts created an irregular surface on the Port’s base, which decreased flushing efficacy

SU-E-T-403: Evaluation of the Beam Performance of a Varian TrueBeam Linear Accelerator Under External Device-Based Gated Delivery Conditions

International Nuclear Information System (INIS)

Kobulnicky, K; Pawlak, D; Purwar, A

2015-01-01

Purpose: To examine the beam performance of a Varian TrueBeam linear accelerator under external device-based gated delivery conditions. Methods: Six gating cycles were used to evaluate the gating performance of a standard production TrueBeam system that was not specially tuned in any way. The system was equipped with a factory installed external gating interface (EXGI). An in-house EXGI tester box was used to simulate the input gating signals. The gating cycles were selected based on long beam-on and short beam-off times, short beam-on and long beam-off times, or equal beam on and off times to check linac performance. The beam latencies were measured as the time difference between the logic high gating signal and the first or last target pulses with an oscilloscope. Tissue-Phantom Ratio, beam flatness, and dose distributions from 5 different plans were measured using the 6 different gating durations and the un-gated irradiation. A PTW 729 2-D array was used to compare 5 plans versus the un-gated delivery with a 1%/1mm gamma index passing criteria. Results: The beam latencies of the linac were based off of 20 samples for beam-on and beam-off, for each gating cycle. The average beam-on delays were measured to be between 57 and 66msec, with a maximum of 88 msec. The beam off latencies averaged between 19 and 26msec, with a maximum of 48 msec. TPR20,10 measurements showed beam energy stability within 0.5% of the un-gated delivery. Beam flatness was better than 2.5% for all gated cycles. All but two deliveries, the open field with 4 seconds on, 1 second off, and a five field IMRT plan with 0.5 seconds on, 2.5 seconds off, had >90% passing rate. Conclusion: TrueBeam demonstrates excellent beam stability with minimal beam latencies under external device-based gated operations. Dosimetric measurements show minimal variation in beam energy, flatness, and plan delivery. Authors are employees of Varian Medical Systems, Inc

SU-E-T-403: Evaluation of the Beam Performance of a Varian TrueBeam Linear Accelerator Under External Device-Based Gated Delivery Conditions

Energy Technology Data Exchange (ETDEWEB)

Kobulnicky, K; Pawlak, D; Purwar, A [Varian Medical Systems, Inc., Palo Alto, CA (United States)

2015-06-15

Purpose: To examine the beam performance of a Varian TrueBeam linear accelerator under external device-based gated delivery conditions. Methods: Six gating cycles were used to evaluate the gating performance of a standard production TrueBeam system that was not specially tuned in any way. The system was equipped with a factory installed external gating interface (EXGI). An in-house EXGI tester box was used to simulate the input gating signals. The gating cycles were selected based on long beam-on and short beam-off times, short beam-on and long beam-off times, or equal beam on and off times to check linac performance. The beam latencies were measured as the time difference between the logic high gating signal and the first or last target pulses with an oscilloscope. Tissue-Phantom Ratio, beam flatness, and dose distributions from 5 different plans were measured using the 6 different gating durations and the un-gated irradiation. A PTW 729 2-D array was used to compare 5 plans versus the un-gated delivery with a 1%/1mm gamma index passing criteria. Results: The beam latencies of the linac were based off of 20 samples for beam-on and beam-off, for each gating cycle. The average beam-on delays were measured to be between 57 and 66msec, with a maximum of 88 msec. The beam off latencies averaged between 19 and 26msec, with a maximum of 48 msec. TPR20,10 measurements showed beam energy stability within 0.5% of the un-gated delivery. Beam flatness was better than 2.5% for all gated cycles. All but two deliveries, the open field with 4 seconds on, 1 second off, and a five field IMRT plan with 0.5 seconds on, 2.5 seconds off, had >90% passing rate. Conclusion: TrueBeam demonstrates excellent beam stability with minimal beam latencies under external device-based gated operations. Dosimetric measurements show minimal variation in beam energy, flatness, and plan delivery. Authors are employees of Varian Medical Systems, Inc.

Synthesizing biomolecule-based Boolean logic gates.

Science.gov (United States)

Miyamoto, Takafumi; Razavi, Shiva; DeRose, Robert; Inoue, Takanari

2013-02-15

One fascinating recent avenue of study in the field of synthetic biology is the creation of biomolecule-based computers. The main components of a computing device consist of an arithmetic logic unit, the control unit, memory, and the input and output devices. Boolean logic gates are at the core of the operational machinery of these parts, and hence to make biocomputers a reality, biomolecular logic gates become a necessity. Indeed, with the advent of more sophisticated biological tools, both nucleic acid- and protein-based logic systems have been generated. These devices function in the context of either test tubes or living cells and yield highly specific outputs given a set of inputs. In this review, we discuss various types of biomolecular logic gates that have been synthesized, with particular emphasis on recent developments that promise increased complexity of logic gate circuitry, improved computational speed, and potential clinical applications.

Synthesizing Biomolecule-based Boolean Logic Gates

Science.gov (United States)

Miyamoto, Takafumi; Razavi, Shiva; DeRose, Robert; Inoue, Takanari

2012-01-01

One fascinating recent avenue of study in the field of synthetic biology is the creation of biomolecule-based computers. The main components of a computing device consist of an arithmetic logic unit, the control unit, memory, and the input and output devices. Boolean logic gates are at the core of the operational machinery of these parts, hence to make biocomputers a reality, biomolecular logic gates become a necessity. Indeed, with the advent of more sophisticated biological tools, both nucleic acid- and protein-based logic systems have been generated. These devices function in the context of either test tubes or living cells and yield highly specific outputs given a set of inputs. In this review, we discuss various types of biomolecular logic gates that have been synthesized, with particular emphasis on recent developments that promise increased complexity of logic gate circuitry, improved computational speed, and potential clinical applications. PMID:23526588

A novel optical gating method for laser gated imaging

Science.gov (United States)

Ginat, Ran; Schneider, Ron; Zohar, Eyal; Nesher, Ofer

2013-06-01

For the past 15 years, Elbit Systems is developing time-resolved active laser-gated imaging (LGI) systems for various applications. Traditional LGI systems are based on high sensitive gated sensors, synchronized to pulsed laser sources. Elbit propriety multi-pulse per frame method, which is being implemented in LGI systems, improves significantly the imaging quality. A significant characteristic of the LGI is its ability to penetrate a disturbing media, such as rain, haze and some fog types. Current LGI systems are based on image intensifier (II) sensors, limiting the system in spectral response, image quality, reliability and cost. A novel propriety optical gating module was developed in Elbit, untying the dependency of LGI system on II. The optical gating module is not bounded to the radiance wavelength and positioned between the system optics and the sensor. This optical gating method supports the use of conventional solid state sensors. By selecting the appropriate solid state sensor, the new LGI systems can operate at any desired wavelength. In this paper we present the new gating method characteristics, performance and its advantages over the II gating method. The use of the gated imaging systems is described in a variety of applications, including results from latest field experiments.

Dual material gate doping-less tunnel FET with hetero gate dielectric for enhancement of analog/RF performance

Science.gov (United States)

Anand, Sunny; Sarin, R. K.

2017-02-01

In this paper, charge-plasma-based tunnel FET is proposed by employing dual material gate with hetero gate dielectric technique and it is named hetero-dielectric dual material gate doping-less TFET (HD_DMG_DLTFET). It is compared with conventional doping-less TFET (DLTFET) and dual material gate doping-less TFET (DMG_DLTFET) on the basis of analog and RF performance. The HD_DMG_DLTFET provides better ON state current ({I}\\text{ON}=94 μ \\text{A}/μ \\text{m}), {I}\\text{ON}/{I}\\text{OFF}(≈ 1.36× {10}13), \\text{point} (≈ 3\\text{mV}/\\text{dec}) and average subthreshold slope (\\text{AV}-\\text{SS}=40.40 \\text{mV}/\\text{dec}). The proposed device offers low total gate capacitance (C gg) along with higher drive current. However, with a better transconductance (g m) and cut-off frequency (f T), the HD_DMG_DLTFET can be a good candidate for RF circuitry. The early voltage (V EA) and output conductance (g d) are also moderate for the proposed device with comparison to other devices and therefore can be a candidate for analog devices. From all these simulation results and their study, it is observed that HD_DMG_DLTFET has improved analog/RF performance compared to DLTFET and DMG_DLTFET.

A Novel Multi-Finger Gate Structure of AlGaN/GaN High Electron Mobility Transistor

International Nuclear Information System (INIS)

Cui Lei; Wang Quan; Wang Xiao-Liang; Xiao Hong-Ling; Wang Cui-Mei; Jiang Li-Juan; Feng Chun; Yin Hai-Bo; Gong Jia-Min; Li Bai-Quan; Wang Zhan-Guo

2015-01-01

A novel multi-finger gate high electron mobility transistor (HEMT) is designed to reduce the peak electric field value at the drain-side gate edge when the device is at off-state. The effective gate length (L_e_f_f) of the multi-finger gate device is smaller than that of the field plate gate device. In this work, field plate gate, five-finger gate and ten-finger gate devices are simulated. The results of the simulation indicate that the multi-finger gate device has a lower peak value than the device with the gate field plate. Moreover, this value would be further reduced when the number of gate fingers is increased. In addition, it has the potential to make the HEMT work in a higher frequency since it has a lower effective length of gate. (paper)

Micro-mechanical resonators for dynamically reconfigurable reduced voltage logic gates

Science.gov (United States)

Chappanda, K. N.; Ilyas, S.; Younis, M. I.

2018-05-01

Due to the limitations of transistor-based logic devices such as their poor performance at elevated temperature, alternative computing methods are being actively investigated. In this work, we present electromechanical logic gates using electrostatically coupled in-plane micro-cantilever resonators operated at modest vacuum conditions of 5 Torr. Operating in the first resonant mode, we demonstrate 2-bit XOR, 2- and 3-bit AND, 2- and 3-bit NOR, and 1-bit NOT gates; all condensed in the same device. Through the designed electrostatic coupling, the required voltage for the logic gates is reduced by 80%, along with the reduction in the number of electrical interconnects and devices per logic operation (contrary to transistors). The device is dynamically reconfigurable between any logic gates in real time without the need for any change in the electrical interconnects and the drive circuit. By operating in the first two resonant vibration modes, we demonstrate mechanical logic gates consisting of two 2-bit AND and two 2-bit XOR gates. The device is tested at elevated temperatures and is shown to be functional as a logic gate up to 150 °C. Also, the device has high reliability with demonstrated lifetime greater than 5  ×  1012 oscillations.

Micro-mechanical resonators for dynamically reconfigurable reduced voltage logic gates

KAUST Repository

Chappanda, K N

2018-02-16

Due to the limitations of transistor-based logic devices such as their poor performance at elevated temperature, alternative computing methods are being actively investigated. In this work, we present electromechanical logic gates using electrostatically coupled in-plane micro-cantilever resonators operated at modest vacuum conditions of 5 Torr. Operating in the first resonant mode, we demonstrate 2-bit XOR, 2- and 3-bit AND, 2- and 3-bit NOR, and 1-bit NOT gates; all condensed in the same device. Through the designed electrostatic coupling, the required voltage for the logic gates is reduced by 80%, along with the reduction in the number of electrical interconnects and devices per logic operation (contrary to transistors). The device is dynamically reconfigurable between any logic gates in real time without the need for any change in the electrical interconnects and the drive circuit. By operating in the first two resonant vibration modes, we demonstrate mechanical logic gates consisting of two 2-bit AND and two 2-bit XOR gates. The device is tested at elevated temperatures and is shown to be functional as a logic gate up to 150 °C. Also, the device has high reliability with demonstrated lifetime greater than 5 × 10 oscillations.

Micro-mechanical resonators for dynamically reconfigurable reduced voltage logic gates

KAUST Repository

Chappanda , K. N.; Ilyas, Saad; Younis, Mohammad I.

2018-01-01

Due to the limitations of transistor-based logic devices such as their poor performance at elevated temperature, alternative computing methods are being actively investigated. In this work, we present electromechanical logic gates using electrostatically coupled in-plane micro-cantilever resonators operated at modest vacuum conditions of 5 Torr. Operating in the first resonant mode, we demonstrate 2-bit XOR, 2- and 3-bit AND, 2- and 3-bit NOR, and 1-bit NOT gates; all condensed in the same device. Through the designed electrostatic coupling, the required voltage for the logic gates is reduced by 80%, along with the reduction in the number of electrical interconnects and devices per logic operation (contrary to transistors). The device is dynamically reconfigurable between any logic gates in real time without the need for any change in the electrical interconnects and the drive circuit. By operating in the first two resonant vibration modes, we demonstrate mechanical logic gates consisting of two 2-bit AND and two 2-bit XOR gates. The device is tested at elevated temperatures and is shown to be functional as a logic gate up to 150 °C. Also, the device has high reliability with demonstrated lifetime greater than 5 × 10 oscillations.

Comprehensive Study of Lanthanum Aluminate High-Dielectric-Constant Gate Oxides for Advanced CMOS Devices

Directory of Open Access Journals (Sweden)

Masamichi Suzuki

2012-03-01

Full Text Available A comprehensive study of the electrical and physical characteristics of Lanthanum Aluminate (LaAlO3 high-dielectric-constant gate oxides for advanced CMOS devices was performed. The most distinctive feature of LaAlO3 as compared with Hf-based high-k materials is the thermal stability at the interface with Si, which suppresses the formation of a low-permittivity Si oxide interfacial layer. Careful selection of the film deposition conditions has enabled successful deposition of an LaAlO3 gate dielectric film with an equivalent oxide thickness (EOT of 0.31 nm. Direct contact with Si has been revealed to cause significant tensile strain to the Si in the interface region. The high stability of the effective work function with respect to the annealing conditions has been demonstrated through comparison with Hf-based dielectrics. It has also been shown that the effective work function can be tuned over a wide range by controlling the La/(La + Al atomic ratio. In addition, gate-first n-MOSFETs with ultrathin EOT that use sulfur-implanted Schottky source/drain technology have been fabricated using a low-temperature process.

The effect of TCM acupuncture on hot flushes among menopausal women (ACUFLASH study: A study protocol of an ongoing multi-centre randomised controlled clinical trial

Directory of Open Access Journals (Sweden)

Borud Einar K

2007-02-01

Full Text Available Abstract Background After menopause, 10–20% of all women have nearly intolerable hot flushes. Long term use of hormone replacement therapy involves a health risk, and many women seek alternative strategies to relieve climacteric complaints. Acupuncture is one of the most frequently used complementary therapies in Norway. We designed a study to evaluate whether Traditional Chinese Medicine acupuncture-care together with self-care is more effective than self-care alone to relieve climacteric complaints. Methods/Design The study is a multi-centre pragmatic randomised controlled trial with two parallel arms. Participants are postmenopausal women who document ≥7 flushes/24 hours and who are not using hormone replacement therapy or other medication that may influence flushes. According to power calculations 200 women are needed to detect a 50% reduction in flushes, and altogether 286 women will be recruited to allow for a 30% dropout rate. The treatment group receives 10 sessions of Traditional Chinese Medicine acupuncture-care and self-care; the control group will engage in self-care only. A team of experienced Traditional Chinese Medicine acupuncturists give acupuncture treatments. Discussion The study tests acupuncture as a complete treatment package including the therapeutic relationship and expectation. The intervention period lasts for 12 weeks, with follow up at 6 and 12 months. Primary endpoint is change in daily hot flush frequency in the two groups from baseline to 12 weeks; secondary endpoint is health related quality of life, assessed by the Women's Health Questionnaire. We also collect data on Traditional Chinese Medicine diagnoses, and we examine treatment experiences using a qualitative approach. Finally we measure biological variables, to examine potential mechanisms for the effect of acupuncture. The study is funded by The Research Council of Norway.

Simultaneous control of thermoelectric properties in p- and n-type materials by electric double-layer gating: New design for thermoelectric device

Science.gov (United States)

Takayanagi, Ryohei; Fujii, Takenori; Asamitsu, Atsushi

2015-05-01

We report a novel design of a thermoelectric device that can control the thermoelectric properties of p- and n-type materials simultaneously by electric double-layer gating. Here, p-type Cu2O and n-type ZnO were used as the positive and negative electrodes of the electric double-layer capacitor structure. When a gate voltage was applied between the two electrodes, holes and electrons accumulated on the surfaces of Cu2O and ZnO, respectively. The thermopower was measured by applying a thermal gradient along the accumulated layer on the electrodes. We demonstrate here that the accumulated layers worked as a p-n pair of the thermoelectric device.

Social meaning of alcohol-related flushing among university students in China.

Science.gov (United States)

Newman, Ian M; Jinnai, Izumi; Zhao, Jie; Huang, Zhaoqing; Pu, Jia; Qian, Ling

2013-09-01

This study explored drinking patterns, alcohol-related flushing, and ways students themselves and other people respond to flushing in drinking situations. Of 1080 Chinese undergraduate university students given the survey questionnaire, 725 (67.1%) returned the completed surveys. Eighty percent of the students were drinkers (93% of males and 69% of females); 68% of the drinkers were flushers. Most of the students (59.3%) said flushing had no special meaning, that is, would ignore flushing; 54% of the flushers said they could keep drinking "but less" when they flush; 27% of the students said that a flushing person should stop drinking; however, if the flushing person is a girl, 89% of the students said the girl should drink less or stop. If the flushing person was a boy, 61% of students said he should drink less or stop. The data do suggest gender differences in the understanding of and social reaction to alcohol-related flushing, and these differences raise interesting questions as to how flushing acts as a potential protective factor against alcohol misuse.

ISAC's Gating-ML 2.0 data exchange standard for gating description.

Science.gov (United States)

Spidlen, Josef; Moore, Wayne; Brinkman, Ryan R

2015-07-01

The lack of software interoperability with respect to gating has traditionally been a bottleneck preventing the use of multiple analytical tools and reproducibility of flow cytometry data analysis by independent parties. To address this issue, ISAC developed Gating-ML, a computer file format to encode and interchange gates. Gating-ML 1.5 was adopted and published as an ISAC Candidate Recommendation in 2008. Feedback during the probationary period from implementors, including major commercial software companies, instrument vendors, and the wider community, has led to a streamlined Gating-ML 2.0. Gating-ML has been significantly simplified and therefore easier to support by software tools. To aid developers, free, open source reference implementations, compliance tests, and detailed examples are provided to stimulate further commercial adoption. ISAC has approved Gating-ML as a standard ready for deployment in the public domain and encourages its support within the community as it is at a mature stage of development having undergone extensive review and testing, under both theoretical and practical conditions. © 2015 International Society for Advancement of Cytometry.

Design of Higher-k and More Stable Rare Earth Oxides as Gate Dielectrics for Advanced CMOS Devices

Directory of Open Access Journals (Sweden)

Yi Zhao

2012-08-01

Full Text Available High permittivity (k gate dielectric films are widely studied to substitute SiO₂ as gate oxides to suppress the unacceptable gate leakage current when the traditional SiO₂ gate oxide becomes ultrathin. For high-k gate oxides, several material properties are dominantly important. The first one, undoubtedly, is permittivity. It has been well studied by many groups in terms of how to obtain a higher permittivity for popular high-k oxides, like HfO₂ and La₂O₃. The second one is crystallization behavior. Although it’s still under the debate whether an amorphous film is definitely better than ploy-crystallized oxide film as a gate oxide upon considering the crystal boundaries induced leakage current, the crystallization behavior should be well understood for a high-k gate oxide because it could also, to some degree, determine the permittivity of the high-k oxide. Finally, some high-k gate oxides, especially rare earth oxides (like La₂O₃, are not stable in air and very hygroscopic, forming hydroxide. This topic has been well investigated in over the years and significant progresses have been achieved. In this paper, I will intensively review the most recent progresses of the experimental and theoretical studies for preparing higher-k and more stable, in terms of hygroscopic tolerance and crystallization behavior, Hf- and La-based ternary high-k gate oxides.

Synchrotron X-ray irradiation effects on the device characteristics and the resistance to hot-carrier damage of MOSFETs with 4 nm thick gate oxides

International Nuclear Information System (INIS)

Tanaka, Yuusuke; Tanabe, Akira; Suzuki, Katsumi

1998-01-01

The effects of synchrotron x-ray irradiation on the device characteristics and hot-carrier resistance of n- and p-channel metal oxide semiconductor field effect transistors (MOSFETs) with 4 nm thick gate oxides are investigated. In p-channel MOSFETs, device characteristics were significantly affected by the x-ray irradiation but completely recovered after annealing, while the device characteristics in n-channel MOSFETs were not noticeably affected by the irradiation. This difference appears to be due to a difference in interface-state generation. In p-channel MOSFETs, defects caused by boron-ion penetration through the gate oxides may be sensitive to x-ray irradiation, causing the generation of many interface states. These interface states are completely eliminated after annealing in hydrogen gas. The effects of irradiation on the resistance to hot-carrier degradation in annealed 4 nm thick gate-oxide MOSFETs were negligible even at an x-ray dose of 6,000 mJ/cm 2

Ballistic transport of graphene pnp junctions with embedded local gates

International Nuclear Information System (INIS)

Nam, Seung-Geol; Ki, Dong-Keun; Kim, Youngwook; Kim, Jun Sung; Lee, Hu-Jong; Park, Jong Wan

2011-01-01

We fabricated graphene pnp devices, by embedding pre-defined local gates in an oxidized surface layer of a silicon substrate. With neither deposition of dielectric material on the graphene nor electron-beam irradiation, we obtained high-quality graphene pnp devices without degradation of the carrier mobility even in the local-gate region. The corresponding increased mean free path leads to the observation of ballistic and phase-coherent transport across a local gate 130 nm wide, which is about an order of magnitude wider than reported previously. Furthermore, in our scheme, we demonstrated independent control of the carrier density in the local-gate region, with a conductance map very much distinct from those of top-gated devices. This was caused by the electric field arising from the global back gate being strongly screened by the embedded local gate. Our scheme allows the realization of ideal multipolar graphene junctions with ballistic carrier transport.

An electrically reconfigurable logic gate intrinsically enabled by spin-orbit materials.

Science.gov (United States)

Kazemi, Mohammad

2017-11-10

The spin degree of freedom in magnetic devices has been discussed widely for computing, since it could significantly reduce energy dissipation, might enable beyond Von Neumann computing, and could have applications in quantum computing. For spin-based computing to become widespread, however, energy efficient logic gates comprising as few devices as possible are required. Considerable recent progress has been reported in this area. However, proposals for spin-based logic either require ancillary charge-based devices and circuits in each individual gate or adopt principals underlying charge-based computing by employing ancillary spin-based devices, which largely negates possible advantages. Here, we show that spin-orbit materials possess an intrinsic basis for the execution of logic operations. We present a spin-orbit logic gate that performs a universal logic operation utilizing the minimum possible number of devices, that is, the essential devices required for representing the logic operands. Also, whereas the previous proposals for spin-based logic require extra devices in each individual gate to provide reconfigurability, the proposed gate is 'electrically' reconfigurable at run-time simply by setting the amplitude of the clock pulse applied to the gate. We demonstrate, analytically and numerically with experimentally benchmarked models, that the gate performs logic operations and simultaneously stores the result, realizing the 'stateful' spin-based logic scalable to ultralow energy dissipation.

Frame-Transfer Gating Raman Spectroscopy for Time-Resolved Multiscalar Combustion Diagnostics

Science.gov (United States)

Nguyen, Quang-Viet; Fischer, David G.; Kojima, Jun

2011-01-01

Accurate experimental measurement of spatially and temporally resolved variations in chemical composition (species concentrations) and temperature in turbulent flames is vital for characterizing the complex phenomena occurring in most practical combustion systems. These diagnostic measurements are called multiscalar because they are capable of acquiring multiple scalar quantities simultaneously. Multiscalar diagnostics also play a critical role in the area of computational code validation. In order to improve the design of combustion devices, computational codes for modeling turbulent combustion are often used to speed up and optimize the development process. The experimental validation of these codes is a critical step in accepting their predictions for engine performance in the absence of cost-prohibitive testing. One of the most critical aspects of setting up a time-resolved stimulated Raman scattering (SRS) diagnostic system is the temporal optical gating scheme. A short optical gate is necessary in order for weak SRS signals to be detected with a good signal- to-noise ratio (SNR) in the presence of strong background optical emissions. This time-synchronized optical gating is a classical problem even to other spectroscopic techniques such as laser-induced fluorescence (LIF) or laser-induced breakdown spectroscopy (LIBS). Traditionally, experimenters have had basically two options for gating: (1) an electronic means of gating using an image intensifier before the charge-coupled-device (CCD), or (2) a mechanical optical shutter (a rotary chopper/mechanical shutter combination). A new diagnostic technology has been developed at the NASA Glenn Research Center that utilizes a frame-transfer CCD sensor, in conjunction with a pulsed laser and multiplex optical fiber collection, to realize time-resolved Raman spectroscopy of turbulent flames that is free from optical background noise (interference). The technology permits not only shorter temporal optical gating (down

Top-gated field-effect LaAlO{sub 3}/SrTiO{sub 3} devices made by ion-irradiation

Energy Technology Data Exchange (ETDEWEB)

Hurand, S.; Jouan, A.; Feuillet-Palma, C.; Singh, G.; Malnou, M.; Lesueur, J.; Bergeal, N. [Laboratoire de Physique et d' Etude des Matériaux-CNRS-ESPCI ParisTech-UPMC, PSL Research University, 10 Rue Vauquelin - 75005 Paris (France); Lesne, E.; Reyren, N.; Barthélémy, A.; Bibes, M.; Villegas, J. E. [Unité Mixte de Physique CNRS-Thales, 1 Av. A. Fresnel, 91767 Palaiseau (France); Ulysse, C. [Laboratoire de Photonique et de Nanostructures LPN-CNRS, Route de Nozay, 91460 Marcoussis and Universit Paris Sud, 91405 Orsay (France); Pannetier-Lecoeur, M. [DSM/IRAMIS/SPEC - CNRS UMR 3680, CEA Saclay, F-91191 Gif-sur-Yvette Cedex (France)

2016-02-01

We present a method to fabricate top-gated field-effect devices in a LaAlO{sub 3}/SrTiO{sub 3} two-dimensional electron gas (2-DEG). Prior to the gate deposition, the realisation of micron size conducting channels in the 2-DEG is achieved by an ion-irradiation with high-energy oxygen ions. After identifying the ion fluence as the key parameter that determines the electrical transport properties of the channels, we demonstrate the field-effect operation. At low temperature, the normal state resistance and the superconducting T{sub c} can be tuned over a wide range by a top-gate voltage without any leakage. A superconductor-to-insulator quantum phase transition is observed for a strong depletion of the 2-DEG.

Effect of hypothermic pulmonary artery flushing on capillary filtration coefficient.

Science.gov (United States)

Andrade, R S; Wangensteen, O D; Jo, J K; Tsai, M Y; Bolman, R M

2000-07-27

We previously demonstrated that surfactant dilution and inhibition occur immediately after pulmonary artery flushing with hypothermic modified Euro-Collins solution. Consequently, we speculated that increased capillary permeability contributed to these surfactant changes. To test this hypothesis, we evaluated the effects of hypothermic pulmonary artery flushing on the pulmonary capillary filtration coefficient (Kfc), and additionally performed a biochemical analysis of surfactant. We used a murine isolated, perfused lung model to measure the pulmonary capillary filtration coefficient and hemodynamic parameters, to determine the wet to dry weight ratio, and to evaluate surfactant by biochemical analysis of lung lavage fluid. We defined three study groups. In group I (controls), we harvested lungs without hypothermic pulmonary artery flushing, and measured Kfc immediately. In group II (in situ flush), we harvested lungs after hypothermic pulmonary artery flushing with modified Euro-Collins solution, and then measured Kfc. Experiments in groups I and II were designed to evaluate persistent changes in Kfc after pulmonary artery flushing. In group III (ex vivo flush), we flushed lungs ex vivo to evaluate transient changes in Kfc during hypothermic pulmonary artery flushing. Groups I and II did not differ significantly in capillary filtration coefficient and hemodynamics. Group II showed significant alterations on biochemical surfactant analysis and a significant increase in wet-to-dry weight ratio, when compared with group I. In group III, we observed a significant transient increase in capillary filtration coefficient during pulmonary artery flushing. Hypothermic pulmonary artery flushing transiently increases the capillary filtration coefficient, leads to an increase in the wet to dry weight ratio, and induces biochemical surfactant changes. These findings could be explained by the effects of hypothermic modified Euro-Collins solution on pulmonary capillary

Top-gate pentacene-based organic field-effect transistor with amorphous rubrene gate insulator

Science.gov (United States)

Hiroki, Mizuha; Maeda, Yasutaka; Ohmi, Shun-ichiro

2018-02-01

The scaling of organic field-effect transistors (OFETs) is necessary for high-density integration and for this, OFETs with a top-gate configuration are required. There have been several reports of damageless lithography processes for organic semiconductor or insulator layers. However, it is still difficult to fabricate scaled OFETs with a top-gate configuration. In this study, the lift-off process and the device characteristics of the OFETs with a top-gate configuration utilizing an amorphous (α) rubrene gate insulator were investigated. We have confirmed that α-rubrene shows an insulating property, and its extracted linear mobility was 2.5 × 10-2 cm2/(V·s). The gate length and width were 10 and 60 µm, respectively. From these results, the OFET with a top-gate configuration utilizing an α-rubrene gate insulator is promising for the high-density integration of scaled OFETs.

Environmental management through sluice gated bed-dam: a revived strategy for the control of Anopheles fluviatilis breeding in streams

Science.gov (United States)

Sahu, S.S.; Gunasekaran, K.; Jambulingam, P.

2014-01-01

Background & objectives: Integrated vector management (IVM) emphasizes sustainable eco-friendly methods and minimal use of chemicals. In this context, the present study highlights the environmental control of breeding of Anopheles fluviatilis, the primary malaria vector, through water management in a natural stream in Koraput district, Odisha, India. Methods: The District Rural Development Agency (DRDA), Koraput, constructed two bed-dams across streams, one in Barigaon and the other in Pipalapodar village. The bed-dam in the former village was fitted with two sluice gates whereas the bed dam constructed in the latter village was without the sluice gate. The sluice gates were opened once in a week on a fixed day to flush out the water from the dam. Anopheles immatures were sampled systematically in the streams using a dipper for density measurement and species composition. Results: There was a reduction of 84.9 per cent in the proportion of positive dips for Anopheles larvae/pupae and a reduction of 98.4 per cent in immature density (number/dip) of An. fluviatilis in the experimental downstream compared to the control following opening of the sluice gates. Interpretation & conclusions: Our findins showed that opening of sluice gates of the bed-dam regularly once in a week resulted in the control of vector breeding in the downstream due to the flushing effect of the water released with a high flow from the bed-dam that stagnated water in the upstream. The outcome of the study encourages upscaling this measure to other areas, wherever feasible. PMID:25297364

21 CFR 870.1210 - Continuous flush catheter.

Science.gov (United States)

2010-04-01

... 21 Food and Drugs 8 2010-04-01 2010-04-01 false Continuous flush catheter. 870.1210 Section 870.1210 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED... that permits continuous intravascular flushing at a slow infusion rate for the purpose of eliminating...

Error-Transparent Quantum Gates for Small Logical Qubit Architectures

Science.gov (United States)

Kapit, Eliot

2018-02-01

One of the largest obstacles to building a quantum computer is gate error, where the physical evolution of the state of a qubit or group of qubits during a gate operation does not match the intended unitary transformation. Gate error stems from a combination of control errors and random single qubit errors from interaction with the environment. While great strides have been made in mitigating control errors, intrinsic qubit error remains a serious problem that limits gate fidelity in modern qubit architectures. Simultaneously, recent developments of small error-corrected logical qubit devices promise significant increases in logical state lifetime, but translating those improvements into increases in gate fidelity is a complex challenge. In this Letter, we construct protocols for gates on and between small logical qubit devices which inherit the parent device's tolerance to single qubit errors which occur at any time before or during the gate. We consider two such devices, a passive implementation of the three-qubit bit flip code, and the author's own [E. Kapit, Phys. Rev. Lett. 116, 150501 (2016), 10.1103/PhysRevLett.116.150501] very small logical qubit (VSLQ) design, and propose error-tolerant gate sets for both. The effective logical gate error rate in these models displays superlinear error reduction with linear increases in single qubit lifetime, proving that passive error correction is capable of increasing gate fidelity. Using a standard phenomenological noise model for superconducting qubits, we demonstrate a realistic, universal one- and two-qubit gate set for the VSLQ, with error rates an order of magnitude lower than those for same-duration operations on single qubits or pairs of qubits. These developments further suggest that incorporating small logical qubits into a measurement based code could substantially improve code performance.

Ionizing radiation effects on floating gates

International Nuclear Information System (INIS)

Cellere, G.; Paccagnella, A.; Visconti, A.; Bonanomi, M.

2004-01-01

Floating gate (FG) memories, and in particular Flash, are the dominant among modern nonvolatile memory technologies. Their performance under ionizing radiation was traditionally studied for the use in space, but has become of general interest in recent years. We are showing results on the charge loss from programmed FG arrays after 10 keV x-rays exposure. Exposure to ionizing radiation results in progressive discharge of the FG. More advanced devices, featuring smaller FG, are less sensitive to ionizing radiation that older ones. The reason is identified in the photoemission of electrons from FG, since at high doses it dominates over charge loss deriving from electron/hole pairs generation in the oxides

46 CFR 194.15-11 - Flushing systems.

Science.gov (United States)

2010-10-01

... 46 Shipping 7 2010-10-01 2010-10-01 false Flushing systems. 194.15-11 Section 194.15-11 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) OCEANOGRAPHIC RESEARCH VESSELS HANDLING, USE... § 194.15-11 Flushing systems. (a) Working spaces in which chemical stores are used shall be equipped...

A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2.

Science.gov (United States)

Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

2018-06-15

Top-gated and bottom-gated transistors with multilayer MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on-off current ratio of 10 8 , high field-effect mobility of 10 2 cm 2 V -1 s -1 , and low subthreshold swing of 93 mV dec -1 . Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10 -3 -10 -2 V MV -1 cm -1 after 6 MV cm -1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 is a promising way to fabricate high-performance ML MoS 2 field-effect transistors for practical electron device applications.

High frequency MOSFET gate drivers technologies and applications

CERN Document Server

Zhang, Zhiliang

2017-01-01

This book describes high frequency power MOSFET gate driver technologies, including gate drivers for GaN HEMTs, which have great potential in the next generation of switching power converters. Gate drivers serve as a critical role between control and power devices.

Double-Shell Tank (DST) Diluent and Flush Subsystem Specification

International Nuclear Information System (INIS)

GRAVES, C.E.

2000-01-01

The Double-Shell Tank (DST) Diluent and Flush Subsystem is intended to support Waste Feed Delivery. The DST Diluent and Flush Subsystem specification describes the relationship of this system with the DST System, describes the functions that must be performed by the system, and establishes the performance requirements to be applied to the design of the system. It also provides references for the requisite codes and standards. The DST Diluent and Flush Subsystem will treat the waste for a more favorable waste transfer. This will be accomplished by diluting the waste, dissolving the soluble portion of the waste, and flushing waste residuals from the transfer line. The Diluent and Flush Subsystem will consist of the following: The Diluent and Flush Station(s) where chemicals will be off-loaded, temporarily stored, mixed as necessary, heated, and metered to the delivery system; and A piping delivery system to deliver the chemicals to the appropriate valve or pump pit Associated support structures. This specification is intended to be the basis for new projects/installations. This specification is not intended to retroactively affect previously established project design criteria without specific direction by the program

SU-E-J-211: Design and Study of In-House Software Based Respiratory Motion Monitoring, Controlling and Breath-Hold Device for Gated Radiotherapy

Energy Technology Data Exchange (ETDEWEB)

Shanmugam, Senthilkumar [Madurai Medical College ' Govt. Rajaji Hospital, Madurai (India)

2014-06-01

Purpose: The purpose of this present work was to fabricate an in-house software based respiratory monitoring, controlling and breath-hold device using computer software programme which guides the patient to have uniform breath hold in response to request during the gated radiotherapy. Methods: The respiratory controlling device consists of a computer, inhouse software, video goggles, a highly sensitive sensor for measurement of distance, mounting systems, a camera, a respiratory signal device, a speaker and a visual indicator. The computer is used to display the respiratory movements of the patient with digital as well as analogue respiration indicators during the respiration cycle, to control, breath-hold and analyze the respiratory movement using indigenously developed software. Results: Studies were conducted with anthropomophic phantoms by simulating the respiratory motion on phantoms and recording the respective movements using the respiratory monitoring device. The results show good agreement between the simulated and measured movements. Further studies were conducted for 60 cancer patients with several types of cancers in the thoracic region. The respiratory movement cycles for each fraction of radiotherapy treatment were recorded and compared. Alarm indications are provided in the system to indicate when the patient breathing movement exceeds the threshold level. This will help the patient to maintain uniform breath hold during the radiotherapy treatment. Our preliminary clinical test results indicate that our device is highly reliable and able to maintain the uniform respiratory motion and breathe hold during the entire course of gated radiotherapy treatment. Conclusion: An indigenous respiratory monitoring device to guide the patient to have uniform breath hold device was fabricated. The alarm feature and the visual waveform indicator in the system guide the patient to have normal respiration. The signal from the device can be connected to the radiation

SU-E-J-211: Design and Study of In-House Software Based Respiratory Motion Monitoring, Controlling and Breath-Hold Device for Gated Radiotherapy

International Nuclear Information System (INIS)

Shanmugam, Senthilkumar

2014-01-01

Purpose: The purpose of this present work was to fabricate an in-house software based respiratory monitoring, controlling and breath-hold device using computer software programme which guides the patient to have uniform breath hold in response to request during the gated radiotherapy. Methods: The respiratory controlling device consists of a computer, inhouse software, video goggles, a highly sensitive sensor for measurement of distance, mounting systems, a camera, a respiratory signal device, a speaker and a visual indicator. The computer is used to display the respiratory movements of the patient with digital as well as analogue respiration indicators during the respiration cycle, to control, breath-hold and analyze the respiratory movement using indigenously developed software. Results: Studies were conducted with anthropomophic phantoms by simulating the respiratory motion on phantoms and recording the respective movements using the respiratory monitoring device. The results show good agreement between the simulated and measured movements. Further studies were conducted for 60 cancer patients with several types of cancers in the thoracic region. The respiratory movement cycles for each fraction of radiotherapy treatment were recorded and compared. Alarm indications are provided in the system to indicate when the patient breathing movement exceeds the threshold level. This will help the patient to maintain uniform breath hold during the radiotherapy treatment. Our preliminary clinical test results indicate that our device is highly reliable and able to maintain the uniform respiratory motion and breathe hold during the entire course of gated radiotherapy treatment. Conclusion: An indigenous respiratory monitoring device to guide the patient to have uniform breath hold device was fabricated. The alarm feature and the visual waveform indicator in the system guide the patient to have normal respiration. The signal from the device can be connected to the radiation

Chemical enhancement of crevice flushing: Volume 2, Data documentation: Final report

International Nuclear Information System (INIS)

Baum, A.J.; Prestegiacomo, J.B.

1987-06-01

The primary objective of this project was to evaluate the effect of various chemical additives on enhancing the hideout return produced during tubesheet crevice flushing operations in PWR steam generators. Secondary objectives included determining if flushing was an effective means of introducing a corrosion inhibitor into deep tubesheet crevices, and evaluating the effects of different degrees of crevice restriction, different initial crevice chemistries, and different flushing processes. Testing was unable to identify a single additive formulation which increased the flushing effectiveness for all degrees of crevice restriction considered. Testing did reveal that a combination of surfactant (Surfynol 104) and boric acid enhances the flushing effectiveness in tests with moderately restricted crevices. Although cleaning agents were found to increase the flushing effectiveness in tests with extensively restricted crevices, potential corrosion concerns and relatively high contaminant (sodium) levels could discourage their use. However, the testing demonstrated that flushing was an effective means of accumulating a corrosion inhibitor, such as boric acid, in deep tubesheet crevices. Companion testing also indicated that boric acid which accumulated in a tubesheet crevice during crevice flushing was likely to remain in the crevice during subsequent power operation. Consequently, use of boric acid as an additive in tubesheet crevice flushing operations is strongly recommended

Strainer device

International Nuclear Information System (INIS)

Mokuya, Kenji.

1975-01-01

Object: To provide a strainer device, which is adapted to facilitate flushing and is particularly suited for installation in the cooling system of a liquid metal cooled fast breeding reactor. Structure: A casing accommodating a strainer and a blind plate for the selection of a flow path is provided at a suitable portion of the duct line. The blind plate is adapted to be rotated by an opening and closing means consisting of a rod. bellows, shaft and so forth. At the time of flushing, the duct line is sealed by the blind plate. (Nakamura, S.)

Benchmarking gate-based quantum computers

Science.gov (United States)

Michielsen, Kristel; Nocon, Madita; Willsch, Dennis; Jin, Fengping; Lippert, Thomas; De Raedt, Hans

2017-11-01

With the advent of public access to small gate-based quantum processors, it becomes necessary to develop a benchmarking methodology such that independent researchers can validate the operation of these processors. We explore the usefulness of a number of simple quantum circuits as benchmarks for gate-based quantum computing devices and show that circuits performing identity operations are very simple, scalable and sensitive to gate errors and are therefore very well suited for this task. We illustrate the procedure by presenting benchmark results for the IBM Quantum Experience, a cloud-based platform for gate-based quantum computing.

Piezopotential gated nanowire devices: Piezotronics and piezo-phototronics

KAUST Repository

Wang, Zhong Lin

2010-12-01

Due to the polarization of ions in a crystal that has non-central symmetry, a piezoelectric potential (piezopotential) is created in the crystal by applying a stress. For materials such as ZnO, GaN, and InN in the wurtzite structure family, the effect of piezopotential on the transport behavior of charge carriers is significant due to their multiple functionalities of piezoelectricity, semiconductor and photon excitation. By utilizing the advantages offered by these properties, a few new fields have been created. Electronics fabricated by using inner-crystal piezopotential as a "gate" voltage to tune/control the charge transport behavior is named piezotronics, with applications in strain/force/pressure triggered/controlled electronic devices, sensors and logic units. Piezo-phototronic effect is a result of three-way coupling among piezoelectricity, photonic excitation and semiconductor transport, which allows tuning and controlling of electro-optical processes by strain induced piezopotential. The objective of this review article is to introduce the fundamentals of piezotronics and piezo-phototronics and to give an updated progress about their applications in energy science and sensors. © 2010 Elsevier Ltd All rights reserved.

Flush Mounting Of Thin-Film Sensors

Science.gov (United States)

Moore, Thomas C., Sr.

1992-01-01

Technique developed for mounting thin-film sensors flush with surfaces like aerodynamic surfaces of aircraft, which often have compound curvatures. Sensor mounted in recess by use of vacuum pad and materials selected for specific application. Technique involves use of materials tailored to thermal properties of substrate in which sensor mounted. Together with customized materials, enables flush mounting of thin-film sensors in most situations in which recesses for sensors provided. Useful in both aircraft and automotive industries.

Radiation-induced interface state generation in MOS devices with reoxidised nitrided SiO2 gate dielectrics

International Nuclear Information System (INIS)

Lo, G.Q.; Shih, D.K.; Ting, W.; Kwong, D.L.

1989-01-01

In this letter, the radiation-induced interface state generation ΔD it in MOS devices with reoxidised nitrided gate oxides has been studied. The reoxidised nitrided oxides were fabricated by rapid thermal reoxidation (RTO) of rapidly thermal nitrided (RTN) SiO 2 . The devices were irradiated by exposure to X-rays at doses of 0.5-5.0 Mrad (Si). It is found that the RTO process improves the radiation hardness of RTN oxides in terms of interface state generation. The enhanced interface ''hardness'' of reoxidised nitrided oxides is attributed to the strainless interfacial oxide regrowth or reduction of hydrogen concentration during RTO of RTN oxides. (author)

FEASIBILITY STUDY OF SEDIMENT FLUSHING FROM MOSUL RESERVOIR, IRAQ

Directory of Open Access Journals (Sweden)

Thair Mahmood Al-Taiee

2015-02-01

Full Text Available The Feasibility of sediment flushing  from Mosul reservoir located northern iraq was conducted. Many up to date world criteria and indices for checking the efficiency of sediment flushing from reservoir which have been got through analyzing large amount of  data from many flushed reservoirs  in the world which were depended tested and applied in the present case study (Mosul Reservoir. These criteria and indices depend mainly on the hydrological , hydraulic and  topographical properties of the reservoirs in-addition to the operation plan of the reservoirs. They gave a good indication for checking the efficiency of the sediment flushing  process in the reservoirs. It was concluded that approximately the main criteria for the successful flushing sediment was  verified  in  Mosul  reservoir  such as  Sediment Balance Ratio   (SBR and the Long Term Capacity Ratio (LTCR,the shape factor  of reservoir (W/L and the hydraulic condition such as the percentage of (Qf/Qin and (Vf/Vin. This gave an indication that the processes of flushing sediment in Mosul reservoir is probably feasible and may be applied  in the future to maintain the water storage in the reservoir.

Modeling of a quantized current and gate field-effect in gated three-terminal Cu2-αS electrochemical memristors

Directory of Open Access Journals (Sweden)

Y. Zhang

2015-02-01

Full Text Available Memristors exhibit very sharp off-to-on transitions with a large on/off resistance ratio. These remarkable characteristics coupled with their long retention time and very simple device geometry make them nearly ideal for three-terminal devices where the gate voltage can change their on/off voltages and/or simply turn them off, eliminating the need for bipolar operations. In this paper, we propose a cation migration-based computational model to explain the quantized current conduction and the gate field-effect in Cu2-αS memristors. Having tree-shaped conductive filaments inside a memristor is the reason for the quantized current conduction effect. Applying a gate voltage causes a deformation of the conductive filaments and thus controls the SET and the RESET process of the device.

3D modeling of dual-gate FinFET.

Science.gov (United States)

Mil'shtein, Samson; Devarakonda, Lalitha; Zanchi, Brian; Palma, John

2012-11-13

The tendency to have better control of the flow of electrons in a channel of field-effect transistors (FETs) did lead to the design of two gates in junction field-effect transistors, field plates in a variety of metal semiconductor field-effect transistors and high electron mobility transistors, and finally a gate wrapping around three sides of a narrow fin-shaped channel in a FinFET. With the enhanced control, performance trends of all FETs are still challenged by carrier mobility dependence on the strengths of the electrical field along the channel. However, in cases when the ratio of FinFET volume to its surface dramatically decreases, one should carefully consider the surface boundary conditions of the device. Moreover, the inherent non-planar nature of a FinFET demands 3D modeling for accurate analysis of the device performance. Using the Silvaco modeling tool with quantization effects, we modeled a physical FinFET described in the work of Hisamoto et al. (IEEE Tran. Elec. Devices 47:12, 2000) in 3D. We compared it with a 2D model of the same device. We demonstrated that 3D modeling produces more accurate results. As 3D modeling results came close to experimental measurements, we made the next step of the study by designing a dual-gate FinFET biased at Vg1 >Vg2. It is shown that the dual-gate FinFET carries higher transconductance than the single-gate device.

Molecular sensors and molecular logic gates

International Nuclear Information System (INIS)

Georgiev, N.; Bojinov, V.

2013-01-01

Full text: The rapid grow of nanotechnology field extended the concept of a macroscopic device to the molecular level. Because of this reason the design and synthesis of (supra)-molecular species capable of mimicking the functions of macroscopic devices are currently of great interest. Molecular devices operate via electronic and/or nuclear rearrangements and, like macroscopic devices, need energy to operate and communicate between their elements. The energy needed to make a device work can be supplied as chemical energy, electrical energy, or light. Luminescence is one of the most useful techniques to monitor the operation of molecular-level devices. This fact determinates the synthesis of novel fluorescence compounds as a considerable and inseparable part of nanoscience development. Further miniaturization of semiconductors in electronic field reaches their limit. Therefore the design and construction of molecular systems capable of performing complex logic functions is of great scientific interest now. In semiconductor devices the logic gates work using binary logic, where the signals are encoded as 0 and 1 (low and high current). This process is executable on molecular level by several ways, but the most common are based on the optical properties of the molecule switches encoding the low and high concentrations of the input guest molecules and the output fluorescent intensities with binary 0 and 1 respectively. The first proposal to execute logic operations at the molecular level was made in 1988, but the field developed only five years later when the analogy between molecular switches and logic gates was experimentally demonstrated by de Silva. There are seven basic logic gates: AND, OR, XOR, NOT, NAND, NOR and XNOR and all of them were achieved by molecules, the fluorescence switching as well. key words: fluorescence, molecular sensors, molecular logic gates

The flush-mounted rail Langmuir probe array designed for the Alcator C-Mod vertical target plate divertor

Science.gov (United States)

Kuang, A. Q.; Brunner, D.; LaBombard, B.; Leccacorvi, R.; Vieira, R.

2018-04-01

An array of flush-mounted and toroidally elongated Langmuir probes (henceforth called rail probes) have been specifically designed for the Alcator C-Mod's vertical target plate divertor and operated over multiple campaigns. The "flush" geometry enables the tungsten electrodes to survive high heat flux conditions in which traditional "proud" tungsten electrodes suffer damage from melting. The toroidally elongated rail-like geometry reduces the influence of sheath expansion, which is an important effect to consider in the design and interpretation of flush-mounted Langmuir probes. The new rail probes successfully operated during C-Mod's FY2015 and FY2016 experimental campaigns with no evidence of damage, despite being regularly subjected to heat flux densities parallel to the magnetic field exceeding ˜1 GW m-2 for short periods of time. A comparison between rail and proud probe data indicates that sheath expansion effects were successfully mitigated by the rail design, extending the use of these Langmuir probes to incident magnetic field line angles as low as 0.5°.

30 CFR 56.7807 - Flushing the combustion chamber.

Science.gov (United States)

2010-07-01

... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Flushing the combustion chamber. 56.7807 Section 56.7807 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT OF LABOR METAL AND... Rotary Jet Piercing Rotary Jet Piercing § 56.7807 Flushing the combustion chamber. The combustion chamber...

Hot flushes | van Schoor | South African Family Practice

African Journals Online (AJOL)

Vasomotor symptoms, such as hot flushes and night sweats, are considered to be the cardinal symptoms of menopause, and are experienced by most women. The physiology of hot flushes is not fully understood, and is likely to reflect the interplay between multiple central and peripheral physiological systems. Reproductive ...

Modulation of magmatic processes by CO2 flushing

Science.gov (United States)

Caricchi, Luca; Sheldrake, Tom E.; Blundy, Jon

2018-06-01

Magmatic systems are the engines driving volcanic eruptions and the source of fluids responsible for the formation of porphyry-type ore deposits. Sudden variations of pressure, temperature and volume in magmatic systems can produce unrest, which may culminate in a volcanic eruption and/or the abrupt release of ore-forming fluids. Such variations of the conditions within magmatic systems are commonly ascribed to the injection of new magma from depth. However, as magmas fractionating at depth or rising to the upper crust release CO2-rich fluids, the interaction between carbonic fluids and H2O-rich magmas stored in the upper crust (CO2 flushing), must also be a common process affecting the evolution of subvolcanic magma reservoirs. Here, we investigate the effect of gas injection on the stability and chemical evolution of magmatic systems. We calculate the chemical and physical evolution of magmas subjected to CO2-flushing using rhyolite-MELTS. We compare the calculations with a set of melt inclusion data for Mt. St. Helens, Merapi, Etna, and Stromboli volcanoes. We provide an approach that can be used to distinguish between melt inclusions trapped during CO2 flushing, magma ascent and decompression, or those affected by post-entrapment H2O-loss. Our results show that CO2 flushing is a widespread process in both felsic and mafic magmatic systems. Depending upon initial magma crystallinity and duration of CO2 input, flushing can either lead to volcanic eruption or fluid release. We suggest that CO2 flushing is a fundamental process modulating the behaviour and chemical evolution of crustal magmatic systems.

Gating system design for the space device case using T-Flex CAD

Directory of Open Access Journals (Sweden)

Ayusheev Munkhe-Zul

2017-01-01

Full Text Available The judicious selection of gating system for the consumable pattern takes a lot of time, labour and other significant resources. The modern design technologies provide quick and effective ways for gating system calculation and casting process simulation. Gating system modeling allows estimating different kinds of defects which can occur at the developing stage of casting process. Moreover, it is possible to modify the whole gating system configuration if some parameters are changed. Analyzing these data and modifying the gating system characteristics high quality of castings can be achieved.

SNL-EFDC Simulations of Tidal Turbine-Related Changes to Hydrodynamics and Flushing

Science.gov (United States)

Roberts, J. D.; Johnson, E.; James, S. C.; Barco, J.; Jones, C.

2012-12-01

The marine and hydrokinetic (MHK) industry in the United States faces challenges associated with siting, permitting, construction, and operation of pilot- and full-scale facilities that must be addressed to accelerate environmentally sound deployment of these renewable energy technologies. Little is known about the potential effects of MHK device operation in coastal areas, estuaries, or rivers, or of the cumulative impacts of these devices on aquatic ecosystems. This lack of knowledge affects the actions of regulatory agencies, the opinions of stakeholder groups, and the commitment of energy project developers and investors. Two particularly important factors that can be used as a precursor for MHK-driven environmental changes in estuaries are the effect of decreased tidal range and flushing. For example, tidal-range changes could affect wetland systems that are only wetted under the highest of tides. Significant changes in tidal range could completely change the character of the wetlands through long-term drying. Changes to flushing must also be understood, especially when municipal wastewater and other pollutant sources are discharged into a bay. When MHK operation alters flow rates, decreased flushing of an embayment could yield increased residence times, decreased nutrient and contaminant dispersion, and even the possibility of algal blooms. Small changes to the flow could manifest as noticeable changes to sediment transport and water quality. This work provides example assessments of changes to the physical environment (i.e. currents, tidal ranges, water age, and e-folding time) potentially imposed by the operation of MHK turbine arrays in marine estuary environments using the modeling platform SNL-EFDC. Comparing model results with and without an MHK array facilitates an understanding of how an array of turbines might alter the environment. By using models to simulate water circulation, commensurate changes in water quality, benthic habitat quality, and

On-Chip Electrolytic Chemistry for the Tuning of Graphene Devices

Science.gov (United States)

Schmucker, Scott; Ruppalt, Laura; Culbertson, James; Do, Jae Won; Lyding, Joseph; Robinson, Jeremy; Cress, Cory

2015-03-01

The inherent interfacial nature of two-dimensional materials has motivated the tuning of these films by choice of substrate or chemical functionalization. Such parameters are generally selected during fabrication, and therefore remain static during device operation. However, the possibility of dynamic chemistry in a tunable solid-state system will enable the development of new devices which fully leverage the rich chemistry of graphenic materials. Here, we fabricate a novel device for localized, dynamic doping and functionalization of graphene that is compatible with CMOS processing. The device is enabled by a top-gated, solid electrochemical cell designed with calcium fluoride (CaF2) substituting the oxide of a traditional MOSFET. When the CaF2 is gated, F flows from cathode to anode, segregating Ca and F. In this work, one electrode is graphene. When saturated with fluorine, graphene undergoes covalent modification, becoming a wide-bandgap semiconductor. In contrast, when functionalized with calcium or dilute fluorine, graphene is electron or hole doped, respectively. With transport, Raman, and XPS, we demonstrate this lithographically localized and reversible modulation of graphene's electronic and chemical character.

Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

KAUST Repository

Hussain, Muhammad Mustafa; Smith, Casey Eben; Harris, Harlan Rusty; Young, Chadwin; Tseng, Hsinghuang; Jammy, Rajarao

2010-01-01

Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

KAUST Repository

Hussain, Muhammad Mustafa

2010-03-01

Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

Filtering reducer of flushing fluid

Energy Technology Data Exchange (ETDEWEB)

Secu, P; Apostu, M; Basarabescu, T; Popescu, F

1981-02-28

This is a patent of a filtering reducer of flushing fluid on a water base with low content of solid particles used at temperatures of roughly 200/sup 0/C. With the use of the proposed filtering reducer, there is no excessive increase in viscosity and gelatinization of the flushing fluids without restriction in the quantity of reducer needed to guarantee the required filtering. There is a possibility of recovering the polyalkylphenol vat residues obtained in the production of nonyl phenol. It is possible to reduce the time of treatment and dissolving of the product; there is no danger of plugging of the productive oil beds. The process of hydration of clay is excluded.

An alternative approach to assessing feasibility of flushing sediment from reservoirs

Directory of Open Access Journals (Sweden)

Elfimov Valeriy Ivanovich

2014-07-01

Full Text Available Effective parameters on feasibility of sediment flushing through reservoirs include hydrological, hydraulic, and topographic properties of the reservoirs. In this study, the performances of the Decision tree forest (DTF and Group method of data handling (GMDH for assessing feasibility of flushing sediment from reservoirs, were investigated. In this way, Decision tree Forest, that combines multiple Decision tree, used to evaluate the relative importance of factors affecting flushing sediment. At the second step, GMDH deployed to predict the feasibility of flushing sediment from reservoirs. Results indicate that these models, as an efficient novel approach with an acceptable range of error, can be used successfully for assessing feasibility of flushing sediment from reservoirs.

Gated-controlled electron pumping in connected quantum rings

International Nuclear Information System (INIS)

Lima, R.P.A.; Domínguez-Adame, F.

2014-01-01

We study the electronic transport across connected quantum rings attached to leads and subjected to time-harmonic side-gate voltages. Using the Floquet formalism, we calculate the net pumped current generated and controlled by the side-gate voltage. The control of the current is achieved by varying the phase shift between the two side-gate voltages as well as the Fermi energy. In particular, the maximum current is reached when the side-gate voltages are in quadrature. This new design based on connected quantum rings controlled without magnetic fields can be easily integrated in standard electronic devices. - Highlights: • We introduce and study a minimal setup to pump electrons through connected quantum rings. • Quantum pumping is achieved by time-harmonic side-gate voltages instead of the more conventional time-dependent magnetic fluxes. • Our new design could be easily integrated in standard electronic devices

Deep Gate Recurrent Neural Network

Science.gov (United States)

2016-11-22

and Fred Cummins. Learning to forget: Continual prediction with lstm . Neural computation, 12(10):2451–2471, 2000. Alex Graves. Generating sequences...DSGU) and Simple Gated Unit (SGU), which are structures for learning long-term dependencies. Compared to traditional Long Short-Term Memory ( LSTM ) and...Gated Recurrent Unit (GRU), both structures require fewer parameters and less computation time in sequence classification tasks. Unlike GRU and LSTM

Design and test of 4πβ-γ coincidence measurement device based on DSP technology

International Nuclear Information System (INIS)

Zeng Herong; Feng Qijie; Leng Jun; Qian Dazhi; Bai Lixin; Zhang Yiyun

2012-01-01

The paper illustrates the hardware and software of the 4πβ-γ coincidence measurement device based on DSP technology in detail. In such device, the single-channel analyzer, gate generator, coincidence circuit and scalar in the traditional coincidence measurement device are replaced by the digital coincidence acquirer which is researched and manufactured by ourselves. Doing so, the measurement efficiency will be respectively improved, and the hardware cost will be lowered. The comparison experiment shows that the design of such device is a success. (authors)

Influence of layout parameters on snapback characteristic for a gate-grounded NMOS device in 0.13-μm silicide CMOS technology

International Nuclear Information System (INIS)

Jiang Yuxi; Li Jiao; Ran Feng; Cao Jialin; Yang Dianxiong

2009-01-01

Gate-grounded NMOS (GGNMOS) devices with different device dimensions and layout floorplans have been designed and fabricated in 0.13-μm silicide CMOS technology. The snapback characteristics of these GGNMOS devices are measured using the transmission line pulsing (TLP) measurement technique. The relationships between snapback parameters and layout parameters are shown and analyzed. A TCAD device simulator is used to explain these relationships. From these results, the circuit designer can predict the behavior of the GGNMOS devices under high ESD current stress, and design area-efficient ESD protection circuits to sustain the required ESD level. Optimized layout rules for ESD protection in 0.13-μm silicide CMOS technology are also presented. (semiconductor devices)

30 CFR 57.7807 - Flushing the combustion chamber.

Science.gov (United States)

2010-07-01

... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Flushing the combustion chamber. 57.7807... and Rotary Jet Piercing Rotary Jet Piercing-Surface Only § 57.7807 Flushing the combustion chamber. The combustion chamber of a jet drill stem which has been sitting unoperated in a drill hole shall be...

Real-time x-ray response of biocompatible solution gate AlGaN/GaN high electron mobility transistor devices

International Nuclear Information System (INIS)

Hofstetter, Markus; Funk, Maren; Paretzke, Herwig G.; Thalhammer, Stefan; Howgate, John; Sharp, Ian D.; Stutzmann, Martin

2010-01-01

We present the real-time x-ray irradiation response of charge and pH sensitive solution gate AlGaN/GaN high electron mobility transistors. The devices show stable and reproducible behavior under and following x-ray radiation, including a linear integrated response with dose into the μGy range. Titration measurements of devices in solution reveal that the linear pH response and sensitivity are not only retained under x-ray irradiation, but an irradiation response could also be measured. Since the devices are biocompatible, and can be simultaneously operated in aggressive fluids and under hard radiation, they are well-suited for both medical radiation dosimetry and biosensing applications.

Simulation study of 14-nm-gate III-V trigate field effect transistor devices with In1−xGaxAs channel capping layer

Directory of Open Access Journals (Sweden)

Cheng-Hao Huang

2015-06-01

Full Text Available In this work, we study characteristics of 14-nm-gate InGaAs-based trigate MOSFET (metal-oxide-semiconductor field effect transistor devices with a channel capping layer. The impacts of thickness and gallium (Ga concentration of the channel capping layer on the device characteristic are firstly simulated and optimized by using three-dimensional quantum-mechanically corrected device simulation. Devices with In1−xGaxAs/In0.53Ga0.47As channels have the large driving current owing to small energy band gap and low alloy scattering at the channel surface. By simultaneously considering various physical and switching properties, a 4-nm-thick In0.68Ga0.32As channel capping layer can be adopted for advanced applications. Under the optimized channel parameters, we further examine the effects of channel fin angle and the work-function fluctuation (WKF resulting from nano-sized metal grains of NiSi gate on the characteristic degradation and variability. To maintain the device characteristics and achieve the minimal variation induced by WKF, the physical findings of this study indicate a critical channel fin angle of 85o is needed for the device with an averaged grain size of NiSi below 4x4 nm2.

Final flush of the shielded cells melter

International Nuclear Information System (INIS)

Marshall, K.M.; Fellinger, T.L.; Harbour, J.R.

1997-01-01

A flush of the Savannah River Technology Center (SRTC) Shielded Cells melter was performed after the completion of a campaign to vitrify loaded crystalline silicotitanate (CST) ion exchange medium. The purpose of the flush was to lower levels of radioisotopes accumulated during the campaign and to lower the level of titanium dioxide present in the glass. This in turn would ready the melter for future campaigns involving the Defense Waste Processing Facility (DWPF)

Reduction of skin effect losses in double-level-T-gate structure

Energy Technology Data Exchange (ETDEWEB)

Mikulics, M., E-mail: m.mikulics@fz-juelich.de; Hardtdegen, H.; Arango, Y. C.; Adam, R.; Fox, A.; Grützmacher, D. [Peter Grünberg Institute (PGI-9), Forschungszentrum Jülich, D-52425 Jülich (Germany); Jülich-Aachen Research Alliance, JARA, Fundamentals of Future Information Technology, D-52425 Jülich (Germany); Gregušová, D.; Novák, J. [Institute of Electrical Engineering, Slovak Academy of Sciences, SK-84104 Bratislava (Slovakia); Stanček, S. [Department of Nuclear Physic and Technique, Slovak University of Technology, SK-81219 Bratislava (Slovakia); Kordoš, P. [Institute of Electronics and Photonics, Slovak University of Technology, SK-81219 Bratislava (Slovakia); Sofer, Z. [Department of Inorganic Chemistry, Institute of Chemical Technology, Technická 5, Prague 6 (Czech Republic); Juul, L.; Marso, M. [Faculté des Sciences, de la Technologie et de la Communication, Université du Luxembourg, L-1359 Luxembourg (Luxembourg)

2014-12-08

We developed a T-gate technology based on selective wet etching yielding 200 nm wide T-gate structures used for fabrication of High Electron Mobility Transistors (HEMT). Major advantages of our process are the use of only standard photolithographic process and the ability to generate T-gate stacks. A HEMT fabricated on AlGaN/GaN/sapphire with gate length L{sub g} = 200 nm and double-stacked T-gates exhibits 60 GHz cutoff frequency showing ten-fold improvement compared to 6 GHz for the same device with 2 μm gate length. HEMTs with a double-level-T-gate (DLTG) structure exhibit up to 35% improvement of f{sub max} value compared to a single T-gate device. This indicates a significant reduction of skin effect losses in DLTG structure compared to its standard T-gate counterpart. These results agree with the theoretical predictions.

Citrus flush shoot ontogeny modulates biotic potential of Diaphorina citri.

Science.gov (United States)

Cifuentes-Arenas, Juan Camilo; de Goes, António; de Miranda, Marcelo Pedreira; Beattie, George Andrew Charles; Lopes, Silvio Aparecido

2018-01-01

The biology and behaviour of the psyllid Diaphorina citri Kuwayama (Hemiptera: Sternorrhyncha: Liviidae), the major insect vector of bacteria associated with huanglongbing, have been extensively studied with respect to host preferences, thermal requirements, and responses to visual and chemical volatile stimuli. However, development of the psyllid in relation to the ontogeny of immature citrus flush growth has not been clearly defined or illustrated. Such information is important for determining the timing and frequency of measures used to minimize populations of the psyllid in orchards and spread of HLB. Our objective was to study how flush ontogeny influences the biotic potential of the psyllid. We divided citrus flush growth into six stages within four developmental phases: emergence (V1), development (V2 and V3), maturation (V4 and V5), and dormancy (V6). Diaphorina citri oviposition and nymph development were assessed on all flush stages in a temperature controlled room, and in a screen-house in which ambient temperatures varied. Our results show that biotic potential of Diaphorina citri is not a matter of the size or the age of the flushes (days after budbreak), but the developmental stage within its ontogeny. Females laid eggs on flush V1 to V5 only, with the time needed to commence oviposition increasing with the increasing in flush age. Stages V1, V2 and V3 were most suitable for oviposition, nymph survival and development, and adult emergence, which showed evidence of protandry. Flush shoots at emerging and developmental phases should be the focus of any chemical or biological control strategy to reduce the biotic potential of D. citri, to protect citrus tree from Liberibacter infection and to minimize HLB dissemination.

Light-effect transistor (LET) with multiple independent gating controls for optical logic gates and optical amplification

Science.gov (United States)

Marmon, Jason; Rai, Satish; Wang, Kai; Zhou, Weilie; Zhang, Yong

The pathway for CMOS technology beyond the 5-nm technology node remains unclear for both physical and technological reasons. A new transistor paradigm is required. A LET (Marmon et. al., Front. Phys. 2016, 4, No. 8) offers electronic-optical hybridization at the component level, and is capable of continuing Moore's law to the quantum scale. A LET overcomes a FET's fabrication complexity, e.g., physical gate and doping, by employing optical gating and photoconductivity, while multiple independent, optical gates readily realize unique functionalities. We report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs, incorporating an M-S-M structure, show output and transfer characteristics resembling advanced FETs, e.g., on/off ratios up to 106 with a source-drain voltage of 1.43V, gate-power of 260nW, and a subthreshold swing of 0.3nW/decade (excluding losses). A LET has potential for high-switching (THz) speeds and extremely low-switching energies (aJ) in the ballistic transport region. Our work offers new electronic-optical integration strategies for high speed and low energy computing approaches, which could potentially be extended to other materials and devices.

Non-hormonal interventions for hot flushes in women with a history of breast cancer

Directory of Open Access Journals (Sweden)

Gabriel Rada

2013-04-01

Full Text Available BACKGROUND Hot flushes are common in women with a history of breast cancer. Hormonal therapies are known to reduce these symptoms but are not recommended in women with a history of breast cancer due to their potential adverse effects. The efficacy of non-hormonal therapies is still uncertain. OBJECTIVE To assess the efficacy of non-hormonal therapies in reducing hot flushes in women with a history of breast cancer. METHODS Search methods: We searched the Cochrane Breast Cancer Group Specialised Register, CENTRAL (The Cochrane Library, Medline, Embase, Lilacs, CINAHL, PsycINFO (August 2008 and WHO ICTRP Search Portal. We handsearched reference lists of reviews and included articles, reviewed conference proceedings and contacted experts. Selection criteria: Randomized controlled trials (RCTs comparing non-hormonal therapies with placebo or no therapy for reducing hot flushes in women with a history of breast cancer. Data collection and analysis: Two authors independently selected potentially relevant studies, decided upon their inclusion and extracted data on participant characteristics, interventions, outcomes and the risk of bias of included studies. MAIN RESULTS Sixteen RCTs met our inclusion criteria. We included six studies on selective serotonin (SSRI and serotonin-norepinephrine (SNRI reuptake inhibitors, two on clonidine, one on gabapentin, two each on relaxation therapy and homeopathy, and one each on vitamin E, magnetic devices and acupuncture. The risk of bias of most studies was rated as low or moderate. Data on continuous outcomes were presented inconsistently among studies, which precluded the possibility of pooling the results. Three pharmacological treatments (SSRIs and SNRIs, clonidine and gabapentin reduced the number and severity of hot flushes. One study assessing vitamin E did not show any beneficial effect. One of two studies on relaxation therapy showed a significant benefit. None of the other non-pharmacological therapies

Non-hormonal interventions for hot flushes in women with a history of breast cancer

Directory of Open Access Journals (Sweden)

Gabriel Rada

Full Text Available BACKGROUND Hot flushes are common in women with a history of breast cancer. Hormonal therapies are known to reduce these symptoms but are not recommended in women with a history of breast cancer due to their potential adverse effects. The efficacy of non-hormonal therapies is still uncertain. OBJECTIVE To assess the efficacy of non-hormonal therapies in reducing hot flushes in women with a history of breast cancer. METHODS Search methods: We searched the Cochrane Breast Cancer Group Specialised Register, CENTRAL (The Cochrane Library, Medline, Embase, Lilacs, CINAHL, PsycINFO (August 2008 and WHO ICTRP Search Portal. We handsearched reference lists of reviews and included articles, reviewed conference proceedings and contacted experts. Selection criteria: Randomized controlled trials (RCTs comparing non-hormonal therapies with placebo or no therapy for reducing hot flushes in women with a history of breast cancer. Data collection and analysis: Two authors independently selected potentially relevant studies, decided upon their inclusion and extracted data on participant characteristics, interventions, outcomes and the risk of bias of included studies. MAIN RESULTS Sixteen RCTs met our inclusion criteria. We included six studies on selective serotonin (SSRI and serotonin-norepinephrine (SNRI reuptake inhibitors, two on clonidine, one on gabapentin, two each on relaxation therapy and homeopathy, and one each on vitamin E, magnetic devices and acupuncture. The risk of bias of most studies was rated as low or moderate. Data on continuous outcomes were presented inconsistently among studies, which precluded the possibility of pooling the results. Three pharmacological treatments (SSRIs and SNRIs, clonidine and gabapentin reduced the number and severity of hot flushes. One study assessing vitamin E did not show any beneficial effect. One of two studies on relaxation therapy showed a significant benefit. None of the other non-pharmacological therapies

Restless Tuneup of High-Fidelity Qubit Gates

Science.gov (United States)

Rol, M. A.; Bultink, C. C.; O'Brien, T. E.; de Jong, S. R.; Theis, L. S.; Fu, X.; Luthi, F.; Vermeulen, R. F. L.; de Sterke, J. C.; Bruno, A.; Deurloo, D.; Schouten, R. N.; Wilhelm, F. K.; DiCarlo, L.

2017-04-01

We present a tuneup protocol for qubit gates with tenfold speedup over traditional methods reliant on qubit initialization by energy relaxation. This speedup is achieved by constructing a cost function for Nelder-Mead optimization from real-time correlation of nondemolition measurements interleaving gate operations without pause. Applying the protocol on a transmon qubit achieves 0.999 average Clifford fidelity in one minute, as independently verified using randomized benchmarking and gate-set tomography. The adjustable sensitivity of the cost function allows the detection of fractional changes in the gate error with a nearly constant signal-to-noise ratio. The restless concept demonstrated can be readily extended to the tuneup of two-qubit gates and measurement operations.

Proposal for a dual-gate spin field effect transistor: A device with very small switching voltage and a large ON to OFF conductance ratio

Science.gov (United States)

Wan, J.; Cahay, M.; Bandyopadhyay, S.

2008-06-01

We propose a new dual gate spin field effect transistor (SpinFET) consisting of a quasi one-dimensional semiconductor channel sandwiched between two half-metallic contacts. The gate voltage aligns and de-aligns the incident electron energy with Ramsauer resonance levels in the channel, thereby modulating the source-to-drain conductance. The device can be switched from ON to OFF with a few mV change in the gate voltage, resulting in exceedingly low dynamic power dissipation during switching. The conductance ON/OFF ratio stays fairly large ( ∼60) up to a temperature of 10 K. This conductance ratio is comparable to that achievable with carbon nanotube transistors.

Switching Performance Evaluation of Commercial SiC Power Devices (SiC JFET and SiC MOSFET) in Relation to the Gate Driver Complexity

DEFF Research Database (Denmark)

Pittini, Riccardo; Zhang, Zhe; Andersen, Michael A. E.

2013-01-01

and JFETs. The recent introduction of SiC MOSFET has proved that it is possible to have highly performing SiC devices with a minimum gate driver complexity; this made SiC power devices even more attractive despite their device cost. This paper presents an analysis based on experimental results...... of the switching losses of various commercially available Si and SiC power devices rated at 1200 V (Si IGBTs, SiC JFETs and SiC MOSFETs). The comparison evaluates the reduction of the switching losses which is achievable with the introduction of SiC power devices; this includes analysis and considerations...

Reconfigurable logic via gate controlled domain wall trajectory in magnetic network structure

Science.gov (United States)

Murapaka, C.; Sethi, P.; Goolaup, S.; Lew, W. S.

2016-01-01

An all-magnetic logic scheme has the advantages of being non-volatile and energy efficient over the conventional transistor based logic devices. In this work, we present a reconfigurable magnetic logic device which is capable of performing all basic logic operations in a single device. The device exploits the deterministic trajectory of domain wall (DW) in ferromagnetic asymmetric branch structure for obtaining different output combinations. The programmability of the device is achieved by using a current-controlled magnetic gate, which generates a local Oersted field. The field generated at the magnetic gate influences the trajectory of the DW within the structure by exploiting its inherent transverse charge distribution. DW transformation from vortex to transverse configuration close to the output branch plays a pivotal role in governing the DW chirality and hence the output. By simply switching the current direction through the magnetic gate, two universal logic gate functionalities can be obtained in this device. Using magnetic force microscopy imaging and magnetoresistance measurements, all basic logic functionalities are demonstrated. PMID:26839036

Flushing wells during drilling in rocks with negative temperature

Energy Technology Data Exchange (ETDEWEB)

Badalov, S S

1982-01-01

Results are examined of experimental studies of cavern formation in loose sands cemented by ice. The new data obtained make it possible to have a substantiated plan for the indicators of the flushing fluid and its chemical treatment. Results are presented of studies of argillaceous solutions chemically treated and untreated, as well as water and diesel fuel. Comparison of the findings with the technological indicators of the argillaceous solutions indicated that with an increase in viscosity of the solution and its content of clay powder, the rates of ice destruction diminish. It was established that with a rise in viscosity, there is also an intensification of the ice destruction rate, if the rise in viscosity is accompanied by increase in water-output of the flushing fluid. It is namely the water-output of the flushing fluid which is one of the universal indicators for the suitability of the flushing fluid for drilling under the examined conditions.

The influence of small-scale interlayer heterogeneity on DDT removal efficiency for flushing technology

Science.gov (United States)

Wang, Xingwei; Chen, Jiajun

2017-06-01

With an aim to investigate the influence of small-scale interlayer heterogeneity on DDT removal efficiency, batch test including surfactant-stabilized foam flushing and solution flushing were carried out. Two man-made heterogeneous patterns consisting of coarse and fine quartz sand were designed to reveal the influencing mechanism. Moreover, the removal mechanism and the corresponding contribution by foam flushing were quantitatively studied. Compared with surfactant solution flushing, the DDT removal efficiency by surfactant-stabilized foam flushing increased by 9.47% and 11.28% under heterogeneous patterns 1 and 2, respectively. The DDT removal contributions of improving sweep efficiency for heterogeneous patterns 1 and 2 by foam flushing were 40.82% and 45.98%, and the contribution of dissolving capacity were 59.18% and 54.02%, respectively. The dissolving capacity of DDT played a major role in DDT removal efficiency by foam flushing under laboratory conditions. And the DDT removal contribution of significant improving sweep efficiency was higher than that of removal decline caused by weak solubilizing ability of foam film compared with solution flushing. The obtained results indicated that the difference of DDT removal efficiency by foam flushing was decreased under two different heterogeneous patterns with the increase of the contribution of improving foam flushing sweep efficiency. It suggested that foam flushing can reduce the disturbance from interlayer heterogeneity in remediating DDT contaminated heterogeneous medium.

Large-Area CVD-Grown Sub-2 V ReS2 Transistors and Logic Gates.

Science.gov (United States)

Dathbun, Ajjiporn; Kim, Youngchan; Kim, Seongchan; Yoo, Youngjae; Kang, Moon Sung; Lee, Changgu; Cho, Jeong Ho

2017-05-10

We demonstrated the fabrication of large-area ReS 2 transistors and logic gates composed of a chemical vapor deposition (CVD)-grown multilayer ReS 2 semiconductor channel and graphene electrodes. Single-layer graphene was used as the source/drain and coplanar gate electrodes. An ion gel with an ultrahigh capacitance effectively gated the ReS 2 channel at a low voltage, below 2 V, through a coplanar gate. The contact resistance of the ion gel-gated ReS 2 transistors with graphene electrodes decreased dramatically compared with the SiO 2 -devices prepared with Cr electrodes. The resulting transistors exhibited good device performances, including a maximum electron mobility of 0.9 cm 2 /(V s) and an on/off current ratio exceeding 10 4 . NMOS logic devices, such as NOT, NAND, and NOR gates, were assembled using the resulting transistors as a proof of concept demonstration of the applicability of the devices to complex logic circuits. The large-area synthesis of ReS 2 semiconductors and graphene electrodes and their applications in logic devices open up new opportunities for realizing future flexible electronics based on 2D nanomaterials.

PERBANDINGAN EFEKTIFITAS HASIL PENGGELONTORAN SEDIMEN DI WADUK CARA FLUSHING DAN SLUICING

Directory of Open Access Journals (Sweden)

Pranoto S. Atmodjo

2013-10-01

Full Text Available This study compares the effectiveness of the flushing of sediment in the reservoir by means of flushing andSluicing way, based on Physical Hydraulic Test (Model Test in the laboratory. Flushing is removingaccumulated deposited sediment. While slucing is releasing of sediment through the reservoir beforesettled or keep sediment remain in suspension and its occur during flood period. Sediments FlushEffectiveness represented by the percentage of released sediment by sediment deposited or the amount ofsediment entering the reservoir during the flushing period.The model based on the prototipe from DetailDesign of Structural Countermeasures for Sedimentation on Wonogiri Reservoir by Nippon Koei 2009.Running model duration is one hour, used free flow and submergence condition, with discharge variationQ=100, 200 and 400 m3/s. Sluicing experiments conducted with some 60 liters of sediment sprinkle evenlywide flow, and Flushing implemented by 2,00 m thickness of deposited sediment that spreaded over thereservoir bottom before running. From this research showed that Sluicing way more efficient than theflushing way, where the number of efficiency of sediment Sluicing way bigger than the efficiency offlusing way, in the running an hour in the laboratory test

Design of a spin-wave majority gate employing mode selection

Energy Technology Data Exchange (ETDEWEB)

Klingler, S., E-mail: klingler@physik.uni-kl.de; Pirro, P.; Brächer, T.; Leven, B.; Hillebrands, B.; Chumak, A. V. [Fachbereich Physik and Landesforschungszentrum OPTIMAS, Technische Universität Kaiserslautern, 67663 Kaiserslautern (Germany)

2014-10-13

The design of a microstructured, fully functional spin-wave majority gate is presented and studied using micromagnetic simulations. This all-magnon logic gate consists of three-input waveguides, a spin-wave combiner, and an output waveguide. In order to ensure the functionality of the device, the output waveguide is designed to perform spin-wave mode selection. We demonstrate that the gate evaluates the majority of the input signals coded into the spin-wave phase. Moreover, the all-magnon data processing device is used to perform logic AND-, OR-, NAND-, and NOR- operations.

Volumetric measurement of human red blood cells by MOSFET-based microfluidic gate.

Science.gov (United States)

Guo, Jinhong; Ai, Ye; Cheng, Yuanbing; Li, Chang Ming; Kang, Yuejun; Wang, Zhiming

2015-08-01

In this paper, we present a MOSFET-based (metal oxide semiconductor field-effect transistor) microfluidic gate to characterize the translocation of red blood cells (RBCs) through a gate. In the microfluidic system, the bias voltage modulated by the particles or biological cells is connected to the gate of MOSFET. The particles or cells can be detected by monitoring the MOSFET drain current instead of DC/AC-gating method across the electronic gate. Polystyrene particles with various standard sizes are utilized to calibrate the proposed device. Furthermore, RBCs from both adults and newborn blood sample are used to characterize the performance of the device in distinguishing the two types of RBCs. As compared to conventional DC/AC current modulation method, the proposed device demonstrates a higher sensitivity and is capable of being a promising platform for bioassay analysis. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Nanogranular SiO{sub 2} proton gated silicon layer transistor mimicking biological synapses

Energy Technology Data Exchange (ETDEWEB)

Liu, M. J.; Huang, G. S., E-mail: gshuang@fudan.edu.cn, E-mail: pfeng@nju.edu.cn; Guo, Q. L.; Tian, Z. A.; Li, G. J.; Mei, Y. F. [Department of Materials Science, Fudan University, Shanghai 200433 (China); Feng, P., E-mail: gshuang@fudan.edu.cn, E-mail: pfeng@nju.edu.cn; Shao, F.; Wan, Q. [School of Electronic Science and Engineering and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093 (China)

2016-06-20

Silicon on insulator (SOI)-based transistors gated by nanogranular SiO{sub 2} proton conducting electrolytes were fabricated to mimic synapse behaviors. This SOI-based device has both top proton gate and bottom buried oxide gate. Electrical transfer properties of top proton gate show hysteresis curves different from those of bottom gate, and therefore, excitatory post-synaptic current and paired pulse facilitation (PPF) behavior of biological synapses are mimicked. Moreover, we noticed that PPF index can be effectively tuned by the spike interval applied on the top proton gate. Synaptic behaviors and functions, like short-term memory, and its properties are also experimentally demonstrated in our device. Such SOI-based electronic synapses are promising for building neuromorphic systems.

Resonant Tunneling in Gated Vertical One- dimensional Structures

Science.gov (United States)

Kolagunta, V. R.; Janes, D. B.; Melloch, M. R.; Webb, K. J.

1997-03-01

Vertical sub-micron transistors incorporating resonant tunneling multiple quantum well heterostructures are interesting in applications for both multi-valued logic devices and the study of quantization effects in vertical quasi- one-, zero- dimensional structures. Earlier we have demonstrated room temperature pinch-off of the resonant peak in sub-micron vertical resonant tunneling transistors structures using a self-aligned sidewall gating technique ( V.R. Kolagunta et. al., Applied Physics Lett., 69), 374(1996). In this paper we present the study of gating effects in vertical multiple quantum well resonant tunneling transistors. Multiple well quasi-1-D sidewall gated transistors with mesa dimensions of L_x=0.5-0.9μm and L_y=10-40μm were fabricated. The quantum heterostructure in these devices consists of two non-symmetric (180 ÅÅi-GaAs wells separated from each other and from the top and bottom n^+ GaAs/contacts region using Al_0.3Ga_0.7As tunneling barriers. Room temperature pinch-off of the multiple resonant peaks similar to that reported in the case of single well devices is observed in these devices^1. Current-voltage characteristics at liquid nitrogen temperatures show splitting of the resonant peaks into sub-bands with increasing negative gate bias indicative of quasi- 1-D confinement. Room-temperature and low-temperature current-voltage measurements shall be presented and discussed.

Electrical parameters of silicon on sapphire; influence on aluminium gate MOS devices performances

International Nuclear Information System (INIS)

Suat, J.P.; Borel, J.

1976-01-01

The question is the quality level of the substrate obtained with MOS technologies on silicon on an insulating substrate. Experimental results are presented on the main electrical parameters of MOS transistors made on silicon on sapphire, e.g. mean values and spreads of: threhold voltage and surface mobilities of transistors, breakdown voltages, and leakage currents of diodes. These devices have been made in three different technologies: enhancement P. channel technology, depletion-enhancement P. channel technology, and complementary MOS technology. These technologies are all aluminium gate processes with standard design rules and 5μm channel length. Measurements show that presently available silicon on sapphire can be considered as a very suitable substrate for many MOS digital applications (but not for dynamic circuits) [fr

Amplifying genetic logic gates.

Science.gov (United States)

Bonnet, Jerome; Yin, Peter; Ortiz, Monica E; Subsoontorn, Pakpoom; Endy, Drew

2013-05-03

Organisms must process information encoded via developmental and environmental signals to survive and reproduce. Researchers have also engineered synthetic genetic logic to realize simpler, independent control of biological processes. We developed a three-terminal device architecture, termed the transcriptor, that uses bacteriophage serine integrases to control the flow of RNA polymerase along DNA. Integrase-mediated inversion or deletion of DNA encoding transcription terminators or a promoter modulates transcription rates. We realized permanent amplifying AND, NAND, OR, XOR, NOR, and XNOR gates actuated across common control signal ranges and sequential logic supporting autonomous cell-cell communication of DNA encoding distinct logic-gate states. The single-layer digital logic architecture developed here enables engineering of amplifying logic gates to control transcription rates within and across diverse organisms.

DC Characteristics of AlGaN/GaN HEMTs Using a Dual-Gate Structure.

Science.gov (United States)

Hong, Sejun; Rana, Abu ul Hassan Sarwar; Heo, Jun-Woo; Kim, Hyun-Seok

2015-10-01

Multiple techniques such as fluoride-based plasma treatment, a p-GaN or p-AlGaN gate contact, and a recessed gate structure have been employed to modulate the threshold voltage of AlGaN/GaN-based high-electron-mobility transistors (HEMTs). In this study, we present dual-gate AlGaN/GaN HEMTs grown on a Si substrate, which effectively shift the threshold voltage in the positive direction. Experimental data show that the threshold voltage is shifted from -4.2 V in a conventional single-gate HEMT to -2.8 V in dual-gate HEMTs. It is evident that a second gate helps improve the threshold voltage by reducing the two-dimensional electron gas density in the channel. Furthermore, the maximum drain current, maximum transconductance, and breakdown voltage values of a single-gate device are not significantly different from those of a dual-gate device. For the fabricated single- and dual-gate devices, the values of the maximum drain current are 430 mA/mm and 428 mA/mm, respectively, whereas the values of the maximum transconductance are 83 mS/mm and 75 mS/mm, respectively.

Effect of subdepressor clonidine on flushing reactions in rosacea. Change in malar thermal circulation index during provoked flushing reactions.

Science.gov (United States)

Wilkin, J K

1983-03-01

The effects of clonidine hydrochloride, an agent effective in suppressing other types of flushing reactions, were investigated in patients with erythematotelangiectatic rosacea. Clonidine hydrochloride, 0.05 mg, was given orally twice daily for two weeks. Mean arterial BP was not altered during clonidine treatment. Flushing reactions provoked with water at 60 degrees C, red wine, and chocolate were not suppressed during clonidine treatment. Clonidine did lead to malar hypothermia. It may be that any treatment benefit obtained from the reduction in vascular reactivity by clonidine in rosacea is offset by the malar hypothermia.

Double-gated spectral snapshots for biomolecular fluorescence

International Nuclear Information System (INIS)

Nakamura, Ryosuke; Hamada, Norio; Ichida, Hideki; Tokunaga, Fumio; Kanematsu, Yasuo

2007-01-01

A versatile method to take femtosecond spectral snapshots of fluorescence has been developed based on a double gating technique in the combination of an optical Kerr gate and an image intensifier as an electrically driven gate set in front of a charge-coupled device detector. The application of a conventional optical-Kerr-gate method is limited to molecules with the short fluorescence lifetime up to a few hundred picoseconds, because long-lifetime fluorescence itself behaves as a source of the background signal due to insufficiency of the extinction ratio of polarizers employed for the Kerr gate. By using the image intensifier with the gate time of 200 ps, we have successfully suppressed the background signal and overcome the application limit of optical-Kerr-gate method. The system performance has been demonstrated by measuring time-resolved fluorescence spectra for laser dye solution and the riboflavin solution as a typical sample of biomolecule

Surfactant-enhanced flushing enhances colloid transport and alters macroporosity in diesel-contaminated soil.

Science.gov (United States)

Guan, Zhuo; Tang, Xiang-Yu; Nishimura, Taku; Katou, Hidetaka; Liu, Hui-Yun; Qing, Jing

2018-02-01

Soil contamination by diesel has been often reported as a result of accidental spillage, leakage and inappropriate use. Surfactant-enhanced soil flushing is a common remediation technique for soils contaminated by hydrophobic organic chemicals. In this study, soil flushing with linear alkylbenzene sulfonates (LAS, an anionic surfactant) was conducted for intact columns (15cm in diameter and 12cm in length) of diesel-contaminated farmland purple soil aged for one year in the field. Dynamics of colloid concentration in column outflow during flushing, diesel removal rate and resulting soil macroporosity change by flushing were analyzed. Removal rate of n-alkanes (representing the diesel) varied with the depth of the topsoil in the range of 14%-96% while the n-alkanes present at low concentrations in the subsoil were completely removed by LAS-enhanced flushing. Much higher colloid concentrations and larger colloid sizes were observed during LAS flushing in column outflow compared to water flushing. The X-ray micro-computed tomography analysis of flushed and unflushed soil cores showed that the proportion of fine macropores (30-250μm in diameter) was reduced significantly by LAS flushing treatment. This phenomenon can be attributed to enhanced clogging of fine macropores by colloids which exhibited higher concentration due to better dispersion by LAS. It can be inferred from this study that the application of LAS-enhanced flushing technique in the purple soil region should be cautious regarding the possibility of rapid colloid-associated contaminant transport via preferential pathways in the subsurface and the clogging of water-conducting soil pores. Copyright © 2017. Published by Elsevier B.V.

Integrated-optics heralded controlled-NOT gate for polarization-encoded qubits

Science.gov (United States)

Zeuner, Jonas; Sharma, Aditya N.; Tillmann, Max; Heilmann, René; Gräfe, Markus; Moqanaki, Amir; Szameit, Alexander; Walther, Philip

2018-03-01

Recent progress in integrated-optics technology has made photonics a promising platform for quantum networks and quantum computation protocols. Integrated optical circuits are characterized by small device footprints and unrivalled intrinsic interferometric stability. Here, we take advantage of femtosecond-laser-written waveguides' ability to process polarization-encoded qubits and present an implementation of a heralded controlled-NOT gate on chip. We evaluate the gate performance in the computational basis and a superposition basis, showing that the gate can create polarization entanglement between two photons. Transmission through the integrated device is optimized using thermally expanded core fibers and adiabatically reduced mode-field diameters at the waveguide facets. This demonstration underlines the feasibility of integrated quantum gates for all-optical quantum networks and quantum repeaters.

Effects of combined gate and ohmic recess on GaN HEMTs

Directory of Open Access Journals (Sweden)

Sunil Kumar

2016-09-01

Full Text Available AlGaN/GaN, because of their superior material properties, are most suitable semiconductor material for High Electron Mobility Transistors (HEMTs. In this work we investigated the hidden physics behind these materials and studied the effect of recess technology in AlGaN/GaN HEMTs. The device under investigation is simulated for different recess depth using Silvaco-Atlas TCAD. Recess technology improves the performance of AlGaN/GaN HEMTs. We considered three kinds of recess technology gate, ohmic and combination of gate and ohmic. Gate recess improves transconductance gm but it reduces the drain current Id of the device under investigation. Ohmic recess improves the transconductance gm but it introduces leakage current Ig in the device. In order to use AlGaN/GaN for high voltage operation, both the transconductance and the drain current should be reasonably high which is obtained by combining both gate and ohmic recess technologies. A good balance in transconductance and drain current is achieved by combining both gate and ohmic recess technologies without any leakage current.

High-Performance Ink-Synthesized Cu-Gate Thin-Film Transistor with Diffusion Barrier Formation

Science.gov (United States)

Woo, Whang Je; Nam, Taewook; Oh, Il-Kwon; Maeng, Wanjoo; Kim, Hyungjun

2018-05-01

The improved electrical properties of Cu-gate thin-film transistors (TFTs) using an ink-synthesizing process were studied; this technology enables a low-cost and large area process for the display industry. We investigated the film properties and the effects of the ink-synthesized Cu layer in detail with respect to device characteristics. The mobility and reliability of the devices were significantly improved by applying a diffusion barrier at the interface between the Cu gate and the gate insulator. By using a TaN diffusion barrier layer, considerably improved and stabilized ink-Cu gated TFTs could be realized, comparable to sputtered-Cu gated TFTs under positive bias temperature stress measurements.

High-Performance Ink-Synthesized Cu-Gate Thin-Film Transistor with Diffusion Barrier Formation

Science.gov (United States)

Woo, Whang Je; Nam, Taewook; Oh, Il-Kwon; Maeng, Wanjoo; Kim, Hyungjun

2018-02-01

The improved electrical properties of Cu-gate thin-film transistors (TFTs) using an ink-synthesizing process were studied; this technology enables a low-cost and large area process for the display industry. We investigated the film properties and the effects of the ink-synthesized Cu layer in detail with respect to device characteristics. The mobility and reliability of the devices were significantly improved by applying a diffusion barrier at the interface between the Cu gate and the gate insulator. By using a TaN diffusion barrier layer, considerably improved and stabilized ink-Cu gated TFTs could be realized, comparable to sputtered-Cu gated TFTs under positive bias temperature stress measurements.

Gate-Driven Pure Spin Current in Graphene

Science.gov (United States)

Lin, Xiaoyang; Su, Li; Si, Zhizhong; Zhang, Youguang; Bournel, Arnaud; Zhang, Yue; Klein, Jacques-Olivier; Fert, Albert; Zhao, Weisheng

2017-09-01

The manipulation of spin current is a promising solution for low-power devices beyond CMOS. However, conventional methods, such as spin-transfer torque or spin-orbit torque for magnetic tunnel junctions, suffer from large power consumption due to frequent spin-charge conversions. An important challenge is, thus, to realize long-distance transport of pure spin current, together with efficient manipulation. Here, the mechanism of gate-driven pure spin current in graphene is presented. Such a mechanism relies on the electrical gating of carrier-density-dependent conductivity and spin-diffusion length in graphene. The gate-driven feature is adopted to realize the pure spin-current demultiplexing operation, which enables gate-controllable distribution of the pure spin current into graphene branches. Compared with the Elliott-Yafet spin-relaxation mechanism, the D'yakonov-Perel spin-relaxation mechanism results in more appreciable demultiplexing performance. The feature of the pure spin-current demultiplexing operation will allow a number of logic functions to be cascaded without spin-charge conversions and open a route for future ultra-low-power devices.

Analyzing Single-Event Gate Ruptures In Power MOSFET's

Science.gov (United States)

Zoutendyk, John A.

1993-01-01

Susceptibilities of power metal-oxide/semiconductor field-effect transistors (MOSFET's) to single-event gate ruptures analyzed by exposing devices to beams of energetic bromine ions while applying appropriate bias voltages to source, gate, and drain terminals and measuring current flowing into or out of each terminal.

Precise linear gating circuit on integrated microcircuits

Energy Technology Data Exchange (ETDEWEB)

Butskii, V.V.; Vetokhin, S.S.; Reznikov, I.V.

Precise linear gating circuit on four microcircuits is described. A basic flowsheet of the gating circuit is given. The gating circuit consists of two input differential cascades total load of which is two current followers possessing low input and high output resistances. Follower outlets are connected to high ohmic dynamic load formed with a current source which permits to get high amplification (>1000) at one cascade. Nonlinearity amounts to <0.1% in the range of input signal amplitudes of -10-+10 V. Front duration for an output signal with 10 V amplitude amounts to 100 ns. Attenuation of input signal with a closed gating circuit is 60 db. The gating circuits described is used in the device intended for processing of scintillation sensor signals.

A 1T Dynamic Random Access Memory Cell Based on Gated Thyristor with Surrounding Gate Structure for High Scalability.

Science.gov (United States)

Kim, Hyungjin; Kim, Sihyun; Kim, Hyun-Min; Lee, Kitae; Kim, Sangwan; Pak, Byung-Gook

2018-09-01

In this study, we investigate a one-transistor (1T) dynamic random access memory (DRAM) cell based on a gated-thyristor device utilizing voltage-driven bistability to enable high-speed operations. The structural feature of the surrounding gate using a sidewall provides high scalability with regard to constructing an array architecture of the proposed devices. In addition, the operation mechanism, I-V characteristics, DRAM operations, and bias dependence are analyzed using a commercial device simulator. Unlike conventional 1T DRAM cells utilizing the floating body effect, excess carriers which are required to be stored to make two different states are not generated but injected from the n+ cathode region, giving the device high-speed operation capabilities. The findings here indicate that the proposed DRAM cell offers distinct advantages in terms of scalability and high-speed operations.

Post-LOCA core flushing system

International Nuclear Information System (INIS)

Boyajian, J.D.; Weinberger, P.A.

1980-01-01

A system is disclosed for flushing the core of a nuclear reactor after a loss-of-coolant accident. A pump causes flow of liquid-phase fluid from the containment-vessel sump. This flow is used to provide the motivating force for an eductor that causes suction at the hot log of the reactor. The eductor suction can draw gas-phase coolant out of the hot leg. As a result, it can reduce pressure which may be preventing the flow of liquid-phase coolant out of the hot leg. By causing liquid-phase flow through the reactor, the system ensures that particles and boric acid are flushed out of the core. The system thereby eliminates the build-up of particles and the concentrations of boric acid in the core that could result if the coolant were to leave the pressure vessel exclusively in the gas phase. 9 claims

W-320 waste retrieval sluicing system transfer line flushing volume and frequency calculation

International Nuclear Information System (INIS)

Bailey, J.W.

1997-01-01

The calculations contained in this analysis document establish the technical basis for the volume, frequency, and flushing fluid to be utilized for routine Waste Retrieval Sluicing System (WRSS) process line flushes. The WRSS was installed by Project W-320, Tank 241-C-106 Sluicing. The double contained pipelines being flushed have 4 inch stainless steel primary pipes. The flushes are intended to prevent hydrogen buildup in the transfer lines and to provide ALARA conditions for maintenance personnel

Volatile and Nonvolatile Characteristics of Asymmetric Dual-Gate Thyristor RAM with Vertical Structure.

Science.gov (United States)

Kim, Hyun-Min; Kwon, Dae Woong; Kim, Sihyun; Lee, Kitae; Lee, Junil; Park, Euyhwan; Lee, Ryoongbin; Kim, Hyungjin; Kim, Sangwan; Park, Byung-Gook

2018-09-01

In this paper, the volatile and nonvolatile characteristics of asymmetric dual-gate thyristor random access memory (TRAM) are investigated using the technology of a computer-aided design (TCAD) simulation. Owing to the use of two independent gates having different gate dielectric layers, volatile and nonvolatile memory functions can be realized in a single device. The first gate with a silicon oxide layer controls the one-transistor dynamic random access memory (1T-DRAM) characteristics of the device. From the simulation results, a rapid write speed (107) can be achieved. The second gate, whose dielectric material is composed of oxide/nitride/oxide (O/N/O) layers, is used to implement the nonvolatile property by trapping charges in the nitride layer. In addition, this offers an advantage when processing the 3D-stack memory application, as the device has a vertical channel structure with polycrystalline silicon.

Instrumentation for Gate Current Noise Measurements on sub-100 nm MOS Transistors

CERN Document Server

Gaioni, L; Ratti, L; Re, V; Speziali, V; Traversi, G

2008-01-01

This work describes a measuring system that was developed to characterize the gate current noise performances of CMOS devices with minimum feature size in the 100 nm span. These devices play an essential role in the design of present daymixedsignal integrated circuits, because of the advantages associated with the scaling process. The reduction in the gate oxide thickness brought about by CMOS technology downscaling leads to a non-negligible gate current due to direct tunneling phenomena; this current represents a noise source which requires an accurate characterization for optimum analog design. In this paper, two instruments able to perform measurements in two different ranges of gate current values will be discussed. Some of the results of gate current noise characterization will also be presented.

Channel mobility degradation and charge trapping in high-k/metal gate NMOSFETs

International Nuclear Information System (INIS)

Mathew, Shajan; Bera, L.K.; Balasubramanian, N.; Joo, M.S.; Cho, B.J.

2004-01-01

NMOSFETs with Metalo-Organic Chemical Vapor Deposited (MOCVD) HfAlO gate dielectric and TiN metal gate have been fabricated. Channel electron mobility was measured using the split-CV method and compared with SiO 2 devices. All high-k devices showed lower mobility compared with SiO 2 reference devices. High-k MOSFETs exhibited significant charge trapping and threshold instability. Threshold voltage recovery with time was studied on devices with oxide/nitride interfacial layer between high-k film and silicon substrate

Ultra-low specific on-resistance SOI double-gate trench-type MOSFET

International Nuclear Information System (INIS)

Lei Tianfei; Luo Xiaorong; Ge Rui; Chen Xi; Wang Yuangang; Yao Guoliang; Jiang Yongheng; Zhang Bo; Li Zhaoji

2011-01-01

An ultra-low specific on-resistance (R on,sp ) silicon-on-insulator (SOI) double-gate trench-type MOSFET (DG trench MOSFET) is proposed. The MOSFET features double gates and an oxide trench: the oxide trench is in the drift region, one trench gate is inset in the oxide trench and one trench gate is extended into the buried oxide. Firstly, the double gates reduce R on,sp by forming dual conduction channels. Secondly, the oxide trench not only folds the drift region, but also modulates the electric field, thereby reducing device pitch and increasing the breakdown voltage (BV). ABV of 93 V and a R on,sp of 51.8 mΩ·mm 2 is obtained for a DG trench MOSFET with a 3 μm half-cell pitch. Compared with a single-gate SOI MOSFET (SG MOSFET) and a single-gate SOI MOSFET with an oxide trench (SG trench MOSFET), the R on,sp of the DG trench MOSFET decreases by 63.3% and 33.8% at the same BV, respectively. (semiconductor devices)

Flushing Enhancement with Vibration and Pulsed Current in Electrochemical Machining

Directory of Open Access Journals (Sweden)

Zhujian Feng

2017-12-01

Full Text Available This research aims to understand flushing of by-products in electrochemical machining (ECM by modeling and experimentally verifying mechanism of particle transport in inter-electrode gap under low frequency vibration. A series of hole were drilled on steel plates to evaluate the effect of vibration on material removal rate and hole quality. Infinite focus optical technique was used to capture and analyze the three-dimensional images of ECM'ed features. Experimental results showed that maximum machining depth and minimum taper angle can be achieved when vibrating the workpiece at 40 Hz and 10 µm amplitude. Simulation results showed that the highest average flushing speed of 0.4 m/s was obtained at this vibration frequency and amplitude. Machining depth and material removal rate has a positive correlation with the average flushing speed. Sharper ECM’ed profile is obtained since the taper angle is favorably reduced at high average flushing speed.

Preoperational test report, cross-site transfer water flush system (POTP-001)

International Nuclear Information System (INIS)

Parsons, G.L.

1998-01-01

This report documents the results of the testing performed per POTP-001, for the Cross-Site Transfer Water Flush System. (HNF-1552, Rev. 0) The Flush System consists of a 47,000 gallon tank (302C), a 20 hp pump, two 498kW heaters, a caustic addition pump, various valves, instruments, and piping. The purpose of this system is to provide flush water at 140 F, 140gpm, and pH 11-12 for the Cross-Site Transfer System operation

Design and Optimization of 22 nm Gate Length High-k/Metal gate NMOS Transistor

International Nuclear Information System (INIS)

Afifah Maheran A H; Menon P S; Shaari, S; Elgomati, H A; Salehuddin, F; Ahmad, I

2013-01-01

In this paper, we invented the optimization experiment design of a 22 nm gate length NMOS device which uses a combination of high-k material and metal as the gate which was numerically developed using an industrial-based simulator. The high-k material is Titanium dioxide (TiO 2 ), while the metal gate is Tungsten Silicide (WSi x ). The design is optimized using the L9 Taguchi method to get the optimum parameter design. There are four process parameters and two noise parameters which were varied for analyzing the effect on the threshold voltage (V th ). The objective of this experiment is to minimize the variance of V th where Taguchi's nominal-the-best signal-to-noise ratio (S/N Ratio) was used. The best settings of the process parameters were determined using Analysis of Mean (ANOM) and analysis of variance (ANOVA) to reduce the variability of V th . The results show that the V th values have least variance and the mean value can be adjusted to 0.306V ±0.027 for the NMOS device which is in line with projections by the ITRS specifications.

Comparison of gate dielectric plasma damage from plasma-enhanced atomic layer deposited and magnetron sputtered TiN metal gates

Energy Technology Data Exchange (ETDEWEB)

Brennan, Christopher J.; Neumann, Christopher M.; Vitale, Steven A., E-mail: steven.vitale@ll.mit.edu [Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, Massachusetts 02420 (United States)

2015-07-28

Fully depleted silicon-on-insulator transistors were fabricated using two different metal gate deposition mechanisms to compare plasma damage effects on gate oxide quality. Devices fabricated with both plasma-enhanced atomic-layer-deposited (PE-ALD) TiN gates and magnetron plasma sputtered TiN gates showed very good electrostatics and short-channel characteristics. However, the gate oxide quality was markedly better for PE-ALD TiN. A significant reduction in interface state density was inferred from capacitance-voltage measurements as well as a 1200× reduction in gate leakage current. A high-power magnetron plasma source produces a much higher energetic ion and vacuum ultra-violet (VUV) photon flux to the wafer compared to a low-power inductively coupled PE-ALD source. The ion and VUV photons produce defect states in the bulk of the gate oxide as well as at the oxide-silicon interface, causing higher leakage and potential reliability degradation.

An Experimental Study of Two-Phase Pulse Flushing Technology in Water Distribution Systems

Directory of Open Access Journals (Sweden)

Zhaozhao Tang

2017-12-01

Full Text Available The deterioration of drinking water during distribution process is caused by many factors. The microorganisms and substances peeling off from the “growth-ring” make the secondary pollution in drinking water distribution systems. To reduce the secondary pollution, two-phase pulse flushing technology is introduced to quickly remove the “growth-ring”. In this study, experiment is undertaken for investigating the efficiency of the two-phase pulse flushing and finding the best setting combination. A case study is undertaken to compare the efficiencies between the two-phase pulse and the single-phase flushing. The best setting combination of the two-phase pulse flushing is at the frequency 4 s–6 s (air inflow time is 4 s and air cut off time is 6 s and the round air inflow nozzle is set at the bottom of the pipe. Two-phase pulse flushing technology can save 95% of water and 6 h 40 min flushing time.

Design Principles of A Sigma-delta Flux-gate Magnetometer

Science.gov (United States)

Magnes, W.; Valavanoglou, A.; Pierce, D.; Frank, A.; Schwingenschuh, K.

A state-of-the-art flux-gate magnetometer is characterised by magnetic field resolution of several pT in a wide frequency range, low power consumption, low weight and high robustness. Therefore, flux-gate magnetometers are frequently used for ground-based Earth's field observation as well as for measurements aboard scientific space missions. But both traditional analogue and recently developed digital flux-gate magnetometers need low power and high-resolution analogue-to-digital converters for signal quan- tization. The disadvantage of such converters is the low radiation hardness. This fact has led to the idea of combining a traditional analogue flux-gate regulation circuit with that of a discretely realized sigma-delta converter in order to get a radiation hard and further miniaturized magnetometer. The name sigma-delta converter is derived from putting an integrator in front of a 1-bit delta modulator which forms the sigma-delta loop. It is followed by a digital decimation filter realized in a field-programmable gate array (FPGA). The flux-gate regulation and the sigma-delta loop are quite similar in the way of realizing the integrator and feedback circuit, which makes it easy to com- bine these two systems. The presented talk deals with the design principles and the results of a first bread board model.

Coherent molecular transistor: control through variation of the gate wave function.

Science.gov (United States)

Ernzerhof, Matthias

2014-03-21

In quantum interference transistors (QUITs), the current through the device is controlled by variation of the gate component of the wave function that interferes with the wave function component joining the source and the sink. Initially, mesoscopic QUITs have been studied and more recently, QUITs at the molecular scale have been proposed and implemented. Typically, in these devices the gate lead is subjected to externally adjustable physical parameters that permit interference control through modifications of the gate wave function. Here, we present an alternative model of a molecular QUIT in which the gate wave function is directly considered as a variable and the transistor operation is discussed in terms of this variable. This implies that we specify the gate current as well as the phase of the gate wave function component and calculate the resulting current through the source-sink channel. Thus, we extend on prior works that focus on the phase of the gate wave function component as a control parameter while having zero or certain discrete values of the current. We address a large class of systems, including finite graphene flakes, and obtain analytic solutions for how the gate wave function controls the transistor.

Coherent molecular transistor: Control through variation of the gate wave function

International Nuclear Information System (INIS)

Ernzerhof, Matthias

2014-01-01

In quantum interference transistors (QUITs), the current through the device is controlled by variation of the gate component of the wave function that interferes with the wave function component joining the source and the sink. Initially, mesoscopic QUITs have been studied and more recently, QUITs at the molecular scale have been proposed and implemented. Typically, in these devices the gate lead is subjected to externally adjustable physical parameters that permit interference control through modifications of the gate wave function. Here, we present an alternative model of a molecular QUIT in which the gate wave function is directly considered as a variable and the transistor operation is discussed in terms of this variable. This implies that we specify the gate current as well as the phase of the gate wave function component and calculate the resulting current through the source-sink channel. Thus, we extend on prior works that focus on the phase of the gate wave function component as a control parameter while having zero or certain discrete values of the current. We address a large class of systems, including finite graphene flakes, and obtain analytic solutions for how the gate wave function controls the transistor

The effect of gate length on SOI-MOSFETS operation | Baedi ...

African Journals Online (AJOL)

The effect of gate length on the operation of silicon-on-insulator (SOI) MOSFET structure with a layer of buried silicon oxide added to isolate the device body has been simulated. Three transistors with gate lengths of 100, 200 and 500 nm were simulated. Simulations showed that with a fixed channel length, when the gate ...

Proposal for multiple-valued logic in gated semiconducting carbon nanotubes

Science.gov (United States)

Dragoman, D.; Dragoman, M.

2006-06-01

The proposal for an implementation of multi-valued logical devices based on excited states of a single quantum well is analysed for various configurations of carbon nanotube quantum wells, which were already experimentally demonstrated at room temperature. The best configuration, which gathers all the advantages of multi-valued logic, is a gated carbon nanotube device where the quantum well is imprinted via DC voltages applied on gate electrodes.

Hetero-gate-dielectric double gate junctionless transistor (HGJLT) with reduced band-to-band tunnelling effects in subthreshold regime

International Nuclear Information System (INIS)

Ghosh, Bahniman; Mondal, Partha; Akram, M. W.; Bal, Punyasloka; Salimath, Akshay Kumar

2014-01-01

We propose a hetero-gate-dielectric double gate junctionless transistor (HGJLT), taking high-k gate insulator at source side and low-k gate insulator at drain side, which reduces the effects of band-to-band tunnelling (BTBT) in the sub-threshold region. A junctionless transistor (JLT) is turned off by the depletion of carriers in the highly doped thin channel (device layer) which results in a significant band overlap between the valence band of the channel region and the conduction band of the drain region, due to off-state drain bias, that triggers electrons to tunnel from the valence band of the channel region to the conduction band of the drain region leaving behind holes in the channel. These effects of band-to-band tunnelling increase the sub-threshold leakage current, and the accumulation of holes in the channel forms a parasitic bipolar junction transistor (n–p–n BJT for channel JLT) in the lateral direction by the source (emitter), channel (base) and drain (collector) regions in JLT structure in off-state. The proposed HGJLT reduces the subthreshold leakage current and suppresses the parasitic BJT action in off-state by reducing the band-to-band tunnelling probability. (semiconductor devices)

Analysis of gate underlap channel double gate MOS transistor for electrical detection of bio-molecules

Science.gov (United States)

Ajay; Narang, Rakhi; Saxena, Manoj; Gupta, Mridula

2015-12-01

In this paper, an analytical model for gate drain underlap channel Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor (DG-MOSFET) for label free electrical detection of biomolecules has been proposed. The conformal mapping technique has been used to derive the expressions for surface potential, lateral electric field, energy bands (i.e. conduction and valence band) and threshold voltage (Vth). Subsequently a full drain current model to analyze the sensitivity of the biosensor has been developed. The shift in the threshold voltage and drain current (after the biomolecules interaction with the gate underlap channel region of the MOS transistor) has been used as a sensing metric. All the characteristic trends have been verified through ATLAS (SILVACO) device simulation results.

Sidewall gated double well quasi-one-dimensional resonant tunneling transistors

Science.gov (United States)

Kolagunta, V. R.; Janes, D. B.; Melloch, M. R.; Youtsey, C.

1997-12-01

We present gating characteristics of submicron vertical resonant tunneling transistors in double quantum well heterostructures. Current-voltage characteristics at room temperature and 77 K for devices with minimum feature widths of 0.9 and 0.7 μm are presented and discussed. The evolution of the I-V characteristics with increasing negative gate biases is related to the change in the lateral confinement, with a transition from a large area 2D to a quasi-1D. Even gating of multiple wells and lateral confinement effects observable at 77 K make these devices ideally suited for applications in multi-valued logic systems and low-dimensional structures.

Evaluation of Karl Storz CMAC TipTM Device Versus Traditional Airway Suction in a Cadaver Model

Directory of Open Access Journals (Sweden)

Demis N. Lipe

2014-07-01

Full Text Available Introduction: We compared the efficacy of Karl Storz CMAC TipTM with inline suction to CMAC with traditional suction device in cadaveric models simulating difficult airways, using media mimicking pulmonary edema and vomit. Methods: This was a prospective, cohort study in which we invited emergency medicine faculty and residents to participate. Each participant intubated 2 cadavers (one with simulated pulmonary edema and one with simulated vomit, using CMAC with inline suction and CMAC with traditional suction. Thirty emergency medicine providers performed 4 total intubations each in a crossover trial comparing the CMAC with inline suction and CMAC with traditional suction. Two intubations were performed with simulated vomit and two with simulated pulmonary edema. The primary outcome was time to successful intubation; and the secondary outcome was proportion of successful intubation. Results: The median time to successful intubation using the CMAC with inline suction versus traditional suction in the pulmonary edema group was 29s and 30s respectively (p=0.54. In the vomit simulation, the median time to successful intubation was 40s using the CMAC with inline suction and 41s using the CMAC with traditional suction (p=0.70. There were no significant differences in time to successful intubation between the 2 devices. Similarly, the proportions of successful intubation were also not statistically significant between the 2 devices. The proportions of successful intubations using the inline suction were 96.7% and 73.3%, for the pulmonary edema and vomit groups, respectively. Additionally using the handheld suction device, the proportions for the pulmonary edema and vomit group were 100% and 66.7%, respectively. Conclusion: CMAC with inline suction was no different than CMAC with traditional suction and was associated with no statistically significant differences in median time to intubation or proportion of successful intubations. [West J Emerg Med

Quantum logic gates based on ballistic transport in graphene

Energy Technology Data Exchange (ETDEWEB)

Dragoman, Daniela [Faculty of Physics, University of Bucharest, P.O. Box MG-11, 077125 Bucharest (Romania); Academy of Romanian Scientists, Splaiul Independentei 54, 050094 Bucharest (Romania); Dragoman, Mircea, E-mail: mircea.dragoman@imt.ro [National Institute for Research and Development in Microtechnology (IMT), P.O. Box 38-160, 023573 Bucharest (Romania)

2016-03-07

The paper presents various configurations for the implementation of graphene-based Hadamard, C-phase, controlled-NOT, and Toffoli gates working at room temperature. These logic gates, essential for any quantum computing algorithm, involve ballistic graphene devices for qubit generation and processing and can be fabricated using existing nanolithographical techniques. All quantum gate configurations are based on the very large mean-free-paths of carriers in graphene at room temperature.

A combined process coupling phytoremediation and in situ flushing for removal of arsenic in contaminated soil.

Science.gov (United States)

Yan, Xiulan; Liu, Qiuxin; Wang, Jianyi; Liao, Xiaoyong

2017-07-01

Phytoremediation and soil washing are both potentially useful for remediating arsenic (As)-contaminated soils. We evaluated the effectiveness of a combined process coupling phytoremediation and in situ soil flushing for removal of As in contaminated soil through a pilot study. The results showed that growing Pteris vittata L. (P.v.) accompanied by soil flushing of phosphate (P.v./Flushing treatment) could significantly decrease the total As concentration of soil over a 37day flushing period compared with the single flushing (Flushing treatment). The P.v./Flushing treatment removed 54.04% of soil As from contaminated soil compared to 47.16% in Flushing treatment, suggesting that the growth of P. vittata was beneficial for promoting the removal efficiency. We analyzed the As fractionation in soil and As concentration in soil solution to reveal the mechanism behind this combined process. Results showed that comparing with the control treatment, the percent of labile arsenate fraction significantly increased by 17% under P.v./Flushing treatment. As concentration in soil solution remained a high lever during the middle and later periods (51.26-56.22mg/L), which was significantly higher than the Flushing treatment. Although soil flushing of phosphate for more than a month, P. vittata still had good accumulation and transfer capacity of As of the soil. The results of the research revealed that combination of phytoremediation and in situ soil flushing is available to remediate As-contaminated soils. Copyright © 2016. Published by Elsevier B.V.

A novel hetero-material gate-underlap electrically doped TFET for improving DC/RF and ambipolar behaviour

Science.gov (United States)

Yadav, Shivendra; Sharma, Dheeraj; Chandan, Bandi Venkata; Aslam, Mohd; Soni, Deepak; Sharma, Neeraj

2018-05-01

In this article, the impact of gate-underlap with hetero material (low band gap) has been investigated in terms of DC and Analog/RF parameters by proposed device named as hetero material gate-underlap electrically doped TFET (HM-GUL-ED-TFET). Gate-underlap resolves the problem of ambipolarity, gate leakage current (Ig) and slightly improves the gate to drain capacitance, but DC performance is almost unaffected. Further, the use of low band gap material (Si0.5 Ge) in proposed device causes a drastic improvement in the DC as well as RF figures of merit. We have investigated the Si0.5 Ge as a suitable candidate among different low band gap materials. In addition, the sensitivity of gate-underlap in terms of gate to drain inversion and parasitic capacitances has been studied for HM-GUL-ED-TFET. Further, relatively it is observed that gate-underlap is a better way than drain-underlap in the proposed structure to improve Analog/RF performances without degrading the DC parameters of device. Additionally, hetero-junction alignment analysis has been done for fabrication feasibility.

Polycrystalline diamond RF MOSFET with MoO3 gate dielectric

Directory of Open Access Journals (Sweden)

Zeyang Ren

2017-12-01

Full Text Available We report the radio frequency characteristics of the diamond metal-oxide-semiconductor field effect transistor with MoO3 gate dielectric for the first time. The device with 2-μm gate length was fabricated on high quality polycrystalline diamond. The maximum drain current of 150 mA/mm at VGS = -5 V and the maximum transconductance of 27 mS/mm were achieved. The extrinsic cutoff frequency of 1.2 GHz and the maximum oscillation frequency of 1.9 GHz have been measured. The moderate frequency characteristics are attributed to the moderate transconductance limited by the series resistance along the channel. We expect that the frequency characteristics of the device can be improved by increasing the magnitude of gm, or fundamentally decreasing the gate-controlled channel resistance and series resistance along the channel, and down-scaling the gate length.

An analytical gate tunneling current model for MOSFETs

Energy Technology Data Exchange (ETDEWEB)

Kazerouni, Iman Abaspur, E-mail: imanabaspur@gmail.com; Hosseini, Seyed Ebrahim [Sabzevar Tarbiat Moallem University, Electrical and Computer Department (Iran, Islamic Republic of)

2012-03-15

Gate tunneling current of MOSFETs is an important factor in modeling ultra small devices. In this paper, gate tunneling in present-generation MOSFETs is studied. In the proposed model, we calculate the electron wave function at the semiconductor-oxide interface and inversion charge by treating the inversion layer as a potential well, including some simplifying assumptions. Then we compute the gate tunneling current using the calculated wave function. The proposed model results have an excellent agreement with experimental results in the literature.

Lithium ion intercalation in thin crystals of hexagonal TaSe2 gated by a polymer electrolyte

Science.gov (United States)

Wu, Yueshen; Lian, Hailong; He, Jiaming; Liu, Jinyu; Wang, Shun; Xing, Hui; Mao, Zhiqiang; Liu, Ying

2018-01-01

Ionic liquid gating has been used to modify the properties of layered transition metal dichalcogenides (TMDCs), including two-dimensional (2D) crystals of TMDCs used extensively recently in the device work, which has led to observations of properties not seen in the bulk. The main effect comes from the electrostatic gating due to the strong electric field at the interface. In addition, ionic liquid gating also leads to ion intercalation when the ion size of the gate electrolyte is small compared to the interlayer spacing of TMDCs. However, the microscopic processes of ion intercalation have rarely been explored in layered TMDCs. Here, we employed a technique combining photolithography device fabrication and electrical transport measurements on the thin crystals of hexagonal TaSe2 using multiple channel devices gated by a polymer electrolyte LiClO4/Polyethylene oxide (PEO). The gate voltage and time dependent source-drain resistances of these thin crystals were used to obtain information on the intercalation process, the effect of ion intercalation, and the correlation between the ion occupation of allowed interstitial sites and the device characteristics. We found a gate voltage controlled modulation of the charge density waves and a scattering rate of charge carriers. Our work suggests that ion intercalation can be a useful tool for layered materials engineering and 2D crystal device design.

Fluorine-plasma surface treatment for gate forward leakage current reduction in AlGaN/GaN HEMTs

International Nuclear Information System (INIS)

Chen Wanjun; Zhang Jing; Zhang Bo; Chen, Kevin Jing

2013-01-01

The gate forward leakage current in AlGaN/GaN high electron mobility transistors (HEMTs) is investigated. It is shown that the current which originated from the forward biased Schottky-gate contributed to the gate forward leakage current. Therefore, a fluorine-plasma surface treatment is presented to induce the negative ions into the AlGaN layer which results in a higher metal—semiconductor barrier. Consequently, the gate forward leakage current shrinks. Experimental results confirm that the gate forward leakage current is decreased by one order magnitude lower than that of HEMT device without plasma treatment. In addition, the DC characteristics of the HEMT device with plasma treatment have been studied. (semiconductor devices)

Design and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS

KAUST Repository

Dadgour, Hamed F.

2010-01-01

Nano-Electro-Mechanical Switches (NEMS) are among the most promising emerging devices due to their near-zero subthreshold-leakage currents. This paper reports device fabrication and modeling, as well as novel logic gate design using "laterally-actuated double-electrode NEMS" structures. The new device structure has several advantages over existing NEMS architectures such as being immune to impact bouncing and release vibrations (unlike a vertically-actuated NEMS) and offer higher flexibility to implement compact logic gates (unlike a single-electrode NEMS). A comprehensive analytical framework is developed to model different properties of these devices by solving the Euler-Bernoulli\\'s beam equation. The proposed model is validated using measurement data for the fabricated devices. It is shown that by ignoring the non-uniformity of the electrostatic force distribution, the existing models "underestimate" the actual value of Vpull-in and Vpull-out. Furthermore, novel energy efficient NEMS-based circuit topologies are introduced to implement compact inverter, NAND, NOR and XOR gates. For instance, the proposed XOR gate can be implemented by using only two NEMS devices compared to that of a static CMOS-based XOR gate that requires at least 10 transistors. © Copyright 2010 ACM.

Carbon Dioxide Flush of an Integrated Minimized Perfusion Circuit Prior to Priming Prevents Spontaneous Air Release Into the Arterial Line During Clinical Use.

Science.gov (United States)

Stehouwer, Marco C; de Vroege, Roel; Hoohenkerk, Gerard J F; Hofman, Frederik N; Kelder, Johannes C; Buchner, Bas; de Mol, Bastian A; Bruins, Peter

2017-11-01

Recently, an oxygenator with an integrated centrifugal blood pump (IP) was designed to minimize priming volume and to reduce blood foreign surface contact even further. The use of this oxygenator with or without integrated arterial filter was compared with a conventional oxygenator and nonintegrated centrifugal pump. To compare the air removal characteristics 60 patients undergoing coronary artery bypass grafting were alternately assigned into one of three groups to be perfused with a minimized extracorporeal circuit either with the conventional oxygenator, the oxygenator with IP, or the oxygenator with IP plus integrated arterial filter (IAF). Air entering and leaving the three devices was measured accurately with a bubble counter during cardiopulmonary bypass. No significant differences between all groups were detected, considering air entering the devices. Our major finding was that in both integrated devices groups incidental spontaneous release of air into the arterial line in approximately 40% of the patients was observed. Here, detectable bolus air (>500 µm) was shown in the arterial line, whereas in the minimal extracorporeal circulation circuit (MECC) group this phenomenon was not present. We decided to conduct an amendment of the initial design with METC-approval. Ten patients were assigned to be perfused with an oxygenator with IP and IAF. Importantly, the integrated perfusion systems used in these patients were flushed with carbon dioxide (CO 2 ) prior to priming of the systems. In the group with CO 2 flush no spontaneous air release was observed in all cases and this was significantly different from the initial study with the group with the integrated device and IAF. This suggests that air spilling may be caused by residual air in the integrated device. In conclusion, integration of a blood pump may cause spontaneous release of large air bubbles (>500 µm) into the arterial line, despite the presence of an integrated arterial filter. CO 2 flushing of

Serializing off-the-shelf MOSFETs by Magnetically Coupling Their Gate Electrodes

DEFF Research Database (Denmark)

Dimopoulos, Emmanouil; Munk-Nielsen, Stig

2013-01-01

While the semiconductor industry struggles with the inherent trade-offs of solid-state devices, serialization of power switches, like the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) or the Insulated Gate Bipolar Transistor (IGBT), has been proven to be an advantageous alternative...... to acquire a high-efficient, high-voltage, fast-switching device. More than twenty years of research, on the serialization of solid-state devices, have resulted into several different stacking concepts. Among the prevailing ones, the gate balancing core technique, which has demonstrated very good performance...... in strings of high-power IGBT modules. In this paper, the limitations of the gate balancing core technique, when employed to serialize low or medium power off-the-shelf switches, are identified via experimental results. A new design specification for the interwinding capacitance of the employed transformer...

Comparison of short-circuit characteristics of trench gate and planar gate U-shaped channel SOI-LIGBTs

Science.gov (United States)

Zhang, Long; Zhu, Jing; Sun, Weifeng; Zhao, Minna; Huang, Xuequan; Chen, Jiajun; Shi, Longxing; Chen, Jian; Ding, Desheng

2017-09-01

Comparison of short-circuit (SC) characteristics of 500 V rated trench gate U-shaped channel (TGU) SOI-LIGBT and planar gate U-shaped channel (PGU) SOI-LIGBT is made for the first time in this paper. The on-state carrier profile of the TGU structure is reshaped by the dual trenches (a gate trench G1 and a hole barrier trench G2), which leads to a different conduction behavior from that of the PGU structure. The TGU structure exhibits a higher latchup immunity but a severer self-heating effect. At current density (JC) 640 A/cm2. Comparison of layouts and fabrication processes are also made between the two types of devices.

Engineering integrated photonics for heralded quantum gates

Science.gov (United States)

Meany, Thomas; Biggerstaff, Devon N.; Broome, Matthew A.; Fedrizzi, Alessandro; Delanty, Michael; Steel, M. J.; Gilchrist, Alexei; Marshall, Graham D.; White, Andrew G.; Withford, Michael J.

2016-06-01

Scaling up linear-optics quantum computing will require multi-photon gates which are compact, phase-stable, exhibit excellent quantum interference, and have success heralded by the detection of ancillary photons. We investigate the design, fabrication and characterisation of the optimal known gate scheme which meets these requirements: the Knill controlled-Z gate, implemented in integrated laser-written waveguide arrays. We show device performance to be less sensitive to phase variations in the circuit than to small deviations in the coupler reflectivity, which are expected given the tolerance values of the fabrication method. The mode fidelity is also shown to be less sensitive to reflectivity and phase errors than the process fidelity. Our best device achieves a fidelity of 0.931 ± 0.001 with the ideal 4 × 4 unitary circuit and a process fidelity of 0.680 ± 0.005 with the ideal computational-basis process.

Engineering integrated photonics for heralded quantum gates.

Science.gov (United States)

Meany, Thomas; Biggerstaff, Devon N; Broome, Matthew A; Fedrizzi, Alessandro; Delanty, Michael; Steel, M J; Gilchrist, Alexei; Marshall, Graham D; White, Andrew G; Withford, Michael J

2016-06-10

Scaling up linear-optics quantum computing will require multi-photon gates which are compact, phase-stable, exhibit excellent quantum interference, and have success heralded by the detection of ancillary photons. We investigate the design, fabrication and characterisation of the optimal known gate scheme which meets these requirements: the Knill controlled-Z gate, implemented in integrated laser-written waveguide arrays. We show device performance to be less sensitive to phase variations in the circuit than to small deviations in the coupler reflectivity, which are expected given the tolerance values of the fabrication method. The mode fidelity is also shown to be less sensitive to reflectivity and phase errors than the process fidelity. Our best device achieves a fidelity of 0.931 ± 0.001 with the ideal 4 × 4 unitary circuit and a process fidelity of 0.680 ± 0.005 with the ideal computational-basis process.

Follicular flushing during oocyte retrieval: a systematic review and meta-analysis.

Science.gov (United States)

Roque, Matheus; Sampaio, Marcos; Geber, Selmo

2012-11-01

The purpose of this systematic review and meta-analysis was to examine the literature and identify randomized controlled trials (RCTs), in order to answer if performing follicular flushing during the oocyte retrieval may improve the assisted reproductive technologies (ART) outcomes. An exhaustive electronic search was performed using MEDLINE and EMBASE databases. Only RCTs comparing follicular flushing to aspiration only during ART, were included. We included 5 trials, with a total of 482 patients randomized, with median ages ranging from 30.5 to 37.1. The data analyses did not show significant differences regarding live birth rate, clinical pregnancies rates, and the number of oocytes retrieved. The duration of oocyte retrieval was significantly increased in the follicular flushing group. The results from this systematic review and meta-analysis suggest that there is no advantage to use of routine follicular flushing during OR in an unselected group of patients.

The Microwave Noise Behaviour Of Dual Material Gate Silicon On Insulator

Science.gov (United States)

Jafar, N.; Soin, N.

2009-06-01

This work presents the noise behaviour due to the applied Dual Material Gate (DMG) on the 75 nm n-channel Silicon On Insulator (SOI) device operating in the fully depletion mode, particularly for microwave circuit design. Influences of DMG properties namely the gate length ratio (L1:L2) and gate material workfunction difference (ΔΦM) as well as structural and operational parameters which are silicon thickness (TSi) and threshold voltage (VTH) setting variation on the noise performance were carried out on simulation basis using ATLAS 2D. Results show better noise performance in DMG as compare to the standard gate structure of FD-SOI devices. Higher VTH for DMG design is recommended for minimized noise figure in line with the advantage of inverse VTH roll-off characteristics for short channel effects suppression.

Ethamsylate in the treatment of climacteric flushing.

Science.gov (United States)

Harrison, R F

1981-03-01

Ethamsylate, a non-hormonal agent acting at the capillary level, was compared with a placebo in a double-blind trial of 12 wk duration in 20 post-menopausal patients with hot flushes. Both ethamsylate and placebo patients showed fluctuations in the frequency of flushes during the trial, but there was a significant downward trend in the ethamsylate group. Capillary strength was measured but was not found to be low or to alter during the trial except in 1 patient in the placebo group. No side-effects attributable to trial medication were reported. Other symptoms recorded during the trial were probably climacteric and occurred more frequently during placebo treatment than during treatment with ethamsylate.

Development of a pilot size of electrochemical flushing equipment for radioactive soil and concrete

International Nuclear Information System (INIS)

Kim, Gye Nam; Moon, Jei Kwon; Choi, Wang Kyu; Yang, Byeong Il; Shon, Jong Sik; Hong, Dae Seok

2010-01-01

A pilot size of electrochemical flushing equipment will be manufactured suitable to the contamination characteristics of radioactive soil and concrete stored in KAERI radioactive waste storage. An optimal reagent and an optimal decontamination conditions should be decided through many experiments. - Contamination characterises analysis of TRIGA radioactive soil and concrete - Manufacture of pilot-scale electrochemical flushing equipment - Manufacture and improvement of suitable electrochemical flushing equipment for contamination characteristics in pilot size - Decontamination experiments of electrochemical flushing equipment in a pilot scale

A single nano cantilever as a reprogrammable universal logic gate

International Nuclear Information System (INIS)

Chappanda, K N; Ilyas, S; Kazmi, S N R; Younis, M I; Holguin-Lerma, J; Batra, N M; Costa, P M F J

2017-01-01

The current transistor-based computing circuits use multiple interconnected transistors to realize a single Boolean logic gate. This leads to higher power requirements and delayed computing. Transistors are not suitable for applications in harsh environments and require complicated thermal management systems due to excessive heat dissipation. Also, transistor circuits lack the ability to dynamically reconfigure their functionality in real time, which is desirable for enhanced computing capability. Further, the miniaturization of transistors to improve computational power is reaching its ultimate physical limits. As a step towards overcoming the limitations of transistor-based computing, here we demonstrate a reprogrammable universal Boolean logic gate based on a nanoelectromechanical cantilever (NC) oscillator. The fundamental XOR, AND, NOR, OR and NOT logic gates are condensed in a single NC, thereby reducing electrical interconnects between devices. The device is dynamically switchable between any logic gates at the same drive frequency without the need for any change in the circuit. It is demonstrated to operate at elevated temperatures minimizing the need for thermal management systems. It has a tunable bandwidth of 5 MHz enabling parallel and dynamically reconfigurable logic device for enhanced computing. (paper)

A single nano cantilever as a reprogrammable universal logic gate

KAUST Repository

Chappanda, K. N.

2017-02-24

The current transistor-based computing circuits use multiple interconnected transistors to realize a single Boolean logic gate. This leads to higher power requirements and delayed computing. Transistors are not suitable for applications in harsh environments and require complicated thermal management systems due to excessive heat dissipation. Also, transistor circuits lack the ability to dynamically reconfigure their functionality in real time, which is desirable for enhanced computing capability. Further, the miniaturization of transistors to improve computational power is reaching its ultimate physical limits. As a step towards overcoming the limitations of transistor-based computing, here we demonstrate a reprogrammable universal Boolean logic gate based on a nanoelectromechanical cantilever (NC) oscillator. The fundamental XOR, AND, NOR, OR and NOT logic gates are condensed in a single NC, thereby reducing electrical interconnects between devices. The device is dynamically switchable between any logic gates at the same drive frequency without the need for any change in the circuit. It is demonstrated to operate at elevated temperatures minimizing the need for thermal management systems. It has a tunable bandwidth of 5 MHz enabling parallel and dynamically reconfigurable logic device for enhanced computing.

Flushing Disorders Associated with Gastrointestinal Symptoms: Part 1, Neuroendocrine Tumors, Mast Cell Disorders and Hyperbasophila.

Science.gov (United States)

Rastogi, Vaibhav; Singh, Devina; Mazza, Joseph J; Yang, Dennis; Parajuli, Dipendra; Yale, Steven H

2018-04-12

Flushing is the subjective sensation of warmth accompanied by visible cutaneous erythema occurring throughout the body with a predilection for the face, neck, pinnae, and upper trunk where the skin is thinnest and cutaneous vessels are superficially located and in greatest numbers. Flushing can be present in either a wet or dry form depending upon whether neural-mediated mechanisms are involved. Activation of the sympathetic nervous system results in wet flushing, accompanied by diaphoresis, due to concomitant stimulation of eccrine sweat glands. Wet flushing is caused by certain medications, panic disorder and paroxysmal extreme pain disorder (PEPD). Vasodilator mediated flushing due to the formation and release of a variety of biogenic amines, neuropeptides and phospholipid mediators such as histamine, serotonin and prostaglandins respectively, typically presents as dry flushing where sweating is characteristically absent. Flushing occurring with neuroendocrine tumors accompanied by gastrointestinal symptoms is generally of the dry flushing variant, which may be an important clinical clue to the differential diagnosis. A number of primary diseases of the gastrointestinal tract cause flushing, and conversely extra-intestinal conditions are associated with flushing and gastrointestinal symptoms. Gastrointestinal findings vary and include one or more of the following non-specific symptoms such as abdominal pain, nausea, vomiting, diarrhea or constipation. The purpose of this review is to provide a focused comprehensive discussion on the presentation, pathophysiology, diagnostic evaluation and management of those diseases that arise from the gastrointestinal tract or other site that may cause gastrointestinal symptoms secondarily accompanied by flushing. The paper is divided into two parts given the scope of conditions that cause flushing and affect the gastrointestinal tract. Part 1 covered is neuroendocrine tumors, (carcinoid, pheochromocytomas, vasoactive

Formation of strain-induced quantum dots in gated semiconductor nanostructures

Directory of Open Access Journals (Sweden)

Ted Thorbeck

2015-08-01

Full Text Available A long-standing mystery in the field of semiconductor quantum dots (QDs is: Why are there so many unintentional dots (also known as disorder dots which are neither expected nor controllable. It is typically assumed that these unintentional dots are due to charged defects, however the frequency and predictability of the location of the unintentional QDs suggests there might be additional mechanisms causing the unintentional QDs besides charged defects. We show that the typical strains in a semiconductor nanostructure from metal gates are large enough to create strain-induced quantum dots. We simulate a commonly used QD device architecture, metal gates on bulk silicon, and show the formation of strain-induced QDs. The strain-induced QD can be eliminated by replacing the metal gates with poly-silicon gates. Thus strain can be as important as electrostatics to QD device operation operation.

Light-effect transistor (LET with multiple independent gating controls for optical logic gates and optical amplification

Directory of Open Access Journals (Sweden)

Jason eMarmon

2016-03-01

Full Text Available Modern electronics are developing electronic-optical integrated circuits, while their electronic backbone, e.g. field-effect transistors (FETs, remains the same. However, further FET down scaling is facing physical and technical challenges. A light-effect transistor (LET offers electronic-optical hybridization at the component level, which can continue Moore’s law to quantum region without requiring a FET’s fabrication complexity, e.g. physical gate and doping, by employing optical gating and photoconductivity. Multiple independent gates are therefore readily realized to achieve unique functionalities without increasing chip space. Here we report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs show output and transfer characteristics resembling advanced FETs, e.g. on/off ratios up to ~1.0x106 with a source-drain voltage of ~1.43 V, gate-power of ~260 nW, and subthreshold swing of ~0.3 nW/decade (excluding losses. Our work offers new electronic-optical integration strategies and electronic and optical computing approaches.

Characterization of 0.18- μm gate length AlGaN/GaN HEMTs on SiC fabricated using two-step gate recessing

Science.gov (United States)

Yoon, Hyung Sup; Min, Byoung-Gue; Lee, Jong Min; Kang, Dong Min; Ahn, Ho Kyun; Cho, Kyu-Jun; Do, Jae-Won; Shin, Min Jeong; Jung, Hyun-Wook; Kim, Sung Il; Kim, Hae Cheon; Lim, Jong Won

2017-09-01

We fabricated a 0.18- μm gate-length AlGaN/GaN high electron mobility transistor (HEMT) on SiC substrate fabricated by using two-step gate recessing which was composed of inductively coupled plasma (ICP) dry etching with a gas mixture of BCl3/Cl2 and wet chemical etching using the oxygen plasma treatment and HCl-based cleaning. The two-step gate recessing process exhibited an etch depth of 4.5 nm for the AlGaN layer and the clean surface of AlGaN layer at the AlGaN/gate metal contact region for the AlGaN/GaN HEMT structure. The recessed 0.18 μm × 200 μm AlGaN/GaN HEMT devices showed good DC characteristics, having a good Schottky diode ideality factor of 1.25, an extrinsic transconductance ( g m ) of 345 mS/mm, and a threshold voltage ( V th ) of -2.03 V. The recessed HEMT devices exhibited high RF performance, having a cut-off frequency ( f T ) of 48 GHz and a maximum oscillation frequency ( f max ) of 130 GHz. These devices also showed minimum noise figure of 0.83 dB and associated gain of 12.2 dB at 10 GHz.

ZnO nanowire-based nano-floating gate memory with Pt nanocrystals embedded in Al2O3 gate oxides

International Nuclear Information System (INIS)

Yeom, Donghyuk; Kang, Jeongmin; Lee, Myoungwon; Jang, Jaewon; Yun, Junggwon; Jeong, Dong-Young; Yoon, Changjoon; Koo, Jamin; Kim, Sangsig

2008-01-01

The memory characteristics of ZnO nanowire-based nano-floating gate memory (NFGM) with Pt nanocrystals acting as the floating gate nodes were investigated in this work. Pt nanocrystals were embedded between Al 2 O 3 tunneling and control oxide layers deposited on ZnO nanowire channels. For a representative ZnO nanowire-based NFGM with embedded Pt nanocrystals, a threshold voltage shift of 3.8 V was observed in its drain current versus gate voltage (I DS -V GS ) measurements for a double sweep of the gate voltage, revealing that the deep effective potential wells built into the nanocrystals provide our NFGM with a large charge storage capacity. Details of the charge storage effect observed in this memory device are discussed in this paper

Bio Organic-Semiconductor Field-Effect Transistor (BioFET) Based on Deoxyribonucleic Acid (DNA) Gate Dielectric

Science.gov (United States)

2010-03-31

floating gate devices and metal-insulator-oxide-semiconductor (MIOS) devices. First attempts to use polarizable gate insulators in combination with...bulk of the semiconductor (ii) Due to the polarizable gate dielectric (iii) dipole polarization and (iv)electret effect due to mobile ions in the...characterization was carried out under an argon environment inside the glove box. An Agilent model E5273A with a two source-measurement unit instrument was

Indium-gallium-zinc-oxide thin-film transistor with a planar split dual-gate structure

Science.gov (United States)

Liu, Yu-Rong; Liu, Jie; Song, Jia-Qi; Lai, Pui-To; Yao, Ruo-He

2017-12-01

An amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) with a planar split dual gate (PSDG) structure has been proposed, fabricated and characterized. Experimental results indicate that the two independent gates can provide dynamical control of device characteristics such as threshold voltage, sub-threshold swing, off-state current and saturation current. The transconductance extracted from the output characteristics of the device increases from 4.0 × 10-6S to 1.6 × 10-5S for a change of control gate voltage from -2 V to 2 V, and thus the device could be used in a variable-gain amplifier. A significant advantage of the PSDG structure is its flexibility in controlling the device performance according to the need of practical applications.

Effect of lavender aromatherapy on menopause hot flushing: A crossover randomized clinical trial.

Science.gov (United States)

Kazemzadeh, Rafat; Nikjou, Roya; Rostamnegad, Masoumeh; Norouzi, Hosein

2016-09-01

Flushing is generally considered to be the primary symptom of menopause and is typically the most common complaint in menopausal women. Although flushing poses no danger to a woman's health, it decreases the quality of life. Thus, the purpose of this study was to determine the effect of lavender aromatherapy on menopause flushing. This double-blinded crossover clinical trial included 100 menopausal women 45-55 years of age who were referred to various health centers in Ardabil, Iran in 2013-2014. Samples were blocked randomly and divided into two intervention (lavender) and control (diluted milk) groups. Lavender aroma was smelled for 20 minutes twice a day, over a 12-week period. Data were collected using a demographic questionnaire, and flushing numbers were duly recorded. Data analysis was performed by SPSS version 16 (SPSS Inc., Chicago, IL, USA) using the Chi-square and t test. The results of our investigation showed that both groups had no significant difference according to demographic characteristics (p > 0.05). Additionally, the flushing number significantly decreased in the intervention group than in the control group (p aromatherapy reduced menopause flushing. Given the impact of stress on flushing and the undesirable effects of menopause symptoms on the quality of life, it would appear that this simple, noninvasive, safe, and effective method can be used by menopausal women with noticeable benefits. Copyright © 2016. Published by Elsevier Taiwan LLC.

Bursting Events in Pressure Flushing with Expanding Bottom Outlet Channel within Dam Reservoir

Directory of Open Access Journals (Sweden)

soheila Tofighi

2017-01-01

each experiment, the bed level of scouring was measured using laser meters, and the volume of flushing cone was calculated by Surfer software. For investigation of turbulence parameters, the measurement of flow velocity in 0.5cm from the bed of flushing cone in the central axis of the outlet channel in the flow rate of 3 liters per second and water level of 47.5cm for three expansion sizes of the outlet channel (10, 20, and 30cm was performed. The flow velocity measurement was done using an Acoustic Doppler Velocimeter. This device is capable of measuring instantaneous velocity in three directions. Results and Discussion: The results indicated that the relative amount of bottom outlet channel expansion for 0.5, 1 and 1.5 times height of the sediments in the reservoir, leads to increase in flushing cone length for an average of 48, 83 and 113% and flushing cone volume for the average amount of 50, 74 and 96% compared to the case when the outlet channel is not developed. Also the analysis of the turbulence parameters showed that in the nearest axis to the inlet of the bottom outlet channel in which the maximum depth of flushing cone, the occurrence probability of sweep and ejection are maximum and impact angle of moment force due to these events is minimized. However the dominant event here is ejected which was also observed in laboratory experiments the particles were transferred into the channel as suspended load. By increasing the distance from the inlet opening of the channel the occurrence probability of sweep and ejection are decreased and impact angle of moment force due to these events is increased, but again, these two events are the dominant events in this regions and sweep is more important than ejection, that the observations also verify the particles transferred as bed load in these region. Ultimately, it comes to a region where the probabilities of all four events are the same and where the sediment flushing cone reaches the primary sedimentation level that

Toward spin-based Magneto Logic Gate in Graphene

Science.gov (United States)

Wen, Hua; Dery, Hanan; Amamou, Walid; Zhu, Tiancong; Lin, Zhisheng; Shi, Jing; Zutic, Igor; Krivorotov, Ilya; Sham, Lu; Kawakami, Roland

Graphene has emerged as a leading candidate for spintronic applications due to its long spin diffusion length at room temperature. A universal magnetologic gate (MLG) based on spin transport in graphene has been recently proposed as the building block of a logic circuit which could replace the current CMOS technology. This MLG has five ferromagnetic electrodes contacting a graphene channel and can be considered as two three-terminal XOR logic gates. Here we demonstrate this XOR logic gate operation in such a device. This was achieved by systematically tuning the injection current bias to balance the spin polarization efficiency of the two inputs, and offset voltage in the detection circuit to obtain binary outputs. The output is a current which corresponds to different logic states: zero current is logic `0', and nonzero current is logic `1'. We find improved performance could be achieved by reducing device size and optimizing the contacts.

Dual-Material Gate Approach to Suppression of Random-Dopant-Induced Characteristic Fluctuation in 16 nm Metal-Oxide-Semiconductor Field-Effect-Transistor Devices

Science.gov (United States)

Li, Yiming; Lee, Kuo-Fu; Yiu, Chun-Yen; Chiu, Yung-Yueh; Chang, Ru-Wei

2011-04-01

In this work, we explore for the first time dual-material gate (DMG) and inverse DMG devices for suppressing the random-dopant (RD)-induced characteristic fluctuation in 16 nm metal-oxide-semiconductor field-effect-transistor (MOSFET) devices. The physical mechanism of suppressing the characteristic fluctuation of DMG devices is observed and discussed. The achieved improvement in suppressing the RD-induced threshold voltage, on-state current, and off-state current fluctuations are 28, 12.3, and 59%, respectively. To further suppress the fluctuations, an approach that combines the DMG method and channel-doping-profile engineering is also advanced and explored. The results of our study show that among the suppression techniques, the use of the DMG device with an inverse lateral asymmetric channel-doping-profile has good immunity to fluctuation.

Performance projections and design optimization of planar double gate SOI MOSFETs for logic technology applications

International Nuclear Information System (INIS)

Kranti, Abhinav; Hao Ying; Armstrong, G Alastair

2008-01-01

In this paper, by investigating the influence of source/drain extension region engineering (also known as gate–source/drain underlap) in nanoscale planar double gate (DG) SOI MOSFETs, we offer new insights into the design of future nanoscale gate-underlap DG devices to achieve ITRS projections for high performance (HP), low standby power (LSTP) and low operating power (LOP) logic technologies. The impact of high-κ gate dielectric, silicon film thickness, together with parameters associated with the lateral source/drain doping profile, is investigated in detail. The results show that spacer width along with lateral straggle can not only effectively control short-channel effects, thus presenting low off-current in a gate underlap device, but can also be optimized to achieve lower intrinsic delay and higher on–off current ratio (I on /I off ). Based on the investigation of on-current (I on ), off-current (I off ), I on /I off , intrinsic delay (τ), energy delay product and static power dissipation, we present design guidelines to select key device parameters to achieve ITRS projections. Using nominal gate lengths for different technologies, as recommended from ITRS specification, optimally designed gate-underlap DG MOSFETs with a spacer-to-straggle (s/σ) ratio of 2.3 for HP/LOP and 3.2 for LSTP logic technologies will meet ITRS projection. However, a relatively narrow range of lateral straggle lying between 7 to 8 nm is recommended. A sensitivity analysis of intrinsic delay, on-current and off-current to important parameters allows a comparative analysis of the various design options and shows that gate workfunction appears to be the most crucial parameter in the design of DG devices for all three technologies. The impact of back gate misalignment on I on , I off and τ is also investigated for optimized underlap devices

2-D modeling and analysis of short-channel behavior of a front high- K gate stack triple-material gate SB SON MOSFET

Science.gov (United States)

Banerjee, Pritha; Kumari, Tripty; Sarkar, Subir Kumar

2018-02-01

This paper presents the 2-D analytical modeling of a front high- K gate stack triple-material gate Schottky Barrier Silicon-On-Nothing MOSFET. Using the two-dimensional Poisson's equation and considering the popular parabolic potential approximation, expression for surface potential as well as the electric field has been considered. In addition, the response of the proposed device towards aggressive downscaling, that is, its extent of immunity towards the different short-channel effects, has also been considered in this work. The analytical results obtained have been validated using the simulated results obtained using ATLAS, a two-dimensional device simulator from SILVACO.

Open-gated pH sensor fabricated on an undoped-AlGaN/GaN HEMT structure.

Science.gov (United States)

Abidin, Mastura Shafinaz Zainal; Hashim, Abdul Manaf; Sharifabad, Maneea Eizadi; Rahman, Shaharin Fadzli Abd; Sadoh, Taizoh

2011-01-01

The sensing responses in aqueous solution of an open-gated pH sensor fabricated on an AlGaN/GaN high-electron-mobility-transistor (HEMT) structure are investigated. Under air-exposed ambient conditions, the open-gated undoped AlGaN/GaN HEMT only shows the presence of a linear current region. This seems to show that very low Fermi level pinning by surface states exists in the undoped AlGaN/GaN sample. In aqueous solution, typical current-voltage (I-V) characteristics with reasonably good gate controllability are observed, showing that the potential of the AlGaN surface at the open-gated area is effectively controlled via aqueous solution by the Ag/AgCl gate electrode. The open-gated undoped AlGaN/GaN HEMT structure is capable of distinguishing pH level in aqueous electrolytes and exhibits linear sensitivity, where high sensitivity of 1.9 mA/pH or 3.88 mA/mm/pH at drain-source voltage, V(DS) = 5 V is obtained. Due to the large leakage current where it increases with the negative gate voltage, Nernstian like sensitivity cannot be determined as commonly reported in the literature. This large leakage current may be caused by the technical factors rather than any characteristics of the devices. Surprisingly, although there are some imperfections in the device preparation and measurement, the fabricated devices work very well in distinguishing the pH levels. Suppression of current leakage by improving the device preparation is likely needed to improve the device performance. The fabricated device is expected to be suitable for pH sensing applications.

Open-Gated pH Sensor Fabricated on an Undoped-AlGaN/GaN HEMT Structure

Directory of Open Access Journals (Sweden)

Taizoh Sadoh

2011-03-01

Full Text Available The sensing responses in aqueous solution of an open-gated pH sensor fabricated on an AlGaN/GaN high-electron-mobility-transistor (HEMT structure are investigated. Under air-exposed ambient conditions, the open-gated undoped AlGaN/GaN HEMT only shows the presence of a linear current region. This seems to show that very low Fermi level pinning by surface states exists in the undoped AlGaN/GaN sample. In aqueous solution, typical current-voltage (I-V characteristics with reasonably good gate controllability are observed, showing that the potential of the AlGaN surface at the open-gated area is effectively controlled via aqueous solution by the Ag/AgCl gate electrode. The open-gated undoped AlGaN/GaN HEMT structure is capable of distinguishing pH level in aqueous electrolytes and exhibits linear sensitivity, where high sensitivity of 1.9 mA/pH or 3.88 mA/mm/pH at drain-source voltage, VDS = 5 V is obtained. Due to the large leakage current where it increases with the negative gate voltage, Nernstian like sensitivity cannot be determined as commonly reported in the literature. This large leakage current may be caused by the technical factors rather than any characteristics of the devices. Surprisingly, although there are some imperfections in the device preparation and measurement, the fabricated devices work very well in distinguishing the pH levels. Suppression of current leakage by improving the device preparation is likely needed to improve the device performance. The fabricated device is expected to be suitable for pH sensing applications.

Stream-lined Gating Systems with Improved Yield - Dimensioning and Experimental Validation

DEFF Research Database (Denmark)

Tiedje, Niels Skat; Skov-Hansen, Søren Peter

the two types of lay-outs are cast in production. It is shown that flow in the stream-lined lay-out is well controlled and that the quality of the castings is as at least equal to that of castings produced with a traditional lay-out. Further, the yield is improved by 4 % relative to a traditional lay-out.......The paper describes how a stream-lined gating system where the melt is confined and controlled during filling can be designed. Commercial numerical modelling software has been used to compare the stream-lined design with a traditional gating system. These results are confirmed by experiments where...

Radiation hardening of MOS devices by boron

International Nuclear Information System (INIS)

Danchenko, V.

1975-01-01

A novel technique is disclosed for radiation hardening of MOS devices and specifically for stabilizing the gate threshold potential at room temperature of a radiation subjected MOS field-effect device of the type having a semiconductor substrate, an insulating layer of oxide on the substrate, and a gate electrode disposed on the insulating layer. In the preferred embodiment, the novel inventive technique contemplates the introduction of boron into the insulating oxide, the boron being introduced within a layer of the oxide of about 100A to 300A thickness immediately adjacent the semiconductor-insulator interface. The concentration of boron in the oxide layer is preferably maintained on the order of 10 atoms/ cm 3 . The novel technique serves to reduce and substantially annihilate radiation induced positive gate charge accumulations, which accumulations, if not eliminated, would cause shifting of the gate threshold potential of a radiation subjected MOS device, and thus render the device unstable and/or inoperative. (auth)

Rapidly reconfigurable all-optical universal logic gate

Science.gov (United States)

Goddard, Lynford L.; Bond, Tiziana C.; Kallman, Jeffrey S.

2010-09-07

A new reconfigurable cascadable all-optical on-chip device is presented. The gate operates by combining the Vernier effect with a novel effect, the gain-index lever, to help shift the dominant lasing mode from a mode where the laser light is output at one facet to a mode where it is output at the other facet. Since the laser remains above threshold, the speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal optical modulation speed of the laser, which can be on the order of up to about tens of GHz. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog optical or electrical signal at the gate selection port. Other all-optical functionality includes wavelength conversion, signal duplication, threshold switching, analog to digital conversion, digital to analog conversion, signal routing, and environment sensing. Since each gate can perform different operations, the functionality of such a cascaded circuit grows exponentially.

Dual-gated cardiac PET-clinical feasibility study

Energy Technology Data Exchange (ETDEWEB)

Teraes, Mika; Kokki, Tommi; Noponen, Tommi; Hoppela, Erika; Sipilae, Hannu T.; Knuuti, Juhani [Turku PET Centre, PO BOX 52, Turku (Finland); Durand-Schaefer, Nicolas [General Electric Medical Systems, Buc (France); Pietilae, Mikko [Turku University Hospital, Department of Internal Medicine, Turku (Finland); Kiss, Jan [Turku University Hospital, Department of Surgery, Turku (Finland)

2010-03-15

Both respiratory and cardiac motions reduce image quality in myocardial imaging. For accurate imaging of small structures such as vulnerable coronary plaques, simultaneous cardiac and respiratory gating is warranted. This study tests the feasibility of a recently developed robust method for cardiac-respiratory gating. List-mode data with triggers from respiratory and cardiac cycles are rearranged into dual-gated segments and reconstructed with standard algorithms of a commercial PET/CT scanner. Cardiac gates were defined as three fixed phases and one variable diastolic phase. Chest motion was measured with a respiratory gating device and post-processed to determine gates. Preservation of quantification in dual-gated images was tested with an IEC whole-body phantom. Minipig and human studies were performed to evaluate the feasibility of the method. In minipig studies, a coronary catheter with radioactive tip was guided in coronary artery for in vivo and ex vivo acquisitions. Dual gating in humans with suspected cardiac disorders was performed using 18-F-FDG as a tracer. The method was found feasible for in vivo imaging and the radioactive catheter tip was better resolved in gated images. In human studies, the dual gating was found feasible and easy for clinical routine. Maximal movement of myocardial surface in cranio-caudal direction was over 20 mm. The shape of myocardium was clearly different between the gates and papillary muscles become more visible in diastolic images. The first clinical experiences using robust cardiac-respiratory dual gating are encouraging. Further testing in larger clinical populations using tracers designed especially for plaque imaging is warranted. (orig.)

Dual-gated cardiac PET-clinical feasibility study

International Nuclear Information System (INIS)

Teraes, Mika; Kokki, Tommi; Noponen, Tommi; Hoppela, Erika; Sipilae, Hannu T.; Knuuti, Juhani; Durand-Schaefer, Nicolas; Pietilae, Mikko; Kiss, Jan

2010-01-01

Both respiratory and cardiac motions reduce image quality in myocardial imaging. For accurate imaging of small structures such as vulnerable coronary plaques, simultaneous cardiac and respiratory gating is warranted. This study tests the feasibility of a recently developed robust method for cardiac-respiratory gating. List-mode data with triggers from respiratory and cardiac cycles are rearranged into dual-gated segments and reconstructed with standard algorithms of a commercial PET/CT scanner. Cardiac gates were defined as three fixed phases and one variable diastolic phase. Chest motion was measured with a respiratory gating device and post-processed to determine gates. Preservation of quantification in dual-gated images was tested with an IEC whole-body phantom. Minipig and human studies were performed to evaluate the feasibility of the method. In minipig studies, a coronary catheter with radioactive tip was guided in coronary artery for in vivo and ex vivo acquisitions. Dual gating in humans with suspected cardiac disorders was performed using 18-F-FDG as a tracer. The method was found feasible for in vivo imaging and the radioactive catheter tip was better resolved in gated images. In human studies, the dual gating was found feasible and easy for clinical routine. Maximal movement of myocardial surface in cranio-caudal direction was over 20 mm. The shape of myocardium was clearly different between the gates and papillary muscles become more visible in diastolic images. The first clinical experiences using robust cardiac-respiratory dual gating are encouraging. Further testing in larger clinical populations using tracers designed especially for plaque imaging is warranted. (orig.)

Interfacial characteristics and leakage current transfer mechanisms in organometal trihalide perovskite gate-controlled devices via doping of PCBM

International Nuclear Information System (INIS)

Wang, Yucheng; Zhang, Yuming; Liu, Yintao; Pang, Tiqiang; Luan, Suzhen; Jia, Renxu; Hu, Ziyang; Zhu, Yuejin

2017-01-01

Two types of perovskite (with and without doping of PCBM) based metal-oxide-semiconductor (MOS) gate-controlled devices were fabricated and characterized. The study of the interfacial characteristics and charge transfer mechanisms by doping of PCBM were analyzed by material and electrical measurements. Doping of PCBM does not affect the size and crystallinity of perovskite films, but has an impact on carrier extraction in perovskite MOS devices. The electrical hysteresis observed in capacitance–voltage and current–voltage measurements can be alleviated by doping of PCBM. Experimental results demonstrate that extremely low trap densities are found for the perovskite device without doping, while the doped sample leads to higher density of interface state. Three mechanisms including Ohm’s law, trap-filled-limit (TFL) emission, and child’s law were used to analyze possible charge transfer mechanisms. Ohm’s law mechanism is well suitable for charge transfer of both the perovskite MOS devices under light condition at large voltage, while TFL emission well addresses the behavior of charge transfer under dark at small voltage. This change of charge transfer mechanism is attributed to the impact of the ion drift within perovskites. (paper)

Flexible Proton-Gated Oxide Synaptic Transistors on Si Membrane.

Science.gov (United States)

Zhu, Li Qiang; Wan, Chang Jin; Gao, Ping Qi; Liu, Yang Hui; Xiao, Hui; Ye, Ji Chun; Wan, Qing

2016-08-24

Ion-conducting materials have received considerable attention for their applications in fuel cells, electrochemical devices, and sensors. Here, flexible indium zinc oxide (InZnO) synaptic transistors with multiple presynaptic inputs gated by proton-conducting phosphorosilicate glass-based electrolyte films are fabricated on ultrathin Si membranes. Transient characteristics of the proton gated InZnO synaptic transistors are investigated, indicating stable proton-gating behaviors. Short-term synaptic plasticities are mimicked on the proposed proton-gated synaptic transistors. Furthermore, synaptic integration regulations are mimicked on the proposed synaptic transistor networks. Spiking logic modulations are realized based on the transition between superlinear and sublinear synaptic integration. The multigates coupled flexible proton-gated oxide synaptic transistors may be interesting for neuroinspired platforms with sophisticated spatiotemporal information processing.

High voltage MOSFET devices and methods of making the devices

Science.gov (United States)

Banerjee, Sujit; Matocha, Kevin; Chatty, Kiran

2018-06-05

A SiC MOSFET device having low specific on resistance is described. The device has N+, P-well and JFET regions extended in one direction (Y-direction) and P+ and source contacts extended in an orthogonal direction (X-direction). The polysilicon gate of the device covers the JFET region and is terminated over the P-well region to minimize electric field at the polysilicon gate edge. In use, current flows vertically from the drain contact at the bottom of the structure into the JFET region and then laterally in the X direction through the accumulation region and through the MOSFET channels into the adjacent N+ region. The current flowing out of the channel then flows along the N+ region in the Y-direction and is collected by the source contacts and the final metal. Methods of making the device are also described.

High voltage MOSFET devices and methods of making the devices

Science.gov (United States)

Banerjee, Sujit; Matocha, Kevin; Chatty, Kiran

2015-12-15

A SiC MOSFET device having low specific on resistance is described. The device has N+, P-well and JFET regions extended in one direction (Y-direction) and P+ and source contacts extended in an orthogonal direction (X-direction). The polysilicon gate of the device covers the JFET region and is terminated over the P-well region to minimize electric field at the polysilicon gate edge. In use, current flows vertically from the drain contact at the bottom of the structure into the JFET region and then laterally in the X direction through the accumulation region and through the MOSFET channels into the adjacent N+ region. The current flowing out of the channel then flows along the N+ region in the Y-direction and is collected by the source contacts and the final metal. Methods of making the device are also described.

A local bottom-gate structure with low parasitic capacitance for dielectrophoresis assembly and electrical characterization of suspended nanomaterials

International Nuclear Information System (INIS)

Wang, Tun; Liu, Bin; Jiang, Shusen; Rong, Hao; Lu, Miao

2014-01-01

A device including a pair of top electrodes and a local gate in the bottom of an SU-8 trench was fabricated on a glass substrate for dielectrophoresis assembly and electrical characterization of suspended nanomaterials. The three terminals were made of gold electrodes and electrically isolated from each other by an air gap. Compared to the widely used global back-gate silicon device, the parasitic capacitance between the three terminals was significantly reduced and an individual gate was assigned to each device. In addition, the spacing from the bottom-gate to either the source or drain was larger than twice the source-drain gap, which guaranteed that the electric field between the source and drain in the dielectrophoresis assembly was not distinguished by the bottom-gate. To prove the feasibility and versatility of the device, a suspended carbon nanotube and graphene film were assembled by dielectrophoresis and characterized successfully. Accordingly, the proposed device holds promise for the electrical characterization of suspended nanomaterials, especially in a high frequency resonator or transistor configuration. (paper)

Optimal inverter logic gate using 10-nm double gate-all-around (DGAA transistor with asymmetric channel width

Directory of Open Access Journals (Sweden)

Myunghwan Ryu

2016-01-01

Full Text Available We investigate the electrical characteristics of a double-gate-all-around (DGAA transistor with an asymmetric channel width using three-dimensional device simulation. The DGAA structure creates a silicon nanotube field-effect transistor (NTFET with a core-shell gate architecture, which can solve the problem of loss of gate controllability of the channel and provides improved short-channel behavior. The channel width asymmetry is analyzed on both sides of the terminals of the transistors, i.e., source and drain. In addition, we consider both n-type and p-type DGAA FETs, which are essential to forming a unit logic cell, the inverter. Simulation results reveal that, according to the carrier types, the location of the asymmetry has a different effect on the electrical properties of the devices. Thus, we propose the N/P DGAA FET structure with an asymmetric channel width to form the optimal inverter. Various electrical metrics are analyzed to investigate the benefits of the optimal inverter structure over the conventional inverter structure. Simulation results show that 27% delay and 15% leakage power improvement are enabled in the optimum structure.

Area efficient digital logic NOT gate using single electron box (SEB

Directory of Open Access Journals (Sweden)

Bahrepour Davoud

2017-01-01

Full Text Available The continuing scaling down of complementary metal oxide semiconductor (CMOS has led researchers to build new devices with nano dimensions, whose behavior will be interpreted based on quantum mechanics. Single-electron devices (SEDs are promising candidates for future VLSI applications, due to their ultra small dimensions and lower power consumption. In most SED based digital logic designs, a single gate is introduced and its performance discussed. While in the SED based circuits the fan out of designed gate circuit should be considered and measured. In the other words, cascaded SED based designs must work properly so that the next stage(s should be driven by the previous stage. In this paper, previously NOT gate based on single electron box (SEB which is an important structure in SED technology, is reviewed in order to obtain correct operation in series connections. The correct operation of the NOT gate is investigated in a buffer circuit which uses two connected NOT gate in series. Then, for achieving better performance the designed buffer circuit is improved by the use of scaling process.

A double-gate double-feedback JFET charge-sensitive preamplifier

International Nuclear Information System (INIS)

Fazzi, A.

1996-01-01

A new charge-sensitive preamplifier (CSP) without a physical resistance in the feedback is presented. The input device has to be a double-gate JFET. In this new preamplifier configuration the feedback capacitor is continuously discharged by means of a second DC current feedback loop closed through the bottom gate of the input JFET. The top gate-channel junction works as usual in reverse bias, the bottom gate-channel is forward biased. A fraction of the current injected by the bottom gate reaches the top gate discharging the feedback capacitor. The n-channel double-gate JFET is considered from the viewpoint of the restoring action as a parasitic p-n-p ''transversal'' bipolar junction transistor. The new preamplifier is also suited for detectors operating at room temperature with leakage current which may vary with time. The DC behaviour and the dynamic behaviour of the circuit is analyzed and new measurements presented. (orig.)

Can Rotational Atherectomy Cause Thermal Tissue Damage? A Study of the Potential Heating and Thermal Tissue Effects of a Rotational Atherectomy Device

International Nuclear Information System (INIS)

Gehani, Abdurrazzak A.; Rees, Michael R.

1998-01-01

Purpose: Thermal tissue damage (TTD) is customarily associated with some lasers. The thermal potential of rotational atherectomy (RA) devices is unknown. We investigated the temperature profile and potential TTD as well as the value of fluid flushing of an RA device. Methods: We used a high-resolution infrared imaging system that can detect changes as small as 0.1 deg. C to measure the temperature changes at the tip of a fast RA device with and without fluid flushing. To assess TTD, segments of porcine aorta were subjected to the rotating tip under controlled conditions, stained by a special histochemical stain (picrisirius red) and examined under normal and polarized light microscopy. Results: There was significant heating of the rotating cam. The mean 'peak' temperature rise was 52.8 ± 16.9 deg. C. This was related to rotational speed; thus the 'peak' temperature rise was 88.3 ± 12.6 deg. C at 80,000 rpm and 17.3 ± 3.8 deg. C at 20,000 rpm (p < 0.001, t-test). Fluid flushing at 18 ml/min reduced, but did not abolish, heating of the device (11.8 ± 2.9 deg. C). A crater was observed in all segments exposed to the rotating tip. The following features were most notable: (i) A zone of 'thermal' tissue damage extended radially from the crater reaching adventitia in some sections, especially at high speeds. This zone showed markedly reduced or absent birefringence. (ii) Fluid flushing of the catheter reduced the above changes but increased the incidence and extent of dissections in the media, especially when combined with high atherectomy speeds. (iii) These changes were observed in five of six specimens exposed to RA without flushing, but in only one of six with flushing (p < 0.05). (iv) None of the above changes was seen in control segments. Conclusion: RA is capable of generating significant heat and potential TTD. Fluid flushing reduced heating and TTD. These findings warrant further studies in vivo, and may influence the design of atherectomy devices

Prevention for possible microbiologically influenced corrosion (MIC) in RHLWE flush water system

International Nuclear Information System (INIS)

Hsu, T.C.; Jenkins, C.F.

1995-01-01

This report is in response to the request to provide a recommendation for the prevention of possible microbiologically influenced corrosion (MIC) for the RHLWE (Replacement High-Level Waste Evaporator) flush water (FW) system. The recent occurrences of MIC at DWPF prompted HLWE to evaluate the possibility of MIC occurring in this 304L stainless steel RHLWE flush water system. Concern was heightened by the fact that the well water used and the other conditions at H-Tank Farm are similar to those at DWPF. However, only one known leak has occurred in the existing 304L evaporator flush water systems in either tank farm (in 1H system), and no MIC Corrosion has been confirmed in the tank farm area. The design of the RHLWE flush water system (completed long before the occurrence of MIC at DWPF) was modeled after the existing evaporator flush water systems and did not specifically include MIC prevention considerations. Therefore, MIC prevention was not specifically considered during the design phase of this flush water system. The system is presently being installed. After an extensive evaluation, a task team concluded that the best biocide to prevent the occurrence of MIC would be NaOH at fairly low concentration. Sodium hydroxide (NaOH) is optimal in this application, because of its effectiveness, low cost, and familiarity to the Operations personnel (see Appendix A). However, it is the opinion of the task group that application should be withheld until MIC corrosion is demonstrated in the system

Formation of p-n-p junction with ionic liquid gate in graphene

International Nuclear Information System (INIS)

He, Xin; Tang, Ning; Duan, Junxi; Zhang, Yuewei; Lu, Fangchao; Xu, Fujun; Yang, Xuelin; Gao, Li; Wang, Xinqiang; Shen, Bo; Ge, Weikun

2014-01-01

Ionic liquid gating is a technique which is much more efficient than solid gating to tune carrier density. To observe the electronic properties of such a highly doped graphene device, a top gate made of ionic liquid has been used. By sweeping both the top and back gate voltage, a p-n-p junction has been created. The mechanism of forming the p-n-p junction has been discussed. Tuning the carrier density by ionic liquid gate can be an efficient method to be used in flexible electronics

Design and operation of a high-heat flux, flush-mounted ‘rail’ Langmuir probe array on Alcator C-Mod

Directory of Open Access Journals (Sweden)

A.Q. Kuang

2017-08-01

Full Text Available A poloidal array of toroidally-extended, flush-mounted ‘rail’ Langmuir probes was recently installed on Alcator C-Mod's vertical target plate divertor. The aim was to investigate if a Langmuir probe array could be designed to survive reactor-level heat fluxes and have the ability to make measurements that could be reliably interpreted under reactor-level plasma densities, neutral densities and magnetic fields. Langmuir probes are typically built to have incident field-line angles >10° to avoid interpretation issues associated with sheath expansion. However, at the high parallel heat fluxes experienced in reactor-relevant conditions such a probe would quickly overheat and melt. To mitigate both the issues of extreme heat flux and sheath expansion, each probe was designed to be flush with the divertor surface, toroidally-extended and field-aligned, giving it a ‘rail’ geometry. The flush mounted probes have proven to be exceptionally robust surviving the 2015–2016 campaign – a first for a C-Mod probe system. Examination of the probe current-voltage (I-V characteristics reveals that they are immune to sheath expansion at incident field angles down to ∼0.5°. Comparison of the flush probes to traditional proud probes shows that both measure the same electron pressure across the divertor plate. However, there are significant and systematic differences in the density, temperature and floating potential. This suggests that there is important physics, perhaps unique to conditions in a vertical-target plate divertor with small field-line attack angles, that affects the I-V characteristics and is not currently included in probe data analyses. Finally, the probe response is examined in the ‘death-ray’ regime, just near detachment. Previous work using proud probes has suggested that the ‘death-ray’ is an artefact of the probe bias. However, on flush mounted probes the ‘death-ray’ manifests itself under different conditions, which

Nicotinic acid-induced flushing is mediated by activation of epidermal langerhans cells

NARCIS (Netherlands)

Benyó, Zoltán; Gille, Andreas; Bennett, Clare L.; Clausen, Björn E.; Offermanns, Stefan

2006-01-01

The antidyslipidemic drug nicotinic acid (niacin) has been used for decades. One of the major problems of the therapeutical use of nicotinic acid is a strong cutaneous vasodilation called flushing, which develops in almost every patient taking nicotinic acid. Nicotinic acid-induced flushing has been

Gate Control Coefficient Effect on CNFET Characteristic

International Nuclear Information System (INIS)

Sanudin, Rahmat; Ma'Radzi, Ahmad Alabqari; Nayan, Nafarizal

2009-01-01

The development of carbon nanotube field-effect transistor (CNFET) as alternative to existing transistor technology has long been published and discussed. The emergence of this device offers new material and structure in building a transistor. This paper intends to do an analysis of gate control coefficient effect on CNFET performance. The analysis is based on simulation study of current-voltage (I-V) characteristic of ballistic CNFET. The simulation study used the MOSFET-like CNFET mathematical model to establish the device output characteristic. Based on the analysis of simulation result, it is found that the gate control coefficient contributes to a significant effect on the performance of CNFET. The result also shown the parameter could help to improve the device performance in terms of its output and response as well. Nevertheless, the characteristic of the carbon nanotube that acts as the channel is totally important in determining the performance of the transistor as a whole.

Nanoscale MOS devices: device parameter fluctuations and low-frequency noise (Invited Paper)

Science.gov (United States)

Wong, Hei; Iwai, Hiroshi; Liou, J. J.

2005-05-01

It is well-known in conventional MOS transistors that the low-frequency noise or flicker noise is mainly contributed by the trapping-detrapping events in the gate oxide and the mobility fluctuation in the surface channel. In nanoscale MOS transistors, the number of trapping-detrapping events becomes less important because of the large direct tunneling current through the ultrathin gate dielectric which reduces the probability of trapping-detrapping and the level of leakage current fluctuation. Other noise sources become more significant in nanoscale devices. The source and drain resistance noises have greater impact on the drain current noise. Significant contribution of the parasitic bipolar transistor noise in ultra-short channel and channel mobility fluctuation to the channel noise are observed. The channel mobility fluctuation in nanoscale devices could be due to the local composition fluctuation of the gate dielectric material which gives rise to the permittivity fluctuation along the channel and results in gigantic channel potential fluctuation. On the other hand, the statistical variations of the device parameters across the wafer would cause the noise measurements less accurate which will be a challenge for the applicability of analytical flicker noise model as a process or device evaluation tool for nanoscale devices. Some measures for circumventing these difficulties are proposed.

Impact of gate engineering in enhancement mode n++GaN/InAlN/AlN/GaN HEMTs

Science.gov (United States)

Adak, Sarosij; Swain, Sanjit Kumar; Rahaman, Hafizur; Sarkar, Chandan Kumar

2016-12-01

This paper illustrate the effect of gate material engineering on the performance of enhancement mode n++GaN/InAlN/AlN/GaN high electron mobility transistors (HEMTs). A comparative analysis of key device parameters is discussed for the Triple Material Gate (TMG), Dual Material Gate (DMG) and the Single Material Gate (SMG) structure HEMTs by considering the same device dimensions. The simulation results shows that an significant improvement is noticed in the key analysis parameters such as drain current (Id), transconductance (gm), cut off frequency (fT), RF current gain, maximum cut off frequency (fmax) and RF power gain of the gate material engineered devices with respect to SMG normally off n++GaN/InAlN/AlN/GaN HEMTs. This improvement is due to the existence of the perceivable step in the surface potential along the channel which successfully screens the drain potential variation in the source side of the channel for the gate engineering devices. The analysis suggested that the proposed TMG and DMG engineered structure enhancement mode n++GaN/InAlN/AlN/GaN HEMTs can be considered as a potential device for future high speed, microwave and digital application.

High-fidelity gates in quantum dot spin qubits.

Science.gov (United States)

Koh, Teck Seng; Coppersmith, S N; Friesen, Mark

2013-12-03

Several logical qubits and quantum gates have been proposed for semiconductor quantum dots controlled by voltages applied to top gates. The different schemes can be difficult to compare meaningfully. Here we develop a theoretical framework to evaluate disparate qubit-gating schemes on an equal footing. We apply the procedure to two types of double-dot qubits: the singlet-triplet and the semiconducting quantum dot hybrid qubit. We investigate three quantum gates that flip the qubit state: a DC pulsed gate, an AC gate based on logical qubit resonance, and a gate-like process known as stimulated Raman adiabatic passage. These gates are all mediated by an exchange interaction that is controlled experimentally using the interdot tunnel coupling g and the detuning [Symbol: see text], which sets the energy difference between the dots. Our procedure has two steps. First, we optimize the gate fidelity (f) for fixed g as a function of the other control parameters; this yields an f(opt)(g) that is universal for different types of gates. Next, we identify physical constraints on the control parameters; this yields an upper bound f(max) that is specific to the qubit-gate combination. We show that similar gate fidelities (~99:5%) should be attainable for singlet-triplet qubits in isotopically purified Si, and for hybrid qubits in natural Si. Considerably lower fidelities are obtained for GaAs devices, due to the fluctuating magnetic fields ΔB produced by nuclear spins.

Reversible logic gates based on enzyme-biocatalyzed reactions and realized in flow cells: a modular approach.

Science.gov (United States)

Fratto, Brian E; Katz, Evgeny

2015-05-18

Reversible logic gates, such as the double Feynman gate, Toffoli gate and Peres gate, with 3-input/3-output channels are realized using reactions biocatalyzed with enzymes and performed in flow systems. The flow devices are constructed using a modular approach, where each flow cell is modified with one enzyme that biocatalyzes one chemical reaction. The multi-step processes mimicking the reversible logic gates are organized by combining the biocatalytic cells in different networks. This work emphasizes logical but not physical reversibility of the constructed systems. Their advantages and disadvantages are discussed and potential use in biosensing systems, rather than in computing devices, is suggested. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Investigation of Rapid Low-Power Microwave-Induction Heating Scheme on the Cross-Linking Process of the Poly(4-vinylphenol) for the Gate Insulator of Pentacene-Based Thin-Film Transistors

Science.gov (United States)

Fan, Ching-Lin; Shang, Ming-Chi; Wang, Shea-Jue; Hsia, Mao-Yuan; Lee, Win-Der; Huang, Bohr-Ran

2017-01-01

In this study, a proposed Microwave-Induction Heating (MIH) scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO) metal below the Poly(4-vinylphenol) (PVP) film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit) was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min) and low-power microwave-irradiation (50 W). PMID:28773101

Investigation of Rapid Low-Power Microwave-Induction Heating Scheme on the Cross-Linking Process of the Poly(4-vinylphenol for the Gate Insulator of Pentacene-Based Thin-Film Transistors

Directory of Open Access Journals (Sweden)

Ching-Lin Fan

2017-07-01

Full Text Available In this study, a proposed Microwave-Induction Heating (MIH scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO metal below the Poly(4-vinylphenol (PVP film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min and low-power microwave-irradiation (50 W.

Design optimization of structural parameters in double gate MOSFETs for RF applications

International Nuclear Information System (INIS)

Liang Jiale; Xiao Han; Huang Ru; Wang Pengfei; Wang Yangyuan

2008-01-01

Double gate (DG) MOSFETs have recently attracted much attention for both logic and analog/RF applications. In this paper we focus on the design consideration of DG devices for RF applications. The different influences of key structural parameters on RF characteristics are comprehensively studied and optimized, including body thickness, spacer length and source/drain raised height. The impact of the fluctuation of geometrical parameters of DG devices on RF figures-of-merit are estimated. In addition, different dominance of structural parameters for RF applications is studied in DG devices with different channel lengths. The dependence of RF performance on the gate length downscaling of DG devices is also discussed. The obtained results give the design guidelines for DG devices for RF applications

Multi-valued logic gates based on ballistic transport in quantum point contacts.

Science.gov (United States)

Seo, M; Hong, C; Lee, S-Y; Choi, H K; Kim, N; Chung, Y; Umansky, V; Mahalu, D

2014-01-22

Multi-valued logic gates, which can handle quaternary numbers as inputs, are developed by exploiting the ballistic transport properties of quantum point contacts in series. The principle of a logic gate that finds the minimum of two quaternary number inputs is demonstrated. The device is scalable to allow multiple inputs, which makes it possible to find the minimum of multiple inputs in a single gate operation. Also, the principle of a half-adder for quaternary number inputs is demonstrated. First, an adder that adds up two quaternary numbers and outputs the sum of inputs is demonstrated. Second, a device to express the sum of the adder into two quaternary digits [Carry (first digit) and Sum (second digit)] is demonstrated. All the logic gates presented in this paper can in principle be extended to allow decimal number inputs with high quality QPCs.

Multi-Valued Logic Gates based on Ballistic Transport in Quantum Point Contacts

Science.gov (United States)

Seo, M.; Hong, C.; Lee, S.-Y.; Choi, H. K.; Kim, N.; Chung, Y.; Umansky, V.; Mahalu, D.

2014-01-01

Multi-valued logic gates, which can handle quaternary numbers as inputs, are developed by exploiting the ballistic transport properties of quantum point contacts in series. The principle of a logic gate that finds the minimum of two quaternary number inputs is demonstrated. The device is scalable to allow multiple inputs, which makes it possible to find the minimum of multiple inputs in a single gate operation. Also, the principle of a half-adder for quaternary number inputs is demonstrated. First, an adder that adds up two quaternary numbers and outputs the sum of inputs is demonstrated. Second, a device to express the sum of the adder into two quaternary digits [Carry (first digit) and Sum (second digit)] is demonstrated. All the logic gates presented in this paper can in principle be extended to allow decimal number inputs with high quality QPCs.

Analytical threshold voltage modeling of ion-implanted strained-Si double-material double-gate (DMDG) MOSFETs

Science.gov (United States)

Goel, Ekta; Singh, Balraj; Kumar, Sanjay; Singh, Kunal; Jit, Satyabrata

2017-04-01

Two dimensional threshold voltage model of ion-implanted strained-Si double-material double-gate MOSFETs has been done based on the solution of two dimensional Poisson's equation in the channel region using the parabolic approximation method. Novelty of the proposed device structure lies in the amalgamation of the advantages of both the strained-Si channel and double-material double-gate structure with a vertical Gaussian-like doping profile. The effects of different device parameters (such as device channel length, gate length ratios, germanium mole fraction) and doping parameters (such as projected range, straggle parameter) on threshold voltage of the proposed structure have been investigated. It is observed that the subthreshold performance of the device can be improved by simply controlling the doping parameters while maintaining other device parameters constant. The modeling results show a good agreement with the numerical simulation data obtained by using ATLAS™, a 2D device simulator from SILVACO.

Evaluation of Soil Flushing for Application to the Deep Vadose Zone in the Hanford Central Plateau

Energy Technology Data Exchange (ETDEWEB)

Truex, Michael J.; Oostrom, Martinus; Zhang, Z. F.; Carroll, Kenneth C.; Schramke, Janet A.; Wietsma, Thomas W.; Tartakovsky, Guzel D.; Gordon, Kathryn A.; Last, George V.

2010-11-01

Soil flushing was included in the Deep Vadose Zone Treatability Test Plan for the Hanford Central Plateau as a technology with the potential to remove contaminants from the vadose zone. Soil flushing operates through the addition of water, and if necessary an appropriate mobilizing agent, to mobilize contaminants and flush them from the vadose zone and into the groundwater where they are subsequently captured by a pump-and-treat system. There are uncertainties associated with applying soil flushing technology to contaminants in the deep vadose zone at the Hanford Central Plateau. The modeling and laboratory efforts reported herein are intended to provide a quantitative assessment of factors that impact water infiltration and contaminant flushing through the vadose zone and into the underlying groundwater. Once in the groundwater, capture of the contaminants would be necessary, but this aspect of implementing soil flushing was not evaluated in this effort. Soil flushing was evaluated primarily with respect to applications for technetium and uranium contaminants in the deep vadose zone of the Hanford Central Plateau.

Verification of applicability of high bundle flush for an actual steam generator

International Nuclear Information System (INIS)

Karui, Masayuki; Nakamura, Takashi; Yamada, Masataka

2003-01-01

Sludge in Steam Generator (SG) should be removed as completely as possible because it can lead both to a corrosive environment and thermal degradation. Conventionally, water jet cleaning or lancing is carried out to remove sludge deposited on the upper Tube Support Plates (TSPs) and the Top of the Tubesheet (TTS). These cleaning methods are usually effective but they require much time and the cleaning equipment is complex. On the other hand, a High Bundle Flush (HBF) operation can remove soft sludge from the upper part of the SG secondary side more quickly and using a more simple device. A HBF is intended to wash off soft sludge that has accumulated on the upper TSPs. This sludge is flushed down to the TTS by the action of a large volume of water (6 tons/minute) introduced at the SG steam separators. Sludge Lancing performed following the HBF removes the sludge that has been flushed down to the TTS. Nuclear Engineering Ltd. carried out development of the HBF cleaning system for Japan's SGs. We also conducted theoretical safety analyses of the HBF and mock-up testing. These analyses and testing confirmed that the HBF had no adverse effects on any of the SG secondary side components. A HBF was carried out for the ''B'' SG at Ohi unit 1 of Kansai Electric Power Co, Inc. (KEPCO). Sludge removed from the ''B'' SG where the HBF was performed was three or four times the amount removed from the other SGs where only Sludge Lancing was performed. Furthermore, the HBF required only 4 days. The performance of the HBF system at Ohi unit 1 confirmed that a HBF could easily and safely removes much of sludge from the SG, even in a SG that has a small sludge inventory. In the future, application of a HBF in other SGs with larger sludge inventories is expected to remove much greater volumes of sludge. (author)

Comparative studies of MOS-gate/oxide-passivated AlGaAs/InGaAs pHEMTs by using ozone water oxidation technique

International Nuclear Information System (INIS)

Lee, Ching-Sung; Hung, Chun-Tse; Chou, Bo-Yi; Hsu, Wei-Chou; Liu, Han-Yin; Ho, Chiu-Sheng; Lai, Ying-Nan

2012-01-01

Al 0.22 Ga 0.78 As/In 0.24 Ga 0.76 As pseudomorphic high-electron-mobility transistors (pHEMTs) with metal-oxide-semiconductor (MOS)-gate structure or oxide passivation by using ozone water oxidation treatment have been comprehensively investigated. Annihilated surface states, enhanced gate insulating property and improved device gain have been achieved by the devised MOS-gate structure and oxide passivation. The present MOS-gated or oxide-passivated pHEMTs have demonstrated superior device performances, including superior breakdown, device gain, noise figure, high-frequency characteristics and power performance. Temperature-dependent device characteristics of the present designs at 300–450 K are also studied. (paper)

Comprehensive study of gate-terminated and source-terminated field-plate 0.13 µm NMOS transistors

International Nuclear Information System (INIS)

Chiu, Hsien-Chin; Lin, Shao-Wei; Cheng, Chia-Shih; Wei, Chien-Cheng

2008-01-01

This study systematically investigated microwave noise, power and linearity characteristics of field-plate (FP) 0.13 µm CMOS transistors in which the field-plate metal is connected to the gate terminal and the source terminal. The gate-terminated FP NMOS (FP-G NMOS) provided the best noise figure (NF) at 6 GHz compared with standard devices and the source-terminated FP device (FP-S NMOS) as the lowest gate resistance (R g ) was obtained by this structure. By adopting the field-plate metal in NMOS, both FP-S and FP-G devices achieved higher current density at high gate bias voltages. Moreover, these two devices also had higher efficiency under high drain-to-source voltages at the high input power swing. The third-order inter-modulation product (IM3) is −39.4 dBm for FP-S NMOS at P in of −20 dBm; the corresponding values for FP-G and standard devices are −34.9 dBm and −37.3 dBm, respectively. Experimental results indicate that the FP-G architecture is suitable for low noise applications and FP-S is suitable for high power and high linearity operation

Temperature-gated thermal rectifier for active heat flow control.

Science.gov (United States)

Zhu, Jia; Hippalgaonkar, Kedar; Shen, Sheng; Wang, Kevin; Abate, Yohannes; Lee, Sangwook; Wu, Junqiao; Yin, Xiaobo; Majumdar, Arun; Zhang, Xiang

2014-08-13

Active heat flow control is essential for broad applications of heating, cooling, and energy conversion. Like electronic devices developed for the control of electric power, it is very desirable to develop advanced all-thermal solid-state devices that actively control heat flow without consuming other forms of energy. Here we demonstrate temperature-gated thermal rectification using vanadium dioxide beams in which the environmental temperature actively modulates asymmetric heat flow. In this three terminal device, there are two switchable states, which can be regulated by global heating. In the "Rectifier" state, we observe up to 28% thermal rectification. In the "Resistor" state, the thermal rectification is significantly suppressed (Rectifier state. This temperature-gated rectifier can have substantial implications ranging from autonomous thermal management of heating and cooling systems to efficient thermal energy conversion and storage.

Hybrid dual gate ferroelectric memory for multilevel information storage

KAUST Repository

Khan, Yasser

2015-01-01

Here, we report hybrid organic/inorganic ferroelectric memory with multilevel information storage using transparent p-type SnO semiconductor and ferroelectric P(VDF-TrFE) polymer. The dual gate devices include a top ferroelectric field-effect transistor (FeFET) and a bottom thin-film transistor (TFT). The devices are all fabricated at low temperatures (∼200°C), and demonstrate excellent performance with high hole mobility of 2.7 cm2 V-1 s-1, large memory window of ∼18 V, and a low sub-threshold swing ∼-4 V dec-1. The channel conductance of the bottom-TFT and the top-FeFET can be controlled independently by the bottom and top gates, respectively. The results demonstrate multilevel nonvolatile information storage using ferroelectric memory devices with good retention characteristics.

Experimental evaluation of IGBT junction temperature measurement via peak gate current

DEFF Research Database (Denmark)

Baker, Nick; Munk-Nielsen, Stig; Iannuzzo, Francesco

2015-01-01

Temperature sensitive electrical parameters allow junction temperature measurements on power semiconductors without modification to module packaging. The peak gate current has recently been proposed for IGBT junction temperature measurement and relies on the temperature dependent resistance...... of the gate pad. Consequently, a consideration of chip geometry and location of the gate pad is required before interpreting temperature data from this method. Results are also compared with a traditional electrical temperature measurement method: the voltage drop under low current....

Enhanced transconductance in a double-gate graphene field-effect transistor

Science.gov (United States)

Hwang, Byeong-Woon; Yeom, Hye-In; Kim, Daewon; Kim, Choong-Ki; Lee, Dongil; Choi, Yang-Kyu

2018-03-01

Multi-gate transistors, such as double-gate, tri-gate and gate-all-around transistors are the most advanced Si transistor structure today. Here, a genuine double-gate transistor with a graphene channel is experimentally demonstrated. The top and bottom gates of the double-gate graphene field-effect transistor (DG GFET) are electrically connected so that the conductivity of the graphene channel can be modulated simultaneously by both the top and bottom gate. A single-gate graphene field-effect transistor (SG GFET) with only the top gate is also fabricated as a control device. For systematical analysis, the transfer characteristics of both GFETs were measured and compared. Whereas the maximum transconductance of the SG GFET was 17.1 μS/μm, that of the DG GFET was 25.7 μS/μm, which is approximately a 50% enhancement. The enhancement of the transconductance was reproduced and comprehensively explained by a physics-based compact model for GFETs. The investigation of the enhanced transfer characteristics of the DG GFET in this work shows the possibility of a multi-gate architecture for high-performance graphene transistor technology.

Production flush of Agaricus blazei on Brazilian casing layers

Directory of Open Access Journals (Sweden)

Nelson Barros Colauto

2011-06-01

Full Text Available This study aimed to verify the biological efficiency and production flushes of Agaricus blazei strains on different casing layers during 90 cultivation days. Four casing layers were used: mixture of subsoil and charcoal (VCS, lime schist (LSC, São Paulo peat (SPP and Santa Catarina peat (SCP; and two genetically distant A. blazei strains. The fungus was grown in composted substratum and, after total colonization, a pasteurized casing layer was added over the substratum, and fructification was induced. Mushrooms were picked up daily when the basidiocarp veil was stretched, but before the lamella were exposed. The biological efficiency (BE was determined by the fresh basidiocarp mass divided by the substratum dry mass, expressed in percentage. The production flushes were also determined over time production. The BE and production flushes during 90 days were affected by the strains as well as by the casing layers. The ABL26 and LSC produced the best BE of 60.4%. Although VCS is the most used casing layer in Brazil, it is inferior to other casing layers, for all strains, throughout cultivation time. The strain, not the casing layer, is responsible for eventual variations of the average mushroom mass. In average, circa 50% of the mushroom production occurs around the first month, 30% in the second month, and 20% in third month. The casing layer water management depends on the casing layer type and the strain. Production flush responds better to water reposition, mainly with ABL26, and better porosity to LSC and SCP casing layers.

Exercise training reduces the frequency of menopausal hot flushes by improving thermoregulatory control.

Science.gov (United States)

Bailey, Tom G; Cable, N Timothy; Aziz, Nabil; Dobson, Rebecca; Sprung, Victoria S; Low, David A; Jones, Helen

2016-07-01

Postmenopausal hot flushes occur due to a reduction in estrogen production causing thermoregulatory and vascular dysfunction. Exercise training enhances thermoregulatory control of sweating, skin and brain blood flow. We aimed to determine if improving thermoregulatory control and vascular function with exercise training alleviated hot flushes. Twenty-one symptomatic women completed a 7-day hot flush questionnaire and underwent brachial artery flow-mediated dilation and a cardiorespiratory fitness test. Sweat rate and skin blood flow temperature thresholds and sensitivities, and middle cerebral artery velocity (MCAv) were measured during passive heating. Women performed 16 weeks of supervised exercise training or control, and measurements were repeated. There was a greater improvement in cardiorespiratory fitness (4.45 mL/kg/min [95% CI: 1.87, 8.16]; P = 0.04) and reduced hot flush frequency (48 hot flushes/wk [39, 56]; P core temperature (0.14°C [0.01, 0.27]; P = 0.03) and increased basal MCAv (2.8 cm/s [1.0, 5.2]; P = 0.04) compared with control. Sweat rate and skin blood flow thresholds occurred approximately 0.19°C and 0.17°C earlier, alongside improved sweating sensitivity with exercise. MCAv decreased during heating (P training that improves cardiorespiratory fitness reduces self-reported hot flushes. Improvements are likely mediated through greater thermoregulatory control in response to increases in core temperature and enhanced vascular function in the cutaneous and cerebral circulations.

Experimental study of prequalified status of flush end plate connections

Directory of Open Access Journals (Sweden)

Sherif H.M. Hassanien

2016-04-01

Full Text Available Seismic design of steel structures is an essential part of the design process. Egyptian loading code development process continues in a high rate to catch up with emerging new concepts and standards. Steel design codes (ASD and LRFD are not developing in the same speed, which prevents the full utilization and application of loading code. The above reason leads to the need for evaluating flush end plate connections from prequalification point of view according to international standards. Due to the lack of sufficient experimental data on flush end-plate connections, an experimental program was conducted to investigate this topic. Six flush end-plate samples were designed according to the Egyptian code for steel construction (ECP205 ASD using different beam and column sections, bolt diameters and grades. A cyclic loading pattern defined by international standards was used in the testing process, and the performance was evaluated accordingly. Evaluation of M–Φ curves showed that in some cases flush end plate connections satisfy the strict requirements for prequalification. However, beam sections having limited depth fail to achieve prequalification criteria for the connections. Reduced web may be used to enhance the connection status and is investigated in one of the samples to evaluate its impact on connection performance and the failure mode. The proposed staggered hole configuration showed a promising performance.

Water Reclamation Using a Ceramic Nanofiltration Membrane and Surface Flushing with Ozonated Water

Science.gov (United States)

Hoang, Anh T.; Okuda, Tetsuji; Takeuchi, Haruka; Tanaka, Hiroaki; Nghiem, Long D.

2018-01-01

A new membrane fouling control technique using ozonated water flushing was evaluated for direct nanofiltration (NF) of secondary wastewater effluent using a ceramic NF membrane. Experiments were conducted at a permeate flux of 44 L/m2h to evaluate the ozonated water flushing technique for fouling mitigation. Surface flushing with clean water did not effectively remove foulants from the NF membrane. In contrast, surface flushing with ozonated water (4 mg/L dissolved ozone) could effectively remove most foulants to restore the membrane permeability. This surface flushing technique using ozonated water was able to limit the progression of fouling to 35% in transmembrane pressure increase over five filtration cycles. Results from this study also heighten the need for further development of ceramic NF membrane to ensure adequate removal of pharmaceuticals and personal care products (PPCPs) for water recycling applications. The ceramic NF membrane used in this study showed approximately 40% TOC rejection, and the rejection of PPCPs was generally low and highly variable. It is expected that the fouling mitigation technique developed here is even more important for ceramic NF membranes with smaller pore size and thus better PPCP rejection. PMID:29671797

Water Reclamation Using a Ceramic Nanofiltration Membrane and Surface Flushing with Ozonated Water

Directory of Open Access Journals (Sweden)

Takahiro Fujioka

2018-04-01

Full Text Available A new membrane fouling control technique using ozonated water flushing was evaluated for direct nanofiltration (NF of secondary wastewater effluent using a ceramic NF membrane. Experiments were conducted at a permeate flux of 44 L/m2h to evaluate the ozonated water flushing technique for fouling mitigation. Surface flushing with clean water did not effectively remove foulants from the NF membrane. In contrast, surface flushing with ozonated water (4 mg/L dissolved ozone could effectively remove most foulants to restore the membrane permeability. This surface flushing technique using ozonated water was able to limit the progression of fouling to 35% in transmembrane pressure increase over five filtration cycles. Results from this study also heighten the need for further development of ceramic NF membrane to ensure adequate removal of pharmaceuticals and personal care products (PPCPs for water recycling applications. The ceramic NF membrane used in this study showed approximately 40% TOC rejection, and the rejection of PPCPs was generally low and highly variable. It is expected that the fouling mitigation technique developed here is even more important for ceramic NF membranes with smaller pore size and thus better PPCP rejection.

Comparison of mushroom yield for Pleurotus Sajor Caju and Pleurotus Florida in different number of flushes

International Nuclear Information System (INIS)

Rosnani Abdul Rashid; Mat Rasol Awang; Hassan Hamdani Hassan Mutaat; Meswan Maskom

2006-01-01

This paper aimed at comparing the mushroom yield of Pleurotus sajor caju and Pleurotus florida which was harvested in five flushes. The γ-irradiated empty fruit bunch (EFB) at 25kGy was used as cultivation substrate. About 1 to 2% liquid seed of P. sajor caju and P. florida was inoculated into cultivation substrate. After 30 days, the inoculated substrate was opened for fruiting. For both species, the maximum mushroom yield was obtained in first flush and the lowest yield from the fifth flush. This show the mushroom yield is affected by number of flush. From analysis, the mushroom yield of P. florida was much better compared to P. sajor caju for all flushes. (Author)

Electrolyte-gated transistors based on phenyl-C61-butyric acid methyl ester (PCBM) films: bridging redox properties, charge carrier transport and device performance.

Science.gov (United States)

Lan, Tian; Soavi, Francesca; Marcaccio, Massimo; Brunner, Pierre-Louis; Sayago, Jonathan; Santato, Clara

2018-05-24

The n-type organic semiconductor phenyl-C61-butyric acid methyl ester (PCBM), a soluble fullerene derivative well investigated for organic solar cells and transistors, can undergo several successive reversible, diffusion-controlled, one-electron reduction processes. We exploited such processes to shed light on the correlation between electron transfer properties, ionic and electronic transport as well as device performance in ionic liquid (IL)-gated transistors. Two ILs were considered, based on bis(trifluoromethylsulfonyl)imide [TFSI] as the anion and 1-ethyl-3-methylimidazolium [EMIM] or 1-butyl-1-methylpyrrolidinium [PYR14] as the cation. The aromatic structure of [EMIM] and its lower steric hindrance with respect to [PYR14] favor a 3D (bulk) electrochemical doping. As opposed to this, for [PYR14] the doping seems to be 2D (surface-confined). If the n-doping of the PCBM is pursued beyond the first electrochemical process, the transistor current vs. gate-source voltage plots in [PYR14][TFSI] feature a maximum that points to the presence of finite windows of high conductivity in IL-gated PCBM transistors.

Low Noise Bias Current/Voltage References Based on Floating-Gate MOS Transistors

DEFF Research Database (Denmark)

Igor, Mucha

1997-01-01

The exploitation of floating-gate MOS transistors as reference current and voltage sources is investigated. Test structures of common source and common drain floating-gate devices have been implemented in a commercially available 0.8 micron double-poly CMOS process. The measurements performed...

Reconfigurable chaotic logic gates based on novel chaotic circuit

International Nuclear Information System (INIS)

Behnia, S.; Pazhotan, Z.; Ezzati, N.; Akhshani, A.

2014-01-01

Highlights: • A novel method for implementing logic gates based on chaotic maps is introduced. • The logic gates can be implemented without any changes in the threshold voltage. • The chaos-based logic gates may serve as basic components of future computing devices. - Abstract: The logical operations are one of the key issues in today’s computer architecture. Nowadays, there is a great interest in developing alternative ways to get the logic operations by chaos computing. In this paper, a novel implementation method of reconfigurable logic gates based on one-parameter families of chaotic maps is introduced. The special behavior of these chaotic maps can be utilized to provide same threshold voltage for all logic gates. However, there is a wide interval for choosing a control parameter for all reconfigurable logic gates. Furthermore, an experimental implementation of this nonlinear system is presented to demonstrate the robustness of computing capability of chaotic circuits

ZnO nanowire-based nano-floating gate memory with Pt nanocrystals embedded in Al{sub 2}O{sub 3} gate oxides

Energy Technology Data Exchange (ETDEWEB)

Yeom, Donghyuk; Kang, Jeongmin; Lee, Myoungwon; Jang, Jaewon; Yun, Junggwon; Jeong, Dong-Young; Yoon, Changjoon; Koo, Jamin; Kim, Sangsig [Department of Electrical Engineering and Institute for Nano Science, Korea University, Seoul 136-701 (Korea, Republic of)], E-mail: sangsig@korea.ac.kr

2008-10-01

The memory characteristics of ZnO nanowire-based nano-floating gate memory (NFGM) with Pt nanocrystals acting as the floating gate nodes were investigated in this work. Pt nanocrystals were embedded between Al{sub 2}O{sub 3} tunneling and control oxide layers deposited on ZnO nanowire channels. For a representative ZnO nanowire-based NFGM with embedded Pt nanocrystals, a threshold voltage shift of 3.8 V was observed in its drain current versus gate voltage (I{sub DS}-V{sub GS}) measurements for a double sweep of the gate voltage, revealing that the deep effective potential wells built into the nanocrystals provide our NFGM with a large charge storage capacity. Details of the charge storage effect observed in this memory device are discussed in this paper.

Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs).

Science.gov (United States)

Choi, Woo Young; Lee, Hyun Kook

2016-01-01

The steady scaling-down of semiconductor device for improving performance has been the most important issue among researchers. Recently, as low-power consumption becomes one of the most important requirements, there have been many researches about novel devices for low-power consumption. Though scaling supply voltage is the most effective way for low-power consumption, performance degradation is occurred for metal-oxide-semiconductor field-effect transistors (MOSFETs) when supply voltage is reduced because subthreshold swing (SS) of MOSFETs cannot be lower than 60 mV/dec. Thus, in this thesis, hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) are investigated as one of the most promising alternatives to MOSFETs. By replacing source-side gate insulator with a high- k material, HG TFETs show higher on-current, suppressed ambipolar current and lower SS than conventional TFETs. Device design optimization through simulation was performed and fabrication based on simulation demonstrated that performance of HG TFETs were better than that of conventional TFETs. Especially, enlargement of gate insulator thickness while etching gate insulator at the source side was improved by introducing HF vapor etch process. In addition, the proposed HG TFETs showed higher performance than our previous results by changing structure of sidewall spacer by high- k etching process.

Degradation of ultra-thin gate oxide LDD NMOSFET under GIDL stress

International Nuclear Information System (INIS)

Hu Shigang; Hao Yue; Cao Yanrong; Ma Xiaohua; Wu Xiaofeng; Chen Chi; Zhou Qingjun

2009-01-01

The degradation of device under GIDL (gate-induced drain leakage current) stress has been studied using LDD NMOSFETs with 1.4 nm gate oxides. Experimental result shows that the degradation of device parameters depends more strongly on V d than on V g . The characteristics of the GIDL current are used to analyze the damage generated during the stress. It is clearly found that the change of GIDL current before and after stress can be divided into two stages. The trapping of holes in the oxide is dominant in the first stage, but that of electrons in the oxide is dominant in the second stage. It is due to the common effects of edge direct tunneling and band-to-band tunneling. SILC (stress induced leakage current) in the NMOSFET decreases with increasing stress time under GIDL stress. The degradation characteristic of SILC also shows saturating time dependence. SILC is strongly dependent on the measured gate voltage. The higher the measured gate voltage, the less serious the degradation of the gate current. A likely mechanism is presented to explain the origin of SILC during GIDL stress.

Flush mounting of thin film sensors

Science.gov (United States)

Moore, Thomas C., Sr. (Inventor)

1992-01-01

Flush mounting of a sensor on a surface is provided by first forming a recessed area on the surface. Next, an adhesive bonding mixture is introduced into the recessed area. The adhesive bonding mixture is chosen to provide thermal expansion matching with the surface surrounding the recessed area. A strip of high performance polymeric tape is provided, with the sensor attached to the underside thereof, and the tape is positioned over the recessed area so that it acts as a carrier of the sensor. A shim having flexibility so that it will conform to the surface surrounding the recessed area is placed over the tape, and a vacuum pad is placed over the shim. The area above the surface is then evacuated while holding the sensor flush with the surface during curing of the adhesive bonding mixture. After such curing, the pad, shim, and tape are removed from the sensor, electrical connections for the sensor are provided, after which the remaining space in the recessed area is filled with a polymeric foam.

Remediation of Contaminated Soils by Solvent Flushing

NARCIS (Netherlands)

Augustijn, Dionysius C.M.; Jessup, Ron E.; Rao, P. Suresh C.; Wood, A. Lynn

1994-01-01

Solvent flushing is a potential technique for remediating a waste disposal/spill site contaminated with organic chemicals. This technique involves the injection of a solvent mixture (e.g., water plus alcohols) that enhances contaminant solubility, reduces the retardation factor, and increases the

Mixing and flushing time scales in the Azhikode Estuary, southwest coast of India

Digital Repository Service at National Institute of Oceanography (India)

Revichandran, C.; Pylee, A.

Flushing time scales of the Azhikode Estuary, Kerala, India showed pronounced dry season and wet season signals as well as large inter-annual variation. Cumulative flushing time of the estuary varies from 4.8 tide cycles in April to 1.22 tide cycles...

30 CFR 71.402 - Minimum requirements for bathing facilities, change rooms, and sanitary flush toilet facilities.

Science.gov (United States)

2010-07-01

... nonirritating cleansing agent shall be provided for use at each shower. (2) Sanitary flush toilet facilities. (i..., change rooms, and sanitary flush toilet facilities. 71.402 Section 71.402 Mineral Resources MINE SAFETY... Rooms, and Sanitary Flush Toilet Facilities at Surface Coal Mines § 71.402 Minimum requirements for...

Perspective analysis of tri gate germanium tunneling field-effect transistor with dopant segregation region at source/drain

Science.gov (United States)

Liu, Liang-kui; Shi, Cheng; Zhang, Yi-bo; Sun, Lei

2017-04-01

A tri gate Ge-based tunneling field-effect transistor (TFET) has been numerically studied with technology computer aided design (TCAD) tools. Dopant segregated Schottky source/drain is applied to the device structure design (DS-TFET). The characteristics of the DS-TFET are compared and analyzed comprehensively. It is found that the performance of n-channel tri gate DS-TFET with a positive bias is insensitive to the dopant concentration and barrier height at n-type drain, and that the dopant concentration and barrier height at a p-type source considerably affect the device performance. The domination of electron current in the entire BTBT current of this device accounts for this phenomenon and the tri-gate DS-TFET is proved to have a higher performance than its dual-gate counterpart.

Analytical V TH and S models for (DMG-GC-stack) surrounding-gate MOSFET

Science.gov (United States)

Aouaj, Abdellah; Bouziane, Ahmed; Nouaçry, Ahmed

2012-01-01

This article presents an analytical model of surface potential, threshold voltage and subthreshold swing for a new structure of surrounding-gate MOSFET by combining dual-material gate, graded channel and gate stack. By comparison with published results, it is shown that the new MOSFET structure can improve the immunity of CMOS-based devices in the nanoscale regime against short-channel effects.

Cylindrical Field Effect Transistor: A Full Volume Inversion Device

KAUST Repository

Fahad, Hossain M.

2010-12-01

The increasing demand for high performance as well as low standby power devices has been the main reason for the aggressive scaling of conventional CMOS transistors. Current devices are at the 32nm technology node. However, due to physical limitations as well as increase in short-channel effects, leakage, power dissipation, this scaling trend cannot continue and will eventually hit a barrier. In order to overcome this, alternate device topologies have to be considered altogether. Extensive research on ultra thin body double gate FETs and gate all around nanowire FETs has shown a lot of promise. Under strong inversion, these devices have demonstrated increased performance over their bulk counterparts. This is mainly attributed to full carrier inversion in the body. However, these devices are still limited by lithographic and processing challenges making them unsuitable for commercial production. This thesis explores a unique device structure called the CFET (Cylindrical Field Effect Transistors) which also like the above, relies on complete inversion of carriers in the body/bulk. Using dual gates; an outer and an inner gate, full-volume inversion is possible with benefits such as enhanced drive currents, high Ion/Ioff ratios and reduced short channel effects.

Seasonality of Central Amazon Forest Leaf Flush Using Tower-Mounted RGB Camera

Science.gov (United States)

Wu, J.; Nelson, B. W.; Tavares, J. V.; Valeriano, D. M.; Lopes, A. P.; Marostica, S. F.; Martins, G.; Prohaska, N.; Albert, L.; De Araujo, A. C.; Manzi, A. O.; Saleska, S. R.; Huete, A. R.

2014-12-01

Tower-mounted RGB cameras can contribute data to the debate on seasonality of photosynthesis in Amazon upland forests and to improved modelling of forest response to climate change. In late 2010 we began monitoring upper crown surfaces of ~65 living trees or vines from a 54m tall eddy-flux tower on a well-drained clay-soil plateau. This Central Amazon site (60.2091 W, 2.6092 S) is in a large forest reserve. We deployed a Stardot Netcam XL RGB camera with a 1024 x 768 resolution CMOS sensor, 66o HFOV lens, fixed oblique south view, fixed iris, fixed white balance and auto-exposure. Images were logged every 15 seconds to a passively cooled FitPC2i with heat-tolerant SSD drive. Camera and PC automatically rebooted after power outages. Here we report results for two full years, from 1 Dec 2011 through 30 Nov 2013. Images in six day intervals were selected near local noon for homogeneous diffuse lighting under cloudy sky and for a standard reflected radiance (± 10%). Crowns showing two easily recognized phenophases were tallied: (1) massive flushing of new light-green leaves and (2) complete or nearly complete leaf loss. On average, 60% of live crowns flushed a massive amount of new leaves each year. Each crown flush was completed within 30 days. During the five driest months (Jun-Oct), 44% of all live crowns, on average, exhibited such massive leaf flush. In the five wettest months (Dec-Apr) only 11% of live crowns mass-flushed new leaves. In each year 23% of all live crowns became deciduous, usually a brief (1-2 week) preamble to flushing. Additional crowns lost old dark-green leaves partially and more gradually, becoming semi-deciduous prior to flushing. From these two years of camera data we infer that highly efficient leaves of 2-6 months age (high maximum carboxylation rate) are most abundant from the late dry season (October) through the mid wet season (March). This coincides with peak annual photosynthesis (Gross Ecosystem Productivity) reported for this same

A gate current 1/f noise model for GaN/AlGaN HEMTs

International Nuclear Information System (INIS)

Liu Yu'an; Zhuang Yiqi

2014-01-01

This work presents a theoretical and experimental study on the gate current 1/f noise in AlGaN/GaN HEMTs. Based on the carrier number fluctuation in the two-dimensional electron gas channel of AlGaN/GaN HEMTs, a gate current 1/f noise model containing a trap-assisted tunneling current and a space charge limited current is built. The simulation results are in good agreement with the experiment. Experiments show that, if V g < V x (critical gate voltage of dielectric relaxation), gate current 1/f noise comes from the superimposition of trap-assisted tunneling RTS (random telegraph noise), while V g > V x , gate current 1/f noise comes from not only the trap-assisted tunneling RTS, but also the space charge limited current RTS. This indicates that the gate current 1/f noise of the GaN-based HEMTs device is sensitive to the interaction of defects and the piezoelectric relaxation. It provides a useful characterization tool for deeper information about the defects and their evolution in AlGaN/GaN HEMTs. (semiconductor devices)

Restless Tuneup of High-Fidelity Qubit Gates

NARCIS (Netherlands)

Rol, M.A.; Bultink, C.C.; O'Brien, T.E.; Jong, S.R. de; Theis, L.S.; Fu, X.; Luthi, F.; Vermeulen, R.F.L.; Sterke, J.C. de; Bruno, A.; Deurloo, D.; Schouten, R.N.; Wilhelm, F.K.; Dicarlo, L.

2017-01-01

We present a tuneup protocol for qubit gates with tenfold speedup over traditional methods reliant on qubit initialization by energy relaxation. This speedup is achieved by constructing a cost function for Nelder-Mead optimization from real-time correlation of nondemolition measurements interleaving

Restless Tuneup of High-Fidelity Qubit Gates

NARCIS (Netherlands)

Rol, M.A.; Bultink, C.C.; O'Brien, T.E.; De Jong, S. R.; Theis, L. S.; Fu, X.; Lüthi, F.; Vermeulen, R.F.L.; de Sterke, J.C.; Bruno, A.; Deurloo, D.; Schouten, R.N.; Wilhelm, FK; Di Carlo, L.

2017-01-01

We present a tuneup protocol for qubit gates with tenfold speedup over traditional methods reliant on qubit initialization by energy relaxation. This speedup is achieved by constructing a cost function for Nelder-Mead optimization from real-time correlation of nondemolition measurements

Continuous Flushing of the Bladder in Rodents Reduces Artifacts and Improves Quantification in Molecular Imaging

Directory of Open Access Journals (Sweden)

Steven Deleye

2014-07-01

Full Text Available In this study, we evaluated the partial volume effect (PVE of 2-deoxy-2-[18F]fluoro-D-glucose (18F-FDG tracer accumulation in the bladder on the positron emission tomographic (PET image quantification in mice and rats suffering from inflammatory bowel disease. To improve the accuracy, we implemented continuous bladder flushing procedures. Female mice and rats were scanned using microPET/computed tomography (CT at baseline and after induction of acute colitis by injecting 2,4,6-trinitrobenzene sulfonic acid (TNBS intrarectally. During the scans, the bladder was continuously flushed in one group, whereas in the other group, no bladder flushing was performed. As a means of in vivo and ex vivo validation of the inflammation, animals also underwent colonoscopy and were sacrificed for gamma counting (subpopulation and to score the colonic damage both micro- and macroscopically as well as biochemically. At baseline, the microPET signal in the colon of both mice and rats was significantly higher in the nonflushed group compared to the flushed group, caused by the PVE of tracer activity in the bladder. Hence, the colonoscopy and postmortem analyses showed no significant differences at baseline between the flushed and nonflushed animals. TNBS induced significant colonic inflammation, as revealed by colonoscopic and postmortem scores, which was not detected by microPET in the mice without bladder flushing, again because of spillover of bladder activity in the colonic area. MicroPET in bladder-flushed animals did reveal a significant increase in 18F-FDG uptake. Correlations between microPET and colonoscopy, macroscopy, microscopy, and myeloperoxidase yielded higher Spearman rho values in mice with continuously flushed bladders during imaging. Comparable, although somewhat less pronounced, results were shown in the rat. Continuous bladder flushing reduced image artifacts and is mandatory for accurate image quantification in the pelvic region for both mice

Theoretical basis, application, reliability, and sample size estimates of a Meridian Energy Analysis Device for Traditional Chinese Medicine Research

Directory of Open Access Journals (Sweden)

Ming-Yen Tsai

Full Text Available OBJECTIVES: The Meridian Energy Analysis Device is currently a popular tool in the scientific research of meridian electrophysiology. In this field, it is generally believed that measuring the electrical conductivity of meridians provides information about the balance of bioenergy or Qi-blood in the body. METHODS AND RESULTS: PubMed database based on some original articles from 1956 to 2014 and the authoŕs clinical experience. In this short communication, we provide clinical examples of Meridian Energy Analysis Device application, especially in the field of traditional Chinese medicine, discuss the reliability of the measurements, and put the values obtained into context by considering items of considerable variability and by estimating sample size. CONCLUSION: The Meridian Energy Analysis Device is making a valuable contribution to the diagnosis of Qi-blood dysfunction. It can be assessed from short-term and long-term meridian bioenergy recordings. It is one of the few methods that allow outpatient traditional Chinese medicine diagnosis, monitoring the progress, therapeutic effect and evaluation of patient prognosis. The holistic approaches underlying the practice of traditional Chinese medicine and new trends in modern medicine toward the use of objective instruments require in-depth knowledge of the mechanisms of meridian energy, and the Meridian Energy Analysis Device can feasibly be used for understanding and interpreting traditional Chinese medicine theory, especially in view of its expansion in Western countries.

Dynamic Observation of Brain-Like Learning in a Ferroelectric Synapse Device

Science.gov (United States)

Nishitani, Yu; Kaneko, Yukihiro; Ueda, Michihito; Fujii, Eiji; Tsujimura, Ayumu

2013-04-01

A brain-like learning function was implemented in an electronic synapse device using a ferroelectric-gate field effect transistor (FeFET). The FeFET was a bottom-gate type FET with a ZnO channel and a ferroelectric Pb(Zr,Ti)O3 (PZT) gate insulator. The synaptic weight, which is represented by the channel conductance of the FeFET, is updated by applying a gate voltage through a change in the ferroelectric polarization in the PZT. A learning function based on the symmetric spike-timing dependent synaptic plasticity was implemented in the synapse device using the multilevel weight update by applying a pulse gate voltage. The dynamic weighting and learning behavior in the synapse device was observed as a change in the membrane potential in a spiking neuron circuit.

dRail: a novel physical layout methodology for power gated circuits

OpenAIRE

Mistry, Jatin N.; Biggs, John; Myers, James; Al-Hashimi, Bashir M.; Flynn, David

2012-01-01

In this paper we present a physical layout methodology, called dRail, to allow power gated and non-power gated cells to be placed next to each other. This is unlike traditional voltage area layout which separates cells to prevent shorting of power supplies leading to impact on area, routing and power. To implement dRail, a modified standard cell architecture and physical layout is proposed. The methodology is validated by implementing power gating on the data engine in an ARM Cortex-A5 proces...

A DNA Logic Gate Automaton for Detection of Rabies and Other Lyssaviruses.

Science.gov (United States)

Vijayakumar, Pavithra; Macdonald, Joanne

2017-07-05

Immediate activation of biosensors is not always desirable, particularly if activation is due to non-specific interactions. Here we demonstrate the use of deoxyribozyme-based logic gate networks arranged into visual displays to precisely control activation of biosensors, and demonstrate a prototype molecular automaton able to discriminate between seven different genotypes of Lyssaviruses, including Rabies virus. The device uses novel mixed-base logic gates to enable detection of the large diversity of Lyssavirus sequence populations, while an ANDNOT logic gate prevents non-specific activation across genotypes. The resultant device provides a user-friendly digital-like, but molecule-powered, dot-matrix text output for unequivocal results read-out that is highly relevant for point of care applications. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Extended-gate organic field-effect transistor for the detection of histamine in water

Science.gov (United States)

Minamiki, Tsukuru; Minami, Tsuyoshi; Yokoyama, Daisuke; Fukuda, Kenjiro; Kumaki, Daisuke; Tokito, Shizuo

2015-04-01

As part of our ongoing research program to develop health care sensors based on organic field-effect transistor (OFET) devices, we have attempted to detect histamine using an extended-gate OFET. Histamine is found in spoiled or decayed fish, and causes foodborne illness known as scombroid food poisoning. The new OFET device possesses an extended gate functionalized by carboxyalkanethiol that can interact with histamine. As a result, we have succeeded in detecting histamine in water through a shift in OFET threshold voltage. This result indicates the potential utility of the designed OFET devices in food freshness sensing.

Multi-material gate poly-crystalline thin film transistors: Modeling and simulation for an improved gate transport efficiency

International Nuclear Information System (INIS)

Sehgal, Amit; Mangla, Tina; Gupta, Mridula; Gupta, R.S.

2008-01-01

In this work, a two-dimensional potential distribution formulation is presented for multi-material gate poly-crystalline silicon thin film transistors. The developed formulation incorporates the effects due to traps and grain-boundaries. In short-channel devices, short-channel effects and drain-induced barrier lowering (DIBL) effect exists, and are accounted for in the analysis. The work aims at the reduction of DIBL effect and grain-boundary effects i.e. to reduce the potential barriers generated in the channel by employing gate-engineered structures. A study of work-functions and electrode lengths of multi-material gate electrode is done to suppress the potential barriers, hot electron effect and to improve the carrier transport efficiency. Green's function approach is adopted for the two-dimensional potential solution. The results obtained show a good agreement with simulated results, thus, demonstrating the validity of our model

Spin-wave logic devices based on isotropic forward volume magnetostatic waves

International Nuclear Information System (INIS)

Klingler, S.; Pirro, P.; Brächer, T.; Leven, B.; Hillebrands, B.; Chumak, A. V.

2015-01-01

We propose the utilization of isotropic forward volume magnetostatic spin waves in modern wave-based logic devices and suggest a concrete design for a spin-wave majority gate operating with these waves. We demonstrate by numerical simulations that the proposed out-of-plane magnetized majority gate overcomes the limitations of anisotropic in-plane magnetized majority gates due to the high spin-wave transmission through the gate, which enables a reduced energy consumption of these devices. Moreover, the functionality of the out-of-plane majority gate is increased due to the lack of parasitic generation of short-wavelength exchange spin waves

Spin-wave logic devices based on isotropic forward volume magnetostatic waves

Energy Technology Data Exchange (ETDEWEB)

Klingler, S., E-mail: stefan.klingler@wmi.badw-muenchen.de; Pirro, P.; Brächer, T.; Leven, B.; Hillebrands, B.; Chumak, A. V. [Fachbereich Physik and Landesforschungszentrum OPTIMAS, Technische Universität Kaiserslautern, 67663 Kaiserslautern (Germany)

2015-05-25

We propose the utilization of isotropic forward volume magnetostatic spin waves in modern wave-based logic devices and suggest a concrete design for a spin-wave majority gate operating with these waves. We demonstrate by numerical simulations that the proposed out-of-plane magnetized majority gate overcomes the limitations of anisotropic in-plane magnetized majority gates due to the high spin-wave transmission through the gate, which enables a reduced energy consumption of these devices. Moreover, the functionality of the out-of-plane majority gate is increased due to the lack of parasitic generation of short-wavelength exchange spin waves.

A comparison of basal and eye-flush tears for the analysis of cat tear proteins.

Science.gov (United States)

Petznick, Andrea; Evans, Margaret D M; Madigan, Michele C; Markoulli, Maria; Garrett, Qian; Sweeney, Deborah F

2011-02-01

To identify a rapid and effective tear collection method providing sufficient tear volume and total protein content (TPC) for analysis of individual proteins in cats. Domestic adult short-haired cats (12-37 months; 2.7-6.6 kg) were used in the study. Basal tears without stimulation and eye-flush tears after instillation of saline (10 μl) were collected using microcapillary tubes from animal eyes either unwounded control or wounded with 9-mm central epithelial debridement giving four groups with n = 3. Tear comparisons were based on total time and rate for tear collection, TPC using micro bicinchoninic acid (BCA), tear immunoglobulin A (IgA), total matrix-metalloproteinase (MMP)-9 concentration using sandwich enzyme-linked immunosorbent assay (ELISA) and MMP-9 activity. Eye-flush tears were collected significantly faster than basal tears in wounded eyes with higher rates for tear collection in unwounded control and wounded eyes. TPC was significantly lower in eye-flush tears compared to basal tears. The relative proportion of tear IgA normalized to TPC (% IgA of TPC) was not significantly different between basal and eye-flush tears. In unwounded control eyes, MMP-9 was slightly higher in eye-flush than in basal tears; activity of MMP-9 in both tear types was similar. In wounded eyes, eye-flush tears showed highest MMP-9 levels and activity on Day 1, which subsequently decreased to Day 7. MMP-9 activity in basal tears from wounded eyes did not display changes in expression. Eye-flush tears can be collected rapidly providing sufficient tear volume and TPC. This study also indicates that eye-flush tears may be more suitable than basal tears for the analysis of MMPs following corneal wounding. © 2011 The Authors. Acta Ophthalmologica © 2011 Acta Ophthalmologica Scandinavica Foundation.

Non-equilibrium effects of core-cooling and time-dependent internal heating on mantle flush events

Directory of Open Access Journals (Sweden)

D. A. Yuen

1995-01-01

Full Text Available We have examined the non-equilibrium effects of core-cooling and time-dependent internal-heating on the thermal evolution of the Earth's mantle and on mantle flush events caused by the two major phase transitions. Both two- and three-dimensional models have been employed. The mantle viscosity responds to the secular cooling through changes in the averaged temperature field. A viscosity which decreases algebraically with the average temperature has been considered. The time-dependent internal-heating is prescribed to decrease exponentially with a single decay time. We have studied the thermal histories with initial Rayleigh numbers between 2 x 107 and 108 . Flush events, driven by the non-equilibrium forcings, are much more dramatic than those produced by the equilibrium boundary conditions and constant internal heating. Multiple flush events are found under non-equilibrium conditions in which there is very little internal heating or very fast decay rates of internal-heating. Otherwise, the flush events take place in a relatively continuous fashion. Prior to massive flush events small-scale percolative structures appear in the 3D temperature fields. Time-dependent signatures, such as the surface heat flux, also exhibits high frequency oscillatory patterns prior to massive flush events. These two observations suggest that the flush event may be a self-organized critical phenomenon. The Nusselt number as a function of the time-varying Ra does not follow the Nusselt vs. Rayleigh number power-law relationship based on equilibrium (constant temperature boundary conditions. Instead Nu(t may vary non-monotonically with time because of the mantle flush events. Convective processes in the mantle operate quite differently under non-equilibrium conditions from its behaviour under the usual equilibrium situations.

Combining a multi deposition multi annealing technique with a scavenging (Ti) to improve the high-k/metal gate stack performance for a gate-last process

International Nuclear Information System (INIS)

Zhang ShuXiang; Yang Hong; Tang Bo; Tang Zhaoyun; Xu Yefeng; Xu Jing; Yan Jiang

2014-01-01

ALD HfO 2 films fabricated by a novel multi deposition multi annealing (MDMA) technique are investigated, we have included samples both with and without a Ti scavenging layer. As compared to the reference gate stack treated by conventional one-time deposition and annealing (D and A), devices receiving MDMA show a significant reduction in leakage current. Meanwhile, EOT growth is effectively controlled by the Ti scavenging layer. This improvement strongly correlates with the cycle number of D and A (while keeping the total annealing time and total dielectrics thickness the same). Transmission electron microscope and energy-dispersive X-ray spectroscopy analysis suggests that oxygen incorporation into both the high-k film and the interfacial layer is likely to be responsible for the improvement of the device. This novel MDMA is promising for the development of gate stack technology in a gate last integration scheme. (semiconductor technology)

University Students’ Willingness to Assist Fellow Students Who Experience Alcohol-Related Facial Flushing to Reduce Their Drinking

Directory of Open Access Journals (Sweden)

Lanyan Ding

2018-04-01

Full Text Available This study explored bystanders’ willingness to help a friend who flushes when drinking to reduce his/her drinking. Alcohol-related facial flushing is an indicator of an inherited variant enzyme, aldehyde dehydrogenase (ALDH, that impairs alcohol metabolism and increases drinkers’ lifetime risk of certain aerodigestive cancers. Individuals who flush should reduce their alcohol exposure, but they may continue to drink if social pressures and rules of etiquette make not drinking socially risky. The analysis used data from 2912 undergraduate students from 13 universities in southwestern, central and northeastern China from a survey asking how they respond to someone’s flushing in various scenarios. Latent class analysis grouped students by similar responses to flushing. A multinomial logistic regression explored how class membership was associated with knowledge, drinking status, and reactions to one’s own flushing. Five classes were derived from the latent class analysis, ranging from always intervene to mostly hesitate to help; in between were classes of students who were willing to help in some scenarios and hesitant in other scenarios. Only 11.6% students knew the connection between facial flushing and impaired alcohol metabolism, and knowledgeable students were somewhat more likely to assist when they saw someone flushing. In the absence of knowledge, other factors—such as drinking status, the gender of the bystander, the gender of the person who flushed, and degree of friendship with the person who flushed—determined how willing a person was to help someone reduce or stop drinking. Class membership was predicted by knowledge, gender, drinking status, and reactions to one’s own flushing. Of these 4 factors, knowledge and reactions to one’s own flushing could be influenced through alcohol education programs. It will take some time for alcohol education to catch up to and change social and cultural patterns of drinking. Meanwhile

University Students' Willingness to Assist Fellow Students Who Experience Alcohol-Related Facial Flushing to Reduce Their Drinking.

Science.gov (United States)

Ding, Lanyan; Yuen, Lok-Wa; Newman, Ian M; Shell, Duane F

2018-04-25

This study explored bystanders’ willingness to help a friend who flushes when drinking to reduce his/her drinking. Alcohol-related facial flushing is an indicator of an inherited variant enzyme, aldehyde dehydrogenase (ALDH), that impairs alcohol metabolism and increases drinkers’ lifetime risk of certain aerodigestive cancers. Individuals who flush should reduce their alcohol exposure, but they may continue to drink if social pressures and rules of etiquette make not drinking socially risky. The analysis used data from 2912 undergraduate students from 13 universities in southwestern, central and northeastern China from a survey asking how they respond to someone’s flushing in various scenarios. Latent class analysis grouped students by similar responses to flushing. A multinomial logistic regression explored how class membership was associated with knowledge, drinking status, and reactions to one’s own flushing. Five classes were derived from the latent class analysis, ranging from always intervene to mostly hesitate to help; in between were classes of students who were willing to help in some scenarios and hesitant in other scenarios. Only 11.6% students knew the connection between facial flushing and impaired alcohol metabolism, and knowledgeable students were somewhat more likely to assist when they saw someone flushing. In the absence of knowledge, other factors—such as drinking status, the gender of the bystander, the gender of the person who flushed, and degree of friendship with the person who flushed—determined how willing a person was to help someone reduce or stop drinking. Class membership was predicted by knowledge, gender, drinking status, and reactions to one’s own flushing. Of these 4 factors, knowledge and reactions to one’s own flushing could be influenced through alcohol education programs. It will take some time for alcohol education to catch up to and change social and cultural patterns of drinking. Meanwhile, motivational

Bubble gate for in-plane flow control.

Science.gov (United States)

Oskooei, Ali; Abolhasani, Milad; Günther, Axel

2013-07-07

We introduce a miniature gate valve as a readily implementable strategy for actively controlling the flow of liquids on-chip, within a footprint of less than one square millimetre. Bubble gates provide for simple, consistent and scalable control of liquid flow in microchannel networks, are compatible with different bulk microfabrication processes and substrate materials, and require neither electrodes nor moving parts. A bubble gate consists of two microchannel sections: a liquid-filled channel and a gas channel that intercepts the liquid channel to form a T-junction. The open or closed state of a bubble gate is determined by selecting between two distinct gas pressure levels: the lower level corresponds to the "open" state while the higher level corresponds to the "closed" state. During closure, a gas bubble penetrates from the gas channel into the liquid, flanked by a column of equidistantly spaced micropillars on each side, until the flow of liquid is completely obstructed. We fabricated bubble gates using single-layer soft lithographic and bulk silicon micromachining procedures and evaluated their performance with a combination of theory and experimentation. We assessed the dynamic behaviour during more than 300 open-and-close cycles and report the operating pressure envelope for different bubble gate configurations and for the working fluids: de-ionized water, ethanol and a biological buffer. We obtained excellent agreement between the experimentally determined bubble gate operational envelope and a theoretical prediction based on static wetting behaviour. We report case studies that serve to illustrate the utility of bubble gates for liquid sampling in single and multi-layer microfluidic devices. Scalability of our strategy was demonstrated by simultaneously addressing 128 bubble gates.

The impact of gate width setting and gate utilization factors on plutonium assay in passive correlated neutron counting

International Nuclear Information System (INIS)

Henzlova, D.; Menlove, H.O.; Croft, S.; Favalli, A.; Santi, P.

2015-01-01

In the field of nuclear safeguards, passive neutron multiplicity counting (PNMC) is a method typically employed in non-destructive assay (NDA) of special nuclear material (SNM) for nonproliferation, verification and accountability purposes. PNMC is generally performed using a well-type thermal neutron counter and relies on the detection of correlated pairs or higher order multiplets of neutrons emitted by an assayed item. To assay SNM, a set of parameters for a given well-counter is required to link the measured multiplicity rates to the assayed item properties. Detection efficiency, die-away time, gate utilization factors (tightly connected to die-away time) as well as optimum gate width setting are among the key parameters. These parameters along with the underlying model assumptions directly affect the accuracy of the SNM assay. In this paper we examine the role of gate utilization factors and the single exponential die-away time assumption and their impact on the measurements for a range of plutonium materials. In addition, we examine the importance of item-optimized coincidence gate width setting as opposed to using a universal gate width value. Finally, the traditional PNMC based on multiplicity shift register electronics is extended to Feynman-type analysis and application of this approach to Pu mass assay is demonstrated

The impact of gate width setting and gate utilization factors on plutonium assay in passive correlated neutron counting

Energy Technology Data Exchange (ETDEWEB)

Henzlova, D., E-mail: henzlova@lanl.gov [Los Alamos National Laboratory, Los Alamos, NM 87545 (United States); Menlove, H.O. [Los Alamos National Laboratory, Los Alamos, NM 87545 (United States); Croft, S. [Oak Ridge National Laboratory, Oak Ridge, TN 37831 (United States); Favalli, A.; Santi, P. [Los Alamos National Laboratory, Los Alamos, NM 87545 (United States)

2015-10-11

In the field of nuclear safeguards, passive neutron multiplicity counting (PNMC) is a method typically employed in non-destructive assay (NDA) of special nuclear material (SNM) for nonproliferation, verification and accountability purposes. PNMC is generally performed using a well-type thermal neutron counter and relies on the detection of correlated pairs or higher order multiplets of neutrons emitted by an assayed item. To assay SNM, a set of parameters for a given well-counter is required to link the measured multiplicity rates to the assayed item properties. Detection efficiency, die-away time, gate utilization factors (tightly connected to die-away time) as well as optimum gate width setting are among the key parameters. These parameters along with the underlying model assumptions directly affect the accuracy of the SNM assay. In this paper we examine the role of gate utilization factors and the single exponential die-away time assumption and their impact on the measurements for a range of plutonium materials. In addition, we examine the importance of item-optimized coincidence gate width setting as opposed to using a universal gate width value. Finally, the traditional PNMC based on multiplicity shift register electronics is extended to Feynman-type analysis and application of this approach to Pu mass assay is demonstrated.

Design and optimization analysis of dual material gate on DG-IMOS

Science.gov (United States)

Singh, Sarabdeep; Raman, Ashish; Kumar, Naveen

2017-12-01

An impact ionization MOSFET (IMOS) is evolved for overcoming the constraint of less than 60 mV/decade sub-threshold slope (SS) of conventional MOSFET at room temperature. In this work, first, the device performance of the p-type double gate impact ionization MOSFET (DG-IMOS) is optimized by adjusting the device design parameters. The adjusted parameters are ratio of gate and intrinsic length, gate dielectric thickness and gate work function. Secondly, the DMG (dual material gate) DG-IMOS is proposed and investigated. This DMG DG-IMOS is further optimized to obtain the best possible performance parameters. Simulation results reveal that DMG DG-IMOS when compared to DG-IMOS, shows better I ON, I ON/I OFF ratio, and RF parameters. Results show that by properly tuning the lengths of two materials at a ratio of 1.5 in DMG DG-IMOS, optimized performance is achieved including I ON/I OFF ratio of 2.87 × 109 A/μm with I ON as 11.87 × 10-4 A/μm and transconductance of 1.06 × 10-3 S/μm. It is analyzed that length of drain side material should be greater than the length of source side material to attain the higher transconductance in DMG DG-IMOS.

Effect of aerobic exercises versus laser acupuncture in treatment of postmenopausal hot flushes: a randomized controlled trial.

Science.gov (United States)

Elhosary, Eman Abdelfatah Mohamed; Ewidea, Mahmoud Mohamed; Ahmed, Hamada Ahmed Hamada; El Khatib, Ayman

2018-02-01

[Purpose] To compare the effect of aerobic exercises versus laser acupuncture in treatment of postmenopausal hot flushes. [Subjects and Methods] This study was designed as single blind randomized controlled trial. A total of 48 postmenopausal women complained of hot flushes. Their ages ranged between 45 to 55 years and were randomly assigned into 2 equal groups: group (A), which received an aerobic exercises, and group (B), which received laser acupuncture. Both groups recieved 3 sessions per week for two months. The level of follicular stimulating hormone, lutelizing hormone, and hot flushes dairy card were assessed the severity of hot flahes before and after treatment program. [Results] There were Significant reduction in FSH, LH, and menopausal daily hot flush scale in group A compared with group B at the post treatment. [Conclusion] Eight week program of an aerobic exercises yields improvement in FSH, LH, and decrease in severity of hot flushes assessed by hot flush dairy card than laser acupuncture in the treatment of postmenopausal hot flashes.

Analytical model for subthreshold current and subthreshold swing of short-channel double-material-gate MOSFETs with strained-silicon channel on silicon—germanium substrates

International Nuclear Information System (INIS)

Tiwari Pramod Kumar; Saramekala Gopi Krishna; Mukhopadhyay Anand Kumar; Dubey Sarvesh

2014-01-01

The present work gives some insight into the subthreshold behaviour of short-channel double-material-gate strained-silicon on silicon—germanium MOSFETs in terms of subthreshold swing and off-current. The formulation of subthreshold current and, thereupon, the subthreshold swing have been done by exploiting the expression of potential distribution in the channel region of the device. The dependence of the subthreshold characteristics on the device parameters, such as Ge mole fraction, gate length ratio, work function of control gate metal and gate length, has been tested in detail. The analytical models have been validated by the numerical simulation results that were obtained from the device simulation software ATLAS™ by Silvaco Inc. (semiconductor devices)

Quantitative Determination on Ionic-Liquid-Gating Control of Interfacial Magnetism.

Science.gov (United States)

Zhao, Shishun; Zhou, Ziyao; Peng, Bin; Zhu, Mingmin; Feng, Mengmeng; Yang, Qu; Yan, Yuan; Ren, Wei; Ye, Zuo-Guang; Liu, Yaohua; Liu, Ming

2017-05-01

Ionic-liquid gating on a functional thin film with a low voltage has drawn a lot of attention due to rich chemical, electronic, and magnetic phenomena at the interface. Here, a key challenge in quantitative determination of voltage-controlled magnetic anisotropy (VCMA) in Au/[DEME] + [TFSI] - /Co field-effect transistor heterostructures is addressed. The magnetic anisotropy change as response to the gating voltage is precisely detected by in situ electron spin resonance measurements. A reversible change of magnetic anisotropy up to 219 Oe is achieved with a low gating voltage of 1.5 V at room temperature, corresponding to a record high VCMA coefficient of ≈146 Oe V -1 . Two gating effects, the electrostatic doping and electrochemical reaction, are distinguished at various gating voltage regions, as confirmed by X-ray photoelectron spectroscopy and atomic force microscopy experiments. This work shows a unique ionic-liquid-gating system for strong interfacial magnetoelectric coupling with many practical advantages, paving the way toward ion-liquid-gating spintronic/electronic devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Scaling the Serialization of MOSFETs by Magnetically Coupling Their Gate Electrodes

DEFF Research Database (Denmark)

Dimopoulos, Emmanouil; Munk-Nielsen, Stig

2013-01-01

More than twenty years of thorough research on the serialization of power semiconductor switches, like the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) or the Insulated Gate Bipolar Transistor (IGBT), have resulted into several different stacking concepts; all aiming towards...... the establishment of a high-efficient, high-voltage, fast-switching device. Among the prevailing stacking approaches lies the gate balancing core technique, which, in its initial form, demonstrated very good performance in strings of high-power IGBT modules, by magnetically coupling their gate electrodes. Recently...

Effect of lavender aromatherapy on menopause hot flushing: A crossover randomized clinical trial

Directory of Open Access Journals (Sweden)

Rafat Kazemzadeh

2016-09-01

Conclusion: This study indicated that the use of lavender aromatherapy reduced menopause flushing. Given the impact of stress on flushing and the undesirable effects of menopause symptoms on the quality of life, it would appear that this simple, noninvasive, safe, and effective method can be used by menopausal women with noticeable benefits.

A Review of Nanoscale Channel and Gate Engineered FINFETs for VLSI Mixed Signal Applications Using Zirconium-di-Oxide Dielectrics

Directory of Open Access Journals (Sweden)

D.Nirmal

2014-07-01

Full Text Available In the past, most of the research and development efforts in the area of CMOS and IC’s are oriented towards reducing the power and increasing the gain of the circuits. While focusing the attention on low power and high gain in the device, the materials of the device also been taken into consideration. In the present technology, Computationally intensive devices with low power dissipation and high gain are becoming a critical application domain. Several factors have contributed to this paradigm shift. The primary driving factor being the increase in scale of integration, the chip has to accommodate smaller and faster transistors than their predecessors. During the last decade semiconductor technology has been led by conventional scaling. Scaling, has been aimed towards higher speed, lower power and higher density of the semiconductor devices. However, as scaling approached its physical limits, it has become more difficult and challenging for fabrication industry. Therefore, tremendous research has been carried out to investigate the alternatives, and this led to the introduction of new Nano materials and concepts to overcome the difficulties in the device fabrications. In order to reduce the leakage current and parasitic capacitance in devices, gate oxide high-k dielectric materials are explored. Among the different high-k materials available the nano size Zirconium dioxide material is suggested as an alternate gate oxide material for devices due to its thermal stability and small grain size of material. To meet the requirements of ITRS roadmap 2012, the Multi gate devices are considered to be one of the most promising technologies for the future microelectronics industry due to its excellent immunity to short channel effects and high value of On current. The double gate or multi gate devices provide a better scalability option due to its excellent immunity to short-channel effects. Here the different high-k materials are replaced in different

Highly Stable, Dual-Gated MoS2 Transistors Encapsulated by Hexagonal Boron Nitride with Gate-Controllable Contact, Resistance, and Threshold Voltage.

Science.gov (United States)

Lee, Gwan-Hyoung; Cui, Xu; Kim, Young Duck; Arefe, Ghidewon; Zhang, Xian; Lee, Chul-Ho; Ye, Fan; Watanabe, Kenji; Taniguchi, Takashi; Kim, Philip; Hone, James

2015-07-28

Emerging two-dimensional (2D) semiconductors such as molybdenum disulfide (MoS2) have been intensively studied because of their novel properties for advanced electronics and optoelectronics. However, 2D materials are by nature sensitive to environmental influences, such as temperature, humidity, adsorbates, and trapped charges in neighboring dielectrics. Therefore, it is crucial to develop device architectures that provide both high performance and long-term stability. Here we report high performance of dual-gated van der Waals (vdW) heterostructure devices in which MoS2 layers are fully encapsulated by hexagonal boron nitride (hBN) and contacts are formed using graphene. The hBN-encapsulation provides excellent protection from environmental factors, resulting in highly stable device performance, even at elevated temperatures. Our measurements also reveal high-quality electrical contacts and reduced hysteresis, leading to high two-terminal carrier mobility (33-151 cm(2) V(-1) s(-1)) and low subthreshold swing (80 mV/dec) at room temperature. Furthermore, adjustment of graphene Fermi level and use of dual gates enable us to separately control contact resistance and threshold voltage. This novel vdW heterostructure device opens up a new way toward fabrication of stable, high-performance devices based on 2D materials.

Flushing characteristics of Mahim river estuary (Bombay)

Digital Repository Service at National Institute of Oceanography (India)

Sabnis, M.M; Zingde, M

to the influence of wastewater. Flushing time of 19 tidal cycles was estimated by applying modified tidal prism method. After a large number of tidal cycles the estuary would retain 9.3x10 super(4) m super(3) of wastewater which was over 15% of the spring high tide...

Data quality objectives for PUREX deactivation flushing

International Nuclear Information System (INIS)

Bhatia, R.K.

1995-01-01

This Data Quality Objection (DQO) defines the sampling and analysis requirements necessary to support the deactivation of the Plutonium-Uranium Extraction (PUREX) facility vessels that are regulated by WAC 173-303. Specifically, sampling and analysis requirements are identified for the flushing operations that are a major element of PUREX deactivation

On the Evaluation of Gate Dielectrics for 4H-SiC Based Power MOSFETs

Directory of Open Access Journals (Sweden)

Muhammad Nawaz

2015-01-01

Full Text Available This work deals with the assessment of gate dielectric for 4H-SiC MOSFETs using technology based two-dimensional numerical computer simulations. Results are studied for variety of gate dielectric candidates with varying thicknesses using well-known Fowler-Nordheim tunneling model. Compared to conventional SiO2 as a gate dielectric for 4H-SiC MOSFETs, high-k gate dielectric such as HfO2 reduces significantly the amount of electric field in the gate dielectric with equal gate dielectric thickness and hence the overall gate current density. High-k gate dielectric further reduces the shift in the threshold voltage with varying dielectric thicknesses, thus leading to better process margin and stable device operating behavior. For fixed dielectric thickness, a total shift in the threshold voltage of about 2.5 V has been observed with increasing dielectric constant from SiO2 (k=3.9 to HfO2 (k=25. This further results in higher transconductance of the device with the increase of the dielectric constant from SiO2 to HfO2. Furthermore, 4H-SiC MOSFETs are found to be more sensitive to the shift in the threshold voltage with conventional SiO2 as gate dielectric than high-k dielectric with the presence of interface state charge density that is typically observed at the interface of dielectric and 4H-SiC MOS surface.

High-Sensitivity, Highly Transparent, Gel-Gated MoS2 Phototransistor on Biodegradable Nanopaper

KAUST Repository

Zhang, Qing

2016-06-21

Transition metal dichalcogenides hold great promise for a variety of novel electrical, optical and mechanical devices and applications. Among them, molybdenum disulphide (MoS2) is gaining increasing attention as the gate dielectric and semiconductive channel for high-perfomance field effect transistors. Here we report on the first MoS2 phototransistor built on flexible, transparent and biodegradable substrate with electrolyte gate dielectric. We have carried out systematic studies on its electrical and optoelectronic properties. The MoS2 phototransistor exhibited excellent photo responsivity of ~1.5 kA/W, about two times higher compared to typical back-gated devices reported in previous studies. The device is highly transparent at the same time with an average optical transmittance of 82%. Successful fabrication of phototransistors on flexible cellulose nanopaper with excellent performance and transparency suggests that it is feasible to achieve an ecofriendly, biodegradable phototransistor with great photoresponsivity, broad spectral range and durable flexibility.

High-Sensitivity, Highly Transparent, Gel-Gated MoS2 Phototransistor on Biodegradable Nanopaper

KAUST Repository

Zhang, Qing; Bao, Wenzhong; Gong, Amy; Gong, Tao; Ma, Dakang; Wan, Jiayu; Dai, Jiaqi; Munday, J; He, Jr-Hau; Hu, Liangbing; Zhang, Daihua

2016-01-01

Transition metal dichalcogenides hold great promise for a variety of novel electrical, optical and mechanical devices and applications. Among them, molybdenum disulphide (MoS2) is gaining increasing attention as the gate dielectric and semiconductive channel for high-perfomance field effect transistors. Here we report on the first MoS2 phototransistor built on flexible, transparent and biodegradable substrate with electrolyte gate dielectric. We have carried out systematic studies on its electrical and optoelectronic properties. The MoS2 phototransistor exhibited excellent photo responsivity of ~1.5 kA/W, about two times higher compared to typical back-gated devices reported in previous studies. The device is highly transparent at the same time with an average optical transmittance of 82%. Successful fabrication of phototransistors on flexible cellulose nanopaper with excellent performance and transparency suggests that it is feasible to achieve an ecofriendly, biodegradable phototransistor with great photoresponsivity, broad spectral range and durable flexibility.

Gate engineered heterostructure junctionless TFET with Gaussian doping profile for ambipolar suppression and electrical performance improvement

Science.gov (United States)

Aghandeh, Hadi; Sedigh Ziabari, Seyed Ali

2017-11-01

This study investigates a junctionless tunnel field-effect transistor with a dual material gate and a heterostructure channel/source interface (DMG-H-JLTFET). We find that using the heterostructure interface improves device behavior by reducing the tunneling barrier width at the channel/source interface. Simultaneously, the dual material gate structure decreases ambipolar current by increasing the tunneling barrier width at the drain/channel interface. The performance of the device is analyzed based on the energy band diagram at on, off, and ambipolar states. Numerical simulations demonstrate improvements in ION, IOFF, ION/IOFF, subthreshold slope (SS), transconductance and cut-off frequency and suppressed ambipolar behavior. Next, the workfunction optimization of dual material gate is studied. It is found that if appropriate workfunctions are selected for tunnel and auxiliary gates, the JLTFET exhibits considerably improved performance. We then study the influence of Gaussian doping distribution at the drain and the channel on the ambipolar performance of the device and find that a Gaussian doping profile and a dual material gate structure remarkably reduce ambipolar current. Gaussian doped DMG-H-JLTFET, also exhibits enhanced IOFF, ION/IOFF, SS and a low threshold voltage without degrading IOFF.

Theory of signal and noise in double-gated nanoscale electronic pH sensors

Energy Technology Data Exchange (ETDEWEB)

Go, Jonghyun; Nair, Pradeep R.; Alam, Muhammad A. [School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907 (United States)

2012-08-01

The maximum sensitivity of classical nanowire (NW)-based pH sensors is defined by the Nernst limit of 59 mV/pH. For typical noise levels in ultra-small single-gated nanowire sensors, the signal-to-noise ratio is often not sufficient to resolve pH changes necessary for a broad range of applications. Recently, a new class of double-gated devices was demonstrated to offer apparent 'super-Nernstian' response (>59 mV/pH) by amplifying the original pH signal through innovative biasing schemes. However, the pH-sensitivity of these nanoscale devices as a function of biasing configurations, number of electrodes, and signal-to-noise ratio (SNR) remains poorly understood. Even the basic question such as 'Do double-gated sensors actually resolve smaller changes in pH compared to conventional single-gated sensors in the presence of various sources of noise?' remains unanswered. In this article, we provide a comprehensive numerical and analytical theory of signal and noise of double-gated pH sensors to conclude that, while the theoretical lower limit of pH-resolution does not improve for double-gated sensors, this new class of sensors does improve the (instrument-limited) pH resolution.

Label Free Detection of Biomolecules Using Charge-Plasma-Based Gate Underlap Dielectric Modulated Junctionless TFET

Science.gov (United States)

Wadhwa, Girish; Raj, Balwinder

2018-05-01

Nanoscale devices are emerging as a platform for detecting biomolecules. Various issues were observed during the fabrication process such as random dopant fluctuation and thermal budget. To reduce these issues charge-plasma-based concept is introduced. This paper proposes the implementation of charge-plasma-based gate underlap dielectric modulated junctionless tunnel field effect transistor (DM-JLTFET) for the revelation of biomolecule immobilized in the open cavity gate channel region. In this p+ source and n+ drain regions are introduced by employing different work function over the intrinsic silicon. Also dual material gate architecture is implemented to reduce short channel effect without abandoning any other device characteristic. The sensitivity of biosensor is studied for both the neutral and charge-neutral biomolecules. The effect of device parameters such as channel thickness, cavity length and cavity thickness on drain current have been analyzed through simulations. This paper investigates the performance of charge-plasma-based gate underlap DM-JLTFET for biomolecule sensing applications while varying dielectric constant, charge density at different biasing conditions.

FLUSHING FOR SEWER SEDIMENT, CORROSION, AND POLLUTION CONTROL

Science.gov (United States)

This presentation overviews causes of sewer deterioration and heavy pollutant discharges caused by rain events together with a discussion of their control methods. In particular, it covers in-sewer- and combined sewer overflow- (CSO-) storage-tank-flushing systems for removal of ...

Ultraclean single, double, and triple carbon nanotube quantum dots with recessed Re bottom gates

Science.gov (United States)

Jung, Minkyung; Schindele, Jens; Nau, Stefan; Weiss, Markus; Baumgartner, Andreas; Schoenenberger, Christian

2014-03-01

Ultraclean carbon nanotubes (CNTs) that are free from disorder provide a promising platform to manipulate single electron or hole spins for quantum information. Here, we demonstrate that ultraclean single, double, and triple quantum dots (QDs) can be formed reliably in a CNT by a straightforward fabrication technique. The QDs are electrostatically defined in the CNT by closely spaced metallic bottom gates deposited in trenches in Silicon dioxide by sputter deposition of Re. The carbon nanotubes are then grown by chemical vapor deposition (CVD) across the trenches and contacted using conventional electron beam lithography. The devices exhibit reproducibly the characteristics of ultraclean QDs behavior even after the subsequent electron beam lithography and chemical processing steps. We demonstrate the high quality using CNT devices with two narrow bottom gates and one global back gate. Tunable by the gate voltages, the device can be operated in four different regimes: i) fully p-type with ballistic transport between the outermost contacts (over a length of 700 nm), ii) clean n-type single QD behavior where a QD can be induced by either the left or the right bottom gate, iii) n-type double QD and iv) triple bipolar QD where the middle QD has opposite doping (p-type). Research at Basel is supported by the NCCR-Nano, NCCR-QIST, ERC project QUEST, and FP7 project SE2ND.

Determining Gate Count Reliability in a Library Setting

Directory of Open Access Journals (Sweden)

Jeffrey Phillips

2016-09-01

Full Text Available Objective – Patron counts are a common form of measurement for library assessment. To develop accurate library statistics, it is necessary to determine any differences between various counting devices. A yearlong comparison between card reader turnstiles and laser gate counters in a university library sought to offer a standard percentage of variance and provide suggestions to increase the precision of counts. Methods – The collection of library exit counts identified the differences between turnstile and laser gate counter data. Statistical software helped to eliminate any inaccuracies in the collection of turnstile data, allowing this data set to be the base for comparison. Collection intervals were randomly determined and demonstrated periods of slow, average, and heavy traffic. Results – After analyzing 1,039,766 patron visits throughout a year, the final totals only showed a difference of .43% (.0043 between the two devices. The majority of collection periods did not exceed a difference of 3% between the counting instruments. Conclusion – Turnstiles card readers and laser gate counters provide similar levels of reliability when measuring patron activity. Each system has potential counting inaccuracies, but several methods exist to create more precise totals. Turnstile card readers are capable of offering greater detail involving patron identity, but their high cost makes them inaccessible for libraries with lower budgets. This makes laser gate counters an affordable alternative for reliable patron counting in an academic library.

Estuarine turbidity, flushing, salinity, and circulation

Science.gov (United States)

Pritchard, D. W.

1972-01-01

The effects of estuarine turbidity, flushing, salinity, and circulation on the ecology of the Chesapeake Bay are discussed. The sources of fresh water, the variations in salinity, and the circulation patterns created by temperature and salinity changes are analyzed. The application of remote sensors for long term observation of water temperatures is described. The sources of sediment and the biological effects resulting from increased sediments and siltation are identified.

CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

Science.gov (United States)

Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

2018-04-01

Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

Respiratory gated radiotherapy: current techniques and potential benefits

International Nuclear Information System (INIS)

Giraud, P.; Campana, F.; Rosenwald, J.C.; Cosset, J.M.; Reboul, F.; Garcia, R.; Clippe, S.; Carrie, C.; Dubray, B.

2003-01-01

Respiration-gated radiotherapy offers a significant potential for improvement in the irradiation of tumor sites affected by respiratory motion such as lung, breast and liver tumors. An increased conformality of irradiation fields leading to decreased complications rates of organs at risk (lung, heart...) is expected. Respiratory gating is in line with the need for improved precision required by radiotherapy techniques such as 3D conformal radiotherapy or intensity modulated radiotherapy. Reduction of respiratory motion can be achieved by using either breath hold techniques or respiration synchronized gating techniques. Breath-hold techniques can be achieved with active, in which airflow of the patient is temporarily blocked by a valve, or passive techniques, in which the patient voluntarily breath-hold. Synchronized gating techniques use external devices to predict the phase of the respiration cycle while the patient breaths freely. These techniques presently investigated in several medical centers worldwide. Although promising, the first results obtained in lung and liver cancer patients require confirmation. Physical, technical and physiological questions still remain to be answered. This paper describes the most frequently used gated techniques and the main published clinical reports on the use of respiration-gated radiotherapy in order to evaluate the impact of these techniques. (author)

Hysteresis analysis of graphene transistor under repeated test and gate voltage stress

International Nuclear Information System (INIS)

Yang Jie; Jia Kunpeng; Su Yajuan; Zhao Chao; Chen Yang

2014-01-01

The current transport characteristic is studied systematically based on a back-gate graphene field effect transistor, under repeated test and gate voltage stress. The interface trapped charges caused by the gate voltage sweep process screens the gate electric field, and results in the neutral point voltage shift between the forth and back sweep direction. In the repeated test process, the neutral point voltage keeps increasing with test times in both forth and back sweeps, which indicates the existence of interface trapped electrons residual and accumulation. In gate voltage stress experiment, the relative neutral point voltage significantly decreases with the reducing of stress voltage, especially in −40 V, which illustrates the driven-out phenomenon of trapped electrons under negative voltage stress. (semiconductor devices)

Local electric field screening in bi-layer graphene devices

Directory of Open Access Journals (Sweden)

Vishal ePanchal

2014-02-01

Full Text Available We present experimental studies of both local and macroscopic electrical effects in uniform single- (1LG and bi-layer graphene (2LG devices as well as in devices with non-uniform graphene coverage, under ambient conditions. DC transport measurements on sub-micron scale Hall bar devices were used to show a linear rise in carrier density with increasing amounts of 2LG coverage. Electrical scanning gate microscopy was used to locally top gate uniform and non-uniform devices in order to observe the effect of local electrical gating. We experimentally show a significant level of electric field screening by 2LG. We demonstrate that SGM technique is an extremely useful research tool for studies of local screening effects, which provides a complementary view on phenomena that are usually considered only within a macroscopic experimental scheme.

FLUSHING FOR SEWER SEDIMENT, CORROSION, AND POLLUTION CONTROL

Science.gov (United States)

This paper overviews causes of combined-sewer deterioration and their heavy pollutant discharges caused by rain events together with a discussion of their control methods. In particular, it covers in-sewer and combined-sewer overflow (CSO) storage-tank-flushing systems for removi...

Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

Directory of Open Access Journals (Sweden)

Yu-Hsien Lin

2015-01-01

Full Text Available We investigated amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using different high-k gate dielectric materials such as silicon nitride (Si3N4 and aluminum oxide (Al2O3 at low temperature process (<300°C and compared them with low temperature silicon dioxide (SiO2. The IGZO device with high-k gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, postannealing treatment is an essential process for completing the process. The chemical reaction of the high-k/IGZO interface due to heat formation in high-k/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-k gate dielectric materials and explained the interface effect by charge band diagram.

Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

International Nuclear Information System (INIS)

Lin, Y. H.; Chou, J. C.

2015-01-01

We investigated amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFT_s) using different high-Κ gate dielectric materials such as silicon nitride (Si_3N_4) and aluminum oxide (Al_2O_3) at low temperature process (<300 degree) and compared them with low temperature silicon dioxide (SiO_2). The IGZO device with high-Κ gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, post annealing treatment is an essential process for completing the process. The chemical reaction of the high-κ/IGZO interface due to heat formation in high-Κ/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-Κ gate dielectric materials and explained the interface effect by charge band diagram.

Comparison of three dosimetric techniques to take in account lung tumor motion: gating-like technique results lead to advice the use of gating device even in the cases of pre-operative irradiation

International Nuclear Information System (INIS)

Beneyton, V.; Billaud, G.; Niederst, C.; Meyer, P.; Schumacher, C.; Karamanoukian, D.; Noel, G.; Bourhala, K.

2010-01-01

-like method allowed the best results even for the V95% values. However, in the absence of gating device or without the possibility to use it, the 3-volume method allowed to take into account more precisely the organ motion than the classical technique. Conclusion: The 3-volume method can be done. It is a good method to take into account the organ motions. However, the gating-like method gives the best results leading to propose its use even for pre-operative patients with upper tumors. (authors)

Ultrafast gated imaging of laser produced plasmas using the optical Kerr effect

International Nuclear Information System (INIS)

Symes, D. R.; Wegner, U.; Ahlswede, H.-C.; Streeter, M. J. V.; Gallegos, P. L.; Divall, E. J.; Rajeev, P. P.; Neely, D.; Smith, R. A.

2010-01-01

Optical imaging is a versatile diagnostic for investigations of plasmas generated under intense laser irradiation. Electro-optic gating techniques operating on the >100 ps timescale are commonly used to reduce the amount of light detected from self-emission of hot plasma or improve the temporal resolution of the detector. The use of an optical Kerr gate enables a superior dynamic range and temporal resolution compared to electronically gated devices. The application of this method for enhanced imaging of laser produced plasmas with gate time ∼100 fs is demonstrated, and the possibility to produce a sub-10 fs, high dynamic range 'all optical' streak camera is discussed.

Influence of pre- and post-usage flushing frequencies on bacterial water quality of non-touch water fittings.

Science.gov (United States)

Suchomel, Miranda; Diab-Elschahawi, Magda; Kundi, Michael; Assadian, Ojan

2013-08-30

Non-touch fittings have been reported to be susceptible for Pseudomonas aeruginosa accumulation. A number of factors may contribute to this, including the frequency of usage, duration of water stagnation, or presence of plastic materials. Programmable non-touch fittings are appearing which allow regular automated post-flushing with cold water to prevent water stagnation. However, the ideal duration of post-flushing is unknown as well as the effect of pre-rinsing with cold water before use. Eight non-touch fittings with brass valve blocks were mounted on a mobile test sink and connected to the same central water pipe source, differing only in presence or absence of water connection pipes, length of connection pipe, frequency of usage, and time intervals for pre- and post-usage water flush. The total bacteria colony-forming unit (cfu) counts were obtained by the spread plate technique. Low frequency of water use in combination with a long stagnating water column resulted in high bacterial cfu counts. Post-usage flushing for 2 seconds did not differ from no flushing. Flushing for 10 seconds with cold water after use or 30 seconds flush before use were both the most effective measures to prevent non-touch fittings from biofilm formation over a period of 20 weeks. Further improvements in water fitting technology could possibly solve the problem of bacterial water contamination in health care settings.

Solvothermal synthesis of gallium-indium-zinc-oxide nanoparticles for electrolyte-gated transistors.

Science.gov (United States)

Santos, Lídia; Nunes, Daniela; Calmeiro, Tomás; Branquinho, Rita; Salgueiro, Daniela; Barquinha, Pedro; Pereira, Luís; Martins, Rodrigo; Fortunato, Elvira

2015-01-14

Solution-processed field-effect transistors are strategic building blocks when considering low-cost sustainable flexible electronics. Nevertheless, some challenges (e.g., processing temperature, reliability, reproducibility in large areas, and cost effectiveness) are requirements that must be surpassed in order to achieve high-performance transistors. The present work reports electrolyte-gated transistors using as channel layer gallium-indium-zinc-oxide nanoparticles produced by solvothermal synthesis combined with a solid-state electrolyte based on aqueous dispersions of vinyl acetate stabilized with cellulose derivatives, acrylic acid ester in styrene and lithium perchlorate. The devices fabricated using this approach display a ION/IOFF up to 1 × 10(6), threshold voltage (VTh) of 0.3-1.9 V, and mobility up to 1 cm(2)/(V s), as a function of gallium-indium-zinc-oxide ink formulation and two different annealing temperatures. These results validates the usage of electrolyte-gated transistors as a viable and promising alternative for nanoparticle based semiconductor devices as the electrolyte improves the interface and promotes a more efficient step coverage of the channel layer, reducing the operating voltage when compared with conventional dielectrics gating. Moreover, it is shown that by controlling the applied gate potential, the operation mechanism of the electrolyte-gated transistors can be modified from electric double layer to electrochemical doping.

Evaluation of Anisotropic Biaxial Stress Induced Around Trench Gate of Si Power Transistor Using Water-Immersion Raman Spectroscopy

Science.gov (United States)

Suzuki, Takahiro; Yokogawa, Ryo; Oasa, Kohei; Nishiwaki, Tatsuya; Hamamoto, Takeshi; Ogura, Atsushi

2018-05-01

The trench gate structure is one of the promising techniques to reduce on-state resistance (R on) for silicon power devices, such as insulated gate bipolar transistors and power metal-oxide-semiconductor field-effect transistors. In addition, it has been reported that stress is induced around the trench gate area, modifying the carrier mobilities. We evaluated the one-dimensional distribution and anisotropic biaxial stress by quasi-line excitation and water-immersion Raman spectroscopy, respectively. The results clearly confirmed anisotropic biaxial stress in state-of-the-art silicon power devices. It is theoretically possible to estimate carrier mobility using piezoresistance coefficients and anisotropic biaxial stress. The electron mobility was increased while the hole mobility was decreased or remained almost unchanged in the silicon (Si) power device. The stress significantly modifies the R on of silicon power transistors. Therefore, their performance can be improved using the stress around the trench gate.

Environmental effects of storage preservation practices: controlled flushing of fine sediment from a small hydropower reservoir.

Science.gov (United States)

Espa, Paolo; Castelli, Elena; Crosa, Giuseppe; Gentili, Gaetano

2013-07-01

Sediment flushing may be effective in mitigating loss of reservoir storage due to siltation, but flushing must be controlled to limit the impact on the downstream environment. A reliable prediction of the environmental effects of sediment flushing is hindered by the limited scientific information currently available. Consequently, there may be some controversy as regards to management decisions, planning the work, and monitoring strategies. This paper summarizes the main results of a monitoring campaign on the stream below a small alpine hydropower reservoir subjected to annual flushing between 2006 and 2009. The removed sediment was essentially silt, and the suspended solid concentration (SSC) of the discharged water was controlled to alleviate downstream impact. Control was achieved through hydraulic regulation and mechanical digging, alternating daytime sediment evacuation, and nocturnal clear water release. The four operations lasted about two weeks each and had an average SSC of about 4 g L(-1). Maximum values of SSC were generally kept below 10 g L(-1). Downstream impact was quantified through sampling of fish fauna (brown trout) and macroinvertebrate in the final reach of the effluent stream. The benthic community was severely impaired by the flushing operations, but recovered to pre-flushing values in a few months. As expected, the impact on brown trout was heavier on juveniles. While data biasing due to fish removal and re-stocking cannot be ruled out, the fish community seems to have reached a state of equilibrium characterized by a lower density than was measured before the flushing operations.

Low operating voltage n-channel organic field effect transistors using lithium fluoride/PMMA bilayer gate dielectric

Energy Technology Data Exchange (ETDEWEB)

Kumar, S.; Dhar, A., E-mail: adhar@phy.iitkgp.ernet.in

2015-10-15

Highlights: • Alternative to chemically crosslinking of PMMA to achieve low leakage in provided. • Effect of LiF in reducing gate leakage through the OFET device is studied. • Effect of gate leakage on transistor performance has been investigated. • Low voltage operable and low temperature processed n-channel OFETs were fabricated. - Abstract: We report low temperature processed, low voltage operable n-channel organic field effect transistors (OFETs) using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C{sub 8}) organic semiconductor and poly(methylmethacrylate) (PMMA)/lithium fluoride (LiF) bilayer gate dielectric. We have studied the role of LiF buffer dielectric in effectively reducing the gate leakage through the device and thus obtaining superior performance in contrast to the single layer PMMA dielectric devices. The bilayer OFET devices had a low threshold voltage (V{sub t}) of the order of 5.3 V. The typical values of saturation electron mobility (μ{sub s}), on/off ratio and inverse sub-threshold slope (S) for the range of devices made were estimated to be 2.8 × 10{sup −3} cm{sup 2}/V s, 385, and 3.8 V/decade respectively. Our work thus provides a potential substitution for much complicated process of chemically crosslinking PMMA to achieve low leakage, high capacitance, and thus low operating voltage OFETs.

Fabrication, electrical characterization and device simulation of vertical P3HT field-effect transistors

Directory of Open Access Journals (Sweden)

Bojian Xu

2017-12-01

Full Text Available Vertical organic field-effect transistors (VOFETs provide an advantage over lateral ones with respect to the possibility to conveniently reduce the channel length. This is beneficial for increasing both the cut-off frequency and current density in organic field-effect transistor devices. We prepared P3HT (poly[3-hexylthiophene-2,5-diyl] VOFETs with a surrounding gate electrode and gate dielectric around the vertical P3HT pillar junction. Measured output and transfer characteristics do not show a distinct gate effect, in contrast to device simulations. By introducing in the simulations an edge layer with a strongly reduced charge mobility, the gate effect is significantly reduced. We therefore propose that a damaged layer at the P3HT/dielectric interface could be the reason for the strong suppression of the gate effect. We also simulated how the gate effect depends on the device parameters. A smaller pillar diameter and a larger gate electrode-dielectric overlap both lead to better gate control. Our findings thus provide important design parameters for future VOFETs.

Microscopic gate-modulation imaging of charge and field distribution in polycrystalline organic transistors

Science.gov (United States)

Matsuoka, Satoshi; Tsutsumi, Jun'ya; Kamata, Toshihide; Hasegawa, Tatsuo

2018-04-01

In this work, a high-resolution microscopic gate-modulation imaging (μ-GMI) technique is successfully developed to visualize inhomogeneous charge and electric field distributions in operating organic thin-film transistors (TFTs). We conduct highly sensitive and diffraction-limit gate-modulation sensing for acquiring difference images of semiconducting channels between at gate-on and gate-off states that are biased at an alternate frequency of 15 Hz. As a result, we observe unexpectedly inhomogeneous distribution of positive and negative local gate-modulation (GM) signals at a probe photon energy of 1.85 eV in polycrystalline pentacene TFTs. Spectroscopic analyses based on a series of μ-GMI at various photon energies reveal that two distinct effects appear, simultaneously, within the polycrystalline pentacene channel layers: Negative GM signals at 1.85 eV originate from the second-derivative-like GM spectrum which is caused by the effect of charge accumulation, whereas positive GM signals originate from the first-derivative-like GM spectrum caused by the effect of leaked gate fields. Comparisons with polycrystalline morphologies indicate that grain centers are predominated by areas with high leaked gate fields due to the low charge density, whereas grain edges are predominantly high-charge-density areas with a certain spatial extension as associated with the concentrated carrier traps. Consequently, it is reasonably understood that larger grains lead to higher device mobility, but with greater inhomogeneity in charge distribution. These findings provide a clue to understand and improve device characteristics of polycrystalline TFTs.

A manufacturable process integration approach for graphene devices

Science.gov (United States)

Vaziri, Sam; Lupina, Grzegorz; Paussa, Alan; Smith, Anderson D.; Henkel, Christoph; Lippert, Gunther; Dabrowski, Jarek; Mehr, Wolfgang; Östling, Mikael; Lemme, Max C.

2013-06-01

In this work, we propose an integration approach for double gate graphene field effect transistors. The approach includes a number of process steps that are key for future integration of graphene in microelectronics: bottom gates with ultra-thin (2 nm) high-quality thermally grown SiO2 dielectrics, shallow trench isolation between devices and atomic layer deposited Al2O3 top gate dielectrics. The complete process flow is demonstrated with fully functional GFET transistors and can be extended to wafer scale processing. We assess, through simulation, the effects of the quantum capacitance and band bending in the silicon substrate on the effective electric fields in the top and bottom gate oxide. The proposed process technology is suitable for other graphene-based devices such as graphene-based hot electron transistors and photodetectors.

Quality Matters: Influences of Citrus Flush Physicochemical Characteristics on Population Dynamics of the Asian Citrus Psyllid (Hemiptera: Liviidae.

Directory of Open Access Journals (Sweden)

Mamoudou Sétamou

Full Text Available Studies were conducted to relate the influence of the physical characteristics, leaf nutrient content and phloem sap amino acid concentration of citrus flush shoots on the densities of various Diaphorina citri life stages. Adult D. citri preferentially selected young shoots for feeding and numbers of D. citri immatures were positively correlated with flush shoot softness. Young flush shoots had higher concentrations of macro and micro nutrients relative to mature ones and this was associated with higher densities of all D. citri life stages. All D. citri life stages were positively correlated with higher nitrogen-carbon (N:C, nitrogen:sulfur (N:S and nitrogen:calcium (N:Ca ratios in leaf tissue, while densities of adults were negatively related to calcium, manganese and boron levels. Concentrations of total and essential amino acids were highest in phloem sap of young expanding flush shoots in both grapefruit and lemon, but dramatically declined as flush shoots matured. The sulfur-containing amino acids cystine, methionine and taurine occurred only in younger flush shoots. In contrast, cystathionine was only present in phloem sap of mature shoots. These results clearly indicate that young citrus flush shoots are a nutritionally richer diet relative to mature shoots, thus explaining their preference by D. citri for feeding and reproduction. Conversely, tissue hardness and the lower nutritional quality of mature flush shoots may limit oviposition and immature development. The data suggest that both physical characteristics and nutritional composition of flush shoots and their phloem sap are important factors regulating host colonization and behavior of D. citri, and this interaction can impact the dynamics and spread of HLB in citrus groves.

Quality Matters: Influences of Citrus Flush Physicochemical Characteristics on Population Dynamics of the Asian Citrus Psyllid (Hemiptera: Liviidae)

Science.gov (United States)

Simpson, Catherine R.; Alabi, Olufemi J.; Nelson, Shad D.; Telagamsetty, Srilakshmi; Jifon, John L.

2016-01-01

Studies were conducted to relate the influence of the physical characteristics, leaf nutrient content and phloem sap amino acid concentration of citrus flush shoots on the densities of various Diaphorina citri life stages. Adult D. citri preferentially selected young shoots for feeding and numbers of D. citri immatures were positively correlated with flush shoot softness. Young flush shoots had higher concentrations of macro and micro nutrients relative to mature ones and this was associated with higher densities of all D. citri life stages. All D. citri life stages were positively correlated with higher nitrogen-carbon (N:C), nitrogen:sulfur (N:S) and nitrogen:calcium (N:Ca) ratios in leaf tissue, while densities of adults were negatively related to calcium, manganese and boron levels. Concentrations of total and essential amino acids were highest in phloem sap of young expanding flush shoots in both grapefruit and lemon, but dramatically declined as flush shoots matured. The sulfur-containing amino acids cystine, methionine and taurine occurred only in younger flush shoots. In contrast, cystathionine was only present in phloem sap of mature shoots. These results clearly indicate that young citrus flush shoots are a nutritionally richer diet relative to mature shoots, thus explaining their preference by D. citri for feeding and reproduction. Conversely, tissue hardness and the lower nutritional quality of mature flush shoots may limit oviposition and immature development. The data suggest that both physical characteristics and nutritional composition of flush shoots and their phloem sap are important factors regulating host colonization and behavior of D. citri, and this interaction can impact the dynamics and spread of HLB in citrus groves. PMID:28030637

A split accumulation gate architecture for silicon MOS quantum dots

Science.gov (United States)

Rochette, Sophie; Rudolph, Martin; Roy, Anne-Marie; Curry, Matthew; Ten Eyck, Gregory; Dominguez, Jason; Manginell, Ronald; Pluym, Tammy; King Gamble, John; Lilly, Michael; Bureau-Oxton, Chloé; Carroll, Malcolm S.; Pioro-Ladrière, Michel

We investigate tunnel barrier modulation without barrier electrodes in a split accumulation gate architecture for silicon metal-oxide-semiconductor quantum dots (QD). The layout consists of two independent accumulation gates, one gate forming a reservoir and the other the QD. The devices are fabricated with a foundry-compatible, etched, poly-silicon gate stack. We demonstrate 4 orders of magnitude of tunnel-rate control between the QD and the reservoir by modulating the reservoir gate voltage. Last electron charging energies of app. 10 meV and tuning of the ST splitting in the range 100-200 ueV are observed in two different split gate layouts and labs. This work was performed, in part, at the Center for Integrated Nanotechnologies, an Office of Science User Facility operated for the U.S. Department of Energy (DOE) Office of Science. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a Lockheed-Martin Company, for the U. S. Department of Energy under Contract No. DE-AC04-94AL85000.

Ejector device for returning incomplete combustion products

Energy Technology Data Exchange (ETDEWEB)

Szule, T.; Minas, E.; Pietrowski, K.

1977-12-19

A device is proposed for separating the fine fraction of incompletely burned clinker and delivering it to the firebox for combustion. The clinker is fed into the two-chambered device from the top through an open gate. The inside chamber of the device consists of a side enclosure with an inspection hole and a hatch, and a gate with a screen on top. An ejector is located in the chamber. The case of the outside chamber, also with an inspection hole and hatch, forms a bypass channel with the enclosure of the inside chamber. Fine clinker is poured through the screen into the inside chamber, and some of it is removed by the ejector for combustion; the coarser fraction builds up on top of the gate, and is periodically passed through it. Large pieces of clinker which do not fit through the screen pass down through the bypass channel.

Laboratory Investigations for the Role of Flushing Media in Diamond Drilling of Marble

Science.gov (United States)

Bhatnagar, A.; Khandelwal, Manoj; Rao, K. U. M.

2011-05-01

Marble is used as a natural stone for decorative purposes from ages. Marble is a crystalline rock, composed predominantly of calcite, dolomite or serpentine. The presence of impurities imparts decorative pattern and colors. The diamond-based operations are extensively used in the mining and processing of marble. Marble is mined out in the form of blocks of cuboids shape and has to undergo extensive processing to make it suitable for the end users. The processing operation includes slabbing, sizing, polishing, etc. Diamond drilling is also commonly used for the exploration of different mineral deposits throughout the world. In this paper an attempt has been made to enhance the performance of diamond drilling on marble rocks by adding polyethylene-oxide (PEO) in the flushing water. The effect of PEO added with the drilling water was studied by varying different machine parameters and flushing media concentration in the laboratory. The responses were rate of penetration and torque at bit-rock interface. Different physico-mechanical properties of marble were also determined. It was found that flushing water added with PEO can substantially enhance the penetration rates and reduce the torque developed at the bit-rock interface as compared to plain flushing water.

Design of polarization encoded all-optical 4-valued MAX logic gate and its applications

Science.gov (United States)

Chattopadhyay, Tanay; Nath Roy, Jitendra

2013-07-01

Quaternary maximum (QMAX) gate is one type of multi-valued logic gate. An all-optical scheme of polarization encoded quaternary (4-valued) MAX logic gate with the help of Terahertz Optical Asymmetric Demultiplexer (TOAD) based fiber interferometric switch is proposed and described. For the quaternary information processing in optics, the quaternary number (0, 1, 2, 3) can be represented by four discrete polarized states of light. Numerical simulation result confirming the described methods is given in this paper. Some applications of MAX gate in logical operation and memory device are also given.

New possibilities of developing formulas for flushing drilling fluids

Energy Technology Data Exchange (ETDEWEB)

Beregi, I; Dobozy, G; Szornyi, I

1982-01-01

The problem of preventing cave-in of the walls of boreholes can be effectively and economically solved only with a broad assortment of flushing fluids (FF) of the corresponding quality. In order to search for inexpensive and simple methods of preparing and formulas of FF which have good stabilizing properties, the authors conducted laboratory studies. It is indicated that this goal can be reached by three methods: 1) improvement in the properties by traditional (based on gypsum and lime) FF by additives (for example, chloride, acetate and potassium dihydrophosphate); 2) production of FF of the limestone type based on new theoretical concepts regarding the mechanism of their effect, and 3) by using as the FF ammonium-containing chemical compounds (for example, diammonium hydrophosphate). The studied FF were tested under field conditions and yielded positive results. It was established that different specific conditions of the wells make it necessary to systematically study clays and marls in the drilling zone in order to select the most effective and economical for the given conditions of FF. This will permit the maximum use of local raw material and selection of the simplest method of preparing FF.

Vertical Silicon Nanowire Field Effect Transistors with Nanoscale Gate-All-Around

Science.gov (United States)

Guerfi, Youssouf; Larrieu, Guilhem

2016-04-01

Nanowires are considered building blocks for the ultimate scaling of MOS transistors, capable of pushing devices until the most extreme boundaries of miniaturization thanks to their physical and geometrical properties. In particular, nanowires' suitability for forming a gate-all-around (GAA) configuration confers to the device an optimum electrostatic control of the gate over the conduction channel and then a better immunity against the short channel effects (SCE). In this letter, a large-scale process of GAA vertical silicon nanowire (VNW) MOSFETs is presented. A top-down approach is adopted for the realization of VNWs with an optimum reproducibility followed by thin layer engineering at nanoscale. Good overall electrical performances were obtained, with excellent electrostatic behavior (a subthreshold slope (SS) of 95 mV/dec and a drain induced barrier lowering (DIBL) of 25 mV/V) for a 15-nm gate length. Finally, a first demonstration of dual integration of n-type and p-type VNW transistors for the realization of CMOS inverter is proposed.

Hybrid dual gate ferroelectric memory for multilevel information storage

KAUST Repository

Khan, Yasser; Caraveo-Frescas, Jesus Alfonso; Alshareef, Husam N.

2015-01-01

Here, we report hybrid organic/inorganic ferroelectric memory with multilevel information storage using transparent p-type SnO semiconductor and ferroelectric P(VDF-TrFE) polymer. The dual gate devices include a top ferroelectric field

Excitonic AND Logic Gates on DNA Brick Nanobreadboards

Science.gov (United States)

2015-01-01

A promising application of DNA self-assembly is the fabrication of chromophore-based excitonic devices. DNA brick assembly is a compelling method for creating programmable nanobreadboards on which chromophores may be rapidly and easily repositioned to prototype new excitonic devices, optimize device operation, and induce reversible switching. Using DNA nanobreadboards, we have demonstrated each of these functions through the construction and operation of two different excitonic AND logic gates. The modularity and high chromophore density achievable via this brick-based approach provide a viable path toward developing information processing and storage systems. PMID:25839049

The memory effect of a pentacene field-effect transistor with a polarizable gate dielectric

Science.gov (United States)

Unni, K. N. N.; de Bettignies, Remi; Dabos-Seignon, Sylvie; Nunzi, Jean-Michel

2004-06-01

The nonvolatile transistor memory element is an interesting topic in organic electronics. In this case a memory cell consists of only one device where the stored information is written as a gate insulator polarization by a gate voltage pulse and read by the channel conductance control with channel voltage pulse without destruction of the stored information. Therefore such transistor could be the base of non-volatile non-destructively readable computer memory of extremely high density. Also devices with polarizable gate dielectrics can function more effectively in certain circuits. The effective threshold voltage Vt can be brought very close to zero, for applications where the available gate voltage is limited. Resonant and adaptive circuits can be tuned insitu by polarizing the gates. Poly(vinylidene fluoride), PVDF and its copolymer with trifluoroethylene P(VDF-TrFE) are among the best known and most widely used ferroelectric polymers. In this manuscript, we report new results of an organic FET, fabricated with pentacene as the active material and P(VDF-TrFE) as the gate insulator. Application of a writing voltage of -50 V for short duration results in significant change in the threshold voltage and remarkable increase in the drain current. The memory effect is retained over a period of 20 hours.

A 2D analytical cylindrical gate tunnel FET (CG-TFET) model: impact of shortest tunneling distance

Science.gov (United States)

Dash, S.; Mishra, G. P.

2015-09-01

A 2D analytical tunnel field-effect transistor (FET) potential model with cylindrical gate (CG-TFET) based on the solution of Laplace’s equation is proposed. The band-to-band tunneling (BTBT) current is derived by the help of lateral electric field and the shortest tunneling distance. However, the analysis is extended to obtain the subthreshold swing (SS) and transfer characteristics of the device. The dependency of drain current, SS and transconductance on gate voltage and shortest tunneling distance is discussed. Also, the effect of scaling the gate oxide thickness and the cylindrical body diameter on the electrical parameters of the device is analyzed.

A 2D analytical cylindrical gate tunnel FET (CG-TFET) model: impact of shortest tunneling distance

International Nuclear Information System (INIS)

Dash, S; Mishra, G P

2015-01-01

A 2D analytical tunnel field-effect transistor (FET) potential model with cylindrical gate (CG-TFET) based on the solution of Laplace’s equation is proposed. The band-to-band tunneling (BTBT) current is derived by the help of lateral electric field and the shortest tunneling distance. However, the analysis is extended to obtain the subthreshold swing (SS) and transfer characteristics of the device. The dependency of drain current, SS and transconductance on gate voltage and shortest tunneling distance is discussed. Also, the effect of scaling the gate oxide thickness and the cylindrical body diameter on the electrical parameters of the device is analyzed. (paper)

A new quantum flux parametron logic gate with large input margin

International Nuclear Information System (INIS)

Hioe, W.; Hosoya, M.; Goto, E.

1991-01-01

This paper reports on the Quantum Flux Parametron (QFP) which is a flux transfer, flux activated Josephson logic device which realizes much lower power dissipation than other Josephson logic devices. Being a two-terminal device its correct operation may be affected by coupling to other QFPs. The problems include backcoupling from active QFPs through inactive QFPs (relay noise), coupling between QFPs activated at different times because of clock skew (homophase noise), and interaction between active QFPs (reaction hazard). Previous QFP circuits worked by wired-majority, which being a linear input logic, has low input margin. A new logic gate (D-gate) using a QFP to perform logic operations has been analyzed and tested by computer simulation. Relay noise, homophase noise and reaction hazard are substantially reduced. Moreover, the input have little interaction hence input margin is greatly improved

Poly-Si gate engineering for advanced CMOS transistors by germanium implantation

International Nuclear Information System (INIS)

Bourdon, H.; Juhel, M.; Oudet, B.; Breil, N.; Lenoble, D.

2005-01-01

Standard gate materials are compared to Ge implanted poly-Si and deposited poly-SiGe. It is demonstrated in this paper that the electrical resistance of the gate is significantly reduced via the use of poly-SiGe (from 30% to 40% decrease in resistance). Similarly, we show via specific optimization that localized Ge implantation is also suitable to reduce gate resistance. Physical characterizations are performed to determine the 'root' causes at the origin of these improvements. In line with future publications showing strong benefits on CMOS device performance, grain size effects seem to be the main mechanisms explaining the measured improvement

Electric current modulation by gate frequency in a quantum ring nanotransistor

International Nuclear Information System (INIS)

Konopka, M.; Bokes, P.

2013-01-01

We presented a computational study of a dynamical gate effect applied to a tight-binding model of a ring-shaped quantum-interference nanotransistor. Compared to our former analysis, we used a model of the gate that not only controls on-site energies of the atoms but can also transfer electrons to or from the device. We have found that the electric current is modulated by the gate frequency also in this more general model. The simulations have been performed using our home-developed generalised stroboscopic wave packet approach which is very suitable for open systems and time-dependent effects. (authors)

A simple nonlinear dynamical computing device

International Nuclear Information System (INIS)

Miliotis, Abraham; Murali, K.; Sinha, Sudeshna; Ditto, William L.; Spano, Mark L.

2009-01-01

We propose and characterize an iterated map whose nonlinearity has a simple (i.e., minimal) electronic implementation. We then demonstrate explicitly how all the different fundamental logic gates can be implemented and morphed using this nonlinearity. These gates provide the full set of gates necessary to construct a general-purpose, reconfigurable computing device. As an example of how such chaotic computing devices can be exploited, we use an array of these maps to encode data and to process information. Each map can store one of M items, where M is variable and can be large. This nonlinear hardware stores data naturally in different bases or alphabets. We also show how this method of storing information can serve as a preprocessing tool for exact or inexact pattern-matching searches.

Trap-mediated electronic transport properties of gate-tunable pentacene/MoS2 p-n heterojunction diodes.

Science.gov (United States)

Kim, Jae-Keun; Cho, Kyungjune; Kim, Tae-Young; Pak, Jinsu; Jang, Jingon; Song, Younggul; Kim, Youngrok; Choi, Barbara Yuri; Chung, Seungjun; Hong, Woong-Ki; Lee, Takhee

2016-11-10

We investigated the trap-mediated electronic transport properties of pentacene/molybdenum disulphide (MoS 2 ) p-n heterojunction devices. We observed that the hybrid p-n heterojunctions were gate-tunable and were strongly affected by trap-assisted tunnelling through the van der Waals gap at the heterojunction interfaces between MoS 2 and pentacene. The pentacene/MoS 2 p-n heterojunction diodes had gate-tunable high ideality factor, which resulted from trap-mediated conduction nature of devices. From the temperature-variable current-voltage measurement, a space-charge-limited conduction and a variable range hopping conduction at a low temperature were suggested as the gate-tunable charge transport characteristics of these hybrid p-n heterojunctions. Our study provides a better understanding of the trap-mediated electronic transport properties in organic/2-dimensional material hybrid heterojunction devices.

Spin-polarized current generated by magneto-electrical gating

International Nuclear Information System (INIS)

Ma Minjie; Jalil, Mansoor Bin Abdul; Tan, Seng Ghee

2012-01-01

We theoretically study spin-polarized current through a single electron tunneling transistor (SETT), in which a quantum dot (QD) is coupled to non-magnetic source and drain electrodes via tunnel junctions, and gated by a ferromagnetic (FM) electrode. The I–V characteristics of the device are investigated for both spin and charge currents, based on the non-equilibrium Green's function formalism. The FM electrode generates a magnetic field, which causes a Zeeman spin-splitting of the energy levels in the QD. By tuning the size of the Zeeman splitting and the source–drain bias, a fully spin-polarized current is generated. Additionally, by modulating the electrical gate bias, one can effect a complete switch of the polarization of the tunneling current from spin-up to spin-down current, or vice versa. - Highlights: ► The spin polarized transport through a single electron tunneling transistor is systematically studied. ► The study is based on Keldysh non-equilibrium Green's function and equation of motion method. ► A fully spin polarized current is observed. ► We propose to reverse current polarization by the means of gate voltage modulation. ► This device can be used as a bi-polarization current generator.

Ultra-fine metal gate operated graphene optical intensity modulator

Science.gov (United States)

Kou, Rai; Hori, Yosuke; Tsuchizawa, Tai; Warabi, Kaori; Kobayashi, Yuzuki; Harada, Yuichi; Hibino, Hiroki; Yamamoto, Tsuyoshi; Nakajima, Hirochika; Yamada, Koji

2016-12-01

A graphene based top-gate optical modulator on a standard silicon photonic platform is proposed for the future optical telecommunication networks. On the basis of the device simulation, we proposed that an electro-absorption light modulation can be realized by an ultra-narrow metal top-gate electrode (width less than 400 nm) directly located on the top of a silicon wire waveguide. The designed structure also provides excellent features such as carrier doping and waveguide-planarization free fabrication processes. In terms of the fabrication, we established transferring of a CVD-grown mono-layer graphene sheet onto a CMOS compatible silicon photonic sample followed by a 25-nm thick ALD-grown Al2O3 deposition and Source-Gate-Drain electrodes formation. In addition, a pair of low-loss spot-size converter for the input and output area is integrated for the efficient light source coupling. The maximum modulation depth of over 30% (1.2 dB) is observed at a device length of 50 μm, and a metal width of 300 nm. The influence of the initial Fermi energy obtained by experiment on the modulation performance is discussed with simulation results.

A gate enhanced power U-shaped MOSFET integrated with a Schottky rectifier

International Nuclear Information System (INIS)

Wang Ying; Jiao Wen-Li; Hu Hai-Fan; Liu Yun-Tao; Cao Fei

2012-01-01

An accumulation gate enhanced power U-shaped metal-oxide-semiconductor field-effect-transistor (UMOSFET) integrated with a Schottky rectifier is proposed. In this device, a Schottky rectifier is integrated into each cell of the accumulation gate enhanced power UMOSFET. Specific on-resistances of 7.7 mΩ·mm 2 and 6.5 mΩ·mm 2 for the gate bias voltages of 5 V and 10 V are achieved, respectively, and the breakdown voltage is 61 V. The numerical simulation shows a 25% reduction in the reverse recovery time and about three orders of magnitude reduction in the leakage current as compared with the accumulation gate enhanced power UMOSFET. (condensed matter: structural, mechanical, and thermal properties)

Sub-50 nm gate length SOI transistor development for high performance microprocessors

International Nuclear Information System (INIS)

Horstmann, M.; Greenlaw, D.; Feudel, Th.; Wei, A.; Frohberg, K.; Burbach, G.; Gerhardt, M.; Lenski, M.; Stephan, R.; Wieczorek, K.; Schaller, M.; Hohage, J.; Ruelke, H.; Klais, J.; Huebler, P.; Luning, S.; Bentum, R. van; Grasshoff, G.; Schwan, C.; Cheek, J.; Buller, J.; Krishnan, S.; Raab, M.; Kepler, N.

2004-01-01

Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40 nm gate length (L GATE ) PD SOI transistors into volume manufacturing for high-speed microprocessors. The key innovations developed for this transistor in order to overcome classical gate oxide and L GATE scaling is an unique differential triple spacer structure, stressed overlayer films inducing strain in the Silicon channel and optimized junctions. This transistor structure yields an outstanding ring oscillator speed with an unloaded inverter delay of 5.5 ps. The found improvements are highly manufacturable and scaleable for future device technologies like FD SOI

Artificial Synapses Based on in-Plane Gate Organic Electrochemical Transistors.

Science.gov (United States)

Qian, Chuan; Sun, Jia; Kong, Ling-An; Gou, Guangyang; Yang, Junliang; He, Jun; Gao, Yongli; Wan, Qing

2016-10-05

Realization of biological synapses using electronic devices is regarded as the basic building blocks for neuromorphic engineering and artificial neural network. With the advantages of biocompatibility, low cost, flexibility, and compatible with printing and roll-to-roll processes, the artificial synapse based on organic transistor is of great interest. In this paper, the artificial synapse simulation by ion-gel gated organic field-effect transistors (FETs) with poly(3-hexylthiophene) (P3HT) active channel is demonstrated. Key features of the synaptic behaviors, such as paired-pulse facilitation (PPF), short-term plasticity (STP), self-tuning, the spike logic operation, spatiotemporal dentritic integration, and modulation are successfully mimicked. Furthermore, the interface doping processes of electrolyte ions between the active P3HT layer and ion gels is comprehensively studied for confirming the operating processes underlying the conductivity and excitatory postsynaptic current (EPSC) variations in the organic synaptic devices. This study represents an important step toward building future artificial neuromorphic systems with newly emerged ion gel gated organic synaptic devices.

Interface Engineering and Gate Dielectric Engineering for High Performance Ge MOSFETs

Directory of Open Access Journals (Sweden)

Jiabao Sun

2015-01-01

Full Text Available In recent years, germanium has attracted intensive interests for its promising applications in the microelectronics industry. However, to achieve high performance Ge channel devices, several critical issues still have to be addressed. Amongst them, a high quality gate stack, that is, a low defect interface layer and a dielectric layer, is of crucial importance. In this work, we first review the existing methods of interface engineering and gate dielectric engineering and then in more detail we discuss and compare three promising approaches (i.e., plasma postoxidation, high pressure oxidation, and ozone postoxidation. It has been confirmed that these approaches all can significantly improve the overall performance of the metal-oxide-semiconductor field effect transistor (MOSFET device.

Transport and performance of a gate all around InAs nanowire transistor

International Nuclear Information System (INIS)

Alam, Khairul

2009-01-01

The transport physics and performance metrics of a gate all around an InAs nanowire transistor are studied using a three-dimensional quantum simulation. The transistor action of an InAs nanowire transistor occurs by modulating the transmission coefficient of the device. This action is different from a conventional metal-oxide-semiconductor field effect transistor, where the transistor action occurs by modulating the charge in the channel. The device has 82% tunneling current in the off-state and 81% thermal current in the on-state. The two current components become equal at a gate bias at which an approximate source-channel flat-band condition is achieved. Prior to this gate bias, the tunneling current dominates and the thermal current dominates beyond it. The device has an on/off current ratio of 7.84 × 10 5 and an inverse subthreshold slope of 63 mV dec −1 . The transistor operates in the quantum capacitance limit with a normalized transconductance value of 14.43 mS µm −1 , an intrinsic switching delay of 90.1675 fs, and an intrinsic unity current gain frequency of 6.8697 THz

Study on effective MOSFET channel length extracted from gate capacitance

Science.gov (United States)

Tsuji, Katsuhiro; Terada, Kazuo; Fujisaka, Hisato

2018-01-01

The effective channel length (L GCM) of metal-oxide-semiconductor field-effect transistors (MOSFETs) is extracted from the gate capacitances of actual-size MOSFETs, which are measured by charge-injection-induced-error-free charge-based capacitance measurement (CIEF CBCM). To accurately evaluate the capacitances between the gate and the channel of test MOSFETs, the parasitic capacitances are removed by using test MOSFETs having various channel sizes and a source/drain reference device. A strong linear relationship between the gate-channel capacitance and the design channel length is obtained, from which L GCM is extracted. It is found that L GCM is slightly less than the effective channel length (L CRM) extracted from the measured MOSFET drain current. The reason for this is discussed, and it is found that the capacitance between the gate electrode and the source and drain regions affects this extraction.

The Challenges of Implementing Fine-Grained Power Gating

NARCIS (Netherlands)

Niedermeier, A.; Svarstad, Kjetil; Bouwens, Frank; Hulzink, Jos; Huisken, Jos

2010-01-01

Power consumption in digital systems, especially in portable devices, is a crucial design factor. Due to downscaling of technology, dynamic switching power is not the only relevant source of power consumption anymore as power dissipation caused by leakage currents increases. Even though power gating

MOSFET-like CNFET based logic gate library for low-power application: a comparative study

International Nuclear Information System (INIS)

Gowri Sankar, P. A.; Udhayakumar, K.

2014-01-01

The next generation of logic gate devices are expected to depend upon radically new technologies mainly due to the increasing difficulties and limitations of existing CMOS technology. MOSFET like CNFETs should ideally be the best devices to work with for high-performance VLSI. This paper presents results of a comprehensive comparative study of MOSFET-like carbon nanotube field effect transistors (CNFETs) technology based logic gate library for high-speed, low-power operation than conventional bulk CMOS libraries. It focuses on comparing four promising logic families namely: complementary-CMOS (C-CMOS), transmission gate (TG), complementary pass logic (CPL) and Domino logic (DL) styles are presented. Based on these logic styles, the proposed library of static and dynamic NAND-NOR logic gates, XOR, multiplexer and full adder functions are implemented efficiently and carefully analyzed with a test bench to measure propagation delay and power dissipation as a function of supply voltage. This analysis provides the right choice of logic style for low-power, high-speed applications. Proposed logic gates libraries are simulated using Synopsys HSPICE based on the standard 32 nm CNFET model. The simulation results demonstrate that, it is best to use C-CMOS logic style gates that are implemented in CNFET technology which are superior in performance compared to other logic styles, because of their low average power-delay-product (PDP). The analysis also demonstrates how the optimum supply voltage varies with logic styles in ultra-low power systems. The robustness of the proposed logic gate library is also compared with conventional and state-art of CMOS logic gate libraries. (semiconductor integrated circuits)

Gate-Defined Quantum Confinement in InSe-based van der Waals Heterostructures.

Science.gov (United States)

Hamer, Matthew J; Tóvári, Endre; Zhu, Mengjian; Thompson, Michael Dermot; Mayorov, Alexander S; Prance, Jonathan; Lee, Yongjin; Haley, Richard; Kudrynskyi, Zakhar R; Patanè, Amalia; Terry, Daniel; Kovalyuk, Zakhar D; Ensslin, Klaus; Kretinin, Andrey V; Geim, Andre K; Gorbachev, Roman Vladislavovich

2018-05-15

Indium selenide, a post-transition metal chalcogenide, is a novel two-dimensional (2D) semiconductor with interesting electronic properties. Its tunable band gap and high electron mobility have already attracted considerable research interest. Here we demonstrate strong quantum confinement and manipulation of single electrons in devices made from few-layer crystals of InSe using electrostatic gating. We report on gate-controlled quantum dots in the Coulomb blockade regime as well as one-dimensional quantization in point contacts, revealing multiple plateaus. The work represents an important milestone in the development of quality devices based on 2D materials and makes InSe a prime candidate for relevant electronic and optoelectronic applications.

Pattern of Flushing, Cherelle Wilt, and Accuracy of Yield Forecasting of Some Cocoa Clones

Directory of Open Access Journals (Sweden)

Adi Prawoto

2014-08-01

Full Text Available Monthly observation of cocoa flushing, number of cherelle wilt (CW, number of small, medium and large pods of 6 clones was conducted for two years to study its dynamics for one year. A study was conducted in Kaliwining Experimental Station, 45 m asl. and D rainfall type (according to Schmidt & Ferguson, using ICS 13, ICS 60, TSH 858, Sulawesi 1, Sulawesi 2 and KW 165 clones of 8 years old. Each clone was planted intermittently in separate rows, replicated 6 rows. Correlation and regression analysis were done between variables and with rainfall data. The parallel research was conducted in the similar station to assess the accuracy of production estimation method by identify percentage of small pods (length 1—10 cm, medium (11—15 cm and large pods (>15 cm to grow until harvested. The study used 15th years old trees of Sulawesi 1, Sulawesi 2, KW 165, KKM 22, ICS 13 and DR 2 clones. Each clones was replicated 5 times. The result showed that intensive flushing (>50% occured during January, March, September and November meanwhile no flushing during December and February. Correlation between rainfall and flushing was positive (r=0.27. Effect of clones on flushing frequency was similar but for flushing intensity was significant. KW 165 tended to be the lowest but TSH 858 tend to be the highest. CW occured for a year-round but the height level during May and June. Effect of clones was significant, KW 165 showed highest followed by Sulawesi 2. CW level showed positive correlation with number of medium (r=0.71 and big pods (r=0.55, except showed negative correlation with flushing intensity (r=-0.37 and rainfall (r=-0.51. High pod setting happened during May to November and low pod setting during December to March. In this aspect effect of clones were significant, the productive clones were Sulawesi 1, Sulawesi 2 and KW 165, but ICS 60 was the less. CW level during 1st semester was lower than at 2nd semester and clone effect was significant. The

Onset of Spin Polarization in Four-Gate Quantum Point Contacts

Science.gov (United States)

Jones, Alex

A series of simulations which utilize a Non-equilibrium Green's function (NEGF) formalism is suggested which can provide indirect evidence of the fine and non-local electrostatic tuning of the onset of spin polarization in two closely spaced quantum point contacts (QPCs) that experience a phenomenon known as lateral spin-orbit coupling (LSOC). Each of the QPCs that create the device also has its own pair of side gates (SGs) which are in-plane with the device channel. Numerical simulations of the conductance of the two closely spaced QPCs or four-gate QPC are carried out for different biasing conditions applied to two leftmost and rightmost SGs. Conductance plots are then calculated as a function of the variable, Vsweep, which is the common sweep voltage applied to the QPC. When Vsweep is only applied to two of the four side gates, the plots show several conductance anomalies, i.e., below G0 = 2e2/h, characterized by intrinsic bistability, i.e., hysteresis loops due to a difference in the conductance curves for forward and reverse common voltage sweep simulations. The appearance of hysteresis loops is attributed to the co-existence of multistable spin textures in the narrow channel of the four-gate QPC. The shape, location, and number of hysteresis loops are very sensitive to the biasing conditions on the four SGs. The shape and size of the conductance anomalies and hysteresis loops are shown to change when the biasing conditions on the leftmost and rightmost SGs are swapped, a rectifying behavior providing an additional indirect evidence for the onset of spontaneous spin polarization in nanoscale devices made of QPCs. The results of the simulations reveal that the occurrence and fine tuning of conductance anomalies in QPC structures are highly sensitive to the non-local action of closely spaced SGs. It is therefore imperative to take into account this proximity effect in the design of all electrical spin valves making use of middle gates to fine tune the spin

Polymer-electrolyte-gated nanowire synaptic transistors for neuromorphic applications

Science.gov (United States)

Zou, Can; Sun, Jia; Gou, Guangyang; Kong, Ling-An; Qian, Chuan; Dai, Guozhang; Yang, Junliang; Guo, Guang-hua

2017-09-01

Polymer-electrolytes are formed by dissolving a salt in polymer instead of water, the conducting mechanism involves the segmental motion-assisted diffusion of ion in the polymer matrix. Here, we report on the fabrication of tin oxide (SnO2) nanowire synaptic transistors using polymer-electrolyte gating. A thin layer of poly(ethylene oxide) and lithium perchlorate (PEO/LiClO4) was deposited on top of the devices, which was used to boost device performances. A voltage spike applied on the in-plane gate attracts ions toward the polymer-electrolyte/SnO2 nanowire interface and the ions are gradually returned after the pulse is removed, which can induce a dynamic excitatory postsynaptic current in the nanowire channel. The SnO2 synaptic transistors exhibit the behavior of short-term plasticity like the paired-pulse facilitation and self-adaptation, which is related to the electric double-effect regulation. In addition, the synaptic logic functions and the logical function transformation are also discussed. Such single SnO2 nanowire-based synaptic transistors are of great importance for future neuromorphic devices.

Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance

Science.gov (United States)

Yadav, Dharmendra Singh; Verma, Abhishek; Sharma, Dheeraj; Tirkey, Sukeshni; Raad, Bhagwan Ram

2017-11-01

Tunnel-field-effect-transistor (TFET) has emerged as one of the most prominent devices to replace conventional MOSFET due to its ability to provide sub-threshold slope below 60 mV/decade (SS ≤ 60 mV/decade) and low leakage current. Despite this, TFETs suffer from ambipolar behavior, lower ON-state current, and poor RF performance. To address these issues, we have introduced drain and gate work function engineering with hetero gate dielectric for the first time in charge plasma based doping-less TFET (DL TFET). In this, the usage of dual work functionality over the drain region significantly reduces the ambipolar behavior of the device by varying the energy barrier at drain/channel interface. Whereas, the presence of dual work function at the gate terminal increases the ON-state current (ION). The combined effect of dual work function at the gate and drain electrode results in the increment of ON-state current (ION) and decrement of ambipolar conduction (Iambi) respectively. Furthermore, the incorporation of hetero gate dielectric along with dual work functionality at the drain and gate electrode provides an overall improvement in the performance of the device in terms of reduction in ambipolarity, threshold voltage and sub-threshold slope along with improved ON-state current and high frequency figures of merit.

Proposal for nanoscale cascaded plasmonic majority gates for non-Boolean computation.

Science.gov (United States)

Dutta, Sourav; Zografos, Odysseas; Gurunarayanan, Surya; Radu, Iuliana; Soree, Bart; Catthoor, Francky; Naeemi, Azad

2017-12-19

Surface-plasmon-polariton waves propagating at the interface between a metal and a dielectric, hold the key to future high-bandwidth, dense on-chip integrated logic circuits overcoming the diffraction limitation of photonics. While recent advances in plasmonic logic have witnessed the demonstration of basic and universal logic gates, these CMOS oriented digital logic gates cannot fully utilize the expressive power of this novel technology. Here, we aim at unraveling the true potential of plasmonics by exploiting an enhanced native functionality - the majority voter. Contrary to the state-of-the-art plasmonic logic devices, we use the phase of the wave instead of the intensity as the state or computational variable. We propose and demonstrate, via numerical simulations, a comprehensive scheme for building a nanoscale cascadable plasmonic majority logic gate along with a novel referencing scheme that can directly translate the information encoded in the amplitude and phase of the wave into electric field intensity at the output. Our MIM-based 3-input majority gate displays a highly improved overall area of only 0.636 μm 2 for a single-stage compared with previous works on plasmonic logic. The proposed device demonstrates non-Boolean computational capability and can find direct utility in highly parallel real-time signal processing applications like pattern recognition.

Lateral energy band profile modulation in tunnel field effect transistors based on gate structure engineering

Directory of Open Access Journals (Sweden)

Ning Cui

2012-06-01

Full Text Available Choosing novel materials and structures is important for enhancing the on-state current in tunnel field-effect transistors (TFETs. In this paper, we reveal that the on-state performance of TFETs is mainly determined by the energy band profile of the channel. According to this interpretation, we present a new concept of energy band profile modulation (BPM achieved with gate structure engineering. It is believed that this approach can be used to suppress the ambipolar effect. Based on this method, a Si TFET device with a symmetrical tri-material-gate (TMG structure is proposed. Two-dimensional numerical simulations demonstrated that the special band profile in this device can boost on-state performance, and it also suppresses the off-state current induced by the ambipolar effect. These unique advantages are maintained over a wide range of gate lengths and supply voltages. The BPM concept can serve as a guideline for improving the performance of nanoscale TFET devices.

Scrum integration in stage-gate models for collaborative product development

DEFF Research Database (Denmark)

Sommer, Anita Friis; Slavensky, Andreas; Nguyen, Vivi Thuy

2013-01-01

to differentiate from low-cost competitors and increase PD performance, some industrial manufacturers now seek competitive advantage by experimenting with new ways for collaborative PD. This includes integrating customer-focused agile process models, like Scrum, from the software industry into their existing PD...... models. Thus, instead of replacing traditional stage-gate models agile methods are currently integrated in existing PD models generating hybrid solution for collaborative PD. This paper includes a study of three industrial cases that have successfully integrated Scrum into a stage-gate process model...

An “ohmic-first” self-terminating gate-recess technique for normally-off Al2O3/GaN MOSFET

Science.gov (United States)

Wang, Hongyue; Wang, Jinyan; Li, Mengjun; He, Yandong; Wang, Maojun; Yu, Min; Wu, Wengang; Zhou, Yang; Dai, Gang

2018-04-01

In this article, an ohmic-first AlGaN/GaN self-terminating gate-recess etching technique was demonstrated where ohmic contact formation is ahead of gate-recess-etching/gate-dielectric-deposition (GRE/GDD) process. The ohmic contact exhibits few degradations after the self-terminating gate-recess process. Besides, when comparing with that using the conventional fabrication process, the fabricated device using the ohmic-first fabrication process shows a better gate dielectric quality in terms of more than 3 orders lower forward gate leakage current, more than twice higher reverse breakdown voltage as well as better stability. Based on this proposed technique, the normally-off Al2O3/GaN MOSFET exhibits a threshold voltage (V th) of ˜1.8 V, a maximum drain current of ˜328 mA/mm, a forward gate leakage current of ˜10-6 A/mm and an off-state breakdown voltage of 218 V at room temperature. Meanwhile, high temperature characteristics of the device was also evaluated and small variations (˜7.6%) of the threshold voltage was confirmed up to 300 °C.

Investigating degradation behavior of hole-trapping effect under static and dynamic gate-bias stress in a dual gate a-InGaZnO thin film transistor with etch stop layer

Energy Technology Data Exchange (ETDEWEB)

Liao, Po-Yung [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang3708@gmail.com [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Taiwan (China); Hsieh, Tien-Yu [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo [Department of Photonics, National Sun Yat-Sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chou, Cheng-Hsu; Chang, Jung-Fang [Product Technology Center, Chimei Innolux Corp., Tainan 741, Taiwan (China)

2016-03-31

The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V{sub T}) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V{sub T} shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V{sub T} shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V{sub T} shift increases with decreasing frequency of the top gate pulses.

Investigating degradation behavior of hole-trapping effect under static and dynamic gate-bias stress in a dual gate a-InGaZnO thin film transistor with etch stop layer

International Nuclear Information System (INIS)

Liao, Po-Yung; Chang, Ting-Chang; Hsieh, Tien-Yu; Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo; Chou, Cheng-Hsu; Chang, Jung-Fang

2016-01-01

The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V T ) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V T shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V T shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V T shift increases with decreasing frequency of the top gate pulses.

Gate Driver Circuit of Power Electronic Switches with Reduced Number of Isolated DC/DC Converter for a Switched Reluctance Motor

International Nuclear Information System (INIS)

Memon, A.A.

2013-01-01

This paper presents a gate driver circuit for the switching devices used in the asymmetrical converter for a switched reluctance machine with reduced number of isolated dc/dc converters. Isolation required in the gate driver circuit of switching devices is indispensable. For the purpose of isolation different arrangements may be used such as pulse transformers. The dc/dc converter for isolation and powering the gate drive circuits is suitable, cheaper in cost and simple to implement. It is also significant that required number of isolation converters is much less than the switches used in converter. In addition, a simple logic circuit has been presented for producing the gate signals at correct phase sequence which is compared with the gated signals directly obtained from the encoder of an existing machine. (author)

AlGaN/GaN high-electron-mobility transistors with transparent gates by Al-doped ZnO

International Nuclear Information System (INIS)

Wang Chong; He Yun-Long; Zheng Xue-Feng; Ma Xiao-Hua; Zhang Jin-Cheng; Hao Yue

2013-01-01

AlGaN/GaN high-electron-mobility transistors (HEMTs) with Al-doped ZnO (AZO) transparent gate electrodes are fabricated, and Ni/Au/Ni-gated HEMTs are produced in comparison. The AZO-gated HEMTs show good DC characteristics and Schottky rectifying characteristics, and the gate electrodes achieve excellent transparencies. Compared with Ni/Au/Ni-gated HEMTs, AZO-gated HEMTs show a low saturation current, high threshold voltage, high Schottky barrier height, and low gate reverse leakage current. Due to the higher gate resistivity, AZO-gated HEMTs exhibit a current—gain cutoff frequency (f T ) of 10 GHz and a power gain cutoff frequency (f max ) of 5 GHz, and lower maximum oscillation frequency than Ni/Au/Ni-gated HEMTs. Moreover, the C—V characteristics are measured and the gate interface characteristics of the AZO-gated devices are investigated by a C—V dual sweep

SEMICONDUCTOR DEVICES: Structural and electrical characteristics of lanthanum oxide gate dielectric film on GaAs pHEMT technology

Science.gov (United States)

Chia-Song, Wu; Hsing-Chung, Liu

2009-11-01

This paper investigates the feasibility of using a lanthanum oxide thin film (La2O3) with a high dielectric constant as a gate dielectric on GaAs pHEMTs to reduce gate leakage current and improve the gate to drain breakdown voltage relative to the conventional GaAs pHEMT. An E/D mode pHEMT in a single chip was realized by selecting the appropriate La2O3 thickness. The thin La2O3 film was characterized: its chemical composition and crystalline structure were determined by X-ray photoelectron spectroscopy and X-ray diffraction, respectively. La2O3 exhibited good thermal stability after post-deposition annealing at 200, 400 and 600 °C because of its high binding-energy (835.6 eV). Experimental results clearly demonstrated that the La2O3 thin film was thermally stable. The DC and RF characteristics of Pt/La2O3/Ti/Au gate and conventional Pt/Ti/Au gate pHEMTs were examined. The measurements indicated that the transistor with the Pt/La2O3/Ti/Au gate had a higher breakdown voltage and lower gate leakage current. Accordingly, the La2O3 thin film is a potential high-k material for use as a gate dielectric to improve electrical performance and the thermal effect in high-power applications.

SiC Power MOSFET with Improved Gate Dielectric

Energy Technology Data Exchange (ETDEWEB)

Sbrockey, Nick M. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Tompa, Gary S. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Spencer, Michael G. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Chandrashekhar, Chandra M.V. S. [Structured Materials Industries, Inc., Piscataway, NJ (United States)

2010-08-23

In this STTR program, Structured Materials Industries (SMI), and Cornell University are developing novel gate oxide technology, as a critical enabler for silicon carbide (SiC) devices. SiC is a wide bandgap semiconductor material, with many unique properties. SiC devices are ideally suited for high-power, highvoltage, high-frequency, high-temperature and radiation resistant applications. The DOE has expressed interest in developing SiC devices for use in extreme environments, in high energy physics applications and in power generation. The development of transistors based on the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) structure will be critical to these applications.

Capacitance and effective area of flush monopole probes.

Energy Technology Data Exchange (ETDEWEB)

Warne, Larry Kevin; Johnson, William Arthur; Morris, Marvin E.; Basilio, Lorena I.; Lehr, Jane Marie; Higgins, Matthew B.

2004-08-01

Approximate formulas are constructed and numerical simulations are carried out for electric field derivative probes that have the form of flush mounted monopoles. Effects such as rounded edges are included. A method is introduced to make results from two-dimensional conformal mapping analyses accurately apply to the three-dimensional axisymmetric probe geometry

Behavior Interventions in the Restroom: Flushing Away Noise

Science.gov (United States)

Pasqua, Jamie L.; Dart, Evan H.; Radley, Keith C.

2016-01-01

This study investigated the effectiveness of Flushing Away Noise, an interdependent group contingency using an iPod equipped with a decibel meter application, for reducing noise in restrooms. Two Head Start classrooms in the Southeastern United States, referred for demonstrating high levels of student noise in the restroom, were included in the…

Two-dimensional model for subthreshold current and subthreshold swing of graded-channel dual-material double-gate (GCDMDG) MOSFETs

Science.gov (United States)

Goel, Ekta; Kumar, Sanjay; Singh, Balraj; Singh, Kunal; Jit, Satyabrata

2017-06-01

The subthreshold performance of graded-channel dual-material double-gate (GCDMDG) MOSFETs is examined through two-dimensional (2D) analytical modeling of subthreshold-current (SC) and subthreshold-swing (SS). The potential function obtained by using the parabolic approach to solve the 2D Poisson's equation, has been used to formulate SC and SS characteristics of the device. The variations of SS against different device parameters have been obtained with the help of effective conduction path parameter. The SC and SS characteristics of the GCDMDG MOS transistor have been compared with those of the dual-material double-gate (DMDG) and simple graded-channel double-gate (GCDG) MOS structures to show its better subthreshold characteristics over the latter two devices. The results of the developed model are well-agreed with the commercially available SILVACO ATLAS™ simulator data.

Gated communities in Latin American cities Barrios cerrados en ciudades latinoamericanas

Directory of Open Access Journals (Sweden)

Lucía Demajo Meseguer

2011-11-01

Full Text Available Urban space in many Latin American cities is proliferating these last decades in a gated community form, being defined as enclosed housing developments, with controlled access and security devices. The search for security, the contact with nature and exclusivity are some common features of these urbanizations. These features are usually presented by advertising agencies as vital needs for this modern society. Development of gated communities entails consequences associated with urban space fragmentation, privatization of public space, social segregation and lack of a community belonging sense; hence the need to question these types of developments and to intervene to modify them. Interventions, both aimed to redirect the emerging urban model and to carry out specific actions in the already existing gated communities, should bet on following traditional neighborhood models. This article pretends to analyze the gated communities’ phenomenon occurring in Latin America, detecting it consequences and proposing possible intervention measures.

El espacio urbano de algunas ciudades latinoamericanas está proliferando, en las últimas décadas, en forma de barrios cerrados; entendidos como áreas de viviendas cerradas, con acceso controlado y dispositivos de seguridad. La búsqueda de la seguridad, el contacto con la naturaleza y la exclusividad son algunos rasgos comunes de estos barrios que, en muchos casos, la publicidad trata de convertir en necesidades vitales para la sociedad. Los barrios cerrados llevan consigo consecuencias relacionadas con la fragmentación del espacio urbano, la privatización del espacio público, la segregación social y el sentimiento de comunidad; de ahí, la necesidad de cuestionarse este tipo de emprendimientos y de intervenir sobre ellos. Las intervenciones, ya sean dirigidas a redireccionar el modelo urbano emergente, como actuaciones puntuales en BC ya existentes, deberían apostar por seguir modelos de barrio

MOSFET-BJT hybrid mode of the gated lateral bipolar junction transistor for C-reactive protein detection.

Science.gov (United States)

Yuan, Heng; Kwon, Hyurk-Choon; Yeom, Se-Hyuk; Kwon, Dae-Hyuk; Kang, Shin-Won

2011-10-15

In this study, we propose a novel biosensor based on a gated lateral bipolar junction transistor (BJT) for biomaterial detection. The gated lateral BJT can function as both a BJT and a metal-oxide-semiconductor field-effect transistor (MOSFET) with both the emitter and source, and the collector and drain, coupled. C-reactive protein (CRP), which is an important disease marker in clinical examinations, can be detected using the proposed device. In the MOSFET-BJT hybrid mode, the sensitivity, selectivity, and reproducibility of the gated lateral BJT for biosensors were evaluated in this study. According to the results, in the MOSFET-BJT hybrid mode, the gated lateral BJT shows good selectivity and reproducibility. Changes in the emitter (source) current of the device for CRP antigen detection were approximately 0.65, 0.72, and 0.80 μA/decade at base currents of -50, -30, and -10 μA, respectively. The proposed device has significant application in the detection of certain biomaterials that require a dilution process using a common biosensor, such as a MOSFET-based biosensor. Copyright © 2011 Elsevier B.V. All rights reserved.

Three-input gate logic circuits on chemically assembled single-electron transistors with organic and inorganic hybrid passivation layers.

Science.gov (United States)

Majima, Yutaka; Hackenberger, Guillaume; Azuma, Yasuo; Kano, Shinya; Matsuzaki, Kosuke; Susaki, Tomofumi; Sakamoto, Masanori; Teranishi, Toshiharu

2017-01-01

Single-electron transistors (SETs) are sub-10-nm scale electronic devices based on conductive Coulomb islands sandwiched between double-barrier tunneling barriers. Chemically assembled SETs with alkanethiol-protected Au nanoparticles show highly stable Coulomb diamonds and two-input logic operations. The combination of bottom-up and top-down processes used to form the passivation layer is vital for realizing multi-gate chemically assembled SET circuits, as this combination enables us to connect conventional complementary metal oxide semiconductor (CMOS) technologies via planar processes. Here, three-input gate exclusive-OR (XOR) logic operations are demonstrated in passivated chemically assembled SETs. The passivation layer is a hybrid bilayer of self-assembled monolayers (SAMs) and pulsed laser deposited (PLD) aluminum oxide (AlO[Formula: see text]), and top-gate electrodes were prepared on the hybrid passivation layers. Top and two-side-gated SETs showed clear Coulomb oscillation and diamonds for each of the three available gates, and three-input gate XOR logic operation was clearly demonstrated. These results show the potential of chemically assembled SETs to work as logic devices with multi-gate inputs using organic and inorganic hybrid passivation layers.

Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures

International Nuclear Information System (INIS)

Chakraborty, Gargi; Sarkar, C K; Lu, X B; Dai, J Y

2008-01-01

The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter

Design, fabrication, and evaluation of charge-coupled devices with aluminum-anodized-aluminum gates

Science.gov (United States)

Gassaway, J. D.; Causey, W. H., Jr.

1977-01-01

A 4-phase, 49 1/2 bit CCD shift register was designed and fabricated using two levels of aluminum metallization with anodic Al2O3 insulation separating the layers. Test circuitry was also designed and constructed. A numerical analysis of an MOS-RC transmission line was made and results are given to characterize performance for various conductivities. The electrical design of the CCD included a low-noise dual-gate input and a balanced floating diffusion output circuit. Metallization was accomplished both by low voltage DC sputtering and thermal evaporation. The audization was according to published procedures using a buffered tartaric acid bath. Approximately 20 wafers were processed with 50 complete chips per wafer. All devices failed by shorting between the metal levels at some point. Experimental procedures eliminated temperature effects from sintering and drying, anodic oxide thickness, edge effects, photoresist stripping procedures, and metallization techniques as the primary causes of failure. It was believed from a study of SEM images that protuberances (hillocks) grow up from the first level metal through the oxide either causing a direct short or producing a weak, highly stressed insulation point which fails at low voltage. The cause of these hillocks is unknown; however, they have been observed to grow during temperature excursions to 470 C.

Gate-defined Quantum Confinement in Suspended Bilayer Graphene

Science.gov (United States)

Allen, Monica

2013-03-01

Quantum confined devices in carbon-based materials offer unique possibilities for applications ranging from quantum computation to sensing. In particular, nanostructured carbon is a promising candidate for spin-based quantum computation due to the ability to suppress hyperfine coupling to nuclear spins, a dominant source of spin decoherence. Yet graphene lacks an intrinsic bandgap, which poses a serious challenge for the creation of such devices. We present a novel approach to quantum confinement utilizing tunnel barriers defined by local electric fields that break sublattice symmetry in suspended bilayer graphene. This technique electrostatically confines charges via band structure control, thereby eliminating the edge and substrate disorder that hinders on-chip etched nanostructures to date. We report clean single electron tunneling through gate-defined quantum dots in two regimes: at zero magnetic field using the energy gap induced by a perpendicular electric field and at finite magnetic fields using Landau level confinement. The observed Coulomb blockade periodicity agrees with electrostatic simulations based on local top-gate geometry, a direct demonstration of local control over the band structure of graphene. This technology integrates quantum confinement with pristine device quality and access to vibrational modes, enabling wide applications from electromechanical sensors to quantum bits. More broadly, the ability to externally tailor the graphene bandgap over nanometer scales opens a new unexplored avenue for creating quantum devices.

Ion implantation in advanced planar and vertical devices

International Nuclear Information System (INIS)

Gossmann, Hans-Joachim L.

2005-01-01

The extent ('gate overlap') and slope ('abruptness') of the lateral junction are quickly replacing vertical junction depth as the most important physical junction metrics in advanced device architectures. This is in particular true for ultra-thin body devices, where the vertical junction is limited by a geometric constraint. The optimum gate overlap is quite small, or may even be negative, making a process without the need of high-tilt implantation feasible, even for dopant activation with negligible diffusion by flash annealing or laser thermal processing. Dopant activation by solid phase epitaxial regrowth might require high-tilt implants for a positive overlap. The use of such implants, however, is expected to lead to severe gate-poly and gate-oxide degradation. Scaling the 150 nm technology has drastically shrunk the overlap, accomplished by an equally aggressive reduction in thermal budget. For a 65 nm node device, a significant fraction of the overlap originates in the as-implanted dopant profile and the importance of diffusion is diminished. As a consequence small changes in the as-implanted profile are beginning to have a disproportionate impact on device characteristics. Small angular deviations of the incident beam from normal incidence, as seen by the wafer, lead to large changes in on-current. This can be alleviated significantly by a quad implant provided the tilt-angle is sufficiently large, in the order >5 deg.

Light engine for an illumination device

DEFF Research Database (Denmark)

2015-01-01

Disclosed herein are embodiments of a light engine for an illumination device, the light engine defining an output gate and being configured to output light from said output gate; wherein the light engine comprises: one or more light sources defining a light-emitting area; a concave reflector con...... configured to receive light from the light-emitting area and to direct light from respective portions of the light-emitting area to form a converging beam that converges towards a beam spot at the output gate....

Integration of biomolecular logic gates with field-effect transducers

Energy Technology Data Exchange (ETDEWEB)

Poghossian, A., E-mail: a.poghossian@fz-juelich.de [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Malzahn, K. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Abouzar, M.H. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Mehndiratta, P. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Katz, E. [Department of Chemistry and Biomolecular Science, NanoBio Laboratory (NABLAB), Clarkson University, Potsdam, NY 13699-5810 (United States); Schoening, M.J. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany)

2011-11-01

Highlights: > Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. > The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. > Logic gates were activated by different combinations of chemical inputs (analytes). > The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO{sub 2}-Ta{sub 2}O{sub 5} structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta{sub 2}O{sub 5}) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

Integration of biomolecular logic gates with field-effect transducers

International Nuclear Information System (INIS)

Poghossian, A.; Malzahn, K.; Abouzar, M.H.; Mehndiratta, P.; Katz, E.; Schoening, M.J.

2011-01-01

Highlights: → Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. → The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. → Logic gates were activated by different combinations of chemical inputs (analytes). → The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO 2 -Ta 2 O 5 structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta 2 O 5 ) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

Diamond micro-Raman thermometers for accurate gate temperature measurements

Energy Technology Data Exchange (ETDEWEB)

Simon, Roland B.; Pomeroy, James W.; Kuball, Martin [Center for Device Thermography and Reliability, H. H. Wills Physics Laboratory, University of Bristol, Tyndall Avenue, Bristol BS8 1TL (United Kingdom)

2014-05-26

Determining the peak channel temperature in AlGaN/GaN high electron mobility transistors and other devices with high accuracy is an important and challenging issue. A surface-sensitive thermometric technique is demonstrated, utilizing Raman thermography and diamond microparticles to measure the gate temperature. This technique enhances peak channel temperature estimation, especially when it is applied in combination with standard micro-Raman thermography. Its application to other metal-covered areas of devices, such as field plates is demonstrated. Furthermore, this technique can be readily applied to other material/device systems.

Diamond micro-Raman thermometers for accurate gate temperature measurements

International Nuclear Information System (INIS)

Simon, Roland B.; Pomeroy, James W.; Kuball, Martin

2014-01-01

Determining the peak channel temperature in AlGaN/GaN high electron mobility transistors and other devices with high accuracy is an important and challenging issue. A surface-sensitive thermometric technique is demonstrated, utilizing Raman thermography and diamond microparticles to measure the gate temperature. This technique enhances peak channel temperature estimation, especially when it is applied in combination with standard micro-Raman thermography. Its application to other metal-covered areas of devices, such as field plates is demonstrated. Furthermore, this technique can be readily applied to other material/device systems.

Modeling and analysis of surface potential of single gate fully depleted SOI MOSFET using 2D-Poisson's equation

Science.gov (United States)

Mani, Prashant; Tyagi, Chandra Shekhar; Srivastav, Nishant

2016-03-01

In this paper the analytical solution of the 2D Poisson's equation for single gate Fully Depleted SOI (FDSOI) MOSFET's is derived by using a Green's function solution technique. The surface potential is calculated and the threshold voltage of the device is minimized for the low power consumption. Due to minimization of threshold voltage the short channel effect of device is suppressed and after observation we obtain the device is kink free. The structure and characteristics of SingleGate FDSOI MOSFET were matched by using MathCAD and silvaco respectively.

Gated listmode acquisition with the QuadHIDAC animal PET to image mouse hearts

International Nuclear Information System (INIS)

Schaefers, K.P.; Lang, N.; Stegger, L.; Schober, O.; Schaefers, M.

2006-01-01

Purpose: the aim of this study was to develop ECG and respiratory gating in combination with listmode acquisition for the quadHIDAC small-animal PET scanner. Methods: ECG and respiratory gating was realized with the help of an external trigger device (BioVET) synchronized with the listmode acquisition. Listmode data of a mouse acquisition (injected with 6.5 MBq of 18 F-FDG) were sorted according to three different gating definitions: 12 cardiac gates, 8 respiratory gates and a combination of 8 cardiac and 8 respiratory gates. Images were reconstructed with filtered back-projection (ramp filter), and parameters like left ventricular wall thickness (WT), wall-to-wall separation (WS) and blood to myocardium activity ratios (BMR) were calculated. Results: cardiac gated images show improvement of all parameters (WT 2.6 mm, WS 4.1 mm, BRM 2.3) in diastole compared to ungated images (WT 3.0 mm, WS 3.4 mm, BMR 1.3). Respiratory gating had little effect on calculated parameters. Conclusion: ECG gating with the quadHIDAC can improve myocardial image quality in mice. This could have a major impact on the calculation of an image-derived input function for kinetic modelling. (orig.)

Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

Science.gov (United States)

Song, In-Hyouk; Forfang, William B. D.; Cole, Bryan; You, Byoung Hee

2014-10-01

The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz.

Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

International Nuclear Information System (INIS)

Song, In-Hyouk; Forfang, William B D; Cole, Bryan; Hee You, Byoung

2014-01-01

The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz. (paper)

Insights into operation of planar tri-gate tunnel field effect transistor for dynamic memory application

Science.gov (United States)

Navlakha, Nupur; Kranti, Abhinav

2017-07-01

Insights into device physics and operation through the control of energy barriers are presented for a planar tri-gate Tunnel Field Effect Transistor (TFET) based dynamic memory. The architecture consists of a double gate (G1) at the source side and a single gate (G2) at the drain end of the silicon film. Dual gates (G1) effectively enhance the tunneling based read mechanism through the enhanced coupling and improved electrostatic control over the channel. The single gate (G2) controls the holes in the potential barrier induced through the proper selection of bias and workfunction. The results indicate that the planar tri-gate achieves optimum performance evaluated in terms of two composite metrics (M1 and M2), namely, product of (i) Sense Margin (SM) and Retention Time (RT) i.e., M1 = SM × RT and (ii) Sense Margin and Current Ratio (CR) i.e., M2 = SM × CR. The regulation of barriers created by the gates (G1 and G2) through the optimal use of device parameters leads to better performance metrics, with significant improvement at scaled lengths as compared to other tunneling based dynamic memory architectures. The investigation shows that lengths of G1, G2 and lateral spacing can be scaled down to 25 nm, 50 nm, and 30 nm, respectively, while achieving reasonable values for (M1, M2). The work demonstrates a systematic approach to showcase the advancement in TFET based Dynamic Random Access Memory (DRAM) through the use of planar tri-gate topology at a lower bias value. The concept, design, and operation of planar tri-gate architecture provide valuable viewpoints for TFET based DRAM.

Gate-tunable Andreev bound states in InSb nanowire Josephson junction

Energy Technology Data Exchange (ETDEWEB)

Kang, Ning; Li, Sen; Fan, Dingxun; Xu, Hongqi [Key Laboratory for the Physics and Chemistry of Nanodevices, Department of Electronics, Peking University, Beijing 100871 (China); Caroff, Philippe [Division of Solid State Physics, Lund University, P. O. Box 118, S-221 00 Lund (Sweden)

2016-07-01

Hybrid InSb nanowire-superconductor devices are promising candidates for investigating Majorana modes in solid-state devices and future technologies of topological quantum manipulation. Here, we report low-temperature transport measurements on an individual InSb nanowire quantum dot coupled to superconducting contacts that exhibit an interplay between the Kondo effects and superconductivity. We observed two types of subgap resonance states within the superconducting gap, which can be attributed to gate-tunable Andreev bound states in Coulomb valleys with different Kondo temperatures. The presence of the gate-tunable 0 and pi junction allow us to investigate the fundamental 0- pi transition. Detailed magnetic field and temperature evolution of level spectroscopy demonstrate different behavior of two types of the Andreev bound states. Our results exhibit that the InSb nanowires can provide a promising platform for exploring phase coherence transport and the effect of spin-orbit coupling in semiconductor nanowire-superconductor hybrid device.

Mobility overestimation due to gated contacts in organic field-effect transistors

Science.gov (United States)

Bittle, Emily G.; Basham, James I.; Jackson, Thomas N.; Jurchescu, Oana D.; Gundlach, David J.

2016-01-01

Parameters used to describe the electrical properties of organic field-effect transistors, such as mobility and threshold voltage, are commonly extracted from measured current–voltage characteristics and interpreted by using the classical metal oxide–semiconductor field-effect transistor model. However, in recent reports of devices with ultra-high mobility (>40 cm2 V−1 s−1), the device characteristics deviate from this idealized model and show an abrupt turn-on in the drain current when measured as a function of gate voltage. In order to investigate this phenomenon, here we report on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on. We disentangle the channel properties from the contact resistance by using impedance spectroscopy and show that the current in such devices is governed by a gate bias dependence of the contact resistance. As a result, extracted mobility values from d.c. current–voltage characterization are overestimated by one order of magnitude or more. PMID:26961271

Low-voltage high-speed programming gate-all-around floating gate memory cell with tunnel barrier engineering

Science.gov (United States)

Hamzah, Afiq; Ezaila Alias, N.; Ismail, Razali

2018-06-01

The aim of this study is to investigate the memory performances of gate-all-around floating gate (GAA-FG) memory cell implementing engineered tunnel barrier concept of variable oxide thickness (VARIOT) of low-k/high-k for several high-k (i.e., Si3N4, Al2O3, HfO2, and ZrO2) with low-k SiO2 using three-dimensional (3D) simulator Silvaco ATLAS. The simulation work is conducted by initially determining the optimized thickness of low-k/high-k barrier-stacked and extracting their Fowler–Nordheim (FN) coefficients. Based on the optimized parameters the device performances of GAA-FG for fast program operation and data retention are assessed using benchmark set by 6 and 8 nm SiO2 tunnel layer respectively. The programming speed has been improved and wide memory window with 30% increment from conventional SiO2 has been obtained using SiO2/Al2O3 tunnel layer due to its thin low-k dielectric thickness. Furthermore, given its high band edges only 1% of charge-loss is expected after 10 years of ‑3.6/3.6 V gate stress.

Direct probing of electron and hole trapping into nano-floating-gate in organic field-effect transistor nonvolatile memories

Energy Technology Data Exchange (ETDEWEB)

Cui, Ze-Qun; Wang, Shun; Chen, Jian-Mei; Gao, Xu; Dong, Bin, E-mail: wangsd@suda.edu.cn, E-mail: chilf@suda.edu.cn, E-mail: bdong@suda.edu.cn; Chi, Li-Feng, E-mail: wangsd@suda.edu.cn, E-mail: chilf@suda.edu.cn, E-mail: bdong@suda.edu.cn; Wang, Sui-Dong, E-mail: wangsd@suda.edu.cn, E-mail: chilf@suda.edu.cn, E-mail: bdong@suda.edu.cn [Jiangsu Key Laboratory for Carbon-Based Functional Materials and Devices, Institute of Functional Nano and Soft Materials (FUNSOM), Soochow University, Suzhou, Jiangsu 215123 (China)

2015-03-23

Electron and hole trapping into the nano-floating-gate of a pentacene-based organic field-effect transistor nonvolatile memory is directly probed by Kelvin probe force microscopy. The probing is straightforward and non-destructive. The measured surface potential change can quantitatively profile the charge trapping, and the surface characterization results are in good accord with the corresponding device behavior. Both electrons and holes can be trapped into the nano-floating-gate, with a preference of electron trapping than hole trapping. The trapped charge quantity has an approximately linear relation with the programming/erasing gate bias, indicating that the charge trapping in the device is a field-controlled process.

Direct probing of electron and hole trapping into nano-floating-gate in organic field-effect transistor nonvolatile memories

International Nuclear Information System (INIS)

Cui, Ze-Qun; Wang, Shun; Chen, Jian-Mei; Gao, Xu; Dong, Bin; Chi, Li-Feng; Wang, Sui-Dong

2015-01-01

Electron and hole trapping into the nano-floating-gate of a pentacene-based organic field-effect transistor nonvolatile memory is directly probed by Kelvin probe force microscopy. The probing is straightforward and non-destructive. The measured surface potential change can quantitatively profile the charge trapping, and the surface characterization results are in good accord with the corresponding device behavior. Both electrons and holes can be trapped into the nano-floating-gate, with a preference of electron trapping than hole trapping. The trapped charge quantity has an approximately linear relation with the programming/erasing gate bias, indicating that the charge trapping in the device is a field-controlled process

All-Optical Network Subsystems Using Integrated SOA-Based Optical Gates and Flip-Flops for Label-Swapped Netorks

DEFF Research Database (Denmark)

Seoane, Jorge; Holm-Nielsen, Pablo Villanueva; Kehayas, E.

2006-01-01

In this letter, we demonstrate that all-optical network subsystems, offering intelligence in the optical layer, can be constructed by functional integration of integrated all-optical logic gates and flip-flops. In this context, we show 10-Gb/s all-optical 2-bit label address recognition......-level advantages of these all-optical subsystems combined with their realization with compact integrated devices, suggest that they are strong candidates for future packet/label switched optical networks....... by interconnecting two optical gates that perform xor operation on incoming optical labels. We also demonstrate 40-Gb/s all-optical wavelength-switching through an optically controlled wavelength converter, consisting of an integrated flip-flop prototype device driven by an integrated optical gate. The system...

Gate length scaling trends of drive current enhancement in CMOSFETs with dual stress overlayers and embedded-SiGe

International Nuclear Information System (INIS)

Flachowsky, S.; Wei, A.; Herrmann, T.; Illgen, R.; Horstmann, M.; Richter, R.; Salz, H.; Klix, W.; Stenzel, R.

2008-01-01

Strain engineering in MOSFETs using tensile nitride overlayer (TOL) films, compressive nitride overlayer (COL) films, and embedded-SiGe (eSiGe) is studied by extensive device experiments and numerical simulations. The scaling behavior was analyzed by gate length reduction down to 40 nm and it was found that drive current strongly depends on the device dimensions. The reduction of drain-current enhancement for short-channel devices can be attributed to two competing factors: shorter gate length devices have increased longitudinal and vertical stress components which should result in improved drain-currents. However, there is a larger degradation from external resistance as the gate length decreases, due to a larger voltage dropped across the external resistance. Adding an eSiGe stressor reduces the external resistance in the p-MOSFET, to the extent that the drive current improvement from COL continues to increase even down the shortest gate length studied. This is due to the reduced resistivity of SiGe itself and the SiGe valence band offset relative to Si, leading to a smaller silicide-active contact resistance. It demonstrates the advantage of combining eSiGe and COL, not only for increased stress, but also for parasitic resistance reduction to enable better COL drive current benefit

Performance of organic field effect transistors with high-k gate oxide after application of consecutive bias stress

Energy Technology Data Exchange (ETDEWEB)

Lee, Sunwoo; Choi, Changhwan; Lee, Kilbock [Department of Materials Science and Engineering, Hanyang University, Seoul, 133-791 (Korea, Republic of); Cho, Joong Hwee [Department of Embedded Systems Engineering,University of Incheon, Incheon 406-722 (Korea, Republic of); Ko, Ki-Young [Korea Institute of Patent Information, Seoul, 146-8 (Korea, Republic of); Ahn, Jinho, E-mail: jhahn@hanyang.ac.kr [Department of Materials Science and Engineering, Hanyang University, Seoul, 133-791 (Korea, Republic of)

2012-10-30

We report the effect of consecutive electrical stress on the performance of organic field effect transistors (OFETs). Sputtered aluminum oxide (Al{sub 2}O{sub 3}) and hafnium oxide (HfO{sub 2}) were used as gate oxide layers. After the electrical stress, the threshold voltage, which strongly depends on bulk defects, was remarkably shifted to the negative direction, while the other performance characteristics of OFETs such as on-current, transconductance and mobility, which are sensitive to interface defects, were slightly decreased. This result implies that the defects in the bulk layer are significantly affected compared to the defects in the interface layer. Thus, it is important to control the defects in the pentacene bulk layer in order to maintain the good reliabilities of pentacene devices. Those defects in HfO{sub 2} gate oxide devices were larger compared to those in Al{sub 2}O{sub 3} gate oxide devices.

Time to transient and stable reductions in hot flush frequency in postmenopausal women using conjugated estrogens/bazedoxifene.

Science.gov (United States)

Pinkerton, JoAnn V; Bushmakin, Andrew G; Abraham, Lucy; Komm, Barry S; Bobula, Joel

2017-09-01

This post hoc analysis estimates time to transient and stable reductions in hot flush frequency in postmenopausal women using conjugated estrogens/bazedoxifene. In the 12-week Selective estrogens, Menopause, And Response to Therapy (SMART)-2 trial of conjugated estrogens/bazedoxifene 0.45 mg/20 mg and 0.625 mg/20 mg, women with at least seven moderate/severe hot flushes per day or 50 per week at screening recorded frequency of moderate/severe hot flushes in diaries. Nonparametric models and SAS Proc Lifetest were used to estimate median times to various degrees of transient reductions (first day with improvement) and stable reductions (first day with improvement maintained through study's end) in hot flush frequency. Treatment produced transient hot flush reductions of 40% to 100% and stable reductions of 30% to 100% significantly faster than placebo. Median time to a transient 50% reduction was 8 days for conjugated estrogens/bazedoxifene 0.45 mg/20 mg, 9.5 for 0.625 mg/20 mg, and 10 for placebo; median time to a stable 50% reduction was 9, 10, and 38 days. Median time to a transient 90% reduction was 32 and 22.5 days for 0.45 mg/20 mg and 0.625 mg/20 mg, and median time to a stable 90% reduction was 83 and 29 days, respectively; median times to transient/stable 90% reductions were not reached during the 12-week study in the placebo group. Although not all women using conjugated estrogens/bazedoxifene achieve permanent elimination of hot flushes, the frequency is likely to be substantially reduced during the first week to month. Women can expect approximately 50% reduction in hot flush frequency after about 8 to 10 days, and sustained improvement with continued treatment.

Gate tuneable beamsplitter in ballistic graphene

Energy Technology Data Exchange (ETDEWEB)

Rickhaus, Peter; Makk, Péter, E-mail: Peter.Makk@unibas.ch; Schönenberger, Christian [Department of Physics, University of Basel, Klingelbergstrasse 82, CH-4056 Basel (Switzerland); Liu, Ming-Hao; Richter, Klaus [Institut für Theoretische Physik, Universität Regensburg, D-93040 Regensburg (Germany)

2015-12-21

We present a beam splitter in a suspended, ballistic, multiterminal, bilayer graphene device. By using local bottomgates, a p-n interface tilted with respect to the current direction can be formed. We show that the p-n interface acts as a semi-transparent mirror in the bipolar regime and that the reflectance and transmittance of the p-n interface can be tuned by the gate voltages. Moreover, by studying the conductance features appearing in magnetic field, we demonstrate that the position of the p-n interface can be moved by 1 μm. The herein presented beamsplitter device can form the basis of electron-optic interferometers in graphene.

Efficient gate set tomography on a multi-qubit superconducting processor

Science.gov (United States)

Nielsen, Erik; Rudinger, Kenneth; Blume-Kohout, Robin; Bestwick, Andrew; Bloom, Benjamin; Block, Maxwell; Caldwell, Shane; Curtis, Michael; Hudson, Alex; Orgiazzi, Jean-Luc; Papageorge, Alexander; Polloreno, Anthony; Reagor, Matt; Rubin, Nicholas; Scheer, Michael; Selvanayagam, Michael; Sete, Eyob; Sinclair, Rodney; Smith, Robert; Vahidpour, Mehrnoosh; Villiers, Marius; Zeng, William; Rigetti, Chad

Quantum information processors with five or more qubits are becoming common. Complete, predictive characterization of such devices e.g. via any form of tomography, including gate set tomography appears impossible because the parameter space is intractably large. Randomized benchmarking scales well, but cannot predict device behavior or diagnose failure modes. We introduce a new type of gate set tomography that uses an efficient ansatz to model physically plausible errors, but scales polynomially with the number of qubits. We will describe the theory behind this multi-qubit tomography and present experimental results from using it to characterize a multi-qubit processor made by Rigetti Quantum Computing. Sandia National Laboratories is a multi-mission laboratory managed and operated by Sandia Corporation, a wholly owned subsidary of Lockheed Martin Corporation, for the US Department of Energy's NNSA under contract DE-AC04-94AL85000.

Chaotic logic gate: A new approach in set and design by genetic algorithm

International Nuclear Information System (INIS)

Beyki, Mahmood; Yaghoobi, Mahdi

2015-01-01

How to reconfigure a logic gate is an attractive subject for different applications. Chaotic systems can yield a wide variety of patterns and here we use this feature to produce a logic gate. This feature forms the basis for designing a dynamical computing device that can be rapidly reconfigured to become any wanted logical operator. This logic gate that can reconfigure to any logical operator when placed in its chaotic state is called chaotic logic gate. The reconfiguration realize by setting the parameter values of chaotic logic gate. In this paper we present mechanisms about how to produce a logic gate based on the logistic map in its chaotic state and genetic algorithm is used to set the parameter values. We use three well-known selection methods used in genetic algorithm: tournament selection, Roulette wheel selection and random selection. The results show the tournament selection method is the best method for set the parameter values. Further, genetic algorithm is a powerful tool to set the parameter values of chaotic logic gate

Strain-Gated Field Effect Transistor of a MoS2-ZnO 2D-1D Hybrid Structure.

Science.gov (United States)

Chen, Libo; Xue, Fei; Li, Xiaohui; Huang, Xin; Wang, Longfei; Kou, Jinzong; Wang, Zhong Lin

2016-01-26

Two-dimensional (2D) molybdenum disulfide (MoS2) is an exciting material due to its unique electrical, optical, and piezoelectric properties. Owing to an intrinsic band gap of 1.2-1.9 eV, monolayer or a-few-layer MoS2 is used for fabricating field effect transistors (FETs) with high electron mobility and on/off ratio. However, the traditional FETs are controlled by an externally supplied gate voltage, which may not be sensitive enough to directly interface with a mechanical stimulus for applications in electronic skin. Here we report a type of top-pressure/force-gated field effect transistors (PGFETs) based on a hybrid structure of a 2D MoS2 flake and 1D ZnO nanowire (NW) array. Once an external pressure is applied, the piezoelectric polarization charges created at the tips of ZnO NWs grown on MoS2 act as a gate voltage to tune/control the source-drain transport property in MoS2. At a 6.25 MPa applied stimulus on a packaged device, the source-drain current can be tuned for ∼25%, equivalent to the results of applying an extra -5 V back gate voltage. Another type of PGFET with a dielectric layer (Al2O3) sandwiched between MoS2 and ZnO also shows consistent results. A theoretical model is proposed to interpret the received data. This study sets the foundation for applying the 2D material-based FETs in the field of artificial intelligence.

Fat supplementation ("Flushing" on the postpartum beef cows submitted to early weaning: performance Suplementação com gordura ("Flushing" para vacas de corte no pós-parto submetidas ao desmame precoce: desempenho animal

Directory of Open Access Journals (Sweden)

José Luiz Moletta

2008-06-01

Full Text Available The effects of short-time fat supplementation flushing on animal performance (final body weight and average daily gain of postpartum beef cows, submitted to the early weaning were evaluatrd. Two hundred and fifty eight beef cows from the following genetic groups were used: Aberdeen Angus (n = 21, Aberdeen Angus x Canchim (n = 20, Canchim x Aberdeen Angus (n = 52, Charoles x Caracu (n = 29, Charolês (n = 18, Cachim (n = 34, Caracu (n = 35, Caracu x Charoles (n = 26 and Purunã (n = 23, with 418.1±14.0 kg of body weight and pregnant. These animals were split into two treatments: flushing (30% soybean grain + 70% corn ground grain and without supplementation. There was no flushing effect on final body weight (436.6 kg and average daily gain (0.83 kg. November period, cows had higher final body weight (441.6 kg and average daily gain (1.01 kg. There was no effect of flushing on variables.O objetivou-se, neste experimento, avaliar o efeito da suplementação de gordura por um curto período de tempo (flushing sobre o desempenho animal (peso vivo final e ganho médio diário de fêmeas de corte no pós-parto, submetidas ao desmame precoce. Foram utilizadas 258 vacas, dos grupos genéticos: Aberdeen Angus (n = 21, Aberdeen Angus x Canchim (n = 20, Canchim x Aberdeen Angus (n = 52, Charolês x Caracu (n = 29, Charolês (n = 18, Cachim (n = 34, Caracu (n = 35, Caracu x Charolês (n = 26 e Purunã (n = 23, com peso vivo médio de 418,1±14,0 kg e diagnóstico de prenhez positivo. Os animais foram distribuídos nos tratamentos flushing (30% de grão de soja + 70% de milho grão moído e não suplementados. Foram avaliados três períodos de acordo com a ordem de parição: setembro, outubro e novembro. Não houve efeito do flushing sobre o peso vivo final (436,6 kg e ganho médio diário (0,83 kg. O período de novembro apresentou maior peso vivo final (441,6 kg e ganho médio diário (1,01 kg. O fornecimento de gordura (flushing para fêmeas de corte no

A versatile LabVIEW and field-programmable gate array-based scanning probe microscope for in operando electronic device characterization.

Science.gov (United States)

Berger, Andrew J; Page, Michael R; Jacob, Jan; Young, Justin R; Lewis, Jim; Wenzel, Lothar; Bhallamudi, Vidya P; Johnston-Halperin, Ezekiel; Pelekhov, Denis V; Hammel, P Chris

2014-12-01

Understanding the complex properties of electronic and spintronic devices at the micro- and nano-scale is a topic of intense current interest as it becomes increasingly important for scientific progress and technological applications. In operando characterization of such devices by scanning probe techniques is particularly well-suited for the microscopic study of these properties. We have developed a scanning probe microscope (SPM) which is capable of both standard force imaging (atomic, magnetic, electrostatic) and simultaneous electrical transport measurements. We utilize flexible and inexpensive FPGA (field-programmable gate array) hardware and a custom software framework developed in National Instrument's LabVIEW environment to perform the various aspects of microscope operation and device measurement. The FPGA-based approach enables sensitive, real-time cantilever frequency-shift detection. Using this system, we demonstrate electrostatic force microscopy of an electrically biased graphene field-effect transistor device. The combination of SPM and electrical transport also enables imaging of the transport response to a localized perturbation provided by the scanned cantilever tip. Facilitated by the broad presence of LabVIEW in the experimental sciences and the openness of our software solution, our system permits a wide variety of combined scanning and transport measurements by providing standardized interfaces and flexible access to all aspects of a measurement (input and output signals, and processed data). Our system also enables precise control of timing (synchronization of scanning and transport operations) and implementation of sophisticated feedback protocols, and thus should be broadly interesting and useful to practitioners in the field.

An oxide filled extended trench gate super junction MOSFET structure

International Nuclear Information System (INIS)

Cai-Lin, Wang; Jun, Sun

2009-01-01

This paper proposes an oxide filled extended trench gate super junction (SJ) MOSFET structure to meet the need of higher frequency power switches application. Compared with the conventional trench gate SJ MOSFET, new structure has the smaller input and output capacitances, and the remarkable improvements in the breakdown voltage, on-resistance and switching speed. Furthermore, the SJ in the new structure can be realized by the existing trench etching and shallow angle implantation, which offers more freedom to SJ MOSFET device design and fabrication. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Effect of Body Condition Score and Nutritional Flushing on the ...

African Journals Online (AJOL)

pasture or by feeding energy-rich supplements (Johnson, 2001). Nutritional .... Vitamin A,D,E premix. 26.2 ..... Effect of flushing hair sheep ewes during the dry and ... ADSA Foundation Scholar Award, Reproduction loss in high-producing dairy.

Effect of Thermal Budget on the Electrical Characterization of Atomic Layer Deposited HfSiO/TiN Gate Stack MOSCAP Structure.

Directory of Open Access Journals (Sweden)

Z N Khan

Full Text Available Metal Oxide Semiconductor (MOS capacitors (MOSCAP have been instrumental in making CMOS nano-electronics realized for back-to-back technology nodes. High-k gate stacks including the desirable metal gate processing and its integration into CMOS technology remain an active research area projecting the solution to address the requirements of technology roadmaps. Screening, selection and deposition of high-k gate dielectrics, post-deposition thermal processing, choice of metal gate structure and its post-metal deposition annealing are important parameters to optimize the process and possibly address the energy efficiency of CMOS electronics at nano scales. Atomic layer deposition technique is used throughout this work because of its known deposition kinetics resulting in excellent electrical properties and conformal structure of the device. The dynamics of annealing greatly influence the electrical properties of the gate stack and consequently the reliability of the process as well as manufacturable device. Again, the choice of the annealing technique (migration of thermal flux into the layer, time-temperature cycle and sequence are key parameters influencing the device's output characteristics. This work presents a careful selection of annealing process parameters to provide sufficient thermal budget to Si MOSCAP with atomic layer deposited HfSiO high-k gate dielectric and TiN gate metal. The post-process annealing temperatures in the range of 600°C -1000°C with rapid dwell time provide a better trade-off between the desirable performance of Capacitance-Voltage hysteresis and the leakage current. The defect dynamics is thought to be responsible for the evolution of electrical characteristics in this Si MOSCAP structure specifically designed to tune the trade-off at low frequency for device application.

Enhanced Acquisition Rates of 'Candidatus Liberibacter asiaticus' by the Asian Citrus Psyllid (Hemiptera: Liviidae) in the Presence of Vegetative Flush Growth in Citrus.

Science.gov (United States)

Sétamou, Mamoudou; Alabi, Olufemi J; Kunta, Madhurababu; Jifon, John L; da Graça, John V

2016-10-01

The Asian citrus psyllid preferentially feeds and exclusively reproduces on young, newly emerged flush shoots of citrus. Asian citrus psyllid nymphs feed and complete their life stages on these flush shoots. Recent studies conducted under greenhouse conditions have shown that the transmission rates of 'Candidatus Liberibacter asiaticus' (CLas), the putative causal agent of huanglongbing disease of citrus, are enhanced when flush shoots are present. However, it is unclear if CLas acquisition by migrant adult Asian citrus psyllids is similarly enhanced. To address this knowledge gap, cohorts of Asian citrus psyllid adults were allowed 1-wk acquisition access period (AAP) on flushing and nonflushing shoots of qPCR-tested symptomatic (CLas+) and asymptomatic (CLas-) 10-yr-old sweet orange trees under field conditions. After the AAP, they were tested for CLas by qPCR. Progeny Asian citrus psyllid adults that emerged 4 wk post-AAP were similarly retrieved and tested. Eighty percent of flushing and 30% of nonflushing CLas+ trees produced infective Asian citrus psyllid adults, indicating that flush shoots have greater potential to be inoculum sources for CLas acquisition. Concomitantly, 21.1% and 6.0% infective adults were retrieved, respectively, from flushing and nonflushing CLas+ trees, indicating that Asian citrus psyllid adults acquire CLas more efficiently from flush shoots relative to mature shoots. In addition, 12.1% of infective Asian citrus psyllid adult progeny were obtained from 70% of flushing CLas+ trees. Significantly lower mean Ct values were also obtained from infective adults retrieved from flushing relative to nonflushing trees. The results underscore the role of flush shoots in CLas acquisition and the need to protect citrus trees from Asian citrus psyllid infestations during flush cycles. © The Authors 2016. Published by Oxford University Press on behalf of Entomological Society of America. All rights reserved. For Permissions, please email

Radiation-hardened gate-around n-MOSFET structure for radiation-tolerant application-specific integrated circuits

International Nuclear Information System (INIS)

Lee, Min Su; Lee, Hee Chul

2012-01-01

To overcome the total ionizing dose effect on an n-type metal-oxide-semiconductor field-effect transistor (n-MOSFET), we designed a radiation-hardened gate-around n-MOSFET structure and evaluated it through a radiation-exposure experiment. Each test device was fabricated in a commercial 0.35-micron complementary metal-oxide-semiconductor (CMOS) process. The fabricated devices were evaluated under a total dose of 1 Mrad (Si) at a dose rate of 250 krad/h to obtain very high reliability for space electronics. The experimental results showed that the gate-around n-MOSFET structure had very good performance against 1 Mrad (Si) of gamma radiation, while the conventional n-MOSFET experienced a considerable amount of radiation-induced leakage current. Furthermore, a source follower designed with the gate-around transistor worked properly at 1 Mrad (Si) of gamma radiation while a source follower designed with the conventional n-MOSFET lost its functionality.