Reduction and coding of synthetic aperture radar data with Fourier transforms

Science.gov (United States)

Tilley, David G.

1995-01-01

Recently, aboard the Space Radar Laboratory (SRL), the two roles of Fourier Transforms for ocean image synthesis and surface wave analysis have been implemented with a dedicated radar processor to significantly reduce Synthetic Aperture Radar (SAR) ocean data before transmission to the ground. The object was to archive the SAR image spectrum, rather than the SAR image itself, to reduce data volume and capture the essential descriptors of the surface wave field. SAR signal data are usually sampled and coded in the time domain for transmission to the ground where Fourier Transforms are applied both to individual radar pulses and to long sequences of radar pulses to form two-dimensional images. High resolution images of the ocean often contain no striking features and subtle image modulations by wind generated surface waves are only apparent when large ocean regions are studied, with Fourier transforms, to reveal periodic patterns created by wind stress over the surface wave field. Major ocean currents and atmospheric instability in coastal environments are apparent as large scale modulations of SAR imagery. This paper explores the possibility of computing complex Fourier spectrum codes representing SAR images, transmitting the coded spectra to Earth for data archives and creating scenes of surface wave signatures and air-sea interactions via inverse Fourier transformations with ground station processors.

Performance of Distributed CFAR Processors in Pearson Distributed Clutter

OpenAIRE

Messali Zoubeida; Soltani Faouzi

2007-01-01

This paper deals with the distributed constant false alarm rate (CFAR) radar detection of targets embedded in heavy-tailed Pearson distributed clutter. In particular, we extend the results obtained for the cell averaging (CA), order statistics (OS), and censored mean level CMLD CFAR processors operating in positive alpha-stable (P&S) random variables to more general situations, specifically to the presence of interfering targets and distributed CFAR detectors. The receiver operating ...

Distriubted terminal support in a data acquisition system for nuclear research reactors

International Nuclear Information System (INIS)

Shah, R.R.; Capel, A.C.; Pensom, C.F.

1980-01-01

A comprehensive and flexible terminal support facility is being designed to provide the necessary interactive man-machine interface for REDNET, a distriubted data aquisition system for nuclear research reactors. Host processors and a large number of terminals are linked via three physically independent but interconnected terminal support subsystems, which use in-house developed equipment based on cable TV technology. The CCITT X-25 protocol is supported, and virtual circuits are used for communications between terminals and software functions in host processors. This paper presents the requirements and conceptual design of the major terminal support components. (auth)

Development of Radar Control system for Multi-mode Active Phased Array Radar for atmospheric probing

Science.gov (United States)

Yasodha, Polisetti; Jayaraman, Achuthan; Thriveni, A.

2016-07-01

TR modules, (ii) radar operation software which facilitates experimental parameter setting and operating the radar in different modes, (iii) beam steering software which computes the amplitude co-efficients and phases required for each TR module, for forming the beams selected for radar operation with the desired shape and (iv) Calibration software for calibrating the radar by measuring the differential insertion phase and amplitudes in all 1024 Transmit and Receive paths and correcting them. The TR module configuring software is a major task as it needs to control 1024 TR modules, which are located in the field about 150 m away from the RC system in the control room. Each TR module has a processor identified with a dedicated IP address, along with memory to store the instructions and parameters required for radar operation. A communication link is designed using Gigabit Ethernet (GbE) switches to realise 1 to 1024 way switching network. RC system computer communicates with the each processor using its IP address and establishes connection, via 1 to 1024 port GbE switching network. The experimental parameters data are pre-loaded parallely into all the TR modules along with the phase shifter data required for beam steering using this network. A reference timing pulse is sent to all the TR modules simultaneously, which indicates the start of radar operation. RC system also monitors the status parameters from the TR modules indicating their health during radar operation at regular intervals, via GbE switching network. Beam steering software generates the phase shift required for each TR module for the beams selected for operation. Radar operational software calls the phase shift data required for beam steering and adds it to the calibration phase obtained through calibration software and loads the resultant phase data into TR modules. Timed command/data transfer to/from subsystems and synchronisation of subsystems is essential for proper real-time operation of the

A digital beamforming processor for the joint DoD/NASA space based radar mission

Science.gov (United States)

Fischman, Mark A.; Le, Charles; Rosen, Paul A.

2004-01-01

The Space Based Radar (SBR) program includes a joint technology demonstration between NASA and the Air Force to design a low-earth orbiting, 2x50 m L-band radar system for both Earth science and intelligence related observations.

Satellite on-board real-time SAR processor prototype

Science.gov (United States)

Bergeron, Alain; Doucet, Michel; Harnisch, Bernd; Suess, Martin; Marchese, Linda; Bourqui, Pascal; Desnoyers, Nicholas; Legros, Mathieu; Guillot, Ludovic; Mercier, Luc; Châteauneuf, François

2017-11-01

A Compact Real-Time Optronic SAR Processor has been successfully developed and tested up to a Technology Readiness Level of 4 (TRL4), the breadboard validation in a laboratory environment. SAR, or Synthetic Aperture Radar, is an active system allowing day and night imaging independent of the cloud coverage of the planet. The SAR raw data is a set of complex data for range and azimuth, which cannot be compressed. Specifically, for planetary missions and unmanned aerial vehicle (UAV) systems with limited communication data rates this is a clear disadvantage. SAR images are typically processed electronically applying dedicated Fourier transformations. This, however, can also be performed optically in real-time. Originally the first SAR images were optically processed. The optical Fourier processor architecture provides inherent parallel computing capabilities allowing real-time SAR data processing and thus the ability for compression and strongly reduced communication bandwidth requirements for the satellite. SAR signal return data are in general complex data. Both amplitude and phase must be combined optically in the SAR processor for each range and azimuth pixel. Amplitude and phase are generated by dedicated spatial light modulators and superimposed by an optical relay set-up. The spatial light modulators display the full complex raw data information over a two-dimensional format, one for the azimuth and one for the range. Since the entire signal history is displayed at once, the processor operates in parallel yielding real-time performances, i.e. without resulting bottleneck. Processing of both azimuth and range information is performed in a single pass. This paper focuses on the onboard capabilities of the compact optical SAR processor prototype that allows in-orbit processing of SAR images. Examples of processed ENVISAT ASAR images are presented. Various SAR processor parameters such as processing capabilities, image quality (point target analysis), weight and

Code compression for VLIW embedded processors

Science.gov (United States)

Piccinelli, Emiliano; Sannino, Roberto

2004-04-01

The implementation of processors for embedded systems implies various issues: main constraints are cost, power dissipation and die area. On the other side, new terminals perform functions that require more computational flexibility and effort. Long code streams must be loaded into memories, which are expensive and power consuming, to run on DSPs or CPUs. To overcome this issue, the "SlimCode" proprietary algorithm presented in this paper (patent pending technology) can reduce the dimensions of the program memory. It can run offline and work directly on the binary code the compiler generates, by compressing it and creating a new binary file, about 40% smaller than the original one, to be loaded into the program memory of the processor. The decompression unit will be a small ASIC, placed between the Memory Controller and the System bus of the processor, keeping unchanged the internal CPU architecture: this implies that the methodology is completely transparent to the core. We present comparisons versus the state-of-the-art IBM Codepack algorithm, along with its architectural implementation into the ST200 VLIW family core.

A soft-core processor architecture optimised for radar signal processing applications

CSIR Research Space (South Africa)

Broich, R

2013-12-01

Full Text Available -performance soft-core processing architecture is proposed. To develop such a processing architecture, data and signal-flow characteristics of common radar signal processing algorithms are analysed. Each algorithm is broken down into signal processing...

Millimeter wave radars raise weapon IQ

Science.gov (United States)

Lerner, E. J.

1985-02-01

The problems encountered by laser and IR homing devices for guided munitions may be tractable with warhead-mounted mm-wave radars. Operating at about 100 GHz and having several kilometers range, mm-wave radars see through darkness, fog, rain and smoke. The radar must be coupled with an analyzer that discerns moving and stationary targets and higher priority targets. The target lock-on can include shut-off of the transmitter and reception of naturally-generated mm-waves bouncing off the target when in the terminal phase of the flight. Monopulse transmitters have simplified the radar design, although mass production of finline small radar units has yet to be accomplished, particularly in combining GaAs, ferrites and other materials on one monolithic chip.

Commercially Available Low Probability of Intercept Radars and Non-Cooperative ELINT Receiver Capabilities

Science.gov (United States)

2014-09-01

3D Antenna Gain 0 dB Azimuth Accuracy 20°/quadrant 52 51. ELT/750 Receiver Figure 51: ELT/750 Receiver/processor...71]) The Itata ELINT system has been developed by Desarrollo de Tecnologia y Sistemas (DTS) Ltd. and is a high-sensitivity electronic... 3D Long Range Surveillance Radar. [Online]. Available: https://www.thalesgroup.com/en/worldwide/defence/smart-l- 3d - long-range-surveillance-radar

Performance of Distributed CFAR Processors in Pearson Distributed Clutter

Directory of Open Access Journals (Sweden)

Messali Zoubeida

2007-01-01

Full Text Available This paper deals with the distributed constant false alarm rate (CFAR radar detection of targets embedded in heavy-tailed Pearson distributed clutter. In particular, we extend the results obtained for the cell averaging (CA, order statistics (OS, and censored mean level CMLD CFAR processors operating in positive alpha-stable (P&S random variables to more general situations, specifically to the presence of interfering targets and distributed CFAR detectors. The receiver operating characteristics of the greatest of (GO and the smallest of (SO CFAR processors are also determined. The performance characteristics of distributed systems are presented and compared in both homogeneous and in presence of interfering targets. We demonstrate, via simulation results, that the distributed systems when the clutter is modelled as positive alpha-stable distribution offer robustness properties against multiple target situations especially when using the "OR" fusion rule.

Performance of Distributed CFAR Processors in Pearson Distributed Clutter

Directory of Open Access Journals (Sweden)

Faouzi Soltani

2007-01-01

Full Text Available This paper deals with the distributed constant false alarm rate (CFAR radar detection of targets embedded in heavy-tailed Pearson distributed clutter. In particular, we extend the results obtained for the cell averaging (CA, order statistics (OS, and censored mean level CMLD CFAR processors operating in positive alpha-stable (P&S random variables to more general situations, specifically to the presence of interfering targets and distributed CFAR detectors. The receiver operating characteristics of the greatest of (GO and the smallest of (SO CFAR processors are also determined. The performance characteristics of distributed systems are presented and compared in both homogeneous and in presence of interfering targets. We demonstrate, via simulation results, that the distributed systems when the clutter is modelled as positive alpha-stable distribution offer robustness properties against multiple target situations especially when using the “OR” fusion rule.

Radar Target Classification using Recursive Knowledge-Based Methods

DEFF Research Database (Denmark)

Jochumsen, Lars Wurtz

The topic of this thesis is target classification of radar tracks from a 2D mechanically scanning coastal surveillance radar. The measurements provided by the radar are position data and therefore the classification is mainly based on kinematic data, which is deduced from the position. The target...... been terminated. Therefore, an update of the classification results must be made for each measurement of the target. The data for this work are collected throughout the PhD and are both collected from radars and other sensors such as GPS....

Low Power CMOS Circuit Techniques for Optical Interconnects and High Speed Pulse Compression Radar

OpenAIRE

Li, Jun

2015-01-01

High performance computing and high resolution range sensor motivates the intelligent system innovations such as smart car, smart home/community and 3D motion games. Most importantly, 3D graphics technique requires high performance computation to provide high quality and vivid real-time videos. Accurate motion sensing requires high resolution radar sensor. However, in general, data transmission limits the large scale computation while high resolution radar signal processor limits the detectio...

Moving Target Detection With Compact Laser Doppler Radar

Science.gov (United States)

Sepp, G.; Breining, A.; Eisfeld, W.; Knopp, R.; Lill, E.; Wagner, D.

1989-12-01

This paper describes an experimental integrated optronic system for detection and tracking of moving objects. The system is based on a CO2 waveguide laser Doppler ra-dar with homodyne receiver and galvanometer mirror beam scanner. A "hot spot" seeker consisting of a thermal imager with image processor transmits the coordinates of IR-emitting, i.e. potentially powered, objects to the laser radar scanner. The scanner addresses these "hot" locations operating in a large field-of-view (FOV) random ac-cess mode. Hot spots exhibiting a Doppler shifted laser signal are indicated in the thermal image by velocity-to-colour encoded markers. After switching to a small FOV scanning mode, the laser Doppler radar is used to track fast moving objects. Labora-tory and field experiments with moving objects including rotating discs, automobiles and missiles are described.

The hardware track finder processor in CMS at CERN

CERN Document Server

Kluge, A

1997-01-01

The work covers the design of the Track Finder Processor in the high energy experiment CMS (Compact Muon Solenoid, planned for 2005) at CERN/Geneva. The task of this processor is to identify muons and measure their transverse momentum. The track finder processor makes it possible to determine the physical relevance of each high energetic collision and to forward only interesting data to the data an alysis units. Data of more than two hundred thousand detector cells are used to determine the location of muons and measure their transverse momentum. Each 25 ns a new data set is generated. Measurem ent of location and transverse momentum of the muons can be terminated within 350 ns by using an ASIC (Application Specific Integrated Circuit). A pipeline architecture processes new data sets with th e required data rate of 40 MHz to ensure dead time free operation. In the framework of this study specifications and the overall concept of the track finder processor were worked out in detail. Simul ations were performed...

Development of Ethernet Based Remote Monitoring and Controlling of MST Radar Transmitters using ARM Cortex Microcontroller

Directory of Open Access Journals (Sweden)

Lakshmi Narayana ROSHANNA

2013-01-01

Full Text Available The recently emerging Web Services technology has provided a new and excellent solution to Industrial Automation in online control and remote monitoring. In this paper, a Web Service Based Remote Monitoring & Controlling of Radar Transmitters for safety management (WMCT developed for MST Radar is described. It achieved the MST radar transmitters’ remote supervisory, data logging and controlling activities. The system is developed using an ARM Cortex M3 processor to monitor and control the 32 triode-based transmitters of the 53-MHz Radar. The system controls transmitters via the internet using an Ethernet client server and store health status in the Database for radar performance analysis. The system enables scientists to operate and control the radar transmitters from a remote client machine Webpage.

Architecture for a 1-GHz Digital RADAR

Science.gov (United States)

Mallik, Udayan

2011-01-01

An architecture for a Direct RF-digitization Type Digital Mode RADAR was developed at GSFC in 2008. Two variations of a basic architecture were developed for use on RADAR imaging missions using aircraft and spacecraft. Both systems can operate with a pulse repetition rate up to 10 MHz with 8 received RF samples per pulse repetition interval, or at up to 19 kHz with 4K received RF samples per pulse repetition interval. The first design describes a computer architecture for a Continuous Mode RADAR transceiver with a real-time signal processing and display architecture. The architecture can operate at a high pulse repetition rate without interruption for an infinite amount of time. The second design describes a smaller and less costly burst mode RADAR that can transceive high pulse repetition rate RF signals without interruption for up to 37 seconds. The burst-mode RADAR was designed to operate on an off-line signal processing paradigm. The temporal distribution of RF samples acquired and reported to the RADAR processor remains uniform and free of distortion in both proposed architectures. The majority of the RADAR's electronics is implemented in digital CMOS (complementary metal oxide semiconductor), and analog circuits are restricted to signal amplification operations and analog to digital conversion. An implementation of the proposed systems will create a 1-GHz, Direct RF-digitization Type, L-Band Digital RADAR--the highest band achievable for Nyquist Rate, Direct RF-digitization Systems that do not implement an electronic IF downsample stage (after the receiver signal amplification stage), using commercially available off-the-shelf integrated circuits.

Movement and respiration detection using statistical properties of the FMCW radar signal

KAUST Repository

Kiuru, Tero

2016-07-26

This paper presents a 24 GHz FMCW radar system for detection of movement and respiration using change in the statistical properties of the received radar signal, both amplitude and phase. We present the hardware and software segments of the radar system as well as algorithms with measurement results for two distinct use-cases: 1. FMCW radar as a respiration monitor and 2. a dual-use of the same radar system for smart lighting and intrusion detection. By using change in statistical properties of the signal for detection, several system parameters can be relaxed, including, for example, pulse repetition rate, power consumption, computational load, processor speed, and memory space. We will also demonstrate, that the capability to switch between received signal strength and phase difference enables dual-use cases with one requiring extreme sensitivity to movement and the other robustness against small sources of interference. © 2016 IEEE.

Emergency product generation for disaster management using RISAT and DMSAR quick look SAR processors

Science.gov (United States)

Desai, Nilesh; Sharma, Ritesh; Kumar, Saravana; Misra, Tapan; Gujraty, Virendra; Rana, SurinderSingh

2006-12-01

Since last few years, ISRO has embarked upon the development of two complex Synthetic Aperture Radar (SAR) missions, viz. Spaceborne Radar Imaging Satellite (RISAT) and Airborne SAR for Disaster Mangement (DMSAR), as a capacity building measure under country's Disaster Management Support (DMS) Program, for estimating the extent of damage over large areas (~75 Km) and also assess the effectiveness of the relief measures undertaken during natural disasters such as cyclones, epidemics, earthquakes, floods and landslides, forest fires, crop diseases etc. Synthetic Aperture Radar (SAR) has an unique role to play in mapping and monitoring of large areas affected by natural disasters especially floods, owing to its unique capability to see through clouds as well as all-weather imaging capability. The generation of SAR images with quick turn around time is very essential to meet the above DMS objectives. Thus the development of SAR Processors, for these two SAR systems poses considerable challenges and design efforts. Considering the growing user demand and inevitable necessity for a full-fledged high throughput processor, to process SAR data and generate image in real or near-real time, the design and development of a generic SAR Processor has been taken up and evolved, which will meet the SAR processing requirements for both Airborne and Spaceborne SAR systems. This hardware SAR processor is being built, to the extent possible, using only Commercial-Off-The-Shelf (COTS) DSP and other hardware plug-in modules on a Compact PCI (cPCI) platform. Thus, the major thrust has been on working out Multi-processor Digital Signal Processor (DSP) architecture and algorithm development and optimization rather than hardware design and fabrication. For DMSAR, this generic SAR Processor operates as a Quick Look SAR Processor (QLP) on-board the aircraft to produce real time full swath DMSAR images and as a ground based Near-Real Time high precision full swath Processor (NRTP). It will

High-Level Design for Ultra-Fast Software Defined Radio Prototyping on Multi-Processors Heterogeneous Platforms

OpenAIRE

Moy , Christophe; Raulet , Mickaël

2010-01-01

International audience; The design of Software Defined Radio (SDR) equipments (terminals, base stations, etc.) is still very challenging. We propose here a design methodology for ultra-fast prototyping on heterogeneous platforms made of GPPs (General Purpose Processors), DSPs (Digital Signal Processors) and FPGAs (Field Programmable Gate Array). Lying on a component-based approach, the methodology mainly aims at automating as much as possible the design from an algorithmic validation to a mul...

The Status of the ACRF Millimeter Wave Cloud Radars (MMCRs), the Path Forward for Future MMCR Upgrades, the Concept of 3D Volume Imaging Radar and the UAV Radar

Energy Technology Data Exchange (ETDEWEB)

P Kollias; MA Miller; KB Widener; RT Marchand; TP Ackerman

2005-12-30

The United States (U.S.) Department of Energy (DOE) Atmospheric Radiation Measurement (ARM) Climate Research Facility (ACRF) operates millimeter wavelength cloud radars (MMCRs) in several climatological regimes. The MMCRs, are the primary observing tool for quantifying the properties of nearly all radiatively important clouds over the ACRF sites. The first MMCR was installed at the ACRF Southern Great Plains (SGP) site nine years ago and its original design can be traced to the early 90s. Since then, several MMCRs have been deployed at the ACRF sites, while no significant hardware upgrades have been performed. Recently, a two-stage upgrade (first C-40 Digital Signal Processors [DSP]-based, and later the PC-Integrated Radar AcQuisition System [PIRAQ-III] digital receiver) of the MMCR signal-processing units was completed. Our future MMCR related goals are: 1) to have a cloud radar system that continues to have high reliability and uptime and 2) to suggest potential improvements that will address increased sensitivity needs, superior sampling and low cost maintenance of the MMCRs. The Traveling Wave Tube (TWT) technology, the frequency (35-GHz), the radio frequency (RF) layout, antenna, the calibration and radar control procedure and the environmental enclosure of the MMCR remain assets for our ability to detect the profile of hydrometeors at all heights in the troposphere at the ACRF sites.

Design of an Ultra-wideband Pseudo Random Coded MIMO Radar Based on Radio Frequency Switches

Directory of Open Access Journals (Sweden)

Su Hai

2017-02-01

Full Text Available A Multiple-Input Multiple-Output (MIMO ultra-wideband radar can detect the range and azimuth information of targets in real time. It is widely used for geological surveys, life rescue, through-wall tracking, and other military or civil fields. This paper presents the design of an ultra-wideband pseudo random coded MIMO radar that is based on Radio Frequency (RF switches and implements a MIMO radar system. RF switches are employed to reduce cost and complexity of the system. As the switch pressure value is limited, the peak power of the transmitting signal is 18 dBm. The ultra-wideband radar echo is obtained by hybrid sampling, and pulse compression is computed by Digital Signal Processors (DSPs embedded in an Field-Programmable Gate Array (FPGA to simplify the signal process. The experiment illustrates that the radar system can detect the range and azimuth information of targets in real time.

Evaluation of the Sentinel-3 Hydrologic Altimetry Processor prototypE (SHAPE) methods.

Science.gov (United States)

Benveniste, J.; Garcia-Mondéjar, A.; Bercher, N.; Fabry, P. L.; Roca, M.; Varona, E.; Fernandes, J.; Lazaro, C.; Vieira, T.; David, G.; Restano, M.; Ambrózio, A.

2017-12-01

Inland water scenes are highly variable, both in space and time, which leads to a much broader range of radar signatures than ocean surfaces. This applies to both LRM and "SAR" mode (SARM) altimetry. Nevertheless the enhanced along-track resolution of SARM altimeters should help improve the accuracy and precision of inland water height measurements from satellite. The SHAPE project - Sentinel-3 Hydrologic Altimetry Processor prototypE - which is funded by ESA through the Scientific Exploitation of Operational Missions Programme Element (contract number 4000115205/15/I-BG) aims at preparing for the exploitation of Sentinel-3 data over the inland water domain. The SHAPE Processor implements all of the steps necessary to derive rivers and lakes water levels and discharge from Delay-Doppler Altimetry and perform their validation against in situ data. The processor uses FBR CryoSat-2 and L1A Sentinel-3A data as input and also various ancillary data (proc. param., water masks, L2 corrections, etc.), to produce surface water levels. At a later stage, water level data are assimilated into hydrological models to derive river discharge. This poster presents the improvements obtained with the new methods and algorithms over the regions of interest (Amazon and Danube rivers, Vanern and Titicaca lakes).

Enhanced tactical radar correlator (ETRAC): true interoperability of the 1990s

Science.gov (United States)

Guillen, Frank J.

1994-10-01

The enhanced tactical radar correlator (ETRAC) system is under development at Westinghouse Electric Corporation for the Army Space Program Office (ASPO). ETRAC is a real-time synthetic aperture radar (SAR) processing system that provides tactical IMINT to the corps commander. It features an open architecture comprised of ruggedized commercial-off-the-shelf (COTS), UNIX based workstations and processors. The architecture features the DoD common SAR processor (CSP), a multisensor computing platform to accommodate a variety of current and future imaging needs. ETRAC's principal functions include: (1) Mission planning and control -- ETRAC provides mission planning and control for the U-2R and ASARS-2 sensor, including capability for auto replanning, retasking, and immediate spot. (2) Image formation -- the image formation processor (IFP) provides the CPU intensive processing capability to produce real-time imagery for all ASARS imaging modes of operation. (3) Image exploitation -- two exploitation workstations are provided for first-phase image exploitation, manipulation, and annotation. Products include INTEL reports, annotated NITF SID imagery, high resolution hard copy prints and targeting data. ETRAC is transportable via two C-130 aircraft, with autonomous drive on/off capability for high mobility. Other autonomous capabilities include rapid setup/tear down, extended stand-alone support, internal environmental control units (ECUs) and power generation. ETRAC's mission is to provide the Army field commander with accurate, reliable, and timely imagery intelligence derived from collections made by the ASARS-2 sensor, located on-board the U-2R aircraft. To accomplish this mission, ETRAC receives video phase history (VPH) directly from the U-2R aircraft and converts it in real time into soft copy imagery for immediate exploitation and dissemination to the tactical users.

Array processor architecture

Science.gov (United States)

Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)

1983-01-01

A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction. Even when functioning in the parallel processing mode however, the processors are not locked-step but execute their own copy of the program individually unless or until another overall processor array synchronization instruction is issued.

Green Secure Processors: Towards Power-Efficient Secure Processor Design

Science.gov (United States)

Chhabra, Siddhartha; Solihin, Yan

With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the software stack of a system, hardware attacks have become equally likely. Researchers have proposed Secure Processor Architectures which utilize hardware mechanisms for memory encryption and integrity verification to protect the confidentiality and integrity of data and computation, even from sophisticated hardware attacks. While there have been many works addressing performance and other system level issues in secure processor design, power issues have largely been ignored. In this paper, we first analyze the sources of power (energy) increase in different secure processor architectures. We then present a power analysis of various secure processor architectures in terms of their increase in power consumption over a base system with no protection and then provide recommendations for designs that offer the best balance between performance and power without compromising security. We extend our study to the embedded domain as well. We also outline the design of a novel hybrid cryptographic engine that can be used to minimize the power consumption for a secure processor. We believe that if secure processors are to be adopted in future systems (general purpose or embedded), it is critically important that power issues are considered in addition to performance and other system level issues. To the best of our knowledge, this is the first work to examine the power implications of providing hardware mechanisms for security.

Design and Implementation of a FPGA and DSP Based MIMO Radar Imaging System

Directory of Open Access Journals (Sweden)

Wei Wang

2015-06-01

Full Text Available The work presented in this paper is aimed at the implementation of a real-time multiple-input multiple-output (MIMO imaging radar used for area surveillance. In this radar, the equivalent virtual array method and time-division technique are applied to make 16 virtual elements synthesized from the MIMO antenna array. The chirp signal generater is based on a combination of direct digital synthesizer (DDS and phase locked loop (PLL. A signal conditioning circuit is used to deal with the coupling effect within the array. The signal processing platform is based on an efficient field programmable gates array (FPGA and digital signal processor (DSP pipeline where a robust beamforming imaging algorithm is running on. The radar system was evaluated through a real field experiment. Imaging capability and real-time performance shown in the results demonstrate the practical feasibility of the implementation.

Probabilistic programmable quantum processors

International Nuclear Information System (INIS)

Buzek, V.; Ziman, M.; Hillery, M.

2004-01-01

We analyze how to improve performance of probabilistic programmable quantum processors. We show how the probability of success of the probabilistic processor can be enhanced by using the processor in loops. In addition, we show that an arbitrary SU(2) transformations of qubits can be encoded in program state of a universal programmable probabilistic quantum processor. The probability of success of this processor can be enhanced by a systematic correction of errors via conditional loops. Finally, we show that all our results can be generalized also for qudits. (Abstract Copyright [2004], Wiley Periodicals, Inc.)

Comparison of Processor Performance of SPECint2006 Benchmarks of some Intel Xeon Processors

OpenAIRE

Abdul Kareem PARCHUR; Ram Asaray SINGH

2012-01-01

High performance is a critical requirement to all microprocessors manufacturers. The present paper describes the comparison of performance in two main Intel Xeon series processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310). The microarchitecture of these processors is implemented using the basis of a new family of processors from Intel starting with the Pentium 4 processor. These processors can provide a performance boost for many ke...

The LASS hardware processor

International Nuclear Information System (INIS)

Kunz, P.F.

1976-01-01

The problems of data analysis with hardware processors are reviewed and a description is given of a programmable processor. This processor, the 168/E, has been designed for use in the LASS multi-processor system; it has an execution speed comparable to the IBM 370/168 and uses the subset of IBM 370 instructions appropriate to the LASS analysis task. (Auth.)

Radar-to-Radar Interference Suppression for Distributed Radar Sensor Networks

Directory of Open Access Journals (Sweden)

Wen-Qin Wang

2014-01-01

Full Text Available Radar sensor networks, including bi- and multi-static radars, provide several operational advantages, like reduced vulnerability, good system flexibility and an increased radar cross-section. However, radar-to-radar interference suppression is a major problem in distributed radar sensor networks. In this paper, we present a cross-matched filtering-based radar-to-radar interference suppression algorithm. This algorithm first uses an iterative filtering algorithm to suppress the radar-to-radar interferences and, then, separately matched filtering for each radar. Besides the detailed algorithm derivation, extensive numerical simulation examples are performed with the down-chirp and up-chirp waveforms, partially overlapped or inverse chirp rate linearly frequency modulation (LFM waveforms and orthogonal frequency division multiplexing (ODFM chirp diverse waveforms. The effectiveness of the algorithm is verified by the simulation results.

Comparison of Processor Performance of SPECint2006 Benchmarks of some Intel Xeon Processors

Directory of Open Access Journals (Sweden)

Abdul Kareem PARCHUR

2012-08-01

Full Text Available High performance is a critical requirement to all microprocessors manufacturers. The present paper describes the comparison of performance in two main Intel Xeon series processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310. The microarchitecture of these processors is implemented using the basis of a new family of processors from Intel starting with the Pentium 4 processor. These processors can provide a performance boost for many key application areas in modern generation. The scaling of performance in two major series of Intel Xeon processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310 has been analyzed using the performance numbers of 12 CPU2006 integer benchmarks, performance numbers that exhibit significant differences in performance. The results and analysis can be used by performance engineers, scientists and developers to better understand the performance scaling in modern generation processors.

Simulation of a parallel processor on a serial processor: The neutron diffusion equation

International Nuclear Information System (INIS)

Honeck, H.C.

1981-01-01

Parallel processors could provide the nuclear industry with very high computing power at a very moderate cost. Will we be able to make effective use of this power. This paper explores the use of a very simple parallel processor for solving the neutron diffusion equation to predict power distributions in a nuclear reactor. We first describe a simple parallel processor and estimate its theoretical performance based on the current hardware technology. Next, we show how the parallel processor could be used to solve the neutron diffusion equation. We then present the results of some simulations of a parallel processor run on a serial processor and measure some of the expected inefficiencies. Finally we extrapolate the results to estimate how actual design codes would perform. We find that the standard numerical methods for solving the neutron diffusion equation are still applicable when used on a parallel processor. However, some simple modifications to these methods will be necessary if we are to achieve the full power of these new computers. (orig.) [de

Development of Softcore Processor based RTU for FBR

International Nuclear Information System (INIS)

Gour, Aditya; Santhana Raj, A.; Behera, R.P.; Murali, N.; Swaminathan, P.

2010-01-01

Remote Terminal Units (RTU) are used to acquire analog/digital signals and generate potential free contact outputs and send the acquired data through LAN. The aim of this design is to develop a Soft-Core Processor based RTU by implementing the glue logic along with 8051 microcontroller present in existing RTUs into a single FPGA, so that component count and power consumption on the board will be reduced and thereby achieving a higher reliability than before. Implementation of glue logic was done using VHDL and Altium's TSK51 Softcore was used in place of 8051 microcontroller. (author)

Functional unit for a processor

NARCIS (Netherlands)

Rohani, A.; Kerkhoff, Hans G.

2013-01-01

The invention relates to a functional unit for a processor, such as a Very Large Instruction Word Processor. The invention further relates to a processor comprising at least one such functional unit. The invention further relates to a functional unit and processor capable of mitigating the effect of

Fpga based L-band pulse doppler radar design and implementation

Science.gov (United States)

Savci, Kubilay

As its name implies RADAR (Radio Detection and Ranging) is an electromagnetic sensor used for detection and locating targets from their return signals. Radar systems propagate electromagnetic energy, from the antenna which is in part intercepted by an object. Objects reradiate a portion of energy which is captured by the radar receiver. The received signal is then processed for information extraction. Radar systems are widely used for surveillance, air security, navigation, weather hazard detection, as well as remote sensing applications. In this work, an FPGA based L-band Pulse Doppler radar prototype, which is used for target detection, localization and velocity calculation has been built and a general-purpose Pulse Doppler radar processor has been developed. This radar is a ground based stationary monopulse radar, which transmits a short pulse with a certain pulse repetition frequency (PRF). Return signals from the target are processed and information about their location and velocity is extracted. Discrete components are used for the transmitter and receiver chain. The hardware solution is based on Xilinx Virtex-6 ML605 FPGA board, responsible for the control of the radar system and the digital signal processing of the received signal, which involves Constant False Alarm Rate (CFAR) detection and Pulse Doppler processing. The algorithm is implemented in MATLAB/SIMULINK using the Xilinx System Generator for DSP tool. The field programmable gate arrays (FPGA) implementation of the radar system provides the flexibility of changing parameters such as the PRF and pulse length therefore it can be used with different radar configurations as well. A VHDL design has been developed for 1Gbit Ethernet connection to transfer digitized return signal and detection results to PC. An A-Scope software has been developed with C# programming language to display time domain radar signals and detection results on PC. Data are processed both in FPGA chip and on PC. FPGA uses fixed

Adaptive signal processor

Energy Technology Data Exchange (ETDEWEB)

Walz, H.V.

1980-07-01

An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 ..mu..sec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed.

Adaptive signal processor

International Nuclear Information System (INIS)

Walz, H.V.

1980-07-01

An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 μsec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed

Multithreading in vector processors

Science.gov (United States)

Evangelinos, Constantinos; Kim, Changhoan; Nair, Ravi

2018-01-16

In one embodiment, a system includes a processor having a vector processing mode and a multithreading mode. The processor is configured to operate on one thread per cycle in the multithreading mode. The processor includes a program counter register having a plurality of program counters, and the program counter register is vectorized. Each program counter in the program counter register represents a distinct corresponding thread of a plurality of threads. The processor is configured to execute the plurality of threads by activating the plurality of program counters in a round robin cycle.

Dual-core Itanium Processor

CERN Multimedia

2006-01-01

Intel’s first dual-core Itanium processor, code-named "Montecito" is a major release of Intel's Itanium 2 Processor Family, which implements the Intel Itanium architecture on a dual-core processor with two cores per die (integrated circuit). Itanium 2 is much more powerful than its predecessor. It has lower power consumption and thermal dissipation.

Experiment in Onboard Synthetic Aperture Radar Data Processing

Science.gov (United States)

Holland, Matthew

2011-01-01

Single event upsets (SEUs) are a threat to any computing system running on hardware that has not been physically radiation hardened. In addition to mandating the use of performance-limited, hardened heritage equipment, prior techniques for dealing with the SEU problem often involved hardware-based error detection and correction (EDAC). With limited computing resources, software- based EDAC, or any more elaborate recovery methods, were often not feasible. Synthetic aperture radars (SARs), when operated in the space environment, are interesting due to their relevance to NASAs objectives, but problematic in the sense of producing prodigious amounts of raw data. Prior implementations of the SAR data processing algorithm have been too slow, too computationally intensive, and require too much application memory for onboard execution to be a realistic option when using the type of heritage processing technology described above. This standard C-language implementation of SAR data processing is distributed over many cores of a Tilera Multicore Processor, and employs novel Radiation Hardening by Software (RHBS) techniques designed to protect the component processes (one per core) and their shared application memory from the sort of SEUs expected in the space environment. The source code includes calls to Tilera APIs, and a specialized Tilera compiler is required to produce a Tilera executable. The compiled application reads input data describing the position and orientation of a radar platform, as well as its radar-burst data, over time and writes out processed data in a form that is useful for analysis of the radar observations.

3081/E processor

International Nuclear Information System (INIS)

Kunz, P.F.; Gravina, M.; Oxoby, G.

1984-04-01

The 3081/E project was formed to prepare a much improved IBM mainframe emulator for the future. Its design is based on a large amount of experience in using the 168/E processor to increase available CPU power in both online and offline environments. The processor will be at least equal to the execution speed of a 370/168 and up to 1.5 times faster for heavy floating point code. A single processor will thus be at least four times more powerful than the VAX 11/780, and five processors on a system would equal at least the performance of the IBM 3081K. With its large memory space and simple but flexible high speed interface, the 3081/E is well suited for the online and offline needs of high energy physics in the future

Integrated fuel processor development

International Nuclear Information System (INIS)

Ahmed, S.; Pereira, C.; Lee, S. H. D.; Krumpelt, M.

2001-01-01

The Department of Energy's Office of Advanced Automotive Technologies has been supporting the development of fuel-flexible fuel processors at Argonne National Laboratory. These fuel processors will enable fuel cell vehicles to operate on fuels available through the existing infrastructure. The constraints of on-board space and weight require that these fuel processors be designed to be compact and lightweight, while meeting the performance targets for efficiency and gas quality needed for the fuel cell. This paper discusses the performance of a prototype fuel processor that has been designed and fabricated to operate with liquid fuels, such as gasoline, ethanol, methanol, etc. Rated for a capacity of 10 kWe (one-fifth of that needed for a car), the prototype fuel processor integrates the unit operations (vaporization, heat exchange, etc.) and processes (reforming, water-gas shift, preferential oxidation reactions, etc.) necessary to produce the hydrogen-rich gas (reformate) that will fuel the polymer electrolyte fuel cell stacks. The fuel processor work is being complemented by analytical and fundamental research. With the ultimate objective of meeting on-board fuel processor goals, these studies include: modeling fuel cell systems to identify design and operating features; evaluating alternative fuel processing options; and developing appropriate catalysts and materials. Issues and outstanding challenges that need to be overcome in order to develop practical, on-board devices are discussed

The hardware track finder processor in CMS at CERN

International Nuclear Information System (INIS)

Kluge, A.

1997-07-01

The work covers the design of the Track Finder Processor in the high energy experiment CMS at CERN/Geneva. The task of this processor is to identify muons and to measure their transverse momentum. The Track Finder makes it possible to determine the physical relevance of each high energetic collision and to forward only interesting data to the data analysis units. Data of more than two hundred thousand detector cells are used to determine the location of muons and to measure their transverse momentum. Each 25 ns a new data set is generated. Measurement of location and transverse momentum of the muons can be terminated within 350 ns by using an ASIC. The classical method in high energy physics experiments is to employ a pattern comparison method. The predefined patterns are compared to the found patterns. The high number of data channels and the complex requirements to the spatial detector resolution do not permit to employ a pattern comparison method. A so called track following algorithm was designed, which is able to assemble complete tracks through the whole detector starting from single track segments. Instead of storing a high number of track patterns the problem is brought back to the algorithm level. Comprehensive simulations, employing the hardware simulation language VHDL, were conducted in order to optimize the algorithm and its hardware implementation. A FPGA (field program able gate array)-prototype was designed. A feasibility study to implement the track finder processor employing ASICs was conducted. (author)

Performance evaluation of throughput computing workloads using multi-core processors and graphics processors

Science.gov (United States)

Dave, Gaurav P.; Sureshkumar, N.; Blessy Trencia Lincy, S. S.

2017-11-01

Current trend in processor manufacturing focuses on multi-core architectures rather than increasing the clock speed for performance improvement. Graphic processors have become as commodity hardware for providing fast co-processing in computer systems. Developments in IoT, social networking web applications, big data created huge demand for data processing activities and such kind of throughput intensive applications inherently contains data level parallelism which is more suited for SIMD architecture based GPU. This paper reviews the architectural aspects of multi/many core processors and graphics processors. Different case studies are taken to compare performance of throughput computing applications using shared memory programming in OpenMP and CUDA API based programming.

The Molen Polymorphic Media Processor

NARCIS (Netherlands)

Kuzmanov, G.K.

2004-01-01

In this dissertation, we address high performance media processing based on a tightly coupled co-processor architectural paradigm. More specifically, we introduce a reconfigurable media augmentation of a general purpose processor and implement it into a fully operational processor prototype. The

Design of a Handheld Pseudo Random Coded UWB Radar for Human Sensing

Directory of Open Access Journals (Sweden)

Xia Zheng-huan

2015-10-01

Full Text Available This paper presents the design of a handheld pseudo random coded Ultra-WideBand (UWB radar for human sensing. The main tasks of the radar are to track the moving human object and extract the human respiratory frequency. In order to achieve perfect penetrability and good range resolution, m sequence with a carrier of 800 MHz is chosen as the transmitting signal. The modulated m-sequence can be generated directly by the high-speed DAC and FPGA to reduce the size of the radar system, and the mean power of the transmitting signal is 5 dBm. The receiver has two receiving channels based on hybrid sampling, the first receiving channel is to sample the reference signal and the second receiving channel is to obtain the radar echo. The real-time pulse compression is computed in parallel with a group of on-chip DSP48E slices in FPGA to improve the scanning rate of the radar system. Additionally, the algorithms of moving target tracking and life detection are implemented using Intel’s micro-processor, and the detection results are sent to the micro displayer fixed on the helmet. The experimental results show that the moving target located at less than 16 m far away from the wall can be tracked, and the respiratory frequency of the static human at less than 14 m far away from the wall can be extracted.

Radar equations for modern radar

CERN Document Server

Barton, David K

2012-01-01

Based on the classic Radar Range-Performance Analysis from 1980, this practical volume extends that work to ensure applicability of radar equations to the design and analysis of modern radars. This unique book helps you identify what information on the radar and its environment is needed to predict detection range. Moreover, it provides equations and data to improve the accuracy of range calculations. You find detailed information on propagation effects, methods of range calculation in environments that include clutter, jamming and thermal noise, as well as loss factors that reduce radar perfo

A User Guide for Smoothing Air Traffic Radar Data

Science.gov (United States)

Bach, Ralph E.; Paielli, Russell A.

2014-01-01

Matlab software was written to provide smoothing of radar tracking data to simulate ADS-B (Automatic Dependent Surveillance-Broadcast) data in order to test a tactical conflict probe. The probe, called TSAFE (Tactical Separation-Assured Flight Environment), is designed to handle air-traffic conflicts left undetected or unresolved when loss-of-separation is predicted to occur within approximately two minutes. The data stream that is down-linked from an aircraft equipped with an ADS-B system would include accurate GPS-derived position and velocity information at sample rates of 1 Hz. Nation-wide ADS-B equipage (mandated by 2020) should improve surveillance accuracy and TSAFE performance. Currently, position data are provided by Center radar (nominal 12-sec samples) and Terminal radar (nominal 4.8-sec samples). Aircraft ground speed and ground track are estimated using real-time filtering, causing lags up to 60 sec, compromising performance of a tactical resolution tool. Offline smoothing of radar data reduces wild-point errors, provides a sample rate as high as 1 Hz, and yields more accurate and lag-free estimates of ground speed, ground track, and climb rate. Until full ADS-B implementation is available, smoothed radar data should provide reasonable track estimates for testing TSAFE in an ADS-B-like environment. An example illustrates the smoothing of radar data and shows a comparison of smoothed-radar and ADS-B tracking. This document is intended to serve as a guide for using the smoothing software.

Synthetic Aperture Radar Technology Conference, New Mexico State University, Las Cruces, N. Mex., March 8-10, 1978, Proceedings

Science.gov (United States)

1978-01-01

The following aspects of SAR development are discussed: calibration techniques, image simulation and interpretability, antennas, data processing, and system design. Papers are presented on such topics as a postlaunch calibration experiment for the Seasat-A SAR, computer simulation of an orbital SAR system, definition study of the Shuttle Imaging Radar, custom LSI circuits for spaceborne SAR processors, and random sampling adaptively focusing SAR.

JPP: A Java Pre-Processor

OpenAIRE

Kiniry, Joseph R.; Cheong, Elaine

1998-01-01

The Java Pre-Processor, or JPP for short, is a parsing pre-processor for the Java programming language. Unlike its namesake (the C/C++ Pre-Processor, cpp), JPP provides functionality above and beyond simple textual substitution. JPP's capabilities include code beautification, code standard conformance checking, class and interface specification and testing, and documentation generation.

Terminal weather information management

Science.gov (United States)

Lee, Alfred T.

1990-01-01

Since the mid-1960's, microburst/windshear events have caused at least 30 aircraft accidents and incidents and have killed more than 600 people in the United States alone. This study evaluated alternative means of alerting an airline crew to the presence of microburst/windshear events in the terminal area. Of particular interest was the relative effectiveness of conventional and data link ground-to-air transmissions of ground-based radar and low-level windshear sensing information on microburst/windshear avoidance. The Advanced Concepts Flight Simulator located at Ames Research Center was employed in a line oriented simulation of a scheduled round-trip airline flight from Salt Lake City to Denver Stapleton Airport. Actual weather en route and in the terminal area was simulated using recorded data. The microburst/windshear incident of July 11, 1988 was re-created for the Denver area operations. Six experienced airline crews currently flying scheduled routes were employed as test subjects for each of three groups: (1) A baseline group which received alerts via conventional air traffic control (ATC) tower transmissions; (2) An experimental group which received alerts/events displayed visually and aurally in the cockpit six miles (approx. 2 min.) from the microburst event; and (3) An additional experimental group received displayed alerts/events 23 linear miles (approx. 7 min.) from the microburst event. Analyses of crew communications and decision times showed a marked improvement in both situation awareness and decision-making with visually displayed ground-based radar information. Substantial reductions in the variability of decision times among crews in the visual display groups were also found. These findings suggest that crew performance will be enhanced and individual differences among crews due to differences in training and prior experience are significantly reduced by providing real-time, graphic display of terminal weather hazards.

Producing chopped firewood with firewood processors

International Nuclear Information System (INIS)

Kaerhae, K.; Jouhiaho, A.

2009-01-01

The TTS Institute's research and development project studied both the productivity of new, chopped firewood processors (cross-cutting and splitting machines) suitable for professional and independent small-scale production, and the costs of the chopped firewood produced. Seven chopped firewood processors were tested in the research, six of which were sawing processors and one shearing processor. The chopping work was carried out using wood feeding racks and a wood lifter. The work was also carried out without any feeding appliances. Altogether 132.5 solid m 3 of wood were chopped in the time studies. The firewood processor used had the most significant impact on chopping work productivity. In addition to the firewood processor, the stem mid-diameter, the length of the raw material, and of the firewood were also found to affect productivity. The wood feeding systems also affected productivity. If there is a feeding rack and hydraulic grapple loader available for use in chopping firewood, then it is worth using the wood feeding rack. A wood lifter is only worth using with the largest stems (over 20 cm mid-diameter) if a feeding rack cannot be used. When producing chopped firewood from small-diameter wood, i.e. with a mid-diameter less than 10 cm, the costs of chopping work were over 10 EUR solid m -3 with sawing firewood processors. The shearing firewood processor with a guillotine blade achieved a cost level of 5 EUR solid m -3 when the mid-diameter of the chopped stem was 10 cm. In addition to the raw material, the cost-efficient chopping work also requires several hundred annual operating hours with a firewood processor, which is difficult for individual firewood entrepreneurs to achieve. The operating hours of firewood processors can be increased to the required level by the joint use of the processors by a number of firewood entrepreneurs. (author)

Phased-array radar design application of radar fundamentals

CERN Document Server

Jeffrey, Thomas

2009-01-01

Phased-Array Radar Design is a text-reference designed for electrical engineering graduate students in colleges and universities as well as for corporate in-house training programs for radar design engineers, especially systems engineers and analysts who would like to gain hands-on, practical knowledge and skills in radar design fundamentals, advanced radar concepts, trade-offs for radar design and radar performance analysis.

Optical Associative Processors For Visual Perception"

Science.gov (United States)

Casasent, David; Telfer, Brian

1988-05-01

We consider various associative processor modifications required to allow these systems to be used for visual perception, scene analysis, and object recognition. For these applications, decisions on the class of the objects present in the input image are required and thus heteroassociative memories are necessary (rather than the autoassociative memories that have been given most attention). We analyze the performance of both associative processors and note that there is considerable difference between heteroassociative and autoassociative memories. We describe associative processors suitable for realizing functions such as: distortion invariance (using linear discriminant function memory synthesis techniques), noise and image processing performance (using autoassociative memories in cascade with with a heteroassociative processor and with a finite number of autoassociative memory iterations employed), shift invariance (achieved through the use of associative processors operating on feature space data), and the analysis of multiple objects in high noise (which is achieved using associative processing of the output from symbolic correlators). We detail and provide initial demonstrations of the use of associative processors operating on iconic, feature space and symbolic data, as well as adaptive associative processors.

AMD's 64-bit Opteron processor

CERN Multimedia

CERN. Geneva

2003-01-01

This talk concentrates on issues that relate to obtaining peak performance from the Opteron processor. Compiler options, memory layout, MPI issues in multi-processor configurations and the use of a NUMA kernel will be covered. A discussion of recent benchmarking projects and results will also be included.BiographiesDavid RichDavid directs AMD's efforts in high performance computing and also in the use of Opteron processors...

Composable processor virtualization for embedded systems

NARCIS (Netherlands)

Molnos, A.M.; Milutinovic, A.; She, D.; Goossens, K.G.W.

2010-01-01

Processor virtualization divides a physical processor's time among a set of virual machines, enabling efficient hardware utilization, application security and allowing co-existence of different operating systems on the same processor. Through initially intended for the server domain, virtualization

Deterministic chaos in the processor load

International Nuclear Information System (INIS)

Halbiniak, Zbigniew; Jozwiak, Ireneusz J.

2007-01-01

In this article we present the results of research whose purpose was to identify the phenomenon of deterministic chaos in the processor load. We analysed the time series of the processor load during efficiency tests of database software. Our research was done on a Sparc Alpha processor working on the UNIX Sun Solaris 5.7 operating system. The conducted analyses proved the presence of the deterministic chaos phenomenon in the processor load in this particular case

Space Radar Image of West Texas - SAR scan

Science.gov (United States)

1999-01-01

This radar image of the Midland/Odessa region of West Texas, demonstrates an experimental technique, called ScanSAR, that allows scientists to rapidly image large areas of the Earth's surface. The large image covers an area 245 kilometers by 225 kilometers (152 miles by 139 miles). It was obtained by the Spaceborne Imaging Radar-C/X-Band Synthetic Aperture Radar (SIR-C/X-SAR) flying aboard the space shuttle Endeavour on October 5, 1994. The smaller inset image is a standard SIR-C image showing a portion of the same area, 100 kilometers by 57 kilometers (62 miles by 35 miles) and was taken during the first flight of SIR-C on April 14, 1994. The bright spots on the right side of the image are the cities of Odessa (left) and Midland (right), Texas. The Pecos River runs from the top center to the bottom center of the image. Along the left side of the image are, from top to bottom, parts of the Guadalupe, Davis and Santiago Mountains. North is toward the upper right. Unlike conventional radar imaging, in which a radar continuously illuminates a single ground swath as the space shuttle passes over the terrain, a Scansar radar illuminates several adjacent ground swaths almost simultaneously, by 'scanning' the radar beam across a large area in a rapid sequence. The adjacent swaths, typically about 50 km (31 miles) wide, are then merged during ground processing to produce a single large scene. Illumination for this L-band scene is from the top of the image. The beams were scanned from the top of the scene to the bottom, as the shuttle flew from left to right. This scene was acquired in about 30 seconds. A normal SIR-C image is acquired in about 13 seconds. The ScanSAR mode will likely be used on future radar sensors to construct regional and possibly global radar images and topographic maps. The ScanSAR processor is being designed for 1996 implementation at NASA's Alaska SAR Facility, located at the University of Alaska Fairbanks, and will produce digital images from the

The Radar Correlation and Interpolation (C&I) Algorithms Deployed in the ASR-9 Processor Augmentation Card (9PAC)

National Research Council Canada - National Science Library

Elkin, G

2001-01-01

.... The increased processing speed and memory size of the 9PAC hardware made it possible for new surveillance algorithms to be developed in software in order to provide improved primary radar and beacon...

MIL-STD-1553B Marconi LSI chip set in a remote terminal application

Science.gov (United States)

Dimarino, A.

1982-11-01

Marconi Avionics is utilizing the MIL-STD-1553B LSI Chip Set in the SCADC Air Data Computer application to perform all of the required remote terminal MIL-STD-1553B protocol functions. Basic components of the RTU are the dual redundant chip set, CT3231 Transceivers, 256 x 16 RAM and a Z8002 microprocessor. Basic transfers are to/from the RAM command of the bus controller or Z8002 processor. During transfers from the processor to the RAM, the chip set busy bit is set for a period not exceeding 250 microseconds. When the transfer is complete, the busy bit is released and transfers to the data bus occur on command. The LSI Chip Set word count lines are used to locate each data word in the local memory and 4 mode codes are used in the application: reset remote terminal, transmit status word, transmitter shut-down, and override transmitter shutdown.

Sedimentology and Ground-Penetrating Radar Characteristics of a Pleistocene Sandur Deposit

DEFF Research Database (Denmark)

Olsen, Henrik; Andreasen, Frank Erik

1995-01-01

-upward lithology, terminating with a jökulhlaup episode characterized by large compound dune migration and slack-water draping. Mapping of a more than 200 m long well exposed pitwall and ground-penetrating radar measurements in a 50 × 200 m grid along the pitwall made it possible to outline the three...

Neurovision processor for designing intelligent sensors

Science.gov (United States)

Gupta, Madan M.; Knopf, George K.

1992-03-01

A programmable multi-task neuro-vision processor, called the Positive-Negative (PN) neural processor, is proposed as a plausible hardware mechanism for constructing robust multi-task vision sensors. The computational operations performed by the PN neural processor are loosely based on the neural activity fields exhibited by certain nervous tissue layers situated in the brain. The neuro-vision processor can be programmed to generate diverse dynamic behavior that may be used for spatio-temporal stabilization (STS), short-term visual memory (STVM), spatio-temporal filtering (STF) and pulse frequency modulation (PFM). A multi- functional vision sensor that performs a variety of information processing operations on time- varying two-dimensional sensory images can be constructed from a parallel and hierarchical structure of numerous individually programmed PN neural processors.

VIRTUS: a multi-processor system in FASTBUS

International Nuclear Information System (INIS)

Ellett, J.; Jackson, R.; Ritter, R.; Schlein, P.; Yaeger, D.; Zweizig, J.

1986-01-01

VIRTUS is a system of parallel MC68000-based processors interconnected by FASTBUS that is used either on-line as an intelligent trigger component or off-line for full event processing. Each processor receives the complete set of data from one event. The host computer, a VAX 11/780, down-line loads all software to the processors, controls and monitors the functioning of all processors, and writes processed data to tape. Instructions, programs, and data are transferred among the processors and the host in the form of fixed format, variable length data blocks. (Auth.)

A lock circuit for a multi-core processor

DEFF Research Database (Denmark)

2015-01-01

An integrated circuit comprising a multiple processor cores and a lock circuit that comprises a queue register with respective bits set or reset via respective, connections dedicated to respective processor cores, whereby the queue register identifies those among the multiple processor cores...... that are enqueued in the queue register. Furthermore, the integrated circuit comprises a current register and a selector circuit configured to select a processor core and identify that processor core by a value in the current register. A selected processor core is a prioritized processor core among the cores...... configured with an integrated circuit; and a silicon die configured with an integrated circuit....

Sensitometric control of roentgen film processors

International Nuclear Information System (INIS)

Forsberg, H.; Karolinska Sjukhuset, Stockholm

1987-01-01

Monitoring of film processors performance is essential since image quality, patient dose and costs are influenced by the performance. A system for sensitometric constancy control of film processors and their associated components is described. Experience with the system for 3 years is given when implemented on 17 film processors. Modern high quality film processors have a stability that makes a test frequency of once a week sufficient to maintain adequate image quality. The test system is so sensitive that corrective actions almost invariably have been taken before any technical problem degraded the image quality to a visible degree. (orig.)

Special purpose processors for high energy physics applications

International Nuclear Information System (INIS)

Verkerk, C.

1978-01-01

The review on the subject of hardware processors from very fast decision logic for the split field magnet facility at CERN, to a point-finding processor used to relieve the data-acquisition minicomputer from the task of monitoring the SPS experiment is given. Block diagrams of decision making processor, point-finding processor, complanarity and opening angle processor and programmable track selector module are presented and discussed. The applications of fully programmable but slower processor on the one hand, and very fast and programmable decision logic on the other hand are given in this review

The Central Trigger Processor (CTP)

CERN Multimedia

Franchini, Matteo

2016-01-01

The Central Trigger Processor (CTP) receives trigger information from the calorimeter and muon trigger processors, as well as from other sources of trigger. It makes the Level-1 decision (L1A) based on a trigger menu.

Very Long Instruction Word Processors

Indian Academy of Sciences (India)

Pentium Processor have modified the processor architecture to exploit parallelism in a program. .... The type of operation itself is encoded using 14 bits. .... text of designing simple architectures with low power consump- tion and execute x86 ...

Quantum radar

CERN Document Server

Lanzagorta, Marco

2011-01-01

This book offers a concise review of quantum radar theory. Our approach is pedagogical, making emphasis on the physics behind the operation of a hypothetical quantum radar. We concentrate our discussion on the two major models proposed to date: interferometric quantum radar and quantum illumination. In addition, this book offers some new results, including an analytical study of quantum interferometry in the X-band radar region with a variety of atmospheric conditions, a derivation of a quantum radar equation, and a discussion of quantum radar jamming.This book assumes the reader is familiar w

Experimental testing of the noise-canceling processor.

Science.gov (United States)

Collins, Michael D; Baer, Ralph N; Simpson, Harry J

2011-09-01

Signal-processing techniques for localizing an acoustic source buried in noise are tested in a tank experiment. Noise is generated using a discrete source, a bubble generator, and a sprinkler. The experiment has essential elements of a realistic scenario in matched-field processing, including complex source and noise time series in a waveguide with water, sediment, and multipath propagation. The noise-canceling processor is found to outperform the Bartlett processor and provide the correct source range for signal-to-noise ratios below -10 dB. The multivalued Bartlett processor is found to outperform the Bartlett processor but not the noise-canceling processor. © 2011 Acoustical Society of America

Multi-Gigahertz radar range processing of baseband and RF carrier modulated signals in Tm:YAG

International Nuclear Information System (INIS)

Merkel, K.D.; Krishna Mohan, R.; Cole, Z.; Chang, T.; Olson, A.; Babbitt, W.R.

2004-01-01

An optical device is described and demonstrated that uses a spatial-spectral holographic material to perform coherent signal processing operations on analog, high-bandwidth optical signals with large time-bandwidth-products. Signal processing is performed as the material records the coherent spectral interference (or cross-power spectrum) of modulated optical signals as a spatial-spectral population grating between electronic transition states. Multiple exposures of processing pulse sequences are integrated with increasing grating strength. The device, coined as the Spatial-Spectral Coherent Holographic Integrating Processor (or S 2 -CHIP), is described as currently envisioned for a broadband, mid-to-high pulse repetition frequency range-Doppler radar signal processing system. Experiments were performed in Tm:YAG (0.1 at% at 5 K) to demonstrate time delay variation, integration dynamics, and effects of coding as applied to a radar range processor. These demonstrations used baseband modulation with a 1 gigabit per second (GPBS) bit rate and code length of 512 bits (512 ns), where delays up to 1.0 μs were resolved with greater than a 40 dB peak to RMS sidelobe ratio after 800 processing shots. Multi-GHz processing was demonstrated using a bit rate of 2.5 GBPS (baseband modulation) and code length of 2048 bits (819.2 ns). Processing of double-sideband modulated signals on a radio frequency (RF) carrier was demonstrated, where 512 bit, 1.0 GBPS codes were modulated on a 1.75 GHz carrier and then modulated on the optical carrier

IFT&E Industry Report Wind Turbine-Radar Interference Test Summary.

Energy Technology Data Exchange (ETDEWEB)

Karlson, Benjamin; LeBlanc, Bruce Philip.; Minster, David G; Estill, Milford; Miller, Bryan Edward; Busse, Franz (MIT LL); Keck, Chris (MIT LL); Sullivan, Jonathan (MIT LL); Brigada, David (MIT LL); Parker, Lorri (MIT LL); Younger, Richard (MIT LL); Biddle, Jason (MIT LL)

2014-10-01

Wind turbines have grown in size and capacity with today's average turbine having a power capacity of around 1.9 MW, reaching to heights of over 495 feet from ground to blade tip, and operating with speeds at the tip of the blade up to 200 knots. When these machines are installed within the line-of-sight of a radar system, they can cause significant clutter and interference, detrimentally impacting the primary surveillance radar (PSR) performance. The Massachusetts Institute of Technology's Lincoln Laboratory (MIT LL) and Sandia National Laboratories (SNL) were co-funded to conduct field tests and evaluations over two years in order to: I. Characterize the impact of wind turbines on existing Program-of-Record (POR) air surveillance radars; II. Assess near-term technologies proposed by industry that have the potential to mitigate the interference from wind turbines on radar systems; and III. Collect data and increase technical understanding of interference issues to advance development of long-term mitigation strategies. MIT LL and SNL managed the tests and evaluated resulting data from three flight campaigns to test eight mitigation technologies on terminal (short) and long-range (60 nmi and 250 nmi) radar systems. Combined across the three flight campaigns, more than 460 of hours of flight time were logged. This paper summarizes the Interagency Field Test & Evaluation (IFT&E) program and publicly- available results from the tests. It will also discuss the current wind turbine-radar interference evaluation process within the government and a proposed process to deploy mitigation technologies.

Development of a highly reliable CRT processor

International Nuclear Information System (INIS)

Shimizu, Tomoya; Saiki, Akira; Hirai, Kenji; Jota, Masayoshi; Fujii, Mikiya

1996-01-01

Although CRT processors have been employed by the main control board to reduce the operator's workload during monitoring, the control systems are still operated by hardware switches. For further advancement, direct controller operation through a display device is expected. A CRT processor providing direct controller operation must be as reliable as the hardware switches are. The authors are developing a new type of highly reliable CRT processor that enables direct controller operations. In this paper, we discuss the design principles behind a highly reliable CRT processor. The principles are defined by studies of software reliability and of the functional reliability of the monitoring and operation systems. The functional configuration of an advanced CRT processor is also addressed. (author)

Computer Generated Inputs for NMIS Processor Verification

International Nuclear Information System (INIS)

J. A. Mullens; J. E. Breeding; J. A. McEvers; R. W. Wysor; L. G. Chiang; J. R. Lenarduzzi; J. T. Mihalczo; J. K. Mattingly

2001-01-01

Proper operation of the Nuclear Identification Materials System (NMIS) processor can be verified using computer-generated inputs [BIST (Built-In-Self-Test)] at the digital inputs. Preselected sequences of input pulses to all channels with known correlation functions are compared to the output of the processor. These types of verifications have been utilized in NMIS type correlation processors at the Oak Ridge National Laboratory since 1984. The use of this test confirmed a malfunction in a NMIS processor at the All-Russian Scientific Research Institute of Experimental Physics (VNIIEF) in 1998. The NMIS processor boards were returned to the U.S. for repair and subsequently used in NMIS passive and active measurements with Pu at VNIIEF in 1999

3081//sub E/ processor

International Nuclear Information System (INIS)

Kunz, P.F.; Gravina, M.; Oxoby, G.; Trang, Q.; Fucci, A.; Jacobs, D.; Martin, B.; Storr, K.

1983-03-01

Since the introduction of the 168//sub E/, emulating processors have been successful over an amazingly wide range of applications. This paper will describe a second generation processor, the 3081//sub E/. This new processor, which is being developed as a collaboration between SLAC and CERN, goes beyond just fixing the obvious faults of the 168//sub E/. Not only will the 3081//sub E/ have much more memory space, incorporate many more IBM instructions, and have much more memory space, incorporate many more IBM instructions, and have full double precision floating point arithmetic, but it will also have faster execution times and be much simpler to build, debug, and maintain. The simple interface and reasonable cost of the 168//sub E/ will be maintained for the 3081//sub E/

Reconfigurable, XML-driven, OO framework for real-time control and monitoring of embedded radar signal processor

CSIR Research Space (South Africa)

Combrink, CJ

2011-05-01

Full Text Available Card (Module 0) Backplane VXS (High Speed Radar Data) Processing Card (Module 1) Processing Card (Module N) Control and Monitoring Function ... Peripherals Flash Memory Management FPGA Processing Resource 0 M as te r Sl av e Sl... serves as an interface to all the resources on the board. The hardware architecture for the two types of processing cards are remarkably different in terms of the number of processing resources, interconnection topology and other peripherals...

Multimode power processor

Science.gov (United States)

O'Sullivan, George A.; O'Sullivan, Joseph A.

1999-01-01

In one embodiment, a power processor which operates in three modes: an inverter mode wherein power is delivered from a battery to an AC power grid or load; a battery charger mode wherein the battery is charged by a generator; and a parallel mode wherein the generator supplies power to the AC power grid or load in parallel with the battery. In the parallel mode, the system adapts to arbitrary non-linear loads. The power processor may operate on a per-phase basis wherein the load may be synthetically transferred from one phase to another by way of a bumpless transfer which causes no interruption of power to the load when transferring energy sources. Voltage transients and frequency transients delivered to the load when switching between the generator and battery sources are minimized, thereby providing an uninterruptible power supply. The power processor may be used as part of a hybrid electrical power source system which may contain, in one embodiment, a photovoltaic array, diesel engine, and battery power sources.

Software Radar Technology

Directory of Open Access Journals (Sweden)

Tang Jun

2015-08-01

Full Text Available In this paper, the definition and the key features of Software Radar, which is a new concept, are proposed and discussed. We consider the development of modern radar system technology to be divided into three stages: Digital Radar, Software radar and Intelligent Radar, and the second stage is just commencing now. A Software Radar system should be a combination of various modern digital modular components conformed to certain software and hardware standards. Moreover, a software radar system with an open system architecture supporting to decouple application software and low level hardware would be easy to adopt "user requirements-oriented" developing methodology instead of traditional "specific function-oriented" developing methodology. Compared with traditional Digital Radar, Software Radar system can be easily reconfigured and scaled up or down to adapt to the changes of requirements and technologies. A demonstration Software Radar signal processing system, RadarLab 2.0, which has been developed by Tsinghua University, is introduced in this paper and the suggestions for the future development of Software Radar in China are also given in the conclusion.

PixonVision real-time video processor

Science.gov (United States)

Puetter, R. C.; Hier, R. G.

2007-09-01

PixonImaging LLC and DigiVision, Inc. have developed a real-time video processor, the PixonVision PV-200, based on the patented Pixon method for image deblurring and denoising, and DigiVision's spatially adaptive contrast enhancement processor, the DV1000. The PV-200 can process NTSC and PAL video in real time with a latency of 1 field (1/60 th of a second), remove the effects of aerosol scattering from haze, mist, smoke, and dust, improve spatial resolution by up to 2x, decrease noise by up to 6x, and increase local contrast by up to 8x. A newer version of the processor, the PV-300, is now in prototype form and can handle high definition video. Both the PV-200 and PV-300 are FPGA-based processors, which could be spun into ASICs if desired. Obvious applications of these processors include applications in the DOD (tanks, aircraft, and ships), homeland security, intelligence, surveillance, and law enforcement. If developed into an ASIC, these processors will be suitable for a variety of portable applications, including gun sights, night vision goggles, binoculars, and guided munitions. This paper presents a variety of examples of PV-200 processing, including examples appropriate to border security, battlefield applications, port security, and surveillance from unmanned aerial vehicles.

Processors and systems (picture processing)

Energy Technology Data Exchange (ETDEWEB)

Gemmar, P

1983-01-01

Automatic picture processing requires high performance computers and high transmission capacities in the processor units. The author examines the possibilities of operating processors in parallel in order to accelerate the processing of pictures. He therefore discusses a number of available processors and systems for picture processing and illustrates their capacities for special types of picture processing. He stresses the fact that the amount of storage required for picture processing is exceptionally high. The author concludes that it is as yet difficult to decide whether very large groups of simple processors or highly complex multiprocessor systems will provide the best solution. Both methods will be aided by the development of VLSI. New solutions have already been offered (systolic arrays and 3-d processing structures) but they also are subject to losses caused by inherently parallel algorithms. Greater efforts must be made to produce suitable software for multiprocessor systems. Some possibilities for future picture processing systems are discussed. 33 references.

Special processor for in-core control systems

International Nuclear Information System (INIS)

Golovanov, M.N.; Duma, V.R.; Levin, G.L.; Mel'nikov, A.V.; Polikanin, A.V.; Filatov, V.P.

1978-01-01

The BUTs-20 special processor is discussed, designed to control the units of the in-core control equipment which are incorporated into the VECTOR communication channel, and to provide preliminary data processing prior to computer calculations. A set of instructions and flowsheet of the processor, organization of its communication with memories and other units of the system are given. The processor components: a control unit and an arithmetic logical unit are discussed. It is noted that the special processor permits more effective utilization of the computer time

Study on New Smart Transformer Terminal Unit Based on ARM and GPRS Network

Directory of Open Access Journals (Sweden)

Na Wu

2013-12-01

Full Text Available Distribution transformer is one of the most important power equipments in distribution network, whose running state exercises a great influence on the stability of the network. Transformer Terminal Unit (TTU is an effective device to monitor the running state of transformers in the distribution automation system. In this paper, we study a new smart TTU which uses ARM7 series chip as processor, equipped with ATT7022B based electric meter module and GPRS module for remote data transmission control. We focus on the corresponding hardware, software design and the measurement principle of harmonics of TTU. The new TTU can measure the electric parameters of the distribution transformer precisely. Taking advantage of the powerful ARM processor, it can analyze harmonic of the power line effectively. Due to the always-on-line feature of GPRS, TTU can achieve reliable communication with the remote terminal and the master station. Compared with other similar units, the new unit outperforms in terms of real-time, precision and reliability, which can fully meet with the high-speed development of distribution automation system.

Functional Verification of Enhanced RISC Processor

OpenAIRE

SHANKER NILANGI; SOWMYA L

2013-01-01

This paper presents design and verification of a 32-bit enhanced RISC processor core having floating point computations integrated within the core, has been designed to reduce the cost and complexity. The designed 3 stage pipelined 32-bit RISC processor is based on the ARM7 processor architecture with single precision floating point multiplier, floating point adder/subtractor for floating point operations and 32 x 32 booths multiplier added to the integer core of ARM7. The binary representati...

Effect of processor temperature on film dosimetry

International Nuclear Information System (INIS)

Srivastava, Shiv P.; Das, Indra J.

2012-01-01

Optical density (OD) of a radiographic film plays an important role in radiation dosimetry, which depends on various parameters, including beam energy, depth, field size, film batch, dose, dose rate, air film interface, postexposure processing time, and temperature of the processor. Most of these parameters have been studied for Kodak XV and extended dose range (EDR) films used in radiation oncology. There is very limited information on processor temperature, which is investigated in this study. Multiple XV and EDR films were exposed in the reference condition (d max. , 10 × 10 cm 2 , 100 cm) to a given dose. An automatic film processor (X-Omat 5000) was used for processing films. The temperature of the processor was adjusted manually with increasing temperature. At each temperature, a set of films was processed to evaluate OD at a given dose. For both films, OD is a linear function of processor temperature in the range of 29.4–40.6°C (85–105°F) for various dose ranges. The changes in processor temperature are directly related to the dose by a quadratic function. A simple linear equation is provided for the changes in OD vs. processor temperature, which could be used for correcting dose in radiation dosimetry when film is used.

Radar Fundamentals, Presentation

OpenAIRE

Jenn, David

2008-01-01

Topics include: introduction, radar functions, antennas basics, radar range equation, system parameters, electromagnetic waves, scattering mechanisms, radar cross section and stealth, and sample radar systems.

Hardware description ADSP-21020 40-bit floating point DSP as designed in a remotely controlled digital CW Doppler radar

Science.gov (United States)

Morrison, R. E.; Robinson, S. H.

A continuous wave Doppler radar system has been designed which is portable, easily deployed, and remotely controlled. The heart of this system is a DSP/control board using Analog Devices ADSP-21020 40-bit floating point digital signal processor (DSP) microprocessor. Two 18-bit audio A/D converters provide digital input to the DSP/controller board for near real time target detection. Program memory for the DSP is dual ported with an Intel 87C51 microcontroller allowing DSP code to be up-loaded or down-loaded from a central controlling computer. The 87C51 provides overall system control for the remote radar and includes a time-of-day/day-of-year real time clock, system identification (ID) switches, and input/output (I/O) expansion by an Intel 82C55 I/O expander.

Bank switched memory interface for an image processor

International Nuclear Information System (INIS)

Barron, M.; Downward, J.

1980-09-01

A commercially available image processor is interfaced to a PDP-11/45 through an 8K window of memory addresses. When the image processor was not in use it was desired to be able to use the 8K address space as real memory. The standard method of accomplishing this would have been to use UNIBUS switches to switch in either the physical 8K bank of memory or the image processor memory. This method has the disadvantage of being rather expensive. As a simple alternative, a device was built to selectively enable or disable either an 8K bank of memory or the image processor memory. To enable the image processor under program control, GEN is contracted in size, the memory is disabled, a device partition for the image processor is created above GEN, and the image processor memory is enabled. The process is reversed to restore memory to GEN. The hardware to enable/disable the image and computer memories is controlled using spare bits from a DR-11K output register. The image processor and physical memory can be switched in or out on line with no adverse affects on the system's operation

VON WISPR Family Processors: Volume 1

National Research Council Canada - National Science Library

Wagstaff, Ronald

1997-01-01

...) and the background noise they are embedded in. Processors utilizing those fluctuations such as the von WISPR Family Processors discussed herein, are methods or algorithms that preferentially attenuate the fluctuating signals and noise...

Data-linked pilot reply time on controller workload and communication in a simulated terminal option

Science.gov (United States)

2001-05-01

This report describes an analysis of air traffic control communication and workload in a simulated terminal radar approach : control environment. The objective of this study was to investigate how pilot-to-controller data-link acknowledgment time : m...

Numeric processor and text manipulator for the ''MASTER CONTROL'' data-base-management system

International Nuclear Information System (INIS)

Kuhn, R.W.

1976-01-01

The numeric and text processor of the MASTER CONTROL (MCP) data-base-management system permits the user to define fields and arrays that are functionally dependent on the data retained in a data base. This allows the storage of only the essential and unique information and data, and the calculation of derivable quantities as required. The derived quantity can be expressed as an arithmetic expression, that is, a functional relationship. Functions can be multiply subscripted and can be embedded within other functions at up to 58 levels. They can be stored either semi-permanently in a repertoire of functional relations, or they can be defined interactively from a terminal and used immediately for searching on the derived value. The processor also permits the conversion of literal strings into numbers, and vice versa. In addition, the user can define dictionaries that allow the expansion of keyed sentinels associated with records in the data base into fully descriptive expressions. This option can be used for cost-effective searching and data compaction. The functional definitions are reduced to Polish notation and stored in a disk file from which they are either retrieved on demand and evaluated according to the data of records specified or used in any given MASTER CONTROL command. The language used for the definitions of the numeric processor is essentially FORTRAN; most of the standard functions and over two dozen special functions are thus available. The functional processor provides a powerful technique for the integration of text and data for energy research and for scientific and technological work in general. MASTER CONTROL is operational at the Lawrence Livermore Laboratory (LLL) and at the Los Alamos Scientific Laboratory (LASL). 6 figures, 1 table

Many - body simulations using an array processor

International Nuclear Information System (INIS)

Rapaport, D.C.

1985-01-01

Simulations of microscopic models of water and polypeptides using molecular dynamics and Monte Carlo techniques have been carried out with the aid of an FPS array processor. The computational techniques are discussed, with emphasis on the development and optimization of the software to take account of the special features of the processor. The computing requirements of these simulations exceed what could be reasonably carried out on a normal 'scientific' computer. While the FPS processor is highly suited to the kinds of models described, several other computationally intensive problems in statistical mechanics are outlined for which alternative processor architectures are more appropriate

Multi-processor network implementations in Multibus II and VME

International Nuclear Information System (INIS)

Briegel, C.

1992-01-01

ACNET (Fermilab Accelerator Controls Network), a proprietary network protocol, is implemented in a multi-processor configuration for both Multibus II and VME. The implementations are contrasted by the bus protocol and software design goals. The Multibus II implementation provides for multiple processors running a duplicate set of tasks on each processor. For a network connected task, messages are distributed by a network round-robin scheduler. Further, messages can be stopped, continued, or re-routed for each task by user-callable commands. The VME implementation provides for multiple processors running one task across all processors. The process can either be fixed to a particular processor or dynamically allocated to an available processor depending on the scheduling algorithm of the multi-processing operating system. (author)

Adaptation of Rejection Algorithms for a Radar Clutter

Directory of Open Access Journals (Sweden)

D. Popov

2017-09-01

Full Text Available In this paper, the algorithms for adaptive rejection of a radar clutter are synthesized for the case of a priori unknown spectral-correlation characteristics at wobbulation of a repetition period of the radar signal. The synthesis of algorithms for the non-recursive adaptive rejection filter (ARF of a given order is reduced to determination of the vector of weighting coefficients, which realizes the best effectiveness index for radar signal extraction from the moving targets on the background of the received clutter. As the effectiveness criterion, we consider the averaged (over the Doppler signal phase shift improvement coefficient for a signal-to-clutter ratio (SCR. On the base of extreme properties of the characteristic numbers (eigennumbers of the matrices, the optimal vector (according to this criterion maximum is defined as the eigenvector of the clutter correlation matrix corresponding to its minimal eigenvalue. The general type of the vector of optimal ARF weighting coefficients is de-termined and specific adaptive algorithms depending upon the ARF order are obtained, which in the specific cases can be reduced to the known algorithms confirming its authenticity. The comparative analysis of the synthesized and known algorithms is performed. Significant bene-fits are established in clutter rejection effectiveness by the offered processing algorithms compared to the known processing algorithms.

UWB radar technique for arc detection in coaxial cables and waveguides

International Nuclear Information System (INIS)

Maggiora, R.; Salvador, S.

2009-01-01

As spread spectrum technology has revolutionized the communications industry, Ultra Wide Band (UWB) technology is dramatically improving radar performances. These advanced signal processing techniques have been adapted to coaxial cables and waveguides to provide new features and enhanced performance on arc detection. UWB signals constituted by a sequence of chips (properly chosen to reduce side lobes and to improve detection accuracy) are transmitted along the transmission lines at a specified Pulse Repetition Frequency (PRF) and their echoes are received by means of directional couplers. The core of the receiver is an ultra high-speed correlator implemented in a Digital Signal Processor (DSP). When a target (arc) is detected, its position and its 'radar cross section' are calculated to be able to provide the arc position along the transmission line and to be able to classify the type of detected arc. The 'background scattering' is routinely extracted from the received signal at any pulse. This permits to be resilient to the background structure of transmission lines (bends, junctions, windows, etc.). Thanks to the localization feature, segmentation is also possible for creating sensed and non-sensed zones (for example, to be insensitive to antenna load variations).

Evaluation of the Intel Sandy Bridge-EP server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2012-01-01

In this paper we report on a set of benchmark results recently obtained by CERN openlab when comparing an 8-core “Sandy Bridge-EP” processor with Intel’s previous microarchitecture, the “Westmere-EP”. The Intel marketing names for these processors are “Xeon E5-2600 processor series” and “Xeon 5600 processor series”, respectively. Both processors are produced in a 32nm process, and both platforms are dual-socket servers. Multiple benchmarks were used to get a good understanding of the performance of the new processor. We used both industry-standard benchmarks, such as SPEC2006, and specific High Energy Physics benchmarks, representing both simulation of physics detectors and data analysis of physics events. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following features: processor frequency, overclocking via Turbo mode, the number of physical cores in use, the use of logical cores ...

Array processors based on Gaussian fraction-free method

Energy Technology Data Exchange (ETDEWEB)

Peng, S; Sedukhin, S [Aizu Univ., Aizuwakamatsu, Fukushima (Japan); Sedukhin, I

1998-03-01

The design of algorithmic array processors for solving linear systems of equations using fraction-free Gaussian elimination method is presented. The design is based on a formal approach which constructs a family of planar array processors systematically. These array processors are synthesized and analyzed. It is shown that some array processors are optimal in the framework of linear allocation of computations and in terms of number of processing elements and computing time. (author)

Multiple Embedded Processors for Fault-Tolerant Computing

Science.gov (United States)

Bolotin, Gary; Watson, Robert; Katanyoutanant, Sunant; Burke, Gary; Wang, Mandy

2005-01-01

A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors. A working prototype (see figure) consists of two embedded IBM PowerPC 405 processor cores and a comparator built on a Xilinx Virtex-II Pro FPGA. This relatively simple instantiation of the architecture implements an error-detection scheme. A planned future version, incorporating four processors and two comparators, would correct some errors in addition to detecting them.

Online track processor for the CDF upgrade

International Nuclear Information System (INIS)

Thomson, E. J.

2002-01-01

A trigger track processor, called the eXtremely Fast Tracker (XFT), has been designed for the CDF upgrade. This processor identifies high transverse momentum (> 1.5 GeV/c) charged particles in the new central outer tracking chamber for CDF II. The XFT design is highly parallel to handle the input rate of 183 Gbits/s and output rate of 44 Gbits/s. The processor is pipelined and reports the result for a new event every 132 ns. The processor uses three stages: hit classification, segment finding, and segment linking. The pattern recognition algorithms for the three stages are implemented in programmable logic devices (PLDs) which allow in-situ modification of the algorithm at any time. The PLDs reside on three different types of modules. The complete system has been installed and commissioned at CDF II. An overview of the track processor and performance in CDF Run II are presented

Design Principles for Synthesizable Processor Cores

DEFF Research Database (Denmark)

Schleuniger, Pascal; McKee, Sally A.; Karlsson, Sven

2012-01-01

As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput...

Data register and processor for multiwire chambers

International Nuclear Information System (INIS)

Karpukhin, V.V.

1985-01-01

A data register and a processor for data receiving and processing from drift chambers of a device for investigating relativistic positroniums are described. The data are delivered to the register input in the form of the Grey 8 bit code, memorized and transformed to a position code. The register information is delivered to the KAMAK trunk and to the front panel plug. The processor selects particle tracks in a horizontal plane of the facility. ΔY maximum coordinate divergence and minimum point quantity on the track are set from the processor front panel. Processor solution time is 16 μs maximum quantity of simultaneously analyzed coordinates is 16

Improving Weather Radar Precipitation Estimates by Combining two Types of Radars

DEFF Research Database (Denmark)

Nielsen, Jesper Ellerbæk; Thorndahl, Søren Liedtke; Rasmussen, Michael R.

2014-01-01

This paper presents a demonstration of how Local Area Weather Radar (LAWR) X-band measurements can be combined with meteorological C–band measurements into a single radar product. For this purpose, a blending method has been developed which combines the strengths of the two radar systems. Combining...... the two radar types achieves a radar product with both long range and high temporal resolution. It is validated that the blended radar product performs better than the individual radars based on ground observations from laser disdrometers. However, the data combination is challenged by lower performance...... of the LAWR. Although both radars benefits from the data combination, it is also found that advection based temporal interpolation is a more favourable method for increasing the temporal resolution of meteorological C–band measurements....

Development methods for VLSI-processors

International Nuclear Information System (INIS)

Horninger, K.; Sandweg, G.

1982-01-01

The aim of this project, which was originally planed for 3 years, was the development of modern system and circuit concepts, for VLSI-processors having a 32 bit wide data path. The result of this first years work is the concept of a general purpose processor. This processor is not only logically but also physically (on the chip) divided into four functional units: a microprogrammable instruction unit, an execution unit in slice technique, a fully associative cache memory and an I/O unit. For the ALU of the execution unit circuits in PLA and slice techniques have been realized. On the basis of regularity, area consumption and achievable performance the slice technique has been prefered. The designs utilize selftesting circuitry. (orig.) [de

The performance of an LSI-11/23 with a SKYMNK-Q array processor as a high speed front end processor

International Nuclear Information System (INIS)

Clark, D.L.

1983-01-01

The NSRL has recently installed a VAX-11/750 based data acquisition system which is networked to two LSI-11/23 satellite processors. Each of the LSI's are connected to CAMAC branch drivers. The LSI's have small array processors installed for use in preprocessing data. The objective is to provide an easy to use high speed processor that will relieve the VAX of some of the real-time data analysis tasks. The basic operation of the array processor and some of the results of performance tests are described

Embedded Processor Laboratory

Data.gov (United States)

Federal Laboratory Consortium — The Embedded Processor Laboratory provides the means to design, develop, fabricate, and test embedded computers for missile guidance electronics systems in support...

Multi-Core Processor Memory Contention Benchmark Analysis Case Study

Science.gov (United States)

Simon, Tyler; McGalliard, James

2009-01-01

Multi-core processors dominate current mainframe, server, and high performance computing (HPC) systems. This paper provides synthetic kernel and natural benchmark results from an HPC system at the NASA Goddard Space Flight Center that illustrate the performance impacts of multi-core (dual- and quad-core) vs. single core processor systems. Analysis of processor design, application source code, and synthetic and natural test results all indicate that multi-core processors can suffer from significant memory subsystem contention compared to similar single-core processors.

Architectural design and analysis of a programmable image processor

International Nuclear Information System (INIS)

Siyal, M.Y.; Chowdhry, B.S.; Rajput, A.Q.K.

2003-01-01

In this paper we present an architectural design and analysis of a programmable image processor, nicknamed Snake. The processor was designed with a high degree of parallelism to speed up a range of image processing operations. Data parallelism found in array processors has been included into the architecture of the proposed processor. The implementation of commonly used image processing algorithms and their performance evaluation are also discussed. The performance of Snake is also compared with other types of processor architectures. (author)

Analytical Bounds on the Threads in IXP1200 Network Processor

OpenAIRE

Ramakrishna, STGS; Jamadagni, HS

2003-01-01

Increasing link speeds have placed enormous burden on the processing requirements and the processors are expected to carry out a variety of tasks. Network Processors (NP) [1] [2] is the blanket name given to the processors, which are traded for flexibility and performance. Network Processors are offered by a number of vendors; to take the main burden of processing requirement of network related operations from the conventional processors. The Network Processors cover a spectrum of design trad...

A UNIX-based prototype biomedical virtual image processor

International Nuclear Information System (INIS)

Fahy, J.B.; Kim, Y.

1987-01-01

The authors have developed a multiprocess virtual image processor for the IBM PC/AT, in order to maximize image processing software portability for biomedical applications. An interprocess communication scheme, based on two-way metacode exchange, has been developed and verified for this purpose. Application programs call a device-independent image processing library, which transfers commands over a shared data bridge to one or more Autonomous Virtual Image Processors (AVIP). Each AVIP runs as a separate process in the UNIX operating system, and implements the device-independent functions on the image processor to which it corresponds. Application programs can control multiple image processors at a time, change the image processor configuration used at any time, and are completely portable among image processors for which an AVIP has been implemented. Run-time speeds have been found to be acceptable for higher level functions, although rather slow for lower level functions, owing to the overhead associated with sending commands and data over the shared data bridge

The communication processor of TUMULT-64

NARCIS (Netherlands)

Smit, Gerardus Johannes Maria; Jansen, P.G.

1988-01-01

Tumult (Twente University MULTi-processor system) is a modular extendible multi-processor system designed and implemented at the Twente University of Technology in co-operation with Oce Nederland B.V. and the Dr. Neher Laboratories (Dutch PTT). Characteristics of the hardware are: MIMD type,

High-Speed General Purpose Genetic Algorithm Processor.

Science.gov (United States)

Hoseini Alinodehi, Seyed Pourya; Moshfe, Sajjad; Saber Zaeimian, Masoumeh; Khoei, Abdollah; Hadidi, Khairollah

2016-07-01

In this paper, an ultrafast steady-state genetic algorithm processor (GAP) is presented. Due to the heavy computational load of genetic algorithms (GAs), they usually take a long time to find optimum solutions. Hardware implementation is a significant approach to overcome the problem by speeding up the GAs procedure. Hence, we designed a digital CMOS implementation of GA in [Formula: see text] process. The proposed processor is not bounded to a specific application. Indeed, it is a general-purpose processor, which is capable of performing optimization in any possible application. Utilizing speed-boosting techniques, such as pipeline scheme, parallel coarse-grained processing, parallel fitness computation, parallel selection of parents, dual-population scheme, and support for pipelined fitness computation, the proposed processor significantly reduces the processing time. Furthermore, by relying on a built-in discard operator the proposed hardware may be used in constrained problems that are very common in control applications. In the proposed design, a large search space is achievable through the bit string length extension of individuals in the genetic population by connecting the 32-bit GAPs. In addition, the proposed processor supports parallel processing, in which the GAs procedure can be run on several connected processors simultaneously.

Embedded DSP-based telehealth radar system for remote in-door fall detection.

Science.gov (United States)

Garripoli, Carmine; Mercuri, Marco; Karsmakers, Peter; Jack Soh, Ping; Crupi, Giovanni; Vandenbosch, Guy A E; Pace, Calogero; Leroux, Paul; Schreurs, Dominique

2015-01-01

Telehealth systems and applications are extensively investigated nowadays to enhance the quality-of-care and, in particular, to detect emergency situations and to monitor the well-being of elderly people, allowing them to stay at home independently as long as possible. In this paper, an embedded telehealth system for continuous, automatic, and remote monitoring of real-time fall emergencies is presented and discussed. The system, consisting of a radar sensor and base station, represents a cost-effective and efficient healthcare solution. The implementation of the fall detection data processing technique, based on the least-square support vector machines, through a digital signal processor and the management of the communication between radar sensor and base station are detailed. Experimental tests, for a total of 65 mimicked fall incidents, recorded with 16 human subjects (14 men and two women) that have been monitored for 320 min, have been used to validate the proposed system under real circumstances. The subjects' weight is between 55 and 90 kg with heights between 1.65 and 1.82 m, while their age is between 25 and 39 years. The experimental results have shown a sensitivity to detect the fall events in real time of 100% without reporting false positives. The tests have been performed in an area where the radar's operation was not limited by practical situations, namely, signal power, coverage of the antennas, and presence of obstacles between the subject and the antennas.

Accuracies Of Optical Processors For Adaptive Optics

Science.gov (United States)

Downie, John D.; Goodman, Joseph W.

1992-01-01

Paper presents analysis of accuracies and requirements concerning accuracies of optical linear-algebra processors (OLAP's) in adaptive-optics imaging systems. Much faster than digital electronic processor and eliminate some residual distortion. Question whether errors introduced by analog processing of OLAP overcome advantage of greater speed. Paper addresses issue by presenting estimate of accuracy required in general OLAP that yields smaller average residual aberration of wave front than digital electronic processor computing at given speed.

Making CSB + -Trees Processor Conscious

DEFF Research Database (Denmark)

Samuel, Michael; Pedersen, Anders Uhl; Bonnet, Philippe

2005-01-01

of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose......Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance...... a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager....

Lipsi: Probably the Smallest Processor in the World

DEFF Research Database (Denmark)

Schoeberl, Martin

2018-01-01

While research on high-performance processors is important, it is also interesting to explore processor architectures at the other end of the spectrum: tiny processor cores for auxiliary functions. While it is common to implement small circuits for such functions, such as a serial port, in dedica...... at a minimal cost....

Recommending the heterogeneous cluster type multi-processor system computing

International Nuclear Information System (INIS)

Iijima, Nobukazu

2010-01-01

Real-time reactor simulator had been developed by reusing the equipment of the Musashi reactor and its performance improvement became indispensable for research tools to increase sampling rate with introduction of arithmetic units using multi-Digital Signal Processor(DSP) system (cluster). In order to realize the heterogeneous cluster type multi-processor system computing, combination of two kinds of Control Processor (CP) s, Cluster Control Processor (CCP) and System Control Processor (SCP), were proposed with Large System Control Processor (LSCP) for hierarchical cluster if needed. Faster computing performance of this system was well evaluated by simulation results for simultaneous execution of plural jobs and also pipeline processing between clusters, which showed the system led to effective use of existing system and enhancement of the cost performance. (T. Tanaka)

First level trigger processor for the ZEUS calorimeter

International Nuclear Information System (INIS)

Dawson, J.W.; Talaga, R.L.; Burr, G.W.; Laird, R.J.; Smith, W.; Lackey, J.

1990-01-01

This paper discusses the design of the first level trigger processor for the ZEUS calorimeter. This processor accepts data from the 13,000 photomultipliers of the calorimeter which is topologically divided into 16 regions, and after regional preprocessing, performs logical and numerical operations which cross regional boundaries. Because the crossing period at the HERA collider is 96 ns, it is necessary that first-level trigger decisions be made in pipelined hardware. One microsecond is allowed for the processor to perform the required logical and numerical operations, during which time the data from ten crossings would be resident in the processor while being clocked through the pipelined hardware. The circuitry is implemented in 100K ECL, Advanced CMOS discrete devices, and programmable gate arrays, and operates in a VME environment. All tables and registers are written/read from VME, and all diagnostic codes are executed from VME. Preprocessed data flows into the processor at a rate of 5.2GB/s, and processed data flows from the processor to the Global First-Level Trigger at a rate of 700MB/s. The system allows for subsets of the logic to be configured by software and for various important variables to be histogrammed as they flow through the processor. 2 refs., 3 figs

First-level trigger processor for the ZEUS calorimeter

International Nuclear Information System (INIS)

Dawson, J.W.; Talaga, R.L.; Burr, G.W.; Laird, R.J.; Smith, W.; Lackey, J.

1990-01-01

The design of the first-level trigger processor for the Zeus calorimeter is discussed. This processor accepts data from the 13,000 photomultipliers of the calorimeter, which is topologically divided into 16 regions, and after regional preprocessing performs logical and numerical operations that cross regional boundaries. Because the crossing period at the HERA collider is 96 ns, it is necessary that first-level trigger decisions be made in pipelined hardware. One microsecond is allowed for the processor to perform the required logical and numerical operations, during which time the data from ten crossings would be resident in the processor while being clocked through the pipelined hardware. The circuitry is implemented in 100K emitter-coupled logic (ECL), advanced CMOS discrete devices and programmable gate arrays, and operates in a VME environment. All tables and registers are written/read from VME, and all diagnostic codes are executed from VME. Preprocessed data flows into the processor at a rate of 5.2 Gbyte/s, and processed data flows from the processor to the global first-level trigger at a rate of 70 Mbyte/s. The system allows for subsets of the logic to be configured by software and for various important variables to be histogrammed as they flow through the processor

A digital retina-like low-level vision processor.

Science.gov (United States)

Mertoguno, S; Bourbakis, N G

2003-01-01

This correspondence presents the basic design and the simulation of a low level multilayer vision processor that emulates to some degree the functional behavior of a human retina. This retina-like multilayer processor is the lower part of an autonomous self-organized vision system, called Kydon, that could be used on visually impaired people with a damaged visual cerebral cortex. The Kydon vision system, however, is not presented in this paper. The retina-like processor consists of four major layers, where each of them is an array processor based on hexagonal, autonomous processing elements that perform a certain set of low level vision tasks, such as smoothing and light adaptation, edge detection, segmentation, line recognition and region-graph generation. At each layer, the array processor is a 2D array of k/spl times/m hexagonal identical autonomous cells that simultaneously execute certain low level vision tasks. Thus, the hardware design and the simulation at the transistor level of the processing elements (PEs) of the retina-like processor and its simulated functionality with illustrative examples are provided in this paper.

Simulation of a weather radar display for over-water airborne radar approaches

Science.gov (United States)

Clary, G. R.

1983-01-01

Airborne radar approach (ARA) concepts are being investigated as a part of NASA's Rotorcraft All-Weather Operations Research Program on advanced guidance and navigation methods. This research is being conducted using both piloted simulations and flight test evaluations. For the piloted simulations, a mathematical model of the airborne radar was developed for over-water ARAs to offshore platforms. This simulated flight scenario requires radar simulation of point targets, such as oil rigs and ships, distributed sea clutter, and transponder beacon replies. Radar theory, weather radar characteristics, and empirical data derived from in-flight radar photographs are combined to model a civil weather/mapping radar typical of those used in offshore rotorcraft operations. The resulting radar simulation is realistic and provides the needed simulation capability for ongoing ARA research.

Median and Morphological Specialized Processors for a Real-Time Image Data Processing

Directory of Open Access Journals (Sweden)

Kazimierz Wiatr

2002-01-01

Full Text Available This paper presents the considerations on selecting a multiprocessor MISD architecture for fast implementation of the vision image processing. Using the author′s earlier experience with real-time systems, implementing of specialized hardware processors based on the programmable FPGA systems has been proposed in the pipeline architecture. In particular, the following processors are presented: median filter and morphological processor. The structure of a universal reconfigurable processor developed has been proposed as well. Experimental results are presented as delays on LCA level implementation for median filter, morphological processor, convolution processor, look-up-table processor, logic processor and histogram processor. These times compare with delays in general purpose processor and DSP processor.

Planetary Radar

Science.gov (United States)

Neish, Catherine D.; Carter, Lynn M.

2015-01-01

This chapter describes the principles of planetary radar, and the primary scientific discoveries that have been made using this technique. The chapter starts by describing the different types of radar systems and how they are used to acquire images and accurate topography of planetary surfaces and probe their subsurface structure. It then explains how these products can be used to understand the properties of the target being investigated. Several examples of discoveries made with planetary radar are then summarized, covering solar system objects from Mercury to Saturn. Finally, opportunities for future discoveries in planetary radar are outlined and discussed.

Java Processor Optimized for RTSJ

Directory of Open Access Journals (Sweden)

Tu Shiliang

2007-01-01

Full Text Available Due to the preeminent work of the real-time specification for Java (RTSJ, Java is increasingly expected to become the leading programming language in real-time systems. To provide a Java platform suitable for real-time applications, a Java processor which can execute Java bytecode is directly proposed in this paper. It provides efficient support in hardware for some mechanisms specified in the RTSJ and offers a simpler programming model through ameliorating the scoped memory of the RTSJ. The worst case execution time (WCET of the bytecodes implemented in this processor is predictable by employing the optimization method proposed in our previous work, in which all the processing interfering predictability is handled before bytecode execution. Further advantage of this method is to make the implementation of the processor simpler and suited to a low-cost FPGA chip.

Data collection from FASTBUS to a DEC UNIBUS processor through the UNIBUS-Processor Interface

International Nuclear Information System (INIS)

Larwill, M.; Barsotti, E.; Lesny, D.; Pordes, R.

1983-01-01

This paper describes the use of the UNIBUS Processor Interface, an interface between FASTBUS and the Digital Equipment Corporation UNIBUS. The UPI was developed by Fermilab and the University of Illinois. Details of the use of this interface in a high energy physics experiment at Fermilab are given. The paper includes a discussion of the operation of the UPI on the UNIBUS of a VAX-11, and plans for using the UPI to perform data acquisition from FASTBUS to a VAX-11 Processor

Understanding radar systems

CERN Document Server

Kingsley, Simon

1999-01-01

What is radar? What systems are currently in use? How do they work? This book provides engineers and scientists with answers to these critical questions, focusing on actual radar systems in use today. It is a perfect resource for those just entering the field, or as a quick refresher for experienced practitioners. The book leads readers through the specialized language and calculations that comprise the complex world of radar engineering as seen in dozens of state-of-the-art radar systems. An easy to read, wide ranging guide to the world of modern radar systems.

Pulse Doppler radar

CERN Document Server

Alabaster, Clive

2012-01-01

This book is a practitioner's guide to all aspects of pulse Doppler radar. It concentrates on airborne military radar systems since they are the most used, most complex, and most interesting of the pulse Doppler radars; however, ground-based and non-military systems are also included. It covers the fundamental science, signal processing, hardware issues, systems design and case studies of typical systems. It will be a useful resource for engineers of all types (hardware, software and systems), academics, post-graduate students, scientists in radar and radar electronic warfare sectors and milit

Radar orthogonality and radar length in Finsler and metric spacetime geometry

Science.gov (United States)

Pfeifer, Christian

2014-09-01

The radar experiment connects the geometry of spacetime with an observers measurement of spatial length. We investigate the radar experiment on Finsler spacetimes which leads to a general definition of radar orthogonality and radar length. The directions radar orthogonal to an observer form the spatial equal time surface an observer experiences and the radar length is the physical length the observer associates to spatial objects. We demonstrate these concepts on a forth order polynomial Finsler spacetime geometry which may emerge from area metric or premetric linear electrodynamics or in quantum gravity phenomenology. In an explicit generalization of Minkowski spacetime geometry we derive the deviation from the Euclidean spatial length measure in an observers rest frame explicitly.

New development for low energy electron beam processor

International Nuclear Information System (INIS)

Takei, Taro; Goto, Hitoshi; Oizumi, Matsutoshi; Hirakawa, Tetsuya; Ochi, Masafumi

2003-01-01

Newly developed low-energy electron beam (EB) processors that have unique designs and configurations compared to conventional ones enable electron-beam treatment of small three-dimensional objects, such as grain-like agricultural products and small plastic parts. As the EB processor can irradiate the products from the whole angles, the uniform EB treatment can be achieved at one time regardless the complex shapes of the product. Here presented are two new EB processors: the first system has cylindrical process zone, which allows three-dimensional objects to be irradiated with one-pass treatment. The second is a tube-type small EB processor, achieving not only its compactor design, but also higher beam extraction efficiency and flexible installation of the irradiation heads. The basic design of each processor and potential applications with them will be presented in this paper. (author)

Comparison of Small Baseline Interferometric SAR Processors for Estimating Ground Deformation

Directory of Open Access Journals (Sweden)

Wenyu Gong

2016-04-01

Full Text Available The small Baseline Synthetic Aperture Radar (SAR Interferometry (SBI technique has been widely and successfully applied in various ground deformation monitoring applications. Over the last decade, a variety of SBI algorithms have been developed based on the same fundamental concepts. Recently developed SBI toolboxes provide an open environment for researchers to apply different SBI methods for various purposes. However, there has been no thorough discussion that compares the particular characteristics of different SBI methods and their corresponding performance in ground deformation reconstruction. Thus, two SBI toolboxes that implement a total of four SBI algorithms were selected for comparison. This study discusses and summarizes the main differences, pros and cons of these four SBI implementations, which could help users to choose a suitable SBI method for their specific application. The study focuses on exploring the suitability of each SBI module under various data set conditions, including small/large number of interferograms, the presence or absence of larger time gaps, urban/vegetation ground coverage, and temporally regular/irregular ground displacement with multiple spatial scales. Within this paper we discuss the corresponding theoretical background of each SBI method. We present a performance analysis of these SBI modules based on two real data sets characterized by different environmental and surface deformation conditions. The study shows that all four SBI processors are capable of generating similar ground deformation results when the data set has sufficient temporal sampling and a stable ground backscatter mechanism like urban area. Strengths and limitations of different SBI processors were analyzed based on data set configuration and environmental conditions and are summarized in this paper to guide future users of SBI techniques.

A data base processor semantics specification package

Science.gov (United States)

Fishwick, P. A.

1983-01-01

A Semantics Specification Package (DBPSSP) for the Intel Data Base Processor (DBP) is defined. DBPSSP serves as a collection of cross assembly tools that allow the analyst to assemble request blocks on the host computer for passage to the DBP. The assembly tools discussed in this report may be effectively used in conjunction with a DBP compatible data communications protocol to form a query processor, precompiler, or file management system for the database processor. The source modules representing the components of DBPSSP are fully commented and included.

Globe hosts launch of new processor

CERN Multimedia

2006-01-01

Launch of the quadecore processor chip at the Globe. On 14 November, in a series of major media events around the world, the chip-maker Intel launched its new 'quadcore' processor. For the regions of Europe, the Middle East and Africa, the day-long launch event took place in CERN's Globe of Science and Innovation, with over 30 journalists in attendance, coming from as far away as Johannesburg and Dubai. CERN was a significant choice for the event: the first tests of this new generation of processor in Europe had been made at CERN over the preceding months, as part of CERN openlab, a research partnership with leading IT companies such as Intel, HP and Oracle. The event also provided the opportunity for the journalists to visit ATLAS and the CERN Computer Centre. The strategy of putting multiple processor cores on the same chip, which has been pursued by Intel and other chip-makers in the last few years, represents an important departure from the more traditional improvements in the sheer speed of such chips. ...

XL-100S microprogrammable processor

International Nuclear Information System (INIS)

Gorbunov, N.V.; Guzik, Z.; Sutulin, V.A.; Forytski, A.

1983-01-01

The XL-100S microprogrammable processor providing the multiprocessor operation mode in the XL system crate is described. The processor meets the EUR 6500 CAMAC standards, address up to 4 Mbyte memory, and interacts with 7 CAMAC branchas. Eight external requests initiate operations preset by a sequence of microcommands in a memory of the capacity up to 64 kwords of 32-Git. The microprocessor architecture allows one to emulate commands of the majority of mini- or micro-computers, including floating point operations. The XL-100S processor may be used in various branches of experimental physics: for physical experiment apparatus control, fast selection of useful physical events, organization of the of input/output operations, organization of direct assess to memory included, etc. The Am2900 microprocessor set is used as an elementary base. The device is made in the form of a single width CAMAC module

Acoustooptic linear algebra processors - Architectures, algorithms, and applications

Science.gov (United States)

Casasent, D.

1984-01-01

Architectures, algorithms, and applications for systolic processors are described with attention to the realization of parallel algorithms on various optical systolic array processors. Systolic processors for matrices with special structure and matrices of general structure, and the realization of matrix-vector, matrix-matrix, and triple-matrix products and such architectures are described. Parallel algorithms for direct and indirect solutions to systems of linear algebraic equations and their implementation on optical systolic processors are detailed with attention to the pipelining and flow of data and operations. Parallel algorithms and their optical realization for LU and QR matrix decomposition are specifically detailed. These represent the fundamental operations necessary in the implementation of least squares, eigenvalue, and SVD solutions. Specific applications (e.g., the solution of partial differential equations, adaptive noise cancellation, and optimal control) are described to typify the use of matrix processors in modern advanced signal processing.

Simulation of a processor switching circuit with APLSV

International Nuclear Information System (INIS)

Dilcher, H.

1979-01-01

The report describes the simulation of a processor switching circuit with APL. Furthermore an APL function is represented to simulate a processor in an assembly like language. Both together serve as a tool for studying processor properties. By means of the programming function it is also possible to program other simulated processors. The processor is to be used in the processing of data in real time analysis that occur in high energy physics experiments. The data are already offered to the computer in digitalized form. A typical data rate is at 10 KB/ sec. The data are structured in blocks. The particular blocks are 1 KB wide and are independent from each other. Aprocessor has to decide, whether the block data belong to an event that is part of the backround noise and can therefore be forgotten, or whether the data should be saved for a later evaluation. (orig./WB) [de

Accuracy Limitations in Optical Linear Algebra Processors

Science.gov (United States)

Batsell, Stephen Gordon

1990-01-01

One of the limiting factors in applying optical linear algebra processors (OLAPs) to real-world problems has been the poor achievable accuracy of these processors. Little previous research has been done on determining noise sources from a systems perspective which would include noise generated in the multiplication and addition operations, noise from spatial variations across arrays, and from crosstalk. In this dissertation, we propose a second-order statistical model for an OLAP which incorporates all these system noise sources. We now apply this knowledge to determining upper and lower bounds on the achievable accuracy. This is accomplished by first translating the standard definition of accuracy used in electronic digital processors to analog optical processors. We then employ our second-order statistical model. Having determined a general accuracy equation, we consider limiting cases such as for ideal and noisy components. From the ideal case, we find the fundamental limitations on improving analog processor accuracy. From the noisy case, we determine the practical limitations based on both device and system noise sources. These bounds allow system trade-offs to be made both in the choice of architecture and in individual components in such a way as to maximize the accuracy of the processor. Finally, by determining the fundamental limitations, we show the system engineer when the accuracy desired can be achieved from hardware or architecture improvements and when it must come from signal pre-processing and/or post-processing techniques.

The Heidelberg POLYP - a flexible and fault-tolerant poly-processor

International Nuclear Information System (INIS)

Maenner, R.; Deluigi, B.

1981-01-01

The Heidelberg poly-processor system POLYP is described. It is intended to be used in nuclear physics for reprocessing of experimental data, in high energy physics as second-stage trigger processor, and generally in other applications requiring high-computing power. The POLYP system consists of any number of I/O-processors, processor modules (eventually of different types), global memory segments, and a host processor. All modules (up to several hundred) are connected by a multiple common-data-bus system; all processors, additionally, by a multiple sync bus system for processor/task-scheduling. All hard- and software is designed to be decentralized and free of bottle-necks. Most hardware-faults like single-bit errors in memory or multi-bit errors during transfers are automatically corrected. Defective modules, buses, etc., can be removed with only a graceful degradation of the system-throughput. (orig.)

Advances in bistatic radar

CERN Document Server

Willis, Nick

2007-01-01

Advances in Bistatic Radar updates and extends bistatic and multistatic radar developments since publication of Willis' Bistatic Radar in 1991. New and recently declassified military applications are documented. Civil applications are detailed including commercial and scientific systems. Leading radar engineers provide expertise to each of these applications. Advances in Bistatic Radar consists of two major sections: Bistatic/Multistatic Radar Systems and Bistatic Clutter and Signal Processing. Starting with a history update, the first section documents the early and now declassified military

Recommendation on Transition from Primary/Secondary Radar to Secondary- Only Radar Capability

Science.gov (United States)

1994-10-01

Radar Beacon Performance Monitor RCIU Remote Control Interface Unit RCL Remote Communications Link R E&D Research, Engineering and Development RML Radar...rate. 3.1.2.5 Maintenance The current LRRs have limited remote maintenance monitoring (RMM) capabilities via the Remote Control Interface Unit ( RCIU ...1, -2 and FPS-20 radars required an upgrade of some of the radar subsystems, namely the RCIU to respond as an RMS and the CD to interface with radar

Adaptive radar resource management

CERN Document Server

Moo, Peter

2015-01-01

Radar Resource Management (RRM) is vital for optimizing the performance of modern phased array radars, which are the primary sensor for aircraft, ships, and land platforms. Adaptive Radar Resource Management gives an introduction to radar resource management (RRM), presenting a clear overview of different approaches and techniques, making it very suitable for radar practitioners and researchers in industry and universities. Coverage includes: RRM's role in optimizing the performance of modern phased array radars The advantages of adaptivity in implementing RRMThe role that modelling and

Radar and ARPA manual

CERN Document Server

Bole, A G

2013-01-01

Radar and ARPA Manual focuses on the theoretical and practical aspects of electronic navigation. The manual first discusses basic radar principles, including principles of range and bearing measurements and picture orientation and presentation. The text then looks at the operational principles of radar systems. Function of units; aerial, receiver, and display principles; transmitter principles; and sitting of units on board ships are discussed. The book also describes target detection, Automatic Radar Plotting Aids (ARPA), and operational controls of radar systems, and then discusses radar plo

A dedicated line-processor as used at the SHF

International Nuclear Information System (INIS)

Bevan, A.V.; Hatley, R.W.; Price, D.R.; Rankin, P.

1985-01-01

A hardwired trigger processor was used at the SLAC Hybrid Facility to find evidence for charged tracks originating from the fiducial volume of a 40'' rapidcycling bubble chamber. Straight-line projections of these tracks in the plane perpendicular to the applied magnetic field were searched for using data from three sets of proportional wire chambers (PWC). This information was made directly available to the processor by means of a special digitizing card. The results memory of the processor simulated read-only memory in a 168/E processor and was accessible by it. The 168/E controlled the issuing of a trigger command to the bubble chamber flash tubes. The same design of digitizer card used by the line processor was incorporated into the 168/E, again as read only memory, which allowed it access to the raw data for continual monitoring of trigger integrity. The design logic of the trigger processor was verified by running real PWC data through a FORTRAN simulation of the hardware. This enabled the debugging to become highly automated since a step by step, computer controlled comparison of processor registers to simulation predictions could be made

Social Radar

Science.gov (United States)

2012-01-01

RTA HFM-201/RSM PAPER 3 - 1 © 2012 The MITRE Corporation. All Rights Reserved. Social Radar Barry Costa and John Boiney MITRE Corporation...defenders require an integrated set of capabilities that we refer to as a “ social radar.” Such a system would support strategic- to operational-level...situation awareness, alerting, course of action analysis, and measures of effectiveness for each action undertaken. Success of a social radar

Novel radar techniques and applications

CERN Document Server

Klemm, Richard; Lombardo, Pierfrancesco; Nickel, Ulrich

2017-01-01

Novel Radar Techniques and Applications presents the state-of-the-art in advanced radar, with emphasis on ongoing novel research and development and contributions from an international team of leading radar experts. This volume covers: Real aperture array radar; Imaging radar and Passive and multistatic radar.

Embedded processor extensions for image processing

Science.gov (United States)

Thevenin, Mathieu; Paindavoine, Michel; Letellier, Laurent; Heyrman, Barthélémy

2008-04-01

The advent of camera phones marks a new phase in embedded camera sales. By late 2009, the total number of camera phones will exceed that of both conventional and digital cameras shipped since the invention of photography. Use in mobile phones of applications like visiophony, matrix code readers and biometrics requires a high degree of component flexibility that image processors (IPs) have not, to date, been able to provide. For all these reasons, programmable processor solutions have become essential. This paper presents several techniques geared to speeding up image processors. It demonstrates that a gain of twice is possible for the complete image acquisition chain and the enhancement pipeline downstream of the video sensor. Such results confirm the potential of these computing systems for supporting future applications.

POLCAL - POLARIMETRIC RADAR CALIBRATION

Science.gov (United States)

Vanzyl, J.

1994-01-01

processing altitude or in the aircraft roll angle are possible causes of error in computing the antenna patterns inside the processor. POLCAL uses an altitude error correction algorithm to correctly remove the antenna pattern from the SAR images. POLCAL also uses a topographic calibration algorithm to reduce calibration errors resulting from ground topography. By utilizing the backscatter measurements from either the corner reflectors or a well-known distributed target, POLCAL can correct the residual amplitude offsets in the various polarization channels and correct for the absolute gain of the radar system. POLCAL also gives the user the option of calibrating a scene using the calibration data from a nearby site. This allows precise calibration of all the scenes acquired on a flight line where corner reflectors were present. Construction and positioning of corner reflectors is covered extensively in the program documentation. In an effort to keep the POLCAL code as transportable as possible, the authors eliminated all interactions with a graphics display system. For this reason, it is assumed that users will have their own software for doing the following: (1) synthesize an image using HH or VV polarization, (2) display the synthesized image on any display device, and (3) read the pixel locations of the corner reflectors from the image. The only inputs used by the software (in addition to the input Stokes matrix data file) is a small data file with the corner reflector information. POLCAL is written in FORTRAN 77 for use on Sun series computers running SunOS and DEC VAX computers running VMS. It requires 4Mb of RAM under SunOS and 3.7Mb of RAM under VMS for execution. The standard distribution medium for POLCAL is a .25 inch streaming magnetic tape cartridge in UNIX tar format. It is also available on a 9-track 1600 BPI magnetic tape in DEC VAX FILES-11 format or on a TK50 tape cartridge in DEC VAX FILES-11 format. Other distribution media may be available upon request

Multimedia Terminal System-on-Chip Design and Simulation

Directory of Open Access Journals (Sweden)

Barbieri Ivano

2005-01-01

Full Text Available This paper proposes a design approach based on integrated architectural and system-on-chip (SoC simulations. The main idea is to have an efficient framework for the design and the evaluation of multimedia terminals, allowing a fast system simulation with a definable degree of accuracy. The design approach includes the simulation of very long instruction word (VLIW digital signal processors (DSPs, the utilization of a device multiplexing the media streams, and the emulation of the real-time media acquisition. This methodology allows the evaluation of both the multimedia algorithm implementations and the hardware platform, giving feedback on the complete SoC including the interaction between modules and conflicts in accessing either the bus or shared resources. An instruction set architecture (ISA simulator and an SoC simulation environment compose the integrated framework. In order to validate this approach, the evaluation of an audio-video multiprocessor terminal is presented, and the complete simulation test results are reported.

Sojourn time tails in processor-sharing systems

NARCIS (Netherlands)

Egorova, R.R.

2009-01-01

The processor-sharing discipline was originally introduced as a modeling abstraction for the design and performance analysis of the processing unit of a computer system. Under the processor-sharing discipline, all active tasks are assumed to be processed simultaneously, receiving an equal share of

An interactive parallel processor for data analysis

International Nuclear Information System (INIS)

Mong, J.; Logan, D.; Maples, C.; Rathbun, W.; Weaver, D.

1984-01-01

A parallel array of eight minicomputers has been assembled in an attempt to deal with kiloparameter data events. By exporting computer system functions to a separate processor, the authors have been able to achieve computer amplification linearly proportional to the number of executing processors

Optical Array Processor: Laboratory Results

Science.gov (United States)

Casasent, David; Jackson, James; Vaerewyck, Gerard

1987-01-01

A Space Integrating (SI) Optical Linear Algebra Processor (OLAP) is described and laboratory results on its performance in several practical engineering problems are presented. The applications include its use in the solution of a nonlinear matrix equation for optimal control and a parabolic Partial Differential Equation (PDE), the transient diffusion equation with two spatial variables. Frequency-multiplexed, analog and high accuracy non-base-two data encoding are used and discussed. A multi-processor OLAP architecture is described and partitioning and data flow issues are addressed.

Multiprocessor Real-Time Scheduling with Hierarchical Processor Affinities

OpenAIRE

Bonifaci , Vincenzo; Brandenburg , Björn; D'Angelo , Gianlorenzo; Marchetti-Spaccamela , Alberto

2016-01-01

International audience; Many multiprocessor real-time operating systems offer the possibility to restrict the migrations of any task to a specified subset of processors by setting affinity masks. A notion of " strong arbitrary processor affinity scheduling " (strong APA scheduling) has been proposed; this notion avoids schedulability losses due to overly simple implementations of processor affinities. Due to potential overheads, strong APA has not been implemented so far in a real-time operat...

Hardware trigger processor for the MDT system

CERN Document Server

AUTHOR|(SzGeCERN)757787; The ATLAS collaboration; Hazen, Eric; Butler, John; Black, Kevin; Gastler, Daniel Edward; Ntekas, Konstantinos; Taffard, Anyes; Martinez Outschoorn, Verena; Ishino, Masaya; Okumura, Yasuyuki

2017-01-01

We are developing a low-latency hardware trigger processor for the Monitored Drift Tube system in the Muon spectrometer. The processor will fit candidate Muon tracks in the drift tubes in real time, improving significantly the momentum resolution provided by the dedicated trigger chambers. We present a novel pure-FPGA implementation of a Legendre transform segment finder, an associative-memory alternative implementation, an ARM (Zynq) processor-based track fitter, and compact ATCA carrier board architecture. The ATCA architecture is designed to allow a modular, staged approach to deployment of the system and exploration of alternative technologies.

Minimum redundancy MIMO radars

OpenAIRE

Chen, Chun-Yang; Vaidyanathan, P. P.

2008-01-01

The multiple-input multiple-output (MIMO) radar concept has drawn considerable attention recently. In the traditional single-input multiple-output (SIMO) radar system, the transmitter emits scaled versions of a single waveform. However, in the MIMO radar system, the transmitter transmits independent waveforms. It has been shown that the MIMO radar can be used to improve system performance. Most of the MIMO radar research so far has focused on the uniform array. However, i...

Towards a Process Algebra for Shared Processors

DEFF Research Database (Denmark)

Buchholtz, Mikael; Andersen, Jacob; Løvengreen, Hans Henrik

2002-01-01

We present initial work on a timed process algebra that models sharing of processor resources allowing preemption at arbitrary points in time. This enables us to model both the functional and the timely behaviour of concurrent processes executed on a single processor. We give a refinement relation...

Principles of modern radar systems

CERN Document Server

Carpentier, Michel H

1988-01-01

Introduction to random functions ; signal and noise : the ideal receiver ; performance of radar systems equipped with ideal receivers ; analysis of the operating principles of some types of radar ; behavior of real targets, fluctuation of targets ; angle measurement using radar ; data processing of radar information, radar coverage ; applications to electronic scanning antennas to radar ; introduction to Hilbert spaces.

High-speed packet filtering utilizing stream processors

Science.gov (United States)

Hummel, Richard J.; Fulp, Errin W.

2009-04-01

Parallel firewalls offer a scalable architecture for the next generation of high-speed networks. While these parallel systems can be implemented using multiple firewalls, the latest generation of stream processors can provide similar benefits with a significantly reduced latency due to locality. This paper describes how the Cell Broadband Engine (CBE), a popular stream processor, can be used as a high-speed packet filter. Results show the CBE can potentially process packets arriving at a rate of 1 Gbps with a latency less than 82 μ-seconds. Performance depends on how well the packet filtering process is translated to the unique stream processor architecture. For example the method used for transmitting data and control messages among the pseudo-independent processor cores has a significant impact on performance. Experimental results will also show the current limitations of a CBE operating system when used to process packets. Possible solutions to these issues will be discussed.

Fast processor for dilepton triggers

International Nuclear Information System (INIS)

Katsanevas, S.; Kostarakis, P.; Baltrusaitis, R.

1983-01-01

We describe a fast trigger processor, developed for and used in Fermilab experiment E-537, for selecting high-mass dimuon events produced by negative pions and anti-protons. The processor finds candidate tracks by matching hit information received from drift chambers and scintillation counters, and determines their momenta. Invariant masses are calculated for all possible pairs of tracks and an event is accepted if any invariant mass is greater than some preselectable minimum mass. The whole process, accomplished within 5 to 10 microseconds, achieves up to a ten-fold reduction in trigger rate

Design of RISC Processor Using VHDL and Cadence

Science.gov (United States)

Moslehpour, Saeid; Puliroju, Chandrasekhar; Abu-Aisheh, Akram

The project deals about development of a basic RISC processor. The processor is designed with basic architecture consisting of internal modules like clock generator, memory, program counter, instruction register, accumulator, arithmetic and logic unit and decoder. This processor is mainly used for simple general purpose like arithmetic operations and which can be further developed for general purpose processor by increasing the size of the instruction register. The processor is designed in VHDL by using Xilinx 8.1i version. The present project also serves as an application of the knowledge gained from past studies of the PSPICE program. The study will show how PSPICE can be used to simplify massive complex circuits designed in VHDL Synthesis. The purpose of the project is to explore the designed RISC model piece by piece, examine and understand the Input/ Output pins, and to show how the VHDL synthesis code can be converted to a simplified PSPICE model. The project will also serve as a collection of various research materials about the pieces of the circuit.

Radar Chart

Data.gov (United States)

National Oceanic and Atmospheric Administration, Department of Commerce — The Radar Chart collection is an archived product of summarized radar data. The geographic coverage is the 48 contiguous states of the United States. These hourly...

Real time processor for array speckle interferometry

Science.gov (United States)

Chin, Gordon; Florez, Jose; Borelli, Renan; Fong, Wai; Miko, Joseph; Trujillo, Carlos

1989-02-01

The authors are constructing a real-time processor to acquire image frames, perform array flat-fielding, execute a 64 x 64 element two-dimensional complex FFT (fast Fourier transform) and average the power spectrum, all within the 25 ms coherence time for speckles at near-IR (infrared) wavelength. The processor will be a compact unit controlled by a PC with real-time display and data storage capability. This will provide the ability to optimize observations and obtain results on the telescope rather than waiting several weeks before the data can be analyzed and viewed with offline methods. The image acquisition and processing, design criteria, and processor architecture are described.

Vector and parallel processors in computational science

International Nuclear Information System (INIS)

Duff, I.S.; Reid, J.K.

1985-01-01

These proceedings contain the articles presented at the named conference. These concern hardware and software for vector and parallel processors, numerical methods and algorithms for the computation on such processors, as well as applications of such methods to different fields of physics and related sciences. See hints under the relevant topics. (HSI)

MPC Related Computational Capabilities of ARMv7A Processors

DEFF Research Database (Denmark)

Frison, Gianluca; Jørgensen, John Bagterp

2015-01-01

In recent years, the mass market of mobile devices has pushed the demand for increasingly fast but cheap processors. ARM, the world leader in this sector, has developed the Cortex-A series of processors with focus on computationally intensive applications. If properly programmed, these processors...... are powerful enough to solve the complex optimization problems arising in MPC in real-time, while keeping the traditional low-cost and low-power consumption. This makes these processors ideal candidates for use in embedded MPC. In this paper, we investigate the floating-point capabilities of Cortex A7, A9...... and A15 and show how to exploit the unique features of each processor to obtain the best performance, in the context of a novel implementation method for the linear-algebra routines used in MPC solvers. This method adapts high-performance computing techniques to the needs of embedded MPC. In particular...

Establishment Criteria for Integrated Wind Shear Detection Systems: Low-Level Wind Shear Alert System (LLWAS), Terminal Doppler Weather Radar (TDWR), and Modified Airport Surveillance Radar

Science.gov (United States)

1990-12-01

Overviev . ......................................... 9 2. Programs , Syr!ems, and Services ........................ 11 a. National Weather Service...Equipment Appropriation. ADA, a computer system developed and maintained by the Office of Aviation Policy and rlans, facilitates APS-I processing... Program Plan. The primary benefit of LLWAS, TDWR, and modified airport surveillance radar is reduced risk and expected incidence of wind shear-related

Air-Lubricated Thermal Processor For Dry Silver Film

Science.gov (United States)

Siryj, B. W.

1980-09-01

Since dry silver film is processed by heat, it may be viewed on a light table only seconds after exposure. On the other hand, wet films require both bulky chemicals and substantial time before an image can be analyzed. Processing of dry silver film, although simple in concept, is not so simple when reduced to practice. The main concern is the effect of film temperature gradients on uniformity of optical film density. RCA has developed two thermal processors, different in implementation but based on the same philosophy. Pressurized air is directed to both sides of the film to support the film and to conduct the heat to the film. Porous graphite is used as the medium through which heat and air are introduced. The initial thermal processor was designed to process 9.5-inch-wide film moving at speeds ranging from 0.0034 to 0.008 inch per second. The processor configuration was curved to match the plane generated by the laser recording beam. The second thermal processor was configured to process 5-inch-wide film moving at a continuously variable rate ranging from 0.15 to 3.5 inches per second. Due to field flattening optics used in this laser recorder, the required film processing area was plane. In addition, this processor was sectioned in the direction of film motion, giving the processor the capability of varying both temperature and effective processing area.

Determination of radar MTF

Energy Technology Data Exchange (ETDEWEB)

Chambers, D. [Lawrence Livermore National Lab., CA (United States)

1994-11-15

The ultimate goal of the Current Meter Array (CMA) is to be able to compare the current patterns detected with the array with radar images of the water surface. The internal wave current patterns modulate the waves on the water surface giving a detectable modulation of the radar cross-section (RCS). The function relating the RCS modulations to the current patterns is the Modulation Transfer Function (MTF). By comparing radar images directly with co-located CMA measurements the MTF can be determined. In this talk radar images and CMA measurements from a recent experiment at Loch Linnhe, Scotland, will be used to make the first direct determination of MTF for an X and S band radar at low grazing angles. The technical problems associated with comparing radar images to CMA data will be explained and the solution method discussed. The results suggest the both current and strain rate contribute equally to the radar modulation for X band. For S band, the strain rate contributes more than the current. The magnitude of the MTF and the RCS modulations are consistent with previous estimates when the wind is blowing perpendicular to the radar look direction.

Logistic Fuel Processor Development

National Research Council Canada - National Science Library

Salavani, Reza

2004-01-01

The Air Base Technologies Division of the Air Force Research Laboratory has developed a logistic fuel processor that removes the sulfur content of the fuel and in the process converts logistic fuel...

Real time monitoring of electron processors

International Nuclear Information System (INIS)

Nablo, S.V.; Kneeland, D.R.; McLaughlin, W.L.

1995-01-01

A real time radiation monitor (RTRM) has been developed for monitoring the dose rate (current density) of electron beam processors. The system provides continuous monitoring of processor output, electron beam uniformity, and an independent measure of operating voltage or electron energy. In view of the device's ability to replace labor-intensive dosimetry in verification of machine performance on a real-time basis, its application to providing archival performance data for in-line processing is discussed. (author)

Fast track trigger processor for the OPAL detector at LEP

Energy Technology Data Exchange (ETDEWEB)

Carter, A A; Carter, J R; Ward, D R; Heuer, R D; Jaroslawski, S; Wagner, A

1986-09-20

A fast hardware track trigger processor being built for the OPAL experiment is described. The processor will analyse data from the central drift chambers of OPAL to determine whether any tracks come from the interaction region, and thereby eliminate background events. The processor will find tracks over a large angular range, vertical strokecos thetavertical stroke < or approx. 0.95. The design of the processor is described, together with a brief account of its hardware implementation for OPAL. The results of feasibility studies are also presented.

Active laser radar (lidar) for measurement of corresponding height and reflectance images

Science.gov (United States)

Froehlich, Christoph; Mettenleiter, M.; Haertl, F.

1997-08-01

For the survey and inspection of environmental objects, a non-tactile, robust and precise imaging of height and depth is the basis sensor technology. For visual inspection,surface classification, and documentation purposes, however, additional information concerning reflectance of measured objects is necessary. High-speed acquisition of both geometric and visual information is achieved by means of an active laser radar, supporting consistent 3D height and 2D reflectance images. The laser radar is an optical-wavelength system, and is comparable to devices built by ERIM, Odetics, and Perceptron, measuring the range between sensor and target surfaces as well as the reflectance of the target surface, which corresponds to the magnitude of the back scattered laser energy. In contrast to these range sensing devices, the laser radar under consideration is designed for high speed and precise operation in both indoor and outdoor environments, emitting a minimum of near-IR laser energy. It integrates a laser range measurement system and a mechanical deflection system for 3D environmental measurements. This paper reports on design details of the laser radar for surface inspection tasks. It outlines the performance requirements and introduces the measurement principle. The hardware design, including the main modules, such as the laser head, the high frequency unit, the laser beam deflection system, and the digital signal processing unit are discussed.the signal processing unit consists of dedicated signal processors for real-time sensor data preprocessing as well as a sensor computer for high-level image analysis and feature extraction. The paper focuses on performance data of the system, including noise, drift over time, precision, and accuracy with measurements. It discuses the influences of ambient light, surface material of the target, and ambient temperature for range accuracy and range precision. Furthermore, experimental results from inspection of buildings, monuments

Multi-processor data acquisition and monitoring systems for particle physics

International Nuclear Information System (INIS)

White, V.; Burch, B.; Eng, K.; Heinicke, P.; Pyatetsky, M.; Ritchie, D.

1983-01-01

A high speed distributed processing system, using PDP-11 and VAX processors, is being developed at Fermilab. The acquisition of data is done using one or more PDP-11s. Additional processors are connected to provide either data logging or extra data analysis capabilities. Within this framework, functional interchangeability of PDP-11 and VAX processors and of the PDP-11 operating systems, RT-11 and RSX-11M, has been maintained. Inter-processor connections have been implemented in a general way using the 5 megabit DR11-W hardware currently selected for the purpose. Using this approach the authors have been able to make use of several existing data acquisition and analysis packages, such as RT/MULTI, in a multi-processor system

RADAR PPI Scope Overlay

Data.gov (United States)

National Oceanic and Atmospheric Administration, Department of Commerce — RADAR PPI Scope Overlays are used to position a RADAR image over a station at the correct resolution. The archive maintains several different RADAR resolution types,...

Rapid prototyping and evaluation of programmable SIMD SDR processors in LISA

Science.gov (United States)

Chen, Ting; Liu, Hengzhu; Zhang, Botao; Liu, Dongpei

2013-03-01

With the development of international wireless communication standards, there is an increase in computational requirement for baseband signal processors. Time-to-market pressure makes it impossible to completely redesign new processors for the evolving standards. Due to its high flexibility and low power, software defined radio (SDR) digital signal processors have been proposed as promising technology to replace traditional ASIC and FPGA fashions. In addition, there are large numbers of parallel data processed in computation-intensive functions, which fosters the development of single instruction multiple data (SIMD) architecture in SDR platform. So a new way must be found to prototype the SDR processors efficiently. In this paper we present a bit-and-cycle accurate model of programmable SIMD SDR processors in a machine description language LISA. LISA is a language for instruction set architecture which can gain rapid model at architectural level. In order to evaluate the availability of our proposed processor, three common baseband functions, FFT, FIR digital filter and matrix multiplication have been mapped on the SDR platform. Analytical results showed that the SDR processor achieved the maximum of 47.1% performance boost relative to the opponent processor.

Systems and Methods for Radar Data Communication

Science.gov (United States)

Bunch, Brian (Inventor); Szeto, Roland (Inventor); Miller, Brad (Inventor)

2013-01-01

A radar information processing system is operable to process high bandwidth radar information received from a radar system into low bandwidth radar information that may be communicated to a low bandwidth connection coupled to an electronic flight bag (EFB). An exemplary embodiment receives radar information from a radar system, the radar information communicated from the radar system at a first bandwidth; processes the received radar information into processed radar information, the processed radar information configured for communication over a connection operable at a second bandwidth, the second bandwidth lower than the first bandwidth; and communicates the radar information from a radar system, the radar information communicated from the radar system at a first bandwidth.

Optical backplane interconnect switch for data processors and computers

Science.gov (United States)

Hendricks, Herbert D.; Benz, Harry F.; Hammer, Jacob M.

1989-01-01

An optoelectronic integrated device design is reported which can be used to implement an all-optical backplane interconnect switch. The switch is sized to accommodate an array of processors and memories suitable for direct replacement into the basic avionic multiprocessor backplane. The optical backplane interconnect switch is also suitable for direct replacement of the PI bus traffic switch and at the same time, suitable for supporting pipelining of the processor and memory. The 32 bidirectional switchable interconnects are configured with broadcast capability for controls, reconfiguration, and messages. The approach described here can handle a serial interconnection of data processors or a line-to-link interconnection of data processors. An optical fiber demonstration of this approach is presented.

RADARS, a bioinformatics solution that automates proteome mass spectral analysis, optimises protein identification, and archives data in a relational database.

Science.gov (United States)

Field, Helen I; Fenyö, David; Beavis, Ronald C

2002-01-01

RADARS, a rapid, automated, data archiving and retrieval software system for high-throughput proteomic mass spectral data processing and storage, is described. The majority of mass spectrometer data files are compatible with RADARS, for consistent processing. The system automatically takes unprocessed data files, identifies proteins via in silico database searching, then stores the processed data and search results in a relational database suitable for customized reporting. The system is robust, used in 24/7 operation, accessible to multiple users of an intranet through a web browser, may be monitored by Virtual Private Network, and is secure. RADARS is scalable for use on one or many computers, and is suited to multiple processor systems. It can incorporate any local database in FASTA format, and can search protein and DNA databases online. A key feature is a suite of visualisation tools (many available gratis), allowing facile manipulation of spectra, by hand annotation, reanalysis, and access to all procedures. We also described the use of Sonar MS/MS, a novel, rapid search engine requiring 40 MB RAM per process for searches against a genomic or EST database translated in all six reading frames. RADARS reduces the cost of analysis by its efficient algorithms: Sonar MS/MS can identifiy proteins without accurate knowledge of the parent ion mass and without protein tags. Statistical scoring methods provide close-to-expert accuracy and brings robust data analysis to the non-expert user.

Accelerating molecular dynamic simulation on the cell processor and Playstation 3.

Science.gov (United States)

Luttmann, Edgar; Ensign, Daniel L; Vaidyanathan, Vishal; Houston, Mike; Rimon, Noam; Øland, Jeppe; Jayachandran, Guha; Friedrichs, Mark; Pande, Vijay S

2009-01-30

Implementation of molecular dynamics (MD) calculations on novel architectures will vastly increase its power to calculate the physical properties of complex systems. Herein, we detail algorithmic advances developed to accelerate MD simulations on the Cell processor, a commodity processor found in PlayStation 3 (PS3). In particular, we discuss issues regarding memory access versus computation and the types of calculations which are best suited for streaming processors such as the Cell, focusing on implicit solvation models. We conclude with a comparison of improved performance on the PS3's Cell processor over more traditional processors. (c) 2008 Wiley Periodicals, Inc.

Fast digital processor for event selection according to particle number difference

International Nuclear Information System (INIS)

Basiladze, S.G.; Gus'kov, B.N.; Li Van Sun; Maksimov, A.N.; Parfenov, A.N.

1978-01-01

A fast digital processor for a magnetic spectrometer is described. It is used in experimental searches for charmed particles. The basic purpose of the processor is discriminating events in the difference of numbers of particles passing through two proportional chambers (PC). The processor consists of three units for detecting signals with PC, and a binary coder. The number of inputs of the processor is 32 for the first PC and 64 for the second. The difference in the number of particles discriminated is from 0 to 8. The resolution time is 180 ns. The processor is built in the CAMAC standard

Java Radar Analysis Tool

Science.gov (United States)

Zaczek, Mariusz P.

2005-01-01

Java Radar Analysis Tool (JRAT) is a computer program for analyzing two-dimensional (2D) scatter plots derived from radar returns showing pieces of the disintegrating Space Shuttle Columbia. JRAT can also be applied to similar plots representing radar returns showing aviation accidents, and to scatter plots in general. The 2D scatter plots include overhead map views and side altitude views. The superposition of points in these views makes searching difficult. JRAT enables three-dimensional (3D) viewing: by use of a mouse and keyboard, the user can rotate to any desired viewing angle. The 3D view can include overlaid trajectories and search footprints to enhance situational awareness in searching for pieces. JRAT also enables playback: time-tagged radar-return data can be displayed in time order and an animated 3D model can be moved through the scene to show the locations of the Columbia (or other vehicle) at the times of the corresponding radar events. The combination of overlays and playback enables the user to correlate a radar return with a position of the vehicle to determine whether the return is valid. JRAT can optionally filter single radar returns, enabling the user to selectively hide or highlight a desired radar return.

Logistic Fuel Processor Development

National Research Council Canada - National Science Library

Salavani, Reza

2004-01-01

... to light gases then steam reform the light gases into hydrogen rich stream. This report documents the efforts in developing a fuel processor capable of providing hydrogen to a 3kW fuel cell stack...

Synthetic impulse and aperture radar (SIAR) a novel multi-frequency MIMO radar

CERN Document Server

Chen, Baixiao

2014-01-01

Analyzes and discusses the operating principle, signal processing method, and experimental results of this advanced radar technology This book systematically discusses the operating principle, signal processing method, target measurement technology, and experimental results of a new kind of radar called synthetic impulse and aperture radar (SIAR). The purpose is to help readers acquire an insight into the concept and principle of the SIAR, to know its operation mode, signal processing method, the difference between the traditional radar and itself, the designing ideals, and the developing me

APRON: A Cellular Processor Array Simulation and Hardware Design Tool

Science.gov (United States)

Barr, David R. W.; Dudek, Piotr

2009-12-01

We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

APRON: A Cellular Processor Array Simulation and Hardware Design Tool

Directory of Open Access Journals (Sweden)

David R. W. Barr

2009-01-01

Full Text Available We present a software environment for the efficient simulation of cellular processor arrays (CPAs. This software (APRON is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

Continuous-wave radar to detect defects within heat exchangers and steam generator tubes.

Energy Technology Data Exchange (ETDEWEB)

Nassersharif, Bahram (New Mexico State University, Las Cruces, NM); Caffey, Thurlow Washburn Howell; Jedlicka, Russell P. (New Mexico State University, Las Cruces, NM); Garcia, Gabe V. (New Mexico State University, Las Cruces, NM); Rochau, Gary Eugene

2003-01-01

A major cause of failures in heat exchangers and steam generators in nuclear power plants is degradation of the tubes within them. The tube failure is often caused by the development of cracks that begin on the outer surface of the tube and propagate both inwards and laterally. A new technique was researched for detection of defects using a continuous-wave radar method within metal tubing. The experimental program resulted in a completed product development schedule and the design of an experimental apparatus for studying handling of the probe and data acquisition. These tests were completed as far as the prototypical probe performance allowed. The prototype probe design did not have sufficient sensitivity to detect a defect signal using the defined radar technique and did not allow successful completion of all of the project milestones. The best results from the prototype probe could not detect a tube defect using the radar principle. Though a more precision probe may be possible, the cost of design and construction was beyond the scope of the project. This report describes the probe development and the status of the design at the termination of the project.

Tactical Conflict Detection in Terminal Airspace

Science.gov (United States)

Tang, Huabin; Robinson, John E.; Denery, Dallas G.

2010-01-01

Air traffic systems have long relied on automated short-term conflict prediction algorithms to warn controllers of impending conflicts (losses of separation). The complexity of terminal airspace has proven difficult for such systems as it often leads to excessive false alerts. Thus, the legacy system, called Conflict Alert, which provides short-term alerts in both en-route and terminal airspace currently, is often inhibited or degraded in areas where frequent false alerts occur, even though the alerts are provided only when an aircraft is in dangerous proximity of other aircraft. This research investigates how a minimal level of flight intent information may be used to improve short-term conflict detection in terminal airspace such that it can be used by the controller to maintain legal aircraft separation. The flight intent information includes a site-specific nominal arrival route and inferred altitude clearances in addition to the flight plan that includes the RNAV (Area Navigation) departure route. A new tactical conflict detection algorithm is proposed, which uses a single analytic trajectory, determined by the flight intent and the current state information of the aircraft, and includes a complex set of current, dynamic separation standards for terminal airspace to define losses of separation. The new algorithm is compared with an algorithm that imitates a known en-route algorithm and another that imitates Conflict Alert by analysis of false-alert rate and alert lead time with recent real-world data of arrival and departure operations and a large set of operational error cases from Dallas/Fort Worth TRACON (Terminal Radar Approach Control). The new algorithm yielded a false-alert rate of two per hour and an average alert lead time of 38 seconds.

Control structures for high speed processors

Science.gov (United States)

Maki, G. K.; Mankin, R.; Owsley, P. A.; Kim, G. M.

1982-01-01

A special processor was designed to function as a Reed Solomon decoder with throughput data rate in the Mhz range. This data rate is significantly greater than is possible with conventional digital architectures. To achieve this rate, the processor design includes sequential, pipelined, distributed, and parallel processing. The processor was designed using a high level language register transfer language. The RTL can be used to describe how the different processes are implemented by the hardware. One problem of special interest was the development of dependent processes which are analogous to software subroutines. For greater flexibility, the RTL control structure was implemented in ROM. The special purpose hardware required approximately 1000 SSI and MSI components. The data rate throughput is 2.5 megabits/second. This data rate is achieved through the use of pipelined and distributed processing. This data rate can be compared with 800 kilobits/second in a recently proposed very large scale integration design of a Reed Solomon encoder.

Array-Based Ultrawideband through-Wall Radar: Prediction and Assessment of Real Radar Abilities

Directory of Open Access Journals (Sweden)

Nadia Maaref

2013-01-01

Full Text Available This paper deals with a new through-the-wall (TTW radar demonstrator for the detection and the localisation of people in a room (in a noncooperative way with the radar situated outside but in the vicinity of the first wall. After modelling the propagation through various walls and quantifying the backscattering by the human body, an analysis of the technical considerations which aims at defining the radar design is presented. Finally, an ultrawideband (UWB frequency modulated continuous wave (FMCW radar is proposed, designed, and implemented. Some representative trials show that this radar is able to localise and track moving people behind a wall in real time.

Accuracy requirements of optical linear algebra processors in adaptive optics imaging systems

Science.gov (United States)

Downie, John D.; Goodman, Joseph W.

1989-10-01

The accuracy requirements of optical processors in adaptive optics systems are determined by estimating the required accuracy in a general optical linear algebra processor (OLAP) that results in a smaller average residual aberration than that achieved with a conventional electronic digital processor with some specific computation speed. Special attention is given to an error analysis of a general OLAP with regard to the residual aberration that is created in an adaptive mirror system by the inaccuracies of the processor, and to the effect of computational speed of an electronic processor on the correction. Results are presented on the ability of an OLAP to compete with a digital processor in various situations.

High performance graphics processors for medical imaging applications

International Nuclear Information System (INIS)

Goldwasser, S.M.; Reynolds, R.A.; Talton, D.A.; Walsh, E.S.

1989-01-01

This paper describes a family of high- performance graphics processors with special hardware for interactive visualization of 3D human anatomy. The basic architecture expands to multiple parallel processors, each processor using pipelined arithmetic and logical units for high-speed rendering of Computed Tomography (CT), Magnetic Resonance (MR) and Positron Emission Tomography (PET) data. User-selectable display alternatives include multiple 2D axial slices, reformatted images in sagittal or coronal planes and shaded 3D views. Special facilities support applications requiring color-coded display of multiple datasets (such as radiation therapy planning), or dynamic replay of time- varying volumetric data (such as cine-CT or gated MR studies of the beating heart). The current implementation is a single processor system which generates reformatted images in true real time (30 frames per second), and shaded 3D views in a few seconds per frame. It accepts full scale medical datasets in their native formats, so that minimal preprocessing delay exists between data acquisition and display

Evaluation of the Intel Westmere-EP server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2010-01-01

In this paper we report on a set of benchmark results recently obtained by CERN openlab when comparing the 6-core “Westmere-EP” processor with Intel’s previous generation of the same microarchitecture, the “Nehalem-EP”. The former is produced in a new 32nm process, the latter in 45nm. Both platforms are dual-socket servers. Multiple benchmarks were used to get a good understanding of the performance of the new processor. We used both industry-standard benchmarks, such as SPEC2006, and specific High Energy Physics benchmarks, representing both simulation of physics detectors and data analysis of physics events. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following features: processor frequency, overclocking via Turbo mode, the number of physical cores in use, the use of logical cores via Simultaneous Multi-Threading (SMT), the cache sizes available, the memory configuration installed, as well...

Novel radar techniques and applications

CERN Document Server

Klemm, Richard; Koch, Wolfgang

2017-01-01

Novel Radar Techniques and Applications presents the state-of-the-art in advanced radar, with emphasis on ongoing novel research and development and contributions from an international team of leading radar experts. This volume covers: Waveform diversity and cognitive radar and Target tracking and data fusion.

Keystone Business Models for Network Security Processors

OpenAIRE

Arthur Low; Steven Muegge

2013-01-01

Network security processors are critical components of high-performance systems built for cybersecurity. Development of a network security processor requires multi-domain experience in semiconductors and complex software security applications, and multiple iterations of both software and hardware implementations. Limited by the business models in use today, such an arduous task can be undertaken only by large incumbent companies and government organizations. Neither the “fabless semiconductor...

Development of level 2 processor for the readout of TMC

International Nuclear Information System (INIS)

Arai, Y.; Ikeno, M.; Murata, T.; Sudo, F.; Emura, T.

1995-01-01

We have developed a prototype 8-bit processor for the level 2 data processing for the Time Memory Cell (TMC). The first prototype processor successfully runs with 18 MHz clock. The operation of same clock frequency as TMC (30 MHz) will be easily achieved with simple modifications. Although the processor is very primitive one but shows its powerful performance and flexibility. To realize the compact TMC/L2P (Level 2 Processor) system, it is better to include the microcode memory within the chip. Encoding logic of the microcode must be included to reduce the microcode memory in this case. (J.P.N.)

Digital hf radar observations of equatorial spread-F

International Nuclear Information System (INIS)

Argo, P.E.

1984-01-01

Modern digital ionosondes, with both direction finding and doppler capabilities can provide large scale pictures of the Spread-F irregularity regions. A morphological framework has been developed that allows interpretation of the hf radar data. A large scale irregularity structure is found to be nightward of the dusk terminator, stationary in the solar reference frame. As the plasma moves through this foehn-wall-like structure it descends, and irregularities may be generated. Localized upwellings, or bubbles, may be produced, and they drift with the background plasma. The spread-F irregularity region is found to be best characterized as a partly cloudy sky, due to the patchiness of the substructures. 13 references, 16 figures

Mapping Palaeohydrography in Deserts: Contribution from Space-Borne Imaging Radar

Directory of Open Access Journals (Sweden)

Philippe Paillou

2017-03-01

Full Text Available Space-borne Synthetic Aperture Radar (SAR has the capability to image subsurface features down to several meters in arid regions. A first demonstration of this capability was performed in the Egyptian desert during the early eighties, thanks to the first Shuttle Imaging Radar mission. Global coverage provided by recent SARs, such as the Japanese ALOS/PALSAR sensor, allowed the mapping of vast ancient hydrographic systems in Northern Africa. We present a summary of palaeohydrography results obtained using PALSAR data over large deserts such as the Sahara and the Gobi. An ancient river system was discovered in eastern Lybia, connecting in the past the Kufrah oasis to the Mediterranean Sea, and the terminal part of the Tamanrasett river was mapped in western Mauritania, ending with a large submarine canyon. In southern Mongolia, PALSAR images combined with topography analysis allowed the mapping of the ancient Ulaan Nuur lake. We finally show the potentials of future low frequency SAR sensors by comparing L-band (1.25 GHz and P-band (435 MHz airborne SAR acquisitions over a desert site in southern Tunisia.

Review of trigger and on-line processors at SLAC

International Nuclear Information System (INIS)

Lankford, A.J.

1984-07-01

The role of trigger and on-line processors in reducing data rates to manageable proportions in e + e - physics experiments is defined not by high physics or background rates, but by the large event sizes of the general-purpose detectors employed. The rate of e + e - annihilation is low, and backgrounds are not high; yet the number of physics processes which can be studied is vast and varied. This paper begins by briefly describing the role of trigger processors in the e + e - context. The usual flow of the trigger decision process is illustrated with selected examples of SLAC trigger processing. The features are mentioned of triggering at the SLC and the trigger processing plans of the two SLC detectors: The Mark II and the SLD. The most common on-line processors at SLAC, the BADC, the SLAC Scanner Processor, the SLAC FASTBUS Controller, and the VAX CAMAC Channel, are discussed. Uses of the 168/E, 3081/E, and FASTBUS VAX processors are mentioned. The manner in which these processors are interfaced and the function they serve on line is described. Finally, the accelerator control system for the SLC is outlined. This paper is a survey in nature, and hence, relies heavily upon references to previous publications for detailed description of work mentioned here. 27 references, 9 figures, 1 table

FY1995 study of design methodology and environment of high-performance processor architectures; 1995 nendo koseino processor architecture sekkeiho to sekkei kankyo no kenkyu

Energy Technology Data Exchange (ETDEWEB)

NONE

1997-03-01

The aim of our project is to develop high-performance processor architectures for both general purpose and application-specific purpose. We also plan to develop basic softwares, such as compliers, and various design aid tools for those architectures. We are particularly interested in performance evaluation at architecture design phase, design optimization, automatic generation of compliers from processor designs, and architecture design methodologies combined with circuit layout. We have investigated both microprocessor architectures and design methodologies / environments for the processors. Our goal is to establish design technologies for high-performance, low-power, low-cost and highly-reliable systems in system-on-silicon era. We have proposed PPRAM architecture for high-performance system using DRAM and logic mixture technology, Softcore processor architecture for special purpose processors in embedded systems, and Power-Pro architecture for low power systems. We also developed design methodologies and design environments for the above architectures as well as a new method for design verification of microprocessors. (NEDO)

Radar remote sensing in biology

Science.gov (United States)

Moore, Richard K.; Simonett, David S.

1967-01-01

The present status of research on discrimination of natural and cultivated vegetation using radar imaging systems is sketched. The value of multiple polarization radar in improved discrimination of vegetation types over monoscopic radars is also documented. Possible future use of multi-frequency, multi-polarization radar systems for all weather agricultural survey is noted.

Software-defined reconfigurable microwave photonics processor.

Science.gov (United States)

Pérez, Daniel; Gasulla, Ivana; Capmany, José

2015-06-01

We propose, for the first time to our knowledge, a software-defined reconfigurable microwave photonics signal processor architecture that can be integrated on a chip and is capable of performing all the main functionalities by suitable programming of its control signals. The basic configuration is presented and a thorough end-to-end design model derived that accounts for the performance of the overall processor taking into consideration the impact and interdependencies of both its photonic and RF parts. We demonstrate the model versatility by applying it to several relevant application examples.

Signal processing in noise waveform radar

CERN Document Server

Kulpa, Krzysztof

2013-01-01

This book is devoted to the emerging technology of noise waveform radar and its signal processing aspects. It is a new kind of radar, which use noise-like waveform to illuminate the target. The book includes an introduction to basic radar theory, starting from classical pulse radar, signal compression, and wave radar. The book then discusses the properties, difficulties and potential of noise radar systems, primarily for low-power and short-range civil applications. The contribution of modern signal processing techniques to making noise radar practical are emphasized, and application examples

Radar Weather Observation

Data.gov (United States)

National Oceanic and Atmospheric Administration, Department of Commerce — Radar Weather Observation is a set of archived historical manuscripts stored on microfiche. The primary source of these radar weather observations manuscript records...

A review of array radars

Science.gov (United States)

Brookner, E.

1981-10-01

Achievements in the area of array radars are illustrated by such activities as the operational deployment of the large high-power, high-range-resolution Cobra Dane; the operational deployment of two all-solid-state high-power, large UHF Pave Paws radars; and the development of the SAM multifunction Patriot radar. This paper reviews the following topics: array radars steered in azimuth and elevation by phase shifting (phase-phase steered arrays); arrays steered + or - 60 deg, limited scan arrays, hemispherical coverage, and omnidirectional coverage arrays; array radars steering electronically in only one dimension, either by frequency or by phase steering; and array radar antennas which use no electronic scanning but instead use array antennas for achieving low antenna sidelobes.

Designing a dataflow processor using CλaSH

NARCIS (Netherlands)

Niedermeier, A.; Wester, Rinse; Wester, Rinse; Rovers, K.C.; Baaij, C.P.R.; Kuper, Jan; Smit, Gerardus Johannes Maria

2010-01-01

In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code.

Doppler radar physiological sensing

CERN Document Server

Lubecke, Victor M; Droitcour, Amy D; Park, Byung-Kwon; Singh, Aditya

2016-01-01

Presents a comprehensive description of the theory and practical implementation of Doppler radar-based physiological monitoring. This book includes an overview of current physiological monitoring techniques and explains the fundamental technology used in remote non-contact monitoring methods. Basic radio wave propagation and radar principles are introduced along with the fundamentals of physiological motion and measurement. Specific design and implementation considerations for physiological monitoring radar systems are then discussed in detail. The authors address current research and commercial development of Doppler radar based physiological monitoring for healthcare and other applications.

Radar Remote Sensing

Science.gov (United States)

Rosen, Paul A.

2012-01-01

This lecture was just a taste of radar remote sensing techniques and applications. Other important areas include Stereo radar grammetry. PolInSAR for volumetric structure mapping. Agricultural monitoring, soil moisture, ice-mapping, etc. The broad range of sensor types, frequencies of observation and availability of sensors have enabled radar sensors to make significant contributions in a wide area of earth and planetary remote sensing sciences. The range of applications, both qualitative and quantitative, continue to expand with each new generation of sensors.

Researching, building a soft-processor and Ethernet interface circuit using EDK

International Nuclear Information System (INIS)

Tuong Thi Thu Huong; Pham Ngoc Tuan; Truong Van Dat, Dang Lanh; Chau Thi Nhu Quynh

2014-01-01

The processor is an indispensable component in the measurement and automatic control systems. This report describes the fabrication of a soft-processor (32-bits, on-chip block RAM 64K, 50M clock, internal and peripheral bus) for receiving, sending and processing of data Ethernet packets. This processor is fabricated using the XPS component from EDK (Xilinx) software toolkit. After that, it is configured on the FPGA named Spartan XC3S500E circuit. A firmware of a processor for controlling the interface between processor and Ethernet port is written in C language and can play a role of a HOST (station) which has its own IP to connect to Ethernet network. Besides, there are some needed parts as follows: an Ethernet interfacing controller chip, a suitable cable providing a speed up to 100 Mbs and an application program running under Window XP environment written in LabView to communicate with soft-processor. (author)

A high-accuracy optical linear algebra processor for finite element applications

Science.gov (United States)

Casasent, D.; Taylor, B. K.

1984-01-01

Optical linear processors are computationally efficient computers for solving matrix-matrix and matrix-vector oriented problems. Optical system errors limit their dynamic range to 30-40 dB, which limits their accuray to 9-12 bits. Large problems, such as the finite element problem in structural mechanics (with tens or hundreds of thousands of variables) which can exploit the speed of optical processors, require the 32 bit accuracy obtainable from digital machines. To obtain this required 32 bit accuracy with an optical processor, the data can be digitally encoded, thereby reducing the dynamic range requirements of the optical system (i.e., decreasing the effect of optical errors on the data) while providing increased accuracy. This report describes a new digitally encoded optical linear algebra processor architecture for solving finite element and banded matrix-vector problems. A linear static plate bending case study is described which quantities the processor requirements. Multiplication by digital convolution is explained, and the digitally encoded optical processor architecture is advanced.

Principles of modern radar radar applications

CERN Document Server

Scheer, James A

2013-01-01

Principles of Modern Radar: Radar Applications is the third of the three-volume seriesof what was originally designed to be accomplished in one volume. As the final volumeof the set, it finishes the original vision of a complete yet bounded reference for radartechnology. This volume describes fifteen different system applications or class ofapplications in more detail than can be found in Volumes I or II.As different as the applications described, there is a difference in how these topicsare treated by the authors. Whereas in Volumes I and II there is strict adherence tochapter format and leve

High-resolution ice thickness and bed topography of a land-terminating section of the Greenland Ice Sheet

DEFF Research Database (Denmark)

Lindbäck, K.; Pettersson, R.; Doyle, S. H.

2014-01-01

We present ice thickness and bed topography maps with high spatial resolution (250 to 500 m) of a and-terminating section of the Greenland Ice Sheet derived from combined ground-based and airborne radar surveys. The data have a total area of ~12000 km2 and cover the whole ablation area of the out...

Low voltage 80 KV to 125 KV electron processors

International Nuclear Information System (INIS)

Lauppi, U.V.

1999-01-01

The classic electron beam technology made use of accelerating energies in the voltage range of 300 to 800 kV. The first EB processors - built for the curing of coatings - operated at 300 kV. The products to be treated were thicker than a simple layer of coating with thicknesses up to 100g and more. It was only in the beginning of the 1970's that industrial EB processors with accelerating voltages below 300 kV appeared on the market. Our company developed the first commercial electron accelerator without a beam scanner. The new EB machine featured a linear cathode, emitting a shower or 'curtain' of electrons over the full width of the product. These units were much smaller than anv previous EB processors and dedicated to the curing of coatings and other thin layers. ESI's first EB units operated with accelerating voltages between 150 and 200 kV. In 1993 ESI announced the introduction of a new generation of Electrocure. EB processors operating at 120 kV, and in 1998, at the RadTech North America '98 Conference in Chicago, the introduction of an 80 kV electron beam processor under the designation Microbeam LV

A fast track trigger processor for the OPAL detector at LEP

International Nuclear Information System (INIS)

Carter, A.A.; Jaroslawski, S.; Wagner, A.

1986-01-01

A fast hardware track trigger processor being built for the OPAL experiment is described. The processor will analyse data from the central drift chambers of OPAL to determine whether any tracks come from the interaction region, and thereby eliminate background events. The processor will find tracks over a large angular range, vertical strokecos thetavertical stroke < or approx. 0.95. The design of the processor is described, together with a brief account of its hardware implementation for OPAL. The results of feasibility studies are also presented. (orig.)

Launching applications on compute and service processors running under different operating systems in scalable network of processor boards with routers

Science.gov (United States)

Tomkins, James L [Albuquerque, NM; Camp, William J [Albuquerque, NM

2009-03-17

A multiple processor computing apparatus includes a physical interconnect structure that is flexibly configurable to support selective segregation of classified and unclassified users. The physical interconnect structure also permits easy physical scalability of the computing apparatus. The computing apparatus can include an emulator which permits applications from the same job to be launched on processors that use different operating systems.

Particle simulation on a distributed memory highly parallel processor

International Nuclear Information System (INIS)

Sato, Hiroyuki; Ikesaka, Morio

1990-01-01

This paper describes parallel molecular dynamics simulation of atoms governed by local force interaction. The space in the model is divided into cubic subspaces and mapped to the processor array of the CAP-256, a distributed memory, highly parallel processor developed at Fujitsu Labs. We developed a new technique to avoid redundant calculation of forces between atoms in different processors. Experiments showed the communication overhead was less than 5%, and the idle time due to load imbalance was less than 11% for two model problems which contain 11,532 and 46,128 argon atoms. From the software simulation, the CAP-II which is under development is estimated to be about 45 times faster than CAP-256 and will be able to run the same problem about 40 times faster than Fujitsu's M-380 mainframe when 256 processors are used. (author)

Recursive Matrix Inverse Update On An Optical Processor

Science.gov (United States)

Casasent, David P.; Baranoski, Edward J.

1988-02-01

A high accuracy optical linear algebraic processor (OLAP) using the digital multiplication by analog convolution (DMAC) algorithm is described for use in an efficient matrix inverse update algorithm with speed and accuracy advantages. The solution of the parameters in the algorithm are addressed and the advantages of optical over digital linear algebraic processors are advanced.

Evaluation of the Intel Nehalem-EX server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2010-01-01

In this paper we report on a set of benchmark results recently obtained by the CERN openlab by comparing the 4-socket, 32-core Intel Xeon X7560 server with the previous generation 4-socket server, based on the Xeon X7460 processor. The Xeon X7560 processor represents a major change in many respects, especially the memory sub-system, so it was important to make multiple comparisons. In most benchmarks the two 4-socket servers were compared. It should be underlined that both servers represent the “top of the line” in terms of frequency. However, in some cases, it was important to compare systems that integrated the latest processor features, such as QPI links, Symmetric multithreading and over-clocking via Turbo mode, and in such situations the X7560 server was compared to a dual socket L5520 based system with an identical frequency of 2.26 GHz. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following ...

Graphical user interface for TOUGH/TOUGH2 - development of database, pre-processor, and post-processor

Energy Technology Data Exchange (ETDEWEB)

Sato, Tatsuya; Okabe, Takashi; Osato, Kazumi [Geothermal Energy Research and Development Co., Ltd., Tokyo (Japan)

1995-03-01

One of the advantages of the TOUGH/TOUGH2 (Pruess, 1987 and 1991) is the modeling using {open_quotes}free shape{close_quotes} polygonal blocks. However, the treatment of three-dimensional information, particularly for TOUGH/TOUGH2 is not easy because of the {open_quotes}free shape{close_quotes} polygonal blocks. Therefore, we have developed a database named {open_quotes}GEOBASE{close_quotes} and a pre/post-processor named {open_quotes}GEOGRAPH{close_quotes} for TOUGH/TOUGH2 on engineering work station (EWS). {open_quotes}GEOGRAPH{close_quotes} is based on the ORACLE{sup *1} relational database manager system to access data sets of surface exploration (geology, geophysics, geochemistry, etc.), drilling (well trajectory, geological column, logging, etc.), well testing (production test, injection test, interference test, tracer test, etc.) and production/injection history.{open_quotes}GEOGRAPH{close_quotes} consists of {open_quotes}Pre-processor{close_quotes} that can construct the three-dimensional free shape reservoir modeling by mouse operation on X-window and {open_quotes}Post-processor{close_quotes} that can display several kinds of two/three-dimensional maps and X-Y plots to compile data on {open_quotes}GEOBASE{close_quotes} and result of TOUGH/TOUGH2 calculation. This paper shows concept of the systems and examples of utilization.

Survey of Ultra-wideband Radar

Science.gov (United States)

Mokole, Eric L.; Hansen, Pete

The development of UWB radar over the last four decades is very briefly summarized. A discussion of the meaning of UWB is followed by a short history of UWB radar developments and discussions of key supporting technologies and current UWB radars. Selected UWB radars and the associated applications are highlighted. Applications include detecting and imaging buried mines, detecting and mapping underground utilities, detecting and imaging objects obscured by foliage, through-wall detection in urban areas, short-range detection of suicide bombs, and the characterization of the impulse responses of various artificial and naturally occurring scattering objects. In particular, the Naval Research Laboratory's experimental, low-power, dual-polarized, short-pulse, ultra-high resolution radar is used to discuss applications and issues of UWB radar. Some crucial issues that are problematic to UWB radar are spectral availability, electromagnetic interference and compatibility, difficulties with waveform control/shaping, hardware limitations in the transmission chain, and the unreliability of high-power sources for sustained use above 2 GHz.

Biomass is beginning to threaten the wood-processors

International Nuclear Information System (INIS)

Beer, G.; Sobinkovic, B.

2004-01-01

In this issue an exploitation of biomass in Slovak Republic is analysed. Some new projects of constructing of the stoke-holds for biomass processing are published. The grants for biomass are ascending the prices of wood raw material, which is thus becoming less accessible for the wood-processors. An excessive wood export threatens the domestic processors

German Radar Observation Shuttle Experiment (ROSE)

Science.gov (United States)

Sleber, A. J.; Hartl, P.; Haydn, R.; Hildebrandt, G.; Konecny, G.; Muehlfeld, R.

1984-01-01

The success of radar sensors in several different application areas of interest depends on the knowledge of the backscatter of radar waves from the targets of interest, the variance of these interaction mechanisms with respect to changing measurement parameters, and the determination of the influence of he measuring systems on the results. The incidence-angle dependency of the radar cross section of different natural targets is derived. Problems involved by the combination of data gained with different sensors, e.g., MSS-, TM-, SPOTand SAR-images are analyzed. Radar cross-section values gained with ground-based radar spectrometers and spaceborne radar imaging, and non-imaging scatterometers and spaceborne radar images from the same areal target are correlated. The penetration of L-band radar waves into vegetated and nonvegetated surfaces is analyzed.

Meteor detection on ST (MST) radars

International Nuclear Information System (INIS)

Avery, S.K.

1987-01-01

The ability to detect radar echoes from backscatter due to turbulent irregularities of the radio refractive index in the clear atmosphere has lead to an increasing number of established mesosphere - stratosphere - troposphere (MST or ST) radars. Humidity and temperature variations are responsible for the echo in the troposphere and stratosphere and turbulence acting on electron density gradients provides the echo in the mesosphere. The MST radar and its smaller version, the ST radar, are pulsed Doppler radars operating in the VHF - UHF frequency range. These echoes can be used to determine upper atmosphere winds at little extra cost to the ST radar configuration. In addition, the meteor echoes can supplement mesospheric data from an MST radar. The detection techniques required on the ST radar for delineating meteor echo returns are described

CAMEX-4 TOGA RADAR V1

Data.gov (United States)

National Aeronautics and Space Administration — The TOGA radar dataset consists of browse and radar data collected from the TOGA radar during the CAMEX-4 experiment. TOGA is a C-band linear polarized doppler radar...

Parallel processor for fast event analysis

International Nuclear Information System (INIS)

Hensley, D.C.

1983-01-01

Current maximum data rates from the Spin Spectrometer of approx. 5000 events/s (up to 1.3 MBytes/s) and minimum analysis requiring at least 3000 operations/event require a CPU cycle time near 70 ns. In order to achieve an effective cycle time of 70 ns, a parallel processing device is proposed where up to 4 independent processors will be implemented in parallel. The individual processors are designed around the Am2910 Microsequencer, the AM29116 μP, and the Am29517 Multiplier. Satellite histogramming in a mass memory system will be managed by a commercial 16-bit μP system

Asymmetrical floating point array processors, their application to exploration and exploitation

Energy Technology Data Exchange (ETDEWEB)

Geriepy, B L

1983-01-01

An asymmetrical floating point array processor is a special-purpose scientific computer which operates under asymmetrical control of a host computer. Although an array processor can receive fixed point input and produce fixed point output, its primary mode of operation is floating point. The first generation of array processors was oriented towards time series information. The next generation of array processors has proved much more versatile and their applicability ranges from petroleum reservoir simulation to speech syntheses. Array processors are becoming commonplace in mining, the primary usage being construction of grids-by usual methods or by kriging. The Australian mining community is among the world's leaders in regard to computer-assisted exploration and exploitation systems. Part of this leadership role must be providing guidance to computer vendors in regard to current and future requirements.

On the effective parallel programming of multi-core processors

NARCIS (Netherlands)

Varbanescu, A.L.

2010-01-01

Multi-core processors are considered now the only feasible alternative to the large single-core processors which have become limited by technological aspects such as power consumption and heat dissipation. However, due to their inherent parallel structure and their diversity, multi-cores are

The UA1 upgrade calorimeter trigger processor

International Nuclear Information System (INIS)

Bains, N.; Baird, S.A.; Biddulph, P.

1990-01-01

The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no deadtime. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (author)

The UA1 upgrade calorimeter trigger processor

International Nuclear Information System (INIS)

Bains, M.; Charleton, D.; Ellis, N.; Garvey, J.; Gregory, J.; Jimack, M.P.; Jovanovic, P.; Kenyon, I.R.; Baird, S.A.; Campbell, D.; Cawthraw, M.; Coughlan, J.; Flynn, P.; Galagedera, S.; Grayer, G.; Halsall, R.; Shah, T.P.; Stephens, R.; Biddulph, P.; Eisenhandler, E.; Fensome, I.F.; Landon, M.; Robinson, D.; Oliver, J.; Sumorok, K.

1990-01-01

The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no dead time. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (orig.)

Radar Plan Position Indicator Scope

Data.gov (United States)

National Oceanic and Atmospheric Administration, Department of Commerce — Radar Plan Position Indicator Scope is the collection of weather radar imagery for the period prior to the beginning of the Next Generation Radar (NEXRAD) system...

Benchmarking NWP Kernels on Multi- and Many-core Processors

Science.gov (United States)

Michalakes, J.; Vachharajani, M.

2008-12-01

Increased computing power for weather, climate, and atmospheric science has provided direct benefits for defense, agriculture, the economy, the environment, and public welfare and convenience. Today, very large clusters with many thousands of processors are allowing scientists to move forward with simulations of unprecedented size. But time-critical applications such as real-time forecasting or climate prediction need strong scaling: faster nodes and processors, not more of them. Moreover, the need for good cost- performance has never been greater, both in terms of performance per watt and per dollar. For these reasons, the new generations of multi- and many-core processors being mass produced for commercial IT and "graphical computing" (video games) are being scrutinized for their ability to exploit the abundant fine- grain parallelism in atmospheric models. We present results of our work to date identifying key computational kernels within the dynamics and physics of a large community NWP model, the Weather Research and Forecast (WRF) model. We benchmark and optimize these kernels on several different multi- and many-core processors. The goals are to (1) characterize and model performance of the kernels in terms of computational intensity, data parallelism, memory bandwidth pressure, memory footprint, etc. (2) enumerate and classify effective strategies for coding and optimizing for these new processors, (3) assess difficulties and opportunities for tool or higher-level language support, and (4) establish a continuing set of kernel benchmarks that can be used to measure and compare effectiveness of current and future designs of multi- and many-core processors for weather and climate applications.

Processors for wavelet analysis and synthesis: NIFS and TI-C80 MVP

Science.gov (United States)

Brooks, Geoffrey W.

1996-03-01

Two processors are considered for image quadrature mirror filtering (QMF). The neuromorphic infrared focal-plane sensor (NIFS) is an existing prototype analog processor offering high speed spatio-temporal Gaussian filtering, which could be used for the QMF low- pass function, and difference of Gaussian filtering, which could be used for the QMF high- pass function. Although not designed specifically for wavelet analysis, the biologically- inspired system accomplishes the most computationally intensive part of QMF processing. The Texas Instruments (TI) TMS320C80 Multimedia Video Processor (MVP) is a 32-bit RISC master processor with four advanced digital signal processors (DSPs) on a single chip. Algorithm partitioning, memory management and other issues are considered for optimal performance. This paper presents these considerations with simulated results leading to processor implementation of high-speed QMF analysis and synthesis.

Airborne Radar Observations of Severe Hailstorms: Implications for Future Spaceborne Radar

Science.gov (United States)

Heymsfield, Gerald M.; Tian, Lin; Li, Lihua; McLinden, Matthew; Cervantes, Jaime I.

2013-01-01

A new dual-frequency (Ku and Ka band) nadir-pointing Doppler radar on the high-altitude NASA ER-2 aircraft, called the High-Altitude Imaging Wind and Rain Airborne Profiler (HIWRAP), has collected data over severe thunderstorms in Oklahoma and Kansas during the Midlatitude Continental Convective Clouds Experiment (MC3E). The overarching motivation for this study is to understand the behavior of the dualwavelength airborne radar measurements in a global variety of thunderstorms and how these may relate to future spaceborne-radar measurements. HIWRAP is operated at frequencies that are similar to those of the precipitation radar on the Tropical Rainfall Measuring Mission (Ku band) and the upcoming Global Precipitation Measurement mission satellite's dual-frequency (Ku and Ka bands) precipitation radar. The aircraft measurements of strong hailstorms have been combined with ground-based polarimetric measurements to obtain a better understanding of the response of the Ku- and Ka-band radar to the vertical distribution of the hydrometeors, including hail. Data from two flight lines on 24 May 2011 are presented. Doppler velocities were approx. 39m/s2at 10.7-km altitude from the first flight line early on 24 May, and the lower value of approx. 25m/s on a second flight line later in the day. Vertical motions estimated using a fall speed estimate for large graupel and hail suggested that the first storm had an updraft that possibly exceeded 60m/s for the more intense part of the storm. This large updraft speed along with reports of 5-cm hail at the surface, reflectivities reaching 70 dBZ at S band in the storm cores, and hail signals from polarimetric data provide a highly challenging situation for spaceborne-radar measurements in intense convective systems. The Ku- and Ka-band reflectivities rarely exceed approx. 47 and approx. 37 dBZ, respectively, in these storms.

ACP/R3000 processors in data acquisition systems

International Nuclear Information System (INIS)

Deppe, J.; Areti, H.; Atac, R.

1989-02-01

We describe ACP/R3000 processor based data acquisition systems for high energy physics. This VME bus compatible processor board, with a computational power equivalent to 15 VAX 11/780s or better, contains 8 Mb of memory for event buffering and has a high speed secondary bus that allows data gathering from front end electronics. 2 refs., 3 figs

GA103: A microprogrammable processor for online filtering

International Nuclear Information System (INIS)

Calzas, A.; Danon, G.; Bouquet, B.

1981-01-01

GA 103 is a 16 bit microprogrammable processor which emulates the PDP 11 instruction set. It is based on the Am 2900 slices. It allows user-implemented microinstructions and addition of hardwired processors. It will perform on-line filtering tasks in the NA 14 experiment at CERN, based on the reconstruction of transverse momentum of photons detected in a lead glass calorimeter. (orig.)

Real-time trajectory optimization on parallel processors

Science.gov (United States)

Psiaki, Mark L.

1993-01-01

A parallel algorithm has been developed for rapidly solving trajectory optimization problems. The goal of the work has been to develop an algorithm that is suitable to do real-time, on-line optimal guidance through repeated solution of a trajectory optimization problem. The algorithm has been developed on an INTEL iPSC/860 message passing parallel processor. It uses a zero-order-hold discretization of a continuous-time problem and solves the resulting nonlinear programming problem using a custom-designed augmented Lagrangian nonlinear programming algorithm. The algorithm achieves parallelism of function, derivative, and search direction calculations through the principle of domain decomposition applied along the time axis. It has been encoded and tested on 3 example problems, the Goddard problem, the acceleration-limited, planar minimum-time to the origin problem, and a National Aerospace Plane minimum-fuel ascent guidance problem. Execution times as fast as 118 sec of wall clock time have been achieved for a 128-stage Goddard problem solved on 32 processors. A 32-stage minimum-time problem has been solved in 151 sec on 32 processors. A 32-stage National Aerospace Plane problem required 2 hours when solved on 32 processors. A speed-up factor of 7.2 has been achieved by using 32-nodes instead of 1-node to solve a 64-stage Goddard problem.

The ATLAS Level-1 Central Trigger Processor (CTP)

CERN Document Server

Spiwoks, Ralf; Ellis, Nick; Farthouat, P; Gällnö, P; Haller, J; Krasznahorkay, A; Maeno, T; Pauly, T; Pessoa-Lima, H; Resurreccion-Arcas, I; Schuler, G; De Seixas, J M; Torga-Teixeira, R; Wengler, T

2005-01-01

The ATLAS Level-1 Central Trigger Processor (CTP) combines information from calorimeter and muon trigger processors and makes the final Level-1 Accept (L1A) decision on the basis of lists of selection criteria (trigger menus). In addition to the event-selection decision, the CTP also provides trigger summary information to the Level-2 trigger and the data acquisition system. It further provides accumulated and bunch-by-bunch scaler data for monitoring of the trigger, detector and beam conditions. The CTP is presented and results are shown from tests with the calorimeter adn muon trigger processors connected to detectors in a particle beam, as well as from stand-alone full-system tests in the laboratory which were used to validate the CTP.

A Processor-Sharing Scheduling Strategy for NFV Nodes

Directory of Open Access Journals (Sweden)

Giuseppe Faraci

2016-01-01

Full Text Available The introduction of the two paradigms SDN and NFV to “softwarize” the current Internet is making management and resource allocation two key challenges in the evolution towards the Future Internet. In this context, this paper proposes Network-Aware Round Robin (NARR, a processor-sharing strategy, to reduce delays in traversing SDN/NFV nodes. The application of NARR alleviates the job of the Orchestrator by automatically working at the intranode level, dynamically assigning the processor slices to the virtual network functions (VNFs according to the state of the queues associated with the output links of the network interface cards (NICs. An extensive simulation set is presented to show the improvements achieved with respect to two more processor-sharing strategies chosen as reference.

Processor farming method for multi-scale analysis of masonry structures

Science.gov (United States)

Krejčí, Tomáš; Koudelka, Tomáš

2017-07-01

This paper describes a processor farming method for a coupled heat and moisture transport in masonry using a two-level approach. The motivation for the two-level description comes from difficulties connected with masonry structures, where the size of stone blocks is much larger than the size of mortar layers and very fine finite element mesh has to be used. The two-level approach is suitable for parallel computing because nearly all computations can be performed independently with little synchronization. This approach is called processor farming. The master processor is dealing with the macro-scale level - the structure and the slave processors are dealing with a homogenization procedure on the meso-scale level which is represented by an appropriate representative volume element.

[Improving speech comprehension using a new cochlear implant speech processor].

Science.gov (United States)

Müller-Deile, J; Kortmann, T; Hoppe, U; Hessel, H; Morsnowski, A

2009-06-01

The aim of this multicenter clinical field study was to assess the benefits of the new Freedom 24 sound processor for cochlear implant (CI) users implanted with the Nucleus 24 cochlear implant system. The study included 48 postlingually profoundly deaf experienced CI users who demonstrated speech comprehension performance with their current speech processor on the Oldenburg sentence test (OLSA) in quiet conditions of at least 80% correct scores and who were able to perform adaptive speech threshold testing using the OLSA in noisy conditions. Following baseline measures of speech comprehension performance with their current speech processor, subjects were upgraded to the Freedom 24 speech processor. After a take-home trial period of at least 2 weeks, subject performance was evaluated by measuring the speech reception threshold with the Freiburg multisyllabic word test and speech intelligibility with the Freiburg monosyllabic word test at 50 dB and 70 dB in the sound field. The results demonstrated highly significant benefits for speech comprehension with the new speech processor. Significant benefits for speech comprehension were also demonstrated with the new speech processor when tested in competing background noise.In contrast, use of the Abbreviated Profile of Hearing Aid Benefit (APHAB) did not prove to be a suitably sensitive assessment tool for comparative subjective self-assessment of hearing benefits with each processor. Use of the preprocessing algorithm known as adaptive dynamic range optimization (ADRO) in the Freedom 24 led to additional improvements over the standard upgrade map for speech comprehension in quiet and showed equivalent performance in noise. Through use of the preprocessing beam-forming algorithm BEAM, subjects demonstrated a highly significant improved signal-to-noise ratio for speech comprehension thresholds (i.e., signal-to-noise ratio for 50% speech comprehension scores) when tested with an adaptive procedure using the Oldenburg

Hardware processor for tracking particles in an alternating-gradient synchrotron

International Nuclear Information System (INIS)

Johnson, M.; Avilez, C.

1987-01-01

We discuss the design and performance of special-purpose processors for tracking particles through an alternating-gradient synchrotron. We present block diagram designs for two hardware processors. Both processors use algorithms based on the 'kick' approximation, i.e., transport matrices are used for dipoles and quadrupoles, and the thin-lens approximation is used for all higher multipoles. The faster processor makes extensive use of memory look-up tables for evaluating functions. For the case of magnets with multipoles up to pole 30 and using one kick per magnet, this processor can track 19 particles through an accelerator at a rate that is only 220 times slower than the time it takes real particles to travel around the machine. For a model consisting of only thin lenses, it is only 150 times slower than real particles. An additional factor of 2 can be obtained with chips now becoming available. The number of magnets in the accelerator is limited only by the amount of memory available for storing magnet parameters. (author) 20 refs., 7 figs., 2 tabs

The use of radar for bathymetry assessment

OpenAIRE

Aardoom, J.H.; Greidanus, H.S.F.

1998-01-01

The bottom topography in shallow seas can be observed by air- and spaceborne imaging radar. Bathymetric information derived from radar data is limited in accuracy, but radar has a good spatial coverage. The accuracy can be increased by assimilating the radar imagery into existing or insitu gathered bathymetric data. The paper reviews the concepts of bathymetry assessment by radar, the radar imaging mechanism, and the possibilities and limitations of the use of radar data in rapid assessment.

High-speed special-purpose processor for event selection by number of direct tracks

International Nuclear Information System (INIS)

Kalinnikov, V.A.; Krastev, V.R.; Chudakov, E.A.

1986-01-01

A processor which uses data on events from five detector planes is described. To increase economy and speed in parallel processing, the processor converts the input data to superposition code and recognizes tracks by a generated search mask. The resolving time of the processor is ≤300 nsec. The processor is CAMAC-compatible and uses ECL integrated circuits

Multibus-based parallel processor for simulation

Science.gov (United States)

Ogrady, E. P.; Wang, C.-H.

1983-01-01

A Multibus-based parallel processor simulation system is described. The system is intended to serve as a vehicle for gaining hands-on experience, testing system and application software, and evaluating parallel processor performance during development of a larger system based on the horizontal/vertical-bus interprocessor communication mechanism. The prototype system consists of up to seven Intel iSBC 86/12A single-board computers which serve as processing elements, a multiple transmission controller (MTC) designed to support system operation, and an Intel Model 225 Microcomputer Development System which serves as the user interface and input/output processor. All components are interconnected by a Multibus/IEEE 796 bus. An important characteristic of the system is that it provides a mechanism for a processing element to broadcast data to other selected processing elements. This parallel transfer capability is provided through the design of the MTC and a minor modification to the iSBC 86/12A board. The operation of the MTC, the basic hardware-level operation of the system, and pertinent details about the iSBC 86/12A and the Multibus are described.

Monitoring the performance of off-site processors

International Nuclear Information System (INIS)

Miller, C.C.

1995-01-01

Commercial nuclear power plants have been able to utilize the latest technologies and achieve large volume reduction by obtaining off-site waste processor services. Although the use of such services reduce the burden of waste processing it also reduces the utility's control over the process. Monitoring the performance of off-site processors is important so that the utility is cognizant of the waste disposition for required regulatory reporting. In addition to obtaining data for Reg Guide 1.21 reporting, Performance monitoring is important to determine which vendor and which services to utilize. Off-site processor services were initially offered for the decontamination of metallic waste. Since that time the list of services has expanded to include supercompaction, survey for release, incineration and metal melting. The number of vendors offering off-site services has increased and the services they offer vary. processing rates vary between vendors and have different charge bases. Determining which vendor to use for what service can be complicated and confusing

Digital Signal Processor System for AC Power Drivers

Directory of Open Access Journals (Sweden)

Ovidiu Neamtu

2009-10-01

Full Text Available DSP (Digital Signal Processor is the bestsolution for motor control systems to make possible thedevelopment of advanced motor drive systems. The motorcontrol processor calculates the required motor windingvoltage magnitude and frequency to operate the motor atthe desired speed. A PWM (Pulse Width Modulationcircuit controls the on and off duty cycle of the powerinverter switches to vary the magnitude of the motorvoltages.

Early experience with the cochlear ESPrit ear-level speech processor in children.

Science.gov (United States)

Totten, C; Cope, Y; McCormick, B

2000-12-01

The ESPrit ear-level speech processor has recently become available in the United Kingdom for use with the Nucleus CI24M multichannel cochlear implant. We report on the use of this ear-level processor with 6 children, ages 8 to 15 years. In this study, all patients were initially fitted with the SPrint body-worn processor, this being a prerequisite for programming the ESPrit. Five of the children were fitted successfully with the ESPrit and are using their devices consistently. The results show that patient experience with the ESPrit has been favorable, although there have been some device and programming difficulties. Aided threshold measures show that the ESPrit processor performs at least as well as the SPrint processor, with a trend toward improved aided thresholds for the ESPrit processor compared with the SPrint processor. Further study of the functional benefit of both of these devices may confirm these potential gains. The ESPrit device currently has a disadvantage for children in that it does not support FM radio hearing aid use. Finally, caution is advised in the fitting of the ESPrit in very young children or inexperienced listeners, because of difficulties in monitoring device function.

Survey of cochlear implant user satisfaction with the Neptune™ waterproof sound processor

Directory of Open Access Journals (Sweden)

Jeroen J. Briaire

2016-04-01

Full Text Available A multi-center self-assessment survey was conducted to evaluate patient satisfaction with the Advanced Bionics Neptune™ waterproof sound processor used with the AquaMic™ totally submersible microphone. Subjective satisfaction with the different Neptune™ wearing options, comfort, ease of use, sound quality and use of the processor in a range of active and water related situations were assessed for 23 adults and 73 children, using an online and paper based questionnaire. Upgraded subjects compared their previous processor to the Neptune™. The Neptune™ was most popular for use in general sports and in the pool. Subjects were satisfied with the sound quality of the sound processor outside and under water and following submersion. Seventyeight percent of subjects rated waterproofness as being very useful and 83% of the newly implanted subjects selected waterproofness as one of the reasons why they chose the Neptune™ processor. Providing a waterproof sound processor is considered by cochlear implant recipients to be useful and important and is a factor in their processor choice. Subjects reported that they were satisfied with the Neptune™ sound quality, ease of use and different wearing options.

A word processor optimized for preparing journal articles and student papers.

Science.gov (United States)

Wolach, A H; McHale, M A

2001-11-01

A new Windows-based word processor for preparing journal articles and student papers is described. In addition to standard features found in word processors, the present word processor provides specific help in preparing manuscripts. Clicking on "Reference Help (APA Form)" in the "File" menu provides a detailed help system for entering the references in a journal article. Clicking on "Examples and Explanations of APA Form" provides a help system with examples of the various sections of a review article, journal article that has one experiment, or journal article that has two or more experiments. The word processor can automatically place the manuscript page header and page number at the top of each page using the form required by APA and Psychonomic Society journals. The "APA Form" submenu of the "Help" menu provides detailed information about how the word processor is optimized for preparing articles and papers.

Extended performance electric propulsion power processor design study. Volume 2: Technical summary

Science.gov (United States)

Biess, J. J.; Inouye, L. Y.; Schoenfeld, A. D.

1977-01-01

Electric propulsion power processor technology has processed during the past decade to the point that it is considered ready for application. Several power processor design concepts were evaluated and compared. Emphasis was placed on a 30 cm ion thruster power processor with a beam power rating supply of 2.2KW to 10KW for the main propulsion power stage. Extension in power processor performance were defined and were designed in sufficient detail to determine efficiency, component weight, part count, reliability and thermal control. A detail design was performed on a microprocessor as the thyristor power processor controller. A reliability analysis was performed to evaluate the effect of the control electronics redesign. Preliminary electrical design, mechanical design and thermal analysis were performed on a 6KW power transformer for the beam supply. Bi-Mod mechanical, structural and thermal control configurations were evaluated for the power processor and preliminary estimates of mechanical weight were determined.

First Results of an “Artificial Retina” Processor Prototype

International Nuclear Information System (INIS)

Cenci, Riccardo; Bedeschi, Franco; Marino, Pietro; Morello, Michael J.; Ninci, Daniele; Piucci, Alessio; Punzi, Giovanni; Ristori, Luciano; Spinella, Franco; Stracka, Simone; Tonelli, Diego; Walsh, John

2016-01-01

We report on the performance of a specialized processor capable of reconstructing charged particle tracks in a realistic LHC silicon tracker detector, at the same speed of the readout and with sub-microsecond latency. The processor is based on an innovative pattern-recognition algorithm, called “artificial retina algorithm”, inspired from the vision system of mammals. A prototype of the processor has been designed, simulated, and implemented on Tel62 boards equipped with high-bandwidth Altera Stratix III FPGA devices. The prototype is the first step towards a real-time track reconstruction device aimed at processing complex events of high-luminosity LHC experiments at 40 MHz crossing rate

Interception of LPI radar signals

Science.gov (United States)

Lee, Jim P.

1991-11-01

Most current radars are designed to transmit short duration pulses with relatively high peak power. These radars can be detected easily by the use of relatively modest EW intercept receivers. Three radar functions (search, anti-ship missile (ASM) seeker, and navigation) are examined to evaluate the effectiveness of potential low probability of intercept (LPI) techniques, such as waveform coding, antenna profile control, and power management that a radar may employ against current Electronic Warfare (EW) receivers. The general conclusion is that it is possible to design a LPI radar which is effective against current intercept EW receivers. LPI operation is most easily achieved at close ranges and against a target with a large radar cross section. The general system sensitivity requirement for the detection of current and projected LPI radars is found to be on the order of -100 dBmi which cannot be met by current EW receivers. Finally, three potential LPI receiver architectures, using channelized, superhet, and acousto-optic receivers with narrow RF and video bandwidths are discussed. They have shown some potential in terms of providing the sensitivity and capability in an environment where both conventional and LPI signals are present.

Air and spaceborne radar systems an introduction

CERN Document Server

Lacomme, Philippe; Hardange, Jean-Philippe; Normant, Eric

2001-01-01

A practical tool on radar systems that will be of major help to technicians, student engineers and engineers working in industry and in radar research and development. The many users of radar as well as systems engineers and designers will also find it highly useful. Also of interest to pilots and flight engineers and military command personnel and military contractors. """"This introduction to the field of radar is intended for actual users of radar. It focuses on the history, main principles, functions, modes, properties and specific nature of modern airborne radar. The book examines radar's

Human walking estimation with radar

NARCIS (Netherlands)

Dorp, Ph. van; Groen, F.C.A.

2003-01-01

Radar can be used to observe humans that are obscured by objects such as walls. These humans cannot be visually observed. The radar measurements are used to animate an obscured human in virtual reality. This requires detailed information about the motion. The radar measurements give detailed

Nonlinear Wave Simulation on the Xeon Phi Knights Landing Processor

Science.gov (United States)

Hristov, Ivan; Goranov, Goran; Hristova, Radoslava

2018-02-01

We consider an interesting from computational point of view standing wave simulation by solving coupled 2D perturbed Sine-Gordon equations. We make an OpenMP realization which explores both thread and SIMD levels of parallelism. We test the OpenMP program on two different energy equivalent Intel architectures: 2× Xeon E5-2695 v2 processors, (code-named "Ivy Bridge-EP") in the Hybrilit cluster, and Xeon Phi 7250 processor (code-named "Knights Landing" (KNL). The results show 2 times better performance on KNL processor.

M7--a high speed digital processor for second level trigger selections

International Nuclear Information System (INIS)

Droege, T.F.; Gaines, I.; Turner, K.J.

1978-01-01

A digital processor is described which reconstructs mass and momentum as a second-level trigger selection. The processor is a five-address, microprogramed, pipelined, ECL machine with simultaneous memory access to four operands which load two parallel multipliers and an ALU. Source data modules are extensions of the processor

FMWC Radar for Breath Detection

DEFF Research Database (Denmark)

Suhr, Lau Frejstrup; Tafur Monroy, Idelfonso; Vegas Olmos, Juan José

We report on the experimental demonstration of an FMCW radar operating in the 25.7 - 26.6 GHz range with a repetition rate of 500 sweeps per second. The radar is able to track the breathing rate of an adult human from a distance of 1 meter. The experiments have utilized a 50 second recording window...... to accurately track the breathing rate. The radar utilizes a saw tooth modulation format and a low latency receiver. A breath tracking radar is useful both in medical scenarios, diagnosing disorders such as sleep apnea, and for home use where the user can monitor its health. Breathing is a central part of every...... radar chip which, through the use of a simple modulation scheme, is able to measure the breathing rate of an adult human from a distance. A high frequency output makes sure that the radar cannot penetrate solid obstacles which is a wanted feature in private homes where people therefore cannot measure...

Radar meteor rates and solar activity

International Nuclear Information System (INIS)

Prikryl, P.

1983-01-01

The short-term variation of diurnal radar meteor rates with solar activity represented by solar microwave flux Fsub(10.7), and sunspots relative number Rsub(z), is investigated. Applying the superposed-epoch analysis to the observational material of radar meteor rates from Christchurch (1960-61 and 1963-65), a decrease in the recorded radar rates is found during days of enhanced solar activity. No effect of geomagnetic activity similar to the one reported for the Swedish and Canadian radar meteor data was found by the author in the Christchurch data. A possible explanation of the absence of the geomagnetic effect on radar meteor rates from New Zealand due to a lower echo ceiling height of the Christchurch radar is suggested. The variation of the atmospheric parameters as a possible cause of the observed variation in radar meteor rates is also discussed. (author)

Radar cross section

CERN Document Server

Knott, Gene; Tuley, Michael

2004-01-01

This is the second edition of the first and foremost book on this subject for self-study, training, and course work. Radar cross section (RCS) is a comparison of two radar signal strengths. One is the strength of the radar beam sweeping over a target, the other is the strength of the reflected echo sensed by the receiver. This book shows how the RCS ?gauge? can be predicted for theoretical objects and how it can be measured for real targets. Predicting RCS is not easy, even for simple objects like spheres or cylinders, but this book explains the two ?exact? forms of theory so well that even a

Classification and correction of the radar bright band with polarimetric radar

Science.gov (United States)

Hall, Will; Rico-Ramirez, Miguel; Kramer, Stefan

2015-04-01

The annular region of enhanced radar reflectivity, known as the Bright Band (BB), occurs when the radar beam intersects a layer of melting hydrometeors. Radar reflectivity is related to rainfall through a power law equation and so this enhanced region can lead to overestimations of rainfall by a factor of up to 5, so it is important to correct for this. The BB region can be identified by using several techniques including hydrometeor classification and freezing level forecasts from mesoscale meteorological models. Advances in dual-polarisation radar measurements and continued research in the field has led to increased accuracy in the ability to identify the melting snow region. A method proposed by Kitchen et al (1994), a form of which is currently used operationally in the UK, utilises idealised Vertical Profiles of Reflectivity (VPR) to correct for the BB enhancement. A simpler and more computationally efficient method involves the formation of an average VPR from multiple elevations for correction that can still cause a significant decrease in error (Vignal 2000). The purpose of this research is to evaluate a method that relies only on analysis of measurements from an operational C-band polarimetric radar without the need for computationally expensive models. Initial results show that LDR is a strong classifier of melting snow with a high Critical Success Index of 97% when compared to the other variables. An algorithm based on idealised VPRs resulted in the largest decrease in error when BB corrected scans are compared to rain gauges and to lower level scans with a reduction in RMSE of 61% for rain-rate measurements. References Kitchen, M., R. Brown, and A. G. Davies, 1994: Real-time correction of weather radar data for the effects of bright band, range and orographic growth in widespread precipitation. Q.J.R. Meteorol. Soc., 120, 1231-1254. Vignal, B. et al, 2000: Three methods to determine profiles of reflectivity from volumetric radar data to correct

Discussion paper for a highly parallel array processor-based machine

International Nuclear Information System (INIS)

Hagstrom, R.; Bolotin, G.; Dawson, J.

1984-01-01

The architectural plant for a quickly realizable implementation of a highly parallel special-purpose computer system with peak performance in the range of 6 billion floating point operations per second is discussed. The architecture is suitable to Lattice Gauge theoretical computations of fundamental physics interest and may be applicable to a range of other problems which deal with numerically intensive computational problems. The plan is quickly realizable because it employs a maximum of commercially available hardware subsystems and because the architecture is software-transparent to the individual processors, allowing straightforward re-use of whatever commercially available operating-systems and support software that is suitable to run on the commercially-produced processors. A tiny prototype instrument, designed along this architecture has already operated. A few elementary examples of programs which can run efficiently are presented. The large machine which the authors would propose to build would be based upon a highly competent array-processor, the ST-100 Array Processor, and specific design possibilities are discussed. The first step toward realizing this plan practically is to install a single ST-100 to allow algorithm development to proceed while a demonstration unit is built using two of the ST-100 Array Processors

SSC 254 Screen-Based Word Processors: Production Tests. The Lanier Word Processor.

Science.gov (United States)

Moyer, Ruth A.

Designed for use in Trident Technical College's Secretarial Lab, this series of 12 production tests focuses on the use of the Lanier Word Processor for a variety of tasks. In tests 1 and 2, students are required to type and print out letters. Tests 3 through 8 require students to reformat a text; make corrections on a letter; divide and combine…

Performance of Artificial Intelligence Workloads on the Intel Core 2 Duo Series Desktop Processors

OpenAIRE

Abdul Kareem PARCHUR; Kuppangari Krishna RAO; Fazal NOORBASHA; Ram Asaray SINGH

2010-01-01

As the processor architecture becomes more advanced, Intel introduced its Intel Core 2 Duo series processors. Performance impact on Intel Core 2 Duo processors are analyzed using SPEC CPU INT 2006 performance numbers. This paper studied the behavior of Artificial Intelligence (AI) benchmarks on Intel Core 2 Duo series processors. Moreover, we estimated the task completion time (TCT) @1 GHz, @2 GHz and @3 GHz Intel Core 2 Duo series processors frequency. Our results show the performance scalab...

Nonlinear Wave Simulation on the Xeon Phi Knights Landing Processor

Directory of Open Access Journals (Sweden)

Hristov Ivan

2018-01-01

Full Text Available We consider an interesting from computational point of view standing wave simulation by solving coupled 2D perturbed Sine-Gordon equations. We make an OpenMP realization which explores both thread and SIMD levels of parallelism. We test the OpenMP program on two different energy equivalent Intel architectures: 2× Xeon E5-2695 v2 processors, (code-named “Ivy Bridge-EP” in the Hybrilit cluster, and Xeon Phi 7250 processor (code-named “Knights Landing” (KNL. The results show 2 times better performance on KNL processor.

46 CFR 184.404 - Radars.

Science.gov (United States)

2010-10-01

... within one mile of land must be fitted with a FCC Type Accepted general marine radar system for surface... Federal Communications Commission (FCC) type accepted general marine radar system for surface navigation... 46 Shipping 7 2010-10-01 2010-10-01 false Radars. 184.404 Section 184.404 Shipping COAST GUARD...

HTGR core seismic analysis using an array processor

International Nuclear Information System (INIS)

Shatoff, H.; Charman, C.M.

1983-01-01

A Floating Point Systems array processor performs nonlinear dynamic analysis of the high-temperature gas-cooled reactor (HTGR) core with significant time and cost savings. The graphite HTGR core consists of approximately 8000 blocks of various shapes which are subject to motion and impact during a seismic event. Two-dimensional computer programs (CRUNCH2D, MCOCO) can perform explicit step-by-step dynamic analyses of up to 600 blocks for time-history motions. However, use of two-dimensional codes was limited by the large cost and run times required. Three-dimensional analysis of the entire core, or even a large part of it, had been considered totally impractical. Because of the needs of the HTGR core seismic program, a Floating Point Systems array processor was used to enhance computer performance of the two-dimensional core seismic computer programs, MCOCO and CRUNCH2D. This effort began by converting the computational algorithms used in the codes to a form which takes maximum advantage of the parallel and pipeline processors offered by the architecture of the Floating Point Systems array processor. The subsequent conversion of the vectorized FORTRAN coding to the array processor required a significant programming effort to make the system work on the General Atomic (GA) UNIVAC 1100/82 host. These efforts were quite rewarding, however, since the cost of running the codes has been reduced approximately 50-fold and the time threefold. The core seismic analysis with large two-dimensional models has now become routine and extension to three-dimensional analysis is feasible. These codes simulate the one-fifth-scale full-array HTGR core model. This paper compares the analysis with the test results for sine-sweep motion

Radar network communication through sensing of frequency hopping

Science.gov (United States)

Dowla, Farid; Nekoogar, Faranak

2013-05-28

In one embodiment, a radar communication system includes a plurality of radars having a communication range and being capable of operating at a sensing frequency and a reporting frequency, wherein the reporting frequency is different than the sensing frequency, each radar is adapted for operating at the sensing frequency until an event is detected, each radar in the plurality of radars has an identification/location frequency for reporting information different from the sensing frequency, a first radar of the radars which senses the event sends a reporting frequency corresponding to its identification/location frequency when the event is detected, and all other radars in the plurality of radars switch their reporting frequencies to match the reporting frequency of the first radar upon detecting the reporting frequency switch of a radar within the communication range. In another embodiment, a method is presented for communicating information in a radar system.

Sensor management in RADAR/IRST track fusion

Science.gov (United States)

Hu, Shi-qiang; Jing, Zhong-liang

2004-07-01

In this paper, a novel radar management strategy technique suitable for RADAR/IRST track fusion, which is based on Fisher Information Matrix (FIM) and fuzzy stochastic decision approach, is put forward. Firstly, optimal radar measurements' scheduling is obtained by the method of maximizing determinant of the Fisher information matrix of radar and IRST measurements, which is managed by the expert system. Then, suggested a "pseudo sensor" to predict the possible target position using the polynomial method based on the radar and IRST measurements, using "pseudo sensor" model to estimate the target position even if the radar is turned off. At last, based on the tracking performance and the state of target maneuver, fuzzy stochastic decision is used to adjust the optimal radar scheduling and retrieve the module parameter of "pseudo sensor". The experiment result indicates that the algorithm can not only limit Radar activity effectively but also keep the tracking accuracy of active/passive system well. And this algorithm eliminates the drawback of traditional Radar management methods that the Radar activity is fixed and not easy to control and protect.

A single chip pulse processor for nuclear spectroscopy

International Nuclear Information System (INIS)

Hilsenrath, F.; Bakke, J.C.; Voss, H.D.

1985-01-01

A high performance digital pulse processor, integrated into a single gate array microcircuit, has been developed for spaceflight applications. The new approach takes advantage of the latest CMOS high speed A/D flash converters and low-power gated logic arrays. The pulse processor measures pulse height, pulse area and the required timing information (e.g. multi detector coincidence and pulse pile-up detection). The pulse processor features high throughput rate (e.g. 0.5 Mhz for 2 usec gausssian pulses) and improved differential linearity (e.g. + or - 0.2 LSB for a + or - 1 LSB A/D). Because of the parallel digital architecture of the device, the interface is microprocessor bus compatible. A satellite flight application of this module is presented for use in the X-ray imager and high energy particle spectrometers of the PEM experiment on the Upper Atmospheric Research Satellite

ISTEF Laser Radar Program

National Research Council Canada - National Science Library

Stryjewski, John

1998-01-01

The BMDO Innovative Science and Technology Experimentation Facility (BMDO/ISTEF) laser radar program is engaged in an ongoing program to develop and demonstrate advanced laser radar concepts for Ballistic Missile Defense (BMD...

UA1 upgrade first-level calorimeter trigger processor

International Nuclear Information System (INIS)

Bains, N.; Charlton, D.; Ellis, N.; Garvey, J.; Gregory, J.; Jimack, M.P.; Jovanovic, P.; Kenyon, I.R.; Baird, S.A.; Campbell, D.; Cawthraw, M.; Coughlan, J.; Flynn, P.; Galagedera, S.; Grayer, G.; Halsall, R.; Shah, T.P.; Stephens, R.; Eisenhandler, E.; Fensome, I.; Landon, M.

1989-01-01

A new first-level trigger processor has been built for the UA1 experiment on the Cern SppS Collider. The processor exploits the fine granularity of the new UA1 uranium-TMP calorimeter to improve the selectivity of the trigger. The new electron trigger has improved hadron jet rejection, achieved by requiring low energy deposition around the electromagnetic cluster. A missing transverse energy trigger and a total energy trigger have also been implemented. (orig.)

Application of the Computer Capacity to the Analysis of Processors Evolution

OpenAIRE

Ryabko, Boris; Rakitskiy, Anton

2017-01-01

The notion of computer capacity was proposed in 2012, and this quantity has been estimated for computers of different kinds. In this paper we show that, when designing new processors, the manufacturers change the parameters that affect the computer capacity. This allows us to predict the values of parameters of future processors. As the main example we use Intel processors, due to the accessibility of detailed description of all their technical characteristics.

Optimal processor for malfunction detection in operating nuclear reactor

International Nuclear Information System (INIS)

Ciftcioglu, O.

1990-01-01

An optimal processor for diagnosing operational transients in a nuclear reactor is described. Basic design of the processor involves real-time processing of noise signal obtained from a particular in core sensor and the optimality is based on minimum alarm failure in contrast to minimum false alarm criterion from the safe and reliable plant operation viewpoint

An updated program-controlled analog processor, model AP-006, for semiconductor detector spectrometers

International Nuclear Information System (INIS)

Shkola, N.F.; Shevchenko, Yu.A.

1989-01-01

An analog processor, model AP-006, is reported. The processor is a development of a series of spectrometric units based on a shaper of the type 'DL dif +TVS+gated ideal integrator'. Structural and circuits design features are described. The results of testing the processor in a setup with a Si(Li) detecting unit over an input count-rate range of up to 5x10 5 cps are presented. Processor applications are illustrated. (orig.)

Radar and electronic navigation

CERN Document Server

Sonnenberg, G J

2013-01-01

Radar and Electronic Navigation, Sixth Edition discusses radar in marine navigation, underwater navigational aids, direction finding, the Decca navigator system, and the Omega system. The book also describes the Loran system for position fixing, the navy navigation satellite system, and the global positioning system (GPS). It reviews the principles, operation, presentations, specifications, and uses of radar. It also describes GPS, a real time position-fixing system in three dimensions (longitude, latitude, altitude), plus velocity information with Universal Time Coordinated (UTC). It is accur

Intelligent trigger processor for the crystal box

International Nuclear Information System (INIS)

Sanders, G.H.; Butler, H.S.; Cooper, M.D.

1981-01-01

A large solid angle modular NaI(Tl) detector with 432 phototubes and 88 trigger scintillators is being used to search simultaneously for three lepton flavor changing decays of muon. A beam of up to 10 6 muons stopping per second with a 6% duty factor would yield up to 1000 triggers per second from random triple coincidences. A reduction of the trigger rate to 10 Hz is required from a hardwired primary trigger processor described in this paper. Further reduction to < 1 Hz is achieved by a microprocessor based secondary trigger processor. The primary trigger hardware imposes voter coincidence logic, stringent timing requirements, and a non-adjacency requirement in the trigger scintillators defined by hardwired circuits. Sophisticated geometric requirements are imposed by a PROM-based matrix logic, and energy and vector-momentum cuts are imposed by a hardwired processor using LSI flash ADC's and digital arithmetic loci. The secondary trigger employs four satellite microprocessors to do a sparse data scan, multiplex the data acquisition channels and apply additional event filtering

Weather Radar Impact Zones

Data.gov (United States)

National Oceanic and Atmospheric Administration, Department of Commerce — These data represent an inventory of the national impacts of wind turbine interference with NEXRAD radar stations. This inventory was developed by the NOAA Radar...

40 CFR 80.840 - What requirements apply to transmix processors?

Science.gov (United States)

2010-07-01

... PROGRAMS (CONTINUED) REGULATION OF FUELS AND FUEL ADDITIVES Gasoline Toxics Gasoline Toxics Performance Requirements § 80.840 What requirements apply to transmix processors? Any transmix processor who produces gasoline or gasoline blendstock from transmix, or recovers gasoline or gasoline blendstock from transmix...

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

CERN Document Server

Biesuz, Nicolo Vladi; The ATLAS collaboration; Luciano, Pierluigi; Magalotti, Daniel; Rossi, Enrico

2015-01-01

The Associative Memory (AM) system of the Fast Tracker (FTK) processor has been designed to perform pattern matching using the hit information of the ATLAS experiment silicon tracker. The AM is the heart of FTK and is mainly based on the use of ASICs (AM chips) designed on purpose to execute pattern matching with a high degree of parallelism. It finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside FTK, multiple board and chip designs have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 2 Gb/s serial links. This paper reports on the design of the Serial Link Processor consisting of two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. We report on the performance of the intermedia...

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

CERN Document Server

Andreani, A; The ATLAS collaboration; Beccherle, R; Beretta, M; Cipriani, R; Citraro, S; Citterio, M; Colombo, A; Crescioli, F; Dimas, D; Donati, S; Giannetti, P; Kordas, K; Lanza, A; Liberali, V; Luciano, P; Magalotti, D; Neroutsos, P; Nikolaidis, S; Piendibene, M; Sakellariou, A; Shojaii, S; Sotiropoulou, C-L; Stabile, A

2014-01-01

The Associative Memory (AM) system of the FTK processor has been designed to perform pattern matching using the hit information of the ATLAS silicon tracker. The AM is the heart of the FTK and it finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside the FTK, multiple designs and tests have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 2 Gb/s serial links. This paper reports on the design of the Serial Link Processor consisting of the AM chip, an ASIC designed and optimized to perform pattern matching, and two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. Special relevance will be given to the AMchip design that includes two custom cells optimized for low consumption. We repo...

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

CERN Document Server

Biesuz, Nicolo Vladi; The ATLAS collaboration; Luciano, Pierluigi; Magalotti, Daniel; Rossi, Enrico

2015-01-01

The Associative Memory (AM) system of the Fast Tracker (FTK) processor has been designed to perform pattern matching using the hit information of the ATLAS experiment silicon tracker. The AM is the heart of FTK and is mainly based on the use of ASICs (AM chips) designed to execute pattern matching with a high degree of parallelism. The AM system finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside FTK, multiple board and chip designs have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 828 2 Gbit/s serial links for a total in/out bandwidth of 56 Gb/s. This paper reports on the design of the Serial Link Processor consisting of two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. ...

Safe and Efficient Support for Embeded Multi-Processors in ADA

Science.gov (United States)

Ruiz, Jose F.

2010-08-01

New software demands increasing processing power, and multi-processor platforms are spreading as the answer to achieve the required performance. Embedded real-time systems are also subject to this trend, but in the case of real-time mission-critical systems, the properties of reliability, predictability and analyzability are also paramount. The Ada 2005 language defined a subset of its tasking model, the Ravenscar profile, that provides the basis for the implementation of deterministic and time analyzable applications on top of a streamlined run-time system. This Ravenscar tasking profile, originally designed for single processors, has proven remarkably useful for modelling verifiable real-time single-processor systems. This paper proposes a simple extension to the Ravenscar profile to support multi-processor systems using a fully partitioned approach. The implementation of this scheme is simple, and it can be used to develop applications amenable to schedulability analysis.

A programmable systolic trigger processor for FERA bus data

International Nuclear Information System (INIS)

Appelquist, G.; Hovander, B.; Sellden, B.; Bohm, C.

1992-09-01

A generic CAMAC based trigger processor module for fast processing of large amounts of ADC data, has been designed. This module has been realised using complex programmable gate arrays (LCAs from XILINX). The gate arrays have been connected to memories and multipliers in such a way that different gate array configurations can cover a wide range of module applications. Using this module, it is possible to construct complex trigger processors. The module uses both the fast ECL FERA bus and the CAMAC bus for inputs and outputs. The latter, however, is primarily used for set-up and control but may also be used for data output. Large numbers of ADCs can be served by a hierarchical arrangement of trigger processor modules, processing ADC data with pipe-line arithmetics producing the final result at the apex of the pyramid. The trigger decision will be transmitted to the data acquisition system via a logic signal while numeric results may be extracted by the CAMAC controller. The trigger processor was originally developed for the proposed neutral particle search experiment at CERN, NUMASS. There it was designed to serve as a second level trigger processor. It was required to correct all ADC raw data for efficiency and pedestal, calculate the total calorimeter energy, obtain the optimal time of flight data and calculate the particle mass. A suitable mass cut would then deliver the trigger decision. More complex triggers were also considered. (au)

Pocket radar guide key facts, equations, and data

CERN Document Server

Curry, G Richard

2010-01-01

ThePocket Radar Guideis a concise collection of key radar facts and important radar data that provides you with necessary radar information when you are away from your office or references. It includes statements and comments on radar design, operation, and performance; equations describing the characteristics and performance of radar systems and their components; and tables with data on radar characteristics and key performance issues.It is intended to supplement other radar information sources by providing a pocket companion to refresh memory and provide details whenever you need them such a

7 CFR 1215.14 - Processor.

Science.gov (United States)

2010-01-01

... 7 Agriculture 10 2010-01-01 2010-01-01 false Processor. 1215.14 Section 1215.14 Agriculture Regulations of the Department of Agriculture (Continued) AGRICULTURAL MARKETING SERVICE (MARKETING AGREEMENTS... CONSUMER INFORMATION Popcorn Promotion, Research, and Consumer Information Order Definitions § 1215.14...

Performance of Artificial Intelligence Workloads on the Intel Core 2 Duo Series Desktop Processors

Directory of Open Access Journals (Sweden)

Abdul Kareem PARCHUR

2010-12-01

Full Text Available As the processor architecture becomes more advanced, Intel introduced its Intel Core 2 Duo series processors. Performance impact on Intel Core 2 Duo processors are analyzed using SPEC CPU INT 2006 performance numbers. This paper studied the behavior of Artificial Intelligence (AI benchmarks on Intel Core 2 Duo series processors. Moreover, we estimated the task completion time (TCT @1 GHz, @2 GHz and @3 GHz Intel Core 2 Duo series processors frequency. Our results show the performance scalability in Intel Core 2 Duo series processors. Even though AI benchmarks have similar execution time, they have dissimilar characteristics which are identified using principal component analysis and dendogram. As the processor frequency increased from 1.8 GHz to 3.167 GHz the execution time is decreased by ~370 sec for AI workloads. In the case of Physics/Quantum Computing programs it was ~940 sec.

Synthetic aperture radar capabilities in development

Energy Technology Data Exchange (ETDEWEB)

Miller, M. [Lawrence Livermore National Lab., CA (United States)

1994-11-15

The Imaging and Detection Program (IDP) within the Laser Program is currently developing an X-band Synthetic Aperture Radar (SAR) to support the Joint US/UK Radar Ocean Imaging Program. The radar system will be mounted in the program`s Airborne Experimental Test-Bed (AETB), where the initial mission is to image ocean surfaces and better understand the physics of low grazing angle backscatter. The Synthetic Aperture Radar presentation will discuss its overall functionality and a brief discussion on the AETB`s capabilities. Vital subsystems including radar, computer, navigation, antenna stabilization, and SAR focusing algorithms will be examined in more detail.

Extended Target Recognition in Cognitive Radar Networks

Directory of Open Access Journals (Sweden)

Xiqin Wang

2010-11-01

Full Text Available We address the problem of adaptive waveform design for extended target recognition in cognitive radar networks. A closed-loop active target recognition radar system is extended to the case of a centralized cognitive radar network, in which a generalized likelihood ratio (GLR based sequential hypothesis testing (SHT framework is employed. Using Doppler velocities measured by multiple radars, the target aspect angle for each radar is calculated. The joint probability of each target hypothesis is then updated using observations from different radar line of sights (LOS. Based on these probabilities, a minimum correlation algorithm is proposed to adaptively design the transmit waveform for each radar in an amplitude fluctuation situation. Simulation results demonstrate performance improvements due to the cognitive radar network and adaptive waveform design. Our minimum correlation algorithm outperforms the eigen-waveform solution and other non-cognitive waveform design approaches.

Photonics and Fiber Optics Processor Lab

Data.gov (United States)

Federal Laboratory Consortium — The Photonics and Fiber Optics Processor Lab develops, tests and evaluates high speed fiber optic network components as well as network protocols. In addition, this...

Slowdown in the $M/M/1$ discriminatory processor-sharing queue

NARCIS (Netherlands)

Cheung, S.K.; Kim, Bara; Kim, Jeongsim

2008-01-01

We consider a queue with multiple K job classes, Poisson arrivals, and exponentially distributed required service times in which a single processor serves according to the discriminatory processor-sharing (DPS) discipline. For this queue, we obtain the first and second moments of the slowdown, which

Online Fastbus processor for LEP

International Nuclear Information System (INIS)

Mueller, H.

1986-01-01

The author describes the online computing aspects of Fastbus systems using a processor module which has been developed at CERN and is now available commercially. These General Purpose Master/Slaves (GPMS) are based on 68000/10 (or optionally 68020/68881) processors. Applications include use as event-filters (DELPHI), supervisory controllers, Fastbus stand-alone diagnostic tools, and multiprocessor array components. The direct mapping of single, 32-bit assembly instructions to execute Fastbus protocols makes the use of a GPM both simple and flexible. Loosely coupled processing in Fastbus networks is possible between GPM's as they support access semaphores and use a two port memory as I/O buffer for Fastbus. Both master and slave-ports support block transfers up to 20 Mbytes/s. The CERN standard Fastbus software and the MoniCa symbolic debugging monitor are available on the GPM with real time, multiprocessing support. (Auth.)

Invasive tightly coupled processor arrays

CERN Document Server

LARI, VAHID

2016-01-01

This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desire...

A Modular Pipelined Processor for High Resolution Gamma-Ray Spectroscopy

Science.gov (United States)

Veiga, Alejandro; Grunfeld, Christian

2016-02-01

The design of a digital signal processor for gamma-ray applications is presented in which a single ADC input can simultaneously provide temporal and energy characterization of gamma radiation for a wide range of applications. Applying pipelining techniques, the processor is able to manage and synchronize very large volumes of streamed real-time data. Its modular user interface provides a flexible environment for experimental design. The processor can fit in a medium-sized FPGA device operating at ADC sampling frequency, providing an efficient solution for multi-channel applications. Two experiments are presented in order to characterize its temporal and energy resolution.

A survey of Tumult, a real-time multi-processor system

International Nuclear Information System (INIS)

Jansen, P.G.

1986-01-01

Tumult (Twente University MULTi processor system) is the name of an ongoing project aiming at the design and implementation of a modular extendible multiprocessor system. All memory is distributed and processors communicate in parallel via a fast and reliable local switching network instead of a shared bus. A distributed real-time operating system is being designed and implemented, consisting of a multi-tasking subsystem per processor. Processes can communicate via a message passing mechanism. Communication links and processes are dynamically created and disposed by the application. In this article a brief description of the system is given; communication aspects are emphasized. (Auth.)

Reaction-diffusion path planning in a hybrid chemical and cellular-automaton processor

International Nuclear Information System (INIS)

Adamatzky, Andrew; Lacy Costello, Benjamin de

2003-01-01

To find the shortest collision-free path in a room containing obstacles we designed a chemical processor and coupled it with a cellular-automaton processor. In the chemical processor obstacles are represented by sites of high concentration of potassium iodide and a planar substrate is saturated with palladium chloride. Potassium iodide diffuses into the substrate and reacts with palladium chloride. A dark coloured precipitate of palladium iodide is formed almost everywhere except sites where two or more diffusion wavefronts collide. The less coloured sites are situated at the furthest distance from obstacles. Thus, the chemical processor develops a repulsive field, generated by obstacles. A snapshot of the chemical processor is inputted to a cellular automaton. The automaton behaves like a discrete excitable media; also, every cell of the automaton is supplied with a pointer that shows an origin of the cell's excitation. The excitation spreads along the cells corresponding to precipitate depleted sites of the chemical processor. When the destination-site is excited, waves travel on the lattice and update the orientations of the pointers. Thus, the automaton constructs a spanning tree, made of pointers, that guides a traveler towards the destination point. Thus, the automaton medium generates an attractive field and combination of this attractive field with the repulsive field, generated by the chemical processor, provides us with a solution of the collision-free path problem

A VAX-FPS Loosely-Coupled Array of Processors

International Nuclear Information System (INIS)

Grosdidier, G.

1987-03-01

The main features of a VAX-FPS Loosely-Coupled Array of Processors (LCAP) set-up and the implementation of a High Energy Physics tracking program for off-line purposes will be described. This LCAP consists of a VAX 11/750 host and two FPS 64 bit attached processors. Before analyzing the performances of this LCAP, its characteristics will be outlined, especially from a user's point of vue, and will be briefly compared to those of the IBM-FPS LCAP

Reducing Competitive Cache Misses in Modern Processor Architectures

OpenAIRE

Prisagjanec, Milcho; Mitrevski, Pece

2017-01-01

The increasing number of threads inside the cores of a multicore processor, and competitive access to the shared cache memory, become the main reasons for an increased number of competitive cache misses and performance decline. Inevitably, the development of modern processor architectures leads to an increased number of cache misses. In this paper, we make an attempt to implement a technique for decreasing the number of competitive cache misses in the first level of cache memory. This tec...

16-Bit RISC Processor Design for Convolution Application

OpenAIRE

Anand Nandakumar Shardul

2013-01-01

In this project, we propose a 16-bit non-pipelined RISC processor, which is used for signal processing applications. The processor consists of the blocks, namely, program counter, clock control unit, ALU, IDU and registers. Advantageous architectural modifications have been made in the incremented circuit used in program counter and carry select adder unit of the ALU in the RISC CPU core. Furthermore, a high speed and low power modified modifies multiplier has been designed and introduced in ...

Detection of Weather Radar Clutter

DEFF Research Database (Denmark)

Bøvith, Thomas

2008-01-01

classification and use a range of different techniques and input data. The first method uses external information from multispectral satellite images to detect clutter. The information in the visual, near-infrared, and infrared parts of the spectrum can be used to distinguish between cloud and cloud-free areas......Weather radars provide valuable information on precipitation in the atmosphere but due to the way radars work, not only precipitation is observed by the weather radar. Weather radar clutter, echoes from non-precipitating targets, occur frequently in the data, resulting in lowered data quality....... Especially in the application of weather radar data in quantitative precipitation estimation and forecasting a high data quality is important. Clutter detection is one of the key components in achieving this goal. This thesis presents three methods for detection of clutter. The methods use supervised...

Modal Processor Effects Inspired by Hammond Tonewheel Organs

Directory of Open Access Journals (Sweden)

Kurt James Werner

2016-06-01

Full Text Available In this design study, we introduce a novel class of digital audio effects that extend the recently introduced modal processor approach to artificial reverberation and effects processing. These pitch and distortion processing effects mimic the design and sonics of a classic additive-synthesis-based electromechanical musical instrument, the Hammond tonewheel organ. As a reverb effect, the modal processor simulates a room response as the sum of resonant filter responses. This architecture provides precise, interactive control over the frequency, damping, and complex amplitude of each mode. Into this framework, we introduce two types of processing effects: pitch effects inspired by the Hammond organ’s equal tempered “tonewheels”, “drawbar” tone controls, vibrato/chorus circuit, and distortion effects inspired by the pseudo-sinusoidal shape of its tonewheels and electromagnetic pickup distortion. The result is an effects processor that imprints the Hammond organ’s sonics onto any audio input.

Safety-critical Java on a time-predictable processor

DEFF Research Database (Denmark)

Korsholm, Stephan E.; Schoeberl, Martin; Puffitsch, Wolfgang

2015-01-01

For real-time systems the whole execution stack needs to be time-predictable and analyzable for the worst-case execution time (WCET). This paper presents a time-predictable platform for safety-critical Java. The platform consists of (1) the Patmos processor, which is a time-predictable processor......; (2) a C compiler for Patmos with support for WCET analysis; (3) the HVM, which is a Java-to-C compiler; (4) the HVM-SCJ implementation which supports SCJ Level 0, 1, and 2 (for both single and multicore platforms); and (5) a WCET analysis tool. We show that real-time Java programs translated to C...... and compiled to a Patmos binary can be analyzed by the AbsInt aiT WCET analysis tool. To the best of our knowledge the presented system is the second WCET analyzable real-time Java system; and the first one on top of a RISC processor....

Stepping motor control processor reference manual. Volume I

International Nuclear Information System (INIS)

Holloway, F.W.; VanArsdall, P.J.; Suski, G.J.; Gant, R.G.; Rash, M.

1980-01-01

This manual is intended to serve several purposes. The first goal is to describe the capabilities and operation of the SMC processor package from an operator or user point of view. Secondly, the manual will describe in some detail the basic hardware elements and how they can be used effectively to implement a step motor control system. Practical information on the use, installation and checkout of the hardware set is presented in the following sections along with programming suggestions. Available related system software is described in this manual for reference and as an aid in understanding the system architecture. Section two presents an overview and operations manual of the SMC processor describing its composition and functional capabilities. Section three contains hardware descriptions in some detail for the LLL-designed hardware used in the SMC processor. Basic theory of operation and important features are explained

The Interface Between Redundant Processor Modules Of Safety Grade PLC Using Mass Storage DPRAM

International Nuclear Information System (INIS)

Hwang, Sung Jae; Song, Seong Hwan; No, Young Hun; Yun, Dong Hwa; Park, Gang Min; Kim, Min Gyu; Choi, Kyung Chul; Lee, Ui Taek

2010-01-01

Processor module of safety grade PLC (hereinafter called as POSAFE-Q) developed by POSCO ICT provides high reliability and safety. However, POSAFEQ would have suffered a malfunction when we think taking place of abnormal operation by exceptional environmental. POSAFE-Q would not able to conduct its function normally in such case. To prevent these situations, the necessity of redundant processor module has been raised. Therefore, redundant processor module, NCPU-2Q, has been developed which has not only functions of single processor module with high reliability and safety but also functions of redundant processor

The performances of coffee processors and coffee market in the Republic of Serbia

Directory of Open Access Journals (Sweden)

Nuševa Daniela

2017-01-01

Full Text Available The main aim of this paper is to investigate the performances of coffee processors and coffee market in Serbia based on the market concentration analysis, profitability analysis, and profitability determinants analysis. The research was based on the sample of 40 observations of coffee processing companies divided into two groups: large and small coffee processors. The results indicate that two large coffee processors have dominant market share. Even though the Serbian coffee market is an oligopolistic, profitability analysis indicates that small coffee processors have a significant better profitability ratio than large coffee processors. Furthermore, results show that profitability ratio is positively related to the inventory turnover and negatively related to the market share.

Hardware Synchronization for Embedded Multi-Core Processors

DEFF Research Database (Denmark)

Stoif, Christian; Schoeberl, Martin; Liccardi, Benito

2011-01-01

Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers should look with respect to the strict requirements in the field. We present the step from one to multiple cores in this paper, establi......Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers should look with respect to the strict requirements in the field. We present the step from one to multiple cores in this paper...

Penn State Radar Systems: Implementation and Observations

Science.gov (United States)

Urbina, J. V.; Seal, R.; Sorbello, R.; Kuyeng, K.; Dyrud, L. P.

2014-12-01

Software Defined Radio/Radar (SDR) platforms have become increasingly popular as researchers, hobbyists, and military seek more efficient and cost-effective means for radar construction and operation. SDR platforms, by definition, utilize a software-based interface for configuration in contrast to traditional, hard-wired platforms. In an effort to provide new and improved radar sensing capabilities, Penn State has been developing advanced instruments and technologies for future radars, with primary objectives of making such instruments more capable, portable, and more cost effective. This paper will describe the design and implementation of two low-cost radar systems and their deployment in ionospheric research at both low and mid-latitudes. One radar has been installed near Penn State campus, University Park, Pennsylvania (77.97°W, 40.70°N), to make continuous meteor observations and mid-latitude plasma irregularities. The second radar is being installed in Huancayo (12.05°S, -75.33°E), Peru, which is capable of detecting E and F region plasma irregularities as well as meteor reflections. In this paper, we examine and compare the diurnal and seasonal variability of specular, non- specular, and head-echoes collected with these two new radar systems and discuss sampling biases of each meteor observation technique. We report our current efforts to validate and calibrate these radar systems with other VHF radars such as Jicamarca and SOUSY. We also present the general characteristics of continuous measurements of E-region and F-region coherent echoes using these modern radar systems and compare them with coherent radar events observed at other geographic mid-latitude radar stations.

The microelectronic and photonic test bed RISC processor and DRAM memory stack experiments

International Nuclear Information System (INIS)

Clark, K.A.; Meehan, T.J.

1999-01-01

This paper reports on the on-orbit data obtained from the MPTB RISC Processor Experiment, containing three Integrated Device Technologies R3081 processors. During operations, nine SEUs were observed in the processors, and four SEUs were observed in the memory and/or support circuitry. (authors)

Digital image processing software system using an array processor

International Nuclear Information System (INIS)

Sherwood, R.J.; Portnoff, M.R.; Journeay, C.H.; Twogood, R.E.

1981-01-01

A versatile array processor-based system for general-purpose image processing was developed. At the heart of this system is an extensive, flexible software package that incorporates the array processor for effective interactive image processing. The software system is described in detail, and its application to a diverse set of applications at LLNL is briefly discussed. 4 figures, 1 table

Embedded Processor Based Automatic Temperature Control of VLSI Chips

Directory of Open Access Journals (Sweden)

Narasimha Murthy Yayavaram

2009-01-01

Full Text Available This paper presents embedded processor based automatic temperature control of VLSI chips, using temperature sensor LM35 and ARM processor LPC2378. Due to the very high packing density, VLSI chips get heated very soon and if not cooled properly, the performance is very much affected. In the present work, the sensor which is kept very near proximity to the IC will sense the temperature and the speed of the fan arranged near to the IC is controlled based on the PWM signal generated by the ARM processor. A buzzer is also provided with the hardware, to indicate either the failure of the fan or overheating of the IC. The entire process is achieved by developing a suitable embedded C program.

Design of a search and rescue terminal based on the dual-mode satellite and CDMA network

Science.gov (United States)

Zhao, Junping; Zhang, Xuan; Zheng, Bing; Zhou, Yubin; Song, Hao; Song, Wei; Zhang, Meikui; Liu, Tongze; Zhou, Li

2010-12-01

The current goal is to create a set of portable terminals with GPS/BD2 dual-mode satellite positioning, vital signs monitoring and wireless transmission functions. The terminal depends on an ARM processor to collect and combine data related to vital signs and GPS/BD2 location information, and sends the message to headquarters through the military CDMA network. It integrates multiple functions as a whole. The satellite positioning and wireless transmission capabilities are integrated into the motherboard, and the vital signs sensors used in the form of belts communicate with the board through Bluetooth. It can be adjusted according to the headquarters' instructions. This kind of device is of great practical significance for operations during disaster relief, search and rescue of the wounded in wartime, non-war military operations and other special circumstances.

Solid-state radar switchboard

Science.gov (United States)

Thiebaud, P.; Cross, D. C.

1980-07-01

A new solid-state radar switchboard equipped with 16 input ports which will output data to 16 displays is presented. Each of the ports will handle a single two-dimensional radar input, or three ports will accommodate a three-dimensional radar input. A video switch card of the switchboard is used to switch all signals, with the exception of the IFF-mode-control lines. Each card accepts inputs from up to 16 sources and can pass a signal with bandwidth greater than 20 MHz to the display assigned to that card. The synchro amplifier of current systems has been eliminated and in the new design each PPI receives radar data via a single coaxial cable. This significant reduction in cabling is achieved by adding a serial-to-parallel interface and a digital-to-synchro converter located at the PPI.

gFEX, the ATLAS Calorimeter Level-1 Real Time Processor

CERN Document Server

AUTHOR|(SzGeCERN)759889; The ATLAS collaboration; Begel, Michael; Chen, Hucheng; Lanni, Francesco; Takai, Helio; Wu, Weihao

2016-01-01

The global feature extractor (gFEX) is a component of the Level-1 Calorimeter trigger Phase-I upgrade for the ATLAS experiment. It is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The single processor board will be packaged in an Advanced Telecommunications Computing Architecture (ATCA) module and implemented as a fast reconfigurable processor based on three Xilinx Vertex Ultra-scale FPGAs. The board will receive coarse-granularity information from all the ATLAS calorimeters on 276 optical fibers with the data transferred at the 40 MHz Large Hadron Collider (LHC) clock frequency. The gFEX will be controlled by a single system-on-chip processor, ZYNQ, that will be used to configure all the processor Field-Programmable Gate Array (FPGAs), monitor board health, and interface to external signals. Now, the pre-prototype board which includes one ZYNQ and one Vertex-7 FPGA ...

gFEX, the ATLAS Calorimeter Level 1 Real Time Processor

CERN Document Server

Tang, Shaochun; The ATLAS collaboration

2015-01-01

The global feature extractor (gFEX) is a component of the Level-1Calorimeter trigger Phase-I upgrade for the ATLAS experiment. It is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The single processor board will be packaged in an Advanced Telecommunications Computing Architecture (ATCA) module and implemented as a fast reconfigurable processor based on three Xilinx Ultra-scale FPGAs. The board will receive coarse-granularity information from all the ATLAS calorimeters on 264 optical fibers with the data transferred at the 40 MHz LHC clock frequency. The gFEX will be controlled by a single system-on-chip processor, ZYNQ, that will be used to configure all the processor FPGAs, monitor board health, and interface to external signals. Now, the pre-prototype board which includes one ZYNQ and one Vertex-7 FPGA has been designed for testing and verification. The performance ...

Scientific programming on massively parallel processor CP-PACS

International Nuclear Information System (INIS)

Boku, Taisuke

1998-01-01

The massively parallel processor CP-PACS takes various problems of calculation physics as the object, and it has been designed so that its architecture has been devised to do various numerical processings. In this report, the outline of the CP-PACS and the example of programming in the Kernel CG benchmark in NAS Parallel Benchmarks, version 1, are shown, and the pseudo vector processing mechanism and the parallel processing tuning of scientific and technical computation utilizing the three-dimensional hyper crossbar net, which are two great features of the architecture of the CP-PACS are described. As for the CP-PACS, the PUs based on RISC processor and added with pseudo vector processor are used. Pseudo vector processing is realized as the loop processing by scalar command. The features of the connection net of PUs are explained. The algorithm of the NPB version 1 Kernel CG is shown. The part that takes the time for processing most in the main loop is the product of matrix and vector (matvec), and the parallel processing of the matvec is explained. The time for the computation by the CPU is determined. As the evaluation of the performance, the evaluation of the time for execution, the short vector processing of pseudo vector processor based on slide window, and the comparison with other parallel computers are reported. (K.I.)

Investigation of Large Scale Cortical Models on Clustered Multi-Core Processors

Science.gov (United States)

2013-02-01

Playstation 3 with 6 available SPU cores outperforms the Intel Xeon processor (with 4 cores) by about 1.9 times for the HTM model and by 2.4 times...runtime breakdowns of the HTM and Dean models respectively on the Cell processor (on the Playstation 3) and the Intel Xeon processor ( 4 thread...YOUR FORM TO THE ABOVE ORGANIZATION. 1. REPORT DATE (DD-MM-YYYY) 2. REPORT TYPE 3. DATES COVERED (From - To) 4 . TITLE AND SUBTITLE 5a. CONTRACT NUMBER

Technical Description of Radar and Optical Sensors Contributing to Joint UK-Australian Satellite Tracking, Data-fusion and Cueing Experiment

Science.gov (United States)

Eastment, J.; Ladd, D.; Donnelly, P.; Ash, A.; Harwood, N.; Ritchie, I.; Smith, C.; Bennett, J.; Rutten, M.; Gordon, N.

2014-09-01

DSTL, DSTO, EOS and STFC have recently participated in a campaign of co-ordinated observations with both radar and optical sensors in order to demonstrate and to refine methodologies for orbit determination, data fusion and cross-sensor cueing. The experimental programme is described in detail in the companion paper by Harwood et al. At the STFC Chilbolton Observatory in Southern England, an S-band radar on a 25 m diameter fully-steerable dish antenna was used to measure object range and radar cross-section. At the EOS Space Systems facility on Mount Stromlo, near Canberra, Australia, an optical system comprising a 2 m alt / az observatory, with Coude path laser tracking at 400W power, was used to acquire, lock and laser track the cued objects, providing accurate orbit determinations for each. DSTO, located at Edinburgh, Australia, operated an optical system consisting of a small commercial telescope and mount, measuring the direction to the objects. Observation times were limited to the evening solar terminator period. Data from these systems was processed independently, using DSTL-developed and DSTO / EOS-developed algorithms, to perform orbit determination and to cross-cue: (i) the radar, based on the optical measurements; (ii) the optical system, based on the radar measurements; and (iii) the radar, using its own prior observations (self-cueing). In some cases, TLEs were used to initialise the orbit determination process; in other cases, the cues were derived entirely from sensor data. In all 3 scenarios, positive results were obtained for a variety of satellites in low earth orbits, demonstrating the feasibility of the different cue generation techniques. The purpose of this paper is to describe the technical characteristics of the radar and optical systems used, the modes of operation employed to acquire the observations, and details of the parameters measured and the data formats.

Evaluation of the Terminal Precision Scheduling and Spacing System for Near-Term NAS Application

Science.gov (United States)

Thipphavong, Jane; Martin, Lynne Hazel; Swenson, Harry N.; Lin, Paul; Nguyen, Jimmy

2012-01-01

NASA has developed a capability for terminal area precision scheduling and spacing (TAPSS) to provide higher capacity and more efficiently manage arrivals during peak demand periods. This advanced technology is NASA's vision for the NextGen terminal metering capability. A set of human-in-the-loop experiments was conducted to evaluate the performance of the TAPSS system for near-term implementation. The experiments evaluated the TAPSS system under the current terminal routing infrastructure to validate operational feasibility. A second goal of the study was to measure the benefit of the Center and TRACON advisory tools to help prioritize the requirements for controller radar display enhancements. Simulation results indicate that using the TAPSS system provides benefits under current operations, supporting a 10% increase in airport throughput. Enhancements to Center decision support tools had limited impact on improving the efficiency of terminal operations, but did provide more fuel-efficient advisories to achieve scheduling conformance within 20 seconds. The TRACON controller decision support tools were found to provide the most benefit, by improving the precision in schedule conformance to within 20 seconds, reducing the number of arrivals having lateral path deviations by 50% and lowering subjective controller workload. Overall, the TAPSS system was found to successfully develop an achievable terminal arrival metering plan that was sustainable under heavy traffic demand levels and reduce the complexity of terminal operations when coupled with the use of the terminal controller advisory tools.

Automation of ORIGEN2 calculations for the transuranic waste baseline inventory database using a pre-processor and a post-processor

International Nuclear Information System (INIS)

Liscum-Powell, J.

1997-06-01

The purpose of the work described in this report was to automate ORIGEN2 calculations for the Waste Isolation Pilot Plant (WIPP) Transuranic Waste Baseline Inventory Database (WTWBID); this was done by developing a pre-processor to generate ORIGEN2 input files from WWBID inventory files and a post-processor to remove excess information from the ORIGEN2 output files. The calculations performed with ORIGEN2 estimate the radioactive decay and buildup of various radionuclides in the waste streams identified in the WTWBID. The resulting radionuclide inventories are needed for performance assessment calculations for the WIPP site. The work resulted in the development of PreORG, which requires interaction with the user to generate ORIGEN2 input files on a site-by-site basis, and PostORG, which processes ORIGEN2 output into more manageable files. Both programs are written in the FORTRAN 77 computer language. After running PreORG, the user will run ORIGEN2 to generate the desired data; upon completion of ORIGEN2 calculations, the user can run PostORG to process the output to make it more manageable. All the programs run on a 386 PC or higher with a math co-processor or a computer platform running under VMS operating system. The pre- and post-processors for ORIGEN2 were generated for use with Rev. 1 data of the WTWBID and can also be used with Rev. 2 and 3 data of the TWBID (Transuranic Waste Baseline Inventory Database)

A design of a computer complex including vector processors

International Nuclear Information System (INIS)

Asai, Kiyoshi

1982-12-01

We, members of the Computing Center, Japan Atomic Energy Research Institute have been engaged for these six years in the research of adaptability of vector processing to large-scale nuclear codes. The research has been done in collaboration with researchers and engineers of JAERI and a computer manufacturer. In this research, forty large-scale nuclear codes were investigated from the viewpoint of vectorization. Among them, twenty-six codes were actually vectorized and executed. As the results of the investigation, it is now estimated that about seventy percents of nuclear codes and seventy percents of our total amount of CPU time of JAERI are highly vectorizable. Based on the data obtained by the investigation, (1)currently vectorizable CPU time, (2)necessary number of vector processors, (3)necessary manpower for vectorization of nuclear codes, (4)computing speed, memory size, number of parallel 1/0 paths, size and speed of 1/0 buffer of vector processor suitable for our applications, (5)necessary software and operational policy for use of vector processors are discussed, and finally (6)a computer complex including vector processors is presented in this report. (author)

Parallel computation for distributed parameter system-from vector processors to Adena computer

Energy Technology Data Exchange (ETDEWEB)

Nogi, T

1983-04-01

Research on advanced parallel hardware and software architectures for very high-speed computation deserves and needs more support and attention to fulfil its promise. Novel architectures for parallel processing are being made ready. Architectures for parallel processing can be roughly divided into two groups. One is a vector processor in which a single central processing unit involves multiple vector-arithmetic registers. The other is a processor array in which slave processors are connected to a host processor to perform parallel computation. In this review, the concept and data structure of the Adena (alternating-direction edition nexus array) architecture, which is conformable to distributed-parameter simulation algorithms, are described. 5 references.

Digital control card based on digital signal processor

International Nuclear Information System (INIS)

Hou Shigang; Yin Zhiguo; Xia Le

2008-01-01

A digital control card based on digital signal processor was developed. Two Freescale DSP-56303 processors were utilized to achieve 3 channels proportional- integral-differential regulations. The card offers high flexibility for 100 MeV cyclotron RF system development. It was used as feedback controller in low level radio frequency control prototype, with the feedback gain parameters continuously adjustable. By using high precision analog to digital converter with 500 kHz sampling rate, a regulation bandwidth of 20 kHz was achieved. (authors)

The use of radar for bathymetry assessment

NARCIS (Netherlands)

Aardoom, J.H.; Greidanus, H.S.F.

1998-01-01

The bottom topography in shallow seas can be observed by air- and spaceborne imaging radar. Bathymetric information derived from radar data is limited in accuracy, but radar has a good spatial coverage. The accuracy can be increased by assimilating the radar imagery into existing or insitu gathered

Bistatic radar

CERN Document Server

Willis, Nick

2004-01-01

Annotation his book is a major extension of a chapter on bistatic radar written by the author for the Radar Handbook, 2nd edition, edited by Merrill Skolnik. It provides a history of bistatic systems that points out to potential designers the applications that have worked and the dead-ends not worth pursuing. The text reviews the basic concepts and definitions, and explains the mathematical development of relationships, such as geometry, Ovals of Cassini, dynamic range, isorange and isodoppler contours, target doppler, and clutter doppler spread.Key Features * All development and analysis are

Treecode with a Special-Purpose Processor

Science.gov (United States)

Makino, Junichiro

1991-08-01

We describe an implementation of the modified Barnes-Hut tree algorithm for a gravitational N-body calculation on a GRAPE (GRAvity PipE) backend processor. GRAPE is a special-purpose computer for N-body calculations. It receives the positions and masses of particles from a host computer and then calculates the gravitational force at each coordinate specified by the host. To use this GRAPE processor with the hierarchical tree algorithm, the host computer must maintain a list of all nodes that exert force on a particle. If we create this list for each particle of the system at each timestep, the number of floating-point operations on the host and that on GRAPE would become comparable, and the increased speed obtained by using GRAPE would be small. In our modified algorithm, we create a list of nodes for many particles. Thus, the amount of the work required of the host is significantly reduced. This algorithm was originally developed by Barnes in order to vectorize the force calculation on a Cyber 205. With this algorithm, the computing time of the force calculation becomes comparable to that of the tree construction, if the GRAPE backend processor is sufficiently fast. The obtained speed-up factor is 30 to 50 for a RISC-based host computer and GRAPE-1A with a peak speed of 240 Mflops.

Token-Aware Completion Functions for Elastic Processor Verification

Directory of Open Access Journals (Sweden)

Sudarshan K. Srinivasan

2009-01-01

Full Text Available We develop a formal verification procedure to check that elastic pipelined processor designs correctly implement their instruction set architecture (ISA specifications. The notion of correctness we use is based on refinement. Refinement proofs are based on refinement maps, which—in the context of this problem—are functions that map elastic processor states to states of the ISA specification model. Data flow in elastic architectures is complicated by the insertion of any number of buffers in any place in the design, making it hard to construct refinement maps for elastic systems in a systematic manner. We introduce token-aware completion functions, which incorporate a mechanism to track the flow of data in elastic pipelines, as a highly automated and systematic approach to construct refinement maps. We demonstrate the efficiency of the overall verification procedure based on token-aware completion functions using six elastic pipelined processor models based on the DLX architecture.

A light hydrocarbon fuel processor producing high-purity hydrogen

Science.gov (United States)

Löffler, Daniel G.; Taylor, Kyle; Mason, Dylan

This paper discusses the design process and presents performance data for a dual fuel (natural gas and LPG) fuel processor for PEM fuel cells delivering between 2 and 8 kW electric power in stationary applications. The fuel processor resulted from a series of design compromises made to address different design constraints. First, the product quality was selected; then, the unit operations needed to achieve that product quality were chosen from the pool of available technologies. Next, the specific equipment needed for each unit operation was selected. Finally, the unit operations were thermally integrated to achieve high thermal efficiency. Early in the design process, it was decided that the fuel processor would deliver high-purity hydrogen. Hydrogen can be separated from other gases by pressure-driven processes based on either selective adsorption or permeation. The pressure requirement made steam reforming (SR) the preferred reforming technology because it does not require compression of combustion air; therefore, steam reforming is more efficient in a high-pressure fuel processor than alternative technologies like autothermal reforming (ATR) or partial oxidation (POX), where the combustion occurs at the pressure of the process stream. A low-temperature pre-reformer reactor is needed upstream of a steam reformer to suppress coke formation; yet, low temperatures facilitate the formation of metal sulfides that deactivate the catalyst. For this reason, a desulfurization unit is needed upstream of the pre-reformer. Hydrogen separation was implemented using a palladium alloy membrane. Packed beds were chosen for the pre-reformer and reformer reactors primarily because of their low cost, relatively simple operation and low maintenance. Commercial, off-the-shelf balance of plant (BOP) components (pumps, valves, and heat exchangers) were used to integrate the unit operations. The fuel processor delivers up to 100 slm hydrogen >99.9% pure with <1 ppm CO, <3 ppm CO 2. The

Merged ozone profiles from four MIPAS processors

Science.gov (United States)

Laeng, Alexandra; von Clarmann, Thomas; Stiller, Gabriele; Dinelli, Bianca Maria; Dudhia, Anu; Raspollini, Piera; Glatthor, Norbert; Grabowski, Udo; Sofieva, Viktoria; Froidevaux, Lucien; Walker, Kaley A.; Zehner, Claus

2017-04-01

The Michelson Interferometer for Passive Atmospheric Sounding (MIPAS) was an infrared (IR) limb emission spectrometer on the Envisat platform. Currently, there are four MIPAS ozone data products, including the operational Level-2 ozone product processed at ESA, with the scientific prototype processor being operated at IFAC Florence, and three independent research products developed by the Istituto di Fisica Applicata Nello Carrara (ISAC-CNR)/University of Bologna, Oxford University, and the Karlsruhe Institute of Technology-Institute of Meteorology and Climate Research/Instituto de Astrofísica de Andalucía (KIT-IMK/IAA). Here we present a dataset of ozone vertical profiles obtained by merging ozone retrievals from four independent Level-2 MIPAS processors. We also discuss the advantages and the shortcomings of this merged product. As the four processors retrieve ozone in different parts of the spectra (microwindows), the source measurements can be considered as nearly independent with respect to measurement noise. Hence, the information content of the merged product is greater and the precision is better than those of any parent (source) dataset. The merging is performed on a profile per profile basis. Parent ozone profiles are weighted based on the corresponding error covariance matrices; the error correlations between different profile levels are taken into account. The intercorrelations between the processors' errors are evaluated statistically and are used in the merging. The height range of the merged product is 20-55 km, and error covariance matrices are provided as diagnostics. Validation of the merged dataset is performed by comparison with ozone profiles from ACE-FTS (Atmospheric Chemistry Experiment-Fourier Transform Spectrometer) and MLS (Microwave Limb Sounder). Even though the merging is not supposed to remove the biases of the parent datasets, around the ozone volume mixing ratio peak the merged product is found to have a smaller (up to 0.1 ppmv

Radar spectrum opportunities for cognitive communications transmission

OpenAIRE

Wang, L; McGeehan, JP; Williams, C; Doufexi, A

2008-01-01

In relation to opportunistic access to radar spectrum, the impact of the radar on a communication system is investigated in this paper. This paper illustrates that by exploring the spatial and temporal opportunities in the radar spectrum and therefore improving the tolerance level to radar interference, a substantial increase on the throughput of a communication system is possible. Results are presented regarding the impact of swept radars on a WiMAX system. The results show the impact of SIR...

Keystone Business Models for Network Security Processors

Directory of Open Access Journals (Sweden)

Arthur Low

2013-07-01

Full Text Available Network security processors are critical components of high-performance systems built for cybersecurity. Development of a network security processor requires multi-domain experience in semiconductors and complex software security applications, and multiple iterations of both software and hardware implementations. Limited by the business models in use today, such an arduous task can be undertaken only by large incumbent companies and government organizations. Neither the “fabless semiconductor” models nor the silicon intellectual-property licensing (“IP-licensing” models allow small technology companies to successfully compete. This article describes an alternative approach that produces an ongoing stream of novel network security processors for niche markets through continuous innovation by both large and small companies. This approach, referred to here as the "business ecosystem model for network security processors", includes a flexible and reconfigurable technology platform, a “keystone” business model for the company that maintains the platform architecture, and an extended ecosystem of companies that both contribute and share in the value created by innovation. New opportunities for business model innovation by participating companies are made possible by the ecosystem model. This ecosystem model builds on: i the lessons learned from the experience of the first author as a senior integrated circuit architect for providers of public-key cryptography solutions and as the owner of a semiconductor startup, and ii the latest scholarly research on technology entrepreneurship, business models, platforms, and business ecosystems. This article will be of interest to all technology entrepreneurs, but it will be of particular interest to owners of small companies that provide security solutions and to specialized security professionals seeking to launch their own companies.

Demonstration of two-qubit algorithms with a superconducting quantum processor.

Science.gov (United States)

DiCarlo, L; Chow, J M; Gambetta, J M; Bishop, Lev S; Johnson, B R; Schuster, D I; Majer, J; Blais, A; Frunzio, L; Girvin, S M; Schoelkopf, R J

2009-07-09

Quantum computers, which harness the superposition and entanglement of physical states, could outperform their classical counterparts in solving problems with technological impact-such as factoring large numbers and searching databases. A quantum processor executes algorithms by applying a programmable sequence of gates to an initialized register of qubits, which coherently evolves into a final state containing the result of the computation. Building a quantum processor is challenging because of the need to meet simultaneously requirements that are in conflict: state preparation, long coherence times, universal gate operations and qubit readout. Processors based on a few qubits have been demonstrated using nuclear magnetic resonance, cold ion trap and optical systems, but a solid-state realization has remained an outstanding challenge. Here we demonstrate a two-qubit superconducting processor and the implementation of the Grover search and Deutsch-Jozsa quantum algorithms. We use a two-qubit interaction, tunable in strength by two orders of magnitude on nanosecond timescales, which is mediated by a cavity bus in a circuit quantum electrodynamics architecture. This interaction allows the generation of highly entangled states with concurrence up to 94 per cent. Although this processor constitutes an important step in quantum computing with integrated circuits, continuing efforts to increase qubit coherence times, gate performance and register size will be required to fulfil the promise of a scalable technology.

Advanced Avionics and Processor Systems for a Flexible Space Exploration Architecture

Science.gov (United States)

Keys, Andrew S.; Adams, James H.; Smith, Leigh M.; Johnson, Michael A.; Cressler, John D.

2010-01-01

The Advanced Avionics and Processor Systems (AAPS) project, formerly known as the Radiation Hardened Electronics for Space Environments (RHESE) project, endeavors to develop advanced avionic and processor technologies anticipated to be used by NASA s currently evolving space exploration architectures. The AAPS project is a part of the Exploration Technology Development Program, which funds an entire suite of technologies that are aimed at enabling NASA s ability to explore beyond low earth orbit. NASA s Marshall Space Flight Center (MSFC) manages the AAPS project. AAPS uses a broad-scoped approach to developing avionic and processor systems. Investment areas include advanced electronic designs and technologies capable of providing environmental hardness, reconfigurable computing techniques, software tools for radiation effects assessment, and radiation environment modeling tools. Near-term emphasis within the multiple AAPS tasks focuses on developing prototype components using semiconductor processes and materials (such as Silicon-Germanium (SiGe)) to enhance a device s tolerance to radiation events and low temperature environments. As the SiGe technology will culminate in a delivered prototype this fiscal year, the project emphasis shifts its focus to developing low-power, high efficiency total processor hardening techniques. In addition to processor development, the project endeavors to demonstrate techniques applicable to reconfigurable computing and partially reconfigurable Field Programmable Gate Arrays (FPGAs). This capability enables avionic architectures the ability to develop FPGA-based, radiation tolerant processor boards that can serve in multiple physical locations throughout the spacecraft and perform multiple functions during the course of the mission. The individual tasks that comprise AAPS are diverse, yet united in the common endeavor to develop electronics capable of operating within the harsh environment of space. Specifically, the AAPS tasks for

OLYMPUS system and development of its pre-processor

International Nuclear Information System (INIS)

Okamoto, Masao; Takeda, Tatsuoki; Tanaka, Masatoshi; Asai, Kiyoshi; Nakano, Koh.

1977-08-01

The OLYMPUS SYSTEM developed by K. V. Roverts et al. was converted and introduced in computer system FACOM 230/75 of the JAERI Computing Center. A pre-processor was also developed for the OLYMPUS SYSTEM. The OLYMPUS SYSTEM is very useful for development, standardization and exchange of programs in thermonuclear fusion research and plasma physics. The pre-processor developed by the present authors is not only essential for the JAERI OLYMPUS SYSTEM, but also useful in manipulation, creation and correction of program files. (auth.)

A fast processor for di-lepton triggers

CERN Document Server

Kostarakis, P; Barsotti, E; Conetti, S; Cox, B; Enagonio, J; Haldeman, M; Haynes, W; Katsanevas, S; Kerns, C; Lebrun, P; Smith, H; Soszyniski, T; Stoffel, J; Treptow, K; Turkot, F; Wagner, R

1981-01-01

As a new application of the Fermilab ECL-CAMAC logic modules a fast trigger processor was developed for Fermilab experiment E-537, aiming to measure the higher mass di-muon production by antiprotons. The processor matches the hit information received from drift chambers and scintillation counters, to find candidate muon tracks and determine their directions and momenta. The tracks are then paired to compute an invariant mass: when the computed mass falls within the desired range, the event is accepted. The process is accomplished in times of 5 to 10 microseconds, while achieving a trigger rate reduction of up to a factor of ten. (5 refs).

Time Manager Software for a Flight Processor

Science.gov (United States)

Zoerne, Roger

2012-01-01

Data analysis is a process of inspecting, cleaning, transforming, and modeling data to highlight useful information and suggest conclusions. Accurate timestamps and a timeline of vehicle events are needed to analyze flight data. By moving the timekeeping to the flight processor, there is no longer a need for a redundant time source. If each flight processor is initially synchronized to GPS, they can freewheel and maintain a fairly accurate time throughout the flight with no additional GPS time messages received. How ever, additional GPS time messages will ensure an even greater accuracy. When a timestamp is required, a gettime function is called that immediately reads the time-base register.

Typhoon 9707 observations with the MU radar and L-band boundary layer radar

Directory of Open Access Journals (Sweden)

M. Teshiba

2001-08-01

Full Text Available Typhoon 9707 (Opal was observed with the VHF-band Middle and Upper atmosphere (MU radar, an L-band boundary layer radar (BLR, and a vertical-pointing C-band meteorological radar at the Shigaraki MU Observatory in Shiga prefecture, Japan on 20 June 1997. The typhoon center passed about 80 km southeast from the radar site. Mesoscale precipitating clouds developed due to warm-moist airmass transport from the typhoon, and passed over the MU radar site with easterly or southeasterly winds. We primarily present the wind behaviour including the vertical component which a conventional meteorological Doppler radar cannot directly observe, and discuss the relationship between the wind behaviour of the typhoon and the precipitating system. To investigate the dynamic structure of the typhoon, the observed wind was divided into radial and tangential wind components under the assumption that the typhoon had an axi-symmetric structure. Altitude range of outflow ascended from 1–3 km to 2–10 km with increasing distance (within 80–260 km range from the typhoon center, and in-flow was observed above and below the outflow. Outflow and inflow were associated with updraft and downdraft, respectively. In the tangential wind, the maximum speed of counterclockwise winds was confirmed at 1–2 km altitudes. Based on the vertical velocity and the reflectivity obtained with the MU radar and the C-band meteorological radar, respectively, precipitating clouds, accompanied by the wind behaviour of the typhoon, were classified into stratiform and convective precipitating clouds. In the stratiform precipitating clouds, a vertical shear of radial wind and the maximum speed of counterclockwise wind were observed. There was a strong reflectivity layer called a ‘bright band’ around the 4.2 km altitude. We confirmed strong updrafts and down-drafts below and above it, respectively, and the existence of a relatively dry layer around the bright band level from radiosonde

Typhoon 9707 observations with the MU radar and L-band boundary layer radar

Directory of Open Access Journals (Sweden)

M. Teshiba

Full Text Available Typhoon 9707 (Opal was observed with the VHF-band Middle and Upper atmosphere (MU radar, an L-band boundary layer radar (BLR, and a vertical-pointing C-band meteorological radar at the Shigaraki MU Observatory in Shiga prefecture, Japan on 20 June 1997. The typhoon center passed about 80 km southeast from the radar site. Mesoscale precipitating clouds developed due to warm-moist airmass transport from the typhoon, and passed over the MU radar site with easterly or southeasterly winds. We primarily present the wind behaviour including the vertical component which a conventional meteorological Doppler radar cannot directly observe, and discuss the relationship between the wind behaviour of the typhoon and the precipitating system. To investigate the dynamic structure of the typhoon, the observed wind was divided into radial and tangential wind components under the assumption that the typhoon had an axi-symmetric structure. Altitude range of outflow ascended from 1–3 km to 2–10 km with increasing distance (within 80–260 km range from the typhoon center, and in-flow was observed above and below the outflow. Outflow and inflow were associated with updraft and downdraft, respectively. In the tangential wind, the maximum speed of counterclockwise winds was confirmed at 1–2 km altitudes. Based on the vertical velocity and the reflectivity obtained with the MU radar and the C-band meteorological radar, respectively, precipitating clouds, accompanied by the wind behaviour of the typhoon, were classified into stratiform and convective precipitating clouds. In the stratiform precipitating clouds, a vertical shear of radial wind and the maximum speed of counterclockwise wind were observed. There was a strong reflectivity layer called a ‘bright band’ around the 4.2 km altitude. We confirmed strong updrafts and down-drafts below and above it, respectively, and the existence of a relatively dry layer around the bright band level from radiosonde

Introducing Switching Ordered Statistic CFAR Type I in Different Radar Environments

Directory of Open Access Journals (Sweden)

Saeed Erfanian

2009-01-01

Full Text Available In this paper, a new CFAR detector based on a switching algorithm and OS-CFAR for nonhomogeneous background environments is introduced. The new detector is named Switching Ordered Statistic CFAR type I (SOS CFAR I. The SOS CFAR I selects a set of suitable cells and then with the help of the ordering method, estimates the unknown background noise level. The proposed detector does not require any prior information about the background environment and uses cells with similar statistical specifications to estimate the background noise. The performance of SOS CFAR I is evaluated and compared with other detectors such as CA-CFAR, GO-CFAR, SO-CFAR, and OS-CFAR for the Swerling I target model in homogeneous and nonhomogeneous noise environments such as those with multiple interference and clutter edges. The results show that SOS CFAR I detectors considerably reduce the problem of excessive false alarm probability near clutter edges while maintaining good performance in other environments. Also, simulation results confirm the achievement of an optimum detection threshold in homogenous and nonhomogeneous radar environments by the mentioned processor.

Radar observations of Mercury

International Nuclear Information System (INIS)

Harmon, J.K.; Campbell, D.B.

1988-01-01

Some of the radar altimetry profiles of Mercury obtained on the basis of data from the Arecibo Observatory are presented. In these measurements, the delay-Doppler method was used to measure altitudes along the Doppler equator, rather than to map radar reflectivity. The profiles, derived from observations made over a 6-yr period, provide extensive coverage over a restricted equatorial band and permit the identification of radar signatures for features as small as 50-km diameter craters and 1-km-high arcuate scarps. The data allowed identification of large-scale topographic features such as smooth plains subsidence zones and major highland regions

Experiment for buried pipes by stepped FM-CW radar; Step shiki FM-CW radar ni yoru maisetsukan tansa jikken

Energy Technology Data Exchange (ETDEWEB)

Suzuki, K.; Ito, M. [Kawasaki Geological Engineering, Co. Ltd., Tokyo (Japan); Tanabe, K. [Central Research Institute of Electric Power Industry, Tokyo (Japan)

1997-05-27

The underground radar exploration is adopted to surveys of cavity under the road and buried pipes since the result of high resolution is obtained. However, the explorative depth of the radar is shallow, 2-3m in soil basement, and its applicable field has been limited. The continuous wave radar (FM-CW radar) was devised to get deeper explorative depth, but has been used for the geological structure survey such as the fault survey since it is lower in resolution as compared with the pulse radar. Therefore, to make use of characteristics of the continuous wave radar and enhance resolution in the shallow part, an experiment on buried pipes was conducted for the purpose of assessing and improving the FM-CW radar. In this processing, the wave form treatment used in the reflection method seismic survey was adopted for the radar survey. There are some problems, but it is effective to adopt the same algorithm to that used in the seismic survey to the radar exploration. The explorative depth was discussed from the damping rate of electromagnetic waves and dynamic range of facilities of the experimental site, and 7m was obtained. 5 figs., 1 tab.

High Resolution 3D Radar Imaging of Comet Interiors

Science.gov (United States)

Asphaug, E. I.; Gim, Y.; Belton, M.; Brophy, J.; Weissman, P. R.; Heggy, E.

2012-12-01

Knowing the interiors of comets and other primitive bodies is fundamental to our understanding of how planets formed. We have developed a Discovery-class mission formulation, Comet Radar Explorer (CORE), based on the use of previously flown planetary radar sounding techniques, with the goal of obtaining high resolution 3D images of the interior of a small primitive body. We focus on the Jupiter-Family Comets (JFCs) as these are among the most primitive bodies reachable by spacecraft. Scattered in from far beyond Neptune, they are ultimate targets of a cryogenic sample return mission according to the Decadal Survey. Other suitable targets include primitive NEOs, Main Belt Comets, and Jupiter Trojans. The approach is optimal for small icy bodies ~3-20 km diameter with spin periods faster than about 12 hours, since (a) navigation is relatively easy, (b) radar penetration is global for decameter wavelengths, and (c) repeated overlapping ground tracks are obtained. The science mission can be as short as ~1 month for a fast-rotating JFC. Bodies smaller than ~1 km can be globally imaged, but the navigation solutions are less accurate and the relative resolution is coarse. Larger comets are more interesting, but radar signal is unlikely to be reflected from depths greater than ~10 km. So, JFCs are excellent targets for a variety of reasons. We furthermore focus on the use of Solar Electric Propulsion (SEP) to rendezvous shortly after the comet's perihelion. This approach leaves us with ample power for science operations under dormant conditions beyond ~2-3 AU. This leads to a natural mission approach of distant observation, followed by closer inspection, terminated by a dedicated radar mapping orbit. Radar reflections are obtained from a polar orbit about the icy nucleus, which spins underneath. Echoes are obtained from a sounder operating at dual frequencies 5 and 15 MHz, with 1 and 10 MHz bandwidths respectively. The dense network of echoes is used to obtain global 3D

Bulk-memory processor for data acquisition

International Nuclear Information System (INIS)

Nelson, R.O.; McMillan, D.E.; Sunier, J.W.; Meier, M.; Poore, R.V.

1981-01-01

To meet the diverse needs and data rate requirements at the Van de Graaff and Weapons Neutron Research (WNR) facilities, a bulk memory system has been implemented which includes a fast and flexible processor. This bulk memory processor (BMP) utilizes bit slice and microcode techniques and features a 24 bit wide internal architecture allowing direct addressing of up to 16 megawords of memory and histogramming up to 16 million counts per channel without overflow. The BMP is interfaced to the MOSTEK MK 8000 bulk memory system and to the standard MODCOMP computer I/O bus. Coding for the BMP both at the microcode level and with macro instructions is supported. The generalized data acquisition system has been extended to support the BMP in a manner transparent to the user

RISC Processors and High Performance Computing

Science.gov (United States)

Bailey, David H.; Saini, Subhash; Craw, James M. (Technical Monitor)

1995-01-01

This tutorial will discuss the top five RISC microprocessors and the parallel systems in which they are used. It will provide a unique cross-machine comparison not available elsewhere. The effective performance of these processors will be compared by citing standard benchmarks in the context of real applications. The latest NAS Parallel Benchmarks, both absolute performance and performance per dollar, will be listed. The next generation of the NPB will be described. The tutorial will conclude with a discussion of future directions in the field. Technology Transfer Considerations: All of these computer systems are commercially available internationally. Information about these processors is available in the public domain, mostly from the vendors themselves. The NAS Parallel Benchmarks and their results have been previously approved numerous times for public release, beginning back in 1991.

Reduced power processor requirements for the 30-cm diameter HG ion thruster

Science.gov (United States)

Rawlin, V. K.

1979-01-01

The characteristics of power processors strongly impact the overall performance and cost of electric propulsion systems. A program was initiated to evaluate simplifications of the thruster-power processor interface requirements. The power processor requirements are mission dependent with major differences arising for those missions which require a nearly constant thruster operating point (typical of geocentric and some inbound planetary missions) and those requiring operation over a large range of input power (such as outbound planetary missions). This paper describes the results of tests which have indicated that as many as seven of the twelve power supplies may be eliminated from the present Functional Model Power Processor used with 30-cm diameter Hg ion thrusters.

Radar reflection off extensive air showers

CERN Document Server

Stasielak, J; Bertaina, M; Blümer, J; Chiavassa, A; Engel, R; Haungs, A; Huege, T; Kampert, K -H; Klages, H; Kleifges, M; Krömer, O; Ludwig, M; Mathys, S; Neunteufel, P; Pekala, J; Rautenberg, J; Riegel, M; Roth, M; Salamida, F; Schieler, H; Šmída, R; Unger, M; Weber, M; Werner, F; Wilczyński, H; Wochele, J

2012-01-01

We investigate the possibility of detecting extensive air showers by the radar technique. Considering a bistatic radar system and different shower geometries, we simulate reflection of radio waves off the static plasma produced by the shower in the air. Using the Thomson cross-section for radio wave reflection, we obtain the time evolution of the signal received by the antennas. The frequency upshift of the radar echo and the power received are studied to verify the feasibility of the radar detection technique.

Sensitometric Control of Automatic Processors in a Hospital Center : Retrospective Study

International Nuclear Information System (INIS)

Lobato Busto, R.; Pombar Camean, M.

1992-01-01

This paper analyses the results obtained between February (1990) and July (1991) of the sensitometric control of the seven automatic processors which are in Hospital General de Galicia-Clinico Universitario (Santiago de Compostela). The deviations with regard to the reference values of each processor, permitting the precocious detection of disturbances before being revealed by the image, were analysed. In this analysis, it was achieved that the days in which the automatic processors were out of standing only varied between 2.3% and 5% from the checked days. (author)

Investigations on the sensitivity of a stepped-frequency radar utilizing a vector network analyzer for Ground Penetrating Radar

Science.gov (United States)

Seyfried, Daniel; Schubert, Karsten; Schoebel, Joerg

2014-12-01

Employing a continuous-wave radar system, with the stepped-frequency radar being one type of this class, all reflections from the environment are present continuously and simultaneously at the receiver. Utilizing such a radar system for Ground Penetrating Radar purposes, antenna cross-talk and ground bounce reflection form an overall dominant signal contribution while reflections from objects buried in the ground are of quite weak amplitude due to attenuation in the ground. This requires a large dynamic range of the receiver which in turn requires high sensitivity of the radar system. In this paper we analyze the sensitivity of our vector network analyzer utilized as stepped-frequency radar system for GPR pipe detection. We furthermore investigate the performance of increasing the sensitivity of the radar by means of appropriate averaging and low-noise pre-amplification of the received signal. It turns out that the improvement in sensitivity actually achievable may differ significantly from theoretical expectations. In addition, we give a descriptive explanation why our appropriate experiments demonstrate that the sensitivity of the receiver is independent of the distance between the target object and the source of dominant signal contribution. Finally, our investigations presented in this paper lead to a preferred setting of operation for our vector network analyzer in order to achieve best detection capability for weak reflection amplitudes, hence making the radar system applicable for Ground Penetrating Radar purposes.

Rational calculation accuracy in acousto-optical matrix-vector processor

Science.gov (United States)

Oparin, V. V.; Tigin, Dmitry V.

1994-01-01

The high speed of parallel computations for a comparatively small-size processor and acceptable power consumption makes the usage of acousto-optic matrix-vector multiplier (AOMVM) attractive for processing of large amounts of information in real time. The limited accuracy of computations is an essential disadvantage of such a processor. The reduced accuracy requirements allow for considerable simplification of the AOMVM architecture and the reduction of the demands on its components.

Detecting and classifying low probability of intercept radar

CERN Document Server

Pace, Philip E

2008-01-01

This revised and expanded second edition brings you to the cutting edge with new chapters on LPI radar design, including over-the-horizon radar, random noise radar, and netted LPI radar. You also discover critical LPI detection techniques, parameter extraction signal processing techniques, and anti-radiation missile design strategies to counter LPI radar.

Radar probing of the auroral plasma

International Nuclear Information System (INIS)

Brekke, A.

1977-01-01

The European Incoherent Scatter Radar in the Auroral Zone (EISCAT) is an intereuropean organization planning to install an incoherent scatter radar system in Northern Scandinavia. It is supported by Finland, France, Norway, Great Britain, Sweden and West Germany, and its headquarters is in Kiruna, Sweden. The radar is planned to be operating in 1979. In order to introduce students and young scientists to the incoherent scatter radar technique, a summer school was held in Tromsoe, from 5th to 13th June 1975. In these proceedings an introduction to the basic theory of fluctuations in a plasma is given. Some of the present incoherent scatter radars now in use are presented and special considerations with respect to the planned EISACT facility are discussed. Reviews of some recent results and scientific problems relevant to EISCAT are also presented and finally a presentation of some observational techniques complementary to incoherent scatter radars is included. (Ed.)

A Method of Separation Assurance for Instrument Flight Procedures at Non-Radar Airports

Science.gov (United States)

Conway, Sheila R.; Consiglio, Maria

2002-01-01

A method to provide automated air traffic separation assurance services during approach to or departure from a non-radar, non-towered airport environment is described. The method is constrained by provision of these services without radical changes or ambitious investments in current ground-based technologies. The proposed procedures are designed to grant access to a large number of airfields that currently have no or very limited access under Instrument Flight Rules (IFR), thus increasing mobility with minimal infrastructure investment. This paper primarily addresses a low-cost option for airport and instrument approach infrastructure, but is designed to be an architecture from which a more efficient, albeit more complex, system may be developed. A functional description of the capabilities in the current NAS infrastructure is provided. Automated terminal operations and procedures are introduced. Rules of engagement and the operations are defined. Results of preliminary simulation testing are presented. Finally, application of the method to more terminal-like operations, and major research areas, including necessary piloted studies, are discussed.

Method for radar detection of persons wearing wires

OpenAIRE

Fox, William P.

2014-01-01

8,730,098 B1 Methods are described for radar detection of persons wearing wires using radar spectra data including the vertical polarization (VV) radar cross section and the horizontal polarization (HH) radar cross section for a person. In one embodiment, the ratio of the vertical polarization (VV) radar cross section to the horizontal polarization (HH) radar cross section for a person is compared to a detection threshold to determine whether the person is wearing wire...

Phased-array radars

Science.gov (United States)

Brookner, E.

1985-02-01

The operating principles, technology, and applications of phased-array radars are reviewed and illustrated with diagrams and photographs. Consideration is given to the antenna elements, circuitry for time delays, phase shifters, pulse coding and compression, and hybrid radars combining phased arrays with lenses to alter the beam characteristics. The capabilities and typical hardware of phased arrays are shown using the US military systems COBRA DANE and PAVE PAWS as examples.

Downhole pulse radar

Science.gov (United States)

Chang, Hsi-Tien

1987-09-28

A borehole logging tool generates a fast rise-time, short duration, high peak-power radar pulse having broad energy distribution between 30 MHz and 300 MHz through a directional transmitting and receiving antennas having barium titanate in the electromagnetically active region to reduce the wavelength to within an order of magnitude of the diameter of the antenna. Radar returns from geological discontinuities are sampled for transmission uphole. 7 figs.

Radar reflection off extensive air showers

Directory of Open Access Journals (Sweden)

Werner F.

2013-06-01

Full Text Available We investigate the possibility of detecting extensive air showers by the radar technique. Considering a bistatic radar system and different shower geometries, we simulate reflection of radio waves off the static plasma produced by the shower in the air. Using the Thomson cross-section for radio wave reflection, we obtain the time evolution of the signal received by the antennas. The frequency upshift of the radar echo and the power received are studied to verify the feasibility of the radar detection technique.

Meteorite Falls Observed in U.S. Weather Radar Data in 2015 and 2016 (To Date)

Science.gov (United States)

Fries, Marc; Fries, Jeffrey; Hankey, Mike; Matson, Robert

2016-01-01

To date, over twenty meteorite falls have been located in the weather radar imagery of the National Oceanic and Atmospheric Administration (NOAA)'s NEXRAD radar network. We present here the most prominent events recorded since the last Meteoritical Society meeting, covering most of 2015 and early 2016. Meteorite Falls: The following events produced evidence of falling meteorites in radar imagery and resulted in meteorites recovered at the fall site. Creston, CA (24 Oct 2015 0531 UTC): This event generated 218 eyewitness reports submitted to the American Meteor Society (AMS) and is recorded as event #2635 for 2015 on the AMS website. Witnesses reported a bright fireball with fragmentation terminating near the city of Creston, CA, north of Los Angeles. Sonic booms and electrophonic noise were reported in the vicinity of the event. Weather radar imagery records signatures consistent with falling meteorites in data from the KMUX, KVTX, KHNX and KVBX. The Meteoritical Society records the Creston fall as an L6 meteorite with a total recovered mass of 688g. Osceola, FL (24 Jan 2016 1527 UTC): This daytime fireball generated 134 eyewitness reports on AMS report number 266 for 2016, with one credible sonic boom report. The fireball traveled roughly NE to SW with a terminus location north of Lake City, FL in sparsely populated, forested countryside. Radar imagery shows distinct and prominent evidence of a significant meteorite fall with radar signatures seen in data from the KJAX and KVAX radars. Searchers at the fall site found that recoveries were restricted to road sites by the difficult terrain, and yet several meteorites were recovered. Evidence indicates that this was a relatively large meteorite fall where most of the meteorites are unrecoverable due to terrain. Osceola is an L6 meteorite with 991 g total mass recovered to date. Mount Blanco, TX (18 Feb 2016 0343 UTC): This event produced only 39 eyewitness reports and is recorded as AMS event #635 for 2016. No

HF Radar Sea-echo from Shallow Water

Directory of Open Access Journals (Sweden)

Josh Kohut

2008-08-01

Full Text Available HF radar systems are widely and routinely used for the measurement of ocean surface currents and waves. Analysis methods presently in use are based on the assumption of infinite water depth, and may therefore be inadequate close to shore where the radar echo is strongest. In this paper, we treat the situation when the radar echo is returned from ocean waves that interact with the ocean floor. Simulations are described which demonstrate the effect of shallow water on radar sea-echo. These are used to investigate limits on the existing theory and to define water depths at which shallow-water effects become significant. The second-order spectral energy increases relative to the first-order as the water depth decreases, resulting in spectral saturation when the waveheight exceeds a limit defined by the radar transmit frequency. This effect is particularly marked for lower radar transmit frequencies. The saturation limit on waveheight is less for shallow water. Shallow water affects second-order spectra (which gives wave information far more than first-order (which gives information on current velocities, the latter being significantly affected only for the lowest radar transmit frequencies for extremely shallow water. We describe analysis of radar echo from shallow water measured by a Rutgers University HF radar system to give ocean wave spectral estimates. Radar-derived wave height, period and direction are compared with simultaneous shallow-water in-situ measurements.

Post-silicon and runtime verification for modern processors

CERN Document Server

Wagner, Ilya

2010-01-01

The purpose of this book is to survey the state of the art and evolving directions in post-silicon and runtime verification. The authors start by giving an overview of the state of the art in verification, particularly current post-silicon methodologies in use in the industry, both for the domain of processor pipeline design and for memory subsystems. They then dive into the presentation of several new post-silicon verification solutions aimed at boosting the verification coverage of modern processors, dedicating several chapters to this topic. The presentation of runtime verification solution

Ring-array processor distribution topology for optical interconnects

Science.gov (United States)

Li, Yao; Ha, Berlin; Wang, Ting; Wang, Sunyu; Katz, A.; Lu, X. J.; Kanterakis, E.

1992-01-01

The existing linear and rectangular processor distribution topologies for optical interconnects, although promising in many respects, cannot solve problems such as clock skews, the lack of supporting elements for efficient optical implementation, etc. The use of a ring-array processor distribution topology, however, can overcome these problems. Here, a study of the ring-array topology is conducted with an aim of implementing various fast clock rate, high-performance, compact optical networks for digital electronic multiprocessor computers. Practical design issues are addressed. Some proof-of-principle experimental results are included.

Reconfigurable lattice mesh designs for programmable photonic processors.

Science.gov (United States)

Pérez, Daniel; Gasulla, Ivana; Capmany, José; Soref, Richard A

2016-05-30

We propose and analyse two novel mesh design geometries for the implementation of tunable optical cores in programmable photonic processors. These geometries are the hexagonal and the triangular lattice. They are compared here to a previously proposed square mesh topology in terms of a series of figures of merit that account for metrics that are relevant to on-chip integration of the mesh. We find that that the hexagonal mesh is the most suitable option of the three considered for the implementation of the reconfigurable optical core in the programmable processor.

Interactive high-resolution isosurface ray casting on multicore processors.

Science.gov (United States)

Wang, Qin; JaJa, Joseph

2008-01-01

We present a new method for the interactive rendering of isosurfaces using ray casting on multi-core processors. This method consists of a combination of an object-order traversal that coarsely identifies possible candidate 3D data blocks for each small set of contiguous pixels, and an isosurface ray casting strategy tailored for the resulting limited-size lists of candidate 3D data blocks. While static screen partitioning is widely used in the literature, our scheme performs dynamic allocation of groups of ray casting tasks to ensure almost equal loads among the different threads running on multi-cores while maintaining spatial locality. We also make careful use of memory management environment commonly present in multi-core processors. We test our system on a two-processor Clovertown platform, each consisting of a Quad-Core 1.86-GHz Intel Xeon Processor, for a number of widely different benchmarks. The detailed experimental results show that our system is efficient and scalable, and achieves high cache performance and excellent load balancing, resulting in an overall performance that is superior to any of the previous algorithms. In fact, we achieve an interactive isosurface rendering on a 1024(2) screen for all the datasets tested up to the maximum size of the main memory of our platform.

77 FR 124 - Biological Processors of Alabama; Decatur, Morgan County, AL; Notice of Settlement

Science.gov (United States)

2012-01-03

... ENVIRONMENTAL PROTECTION AGENCY [FRL-9612-9] Biological Processors of Alabama; Decatur, Morgan... reimbursement of past response costs concerning the Biological Processors of Alabama Superfund Site located in... Ms. Paula V. Painter. Submit your comments by Site name Biological Processors of Alabama Superfund...

Marine X-band Weather Radar Data Calibration

DEFF Research Database (Denmark)

Thorndahl, Søren Liedtke; Rasmussen, Michael R.

2012-01-01

estimates. This paper presents some of the challenges in small marine X-band radar calibration by comparing three calibration procedures for assessing the relationship between radar and rain gauge data. Validation shows similar results for precipitation volumes but more diverse results on peak rain......Application of weather radar data in urban hydrology is evolving and radar data is now applied for both modelling, analysis, and real time control purposes. In these contexts, it is allimportant that the radar data is well calibrated and adjusted in order to obtain valid quantitative precipitation...

Raindrop size distribution and radar reflectivity-rain rate relationships for radar hydrology

NARCIS (Netherlands)

Uijlenhoet, R.

2001-01-01

The conversion of the radar reflectivity factor Z (mm6m-3) to rain rate R (mm h-1) is a crucial step in the hydrological application of weather radar measurements. It has been common practice for over 50 years now to take for this conversion a simple power law relationship between Z and R. It is the

5 year radar-based rainfall statistics: disturbances analysis and development of a post-correction scheme for the German radar composite

Science.gov (United States)

Wagner, A.; Seltmann, J.; Kunstmann, H.

2015-02-01

A radar-based rainfall statistic demands high quality data that provide realistic precipitation amounts in space and time. Instead of correcting single radar images, we developed a post-correction scheme for long-term composite radar data that corrects corrupted areas, but preserves the original precipitation patterns. The post-correction scheme is based on a 5 year statistical analysis of radar composite data and its constituents. The accumulation of radar images reveals artificial effects that are not visible in the individual radar images. Some of them are already inherent to single radar data such as the effect of increasing beam height, beam blockage or clutter remnants. More artificial effects are introduced in the process of compositing such as sharp gradients at the boundaries of overlapping areas due to different beam heights and resolution. The cause of these disturbances, their behaviour with respect to reflectivity level, season or altitude is analysed based on time-series of two radar products: the single radar reflectivity product PX for each of the 16 radar systems of the German Meteorological Service (DWD) for the time span 2000 to 2006 and the radar composite product RX of DWD from 2005 through to 2009. These statistics result in additional quality information on radar data that is not available elsewhere. The resulting robust characteristics of disturbances, e.g. the dependency of the frequencies of occurrence of radar reflectivities on beam height, are then used as a basis for the post-correction algorithm. The scheme comprises corrections for shading effects and speckles, such as clutter remnants or overfiltering, as well as for systematic differences in frequencies of occurrence of radar reflectivities between the near and the far ranges of individual radar sites. An adjustment to rain gauges is also included. Applying this correction, the Root-Mean-Square-Error for the comparison of radar derived annual rain amounts with rain gauge data

Low-Cost Mini Radar: Design Prototyping and Tests

Directory of Open Access Journals (Sweden)

Dario Tarchi

2017-01-01

Full Text Available Radar systems are largely employed for surveillance of wide and remote areas; the recent advent of drones gives the opportunity to exploit radar sensors on board of unmanned aerial platforms. Nevertheless, whereas drone radars are currently available for military applications, their employment in the civilian domain is still limited. The present research focuses on design, prototyping, and testing of an agile, low-cost, mini radar system, to be carried on board of Remotely Piloted Aircraft (RPAs or tethered aerostats. In particular, the paper faces the challenge to integrate the in-house developed radar sensor with a low-cost navigation board, which is used to estimate attitude and positioning data. In fact, a suitable synchronization between radar and navigation data is essential to properly reconstruct the radar picture whenever the platform is moving or the radar is scanning different azimuthal sectors. Preliminary results, relative to tests conducted in preoperational conditions, are provided and exploited to assert the suitable consistency of the obtained radar pictures. From the results, there is a high consistency between the radar images and the picture of the current environment emerges; finally, the comparison of radar images obtained in different scans shows the stability of the platform.

Radar signal analysis and processing using Matlab

CERN Document Server

Mahafza, Bassem R

2008-01-01

Offering radar-related software for the analysis and design of radar waveform and signal processing, this book provides comprehensive coverage of radar signals and signal processing techniques and algorithms. It contains numerous graphical plots, common radar-related functions, table format outputs, and end-of-chapter problems. The complete set of MATLAB[registered] functions and routines are available for download online.

Monte Carlo photon transport on shared memory and distributed memory parallel processors

International Nuclear Information System (INIS)

Martin, W.R.; Wan, T.C.; Abdel-Rahman, T.S.; Mudge, T.N.; Miura, K.

1987-01-01

Parallelized Monte Carlo algorithms for analyzing photon transport in an inertially confined fusion (ICF) plasma are considered. Algorithms were developed for shared memory (vector and scalar) and distributed memory (scalar) parallel processors. The shared memory algorithm was implemented on the IBM 3090/400, and timing results are presented for dedicated runs with two, three, and four processors. Two alternative distributed memory algorithms (replication and dispatching) were implemented on a hypercube parallel processor (1 through 64 nodes). The replication algorithm yields essentially full efficiency for all cube sizes; with the 64-node configuration, the absolute performance is nearly the same as with the CRAY X-MP. The dispatching algorithm also yields efficiencies above 80% in a large simulation for the 64-processor configuration

Radar efficiency and the calculation of decade-long PMSE backscatter cross-section for the Resolute Bay VHF radar

Directory of Open Access Journals (Sweden)

N. Swarnalingam

2009-04-01

Full Text Available The Resolute Bay VHF radar, located in Nunavut, Canada (75.0° N, 95.0° W and operating at 51.5 MHz, has been used to investigate Polar Mesosphere Summer Echoes (PMSE since 1997. PMSE are a unique form of strong coherent radar echoes, and their understanding has been a challenge to the scientific community since their discovery more than three decades ago. While other high latitude radars have recorded strong levels of PMSE activities, the Resolute Bay radar has observed relatively lower levels of PMSE strengths. In order to derive absolute measurements of PMSE strength at this site, a technique is developed to determine the radar efficiency using cosmic (sky noise variations along with the help of a calibrated noise source. VHF radars are only rarely calibrated, but determination of efficiency is even less common. Here we emphasize the importance of efficiency for determination of cross-section measurements. The significant advantage of this method is that it can be directly applied to any MST radar system anywhere in the world as long as the sky noise variations are known. The radar efficiencies for two on-site radars at Resolute Bay are determined. PMSE backscatter cross-section is estimated, and decade-long PMSE strength variations at this location are investigated. It was noticed that the median of the backscatter cross-section distribution remains relatively unchanged, but over the years a great level of variability occurs in the high power tail of the distribution.

Wind farm radar study

International Nuclear Information System (INIS)

Davies, N.G.

1995-01-01

This report examines the possible degradations of radar performance that may be caused by the presence of a wind turbine generator within the radar coverage area. A brief literature survey reviews the previously published work, which is mainly concerned with degradation of broadcast TV reception. Estimates are made of wind turbine generator scattering cross-sections, and of the time and Doppler characteristics of the echo signals from representative wind turbine generator. The general characteristics of radar detection and tracking methods are described, and the behaviour of such systems in the presence of strong returns from a wind turbine generator (or an array of them) is discussed. (author)

Radar techniques using array antennas

CERN Document Server

Wirth, Wulf-Dieter

2013-01-01

Radar Techniques Using Array Antennas is a thorough introduction to the possibilities of radar technology based on electronic steerable and active array antennas. Topics covered include array signal processing, array calibration, adaptive digital beamforming, adaptive monopulse, superresolution, pulse compression, sequential detection, target detection with long pulse series, space-time adaptive processing (STAP), moving target detection using synthetic aperture radar (SAR), target imaging, energy management and system parameter relations. The discussed methods are confirmed by simulation stud

New look at radar auroral motions

International Nuclear Information System (INIS)

Greenwald, R.A.; Ecklund, W.L.

1975-01-01

During October 1974, three modifications were temporarily added to the NOAA radar auroral backscatter facility located at Anchorage, Alaska. These modifications included (1) a multiple azimuth antenna system. (2) an on-line computer for processing amplitude and mean Doppler profiles of the radar backscatter, and (3) a 13-baud Barker coder. In combination with the radar these modifications provided data relevant to understanding both the microscopic and the macroscopic nature of the radar aurora. Appreciable structure was often found in the Doppler velocity profiles of radar auroral irregularities. Doppler velocities of nearly 2000 m/s were observed. By combining scatter amplitude profiles and mean Doppler profiles from the five azimuths we have produced contour maps of the scatter intensity and the Doppler velocity. The scatter intensity maps often indicate appreciable temporal and spatial structure in the radar auroral irregularities, corroborating the results of Tsunoda et al. (1974). The mean Doppler contour maps indicate that there is also appreciable temporal and spatial structure in the flow velocities of radar auroral irregularities. At those times when there appears to be large-scale uniformity in the irregularity flow, the Doppler velocity varies with azimuth in a manner that is consistent with a cosine-dependent azimuthal variation

Comet radar explorer

Science.gov (United States)

Farnham, Tony; Asphaug, Erik; Barucci, Antonella; Belton, Mike; Bockelee-Morvan, Dominique; Brownlee, Donald; Capria, Maria Teresa; Carter, Lynn; Chesley, Steve; Farnham, Tony; Gaskell, Robert; Gim, Young; Heggy, Essam; Herique, Alain; Klaasen, Ken; Kofman, Wlodek; Kreslavsky, Misha; Lisse, Casey; Orosei, Roberto; Plaut, Jeff; Scheeres, Dan

The Comet Radar Explorer (CORE) is designed to perform a comprehensive and detailed exploration of the interior, surface, and inner coma structures of a scientifically impor-tant Jupiter family comet. These structures will be used to investigate the origins of cometary nuclei, their physical and geological evolution, and the mechanisms driving their spectacular activity. CORE is a high heritage spacecraft, injected by solar electric propulsion into orbit around a comet. It is capable of coherent deep radar imaging at decameter wavelengths, high resolution stereo color imaging, and near-IR imaging spectroscopy. Its primary objective is to obtain a high-resolution map of the interior structure of a comet nucleus at a resolution of ¿100 elements across the diameter. This structure shall be related to the surface geology and morphology, and to the structural details of the coma proximal to the nucleus. This is an ideal complement to the science from recent comet missions, providing insight into how comets work. Knowing the structure of the interior of a comet-what's inside-and how cometary activity works, is required before we can understand the requirements for a cryogenic sample return mission. But more than that, CORE is fundamental to understanding the origin of comets and their evolution in time. The mission is made feasible at low cost by the use of now-standard MARSIS-SHARAD reflec-tion radar imaging hardware and data processing, together with proven flight heritage of solar electric propulsion. Radar flight heritage has been demonstrated by the MARSIS radar on Mars Express (Picardi et al., Science 2005; Plaut et al., Science 2007), the SHARAD radar onboard the Mars Reconnaissance Orbiter (Seu et al., JGR 2007), and the LRS radar onboard Kaguya (Ono et al, EPS 2007). These instruments have discovered detailed subsurface structure to depths of several kilometers in a variety of terrains on Mars and the Moon. A reflection radar deployed in orbit about a comet

Very Long Instruction Word Processors

Indian Academy of Sciences (India)

Explicitly Parallel Instruction Computing (EPIC) is an instruction processing paradigm that has been in the spot- light due to its adoption by the next generation of Intel. Processors starting with the IA-64. The EPIC processing paradigm is an evolution of the Very Long Instruction. Word (VLIW) paradigm. This article gives an ...

User manual Dieka PreProcessor

NARCIS (Netherlands)

Valkering, Kasper

2000-01-01

This is the user manual belonging to the Dieka-PreProcessor. This application was written by Wenhua Cao and revised and expanded by Kasper Valkering. The aim of this preproccesor is to be able to draw and mesh extrusion dies in ProEngineer, and do the FE-calculation in Dieka. The preprocessor makes

Safety and economic impacts of photo radar program.

Science.gov (United States)

Chen, Greg

2005-12-01

Unsafe speed is one of the major traffic safety challenges facing motorized nations. In 2003, unsafe speed contributed to 31 percent of all fatal collisions, causing a loss of 13,380 lives in the United States alone. The economic impact of speeding is tremendous. According to NHTSA, the cost of unsafe speed related collisions to the American society exceeds 40 billion US dollars per year. In response, automated photo radar speed enforcement programs have been implemented in many countries. This study assesses the economic impacts of a large-scale photo radar program in British Columbia. The knowledge generated from this study could inform policy makers and project managers in making informed decisions with regard to this highly effective and efficient, yet very controversial program. This study establishes speed and safety effects of photo radar programs by summarizing two physical impact investigations in British Columbia. It then conducts a cost-benefit analysis to assess the program's economic impacts. The cost-benefit analysis takes into account both societal and funding agency's perspectives. It includes a comprehensive account of major impacts. It uses willingness to pay principle to value human lives saved and injuries avoided. It incorporates an extended sensitivity analysis to quantify the robustness of base case conclusions. The study reveals an annual net benefit of approximately 114 million in year 2001 Canadian dollars to British Columbians. The study also finds a net annual saving of over 38 million Canadian dollars for the Insurance Corporation of British Columbia (ICBC) that funded the program. These results are robust under almost all alternative scenarios tested. The only circumstance under which the net benefit of the program turns negative is when the real safety effects were one standard deviation below the estimated values, which is possible but highly unlikely. Automated photo radar traffic safety enforcement can be an effective and efficient

Hydrologic applications of weather radar

Science.gov (United States)

Seo, Dong-Jun; Habib, Emad; Andrieu, Hervé; Morin, Efrat

2015-12-01

By providing high-resolution quantitative precipitation information (QPI), weather radars have revolutionized hydrology in the last two decades. With the aid of GIS technology, radar-based quantitative precipitation estimates (QPE) have enabled routine high-resolution hydrologic modeling in many parts of the world. Given the ever-increasing need for higher-resolution hydrologic and water resources information for a wide range of applications, one may expect that the use of weather radar will only grow. Despite the tremendous progress, a number of significant scientific, technological and engineering challenges remain to realize its potential. New challenges are also emerging as new areas of applications are discovered, explored and pursued. The purpose of this special issue is to provide the readership with some of the latest advances, lessons learned, experiences gained, and science issues and challenges related to hydrologic applications of weather radar. The special issue features 20 contributions on various topics which reflect the increasing diversity as well as the areas of focus in radar hydrology today. The contributions may be grouped as follows:

Classification of radar echoes using fractal geometry

International Nuclear Information System (INIS)

Azzaz, Nafissa; Haddad, Boualem

2017-01-01

Highlights: • Implementation of two concepts of fractal geometry to classify two types of meteorological radar echoes. • A new approach, called a multi-scale fractal dimension is used for classification between fixed echoes and rain echoes. • An Automatic identification system of meteorological radar echoes was proposed using fractal geometry. - Abstract: This paper deals with the discrimination between the precipitation echoes and the ground echoes in meteorological radar images using fractal geometry. This study aims to improve the measurement of precipitations by weather radars. For this, we considered three radar sites: Bordeaux (France), Dakar (Senegal) and Me lbourne (USA). We showed that the fractal dimension based on contourlet and the fractal lacunarity are pertinent to discriminate between ground and precipitation echoes. We also demonstrated that the ground echoes have a multifractal structure but the precipitations are more homogeneous than ground echoes whatever the prevailing climate. Thereby, we developed an automatic classification system of radar using a graphic interface. This interface, based on the fractal geometry makes possible the identification of radar echoes type in real time. This system can be inserted in weather radar for the improvement of precipitation estimations.

MST radar data-base management

Science.gov (United States)

Wickwar, V. B.

1983-01-01

Data management for Mesospheric-Stratospheric-Tropospheric, (MST) radars is addressed. An incoherent-scatter radar data base is discussed in terms of purpose, centralization, scope, and nature of the data base management system.

Stepped-frequency radar sensors theory, analysis and design

CERN Document Server

Nguyen, Cam

2016-01-01

This book presents the theory, analysis and design of microwave stepped-frequency radar sensors. Stepped-frequency radar sensors are attractive for various sensing applications that require fine resolution. The book consists of five chapters. The first chapter describes the fundamentals of radar sensors including applications followed by a review of ultra-wideband pulsed, frequency-modulated continuous-wave (FMCW), and stepped-frequency radar sensors. The second chapter discusses a general analysis of radar sensors including wave propagation in media and scattering on targets, as well as the radar equation. The third chapter addresses the analysis of stepped-frequency radar sensors including their principles and design parameters. Chapter 4 presents the development of two stepped-frequency radar sensors at microwave and millimeter-wave frequencies based on microwave integrated circuits (MICs), microwave monolithic integrated circuits (MMICs) and printed-circuit antennas, and discusses their signal processing....

Challenges in X-band Weather Radar Data Calibration

DEFF Research Database (Denmark)

Thorndahl, Søren; Rasmussen, Michael R.

2009-01-01

Application of weather radar data in urban hydrology is evolving and radar data is now applied for both modelling, analysis and real time control purposes. In these contexts, it is all-important that the radar data well calibrated and adjusted in order to obtain valid quantitative precipitation e...... estimates. This paper compares two calibration procedures for a small marine X-band radar by comparing radar data with rain gauge data. Validation shows a very good consensus with regards to precipitation volumes, but more diverse results on peak rain intensities.......Application of weather radar data in urban hydrology is evolving and radar data is now applied for both modelling, analysis and real time control purposes. In these contexts, it is all-important that the radar data well calibrated and adjusted in order to obtain valid quantitative precipitation...

Radar principles for the nonspecialist, 3rd edition

CERN Document Server

Toomay, John

2004-01-01

Radar Principles for the Non-specialist, Third Edition continues its popular tradition: to distill the very complex technology of radar into its fundamentals, tying them to the laws of nature on one end and to the most modern and complex systems on the other. It starts with electromagnetic propagation, describes a radar of the utmost simplicity, and derives the radar range equation from that simple radar. Once the range equation is available, the book attacks the meaning of each term in it, moving through antennas, detection and tracking, radar cross-section, waveforms andsignal proces

Evaluation of the Intel Westmere-EX server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2011-01-01

One year after the arrival of the Intel Xeon 7500 systems (“Nehalem-EX”), CERN openlab is presenting a set of benchmark results obtained when running on the new Xeon E7-4870 Processors, representing the “Westmere-EX” family. A modern 4-socket, 40-core system is confronted with the previous generation of expandable (“EX”) platforms, represented by a 4-socket, 32-core Intel Xeon X7560 based system – both being “top of the line” systems. Benchmarking of modern processors is a very complex affair. One has to control (at least) the following features: processor frequency, overclocking via Turbo mode, the number of physical cores in use, the use of logical cores via Symmetric MultiThreading (SMT), the cache sizes available, the configured memory topology, as well as the power configuration if throughput per watt is to be measured. As in previous activities, we have tried to do a good job of comparing like with like. In a “top of the line” comparison based on the HEPSPEC06 benchmark, the “We...

3081/E processor and its on-line use

International Nuclear Information System (INIS)

Rankin, P.; Bricaud, B.; Gravina, M.

1985-05-01

The 3081/E is a second generation emulator of a mainframe IBM. One of it's applications will be to form part of the data acquisition system of the upgraded Mark II detector for data taking at the SLAC linear collider. Since the processor does not have direct connections to I/O devices a FASTBUS interface will be provided to allow communication with both SLAC Scanner Processors (which are responsible for the accumulation of data at a crate level) and the experiment's VAX 8600 mainframe. The 3081/E's will supply a significant amount of on-line computing power to the experiment (a single 3081/E is equivalent to 4 to 5 VAX 11/780's). A major advantage of the 3081/E is that program development can be done on an IBM mainframe (such as the one used for off-line analysis) which gives the programmer access to a full range of debugging tools. The processor's performance can be continually monitored by comparison of the results obtained using it to those given when the same program is run on an IBM computer. 9 refs

Principles of modern radar advanced techniques

CERN Document Server

Melvin, William

2012-01-01

Principles of Modern Radar: Advanced Techniques is a professional reference for practicing engineers that provides a stepping stone to advanced practice with in-depth discussions of the most commonly used advanced techniques for radar design. It will also serve advanced radar academic and training courses with a complete set of problems for students as well as solutions for instructors.

An intercomparison of Canadian external dosimetry processors for radiation protection

International Nuclear Information System (INIS)

1989-10-01

The five Canadian external dosimetry processors have participated in a two-stage intercomparison. The first stage involved dosimeters to known radiation fields under controlled laboratory conditions. The second stage involved exposing dosimeters to radiation fields in power reactor working environments. The results for each stage indicated the dose reported by each processor relative to an independently determined dose and relative to the others. The results of the intercomparisons confirm the original supposition: namely that the average differences in reported dose among five processors are much less than the uncertainty limits recommended by the ICRP. This report provides a description of the experimental methods as well as a discussion of the results for each stage. The report also includes a set of recommendations

Mutual information-based LPI optimisation for radar network

Science.gov (United States)

Shi, Chenguang; Zhou, Jianjiang; Wang, Fei; Chen, Jun

2015-07-01

Radar network can offer significant performance improvement for target detection and information extraction employing spatial diversity. For a fixed number of radars, the achievable mutual information (MI) for estimating the target parameters may extend beyond a predefined threshold with full power transmission. In this paper, an effective low probability of intercept (LPI) optimisation algorithm is presented to improve LPI performance for radar network. Based on radar network system model, we first provide Schleher intercept factor for radar network as an optimisation metric for LPI performance. Then, a novel LPI optimisation algorithm is presented, where for a predefined MI threshold, Schleher intercept factor for radar network is minimised by optimising the transmission power allocation among radars in the network such that the enhanced LPI performance for radar network can be achieved. The genetic algorithm based on nonlinear programming (GA-NP) is employed to solve the resulting nonconvex and nonlinear optimisation problem. Some simulations demonstrate that the proposed algorithm is valuable and effective to improve the LPI performance for radar network.

A high-speed analog neural processor

NARCIS (Netherlands)

Masa, P.; Masa, Peter; Hoen, Klaas; Hoen, Klaas; Wallinga, Hans

1994-01-01

Targeted at high-energy physics research applications, our special-purpose analog neural processor can classify up to 70 dimensional vectors within 50 nanoseconds. The decision-making process of the implemented feedforward neural network enables this type of computation to tolerate weight

Processor farming in two-level analysis of historical bridge

Science.gov (United States)

Krejčí, T.; Kruis, J.; Koudelka, T.; Šejnoha, M.

2017-11-01

This contribution presents a processor farming method in connection with a multi-scale analysis. In this method, each macro-scopic integration point or each finite element is connected with a certain meso-scopic problem represented by an appropriate representative volume element (RVE). The solution of a meso-scale problem provides then effective parameters needed on the macro-scale. Such an analysis is suitable for parallel computing because the meso-scale problems can be distributed among many processors. The application of the processor farming method to a real world masonry structure is illustrated by an analysis of Charles bridge in Prague. The three-dimensional numerical model simulates the coupled heat and moisture transfer of one half of arch No. 3. and it is a part of a complex hygro-thermo-mechanical analysis which has been developed to determine the influence of climatic loading on the current state of the bridge.

Array processors: an introduction to their architecture, software, and applications in nuclear medicine

International Nuclear Information System (INIS)

King, M.A.; Doherty, P.W.; Rosenberg, R.J.; Cool, S.L.

1983-01-01

Array processors are ''number crunchers'' that dramatically enhance the processing power of nuclear medicine computer systems for applicatons dealing with the repetitive operations involved in digital image processing of large segments of data. The general architecture and the programming of array processors are introduced, along with some applications of array processors to the reconstruction of emission tomographic images, digital image enhancement, and functional image formation

Radar operation in a hostile electromagnetic environment

Energy Technology Data Exchange (ETDEWEB)

Doerry, Armin Walter

2014-03-01

Radar ISR does not always involve cooperative or even friendly targets. An adversary has numerous techniques available to him to counter the effectiveness of a radar ISR sensor. These generally fall under the banner of jamming, spoofing, or otherwise interfering with the EM signals required by the radar sensor. Consequently mitigation techniques are prudent to retain efficacy of the radar sensor. We discuss in general terms a number of mitigation techniques.

Aspects of Radar Polarimetry

OpenAIRE

LÜNEBURG, Ernst

2002-01-01

This contribution is a tutorial introduction to the phenomenological theory of radar polarimetry for the coherent scatter case emphasizing monostatic backscattering and forward scattering (transmission). Characteristic similarities and differences between radar polarimetry and optical polarimetry and the role of linear and antilinear operators (time-reversal) are pointed out and typical polarimetric invariants are identified.

Remote sensing with laser spectrum radar

Science.gov (United States)

Wang, Tianhe; Zhou, Tao; Jia, Xiaodong

2016-10-01

The unmanned airborne (UAV) laser spectrum radar has played a leading role in remote sensing because the transmitter and the receiver are together at laser spectrum radar. The advantages of the integrated transceiver laser spectrum radar is that it can be used in the oil and gas pipeline leak detection patrol line which needs the non-contact reflective detection. The UAV laser spectrum radar can patrol the line and specially detect the swept the area are now in no man's land because most of the oil and gas pipelines are in no man's land. It can save labor costs compared to the manned aircraft and ensure the safety of the pilots. The UAV laser spectrum radar can be also applied in the post disaster relief which detects the gas composition before the firefighters entering the scene of the rescue.

The Use of Ground Penetrating Radar to extend the Results of Archaeological Excavation

Science.gov (United States)

Utsi, E.

2009-04-01

The condition of the Romano-British archaeological site in Wortley, Gloucestershire, UK is typical of sites of the period in that it has been heavily robbed out since it first fell into disuse. Building materials taken from the site have been re-used over the centuries to construct other local buildings. This makes both preservation of the extant remains and interpretation of the excavation problematic. Following the accidental discovery of the site in the 1980s, a programme of excavation was set in place. This excavation was run as a practical archaeological training school and, as a result, a wide range of archaeological and geophysical techniques were applied to the site. This included the introduction of Ground Penetrating Radar (GPR). The preliminary results of the first GPR used on site were not entirely satisfactory which led to the development of a new radar in the early 1990s, specifically developed for use on archaeological sites. The excavation and GPR results were published in a series of excavation reports [1] [2]. It was not possible to excavate fully for two reasons. Firstly the site crossed present day ownership boundaries and secondly the ownership of the excavation area changed. At this point the excavation was summarily terminated. In 2007, permission was given by the owner of an adjacent property to carry out a GPR survey over their land in order to derive additional information, if possible. An area survey was carried out in May 2007 with reduced transect spacing [3]. The radar data showed similar patterning to that of the original investigation i.e. substantial remains which had been subject to a high degree of post-occupational attrition. Time slices from the radar survey were matched to the principal excavation plans. It proved possible to deduce the full extent of certain partially excavated features, notably the courtyard and bath house. It was also possible to demonstrate that one part of the adjacent property did not contain similar

Wavelength-encoded OCDMA system using opto-VLSI processors.

Science.gov (United States)

Aljada, Muhsen; Alameh, Kamal

2007-07-01

We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg wavelengths. The FBG array spectrally and temporally slices the broadband input pulse into several components and the opto-VLSI processor generates codewords using digital phase holograms. System performance is measured in terms of the autocorrelation and cross-correlation functions as well as the eye diagram.

Wavelength-encoded OCDMA system using opto-VLSI processors

Science.gov (United States)

Aljada, Muhsen; Alameh, Kamal

2007-07-01

We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg wavelengths. The FBG array spectrally and temporally slices the broadband input pulse into several components and the opto-VLSI processor generates codewords using digital phase holograms. System performance is measured in terms of the autocorrelation and cross-correlation functions as well as the eye diagram.

Using phase for radar scatterer classification

Science.gov (United States)

Moore, Linda J.; Rigling, Brian D.; Penno, Robert P.; Zelnio, Edmund G.

2017-04-01

Traditional synthetic aperture radar (SAR) systems tend to discard phase information of formed complex radar imagery prior to automatic target recognition (ATR). This practice has historically been driven by available hardware storage, processing capabilities, and data link capacity. Recent advances in high performance computing (HPC) have enabled extremely dense storage and processing solutions. Therefore, previous motives for discarding radar phase information in ATR applications have been mitigated. First, we characterize the value of phase in one-dimensional (1-D) radar range profiles with respect to the ability to correctly estimate target features, which are currently employed in ATR algorithms for target discrimination. These features correspond to physical characteristics of targets through radio frequency (RF) scattering phenomenology. Physics-based electromagnetic scattering models developed from the geometrical theory of diffraction are utilized for the information analysis presented here. Information is quantified by the error of target parameter estimates from noisy radar signals when phase is either retained or discarded. Operating conditions (OCs) of signal-tonoise ratio (SNR) and bandwidth are considered. Second, we investigate the value of phase in 1-D radar returns with respect to the ability to correctly classify canonical targets. Classification performance is evaluated via logistic regression for three targets (sphere, plate, tophat). Phase information is demonstrated to improve radar target classification rates, particularly at low SNRs and low bandwidths.

Pedestrian recognition using automotive radar sensors

Science.gov (United States)

Bartsch, A.; Fitzek, F.; Rasshofer, R. H.

2012-09-01

The application of modern series production automotive radar sensors to pedestrian recognition is an important topic in research on future driver assistance systems. The aim of this paper is to understand the potential and limits of such sensors in pedestrian recognition. This knowledge could be used to develop next generation radar sensors with improved pedestrian recognition capabilities. A new raw radar data signal processing algorithm is proposed that allows deep insights into the object classification process. The impact of raw radar data properties can be directly observed in every layer of the classification system by avoiding machine learning and tracking. This gives information on the limiting factors of raw radar data in terms of classification decision making. To accomplish the very challenging distinction between pedestrians and static objects, five significant and stable object features from the spatial distribution and Doppler information are found. Experimental results with data from a 77 GHz automotive radar sensor show that over 95% of pedestrians can be classified correctly under optimal conditions, which is compareable to modern machine learning systems. The impact of the pedestrian's direction of movement, occlusion, antenna beam elevation angle, linear vehicle movement, and other factors are investigated and discussed. The results show that under real life conditions, radar only based pedestrian recognition is limited due to insufficient Doppler frequency and spatial resolution as well as antenna side lobe effects.

Efficient Multicriteria Protein Structure Comparison on Modern Processor Architectures

Science.gov (United States)

Manolakos, Elias S.

2015-01-01

Fast increasing computational demand for all-to-all protein structures comparison (PSC) is a result of three confounding factors: rapidly expanding structural proteomics databases, high computational complexity of pairwise protein comparison algorithms, and the trend in the domain towards using multiple criteria for protein structures comparison (MCPSC) and combining results. We have developed a software framework that exploits many-core and multicore CPUs to implement efficient parallel MCPSC in modern processors based on three popular PSC methods, namely, TMalign, CE, and USM. We evaluate and compare the performance and efficiency of the two parallel MCPSC implementations using Intel's experimental many-core Single-Chip Cloud Computer (SCC) as well as Intel's Core i7 multicore processor. We show that the 48-core SCC is more efficient than the latest generation Core i7, achieving a speedup factor of 42 (efficiency of 0.9), making many-core processors an exciting emerging technology for large-scale structural proteomics. We compare and contrast the performance of the two processors on several datasets and also show that MCPSC outperforms its component methods in grouping related domains, achieving a high F-measure of 0.91 on the benchmark CK34 dataset. The software implementation for protein structure comparison using the three methods and combined MCPSC, along with the developed underlying rckskel algorithmic skeletons library, is available via GitHub. PMID:26605332

Efficient Multicriteria Protein Structure Comparison on Modern Processor Architectures.

Science.gov (United States)

Sharma, Anuj; Manolakos, Elias S

2015-01-01

Fast increasing computational demand for all-to-all protein structures comparison (PSC) is a result of three confounding factors: rapidly expanding structural proteomics databases, high computational complexity of pairwise protein comparison algorithms, and the trend in the domain towards using multiple criteria for protein structures comparison (MCPSC) and combining results. We have developed a software framework that exploits many-core and multicore CPUs to implement efficient parallel MCPSC in modern processors based on three popular PSC methods, namely, TMalign, CE, and USM. We evaluate and compare the performance and efficiency of the two parallel MCPSC implementations using Intel's experimental many-core Single-Chip Cloud Computer (SCC) as well as Intel's Core i7 multicore processor. We show that the 48-core SCC is more efficient than the latest generation Core i7, achieving a speedup factor of 42 (efficiency of 0.9), making many-core processors an exciting emerging technology for large-scale structural proteomics. We compare and contrast the performance of the two processors on several datasets and also show that MCPSC outperforms its component methods in grouping related domains, achieving a high F-measure of 0.91 on the benchmark CK34 dataset. The software implementation for protein structure comparison using the three methods and combined MCPSC, along with the developed underlying rckskel algorithmic skeletons library, is available via GitHub.

Target scattering characteristics for OAM-based radar

Directory of Open Access Journals (Sweden)

Kang Liu

2018-02-01

Full Text Available The target scattering characteristics are crucial for radar systems. However, there is very little study conducted for the recently developed orbital angular momentum (OAM based radar system. To illustrate the role of OAM-based radar cross section (ORCS, conventional radar equation is modified by taking characteristics of the OAM waves into account. Subsequently, the ORCS is defined in analogy to classical radar cross section (RCS. The unique features of the incident OAM-carrying field are analyzed. The scattered field is derived, and the analytical expressions of ORCSs for metal plate and cylinder targets are obtained. Furthermore, the ORCS and RCS are compared to illustrate the influences of OAM mode number, target size and signal frequency on the ORCS. Analytical studies demonstrate that the mirror-reflection phenomenon disappears and peak values of ORCS are in the non-specular direction. Finally, the ORCS features are summarized to show its advantages in radar target detection. This work can provide theoretical guidance to the design of OAM-based radar as well as the target detection and identification applications.

Target scattering characteristics for OAM-based radar

Science.gov (United States)

Liu, Kang; Gao, Yue; Li, Xiang; Cheng, Yongqiang

2018-02-01

The target scattering characteristics are crucial for radar systems. However, there is very little study conducted for the recently developed orbital angular momentum (OAM) based radar system. To illustrate the role of OAM-based radar cross section (ORCS), conventional radar equation is modified by taking characteristics of the OAM waves into account. Subsequently, the ORCS is defined in analogy to classical radar cross section (RCS). The unique features of the incident OAM-carrying field are analyzed. The scattered field is derived, and the analytical expressions of ORCSs for metal plate and cylinder targets are obtained. Furthermore, the ORCS and RCS are compared to illustrate the influences of OAM mode number, target size and signal frequency on the ORCS. Analytical studies demonstrate that the mirror-reflection phenomenon disappears and peak values of ORCS are in the non-specular direction. Finally, the ORCS features are summarized to show its advantages in radar target detection. This work can provide theoretical guidance to the design of OAM-based radar as well as the target detection and identification applications.

Radar application in void and bar detection

International Nuclear Information System (INIS)

Amry Amin Abas; Mohamad Pauzi Ismail; Suhairy Sani

2003-01-01

Radar is one of the new non-destructive testing techniques for concrete and structures inspection. Radar is a non-ionizing electromagnetic wave that can penetrate deep into concrete or soil in about several tenths of meters. Method of inspection using radar enables us to perform high resolution detection, imaging and mapping of subsurface concrete and soil condition. This paper will discuss the use of radar for void and bar detection and sizing. The samples used in this paper are custom made samples and comparison will be made to validate the use of radar in detecting, locating and also size determination of voids and bars. (Author)

Radar micro-doppler signatures processing and applications

CERN Document Server

Chen, Victor C; Miceli, William J

2014-01-01

Radar Micro-Doppler Signatures: Processing and applications concentrates on the processing and application of radar micro-Doppler signatures in real world situations, providing readers with a good working knowledge on a variety of applications of radar micro-Doppler signatures.

SAR Ambiguity Study for the Cassini Radar

Science.gov (United States)

Hensley, Scott; Im, Eastwood; Johnson, William T. K.

1993-01-01

The Cassini Radar's synthetic aperture radar (SAR) ambiguity analysis is unique with respect to other spaceborne SAR ambiguity analyses owing to the non-orbiting spacecraft trajectory, asymmetric antenna pattern, and burst mode of data collection. By properly varying the pointing, burst mode timing, and radar parameters along the trajectory this study shows that the signal-to-ambiguity ratio of better than 15 dB can be achieved for all images obtained by the Cassini Radar.

ARM Processor Based Embedded System for Remote Data Acquisition

OpenAIRE

Raj Kumar Tiwari; Santosh Kumar Agrahari

2014-01-01

The embedded systems are widely used for the data acquisition. The data acquired may be used for monitoring various activity of the system or it can be used to control the parts of the system. Accessing various signals with remote location has greater advantage for multisite operation or unmanned systems. The remote data acquisition used in this paper is based on ARM processor. The Cortex M3 processor used in this system has in-built Ethernet controller which facilitate to acquire the remote ...

Application of Advanced Multi-Core Processor Technologies to Oceanographic Research

Science.gov (United States)

2013-09-30

1 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. Application of Advanced Multi-Core Processor Technologies...STM32 NXP LPC series No Proprietary Microchip PIC32/DSPIC No > 500 mW; < 5 W ARM Cortex TI OMAP TI Sitara Broadcom BCM2835 Varies FPGA...state-of-the-art information processing architectures. OBJECTIVES Next-generation processor architectures (multi-core, multi-threaded) hold the

Hardware processors for pattern recognition tasks in experiments with wire chambers

International Nuclear Information System (INIS)

Verkerk, C.

1975-01-01

Hardware processors for pattern recognition tasks in experiments with multiwire proportional chambers or drift chambers are described. They vary from simple ones used for deciding in real time if particle trajectories are straight to complex ones for recognition of curved tracks. Schematics and block-diagrams of different processors are shown

Radar Polarimetry: Theory, Analysis, and Applications

Science.gov (United States)

Hubbert, John Clark

The fields of radar polarimetry and optical polarimetry are compared. The mathematics of optic polarimetry are formulated such that a local right handed coordinate system is always used to describe the polarization states. This is not done in radar polarimetry. Radar optimum polarization theory is redeveloped within the framework of optical polarimetry. The radar optimum polarizations and optic eigenvalues of common scatterers are compared. In addition a novel definition of an eigenpolarization state is given and the accompanying mathematics is developed. The polarization response calculated using optic, radar and novel definitions is presented for a variety of scatterers. Polarimetric transformation provides a means to characterize scatters in more than one polarization basis. Polarimetric transformation for an ensemble of scatters is obtained via two methods: (1) the covariance method and (2) the instantaneous scattering matrix (ISM) method. The covariance method is used to relate the mean radar parameters of a +/-45^circ linear polarization basis to those of a horizontal and vertical polarization basis. In contrast the ISM method transforms the individual time samples. Algorithms are developed for transforming the time series from fully polarimetric radars that switch between orthogonal states. The transformed time series are then used to calculate the mean radar parameters of interest. It is also shown that propagation effects do not need to be removed from the ISM's before transformation. The techniques are demonstrated using data collected by POLDIRAD, the German Aerospace Research Establishment's fully polarimetric C-band radar. The differential phase observed between two copolar states, Psi_{CO}, is composed of two phases: (1) differential propagation phase, phi_{DP}, and (2) differential backscatter phase, delta. The slope of phi_{DP } with range is an estimate of the specific differential phase, K_{DP}. The process of estimating K_{DP} is complicated when

Thermal Dissipation Efficiency in a Micro-Processor Using Carbon Nanotubes Based Composite

Science.gov (United States)

Thang, Bui Hung; Van Quang, Cao; Nghia, Van Trong; Hong, Phan Ngoc; Van Chuc, Nguyen; Tam, Ngo Thi Thanh; Quang, Le Dinh; Khang, Dao Duc; Khoi, Phan Hong; Minh, Phan Ngoc

2009-09-01

Modern electronic and optoelectronic devices such as μ-processor, light emitting diode, semiconductor laser issued a challenge in the thermal dissipation problem. Finding an effective way for thermal dissipation therefore becomes a very important issue. It is known that carbon nanotubes (CNTs) is one of the most valuable materials with high thermal conductivity (2000 W/m.K compared to thermal conductivity of Ag 419 W/m.K). This suggested an approach in applying the CNTs as an essential component for thermal dissipation media to improve the performance of computer processor and other high power electronic devices. In this work multi walled carbon nanotubes (MWCNTs) based composites were utilized as the thermal dissipation media in a micro processor of a personal computer. The MWCNTs of different concentrations were added into polyaniline, commercial silicon thermal paste and commercial silver thermal paste by mechanical methods. A personal computer with configuration: Intel Pentium IV 3.066 GHz, 512 MB of RAM and Windows XP Service Pack 2 Operating System was employed. The thermal dissipation efficiency of the system was evaluated by directly measure the temperature of the μ-processor during the operation of the computer in different CPU speeds. The measured results showed that the CNTs based composite could reduce the temperature of the u-processor more than 5° C, and the time for increasing the temperature of the μ-processor was three times longer than that when using commercial thermal paste.

Video frame processor

International Nuclear Information System (INIS)

Joshi, V.M.; Agashe, Alok; Bairi, B.R.

1993-01-01

This report provides technical description regarding the Video Frame Processor (VFP) developed at Bhabha Atomic Research Centre. The instrument provides capture of video images available in CCIR format. Two memory planes each with a capacity of 512 x 512 x 8 bit data enable storage of two video image frames. The stored image can be processed on-line and on-line image subtraction can also be carried out for image comparisons. The VFP is a PC Add-on board and is I/O mapped within the host IBM PC/AT compatible computer. (author). 9 refs., 4 figs., 19 photographs

UAV-based Radar Sounding of Antarctic Ice

Science.gov (United States)

Leuschen, Carl; Yan, Jie-Bang; Mahmood, Ali; Rodriguez-Morales, Fernando; Hale, Rick; Camps-Raga, Bruno; Metz, Lynsey; Wang, Zongbo; Paden, John; Bowman, Alec; Keshmiri, Shahriar; Gogineni, Sivaprasad

2014-05-01

We developed a compact radar for use on a small UAV to conduct measurements over the ice sheets in Greenland and Antarctica. It operates at center frequencies of 14 and 35 MHz with bandwidths of 1 MHz and 4 MHz, respectively. The radar weighs about 2 kgs and is housed in a box with dimensions of 20.3 cm x 15.2 cm x 13.2 cm. It transmits a signal power of 100 W at a pulse repletion frequency of 10 kHz and requires average power of about 20 W. The antennas for operating the radar are integrated into the wings and airframe of a small UAV with a wingspan of 5.3 m. We selected the frequencies of 14 and 35 MHz based on previous successful soundings of temperate ice in Alaska with a 12.5 MHz impulse radar [Arcone, 2002] and temperate glaciers in Patagonia with a 30 MHz monocycle radar [Blindow et al., 2012]. We developed the radar-equipped UAV to perform surveys over a 2-D grid, which allows us to synthesize a large two-dimensional aperture and obtain fine resolution in both the along- and cross-track directions. Low-frequency, high-sensitivity radars with 2-D aperture synthesis capability are needed to overcome the surface and volume scatter that masks weak echoes from the ice-bed interface of fast-flowing glaciers. We collected data with the radar-equipped UAV on sub-glacial ice near Lake Whillans at both 14 and 35 MHz. We acquired data to evaluate the concept of 2-D aperture synthesis and successfully demonstrated the first successful sounding of ice with a radar on an UAV. We are planning to build multiple radar-equipped UAVs for collecting fine-resolution data near the grounding lines of fast-flowing glaciers. In this presentation we will provide a brief overview of the radar and UAV, as well as present results obtained at both 14 and 35 MHz. Arcone, S. 2002. Airborne-radar stratigraphy and electrical structure of temperate firn: Bagley Ice Field, Alaska, U.S.A. Journal of Glaciology, 48, 317-334. Blindow, N., C. Salat, and G. Casassa. 2012. Airborne GPR sounding of

Introduction to radar target recognition

CERN Document Server

Tait, P

2006-01-01

This new text provides an overview of the radar target recognition process and covers the key techniques being developed for operational systems. It is based on the fundamental scientific principles of high resolution radar, and explains how the techniques can be used in real systems, taking into account the characteristics of practical radar system designs and component limitations. It also addresses operational aspects, such as how high resolution modes would fit in with other functions such as detection and tracking. Mathematics is kept to a minimum and the complex techniques and issues are

Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs

International Nuclear Information System (INIS)

Kretzschmar, U.; Gomez-Cornejo, J.; Astarloa, A.; Bidarte, U.; Ser, J. Del

2016-01-01

The expansion of FPGA technology in numerous application fields is a fact. Single Event Effects (SEE) are a critical factor for the reliability of FPGA based systems. For this reason, a number of researches have been studying fault tolerance techniques to harden different elements of FPGA designs. Using Partial Reconfiguration (PR) in conjunction with Triple Modular Redundancy (TMR) is an emerging approach in recent publications dealing with the implementation of fault tolerant processors on SRAM-based FPGAs. While these works pay great attention to the repair of erroneous instances by means of reconfiguration, the essential step of synchronizing the repaired processors is insufficiently addressed. In this context, this paper poses four different synchronization approaches for soft core processors, which balance differently the trade-off between synchronization speed and hardware overhead. All approaches are assessed in practice by synchronizing TMR protected PicoBlaze processors implemented on a Virtex-5 FPGA. Nevertheless all methods are of a general nature and can be applied for different processor architectures in a straightforward fashion. - Highlights: • Four different synchronization methods for faulty processors are proposed. • The methods balance between synchronization speed and hardware overhead. • They can be applied to TMR-protected reconfigurable FPGA designs. • The proposed schemes are implemented and tested in real hardware.

Simulation of Particulate Flows Multi-Processor Machines with Distributed Memory

Energy Technology Data Exchange (ETDEWEB)

Uhlmann, M.

2004-07-01

We presented a method for the parallelization of an immersed boundary algorithm for particulate flows using the MPI standard of communication. The treatment of the fluid phase used the domain decomposition technique over a Cartesian processor grid. The solution of the Helmholtz problem is approximately factorized an relies upon apparel tri-diagonal solver the Poisson problem is solved by means of a parallel multi-grid technique similar to MUDPACK. for the solid phase we employ a master-slaves technique where one processor handles all the particles contained in its Eulerian fluid sub-domain and zero or more neighbor processors collaborate in the computation of particle-related quantities whenever a particle position over laps the boundary of a sub-domain. the parallel efficiency for some preliminary computations is presented. (Author) 9 refs.

MORPION: a fast hardware processor for straight line finding in MWPC

International Nuclear Information System (INIS)

Mur, M.

1980-02-01

A fast hardware processor for straight line finding in MWPC has been built in Saclay and successfully operated in the NA3 experiment at CERN. We give the motivations to build this processor, and describe the hardware implementation of the line finding algorithm. Finally its use and performance in NA3 are described

Ground and Space Radar Volume Matching and Comparison Software

Science.gov (United States)

Morris, Kenneth; Schwaller, Mathew

2010-01-01

This software enables easy comparison of ground- and space-based radar observations. The software was initially designed to compare ground radar reflectivity from operational, ground based Sand C-band meteorological radars with comparable measurements from the Tropical Rainfall Measuring Mission (TRMM) satellite s Precipitation Radar (PR) instrument. The software is also applicable to other ground-based and space-based radars. The ground and space radar volume matching and comparison software was developed in response to requirements defined by the Ground Validation System (GVS) of Goddard s Global Precipitation Mission (GPM) project. This software innovation is specifically concerned with simplifying the comparison of ground- and spacebased radar measurements for the purpose of GPM algorithm and data product validation. This software is unique in that it provides an operational environment to routinely create comparison products, and uses a direct geometric approach to derive common volumes of space- and ground-based radar data. In this approach, spatially coincident volumes are defined by the intersection of individual space-based Precipitation Radar rays with the each of the conical elevation sweeps of the ground radar. Thus, the resampled volume elements of the space and ground radar reflectivity can be directly compared to one another.

Development Of Signal Detection For Radar Navigation System

OpenAIRE

Theingi Win Hlaing; Hla Myo Tun; Zaw Min Naing; Win Khaing Moe

2017-01-01

This paper aims to evaluate the performance of target detection in the presence of sea clutter. Radar detection of a background of unwanted clutter due to echoes from sea clutter or land is a problem of interest in the radar field. Radar detector has been developed by assuming the radar clutter is Gaussian distributed. However as technology emerges the radar distribution is seen to deviates from the Gaussian assumption. Thus detectors designs based on Gaussian assumption are no longer optimum...

Radar detection of Vesta

International Nuclear Information System (INIS)

Ostro, S.J.; Cornell University, Ithaca, N.Y.); Campbell, D.B.; Pettengill, G.H.

1980-01-01

Asteroid 4 Vesta was detected on November 6, 1979 with the Arecibo Observatory's S-band (12.6-cm-wavelength) radar. The echo power spectrum, received in the circular polarization opposite to that transmitted, yields a radar cross section of (0.2 + or - 0.1)pi a-squared, for a 272 km. The data are too noisy to permit derivation of Vesta's rotation period

Condor equatorial electrojet campaign: Radar results

International Nuclear Information System (INIS)

Kudeki, E.; Fejer, B.G.; Farley, D.T.; Hanuise, C.

1987-01-01

A review of the experimental and theoretical background to the Condor equatorial electrojet compaign is followed by the presentation and discussion of VHF radar interferometer and HF radar backscatter data taken concurrently with two rocket in situ experiments reported in companion papers (Pfaff et al., this issue (a, b). Both experiments were conducted in strongly driven periods with the on-line radar interferometer displaying signatures of what has been interpreted in earlier radar work (Kudeki et al., 1982) as kilometer scale gradient drift waves. Low-frequency density fluctuations detected by in situ rocket sensors confirm the earlier interpretation. VHF radar/rocket data comparisons also indicate the existence of a turbulent layer in the upper portion of the daytime electrojet at about 108 km altitude driven purely by the two-stream instability. Nonlinear mode coupling of linearly growing two-stream waves to linearly damped 3-m vertical modes could account for the radar echoes scattered from this layer, which showed no indication of large-scale gradient drift waves. Nonlinear mode coupling may therefore compete with the wave-induced anomalous diffusion mechanism proposed recently by Sudan (1983) for the saturation of directly excited two-stream waves. Nighttime radar data show a bifurcated layer with the two parts having comparable echo strength but oppositely directed zonal drift velocities. The lower layer shows narrow backscatter spectra; the upper layer is characterized by kilometer scale waves and vertically propagating type 1 waves

A 100 GHz Polarimetric Compact Radar Range for Scale-Model Radar Cross Section Measurements

Science.gov (United States)

2013-10-01

common radar bands. ACKNOWLEDGEMENTS The authors wish to thank David Jillson (UML STL – Electrical Engineer) for efforts involved in RF and DC wiring...Waldman J., Fetterman H.R., Duffy P.E., Bryant T.G., Tannenwald P.E., “Submillimeter Model Measurements and Their Applications to Millimeter Radar

Graphics processor efficiency for realization of rapid tabular computations

International Nuclear Information System (INIS)

Dudnik, V.A.; Kudryavtsev, V.I.; Us, S.A.; Shestakov, M.V.

2016-01-01

Capabilities of graphics processing units (GPU) and central processing units (CPU) have been investigated for realization of fast-calculation algorithms with the use of tabulated functions. The realization of tabulated functions is exemplified by the GPU/CPU architecture-based processors. Comparison is made between the operating efficiencies of GPU and CPU, employed for tabular calculations at different conditions of use. Recommendations are formulated for the use of graphical and central processors to speed up scientific and engineering computations through the use of tabulated functions

FASTBUS Standard Routines implementation for Fermilab embedded processor boards

International Nuclear Information System (INIS)

Pangburn, J.; Patrick, J.; Kent, S.; Oleynik, G.; Pordes, R.; Votava, M.; Heyes, G.; Watson, W.A. III

1992-10-01

In collaboration with CEBAF, Fermilab's Online Support Department and the CDF experiment have produced a new implementation of the IEEE FASTBUS Standard Routines for two embedded processor FASTBUS boards: the Fermilab Smart Crate Controller (FSCC) and the FASTBUS Readout Controller (FRC). Features of this implementation include: portability (to other embedded processor boards), remote source-level debugging, high speed, optional generation of very high-speed code for readout applications, and built-in Sun RPC support for execution of FASTBUS transactions and lists over the network

Arecibo Radar Observation of Near-Earth Asteroids: Expanded Sample Size, Determination of Radar Albedos, and Measurements of Polarization Ratios

Science.gov (United States)

Lejoly, Cassandra; Howell, Ellen S.; Taylor, Patrick A.; Springmann, Alessondra; Virkki, Anne; Nolan, Michael C.; Rivera-Valentin, Edgard G.; Benner, Lance A. M.; Brozovic, Marina; Giorgini, Jon D.

2017-10-01

The Near-Earth Asteroid (NEA) population ranges in size from a few meters to more than 10 kilometers. NEAs have a wide variety of taxonomic classes, surface features, and shapes, including spheroids, binary objects, contact binaries, elongated, as well as irregular bodies. Using the Arecibo Observatory planetary radar system, we have measured apparent rotation rate, radar reflectivity, apparent diameter, and radar albedos for over 350 NEAs. The radar albedo is defined as the radar cross-section divided by the geometric cross-section. If a shape model is available, the actual cross-section is known at the time of the observation. Otherwise we derive a geometric cross-section from a measured diameter. When radar imaging is available, the diameter was measured from the apparent range depth. However, when radar imaging was not available, we used the continuous wave (CW) bandwidth radar measurements in conjunction with the period of the object. The CW bandwidth provides apparent rotation rate, which, given an independent rotation measurement, such as from lightcurves, constrains the size of the object. We assumed an equatorial view unless we knew the pole orientation, which gives a lower limit on the diameter. The CW also provides the polarization ratio, which is the ratio of the SC and OC cross-sections.We confirm the trend found by Benner et al. (2008) that taxonomic types E and V have very high polarization ratios. We have obtained a larger sample and can analyze additional trends with spin, size, rotation rate, taxonomic class, polarization ratio, and radar albedo to interpret the origin of the NEAs and their dynamical processes. The distribution of radar albedo and polarization ratio at the smallest diameters (≤50 m) differs from the distribution of larger objects (>50 m), although the sample size is limited. Additionally, we find more moderate radar albedos for the smallest NEAs when compared to those with diameters 50-150 m. We will present additional trends we

Statistical analysis of quality control of automatic processor

International Nuclear Information System (INIS)

Niu Yantao; Zhao Lei; Zhang Wei; Yan Shulin

2002-01-01

Objective: To strengthen the scientific management of automatic processor and promote QC, based on analyzing QC management chart for automatic processor by statistical method, evaluating and interpreting the data and trend of the chart. Method: Speed, contrast, minimum density of step wedge of film strip were measured everyday and recorded on the QC chart. Mean (x-bar), standard deviation (s) and range (R) were calculated. The data and the working trend were evaluated and interpreted for management decisions. Results: Using relative frequency distribution curve constructed by measured data, the authors can judge whether it is a symmetric bell-shaped curve or not. If not, it indicates a few extremes overstepping control limits possibly are pulling the curve to the left or right. If it is a normal distribution, standard deviation (s) is observed. When x-bar +- 2s lies in upper and lower control limits of relative performance indexes, it indicates the processor works in stable status in this period. Conclusion: Guided by statistical method, QC work becomes more scientific and quantified. The authors can deepen understanding and application of the trend chart, and improve the quality management to a new step

Broadband set-top box using MAP-CA processor

Science.gov (United States)

Bush, John E.; Lee, Woobin; Basoglu, Chris

2001-12-01

Advances in broadband access are expected to exert a profound impact in our everyday life. It will be the key to the digital convergence of communication, computer and consumer equipment. A common thread that facilitates this convergence comprises digital media and Internet. To address this market, Equator Technologies, Inc., is developing the Dolphin broadband set-top box reference platform using its MAP-CA Broadband Signal ProcessorT chip. The Dolphin reference platform is a universal media platform for display and presentation of digital contents on end-user entertainment systems. The objective of the Dolphin reference platform is to provide a complete set-top box system based on the MAP-CA processor. It includes all the necessary hardware and software components for the emerging broadcast and the broadband digital media market based on IP protocols. Such reference design requires a broadband Internet access and high-performance digital signal processing. By using the MAP-CA processor, the Dolphin reference platform is completely programmable, allowing various codecs to be implemented in software, such as MPEG-2, MPEG-4, H.263 and proprietary codecs. The software implementation also enables field upgrades to keep pace with evolving technology and industry demands.

Development of a software for a multi-processor system aimed at the on-line control of nuclear physics experiments

International Nuclear Information System (INIS)

Poggioli, Jean Renaud

1984-01-01

This research thesis reports the development of a software for an acquisition computer aimed at the on-line control of nuclear physics experiments. An original architecture, based on the assignment of a processor to each fundamental task, enables the implementation of a high performance system. In order to make the user free of programming constraints, the author developed a software for dynamic generation of acquisition and processing codes. These codes are created from a data base which is programmed by the user by using a language close to the physical reality. Procedures of interactive control of the experiment are thus simplified by displaying function menus on the operator terminal. The author evokes possible hardware improvements and possible extensions of the system [fr

Study to investigate and evaluate means of optimizing the radar function. [systems engineering of pulse radar for the space shuttle

Science.gov (United States)

1975-01-01

The investigations for a rendezvous radar system design and an integrated radar/communication system design are presented. Based on these investigations, system block diagrams are given and system parameters are optimized for the noncoherent pulse and coherent pulse Doppler radar modulation types. Both cooperative (transponder) and passive radar operation are examined including the optimization of the corresponding transponder design for the cooperative mode of operation.

High-Performance Linear Algebra Processor using FPGA

National Research Council Canada - National Science Library

Johnson, J

2004-01-01

With recent advances in FPGA (Field Programmable Gate Array) technology it is now feasible to use these devices to build special purpose processors for floating point intensive applications that arise in scientific computing...

Signal compression in radar using FPGA

OpenAIRE

Escamilla Hemández, Enrique; Kravchenko, Víctor; Ponomaryov, Volodymyr; Duchen Sánchez, Gonzalo; Hernández Sánchez, David

2010-01-01

We present the hardware implementation of radar real time processing procedures using a simple, fast technique based on FPGA (Field Programmable Gate Array) architecture. This processing includes different window procedures during pulse compression in synthetic aperture radar (SAR). The radar signal compression processing is realized using matched filter, and classical and novel window functions, where we focus on better solution for minimum values of sidelobes. The proposed architecture expl...

Pedestrian recognition using automotive radar sensors

OpenAIRE

A. Bartsch; F. Fitzek; R. H. Rasshofer

2012-01-01

The application of modern series production automotive radar sensors to pedestrian recognition is an important topic in research on future driver assistance systems. The aim of this paper is to understand the potential and limits of such sensors in pedestrian recognition. This knowledge could be used to develop next generation radar sensors with improved pedestrian recognition capabilities. A new raw radar data signal processing algorithm is proposed that allows deep insight...

Use of a track and vertex processor in a fixed-target charm experiment

International Nuclear Information System (INIS)

Schub, M.H.; Carey, T.A.; Hsiung, Y.B.; Kaplan, D.M.; Lee, C.; Miller, G.; Sa, J.; Teng, P.K.

1996-01-01

We have constructed and operated a high-speed parallel-pipelined track and vertex processor and used it to trigger data acquisition in a high-rate charm and beauty experiment at Fermilab. The processor uses information from hodoscopes and wire chambers to reconstruct tracks in the bend view of a magnetic spectrometer, and uses these tracks to find the corresponding tracks in a set of silicon-strip detectors. The processor then forms vertices and triggers the experiment if at least one vertex is downstream of the target. Under typical charm running conditions, with an interaction rate of ∼5 MHz, the processor rejects 80-90% of lower-level triggers while maintaining efficiency of ∼70% for two-prong D-meson decays. (orig.)

Simplifying cochlear implant speech processor fitting

NARCIS (Netherlands)

Willeboer, C.

2008-01-01

Conventional fittings of the speech processor of a cochlear implant (CI) rely to a large extent on the implant recipient's subjective responses. For each of the 22 intracochlear electrodes the recipient has to indicate the threshold level (T-level) and comfortable loudness level (C-level) while

Radar Scan Methods in Modern Multifunctional Radars

Directory of Open Access Journals (Sweden)

V. N. Skosyrev

2014-01-01

Full Text Available Considered urgent task of organizing the review space in modern multifunctional radar systems shall review the space in a wide range of elevation angles from minus 5 to 60-80 degrees and 360 degrees azimuth. MfRLS this type should provide an overview of the zone for a limited time (2-3 sec, detecting a wide range of subtle high and low-flying targets. The latter circumstance requires the organization to select targets against the background of reflections from the underlying surface and local objects (MP. When providing an overview of the space taken into account the need to increase not only the noise immunity, and survivability.Two variants of the review of space in the elevation plane in the solid-state AESA radar. In the first case the overview space narrow beam by one beam. In the second - the transfer of DNA is formed, covering the whole sector of responsibility in elevation and at the reception beam is formed in spetsvychislitele (CB as a result of the signal processing of digitized after emitters antenna web. The estimations of the parameters specific to the multifunction radar SAM air and missile defense. It is shown that in a number of practically important cases, preference should be given clearly one of the methods described review of space.The functional scheme with AESA radar for both variants of the review. Necessary to analyze their differences. Contains the problem of increasing the cost of MfRLS with digital beamforming DNA with increasing bandwidth probing signal being processed.Noted drawbacks of MfRLS with digital beamforming beam. Including: reduced accuracy of the coordinates at low elevation angles, the complexity of the organization of thermal regime of the solid element base using quasi-continuous signal with a low duty cycle. Shows their fundamentally unavoidable in the steppe and desert areas with uneven terrain (Kazakhstan, China, the Middle East.It is shown that for MfRLS working in strong clutter, more preferably

A prediction method for job runtimes on shared processors: Survey, statistical analysis and new avenues

NARCIS (Netherlands)

Dobber, A.M.; van der Mei, R.D.; Koole, G.M.

2007-01-01

Grid computing is an emerging technology by which huge numbers of processors over the world create a global source of processing power. Their collaboration makes it possible to perform computations that are too extensive to perform on a single processor. On a grid, processors may connect and

Radar and Lidar Radar DEM

Science.gov (United States)

Liskovich, Diana; Simard, Marc

2011-01-01

Using radar and lidar data, the aim is to improve 3D rendering of terrain, including digital elevation models (DEM) and estimates of vegetation height and biomass in a variety of forest types and terrains. The 3D mapping of vegetation structure and the analysis are useful to determine the role of forest in climate change (carbon cycle), in providing habitat and as a provider of socio-economic services. This in turn will lead to potential for development of more effective land-use management. The first part of the project was to characterize the Shuttle Radar Topography Mission DEM error with respect to ICESat/GLAS point estimates of elevation. We investigated potential trends with latitude, canopy height, signal to noise ratio (SNR), number of LiDAR waveform peaks, and maximum peak width. Scatter plots were produced for each variable and were fitted with 1st and 2nd degree polynomials. Higher order trends were visually inspected through filtering with a mean and median filter. We also assessed trends in the DEM error variance. Finally, a map showing how DEM error was geographically distributed globally was created.

Design of Processors with Reconfigurable Microarchitecture

Directory of Open Access Journals (Sweden)

Andrey Mokhov

2014-01-01

Full Text Available Energy becomes a dominating factor for a wide spectrum of computations: from intensive data processing in “big data” companies resulting in large electricity bills, to infrastructure monitoring with wireless sensors relying on energy harvesting. In this context it is essential for a computation system to be adaptable to the power supply and the service demand, which often vary dramatically during runtime. In this paper we present an approach to building processors with reconfigurable microarchitecture capable of changing the way they fetch and execute instructions depending on energy availability and application requirements. We show how to use Conditional Partial Order Graphs to formally specify the microarchitecture of such a processor, explore the design possibilities for its instruction set, and synthesise the instruction decoder using correct-by-construction techniques. The paper is focused on the design methodology, which is evaluated by implementing a power-proportional version of Intel 8051 microprocessor.

Coordinated Energy Management in Heterogeneous Processors

Directory of Open Access Journals (Sweden)

Indrani Paul

2014-01-01

Full Text Available This paper examines energy management in a heterogeneous processor consisting of an integrated CPU–GPU for high-performance computing (HPC applications. Energy management for HPC applications is challenged by their uncompromising performance requirements and complicated by the need for coordinating energy management across distinct core types – a new and less understood problem. We examine the intra-node CPU–GPU frequency sensitivity of HPC applications on tightly coupled CPU–GPU architectures as the first step in understanding power and performance optimization for a heterogeneous multi-node HPC system. The insights from this analysis form the basis of a coordinated energy management scheme, called DynaCo, for integrated CPU–GPU architectures. We implement DynaCo on a modern heterogeneous processor and compare its performance to a state-of-the-art power- and performance-management algorithm. DynaCo improves measured average energy-delay squared (ED2 product by up to 30% with less than 2% average performance loss across several exascale and other HPC workloads.

Efficient Ways to Learn Weather Radar Polarimetry

Science.gov (United States)

Cao, Qing; Yeary, M. B.; Zhang, Guifu

2012-01-01

The U.S. weather radar network is currently being upgraded with dual-polarization capability. Weather radar polarimetry is an interdisciplinary area of engineering and meteorology. This paper presents efficient ways to learn weather radar polarimetry through several basic and practical topics. These topics include: 1) hydrometeor scattering model…

Terahertz radar cross section measurements

DEFF Research Database (Denmark)

Iwaszczuk, Krzysztof; Heiselberg, Henning; Jepsen, Peter Uhd

2010-01-01

We perform angle- and frequency-resolved radar cross section (RCS) measurements on objects at terahertz frequencies. Our RCS measurements are performed on a scale model aircraft of size 5-10 cm in polar and azimuthal configurations, and correspond closely to RCS measurements with conventional radar...

Performance indicators modern surveillance radar

NARCIS (Netherlands)

Nooij, P.N.C.; Theil, A.

2014-01-01

Blake chart computations are widely employed to rank detection coverage capabilities of competitive search radar systems. Developed for comparable 2D radar systems with a mechanically rotating reflector antenna, it was not necessary to regard update rate and plot quality in Blake's chart. To

Radar cross-section (RCS) analysis of high frequency surface wave radar targets

OpenAIRE

ÇAKIR, Gonca; SEVGİ, Levent

2010-01-01

Realistic high frequency surface wave radar (HFSWR) targets are investigated numerically in terms of electromagnetic wave -- target interactions. Radar cross sections (RCS) of these targets are simulated via both the finite-difference time-domain (FDTD) method and the Method of Moments (MoM). The virtual RCS prediction tool that was introduced in previous work is used for these investigations. The virtual tool automatically creates the discrete FDTD model of the target under investi...

A Bayesian sequential processor approach to spectroscopic portal system decisions

Energy Technology Data Exchange (ETDEWEB)

Sale, K; Candy, J; Breitfeller, E; Guidry, B; Manatt, D; Gosnell, T; Chambers, D

2007-07-31

The development of faster more reliable techniques to detect radioactive contraband in a portal type scenario is an extremely important problem especially in this era of constant terrorist threats. Towards this goal the development of a model-based, Bayesian sequential data processor for the detection problem is discussed. In the sequential processor each datum (detector energy deposit and pulse arrival time) is used to update the posterior probability distribution over the space of model parameters. The nature of the sequential processor approach is that a detection is produced as soon as it is statistically justified by the data rather than waiting for a fixed counting interval before any analysis is performed. In this paper the Bayesian model-based approach, physics and signal processing models and decision functions are discussed along with the first results of our research.

Parallelising a molecular dynamics algorithm on a multi-processor workstation

Science.gov (United States)

Müller-Plathe, Florian

1990-12-01

The Verlet neighbour-list algorithm is parallelised for a multi-processor Hewlett-Packard/Apollo DN10000 workstation. The implementation makes use of memory shared between the processors. It is a genuine master-slave approach by which most of the computational tasks are kept in the master process and the slaves are only called to do part of the nonbonded forces calculation. The implementation features elements of both fine-grain and coarse-grain parallelism. Apart from three calls to library routines, two of which are standard UNIX calls, and two machine-specific language extensions, the whole code is written in standard Fortran 77. Hence, it may be expected that this parallelisation concept can be transfered in parts or as a whole to other multi-processor shared-memory computers. The parallel code is routinely used in production work.

Real time processor for array speckle interferometry

International Nuclear Information System (INIS)

Chin, G.; Florez, J.; Borelli, R.; Fong, W.; Miko, J.; Trujillo, C.

1989-01-01

With the construction of several new large aperture telescopes and the development of large format array detectors in the near IR, the ability to obtain diffraction limited seeing via IR array speckle interferometry offers a powerful tool. We are constructing a real-time processor to acquire image frames, perform array flat-fielding, execute a 64 x 64 element 2D complex FFT, and to average the power spectrum all within the 25 msec coherence time for speckles at near IR wavelength. The processor is a compact unit controlled by a PC with real time display and data storage capability. It provides the ability to optimize observations and obtain results on the telescope rather than waiting several weeks before the data can be analyzed and viewed with off-line methods

Sea clutter scattering, the K distribution and radar performance

CERN Document Server

Ward, Keith; Watts, Simon

2013-01-01

Sea Clutter: Scattering, the K Distribution and Radar Performance, 2nd Edition gives an authoritative account of our current understanding of radar sea clutter. Topics covered include the characteristics of radar sea clutter, modelling radar scattering by the ocean surface, statistical models of sea clutter, the simulation of clutter and other random processes, detection of small targets in sea clutter, imaging ocean surface features, radar detection performance calculations, CFAR detection, and the specification and measurement of radar performance. The calculation of the performance of pract

Ground penetrating radar

CERN Document Server

Daniels, David J

2004-01-01

Ground-penetrating radar has come to public attention in recent criminal investigations, but has actually been a developing and maturing remote sensing field for some time. In the light of recent expansion of the technique to a wide range of applications, the need for an up-to-date reference has become pressing. This fully revised and expanded edition of the best-selling Surface-Penetrating Radar (IEE, 1996) presents, for the non-specialist user or engineer, all the key elements of this technique, which span several disciplines including electromagnetics, geophysics and signal processing. The

UNIBUS processor interface for a FASTBUS data acquisition system

International Nuclear Information System (INIS)

Larwill, M.; Lagerlund, T.D.; Barsotti, E.; Taff, L.M.; Franzen, J.

1981-01-01

Current work on a FASTBUS data acquisition system at Fermilab is described. The system will consist of three pieces of FASTBUS hardware: a UNIBUS processor interface (UPI), a dual-ported bulk memory, and a FASTBUS ''event builder'' (i.e., data acquisition processor). Primary efforts have been on specifying and constructing a UPI. The present specification includes capability for all basic FASTBUS operations, including list processing of consecutive FASTBUS operations. Some possible FASTBUS data acquisition system architectures employing the UPI are discussed along with some detailed specifications of the UPI itself

The UA1 trigger processor

International Nuclear Information System (INIS)

Grayer, G.H.

1981-01-01

Experiment UA1 is a large multi-purpose spectrometer at the CERN proton-antiproton collider, scheduled for late 1981. The principal trigger is formed on the basis of the energy deposition in calorimeters. A trigger decision taken in under 2.4 microseconds can avoid dead time losses due to the bunched nature of the beam. To achieve this we have built fast 8-bit charge to digital converters followed by two identical digital processors tailored to the experiment. The outputs of groups of the 2440 photomultipliers in the calorimeters are summed to form a total of 288 input channels to the ADCs. A look-up table in RAM is used to convert the digitised photomultiplier signals to energy in one processor, combinations of input channels, and also counts the number of clusters with electromagnetic or hadronic energy above pre-determined levels. Up to twelve combinations of these conditions, together with external information, may be combined in coincidence or in veto to form the final trigger. Provision has been made for testing using simulated data in an off-line mode, and sampling real data when on-line. (orig.)

Alternative Water Processor Test Development

Science.gov (United States)

Pickering, Karen D.; Mitchell, Julie; Vega, Leticia; Adam, Niklas; Flynn, Michael; Wjee (er. Rau); Lunn, Griffin; Jackson, Andrew

2012-01-01

The Next Generation Life Support Project is developing an Alternative Water Processor (AWP) as a candidate water recovery system for long duration exploration missions. The AWP consists of biological water processor (BWP) integrated with a forward osmosis secondary treatment system (FOST). The basis of the BWP is a membrane aerated biological reactor (MABR), developed in concert with Texas Tech University. Bacteria located within the MABR metabolize organic material in wastewater, converting approximately 90% of the total organic carbon to carbon dioxide. In addition, bacteria convert a portion of the ammonia-nitrogen present in the wastewater to nitrogen gas, through a combination of nitrogen and denitrification. The effluent from the BWP system is low in organic contaminants, but high in total dissolved solids. The FOST system, integrated downstream of the BWP, removes dissolved solids through a combination of concentration-driven forward osmosis and pressure driven reverse osmosis. The integrated system is expected to produce water with a total organic carbon less than 50 mg/l and dissolved solids that meet potable water requirements for spaceflight. This paper describes the test definition, the design of the BWP and FOST subsystems, and plans for integrated testing.

Radar ornithology and the conservation of migratory birds

Science.gov (United States)

Sidney A. Gauthreaux; Carroll G. Belser

2005-01-01

It is possible to study with surveillance radar the movements of migrating birds in the atmosphere at different spatial scales. At a spatial scale within a range of 6 kilometers, high-resolution, 3-centimeter wavelength surveillance radar (e.g. BIRDRAD) can detect the departure of migrants from different types of habitat within a few kilometers of the radar. The radar...

Accuracy of three-dimensional glacier surface volocities derived from radar interfeometry and ice-soundin radar measurements

DEFF Research Database (Denmark)

Mohr, Johan Jacob; Reeh, Niels; Madsen, Søren Nørvang

2003-01-01

We present a method for analyzing the errors involved in measuring three-dimensional glacier velocities with interferometric radar. We address the surface-parallel flow assumption and an augmented approach with a flux-divergence (FD) term. The errors in an interferometric ERS-1/-2 satellite radar...... dataset with ascending- and descending-orbit data covering Storstrommen glacier, northeast Greenland, are assessed. The FD error assessment is carried out on airborne 60 MHz ice-sounding radar data from the same area. A simple model of an interferometric radar system is developed and analyzed. The error...... sources considered include phase noise, atmospheric distortions, baseline calibration errors, a dry snow layer, and the stationary-flow assumption used in differential interferometry. The additional error sources in the analysis of FD errors are noise, bias and unknown variations of the ice thickness...

Quantification of Reflection Patterns in Ground-Penetrating Radar Data

Science.gov (United States)

Moysey, S.; Knight, R. J.; Jol, H. M.; Allen-King, R. M.; Gaylord, D. R.

2005-12-01

Radar facies analysis provides a way of interpreting the large-scale structure of the subsurface from ground-penetrating radar (GPR) data. Radar facies are often distinguished from each other by the presence of patterns, such as flat-lying, dipping, or chaotic reflections, in different regions of a radar image. When these patterns can be associated with radar facies in a repeated and predictable manner we refer to them as `radar textures'. While it is often possible to qualitatively differentiate between radar textures visually, pattern recognition tools, like neural networks, require a quantitative measure to discriminate between them. We investigate whether currently available tools, such as instantaneous attributes or metrics adapted from standard texture analysis techniques, can be used to improve the classification of radar facies. To this end, we use a neural network to perform cross-validation tests that assess the efficacy of different textural measures for classifying radar facies in GPR data collected from the William River delta, Saskatchewan, Canada. We found that the highest classification accuracies (>93%) were obtained for measures of texture that preserve information about the spatial arrangement of reflections in the radar image, e.g., spatial covariance. Lower accuracy (87%) was obtained for classifications based directly on windows of amplitude data extracted from the radar image. Measures that did not account for the spatial arrangement of reflections in the image, e.g., instantaneous attributes and amplitude variance, yielded classification accuracies of less than 65%. Optimal classifications were obtained for textural measures that extracted sufficient information from the radar data to discriminate between radar facies but were insensitive to other facies specific characteristics. For example, the rotationally invariant Fourier-Mellin transform delivered better classification results than the spatial covariance because dip angle of the

Suboptimal processor for anomaly detection for system surveillance and diagnosis

Energy Technology Data Exchange (ETDEWEB)

Ciftcioglu, Oe.; Hoogenboom, J.E.; Dam, H. van

1989-06-01

Anomaly detection for nuclear reactor surveillance and diagnosis is described. The residual noise obtained as a result of autoregressive (AR) modelling is essential to obtain high sensitivity for anomaly detection. By means of the method of hypothesis testing a suboptimal anomaly detection processor is devised for system surveillance and diagnosis. Experiments are carried out to investigate the performance of the processor, which is in particular of interest for on-line and real-time applications.

A Trade Study of Two Membrane-Aerated Biological Water Processors

Science.gov (United States)

Allada, Ram; Lange, Kevin; Vega. Leticia; Roberts, Michael S.; Jackson, Andrew; Anderson, Molly; Pickering, Karen

2011-01-01

Biologically based systems are under evaluation as primary water processors for next generation life support systems due to their low power requirements and their inherent regenerative nature. This paper will summarize the results of two recent studies involving membrane aerated biological water processors and present results of a trade study comparing the two systems with regards to waste stream composition, nutrient loading and system design. Results of optimal configurations will be presented.

Development Of Signal Detection For Radar Navigation System

Directory of Open Access Journals (Sweden)

Theingi Win Hlaing

2017-09-01

Full Text Available This paper aims to evaluate the performance of target detection in the presence of sea clutter. Radar detection of a background of unwanted clutter due to echoes from sea clutter or land is a problem of interest in the radar field. Radar detector has been developed by assuming the radar clutter is Gaussian distributed. However as technology emerges the radar distribution is seen to deviates from the Gaussian assumption. Thus detectors designs based on Gaussian assumption are no longer optimum for detection in non-Gaussian nature. The theory of target detection in Gaussian distributed clutter has been well established and the closed form of the detection performances can be easily obtained. However that is not the case in non-Gaussian clutter distributions. The operation of radar detection is determined by radar detection theory with different types of Swerling target models such as Swerling I II III IV and V. By using MATLAB these signal detection techniques are developed.

Observation of snowfall with a low-power FM-CW K-band radar (Micro Rain Radar)

Science.gov (United States)

Kneifel, Stefan; Maahn, Maximilian; Peters, Gerhard; Simmer, Clemens

2011-06-01

Quantifying snowfall intensity especially under arctic conditions is a challenge because wind and snow drift deteriorate estimates obtained from both ground-based gauges and disdrometers. Ground-based remote sensing with active instruments might be a solution because they can measure well above drifting snow and do not suffer from flow distortions by the instrument. Clear disadvantages are, however, the dependency of e.g. radar returns on snow habit which might lead to similar large uncertainties. Moreover, high sensitivity radars are still far too costly to operate in a network and under harsh conditions. In this paper we compare returns from a low-cost, low-power vertically pointing FM-CW radar (Micro Rain Radar, MRR) operating at 24.1 GHz with returns from a 35.5 GHz cloud radar (MIRA36) for dry snowfall during a 6-month observation period at an Alpine station (Environmental Research Station Schneefernerhaus, UFS) at 2,650 m height above sea level. The goal was to quantify the potential and limitations of the MRR in relation to what is achievable by a cloud radar. The operational MRR procedures to derive standard radar variables like effective reflectivity factor ( Z e) or the mean Doppler velocity ( W) had to be modified for snowfall since the MRR was originally designed for rain observations. Since the radar returns from snowfall are weaker than from comparable rainfall, the behavior of the MRR close to its detection threshold has been analyzed and a method is proposed to quantify the noise level of the MRR based on clear sky observations. By converting the resulting MRR- Z e into 35.5 GHz equivalent Z e values, a remaining difference below 1 dBz with slightly higher values close to the noise threshold could be obtained. Due to the much higher sensitivity of MIRA36, the transition of the MRR from the true signal to noise can be observed, which agrees well with the independent clear sky noise estimate. The mean Doppler velocity differences between both radars

Modern Radar Techniques for Geophysical Applications: Two Examples

Science.gov (United States)

Arokiasamy, B. J.; Bianchi, C.; Sciacca, U.; Tutone, G.; Zirizzotti, A.; Zuccheretti, E.

2005-01-01

The last decade of the evolution of radar was heavily influenced by the rapid increase in the information processing capabilities. Advances in solid state radio HF devices, digital technology, computing architectures and software offered the designers to develop very efficient radars. In designing modern radars the emphasis goes towards the simplification of the system hardware, reduction of overall power, which is compensated by coding and real time signal processing techniques. Radars are commonly employed in geophysical radio soundings like probing the ionosphere; stratosphere-mesosphere measurement, weather forecast, GPR and radio-glaciology etc. In the laboratorio di Geofisica Ambientale of the Istituto Nazionale di Geofisica e Vulcanologia (INGV), Rome, Italy, we developed two pulse compression radars. The first is a HF radar called AIS-INGV; Advanced Ionospheric Sounder designed both for the purpose of research and for routine service of the HF radio wave propagation forecast. The second is a VHF radar called GLACIORADAR, which will be substituting the high power envelope radar used by the Italian Glaciological group. This will be employed in studying the sub glacial structures of Antarctica, giving information about layering, the bed rock and sub glacial lakes if present. These are low power radars, which heavily rely on advanced hardware and powerful real time signal processing. Additional information is included in the original extended abstract.

UAV-Borne Profiling Radar for Forest Research

Directory of Open Access Journals (Sweden)

Yuwei Chen

2017-01-01

Full Text Available Microwave Radar is an attractive solution for forest mapping and inventories because microwave signals penetrates into the forest canopy and the backscattering signal can provide information regarding the whole forest structure. Satellite-borne and airborne imaging radars have been used in forest resources mapping for many decades. However, their accuracy with respect to the main forest inventory attributes substantially varies depending on the wavelength and techniques used in the estimation. Systems providing canopy backscatter as a function of canopy height are, practically speaking, missing. Therefore, there is a need for a radar system that would enable the scientific community to better understand the radar backscatter response from the forest canopy. Consequently, we undertook a research study to develop an unmanned aerial vehicle (UAV-borne profiling (i.e., waveform radar that could be used to improve the understanding of the radar backscatter response for forestry mapping and inventories. A frequency modulation continuous waveform (FMCW profiling radar, termed FGI-Tomoradar, was introduced, designed and tested. One goal is the total weight of the whole system is less than 7 kg, including the radar system and georeferencing system, with centimetre-level positioning accuracy. Achieving this weight goal would enable the FGI-Tomoradar system to be installed on the Mini-UAV platform. The prototype system had all four linear polarization measuring capabilities, with bistatic configuration in Ku-band. In system performance tests in this study, FGI-Tomoradar was mounted on a manned helicopter together with a Riegl VQ-480-U laser scanner and tested in several flight campaigns performed at the Evo site, Finland. Airborne laser scanning data was simultaneously collected to investigate the differences and similarities of the outputs for the same target area for better understanding the penetration of the microwave signal into the forest canopy

Space and frequency-multiplexed optical linear algebra processor - Fabrication and initial tests

Science.gov (United States)

Casasent, D.; Jackson, J.

1986-01-01

A new optical linear algebra processor architecture is described. Space and frequency-multiplexing are used to accommodate bipolar and complex-valued data. A fabricated laboratory version of this processor is described, the electronic support system used is discussed, and initial test data obtained on it are presented.

Investigating nearby exoplanets via interstellar radar

Science.gov (United States)

Scheffer, Louis K.

2014-01-01

Interstellar radar is a potential intermediate step between passive observation of exoplanets and interstellar exploratory missions. Compared with passive observation, it has the traditional advantages of radar astronomy. It can measure surface characteristics, determine spin rates and axes, provide extremely accurate ranges, construct maps of planets, distinguish liquid from solid surfaces, find rings and moons, and penetrate clouds. It can do this even for planets close to the parent star. Compared with interstellar travel or probes, it also offers significant advantages. The technology required to build such a radar already exists, radar can return results within a human lifetime, and a single facility can investigate thousands of planetary systems. The cost, although too high for current implementation, is within the reach of Earth's economy.

Automotive Fuel Processor Development and Demonstration with Fuel Cell Systems

Energy Technology Data Exchange (ETDEWEB)

Nuvera Fuel Cells

2005-04-15

The potential for fuel cell systems to improve energy efficiency and reduce emissions over conventional power systems has generated significant interest in fuel cell technologies. While fuel cells are being investigated for use in many applications such as stationary power generation and small portable devices, transportation applications present some unique challenges for fuel cell technology. Due to their lower operating temperature and non-brittle materials, most transportation work is focusing on fuel cells using proton exchange membrane (PEM) technology. Since PEM fuel cells are fueled by hydrogen, major obstacles to their widespread use are the lack of an available hydrogen fueling infrastructure and hydrogen's relatively low energy storage density, which leads to a much lower driving range than conventional vehicles. One potential solution to the hydrogen infrastructure and storage density issues is to convert a conventional fuel such as gasoline into hydrogen onboard the vehicle using a fuel processor. Figure 2 shows that gasoline stores roughly 7 times more energy per volume than pressurized hydrogen gas at 700 bar and 4 times more than liquid hydrogen. If integrated properly, the fuel processor/fuel cell system would also be more efficient than traditional engines and would give a fuel economy benefit while hydrogen storage and distribution issues are being investigated. Widespread implementation of fuel processor/fuel cell systems requires improvements in several aspects of the technology, including size, startup time, transient response time, and cost. In addition, the ability to operate on a number of hydrocarbon fuels that are available through the existing infrastructure is a key enabler for commercializing these systems. In this program, Nuvera Fuel Cells collaborated with the Department of Energy (DOE) to develop efficient, low-emission, multi-fuel processors for transportation applications. Nuvera's focus was on (1) developing fuel

Weather radar rainfall data in urban hydrology

DEFF Research Database (Denmark)

Thorndahl, Søren; Einfalt, Thomas; Willems, Patrick

2017-01-01

Application of weather radar data in urban hydrological applications has evolved significantly during the past decade as an alternative to traditional rainfall observations with rain gauges. Advances in radar hardware, data processing, numerical models, and emerging fields within urban hydrology...... necessitate an updated review of the state of the art in such radar rainfall data and applications. Three key areas with significant advances over the past decade have been identified: (1) temporal and spatial resolution of rainfall data required for different types of hydrological applications, (2) rainfall...... estimation, radar data adjustment and data quality, and (3) nowcasting of radar rainfall and real-time applications. Based on these three fields of research, the paper provides recommendations based on an updated overview of shortcomings, gains, and novel developments in relation to urban hydrological...

Weather radar rainfall data in urban hydrology

DEFF Research Database (Denmark)

Thorndahl, Søren; Einfalt, Thomas; Willems, Patrick

2017-01-01

estimation, radar data adjustment and data quality, and (3) nowcasting of radar rainfall and real-time applications. Based on these three fields of research, the paper provides recommendations based on an updated overview of shortcomings, gains, and novel developments in relation to urban hydrological...... applications. The paper also reviews how the focus in urban hydrology research has shifted over the last decade to fields such as climate change impacts, resilience of urban areas to hydrological extremes, and online prediction/warning systems. It is discussed how radar rainfall data can add value......Application of weather radar data in urban hydrological applications has evolved significantly during the past decade as an alternative to traditional rainfall observations with rain gauges. Advances in radar hardware, data processing, numerical models, and emerging fields within urban hydrology...

Meteor observation by the Kyoto meteor radar

International Nuclear Information System (INIS)

Kato, S.; Tsuda, T.

1987-01-01

The Kyoto Meteor Radar is a monostatic coherent pulsed Doppler radar operating on the frequency of 31.57 MH. The system is computer controlled and uses radio interferometry for echo height determination. The antenna, an improvement, can be directed either to the north or the east. The system has been continuously collecting data on winds at meteor heights by radar observation. The meteor echo rate was also measured, the echo rate distribution with height and the daily variation in height integrated echo rate are discussed. Investigations of atmospheric tides are being pursued by cooperative observations. A novel approach to the study of gravity waves was attempted using the meteor radar which is able to detect the horizontal propagation of the waves by observing the changing phase through the region illuminated by the radar

The Square Kilometre Array Science Data Processor. Preliminary compute platform design

International Nuclear Information System (INIS)

Broekema, P.C.; Nieuwpoort, R.V. van; Bal, H.E.

2015-01-01

The Square Kilometre Array is a next-generation radio-telescope, to be built in South Africa and Western Australia. It is currently in its detailed design phase, with procurement and construction scheduled to start in 2017. The SKA Science Data Processor is the high-performance computing element of the instrument, responsible for producing science-ready data. This is a major IT project, with the Science Data Processor expected to challenge the computing state-of-the art even in 2020. In this paper we introduce the preliminary Science Data Processor design and the principles that guide the design process, as well as the constraints to the design. We introduce a highly scalable and flexible system architecture capable of handling the SDP workload

An enhanced Ada run-time system for real-time embedded processors

Science.gov (United States)

Sims, J. T.

1991-01-01

An enhanced Ada run-time system has been developed to support real-time embedded processor applications. The primary focus of this development effort has been on the tasking system and the memory management facilities of the run-time system. The tasking system has been extended to support efficient and precise periodic task execution as required for control applications. Event-driven task execution providing a means of task-asynchronous control and communication among Ada tasks is supported in this system. Inter-task control is even provided among tasks distributed on separate physical processors. The memory management system has been enhanced to provide object allocation and protected access support for memory shared between disjoint processors, each of which is executing a distinct Ada program.

High speed vision processor with reconfigurable processing element array based on full-custom distributed memory

Science.gov (United States)

Chen, Zhe; Yang, Jie; Shi, Cong; Qin, Qi; Liu, Liyuan; Wu, Nanjian

2016-04-01

In this paper, a hybrid vision processor based on a compact full-custom distributed memory for near-sensor high-speed image processing is proposed. The proposed processor consists of a reconfigurable processing element (PE) array, a row processor (RP) array, and a dual-core microprocessor. The PE array includes two-dimensional processing elements with a compact full-custom distributed memory. It supports real-time reconfiguration between the PE array and the self-organized map (SOM) neural network. The vision processor is fabricated using a 0.18 µm CMOS technology. The circuit area of the distributed memory is reduced markedly into 1/3 of that of the conventional memory so that the circuit area of the vision processor is reduced by 44.2%. Experimental results demonstrate that the proposed design achieves correct functions.

NOAA NEXt-Generation RADar (NEXRAD) Products

Data.gov (United States)

National Oceanic and Atmospheric Administration, Department of Commerce — This dataset consists of Level III weather radar products collected from Next-Generation Radar (NEXRAD) stations located in the contiguous United States, Alaska,...