DEVELOPMENT OF CONTROLLED RECTIFIERS BASED ON THE BIPOLAR WITH STATIC INDUCTION TRANSISTORS (BSIT
Directory of Open Access Journals (Sweden)
F. I. Bukashev
2016-01-01
Full Text Available Aim. The aim of this study is to develop one of the most perspective semiconductor device suitable for creation and improvement of controlled rectifiers, bipolar static induction transistor.Methods. Considered are the structural and schematic circuit controlled rectifier based on bipolar static induction transistor (BSIT, and the criterion of effectiveness controlled rectifiers - equivalent to the voltage drop.Results. Presented are the study results of controlled rectifier layout on BSIT KT698I. It sets the layout operation at an input voltage of 2.0 V at a frequency up to 750 kHz. The efficiency of the studied layouts at moderate current densities as high as 90 % .Offered is optimization of technological route microelectronic controlled rectifier manufacturing including BSIT and integrated bipolar elements of the scheme management.Conclusion. It is proved that the most efficient use of the bipolar static induction transistor occurs at the low voltage controlled rectifiers 350-400 kHz, at frequencies in conjunction with a low-voltage control circuit.It is proved that the increase of the functional characteristics of the converters is connected to the expansion of the input voltage and output current ranges
International Nuclear Information System (INIS)
Zhang Yong; Yang Jianhong; Cai Xueyuan; Wang Zaixing
2010-01-01
The exponential dependence of the potential barrier height φ c on the biased voltages of the inorganic/organic static induction transistor (SIT/OSIT) through a normalized approach in the low-current regime is presented. It shows a more accurate description than the linear expression of the potential barrier height. Through the verification of the numerical calculated and experimental results, the exponential dependence of φ c on the applied biases can be used to derive the I-V characteristics. For both SIT and OSIT, the calculated results, using the presented relationship, are agreeable with the experimental results. Compared to the previous linear relationship, the exponential description of φ c can contribute effectively to reduce the error between the theoretical and experimental results of the I-V characteristics. (semiconductor devices)
Transistorized PWM inverter-induction motor drive system
Peak, S. C.; Plunkett, A. B.
1982-01-01
This paper describes the development of a transistorized PWM inverter-induction motor traction drive system. A vehicle performance analysis was performed to establish the vehicle tractive effort-speed requirements. These requirements were then converted into a set of inverter and motor specifications. The inverter was a transistorized three-phase bridge using General Electric power Darlington transistors. The description of the design and development of this inverter is the principal object of this paper. The high-speed induction motor is a design which is optimized for use with an inverter power source. The primary feedback control is a torque angle control with voltage and torque outer loop controls. A current-controlled PWM technique is used to control the motor voltage. The drive has a constant torque output with PWM operation to base motor speed and a constant horsepower output with square wave operation to maximum speed. The drive system was dynamometer tested and the results are presented.
Bindal, Ahmet
2016-01-01
This book describes the n and p-channel Silicon Nanowire Transistor (SNT) designs with single and dual-work functions, emphasizing low static and dynamic power consumption. The authors describe a process flow for fabrication and generate SPICE models for building various digital and analog circuits. These include an SRAM, a baseband spread spectrum transmitter, a neuron cell and a Field Programmable Gate Array (FPGA) platform in the digital domain, as well as high bandwidth single-stage and operational amplifiers, RF communication circuits in the analog domain, in order to show this technology’s true potential for the next generation VLSI. Describes Silicon Nanowire (SNW) Transistors, as vertically constructed MOS n and p-channel transistors, with low static and dynamic power consumption and small layout footprint; Targets System-on-Chip (SoC) design, supporting very high transistor count (ULSI), minimal power consumption requiring inexpensive substrates for packaging; Enables fabrication of different types...
Static Characteristics of the Ferroelectric Transistor Inverter
Mitchell, Cody; Laws, crystal; MacLeond, Todd C.; Ho, Fat D.
2010-01-01
The inverter is one of the most fundamental building blocks of digital logic, and it can be used as the foundation for understanding more complex logic gates and circuits. This paper presents the characteristics of an inverter circuit using a ferroelectric field-effect transistor. The voltage transfer characteristics are analyzed with respect to varying parameters such as supply voltage, input voltage, and load resistance. The effects of the ferroelectric layer between the gate and semiconductor are examined, and comparisons are made between the inverters using ferroelectric transistors and those using traditional MOSFETs.
The point of practical use for the transistor circuit
International Nuclear Information System (INIS)
1996-01-01
This is comprised of eight chapters and goes as follows; what is transistor? the first step for use of transistor such as connection between power and signal source, static characteristic of transistor and equivalent circuit of transistor, design of easy small-signal amplifier circuit, design for amplification of electric power and countermeasure for prevention of trouble, transistor concerned interface, transistor circuit around micro computer, transistor in active use of FET and power circuit and transistor. It has an appendix on transistor and design of bias of FET circuits like small signal transistor circuit and FET circuit.
High current transistor pulse generator
International Nuclear Information System (INIS)
Nesterov, V.; Cassel, R.
1991-05-01
A solid state pulse generator capable of delivering high current trapezoidally shaped pulses into an inductive load has been developed at SLAC. Energy stored in the capacitor bank of the pulse generator is switched to the load through a pair of Darlington transistors. A combination of diodes and Darlington transistors is used to obtain trapezoidal or triangular shaped current pulses into an inductive load and to recover the remaining energy in the same capacitor bank without reversing capacitor voltage. The transistors work in the switch mode, and the power losses are low. The rack mounted pulse generators presently used at SLAC contain a 660 microfarad storage capacitor bank and can deliver 400 amps at 800 volts into inductive loads up to 3 mH. The pulse generators are used in several different power systems, including pulse to pulse bipolar power supplies and in application with current pulses distributed into different inductive loads. The current amplitude and discharge time are controlled by the central computer system through a specially developed multichannel controller. Several years of operation with the pulse generators have proven their consistent performance and reliability. 8 figs
High-performance vertical organic transistors.
Kleemann, Hans; Günther, Alrun A; Leo, Karl; Lüssem, Björn
2013-11-11
Vertical organic thin-film transistors (VOTFTs) are promising devices to overcome the transconductance and cut-off frequency restrictions of horizontal organic thin-film transistors. The basic physical mechanisms of VOTFT operation, however, are not well understood and VOTFTs often require complex patterning techniques using self-assembly processes which impedes a future large-area production. In this contribution, high-performance vertical organic transistors comprising pentacene for p-type operation and C60 for n-type operation are presented. The static current-voltage behavior as well as the fundamental scaling laws of such transistors are studied, disclosing a remarkable transistor operation with a behavior limited by injection of charge carriers. The transistors are manufactured by photolithography, in contrast to other VOTFT concepts using self-assembled source electrodes. Fluorinated photoresist and solvent compounds allow for photolithographical patterning directly and strongly onto the organic materials, simplifying the fabrication protocol and making VOTFTs a prospective candidate for future high-performance applications of organic transistors. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Rectifier cabinet static breaker
International Nuclear Information System (INIS)
Costantino, R.A. Jr; Gliebe, R.J.
1992-01-01
A rectifier cabinet static breaker replaces a blocking diode pair with an SCR and the installation of a power transistor in parallel with the latch contactor to commutate the SCR to the off state. The SCR serves as a static breaker with fast turnoff capability providing an alternative way of achieving reactor scram in addition to performing the function of the replaced blocking diodes. The control circuitry for the rectifier cabinet static breaker includes on-line test capability and an LED indicator light to denote successful test completion. Current limit circuitry provides high-speed protection in the event of overload. 7 figs
Rectifier cabinet static breaker
Costantino, Jr, Roger A.; Gliebe, Ronald J.
1992-09-01
A rectifier cabinet static breaker replaces a blocking diode pair with an SCR and the installation of a power transistor in parallel with the latch contactor to commutate the SCR to the off state. The SCR serves as a static breaker with fast turnoff capability providing an alternative way of achieving reactor scram in addition to performing the function of the replaced blocking diodes. The control circuitry for the rectifier cabinet static breaker includes on-line test capability and an LED indicator light to denote successful test completion. Current limit circuitry provides high-speed protection in the event of overload.
Energy Technology Data Exchange (ETDEWEB)
Werner, Ulrich [Siemens AG, Nuernberg (Germany). Industry, Drive Technologies, Large Drives, Industry Development
2010-03-15
The paper shows a computational methodology for calculating the relative shaft vibrations in the sleeve bearings of two-pole induction machines regarding excitation due to an electromagnetic force, which is caused by static rotor eccentricity. For a worst case calculation concerning the height of exciting magnetic force electromagnetic field damping effects and magnetic resistance concerning the homopolar flux are neglected. The calculated magnetic force, acting on the rotor core with double supply frequency in direction of the smallest air gap, is implemented into a finite element rotor dynamic model. With this model the influence of the rotor speed as well as influence of the direction of the magnetic force on the relative shaft displacements can be analyzed. Therefore the paper shows a computational methodology to check, whether the rotor-bearing design is sensitive for electromagnetic excitations due to static rotor eccentricity and prepares therefore the possibility to introduce improvements during the design phase of the induction motor. (orig.)
Bipolar Transistors Can Detect Charge in Electrostatic Experiments
Dvorak, L.
2012-01-01
A simple charge indicator with bipolar transistors is described that can be used in various electrostatic experiments. Its behaviour enables us to elucidate links between 'static electricity' and electric currents. In addition it allows us to relate the sign of static charges to the sign of the terminals of an ordinary battery. (Contains 7 figures…
Wireless thin film transistor based on micro magnetic induction coupling antenna.
Jun, Byoung Ok; Lee, Gwang Jun; Kang, Jong Gu; Kim, Seunguk; Choi, Ji-Woong; Cha, Seung Nam; Sohn, Jung Inn; Jang, Jae Eun
2015-12-22
A wireless thin film transistor (TFT) structure in which a source/drain or a gate is connected directly to a micro antenna to receive or transmit signals or power can be an important building block, acting as an electrical switch, a rectifier or an amplifier, for various electronics as well as microelectronics, since it allows simple connection with other devices, unlike conventional wire connections. An amorphous indium gallium zinc oxide (α-IGZO) TFT with magnetic antenna structure was fabricated and studied for this purpose. To enhance the induction coupling efficiency while maintaining the same small antenna size, a magnetic core structure consisting of Ni and nanowires was formed under the antenna. With the micro-antenna connected to a source/drain or a gate of the TFT, working electrical signals were well controlled. The results demonstrated the device as an alternative solution to existing wire connections which cause a number of problems in various fields such as flexible/wearable devices, body implanted devices, micro/nano robots, and sensors for the 'internet of things' (IoT).
Wireless thin film transistor based on micro magnetic induction coupling antenna
Jun, Byoung Ok; Lee, Gwang Jun; Kang, Jong Gu; Kim, Seunguk; Choi, Ji-Woong; Cha, Seung Nam; Sohn, Jung Inn; Jang, Jae Eun
2015-12-01
A wireless thin film transistor (TFT) structure in which a source/drain or a gate is connected directly to a micro antenna to receive or transmit signals or power can be an important building block, acting as an electrical switch, a rectifier or an amplifier, for various electronics as well as microelectronics, since it allows simple connection with other devices, unlike conventional wire connections. An amorphous indium gallium zinc oxide (α-IGZO) TFT with magnetic antenna structure was fabricated and studied for this purpose. To enhance the induction coupling efficiency while maintaining the same small antenna size, a magnetic core structure consisting of Ni and nanowires was formed under the antenna. With the micro-antenna connected to a source/drain or a gate of the TFT, working electrical signals were well controlled. The results demonstrated the device as an alternative solution to existing wire connections which cause a number of problems in various fields such as flexible/wearable devices, body implanted devices, micro/nano robots, and sensors for the ‘internet of things’ (IoT).
Choi, Seungbeom; Jo, Jeong-Wan; Kim, Jaeyoung; Song, Seungho; Kim, Jaekyun; Park, Sung Kyu; Kim, Yong-Hoon
2017-08-09
Here, we report static and dynamic water motion-induced instability in indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) and its effective suppression with the use of a simple, solution-processed low-k (ε ∼ 1.9) fluoroplastic resin (FPR) passivation layer. The liquid-contact electrification effect, in which an undesirable drain current modulation is induced by a dynamic motion of a charged liquid such as water, can cause a significant instability in IGZO TFTs. It was found that by adopting a thin (∼44 nm) FPR passivation layer for IGZO TFTs, the current modulation induced by the water-contact electrification was greatly reduced in both off- and on-states of the device. In addition, the FPR-passivated IGZO TFTs exhibited an excellent stability to static water exposure (a threshold voltage shift of +0.8 V upon 3600 s of water soaking), which is attributed to the hydrophobicity of the FPR passivation layer. Here, we discuss the origin of the current instability caused by the liquid-contact electrification as well as various static and dynamic stability tests for IGZO TFTs. On the basis of our findings, we believe that the use of a thin, solution-processed FPR passivation layer is effective in suppressing the static and dynamic water motion-induced instabilities, which may enable the realization of high-performance and environment-stable oxide TFTs for emerging wearable and skin-like electronics.
In situ determination of the static inductance and resistance of a plasma focus capacitor bank
International Nuclear Information System (INIS)
Saw, S. H.; Lee, S.; Roy, F.; Chong, P. L.; Vengadeswaran, V.; Sidik, A. S. M.; Leong, Y. W.; Singh, A.
2010-01-01
The static (unloaded) electrical parameters of a capacitor bank are of utmost importance for the purpose of modeling the system as a whole when the capacitor bank is discharged into its dynamic electromagnetic load. Using a physical short circuit across the electromagnetic load is usually technically difficult and is unnecessary. The discharge can be operated at the highest pressure permissible in order to minimize current sheet motion, thus simulating zero dynamic load, to enable bank parameters, static inductance L 0 , and resistance r 0 to be obtained using lightly damped sinusoid equations given the bank capacitance C 0 . However, for a plasma focus, even at the highest permissible pressure it is found that there is significant residual motion, so that the assumption of a zero dynamic load introduces unacceptable errors into the determination of the circuit parameters. To overcome this problem, the Lee model code is used to fit the computed current trace to the measured current waveform. Hence the dynamics is incorporated into the solution and the capacitor bank parameters are computed using the Lee model code, and more accurate static bank parameters are obtained.
In situ determination of the static inductance and resistance of a plasma focus capacitor bank
Energy Technology Data Exchange (ETDEWEB)
Saw, S. H. [INTI University College, Nilai 71800 (Malaysia); Institute for Plasma Focus Studies, 32 Oakpark Drive, Chadstone, Victoria 3148 (Australia); Lee, S. [INTI University College, Nilai 71800 (Malaysia); Institute for Plasma Focus Studies, 32 Oakpark Drive, Chadstone, Victoria 3148 (Australia); National Institute of Education, Nanyang Technological University, Singapore 637616 (Singapore); Roy, F.; Chong, P. L.; Vengadeswaran, V.; Sidik, A. S. M.; Leong, Y. W.; Singh, A. [INTI University College, Nilai 71800 (Malaysia)
2010-05-15
The static (unloaded) electrical parameters of a capacitor bank are of utmost importance for the purpose of modeling the system as a whole when the capacitor bank is discharged into its dynamic electromagnetic load. Using a physical short circuit across the electromagnetic load is usually technically difficult and is unnecessary. The discharge can be operated at the highest pressure permissible in order to minimize current sheet motion, thus simulating zero dynamic load, to enable bank parameters, static inductance L{sub 0}, and resistance r{sub 0} to be obtained using lightly damped sinusoid equations given the bank capacitance C{sub 0}. However, for a plasma focus, even at the highest permissible pressure it is found that there is significant residual motion, so that the assumption of a zero dynamic load introduces unacceptable errors into the determination of the circuit parameters. To overcome this problem, the Lee model code is used to fit the computed current trace to the measured current waveform. Hence the dynamics is incorporated into the solution and the capacitor bank parameters are computed using the Lee model code, and more accurate static bank parameters are obtained.
Directory of Open Access Journals (Sweden)
N. Halem
2013-06-01
Full Text Available Unfortunately, motor current signature analysis (MCSA cannot detect the small degrees of the purely static eccentricity (SE defects, while the air-gap magnetic flux signature analysis (FSA is applied successfully. The simulation results are obtained by using time stepping finite elements (TSFE method. In order to show the impact of magnetic saturation upon the diagnosis of SE fault, the analysis is carried out for saturated induction motors. The index signatures of static eccentricity fault around fundamental and PSHs are detected successfully for saturated motor.
Directory of Open Access Journals (Sweden)
N. Halem
2013-06-01
Full Text Available Unfortunately, motor current signature analysis (MCSA cannot detect the small degrees of the purely static eccentricity (SE defects, while the air-gap magnetic flux signature analysis (FSA is applied successfully. The simulation results are obtained by using time stepping finite elements (TSFE method. In order to show the impact of magnetic saturation upon the diagnosis of SE fault, the analysis is carried out for saturated induction motors. The index signatures of static eccentricity fault around fundamental and PSHs are detected successfully for saturated motor.
Directory of Open Access Journals (Sweden)
N. Halem
2015-07-01
Full Text Available Unfortunately, motor current signature analysis (MCSA cannot detect the small degrees of the purely static eccentricity (SE defects, while the air-gap magnetic flux signature analysis (FSA is applied successfully. The simulation results are obtained by using time stepping finite elements (TSFE method. In order to show the impact of magnetic saturation upon the diagnosis of SE fault, the analysis is carried out for saturated induction motors. The index signatures of static eccentricity fault around fundamental and PSHs are detected successfully for saturated motor.
Optimizing switching frequency of the soliton transistor by numerical simulation
Energy Technology Data Exchange (ETDEWEB)
Izadyar, S., E-mail: S_izadyar@yahoo.co [Department of Electronics, Khaje Nasir Toosi University of Technology, Shariati Ave., Tehran (Iran, Islamic Republic of); Niazzadeh, M.; Raissi, F. [Department of Electronics, Khaje Nasir Toosi University of Technology, Shariati Ave., Tehran (Iran, Islamic Republic of)
2009-10-15
In this paper, by numerical simulations we have examined different ways to increase the soliton transistor's switching frequency. Speed of the solitons in a soliton transistor depends on various parameters such as the loss of the junction, the applied bias current, and the transmission line characteristics. Three different ways have been examined; (i) decreasing the size of the transistor without losing transistor effect. (ii) Decreasing the amount of loss of the junction to increase the soliton speed. (iii) Optimizing the bias current to obtain maximum possible speed. We have obtained the shortest possible length to have at least one working soliton inside the transistor. The dimension of the soliton can be decreased by changing the inductance of the transmission line, causing a further decrease in the size of the transistor, however, a trade off between the size and the inductance is needed to obtain the optimum switching speed. Decreasing the amount of loss can be accomplished by increasing the characteristic tunneling resistance of the device, however, a trade off is again needed to make soliton and antisoliton annihilation possible. By increasing the bias current, the forces acting the solitons increases and so does their speed. Due to nonuniform application of bias current a self induced magnetic field is created which can result in creation of unwanted solitons. Optimum bias current application can result in larger bias currents and larger soliton speed. Simulations have provided us with such an arrangement of bias current paths.
Optimizing switching frequency of the soliton transistor by numerical simulation
International Nuclear Information System (INIS)
Izadyar, S.; Niazzadeh, M.; Raissi, F.
2009-01-01
In this paper, by numerical simulations we have examined different ways to increase the soliton transistor's switching frequency. Speed of the solitons in a soliton transistor depends on various parameters such as the loss of the junction, the applied bias current, and the transmission line characteristics. Three different ways have been examined; (i) decreasing the size of the transistor without losing transistor effect. (ii) Decreasing the amount of loss of the junction to increase the soliton speed. (iii) Optimizing the bias current to obtain maximum possible speed. We have obtained the shortest possible length to have at least one working soliton inside the transistor. The dimension of the soliton can be decreased by changing the inductance of the transmission line, causing a further decrease in the size of the transistor, however, a trade off between the size and the inductance is needed to obtain the optimum switching speed. Decreasing the amount of loss can be accomplished by increasing the characteristic tunneling resistance of the device, however, a trade off is again needed to make soliton and antisoliton annihilation possible. By increasing the bias current, the forces acting the solitons increases and so does their speed. Due to nonuniform application of bias current a self induced magnetic field is created which can result in creation of unwanted solitons. Optimum bias current application can result in larger bias currents and larger soliton speed. Simulations have provided us with such an arrangement of bias current paths.
An InGaAs/InP 40 GHz CML static frequency divider
International Nuclear Information System (INIS)
Su Yongbo; Jin Zhi; Cheng Wei; Ge Ji; Wang Xiantai; Chen Gaopeng; Liu Xinyu; Xu Anhuai; Qi Ming
2011-01-01
Static frequency dividers are widely used as a circuit performance benchmark or figure-of-merit indicator to gauge a particular device technology's ability to implement high speed digital and integrated high performance mixed-signal circuits. We report a 2 : 1 static frequency divider in InGaAs/InP heterojunction bipolar transistor technology. This is the first InP based digital integrated circuit ever reported on the mainland of China. The divider is implemented in differential current mode logic (CML) with 30 transistors. The circuit operated at a peak clock frequency of 40 GHz and dissipated 650 mW from a single -5 V supply. (semiconductor integrated circuits)
Junctionless Cooper pair transistor
Energy Technology Data Exchange (ETDEWEB)
Arutyunov, K. Yu., E-mail: konstantin.yu.arutyunov@jyu.fi [National Research University Higher School of Economics , Moscow Institute of Electronics and Mathematics, 101000 Moscow (Russian Federation); P.L. Kapitza Institute for Physical Problems RAS , Moscow 119334 (Russian Federation); Lehtinen, J.S. [VTT Technical Research Centre of Finland Ltd., Centre for Metrology MIKES, P.O. Box 1000, FI-02044 VTT (Finland)
2017-02-15
Highlights: • Junctionless Cooper pair box. • Quantum phase slips. • Coulomb blockade and gate modulation of the Coulomb gap. - Abstract: Quantum phase slip (QPS) is the topological singularity of the complex order parameter of a quasi-one-dimensional superconductor: momentary zeroing of the modulus and simultaneous 'slip' of the phase by ±2π. The QPS event(s) are the dynamic equivalent of tunneling through a conventional Josephson junction containing static in space and time weak link(s). Here we demonstrate the operation of a superconducting single electron transistor (Cooper pair transistor) without any tunnel junctions. Instead a pair of thin superconducting titanium wires in QPS regime was used. The current–voltage characteristics demonstrate the clear Coulomb blockade with magnitude of the Coulomb gap modulated by the gate potential. The Coulomb blockade disappears above the critical temperature, and at low temperatures can be suppressed by strong magnetic field.
Fan, Ching-Lin; Shang, Ming-Chi; Hsia, Mao-Yuan; Wang, Shea-Jue; Huang, Bohr-Ran; Lee, Win-Der
2016-03-01
A Microwave-Induction Heating (MIH) scheme is proposed for the poly(4-vinylphenol) (PVP) gate insulator cross-linking process to replace the traditional oven heating cross-linking process. The cross-linking time is significantly decreased from 1 h to 5 min by heating the metal below the PVP layer using microwave irradiation. The necessary microwave power was substantially reduced to about 50 W by decreasing the chamber pressure. The MIH scheme is a good candidate to replace traditional thermal heating for cross-linking of PVP as the gate insulator for organic thin-film-transistors.
Directory of Open Access Journals (Sweden)
Ching-Lin Fan
2016-03-01
Full Text Available A Microwave-Induction Heating (MIH scheme is proposed for the poly(4-vinylphenol (PVP gate insulator cross-linking process to replace the traditional oven heating cross-linking process. The cross-linking time is significantly decreased from 1 h to 5 min by heating the metal below the PVP layer using microwave irradiation. The necessary microwave power was substantially reduced to about 50 W by decreasing the chamber pressure. The MIH scheme is a good candidate to replace traditional thermal heating for cross-linking of PVP as the gate insulator for organic thin-film-transistors.
Directory of Open Access Journals (Sweden)
Zoltán GERMÁN-SALLÓ
2015-12-01
Full Text Available Induction heating performs contactless, efficient and fast heating of conductive materials, therefore became one of the preferred heating procedure in industrial, domestic and medical applications. During induction heating the high-frequency alternating currents that heat the material are induced by means of electromagnetic induction. The material to be heated is placed inside the time-varying magnetic field generated by applying a highfrequency alternating current to an induction coil. The alternating electromagnetic field induces eddy currents in the workpiece, resulting resistive losses, which then heat the material. This paper describes the design of a power electronic converter circuit for induction heating equipment and presents the obtained results. The realized circuit is a low power half bridge resonant inverter which uses power MOS transistors and adequate driver circuits.
Ishii, Yuichiro; Tanaka, Miki; Yabuuchi, Makoto; Sawada, Yohei; Tanaka, Shinji; Nii, Koji; Lu, Tien Yu; Huang, Chun Hsien; Sian Chen, Shou; Tse Kuo, Yu; Lung, Ching Cheng; Cheng, Osbert
2018-04-01
We propose a highly symmetrical 10 transistor (10T) 2-read/write (2RW) dual-port (DP) static random access memory (SRAM) bitcell in 28 nm high-k/metal-gate (HKMG) planar bulk CMOS. It replaces the conventional 8T 2RW DP SRAM bitcell without any area overhead. It significantly improves the robustness of process variations and an asymmetric issue between the true and bar bitline pairs. Measured data show that read current (I read) and read static noise margin (SNM) are respectively boosted by +20% and +15 mV by introducing the proposed bitcell with enlarged pull-down (PD) and pass-gate (PG) N-channel MOSs (NMOSs). The minimum operating voltage (V min) of the proposed 256 kbit 10T DP SRAM is 0.53 V in the TT process, 25 °C under the worst access condition with read/write disturbances, and improved by 90 mV (15%) compared with the conventional one.
Tian, Ye; Yang, Zhuo; Xu, Zhiyuan; Liu, Siyang; Sun, Weifeng; Shi, Longxing; Zhu, Yuanzheng; Ye, Peng; Zhou, Jincheng
2018-04-01
In this paper, a novel failure mechanism under unclamped inductive switch (UIS) for Split-Gate Trench Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with large current is investigated. The device sample is tested and analyzed in detail. The simulation results demonstrate that the nonuniform potential distribution of the source poly should be responsible for the failure. Three structures are proposed and verified available to improve the device UIS ruggedness by TCAD simulation. The best one of the structures the device with source metal inserting into source poly through contacts in the field oxide is carried out and measured. The results demonstrate that the optimized structure can balance the trade-off between the UIS ruggedness and the static characteristics.
Schottky barrier diode embedded AlGaN/GaN switching transistor
International Nuclear Information System (INIS)
Park, Bong-Ryeol; Lee, Jung-Yeon; Lee, Jae-Gil; Lee, Dong-Myung; Cha, Ho-Young; Kim, Moon-Kyung
2013-01-01
We developed a Schottky barrier diode (SBD) embedded AlGaN/GaN switching transistor to allow negative current flow during off-state condition. An SBD was embedded in a recessed normally-off AlGaN/GaN-on-Si metal-oxide-semiconductor heterostructure field-effect transistor (MOSHFET). The fabricated device exhibited normally-off characteristics with a gate threshold voltage of 2.8 V, a diode turn-on voltage of 1.2 V, and a breakdown voltage of 849 V for the anode-to-drain distance of 8 µm. An on-resistance of 2.66 mΩcm 2 was achieved at a gate voltage of 16 V in the forward transistor mode. Eliminating the need for an external diode, the SBD embedded switching transistor has advantages of significant reduction in parasitic inductance and chip area. (paper)
Ogasawara, Ryosuke; Endoh, Tetsuo
2018-04-01
In this study, with the aim to achieve a wide noise margin and an excellent power delay product (PDP), a vertical body channel (BC)-MOSFET-based six-transistor (6T) static random access memory (SRAM) array is evaluated by changing the number of pillars in each part of a SRAM cell, that is, by changing the cell ratio in the SRAM cell. This 60 nm vertical BC-MOSFET-based 6T SRAM array realizes 0.84 V operation under the best PDP and up to 31% improvement of PDP compared with the 6T SRAM array based on a 90 nm planar MOSFET whose gate length and channel width are the same as those of the 60 nm vertical BC-MOSFET. Additionally, the vertical BC-MOSFET-based 6T SRAM array achieves an 8.8% wider read static noise margin (RSNM), a 16% wider write margin (WM), and an 89% smaller leakage. Moreover, it is shown that changing the cell ratio brings larger improvements of RSNM, WM, and write time in the vertical BC-MOSFET-based 6T SRAM array.
Wavy Architecture Thin-Film Transistor for Ultrahigh Resolution Flexible Displays
Hanna, Amir Nabil
2017-11-13
A novel wavy-shaped thin-film-transistor (TFT) architecture, capable of achieving 70% higher drive current per unit chip area when compared with planar conventional TFT architectures, is reported for flexible display application. The transistor, due to its atypical architecture, does not alter the turn-on voltage or the OFF current values, leading to higher performance without compromising static power consumption. The concept behind this architecture is expanding the transistor\\'s width vertically through grooved trenches in a structural layer deposited on a flexible substrate. Operation of zinc oxide (ZnO)-based TFTs is shown down to a bending radius of 5 mm with no degradation in the electrical performance or cracks in the gate stack. Finally, flexible low-power LEDs driven by the respective currents of the novel wavy, and conventional coplanar architectures are demonstrated, where the novel architecture is able to drive the LED at 2 × the output power, 3 versus 1.5 mW, which demonstrates the potential use for ultrahigh resolution displays in an area efficient manner.
Transistor Effect in Improperly Connected Transistors.
Luzader, Stephen; Sanchez-Velasco, Eduardo
1996-01-01
Discusses the differences between the standard representation and a realistic representation of a transistor. Presents an experiment that helps clarify the explanation of the transistor effect and shows why transistors should be connected properly. (JRH)
SOI Transistor measurement techniques using body contacted transistors
International Nuclear Information System (INIS)
Worley, E.R.; Williams, R.
1989-01-01
Measurements of body contacted SOI transistors are used to isolate parameters of the back channel and island edge transistor. Properties of the edge and back channel transistor have been measured before and after X-ray irradiation (ARACOR). The unique properties of the edge transistor are shown to be a result of edge geometry as confirmed by a two dimensional transistor simulator
International Nuclear Information System (INIS)
1988-03-01
It introduces how to use this book. It lists transistor data and index, which are Type No, Cross index, Germanium PNP low power transistors, silicon NPN low power transistors, Germanium PNP high power transistors, Switching transistors, transistor arrays, Miscellaneous transistors, types with U.S military specifications, direct replacement transistors, suggested replacement transistors, schematic drawings, outline drawings, device number keys and manufacturer's logos.
Resistorless Electronically Tunable Grounded Inductance Simulator Design
Herencsár, Norbert; Kartci, Aslihan
2017-01-01
A new realization of grounded lossless positive inductance simulator (PIS) using simple inverting voltage buffer and unity-gain current follower/inverter (CF±) is reported. Considering the input intrinsic resistance of CF± as useful active parameter, the proposed PIS can be considered as resistorless circuit and it only employs in total 16 Metal-Oxide-Semiconductor (MOS) transistors and a grounded capacitor. The resulting equivalent inductance value of the proposed simulator can be adjusted v...
Development of FET-switched induction accelerator cells for heavy-ion fusion recirculators
International Nuclear Information System (INIS)
Newton, M.A.; Cravey, W.R.; Hawkins, S.A.; Kirbie, H.C.; Ollis, C.W.
1993-01-01
The ''recirculator,'' a recirculating heavy-ion induction accelerator, has been identified as a promising approach for an inertial fusion driver. One of the technical challenges to building a recirculator is the requirement for a modulator that can drive the induction accelerator cells at repetition rates ≥ 100 kHz with variable pulse width and pulse repetition rate capability. A high repetition rate modulator and cell is presently being developed for use on a proposed heavy-ion recirculator. The goal is to develop an array of field-effect transistors to switch 5 kV, 1 μs pulses onto a Metglas induction core at pulse rates exceeding 100 kHz. Each transistor in the array is driven by a fiber-optic isolated gate signal that is powered by a dc/dc converter. The circuit architecture provides for core reset between pulses and produces bursts of pulses that are variable in pulse width and prf. The transistor switching array, energy storage capacitors, reset circuit and cell core are all combined into a single compact, low-impedance package. Progress of this development work will be presented with supporting data
Flexible Sensory Platform Based on Oxide-based Neuromorphic Transistors.
Liu, Ning; Zhu, Li Qiang; Feng, Ping; Wan, Chang Jin; Liu, Yang Hui; Shi, Yi; Wan, Qing
2015-12-11
Inspired by the dendritic integration and spiking operation of a biological neuron, flexible oxide-based neuromorphic transistors with multiple input gates are fabricated on flexible plastic substrates for pH sensor applications. When such device is operated in a quasi-static dual-gate synergic sensing mode, it shows a high pH sensitivity of ~105 mV/pH. Our results also demonstrate that single-spike dynamic mode can remarkably improve pH sensitivity and reduce response/recover time and power consumption. Moreover, we find that an appropriate negative bias applied on the sensing gate electrode can further enhance the pH sensitivity and reduce the power consumption. Our flexible neuromorphic transistors provide a new-concept sensory platform for biochemical detection with high sensitivity, rapid response and ultralow power consumption.
Flexible Sensory Platform Based on Oxide-based Neuromorphic Transistors
Liu, Ning; Zhu, Li Qiang; Feng, Ping; Wan, Chang Jin; Liu, Yang Hui; Shi, Yi; Wan, Qing
2015-01-01
Inspired by the dendritic integration and spiking operation of a biological neuron, flexible oxide-based neuromorphic transistors with multiple input gates are fabricated on flexible plastic substrates for pH sensor applications. When such device is operated in a quasi-static dual-gate synergic sensing mode, it shows a high pH sensitivity of ~105 mV/pH. Our results also demonstrate that single-spike dynamic mode can remarkably improve pH sensitivity and reduce response/recover time and power consumption. Moreover, we find that an appropriate negative bias applied on the sensing gate electrode can further enhance the pH sensitivity and reduce the power consumption. Our flexible neuromorphic transistors provide a new-concept sensory platform for biochemical detection with high sensitivity, rapid response and ultralow power consumption. PMID:26656113
Development and characterization of vertical double-gate MOS field-effect transistors
International Nuclear Information System (INIS)
Trellenkamp, S.
2004-07-01
Planar MOS-field-effect transistors are common devices today used by the computer industry. When their miniaturization reaches its limit, alternate transistor concepts become necessary. In this thesis the development of vertical Double-Gate-MOS-field-effect transistors is presented. These types of transistors have a vertically aligned p-n-p junction (or n-p-n junction, respectively). Consequently, the source-drain current flows perpendicular with respect to the surface of the wafer. A Double-Gate-field-effect transistor is characterized by a very thin channel region framed by two parallel gates. Due to the symmetry of the structure and less bulk volume better gate control and hence better short channel behavior is expected, as well as an improved scaling potential. Nanostructuring of the transistor's active region is very challenging. Approximately 300 nm high and down to 30 nm wide silicon ridges are requisite. They can be realized using hydrogen silsesquioxane (HSQ) as inorganic high resolution resist for electron beam lithography. Structures defined in HSQ are then transferred with high anisotropy and selectivity into silicon using ICP-RIE (reactive ion etching with inductive coupled plasma). 25 nm wide and 330 nm high silicon ridges are achieved. Different transistor layouts are realized. The channel length is defined by epitaxial growth of doped silicon layers before or by ion implantation after nanostructuring, respectively. The transistors show source-drain currents up to 380 μA/μm and transconductances up to 480 μS/μm. Improved short channel behavior for decreasing width of the silicon ridges is demonstrated. (orig.)
I-V Characteristics of a Static Random Access Memory Cell Utilizing Ferroelectric Transistors
Laws, Crystal; Mitchell, Cody; Hunt, Mitchell; Ho, Fat D.; MacLeod, Todd C.
2012-01-01
I-V characteristics for FeFET different than that of MOSFET Ferroelectric layer features hysteresis trend whereas MOSFET behaves same for both increasing and decreasing VGS FeFET I-V characteristics doesn't show dependence on VDS A Transistor with different channel length and width as well as various resistance and input voltages give different results As resistance values increased, the magnitude of the drain current decreased.
International Nuclear Information System (INIS)
Gros, P.
1993-01-01
In the frame of the tokamak ITER (International Thermonuclear Experimental Reactor) we have studied, for neutral particle injection, a converter with at least two static interrupters by Mosfet transistor, bipolar transistor or Insulated Gate Bipolar Transistor (IGBT). After a comparison between these three types of transistors, by the simulating software MICROCAP, a serial of tests has shown the advantages of the IGBT. A command, associated with two IGBT of equivalent characteristics, has given a simple and efficacious solution. The performances are: (1) between two blockages: 50 ns without overvoltage, (2) between two cut-off: 60 ns. 40 figs; 30 refs; 10 annexes
Wavy Architecture Thin-Film Transistor for Ultrahigh Resolution Flexible Displays
Hanna, Amir Nabil; Kutbee, Arwa Talal; Subedi, Ram Chandra; Ooi, Boon S.; Hussain, Muhammad Mustafa
2017-01-01
A novel wavy-shaped thin-film-transistor (TFT) architecture, capable of achieving 70% higher drive current per unit chip area when compared with planar conventional TFT architectures, is reported for flexible display application. The transistor, due to its atypical architecture, does not alter the turn-on voltage or the OFF current values, leading to higher performance without compromising static power consumption. The concept behind this architecture is expanding the transistor's width vertically through grooved trenches in a structural layer deposited on a flexible substrate. Operation of zinc oxide (ZnO)-based TFTs is shown down to a bending radius of 5 mm with no degradation in the electrical performance or cracks in the gate stack. Finally, flexible low-power LEDs driven by the respective currents of the novel wavy, and conventional coplanar architectures are demonstrated, where the novel architecture is able to drive the LED at 2 × the output power, 3 versus 1.5 mW, which demonstrates the potential use for ultrahigh resolution displays in an area efficient manner.
A 5 kA pulsed power supply for inductive and plasma loads in large volume plasma device
Energy Technology Data Exchange (ETDEWEB)
Srivastava, P. K., E-mail: pkumar@ipr.res.in; Singh, S. K.; Sanyasi, A. K.; Awasthi, L. M., E-mail: kushagra.lalit@gmail.com; Mattoo, S. K. [Institute for Plasma Research, Gandhinagar (India)
2016-07-15
This paper describes 5 kA, 12 ms pulsed power supply for inductive load of Electron Energy Filter (EEF) in large volume plasma device. The power supply is based upon the principle of rapid sourcing of energy from the capacitor bank (2.8 F/200 V) by using a static switch, comprising of ten Insulated Gate Bipolar Transistors (IGBTs). A suitable mechanism is developed to ensure equal sharing of current and uniform power distribution during the operation of these IGBTs. Safe commutation of power to the EEF is ensured by the proper optimization of its components and by the introduction of over voltage protection (>6 kV) using an indigenously designed snubber circuit. Various time sequences relevant to different actions of power supply, viz., pulse width control and repetition rate, are realized through optically isolated computer controlled interface.
International Nuclear Information System (INIS)
Li Lei; Zhou Wanting; Liu Huihua
2012-01-01
In this paper, an efficient physics-based method to estimate the saturated proton upset cross section for six-transistor (6T) silicon-on-insulator (SOI) static random access memory (SRAM) cells using layout and technology parameters is proposed. This method calculates the effects of radiation based on device physics. The simple method handles the problem with ease by SPICE simulations, which can be divided into two stages. At first, it uses a standard SPICE program to predict the cross section for recoiling heavy ions with linear energy transfer (LET) of 14 MeV-cm 2 /mg. Then, the predicted cross section for recoiling heavy ions with LET of 14 MeV-cm 2 /mg is used to estimate the saturated proton upset cross section for 6T SOI SRAM cells with a simple model. The calculated proton induced upset cross section based on this method is in good agreement with the test results of 6T SOI SRAM cells processed using 0.15 μm technology. (author)
MHz repetition rate solid-state driver for high current induction accelerators
International Nuclear Information System (INIS)
Brooksby, C; Caporaso, G; Goerz, D; Hanks, R; Hickman, B; Kirbie, H; Lee, B; Saethre, R.
1999-01-01
A research team from the Lawrence Livermore National Laboratory and Bechtel Nevada Corporation is developing an all solid-state power source for high current induction accelerators. The original power system design, developed for heavy-ion fusion accelerators, is based on the simple idea of using an array of field effect transistors to switch energy from a pre-charged capacitor bank to an induction accelerator cell. Recently, that idea has been expanded to accommodate the greater power needs of a new class of high-current electron accelerators for advanced radiography. For this purpose, we developed a 3-stage induction adder that uses over 4,000 field effect transistors to switch peak voltages of 45 kV at currents up to 4.8 kA with pulse repetition rates of up to 2 MHz. This radically advanced power system can generate a burst of five or more pulses that vary from 200 ns to 2 ampersand micro;s at a duty cycle of up to 25%. Our new source is precise, robust, flexible, and exceeds all previous drivers for induction machines by a factor of 400 in repetition rate and a factor of 1000 in duty cycle
DC switching regulated power supply for driving an inductive load
Dyer, George R.
1986-01-01
A power supply for driving an inductive load current from a dc power supply hrough a regulator circuit including a bridge arrangement of diodes and switching transistors controlled by a servo controller which regulates switching in response to the load current to maintain a selected load current. First and second opposite legs of the bridge are formed by first and second parallel-connected transistor arrays, respectively, while the third and fourth legs of the bridge are formed by appropriately connected first and second parallel connected diode arrays, respectively. The regulator may be operated in three "stages" or modes: (1) For current runup in the load, both first and second transistor switch arrays are turned "on" and current is supplied to the load through both transistor arrays. (2) When load current reaches the desired level, the first switch is turned "off", and load current "flywheels" through the second switch array and the fourth leg diode array connecting the second switch array in series with the load. Current is maintained by alternating between modes 1 and 2 at a suitable duty cycle and switching rate set by the controller. (3) Rapid current rundown is accomplished by turning both switch arrays "off", allowing load current to be dumped back into the source through the third and fourth diode arrays connecting the source in series opposition with the load to recover energy from the inductive load. The three operating states are controlled automatically by the controller.
Park, Jeong Woo; Tak, Young Jun; Na, Jae Won; Lee, Heesoo; Kim, Won-Gi; Kim, Hyun Jae
2018-05-16
We suggest thermal treatment with static magnetic fields (SMFs) or rotating magnetic fields (RMFs) as a new technique for the activation of indium-gallium-zinc oxide thin-film transistors (IGZO TFTs). Magnetic interactions between metal atoms in IGZO films and oxygen atoms in air by SMFs or RMFs can be expected to enhance metal-oxide (M-O) bonds, even at low temperature (150 °C), through attraction of metal and oxygen atoms having their magnetic moments aligned in the same direction. Compared to IGZO TFTs with only thermal treatment at 300 °C, IGZO TFTs under an RMF (1150 rpm) at 150 °C show superior or comparable characteristics: field-effect mobility of 12.68 cm 2 V -1 s -1 , subthreshold swing of 0.37 V dec -1 , and on/off ratio of 1.86 × 10 8 . Although IGZO TFTs under an SMF (0 rpm) can be activated at 150 °C, the electrical performance is further improved in IGZO TFTs under an RMF (1150 rpm). These improvements of IGZO TFTs under an RMF (1150 rpm) are induced by increases in the number of M-O bonds due to enhancement of the magnetic interaction per unit time as the rpm value increases. We suggest that this new process of activating IGZO TFTs at low temperature widens the choice of substrates in flexible or transparent devices.
Akar, Mehmet
2013-01-01
In this study, a new method was presented for the detection of a static eccentricity fault in a closed loop operating induction motor driven by inverter. Contrary to the motors supplied by the line, if the speed and load, and therefore the amplitude and frequency, of the current constantly change then this also causes a continuous change in the location of fault harmonics in the frequency spectrum. Angular Domain Order Tracking analysis (AD-OT) is one of the most frequently used fault diagnosis methods in the monitoring of rotating machines and the analysis of dynamic vibration signals. In the presented experimental study, motor phase current and rotor speed were monitored at various speeds and load levels with a healthy and static eccentricity fault in the closed loop driven induction motor with vector control. The AD-OT method was applied to the motor current and the results were compared with the traditional FFT and Fourier Transform based Order Tracking (FT-OT) methods. The experimental results demonstrate that AD-OT method is more efficient than the FFT and FT-OT methods for fault diagnosis, especially while the motor is operating run-up and run-down. Also the AD-OT does not incur any additional cost for the user because in inverter driven systems, current and speed sensor coexist in the system. The main innovative parts of this study are that AD-OT method was implemented on the motor current signal for the first time.
Lüssem, Björn; Keum, Chang-Min; Kasemann, Daniel; Naab, Ben; Bao, Zhenan; Leo, Karl
2016-11-23
Organic field-effect transistors hold the promise of enabling low-cost and flexible electronics. Following its success in organic optoelectronics, the organic doping technology is also used increasingly in organic field-effect transistors. Doping not only increases device performance, but it also provides a way to fine-control the transistor behavior, to develop new transistor concepts, and even improve the stability of organic transistors. This Review summarizes the latest progress made in the understanding of the doping technology and its application to organic transistors. It presents the most successful doping models and an overview of the wide variety of materials used as dopants. Further, the influence of doping on charge transport in the most relevant polycrystalline organic semiconductors is reviewed, and a concise overview on the influence of doping on transistor behavior and performance is given. In particular, recent progress in the understanding of contact doping and channel doping is summarized.
Farhadi, Rozita; Farhadi, Bita
2014-01-01
Power transistors, such as the vertical, double-diffused, metal-oxide semiconductor (VDMOS), are used extensively in the amplifier circuits of medical devices. The aim of this research was to construct a VDMOS power transistor with an optimized structure to enhance the operation of medical devices. First, boron was implanted in silicon by implanting unclamped inductive switching (UIS) and a Faraday shield. The Faraday shield was implanted in order to replace the gate-field parasitic capacitor on the entry part of the device. Also, implanting the UIS was used in order to decrease the effect of parasitic bipolar junction transistor (BJT) of the VDMOS power transistor. The research tool used in this study was Silvaco software. By decreasing the transistor entry resistance in the optimized VDMOS structure, power losses and noise at the entry of the transistor were decreased, and, by increasing the breakdown voltage, the lifetime of the VDMOS transistor lifetime was increased, which resulted in increasing drain flow and decreasing Ron. This consequently resulted in enhancing the operation of high-frequency medical devices that use transistors, such as Radio Frequency (RF) and electrocardiograph machines.
EDITORIAL: Reigniting innovation in the transistor Reigniting innovation in the transistor
Demming, Anna
2012-09-01
Today the transistor is integral to the electronic circuitry that wires our lives. When Bardeen and Brattain first observed an amplified signal by connecting electrodes to a germanium crystal they saw that their 'semiconductor triode' could prove a useful alternative to the more cumbersome vacuum tubes used at the time [1]. But it was perhaps William Schottky who recognized the extent of the transistor's potential. A basic transistor has three or more terminals and current across one pair of terminals can switch or amplify current through another pair. Bardeen, Brattain and Schottky were jointly awarded a Nobel Prize in 1956 'for their researches on semiconductors and their discovery of the transistor effect' [2]. Since then many new forms of the transistor have been developed and understanding of the underlying properties is constantly advancing. In this issue Chen and Shih and colleagues at Taiwan National University and Drexel University report a pyroelectrics transistor. They show how a novel optothermal gating mechanism can modulate the current, allowing a range of developments in nanoscale optoelectronics and wireless devices [3]. The explosion of interest in nanoscale devices in the 1990s inspired electronics researchers to look for new systems that can act as transistors, such as carbon nanotube [4] and silicon nanowire [5] transistors. Generally these transistors function by raising and lowering an energy barrier of kBT -1, but researchers in the US and Canada have demonstrated that the quantum interference between two electronic pathways through aromatic molecules can also modulate the current flow [6]. The device has advantages for further miniaturization where energy dissipation in conventional systems may eventually cause complications. Interest in transistor technology has also led to advances in fabrication techniques for achieving high production quantities, such as printing [7]. Researchers in Florida in the US demonstrated field effect transistor
International Nuclear Information System (INIS)
1981-01-01
The electrical characteristics of unijunction transistors can be modified by irradiation with electron beams in excess of 400 KeV and at a dose rate of 10 13 to 10 16 e/cm 2 . Examples are given of the effect of exposing the emitter-base junctions of transistors to such lattice defect causing radiation for a time sufficient to change the valley current of the transistor. (U.K.)
International Nuclear Information System (INIS)
Barocas, Marcel
1974-01-01
The objective of this research thesis is to determine, by simulation, the time response of devices based on MOS transistors. After a theoretical study of the MOS element, the author develops a transistor model based on its physical components. This model is firstly used to obtain the transistor static characteristics. The author then studies the time response of the inverter logic circuit which is the basic operator of these circuits. Theoretical results are verified by simulation and by experiments. The author then reports a detailed study of the inverter input impedance, and the decoupling property between logic operators in cascade. The simulation confirms the obtained results. Based on this decoupling property, the output time response of a logic chain is studied by using a simulation software. A general method of determination of the output time response is developed with application to a logic assembly [fr
Diagnosis of voltage collapse due to induction motor stalling using static analysis
International Nuclear Information System (INIS)
Karbalaei, F.; Kalantar, M.; Kazemi, A.
2008-01-01
Induction motor stalling is one of the important reasons for voltage collapse. This paper presents that, for induction motor stalling diagnosis, it is not necessary to use a third or first order dynamic model of induction motors. Instead, a method is presented based on algebraic calculations for which the steady state model of the induction motor considering different kinds of mechanical loads (constant and variable torque) is added to the power flow equations. Simulation results for a simple system confirm the correctness of the proposed method as compared to dynamic simulation results
Free-Standing Organic Transistors and Circuits with Sub-Micron Thicknesses
Fukuda, Kenjiro; Sekine, Tomohito; Shiwaku, Rei; Morimoto, Takuya; Kumaki, Daisuke; Tokito, Shizuo
2016-01-01
The realization of wearable electronic devices with extremely thin and flexible form factors has been a major technological challenge. While substrates typically limit the thickness of thin-film electronic devices, they are usually necessary for their fabrication and functionality. Here we report on ultra-thin organic transistors and integrated circuits using device components whose substrates that have been removed. The fabricated organic circuits with total device thicknesses down to 350 nm have electrical performance levels close to those fabricated on conventional flexible substrates. Moreover, they exhibit excellent mechanical robustness, whereby their static and dynamic electrical characteristics do not change even under 50% compressive strain. Tests using systematically applied compressive strains reveal that these free-standing organic transistors possess anisotropic mechanical stability, and a strain model for a multilayer stack can be used to describe the strain in this sort of ultra-thin device. These results show the feasibility of ultimate-thin organic electronic devices using free-standing constructions. PMID:27278828
Directory of Open Access Journals (Sweden)
Milaim Zabeli
2017-11-01
Full Text Available The objective of this paper is to research the impact of electrical and physical parameters that characterize the complementary MOSFET transistors (NMOS and PMOS transistors in the CMOS inverter for static mode of operation. In addition to this, the paper also aims at exploring the directives that are to be followed during the design phase of the CMOS inverters that enable designers to design the CMOS inverters with the best possible performance, depending on operation conditions. The CMOS inverter designed with the best possible features also enables the designing of the CMOS logic circuits with the best possible performance, according to the operation conditions and designers’ requirements.
Directory of Open Access Journals (Sweden)
Wu Zaixin
2016-01-01
Full Text Available High-speed motorized spindle is a multi-variable, non-linear and strong coupling system. The rotor static eccentricity is inevitable because of machining or assembling error. The rotor static eccentricities have an important effect on the electromechanical coupled characteristics of the motorized spindle. In this paper, the electromechanical coupled mathematical model of the motorized spindle was set up. The mathematical model includes mechanical and electrical equation. The mechanical and electrical equation is built up by the variational principle. Furthermore, the inductance parameters without the rotor static eccentricity and the inductance parameters with rotor static eccentricity have been calculated by the winding function method and the high speed motorized spindle was simulated. The result show that the rotor static eccentricity can delay the starting process of the motorized spindle, and at steady state, the rotor circuit currents are still large because of the rotor static eccentricity.
Nature of size effects in compact models of field effect transistors
Energy Technology Data Exchange (ETDEWEB)
Torkhov, N. A., E-mail: trkf@mail.ru [Tomsk State University, Tomsk 634050 (Russian Federation); Scientific-Research Institute of Semiconductor Devices, Tomsk 634050 (Russian Federation); Tomsk State University of Control Systems and Radioelectronics, Tomsk 634050 (Russian Federation); Babak, L. I.; Kokolov, A. A.; Salnikov, A. S.; Dobush, I. M. [Tomsk State University of Control Systems and Radioelectronics, Tomsk 634050 (Russian Federation); Novikov, V. A., E-mail: novikovvadim@mail.ru; Ivonin, I. V. [Tomsk State University, Tomsk 634050 (Russian Federation)
2016-03-07
Investigations have shown that in the local approximation (for sizes L < 100 μm), AlGaN/GaN high electron mobility transistor (HEMT) structures satisfy to all properties of chaotic systems and can be described in the language of fractal geometry of fractional dimensions. For such objects, values of their electrophysical characteristics depend on the linear sizes of the examined regions, which explain the presence of the so-called size effects—dependences of the electrophysical and instrumental characteristics on the linear sizes of the active elements of semiconductor devices. In the present work, a relationship has been established for the linear model parameters of the equivalent circuit elements of internal transistors with fractal geometry of the heteroepitaxial structure manifested through a dependence of its relative electrophysical characteristics on the linear sizes of the examined surface areas. For the HEMTs, this implies dependences of their relative static (A/mm, mA/V/mm, Ω/mm, etc.) and microwave characteristics (W/mm) on the width d of the sink-source channel and on the number of sections n that leads to a nonlinear dependence of the retrieved parameter values of equivalent circuit elements of linear internal transistor models on n and d. Thus, it has been demonstrated that the size effects in semiconductors determined by the fractal geometry must be taken into account when investigating the properties of semiconductor objects on the levels less than the local approximation limit and designing and manufacturing field effect transistors. In general, the suggested approach allows a complex of problems to be solved on designing, optimizing, and retrieving the parameters of equivalent circuits of linear and nonlinear models of not only field effect transistors but also any arbitrary semiconductor devices with nonlinear instrumental characteristics.
Switching current imbalance mitigation in power modules with parallel connected SiC MOSFETs
DEFF Research Database (Denmark)
Beczkowski, Szymon; Jørgensen, Asger Bjørn; Li, Helong
2017-01-01
Multichip power modules use parallel connected chips to achieve high current rating. Due to a finite flexibility in a DBC layout, some electrical asymmetries will occur in the module. Parallel connected transistors will exhibit uneven static and dynamic current sharing due to these asymmetries....... Especially important are the couplings between gate and power loops of individual transistors. Fast changing source currents cause gate voltage imbalances yielding uneven switching currents. Equalizing gate voltages seen by paralleled transistors, done by adjusting source bond wires, is proposed...... in this paper. Analysis is performed on an industry standard DBC layout using numerically extracted module parasitics. The method of tuning individual source inductances shows clear improvement in dynamic current balancing and prevents excessive current overshoot during transistors turn-on....
Detection of Static Eccentricity Fault in Saturated Induction Motors by ...
African Journals Online (AJOL)
Unfortunately, motor current signature analysis (MCSA) cannot detect the small degrees of the purely static eccentricity (SE) defects, while the air-gap magnetic flux signature analysis (FSA) is applied successfully. The simulation results are obtained by using time stepping finite elements (TSFE) method. In order to show the ...
Amorphous alloy induction core performance in pulse condition
International Nuclear Information System (INIS)
Cheng Hao; Zhang Linwen; Cheng Nian'an
2002-01-01
The requirements and the characteristics of magnetic material (amorphous and ferrite) in linac induction accelerators (LIA) are described briefly in this paper. Experimentations are done base on the static conditions, in additional more researches are done in the pulse condition. Come to the conclusion that both materials have higher saturation magnetic swing under pulse conditions in comparison with their static conditions
detection of static eccentricity fault in saturated induction motors
African Journals Online (AJOL)
2013-06-30
Jun 30, 2013 ... The air gap magnetic field contains full information of the stator condition and ... voltage asymmetry [21] wound rotor phase disconnection [22], ... TSFE analysis of induction motor based circuit-coupled method ... The last term represents current induced in conducting material when flux changes with time.
Copper atomic-scale transistors.
Xie, Fangqing; Kavalenka, Maryna N; Röger, Moritz; Albrecht, Daniel; Hölscher, Hendrik; Leuthold, Jürgen; Schimmel, Thomas
2017-01-01
We investigated copper as a working material for metallic atomic-scale transistors and confirmed that copper atomic-scale transistors can be fabricated and operated electrochemically in a copper electrolyte (CuSO 4 + H 2 SO 4 ) in bi-distilled water under ambient conditions with three microelectrodes (source, drain and gate). The electrochemical switching-on potential of the atomic-scale transistor is below 350 mV, and the switching-off potential is between 0 and -170 mV. The switching-on current is above 1 μA, which is compatible with semiconductor transistor devices. Both sign and amplitude of the voltage applied across the source and drain electrodes ( U bias ) influence the switching rate of the transistor and the copper deposition on the electrodes, and correspondingly shift the electrochemical operation potential. The copper atomic-scale transistors can be switched using a function generator without a computer-controlled feedback switching mechanism. The copper atomic-scale transistors, with only one or two atoms at the narrowest constriction, were realized to switch between 0 and 1 G 0 ( G 0 = 2e 2 /h; with e being the electron charge, and h being Planck's constant) or 2 G 0 by the function generator. The switching rate can reach up to 10 Hz. The copper atomic-scale transistor demonstrates volatile/non-volatile dual functionalities. Such an optimal merging of the logic with memory may open a perspective for processor-in-memory and logic-in-memory architectures, using copper as an alternative working material besides silver for fully metallic atomic-scale transistors.
4500 V SPT+ IGBT optimization on static and dynamic losses
International Nuclear Information System (INIS)
Dai Qingyun; Tian Xiaoli; Zhang Wenliang; Lu Shuojin; Zhu Yangjun
2015-01-01
This paper concerns the need for improving the static and dynamic performance of the high voltage insulated gate bipolar transistor (HV IGBTs). A novel structure with a carrier stored layer on the cathode side, known as an enhanced planar IGBT of the 4500 V voltage class is investigated. With the adoption of a soft punch through (SPT) concept as the vertical structure and an enhanced planar concept as the top structure, signed as SPT + IGBT, the simulation results indicate the turn-off switching waveform of the 4500 V SPT + IGBT is soft and also realizes an improved trade-off relationship between on-state voltage drop (V on ) and turn-off loss (E off ) in comparison with the SPT IGBT. Attention is also paid to the influences caused by different carrier stored layer doping dose on static and dynamic performances, to optimize on-state and switching losses of SPT + IGBT. (paper)
International Nuclear Information System (INIS)
Gray, K.E.
1978-01-01
A three film superconducting tunneling device, analogous to a semiconductor transistor, is presented, including a theoretical description and experimental results showing a current gain of four. Much larger current gains are shown to be feasible. Such a development is particularly interesting because of its novelty and the striking analogies with the semiconductor junction transistor
Silicon heterojunction transistor
International Nuclear Information System (INIS)
Matsushita, T.; Oh-uchi, N.; Hayashi, H.; Yamoto, H.
1979-01-01
SIPOS (Semi-insulating polycrystalline silicon) which is used as a surface passivation layer for highly reliable silicon devices constitutes a good heterojunction for silicon. P- or B-doped SIPOS has been used as the emitter material of a heterojunction transistor with the base and collector of silicon. An npn SIPOS-Si heterojunction transistor showing 50 times the current gain of an npn silicon homojunction transistor has been realized by high-temperature treatments in nitrogen and low-temperature annealing in hydrogen or forming gas
Accelerating the life of transistors
International Nuclear Information System (INIS)
Qi Haochun; Lü Changzhi; Zhang Xiaoling; Xie Xuesong
2013-01-01
Choosing small and medium power switching transistors of the NPN type in a 3DK set as the study object, the test of accelerating life is conducted in constant temperature and humidity, and then the data are statistically analyzed with software developed by ourselves. According to degradations of such sensitive parameters as the reverse leakage current of transistors, the lifetime order of transistors is about more than 10 4 at 100 °C and 100% relative humidity (RH) conditions. By corrosion fracture of transistor outer leads and other failure modes, with the failure truncated testing, the average lifetime rank of transistors in different distributions is extrapolated about 10 3 . Failure mechanism analyses of degradation of electrical parameters, outer lead fracture and other reasons that affect transistor lifetime are conducted. The findings show that the impact of external stress of outer leads on transistor reliability is more serious than that of parameter degradation. (semiconductor devices)
The Transistor as Low Level Switch
Energy Technology Data Exchange (ETDEWEB)
Lyden, Anders
1963-10-15
The common collector transistor switch has in the on state with open emitter a certain offset voltage U{sub EK} {approx_equal} -kT/qB{sub N}. This expression is derived in a new, more physical way. It is further shown at which emitter current the current amplification factor B{sub N} should be measured to get a correct value for the above expression. The collector current I at zero collector voltage I{sub K} = I{sub 0}(exp(qU{sub E}/kT) - 1) extremely well. Substitution of I{sub EBO} and I{sub KBO} by I{sub 0} in Eber's and Moll's relations consequently improves these equations and the characteristics of the transistor switch can be better determined. At switching on and off transients appear across the switch. The influence of the 'spike' at switching off can be described by an current I{sub SPIKE} which is easy to calculate. I{sub SPIKE} is approximately dependent only on the base - emitter depletion layer capacitance and the chopper frequency f{sub 0}. Some compensated switches have lower drift than the drift in U{sub EK}. They may, for example, have a temperature drift < 0.2 {mu}V/deg C and a long time drift < 2 {mu}V/week. Some compensated switches also have I{sub SPIKE} < 10{sup -12} f{sub 0}A. The static offset current in the off state can easily be made < 10{sup -12} A.
Avalanche transistor pulser for fast-gated operation of micro-channel plate image-intensifiers
International Nuclear Information System (INIS)
Lundy, A.; Parker, J.R.; Lunsford, J.S.; Martin, A.D.
1977-01-01
Transistors operated in the avalanche mode are employed to generate a 1000 volt 10 to 30 nsec wide pulse with less than 4 nsec rise and fall times. This pulse is resistively attenuated to approximately equal to 270 volts and drives the image intensifier tube which is a load of approximately equal to 200 pf. To reduce stray inductance and capacitance, transistor chips were assembled on a thick-film hybrid substrate. Circuit parameters, operating conditions, and coupling to the microchannel plate image-intensifier (MCPI 2 ) tube are described. To provide dc operating voltages and control of transient voltages on the MCPI 2 tube a resistance-capacitance network has been developed which (a) places the MCPI 2 output phosphor at ground, (b) provides programmable gains in ''f-stop'' steps, and (c) minimizes voltage transients on the MCPI 2 tube
Stability Analysis of Static Slip-Energy Recovery Drive via ...
African Journals Online (AJOL)
The stability of the sub synchronous static slip energy recovery scheme for the speed control of slip-ring induction motor is presented. A set of nonlinear differential equations which describe the system dynamics are derived and linearized about an operating point using perturbation technique. The Eigenvalue analysis of the ...
Logarithmic current-measuring transistor circuits
DEFF Research Database (Denmark)
Højberg, Kristian Søe
1967-01-01
Describes two transistorized circuits for the logarithmic measurement of small currents suitable for nuclear reactor instrumentation. The logarithmic element is applied in the feedback path of an amplifier, and only one dual transistor is used as logarithmic diode and temperature compensating...... transistor. A simple one-amplifier circuit is compared with a two-amplifier system. The circuits presented have been developed in connexion with an amplifier using a dual m.o.s. transistor input stage with diode-protected gates....
Shootthrough fault protection system for bipolar transistors in a voltage source transistor inverter
International Nuclear Information System (INIS)
Wirth, W.F.
1982-01-01
Faulted bipolar transistors in a voltage source transistor inverter are protected against shootthrough fault current, from the filter capacitor of the d-c voltage source which drives the inverter over the d-c bus, by interposing a small choke in series with the filter capacitor to limit the rate of rise of that fault current while at the same time causing the d-c bus voltage to instantly drop to essentially zero volts at the beginning of a shootthrough fault. In this way, the load lines of the faulted transistors are effectively shaped so that they do not enter the second breakdown area, thereby preventing second breakdown destruction of the transistors
A High-Voltage Level Tolerant Transistor Circuit
Annema, Anne J.; Geelen, Godefridus Johannes Gertrudis Maria
2001-01-01
A high-voltage level tolerant transistor circuit, comprising a plurality of cascoded transistors, including a first transistor (T1) operatively connected to a high-voltage level node (3) and a second transistor (T2) operatively connected to a low-voltage level node (2). The first transistor (T1)
Diode, transistor & fet circuits manual
Marston, R M
2013-01-01
Diode, Transistor and FET Circuits Manual is a handbook of circuits based on discrete semiconductor components such as diodes, transistors, and FETS. The book also includes diagrams and practical circuits. The book describes basic and special diode characteristics, heat wave-rectifier circuits, transformers, filter capacitors, and rectifier ratings. The text also presents practical applications of associated devices, for example, zeners, varicaps, photodiodes, or LEDs, as well as it describes bipolar transistor characteristics. The transistor can be used in three basic amplifier configuration
Mookerjea, Saurabh A.
Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SSswitching behavior of TFET is studied through mixed-mode numerical simulations. The significance of correct benchmarking methodology to estimate the effective drive current and capacitance in TFET is highlighted and compared with MOSFET. This is followed by the fabrication details of homo-junction TFET. Analysis of the electrical characteristics of homo-junction TFET gives key insight into its device operation and identifies the critical factors that impact its performance. In order to boost the ON current, the design and fabrication of hetero-junction TFET is also presented.
International Nuclear Information System (INIS)
Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl
2015-01-01
Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted. (topical review)
Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl
2015-11-11
Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted.
On theory of single-molecule transistor
International Nuclear Information System (INIS)
Tran Tien Phuc
2009-01-01
The results of the study on single-molecule transistor are mainly investigated in this paper. The structure of constructed single-molecule transistor is similar to a conventional MOSFET. The conductive channel of the transistors is a single-molecule of halogenated benzene derivatives. The chemical simulation software CAChe was used to design and implement for the essential parameter of the molecules utilized as the conductive channel. The GUI of Matlab has been built to design its graphical interface, calculate and plot the output I-V characteristic curves for the transistor. The influence of temperature, length and width of the conductive channel, and gate voltage is considered. As a result, the simulated curves are similar to the traditional MOSFET's. The operating temperature range of the transistors is wider compared with silicon semiconductors. The supply voltage for transistors is only about 1 V. The size of transistors in this research is several nanometers.
Directory of Open Access Journals (Sweden)
Thiago Alves de Sá Muniz Sampaio
2017-05-01
Full Text Available Regular school labs lack experiments that can properly identify many of the phenomena present in the electrostatic study. This paper proposes the implementation of a new kind of simple experimental apparatus for teaching topics in this area of physics, consisting of an electroscope kind that uses the field-effect transistor for detecting electric charges coming from electrified bodies. An explanation is given on the principles that makes this type of transistor an effective device due to its high sensitivity to electrostatic fields, as well as an analysis of the usefulness of this project for viewing many peculiar phenomena, such as polarization and induction. Based on this, we propose some simple activities that can be done in the classroom to involve students in the initial subject of electrostatics. We expect that this form of teaching along with experimental and explanatory approach of the phenomena in the classroom can bring to students a better learning of these concepts, demonstrating the utility of experimentation on teaching electrostatics.
Dosimetric properties of MOS transistors
International Nuclear Information System (INIS)
Frank, H.; Petr, I.
1977-01-01
The structure of MOS transistors is described and their characteristics given. The experiments performed and data in the literature show the following dosimetric properties of MOS transistors: while for low gamma doses the transistor response to exposure is linear, it shows saturation for higher doses (exceeding 10 3 Gy in tissue). The response is independent of the energy of radiation and of the dose rate (within 10 -2 to 10 5 Gy/s). The spontaneous reduction with time of the spatial charge captured by the oxide layer (fading) is small and acceptable from the point of view of dosimetry. Curves are given of isochronous annealing of the transistors following irradiation with 137 Cs and 18 MeV electrons for different voltages during irradiation. The curves show that in MOS transistors irradiated with high-energy electrons the effect of annealing is less than in transistors irradiated with 137 Cs. In view of the requirement of using higher temperatures (approx. 400 degC) for the complete ''erasing'' of the captured charge, unsealed systems must be used for dosimetric purposes. The effect was also studied of neutron radiation, proton radiation and electron radiation on the MOS transistor structure. For MOS transistor irradiation with 14 MeV neutrons from a neutron generator the response was 4% of that for gamma radiation at the same dose equivalent. The effect of proton radiation was studied as related to the changes in MOS transistor structure during space flights. The response curve shapes are similar to those of gamma radiation curves. The effect of electron radiation on the MOS structure was studied by many authors. The experiments show that for each thickness of the SiO 2 layer an electron energy exists at which the size of the charge captured in SiO 2 is the greatest. All data show that MOS transistors are promising for radiation dosimetry. The main advantage of MOS transistors as gamma dosemeters is the ease and speed of evaluation, low sensitivity to neutron
Colour tuneable light-emitting transistor
Energy Technology Data Exchange (ETDEWEB)
Feldmeier, Eva J.; Melzer, Christian; Seggern, Heinz von [Electronic Materials Department, Institute of Materials Science, Technische Universitaet Darmstadt (Germany)
2010-07-01
In recent years the interest in ambipolar organic light-emitting field-effect transistors has increased steadily as the devices combine switching behaviour of transistors with light emission. Usually, small molecules and polymers with a band gap in the visible spectral range serve as semiconducting materials. Mandatory remain balanced injection and transport properties for both charge carrier types to provide full control of the spatial position of the recombination zone of electrons and holes in the transistor channel via the applied voltages. As will be presented here, the spatial control of the recombination zone opens new possibilities towards light-emitting devices with colour tuneable emission. In our contribution an organic light-emitting field-effect transistors is presented whose emission colour can be changed by the applied voltages. The organic top-contact field-effect transistor is based on a parallel layer stack of acenes serving as organic transport and emission layers. The transistor displays ambipolar characteristics with a narrow recombination zone within the transistor channel. During operation the recombination zone can be moved by a proper change in the drain and gate bias from one organic semiconductor layer to another one inducing a change in the emission colour. In the presented example the emission maxima can be switched from 530 nm to 580 nm.
Static devices with new permanent magnets
International Nuclear Information System (INIS)
Chavanne, J.; Laforest, J.; Pauthenet, R.
1987-01-01
The high remanence and coercivity of the new permanent magnet materials are of special interest in the static applications. High ordering temperature and are uniaxial anisotropy at the origin of their good permanent magnet properties are obtained in rare earth-transition metal compounds. Binary SmCo/sub 5/ and Sm/sub 2/Co/sub 17/ and ternary Nd/sub 2/Fe/sub 14/B compounds are the basis materials of the best permanent magnets. new concepts of calculations of static devices with these magnets can be applied: the magnetization can be considered as ridig, the density of the surface Amperian current is constant, the relative permeability is approximately 1 and the induction calculations are linear. Examples of hexapoles with Sm-Co and NdFeB magnets are described and the performances are compared. The problems of temperature behavior and corrosion resistance are underlined
Dosimetric properties of MOS transistors
International Nuclear Information System (INIS)
Peter, I.; Frank, G.
1977-01-01
The performance of MOS transistors as gamma detectors has been tested. The dosimeter sensitivity has proved to be independent on the doses ranging from 10 3 to 10 6 R, and gamma energy of 137 Cs, 60 Co - sources and 5 - 18 MeV electrons. Fading of the space charge trapped by the SiO 2 layer of the transistor has appeared to be neglegible at room temperature after 400 hrs. The isochronous annealing in the temperature range of 40-260 deg C had a more substantial effect on the space charge of the transistor irradiated with 18 MeV electrons than on the 137 Cs gamma-irradiated transistors. This proved a repeated use of γ-dosemeters. MOS transistors are concluded to be promising for gamma dosimetry [ru
Transistor-based particle detection systems and methods
Jain, Ankit; Nair, Pradeep R.; Alam, Muhammad Ashraful
2015-06-09
Transistor-based particle detection systems and methods may be configured to detect charged and non-charged particles. Such systems may include a supporting structure contacting a gate of a transistor and separating the gate from a dielectric of the transistor, and the transistor may have a near pull-in bias and a sub-threshold region bias to facilitate particle detection. The transistor may be configured to change current flow through the transistor in response to a change in stiffness of the gate caused by securing of a particle to the gate, and the transistor-based particle detection system may configured to detect the non-charged particle at least from the change in current flow.
Electron irradiation of power transistors
International Nuclear Information System (INIS)
Hower, P.L.; Fiedor, R.J.
1982-01-01
A method for reducing storage time and gain parameters in a semiconductor transistor includes the step of subjecting the transistor to electron irradiation of a dosage determined from measurements of the parameters of a test batch of transistors. Reduction of carrier lifetime by proton bombardment and gold doping is mentioned as an alternative to electron irradiation. (author)
Shokouh, Seyed Hossein Hosseini; Pezeshki, Atiye; Ali Raza, Syed Raza; Lee, Hee Sung; Min, Sung-Wook; Jeon, Pyo Jin; Shin, Jae Min; Im, Seongil
2015-01-07
A 1D-2D hybrid complementary logic inverter comprising of ZnO nanowire and WSe2 nanosheet field-effect transistors (FETs) is fabricated on glass, which shows excellent static and dynamic electrical performances with a voltage gain of ≈60, sub-nanowatt power consumption, and at least 1 kHz inverting speed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Silicon on insulator self-aligned transistors
McCarthy, Anthony M.
2003-11-18
A method for fabricating thin-film single-crystal silicon-on-insulator (SOI) self-aligned transistors. Standard processing of silicon substrates is used to fabricate the transistors. Physical spaces, between the source and gate, and the drain and gate, introduced by etching the polysilicon gate material, are used to provide connecting implants (bridges) which allow the transistor to perform normally. After completion of the silicon substrate processing, the silicon wafer is bonded to an insulator (glass) substrate, and the silicon substrate is removed leaving the transistors on the insulator (glass) substrate. Transistors fabricated by this method may be utilized, for example, in flat panel displays, etc.
Physical limits of silicon transistors and circuits
International Nuclear Information System (INIS)
Keyes, Robert W
2005-01-01
A discussion on transistors and electronic computing including some history introduces semiconductor devices and the motivation for miniaturization of transistors. The changing physics of field-effect transistors and ways to mitigate the deterioration in performance caused by the changes follows. The limits of transistors are tied to the requirements of the chips that carry them and the difficulties of fabricating very small structures. Some concluding remarks about transistors and limits are presented
Induction generator-induction motor wind-powered pumping system
Energy Technology Data Exchange (ETDEWEB)
Miranda, M.S.; Lyra, R.O.C.; Silva, S.R. [CPDEE - UFMG, Belo Horizonte (Brazil)
1997-12-31
The energy storage matter plays an important role in wind-electric conversion systems for isolated applications. Having that in mind, two different approaches can be basically considered: either the immediate conversion of the generated electric energy, as in a water pumping system or electric energy storage for later use, as in a battery charging system. Due to some features such as no need of an external reactive power source and, sometimes, a gearbox, permanent-magnet synchronous generators have been broadly used in low rated power isolated systems. Despite that, system performance can be affected when the generator is feeding an inductive load (e.g., an induction motor) under variable-speed-variable-frequency operational conditions. Since there is no effective flux control, motor overload may occur at high wind speeds. Thus, good system performance can be obtained through additional control devices which may increase system cost. Although being rugged and cheap, induction machines always work as a reactive power drain; therefore, they demand an external reactive power source. Considering that, reactive static compensators appear as an attractive alternative to the cost x performance problem. In addition to that, different control strategies can be used so that system performance can be improved.
Lenz, Thomas; Schmaltz, Thomas; Novak, Michael; Halik, Marcus
2012-10-02
In this work, we compared the kinetics of monolayer self-assembly long-chained carboxylic acids and phosphonic acids on thin aluminum oxide surfaces and investigated their dielectric properties in capacitors and low-voltage organic thin-film transistors. Phosphonic acid anchor groups tend to substitute carboxylic acid molecules on aluminum oxide surfaces and thus allow the formation of mixed or fully exchanged monolayers. With different alkyl chain substituents (n-alkyl or fluorinated alkyl chains), the exchange reaction can be monitored as a function of time by static contact angle measurements. The threshold voltage in α,α'-dihexyl-sexithiophene thin-film transistors composed of such mixed layer dielectrics correlates with the exchange progress and can be tuned from negative to positive values or vice versa depending on the dipole moment of the alkyl chain substituents. The change in the dipole moment with increasing exchange time also shifts the capacitance of these devices. The rate constants for exchange reactions determined by the time-dependent shift of static contact angle, threshold voltage, and capacitance exhibit virtually the same value thus proving the exchange kinetics to be highly controllable. In general, the exchange approach is a powerful tool in interface engineering, displaying a great potential for tailoring of device characteristics.
Crowbar System in Doubly Fed Induction Wind Generators
Directory of Open Access Journals (Sweden)
Maurício B. C. Salles
2010-04-01
Full Text Available In the last 15 years, the use of doubly fed induction machines in modern variable-speed wind turbines has increased rapidly. This development has been driven by the cost reduction as well as the low-loss generation of Insulated Gate Bipolar Transistors (IGBT. According to new grid code requirements, wind turbines must remain connected to the grid during grid disturbances. Moreover, they must also contribute to voltage support during and after grid faults. The crowbar system is essential to avoid the disconnection of the doubly fed induction wind generators from the network during faults. The insertion of the crowbar in the rotor circuits for a short period of time enables a more efficient terminal voltage control. As a general rule, the activation and the deactivation of the crowbar system is based only on the DC-link voltage level of the back-to-back converters. In this context, the authors discuss the critical rotor speed to analyze the instability of doubly fed induction generators during grid faults.
Power transistor module for high current applications
International Nuclear Information System (INIS)
Cilyo, F.F.
1975-01-01
One of the parts needed for the control system of the 400-GeV accelerator at Fermilab was a power transistor with a safe operating area of 1800A at 50V, dc current gain of 100,000 and 20 kHz bandwidth. Since the commercially available discrete devices and power hybrid packages did not meet these requirements, a power transistor module was developed which performed satisfactorily. By connecting 13 power transistors in parallel, with due consideration for network and heat dissipation problems, and by driving these 13 with another power transistor, a super power transistor is made, having an equivalent current, power, and safe operating area capability of 13 transistors. For higher capabilities, additional modules can be conveniently added. (auth)
Zheng, Qi-Wen; Yu, Xue-Feng; Cui, Jiang-Wei; Guo, Qi; Ren, Di-Yuan; Cong, Zhong-Chao; Zhou, Hang
2014-10-01
Pattern imprinting in deep sub-micron static random access memories (SRAMs) during total dose irradiation is investigated in detail. As the dose accumulates, the data pattern of memory cells loading during irradiation is gradually imprinted on their background data pattern. We build a relationship between the memory cell's static noise margin (SNM) and the background data, and study the influence of irradiation on the probability density function of ΔSNM, which is the difference between two data sides' SNMs, to discuss the reason for pattern imprinting. Finally, we demonstrate that, for micron and deep sub-micron devices, the mechanism of pattern imprinting is the bias-dependent threshold shift of the transistor, but for a deep sub-micron device the shift results from charge trapping in the shallow trench isolation (STI) oxide rather than from the gate oxide of the micron-device.
Charles Pravin, J.; Nirmal, D.; Prajoon, P.; Mohan Kumar, N.; Ajayan, J.
2017-04-01
In this paper the Dual Metal Surround Gate Junctionless Transistor (DMSGJLT) has been implemented with various high-k dielectric. The leakage current in the device is analysed in detail by obtaining the band structure for different high-k dielectric material. It is noticed that with increasing dielectric constant the device provides more resistance for the direct tunnelling of electron in off state. The gate oxide capacitance also shows 0.1 μF improvement with Hafnium Oxide (HfO2) than Silicon Oxide (SiO2). This paved the way for a better memory application when high-k dielectric is used. The Six Transistor (6T) Static Random Access Memory (SRAM) circuit implemented shows 41.4% improvement in read noise margin for HfO2 than SiO2. It also shows 37.49% improvement in write noise margin and 30.16% improvement in hold noise margin for HfO2 than SiO2.
Soto-Bernal, Juan J.; Gonzalez-Mota, Rosario; Rosales-Candelas, Iliana; Ortiz-Lozano, Jose A.
2015-01-01
This paper presents the results of an experimental study carried out to comprehend the physical, mechanical, and microstructural behavior of cement pastes subjected to static magnetic fields while hydrating and setting. The experimental methodology consisted in exposing fresh cement pastes to static magnetic fields at three different magnetic induction strengths: 19.07, 22.22, and 25.37 Gauss. The microstructural characterization makes evident that there are differences in relation to amount ...
Analysing organic transistors based on interface approximation
International Nuclear Information System (INIS)
Akiyama, Yuto; Mori, Takehiko
2014-01-01
Temperature-dependent characteristics of organic transistors are analysed thoroughly using interface approximation. In contrast to amorphous silicon transistors, it is characteristic of organic transistors that the accumulation layer is concentrated on the first monolayer, and it is appropriate to consider interface charge rather than band bending. On the basis of this model, observed characteristics of hexamethylenetetrathiafulvalene (HMTTF) and dibenzotetrathiafulvalene (DBTTF) transistors with various surface treatments are analysed, and the trap distribution is extracted. In turn, starting from a simple exponential distribution, we can reproduce the temperature-dependent transistor characteristics as well as the gate voltage dependence of the activation energy, so we can investigate various aspects of organic transistors self-consistently under the interface approximation. Small deviation from such an ideal transistor operation is discussed assuming the presence of an energetically discrete trap level, which leads to a hump in the transfer characteristics. The contact resistance is estimated by measuring the transfer characteristics up to the linear region
Impact of Process Technologies on ELDRS of Bipolar Transistors
International Nuclear Information System (INIS)
Lu Wu; Ren Diyuan; Guo Qi; Yu Xuefeng; Zheng Yuzhan
2010-01-01
Radiation effects under different dose rates and annealing behaviors of domestic bipolar transistors, with same manufacture technology, were investigated.These transistors include NPN transistors of various emitter area, and LPNP transistors with different doping concentrations in emitter. It is shown that different types of transistors have different radiation responses. The results of NPN transistors show that more degradation occurs at less emitter area. Yet, the results of LPNP transistors demonstrate that transistors with lightly doped emitter are more sensitive to radiation, compared with heavily doped emitter. Finally,the mechanisms of the difference between various radiation responses were analyzed. (authors)
Sporea, R. A.; Trainor, M. J.; Young, N. D.; Shannon, J. M.; Silva, S. R. P.
2014-03-01
Ultra-large-scale integrated (ULSI) circuits have benefited from successive refinements in device architecture for enormous improvements in speed, power efficiency and areal density. In large-area electronics (LAE), however, the basic building-block, the thin-film field-effect transistor (TFT) has largely remained static. Now, a device concept with fundamentally different operation, the source-gated transistor (SGT) opens the possibility of unprecedented functionality in future low-cost LAE. With its simple structure and operational characteristics of low saturation voltage, stability under electrical stress and large intrinsic gain, the SGT is ideally suited for LAE analog applications. Here, we show using measurements on polysilicon devices that these characteristics lead to substantial improvements in gain, noise margin, power-delay product and overall circuit robustness in digital SGT-based designs. These findings have far-reaching consequences, as LAE will form the technological basis for a variety of future developments in the biomedical, civil engineering, remote sensing, artificial skin areas, as well as wearable and ubiquitous computing, or lightweight applications for space exploration.
Distributed amplifier using Josephson vortex flow transistors
International Nuclear Information System (INIS)
McGinnis, D.P.; Beyer, J.B.; Nordman, J.E.
1986-01-01
A wide-band traveling wave amplifier using vortex flow transistors is proposed. A vortex flow transistor is a long Josephson junction used as a current controlled voltage source. The dual nature of this device to the field effect transistor is exploited. A circuit model of this device is proposed and a distributed amplifier utilizing 50 vortex flow transistors is predicted to have useful gain to 100 GHz
Photosensitive graphene transistors.
Li, Jinhua; Niu, Liyong; Zheng, Zijian; Yan, Feng
2014-08-20
High performance photodetectors play important roles in the development of innovative technologies in many fields, including medicine, display and imaging, military, optical communication, environment monitoring, security check, scientific research and industrial processing control. Graphene, the most fascinating two-dimensional material, has demonstrated promising applications in various types of photodetectors from terahertz to ultraviolet, due to its ultrahigh carrier mobility and light absorption in broad wavelength range. Graphene field effect transistors are recognized as a type of excellent transducers for photodetection thanks to the inherent amplification function of the transistors, the feasibility of miniaturization and the unique properties of graphene. In this review, we will introduce the applications of graphene transistors as photodetectors in different wavelength ranges including terahertz, infrared, visible, and ultraviolet, focusing on the device design, physics and photosensitive performance. Since the device properties are closely related to the quality of graphene, the devices based on graphene prepared with different methods will be addressed separately with a view to demonstrating more clearly their advantages and shortcomings in practical applications. It is expected that highly sensitive photodetectors based on graphene transistors will find important applications in many emerging areas especially flexible, wearable, printable or transparent electronics and high frequency communications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Gold nanoparticle-pentacene memory-transistors
Novembre , Christophe; Guerin , David; Lmimouni , Kamal; Gamrat , Christian; Vuillaume , Dominique
2008-01-01
We demonstrate an organic memory-transistor device based on a pentacene-gold nanoparticles active layer. Gold (Au) nanoparticles are immobilized on the gate dielectric (silicon dioxide) of a pentacene transistor by an amino-terminated self-assembled monolayer. Under the application of writing and erasing pulses on the gate, large threshold voltage shift (22 V) and on/off drain current ratio of ~3E4 are obtained. The hole field-effect mobility of the transistor is similar in the on and off sta...
The Complete Semiconductor Transistor and Its Incomplete Forms
International Nuclear Information System (INIS)
Jie Binbin; Sah, C.-T.
2009-01-01
This paper describes the definition of the complete transistor. For semiconductor devices, the complete transistor is always bipolar, namely, its electrical characteristics contain both electron and hole currents controlled by their spatial charge distributions. Partially complete or incomplete transistors, via coined names or/and designed physical geometries, included the 1949 Shockley p/n junction transistor (later called Bipolar Junction Transistor, BJT), the 1952 Shockley unipolar 'field-effect' transistor (FET, later called the p/n Junction Gate FET or JGFET), as well as the field-effect transistors introduced by later investigators. Similarities between the surface-channel MOS-gate FET (MOSFET) and the volume-channel BJT are illustrated. The bipolar currents, identified by us in a recent nanometer FET with 2-MOS-gates on thin and nearly pure silicon base, led us to the recognition of the physical makeup and electrical current and charge compositions of a complete transistor and its extension to other three or more terminal signal processing devices, and also the importance of the terminal contacts.
Design of ternary clocked adiabatic static random access memory
International Nuclear Information System (INIS)
Wang Pengjun; Mei Fengna
2011-01-01
Based on multi-valued logic, adiabatic circuits and the structure of ternary static random access memory (SRAM), a design scheme of a novel ternary clocked adiabatic SRAM is presented. The scheme adopts bootstrapped NMOS transistors, and an address decoder, a storage cell and a sense amplifier are charged and discharged in the adiabatic way, so the charges stored in the large switch capacitance of word lines, bit lines and the address decoder can be effectively restored to achieve energy recovery during reading and writing of ternary signals. The PSPICE simulation results indicate that the ternary clocked adiabatic SRAM has a correct logic function and low power consumption. Compared with ternary conventional SRAM, the average power consumption of the ternary adiabatic SRAM saves up to 68% in the same conditions. (semiconductor integrated circuits)
Design of ternary clocked adiabatic static random access memory
Pengjun, Wang; Fengna, Mei
2011-10-01
Based on multi-valued logic, adiabatic circuits and the structure of ternary static random access memory (SRAM), a design scheme of a novel ternary clocked adiabatic SRAM is presented. The scheme adopts bootstrapped NMOS transistors, and an address decoder, a storage cell and a sense amplifier are charged and discharged in the adiabatic way, so the charges stored in the large switch capacitance of word lines, bit lines and the address decoder can be effectively restored to achieve energy recovery during reading and writing of ternary signals. The PSPICE simulation results indicate that the ternary clocked adiabatic SRAM has a correct logic function and low power consumption. Compared with ternary conventional SRAM, the average power consumption of the ternary adiabatic SRAM saves up to 68% in the same conditions.
Mixed-fault diagnosis in induction motors considering varying load and broken bars location
International Nuclear Information System (INIS)
Faiz, Jawad; Ebrahimi, Bashir Mahdi; Toliyat, H.A.; Abu-Elhaija, W.S.
2010-01-01
Simultaneous static eccentricity and broken rotor bars faults, called mixed-fault, in a three-phase squirrel-cage induction motor is analyzed by time stepping finite element method using fast Fourier transform. Generally, there is an inherent static eccentricity (below 10%) in a broken rotor bar induction motor and therefore study of the mixed-fault case could be considered as a real case. Stator current frequency spectrum over low frequencies, medium frequencies and high frequencies are analyzed; static eccentricity diagnosis and its distinguishing from the rotor bars breakage in the mixed-fault case are described. The contribution of the static eccentricity and broken rotor bars faults are precisely determined. Influence of the broken bars location upon the amplitudes of the harmonics due to the mixed-fault is also investigated. It is shown that the amplitudes of harmonics due to broken bars placed on one pole are larger than the case in which the broken bars are distributed on different poles. In addition, influence of varying load on the amplitudes of the harmonics due to the mixed-fault is studied and indicated that the higher load increases the harmonics components amplitudes due to the broken bars while the static eccentricity degree decreases. Simulation results are confirmed by the experimental results.
Gallium nitride based transistors for high-efficiency microwave switch-mode amplifiers
Energy Technology Data Exchange (ETDEWEB)
Maroldt, Stephan
2012-07-01
Highly-efficient switch-mode power amplifiers form key elements in future fully-digital base stations for mobile communication. This novel digital base station concept reduces system energy consumption, complexity, size and costs, while the flexibility in terms of multi-band operation and signal modulation improves. In this work, innovative core circuits for digital high-efficiency class-D and class-S power amplifiers based on gallium nitride (GaN) technology were developed for the application in digital base stations. A combination of optimized GaN devices and improvements in circuit design allow a highly-efficient switch-mode operation at mobile communication frequencies between 0.45 GHz and 2 GHz. Transistor device modeling for switch-mode operation, the simulation environment, and a broadband measurement system were established for the design and evaluation of digital switchmode power amplifiers. The design of broadband core circuits for switch-mode amplifier concepts was analyzed for dual-stage amplifier circuits, using an initial GaN technology with a gate length of 0.25 {mu}m. A speed-enhanced driver stage improved the circuit switching speed sufficiently above 1 GHz. Speed and efficiency of the amplifier core circuits were studied related to transistor parameters like cut-off frequency or gate capacitance. A reduced gate length was found to improve the switching speed, while a lower on-resistance allows the reduction of the inherent static losses of the GaN-based switches. Apart from this, the restriction of a 50 Ohm environment was found to be a major output power and switching speed limitation, due to a poor switching drive capability of the input capacitance of the GaN circuit. Finally, the optimized transistor and circuit design with an output gate width of 1.2 mm were effectively implemented in the given environment for an operation up to 2 GHz with a high drain efficiency of >65% and a digital output power of 5 W. A maximum output power of 9.7 W and a
Electric engineering introduction
International Nuclear Information System (INIS)
An, Byeong Won; Eom, Sang Ho
1999-03-01
It is divided into nine chapters, which includes electricity theory such as structure of material and current, nature of electricity, static, magnetic force and magnetic attraction, attraction of current and a storage battery, electric circuit on a direct current circuit, single phase circuit and 3-phase current circuit electricity machine like DC generator, DC motor, alternator, electric transformer, single-phase induction motor, 3-phase induction motor, synchronous motor, synchro electric machine, semiconductor such as diode, transistor, FET, UJT, silicon symmetrical switch, electronic circuit like smoothing circuit and Bistable MV. circuit, automatic control, measurement of electricity, electric application and safety.
A New XOR Structure Based on Resonant-Tunneling High Electron Mobility Transistor
Directory of Open Access Journals (Sweden)
Mohammad Javad Sharifi
2009-01-01
Full Text Available A new structure for an exclusive-OR (XOR gate based on the resonant-tunneling high electron mobility transistor (RTHEMT is introduced which comprises only an RTHEMT and two FETs. Calculations are done by utilizing a new subcircuit model for simulating the RTHEMT in the SPICE simulator. Details of the design, input, and output values and margins, delay of each transition, maximum operating frequency, static and dynamic power dissipations of the new structure are discussed and calculated and the performance is compared with other XOR gates which confirm that the presented structure has a high performance. Furthermore, to the best of authors' knowledge, it has the least component count in comparison to the existing structures.
International Nuclear Information System (INIS)
Zheng Qi-Wen; Yu Xue-Feng; Cui Jiang-Wei; Guo Qi; Ren Di-Yuan; Cong Zhong-Chao; Zhou Hang
2014-01-01
Pattern imprinting in deep sub-micron static random access memories (SRAMs) during total dose irradiation is investigated in detail. As the dose accumulates, the data pattern of memory cells loading during irradiation is gradually imprinted on their background data pattern. We build a relationship between the memory cell's static noise margin (SNM) and the background data, and study the influence of irradiation on the probability density function of ΔSNM, which is the difference between two data sides' SNMs, to discuss the reason for pattern imprinting. Finally, we demonstrate that, for micron and deep sub-micron devices, the mechanism of pattern imprinting is the bias-dependent threshold shift of the transistor, but for a deep sub-micron device the shift results from charge trapping in the shallow trench isolation (STI) oxide rather than from the gate oxide of the micron-device. (condensed matter: structural, mechanical, and thermal properties)
Reconfigurable Complementary Logic Circuits with Ambipolar Organic Transistors.
Yoo, Hocheon; Ghittorelli, Matteo; Smits, Edsger C P; Gelinck, Gerwin H; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon
2016-10-20
Ambipolar organic electronics offer great potential for simple and low-cost fabrication of complementary logic circuits on large-area and mechanically flexible substrates. Ambipolar transistors are ideal candidates for the simple and low-cost development of complementary logic circuits since they can operate as n-type and p-type transistors. Nevertheless, the experimental demonstration of ambipolar organic complementary circuits is limited to inverters. The control of the transistor polarity is crucial for proper circuit operation. Novel gating techniques enable to control the transistor polarity but result in dramatically reduced performances. Here we show high-performance non-planar ambipolar organic transistors with electrical control of the polarity and orders of magnitude higher performances with respect to state-of-art split-gate ambipolar transistors. Electrically reconfigurable complementary logic gates based on ambipolar organic transistors are experimentally demonstrated, thus opening up new opportunities for ambipolar organic complementary electronics.
Ultra-high gain diffusion-driven organic transistor
Torricelli, Fabrizio; Colalongo, Luigi; Raiteri, Daniele; Kovács-Vajna, Zsolt Miklós; Cantatore, Eugenio
2016-01-01
Emerging large-area technologies based on organic transistors are enabling the fabrication of low-cost flexible circuits, smart sensors and biomedical devices. High-gain transistors are essential for the development of large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show a new organic field-effect transistor architecture with a gain larger than 700. This is the highest gain ever reported for organic field-effect transistors. In the proposed organic field-effect transistor, the charge injection and extraction at the metal–semiconductor contacts are driven by the charge diffusion. The ideal conditions of ohmic contacts with negligible contact resistance and flat current saturation are demonstrated. The approach is general and can be extended to any thin-film technology opening unprecedented opportunities for the development of high-performance flexible electronics. PMID:26829567
High-Performance Vertical Organic Electrochemical Transistors.
Donahue, Mary J; Williamson, Adam; Strakosas, Xenofon; Friedlein, Jacob T; McLeod, Robert R; Gleskova, Helena; Malliaras, George G
2018-02-01
Organic electrochemical transistors (OECTs) are promising transducers for biointerfacing due to their high transconductance, biocompatibility, and availability in a variety of form factors. Most OECTs reported to date, however, utilize rather large channels, limiting the transistor performance and resulting in a low transistor density. This is typically a consequence of limitations associated with traditional fabrication methods and with 2D substrates. Here, the fabrication and characterization of OECTs with vertically stacked contacts, which overcome these limitations, is reported. The resulting vertical transistors exhibit a reduced footprint, increased intrinsic transconductance of up to 57 mS, and a geometry-normalized transconductance of 814 S m -1 . The fabrication process is straightforward and compatible with sensitive organic materials, and allows exceptional control over the transistor channel length. This novel 3D fabrication method is particularly suited for applications where high density is needed, such as in implantable devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Progress on advanced dc and ac induction drives for electric vehicles
Schwartz, H. J.
1982-01-01
Progress is reported in the development of complete electric vehicle propulsion systems, and the results of tests on the Road Load Simulator of two such systems representative of advanced dc and ac drive technology are presented. One is the system used in the DOE's ETV-1 integrated test vehicle which consists of a shunt wound dc traction motor under microprocessor control using a transistorized controller. The motor drives the vehicle through a fixed ratio transmission. The second system uses an ac induction motor controlled by transistorized pulse width modulated inverter which drives through a two speed automatically shifted transmission. The inverter and transmission both operate under the control of a microprocessor. The characteristics of these systems are also compared with the propulsion system technology available in vehicles being manufactured at the inception of the DOE program and with an advanced, highly integrated propulsion system upon which technology development was recently initiated.
High transconductance organic electrochemical transistors
Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.
2013-07-01
The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications.
High transconductance organic electrochemical transistors
Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.
2013-01-01
The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications. PMID:23851620
Recent progress in photoactive organic field-effect transistors.
Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok
2014-04-01
Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.
Recent progress in photoactive organic field-effect transistors
International Nuclear Information System (INIS)
Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok
2014-01-01
Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts. (review)
DEFF Research Database (Denmark)
Luo, Haoze; Li, Wuhua; Iannuzzo, Francesco
2018-01-01
This paper proposes the adoption of the inherent emitter stray inductance LeE in high-power insulated gate bipolar transistor (IGBT) modules as a new dynamic thermo-sensitive electrical parameter (d-TSEP). Furthermore, a family of 14 derived dynamic TSEP candidates has been extracted and classified...
Programmable automated transistor test system
International Nuclear Information System (INIS)
Truong, L.V.; Sundberg, G.R.
1986-01-01
The paper describes a programmable automated transistor test system (PATTS) and its utilization to evaluate bipolar transistors and Darlingtons, and such MOSFET and special types as can be accommodated with the PATTS base-drive. An application of a pulsed power technique at low duty cycles in a non-destructive test is used to examine the dynamic switching characteristic curves of power transistors. Data collection, manipulation, storage, and output are operator interactive but are guided and controlled by the system software. In addition a library of test data is established on disks, tapes, and hard copies for future reference
Universal power transistor base drive control unit
Gale, Allan R.; Gritter, David J.
1988-01-01
A saturation condition regulator system for a power transistor which achieves the regulation objectives of a Baker clamp but without dumping excess base drive current into the transistor output circuit. The base drive current of the transistor is sensed and used through an active feedback circuit to produce an error signal which modulates the base drive current through a linearly operating FET. The collector base voltage of the power transistor is independently monitored to develop a second error signal which is also used to regulate base drive current. The current-sensitive circuit operates as a limiter. In addition, a fail-safe timing circuit is disclosed which automatically resets to a turn OFF condition in the event the transistor does not turn ON within a predetermined time after the input signal transition.
Low-background transistors for application in nuclear electronics
International Nuclear Information System (INIS)
Krasnokutskij, R.N.; Kurchaninov, L.L.; Fedyakin, N.N.; Shuvalov, R.S.
1988-01-01
Investigations of silicon transistors were carried out to determine transistors with low value of base distributed resistance (R). Measurement results for R and current amplification coefficient β are presented for bipolar transistor several types. Correlations between R and β were studied. KT 399A, 2T640A and KT3117B transistors are found to be most adequate ones as a base for low-background amplifier development
Modeling And Simulation Of Highly Advanced Multilevel Inverter For Speed Control Of Induction Motor
Directory of Open Access Journals (Sweden)
Ravi Raj
2017-02-01
Full Text Available In this Paper the problem of removing Power dissipation from single phase Induction Motor with DC sources is considered by the speed control of Induction Motor with highly advanced 9-Level multi-level Inverter which having approximate zero Harmonics. As the demand of power is increasing day by day. So that we must introduced very advanced Electrical Instruments which having high efficiency and less dissipation of power. The requirement of very advanced Inverter is necessary. Here we are designing a Multi-level Inverter up to the 9-level using IGBT Insulated-gate bipolar transistor by Mat lab which having negligible total harmonic distortion THD thats why it will control the speed of single phase Induction motor which is presently widely used in our daily needs. Also several informative Simulation results verify the authority and truthiness of the proposed Model.
Planar-Processed Polymer Transistors.
Xu, Yong; Sun, Huabin; Shin, Eul-Yong; Lin, Yen-Fu; Li, Wenwu; Noh, Yong-Young
2016-10-01
Planar-processed polymer transistors are proposed where the effective charge injection and the split unipolar charge transport are all on the top surface of the polymer film, showing ideal device characteristics with unparalleled performance. This technique provides a great solution to the problem of fabrication limitations, the ambiguous operating principle, and the performance improvements in practical applications of conjugated-polymer transistors. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Basic matrix algebra and transistor circuits
Zelinger, G
1963-01-01
Basic Matrix Algebra and Transistor Circuits deals with mastering the techniques of matrix algebra for application in transistors. This book attempts to unify fundamental subjects, such as matrix algebra, four-terminal network theory, transistor equivalent circuits, and pertinent design matters. Part I of this book focuses on basic matrix algebra of four-terminal networks, with descriptions of the different systems of matrices. This part also discusses both simple and complex network configurations and their associated transmission. This discussion is followed by the alternative methods of de
Graphene-based flexible and stretchable thin film transistors.
Yan, Chao; Cho, Jeong Ho; Ahn, Jong-Hyun
2012-08-21
Graphene has been attracting wide attention owing to its superb electronic, thermal and mechanical properties. These properties allow great applications in the next generation of optoelectronics, where flexibility and stretchability are essential. In this context, the recent development of graphene growth/transfer and its applications in field-effect transistors are involved. In particular, we provide a detailed review on the state-of-the-art of graphene-based flexible and stretchable thin film transistors. We address the principles of fabricating high-speed graphene analog transistors and the key issues of producing an array of graphene-based transistors on flexible and stretchable substrates. It provides a platform for future work to focus on understanding and realizing high-performance graphene-based transistors.
International Nuclear Information System (INIS)
Sah, C.-T.; Jie Binbin
2009-01-01
This paper reports the physical realization of the Bipolar Field-Effect Transistor (BiFET) and its one-transistor basic building block circuits. Examples are given for the one and two MOS gates on thin and thick, pure and impure base, with electron and hole contacts, and the corresponding theoretical current-voltage characteristics previously computed by us, without generation-recombination-trapping-tunneling of electrons and holes. These examples include the one-MOS-gate on semi-infinite thick impure base transistor (the bulk transistor) and the impurethin-base Silicon-on-Insulator (SOI) transistor and the two-MOS-gates on thin base transistors (the FinFET and the Thin Film Transistor TFT). Figures are given with the cross-section views containing the electron and hole concentration and current density distributions and trajectories and the corresponding DC current-voltage characteristics.
Energy Technology Data Exchange (ETDEWEB)
Hu, Bo, E-mail: hubo2011@semi.ac.cn
2015-03-15
The effect of surface polar optical phonons (SOs) from the dielectric layers on electron mobility in dual-gated graphene field effect transistors (GFETs) is studied theoretically. By taking into account SO scattering of electron as a main scattering mechanism, the electron mobility is calculated by the iterative solution of Boltzmann transport equation. In treating scattering with the SO modes, the dynamic dielectric screening is included and compared to the static dielectric screening and the dielectric screening in the static limit. It is found that the dynamic dielectric screening effect plays an important role in the range of low net carrier density. More importantly, in-plane acoustic phonon scattering and charged impurity scattering are also included in the total mobility for SiO{sub 2}-supported GFETs with various high-κ top-gate dielectric layers considered. The calculated total mobility results suggest both Al{sub 2}O{sub 3} and AlN are the promising candidate dielectric layers for the enhancement in room temperature mobility of graphene in the future.
Highly Crumpled All-Carbon Transistors for Brain Activity Recording.
Yang, Long; Zhao, Yan; Xu, Wenjing; Shi, Enzheng; Wei, Wenjing; Li, Xinming; Cao, Anyuan; Cao, Yanping; Fang, Ying
2017-01-11
Neural probes based on graphene field-effect transistors have been demonstrated. Yet, the minimum detectable signal of graphene transistor-based probes is inversely proportional to the square root of the active graphene area. This fundamentally limits the scaling of graphene transistor-based neural probes for improved spatial resolution in brain activity recording. Here, we address this challenge using highly crumpled all-carbon transistors formed by compressing down to 16% of its initial area. All-carbon transistors, chemically synthesized by seamless integration of graphene channels and hybrid graphene/carbon nanotube electrodes, maintained structural integrity and stable electronic properties under large mechanical deformation, whereas stress-induced cracking and junction failure occurred in conventional graphene/metal transistors. Flexible, highly crumpled all-carbon transistors were further verified for in vivo recording of brain activity in rats. These results highlight the importance of advanced material and device design concepts to make improvements in neuroelectronics.
Design and Construction of Power System for Induction Heating (IH) Cooker Using Resonant Converter
International Nuclear Information System (INIS)
Soe Thiri Thandar; Clement Saldanah; Win Khaing Moe
2008-06-01
Induction Heating (IH) systems using electromagnetic induction are developed in many industrial applications in Myanmar. Many industries have benefited from this new breakthrough by implementing induction heating for melting, hardening, and heating. Induction heating cooker is based on high frequency induction heating,electrical and electronic technologies. From the electronic point of view, induction heating cooker is composed of four parts.They are rectifier, filter, high frequency inverter, and resonant load. The purpose of this research is mainly objected to developed an induction heating cooker. The rectifier module is considered as full-bridge rectifier. The second protion of the system is a capacitive filter. The ripple components are minimized by this filter. The third is a high frequency converter to convert the constant DC to high frequency AC by switching the devices alternately. In this research, the Insulated Gate Bipolar Transistor (IGBT) will be used as a power source, and can be driven by the pulse signals from the pulse transformer circuit. In the resonant load, the power consumption is about 500W. Construction and testing has been carried out. The merits of this research work is that IH cooker can be developed because of having less energy consumption, safe, efficient, quick heating, and having efficiency of 90% or more
High Accuracy Transistor Compact Model Calibrations
Energy Technology Data Exchange (ETDEWEB)
Hembree, Charles E. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States); Mar, Alan [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States); Robertson, Perry J. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)
2015-09-01
Typically, transistors are modeled by the application of calibrated nominal and range models. These models consists of differing parameter values that describe the location and the upper and lower limits of a distribution of some transistor characteristic such as current capacity. Correspond- ingly, when using this approach, high degrees of accuracy of the transistor models are not expected since the set of models is a surrogate for a statistical description of the devices. The use of these types of models describes expected performances considering the extremes of process or transistor deviations. In contrast, circuits that have very stringent accuracy requirements require modeling techniques with higher accuracy. Since these accurate models have low error in transistor descriptions, these models can be used to describe part to part variations as well as an accurate description of a single circuit instance. Thus, models that meet these stipulations also enable the calculation of quantifi- cation of margins with respect to a functional threshold and uncertainties in these margins. Given this need, new model high accuracy calibration techniques for bipolar junction transis- tors have been developed and are described in this report.
Ultrasmall transistor-based light sources
DEFF Research Database (Denmark)
With Jensen, Per Baunegaard; Tavares, Luciana; Kjelstrup-Hansen, Jakob
Dette projekt fokuserer på at udvikle transistor baserede nanofiber lyskilder med det overordnede mål at udvikle effektive og nano skalerede flerfarvede lyskilder integreret on-chip.......Dette projekt fokuserer på at udvikle transistor baserede nanofiber lyskilder med det overordnede mål at udvikle effektive og nano skalerede flerfarvede lyskilder integreret on-chip....
International Nuclear Information System (INIS)
Therani, A.H.; Decoster, D.; Vilcot, J.P.; Razeghi, M.
1988-01-01
We present a monolithic integrated circuit associating a Schottky photodiode and a field-effect transistor which has been fabricated, for the first time, on Ga/sub 0.49/In/sub 0.51/P/Ga/sub 0.47/In/sub 0.53/As strained heteroepitaxial material. Static, dynamic, and noise properties of the Schottky photodiode, the field-effect transistor, and the integrated circuit have been investigated and are reported. As an example, dynamic responsivity up to 50 A/W can be achieved at 1.3-μm wavelength for the integrated photoreceiver. The performance of the device is discussed, taking into account the integrated circuit design and the main characteristics of the material
Molecular materials for organic field-effect transistors
International Nuclear Information System (INIS)
Mori, T
2008-01-01
Organic field-effect transistors are important applications of thin films of molecular materials. A variety of materials have been explored for improving the performance of organic transistors. The materials are conventionally classified as p-channel and n-channel, but not only the performance but also even the carrier polarity is greatly dependent on the combinations of organic semiconductors and electrode materials. In this review, particular emphasis is laid on multi-sulfur compounds such as tetrathiafulvalenes and metal dithiolates. These compounds are components of highly conducting materials such as organic superconductors, but are also used in organic transistors. The charge-transfer complexes are used in organic transistors as active layers as well as electrodes. (topical review)
Multiple-channel detection of cellular activities by ion-sensitive transistors
Machida, Satoru; Shimada, Hideto; Motoyama, Yumi
2018-04-01
An ion-sensitive field-effect transistor to record cellular activities was demonstrated. This field-effect transistor (bio transistor) includes cultured cells on the gate insulator instead of gate electrode. The bio transistor converts a change in potential underneath the cells into variation of the drain current when ion channels open. The bio transistor has high detection sensitivity to even minute variations in potential utilizing a subthreshold swing region. To open ion channels, a reagent solution (acetylcholine) was added to a human-originating cell cultured on the bio transistor. The drain current was successfully decreased with the addition of acetylcholine. Moreover, we attempted to detect the opening of ion channels using a multiple-channel measurement circuit containing several bio transistors. As a consequence, the drain current distinctly decreased only after the addition of acetylcholine. We confirmed that this measurement system including bio transistors enables to observation of cellular activities sensitively and simultaneously.
Identification of Malicious Web Pages by Inductive Learning
Liu, Peishun; Wang, Xuefang
Malicious web pages are an increasing threat to current computer systems in recent years. Traditional anti-virus techniques focus typically on detection of the static signatures of Malware and are ineffective against these new threats because they cannot deal with zero-day attacks. In this paper, a novel classification method for detecting malicious web pages is presented. This method is generalization and specialization of attack pattern based on inductive learning, which can be used for updating and expanding knowledge database. The attack pattern is established from an example and generalized by inductive learning, which can be used to detect unknown attacks whose behavior is similar to the example.
Li, Fan; Song, Cheng; Cui, Bin; Peng, Jingjing; Gu, Youdi; Wang, Guangyue; Pan, Feng
2017-01-01
Spin-polarized field-effect transistor (spin-FET), where a dielectric layer is generally employed for the electrical gating as the traditional FET, stands out as a seminal spintronic device under the miniaturization trend of electronics. It would be fundamentally transformative if optical gating was used for spin-FET. We report a new type of spin-polarized field-effect transistor (spin-FET) with optical gating, which is fabricated by partial exposure of the (La,Sr)MnO3 channel to light-emitti...
Organic Thin-Film Transistor (OTFT-Based Sensors
Directory of Open Access Journals (Sweden)
Daniel Elkington
2014-04-01
Full Text Available Organic thin film transistors have been a popular research topic in recent decades and have found applications from flexible displays to disposable sensors. In this review, we present an overview of some notable articles reporting sensing applications for organic transistors with a focus on the most recent publications. In particular, we concentrate on three main types of organic transistor-based sensors: biosensors, pressure sensors and “e-nose”/vapour sensors.
Doped organic transistors operating in the inversion and depletion regime
Lüssem, Björn; Tietze, Max L.; Kleemann, Hans; Hoßbach, Christoph; Bartha, Johann W.; Zakhidov, Alexander; Leo, Karl
2013-01-01
The inversion field-effect transistor is the basic device of modern microelectronics and is nowadays used more than a billion times on every state-of-the-art computer chip. In the future, this rigid technology will be complemented by flexible electronics produced at extremely low cost. Organic field-effect transistors have the potential to be the basic device for flexible electronics, but still need much improvement. In particular, despite more than 20 years of research, organic inversion mode transistors have not been reported so far. Here we discuss the first realization of organic inversion transistors and the optimization of organic depletion transistors by our organic doping technology. We show that the transistor parameters—in particular, the threshold voltage and the ON/OFF ratio—can be controlled by the doping concentration and the thickness of the transistor channel. Injection of minority carriers into the doped transistor channel is achieved by doped contacts, which allows forming an inversion layer. PMID:24225722
Mizutani, Tomoko; Takeuchi, Kiyoshi; Saraya, Takuya; Kobayashi, Masaharu; Hiramoto, Toshiro
2018-04-01
We propose a new version of the post fabrication static random access memory (SRAM) self-improvement technique, which utilizes multiple stress application. It is demonstrated that, using a device matrix array (DMA) test element group (TEG) with intrinsic channel fully depleted (FD) silicon-on-thin-buried-oxide (SOTB) six-transistor (6T) SRAM cells fabricated by the 65 nm technology, the lowering of data retention voltage (DRV) is more effectively achieved than using the previously proposed single stress technique.
Improved transistorized AC motor controller for battery powered urban electric passenger vehicles
Peak, S. C.
1982-01-01
An ac motor controller for an induction motor electric vehicle drive system was designed, fabricated, tested, evaluated, and cost analyzed. A vehicle performance analysis was done to establish the vehicle tractive effort-speed requirements. These requirements were then converted into a set of ac motor and ac controller requirements. The power inverter is a three-phase bridge using power Darlington transistors. The induction motor was optimized for use with an inverter power source. The drive system has a constant torque output to base motor speed and a constant horsepower output to maximum speed. A gear shifting transmission is not required. The ac controller was scaled from the base 20 hp (41 hp peak) at 108 volts dec to an expanded horsepower and battery voltage range. Motor reversal was accomplished by electronic reversal of the inverter phase sequence. The ac controller can also be used as a boost chopper battery charger. The drive system was tested on a dynamometer and results are presented. The current-controlled pulse width modulation control scheme yielded improved motor current waveforms. The ac controller favors a higher system voltage.
Directory of Open Access Journals (Sweden)
Juan J. Soto-Bernal
2015-01-01
Full Text Available This paper presents the results of an experimental study carried out to comprehend the physical, mechanical, and microstructural behavior of cement pastes subjected to static magnetic fields while hydrating and setting. The experimental methodology consisted in exposing fresh cement pastes to static magnetic fields at three different magnetic induction strengths: 19.07, 22.22, and 25.37 Gauss. The microstructural characterization makes evident that there are differences in relation to amount and morphology of CSH gel; the amount of CSH is larger and its morphology becomes denser and less porous with higher magnetostatic induction strengths; it also shows the evidence of changes in the mineralogical composition of the hydrated cement pastes. The temperature increasing has no negative effects over the cement paste compressive strength since the magnetostatic field affects the process of hydration through a molecular restructuring process, which makes cement pastes improve microstructurally, with a reduced porosity and a higher mechanical strength.
Implementation of Self-Bias Transistor on Voting Logic
International Nuclear Information System (INIS)
Harzawardi Hasim; Syirrazie Che Soh
2014-01-01
Study in the eld of digital integrated circuit (IC) already become common to the modern industrial. Day by day we have been introduced with new gadget that was developed based on transistor. This paper will study the implementation of self-bias transistor on voting logic. The self-bias transistor will connected both on pull-up network and pull-down network. On previous research, study on comparison of total number of transistors, time propagation delay, and frequency between NAND and NOR gate of voting logic. It's show, with the same number of transistor, NAND gate achieve high frequency and low time propagation delay compare to NOR gate. We extend this analysis by comparing the total number of transistor, time propagation delay, frequency and power dissipation between common NAND gate with self-bias NAND gate. Extensive LTSpice simulations were performed using IBM 90 nm CMOS(Complementary Metal Oxide Semiconductor) process technology. The result show self-bias voting NAND gate consumes 54 % less power dissipation, 43% slow frequency and 43 % high time propagation delay compare to common voting NAND gate. (author)
CMOS-based carbon nanotube pass-transistor logic integrated circuits
Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao
2012-01-01
Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080
Efficient simulation of power MOS transistors
Ugryumova, M.; Schilders, W.H.A.
2011-01-01
In this report we present a few industrial problems related to modeling of MOS transistors. We suggest an efficient algorithm for computing output current at the top ports of power MOS transistors for given voltage excitations. The suggested algorithm exploits the connection between the resistor and
Thermal transistor utilizing gas-liquid transition
Komatsu, Teruhisa S.
2011-01-25
We propose a simple thermal transistor, a device to control heat current. In order to effectively change the current, we utilize the gas-liquid transition of the heat-conducting medium (fluid) because the gas region can act as a good thermal insulator. The three terminals of the transistor are located at both ends and the center of the system, and are put into contact with distinct heat baths. The key idea is a special arrangement of the three terminals. The temperature at one end (the gate temperature) is used as an input signal to control the heat current between the center (source, hot) and another end (drain, cold). Simulating the nanoscale systems of this transistor, control of heat current is demonstrated. The heat current is effectively cut off when the gate temperature is cold and it flows normally when it is hot. By using an extended version of this transistor, we also simulate a primitive application for an inverter. © 2011 American Physical Society.
Water-gel for gating graphene transistors.
Kim, Beom Joon; Um, Soong Ho; Song, Woo Chul; Kim, Yong Ho; Kang, Moon Sung; Cho, Jeong Ho
2014-05-14
Water, the primary electrolyte in biology, attracts significant interest as an electrolyte-type dielectric material for transistors compatible with biological systems. Unfortunately, the fluidic nature and low ionic conductivity of water prevents its practical usage in such applications. Here, we describe the development of a solid state, megahertz-operating, water-based gate dielectric system for operating graphene transistors. The new electrolyte systems were prepared by dissolving metal-substituted DNA polyelectrolytes into water. The addition of these biocompatible polyelectrolytes induced hydrogelation to provide solid-state integrity to the system. They also enhanced the ionic conductivities of the electrolytes, which in turn led to the quick formation of an electric double layer at the graphene/electrolyte interface that is beneficial for modulating currents in graphene transistors at high frequencies. At the optimized conditions, the Na-DNA water-gel-gated flexible transistors and inverters were operated at frequencies above 1 MHz and 100 kHz, respectively.
Singh, Kunwar; Tiwari, Satish Chandra; Gupta, Maneesha
2014-01-01
The paper introduces novel architectures for implementation of fully static master-slave flip-flops for low power, high performance, and high density. Based on the proposed structure, traditional C(2)MOS latch (tristate inverter/clocked inverter) based flip-flop is implemented with fewer transistors. The modified C(2)MOS based flip-flop designs mC(2)MOSff1 and mC(2)MOSff2 are realized using only sixteen transistors each while the number of clocked transistors is also reduced in case of mC(2)MOSff1. Postlayout simulations indicate that mC(2)MOSff1 flip-flop shows 12.4% improvement in PDAP (power-delay-area product) when compared with transmission gate flip-flop (TGFF) at 16X capacitive load which is considered to be the best design alternative among the conventional master-slave flip-flops. To validate the correct behaviour of the proposed design, an eight bit asynchronous counter is designed to layout level. LVS and parasitic extraction were carried out on Calibre, whereas layouts were implemented using IC station (Mentor Graphics). HSPICE simulations were used to characterize the transient response of the flip-flop designs in a 180 nm/1.8 V CMOS technology. Simulations were also performed at 130 nm, 90 nm, and 65 nm to reveal the scalability of both the designs at modern process nodes.
International Nuclear Information System (INIS)
Xiao Yao; Guo Hong-Xia; Zhang Feng-Qi; Zhao Wen; Wang Yan-Ping; Zhang Ke-Ying; Ding Li-Li; Luo Yin-Hong; Wang Yuan-Ming; Fan Xue
2014-01-01
Synergistic effects of the total ionizing dose (TID) on the single event upset (SEU) sensitivity in static random access memories (SRAMs) were studied by using protons. The total dose was cumulated with high flux protons during the TID exposure, and the SEU cross section was tested with low flux protons at several cumulated dose steps. Because of the radiation-induced off-state leakage current increase of the CMOS transistors, the noise margin became asymmetric and the memory imprint effect was observed. (interdisciplinary physics and related areas of science and technology)
Energy Technology Data Exchange (ETDEWEB)
Farenc, D.
1997-12-16
Technologies for Smart Power Integrated Circuits combine into a single chip Bipolar and CMOS transistors, plus power with lateral or vertical DMOS transistors. Complexity which has been increasing dramatically since the mid-80`s has allowed to integrate, into a single monolithic solution, entire systems. This thesis deals with the modelling, conception and test of the power integrated LDMOS transistor. The power LDMOS transistor is used as a switching device. It is characterized by two parameters which are the Specific On-resistance R{sub sp} and the breakdown voltage BV{sub DSS}. The LDMOS transistor developed for the new Smart Power technology exhibits a Specific On-resistance of 200 m{Omega}{sup *}mm{sup 2} and a breakdown voltage of 60 V. This device is dedicated to automotive applications. A reduction of the power device which is achieved with a low Specific On-resistance puts forward new issues such as the maximum Energy capability. When the power device is switched-off on an inductive load, a certain amount of energy is dissipated; if it is beyond a certain limit, the device is destroyed. Our goal is to determine the energy limits which are associated with our new Power integrated LDMOS transistor. (author) 28 refs.
Transistor reset preamplifier for high-rate high-resolution spectroscopy
International Nuclear Information System (INIS)
Landis, D.A.; Cork, C.P.; Madden, N.W.; Goulding, F.S.
1981-10-01
Pulsed transistor reset of high resolution charge sensitive preamplifiers used in cooled semiconductor spectrometers can sometimes have an advantage over pulsed light reset systems. Several versions of transistor reset spectrometers using both silicon and germanium detectors have been built. This paper discusses the advantages of the transistor reset system and illustrates several configurations of the packages used for the FET and reset transistor. It also describes the preamplifer circuit and shows the performance of the spectrometer at high rates
Protonic transistors from thin reflecting films
Energy Technology Data Exchange (ETDEWEB)
Ordinario, David D.; Phan, Long; Jocson, Jonah-Micah [Department of Chemical Engineering and Materials Science, University of California, Irvine, California 92697 (United States); Nguyen, Tam [Department of Chemistry, University of California, Irvine, California 92697 (United States); Gorodetsky, Alon A., E-mail: alon.gorodetsky@uci.edu [Department of Chemical Engineering and Materials Science, University of California, Irvine, California 92697 (United States); Department of Chemistry, University of California, Irvine, California 92697 (United States)
2015-01-01
Ionic transistors from organic and biological materials hold great promise for bioelectronics applications. Thus, much research effort has focused on optimizing the performance of these devices. Herein, we experimentally validate a straightforward strategy for enhancing the high to low current ratios of protein-based protonic transistors. Upon reducing the thickness of the transistors’ active layers, we increase their high to low current ratios 2-fold while leaving the other figures of merit unchanged. The measured ratio of 3.3 is comparable to the best values found for analogous devices. These findings underscore the importance of the active layer geometry for optimum protonic transistor functionality.
High mobility and quantum well transistors design and TCAD simulation
Hellings, Geert
2013-01-01
For many decades, the semiconductor industry has miniaturized transistors, delivering increased computing power to consumers at decreased cost. However, mere transistor downsizing does no longer provide the same improvements. One interesting option to further improve transistor characteristics is to use high mobility materials such as germanium and III-V materials. However, transistors have to be redesigned in order to fully benefit from these alternative materials. High Mobility and Quantum Well Transistors: Design and TCAD Simulation investigates planar bulk Germanium pFET technology in chapters 2-4, focusing on both the fabrication of such a technology and on the process and electrical TCAD simulation. Furthermore, this book shows that Quantum Well based transistors can leverage the benefits of these alternative materials, since they confine the charge carriers to the high-mobility material using a heterostructure. The design and fabrication of one particular transistor structure - the SiGe Implant-Free Qu...
Ultrashort Channel Length Black Phosphorus Field-Effect Transistors.
Miao, Jinshui; Zhang, Suoming; Cai, Le; Scherr, Martin; Wang, Chuan
2015-09-22
This paper reports high-performance top-gated black phosphorus (BP) field-effect transistors with channel lengths down to 20 nm fabricated using a facile angle evaporation process. By controlling the evaporation angle, the channel length of the transistors can be reproducibly controlled to be anywhere between 20 and 70 nm. The as-fabricated 20 nm top-gated BP transistors exhibit respectable on-state current (174 μA/μm) and transconductance (70 μS/μm) at a VDS of 0.1 V. Due to the use of two-dimensional BP as the channel material, the transistors exhibit relatively small short channel effects, preserving a decent on-off current ratio of 10(2) even at an extremely small channel length of 20 nm. Additionally, unlike the unencapsulated BP devices, which are known to be chemically unstable in ambient conditions, the top-gated BP transistors passivated by the Al2O3 gate dielectric layer remain stable without noticeable degradation in device performance after being stored in ambient conditions for more than 1 week. This work demonstrates the great promise of atomically thin BP for applications in ultimately scaled transistors.
Performance Enhancement of Power Transistors and Radiation effect
International Nuclear Information System (INIS)
Hassn, Th.A.A.
2012-01-01
The main objective of this scientific research is studying the characteristic of bipolar junction transistor device and its performance under radiation fields and temperature effect as a control element in many power circuits. In this work we present the results of experimental measurements and analytical simulation of gamma – radiation effects on the electrical characteristics and operation of power transistor types 2N3773, 2N3055(as complementary silicon power transistor are designed for general-purpose switching and amplifier applications), three samples of each type were irradiated by gamma radiation with doses, 1 K rad, 5 K rad, 10 K rad, 30 K rad, and 10 Mrad, the experimental data are utilized to establish an analytical relation between the total absorbed dose of gamma irradiation and corresponding to effective density of generated charge in the internal structure of transistor, the electrical parameters which can be measured to estimate the generated defects in the power transistor are current gain, collector current and collected emitter leakage current , these changes cause the circuit to case proper functioning. Collector current and transconductance of each device are calibrated as a function of irradiated dose. Also the threshold voltage and transistor gain can be affected and also calibrated as a function of dose. A silicon NPN power transistor type 2N3773 intended for general purpose applications, were used in this work. It was designed for medium current and high power circuits. Performance and characteristic were discusses under temperature and gamma radiation doses. Also the internal junction thermal system of the transistor represented in terms of a junction thermal resistance (Rjth). The thermal resistance changed by ΔRjth, due to the external intended, also due to the gamma doses intended. The final result from the model analysis reveals that the emitter-bias configuration is quite stable by resistance ratio RB/RE. Also the current
Outlook and emerging semiconducting materials for ambipolar transistors.
Bisri, Satria Zulkarnaen; Piliego, Claudia; Gao, Jia; Loi, Maria Antonietta
2014-02-26
Ambipolar or bipolar transistors are transistors in which both holes and electrons are mobile inside the conducting channel. This device allows switching among several states: the hole-dominated on-state, the off-state, and the electron-dominated on-state. In the past year, it has attracted great interest in exotic semiconductors, such as organic semiconductors, nanostructured materials, and carbon nanotubes. The ability to utilize both holes and electrons inside one device opens new possibilities for the development of more compact complementary metal-oxide semiconductor (CMOS) circuits, and new kinds of optoelectronic device, namely, ambipolar light-emitting transistors. This progress report highlights the recent progresses in the field of ambipolar transistors, both from the fundamental physics and application viewpoints. Attention is devoted to the challenges that should be faced for the realization of ambipolar transistors with different material systems, beginning with the understanding of the importance of interface modification, which heavily affects injections and trapping of both holes and electrons. The recent development of advanced gating applications, including ionic liquid gating, that open up more possibility to realize ambipolar transport in materials in which one type of charge carrier is highly dominant is highlighted. Between the possible applications of ambipolar field-effect transistors, we focus on ambipolar light-emitting transistors. We put this new device in the framework of its prospective for general lightings, embedded displays, current-driven laser, as well as for photonics-electronics interconnection. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Flexible Proton-Gated Oxide Synaptic Transistors on Si Membrane.
Zhu, Li Qiang; Wan, Chang Jin; Gao, Ping Qi; Liu, Yang Hui; Xiao, Hui; Ye, Ji Chun; Wan, Qing
2016-08-24
Ion-conducting materials have received considerable attention for their applications in fuel cells, electrochemical devices, and sensors. Here, flexible indium zinc oxide (InZnO) synaptic transistors with multiple presynaptic inputs gated by proton-conducting phosphorosilicate glass-based electrolyte films are fabricated on ultrathin Si membranes. Transient characteristics of the proton gated InZnO synaptic transistors are investigated, indicating stable proton-gating behaviors. Short-term synaptic plasticities are mimicked on the proposed proton-gated synaptic transistors. Furthermore, synaptic integration regulations are mimicked on the proposed synaptic transistor networks. Spiking logic modulations are realized based on the transition between superlinear and sublinear synaptic integration. The multigates coupled flexible proton-gated oxide synaptic transistors may be interesting for neuroinspired platforms with sophisticated spatiotemporal information processing.
International Nuclear Information System (INIS)
Kennedy, E.J.; Alley, G.T.; Britton, C.L. Jr.; Skubic, P.L.; Gray, B.; Wu, A.
1990-01-01
Some results of radiation effects on selected junction field-effect transistors, MOS field-effect transistors, and bipolar junction transistors are presented. The evaluations include dc parameters, as well as capacitive variations and noise evaluations. The tests are made at the low current and voltage levels (in particular, at currents ≤1 mA) that are essential for the low-power regimes required by SSC circuitry. Detailed noise data are presented both before and after 5-Mrad (gamma) total-dose exposure. SPICE radiation models for three high-frequency bipolar processes are compared for a typical charge-sensitive preamplifier
GaN transistors for efficient power conversion
Lidow, Alex; de Rooij, Michael; Reusch, David
2014-01-01
The first edition of GaN Transistors for Efficient Power Conversion was self-published by EPC in 2012, and is currently the only other book to discuss GaN transistor technology and specific applications for the technology. More than 1,200 copies of the first edition have been sold through Amazon or distributed to selected university professors, students and potential customers, and a simplified Chinese translation is also available. The second edition has expanded emphasis on applications for GaN transistors and design considerations. This textbook provides technical and application-focused i
Application of the Johnson criteria to graphene transistors
International Nuclear Information System (INIS)
Kelly, M J
2013-01-01
For 60 years, the Johnson criteria have guided the development of materials and the materials choices for field-effect and bipolar transistor technology. Intrinsic graphene is a semi-metal, precluding transistor applications, but only under lateral bias is a gap opened and transistor action possible. This first application of the Johnson criteria to biased graphene suggests that this material will struggle to ever achieve competitive commercial applications. (fast track communication)
Design method for a digitally trimmable MOS transistor structure
DEFF Research Database (Denmark)
Ning, Feng; Bruun, Erik
1996-01-01
A digitally trimmable MOS transistor is a MOS transistor consisting of a drain, a source, and a main gate as well as several subgates. The transconductance of the transistor is tunabledigitally by means of connecting subgates either to the main gate or to the source terminal. In this paper, a sys...
A nanoscale piezoelectric transformer for low-voltage transistors.
Agarwal, Sapan; Yablonovitch, Eli
2014-11-12
A novel piezoelectric voltage transformer for low-voltage transistors is proposed. Placing a piezoelectric transformer on the gate of a field-effect transistor results in the piezoelectric transformer field-effect transistor that can switch at significantly lower voltages than a conventional transistor. The piezoelectric transformer operates by using one piezoelectric to squeeze another piezoelectric to generate a higher output voltage than the input voltage. Multiple piezoelectrics can be used to squeeze a single piezoelectric layer to generate an even higher voltage amplification. Coupled electrical and mechanical modeling in COMSOL predicts a 12.5× voltage amplification for a six-layer piezoelectric transformer. This would lead to more than a 150× reduction in the power needed for communications.
International Nuclear Information System (INIS)
Shiktorov, P; Starikov, E; Gružinskis, V; Varani, L; Sabatini, G; Marinchio, H; Reggiani, L
2009-01-01
In the framework of analytical and hydrodynamic models for the description of carrier transport and noise in high electron mobility transistor/field-effect transistor channels the main features of the intrinsic noise of transistors are investigated under continuous branching of the current between channel and gate. It is shown that the current-noise and voltage-noise spectra at the transistor terminals contain an excess noise related to thermal excitation of plasma wave modes in the dielectric layer between the channel and gate. It is found that the set of modes of excited plasma waves can be governed by the external embedding circuits, thus violating a universal description of noise in terms of Norton and Thevenin noise generators
Magnetic Vortex Based Transistor Operations
Kumar, D.; Barman, S.; Barman, A.
2014-01-01
Transistors constitute the backbone of modern day electronics. Since their advent, researchers have been seeking ways to make smaller and more efficient transistors. Here, we demonstrate a sustained amplification of magnetic vortex core gyration in coupled two and three vortices by controlling their relative core polarities. This amplification is mediated by a cascade of antivortex solitons travelling through the dynamic stray field. We further demonstrated that the amplification can be controlled by switching the polarity of the middle vortex in a three vortex sequence and the gain can be controlled by the input signal amplitude. An attempt to show fan–out operation yielded gain for one of the symmetrically placed branches which can be reversed by switching the core polarity of all the vortices in the network. The above observations promote the magnetic vortices as suitable candidates to work as stable bipolar junction transistors (BJT). PMID:24531235
Transistor challenges - A DRAM perspective
International Nuclear Information System (INIS)
Faul, Juergen W.; Henke, Dietmar
2005-01-01
Key challenges of the transistor scaling from a DRAM perspective will be reviewed. Both, array transistors as well as DRAM support devices face challenges that differ essentially from high performance logic device scaling. As a major difference, retention time and standby current requirements characterize special boundary conditions in the DRAM device design. Array device scaling is determined by a chip size driven aggressive node scaling. To continue scaling, major innovations need to be introduced into state-of-the-art planar array transistors. Alternatively, non planar device concepts will have to be evaluated. Support device design for DRAMs is driven by today's market demand for increased chip performances at little to no extra cost. Major innovations are required to continue that path. Besides this strive for performance increase, special limitations for 'on pitch' circuits at the array edge will come up due to the aggressive cell size scaling
Observing the Forces Involved in Static Friction under Static Situations
Kaplan, Daniel
2013-01-01
Static friction is an important concept in introductory physics. Later in the year students apply their understanding of static friction under more complex conditions of static equilibrium. Traditional lab demonstrations in this case involve exceeding of the maximum level of static friction, resulting in the "onset of motion." (Contains…
Liquid crystals for organic transistors (Conference Presentation)
Hanna, Jun-ichi; Iino, Hiroaki
2016-09-01
Liquid crystals are a new type of organic semiconductors exhibiting molecular orientation in self-organizing manner, and have high potential for device applications. In fact, various device applications have been proposed so far, including photosensors, solar cells, light emitting diodes, field effect transistors, and so on.. However, device performance in those fabricated with liquid crystals is less than those of devices fabricated with conventional materials in spite of unique features of liquid crystals. Here we discuss how we can utilize the liquid crystallinity in organic transistors and how we can overcome conventional non-liquid crystalline organic transistor materials. Then, we demonstrate high performance organic transistors fabricated with a smectic E liquid crystal of Ph-BTBT-10, which show high mobility of over 10cm2/Vs and high thermal durability of over 200oC in OFETs fabricated with its spin-coated polycrystalline thin films.
Backwards-induction outcome in a quantum game
International Nuclear Information System (INIS)
Iqbal, A.; Toor, A.H.
2002-01-01
In economics, duopoly is a market dominated by two firms large enough to influence the market price. Stackelberg presented a dynamic form of duopoly that is also called the 'leader-follower' model. We give a quantum perspective on the Stackelberg duopoly that gives a backwards-induction outcome same as the Nash equilibrium in the static form of duopoly also known as the Cournot's duopoly. We find the two-qubit quantum pure states required for this purpose
Transistor Small Signal Analysis under Radiation Effects
International Nuclear Information System (INIS)
Sharshar, K.A.A.
2004-01-01
A Small signal transistor parameters dedicate the operation of bipolar transistor before and after exposed to gamma radiation (1 Mrad up to 5 Mrads) and electron beam(1 MeV, 25 mA) with the same doses as a radiation sources, the electrical parameters of the device are changed. The circuit Model has been discussed.Parameters, such as internal emitter resistance (re), internal base resistance, internal collector resistance (re), emitter base photocurrent (Ippe) and base collector photocurrent (Ippe). These parameters affect on the operation of the device in its applications, which work as an effective element, such as current gain (hFE≡β)degradation it's and effective parameter in the device operation. Also the leakage currents (IcBO) and (IEBO) are most important parameters, Which increased with radiation doses. Theoretical representation of the change in the equivalent circuit for NPN and PNP bipolar transistor were discussed, the input and output parameters of the two types were discussed due to the change in small signal input resistance of the two types. The emitter resistance(re) were changed by the effect of gamma and electron beam irradiation, which makes a change in the role of matching impedances between transistor stages. Also the transistor stability factors S(Ico), S(VBE) and S(β are detected to indicate the transistor operations after exposed to radiation fields. In low doses the gain stability is modified due to recombination of induced charge generated during device fabrication. Also the load resistance values are connected to compensate the effect
Large magnetocurrents in double-barrier tunneling transistors
International Nuclear Information System (INIS)
Lee, J.H.; Jun, K.-I.; Shin, K.-H.; Park, S.Y.; Hong, J.K.; Rhie, K.; Lee, B.C.
2005-01-01
Magnetic tunneling transistors (MTT) with double tunneling barriers are fabricated. The structure of the transistor is AFM/FM/I/FM/I/FM/AFM, and ferromagnetic layers serve as the emitter, base and collector. This double-barrier tunneling transistor (DBTT) has an advantage of controlling the potential between the base and collector, compared to the Schottky-barrier-based base and collector of MTT. We found that the collector current density of DBTT is at least 10 3 times larger than that of conventional MTT, since tunneling through AlO x barrier provides much larger current density than that through Schottky barrier
Ambipolar organic tri-gate transistor for low-power complementary electronics
Torricelli, F.; Ghittorelli, M.; Smits, E.C.P.; Roelofs, C.; Janssen, R.A.J.; Gelinck, G.H.; Kovács-Vajna, Z.M.; Cantatore, E.
2016-01-01
Ambipolar transistors typically suffer from large off-current inherently due to ambipolar conduction. Using a tri-gate transistor it is shown that it is possible to electrostatically switch ambipolar polymer transistors from ambipolar to unipolar mode. In unipolar mode, symmetric characteristics
Stretchable transistors with buckled carbon nanotube films as conducting channels
Arnold, Michael S; Xu, Feng
2015-03-24
Thin-film transistors comprising buckled films comprising carbon nanotubes as the conductive channel are provided. Also provided are methods of fabricating the transistors. The transistors, which are highly stretchable and bendable, exhibit stable performance even when operated under high tensile strains.
Metal nanoparticle film-based room temperature Coulomb transistor.
Willing, Svenja; Lehmann, Hauke; Volkmann, Mirjam; Klinke, Christian
2017-07-01
Single-electron transistors would represent an approach to developing less power-consuming microelectronic devices if room temperature operation and industry-compatible fabrication were possible. We present a concept based on stripes of small, self-assembled, colloidal, metal nanoparticles on a back-gate device architecture, which leads to well-defined and well-controllable transistor characteristics. This Coulomb transistor has three main advantages. By using the scalable Langmuir-Blodgett method, we combine high-quality chemically synthesized metal nanoparticles with standard lithography techniques. The resulting transistors show on/off ratios above 90%, reliable and sinusoidal Coulomb oscillations, and room temperature operation. Furthermore, this concept allows for versatile tuning of the device properties such as Coulomb energy gap and threshold voltage, as well as period, position, and strength of the oscillations.
Low-frequency noise in single electron tunneling transistor
DEFF Research Database (Denmark)
Tavkhelidze, A.N.; Mygind, Jesper
1998-01-01
The noise in current biased aluminium single electron tunneling (SET) transistors has been investigated in the frequency range of 5 mHz ..., we find the same input charge noise, typically QN = 5 × 10–4 e/Hz1/2 at 10 Hz, with and without the HF shielding. At lower frequencies, the noise is due to charge trapping, and the voltage noise pattern superimposed on the V(Vg) curve (voltage across transistor versus gate voltage) strongly depends...... when ramping the junction voltage. Dynamic trapping may limit the high frequency applications of the SET transistor. Also reported on are the effects of rf irradiation and the dependence of the SET transistor noise on bias voltage. ©1998 American Institute of Physics....
Induction Accelerator Efficiency at 5 Hz
International Nuclear Information System (INIS)
Molvik, A.W.; Faltens, A.
2000-01-01
We simulate fusion power plant driver efficiency by pulsing small induction cores at 5 Hz (a typical projected power plant repetition rate), with a resistive load in the secondary winding that is scaled to simulate the beam loading for induction acceleration. Starting from a power plant driver design that is based on other constraints, we obtain the core mass and acceleration efficiency for several energy ranges of the driver accelerator and for three magnetic alloys. The resistor in the secondary is chosen to give the same acceleration efficiency, the ratio of beam energy gain to energy input to the core module (core plus acceleration gap), as was computed for the driver. The pulser consists of a capacitor switched by FETs, Field Effect Transistors, which are gated on for the desired pulse duration. The energy to the resistor is evaluated during the portion of the pulse that is adequately flat. We present data over a range of 0.6 to 5 μs pulse lengths. With 1 μs pulses, the acceleration efficiency at 5 Hz is measured to be 75%, 52%, and 32% for thin-tape-wound cores of nanocrystalline, amorphous, and 3% silicon steel materials respectively, including only core losses. The efficiency increases for shorter pulse durations
Radiation effect of doping and bias conditions on NPN bipolar junction transistors
International Nuclear Information System (INIS)
Xi Shanbin; Wang Yiyuan; Xu Fayue; Zhou Dong; Li Ming; Wang Fei; Wang Zhikuan; Yang Yonghui; Lu Wu
2011-01-01
In this paper,we investigate 60 Co γ-ray irradiation effects and annealing behaviors of NPN bipolar junction transistors of the same manufacturing technology but different doping concentrations. The transistors of different doping concentrations differ in responses of the radiation effect. More degradation was observed with the transistors of low concentration-doped NPN transistors than the high concentration-doped NPN transistors. The results also demonstrate that reverse-biased transistors are more sensitive to radiation than the forward-biased ones. Mechanisms of the radiation responses are analyzed. (authors)
Uniformity of fully gravure printed organic field-effect transistors
International Nuclear Information System (INIS)
Hambsch, M.; Reuter, K.; Stanel, M.; Schmidt, G.; Kempa, H.; Fuegmann, U.; Hahn, U.; Huebler, A.C.
2010-01-01
Fully mass-printed organic field-effect transistors were made completely by means of gravure printing. Therefore a special printing layout was developed in order to avoid register problems in print direction. Upon using this layout, contact pads for source-drain electrodes of the transistors are printed together with the gate electrodes in one and the same printing run. More than 50,000 transistors have been produced and by random tests a yield of approximately 75% has been determined. The principle suitability of the gravure printed transistors for integrated circuits has been shown by the realization of ring oscillators.
Theory and application of dual-transistor charge separation analysis
International Nuclear Information System (INIS)
Fleetwood, D.M.; Schwank, J.R.; Winokur, P.S.; Sexton, F.W.; Shaneyfelt, M.R.
1989-01-01
The authors describe a dual-transistor charge separation method to evaluate the radiation response of MOS transistors. This method requires that n- and p-channel transistors with identically processed oxides be irradiated under identical conditions at the same oxide electric fields. Combining features of single-transistor midgap and mobility methods, the authors show how one may determine threshold voltage shifts due to oxide-trapped and interface-trapped charge from standard threshold voltage and mobility measurements. These measurements can be made at currents 2-5 orders of magnitude higher than those required for midgap, subthreshold slope, and charge-pumping methods. The dual-transistor method contains no adjustable parameters, and includes an internal self-consistency check. The accuracy of the method is verified by comparison to midgap, subthreshold slope, and charge-pumping methods for several MOS processes and technologies
Organic electrochemical transistors
Rivnay, Jonathan; Inal, Sahika; Salleo, Alberto; Owens, Ró isí n M.; Berggren, Magnus; Malliaras, George G.
2018-01-01
Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume
Self-Consistent Study of Conjugated Aromatic Molecular Transistors
International Nuclear Information System (INIS)
Jing, Wang; Yun-Ye, Liang; Hao, Chen; Peng, Wang; Note, R.; Mizuseki, H.; Kawazoe, Y.
2010-01-01
We study the current through conjugated aromatic molecular transistors modulated by a transverse field. The self-consistent calculation is realized with density function theory through the standard quantum chemistry software Gaussian03 and the non-equilibrium Green's function formalism. The calculated I – V curves controlled by the transverse field present the characteristics of different organic molecular transistors, the transverse field effect of which is improved by the substitutions of nitrogen atoms or fluorine atoms. On the other hand, the asymmetry of molecular configurations to the axis connecting two sulfur atoms is in favor of realizing the transverse field modulation. Suitably designed conjugated aromatic molecular transistors possess different I – V characteristics, some of them are similar to those of metal-oxide-semiconductor field-effect transistors (MOSFET). Some of the calculated molecular devices may work as elements in graphene electronics. Our results present the richness and flexibility of molecular transistors, which describe the colorful prospect of next generation devices. (condensed matter: electronic structure, electrical, magnetic, and optical properties)
The Smallest Transistor-Based Nonautonomous Chaotic Circuit
DEFF Research Database (Denmark)
Lindberg, Erik; Murali, K.; Tamasevicius, Arunas
2005-01-01
A nonautonomous chaotic circuit based on one transistor, two capacitors, and two resistors is described. The mechanism behind the chaotic performance is based on “disturbance of integration.” The forward part and the reverse part of the bipolar transistor are “fighting” about the charging...
PEBBLES Simulation of Static Friction and New Static Friction Benchmark
International Nuclear Information System (INIS)
Cogliati, Joshua J.; Ougouag, Abderrafi M.
2010-01-01
Pebble bed reactors contain large numbers of spherical fuel elements arranged randomly. Determining the motion and location of these fuel elements is required for calculating certain parameters of pebble bed reactor operation. This paper documents the PEBBLES static friction model. This model uses a three dimensional differential static friction approximation extended from the two dimensional Cundall and Strack model. The derivation of determining the rotational transformation of pebble to pebble static friction force is provided. A new implementation for a differential rotation method for pebble to container static friction force has been created. Previous published methods are insufficient for pebble bed reactor geometries. A new analytical static friction benchmark is documented that can be used to verify key static friction simulation parameters. This benchmark is based on determining the exact pebble to pebble and pebble to container static friction coefficients required to maintain a stable five sphere pyramid.
DEFF Research Database (Denmark)
Lu, Kaiyuan; Vetuschi, M.; Rasmussen, Peter Omand
2010-01-01
This paper presents a reliable method for the experimental determination of high-frequency d- and q -axis inductances for surface-mounted permanent-magnet synchronous machines (SMPMSMs). Knowledge of the high-frequency d- and q-axis inductances plays an important role in the efficient design...... of sensorless controllers using high-frequency signal injection techniques. The proposed method employs a static locked-rotor test using an ac +dc power supply. By injecting a high-frequency rotating voltage vector into the machine, the d- and q-axis inductances may simultaneously be determined with no need...
Directory of Open Access Journals (Sweden)
J. B. Kim
2012-03-01
Full Text Available We report on the operational stability of low-voltage hybrid organic-inorganic complementary inverters with a top-gate bottom source-drain geometry. The inverters are comprised of p-channel pentacene and n-channel amorphous InGaZnO thin-film transistors (TFTs with bi-layer gate dielectrics formed from an amorphous layer of a fluoropolymer (CYTOP and a high-k layer of Al2O3. The p- and n- channel TFTs show saturation mobility values of 0.1 ± 0.01 and 5.0 ± 0.5 cm2/Vs, respectively. The individual transistors show high electrical stability with less than 6% drain-to-source current variations after 1 h direct current (DC bias stress. Complementary inverters yield hysteresis-free voltage transfer characteristics for forward and reverse input biases with static DC gain values larger than 45 V/V at 8 V before and after being subjected to different conditions of electrical stress. Small and reversible variations of the switching threshold voltage of the inverters during these stress tests are compatible with the observed stability of the individual TFTs.
High mobility polymer gated organic field effect transistor using zinc ...
Indian Academy of Sciences (India)
Organic thin film transistors were fabricated using evaporated zinc phthalocyanine as the active layer. Parylene film ... At room temperature, these transistors exhibit p-type conductivity with field-effect ... Keywords. Organic semiconductor; field effect transistor; phthalocyanine; high mobility. ... The evaporation rate was kept at ...
The use of 2N3055 transistor as photosensory in solarymeter
International Nuclear Information System (INIS)
Bintoro; Sastroamidjojo, M.S.A.
1981-01-01
The characteristics of 2N3055 type transistor used for solarymeters sensor. It can be seen that transistor sensor has more response time. The response to against arrival solar intensity is linear. It can be used for solarymeter sensor after calibrated with pyranometer reference, but not so sensitive for 500 nanometer wavelength. It can be concluded that 2N3055 transistor made by Motrola than the made by R.C.A. because the 2N3055 transistor is more wide and more accurate than the R.C.A. transistor. (author tr.)
Improvements in or relating to transistor circuits
International Nuclear Information System (INIS)
Richards, R.F.; Williamson, P.W.
1978-01-01
This invention relates to transistor circuits and in particular to integrated transistor circuits formed on a substrate of semi-conductor material such as silicon. The invention is concerned with providing integrated circuits in which malfunctions caused by the effects of ionising, e.g. nuclear, radiations are reduced. (author)
Enhanced transconductance in a double-gate graphene field-effect transistor
Hwang, Byeong-Woon; Yeom, Hye-In; Kim, Daewon; Kim, Choong-Ki; Lee, Dongil; Choi, Yang-Kyu
2018-03-01
Multi-gate transistors, such as double-gate, tri-gate and gate-all-around transistors are the most advanced Si transistor structure today. Here, a genuine double-gate transistor with a graphene channel is experimentally demonstrated. The top and bottom gates of the double-gate graphene field-effect transistor (DG GFET) are electrically connected so that the conductivity of the graphene channel can be modulated simultaneously by both the top and bottom gate. A single-gate graphene field-effect transistor (SG GFET) with only the top gate is also fabricated as a control device. For systematical analysis, the transfer characteristics of both GFETs were measured and compared. Whereas the maximum transconductance of the SG GFET was 17.1 μS/μm, that of the DG GFET was 25.7 μS/μm, which is approximately a 50% enhancement. The enhancement of the transconductance was reproduced and comprehensively explained by a physics-based compact model for GFETs. The investigation of the enhanced transfer characteristics of the DG GFET in this work shows the possibility of a multi-gate architecture for high-performance graphene transistor technology.
Modeling of charge transport in ion bipolar junction transistors.
Volkov, Anton V; Tybrandt, Klas; Berggren, Magnus; Zozoulenko, Igor V
2014-06-17
Spatiotemporal control of the complex chemical microenvironment is of great importance to many fields within life science. One way to facilitate such control is to construct delivery circuits, comprising arrays of dispensing outlets, for ions and charged biomolecules based on ionic transistors. This allows for addressability of ionic signals, which opens up for spatiotemporally controlled delivery in a highly complex manner. One class of ionic transistors, the ion bipolar junction transistors (IBJTs), is especially attractive for these applications because these transistors are functional at physiological conditions and have been employed to modulate the delivery of neurotransmitters to regulate signaling in neuronal cells. Further, the first integrated complementary ionic circuits were recently developed on the basis of these ionic transistors. However, a detailed understanding of the device physics of these transistors is still lacking and hampers further development of components and circuits. Here, we report on the modeling of IBJTs using Poisson's and Nernst-Planck equations and the finite element method. A two-dimensional model of the device is employed that successfully reproduces the main characteristics of the measurement data. On the basis of the detailed concentration and potential profiles provided by the model, the different modes of operation of the transistor are analyzed as well as the transitions between the different modes. The model correctly predicts the measured threshold voltage, which is explained in terms of membrane potentials. All in all, the results provide the basis for a detailed understanding of IBJT operation. This new knowledge is employed to discuss potential improvements of ion bipolar junction transistors in terms of miniaturization and device parameters.
Metal nanoparticle film–based room temperature Coulomb transistor
Willing, Svenja; Lehmann, Hauke; Volkmann, Mirjam; Klinke, Christian
2017-01-01
Single-electron transistors would represent an approach to developing less power–consuming microelectronic devices if room temperature operation and industry-compatible fabrication were possible. We present a concept based on stripes of small, self-assembled, colloidal, metal nanoparticles on a back-gate device architecture, which leads to well-defined and well-controllable transistor characteristics. This Coulomb transistor has three main advantages. By using the scalable Langmuir-Blodgett method, we combine high-quality chemically synthesized metal nanoparticles with standard lithography techniques. The resulting transistors show on/off ratios above 90%, reliable and sinusoidal Coulomb oscillations, and room temperature operation. Furthermore, this concept allows for versatile tuning of the device properties such as Coulomb energy gap and threshold voltage, as well as period, position, and strength of the oscillations. PMID:28740864
Large scale electromechanical transistor with application in mass sensing
Energy Technology Data Exchange (ETDEWEB)
Jin, Leisheng; Li, Lijie, E-mail: L.Li@swansea.ac.uk [Multidisciplinary Nanotechnology Centre, College of Engineering, Swansea University, Swansea SA2 8PP (United Kingdom)
2014-12-07
Nanomechanical transistor (NMT) has evolved from the single electron transistor, a device that operates by shuttling electrons with a self-excited central conductor. The unfavoured aspects of the NMT are the complexity of the fabrication process and its signal processing unit, which could potentially be overcome by designing much larger devices. This paper reports a new design of large scale electromechanical transistor (LSEMT), still taking advantage of the principle of shuttling electrons. However, because of the large size, nonlinear electrostatic forces induced by the transistor itself are not sufficient to drive the mechanical member into vibration—an external force has to be used. In this paper, a LSEMT device is modelled, and its new application in mass sensing is postulated using two coupled mechanical cantilevers, with one of them being embedded in the transistor. The sensor is capable of detecting added mass using the eigenstate shifts method by reading the change of electrical current from the transistor, which has much higher sensitivity than conventional eigenfrequency shift approach used in classical cantilever based mass sensors. Numerical simulations are conducted to investigate the performance of the mass sensor.
Tunneling field effect transistor technology
Chan, Mansun
2016-01-01
This book provides a single-source reference to the state-of-the art in tunneling field effect transistors (TFETs). Readers will learn the TFETs physics from advanced atomistic simulations, the TFETs fabrication process and the important roles that TFETs will play in enabling integrated circuit designs for power efficiency. · Provides comprehensive reference to tunneling field effect transistors (TFETs); · Covers all aspects of TFETs, from device process to modeling and applications; · Enables design of power-efficient integrated circuits, with low power consumption TFETs.
Organic semiconductors for organic field-effect transistors
International Nuclear Information System (INIS)
Yamashita, Yoshiro
2009-01-01
The advantages of organic field-effect transistors (OFETs), such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed. (topical review)
Transistors using crystalline silicon devices on glass
McCarthy, Anthony M.
1995-01-01
A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.
Organic semiconductors for organic field-effect transistors
Directory of Open Access Journals (Sweden)
Yoshiro Yamashita
2009-01-01
Full Text Available The advantages of organic field-effect transistors (OFETs, such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.
Simulaci??n y modelado de transistores MOS de doble puerta
Cartujo Cassinello, Pedro
2000-01-01
En este trabajo se hace un estudio del transistor MOS de doble puerta analizando las posibles ventajas de esta nueva estructura frene al transistor convencional y el transistor MOS SOI de puerta simple. Para ello se ha analizado una secci??n transversal de un transistor MOS de doble puerta de canal N, con el fin de examinar detalladamente las peculiaridades de la distribuci??n de electrones con una amplia variedad de valores de todos los par??mentros tecnol??gicos y condiciones de operaci??n,...
Radiation effect on silicon transistors in mixed neutrons-gamma environment
Assaf, J.; Shweikani, R.; Ghazi, N.
2014-10-01
The effects of gamma and neutron irradiations on two different types of transistors, Junction Field Effect Transistor (JFET) and Bipolar Junction Transistor (BJT), were investigated. Irradiation was performed using a Syrian research reactor (RR) (Miniature Neutron Source Reactor (MNSR)) and a gamma source (Co-60 cell). For RR irradiation, MCNP code was used to calculate the absorbed dose received by the transistors. The experimental results showed an overall decrease in the gain factors of the transistors after irradiation, and the JFETs were more resistant to the effects of radiation than BJTs. The effect of RR irradiation was also greater than that of gamma source for the same dose, which could be because neutrons could cause more damage than gamma irradiation.
Directory of Open Access Journals (Sweden)
A. F. Zobaa
2006-09-01
Full Text Available Many of today utility interconnected wind farms use induction generator (IG to convert the captured wind mechanical power into electricity. Induction generator has some advantages over the synchronous generator (SG. The main advantages are its robustness and its capability to be synchronized directly to the grid. The main disadvantage, however, is its dependency on the grid for supplying its own reactive power ‘VAr’. Whether fixed or adjustable VAr systems are connected across its terminal, IG must operate at unity power factor at the rated loading while the wind power varies. With supervised control and appropriate coordination, VAr can be used to the benefits of both the wind farm developer and the hosting utility. The incorporation of today adjustable reactive power compensators such as the Static VAr Compensation (SVC and Static Synchronous Compensator (STATCOM with IG are vital ingredient toward a successful penetration of wind energy in today distribution grid to ensure voltage stability during the steady state and transient periods.
Diffusion pipes at PNP switching transistors
International Nuclear Information System (INIS)
Sachelarie, D.; Postolache, C.; Gaiseanu, F.
1976-01-01
The appearance of the ''diffusion pipes'' greatly affects the fabrication of the PNP high-frequency/very-fast-switching transistors. A brief review of the principal problems connected to the presence of these ''pipes'' is made. A research program is presented which permitted the fabrication of the PNP switching transistors at ICCE-Bucharest, with transition frequency fsub(T) = 1.2 GHz and storage time tsub(s) = 4.5 ns. (author)
Integrated amplifying circuit with MOS transistors
Energy Technology Data Exchange (ETDEWEB)
Baylac, B; Merckel, G; Meunier, P
1974-01-25
The invention relates to a feedback-pass-band amplifier with MOS-transistors. The differential stage of conventional amplifiers is changed into an adding state, whereas the differential amplification stages are changed into amplifier inverter stages. All MOS transistors used in that amplifier are of similar configuration and are interdigitized, whereby the operating speed dispersion is reduced. This can be applied to obtaining a measurement channel for proportional chambers.
Programmable, automated transistor test system
Truong, L. V.; Sundburg, G. R.
1986-01-01
A programmable, automated transistor test system was built to supply experimental data on new and advanced power semiconductors. The data will be used for analytical models and by engineers in designing space and aircraft electric power systems. A pulsed power technique was used at low duty cycles in a nondestructive test to examine the dynamic switching characteristic curves of power transistors in the 500 to 1000 V, 10 to 100 A range. Data collection, manipulation, storage, and output are operator interactive but are guided and controlled by the system software.
Control System for Producing Electricity with Dual Stator Winding Cage-Rotor Induction Generator
Directory of Open Access Journals (Sweden)
Lucian Nicolae Tutelea
2014-09-01
Full Text Available This paper will present the key design equations and control design model of the Dual Stator Winding Cage-Rotor Induction Generator (DSWIG to achieve wide-speed-range operation with reduced capacity of the static power controller for low power wind or hydro applications. The proposed induction generator consists of a standard squirrel-cage rotor and a stator with two separate windings wound for a similar number of poles. Moreover, the system control strategy using the stator flux orientation is consequently proposed. The aim of the paper is to emphasize that the low speed induction generators with power electronic converters represent a realistic and useful solution for direct drive power applications.
Subthreshold currents in CMOS transistors made on oxygen-implanted silicon
International Nuclear Information System (INIS)
Foster, D.J.
1983-01-01
Kinks have been observed in subthreshold current plots of mesa-shaped n-channel transistors made on oxygen-implanted silicon substrates. The kinks represent additional current flow and are due to overlapping fields from the gate electrode causing early corner inversion and to a Qsub(ss) side-wall effect. Subthreshold currents in n-channel transistors are dominated by the two effects which, as a consequence, reduce threshold voltages especially in narrow n-channel transistors. The subthreshold characteristics of p-channel transistors were not affected in the same way. (author)
International Nuclear Information System (INIS)
Rimberg, A J; Blencowe, M P; Armour, A D; Nation, P D
2014-01-01
We propose a scheme involving a Cooper pair transistor (CPT) embedded in a superconducting microwave cavity, where the CPT serves as a charge tunable quantum inductor to facilitate ultra-strong coupling between photons in the cavity and a nano- to meso-scale mechanical resonator. The mechanical resonator is capacitively coupled to the CPT, such that mechanical displacements of the resonator cause a shift in the CPT inductance and hence the cavity's resonant frequency. The amplification provided by the CPT is sufficient for the zero point motion of the mechanical resonator alone to cause a significant change in the cavity resonance. Conversely, a single photon in the cavity causes a shift in the mechanical resonator position on the order of its zero point motion. As a result, the cavity-Cooper pair transistor coupled to a mechanical resonator will be able to access a regime in which single photons can affect single phonons and vice versa. Realizing this ultra-strong coupling regime will facilitate the creation of non-classical states of the mechanical resonator, as well as the means to accurately characterize such states by measuring the cavity photon field. (paper)
Scalable fabrication of self-aligned graphene transistors and circuits on glass.
Liao, Lei; Bai, Jingwei; Cheng, Rui; Zhou, Hailong; Liu, Lixin; Liu, Yuan; Huang, Yu; Duan, Xiangfeng
2012-06-13
Graphene transistors are of considerable interest for radio frequency (rf) applications. High-frequency graphene transistors with the intrinsic cutoff frequency up to 300 GHz have been demonstrated. However, the graphene transistors reported to date only exhibit a limited extrinsic cutoff frequency up to about 10 GHz, and functional graphene circuits demonstrated so far can merely operate in the tens of megahertz regime, far from the potential the graphene transistors could offer. Here we report a scalable approach to fabricate self-aligned graphene transistors with the extrinsic cutoff frequency exceeding 50 GHz and graphene circuits that can operate in the 1-10 GHz regime. The devices are fabricated on a glass substrate through a self-aligned process by using chemical vapor deposition (CVD) grown graphene and a dielectrophoretic assembled nanowire gate array. The self-aligned process allows the achievement of unprecedented performance in CVD graphene transistors with a highest transconductance of 0.36 mS/μm. The use of an insulating substrate minimizes the parasitic capacitance and has therefore enabled graphene transistors with a record-high extrinsic cutoff frequency (> 50 GHz) achieved to date. The excellent extrinsic cutoff frequency readily allows configuring the graphene transistors into frequency doubling or mixing circuits functioning in the 1-10 GHz regime, a significant advancement over previous reports (∼20 MHz). The studies open a pathway to scalable fabrication of high-speed graphene transistors and functional circuits and represent a significant step forward to graphene based radio frequency devices.
Directory of Open Access Journals (Sweden)
Yusuf ÖNER
2005-03-01
Full Text Available The friction loss of electrical machines is an important problem as like in other rotary machines. In addition, the bearings, where the friction losses occur, also require lubrication at periodic intervals and need to be maintained. In this study, to minimize the friction loss of electrical motor, two dimentional static magnetic analysis of radial magnetic bearing systems with different structures are performed and compared with each other; also, magnetic bearing system with four-pole is realized and applied to an induction motor. In simulation, the forces applied to the rotor of induction motor from designed magnetic bearing system are calculated in a computer by using FEMM software package. In application, when comparing designed magnetic bearing system with mechanical bearings up to the revolution of 350 rpm, it was observed that the loss of no-load operating condition of induction motor is decreased about 15 % with magnetic bearing system. In addition to this, mechanical noisy of the motor is also decreased considerably.
Vertically aligned carbon nanotube field-effect transistors
Li, Jingqi
2012-10-01
Vertically aligned carbon nanotube field-effect transistors (CNTFETs) have been developed using pure semiconducting carbon nanotubes. The source and drain were vertically stacked, separated by a dielectric, and the carbon nanotubes were placed on the sidewall of the stack to bridge the source and drain. Both the effective gate dielectric and gate electrode were normal to the substrate surface. The channel length is determined by the dielectric thickness between source and drain electrodes, making it easier to fabricate sub-micrometer transistors without using time-consuming electron beam lithography. The transistor area is much smaller than the planar CNTFET due to the vertical arrangement of source and drain and the reduced channel area. © 2012 Elsevier Ltd. All rights reserved.
Transfer-free fabrication of graphene transistors
Wessely, P.J.; Wessely, F.; Birinci, E.; Schwalke, U.; Riedinger, B.
2012-01-01
The authors invented a method to fabricate graphene transistors on oxidized silicon wafers without the need to transfer graphene layers. To stimulate the growth of graphene layers on oxidized silicon, a catalyst system of nanometer thin aluminum/nickel double layer is used. This catalyst system is structured via liftoff before the wafer enters the catalytic chemical vapor deposition (CCVD) chamber. In the subsequent methane-based growth process, monolayer graphene field-effect transistors and...
Single-event burnout of epitaxial bipolar transistors
Energy Technology Data Exchange (ETDEWEB)
Kuboyama, S.; Sugimoto, K.; Shugyo, S.; Matsuda, S. [National Space Development Agency of Japan, Tsukuba, Ibaraki (Japan); Hirao, T. [Japan Atomic Energy Research Inst., Takasaki, Gunma (Japan)
1998-12-01
Single-Event Burnout (SEB) of bipolar junction transistors (BJTs) has been observed nondestructively. It was revealed that all the NPN BJTs, including small signal transistors, with thinner epitaxial layers were inherently susceptible to the SEB phenomenon. It was demonstrated that several design parameters of BJTs were responsible for SEB susceptibility. Additionally, destructive and nondestructive modes of SEB were identified.
Study of performance scaling of 22-nm epitaxial delta-doped channel MOS transistor
Sengupta, Sarmista; Pandit, Soumya
2015-06-01
Epitaxial delta-doped channel (EδDC) profile is a promising approach for extending the scalability of bulk metal oxide semiconductor (MOS) technology for low-power system-on-chip applications. A comparative study between EδDC bulk MOS transistor with gate length Lg = 22 nm and a conventional uniformly doped channel (UDC) bulk MOS transistor, with respect to various digital and analogue performances, is presented. The study has been performed using Silvaco technology computer-aided design device simulator, calibrated with experimental results. This study reveals that at smaller gate length, EδDC transistor outperforms the UDC transistor with respect to various studied performances. The reduced contribution of the lateral electric field in the channel plays the key role in this regard. Further, the carrier mobility in EδDC transistor is higher compared to UDC transistor. For moderate gate and drain bias, the impact ionisation rate of the carriers for EδDC MOS transistor is lower than that of the UDC transistor. In addition, at 22 nm, the performances of a EδDC transistor are competitive to that of an ultra-thin body silicon-on-insulator transistor.
On the 50th Anniversary of the Transistor
DEFF Research Database (Denmark)
Stassen, Flemming
1997-01-01
This paper celebrates the 50th anniversary of the invention of the bipolar transistor in 1947. Combined with the inventions of integration and planar technology, the invention of the transistor marks the beginning of a period of unprecedented growth, the industrialization of electronics....
Organic electrochemical transistors
Rivnay, Jonathan; Inal, Sahika; Salleo, Alberto; Owens, Róisín M.; Berggren, Magnus; Malliaras, George G.
2018-02-01
Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume of the channel endows OECTs with high transconductance compared with that of field-effect transistors, but also limits their response time. The synthetic tunability, facile deposition and biocompatibility of organic materials make OECTs particularly suitable for applications in biological interfacing, printed logic circuitry and neuromorphic devices. In this Review, we discuss the physics and the mechanism of operation of OECTs, focusing on their identifying characteristics. We highlight organic materials that are currently being used in OECTs and survey the history of OECT technology. In addition, form factors, fabrication technologies and applications such as bioelectronics, circuits and memory devices are examined. Finally, we take a critical look at the future of OECT research and development.
Organic electrochemical transistors
Rivnay, Jonathan
2018-01-16
Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume of the channel endows OECTs with high transconductance compared with that of field-effect transistors, but also limits their response time. The synthetic tunability, facile deposition and biocompatibility of organic materials make OECTs particularly suitable for applications in biological interfacing, printed logic circuitry and neuromorphic devices. In this Review, we discuss the physics and the mechanism of operation of OECTs, focusing on their identifying characteristics. We highlight organic materials that are currently being used in OECTs and survey the history of OECT technology. In addition, form factors, fabrication technologies and applications such as bioelectronics, circuits and memory devices are examined. Finally, we take a critical look at the future of OECT research and development.
Energy Technology Data Exchange (ETDEWEB)
Liao, Po-Yung [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang3708@gmail.com [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Taiwan (China); Hsieh, Tien-Yu [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo [Department of Photonics, National Sun Yat-Sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chou, Cheng-Hsu; Chang, Jung-Fang [Product Technology Center, Chimei Innolux Corp., Tainan 741, Taiwan (China)
2016-03-31
The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V{sub T}) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V{sub T} shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V{sub T} shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V{sub T} shift increases with decreasing frequency of the top gate pulses.
International Nuclear Information System (INIS)
Liao, Po-Yung; Chang, Ting-Chang; Hsieh, Tien-Yu; Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo; Chou, Cheng-Hsu; Chang, Jung-Fang
2016-01-01
The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V T ) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V T shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V T shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V T shift increases with decreasing frequency of the top gate pulses.
Magnetophoretic transistors in a tri-axial magnetic field.
Abedini-Nassab, Roozbeh; Joh, Daniel Y; Albarghouthi, Faris; Chilkoti, Ashutosh; Murdoch, David M; Yellen, Benjamin B
2016-10-18
The ability to direct and sort individual biological and non-biological particles into spatially addressable locations is fundamentally important to the emerging field of single cell biology. Towards this goal, we demonstrate a new class of magnetophoretic transistors, which can switch single magnetically labeled cells and magnetic beads between different paths in a microfluidic chamber. Compared with prior work on magnetophoretic transistors driven by a two-dimensional in-plane rotating field, the addition of a vertical magnetic field bias provides significant advantages in preventing the formation of particle clumps and in better replicating the operating principles of circuits in general. However, the three-dimensional driving field requires a complete redesign of the magnetic track geometry and switching electrodes. We have solved this problem by developing several types of transistor geometries which can switch particles between two different tracks by either presenting a local energy barrier or by repelling magnetic objects away from a given track, hereby denoted as "barrier" and "repulsion" transistors, respectively. For both types of transistors, we observe complete switching of magnetic objects with currents of ∼40 mA, which is consistent over a range of particle sizes (8-15 μm). The switching efficiency was also tested at various magnetic field strengths (50-90 Oe) and driving frequencies (0.1-0.6 Hz); however, we again found that the device performance only weakly depended on these parameters. These findings support the use of these novel transistor geometries to form circuit architectures in which cells can be placed in defined locations and retrieved on demand.
Simulation of a spintronic transistor: A study of its performance
International Nuclear Information System (INIS)
Pela, R.R.; Teles, L.K.
2009-01-01
We study theoretically the magnetic bipolar transistor, and compare its performance with common bipolar transistor. We present not only the simulation results for the characteristic curves, but also other relevant parameters related with its performance, such as: the current amplification factor, the open-loop gain, the hybrid parameters and the cutoff frequency. We noted that the spin-charge coupling introduces new phenomena that enrich the functionality characteristics of the magnetic bipolar transistor. Among other things, it has an adjustable band structure, which may be modified during the device operation; it exhibits the already known spin-voltaic effect. On the other hand, we observed that it is necessary a large g-factor to analyze the influence of the field B over the transistor. Nevertheless, we consider the magnetic bipolar transistor as a promising device for spintronic applications
Directory of Open Access Journals (Sweden)
RUKKUMANI V.
2016-12-01
Full Text Available Aggressive scaling of transistor dimensions with each technology generation has resulted an increased integration density and improved device performance at the expense of increased leakage current. The Supply voltage scaling is an effective way of reducing dynamic as well as leakage power consumption. However the sensitivity of the circuit parameters increases with reduction of the supply voltage. SRAM bit- cells utilizing minimum sized transistors are susceptible to various random process variations. The Schmitt Trigger based operation gives better readconstancy as well as superior write-ability compared to the standard bitcell configurations. The proposed Schmitt Trigger based bitcells integrate a built-in feedback mechanism make the process with high tolerance. In this paper an obsolete design of a differential sensing Static Random Access Memory (SRAM bit cells for ultralow-power and ultralow-area Schmitt trigger operation is introduced. The ST bit cells incorporate a built-in feedback mechanism, provided by separate control signal if the feedback is given by the internal nodes, achieving process variation tolerance that must be used for future nano-scaled technology nodes. In this we proposed 32nm technology for designing 10T SRAM cell using Microwind.Total power about 30% is reduced due to 32 nm technology as compared to 65 nm technlology.
Electrical pulse burnout of transistors in intense ionizing radiation
International Nuclear Information System (INIS)
Hartman, E.F.; Evans, D.C.
1975-01-01
Tests examining possible synergistic effects of electrical pulses and ionizing radiation on transistors were performed and energy/power thresholds for transistor burnout determined. The effect of ionizing radiation on burnout thresholds was found to be minimal, indicating that electrical pulse testing in the absence of radiation produces burnout-threshold results which are applicable to IEMP studies. The conditions of ionized transistor junctions and radiation induced current surges at semiconductor device terminals are inherent in IEMP studies of electrical circuits
Inexpensive Measuring System for the Characterization of Organic Transistors
Directory of Open Access Journals (Sweden)
Clara Pérez-Fuster
2018-01-01
Full Text Available A measuring module has been specifically designed for the electrical characterization of organic semiconductor devices such as organic field effect transistors (OFETs and organic electrochemical transistors (OECTs according to the IEEE 1620-2008 standard. This device has been tested with OFETs based on 6,13-bis(triisopropylsilylethinylpentacene (TIPS-pentacene. The measuring system has been constructed using a NI-PXIe-1073 chassis with integrated controller and two NI-PXI-4132 programmable high-precision source measure units (SMUs that offer a four-quadrant ± 100 V output, with resolution down to 10 pA. LabVIEW™ has been used to develop the appropriate program. Most of the main OFET parameters included in the IEEE 1620 standard can be measured by means of this device. Although nowadays expensive devices for the characterization of Si-based transistors are available, devices for the characterization of organic transistors are not yet widespread in the market. Fabrication of a specific and flexible module that can be used to characterize this type of transistors would provide a powerful tool to researchers.
Single-event burnout of epitaxial bipolar transistors
Energy Technology Data Exchange (ETDEWEB)
Kuboyama, Satoshi; Sugimoto, Kenji; Matsuda, Sumio [National Space Development Agency of Japan, Ysukuba, Ibaraki (Japan); Hirao, Toshio
1998-10-01
Single-event burnout (SEB) of bipolar junction transistors (BJTs) has been observed nondestructively. It was revealed that all the NPN BJTs including small signal transistors with thinner epitaxial layer were inherently susceptible to the SEB phenomenon. It was demonstrated that several design parameters of BJTs were responsible for SEB susceptibility. Additionally, destructive and nondestructive modes of SEB were identified. (author)
Total dose effects on the matching properties of deep submicron MOS transistors
International Nuclear Information System (INIS)
Wang Yuxin; Hu Rongbin; Li Ruzhang; Chen Guangbing; Fu Dongbing; Lu Wu
2014-01-01
Based on 0.18 μm MOS transistors, for the first time, the total dose effects on the matching properties of deep submicron MOS transistors are studied. The experimental results show that the total dose radiation magnifies the mismatch among identically designed MOS transistors. In our experiments, as the radiation total dose rises to 200 krad, the threshold voltage and drain current mismatch percentages of NMOS transistors increase from 0.55% and 1.4% before radiation to 17.4% and 13.5% after radiation, respectively. PMOS transistors seem to be resistant to radiation damage. For all the range of radiation total dose, the threshold voltage and drain current mismatch percentages of PMOS transistors keep under 0.5% and 2.72%, respectively. (semiconductor devices)
A Klein-tunneling transistor with ballistic graphene
Energy Technology Data Exchange (ETDEWEB)
Wilmart, Quentin; Fève, Gwendal; Berroir, Jean-Marc; Plaçais, Bernard [Laboratoire Pierre Aigrain, Ecole Normale Supérieure, CNRS (UMR 8551), Université P et M Curie, Université D Diderot, 24, rue Lhomond, 75231 Paris Cedex 05 (France); Berrada, Salim; Hung Nguyen, V; Dollfus, Philippe [Institute of Fundamental Electronics, Univ. Paris-Sud, CNRS, Orsay (France); Torrin, David [Département de Physique, Ecole Polytechnique, 91128 Palaiseau (France)
2014-06-15
Today, the availability of high mobility graphene up to room temperature makes ballistic transport in nanodevices achievable. In particular, p-n-p transistors in the ballistic regime give access to Klein tunneling physics and allow the realization of devices exploiting the optics-like behavior of Dirac Fermions (DFs) as in the Veselago lens or the Fabry–Pérot cavity. Here we propose a Klein tunneling transistor based on the geometrical optics of DFs. We consider the case of a prismatic active region delimited by a triangular gate, where total internal reflection may occur, which leads to the tunable suppression of transistor transmission. We calculate the transmission and the current by means of scattering theory and the finite bias properties using non-equilibrium Green's function (NEGF) simulation. (letter)
Top-gated chemical vapor deposition grown graphene transistors with current saturation.
Bai, Jingwei; Liao, Lei; Zhou, Hailong; Cheng, Rui; Liu, Lixin; Huang, Yu; Duan, Xiangfeng
2011-06-08
Graphene transistors are of considerable interest for radio frequency (rf) applications. In general, transistors with large transconductance and drain current saturation are desirable for rf performance, which is however nontrivial to achieve in graphene transistors. Here we report high-performance top-gated graphene transistors based on chemical vapor deposition (CVD) grown graphene with large transconductance and drain current saturation. The graphene transistors were fabricated with evaporated high dielectric constant material (HfO(2)) as the top-gate dielectrics. Length scaling studies of the transistors with channel length from 5.6 μm to 100 nm show that complete current saturation can be achieved in 5.6 μm devices and the saturation characteristics degrade as the channel length shrinks down to the 100-300 nm regime. The drain current saturation was primarily attributed to drain bias induced shift of the Dirac points. With the selective deposition of HfO(2) gate dielectrics, we have further demonstrated a simple scheme to realize a 300 nm channel length graphene transistors with self-aligned source-drain electrodes to achieve the highest transconductance of 250 μS/μm reported in CVD graphene to date.
Outlook and Emerging Semiconducting Materials for Ambipolar Transistors
Bisri, Satria Zulkarnaen; Piliego, Claudia; Gao, Jia; Loi, Maria Antonietta
Ambipolar or bipolar transistors are transistors in which both holes and electrons are mobile inside the conducting channel. This device allows switching among several states: the hole-dominated on-state, the off-state, and the electron-dominated on-state. In the past year, it has attracted great
Ambipolar charge transport in organic field-effect transistors
Smits, E.C.P.; Anthopoulos, T.D.; Setayesh, S.; Veenendaal, van E.; Coehoorn, R.; Blom, P.W.M.; Boer, de B.; Leeuw, de D.M.
2006-01-01
A model describing charge transport in disordered ambipolar organic field-effect transistors is presented. The basis of this model is the variable-range hopping in an exponential density of states developed for disordered unipolar organic transistors. We show that the model can be used to calculate
Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches
Schwarze, G. E.; Frasca, A. J.
1991-01-01
The effects of neutron and gamma rays on the electrical and switching characteristics of power semiconductor switches must be known and understood by the designer of the power conditioning, control, and transmission subsystem of space nuclear power systems. The SP-100 radiation requirements at 25 m from the nuclear source are a neutron fluence of 10(exp 13) n/sq cm and a gamma dose of 0.5 Mrads. Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN Bipolar Junction Transistors (BJTs), Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), and Static Induction Transistors (SITs) are presented. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Post-irradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed.
Very High Frequency Two-Port Characterization of Transistors
DEFF Research Database (Denmark)
Hertel, Jens Christian; Nour, Yasser; Jørgensen, Ivan Harald Holger
To properly use transistors in VHF converters, they need to be characterized under similar conditions. This research presents a two-port method, using a network analyzer (NWA) with a S-port setup. The method is a one-shot method, providing fast results of the off-state parasitics of the transistors....
Simulación y modelado de transistores MOS de doble puerta
Cartujo Cassinello, Pedro
2013-01-01
En este trabajo se hace un estudio del transistor MOS de doble puerta analizando las posibles ventajas de esta nueva estructura frene al transistor convencional y el transistor MOS SOI de puerta simple. Para ello se ha analizado una sección transversal de un transistor MOS de doble puerta de canal N, con el fin de examinar detalladamente las peculiaridades de la distribución de electrones con una amplia variedad de valores de todos los parámentros tecnológicos y condiciones de operación, y se...
Transport Mechanisms in Organic Thin-Film Transistors
Fung, A. W. P.
1996-03-01
Recent success in fabricating field-effect transistors with polycrystalline α-sexithiophene (α-6T) has allowed us to study charge transport in this organic semiconductor. The appealing structural property that the oligomer chains are seated almost perpendicular to the substrate provides a model π-conjugated system which we find exhibits band transport at low temperatures. We observe a behavioral transition around 50K which is consistent with the metal-insulator transition in Holstein's small-polaron theory. The fact that we can observe intrinsic behavior means that the ambient-temperature mobility obtained in these transistors is optimal for α-6T. Agreement with the Holstein theory provides us with a prescription for rational design of materials for organic transistor applications. Work done in collaboration with L. Torsi, A. Dodabalapur, L. J. Rothberg and H. E. Katz.
A Klein-tunneling transistor with ballistic graphene
International Nuclear Information System (INIS)
Wilmart, Quentin; Fève, Gwendal; Berroir, Jean-Marc; Plaçais, Bernard; Berrada, Salim; Hung Nguyen, V; Dollfus, Philippe; Torrin, David
2014-01-01
Today, the availability of high mobility graphene up to room temperature makes ballistic transport in nanodevices achievable. In particular, p-n-p transistors in the ballistic regime give access to Klein tunneling physics and allow the realization of devices exploiting the optics-like behavior of Dirac Fermions (DFs) as in the Veselago lens or the Fabry–Pérot cavity. Here we propose a Klein tunneling transistor based on the geometrical optics of DFs. We consider the case of a prismatic active region delimited by a triangular gate, where total internal reflection may occur, which leads to the tunable suppression of transistor transmission. We calculate the transmission and the current by means of scattering theory and the finite bias properties using non-equilibrium Green's function (NEGF) simulation. (letter)
A spiking neuron circuit based on a carbon nanotube transistor
International Nuclear Information System (INIS)
Chen, C-L; Kim, K; Truong, Q; Shen, A; Li, Z; Chen, Y
2012-01-01
A spiking neuron circuit based on a carbon nanotube (CNT) transistor is presented in this paper. The spiking neuron circuit has a crossbar architecture in which the transistor gates are connected to its row electrodes and the transistor sources are connected to its column electrodes. An electrochemical cell is incorporated in the gate of the transistor by sandwiching a hydrogen-doped poly(ethylene glycol)methyl ether (PEG) electrolyte between the CNT channel and the top gate electrode. An input spike applied to the gate triggers a dynamic drift of the hydrogen ions in the PEG electrolyte, resulting in a post-synaptic current (PSC) through the CNT channel. Spikes input into the rows trigger PSCs through multiple CNT transistors, and PSCs cumulate in the columns and integrate into a ‘soma’ circuit to trigger output spikes based on an integrate-and-fire mechanism. The spiking neuron circuit can potentially emulate biological neuron networks and their intelligent functions. (paper)
Reprogrammable read only variable threshold transistor memory with isolated addressing buffer
Lodi, Robert J.
1976-01-01
A monolithic integrated circuit, fully decoded memory comprises a rectangular array of variable threshold field effect transistors organized into a plurality of multi-bit words. Binary address inputs to the memory are decoded by a field effect transistor decoder into a plurality of word selection lines each of which activates an address buffer circuit. Each address buffer circuit, in turn, drives a word line of the memory array. In accordance with the word line selected by the decoder the activated buffer circuit directs reading or writing voltages to the transistors comprising the memory words. All of the buffer circuits additionally are connected to a common terminal for clearing all of the memory transistors to a predetermined state by the application to the common terminal of a large magnitude voltage of a predetermined polarity. The address decoder, the buffer and the memory array, as well as control and input/output control and buffer field effect transistor circuits, are fabricated on a common substrate with means provided to isolate the substrate of the address buffer transistors from the remainder of the substrate so that the bulk clearing function of simultaneously placing all of the memory transistors into a predetermined state can be performed.
Santato, C.; Capelli, R.; Loi, M.A.; Murgia, M.; Cicoira, F.; Roy, Arunesh; Stallinga, P; Zamboni, R.; Rost, C.; Karg, S.F.; Muccini, M.
2004-01-01
Optoelectronic properties of light-emitting field-effect transistors (LETs) fabricated on bottom-contact transistor structures using a tetracene film as charge-transport and light-emitting material are investigated. Electroluminescence generation and transistor current are correlated, and the bias
International Nuclear Information System (INIS)
But, D. B.; Drexler, C.; Ganichev, S. D.; Sakhno, M. V.; Sizov, F. F.; Dyakonova, N.; Drachenko, O.; Gutin, A.; Knap, W.
2014-01-01
Terahertz power dependence of the photoresponse of field effect transistors, operating at frequencies from 0.1 to 3 THz for incident radiation power density up to 100 kW/cm 2 was studied for Si metal–oxide–semiconductor field-effect transistors and InGaAs high electron mobility transistors. The photoresponse increased linearly with increasing radiation intensity up to the kW/cm 2 range. Nonlinearity followed by saturation of the photoresponse was observed for all investigated field effect transistors for intensities above several kW/cm 2 . The observed photoresponse nonlinearity is explained by nonlinearity and saturation of the transistor channel current. A theoretical model of terahertz field effect transistor photoresponse at high intensity was developed. The model explains quantitative experimental data both in linear and nonlinear regions. Our results show that dynamic range of field effect transistors is very high and can extend over more than six orders of magnitudes of power densities (from ∼0.5 mW/cm 2 to ∼5 kW/cm 2 )
Failure rates for accelerated acceptance testing of silicon transistors
Toye, C. R.
1968-01-01
Extrapolation tables for the control of silicon transistor product reliability have been compiled. The tables are based on a version of the Arrhenius statistical relation and are intended to be used for low- and medium-power silicon transistors.
Electromechanical field effect transistors based on multilayer phosphorene nanoribbons
Energy Technology Data Exchange (ETDEWEB)
Jiang, Z.T., E-mail: jiangzhaotan@hotmail.com; Lv, Z.T.; Zhang, X.D.
2017-06-21
Based on the tight-binding Hamiltonian approach, we demonstrate that the electromechanical field effect transistors (FETs) can be realized by using the multilayer phosphorene nanoribbons (PNRs). The synergistic combination of the electric field and the external strains can establish the on–off switching since the electric field can shift or split the energy band, and the mechanical strains can widen or narrow the band widths. This kind of multilayer PNR FETs, much solider than the monolayer PNR one and more easily biased by different electric fields, has more transport channels consequently leading to the higher on–off current ratio or the higher sensitivity to the electric fields. Meanwhile, the strain-induced band-flattening will be beneficial for improving the flexibility in designing the electromechanical FETs. In addition, such electromechanical FETs can act as strain-controlled FETs or mechanical detectors for detecting the strains, indicating their potential applications in nano- and micro-electromechanical fields. - Highlights: • Electromechanical transistors are designed with multilayer phosphorene nanoribbons. • Electromechanical synergistic effect can establish the on–off switching more flexibly. • Multilayer transistors, solider and more easily biased, has more transport channels. • Electromechanical transistors can act as strain-controlled transistors or mechanical detectors.
T-gate aligned nanotube radio frequency transistors and circuits with superior performance.
Che, Yuchi; Lin, Yung-Chen; Kim, Pyojae; Zhou, Chongwu
2013-05-28
In this paper, we applied self-aligned T-gate design to aligned carbon nanotube array transistors and achieved an extrinsic current-gain cutoff frequency (ft) of 25 GHz, which is the best on-chip performance for nanotube radio frequency (RF) transistors reported to date. Meanwhile, an intrinsic current-gain cutoff frequency up to 102 GHz is obtained, comparable to the best value reported for nanotube RF transistors. Armed with the excellent extrinsic RF performance, we performed both single-tone and two-tone measurements for aligned nanotube transistors at a frequency up to 8 GHz. Furthermore, we utilized T-gate aligned nanotube transistors to construct mixing and frequency doubling analog circuits operated in gigahertz frequency regime. Our results confirm the great potential of nanotube-based circuit applications and indicate that nanotube transistors are promising building blocks in high-frequency electronics.
AlN/GaN heterostructures for normally-off transistors
Energy Technology Data Exchange (ETDEWEB)
Zhuravlev, K. S., E-mail: zhur@isp.nsc.ru; Malin, T. V.; Mansurov, V. G.; Tereshenko, O. E. [Russian Academy of Sciences, Rzhanov Institute of Semiconductor Physics, Siberian Branch (Russian Federation); Abgaryan, K. K.; Reviznikov, D. L. [Dorodnicyn Computing Centre of the Russian Academy of Sciences (Russian Federation); Zemlyakov, V. E.; Egorkin, V. I. [National Research University of Electronic Technology (MIET) (Russian Federation); Parnes, Ya. M.; Tikhomirov, V. G. [Joint Stock Company “Svetlana-Electronpribor” (Russian Federation); Prosvirin, I. P. [Russian Academy of Sciences, Boreskov Institute of Catalysis, Siberian Branch (Russian Federation)
2017-03-15
The structure of AlN/GaN heterostructures with an ultrathin AlN barrier is calculated for normally-off transistors. The molecular-beam epitaxy technology of in situ passivated SiN/AlN/GaN heterostructures with a two-dimensional electron gas is developed. Normally-off transistors with a maximum current density of ~1 A/mm, a saturation voltage of 1 V, a transconductance of 350 mS/mm, and a breakdown voltage of more than 60 V are demonstrated. Gate lag and drain lag effects are almost lacking in these transistors.
Photolithographically Patterned TiO2 Films for Electrolyte-Gated Transistors.
Valitova, Irina; Kumar, Prajwal; Meng, Xiang; Soavi, Francesca; Santato, Clara; Cicoira, Fabio
2016-06-15
Metal oxides constitute a class of materials whose properties cover the entire range from insulators to semiconductors to metals. Most metal oxides are abundant and accessible at moderate cost. Metal oxides are widely investigated as channel materials in transistors, including electrolyte-gated transistors, where the charge carrier density can be modulated by orders of magnitude upon application of relatively low electrical bias (2 V). Electrolyte gating offers the opportunity to envisage new applications in flexible and printed electronics as well as to improve our current understanding of fundamental processes in electronic materials, e.g. insulator/metal transitions. In this work, we employ photolithographically patterned TiO2 films as channels for electrolyte-gated transistors. TiO2 stands out for its biocompatibility and wide use in sensing, electrochromics, photovoltaics and photocatalysis. We fabricated TiO2 electrolyte-gated transistors using an original unconventional parylene-based patterning technique. By using a combination of electrochemical and charge carrier transport measurements we demonstrated that patterning improves the performance of electrolyte-gated TiO2 transistors with respect to their unpatterned counterparts. Patterned electrolyte-gated (EG) TiO2 transistors show threshold voltages of about 0.9 V, ON/OFF ratios as high as 1 × 10(5), and electron mobility above 1 cm(2)/(V s).
Controlling the dimensionality of charge transport in organic thin-film transistors
Laiho, Ari; Herlogsson, Lars; Forchheimer, Robert; Crispin, Xavier; Berggren, Magnus
2011-01-01
Electrolyte-gated organic thin-film transistors (OTFTs) can offer a feasible platform for future flexible, large-area and low-cost electronic applications. These transistors can be divided into two groups on the basis of their operation mechanism: (i) field-effect transistors that switch fast but carry much less current than (ii) the electrochemical transistors which, on the contrary, switch slowly. An attractive approach would be to combine the benefits of the field-effect and the electrochemical transistors into one transistor that would both switch fast and carry high current densities. Here we report the development of a polyelectrolyte-gated OTFT based on conjugated polyelectrolytes, and we demonstrate that the OTFTs can be controllably operated either in the field-effect or the electrochemical regime. Moreover, we show that the extent of electrochemical doping can be restricted to a few monolayers of the conjugated polyelectrolyte film, which allows both high current densities and fast switching speeds at the same time. We propose an operation mechanism based on self-doping of the conjugated polyelectrolyte backbone by its ionic side groups. PMID:21876143
Nanometer size field effect transistors for terahertz detectors
International Nuclear Information System (INIS)
Knap, W; Rumyantsev, S; Coquillat, D; Dyakonova, N; Teppe, F; Vitiello, M S; Tredicucci, A; Blin, S; Shur, M; Nagatsuma, T
2013-01-01
Nanometer size field effect transistors can operate as efficient resonant or broadband terahertz detectors, mixers, phase shifters and frequency multipliers at frequencies far beyond their fundamental cut-off frequency. This work is an overview of some recent results concerning the application of nanometer scale field effect transistors for the detection of terahertz radiation. (paper)
Comparison of MOS capacitor and transistor postirradiation response
International Nuclear Information System (INIS)
McWhorter, P.J.; Fleetwood, D.M.; Pastorek, R.A.; Zimmerman, G.T.
1989-01-01
The postirradiation response of MOS capacitors and transistors fabricated on the same chip has been examined as a function of dose and anneal bias. A variety of analysis techniques are used to evaluate the postirradiation response of these structures, including low and high frequency capacitance-voltage techniques, subthreshold current-voltage techniques, and charge pumping. Though there are changes in the postirradiation energy spectrum of ΔD it , no clear evidence of defect transformation is observed on transistors or capacitors under any conditions examined. Postirradiation response at 80 degrees C is found to be similar in the two structures for low levels of damage (100 krad). For both structures, interface-trap densities continue to grow following irradiation under these conditions. In contrast, the postirradiation response of capacitors and transistors can differ qualitatively at higher levels of damage (1 Mrad), with interface-traps increasing postirradiation at 80 degrees C for transistors and annealing for capacitors. These results indicate that capacitor structures may not be suitable for hardness assurance studies that involve elevated temperature irradiations or postirradiation anneals
Switching Characteristics of Ferroelectric Transistor Inverters
Laws, Crystal; Mitchell, Coey; MacLeod, Todd C.; Ho, Fat D.
2010-01-01
This paper presents the switching characteristics of an inverter circuit using a ferroelectric field effect transistor, FeFET. The propagation delay time characteristics, phl and plh are presented along with the output voltage rise and fall times, rise and fall. The propagation delay is the time-delay between the V50% transitions of the input and output voltages. The rise and fall times are the times required for the output voltages to transition between the voltage levels V10% and V90%. Comparisons are made between the MOSFET inverter and the ferroelectric transistor inverter.
Effect of initial material on the electrolytic parameters of field-effect transistors
International Nuclear Information System (INIS)
Antonov, A.V.; Sinitsyn, V.N.; Fursov, V.V.
1978-01-01
The effect of initial material parameters upon the main electric characteristics of field transistors at room and optimum (170 deg C) temperatures is studied. For that purpose, the values of parasitic resistances rsub(s), specific resistances rho and steepness S of field transistors, depending on temperature and electrical conditions were measured. The output volt-ampere characteristics of the transistors at room and optimum temperatures are given. An analysis of the results obtained permits to conclude that there is an unambiguous relationship between rho and rsub(s). Impact ionization is shown to occur for field transistors with lower rho at lower drain voltage. When manufacturing field transistors designed for operation at low temperatures, one should remember that a minimum rho may restrict maximum possible steepness. When designing field transistors with optimum noise characteristics, one should variate not only such material parameters as mobility and carrier density, but also select optimum geometry
Current-Induced Transistor Sensorics with Electrogenic Cells
Directory of Open Access Journals (Sweden)
Peter Fromherz
2016-04-01
Full Text Available The concepts of transistor recording of electroactive cells are considered, when the response is determined by a current-induced voltage in the electrolyte due to cellular activity. The relationship to traditional transistor recording, with an interface-induced response due to interactions with the open gate oxide, is addressed. For the geometry of a cell-substrate junction, the theory of a planar core-coat conductor is described with a one-compartment approximation. The fast electrical relaxation of the junction and the slow change of ion concentrations are pointed out. On that basis, various recording situations are considered and documented by experiments. For voltage-gated ion channels under voltage clamp, the effects of a changing extracellular ion concentration and the enhancement/depletion of ion conductances in the adherent membrane are addressed. Inhomogeneous ion conductances are crucial for transistor recording of neuronal action potentials. For a propagating action potential, the effects of an axon-substrate junction and the surrounding volume conductor are distinguished. Finally, a receptor-transistor-sensor is described, where the inhomogeneity of a ligand–activated ion conductance is achieved by diffusion of the agonist and inactivation of the conductance. Problems with regard to a development of reliable biosensors are mentioned.
Planar transistors and impatt diodes with ion implantation
International Nuclear Information System (INIS)
Dorendorf, H.; Glawischnig, H.; Grasser, L.; Hammerschmitt, J.
1975-03-01
Low frequency planar npn and pnp transistors have been developed in which the base and emitter have been fabricated using ion implantation of boron and phosphorus by a drive-in diffusion. Electrical parameters of the transistors are comparable with conventionally produced transistors; the noise figure was improved and production tolerances were significantly reduced. Silicon-impatt diodes for the microwave range were also fabricated with implanted pn junctions and tested for their high frequency characteristics. These diodes, made in an improved upside down technology, delivered output power up to 40 mW (burn out power) at 30 GHz. Reverse leakage current and current carrying capability of these diodes were comparable to diffused structures. (orig.) 891 ORU 892 MB [de
Molecular thermal transistor: Dimension analysis and mechanism
Behnia, S.; Panahinia, R.
2018-04-01
Recently, large challenge has been spent to realize high efficient thermal transistors. Outstanding properties of DNA make it as an excellent nano material in future technologies. In this paper, we introduced a high efficient DNA based thermal transistor. The thermal transistor operates when the system shows an increase in the thermal flux despite of decreasing temperature gradient. This is what called as negative differential thermal resistance (NDTR). Based on multifractal analysis, we could distinguish regions with NDTR state from non-NDTR state. Moreover, Based on dimension spectrum of the system, it is detected that NDTR state is accompanied by ballistic transport regime. The generalized correlation sum (analogous to specific heat) shows that an irregular decrease in the specific heat induces an increase in the mean free path (mfp) of phonons. This leads to the occurrence of NDTR.
A III-V nanowire channel on silicon for high-performance vertical transistors.
Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi
2012-08-09
Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.
p-i-n Homojunction in Organic Light-Emitting Transistors
Bisri, Satria Zulkarnaen; Takenobu, Taishi; Sawabe, Kosuke; Tsuda, Satoshi; Yomogidao, Yohei; Yamao, Takeshi; Hotta, Shu; Adachi, Chihaya; Iwasa, Yoshihiro
2011-01-01
A new method for investigating light-emitting property in organic devices is demonstrated. We apply the ambipolar light-emitting transistors (LETS) to directly observe the recombination zone, and find a strong link between the transistor performance and the zone size. This finding unambiguously
The effect and mechanism of the bipolar junction transistor in different temperature
International Nuclear Information System (INIS)
Wang Dong; Lu Wu; Ren Diyuan; Li Aiwu; Kuang Zhibing
2007-01-01
The annealing-effect of bipolar junction transistor in different temperature is investigated. It is found that the anneal of the bipolar transistor is related to the annealing-temperature, and the annealing-effect of the different type transistor is dissimilar. The possible mechanism is discussed. (authors)
Development and Experimental Evaluation of an Automated Multi-Media Course on Transistors.
Whitted, J.H., Jr.; And Others
A completely automated multi-media self-study program for teaching a portion of electronic solid-state fundamentals was developed. The subject matter areas included were fundamental theory of transistors, transistor amplifier fundamentals, and simple mathematical analysis of transistors including equivalent circuits, parameters, and characteristic…
Field emission current from a junction field-effect transistor
International Nuclear Information System (INIS)
Monshipouri, Mahta; Abdi, Yaser
2015-01-01
Fabrication of a titanium dioxide/carbon nanotube (TiO 2 /CNT)-based transistor is reported. The transistor can be considered as a combination of a field emission transistor and a junction field-effect transistor. Using direct current plasma-enhanced chemical vapor deposition (DC-PECVD) technique, CNTs were grown on a p-typed (100)-oriented silicon substrate. The CNTs were then covered by TiO 2 nanoparticles 2–5 nm in size, using an atmospheric pressure CVD technique. In this device, TiO 2 /CNT junction is responsible for controlling the emission current. High on/off-current ratio and proper gate control are the most important advantages of device. A model based on Fowler–Nordheim equation is utilized for calculation of the emission current and the results are compared with experimental data. The effect of TiO 2 /CNT hetero-structure is also investigated, and well modeled
Wang, Chuan; Badmaev, Alexander; Jooyaie, Alborz; Bao, Mingqiang; Wang, Kang L; Galatsis, Kosmas; Zhou, Chongwu
2011-05-24
This paper reports the radio frequency (RF) and linearity performance of transistors using high-purity semiconducting carbon nanotubes. High-density, uniform semiconducting nanotube networks are deposited at wafer scale using our APTES-assisted nanotube deposition technique, and RF transistors with channel lengths down to 500 nm are fabricated. We report on transistors exhibiting a cutoff frequency (f(t)) of 5 GHz and with maximum oscillation frequency (f(max)) of 1.5 GHz. Besides the cutoff frequency, the other important figure of merit for the RF transistors is the device linearity. For the first time, we report carbon nanotube RF transistor linearity metrics up to 1 GHz. Without the use of active probes to provide the high impedance termination, the measurement bandwidth is therefore not limited, and the linearity measurements can be conducted at the frequencies where the transistors are intended to be operating. We conclude that semiconducting nanotube-based transistors are potentially promising building blocks for highly linear RF electronics and circuit applications.
Kim, Sang Min; Cho, Won Ju; Yu, Chong Gun; Park, Jong Tae
2018-04-01
In this work, the lifetime prediction models of amorphous InGaZnO thin film transistors (a-IGZO TFTs) were suggested for the application of display device and BEOL (Back End Of line) transistors with embedded a-IGZO TFTs. Four different types of test devices according to the active layer thickness, source/drain electrode materials and thermal treatments have been used to verify the suggested model. The device lifetimes under high gate bias stress and hot carrier stress were extracted through fittings of the stretched-exponential equation for threshold voltage shifts and the current estimation method for drain current degradations. Our suggested lifetime prediction models could be used in any kinds of structures of a-IGZO TFTs for the application of display device and BEOL transistors. The a-IGZO TFTs with embedded ITO local conducting layer under source/drain is better for BEOL transistor application and a-IGZO TFTs with InGaZnO thin film as source/drain electrodes may be better for the application of display devices. From 1983 to 1985, he was a Researcher at Gold-Star Semiconductor, Inc., Korea, where he worked on the development of SRAM. He joined the Department of Electronics Engineering, University of Incheon, Incheon, Korea, in 1987, where he is a Professor. As a visiting scientist at Massachusetts Institute of Technology, Cambridge, in 1991, he conducted research in hot carrier reliability of CMOS. As a visiting scholar at University of California, Davis, in 2001, he conducted research on the device structure of Nano-scale SOI CMOS. His recent interests are device structure and reliability of Nano-scale CMOS devices, flash memory, and thin film transistors.
Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung
2008-11-01
In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.
Mesoscopic photon heat transistor
DEFF Research Database (Denmark)
Ojanen, T.; Jauho, Antti-Pekka
2008-01-01
We show that the heat transport between two bodies, mediated by electromagnetic fluctuations, can be controlled with an intermediate quantum circuit-leading to the device concept of a mesoscopic photon heat transistor (MPHT). Our theoretical analysis is based on a novel Meir-Wingreen-Landauer-typ......We show that the heat transport between two bodies, mediated by electromagnetic fluctuations, can be controlled with an intermediate quantum circuit-leading to the device concept of a mesoscopic photon heat transistor (MPHT). Our theoretical analysis is based on a novel Meir......-Wingreen-Landauer-type of conductance formula, which gives the photonic heat current through an arbitrary circuit element coupled to two dissipative reservoirs at finite temperatures. As an illustration we present an exact solution for the case when the intermediate circuit can be described as an electromagnetic resonator. We discuss...
Monolithic acoustic graphene transistors based on lithium niobate thin film
Liang, J.; Liu, B.-H.; Zhang, H.-X.; Zhang, H.; Zhang, M.-L.; Zhang, D.-H.; Pang, W.
2018-05-01
This paper introduces an on-chip acoustic graphene transistor based on lithium niobate thin film. The graphene transistor is embedded in a microelectromechanical systems (MEMS) acoustic wave device, and surface acoustic waves generated by the resonator induce a macroscopic current in the graphene due to the acousto-electric (AE) effect. The acoustic resonator and the graphene share the lithium niobate film, and a gate voltage is applied through the back side of the silicon substrate. The AE current induced by the Rayleigh and Sezawa modes was investigated, and the transistor outputs a larger current in the Rayleigh mode because of a larger coupling to velocity ratio. The output current increases linearly with the input radiofrequency power and can be effectively modulated by the gate voltage. The acoustic graphene transistor realized a five-fold enhancement in the output current at an optimum gate voltage, outperforming its counterpart with a DC input. The acoustic graphene transistor demonstrates a paradigm for more-than-Moore technology. By combining the benefits of MEMS and graphene circuits, it opens an avenue for various system-on-chip applications.
DEVICE TECHNOLOGY. Nanomaterials in transistors: From high-performance to thin-film applications.
Franklin, Aaron D
2015-08-14
For more than 50 years, silicon transistors have been continuously shrunk to meet the projections of Moore's law but are now reaching fundamental limits on speed and power use. With these limits at hand, nanomaterials offer great promise for improving transistor performance and adding new applications through the coming decades. With different transistors needed in everything from high-performance servers to thin-film display backplanes, it is important to understand the targeted application needs when considering new material options. Here the distinction between high-performance and thin-film transistors is reviewed, along with the benefits and challenges to using nanomaterials in such transistors. In particular, progress on carbon nanotubes, as well as graphene and related materials (including transition metal dichalcogenides and X-enes), outlines the advances and further research needed to enable their use in transistors for high-performance computing, thin films, or completely new technologies such as flexible and transparent devices. Copyright © 2015, American Association for the Advancement of Science.
Dual-mode operation of 2D material-base hot electron transistors
Lan, Yann-Wen; Jr., Carlos M. Torres,; Zhu, Xiaodan; Qasem, Hussam; Adleman, James R.; Lerner, Mitchell B.; Tsai, Shin-Hung; Shi, Yumeng; Li, Lain-Jong; Yeh, Wen-Kuan; Wang, Kang L.
2016-01-01
Vertical hot electron transistors incorporating atomically-thin 2D materials, such as graphene or MoS2, in the base region have been proposed and demonstrated in the development of electronic and optoelectronic applications. To the best of our knowledge, all previous 2D material-base hot electron transistors only considered applying a positive collector-base potential (V-CB > 0) as is necessary for the typical unipolar hot-electron transistor behavior. Here we demonstrate a novel functionality, specifically a dual-mode operation, in our 2D material-base hot electron transistors (e.g. with either graphene or MoS2 in the base region) with the application of a negative collector-base potential (V-CB < 0). That is, our 2D material-base hot electron transistors can operate in either a hot-electron or a reverse-current dominating mode depending upon the particular polarity of VCB. Furthermore, these devices operate at room temperature and their current gains can be dynamically tuned by varying VCB. We anticipate our multi-functional dual-mode transistors will pave the way towards the realization of novel flexible 2D material-based high-density and low-energy hot-carrier electronic applications.
Dual-mode operation of 2D material-base hot electron transistors
Lan, Yann-Wen
2016-09-01
Vertical hot electron transistors incorporating atomically-thin 2D materials, such as graphene or MoS2, in the base region have been proposed and demonstrated in the development of electronic and optoelectronic applications. To the best of our knowledge, all previous 2D material-base hot electron transistors only considered applying a positive collector-base potential (V-CB > 0) as is necessary for the typical unipolar hot-electron transistor behavior. Here we demonstrate a novel functionality, specifically a dual-mode operation, in our 2D material-base hot electron transistors (e.g. with either graphene or MoS2 in the base region) with the application of a negative collector-base potential (V-CB < 0). That is, our 2D material-base hot electron transistors can operate in either a hot-electron or a reverse-current dominating mode depending upon the particular polarity of VCB. Furthermore, these devices operate at room temperature and their current gains can be dynamically tuned by varying VCB. We anticipate our multi-functional dual-mode transistors will pave the way towards the realization of novel flexible 2D material-based high-density and low-energy hot-carrier electronic applications.
Dual-mode operation of 2D material-base hot electron transistors.
Lan, Yann-Wen; Torres, Carlos M; Zhu, Xiaodan; Qasem, Hussam; Adleman, James R; Lerner, Mitchell B; Tsai, Shin-Hung; Shi, Yumeng; Li, Lain-Jong; Yeh, Wen-Kuan; Wang, Kang L
2016-09-01
Vertical hot electron transistors incorporating atomically-thin 2D materials, such as graphene or MoS2, in the base region have been proposed and demonstrated in the development of electronic and optoelectronic applications. To the best of our knowledge, all previous 2D material-base hot electron transistors only considered applying a positive collector-base potential (VCB > 0) as is necessary for the typical unipolar hot-electron transistor behavior. Here we demonstrate a novel functionality, specifically a dual-mode operation, in our 2D material-base hot electron transistors (e.g. with either graphene or MoS2 in the base region) with the application of a negative collector-base potential (VCB transistors can operate in either a hot-electron or a reverse-current dominating mode depending upon the particular polarity of VCB. Furthermore, these devices operate at room temperature and their current gains can be dynamically tuned by varying VCB. We anticipate our multi-functional dual-mode transistors will pave the way towards the realization of novel flexible 2D material-based high-density and low-energy hot-carrier electronic applications.
Parametrization of the radiation induced leakage current increase of NMOS transistors
International Nuclear Information System (INIS)
Backhaus, M.
2017-01-01
The increase of the leakage current of NMOS transistors during exposure to ionizing radiation is known and well studied. Radiation hardness by design techniques have been developed to mitigate this effect and have been successfully used. More recent developments in smaller feature size technologies do not make use of these techniques due to their drawbacks in terms of logic density and requirement of dedicated libraries. During operation the resulting increase of the supply current is a serious challenge and needs to be considered during the system design. A simple parametrization of the leakage current of NMOS transistors as a function of total ionizing dose is presented. The parametrization uses a transistor transfer characteristics of the parasitic transistor along the shallow trench isolation to describe the leakage current of the nominal transistor. Together with a parametrization of the number of positive charges trapped in the silicon dioxide and number of activated interface traps in the silicon to silicon dioxide interface the leakage current results as a function of the exposure time to ionizing radiation. This function is fitted to data of the leakage current of single transistors as well as to data of the supply current of full ASICs.
Heidler, Jonas; Yang, Sheng; Feng, Xinliang; Müllen, Klaus; Asadi, Kamal
2018-06-01
Memories based on graphene that could be mass produced using low-cost methods have not yet received much attention. Here we demonstrate graphene ferroelectric (dual-gate) field effect transistors. The graphene has been obtained using electrochemical exfoliation of graphite. Field-effect transistors are realized using a monolayer of graphene flakes deposited by the Langmuir-Blodgett protocol. Ferroelectric field effect transistor memories are realized using a random ferroelectric copolymer poly(vinylidenefluoride-co-trifluoroethylene) in a top gated geometry. The memory transistors reveal ambipolar behaviour with both electron and hole accumulation channels. We show that the non-ferroelectric bottom gate can be advantageously used to tune the on/off ratio.
Energy Technology Data Exchange (ETDEWEB)
Tsatsulnikov, A. F., E-mail: andrew@beam.ioffe.ru [Russian Academy of Sciences, Submicron Heterostructures for Microelectronics Research and Engineering Center (Russian Federation); Lundin, V. W.; Zavarin, E. E.; Yagovkina, M. A.; Sakharov, A. V. [Russian Academy of Sciences, Ioffe Physical–Technical Institute (Russian Federation); Usov, S. O. [Russian Academy of Sciences, Submicron Heterostructures for Microelectronics Research and Engineering Center (Russian Federation); Zemlyakov, V. E.; Egorkin, V. I. [National Research University of Electronic Technology (MIET) (Russian Federation); Bulashevich, K. A.; Karpov, S. Yu. [“Soft-Impact” Ltd. (Russian Federation); Ustinov, V. M. [Russian Academy of Sciences, Submicron Heterostructures for Microelectronics Research and Engineering Center (Russian Federation)
2016-10-15
The effect of the layer thickness and composition in AlGaN/AlN/GaN and InAlN/AlN/GaN transistor heterostructures with a two-dimensional electron gas on their electrical and the static parameters of test transistors fabricated from such heterostructures are experimentally and theoretically studied. It is shown that the use of an InAlN barrier layer instead of AlGaN results in a more than twofold increase in the carrier concentration in the channel, which leads to a corresponding increase in the saturation current. In situ dielectric-coating deposition on the InAlN/AlN/GaN heterostructure surface during growth process allows an increase in the maximum saturation current and breakdown voltages while retaining high transconductance.
Electrothermal Behavior of High-Frequency Silicon-On-Glass Transistors
Nenadovic, N.
2004-01-01
In this thesis, research is focused on the investigation of electrothermal effects in high-speed silicon transistors. At high current levels the power dissipation in these devices can lead to heating of both the device itself and the adjacent devices. In advanced transistors these effects are
Controlling charge current through a DNA based molecular transistor
Energy Technology Data Exchange (ETDEWEB)
Behnia, S., E-mail: s.behnia@sci.uut.ac.ir; Fathizadeh, S.; Ziaei, J.
2017-01-05
Molecular electronics is complementary to silicon-based electronics and may induce electronic functions which are difficult to obtain with conventional technology. We have considered a DNA based molecular transistor and study its transport properties. The appropriate DNA sequence as a central chain in molecular transistor and the functional interval for applied voltages is obtained. I–V characteristic diagram shows the rectifier behavior as well as the negative differential resistance phenomenon of DNA transistor. We have observed the nearly periodic behavior in the current flowing through DNA. It is reported that there is a critical gate voltage for each applied bias which above it, the electrical current is always positive. - Highlights: • Modeling a DNA based molecular transistor and studying its transport properties. • Choosing the appropriate DNA sequence using the quantum chaos tools. • Choosing the functional interval for voltages via the inverse participation ratio tool. • Detecting the rectifier and negative differential resistance behavior of DNA.
Field emission current from a junction field-effect transistor
Energy Technology Data Exchange (ETDEWEB)
Monshipouri, Mahta; Abdi, Yaser, E-mail: y.abdi@ut.ac.ir [University of Tehran, Nano-Physics Research Laboratory, Department of Physics (Iran, Islamic Republic of)
2015-04-15
Fabrication of a titanium dioxide/carbon nanotube (TiO{sub 2}/CNT)-based transistor is reported. The transistor can be considered as a combination of a field emission transistor and a junction field-effect transistor. Using direct current plasma-enhanced chemical vapor deposition (DC-PECVD) technique, CNTs were grown on a p-typed (100)-oriented silicon substrate. The CNTs were then covered by TiO{sub 2} nanoparticles 2–5 nm in size, using an atmospheric pressure CVD technique. In this device, TiO{sub 2}/CNT junction is responsible for controlling the emission current. High on/off-current ratio and proper gate control are the most important advantages of device. A model based on Fowler–Nordheim equation is utilized for calculation of the emission current and the results are compared with experimental data. The effect of TiO{sub 2}/CNT hetero-structure is also investigated, and well modeled.
Transport spectroscopy of coupled donors in silicon nano-transistors
Moraru, Daniel; Samanta, Arup; Anh, Le The; Mizuno, Takeshi; Mizuta, Hiroshi; Tabe, Michiharu
2014-01-01
The impact of dopant atoms in transistor functionality has significantly changed over the past few decades. In downscaled transistors, discrete dopants with uncontrolled positions and number induce fluctuations in device operation. On the other hand, by gaining access to tunneling through individual dopants, a new type of devices is developed: dopant-atom-based transistors. So far, most studies report transport through dopants randomly located in the channel. However, for practical applications, it is critical to control the location of the donors with simple techniques. Here, we fabricate silicon transistors with selectively nanoscale-doped channels using nano-lithography and thermal-diffusion doping processes. Coupled phosphorus donors form a quantum dot with the ground state split into a number of levels practically equal to the number of coupled donors, when the number of donors is small. Tunneling-transport spectroscopy reveals fine features which can be correlated with the different numbers of donors inside the quantum dot, as also suggested by first-principles simulation results. PMID:25164032
Magnon transistor for all-magnon data processing.
Chumak, Andrii V; Serga, Alexander A; Hillebrands, Burkard
2014-08-21
An attractive direction in next-generation information processing is the development of systems employing particles or quasiparticles other than electrons--ideally with low dissipation--as information carriers. One such candidate is the magnon: the quasiparticle associated with the eigen-excitations of magnetic materials known as spin waves. The realization of single-chip all-magnon information systems demands the development of circuits in which magnon currents can be manipulated by magnons themselves. Using a magnonic crystal--an artificial magnetic material--to enhance nonlinear magnon-magnon interactions, we have succeeded in the realization of magnon-by-magnon control, and the development of a magnon transistor. We present a proof of concept three-terminal device fabricated from an electrically insulating magnetic material. We demonstrate that the density of magnons flowing from the transistor's source to its drain can be decreased three orders of magnitude by the injection of magnons into the transistor's gate.
Segmented motor drive - with multi-phase induction motor
DEFF Research Database (Denmark)
Bendixen, Flemming Buus
of the induction motor is set up. The model is able to calculate dynamical electric, magnetic and mechanic state variables, but initially it is used to calculate static characteristics in motors with different number of phases and different voltage supply shapes. This analysis show i.e. that the efficiency....... The multi-phase motor is selected for further analysis. The project is limited to examine if increasing the number of phases can improve the characteristics for induction motor drives. In the literature it is demonstrated that torque production in a six-phase motor can be increased, if a 3rd harmonic......This PhD project commences in modulation of motor drives, i.e. having the advantage of reducing the number of variants and improves the system reliability at error situations. Four different motor drive topologies with modular construction as common denominator are compared on a general level...
Investigation of Impact of the Gate Circuitry on IGBT Transistor Dynamic Parameters
Directory of Open Access Journals (Sweden)
Vytautas Bleizgys
2011-03-01
Full Text Available The impact of Insulated Gate Bipolar Transistor driver circuit parameters on the rise and fall time of the collector current and voltage collector-emitter was investigated. The influence of transistor driver circuit parameters on heating of Insulated Gate Bipolar Transistors was investigated as well.Article in Lithuanian
High performance ring oscillators from 10-nm wide silicon nanowire field-effect transistors
Huang, Ruo-Gu; Tham, Douglas; Wang, Dunwei; Heath, James R.
2011-01-01
We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication and testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for producing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~108), low drain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of inverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter demonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator exhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW devices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance nanoelectronic applications. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.
High performance ring oscillators from 10-nm wide silicon nanowire field-effect transistors
Huang, Ruo-Gu
2011-06-24
We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication and testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for producing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~108), low drain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of inverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter demonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator exhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW devices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance nanoelectronic applications. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.
Transistor-based filter for inhibiting load noise from entering a power supply
Taubman, Matthew S
2013-07-02
A transistor-based filter for inhibiting load noise from entering a power supply is disclosed. The filter includes a first transistor having an emitter coupled to a power supply, a collector coupled to a load, and a base. The filter also includes a first capacitor coupled between the base of the first transistor and a ground terminal. The filter further includes an impedance coupled between the base and a node between the collector and the load, or a second transistor and second capacitor. The impedance can be a resistor or an inductor.
Investigation of torque control using a variable slip induction generator
Energy Technology Data Exchange (ETDEWEB)
Bossanyi, E A; Gamble, C R
1991-07-01
An investigation of the possibilities of using a variable slip induction generator to control wind turbine transmission torque has been carried out. Such a generator consists of a wound rotor induction generator with its rotor winding connected to an external variable resistance circuit. By controlling the external resistance, the torque-slip characteristic of the generator can be modified, allowing efficient, low-slip operation below rated wind speed and compliant, high-slip operation above rated, where the additional losses are of no consequence but the resulting compliance allows a much reduced duty to be specified for the transmission and gearbox. A number of hardware options have been investigated for the variable resistance rotor circuit, the main options being either a rectifier and DC chopper or an AC regulator. Both of these options use semiconductor switching devices, for which the relative merits of thyristors, MOSFETs, GTOs and transistors have been investigated. A favoured scheme consisting of an AC regulator using GTOs has been provisionally selected. This choice uses some non-standard equipment but is expected to give negligible problems with harmonics. A comprehensive simulation model has been set up and used to investigate the behaviour of the whole system. (author).
The dual role of multiple-transistor charge sharing collection in single-event transients
International Nuclear Information System (INIS)
Guo Yang; Chen Jian-Jun; He Yi-Bai; Liang Bin; Liu Bi-Wei
2013-01-01
As technologies scale down in size, multiple-transistors being affected by a single ion has become a universal phenomenon, and some new effects are present in single event transients (SETs) due to the charge sharing collection of the adjacent multiple-transistors. In this paper, not only the off-state p-channel metal—oxide semiconductor field-effect transistor (PMOS FET), but also the on-state PMOS is struck by a heavy-ion in the two-transistor inverter chain, due to the charge sharing collection and the electrical interaction. The SET induced by striking the off-state PMOS is efficiently mitigated by the pulse quenching effect, but the SET induced by striking the on-state PMOS becomes dominant. It is indicated in this study that in the advanced technologies, the SET will no longer just be induced by an ion striking the off-state transistor, and the SET sensitive region will no longer just surround the off-state transistor either, as it is in the older technologies. We also discuss this issue in a three-transistor inverter in depth, and the study illustrates that the three-transistor inverter is still a better replacement for spaceborne integrated circuit design in advanced technologies. (condensed matter: structural, mechanical, and thermal properties)
Transistor analogs of emergent iono-neuronal dynamics.
Rachmuth, Guy; Poon, Chi-Sang
2008-06-01
Neuromorphic analog metal-oxide-silicon (MOS) transistor circuits promise compact, low-power, and high-speed emulations of iono-neuronal dynamics orders-of-magnitude faster than digital simulation. However, their inherently limited input voltage dynamic range vs power consumption and silicon die area tradeoffs makes them highly sensitive to transistor mismatch due to fabrication inaccuracy, device noise, and other nonidealities. This limitation precludes robust analog very-large-scale-integration (aVLSI) circuits implementation of emergent iono-neuronal dynamics computations beyond simple spiking with limited ion channel dynamics. Here we present versatile neuromorphic analog building-block circuits that afford near-maximum voltage dynamic range operating within the low-power MOS transistor weak-inversion regime which is ideal for aVLSI implementation or implantable biomimetic device applications. The fabricated microchip allowed robust realization of dynamic iono-neuronal computations such as coincidence detection of presynaptic spikes or pre- and postsynaptic activities. As a critical performance benchmark, the high-speed and highly interactive iono-neuronal simulation capability on-chip enabled our prompt discovery of a minimal model of chaotic pacemaker bursting, an emergent iono-neuronal behavior of fundamental biological significance which has hitherto defied experimental testing or computational exploration via conventional digital or analog simulations. These compact and power-efficient transistor analogs of emergent iono-neuronal dynamics open new avenues for next-generation neuromorphic, neuroprosthetic, and brain-machine interface applications.
On the choice of a head element for low-noise bipolar transistor amplifier
International Nuclear Information System (INIS)
Krasnokutskij, R.N.; Kurchaninov, L.L.; Fedyakin, N.N.; Shuvalov, R.S.
1988-01-01
The measurement results of equivalent noise charge (ENC) for KT382 transistor depending on detector capacity, formation duration and collector current are given. It is shown that the measurement results for this transistor in good agreement with calculations according to the noise model, time-consuming ENC measurements can be replaced by preliminary transistor rejection according to the distributed base resistance, current gain and simple calculations. In applications in the field of nuclear electronics the KT382 transistor enables to attain the same noise parameters as NE578, NE021 transistors (Japan) and it can be recommended for using as a head element of amplifiers
Transistor regenerative spectrometer for 14N nuclear quadrupole resonance study
International Nuclear Information System (INIS)
Anferov, V.P.; Mikhal'kov, V.M.
1981-01-01
Improvement of the Robinson transducer for investigations of nuclear quadrupole resonance (NQR) in 14 N is described. Amplifier of the suggested transducer is made using p-n field effect transistor and small-noise SHF bipolar transistor. Such a circuit permits to obtain optimal relation between input resistance, low-frequency noises and transconductance which provides uniform gain of the transducer in the frequency range of 0.6-12 MHz and permits to construct a transistor spectrometer of NQR not yielding to a lamp spectrometer in sensitivity [ru
Parametrization of the radiation induced leakage current increase of NMOS transistors
Backhaus, Malte
2017-01-13
The increase of the leakage current of NMOS transistors during exposure to ionizing radiation is known and well studied. Radiation hardness by design techniques have been developed to mitigate this effect and have been successfully used. More recent developments in smaller feature size technologies do not make use of these techniques due to their drawbacks in terms of logic density and requirement of dedicated libraries. During operation the resulting increase of the supply current is a serious challenge and needs to be considered during the system design. A simple parametrization of the leakage current of NMOS transistors as a function of total ionizing dose is presented. The parametrization uses a transistor transfer characteristics of the parasitic transistor along the shallow trench isolation to describe the leakage current of the nominal transistor. Together with a parametrization of the number of positive charges trapped in the silicon dioxide and number of activated interface traps in the silicon to si...
Imperceptible and Ultraflexible p-Type Transistors and Macroelectronics Based on Carbon Nanotubes.
Cao, Xuan; Cao, Yu; Zhou, Chongwu
2016-01-26
Flexible thin-film transistors based on semiconducting single-wall carbon nanotubes are promising for flexible digital circuits, artificial skins, radio frequency devices, active-matrix-based displays, and sensors due to the outstanding electrical properties and intrinsic mechanical strength of carbon nanotubes. Nevertheless, previous research effort only led to nanotube thin-film transistors with the smallest bending radius down to 1 mm. In this paper, we have realized the full potential of carbon nanotubes by making ultraflexible and imperceptible p-type transistors and circuits with a bending radius down to 40 μm. In addition, the resulted transistors show mobility up to 12.04 cm(2) V(-1) S(-1), high on-off ratio (∼10(6)), ultralight weight (transistors and circuits have great potential to work as indispensable components for ultraflexible complementary electronics.
Numerical Simulation of the Moving Induction Heating Process with Magnetic Flux Concentrator
Directory of Open Access Journals (Sweden)
Feng Li
2013-01-01
Full Text Available The induction heating with ferromagnetic metal powder bonded magnetic flux concentrator (MPB-MFC demonstrates more advantages in surface heating treatments of metal. However, the moving heating application is mostly applied in the industrial production. Therefore, the analytical understanding of the mechanism, efficiency, and controllability of the moving induction heating process becomes necessary for process design and optimization. This paper studies the mechanism of the moving induction heating with magnetic flux concentrator. The MPB-MFC assisted moving induction heating for Inconel 718 alloy is studied by establishing the finite element simulation model. The temperature field distribution is analyzed, and the factors influencing the temperature are studied. The conclusion demonstrates that the velocity of the workpiece should be controlled properly and the heat transfer coefficient (HTC has little impact on the temperature development, compared with other input parameters. In addition, the validity of the static numerical model is verified by comparing the finite element simulation with experimental results on AISI 1045 steel. The numerical model established in this work can provide comprehensive understanding for the process control in production.
Balancing Hole and Electron Conduction in Ambipolar Split-Gate Thin-Film Transistors.
Yoo, Hocheon; Ghittorelli, Matteo; Lee, Dong-Kyu; Smits, Edsger C P; Gelinck, Gerwin H; Ahn, Hyungju; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon
2017-07-10
Complementary organic electronics is a key enabling technology for the development of new applications including smart ubiquitous sensors, wearable electronics, and healthcare devices. High-performance, high-functionality and reliable complementary circuits require n- and p-type thin-film transistors with balanced characteristics. Recent advancements in ambipolar organic transistors in terms of semiconductor and device engineering demonstrate the great potential of this route but, unfortunately, the actual development of ambipolar organic complementary electronics is currently hampered by the uneven electron (n-type) and hole (p-type) conduction in ambipolar organic transistors. Here we show ambipolar organic thin-film transistors with balanced n-type and p-type operation. By manipulating air exposure and vacuum annealing conditions, we show that well-balanced electron and hole transport properties can be easily obtained. The method is used to control hole and electron conductions in split-gate transistors based on a solution-processed donor-acceptor semiconducting polymer. Complementary logic inverters with balanced charging and discharging characteristics are demonstrated. These findings may open up new opportunities for the rational design of complementary electronics based on ambipolar organic transistors.
Evolution of the MOS transistor - From conception to VLSI
International Nuclear Information System (INIS)
Sah, C.T.
1988-01-01
Historical developments of the metal-oxide-semiconductor field-effect-transistor (MOSFET) during the last sixty years are reviewed, from the 1928 patent disclosures of the field-effect conductivity modulation concept and the semiconductor triodes structures proposed by Lilienfeld to the 1947 Shockley-originated efforts which led to the laboratory demonstration of the modern silicon MOSFET thirty years later in 1960. A survey is then made of the milestones of the past thirty years leading to the latest submicron silicon logic CMOS (Complementary MOS) and BICMOS (Bipolar-Junction-Transistor CMOS combined) arrays and the three-dimensional and ferroelectric extensions of Dennard's one-transistor dynamic random access memory (DRAM) cell. Status of the submicron lithographic technologies (deep ultra-violet light, X-ray, electron-beam) are summarized. Future trends of memory cell density and logic gate speed are projected. Comparisons of the switching speed of the silicon MOSFET with that of silicon bipolar and GaAs field-effect transistors are reviewed. Use of high-temperature superconducting wires and GaAs-on-Si monolithic semiconductor optical clocks to break the interconnect-wiring delay barrier is discussed. Further needs in basic research and mathematical modeling on the failure mechanisms in submicron silicon transistors at high electric fields (hot electron effects) and in interconnection conductors at high current densities and low as well as high electric fields (electromigration) are indicated
Study on ionizing radiation effects of bipolar transistor with BPSG films
International Nuclear Information System (INIS)
Lu Man; Zhang Xiaoling; Xie Xuesong; Sun Jiangchao; Wang Pengpeng; Lu Changzhi; Zhang Yanxiu
2013-01-01
Background: Because of the damage induced by ionizing radiation, bipolar transistors in integrated voltage regulator could induce the current gain degradation and increase leakage current. This will bring serious problems to electronic system. Purpose: In order to ensure the reliability of the device work in the radiation environments, the device irradiation reinforcement technology is used. Methods: The characteristics of 60 Co γ irradiation and annealing at different temperatures in bipolar transistors and voltage regulators (JW117) with different passive films for SiO 2 +BPSG+SiO 2 and SiO 2 +SiN have been investigated. Results: The devices with BPSG film enhanced radiation tolerance significantly. Because BPSG films have better absorption for Na + in SiO 2 layer, the surface recombination rate of base region in a bipolar transistor and the excess base current have been reduced. It may be the main reason for BJT with BPSG film having a good radiation hardness. And annealing experiments at different temperatures after irradiation ensure the reliability of the devices with BPSG films. Conclusions: A method of improving the ionizing irradiation hardness of bipolar transistors is proposed. As well as the linear integrated circuits which containing bipolar transistors, an experimental basis for the anti-ionizing radiation effects of bipolar transistors is provided. (authors)
Oscillation of Critical Current by Gate Voltage in Cooper Pair Transistor
International Nuclear Information System (INIS)
Kim, N.; Cheong, Y.; Song, W.
2010-01-01
We measured the critical current of a Cooper pair transistor consisting of two Josephson junctions and a gate electrode. The Cooper pair transistors were fabricated by using electron-beam lithography and double-angle evaporation technique. The Gate voltage dependence of critical current was measured by observing voltage jumps at various gate voltages while sweeping bias current. The observed oscillation was 2e-periodic, which shows the Cooper pair transistor had low level of quasiparticle poisoning.
Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon
2014-05-21
We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.
Fundamentals of RF and microwave transistor amplifiers
Bahl, Inder J
2009-01-01
A Comprehensive and Up-to-Date Treatment of RF and Microwave Transistor Amplifiers This book provides state-of-the-art coverage of RF and microwave transistor amplifiers, including low-noise, narrowband, broadband, linear, high-power, high-efficiency, and high-voltage. Topics covered include modeling, analysis, design, packaging, and thermal and fabrication considerations. Through a unique integration of theory and practice, readers will learn to solve amplifier-related design problems ranging from matching networks to biasing and stability. More than 240 problems are included to help read
Transistor and integrated circuit manufacture
Energy Technology Data Exchange (ETDEWEB)
Colman, D
1978-09-27
This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry.
Going ballistic: Graphene hot electron transistors
Vaziri, S.; Smith, A. D.; Östling, M.; Lupina, G.; Dabrowski, J.; Lippert, G.; Mehr, W.; Driussi, F.; Venica, S.; Di Lecce, V.; Gnudi, A.; König, M.; Ruhl, G.; Belete, M.; Lemme, M. C.
2015-12-01
This paper reviews the experimental and theoretical state of the art in ballistic hot electron transistors that utilize two-dimensional base contacts made from graphene, i.e. graphene base transistors (GBTs). Early performance predictions that indicated potential for THz operation still hold true today, even with improved models that take non-idealities into account. Experimental results clearly demonstrate the basic functionality, with on/off current switching over several orders of magnitude, but further developments are required to exploit the full potential of the GBT device family. In particular, interfaces between graphene and semiconductors or dielectrics are far from perfect and thus limit experimental device integrity, reliability and performance.
Tin Dioxide Electrolyte-Gated Transistors Working in Depletion and Enhancement Modes.
Valitova, Irina; Natile, Marta Maria; Soavi, Francesca; Santato, Clara; Cicoira, Fabio
2017-10-25
Metal oxide semiconductors are interesting for next-generation flexible and transparent electronics because of their performance and reliability. Tin dioxide (SnO 2 ) is a very promising material that has already found applications in sensing, photovoltaics, optoelectronics, and batteries. In this work, we report on electrolyte-gated, solution-processed polycrystalline SnO 2 transistors on both rigid and flexible substrates. For the transistor channel, we used both unpatterned and patterned SnO 2 films. Since decreasing the SnO 2 area in contact with the electrolyte increases the charge-carrier density, patterned transistors operate in the depletion mode, whereas unpatterned ones operate in the enhancement mode. We also fabricated flexible SnO 2 transistors that operate in the enhancement mode that can withstand moderate mechanical bending.
Bottom-Up Tri-gate Transistors and Submicrosecond Photodetectors from Guided CdS Nanowalls.
Xu, Jinyou; Oksenberg, Eitan; Popovitz-Biro, Ronit; Rechav, Katya; Joselevich, Ernesto
2017-11-08
Tri-gate transistors offer better performance than planar transistors by exerting additional gate control over a channel from two lateral sides of semiconductor nanowalls (or "fins"). Here we report the bottom-up assembly of aligned CdS nanowalls by a simultaneous combination of horizontal catalytic vapor-liquid-solid growth and vertical facet-selective noncatalytic vapor-solid growth and their parallel integration into tri-gate transistors and photodetectors at wafer scale (cm 2 ) without postgrowth transfer or alignment steps. These tri-gate transistors act as enhancement-mode transistors with an on/off current ratio on the order of 10 8 , 4 orders of magnitude higher than the best results ever reported for planar enhancement-mode CdS transistors. The response time of the photodetector is reduced to the submicrosecond level, 1 order of magnitude shorter than the best results ever reported for photodetectors made of bottom-up semiconductor nanostructures. Guided semiconductor nanowalls open new opportunities for high-performance 3D nanodevices assembled from the bottom up.
Effects on focused ion beam irradiation on MOS transistors
International Nuclear Information System (INIS)
Campbell, A.N.; Peterson, K.A.; Fleetwood, D.M.; Soden, J.M.
1997-01-01
The effects of irradiation from a focused ion beam (FIB) system on MOS transistors are reported systematically for the first time. Three MOS transistor technologies, with 0.5, 1, and 3 μm minimum feature sizes and with gate oxide thicknesses ranging from 11 to 50 nm, were analyzed. Significant shifts in transistor parameters (such as threshold voltage, transconductance, and mobility) were observed following irradiation with a 30 keV Ga + focused ion beam with ion doses varying by over 5 orders of magnitude. The apparent damage mechanism (which involved the creation of interface traps, oxide trapped charge, or both) and extent of damage were different for each of the three technologies investigated
DEFF Research Database (Denmark)
Bouzid, Allal; Sicard, Pierre; Guerrero, Josep M.
2015-01-01
This paper presents a comprehensive modeling of a three-phase cage induction machine used as a self-excited squirrel-cage induction generator (SEIG), and discusses the regulation of the voltage and frequency of a self-excited SEIG based on the action of the static synchronous Compensator (STATCOM......). The STATCOM with the proposed controller consists of a three-phase voltage-sourced inverter and a DC voltage. The compensator can provide the active and reactive powers and regulate AC system bus voltage and the frequency, but also may enhance the load stability. Moreover, a feed forward control method...
Light programmable organic transistor memory device based on hybrid dielectric
Ren, Xiaochen; Chan, Paddy K. L.
2013-09-01
We have fabricated the transistor memory devices based on SiO2 and polystyrene (PS) hybrid dielectric. The trap states densities with different semiconductors have been investigated and a maximum 160V memory window between programming and erasing is realized. For DNTT based transistor, the trapped electron density is limited by the number of mobile electrons in semiconductor. The charge transport mechanism is verified by light induced Vth shift effect. Furthermore, in order to meet the low operating power requirement of portable electronic devices, we fabricated the organic memory transistor based on AlOx/self-assembly monolayer (SAM)/PS hybrid dielectric, the effective capacitance of hybrid dielectric is 210 nF cm-2 and the transistor can reach saturation state at -3V gate bias. The memory window in transfer I-V curve is around 1V under +/-5V programming and erasing bias.
Transistor and integrated circuit manufacture
International Nuclear Information System (INIS)
Colman, D.
1978-01-01
This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry. (author)
International Nuclear Information System (INIS)
Ma Qingyu; He Bin
2007-01-01
A theoretical study on the magnetoacoustic signal generation with magnetic induction and its applications to electrical conductivity reconstruction is conducted. An object with a concentric cylindrical geometry is located in a static magnetic field and a pulsed magnetic field. Driven by Lorentz force generated by the static magnetic field, the magnetically induced eddy current produces acoustic vibration and the propagated sound wave is received by a transducer around the object to reconstruct the corresponding electrical conductivity distribution of the object. A theory on the magnetoacoustic waveform generation for a circular symmetric model is provided as a forward problem. The explicit formulae and quantitative algorithm for the electrical conductivity reconstruction are then presented as an inverse problem. Computer simulations were conducted to test the proposed theory and assess the performance of the inverse algorithms for a multi-layer cylindrical model. The present simulation results confirm the validity of the proposed theory and suggest the feasibility of reconstructing electrical conductivity distribution based on the proposed theory on the magnetoacoustic signal generation with magnetic induction
Method for double-sided processing of thin film transistors
Yuan, Hao-Chih; Wang, Guogong; Eriksson, Mark A.; Evans, Paul G.; Lagally, Max G.; Ma, Zhenqiang
2008-04-08
This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.
Fully printed metabolite sensor using organic electrochemical transistor
Scheiblin, Gaëtan; Aliane, Abdelkader; Coppard, Romain; Owens, Róisín. M.; Mailley, Pascal; Malliaras, George G.
2015-08-01
As conducting polymer based devices, organic electrochemical transistors (OECTs) are suited for printing process. The convenience of the screen-printing techniques allowed us to design and fabricate OECTs with a selected design and using different gate material. Depending on the material used, we were able to tune the transistor for different biological application. Ag/AgCl gate provided transistor with good transconductance, and electrochemical sensitivity to pH was provided by polyaniline ink. Finally, we validate the enzymatic sensing of glucose and lactate with a Poly(3,4-ethylene dioxythiophene) doped with poly(styrene sulfonate) (PEDOT:PSS) gate often used due to its biocompatible properties. The screen-printing process allowed us to fabricate a large amount of devices in a short period of time, using only commercially available grades of ink, showing by this way the possible transfer to industrial purpose.
Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R
2012-01-01
Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.
Transport and performance of a gate all around InAs nanowire transistor
International Nuclear Information System (INIS)
Alam, Khairul
2009-01-01
The transport physics and performance metrics of a gate all around an InAs nanowire transistor are studied using a three-dimensional quantum simulation. The transistor action of an InAs nanowire transistor occurs by modulating the transmission coefficient of the device. This action is different from a conventional metal-oxide-semiconductor field effect transistor, where the transistor action occurs by modulating the charge in the channel. The device has 82% tunneling current in the off-state and 81% thermal current in the on-state. The two current components become equal at a gate bias at which an approximate source-channel flat-band condition is achieved. Prior to this gate bias, the tunneling current dominates and the thermal current dominates beyond it. The device has an on/off current ratio of 7.84 × 10 5 and an inverse subthreshold slope of 63 mV dec −1 . The transistor operates in the quantum capacitance limit with a normalized transconductance value of 14.43 mS µm −1 , an intrinsic switching delay of 90.1675 fs, and an intrinsic unity current gain frequency of 6.8697 THz
Dose enhancement effects of X ray radiation in bipolar transistors
International Nuclear Information System (INIS)
Chen Panxun
1997-01-01
The author has presented behaviour degradation and dose enhancement effects of bipolar transistors in X ray irradiation environment. The relative dose enhancement factors of X ray radiation were measured in bipolar transistors by the experiment methods. The mechanism of bipolar device dose enhancement was investigated
Worst-Case Bias During Total Dose Irradiation of SOI Transistors
International Nuclear Information System (INIS)
Ferlet-Cavrois, V.; Colladant, T.; Paillet, P.; Leray, J.-L; Musseau, O.; Schwank, James R.; Shaneyfelt, Marty R.; Pelloie, J.L.; Du Port de Poncharra, J.
2000-01-01
The worst case bias during total dose irradiation of partially depleted SOI transistors (from SNL and from CEA/LETI) is correlated to the device architecture. Experiments and simulations are used to analyze SOI back transistor threshold voltage shift and charge trapping in the buried oxide
Pulse GaAs field transistor amplifier with subnanosecond time transient
International Nuclear Information System (INIS)
Sidnev, A.N.
1987-01-01
Pulse amplifier on fast field effect GaAs transistors with Schottky barrier is described. The amplifier contains four cascades, the first three of which are made on combined transistors on the common-drain circuit. The last cascade is made on high-power field effect GaAs transistor for coordination with 50 ohm load. The amplifier operates within the range of input signals from 0.5 up to 100 mV with repetition frequency up to 16 Hz, The gain of the amplifier is ≅ 20 dB. The setting time at output pulses amplitude up to 1 V constitutes ∼ 0.2 ns
Investigations of Tunneling for Field Effect Transistors
Matheu, Peter
2012-01-01
Over 40 years of scaling dimensions for new and continuing product cycles has introduced new challenges for transistor design. As the end of the technology roadmap for semiconductors approaches, new device structures are being investigated as possible replacements for traditional metal-oxide-semiconductor field effect transistors (MOSFETs). Band-to-band tunneling (BTBT) in semiconductors, often viewed as an adverse effect of short channel lengths in MOSFETs, has been discussed as a promising ...
International Nuclear Information System (INIS)
Li Da-Wei; Qin Jun-Rui; Chen Shu-Ming
2013-01-01
Using computer-aided design three-dimensional simulation technology, the supply voltage scaled dependency of the recovery of single event upset and charge collection in static random-access memory cells are investigated. It reveals that the recovery linear energy transfer threshold decreases with the supply voltage reducing, which is quite attractive for dynamic voltage scaling and subthreshold circuit radiation-hardened design. Additionally, the effect of supply voltage on charge collection is also investigated. It is concluded that the supply voltage mainly affects the bipolar gain of the parasitical bipolar junction transistor (BJT) and the existence of the source plays an important role in supply voltage variation. (geophysics, astronomy, and astrophysics)
Organic tunnel field effect transistors
Tietze, Max Lutz; Lussem, Bjorn; Liu, Shiyi
2017-01-01
Various examples are provided for organic tunnel field effect transistors (OTFET), and methods thereof. In one example, an OTFET includes a first intrinsic layer (i-layer) of organic semiconductor material disposed over a gate insulating layer
International Nuclear Information System (INIS)
Fujita, T; Jalil, M B A; Tan, S G
2008-01-01
We present a spin transistor design based on spin-orbital interactions in a two-dimensional electron gas, with magnetic barriers induced by a patterned ferromagnetic gate. The proposed device overcomes certain shortcomings of previous spin transistor designs such as long device length and degradation of conductance modulation for multi-channel transport. The robustness of our device for multi-channel transport is unique in spin transistor designs based on spin-orbit coupling. The device is more practical in fabrication and experimental respects compared to previously conceived single-mode spin transistors
Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao
2018-01-01
Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
High-frequency self-aligned graphene transistors with transferred gate stacks
Cheng, Rui; Bai, Jingwei; Liao, Lei; Zhou, Hailong; Chen, Yu; Liu, Lixin; Lin, Yung-Chen; Jiang, Shan; Huang, Yu; Duan, Xiangfeng
2012-01-01
Graphene has attracted enormous attention for radio-frequency transistor applications because of its exceptional high carrier mobility, high carrier saturation velocity, and large critical current density. Herein we report a new approach for the scalable fabrication of high-performance graphene transistors with transferred gate stacks. Specifically, arrays of gate stacks are first patterned on a sacrificial substrate, and then transferred onto arbitrary substrates with graphene on top. A self-aligned process, enabled by the unique structure of the transferred gate stacks, is then used to position precisely the source and drain electrodes with minimized access resistance or parasitic capacitance. This process has therefore enabled scalable fabrication of self-aligned graphene transistors with unprecedented performance including a record-high cutoff frequency up to 427 GHz. Our study defines a unique pathway to large-scale fabrication of high-performance graphene transistors, and holds significant potential for future application of graphene-based devices in ultra–high-frequency circuits. PMID:22753503
BUSFET -- A radiation-hardened SOI transistor
International Nuclear Information System (INIS)
Schwank, J.R.; Shaneyfelt, M.R.; Draper, B.L.; Dodd, P.E.
1999-01-01
The total-dose hardness of SOI technology is limited by radiation-induced charge trapping in gate, field, and SOI buried oxides. Charge trapping in the buried oxide can lead to back-channel leakage and makes hardening SOI transistors more challenging than hardening bulk-silicon transistors. Two avenues for hardening the back-channel are (1) to use specially prepared SOI buried oxides that reduce the net amount of trapped positive charge or (2) to design transistors that are less sensitive to the effects of trapped charge in the buried oxide. In this work, the authors propose a partially-depleted SOI transistor structure for mitigating the effects of trapped charge in the buried oxide on radiation hardness. They call this structure the BUSFET--Body Under Source FET. The BUSFET utilizes a shallow source and a deep drain. As a result, the silicon depletion region at the back channel caused by radiation-induced charge trapping in the buried oxide does not form a conducting path between source and drain. Thus, the BUSFET structure design can significantly reduce radiation-induced back-channel leakage without using specially prepared buried oxides. Total dose hardness is achieved without degrading the intrinsic SEU or dose rate hardness of SOI technology. The effectiveness of the BUSFET structure for reducing total-dose back-channel leakage depends on several variables, including the top silicon film thickness and doping concentration, and the depth of the source. 3-D simulations show that for a body doping concentration of 10 18 cm -3 , a drain bias of 3 V, and a source depth of 90 nm, a silicon film thickness of 180 nm is sufficient to almost completely eliminate radiation-induced back-channel leakage. However, for a doping concentration of 3 x 10 17 cm -3 , a thicker silicon film (300 nm) must be used
Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches
International Nuclear Information System (INIS)
Schwarze, G.E.; Frasca, A.J.
1994-01-01
The effects of neutrons and gamma rays on the electrical and switching characteristics of power semiconductor switches must be known and understood by the designer of the power conditioning, control, and transmission subsystem of space nuclear power systems. The SP-100 radiation requirements at 25 m from the nuclear source are a neutron fluence of 10 13 n/cm 2 and a gamma dose of 0.5 Mrads. Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN Bipolar Junction Transistors (BJTs), Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), and Static Induction Transistors (SITs) are given in this paper. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Post-irradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed
Progresses in organic field-effect transistors and molecular electronics
Institute of Scientific and Technical Information of China (English)
Wu Weiping; Xu Wei; Hu Wenping; Liu Yunqi; Zhu Daoben
2006-01-01
In the past years,organic semiconductors have been extensively investigated as electronic materials for organic field-effect transistors (OFETs).In this review,we briefly summarize the current status of organic field-effect transistors including materials design,device physics,molecular electronics and the applications of carbon nanotubes in molecular electronics.Future prospects and investigations required to improve the OFET performance are also involved.
A Vertical Organic Transistor Architecture for Fast Nonvolatile Memory.
She, Xiao-Jian; Gustafsson, David; Sirringhaus, Henning
2017-02-01
A new device architecture for fast organic transistor memory is developed, based on a vertical organic transistor configuration incorporating high-performance ambipolar conjugated polymers and unipolar small molecules as the transport layers, to achieve reliable and fast programming and erasing of the threshold voltage shift in less than 200 ns. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Directory of Open Access Journals (Sweden)
M. S. MANNA
2011-12-01
Full Text Available The development of electromagnetic devices as machines, transformers, heating devices confronts the engineers with several problems. For the design of an optimized geometry and the prediction of the operational behaviour an accurate knowledge of the dependencies of the field quantities inside the magnetic circuits is necessary. This paper provides the eddy current and core flux density distribution analysis in linear induction motor. Magnetic flux in the air gap of the Linear Induction Motor (LIM is reduced to various losses such as end effects, fringes, effect, skin effects etc. The finite element based software package COMSOL Multiphysics Inc. USA is used to get the reliable and accurate computational results for optimization the performance of Linear Induction Motor (LIM. The geometrical characteristics of LIM are varied to find the optimal point of thrust and minimum flux leakage during static and dynamic conditions.
High Stability Pentacene Transistors Using Polymeric Dielectric Surface Modifier.
Wang, Xiaohong; Lin, Guangqing; Li, Peng; Lv, Guoqiang; Qiu, Longzhen; Ding, Yunsheng
2015-08-01
1,6-bis(trichlorosilyl)hexane (C6Cl), polystyrene (PS), and cross-linked polystyrene (CPS) were investigated as gate dielectric modified layers for high performance organic transistors. The influence of the surface energy, roughness and morphology on the charge transport of the organic thin-film transistors (OTFTs) was investigated. The surface energy and roughness both affect the grain size of the pentacene films which will control the charge carrier mobility of the devices. Pentacene thin-film transistors fabricated on the CPS modified dielectric layers exhibited charge carrier mobility as high as 1.11 cm2 V-1 s-1. The bias stress stability for the CPS devices shows that the drain current only decays 1% after 1530 s and the mobility never decreases until 13530 s.
Oxygen effect on the electrical characteristics of pentacene transistors
International Nuclear Information System (INIS)
Hu Yan; Dong Guifang; Hu Yuanchuan; Wang Liduo; Qiu Yong
2006-01-01
The effect of oxygen on the electrical characteristics of organic thin film transistors with pentacene as the active layer has been investigated. The saturation currents and mobilities of the transistors increase as the ambient oxygen concentration decreases, which is ascribed to the formation of a charge transfer complex between pentacene and O 2 . The deposition rate of the pentacene layer affects this phenomenon. The transistor with the pentacene layer deposited at a rate of 15 nm min -1 shows higher sensitivity to oxygen concentration than the device with the pentacene layer deposited at 30 nm min -1 . We suggest that when deposited at a lower rate the pentacene film is less compact, leading to easier entrance of oxygen into the charge accumulation region
From Static Output Feedback to Structured Robust Static Output Feedback: A Survey
Sadabadi , Mahdieh ,; Peaucelle , Dimitri
2016-01-01
This paper reviews the vast literature on static output feedback design for linear time-invariant systems including classical results and recent developments. In particular, we focus on static output feedback synthesis with performance specifications, structured static output feedback, and robustness. The paper provides a comprehensive review on existing design approaches including iterative linear matrix inequalities heuristics, linear matrix inequalities with rank constraints, methods with ...
International Nuclear Information System (INIS)
Karimov, A.V.; Yodgorova, D.M.; Kamanov, B.M.; Giyasova, F.A.; Yakudov, A.A.
2012-01-01
The silicon field-effect transistors were investigated to use in circuits for stabilization of current and voltage. As in gallium arsenide field-effect transistors, in silicon field-effect transistors with p-n-junction a new mechanism of saturation of the drain current is experimentally found out due to both transverse and longitudinal compression of channel by additional resistance between the source and the gate of the transistor. The criteria for evaluating the coefficients of stabilization of transient current suppressors and voltage stabilizator based on the field-effect transistor are considered. (authors)
Organic field-effect transistors using single crystals
International Nuclear Information System (INIS)
Hasegawa, Tatsuo; Takeya, Jun
2009-01-01
Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20-40 cm 2 Vs -1 , achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps. (topical review)
Circuit and method for controlling the threshold voltage of transistors.
2008-01-01
A control unit, for controlling a threshold voltage of a circuit unit having transistor devices, includes a reference circuit and a measuring unit. The measuring unit is configured to measure a threshold voltage of at least one sensing transistor of the circuit unit, and to measure a threshold
Large-area WSe2 electric double layer transistors on a plastic substrate
Funahashi, Kazuma; Pu, Jiang; Li, Ming Yang; Li, Lain-Jong; Iwasa, Yoshihiro; Takenobu, Taishi
2015-01-01
Due to the requirements for large-area, uniform films, currently transition metal dichalcogenides (TMDC) cannot be used in flexible transistor industrial applications. In this study, we first transferred chemically grown large-area WSe2 monolayer films from the as-grown sapphire substrates to the flexible plastic substrates. We also fabricated electric double layer transistors using the WSe2 films on the plastic substrates. These transistors exhibited ambipolar operation and an ON/OFF current ratio of ∼104, demonstrating chemically grown WSe2 transistors on plastic substrates for the first time. This achievement can be an important first step for the next-generation TMDC based flexible devices. © 2015 The Japan Society of Applied Physics.
Large-area WSe2 electric double layer transistors on a plastic substrate
Funahashi, Kazuma
2015-04-27
Due to the requirements for large-area, uniform films, currently transition metal dichalcogenides (TMDC) cannot be used in flexible transistor industrial applications. In this study, we first transferred chemically grown large-area WSe2 monolayer films from the as-grown sapphire substrates to the flexible plastic substrates. We also fabricated electric double layer transistors using the WSe2 films on the plastic substrates. These transistors exhibited ambipolar operation and an ON/OFF current ratio of ∼104, demonstrating chemically grown WSe2 transistors on plastic substrates for the first time. This achievement can be an important first step for the next-generation TMDC based flexible devices. © 2015 The Japan Society of Applied Physics.
Effect of 1MeV electron beam on transistors and circuits
International Nuclear Information System (INIS)
Lee, Tae Hoon
1998-02-01
It has been known that semiconductor devices operating in a radiation environment exhibited significant alterations of their electrical responses. Since an electron beam bombardment produces lattice damage in Si and charged defects in SiO 2 , several electrical parameters of transistors exhibit significant changes. Those parameters are the current gain of BJT (Bipolar Junction Transistor) and the threshold voltage of MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The degradation of transistors brings about that of circuits. This paper presents the results of experiments and simulations performed to study the effects of 1MeV electron beam irradiation on selected silicon transistors and circuits. For BJTs, the current gains of npn (2N3904) and pnp (2N3906) linearly decreased as the irradiation dose increased, and from this result, the damage constants, Ks were obtained as 13.65 for 2N3904 and 22.52 for 2N3906 in MGy, indicating a more stable operation in the electron radiation environment for pnp than that for npn. The decrease of current gain was due to that of minority-carrier lifetime in the base region. For MOSFETs (CD4007s), the threshold voltages of NMOS and PMOS shifted to the lower values, which was resulted from the accumulation of charge in SiO 2 . The charges could be categorized into fixed oxide charge and interfacial trap charge. From experimental results, the amounts of the induced charges could be quantitatively estimated. These degradations of transistors brought about the decrease in the voltage gain of CE (Common Emitter) amplifier and the shifts in the inverting voltage of inverter. Additionally, PSpice simulations of these circuits were carried out by modeling of irradiated transistors. The comparison of simulation with experiment showed the relatively good agreement of simulation for the degradation of circuits after irradiation
Pushing the Performance Limit of Sub-100 nm Molybdenum Disulfide Transistors.
Liu, Yuan; Guo, Jian; Wu, Yecun; Zhu, Enbo; Weiss, Nathan O; He, Qiyuan; Wu, Hao; Cheng, Hung-Chieh; Xu, Yang; Shakir, Imran; Huang, Yu; Duan, Xiangfeng
2016-10-12
Two-dimensional semiconductors (2DSCs) such as molybdenum disulfide (MoS 2 ) have attracted intense interest as an alternative electronic material in the postsilicon era. However, the ON-current density achieved in 2DSC transistors to date is considerably lower than that of silicon devices, and it remains an open question whether 2DSC transistors can offer competitive performance. A high current device requires simultaneous minimization of the contact resistance and channel length, which is a nontrivial challenge for atomically thin 2DSCs, since the typical low contact resistance approaches for 2DSCs either degrade the electronic properties of the channel or are incompatible with the fabrication process for short channel devices. Here, we report a new approach toward high-performance MoS 2 transistors by using a physically assembled nanowire as a lift-off mask to create ultrashort channel devices with pristine MoS 2 channel and self-aligned low resistance metal/graphene hybrid contact. With the optimized contact in short channel devices, we demonstrate sub-100 nm MoS 2 transistor delivering a record high ON-current of 0.83 mA/μm at 300 K and 1.48 mA/μm at 20 K, which compares well with that of silicon devices. Our study, for the first time, demonstrates that the 2DSC transistors can offer comparable performance to the 2017 target for silicon transistors in International Technology Roadmap for Semiconductors (ITRS), marking an important milestone in 2DSC electronics.
The total dose effects on the 1/f noise of deep submicron CMOS transistors
International Nuclear Information System (INIS)
Hu Rongbin; Wang Yuxin; Lu Wu
2014-01-01
Using 0.18 μm CMOS transistors, the total dose effects on the 1/f noise of deep-submicron CMOS transistors are studied for the first time in mainland China. From the experimental results and the theoretic analysis, we realize that total dose radiation causes a lot of trapped positive charges in STI (shallow trench isolation) SiO 2 layers, which induces a current leakage passage, increasing the 1/f noise power of CMOS transistors. In addition, we design some radiation-hardness structures on the CMOS transistors and the experimental results show that, until the total dose achieves 750 krad, the 1/f noise power of the radiation-hardness CMOS transistors remains unchanged, which proves our conclusion. (semiconductor devices)
Transistor design considerations for low-noise preamplifiers
International Nuclear Information System (INIS)
Fair, R.B.
1976-01-01
A review is presented of design considerations for GaAs Schottky-barrier FETs and other types of transistors in low-noise amplifiers for capacitive sources which are used in nuclear radiation detectors and high speed fiber-optic communication systems. Ultimate limits on performance are evaluated in terms of the g/sub m//C/sub i/ ratio and the gate leakage current to minimize the noise sources. Si bipolar transistors and the future prospects of GaAs, Si and InAs MISFETs are discussed, and performance is compared to FETs currently being used in low-noise preamplifiers
Total dose induced latch in short channel NMOS/SOI transistors
International Nuclear Information System (INIS)
Ferlet-Cavrois, V.; Quoizola, S.; Musseau, O.; Flament, O.; Leray, J.L.; Pelloie, J.L.; Raynaud, C.; Faynot, O.
1998-01-01
A latch effect induced by total dose irradiation is observed in short channel SOI transistors. This effect appears on NMOS transistors with either a fully or a partially depleted structure. It is characterized by a hysteresis behavior of the Id-Vg characteristics at high drain bias for a given critical dose. Above this dose, the authors still observe a limited leakage current at low drain bias (0.1 V), but a high conduction current at high drain bias (2 V) as the transistor should be in the off-state. The critical dose above which the latch appears strongly depends on gate length, transistor structure (fully or partially depleted), buried oxide thickness and supply voltage. Two-dimensional (2D) numerical simulations indicate that the parasitic condition is due to the latch of the back gate transistor triggered by charge trapping in the buried oxide. To avoid the latch induced by the floating body effect, different techniques can be used: doping engineering, body contacts, etc. The study of the main parameters influencing the latch (gate length, supply voltage) shows that the scaling of technologies does not necessarily imply an increased latch sensitivity. Some technological parameters like the buried oxide hardness and thickness can be used to avoid latch, even at high cumulated dose, on highly integrated SOI technologies
Static electricity: A literature review
Crow, Rita M.
1991-11-01
The major concern with static electricity is its discharging in a flammable atmosphere which can explode and cause a fire. Textile materials can have their electrical resistivity decreased by the addition of antistatic finishes, imbedding conductive particles into the fibres or by adding metal fibers to the yarns. The test methods used in the studies of static electricity include measuring the static properties of materials, of clothed persons, and of the ignition energy of flammable gases. Surveys have shown that there is sparse evidence for fires definitively being caused by static electricity. However, the 'worst-case' philosophy has been adopted and a static electricity safety code is described, including correct grounding procedures and the wearing of anti-static clothing and footwear.
Noise characteristics of single-walled carbon nanotube network transistors
International Nuclear Information System (INIS)
Kim, Un Jeong; Kim, Kang Hyun; Kim, Kyu Tae; Min, Yo-Sep; Park, Wanjun
2008-01-01
The noise characteristics of randomly networked single-walled carbon nanotubes grown directly by plasma enhanced chemical vapor deposition (PECVD) are studied with field effect transistors (FETs). Due to the geometrical complexity of nanotube networks in the channel area and the large number of tube-tube/tube-metal junctions, the inverse frequency, 1/f, dependence of the noise shows a similar level to that of a single single-walled carbon nanotube transistor. Detailed analysis is performed with the parameters of number of mobile carriers and mobility in the different environment. This shows that the change in the number of mobile carriers resulting in the mobility change due to adsorption and desorption of gas molecules (mostly oxygen molecules) to the tube surface is a key factor in the 1/f noise level for carbon nanotube network transistors
Fan, Ching-Lin; Shang, Ming-Chi; Wang, Shea-Jue; Hsia, Mao-Yuan; Lee, Win-Der; Huang, Bohr-Ran
2017-01-01
In this study, a proposed Microwave-Induction Heating (MIH) scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO) metal below the Poly(4-vinylphenol) (PVP) film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit) was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min) and low-power microwave-irradiation (50 W). PMID:28773101
Directory of Open Access Journals (Sweden)
Ching-Lin Fan
2017-07-01
Full Text Available In this study, a proposed Microwave-Induction Heating (MIH scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO metal below the Poly(4-vinylphenol (PVP film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min and low-power microwave-irradiation (50 W.
Design Optimization of Transistors Used for Neural Recording
Directory of Open Access Journals (Sweden)
Eric Basham
2012-01-01
Full Text Available Neurons cultured directly over open-gate field-effect transistors result in a hybrid device, the neuron-FET. Neuron-FET amplifier circuits reported in the literature employ the neuron-FET transducer as a current-mode device in conjunction with a transimpedance amplifier. In this configuration, the transducer does not provide any signal gain, and characterization of the transducer out of the amplification circuit is required. Furthermore, the circuit requires a complex biasing scheme that must be retuned to compensate for drift. Here we present an alternative strategy based on the gm/Id design approach to optimize a single-stage common-source amplifier design. The gm/Id design approach facilitates in circuit characterization of the neuron-FET and provides insight into approaches to improving the transistor process design for application as a neuron-FET transducer. Simulation data for a test case demonstrates optimization of the transistor design and significant increase in gain over a current mode implementation.
Effect of Disorder on the Conductance of Spin Field Effect Transistors (SPINFET)
Cahay, M.; Bandyopadhyay, S.
2003-01-01
We show that the conductance of Spin Field Effect Transistors (SPINFET) [Datta and Das, Appl. Phys. Lett., Vol. 56, 665 (1990)] is affected by a single (non-magnetic) impurity in the transistor's channel. The extreme sensitivity of the amplitude and phase of the transistor's conductance oscillations to the location of a single impurity in the channel is reminiscent of the phenomenon of universal conductance fluctuations in mesoscopic samples and is extremely problematic as far as device imple...
Energy Technology Data Exchange (ETDEWEB)
Curry, M. J. [Department of Physics and Astronomy, University of New Mexico, Albuquerque, New Mexico 87131 (United States); Center for Quantum Information and Control, University of New Mexico, Albuquerque, New Mexico 87131 (United States); Sandia National Laboratories, 1515 Eubank Blvd SE, Albuquerque, New Mexico 87123 (United States); England, T. D.; Bishop, N. C.; Ten-Eyck, G.; Wendt, J. R.; Pluym, T.; Lilly, M. P.; Carroll, M. S. [Sandia National Laboratories, 1515 Eubank Blvd SE, Albuquerque, New Mexico 87123 (United States); Carr, S. M. [Center for Quantum Information and Control, University of New Mexico, Albuquerque, New Mexico 87131 (United States); Sandia National Laboratories, 1515 Eubank Blvd SE, Albuquerque, New Mexico 87123 (United States)
2015-05-18
We examine a silicon-germanium heterojunction bipolar transistor (HBT) for cryogenic pre-amplification of a single electron transistor (SET). The SET current modulates the base current of the HBT directly. The HBT-SET circuit is immersed in liquid helium, and its frequency response from low frequency to several MHz is measured. The current gain and the noise spectrum with the HBT result in a signal-to-noise-ratio (SNR) that is a factor of 10–100 larger than without the HBT at lower frequencies. The transition frequency defined by SNR = 1 has been extended by as much as a factor of 10 compared to without the HBT amplification. The power dissipated by the HBT cryogenic pre-amplifier is approximately 5 nW to 5 μW for the investigated range of operation. The circuit is also operated in a single electron charge read-out configuration in the time-domain as a proof-of-principle demonstration of the amplification approach for single spin read-out.
Graphene-graphite oxide field-effect transistors.
Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc
2012-03-14
Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society
Cylindrical-shaped nanotube field effect transistor
Hussain, Muhammad Mustafa; Fahad, Hossain M.; Smith, Casey E.; Rojas, Jhonathan Prieto
2015-01-01
A cylindrical-shaped nanotube FET may be manufactured on silicon (Si) substrates as a ring etched into a gate stack and filled with semiconductor material. An inner gate electrode couples to a region of the gate stack inside the inner circumference of the ring. An outer gate electrode couples to a region of the gate stack outside the outer circumference of the ring. The multi-gate cylindrical-shaped nanotube FET operates in volume inversion for ring widths below 15 nanometers. The cylindrical-shaped nanotube FET demonstrates better short channel effect (SCE) mitigation and higher performance (I.sub.on/I.sub.off) than conventional transistor devices. The cylindrical-shaped nanotube FET may also be manufactured with higher yields and cheaper costs than conventional transistors.
Cylindrical-shaped nanotube field effect transistor
Hussain, Muhammad Mustafa
2015-12-29
A cylindrical-shaped nanotube FET may be manufactured on silicon (Si) substrates as a ring etched into a gate stack and filled with semiconductor material. An inner gate electrode couples to a region of the gate stack inside the inner circumference of the ring. An outer gate electrode couples to a region of the gate stack outside the outer circumference of the ring. The multi-gate cylindrical-shaped nanotube FET operates in volume inversion for ring widths below 15 nanometers. The cylindrical-shaped nanotube FET demonstrates better short channel effect (SCE) mitigation and higher performance (I.sub.on/I.sub.off) than conventional transistor devices. The cylindrical-shaped nanotube FET may also be manufactured with higher yields and cheaper costs than conventional transistors.
High-mobility pyrene-based semiconductor for organic thin-film transistors.
Cho, Hyunduck; Lee, Sunyoung; Cho, Nam Sung; Jabbour, Ghassan E; Kwak, Jeonghun; Hwang, Do-Hoon; Lee, Changhee
2013-05-01
Numerous conjugated oligoacenes and polythiophenes are being heavily studied in the search for high-mobility organic semiconductors. Although many researchers have designed fused aromatic compounds as organic semiconductors for organic thin-film transistors (OTFTs), pyrene-based organic semiconductors with high mobilities and on-off current ratios have not yet been reported. Here, we introduce a new pyrene-based p-type organic semiconductor showing liquid crystal behavior. The thin film characteristics of this material are investigated by varying the substrate temperature during the deposition and the gate dielectric condition using the surface modification with a self-assembled monolayer, and systematically studied in correlation with the performances of transistor devices with this compound. OTFT fabricated under the optimum deposition conditions of this compound, namely, 1,6-bis(5'-octyl-2,2'-bithiophen-5-yl)pyrene (BOBTP) shows a high-performance transistor behavior with a field-effect mobility of 2.1 cm(2) V(-1) s(-1) and an on-off current ratio of 7.6 × 10(6) and enhanced long-term stability compared to the pentacene thin-film transistor.
Complementary Self-Biased Logics Based on Single-Electron Transistor (SET)/CMOS Hybrid Process
Song, Ki-Whan; Lee, Yong Kyu; Sim, Jae Sung; Kim, Kyung Rok; Lee, Jong Duk; Park, Byung-Gook; You, Young Sub; Park, Joo-On; Jin, You Seung; Kim, Young-Wug
2005-04-01
We propose a complementary self-biasing method which enables the single-electron transistor (SET)/complementary metal-oxide semiconductor (CMOS) hybrid multi-valued logics (MVLs) to operate well at high temperatures, where the peak-to-valley current ratio (PVCR) of the Coulomb oscillation markedly decreases. The new architecture is implemented with a few transistors by utilizing the phase control capability of the sidewall depletion gates in dual-gate single-electron transistors (DGSETs). The suggested scheme is evaluated by a SPICE simulation with an analytical DGSET model. Furthermore, we have developed a new process technology for the SET/CMOS hybrid systems. We have confirmed that both of the fabricated devices, namely, SET and CMOS transistors, exhibit the ideal characteristics for the complementary self-biasing scheme: the SET shows clear Coulomb oscillations with a 100 mV period and the CMOS transistors show a high voltage gain.
Polarization sensitive detection of 100 GHz radiation by high mobility field-effect transistors
International Nuclear Information System (INIS)
Sakowicz, M.; Lusakowski, J.; Karpierz, K.; Grynberg, M.; Knap, W.; Gwarek, W.
2008-01-01
Detection of 100 GHz electromagnetic radiation by a GaAs/AlGaAs high electron mobility field-effect transistor was investigated at 300 K as a function of the angle α between the direction of linear polarization of the radiation and the symmetry axis of the transistor. The angular dependence of the detected signal was found to be A 0 cos 2 (α-α 0 )+C with A 0 , α 0 , and C dependent on the electrical polarization of the transistor gate. This dependence is interpreted as due to excitation of two crossed phase-shifted oscillators. A response of the transistor chip (including bonding wires and the substrate) to 100 GHz radiation was numerically simulated. Results of calculations confirmed experimentally observed dependencies and showed that the two oscillators result from an interplay of 100 GHz currents defined by the transistor impedance together with bonding wires and substrate related modes
Directory of Open Access Journals (Sweden)
Yefymovych A. P.
2014-02-01
Full Text Available The authors present a new method of construction and calculation of the output load circuit (OLC for class F power amplifiers (PA with the addition of the third harmonic of the voltage. This method allows compensating the negative influences of parasitic elements of transistor (output capacitance — COUT, and inductance — LOUT on the drain efficiency of the amplifier. The circuit of the parasitic elements was considered as a part of the proposed OLC. To calculate the OLC a system of three algebraic equations was compiled. The system is solved numerically relative to the three parameters of the OLC, for which the impedance on a chip of the transistor (on COUT for odd and even harmonics corresponds to the theory of class F PAs. This method is applicable for the calculation of the OLC, which is realized in the frequency range of 300—500 MHz, where the use of elements with lumped parameters only is not always possible, while using elements with distributed parameters leads to a substantial increase in the size of the whole amplifier. In the developed OLC, the authors used elements with both lumped and distributed parameters, thus achieving a compromise between the geometric dimensions and physical realizability of the circuit elements. The proposed OLC, taking into account the parasitic elements of the transistor, allows setting impedances independently at the first and third harmonics while maintaining impedance at the second harmonic tending to zero. This makes it possible to optimize the drain efficiency at a given level of output power. The efficiency ?d = 72,5% was experimentally obtained at POUT = 1,045 W for the class F amplifier running at 400 MHz. The proposed methodology for constructing and calculating the OLC can be used to implement class F power amplifiers in the integrated-circuit form.
Recent advances in understanding total-dose effects in bipolar transistors
International Nuclear Information System (INIS)
Schrimpf, R.D.
1996-01-01
Gain degradation in irradiated bipolar transistors can be a significant problem, particularly in linear integrated circuits. In many bipolar technologies, the degradation is greater for irradiation at low dose rates than it is for typical laboratory dose rates. Ionizing radiation causes the base current in bipolar transistors to increase, due to the presence of net positive charge in the oxides covering sensitive device areas and increases in surface recombination velocity. Understanding the mechanisms responsible for radiation-induced gain degradation in bipolar transistors is important in developing appropriate hardness assurance methods. This paper reviews recent modeling and experimental work, with the emphasis on low-dose-rate effects. A promising hardness assurance method based on irradiation at elevated temperatures is described
High Power Self-Aligned, Trench-Implanted 4H-SiC JFETs
Directory of Open Access Journals (Sweden)
Vamvoukakis K.
2017-01-01
Full Text Available The process technology for the fabrication of 4H-SiC trenched-implanted-gate 4H–SiC vertical-channel JFET (TI-VJFET has been developed. The optimized TIVJFETs have been fabricated with self-aligned nickel silicide source and gate contacts using a process sequence that greatly reduces process complexity as it includes only four lithography steps. A source-pillars sidewall oxidation and subsequent removal of the metallization from the top of the sidewall oxide ensured isolation between gate and source. Optimum planarization of the source pillars top has been performed by cyclotene spin coating and etch back. The effect of the channel geometry on the electrical characteristics has been studied by varying its length (0.3 and 1.2μm and its width (1.5-5μm. The voltage blocking exhibits a triode shape, which is typical for a static-induction transistor (SIT operation. The transistors exhibited high ON current handling capabilities (Direct Current density >1kA/cm2 and values of RON ranging from 6 - 12 mΩ•cm2 depending on the channel length. Maximum voltage blocking was 800V limited by the edge termination. The maximum voltage gain was 51. Most transistors were normally-on. Normally-off operation has been observed for transistors lower than 2μm channel width (mask level and deep implantation.
GaN transistors on Si for switching and high-frequency applications
Ueda, Tetsuzo; Ishida, Masahiro; Tanaka, Tsuyoshi; Ueda, Daisuke
2014-10-01
In this paper, recent advances of GaN transistors on Si for switching and high-frequency applications are reviewed. Novel epitaxial structures including superlattice interlayers grown by metal organic chemical vapor deposition (MOCVD) relieve the strain and eliminate the cracks in the GaN over large-diameter Si substrates up to 8 in. As a new device structure for high-power switching application, Gate Injection Transistors (GITs) with a p-AlGaN gate over an AlGaN/GaN heterostructure successfully achieve normally-off operations maintaining high drain currents and low on-state resistances. Note that the GITs on Si are free from current collapse up to 600 V, by which the drain current would be markedly reduced after the application of high drain voltages. Highly efficient operations of an inverter and DC-DC converters are presented as promising applications of GITs for power switching. The high efficiencies in an inverter, a resonant LLC converter, and a point-of-load (POL) converter demonstrate the superior potential of the GaN transistors on Si. As for high-frequency transistors, AlGaN/GaN heterojuction field-effect transistors (HFETs) on Si designed specifically for microwave and millimeter-wave frequencies demonstrate a sufficiently high output power at these frequencies. Output powers of 203 W at 2.5 GHz and 10.7 W at 26.5 GHz are achieved by the fabricated GaN transistors. These devices for switching and high-frequency applications are very promising as future energy-efficient electronics because of their inherent low fabrication cost and superior device performance.
BUSFET - A Novel Radiation-Hardened SOI Transistor
International Nuclear Information System (INIS)
Schwank, J.R.; Shaneyfelt, M.R.; Draper, B.L.; Dodd, P.E.
1999-01-01
The total-dose hardness of SOI technology is limited by radiation-induced charge trapping in gate, field, and SOI buried oxides. Charge trapping in the buried oxide can lead to back-channel leakage and makes hardening SOI transistors more challenging than hardening bulk-silicon transistors. Two avenues for hardening the back-channel are (1) to use specially prepared SOI buried oxides that reduce the net amount of trapped positive charge or (2) to design transistors that are less sensitive to the effects of trapped charge in the buried oxide. In this work, we propose a new partially-depleted SOI transistor structure that we call the BUSFET--Body Under Source FET. The BUSFET utilizes a shallow source and a deep drain. As a result, the silicon depletion region at the back channel caused by radiation-induced charge trapping in the buried oxide does not form a conducting path between source and drain. Thus, the BUSFET structure design can significantly reduce radiation-induced back-channel leakage without using specially prepared buried oxides. Total dose hardness is achieved without degrading the intrinsic SEU and dose rate hardness of SOI technology. The effectiveness of the BUSFET structure for reducing total-dose back-channel leakage depends on several variables, including the top silicon film thickness and doping concentration and the depth of the source. 3-D simulations show that for a doping concentration of 10 18 cm -3 and a source depth of 90 nm, a silicon film thickness of 180 nm is sufficient to almost completely eliminate radiation-induced back-channel leakage. However, for a doping concentration of 3x10 17 cm -3 , a thicker silicon film (300 nm) must be used
Organic field-effect transistors using single crystals
Directory of Open Access Journals (Sweden)
Tatsuo Hasegawa and Jun Takeya
2009-01-01
Full Text Available Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs, the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20–40 cm2 Vs−1, achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps.
Electrostatic charges in v x B fields and the phenomenon of induction
International Nuclear Information System (INIS)
Bringuier, Eric
2003-01-01
The appearance of electrostatic charges in a moving conductor subjected to a static magnetic field is reviewed, and the ensuing electric field is shown to obey Faraday's law of induction. The charge density and the electric field are determined analytically in detail in the case of a circular loop rotating in a uniform magnetic field. The case of a non-conductor moving in a magnetic field is also dealt with. Non-relativistic reasoning and calculations are used throughout
Electrostatic charges in v x B fields and the phenomenon of induction
Bringuier, E
2003-01-01
The appearance of electrostatic charges in a moving conductor subjected to a static magnetic field is reviewed, and the ensuing electric field is shown to obey Faraday's law of induction. The charge density and the electric field are determined analytically in detail in the case of a circular loop rotating in a uniform magnetic field. The case of a non-conductor moving in a magnetic field is also dealt with. Non-relativistic reasoning and calculations are used throughout.
A pattern recognition approach to transistor array parameter variance
da F. Costa, Luciano; Silva, Filipi N.; Comin, Cesar H.
2018-06-01
The properties of semiconductor devices, including bipolar junction transistors (BJTs), are known to vary substantially in terms of their parameters. In this work, an experimental approach, including pattern recognition concepts and methods such as principal component analysis (PCA) and linear discriminant analysis (LDA), was used to experimentally investigate the variation among BJTs belonging to integrated circuits known as transistor arrays. It was shown that a good deal of the devices variance can be captured using only two PCA axes. It was also verified that, though substantially small variation of parameters is observed for BJT from the same array, larger variation arises between BJTs from distinct arrays, suggesting the consideration of device characteristics in more critical analog designs. As a consequence of its supervised nature, LDA was able to provide a substantial separation of the BJT into clusters, corresponding to each transistor array. In addition, the LDA mapping into two dimensions revealed a clear relationship between the considered measurements. Interestingly, a specific mapping suggested by the PCA, involving the total harmonic distortion variation expressed in terms of the average voltage gain, yielded an even better separation between the transistor array clusters. All in all, this work yielded interesting results from both semiconductor engineering and pattern recognition perspectives.
Combinatorial study of zinc tin oxide thin-film transistors
McDowell, M. G.; Sanderson, R. J.; Hill, I. G.
2008-01-01
Groups of thin-film transistors using a zinc tin oxide semiconductor layer have been fabricated via a combinatorial rf sputtering technique. The ZnO :SnO2 ratio of the film varies as a function of position on the sample, from pure ZnO to SnO2, allowing for a study of zinc tin oxide transistor performance as a function of channel stoichiometry. The devices were found to have mobilities ranging from 2to12cm2/Vs, with two peaks in mobility in devices at ZnO fractions of 0.80±0.03 and 0.25±0.05, and on/off ratios as high as 107. Transistors composed predominantly of SnO2 were found to exhibit light sensitivity which affected both the on/off ratios and threshold voltages of these devices.
Graphene Field Effect Transistor for Radiation Detection
Li, Mary J. (Inventor); Chen, Zhihong (Inventor)
2016-01-01
The present invention relates to a graphene field effect transistor-based radiation sensor for use in a variety of radiation detection applications, including manned spaceflight missions. The sensing mechanism of the radiation sensor is based on the high sensitivity of graphene in the local change of electric field that can result from the interaction of ionizing radiation with a gated undoped silicon absorber serving as the supporting substrate in the graphene field effect transistor. The radiation sensor has low power and high sensitivity, a flexible structure, and a wide temperature range, and can be used in a variety of applications, particularly in space missions for human exploration.
Deformable Organic Nanowire Field-Effect Transistors.
Lee, Yeongjun; Oh, Jin Young; Kim, Taeho Roy; Gu, Xiaodan; Kim, Yeongin; Wang, Ging-Ji Nathan; Wu, Hung-Chin; Pfattner, Raphael; To, John W F; Katsumata, Toru; Son, Donghee; Kang, Jiheong; Matthews, James R; Niu, Weijun; He, Mingqian; Sinclair, Robert; Cui, Yi; Tok, Jeffery B-H; Lee, Tae-Woo; Bao, Zhenan
2018-02-01
Deformable electronic devices that are impervious to mechanical influence when mounted on surfaces of dynamically changing soft matters have great potential for next-generation implantable bioelectronic devices. Here, deformable field-effect transistors (FETs) composed of single organic nanowires (NWs) as the semiconductor are presented. The NWs are composed of fused thiophene diketopyrrolopyrrole based polymer semiconductor and high-molecular-weight polyethylene oxide as both the molecular binder and deformability enhancer. The obtained transistors show high field-effect mobility >8 cm 2 V -1 s -1 with poly(vinylidenefluoride-co-trifluoroethylene) polymer dielectric and can easily be deformed by applied strains (both 100% tensile and compressive strains). The electrical reliability and mechanical durability of the NWs can be significantly enhanced by forming serpentine-like structures of the NWs. Remarkably, the fully deformable NW FETs withstand 3D volume changes (>1700% and reverting back to original state) of a rubber balloon with constant current output, on the surface of which it is attached. The deformable transistors can robustly operate without noticeable degradation on a mechanically dynamic soft matter surface, e.g., a pulsating balloon (pulse rate: 40 min -1 (0.67 Hz) and 40% volume expansion) that mimics a beating heart, which underscores its potential for future biomedical applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
INDUCTIVE ANALYSIS OF THE DEFORMATION OF THE ARCHED TRUSS
Directory of Open Access Journals (Sweden)
Mikhail N. Kirsanov
2018-03-01
Full Text Available An analytical solution to the problem of the deflection of a flat arched statically determinate truss un-der the action of a uniformly distributed and concentrated load is obtained and analyzed. To obtain the depend-ence of the deflection on the number of panels, an induction method was used in two parameters — the number of panels in the crossbar and the number of panels in the supporting side trusses. All transformations and analysis are performed in the system of computer mathematics Maple. Expressions for the forces in individual rods are found. The asymptotic approximation of solutions is obtained.
Proton migration mechanism for the instability of organic field-effect transistors
Sharma, A.; Mathijssen, S.G.J.; Kemerink, M.; Leeuw, de D.M.; Bobbert, P.A.
2009-01-01
During prolonged application of a gate bias, organic field-effect transistors show an instability involving a gradual shift of the threshold voltage toward the applied gate bias voltage. We propose a model for this instability in p-type transistors with a silicon-dioxide gate dielectric, based on
Analysing black phosphorus transistors using an analytic Schottky barrier MOSFET model.
Penumatcha, Ashish V; Salazar, Ramon B; Appenzeller, Joerg
2015-11-13
Owing to the difficulties associated with substitutional doping of low-dimensional nanomaterials, most field-effect transistors built from carbon nanotubes, two-dimensional crystals and other low-dimensional channels are Schottky barrier MOSFETs (metal-oxide-semiconductor field-effect transistors). The transmission through a Schottky barrier-MOSFET is dominated by the gate-dependent transmission through the Schottky barriers at the metal-to-channel interfaces. This makes the use of conventional transistor models highly inappropriate and has lead researchers in the past frequently to extract incorrect intrinsic properties, for example, mobility, for many novel nanomaterials. Here we propose a simple modelling approach to quantitatively describe the transfer characteristics of Schottky barrier-MOSFETs from ultra-thin body materials accurately in the device off-state. In particular, after validating the model through the analysis of a set of ultra-thin silicon field-effect transistor data, we have successfully applied our approach to extract Schottky barrier heights for electrons and holes in black phosphorus devices for a large range of body thicknesses.
Utility of the Static-99 and Static-99R With Latino Sex Offenders.
Leguízamo, Alejandro; Lee, Seung C; Jeglic, Elizabeth L; Calkins, Cynthia
2017-12-01
The predictive validity of the Static-99 measures with ethnic minorities in the United States has only recently been assessed with mixed results. We assessed the predictive validity of the Static-99 and Static-99R with a sample of Latino sex offenders ( N = 483) as well as with two subsamples (U.S.-born, including Puerto Rico, and non-U.S.-born). The overall sexual recidivism rate was very low (1.9%). Both the Static-99 measures were able to predict sexual recidivism for offenders born in the United States and Puerto Rico, but neither was effective in doing so for other Latino immigrants. Calibration analyses ( N = 303) of the Static-99R were consistent with the literature and provided support for the potential use of the measure with Latinos born in the United States and Puerto Rico. These findings and their implications are discussed as they pertain to the assessment of Latino sex offenders.
Hybrid light emitting transistors (Presentation Recording)
Muhieddine, Khalid; Ullah, Mujeeb; Namdas, Ebinazar B.; Burn, Paul L.
2015-10-01
Organic light-emitting diodes (OLEDs) are well studied and established in current display applications. Light-emitting transistors (LETs) have been developed to further simplify the necessary circuitry for these applications, combining the switching capabilities of a transistor with the light emitting capabilities of an OLED. Such devices have been studied using mono- and bilayer geometries and a variety of polymers [1], small organic molecules [2] and single crystals [3] within the active layers. Current devices can often suffer from low carrier mobilities and most operate in p-type mode due to a lack of suitable n-type organic charge carrier materials. Hybrid light-emitting transistors (HLETs) are a logical step to improve device performance by harnessing the charge carrier capabilities of inorganic semiconductors [4]. We present state of the art, all solution processed hybrid light-emitting transistors using a non-planar contact geometry [1, 5]. We will discuss HLETs comprised of an inorganic electron transport layer prepared from a sol-gel of zinc tin oxide and several organic emissive materials. The mobility of the devices is found between 1-5 cm2/Vs and they had on/off ratios of ~105. Combined with optical brightness and efficiencies of the order of 103 cd/m2 and 10-3-10-1 %, respectively, these devices are moving towards the performance required for application in displays. [1] M. Ullah, K. Tandy, S. D. Yambem, M. Aljada, P. L. Burn, P. Meredith, E. B. Namdas., Adv. Mater. 2013, 25, 53, 6213 [2] R. Capelli, S. Toffanin, G. Generali, H. Usta, A. Facchetti, M. Muccini, Nature Materials 2010, 9, 496 [3] T. Takenobu, S. Z. Bisri, T. Takahashi, M. Yahiro, C. Adachi, Y. Iwasa, Phys. Rev. Lett. 2008, 100, 066601 [4] H. Nakanotani, M. Yahiro, C. Adachi, K. Yano, Appl. Phys. Lett. 2007, 90, 262104 [5] K. Muhieddine, M. Ullah, B. N. Pal, P. Burn E. B. Namdas, Adv. Mater. 2014, 26,37, 6410
Radiation induced deep level defects in bipolar junction transistors under various bias conditions
International Nuclear Information System (INIS)
Liu, Chaoming; Yang, Jianqun; Li, Xingji; Ma, Guoliang; Xiao, Liyi; Bollmann, Joachim
2015-01-01
Bipolar junction transistor (BJT) is sensitive to ionization and displacement radiation effects in space. In this paper, 35 MeV Si ions were used as irradiation source to research the radiation damage on NPN and PNP bipolar transistors. The changing of electrical parameters of transistors was in situ measured with increasing irradiation fluence of 35 MeV Si ions. Using deep level transient spectroscopy (DLTS), defects in the bipolar junction transistors under various bias conditions are measured after irradiation. Based on the in situ electrical measurement and DLTS spectra, it is clearly that the bias conditions can affect the concentration of deep level defects, and the radiation damage induced by heavy ions.
Low-power bacteriorhodopsin-silicon n-channel metal-oxide field-effect transistor photoreceiver.
Shin, Jonghyun; Bhattacharya, Pallab; Yuan, Hao-Chih; Ma, Zhenqiang; Váró, György
2007-03-01
A bacteriorhodopsin (bR)-silicon n-channel metal-oxide field-effect transistor (NMOSFET) monolithically integrated photoreceiver is demonstrated. The bR film is selectively formed on an external gate electrode of the transistor by electrophoretic deposition. A modified biasing circuit is incorporated, which helps to match the resistance of the bR film to the input impedance of the NMOSFET and to shift the operating point of the transistor to coincide with the maximum gain. The photoreceiver exhibits a responsivity of 4.7 mA/W.
Validation of Nonlinear Bipolar Transistor Model by Small-Signal Measurements
DEFF Research Database (Denmark)
Vidkjær, Jens; Porra, V.; Zhu, J.
1992-01-01
A new method for the validity analysis of nonlinear transistor models is presented based on DC-and small-signal S-parameter measurements and realistic consideration of the measurement and de-embedding errors and singularities of the small-signal equivalent circuit. As an example, some analysis...... results for an extended Gummel Poon model are presented in the case of a UHF bipolar power transistor....
Principles of an atomtronic transistor
International Nuclear Information System (INIS)
Caliga, Seth C; Anderson, Dana Z; Straatsma, Cameron J E; Zozulya, Alex A
2016-01-01
A semiclassical formalism is used to investigate the transistor-like behavior of ultracold atoms in a triple-well potential. Atom current flows from the source well, held at fixed chemical potential and temperature, into an empty drain well. In steady-state, the gate well located between the source and drain is shown to acquire a well-defined chemical potential and temperature, which are controlled by the relative height of the barriers separating the three wells. It is shown that the gate chemical potential can exceed that of the source and have a lower temperature. In electronics terminology, the source–gate junction can be reverse-biased. As a result, the device exhibits regimes of negative resistance and transresistance, indicating the presence of gain. Given an external current input to the gate, transistor-like behavior is characterized both in terms of the current gain, which can be greater than unity, and the power output of the device. (paper)
Direct observation of single-charge-detection capability of nanowire field-effect transistors.
Salfi, J; Savelyev, I G; Blumin, M; Nair, S V; Ruda, H E
2010-10-01
A single localized charge can quench the luminescence of a semiconductor nanowire, but relatively little is known about the effect of single charges on the conductance of the nanowire. In one-dimensional nanostructures embedded in a material with a low dielectric permittivity, the Coulomb interaction and excitonic binding energy are much larger than the corresponding values when embedded in a material with the same dielectric permittivity. The stronger Coulomb interaction is also predicted to limit the carrier mobility in nanowires. Here, we experimentally isolate and study the effect of individual localized electrons on carrier transport in InAs nanowire field-effect transistors, and extract the equivalent charge sensitivity. In the low carrier density regime, the electrostatic potential produced by one electron can create an insulating weak link in an otherwise conducting nanowire field-effect transistor, modulating its conductance by as much as 4,200% at 31 K. The equivalent charge sensitivity, 4 × 10(-5) e Hz(-1/2) at 25 K and 6 × 10(-5) e Hz(-1/2) at 198 K, is orders of magnitude better than conventional field-effect transistors and nanoelectromechanical systems, and is just a factor of 20-30 away from the record sensitivity for state-of-the-art single-electron transistors operating below 4 K (ref. 8). This work demonstrates the feasibility of nanowire-based single-electron memories and illustrates a physical process of potential relevance for high performance chemical sensors. The charge-state-detection capability we demonstrate also makes the nanowire field-effect transistor a promising host system for impurities (which may be introduced intentionally or unintentionally) with potentially long spin lifetimes, because such transistors offer more sensitive spin-to-charge conversion readout than schemes based on conventional field-effect transistors.
Large signal S-parameters: modeling and radiation effects in microwave power transistors
International Nuclear Information System (INIS)
Graham, E.D. Jr.; Chaffin, R.J.; Gwyn, C.W.
1973-01-01
Microwave power transistors are usually characterized by measuring the source and load impedances, efficiency, and power output at a specified frequency and bias condition in a tuned circuit. These measurements provide limited data for circuit design and yield essentially no information concerning broadbanding possibilities. Recently, a method using large signal S-parameters has been developed which provides a rapid and repeatable means for measuring microwave power transistor parameters. These large signal S-parameters have been successfully used to design rf power amplifiers. Attempts at modeling rf power transistors have in the past been restricted to a modified Ebers-Moll procedure with numerous adjustable model parameters. The modified Ebers-Moll model is further complicated by inclusion of package parasitics. In the present paper an exact one-dimensional device analysis code has been used to model the performance of the transistor chip. This code has been integrated into the SCEPTRE circuit analysis code such that chip, package and circuit performance can be coupled together in the analysis. Using []his computational tool, rf transistor performance has been examined with particular attention given to the theoretical validity of large-signal S-parameters and the effects of nuclear radiation on device parameters. (auth)
High-Current Gain Two-Dimensional MoS 2 -Base Hot-Electron Transistors
Torres, Carlos M.
2015-12-09
The vertical transport of nonequilibrium charge carriers through semiconductor heterostructures has led to milestones in electronics with the development of the hot-electron transistor. Recently, significant advances have been made with atomically sharp heterostructures implementing various two-dimensional materials. Although graphene-base hot-electron transistors show great promise for electronic switching at high frequencies, they are limited by their low current gain. Here we show that, by choosing MoS2 and HfO2 for the filter barrier interface and using a noncrystalline semiconductor such as ITO for the collector, we can achieve an unprecedentedly high-current gain (α ∼ 0.95) in our hot-electron transistors operating at room temperature. Furthermore, the current gain can be tuned over 2 orders of magnitude with the collector-base voltage albeit this feature currently presents a drawback in the transistor performance metrics such as poor output resistance and poor intrinsic voltage gain. We anticipate our transistors will pave the way toward the realization of novel flexible 2D material-based high-density, low-energy, and high-frequency hot-carrier electronic applications. © 2015 American Chemical Society.
High-Current Gain Two-Dimensional MoS 2 -Base Hot-Electron Transistors
Torres, Carlos M.; Lan, Yann Wen; Zeng, Caifu; Chen, Jyun Hong; Kou, Xufeng; Navabi, Aryan; Tang, Jianshi; Montazeri, Mohammad; Adleman, James R.; Lerner, Mitchell B.; Zhong, Yuan Liang; Li, Lain-Jong; Chen, Chii Dong; Wang, Kang L.
2015-01-01
The vertical transport of nonequilibrium charge carriers through semiconductor heterostructures has led to milestones in electronics with the development of the hot-electron transistor. Recently, significant advances have been made with atomically sharp heterostructures implementing various two-dimensional materials. Although graphene-base hot-electron transistors show great promise for electronic switching at high frequencies, they are limited by their low current gain. Here we show that, by choosing MoS2 and HfO2 for the filter barrier interface and using a noncrystalline semiconductor such as ITO for the collector, we can achieve an unprecedentedly high-current gain (α ∼ 0.95) in our hot-electron transistors operating at room temperature. Furthermore, the current gain can be tuned over 2 orders of magnitude with the collector-base voltage albeit this feature currently presents a drawback in the transistor performance metrics such as poor output resistance and poor intrinsic voltage gain. We anticipate our transistors will pave the way toward the realization of novel flexible 2D material-based high-density, low-energy, and high-frequency hot-carrier electronic applications. © 2015 American Chemical Society.
Laser-Printed Organic Thin-Film Transistors
Diemer, Peter J.; Harper, Angela F.; Niazi, Muhammad Rizwan; Petty, Anthony J.; Anthony, John E.; Amassian, Aram; Jurchescu, Oana D.
2017-01-01
their incorporation in large-scale manufacturing processes. Here, the first ever organic thin-film transistor fabricated with an electrophotographic laser printing process using a standard office laser printer is reported. This completely solvent-free additive
Chen, Haitian; Cao, Yu; Zhang, Jialu; Zhou, Chongwu
2014-06-13
Carbon nanotubes and metal oxide semiconductors have emerged as important materials for p-type and n-type thin-film transistors, respectively; however, realizing sophisticated macroelectronics operating in complementary mode has been challenging due to the difficulty in making n-type carbon nanotube transistors and p-type metal oxide transistors. Here we report a hybrid integration of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors to achieve large-scale (>1,000 transistors for 501-stage ring oscillators) complementary macroelectronic circuits on both rigid and flexible substrates. This approach of hybrid integration allows us to combine the strength of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors, and offers high device yield and low device variation. Based on this approach, we report the successful demonstration of various logic gates (inverter, NAND and NOR gates), ring oscillators (from 51 stages to 501 stages) and dynamic logic circuits (dynamic inverter, NAND and NOR gates).
Energy Technology Data Exchange (ETDEWEB)
Cao, Yu; Che, Yuchi; Zhou, Chongwu, E-mail: chongwuz@usc.edu [Department of Electrical Engineering, University of Southern California, Los Angeles, California 90089 (United States); Seo, Jung-Woo T.; Hersam, Mark C. [Department of Materials Science and Engineering and Department of Chemistry, Northwestern University, Evanston, Illinois 60208 (United States); Gui, Hui [Department of Chemical Engineering and Materials Science, University of Southern California, Los Angeles, California 90089 (United States)
2016-06-06
In this paper, we report the high-performance radio-frequency transistors based on the single-walled semiconducting carbon nanotubes with a refined average diameter of ∼1.6 nm. These diameter-separated carbon nanotube transistors show excellent transconductance of 55 μS/μm and desirable drain current saturation with an output resistance of ∼100 KΩ μm. An exceptional radio-frequency performance is also achieved with current gain and power gain cut-off frequencies of 23 GHz and 20 GHz (extrinsic) and 65 GHz and 35 GHz (intrinsic), respectively. These radio-frequency metrics are among the highest reported for the carbon nanotube thin-film transistors. This study provides demonstration of radio frequency transistors based on carbon nanotubes with tailored diameter distributions, which will guide the future application of carbon nanotubes in radio-frequency electronics.
Self-standing chitosan films as dielectrics in organic thin-film transistors
Directory of Open Access Journals (Sweden)
J. Morgado
2013-12-01
Full Text Available Organic thin film transistors, using self-standing 50 µm thick chitosan films as dielectric, are fabricated using sublimed pentacene or two conjugated polymers deposited by spin coating as semiconductors. Field-effect mobilities are found to be similar to values obtained with other dielectrics and, in the case of pentacene, a value (0.13 cm2/(V•s comparable to high performing transistors was determined. In spite of the low On/Off ratios (a maximum value of 600 was obtained for the pentacene-based transistors, these are promising results for the area of sustainable organic electronics in general and for biocompatible electronics in particular.
All-Metallic Vertical Transistors Based on Stacked Dirac Materials
Wang, Yangyang; Ni, Zeyuan; Liu, Qihang; Quhe, Ruge; Zheng, Jiaxin; Ye, Meng; Yu, Dapeng; Shi, Junjie; Yang, Jinbo; Lu, Jing
2014-01-01
It is an ongoing pursuit to use metal as a channel material in a field effect transistor. All metallic transistor can be fabricated from pristine semimetallic Dirac materials (such as graphene, silicene, and germanene), but the on/off current ratio is very low. In a vertical heterostructure composed by two Dirac materials, the Dirac cones of the two materials survive the weak interlayer van der Waals interaction based on density functional theory method, and electron transport from the Dirac ...
Wan, Chang Jin; Zhu, Li Qiang; Zhou, Ju Mei; Shi, Yi; Wan, Qing
2014-05-07
Ionic/electronic hybrid devices with synaptic functions are considered to be the essential building blocks for neuromorphic systems and brain-inspired computing. Here, artificial synapses based on indium-zinc-oxide (IZO) transistors gated by nanogranular SiO2 proton-conducting electrolyte films are fabricated on glass substrates. Spike-timing dependent plasticity and paired-pulse facilitation are successfully mimicked in an individual bottom-gate transistor. Most importantly, dynamic logic and dendritic integration established by spatiotemporally correlated spikes are also mimicked in dendritic transistors with two in-plane gates as the presynaptic input terminals.
Electric double layer transistors with ferroelectric BaTiO3 channels
Ito, M.; Matsubara, Y.; Kozuka, Y.; Takahashi, K. S.; Kagawa, F.; Ye, J. T.; Iwasa, Y.; Ueno, K.; Tokura, Y.; Kawasaki, M.
2014-01-01
We report the surface conduction of a BaTiO3 thin film using electric double layer transistor (EDLT) structure. A transistor operation was observed at 220 K with an on/off ratio exceeding 10(5), demonstrating that ionic liquid gating is effective to induce carriers at the surface of ferroelectric
E-Learning System for Design and Construction of Amplifier Using Transistors
Takemura, Atsushi
2014-01-01
This paper proposes a novel e-Learning system for the comprehensive understanding of electronic circuits with transistors. The proposed e-Learning system allows users to learn a wide range of topics, encompassing circuit theories, design, construction, and measurement. Given the fact that the amplifiers with transistors are an integral part of…
Detection of heavy ion induced DNA double-strand breaks using static-field gel electrophoresis
International Nuclear Information System (INIS)
Taucher-Scholz, G.; Heilmann, J.; Schneider, G.; Kraft, G.
1994-11-01
Radiation induced DNA double-strand breaks (DSBs) were measured in Chinese hamster ovary cells (CHO-K1) using an experimental protocol involving static-field gel electrophoresis following exposure to various accelerated ions. Dose-effect curves were set up and relative biological efficiencies (RBEs) for DSB induction were determined for different radiation qualities. RBEs around 1 were obtained for low energy deuterons (6-7 keV/μm), while for high energy oxygen ions (20 keV/μm) an RBE value slightly greater than 1 was determined. Low energetic oxygen ions (LET ∼ 250 keV/μm) were found to show RBEs substantially below unity, and for higher LET particles (≥ 250 keV/μm) RBEs for DSB induction were generally found to be smaller than 1. The data presented here are in line with the generally accepted view that not induced DSBs, but misrepaired or unrepaired DNA-lesions are related to cellular inactivation. (orig.)
Static electromagnetic frequency changers
Rozhanskii, L L
1963-01-01
Static Electromagnetic Frequency Changers is about the theory, design, construction, and applications of static electromagnetic frequency changers, devices that used for multiplication or division of alternating current frequency. It is originally published in the Russian language. This book is organized into five chapters. The first three chapters introduce the readers to the principles of operation, the construction, and the potential applications of static electromagnetic frequency changers and to the principles of their design. The two concluding chapters use some hitherto unpublished work
Reevaluating the worst-case radiation response of MOS transistors
Fleetwood, D. M.
Predicting worst-case response of a semiconductor device to ionizing radiation is a formidable challenge. As processes change and MOS gate insulators become thinner in advanced VLSI and VHSIC technologies, failure mechanisms must be constantly re-examined. Results are presented of a recent study in which more than 100 MOS transistors were monitored for up to 300 days after Co-60 exposure. Based on these results, a reevaluation of worst-case n-channel transistor response (most positive threshold voltage shift) in low-dose-rate and postirradiation environments is required in many cases. It is shown for Sandia hardened n-channel transistors with a 32 nm gate oxide, that switching from zero-volt bias, held during the entire radiation period, to positive bias during anneal clearly leads to a more positive threshold voltage shift (and thus the slowest circuit response) after Co-60 exposure than the standard case of maintaining positive bias during irradiation and anneal. It is concluded that irradiating these kinds of transistors with zero-volt bias, and annealing with positive bias, leads to worst-case postirradiation response. For commercial devices (with few interface states at doses of interest), on the other hand, device response only improves postirradiation, and worst-case response (in terms of device leakage) is for devices irradiated under positive bias and annealed with zero-volts bias.
Lateral power transistors in integrated circuits
Erlbacher, Tobias
2014-01-01
This book details and compares recent advancements in the development of novel lateral power transistors (LDMOS devices) for integrated circuits in power electronic applications. It includes the state-of-the-art concept of double-acting RESURF topologies.
Energy Technology Data Exchange (ETDEWEB)
Ou-Yang, Wei, E-mail: OUYANG.Wei@nims.go.jp, E-mail: TSUKAGOSHI.Kazuhito@nims.go.jp; Mitoma, Nobuhiko; Kizu, Takio; Gao, Xu; Lin, Meng-Fang; Tsukagoshi, Kazuhito, E-mail: OUYANG.Wei@nims.go.jp, E-mail: TSUKAGOSHI.Kazuhito@nims.go.jp [International Center for Materials Nanoarchitectronics (WPI-MANA), National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Nabatame, Toshihide [MANA Foundry and MANA Advanced Device Materials Group, National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan)
2014-10-20
To avoid the problem of air sensitive and wet-etched Zn and/or Ga contained amorphous oxide transistors, we propose an alternative amorphous semiconductor of indium silicon tungsten oxide as the channel material for thin film transistors. In this study, we employ the material to reveal the relation between the active thin film and the transistor performance with aid of x-ray reflectivity study. By adjusting the pre-annealing temperature, we find that the film densification and interface flatness between the film and gate insulator are crucial for achieving controllable high-performance transistors. The material and findings in the study are believed helpful for realizing controllable high-performance stable transistors.
Fermilab main accelerator quadrupole transistorized regulators for improved tune stability
International Nuclear Information System (INIS)
Yarema, R.J.; Pfeffer, H.
1977-01-01
During early operation of the Fermilab Main Accelerator, tune fluctuations, caused by the SCR-controlled power supplies in the quad bus, limited the beam aperature at low energies. To correct this problem, two transistorized power supplies were built in 1975 to regulate and filter the main ring quad magnet current during injection and beam acceleration through the rf transistion region. There is one power supply in series with each quad bus. Each supply uses 320 parallel power transistors and is rated at 300A, 120V. Since the voltage and current capabilities of the transistorized supplies are limited, the supplies are turned-off at about 25GeV. A real-time computer system initiates turn-on of the SCR-controlled power supplies and regulation takeover by the SCR-controlled supplies, at the appropriate times
Energy Technology Data Exchange (ETDEWEB)
Beck, Mathias M., E-mail: Mathias.Beck@tum.de [Institute for Machine Tools and Industrial Management, Technical University of Munich, Boltzmannstr. 15, 85748 Garching (Germany); Lammel, Christian [Institute for Machine Tools and Industrial Management, Technical University of Munich, Boltzmannstr. 15, 85748 Garching (Germany); Gleich, Bernhard [Institute of Medical Engineering, Technical University of Munich, Boltzmannstr. 11, 85748 Garching (Germany)
2017-04-01
Inductive heating of electrically insulating materials like fiberglass reinforced thermoplastics (FRTP) without susceptors is not possible. However, due to their low thermal conductivity a volumetric heat generation method is advisable to reach short heating times to melt this material for reshaping. This can be done with magnetic nanoparticles as susceptors within the thermoplastic of the FRTP using Néel relaxation. During the heating process the particle's magnetic moment rotates with the field while the particle itself is fixed within the thermoplastic. Therefore the heat dissipation of each particle depends on its orientation within the field. To achieve the maximum heat generation of the particles we pre-oriented the particles within a plastic at the best angle to the applied AC field for induction. To do this, five mass percent nanoparticles were dispersed in an epoxy resin, which was then hardened at room temperature in a static three Tesla magnetic field. After its solidification the heating behavior of the sample was compared to a reference sample, which was hardened without a field. The oriented particles showed an increased heating rate when oriented parallel to the applied AC field. The absorption rate was 3.3 times as high as the undirected reference sample. When the alternating electromagnetic field was perpendicular to the oriented particles, the specific absorption rate was similar to that of the reference sample. We compare this result with theory and with calculations from literature, and conduct a numerical simulation. - Highlights: • Magnetic nanoparticles are aligned using a static three tesla magnetic field. • Inductive heating depends on the particles pre-orientation in a solid matrix. • Alignment increases the heat generation significantly.
Nanophotonic quantum computer based on atomic quantum transistor
International Nuclear Information System (INIS)
Andrianov, S N; Moiseev, S A
2015-01-01
We propose a scheme of a quantum computer based on nanophotonic elements: two buses in the form of nanowaveguide resonators, two nanosized units of multiatom multiqubit quantum memory and a set of nanoprocessors in the form of photonic quantum transistors, each containing a pair of nanowaveguide ring resonators coupled via a quantum dot. The operation modes of nanoprocessor photonic quantum transistors are theoretically studied and the execution of main logical operations by means of them is demonstrated. We also discuss the prospects of the proposed nanophotonic quantum computer for operating in high-speed optical fibre networks. (quantum computations)
Nanophotonic quantum computer based on atomic quantum transistor
Energy Technology Data Exchange (ETDEWEB)
Andrianov, S N [Institute of Advanced Research, Academy of Sciences of the Republic of Tatarstan, Kazan (Russian Federation); Moiseev, S A [Kazan E. K. Zavoisky Physical-Technical Institute, Kazan Scientific Center, Russian Academy of Sciences, Kazan (Russian Federation)
2015-10-31
We propose a scheme of a quantum computer based on nanophotonic elements: two buses in the form of nanowaveguide resonators, two nanosized units of multiatom multiqubit quantum memory and a set of nanoprocessors in the form of photonic quantum transistors, each containing a pair of nanowaveguide ring resonators coupled via a quantum dot. The operation modes of nanoprocessor photonic quantum transistors are theoretically studied and the execution of main logical operations by means of them is demonstrated. We also discuss the prospects of the proposed nanophotonic quantum computer for operating in high-speed optical fibre networks. (quantum computations)
Kohnen, T; Kühne, C; Cichocki, M; Strenger, A
2007-01-01
Centration of the ablation zone decisively influences the result of wavefront-guided LASIK. Cyclorotation of the eye occurs as the patient changes from the sitting position during aberrometry to the supine position during laser surgery and may lead to induction of lower and higher order aberrations. Twenty patients (40 eyes) underwent wavefront-guided LASIK (B&L 217z 100 excimer laser) with a static eyetracker driven by iris recognition (mean preoperative SE: -4.72+/-1.45 D; range: -1.63 to -7.00 D). The iris patterns of the patients' eyes were memorized during aberrometry and after flap creation. The mean absolute value of the measured cyclorotation was -1.5+/-4.2 degrees (range: -11.0 to 6.9 degrees ). The mean cyclorotation was 3.5+/-2.7 masculine (range: 0.1 to 11.0 degrees ). In 65% of all eyes cyclorotation was >2 masculine. A static eyetracker driven by iris recognition demonstrated that cyclorotation of up to 11 degrees may occur in myopic and myopic astigmatic eyes when changing from a sitting to a supine position. Use of static eyetrackers with iris recognition may provide a more precise positioning of the ablation profile as they detect and compensate cyclorotation.
Wafer-Scale Gigahertz Graphene Field Effect Transistors on SiC Substrates
Institute of Scientific and Technical Information of China (English)
潘洪亮; 金智; 麻芃; 郭建楠; 刘新宇; 叶甜春; 李佳; 敦少博; 冯志红
2011-01-01
Wafer-scale graphene field-effect transistors are fabricated using benzocyclobutene and atomic layer deposition Al2O3 as the top-gate dielectric.The epitaxial-graphene layer is formed by graphitization of a 2-inch-diameter Si-face semi-insulating 6H-SiC substrate.The graphene on the silicon carbide substrate is heavily n-doped and current saturation is not found.For the intrinsic characteristic of this particular channel material,the devices cannot be switched off.The cut-off frequencies of these graphene field-effect transistors,which have a gate length of l μm,are larger than 800 MHz.The largest one can reach 1.24 GHz.There are greater than 95% active devices that can be successfully applied.We thus succeed in fabricating wafer-scale gigahertz graphene field-effect transistors,which paves the way for high-performance graphene devices and circuits.%Wafer-scale graphene Beld-effect transistors are fabricated using benzocyclobutene and atomic layer deposition AI2O3 as the top-gate dielectric. The epitaxial-graphene layer is formed by graphitization of a 2-inch-diameter Si-face semi-insulating 6H-SiC substrate. The graphene on the silicon carbide substrate is heavily n-doped and current saturation is not found. For the intrinsic characteristic of this particular channel material, the devices cannot be switched off. The cut-off frequencies of these graphene field-effect transistors, which have a gate length of l μm, are larger than 800MHz. The largest one can reach 1.24 GHz. There are greater than 95% active devices that can be successfully applied. We thus succeed in fabricating wafer-scale gigahertz graphene Geld-effect transistors, which paves the way for high-performance graphene devices and circuits.
Optimization of ultra-low-power CMOS transistors
International Nuclear Information System (INIS)
Stockinger, M.
2000-01-01
Ultra-low-power CMOS integrated circuits have constantly gained importance due to the fast growing portable electronics market. High-performance applications like mobile telephones ask for high-speed computations and low stand-by power consumption to increase the actual operating time. This means that transistors with low leakage currents and high drive currents have to be provided. Common fabrication methods will soon reach their limits if the on-chip feature size of CMOS technology continues to shrink at this very fast rate. New device architectures will help to keep track with the roadmap of the semiconductor industry. Especially doping profiles offer much freedom for performance improvements as they determine the 'inner functioning' of a transistor. In this work automated doping profile optimization is performed on MOS transistors within the TCAD framework SIESTA. The doping between and under the source/drain wells is discretized on an orthogonal optimization grid facilitating almost arbitrary two-dimensional shapes. A linear optimizer issued to find the optimum doping profile by variation of the doping parameters utilizing numerical device simulations with MINIMOS-NT. Gaussian functions are used in further optimization runs to make the doping profiles smooth. Two device generations are considered, one with 0.25 μm, the other with 0.1 μm gate length. The device geometries and source/drain doping profiles are kept fixed during optimization and supply voltages are chosen suitable for ultra-low-power purposes. In a first optimization study the drive current of NMOS transistors is maximized while keeping the leakage current below a limit of 1 pA/μm. This results in peaking channel doping devices (PCD) with narrow doping peaks placed asymmetrically in the channel. Drive current improvements of 45 % and 71 % for the 0.25 μm and 0.1 μm devices, respectively, are achieved compared to uniformly doped devices. The PCD device is studied in detail and explanations for
Unipolar n-Type Black Phosphorus Transistors with Low Work Function Contacts.
Wang, Ching-Hua; Incorvia, Jean Anne C; McClellan, Connor J; Yu, Andrew C; Mleczko, Michal J; Pop, Eric; Wong, H-S Philip
2018-05-09
Black phosphorus (BP) is a promising two-dimensional (2D) material for nanoscale transistors, due to its expected higher mobility than other 2D semiconductors. While most studies have reported ambipolar BP with a stronger p-type transport, it is important to fabricate both unipolar p- and n-type transistors for low-power digital circuits. Here, we report unipolar n-type BP transistors with low work function Sc and Er contacts, demonstrating a record high n-type current of 200 μA/μm in 6.5 nm thick BP. Intriguingly, the electrical transport of the as-fabricated, capped devices changes from ambipolar to n-type unipolar behavior after a month at room temperature. Transmission electron microscopy analysis of the contact cross-section reveals an intermixing layer consisting of partly oxidized metal at the interface. This intermixing layer results in a low n-type Schottky barrier between Sc and BP, leading to the unipolar behavior of the BP transistor. This unipolar transport with a suppressed p-type current is favorable for digital logic circuits to ensure a lower off-power consumption.
Bisplinghoff, Raymond L; Pian, Theodore HH
2014-01-01
Profusely illustrated exposition of fundamentals of solid mechanics and principles of mechanics, statics, and simple statically indeterminate systems. Covers strain and stress in three-dimensional solids, elementary elasticity, energy principles in solid continuum, and more. 1965 edition.
Pseudo-diode based on protonic/electronic hybrid oxide transistor
Fu, Yang Ming; Liu, Yang Hui; Zhu, Li Qiang; Xiao, Hui; Song, An Ran
2018-01-01
Current rectification behavior has been proved to be essential in modern electronics. Here, a pseudo-diode is proposed based on protonic/electronic hybrid indium-gallium-zinc oxide electric-double-layer (EDL) transistor. The oxide EDL transistors are fabricated by using phosphorous silicate glass (PSG) based proton conducting electrolyte as gate dielectric. A diode operation mode is established on the transistor, originating from field configurable proton fluxes within the PSG electrolyte. Current rectification ratios have been modulated to values ranged between ˜4 and ˜50 000 with gate electrode biased at voltages ranged between -0.7 V and 0.1 V. Interestingly, the proposed pseudo-diode also exhibits field reconfigurable threshold voltages. When the gate is biased at -0.5 V and 0.3 V, threshold voltages are set to ˜-1.3 V and -0.55 V, respectively. The proposed pseudo-diode may find potential applications in brain-inspired platforms and low-power portable systems.
Organic transistors with high thermal stability for medical applications.
Kuribara, Kazunori; Wang, He; Uchiyama, Naoya; Fukuda, Kenjiro; Yokota, Tomoyuki; Zschieschang, Ute; Jaye, Cherno; Fischer, Daniel; Klauk, Hagen; Yamamoto, Tatsuya; Takimiya, Kazuo; Ikeda, Masaaki; Kuwabara, Hirokazu; Sekitani, Tsuyoshi; Loo, Yueh-Lin; Someya, Takao
2012-03-06
The excellent mechanical flexibility of organic electronic devices is expected to open up a range of new application opportunities in electronics, such as flexible displays, robotic sensors, and biological and medical electronic applications. However, one of the major remaining issues for organic devices is their instability, especially their thermal instability, because low melting temperatures and large thermal expansion coefficients of organic materials cause thermal degradation. Here we demonstrate the fabrication of flexible thin-film transistors with excellent thermal stability and their viability for biomedical sterilization processes. The organic thin-film transistors comprise a high-mobility organic semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene, and thin gate dielectrics comprising a 2-nm-thick self-assembled monolayer and a 4-nm-thick aluminium oxide layer. The transistors exhibit a mobility of 1.2 cm(2) V(-1)s(-1) within a 2 V operation and are stable even after exposure to conditions typically used for medical sterilization.
Controlled ion-beam transformation of silicon bipolar microwave power transistor's characteristics
International Nuclear Information System (INIS)
Solodukha, V.A.; Snitovskij, Yu.P.
2015-01-01
In this article, a method for changing the silicon bipolar microwave power transistor's characteristics in a direct and deliberate manner by modifying the chemical composition at the molybdenum - silicon boundary, the electro-physical properties of molybdenum - silicon contacts, and the electrophysical characteristics of transistor structure areas by the phosphorus ions irradiation of generated ohmic molybdenum - silicon contacts to the transistor emitters is proposed for the first time. The possibilities of this method are investigated and confirmed experimentally. (authors)
Controlling the mode of operation of organic transistors through side-chain engineering
Giovannitti, Alexander
2016-10-11
Electrolyte-gated organic transistors offer low bias operation facilitated by direct contact of the transistor channel with an electrolyte. Their operation mode is generally defined by the dimensionality of charge transport, where a field-effect transistor allows for electrostatic charge accumulation at the electrolyte/semiconductor interface, whereas an organic electrochemical transistor (OECT) facilitates penetration of ions into the bulk of the channel, considered a slow process, leading to volumetric doping and electronic transport. Conducting polymer OECTs allow for fast switching and high currents through incorporation of excess, hygroscopic ionic phases, but operate in depletion mode. Here, we show that the use of glycolated side chains on a thiophene backbone can result in accumulation mode OECTs with high currents, transconductance, and sharp subthreshold switching, while maintaining fast switching speeds. Compared with alkylated analogs of the same backbone, the triethylene glycol side chains shift the mode of operation of aqueous electrolyte-gated transistors from interfacial to bulk doping/transport and show complete and reversible electrochromism and high volumetric capacitance at low operating biases. We propose that the glycol side chains facilitate hydration and ion penetration, without compromising electronic mobility, and suggest that this synthetic approach can be used to guide the design of organic mixed conductors.
Controlling the mode of operation of organic transistors through side-chain engineering
Giovannitti, Alexander; Sbircea, Dan-Tiberiu; Inal, Sahika; Nielsen, Christian B.; Bandiello, Enrico; Hanifi, David A.; Sessolo, Michele; Malliaras, George G.; McCulloch, Iain; Rivnay, Jonathan
2016-01-01
Electrolyte-gated organic transistors offer low bias operation facilitated by direct contact of the transistor channel with an electrolyte. Their operation mode is generally defined by the dimensionality of charge transport, where a field-effect transistor allows for electrostatic charge accumulation at the electrolyte/semiconductor interface, whereas an organic electrochemical transistor (OECT) facilitates penetration of ions into the bulk of the channel, considered a slow process, leading to volumetric doping and electronic transport. Conducting polymer OECTs allow for fast switching and high currents through incorporation of excess, hygroscopic ionic phases, but operate in depletion mode. Here, we show that the use of glycolated side chains on a thiophene backbone can result in accumulation mode OECTs with high currents, transconductance, and sharp subthreshold switching, while maintaining fast switching speeds. Compared with alkylated analogs of the same backbone, the triethylene glycol side chains shift the mode of operation of aqueous electrolyte-gated transistors from interfacial to bulk doping/transport and show complete and reversible electrochromism and high volumetric capacitance at low operating biases. We propose that the glycol side chains facilitate hydration and ion penetration, without compromising electronic mobility, and suggest that this synthetic approach can be used to guide the design of organic mixed conductors. PMID:27790983
Solvothermal synthesis of gallium-indium-zinc-oxide nanoparticles for electrolyte-gated transistors.
Santos, Lídia; Nunes, Daniela; Calmeiro, Tomás; Branquinho, Rita; Salgueiro, Daniela; Barquinha, Pedro; Pereira, Luís; Martins, Rodrigo; Fortunato, Elvira
2015-01-14
Solution-processed field-effect transistors are strategic building blocks when considering low-cost sustainable flexible electronics. Nevertheless, some challenges (e.g., processing temperature, reliability, reproducibility in large areas, and cost effectiveness) are requirements that must be surpassed in order to achieve high-performance transistors. The present work reports electrolyte-gated transistors using as channel layer gallium-indium-zinc-oxide nanoparticles produced by solvothermal synthesis combined with a solid-state electrolyte based on aqueous dispersions of vinyl acetate stabilized with cellulose derivatives, acrylic acid ester in styrene and lithium perchlorate. The devices fabricated using this approach display a ION/IOFF up to 1 × 10(6), threshold voltage (VTh) of 0.3-1.9 V, and mobility up to 1 cm(2)/(V s), as a function of gallium-indium-zinc-oxide ink formulation and two different annealing temperatures. These results validates the usage of electrolyte-gated transistors as a viable and promising alternative for nanoparticle based semiconductor devices as the electrolyte improves the interface and promotes a more efficient step coverage of the channel layer, reducing the operating voltage when compared with conventional dielectrics gating. Moreover, it is shown that by controlling the applied gate potential, the operation mechanism of the electrolyte-gated transistors can be modified from electric double layer to electrochemical doping.
Improving the performance of X-ray proportional counters by using field transistor preamplifiers
International Nuclear Information System (INIS)
Kalinina, N.I.; Mel'ttser, L.V.; Pan'kin, V.V.
1972-01-01
The possibility of using low-noise field-effect transistors with the n-channel in preamplifiers for x-ray proportional counters constitutes the object of this article. The operation of the preamplifier assembled according to the scheme of the voltage amplifier and charge-sensitive preamplifier has been studied. The use of the field-effect transistor with the n-channel in preamplifiers for proportional counters allows to improve significantly the energy resolution and operation at reduced voltage and at high loads. Notably good results have been obtained when constructing the circuit of the premplifier with the field-effect transistor on the charge-sensitive principle. The use of home-produced field-effect transistors makes it possible to construct detectors of roentgen radiometric instruments to measure light element content with proportional counters at reduced voltage
In-Flight Pitot-Static Calibration
Foster, John V. (Inventor); Cunningham, Kevin (Inventor)
2016-01-01
A GPS-based pitot-static calibration system uses global output-error optimization. High data rate measurements of static and total pressure, ambient air conditions, and GPS-based ground speed measurements are used to compute pitot-static pressure errors over a range of airspeed. System identification methods rapidly compute optimal pressure error models with defined confidence intervals.
International Nuclear Information System (INIS)
Vukic, V.; Osmokrovic, P.
2007-01-01
Variation of collector - emitter dropout voltage on serial transistors of voltage regulators LM2990T-5 and LT1086CT5 were used as the parameter for detection of examined devices' radiation hardness in X and ? radiation fields. Biased voltage regulators with serial super-β transistor in the medium dose rate X radiation field had significantly different response from devices with conventional serial NPN transistor. Although unbiased components suffered greater damage in most cases, complete device failure happened only among the biased components with serial super-β transistor in Bremsstrahlung field. Mechanisms of transistors degradation in ionizing radiation fields were analysed [sr
Directory of Open Access Journals (Sweden)
Gao-Xin Wang
2015-01-01
Full Text Available Taking advantage of the structural health monitoring system installed on the steel truss arch girder of Dashengguan Yangtze Bridge, the temperature field data and static strain data are collected and analyzed for the static performance assessment of the bridge. Through analysis, it is found that the static strain changes are mainly caused by temperature field (temperature and temperature difference and train. After the train-induced static strains are removed, the correlation between the remaining static strains and the temperature field shows apparent linear characteristics, which can be mathematically modeled for the description of static performance. Therefore, multivariate linear regression function combined with principal component analysis is introduced to mathematically model the correlation. Furthermore, the residual static strains of mathematical model are adopted as assessment indicator and three kinds of degradation regulations of static performance are obtained after simulation of the residual static strains. Finally, it is concluded that the static performance of Dashengguan Yangtze Bridge was in a good condition during that period.
Flexible Textile-Based Organic Transistors Using Graphene/Ag Nanoparticle Electrode
Kim, Youn; Kwon, Yeon Ju; Lee, Kang Eun; Oh, Youngseok; Um, Moon-Kwang; Seong, Dong Gi; Lee, Jea Uk
2016-01-01
Highly flexible and electrically-conductive multifunctional textiles are desirable for use in wearable electronic applications. In this study, we fabricated multifunctional textile composites by vacuum filtration and wet-transfer of graphene oxide films on a flexible polyethylene terephthalate (PET) textile in association with embedding Ag nanoparticles (AgNPs) to improve the electrical conductivity. A flexible organic transistor can be developed by direct transfer of a dielectric/semiconducting double layer on the graphene/AgNP textile composite, where the textile composite was used as both flexible substrate and conductive gate electrode. The thermal treatment of a textile-based transistor enhanced the electrical performance (mobility = 7.2 cm2·V−1·s−1, on/off current ratio = 4 × 105, and threshold voltage = −1.1 V) due to the improvement of interfacial properties between the conductive textile electrode and the ion-gel dielectric layer. Furthermore, the textile transistors exhibited highly stable device performance under extended bending conditions (with a bending radius down to 3 mm and repeated tests over 1000 cycles). We believe that our simple methods for the fabrication of graphene/AgNP textile composite for use in textile-type transistors can potentially be applied to the development of flexible large-area electronic clothes. PMID:28335276
Neutron Radiation Effect On 2N2222 And NTE 123 NPN Silicon Bipolar Junction Transistors
International Nuclear Information System (INIS)
Oo, Myo Min; Rashid, N K A Md; Hasbullah, N F; Karim, J Abdul; Zin, M R Mohamed
2013-01-01
This paper examines neutron radiation with PTS (Pneumatic Transfer System) effect on silicon NPN bipolar junction transistors (2N2222 and NTE 123) and analysis of the transistors in terms of electrical characterization such as current gain after neutron radiation. The key parameters are measured with Keithley 4200SCS. Experiment results show that the current gain degradation of the transistors is very sensitive to neutron radiation. The neutron radiation can cause displacement damage in the bulk layer of the transistor structure. The current degradation is believed to be governed by increasing recombination current between the base and emitter depletion region
Celebrating 65th Anniversary of the Transistor
Directory of Open Access Journals (Sweden)
Goce L. Arsov
2013-12-01
Full Text Available The paper is dedicated to the 65th anniversary of the invention of the revolutionary electronic component that actually changed our way of life—the transistor. It recounts the key historical moments leading up to the invention of the first semiconductor active component in 1947. The meaning of the blend “transistor” is explained using the memorandum issued by Bell Telephone Laboratories. Certain problems appeared in the engineering phase of the transistor development and the new components obtained as a result of this research are reviewed. The impact of this invention on the development of power electronics is being emphasized. Finally, the possibility that the most important invention of the 20th century has been conceived not once but twice is discussed.
Quantum engineering of transistors based on 2D materials heterostructures
Iannaccone, Giuseppe; Bonaccorso, Francesco; Colombo, Luigi; Fiori, Gianluca
2018-03-01
Quantum engineering entails atom-by-atom design and fabrication of electronic devices. This innovative technology that unifies materials science and device engineering has been fostered by the recent progress in the fabrication of vertical and lateral heterostructures of two-dimensional materials and by the assessment of the technology potential via computational nanotechnology. But how close are we to the possibility of the practical realization of next-generation atomically thin transistors? In this Perspective, we analyse the outlook and the challenges of quantum-engineered transistors using heterostructures of two-dimensional materials against the benchmark of silicon technology and its foreseeable evolution in terms of potential performance and manufacturability. Transistors based on lateral heterostructures emerge as the most promising option from a performance point of view, even if heterostructure formation and control are in the initial technology development stage.
Nanowire transistors physics of devices and materials in one dimension
Colinge, Jean-Pierre
2016-01-01
From quantum mechanical concepts to practical circuit applications, this book presents a self-contained and up-to-date account of the physics and technology of nanowire semiconductor devices. It includes a unified account of the critical ideas central to low-dimensional physics and transistor physics which equips readers with a common framework and language to accelerate scientific and technological developments across the two fields. Detailed descriptions of novel quantum mechanical effects such as quantum current oscillations, the metal-to-semiconductor transition and the transition from classical transistor to single-electron transistor operation are described in detail, in addition to real-world applications in the fields of nanoelectronics, biomedical sensing techniques, and advanced semiconductor research. Including numerous illustrations to help readers understand these phenomena, this is an essential resource for researchers and professional engineers working on semiconductor devices and materials in ...
Carbon nanotubes field-effect transistor for rapid detection of DHA
International Nuclear Information System (INIS)
Nguyen Thi Thuy; Nguyen Duc Chien; Mai Anh Tuan
2012-01-01
This paper presents the development of DNA sensor based on a network carbon nanotubes field effect transistor (CNTFETs) for Escherichia coli bacteria detection. The DNA sequences were immobilized on single-walled carbon nanotubes of transistor CNTFETs by using absorption. The hybridization of the DNA probe sequences and complementary DNA strands was detected by electrical conductance change from the electron doping by DNA hybridization directly on the carbon nanotubes leading to the change in the metal-CNTs barrier energy through the modulation of the electrode work function of carbon nanotubes field effect transistor. The results showed that the response time of DNA sensor was approximately 1 min and the sensitivity of DNA sensor was at 0.565 μA/nM; the detection limit of the sensor was about 1 pM of E. coli bacteria sample. (author)
Quantum engineering of transistors based on 2D materials heterostructures.
Iannaccone, Giuseppe; Bonaccorso, Francesco; Colombo, Luigi; Fiori, Gianluca
2018-03-01
Quantum engineering entails atom-by-atom design and fabrication of electronic devices. This innovative technology that unifies materials science and device engineering has been fostered by the recent progress in the fabrication of vertical and lateral heterostructures of two-dimensional materials and by the assessment of the technology potential via computational nanotechnology. But how close are we to the possibility of the practical realization of next-generation atomically thin transistors? In this Perspective, we analyse the outlook and the challenges of quantum-engineered transistors using heterostructures of two-dimensional materials against the benchmark of silicon technology and its foreseeable evolution in terms of potential performance and manufacturability. Transistors based on lateral heterostructures emerge as the most promising option from a performance point of view, even if heterostructure formation and control are in the initial technology development stage.
Carbon Nanotube Thin Film Transistors for Flat Panel Display Application.
Liang, Xuelei; Xia, Jiye; Dong, Guodong; Tian, Boyuan; Peng, Lianmao
2016-12-01
Carbon nanotubes (CNTs) are promising materials for both high performance transistors for high speed computing and thin film transistors for macroelectronics, which can provide more functions at low cost. Among macroelectronics applications, carbon nanotube thin film transistors (CNT-TFT) are expected to be used soon for backplanes in flat panel displays (FPDs) due to their superior performance. In this paper, we review the challenges of CNT-TFT technology for FPD applications. The device performance of state-of-the-art CNT-TFTs are compared with the requirements of TFTs for FPDs. Compatibility of the fabrication processes of CNT-TFTs and current TFT technologies are critically examined. Though CNT-TFT technology is not yet ready for backplane production line of FPDs, the challenges can be overcome by close collaboration between research institutes and FPD manufacturers in the short term.
P-type Cu2O/SnO bilayer thin film transistors processed at low temperatures
Al-Jawhari, Hala A.
2013-10-09
P-type Cu2O/SnO bilayer thin film transistors (TFTs) with tunable performance were fabricated using room temperature sputtered copper and tin oxides. Using Cu2O film as capping layer on top of a SnO film to control its stoichiometry, we have optimized the performance of the resulting bilayer transistor. A transistor with 10 nm/15 nm Cu2O to SnO thickness ratio (25 nm total thickness) showed the best performance using a maximum process temperature of 170 C. The bilayer transistor exhibited p-type behavior with field-effect mobility, on-to-off current ratio, and threshold voltage of 0.66 cm2 V-1 s-1, 1.5×10 2, and -5.2 V, respectively. The advantages of the bilayer structure relative to single layer transistor are discussed. © 2013 American Chemical Society.
Carbon Based Transistors and Nanoelectronic Devices
Rouhi, Nima
Carbon based materials (carbon nanotube and graphene) has been extensively researched during the past decade as one of the promising materials to be used in high performance device technology. In long term it is thought that they may replace digital and/or analog electronic devices, due to their size, near-ballistic transport, and high stability. However, a more realistic point of insertion into market may be the printed nanoelectronic circuits and sensors. These applications include printed circuits for flexible electronics and displays, large-scale bendable electrical contacts, bio-membranes and bio sensors, RFID tags, etc. In order to obtain high performance thin film transistors (as the basic building block of electronic circuits) one should be able to manufacture dense arrays of all semiconducting nanotubes. Besides, graphene synthesize and transfer technology is in its infancy and there is plenty of room to improve the current techniques. To realize the performance of nanotube and graphene films in such systems, we need to economically fabricate large-scale devices based on these materials. Following that the performance control over such devices should also be considered for future design variations for broad range of applications. Here we have first investigated carbon nanotube ink as the base material for our devices. The primary ink used consisted of both metallic and semiconducting nanotubes which resulted in networks suitable for moderate-resistivity electrical connections (such as interconnects) and rfmatching circuits. Next, purified all-semiconducting nanotube ink was used to fabricate waferscale, high performance (high mobility, and high on/off ratio) thin film transistors for printed electronic applications. The parameters affecting device performance were studied in detail to establish a roadmap for the future of purified nanotube ink printed thin film transistors. The trade of between mobility and on/off ratio of such devices was studied and the
Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon
2016-06-09
We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.
Optomechanical transistor with mechanical gain
Zhang, X. Z.; Tian, Lin; Li, Yong
2018-04-01
We study an optomechanical transistor, where an input field can be transferred and amplified unidirectionally in a cyclic three-mode optomechanical system. In this system, the mechanical resonator is coupled simultaneously to two cavity modes. We show that it only requires a finite mechanical gain to achieve the nonreciprocal amplification. Here the nonreciprocity is caused by the phase difference between the linearized optomechanical couplings that breaks the time-reversal symmetry of this system. The amplification arises from the mechanical gain, which provides an effective phonon bath that pumps the mechanical mode coherently. This effect is analogous to the stimulated emission of atoms, where the probe field can be amplified when its frequency is in resonance with that of the anti-Stokes transition. We show that by choosing optimal parameters, this optomechanical transistor can reach perfect unidirectionality accompanied with strong amplification. In addition, the presence of the mechanical gain can result in ultralong delay in the phase of the probe field, which provides an alternative to controlling light transport in optomechanical systems.
Nanogap Electrodes towards Solid State Single-Molecule Transistors.
Cui, Ajuan; Dong, Huanli; Hu, Wenping
2015-12-01
With the establishment of complementary metal-oxide-semiconductor (CMOS)-based integrated circuit technology, it has become more difficult to follow Moore's law to further downscale the size of electronic components. Devices based on various nanostructures were constructed to continue the trend in the minimization of electronics, and molecular devices are among the most promising candidates. Compared with other candidates, molecular devices show unique superiorities, and intensive studies on molecular devices have been carried out both experimentally and theoretically at the present time. Compared to two-terminal molecular devices, three-terminal devices, namely single-molecule transistors, show unique advantages both in fundamental research and application and are considered to be an essential part of integrated circuits based on molecular devices. However, it is very difficult to construct them using the traditional microfabrication techniques directly, thus new fabrication strategies are developed. This review aims to provide an exclusive way of manufacturing solid state gated nanogap electrodes, the foundation of constructing transistors of single or a few molecules. Such single-molecule transistors have the potential to be used to build integrated circuits. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Gate Tunable Transport in Graphene/MoS₂/(Cr/Au) Vertical Field-Effect Transistors.
Nazir, Ghazanfar; Khan, Muhammad Farooq; Aftab, Sikandar; Afzal, Amir Muhammad; Dastgeer, Ghulam; Rehman, Malik Abdul; Seo, Yongho; Eom, Jonghwa
2017-12-28
Two-dimensional materials based vertical field-effect transistors have been widely studied due to their useful applications in industry. In the present study, we fabricate graphene/MoS₂/(Cr/Au) vertical transistor based on the mechanical exfoliation and dry transfer method. Since the bottom electrode was made of monolayer graphene (Gr), the electrical transport in our Gr/MoS₂/(Cr/Au) vertical transistors can be significantly modified by using back-gate voltage. Schottky barrier height at the interface between Gr and MoS₂ can be modified by back-gate voltage and the current bias. Vertical resistance (R vert ) of a Gr/MoS₂/(Cr/Au) transistor is compared with planar resistance (R planar ) of a conventional lateral MoS₂ field-effect transistor. We have also studied electrical properties for various thicknesses of MoS₂ channels in both vertical and lateral transistors. As the thickness of MoS₂ increases, R vert increases, but R planar decreases. The increase of R vert in the thicker MoS₂ film is attributed to the interlayer resistance in the vertical direction. However, R planar shows a lower value for a thicker MoS₂ film because of an excess of charge carriers available in upper layers connected directly to source/drain contacts that limits the conduction through layers closed to source/drain electrodes. Hence, interlayer resistance associated with these layers contributes to planer resistance in contrast to vertical devices in which all layers contribute interlayer resistance.
Liquid–Solid Dual-Gate Organic Transistors with Tunable Threshold Voltage for Cell Sensing
Zhang, Yu
2017-10-17
Liquid electrolyte-gated organic field effect transistors and organic electrochemical transistors have recently emerged as powerful technology platforms for sensing and simulation of living cells and organisms. For such applications, the transistors are operated at a gate voltage around or below 0.3 V because prolonged application of a higher voltage bias can lead to membrane rupturing and cell death. This constraint often prevents the operation of the transistors at their maximum transconductance or most sensitive regime. Here, we exploit a solid–liquid dual-gate organic transistor structure, where the threshold voltage of the liquid-gated conduction channel is controlled by an additional gate that is separated from the channel by a metal-oxide gate dielectric. With this design, the threshold voltage of the “sensing channel” can be linearly tuned in a voltage window exceeding 0.4 V. We have demonstrated that the dual-gate structure enables a much better sensor response to the detachment of human mesenchymal stem cells. In general, the capability of tuning the optimal sensing bias will not only improve the device performance but also broaden the material selection for cell-based organic bioelectronics.
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits
Directory of Open Access Journals (Sweden)
Tooraj Nikoubin
2010-01-01
Full Text Available A new transistor sizing algorithm, SEA (Simple Exact Algorithm, for optimizing low-power and high-speed arithmetic integrated circuits is proposed. In comparison with other transistor sizing algorithms, simplicity, accuracy, independency of order and initial sizing factors of transistors, and flexibility in choosing the optimization parameters such as power consumption, delay, Power-Delay Product (PDP, chip area or the combination of them are considered as the advantages of this new algorithm. More exhaustive rules of grouping transistors are the main trait of our algorithm. Hence, the SEA algorithm dominates some major transistor sizing metrics such as optimization rate, simulation speed, and reliability. According to approximate comparison of the SEA algorithm with MDE and ADC for a number of conventional full adder circuits, delay and PDP have been improved 55.01% and 57.92% on an average, respectively. By comparing the SEA and Chang's algorithm, 25.64% improvement in PDP and 33.16% improvement in delay have been achieved. All the simulations have been performed with 0.13 m technology based on the BSIM3v3 model using HSpice simulator software.
Liquid-Solid Dual-Gate Organic Transistors with Tunable Threshold Voltage for Cell Sensing.
Zhang, Yu; Li, Jun; Li, Rui; Sbircea, Dan-Tiberiu; Giovannitti, Alexander; Xu, Junling; Xu, Huihua; Zhou, Guodong; Bian, Liming; McCulloch, Iain; Zhao, Ni
2017-11-08
Liquid electrolyte-gated organic field effect transistors and organic electrochemical transistors have recently emerged as powerful technology platforms for sensing and simulation of living cells and organisms. For such applications, the transistors are operated at a gate voltage around or below 0.3 V because prolonged application of a higher voltage bias can lead to membrane rupturing and cell death. This constraint often prevents the operation of the transistors at their maximum transconductance or most sensitive regime. Here, we exploit a solid-liquid dual-gate organic transistor structure, where the threshold voltage of the liquid-gated conduction channel is controlled by an additional gate that is separated from the channel by a metal-oxide gate dielectric. With this design, the threshold voltage of the "sensing channel" can be linearly tuned in a voltage window exceeding 0.4 V. We have demonstrated that the dual-gate structure enables a much better sensor response to the detachment of human mesenchymal stem cells. In general, the capability of tuning the optimal sensing bias will not only improve the device performance but also broaden the material selection for cell-based organic bioelectronics.
International Nuclear Information System (INIS)
Kim, Min-Hoi; Lee, Gyu Jeong; Keum, Chang-Min; Lee, Sin-Doo
2014-01-01
We propose a concept of rewritable ferroelectric random access memory (RAM) with two lateral organic transistors-in-one cell architecture. Lateral integration of a paraelectric organic field-effect transistor (OFET), being a selection transistor, and a ferroelectric OFET as a memory transistor is realized using a paraelectric depolarizing layer (PDL) which is patterned on a ferroelectric insulator by transfer-printing. For the selection transistor, the key roles of the PDL are to reduce the dipolar strength and the surface roughness of the gate insulator, leading to the low memory on–off ratio and the high switching on–off current ratio. A new driving scheme preventing the crosstalk between adjacent memory cells is also demonstrated for the rewritable operation of the ferroelectric RAM. (paper)
International Nuclear Information System (INIS)
Zheng Yuzhan; Lu Wu; Ren Diyuan; Wang Yiyuan; Wang Zhikuan; Yang Yonghui
2010-01-01
The characteristics of radiation damage under a high or low dose rate in lateral PNP transistors with a heavily or lightly doped emitter is investigated. Experimental results show that as the total dose increases, the base current of transistors would increase and the current gain decreases. Furthermore, more degradation has been found in lightly-doped PNP transistors, and an abnormal effect is observed in heavily doped transistors. The role of radiation defects, especially the double effects of oxide trapped charge, is discussed in heavily or lightly doped transistors. Finally, through comparison between the high- and low-dose-rate response of the collector current in heavily doped lateral PNP transistors, the abnormal effect can be attributed to the annealing of the oxide trapped charge. The response of the collector current, in heavily doped PNP transistors under high- and low-dose-rate irradiation is described in detail. (semiconductor integrated circuits)
Laser-Printed Organic Thin-Film Transistors
Diemer, Peter J.
2017-09-20
Solution deposition of organic optoelectronic materials enables fast roll-to-roll manufacturing of photonic and electronic devices on any type of substrate and at low cost. But controlling the film microstructure when it crystallizes from solution can be challenging. This represents a major limitation of this technology, since the microstructure, in turn, governs the charge transport properties of the material. Further, the solvents typically used are hazardous, which precludes their incorporation in large-scale manufacturing processes. Here, the first ever organic thin-film transistor fabricated with an electrophotographic laser printing process using a standard office laser printer is reported. This completely solvent-free additive manufacturing method allows for simultaneous deposition, purification, and patterning of the organic semiconductor layer. Laser-printed transistors using triisopropylsilylethynyl pentacene as the semiconductor layer are realized on flexible substrates and characterized, making this a successful first demonstration of the potential of laser printing of organic semiconductors.
A hydrogel capsule as gate dielectric in flexible organic field-effect transistors
Energy Technology Data Exchange (ETDEWEB)
Dumitru, L. M.; Manoli, K.; Magliulo, M.; Torsi, L., E-mail: luisa.torsi@uniba.it [Department of Chemistry, University of Bari “Aldo Moro”, Via Orabona 4, Bari I-70126 (Italy); Ligonzo, T. [Department of Physics, University of Bari “Aldo Moro”, Via Orabona 4, Bari I-70126 (Italy); Palazzo, G. [Department of Chemistry, University of Bari “Aldo Moro”, Via Orabona 4, Bari I-70126 (Italy); Center of Colloid and Surface Science—CSGI—Bari Unit, Via Orabona 4, Bari I-70126 (Italy)
2015-01-01
A jellified alginate based capsule serves as biocompatible and biodegradable electrolyte system to gate an organic field-effect transistor fabricated on a flexible substrate. Such a system allows operating thiophene based polymer transistors below 0.5 V through an electrical double layer formed across an ion-permeable polymeric electrolyte. Moreover, biological macro-molecules such as glucose-oxidase and streptavidin can enter into the gating capsules that serve also as delivery system. An enzymatic bio-reaction is shown to take place in the capsule and preliminary results on the measurement of the electronic responses promise for low-cost, low-power, flexible electronic bio-sensing applications using capsule-gated organic field-effect transistors.
Is there a relationship between curvature and inductance in the Josephson junction?
Dobrowolski, T.; Jarmoliński, A.
2018-03-01
A Josephson junction is a device made of two superconducting electrodes separated by a very thin layer of isolator or normal metal. This relatively simple device has found a variety of technical applications in the form of Superconducting Quantum Interference Devices (SQUIDs) and Single Electron Transistors (SETs). One can expect that in the near future the Josephson junction will find applications in digital electronics technology RSFQ (Rapid Single Flux Quantum) and in the more distant future in construction of quantum computers. Here we concentrate on the relation of the curvature of the Josephson junction with its inductance. We apply a simple Capacitively Shunted Junction (CSJ) model in order to find condition which guarantees consistency of this model with prediction based on the Maxwell and London equations with Landau-Ginzburg current of Cooper pairs. This condition can find direct experimental verification.
A quantum optical transistor with a single quantum dot in a photonic crystal nanocavity
International Nuclear Information System (INIS)
Li Jinjin; Zhu Kadi
2011-01-01
Laser and strong coupling can coexist in a single quantum dot (QD) coupled to a photonic crystal nanocavity. This provides an important clue towards the realization of a quantum optical transistor. Using experimentally realistic parameters, in this work, theoretical analysis shows that such a quantum optical transistor can be switched on or off by turning on or off the pump laser, which corresponds to attenuation or amplification of the probe laser, respectively. Furthermore, based on this quantum optical transistor, an all-optical measurement of the vacuum Rabi splitting is also presented. The idea of associating a quantum optical transistor with this coupled QD-nanocavity system may achieve images of light controlling light in all-optical logic circuits and quantum computers.
A quantum optical transistor with a single quantum dot in a photonic crystal nanocavity.
Li, Jin-Jin; Zhu, Ka-Di
2011-02-04
Laser and strong coupling can coexist in a single quantum dot (QD) coupled to a photonic crystal nanocavity. This provides an important clue towards the realization of a quantum optical transistor. Using experimentally realistic parameters, in this work, theoretical analysis shows that such a quantum optical transistor can be switched on or off by turning on or off the pump laser, which corresponds to attenuation or amplification of the probe laser, respectively. Furthermore, based on this quantum optical transistor, an all-optical measurement of the vacuum Rabi splitting is also presented. The idea of associating a quantum optical transistor with this coupled QD-nanocavity system may achieve images of light controlling light in all-optical logic circuits and quantum computers.
Sidewall GaAs tunnel junctions fabricated using molecular layer epitaxy
Directory of Open Access Journals (Sweden)
Takeo Ohno and Yutaka Oyama
2012-01-01
Full Text Available In this article we review the fundamental properties and applications of sidewall GaAs tunnel junctions. Heavily impurity-doped GaAs epitaxial layers were prepared using molecular layer epitaxy (MLE, in which intermittent injections of precursors in ultrahigh vacuum were applied, and sidewall tunnel junctions were fabricated using a combination of device mesa wet etching of the GaAs MLE layer and low-temperature area-selective regrowth. The fabricated tunnel junctions on the GaAs sidewall with normal mesa orientation showed a record peak current density of 35 000 A cm-2. They can potentially be used as terahertz devices such as a tunnel injection transit time effect diode or an ideal static induction transistor.
Vertically aligned carbon nanotube field-effect transistors
Li, Jingqi; Zhao, Chao; Wang, Qingxiao; Zhang, Qiang; Wang, Zhihong; Zhang, Xixiang; Abutaha, Anas I.; Alshareef, Husam N.
2012-01-01
Vertically aligned carbon nanotube field-effect transistors (CNTFETs) have been developed using pure semiconducting carbon nanotubes. The source and drain were vertically stacked, separated by a dielectric, and the carbon nanotubes were placed
VO2-based radiative thermal transistor with a semi-transparent base
Prod'homme, Hugo; Ordonez-Miranda, Jose; Ezzahri, Younès; Drévillon, Jérémie; Joulain, Karl
2018-05-01
We study a radiative thermal transistor analogous to an electronic one made of a VO2 base placed between two silica semi-infinite plates playing the roles of the transistor collector and emitter. The fact that VO2 exhibits an insulator to metal transition is exploited to modulate and/or amplify heat fluxes between the emitter and the collector, by applying a thermal current on the VO2 base. We extend the work of precedent studies considering the case where the base can be semi-transparent so that heat can be exchanged directly between the collector and the emitter. Both near and far field cases are considered leading to 4 typical regimes resulting from the fact that the emitter-base and base-collector separation distances can be larger or smaller than the thermal wavelength for a VO2 layer opaque or semi-transparent. Thermal currents variations with the base temperatures are calculated and analyzed. It is found that the transistor can operate in an amplification mode as already stated in [1] or in a switching mode as seen in [2]. An optimum configuration for the base thickness and separation distance maximizing the thermal transistor modulation factor is found.
Abnormal Multiple Charge Memory States in Exfoliated Few-Layer WSe2 Transistors.
Chen, Mikai; Wang, Yifan; Shepherd, Nathan; Huard, Chad; Zhou, Jiantao; Guo, L J; Lu, Wei; Liang, Xiaogan
2017-01-24
To construct reliable nanoelectronic devices based on emerging 2D layered semiconductors, we need to understand the charge-trapping processes in such devices. Additionally, the identified charge-trapping schemes in such layered materials could be further exploited to make multibit (or highly desirable analog-tunable) memory devices. Here, we present a study on the abnormal charge-trapping or memory characteristics of few-layer WSe 2 transistors. This work shows that multiple charge-trapping states with large extrema spacing, long retention time, and analog tunability can be excited in the transistors made from mechanically exfoliated few-layer WSe 2 flakes, whereas they cannot be generated in widely studied few-layer MoS 2 transistors. Such charge-trapping characteristics of WSe 2 transistors are attributed to the exfoliation-induced interlayer deformation on the cleaved surfaces of few-layer WSe 2 flakes, which can spontaneously form ambipolar charge-trapping sites. Our additional results from surface characterization, charge-retention characterization at different temperatures, and density functional theory computation strongly support this explanation. Furthermore, our research also demonstrates that the charge-trapping states excited in multiple transistors can be calibrated into consistent multibit data storage levels. This work advances the understanding of the charge memory mechanisms in layered semiconductors, and the observed charge-trapping states could be further studied for enabling ultralow-cost multibit analog memory devices.
Interface-controlled, high-mobility organic transistors
Jurchescu, Oana D.; Popinciuc, Mihaita; van Wees, Bart J.; Palstra, Thomas T. M.
2007-01-01
The achievement of high mobilities in field-effect transistors (FETs) is one of the main challenges for the widespread application of organic conductors in devices. Good device performance of a single-crystal pentacene FET requires both removal of impurity molecules from the bulk and the
Jeon, Pyo Jin; Lee, Young Tack; Lim, June Yeong; Kim, Jin Sung; Hwang, Do Kyung; Im, Seongil
2016-02-10
Black phosphorus (BP) nanosheet is two-dimensional (2D) semiconductor with distinct band gap and attracting recent attention from researches because it has some similarity to gapless 2D semiconductor graphene in the following two aspects: single element (P) for its composition and quite high mobilities depending on its fabrication conditions. Apart from several electronic applications reported with BP nanosheet, here we report for the first time BP nanosheet-ZnO nanowire 2D-1D heterojunction applications for p-n diodes and BP-gated junction field effect transistors (JFETs) with n-ZnO channel on glass. For these nanodevices, we take advantages of the mechanical flexibility of p-type conducting of BP and van der Waals junction interface between BP and ZnO. As a result, our BP-ZnO nanodimension p-n diode displays a high ON/OFF ratio of ∼10(4) in static rectification and shows kilohertz dynamic rectification as well while ZnO nanowire channel JFET operations are nicely demonstrated by BP gate switching in both electrostatics and kilohertz dynamics.
Qiu, Chenguang; Zhang, Zhiyong; Zhong, Donglai; Si, Jia; Yang, Yingjun; Peng, Lian-Mao
2015-01-27
Field-effect transistors (FETs) based on moderate or large diameter carbon nanotubes (CNTs) usually suffer from ambipolar behavior, large off-state current and small current on/off ratio, which are highly undesirable for digital electronics. To overcome these problems, a feedback-gate (FBG) FET structure is designed and tested. This FBG FET differs from normal top-gate FET by an extra feedback-gate, which is connected directly to the drain electrode of the FET. It is demonstrated that a FBG FET based on a semiconducting CNT with a diameter of 1.5 nm may exhibit low off-state current of about 1 × 10(-13) A, high current on/off ratio of larger than 1 × 10(8), negligible drain-induced off-state leakage current, and good subthreshold swing of 75 mV/DEC even at large source-drain bias and room temperature. The FBG structure is promising for CNT FETs to meet the standard for low-static-power logic electronics applications, and could also be utilized for building FETs using other small band gap semiconductors to suppress leakage current.
Investigations on field-effect transistors based on two-dimensional materials
Energy Technology Data Exchange (ETDEWEB)
Finge, T.; Riederer, F.; Grap, T.; Knoch, J. [Institute of Semiconductor Electronics, RWTH Aachen University (Germany); Mueller, M.R. [Institute of Semiconductor Electronics, RWTH Aachen University (Germany); Infineon Technologies, Villach (Austria); Kallis, K. [Intelligent Microsystems Chair, TU Dortmund University (Germany)
2017-11-15
In the present article, experimental and theoretical investigations regarding field-effect transistors based on two-dimensional (2D) materials are presented. First, the properties of contacts between a metal and 2D material are discussed. To this end, metal-to-graphene contacts as well to transition metal dichalcogenides (TMD) are studied. Whereas metal-graphene contacts can be tuned with an appropriate back-gate, metal-TMD contacts exhibit strong Fermi level pinning showing substantially limited maximum possible drive current. Next, tungsten diselenide (WSe{sub 2}) field-effect transistors are presented. Employing buried-triple-gate substrates allows tuning source, channel and drain by applying appropriate gate voltages so that the device can be reconfigured to work as n-type, p-type and as so-called band-to-band tunnel field-effect transistor on the same WSe{sub 2} flake. (copyright 2017 by WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)
Ferroelectric-gate field effect transistor memories device physics and applications
Ishiwara, Hiroshi; Okuyama, Masanori; Sakai, Shigeki; Yoon, Sung-Min
2016-01-01
This book provides comprehensive coverage of the materials characteristics, process technologies, and device operations for memory field-effect transistors employing inorganic or organic ferroelectric thin films. This transistor-type ferroelectric memory has interesting fundamental device physics and potentially large industrial impact. Among the various applications of ferroelectric thin films, the development of nonvolatile ferroelectric random access memory (FeRAM) has progressed most actively since the late 1980s and has achieved modest mass production levels for specific applications since 1995. There are two types of memory cells in ferroelectric nonvolatile memories. One is the capacitor-type FeRAM and the other is the field-effect transistor (FET)-type FeRAM. Although the FET-type FeRAM claims ultimate scalability and nondestructive readout characteristics, the capacitor-type FeRAMs have been the main interest for the major semiconductor memory companies, because the ferroelectric FET has fatal handic...
Polymer-electrolyte-gated nanowire synaptic transistors for neuromorphic applications
Zou, Can; Sun, Jia; Gou, Guangyang; Kong, Ling-An; Qian, Chuan; Dai, Guozhang; Yang, Junliang; Guo, Guang-hua
2017-09-01
Polymer-electrolytes are formed by dissolving a salt in polymer instead of water, the conducting mechanism involves the segmental motion-assisted diffusion of ion in the polymer matrix. Here, we report on the fabrication of tin oxide (SnO2) nanowire synaptic transistors using polymer-electrolyte gating. A thin layer of poly(ethylene oxide) and lithium perchlorate (PEO/LiClO4) was deposited on top of the devices, which was used to boost device performances. A voltage spike applied on the in-plane gate attracts ions toward the polymer-electrolyte/SnO2 nanowire interface and the ions are gradually returned after the pulse is removed, which can induce a dynamic excitatory postsynaptic current in the nanowire channel. The SnO2 synaptic transistors exhibit the behavior of short-term plasticity like the paired-pulse facilitation and self-adaptation, which is related to the electric double-effect regulation. In addition, the synaptic logic functions and the logical function transformation are also discussed. Such single SnO2 nanowire-based synaptic transistors are of great importance for future neuromorphic devices.
Carbon nanotube transistors scaled to a 40-nanometer footprint.
Cao, Qing; Tersoff, Jerry; Farmer, Damon B; Zhu, Yu; Han, Shu-Jen
2017-06-30
The International Technology Roadmap for Semiconductors challenges the device research community to reduce the transistor footprint containing all components to 40 nanometers within the next decade. We report on a p-channel transistor scaled to such an extremely small dimension. Built on one semiconducting carbon nanotube, it occupies less than half the space of leading silicon technologies, while delivering a significantly higher pitch-normalized current density-above 0.9 milliampere per micrometer at a low supply voltage of 0.5 volts with a subthreshold swing of 85 millivolts per decade. Furthermore, we show transistors with the same small footprint built on actual high-density arrays of such nanotubes that deliver higher current than that of the best-competing silicon devices under the same overdrive, without any normalization. We achieve this using low-resistance end-bonded contacts, a high-purity semiconducting carbon nanotube source, and self-assembly to pack nanotubes into full surface-coverage aligned arrays. Copyright © 2017 The Authors, some rights reserved; exclusive licensee American Association for the Advancement of Science. No claim to original U.S. Government Works.
Giant current fluctuations in an overheated single-electron transistor
Laakso, M. A.; Heikkilä, T. T.; Nazarov, Yuli V.
2010-11-01
Interplay of cotunneling and single-electron tunneling in a thermally isolated single-electron transistor leads to peculiar overheating effects. In particular, there is an interesting crossover interval where the competition between cotunneling and single-electron tunneling changes to the dominance of the latter. In this interval, the current exhibits anomalous sensitivity to the effective electron temperature of the transistor island and its fluctuations. We present a detailed study of the current and temperature fluctuations at this interesting point. The methods implemented allow for a complete characterization of the distribution of the fluctuating quantities, well beyond the Gaussian approximation. We reveal and explore the parameter range where, for sufficiently small transistor islands, the current fluctuations become gigantic. In this regime, the optimal value of the current, its expectation value, and its standard deviation differ from each other by parametrically large factors. This situation is unique for transport in nanostructures and for electron transport in general. The origin of this spectacular effect is the exponential sensitivity of the current to the fluctuating effective temperature.
Balanced Ambipolar Organic Field-Effect Transistors by Polymer Preaggregation.
Janasz, Lukasz; Luczak, Adam; Marszalek, Tomasz; Dupont, Bertrand G R; Jung, Jaroslaw; Ulanski, Jacek; Pisula, Wojciech
2017-06-21
Ambipolar organic field-effect transistors (OFETs) based on heterojunction active films still suffer from an imbalance in the transport of electrons and holes. This problem is related to an uncontrolled phase separation between the donor and acceptor organic semiconductors in the thin films. In this work, we have developed a concept to improve the phase separation in heterojunction transistors to enhance their ambipolar performance. This concept is based on preaggregation of the donor polymer, in this case poly(3-hexylthiophene) (P3HT), before solution mixing with the small-molecular-weight acceptor, phenyl-C61-butyric acid methyl ester (PCBM). The resulting heterojunction transistor morphology consists of self-assembled P3HT fibers embedded in a PCBM matrix, ensuring balanced mobilities reaching 0.01 cm 2 /V s for both holes and electrons. These are the highest mobility values reported so far for ambipolar OFETs based on P3HT/PCBM blends. Preaggregation of the conjugated polymer before fabricating binary blends can be regarded as a general concept for a wider range of semiconducting systems applicable in organic electronic devices.
Radiation-stimulated processes in transistor temperature sensors
International Nuclear Information System (INIS)
Pavlyk, B. V.; Grypa, A. S.
2016-01-01
The features of the radiation-stimulated changes in the I–V and C–V characteristics of the emitter–base junction in KT3117 transistors are considered. It is shown that an increase in the current through the emitter junction is observed at the initial stage of irradiation (at doses of D < 4000 Gy for the “passive” irradiation mode and D < 5200 Gy for the “active” mode), which is caused by the effect of radiation-stimulated ordering of the defect-containing structure of the p–n junction. It is also shown that the X-ray irradiation (D < 14000 Gy), the subsequent relaxation (96 h), and thermal annealing (2 h at 400 K) of the transistor temperature sensors under investigation result in an increase in their radiation resistance.
The Integration and Applications of Organic Thin Film Transistors and Ferroelectric Polymers
Hsu, Yu-Jen
Organic thin film transistors and ferroelectric polymer (polyvinylidene difluoride) sheet material are integrated to form various sensors for stress/strain, acoustic wave, and Infrared (heat) sensing applications. Different from silicon-based transistors, organic thin film transistors can be fabricated and processed in room-temperature and integrated with a variety of substrates. On the other hand, polyvinylidene difluoride (PVDF) exhibits ferroelectric properties that are highly useful for sensor applications. The wide frequency bandwidth (0.001 Hz to 10 GHz), vast dynamic range (100n to 10M psi), and high elastic compliance (up to 3 percent) make PVDF a more suitable candidate over ceramic piezoelectric materials for thin and flexible sensor applications. However, the low Curie temperature may have impeded its integration with silicon technology. Organic thin film transistors, however, do not have the limitation of processing temperature, hence can serve as transimpedance amplifiers to convert the charge signal generated by PVDF into current signal that are more measurable and less affected by any downstream parasitics. Piezoelectric sensors are useful for a range of applications, but passive arrays suffer from crosstalk and signal attenuation which have complicated the development of array-based PVDF sensors. We have used organic field effect transistors, which are compatible with the low Curie temperature of a flexible piezoelectric polymer,PVDF, to monolithically fabricate transimpedance amplifiers directly on the sensor surface and convert the piezoelectric charge signal into a current signal which can be detected even in the presence of parasitic capacitances. The device couples the voltage generated by the PVDF film under strain into the gate of the organic thin film transistors (OFET) using an arrangement that allows the full piezoelectric voltage to couple to the channel, while also increasing the charge retention time. A bipolar detector is created by
A Novel Approach for Eccentricity Fault Detection in Squirrel Cage Induction Motors
Directory of Open Access Journals (Sweden)
Mehdi Ahmadi
2013-01-01
Full Text Available In this paper, static eccentricity fault detection in induction motors is studied. Two dimensional finite element method (2D-FEM is used for faultless and eccentric condition modeling in induction motors. Also current and speed signals are compared in two experimental and simulation cases for model validating. For fault detection, fast Fourier transform is used at first. In this method, high order harmonics with small amplitude can alarms the fault occurrence. For this reason, the fault detection process is difficult.To overcome these drawbacks, it is suggested that two test coils contrive around the air-gap. So, any changes in air-gap can be detected easily. Moreover this test coils are used in open circuit case. So, these test coils do not effect on motor dynamics. Also, the results show that modulated voltage can be alarm the fault occurrence, type and percent well.
Amos, S W
1990-01-01
Principles of Transistor Circuits, Seventh Edition discusses the fundamental concepts of transistor circuits. The book is comprised of 16 chapters that cover amplifiers, oscillators, and generators. Chapter 1 discusses semiconductors and junction nodes, while Chapter 2 covers the basic principles of transistors. The subsequent chapters focus on amplifiers, where one of the chapters discusses bias and D.C. The book also talks about sinusoidal oscillators and covers modulators, demodulators, mixers, and receivers. Chapters 13 and 14 discuss pulse generators and sawtooth generators, respectively.
Si/SiC heterojunction optically controlled transistor with charge compensation layer
Directory of Open Access Journals (Sweden)
Pu Hongbin
2016-01-01
Full Text Available A novel n-SiC/p-Si/n-Si optically controlled transistor with charge compensation layer has been studied in the paper. The performance of the device is simulated using Silvaco Atlas tools, which indicates excellent performances of the device in both blocking state and conducting state. The device also has a good switching characteristic with 0.54μs as rising time and 0.66μs as falling time. With the charge compensation layer, the breakdown voltage and the spectral response intensity of the device are improved by 90V and 33A/W respectively. Compared with optically controlled transistor without charge compensation layer, the n-SiC/p-Si/n-Si optically controlled transistor with charge compensation layer has a better performance.
Patterning solution-processed organic single-crystal transistors with high device performance
Directory of Open Access Journals (Sweden)
Yun Li
2011-06-01
Full Text Available We report on the patterning of organic single-crystal transistors with high device performance fabricated via a solution process under ambient conditions. The semiconductor was patterned on substrates via surface selective deposition. Subsequently, solvent-vapor annealing was performed to reorganize the semiconductor into single crystals. The transistors exhibited field-effect mobility (μFET of up to 3.5 cm2/V s. Good reliability under bias-stress conditions indicates low density of intrinsic defects in crystals and low density of traps at the active interfaces. Furthermore, the Y function method clearly suggests that the variation of μFET of organic crystal transistors was caused by contact resistance. Further improvement of the device with higher μFET with smaller variation can be expected when lower and more uniform contact resistance is achieved.
Total dose effects on elementary transistors of a comparator in bipolar technology
International Nuclear Information System (INIS)
Sarrabayrouse, G.; Guerre, F.X.
1995-01-01
In the present work we investigate elementary transistors behaviour of an Integrated Circuit using junction isolation bipolar technology. Polarization conditions and dose rate effects on the main elementary transistor types are analysed. Furthermore, the IC electronic function degradations are studied. Finally, a comparison between the function degradations and the elementary component ones is attempted. (author)
Otsuka, Keigo; Inoue, Taiki; Maeda, Etsuo; Kometani, Reo; Chiashi, Shohei; Maruyama, Shigeo
2017-11-28
Ballistic transport and sub-10 nm channel lengths have been achieved in transistors containing one single-walled carbon nanotube (SWNT). To fill the gap between single-tube transistors and high-performance logic circuits for the replacement of silicon, large-area, high-density, and purely semiconducting (s-) SWNT arrays are highly desired. Here we demonstrate the fabrication of multiple transistors along a purely semiconducting SWNT array via an on-chip purification method. Water- and polymer-assisted burning from site-controlled nanogaps is developed for the reliable full-length removal of metallic SWNTs with the damage to s-SWNTs minimized even in high-density arrays. All the transistors with various channel lengths show large on-state current and excellent switching behavior in the off-state. Since our method potentially provides pure s-SWNT arrays over a large area with negligible damage, numerous transistors with arbitrary dimensions could be fabricated using a conventional semiconductor process, leading to SWNT-based logic, high-speed communication, and other next-generation electronic devices.
Benchmarking organic mixed conductors for transistors
Inal, Sahika
2017-11-20
Organic mixed conductors have garnered significant attention in applications from bioelectronics to energy storage/generation. Their implementation in organic transistors has led to enhanced biosensing, neuromorphic function, and specialized circuits. While a narrow class of conducting polymers continues to excel in these new applications, materials design efforts have accelerated as researchers target new functionality, processability, and improved performance/stability. Materials for organic electrochemical transistors (OECTs) require both efficient electronic transport and facile ion injection in order to sustain high capacity. In this work, we show that the product of the electronic mobility and volumetric charge storage capacity (µC*) is the materials/system figure of merit; we use this framework to benchmark and compare the steady-state OECT performance of ten previously reported materials. This product can be independently verified and decoupled to guide materials design and processing. OECTs can therefore be used as a tool for understanding and designing new organic mixed conductors.
Benchmarking organic mixed conductors for transistors
Inal, Sahika; Malliaras, George G.; Rivnay, Jonathan
2017-01-01
Organic mixed conductors have garnered significant attention in applications from bioelectronics to energy storage/generation. Their implementation in organic transistors has led to enhanced biosensing, neuromorphic function, and specialized circuits. While a narrow class of conducting polymers continues to excel in these new applications, materials design efforts have accelerated as researchers target new functionality, processability, and improved performance/stability. Materials for organic electrochemical transistors (OECTs) require both efficient electronic transport and facile ion injection in order to sustain high capacity. In this work, we show that the product of the electronic mobility and volumetric charge storage capacity (µC*) is the materials/system figure of merit; we use this framework to benchmark and compare the steady-state OECT performance of ten previously reported materials. This product can be independently verified and decoupled to guide materials design and processing. OECTs can therefore be used as a tool for understanding and designing new organic mixed conductors.
Instrument employing a charge flow transistor
International Nuclear Information System (INIS)
1981-01-01
The invention concerns instruments employing charge-flow transistors that operate to sense a property in the surrounding environment. It is based on a particular sensor principle, thin-film conduction. The instruments described include a charge-flow transistor with semiconductor substrate, a source region, a drain region, a gate insulator, and a gapped electrode structure with a thin-film sensor material in the gap. The sensor material has an electrical conductance that is sensitive to a property of the ambient environment and has a surface conductance that differs substantially from its bulk conductance. The main object is to provide a low-cost instrument for early-warning fire-detection devices: in this case the property detected would be the products of combustion. Other properties that can be sensed include gases or vapors, free radicals, vapor electromagnetic radiation, subatomic particles, atomic or molecular beams, changes in ambient pressure or temperature, the chemical composition and the electrochemical potential of a solution. (U.K.)
Instrument employing a charge flow transistor
Energy Technology Data Exchange (ETDEWEB)
1981-03-11
The invention concerns instruments employing charge-flow transistors that operate to sense a property in the surrounding environment. It is based on a particular sensor principle, thin-film conduction. The instruments described include a charge-flow transistor with semiconductor substrate, a source region, a drain region, a gate insulator, and a gapped electrode structure with a thin-film sensor material in the gap. The sensor material has an electrical conductance that is sensitive to a property of the ambient environment and has a surface conductance that differs substantially from its bulk conductance. The main object is to provide a low-cost instrument for early-warning fire-detection devices: in this case the property detected would be the products of combustion. Other properties that can be sensed include gases or vapors, free radicals, vapor electromagnetic radiation, subatomic particles, atomic or molecular beams, changes in ambient pressure or temperature, the chemical composition and the electrochemical potential of a solution.
Biomolecular detection using a metal semiconductor field effect transistor
Estephan, Elias; Saab, Marie-Belle; Buzatu, Petre; Aulombard, Roger; Cuisinier, Frédéric J. G.; Gergely, Csilla; Cloitre, Thierry
2010-04-01
In this work, our attention was drawn towards developing affinity-based electrical biosensors, using a MESFET (Metal Semiconductor Field Effect Transistor). Semiconductor (SC) surfaces must be prepared before the incubations with biomolecules. The peptides route was adapted to exceed and bypass the limits revealed by other types of surface modification due to the unwanted unspecific interactions. As these peptides reveal specific recognition of materials, then controlled functionalization can be achieved. Peptides were produced by phage display technology using a library of M13 bacteriophage. After several rounds of bio-panning, the phages presenting affinities for GaAs SC were isolated; the DNA of these specific phages were sequenced, and the peptide with the highest affinity was synthesized and biotinylated. To explore the possibility of electrical detection, the MESFET fabricated with the GaAs SC were used to detect the streptavidin via the biotinylated peptide in the presence of the bovine Serum Albumin. After each surface modification step, the IDS (current between the drain and the source) of the transistor was measured and a decrease in the intensity was detected. Furthermore, fluorescent microscopy was used in order to prove the specificity of this peptide and the specific localisation of biomolecules. In conclusion, the feasibility of producing an electrical biosensor using a MESFET has been demonstrated. Controlled placement, specific localization and detection of biomolecules on a MESFET transistor were achieved without covering the drain and the source. This method of functionalization and detection can be of great utility for biosensing application opening a new way for developing bioFETs (Biomolecular Field-Effect Transistor).
Benzocyclobutene (BCB) Polymer as Amphibious Buffer Layer for Graphene Field-Effect Transistor.
Wu, Yun; Zou, Jianjun; Huo, Shuai; Lu, Haiyan; Kong, Yuecan; Chen, Tangshen; Wu, Wei; Xu, Jingxia
2015-08-01
Owing to the scattering and trapping effects, the interfaces of dielectric/graphene or substrate/graphene can tailor the performance of field-effect transistor (FET). In this letter, the polymer of benzocyclobutene (BCB) was used as an amphibious buffer layer and located at between the layers of substrate and graphene and between the layers of dielectric and graphene. Interestingly, with the help of nonpolar and hydrophobic BCB buffer layer, the large-scale top-gated, chemical vapor deposited (CVD) graphene transistors was prepared on Si/SiO2 substrate, its cutoff frequency (fT) and the maximum cutoff frequency (fmax) of the graphene field-effect transistor (GFET) can be reached at 12 GHz and 11 GHz, respectively.
Sub-50 nm gate length SOI transistor development for high performance microprocessors
International Nuclear Information System (INIS)
Horstmann, M.; Greenlaw, D.; Feudel, Th.; Wei, A.; Frohberg, K.; Burbach, G.; Gerhardt, M.; Lenski, M.; Stephan, R.; Wieczorek, K.; Schaller, M.; Hohage, J.; Ruelke, H.; Klais, J.; Huebler, P.; Luning, S.; Bentum, R. van; Grasshoff, G.; Schwan, C.; Cheek, J.; Buller, J.; Krishnan, S.; Raab, M.; Kepler, N.
2004-01-01
Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40 nm gate length (L GATE ) PD SOI transistors into volume manufacturing for high-speed microprocessors. The key innovations developed for this transistor in order to overcome classical gate oxide and L GATE scaling is an unique differential triple spacer structure, stressed overlayer films inducing strain in the Silicon channel and optimized junctions. This transistor structure yields an outstanding ring oscillator speed with an unloaded inverter delay of 5.5 ps. The found improvements are highly manufacturable and scaleable for future device technologies like FD SOI
Nishikata, Daisuke; Ali, Mohammad Alimudin Bin Mohd; Hosoda, Kento; Matsumoto, Hiroshi; Nakamura, Kazuyuki
2018-04-01
A 36-bit × 32-entry fully digital ternary content addressable memory (TCAM) using the ratioless static random access memory (RL-SRAM) technology and fully complementary hierarchical-AND matching comparators (HAMCs) was developed. Since its fully complementary and digital operation enables the effect of device variabilities to be avoided, it can operate with a quite low supply voltage. A test chip incorporating a conventional TCAM and a proposed 24-transistor ratioless TCAM (RL-TCAM) cells and HAMCs was developed using a 0.18 µm CMOS process. The minimum operating voltage of 0.25 V of the developed RL-TCAM, which is less than half of that of the conventional TCAM, was measured via the conventional CMOS push–pull output buffers with the level-shifting and flipping technique using optimized pull-up voltage and resistors.
Wavy channel Thin Film Transistor for area efficient, high performance and low power applications
Hanna, Amir; Sevilla, Galo T.; Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa
2014-01-01
We report a new Thin Film Transistor (TFT) architecture that allows expansion of the device width using wavy (continuous without separation) fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor
Field-effect transistor memories based on ferroelectric polymers
Zhang, Yujia; Wang, Haiyang; Zhang, Lei; Chen, Xiaomeng; Guo, Yu; Sun, Huabin; Li, Yun
2017-11-01
Field-effect transistors based on ferroelectrics have attracted intensive interests, because of their non-volatile data retention, rewritability, and non-destructive read-out. In particular, polymeric materials that possess ferroelectric properties are promising for the fabrications of memory devices with high performance, low cost, and large-area manufacturing, by virtue of their good solubility, low-temperature processability, and good chemical stability. In this review, we discuss the material characteristics of ferroelectric polymers, providing an update on the current development of ferroelectric field-effect transistors (Fe-FETs) in non-volatile memory applications. Program supported partially by the NSFC (Nos. 61574074, 61774080), NSFJS (No. BK20170075), and the Open Partnership Joint Projects of NSFC-JSPS Bilateral Joint Research Projects (No. 61511140098).
Energy Technology Data Exchange (ETDEWEB)
Ghoggal, A.; Zouzou, S.E.; Sahraoui, M. [Laboratoire de genie electrique de Biskra, Departement d' electrotechnique, Universite Mohamed Khider, BP 145, Biskra (Algeria); Razik, H. [Groupe de Recherche en Electrotechnique et Electronique de Nancy, Universite Henri Poincare, Faculte des Sciences et Techniques, BP 239, F-54506 Vandoeuvre-les-Nancy (France); Khezzar, A. [Laboratoire d' Electrotechnique de Constantine, Universite Mentouri, Constantine (Algeria)
2009-05-15
This paper describes an improved method for the modeling of axial and radial eccentricities in induction motors (IM). The model is based on an extension of the modified winding function approach (MWFA) which allows for all harmonics of the magnetomotive force (MMF) to be taken into account. It is shown that a plane view of IM gets easily the motor inductances and reduces considerably the calculation process. The described technique includes accurately the slot skewing effect and leads to pure analytical expressions of the inductances in case of radial eccentricity. In order to model the static, dynamic or mixed axial eccentricity, three suitable alternatives are explained. Unlike the previous proposals, the discussed alternatives take into account all the harmonics of the inverse of air-gap function without any development in Fourier series. Simulation results as well as experimental verifications prove the usefulness and the effectiveness of the proposed model. (author)
International Nuclear Information System (INIS)
Ghoggal, A.; Zouzou, S.E.; Razik, H.; Sahraoui, M.; Khezzar, A.
2009-01-01
This paper describes an improved method for the modeling of axial and radial eccentricities in induction motors (IM). The model is based on an extension of the modified winding function approach (MWFA) which allows for all harmonics of the magnetomotive force (MMF) to be taken into account. It is shown that a plane view of IM gets easily the motor inductances and reduces considerably the calculation process. The described technique includes accurately the slot skewing effect and leads to pure analytical expressions of the inductances in case of radial eccentricity. In order to model the static, dynamic or mixed axial eccentricity, three suitable alternatives are explained. Unlike the previous proposals, the discussed alternatives take into account all the harmonics of the inverse of air-gap function without any development in Fourier series. Simulation results as well as experimental verifications prove the usefulness and the effectiveness of the proposed model.
Czech Academy of Sciences Publication Activity Database
Wunderlich, Joerg; Park, B.G.; Irvine, A.C.; Zarbo, Liviu; Rozkotová, E.; Němec, P.; Novák, Vít; Sinova, Jairo; Jungwirth, Tomáš
2010-01-01
Roč. 330, č. 6012 (2010), s. 1801-1804 ISSN 0036-8075 R&D Projects: GA AV ČR KAN400100652; GA MŠk LC510 EU Projects: European Commission(XE) 215368 - SemiSpinNet Grant - others:AV ČR(CZ) AP0801 Program:Akademická prémie - Praemium Academiae Institutional research plan: CEZ:AV0Z10100521 Keywords : spin Hall effect * spintronics * spin transistor Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 31.364, year: 2010
Characterization of a Common-Source Amplifier Using Ferroelectric Transistors
Hunt, Mitchell; Sayyah, Rana; MacLeond, Todd C.; Ho, Pat D.
2010-01-01
This paper presents empirical data that was collected through experiments using a FeFET in the established common-source amplifier circuit. The unique behavior of the FeFET lends itself to interesting and useful operation in this widely used common-source amplifier. The paper examines the effect of using a ferroelectric transistor for the amplifier. It also examines the effects of varying load resistance, biasing, and input voltages on the output signal and gives several examples of the output of the amplifier for a given input. The difference between a commonsource amplifier using a ferroelectric transistor and that using a MOSFET is addressed.
A Transistor Sizing Tool for Optimization of Analog CMOS Circuits: TSOp
Y.C.Wong; Syafeeza A. R; N. A. Hamid
2015-01-01
Optimization of a circuit by transistor sizing is often a slow, tedious and iterative manual process which relies on designer intuition. It is highly desirable to automate the transistor sizing process towards being able to rapidly design high performance integrated circuit. Presented here is a simple but effective algorithm for automatically optimizing the circuit parameters by exploiting the relationships among the genetic algorithm's coefficient values derived from the analog circuit desig...
Charge-density depinning at metal contacts of graphene field-effect transistors
Nouchi, Ryo; Tanigaki, Katsumi
2010-01-01
An anomalous distortion is often observed in the transfer characteristics of graphene field-effect transistors. We fabricate graphene transistors with ferromagnetic metal electrodes, which reproducibly display distorted transfer characteristics, and show that the distortion is caused by metal-graphene contacts with no charge-density pinning effect. The pinning effect, where the gate voltage cannot tune the charge density of graphene at the metal electrodes, has been experimentally observed; h...
Recent Advances of Solution-Processed Metal Oxide Thin-Film Transistors.
Xu, Wangying; Li, Hao; Xu, Jian-Bin; Wang, Lei
2018-03-06
Solution-processed metal oxide thin-film transistors (TFTs) are considered as one of the most promising transistor technologies for future large-area flexible electronics. This review surveys the recent advances in solution-based oxide TFTs, including n-type oxide semiconductors, oxide dielectrics and p-type oxide semiconductors. Firstly, we provide an introduction on oxide TFTs and the TFT configurations and operating principles. Secondly, we present the recent progress in solution-processed n-type transistors, with a special focus on low-temperature and large-area solution processed approaches as well as novel non-display applications. Thirdly, we give a detailed analysis of the state-of-the-art solution-processed oxide dielectrics for low-voltage electronics. Fourthly, we discuss the recent progress in solution-based p-type oxide semiconductors, which will enable the highly desirable future low-cost large-area complementary circuits. Finally, we draw the conclusions and outline the perspectives over the research field.
Irradiation of graphene field effect transistors with highly charged ions
Energy Technology Data Exchange (ETDEWEB)
Ernst, P.; Kozubek, R.; Madauß, L.; Sonntag, J.; Lorke, A.; Schleberger, M., E-mail: marika.schleberger@uni-due.de
2016-09-01
In this work, graphene field-effect transistors are used to detect defects due to irradiation with slow, highly charged ions. In order to avoid contamination effects, a dedicated ultra-high vacuum set up has been designed and installed for the in situ cleaning and electrical characterization of graphene field-effect transistors during irradiation. To investigate the electrical and structural modifications of irradiated graphene field-effect transistors, their transfer characteristics as well as the corresponding Raman spectra are analyzed as a function of ion fluence for two different charge states. The irradiation experiments show a decreasing mobility with increasing fluences. The mobility reduction scales with the potential energy of the ions. In comparison to Raman spectroscopy, the transport properties of graphene show an extremely high sensitivity with respect to ion irradiation: a significant drop of the mobility is observed already at fluences below 15 ions/μm{sup 2}, which is more than one order of magnitude lower than what is required for Raman spectroscopy.
Directory of Open Access Journals (Sweden)
OO Myo Min
2014-01-01
Full Text Available Electronics components such as bipolar junction transistors, diodes, etc. which are used in deep space mission are required to be tolerant to extensive exposure to energetic neutrons and ionizing radiation. This paper examines neutron radiation with pneumatic transfer system of TRIGA Mark-II reactor at the Malaysian Nuclear Agency. The effects of the gamma radiation from Co-60 on silicon NPN bipolar junction transistors is also be examined. Analyses on irradiated transistors were performed in terms of the electrical characteristics such as current gain, collector current and base current. Experimental results showed that the current gain on the devices degraded significantly after neutron and gamma radiations. Neutron radiation can cause displacement damage in the bulk layer of the transistor structure and gamma radiation can induce ionizing damage in the oxide layer of emitter-base depletion layer. The current gain degradation is believed to be governed by the increasing recombination current in the base-emitter depletion region.
BUSFET - A Novel Radiation-Hardened SOI Transistor
International Nuclear Information System (INIS)
Dodd, P.E.; Draper, B.L.; Schwank, J.R.; Shaneyfelt, M.R.
1999-01-01
A partially-depleted SOI transistor structure has been designed that does not require the use of specially-processed hardened buried oxides for total-dose hardness and maintains the intrinsic SEU and dose rate hardness advantages of SOI technology
Gate Tunable Transport in Graphene/MoS2/(Cr/Au Vertical Field-Effect Transistors
Directory of Open Access Journals (Sweden)
Ghazanfar Nazir
2017-12-01
Full Text Available Two-dimensional materials based vertical field-effect transistors have been widely studied due to their useful applications in industry. In the present study, we fabricate graphene/MoS2/(Cr/Au vertical transistor based on the mechanical exfoliation and dry transfer method. Since the bottom electrode was made of monolayer graphene (Gr, the electrical transport in our Gr/MoS2/(Cr/Au vertical transistors can be significantly modified by using back-gate voltage. Schottky barrier height at the interface between Gr and MoS2 can be modified by back-gate voltage and the current bias. Vertical resistance (Rvert of a Gr/MoS2/(Cr/Au transistor is compared with planar resistance (Rplanar of a conventional lateral MoS2 field-effect transistor. We have also studied electrical properties for various thicknesses of MoS2 channels in both vertical and lateral transistors. As the thickness of MoS2 increases, Rvert increases, but Rplanar decreases. The increase of Rvert in the thicker MoS2 film is attributed to the interlayer resistance in the vertical direction. However, Rplanar shows a lower value for a thicker MoS2 film because of an excess of charge carriers available in upper layers connected directly to source/drain contacts that limits the conduction through layers closed to source/drain electrodes. Hence, interlayer resistance associated with these layers contributes to planer resistance in contrast to vertical devices in which all layers contribute interlayer resistance.
Short-channel field-effect transistors with 9-atom and 13-atom wide graphene nanoribbons.
Llinas, Juan Pablo; Fairbrother, Andrew; Borin Barin, Gabriela; Shi, Wu; Lee, Kyunghoon; Wu, Shuang; Yong Choi, Byung; Braganza, Rohit; Lear, Jordan; Kau, Nicholas; Choi, Wonwoo; Chen, Chen; Pedramrazi, Zahra; Dumslaff, Tim; Narita, Akimitsu; Feng, Xinliang; Müllen, Klaus; Fischer, Felix; Zettl, Alex; Ruffieux, Pascal; Yablonovitch, Eli; Crommie, Michael; Fasel, Roman; Bokor, Jeffrey
2017-09-21
Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (L ch ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (I on > 1 μA at V d = -1 V) and high I on /I off ~ 10 5 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.Graphene nanoribbons show promise for high-performance field-effect transistors, however they often suffer from short lengths and wide band gaps. Here, the authors use a bottom-up synthesis approach to fabricate 9- and 13-atom wide ribbons, enabling short-channel transistors with 10 5 on-off current ratio.
Mheen, B.; Song, Y.J.; Theuwissen, J.P.
2008-01-01
This letter presents an electrical method to reduce dark current as well as increase well capacity of four-transistor pixels in a CMOS image sensor, utilizing a small negative offset voltage to the gate of the transfer (TX) transistor particularly only when the TX transistor is off. As a result,
Utilizing Schottky barriers to suppress short-channel effects in organic transistors
Fernández, Anton F.; Zojer, Karin
2017-10-01
Transistors with short channel lengths exhibit profound deviations from the ideally expected behavior. One of the undesired short-channel effects is an enlarged OFF current that is associated with a premature turn on of the transistor. We present an efficient approach to suppress the OFF current, defined as the current at zero gate source bias, in short-channel organic transistors. We employ two-dimensional device simulations based on the drift-diffusion model to demonstrate that intentionally incorporating a Schottky barrier for injection enhances the ON-OFF ratio in both staggered and coplanar transistor architectures. The Schottky barrier is identified to directly counteract the origin of enlarged OFF currents: Short channels promote a drain-induced barrier lowering. The latter permits unhindered injection of charges even at reverse gate-source bias. An additional Schottky barrier hampers injection for such points of operations. We explain how it is possible to find the Schottky barrier of the smallest height necessary to exactly compensate for the premature turn on. This approach offers a substantial enhancement of the ON-OFF ratio. We show that this roots in the fact that such optimal barrier heights offer an excellent compromise between an OFF current diminished by orders of magnitude and an only slightly reduced ON current.
Reliability of planar silicon transistors exposed to 60Co γ rays
International Nuclear Information System (INIS)
Blin, A.; Le Ber, J.
1966-01-01
This report gives an account of results obtained during investigations on the reliability of silicon Planar Transistors, irradiated by the 60 Co γ rays. We consider in a first part the variation of the average values of the parameters of the lots under test. Then, a more complete statistical study is carried out (distribution of the values of the parameters within the lots; research of correlations, etc. ). It is clearly stated and shown that evaluation of the degradation of the gain of transistors depends on: the conditions of measurement (voltage, current), after irradiation; the polarisation of the elements during irradiation; the origin of manufacture of the lots under test (4 manufacturers). We show then the difficulties met to predict the behaviour of the transistors under radiation stress, and attempt is made to define practical rules for design engineers. (author) [fr
Dynamic avalanche behavior of power MOSFETs and IGBTs under unclamped inductive switching conditions
International Nuclear Information System (INIS)
Lu Jiang; Tian Xiaoli; Lu Shuojin; Zhou Hongyu; Zhu Yangjun; Han Zhengsheng
2013-01-01
The ability of high-voltage power MOSFETs and IGBTs to withstand avalanche events under unclamped inductive switching (UIS) conditions is measured. This measurement is to investigate and compare the dynamic avalanche failure behavior of the power MOSFETs and the IGBT, which occur at different current conditions. The UIS measurement results at different current conditions show that the main failure reason of the power MOSFETs is related to the parasitic bipolar transistor, which leads to the deterioration of the avalanche reliability of power MOSFETs. However, the results of the IGBT show two different failure behaviors. At high current mode, the failure behavior is similar to the power MOSFETs situation. But at low current mode, the main failure mechanism is related to the parasitic thyristor activity during the occurrence of the avalanche process and which is in good agreement with the experiment result. (semiconductor devices)
Development of dust removal system using static electricity for fusion experimental reactors
Energy Technology Data Exchange (ETDEWEB)
Onozuka, Masanori; Ueda, Yasutoshi; Oda, Yasushi; Takahashi, Kenji [Mitsubishi Heavy Industries Ltd., Tokyo (Japan); Seki, Yasushi; Aoki, Isao; Ueda, Shuzo; Kurihara, Ryoichi
1997-11-01
Tests to collect and transport metallic and non-metallic dust particles have been conducted using static electricity in a vacuum environment to investigate the applicability of a static electricity dust removal system for fusion experimental reactors. The dust particles are charged by electrostatic induction, floated and collected due to the Coulomb force generated by the AC electric field. They are then transported due to the gradient force induced by the electric curtain of the non-uniform travelling-wave electric field. Using a fully insulated electrode with a single-phase AC voltage up to 15 kV, aluminum and carbon dust were successfully collected. The highest collection rates for the aluminum and carbon dust were around 30 and 2 g/min, respectively. The linear-type electrodes, using as high as 22 kV of the three-phase AC voltage, transported aluminum dust up to an angle of 60deg. Applying a guide electrode to the linear-type electrode, the transportation rate was approximately doubled and almost constant at every angle, including a 90deg angle. The system transported aluminum dust up to the rate of 13 g/min. The influence of the 0.15 T magnetic field on the dust collection and transportation efficiencies was found to be negligible. (author)
Development of dust removal system using static electricity for fusion experimental reactors
International Nuclear Information System (INIS)
Onozuka, Masanori; Ueda, Yasutoshi; Oda, Yasushi; Takahashi, Kenji; Seki, Yasushi; Aoki, Isao; Ueda, Shuzo; Kurihara, Ryoichi.
1997-01-01
Tests to collect and transport metallic and non-metallic dust particles have been conducted using static electricity in a vacuum environment to investigate the applicability of a static electricity dust removal system for fusion experimental reactors. The dust particles are charged by electrostatic induction, floated and collected due to the Coulomb force generated by the AC electric field. They are then transported due to the gradient force induced by the electric curtain of the non-uniform travelling-wave electric field. Using a fully insulated electrode with a single-phase AC voltage up to 15 kV, aluminum and carbon dust were successfully collected. The highest collection rates for the aluminum and carbon dust were around 30 and 2 g/min, respectively. The linear-type electrodes, using as high as 22 kV of the three-phase AC voltage, transported aluminum dust up to an angle of 60deg. Applying a guide electrode to the linear-type electrode, the transportation rate was approximately doubled and almost constant at every angle, including a 90deg angle. The system transported aluminum dust up to the rate of 13 g/min. The influence of the 0.15 T magnetic field on the dust collection and transportation efficiencies was found to be negligible. (author)
Amos, S W
2013-01-01
For over thirty years, Stan Amos has provided students and practitioners with a text they could rely on to keep them at the forefront of transistor circuit design. This seminal work has now been presented in a clear new format and completely updated to include the latest equipment such as laser diodes, Trapatt diodes, optocouplers and GaAs transistors, and the most recent line output stages and switch-mode power supplies.Although integrated circuits have widespread application, the role of discrete transistors is undiminished, both as important building blocks which students must understand an
Seo, Jooyeok; Song, Myeonghun; Jeong, Jaehoon; Nam, Sungho; Heo, Inseok; Park, Soo-Young; Kang, Inn-Kyu; Lee, Joon-Hyung; Kim, Hwajeong; Kim, Youngkyoo
2016-09-14
We report broadband pH-sensing organic field-effect transistors (OFETs) with the polymer-dispersed liquid crystal (PDLC) sensing layers. The PDLC layers are prepared by spin-coating using ethanol solutions containing 4-cyano-4'-pentyl-biphenyl (5CB) and a diblock copolymer (PAA-b-PCBOA) that consists of LC-philic block [poly(4-cyano-biphenyl-4-oxyundecyl acrylate) (PCBOA)] and acrylic acid block [poly(acrylic acid) (PAA)]. The spin-coated sensing layers feature of 5CB microdomains (pH with only small amounts (10-40 μL) of analyte solutions in both static and dynamic perfusion modes. The positive drain current change is measured for acidic solutions (pH pH > 7) result in the negative change of drain current. The drain current trend in the present PDLC-i-OFET devices is explained by the shrinking-expanding mechanism of the PAA chains in the diblock copolymer layers.
Fabricating an organic complementary inverter by integrating two transistors on a single substrate
International Nuclear Information System (INIS)
Wang Jun; Wei Bin; Zhang Jianhua
2008-01-01
Organic complementary inverters were fabricated by integrating two transistors of different electric type on a single substrate. One is a p-type organic heterojunction transistor with a depletion–accumulation mode that acts as a load element. The other is an n-type transistor with an accumulation mode that acts as a drive element. Typical inverter characteristics with a voltage gain of 12 were obtained. Compared with conventional devices, our organic complementary inverter used only one-step patterning of an organic semiconductor, and simultaneously suppressed the leakage current between supply voltage and ground. Therefore, current studies provide a simpler path to fabrication of organic complementary circuits
Individual SnO2 nanowire transistors fabricated by the gold microwire mask method
International Nuclear Information System (INIS)
Sun Jia; Tang Qingxin; Lu Aixia; Jiang Xuejiao; Wan Qing
2009-01-01
A gold microwire mask method is developed for the fabrication of transistors based on single lightly Sb-doped SnO 2 nanowires. Damage of the nanowire's surface can be avoided without any thermal annealing and surface modification, which is very convenient for the fundamental electrical and photoelectric characterization of one-dimensional inorganic nanomaterials. Transport measurements of the individual SnO 2 nanowire devices demonstrate the high-performance n-type field effect transistor characteristics without significant hysteresis in the transfer curves. The current on/off ratio and the subthreshold swing of the nanowire transistors are found to be 10 6 and 240 mV/decade, respectively.
International Nuclear Information System (INIS)
Witczak, S.C.; Lacoe, R.C.; Galloway, K.F.
1997-01-01
The effect of dose rate on radiation-induced gain degradation is compared for verticle npn and lateral pnp bipolar transistors. High dose rate irradiations at elevated temperatures are more effective at simulating low dose rate degradation in the lateral pnp transistors
Kumano, Teruhisa
As known well, two of the fundamental processes which give rise to voltage collapse in power systems are the on load tap changers of transformers and dynamic characteristics of loads such as induction machines. It has been well established that, comparing among these two, the former makes slower collapse while the latter makes faster. However, in realistic situations, the load level of each induction machine is not uniform and it is well expected that only a part of loads collapses first, followed by collapse process of each load which did not go into instability during the preceding collapses. In such situations the over all equivalent collapse behavior viewed from bulk transmission level becomes somewhat different from the simple collapse driven by one aggregated induction machine. This paper studies the process of cascaded voltage collapse among many induction machines by time simulation, where load distribution on a feeder line is modeled by several hundreds of induction machines and static impedance loads. It is shown that in some cases voltage collapse really cascades among induction machines, where the macroscopic load dynamics viewed from upper voltage level makes slower collapse than expected by the aggregated load model. Also shown is the effects of machine protection of induction machines, which also makes slower collapse.
1/f Noise Characterization in CMOS Transistors in 0.13μm Technology
DEFF Research Database (Denmark)
Citakovic, J.; Stenberg, L J; Andreani, Pietro
2006-01-01
Low-frequency noise has been studied on a set of n- and p-channel CMOS transistors fabricated in a 0.13μm technology. Noise measurements have been performed on transistors with different gate lengths operating under wide bias conditions, ranging from weak to strong inversion. Noise origin has been...
Operational Stability of Organic Field‐Effect Transistors
Bobbert, P.A.; Sharma, A.; Matthijssen, S.J.G.; Kemerink, M.; de Leeuw, D.M.
2012-01-01
Organic field-effect transistors (OFETs) are considered in technological applications for which low cost or mechanical flexibility are crucial factors. The environmental stability of the organic semiconductors used in OFETs has improved to a level that is now sufficient for commercialization.
Messerle, H K; Declaris, Nicholas
2013-01-01
Energy Conversion Statics deals with equilibrium situations and processes linking equilibrium states. A development of the basic theory of energy conversion statics and its applications is presented. In the applications the emphasis is on processes involving electrical energy. The text commences by introducing the general concept of energy with a survey of primary and secondary energy forms, their availability, and use. The second chapter presents the basic laws of energy conversion. Four postulates defining the overall range of applicability of the general theory are set out, demonstrating th
A Staged Reading of the Play: W=S:Transistor Shock
2014-03-01
A university is offered funding, but only if they'll name a building for William Shockley. William Shockley was an American physicist and inventor who won the Nobel Prize for his work on the transistor, but was infamous for his support of eugenics. What do they do? Join us for a dramatic staged reading of Transistor Shock, a new play by Ivan K. Schuller and Adam J. Smith, performed by the Boulder Ensemble Theatre Company. After the performance, the director, actors, and playwrights will be available for audience discussion.
International Nuclear Information System (INIS)
Hsieh, Tien-Yu; Chang, Ting-Chang; Chen, Te-Chih; Tsai, Ming-Yen; Chen, Yu-Te
2013-01-01
This paper investigates the degradation mechanism of amorphous InGaZnO thin-film transistors under DC and AC gate bias stress. Comparing the degradation behavior at equal accumulated effective stress time, more pronounced threshold voltage shift under AC positive gate bias stress in comparison with DC stress indicates extra electron-trapping phenomenon that occurs in the duration of rising/falling time in pulse. Contrarily, illuminated AC negative gate bias stress exhibits much less threshold voltage shift than DC stress, suggesting that the photo-generated hole does not have sufficient time to drift to the interface of IGZO/gate insulator and causes hole-trapping under AC operation. Since the evolution of threshold voltage fits the stretched-exponential equation well, the different degradation tendencies under DC/AC stress can be attributed to the different electron- and hole-trapping efficiencies, and this is further verified by varying pulse waveform. - Highlights: ► Static and dynamic gate bias stresses are imposed on InGaZnO TFTs. ► Dynamic positive gate bias induces more pronounced threshold voltage shift. ► Static negative-bias illumination stress induces more severe threshold voltage shift. ► Evolution of threshold voltage fits the stretched-exponential equation well
Electrolyte-Sensing Transistor Decals Enabled by Ultrathin Microbial Nanocellulose
Yuen, Jonathan D.; Walper, Scott A.; Melde, Brian J.; Daniele, Michael A.; Stenger, David A.
2017-01-01
We report an ultra-thin electronic decal that can simultaneously collect, transmit and interrogate a bio-fluid. The described technology effectively integrates a thin-film organic electrochemical transistor (sensing component) with an ultrathin microbial nanocellulose wicking membrane (sample handling component). As far as we are aware, OECTs have not been integrated in thin, permeable membrane substrates for epidermal electronics. The design of the biocompatible decal allows for the physical isolation of the electronics from the human body while enabling efficient bio-fluid delivery to the transistor via vertical wicking. High currents and ON-OFF ratios were achieved, with sensitivity as low as 1 mg·L-1.
A Single-Transistor Active Pixel CMOS Image Sensor Architecture
International Nuclear Information System (INIS)
Zhang Guo-An; He Jin; Zhang Dong-Wei; Su Yan-Mei; Wang Cheng; Chen Qin; Liang Hai-Lang; Ye Yun
2012-01-01
A single-transistor CMOS active pixel image sensor (1 T CMOS APS) architecture is proposed. By switching the photosensing pinned diode, resetting and selecting can be achieved by diode pull-up and capacitive coupling pull-down of the source follower. Thus, the reset and selected transistors can be removed. In addition, the reset and selected signal lines can be shared to reduce the metal signal line, leading to a very high fill factor. The pixel design and operation principles are discussed in detail. The functionality of the proposed 1T CMOS APS architecture has been experimentally verified using a fabricated chip in a standard 0.35 μm CMOS AMIS technology
Chang, Cheng; Yang, Xin; Fahmi, Odette A; Riccardi, Keith A; Di, Li; Obach, R Scott
2017-08-01
1. Induction is an important mechanism contributing to drug-drug interactions. It is most commonly evaluated in the human hepatocyte assay over 48-h or 72-h incubation period. However, whether the overall exposure (i.e. Area Under the Curve (AUC) or C ave ) or maximum exposure (i.e. C max ) of the inducer is responsible for the magnitude of subsequent induction has not been thoroughly investigated. Additionally, in vitro induction assays are typically treated as static systems, which could lead to inaccurate induction potency estimation. Hence, European Medicines Agency (EMA) guidance now specifies quantitation of drug levels in the incubation. 2. This work treated the typical in vitro evaluation of rifampin induction as an in vivo system by generating various target engagement profiles, measuring free rifampin concentration over 3 d of incubation and evaluating the impact of these factors on final induction response. 3. This rifampin-based analysis demonstrates that the induction process is driven by time-averaged target engagement (i.e. AUC-driven). Additionally, depletion of rifampin in the incubation medium over 3 d as well as non-specific/specific binding were observed. 4. These findings should help aid the discovery of clinical candidates with minimal induction liability and further expand our knowledge in the quantitative translatability of in vitro induction assays.
Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications
Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.
2001-01-01
A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.
Directory of Open Access Journals (Sweden)
P. Murugapandiyan
2017-12-01
Full Text Available A novel 50 nm recessed T-gate AlN spacer based InAlN/GaN HEMT with AlGaN back-barrier is designed. The static and dynamic characteristics of the proposed device structure are investigated using Synopsys TCAD tool. The remarkable potential device features such as heavily doped source/drain region, Al2O3 passivated device surface helped the device to suppress the parasitic resistances and capacitances of the transistor for enhancing the microwave characteristics. The designed InAlN/GaN HEMT exhibits the sheet carrier density (ns of 1.9 × 1013 cm−2, the drain current density (Ids of 2.1 A/mm, the transconductance (gm of 800 mS/mm, the breakdown voltage (VBR of 40 V, the current gain cut-off frequency (ft of 221 GHz and the power gain cut-off frequency (fmax of 290 GHz. The superior static and dynamic characteristics of obtained InAlN/GaN HEMTs undoubtedly placed the device at the forefront for high power millimeter wave applications.
STUDYING DEFORMATIONS OF AN FLAT TRUSS STRUCTURE STATICALLY INDETERMINATED EXTERNALLY
Directory of Open Access Journals (Sweden)
Kirsanov Mikhail Nikolaevich
2017-08-01
Full Text Available A flat statically determinate parallel-chord truss structure has a cross-shaped grid and rests upon two rigid pin-bearing supports. Loads in bars are determined in a symbol form using the method of joint isolation by the computer mathematics Maple system. The peculiarity of the considered truss structure is its external static indeterminacy. In fact, all efforts and reactions of supports can be determined from the equilibrium conditions. But the inconvenience is necessary to consider the equilibrium of all the nodes of the truss. The Ritter cross-section method is not applicable to this truss structure. The sections that cut the truss into two parts and pass through the three rods, here exist only for several rods of the extreme panels. The purpose of this paper is to calculate a truss structure with a different number of panels in analytical and numerical form. Finite element calculation method with the use of software LISA 8.0 is applied. It’s noted that a truss structure is kinetically changeable when the number of spans is odd. The corresponding plan of probable velocities is given. In order to receive analytic dependence of deflection on the span number, the induction method and Maxwell-Moor formula has been applied. The operators of the compilation and solution of recurrence equations are involved in determining the general terms of the coefficient sequences. The formulas for calculation of loads in the most compressed bars of a truss structure were received.
Extreme Temperature Performance of Automotive-Grade Small Signal Bipolar Junction Transistors
Boomer, Kristen; Damron, Benny; Gray, Josh; Hammoud, Ahmad
2018-01-01
Electronics designed for space exploration missions must display efficient and reliable operation under extreme temperature conditions. For example, lunar outposts, Mars rovers and landers, James Webb Space Telescope, Europa orbiter, and deep space probes represent examples of missions where extreme temperatures and thermal cycling are encountered. Switching transistors, small signal as well as power level devices, are widely used in electronic controllers, data instrumentation, and power management and distribution systems. Little is known, however, about their performance in extreme temperature environments beyond their specified operating range; in particular under cryogenic conditions. This report summarizes preliminary results obtained on the evaluation of commercial-off-the-shelf (COTS) automotive-grade NPN small signal transistors over a wide temperature range and thermal cycling. The investigations were carried out to establish a baseline on functionality of these transistors and to determine suitability for use outside their recommended temperature limits.
A Pedagogical Model of Static Friction
Pickett, Galen T.
2015-01-01
While dry Coulombic friction is an elementary topic in any standard introductory course in mechanics, the critical distinction between the kinetic and static friction forces is something that is both hard to teach and to learn. In this paper, I describe a geometric model of static friction that may help introductory students to both understand and apply the Coulomb static friction approximation.
Mclyman, W. T. (Inventor)
1981-01-01
In a push-pull converter, switching transistors are protected from peak power stresses by a separate snubber circuit in parallel with each comprising a capacitor and an inductor in series, and a diode in parallel with the inductor. The diode is connected to conduct current of the same polarity as the base-emitter juction of the transistor so that energy stored in the capacitor while the transistor is switched off, to protect it against peak power stress, discharges through the inductor when the transistor is turned on, and after the capacitor is discharges through the diode. To return this energy to the power supply, or to utilize this energy in some external circuit, the inductor may be replaced by a transformer having its secondary winding connected to the power supply or to the external circuit.
Diakoptical reliability analysis of transistorized systems
International Nuclear Information System (INIS)
Kontoleon, J.M.; Lynn, J.W.; Green, A.E.
1975-01-01
Limitations both on high-speed core availability and computation time required for assessing the reliability of large-sized and complex electronic systems, such as used for the protection of nuclear reactors, are very serious restrictions which continuously confront the reliability analyst. Diakoptic methods simplify the solution of the electrical-network problem by subdividing a given network into a number of independent subnetworks and then interconnecting the solutions of these smaller parts by a systematic process involving transformations based on connection-matrix elements associated with the interconnecting links. However, the interconnection process is very complicated and it may be used only if the original system has been cut in such a manner that a relation can be established between the constraints appearing at both sides of the cut. Also, in dealing with transistorized systems, one of the difficulties encountered is that of modelling adequately their performance under various operating conditions, since their parameters are strongly affected by the imposed voltage and current levels. In this paper a new interconnection approach is presented which may be of use in the reliability analysis of large-sized transistorized systems. This is based on the partial optimization of the subdivisions of the torn network as well as on the optimization of the torn paths. The solution of the subdivisions is based on the principles of algebraic topology, with an algebraic structure relating the physical variables in a topological structure which defines the interconnection of the discrete elements. Transistors, and other nonlinear devices, are modelled using their actual characteristics, under normal and abnormal operating conditions. Use of so-called k factors is made to facilitate accounting for use of electrical stresses. The approach is demonstrated by way of an example. (author)
Nanowire field effect transistors principles and applications
Jeong, Yoon-Ha
2014-01-01
“Nanowire Field Effect Transistor: Basic Principles and Applications” places an emphasis on the application aspects of nanowire field effect transistors (NWFET). Device physics and electronics are discussed in a compact manner, together with the p-n junction diode and MOSFET, the former as an essential element in NWFET and the latter as a general background of the FET. During this discussion, the photo-diode, solar cell, LED, LD, DRAM, flash EEPROM and sensors are highlighted to pave the way for similar applications of NWFET. Modeling is discussed in close analogy and comparison with MOSFETs. Contributors focus on processing, electrostatic discharge (ESD) and application of NWFET. This includes coverage of solar and memory cells, biological and chemical sensors, displays and atomic scale light emitting diodes. Appropriate for scientists and engineers interested in acquiring a working knowledge of NWFET as well as graduate students specializing in this subject.
Radiation effects on JFETS, MOSFETS, and bipolar transistors, as related to SSC circuit design
Energy Technology Data Exchange (ETDEWEB)
Kennedy, E J; Gray, B; Wu, A [Dept. of Electrical and Computer Engineering, Univ. of Tennessee, Knoxville, TN (United States); Alley, G T; Britton, Jr, C L [Oak Ridge National Lab., TN (United States); Skubic, P L [Univ. of Oklahoma, Dept. of Physics and Astronomy, Norman, OK (United States)
1991-10-01
Some results of radiation effects on selected junction field-effect transistors, MOS field-effect transistors, and bipolar junction transistors are presented. The evaluations include dc parameters, as well as capacitive variations and noise evaluations. The tests are made at the low current and voltage levels (in particular at currents {<=} 1 mA) that are essential for the low-power regimes required by SSC circuitry. Detailed noise data are presented both before and after 5-Mrad (gamma) total-dose exposure. SPICE radiation models for three high-frequency bipolar processes are compared for a typical charge-sensitive preamplifier. (orig.).
Top-gate organic depletion and inversion transistors with doped channel and injection contact
Energy Technology Data Exchange (ETDEWEB)
Liu, Xuhai; Kasemann, Daniel, E-mail: daniel.kasemann@iapp.de; Leo, Karl [Institut für Angewandte Photophysik, Technische Universität Dresden, George-Bähr-Strasse 1, 01069 Dresden (Germany)
2015-03-09
Organic field-effect transistors constitute a vibrant research field and open application perspectives in flexible electronics. For a commercial breakthrough, however, significant performance improvements are still needed, e.g., stable and high charge carrier mobility and on-off ratio, tunable threshold voltage, as well as integrability criteria such as n- and p-channel operation and top-gate architecture. Here, we show pentacene-based top-gate organic transistors operated in depletion and inversion regimes, realized by doping source and drain contacts as well as a thin layer of the transistor channel. By varying the doping concentration and the thickness of the doped channel, we control the position of the threshold voltage without degrading on-off ratio or mobility. Capacitance-voltage measurements show that an inversion channel can indeed be formed, e.g., an n-doped channel can be inverted to a p-type inversion channel with highly p-doped contacts. The Cytop polymer dielectric minimizes hysteresis, and the transistors can be biased for prolonged cycles without a shift of threshold voltage, indicating excellent operation stability.
The design of a new spiking neuron using dual work function silicon nanowire transistors
International Nuclear Information System (INIS)
Bindal, Ahmet; Hamedi-Hagh, Sotoudeh
2007-01-01
A new spike neuron cell is designed using vertically grown, undoped silicon nanowire transistors. This study presents an entire design cycle from designing and optimizing vertical nanowire transistors for minimal power dissipation to realizing a neuron cell and measuring its dynamic power consumption, performance and layout area. The design cycle starts with determining individual metal gate work functions for NMOS and PMOS transistors as a function of wire radius to produce a 300 mV threshold voltage. The wire radius and effective channel length are subsequently varied to find a common body geometry for both transistors that yields smaller than 1 pA OFF current while producing maximum drive currents. A spike neuron cell is subsequently built using these transistors to measure its transient performance, power dissipation and layout area. Post-layout simulation results indicate that the neuron consumes 0.397 μW to generate a +1 V and 1.12 μW to generate a -1 V output pulse for a fan-out of five synapses at 500 MHz; the power dissipation increases by approximately 3 nW for each additional synapse at the output for generating either pulse. The neuron circuit occupies approximately 0.27 μm 2
Fully transparent thin-film transistor devices based on SnO2 nanowires.
Dattoli, Eric N; Wan, Qing; Guo, Wei; Chen, Yanbin; Pan, Xiaoqing; Lu, Wei
2007-08-01
We report on studies of field-effect transistor (FET) and transparent thin-film transistor (TFT) devices based on lightly Ta-doped SnO2 nano-wires. The nanowire-based devices exhibit uniform characteristics with average field-effect mobilities exceeding 100 cm2/V x s. Prototype nano-wire-based TFT (NW-TFT) devices on glass substrates showed excellent optical transparency and transistor performance in terms of transconductance, bias voltage range, and on/off ratio. High on-currents and field-effect mobilities were obtained from the NW-TFT devices even at low nanowire coverage. The SnO2 nanowire-based TFT approach offers a number of desirable properties such as low growth cost, high electron mobility, and optical transparency and low operation voltage, and may lead to large-scale applications of transparent electronics on diverse substrates.
Fabrication de transistors monoelectroniques pour la detection de charge
Richard, Jean-Philippe
Le transistor monoelectro'nique (SET) est un candidat que l'on croyait avoir la capacite de remplacer le transistor des circuits integres actuel (MOSFET). Pour des raisons de faible gain en voltage, d'impedance de sortie elevee et de sensibilite aux fluctuations de charges, il est considere aujourd'hui qu'un hybride tirant profit des deux technologies est plus avantageux. En exploitant sa lacune d'etre sensible aux variations de charge, le SET est davantage utilise dans des applications ou la detection de charge s'avere indispensable, notamment dans les domaines de la bio-detection et de l'informatique quantique. Ce memoire presente une etude du transistor monoelectronique utilise en tant que detecteur de charge. La methode de fabrication est basee sur le procede nanodamascene developpe par Dubuc et al. [11] permettant au transistor monoelectronique de fonctionner a temperature ambiante. La temperature d'operation etant intimement liee a la geometrie du SET, la cle du procede nanodamascene reside dans le polissage chimico-mecanique (CMP) permettant de reduire l'epaisseur des SET jusqu'a des valeurs de quelques nanametres. Dans ce projet de maitrise, nous avons cependant opte pour que le SET soit opere a temperature cryogenique. Une faible temperature d'operation permet le relachement des contraintes de dimensions des dispositifs. En considerant les variations de procedes normales pouvant survenir lors de la fabrication, la temperature d'operation maximale calculee en conception s'etend de 27 K a 90 K, soit une energie de charge de 78 meV a 23 meV. Le gain du detecteur de charge etant dependant de la distance de couplage, les resultats de simulations demontrent que cette distance doit etre de 200 nm pour que la detection de charge soit optimale. Les designs concus sont ensuite fabriques sur substrat d'oxyde de silicium. Les resultats de fabrication de SET temoignent de la robustesse du procede nanodamascene. En effet, les dimensions atteintes experimentalement s
New development of solid state sub-millimeter sources
International Nuclear Information System (INIS)
Nishizawa, Jun-ichi
1982-01-01
The TUNNETT (tunnel injection transit time negative resistance) diode was proposed by the author in the analysis of avalanching negative resistance diodes and seemed to be the most promising semiconductor source in the frequency range from 100 to 1000 GHz. The first TUNNETT oscillation was realized experimentally in 1968 from a GaAs p + n diode. Recently, several types of GaAs TUNNETT diodes have been fabricated by the use of the author's new liquid phase epitaxial method, which is named the temperature difference method under controlled vapour pressure. The oscillation characteristics of p + - n - n + diodes are shown. On the other hand, the static induction transistor (SIT) shows the excellent performance for high power use in microwave region. The static induced tunnel transit time transistor (SIT 4 ) is a kind of SIT in which the injection source region is replaced by the tunnel injection for use in submillimeter region. In SIT 4 , the gate voltage controls the field of the tunnelling region, and the tunnelling electrons transit to the drain without reaching the gate. The SIT's using tunnelling and ideal (ballistic) SIT are promising devices in submillimeter region. The author suggested the generation of electromagnetic waves by using phonons in semiconductors from submillimeter to infared. Above 1000 GHz up to 100 THz of the field of conventional semiconductors, semiconductor Raman and Brillouin lasers are expected to be the most useful devices in the future. (Wakatsuki, Y.)