WorldWideScience

Sample records for standard circuit simulators

  1. Advanced circuit simulation using Multisim workbench

    CERN Document Server

    Báez-López, David; Cervantes-Villagómez, Ofelia Delfina

    2012-01-01

    Multisim is now the de facto standard for circuit simulation. It is a SPICE-based circuit simulator which combines analog, discrete-time, and mixed-mode circuits. In addition, it is the only simulator which incorporates microcontroller simulation in the same environment. It also includes a tool for printed circuit board design.Advanced Circuit Simulation Using Multisim Workbench is a companion book to Circuit Analysis Using Multisim, published by Morgan & Claypool in 2011. This new book covers advanced analyses and the creation of models and subcircuits. It also includes coverage of transmissi

  2. Equivalent circuit simulation of HPEM-induced transient responses at nonlinear loads

    Directory of Open Access Journals (Sweden)

    M. Kotzev

    2017-09-01

    Full Text Available In this paper the equivalent circuit modeling of a nonlinearly loaded loop antenna and its transient responses to HPEM field excitations are investigated. For the circuit modeling the general strategy to characterize the nonlinearly loaded antenna by a linear and a nonlinear circuit part is pursued. The linear circuit part can be determined by standard methods of antenna theory and numerical field computation. The modeling of the nonlinear circuit part requires realistic circuit models of the nonlinear loads that are given by Schottky diodes. Combining both parts, appropriate circuit models are obtained and analyzed by means of a standard SPICE circuit simulator. It is the main result that in this way full-wave simulation results can be reproduced. Furthermore it is clearly seen that the equivalent circuit modeling offers considerable advantages with respect to computation speed and also leads to improved physical insights regarding the coupling between HPEM field excitation and nonlinearly loaded loop antenna.

  3. Analogue circuits simulation

    Energy Technology Data Exchange (ETDEWEB)

    Mendo, C

    1988-09-01

    Most analogue simulators have evolved from SPICE. The history and description of SPICE-like simulators are given. From a mathematical formulation of the electronic circuit the following analysis are possible: DC, AC, transient, noise, distortion, Worst Case and Statistical.

  4. CMOS circuit design, layout and simulation

    CERN Document Server

    Baker, R Jacob

    2010-01-01

    The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.

  5. Coplanar strips for Josephson voltage standard circuits

    International Nuclear Information System (INIS)

    Schubert, M.; May, T.; Wende, G.; Fritzsch, L.; Meyer, H.-G.

    2001-01-01

    We present a microwave circuit for Josephson voltage standards. Here, the Josephson junctions are integrated in a microwave transmission line designed as coplanar strips (CPS). The new layout offers the possibility of achieving a higher scale of integration and to considerably simplify the fabrication technology. The characteristic impedance of the CPS is about 50 Ω, and this should be of interest for programmable Josephson voltage standard circuits with SNS or SINIS junctions. To demonstrate the function of the microwave circuit design, conventional 10 V Josephson voltage standard circuits with 17000 Nb/AlO x /Nb junctions were prepared and tested. Stable Shapiro steps at the 10 V level were generated. Furthermore, arrays of 1400 SINIS junctions in this microwave layout exhibited first-order Shapiro steps. Copyright 2001 American Institute of Physics

  6. Digital Quantum Simulation of Spin Models with Circuit Quantum Electrodynamics

    OpenAIRE

    Salathé, Y.; Mondal, M.; Oppliger, M.; Heinsoo, J.; Kurpiers, P.; Potočnik, A.; Mezzacapo, Antonio; Las Heras García, Urtzi; Lamata Manuel, Lucas; Solano Villanueva, Enrique Leónidas; Filipp, S.; Wallraff, A.

    2015-01-01

    Systems of interacting quantum spins show a rich spectrum of quantum phases and display interesting many-body dynamics. Computing characteristics of even small systems on conventional computers poses significant challenges. A quantum simulator has the potential to outperform standard computers in calculating the evolution of complex quantum systems. Here, we perform a digital quantum simulation of the paradigmatic Heisenberg and Ising interacting spin models using a two transmon-qubit circuit...

  7. Classical Simulation of Intermediate-Size Quantum Circuits

    OpenAIRE

    Chen, Jianxin; Zhang, Fang; Chen, Mingcheng; Huang, Cupjin; Newman, Michael; Shi, Yaoyun

    2018-01-01

    We introduce a distributed classical simulation algorithm for general quantum circuits, and present numerical results for calculating the output probabilities of universal random circuits. We find that we can simulate more qubits to greater depth than previously reported using the cluster supported by the Data Infrastructure and Search Technology Division of the Alibaba Group. For example, computing a single amplitude of an $8\\times 8$ qubit circuit with depth $40$ was previously beyond the r...

  8. Quantum Simulation of the Ultrastrong-Coupling Dynamics in Circuit Quantum Electrodynamics

    Directory of Open Access Journals (Sweden)

    D. Ballester

    2012-05-01

    Full Text Available We propose a method to get experimental access to the physics of the ultrastrong- and deep-strong-coupling regimes of light-matter interaction through the quantum simulation of their dynamics in standard circuit QED. The method makes use of a two-tone driving scheme, using state-of-the-art circuit-QED technology, and can be easily extended to general cavity-QED setups. We provide examples of ultrastrong- and deep-strong-coupling quantum effects that would be otherwise inaccessible.

  9. Parallel sparse direct solver for integrated circuit simulation

    CERN Document Server

    Chen, Xiaoming; Yang, Huazhong

    2017-01-01

    This book describes algorithmic methods and parallelization techniques to design a parallel sparse direct solver which is specifically targeted at integrated circuit simulation problems. The authors describe a complete flow and detailed parallel algorithms of the sparse direct solver. They also show how to improve the performance by simple but effective numerical techniques. The sparse direct solver techniques described can be applied to any SPICE-like integrated circuit simulator and have been proven to be high-performance in actual circuit simulation. Readers will benefit from the state-of-the-art parallel integrated circuit simulation techniques described in this book, especially the latest parallel sparse matrix solution techniques. · Introduces complicated algorithms of sparse linear solvers, using concise principles and simple examples, without complex theory or lengthy derivations; · Describes a parallel sparse direct solver that can be adopted to accelerate any SPICE-like integrated circuit simulato...

  10. Specs: Simulation Program for Electronic Circuits and Systems

    Science.gov (United States)

    de Geus, Aart Jan

    Simulation tools are central to the development and verification of very large scale integrated circuits. Circuit simulation has been used for over two decades to verify the behavior of designs. Recently the introduction of switch-level simulators which model MOS transistors in terms of switches has helped to overcome the long runtimes associated with full circuit simulation. Used strictly for functional verification and fault simulation, switch -level simulation can only give very rough estimates of the timing of a circuit. In this dissertation an approach is presented which adds a timing capability to switch-level simulators at relatively little extra CPU cost. A new logic state concept is introduced which consists of a set of discrete voltage steps. Signals are known only in terms of these states thus allowing all current computations to be table driven. State changes are scheduled in the same fashion as in the case of gate-level simulators, making the simulator event-driven. The simulator is of mixed-mode nature in that it can model portions of a design at either the gate or transistor level. In order to represent the "unknown" state, a signal consists of both an upper and a lower bound defining a signal envelope. Both bounds are expressed in terms of states. In order to speed up the simulation, MOS networks are subdivided in small pull-up and pull-down transistor configurations that can be preanalysed and prepared for fast evaluation during the simulation. These concepts have been implemented in the program SPECS (Simulation Program For Electronic Circuits and Systems) and examples of simulations are given.

  11. Simulated annealing and circuit layout

    NARCIS (Netherlands)

    Aarts, E.H.L.; Laarhoven, van P.J.M.

    1991-01-01

    We discuss the problem of approximately sotvlng circuit layout problems by simulated annealing. For this we first summarize the theoretical concepts of the simulated annealing algorithm using Ihe theory of homogeneous and inhomogeneous Markov chains. Next we briefly review general aspects of the

  12. Circuit simulation and physical implementation for a memristor-based colpitts oscillator

    Science.gov (United States)

    Deng, Hongmin; Wang, Dongping

    2017-03-01

    This paper implements two kinds of memristor-based colpitts oscillators, namely, the circuit where the memristor is added into the feedback network of the oscillator in parallel and series, respectively. First, a MULTISIM simulation circuit for the memristive colpitts oscillator is built, where an emulator constructed by some off-the-shelf components is utilized to replace the memristor. Then the physical system is implemented in terms of the MULTISIM simulation circuit. Circuit simulation and experimental study show that this memristive colpitts oscillator can exhibit periodic, quasi-periodic, and chaotic behaviors with certain parameter's variances. Besides, in a sense, the circuit is robust with circuit parameters and device types.

  13. Circuit simulation and physical implementation for a memristor-based colpitts oscillator

    OpenAIRE

    Hongmin Deng; Dongping Wang

    2017-01-01

    This paper implements two kinds of memristor-based colpitts oscillators, namely, the circuit where the memristor is added into the feedback network of the oscillator in parallel and series, respectively. First, a MULTISIM simulation circuit for the memristive colpitts oscillator is built, where an emulator constructed by some off-the-shelf components is utilized to replace the memristor. Then the physical system is implemented in terms of the MULTISIM simulation circuit. Circuit simulation an...

  14. Implementation of Chua's circuit using simulated inductance

    Science.gov (United States)

    Gopakumar, K.; Premlet, B.; Gopchandran, K. G.

    2011-05-01

    In this study we describe how to build an inductorless version of the classic Chua's circuit. A suitable inductor for Chua's circuit is often hard to procure. The required inductor for the circuit is designed using simple circuit elements such as resistors, capacitors and operational amplifiers. The complete circuit can be implemented by using off-the-shelf components, and it can readily be integrated on a single chip. This design of Chua's circuit allows the original dynamics to be slowed down to just a few hertz, enabling implementation of sophisticated control schemes without severe time restrictions. Another novel feature of the circuit is that losses associated with capacitors due to leakages can easily be compensated by providing negative resistance using the same setup. The chaotic behaviour of the circuit is verified by PSpice and Multisim simulation and also by experimental study on a circuit breadboard. The results give excellent agreement with each other and with the results of previous investigators.

  15. Circuit simulation and physical implementation for a memristor-based colpitts oscillator

    Directory of Open Access Journals (Sweden)

    Hongmin Deng

    2017-03-01

    Full Text Available This paper implements two kinds of memristor-based colpitts oscillators, namely, the circuit where the memristor is added into the feedback network of the oscillator in parallel and series, respectively. First, a MULTISIM simulation circuit for the memristive colpitts oscillator is built, where an emulator constructed by some off-the-shelf components is utilized to replace the memristor. Then the physical system is implemented in terms of the MULTISIM simulation circuit. Circuit simulation and experimental study show that this memristive colpitts oscillator can exhibit periodic, quasi-periodic, and chaotic behaviors with certain parameter’s variances. Besides, in a sense, the circuit is robust with circuit parameters and device types.

  16. Time domain analog circuit simulation

    NARCIS (Netherlands)

    Fijnvandraat, J.G.; Houben, S.H.M.J.; Maten, ter E.J.W.; Peters, J.M.F.

    2006-01-01

    Recent developments of new methods for simulating electric circuits are described. Emphasis is put on methods that fit existing datastructures for backward differentiation formulae methods. These methods can be modified to apply to hierarchically organized datastructures, which allows for efficient

  17. Extended behavioural device modelling and circuit simulation with Qucs-S

    Science.gov (United States)

    Brinson, M. E.; Kuznetsov, V.

    2018-03-01

    Current trends in circuit simulation suggest a growing interest in open source software that allows access to more than one simulation engine while simultaneously supporting schematic drawing tools, behavioural Verilog-A and XSPICE component modelling, and output data post-processing. This article introduces a number of new features recently implemented in the 'Quite universal circuit simulator - SPICE variant' (Qucs-S), including structure and fundamental schematic capture algorithms, at the same time highlighting their use in behavioural semiconductor device modelling. Particular importance is placed on the interaction between Qucs-S schematics, equation-defined devices, SPICE B behavioural sources and hardware description language (HDL) scripts. The multi-simulator version of Qucs is a freely available tool that offers extended modelling and simulation features compared to those provided by legacy circuit simulators. The performance of a number of Qucs-S modelling extensions are demonstrated with a GaN HEMT compact device model and data obtained from tests using the Qucs-S/Ngspice/Xyce ©/SPICE OPUS multi-engine circuit simulator.

  18. Simulation of pulsed-ionizing-radiation-induced errors in CMOS memory circuits

    International Nuclear Information System (INIS)

    Massengill, L.W.

    1987-01-01

    Effects of transient ionizing radiation on complementary metal-oxide-semiconductor (CMOS) memory circuits was studied by computer simulation. Simulation results have uncovered the dominant mechanism leading to information loss (upset) in dense (CMOS) circuits: rail span collapse. This effect is the catastrophic reduction in the local power supply at a RAM cell location due to the conglomerate radiation-induced photocurrents from all other RAM cells flowing through the power-supply-interconnect distribution. Rail-span collapse leads to reduced RAM cell-noise margins and can predicate upset. Results show that rail-span collapse in the dominant pulsed radiation effect in many memory circuits, preempting local circuit responses to the radiation. Several techniques to model power-supply noise, such as that arising from rail span collapse, are presented in this work. These include an analytical model for design optimization against these effects, a hierarchical computer-analysis technique for efficient power bus noise simulation in arrayed circuits, such as memories, and a complete circuit-simulation tool for noise margin analysis of circuits with arbitrary topologies

  19. Digital Quantum Simulation of Spin Models with Circuit Quantum Electrodynamics

    Directory of Open Access Journals (Sweden)

    Y. Salathé

    2015-06-01

    Full Text Available Systems of interacting quantum spins show a rich spectrum of quantum phases and display interesting many-body dynamics. Computing characteristics of even small systems on conventional computers poses significant challenges. A quantum simulator has the potential to outperform standard computers in calculating the evolution of complex quantum systems. Here, we perform a digital quantum simulation of the paradigmatic Heisenberg and Ising interacting spin models using a two transmon-qubit circuit quantum electrodynamics setup. We make use of the exchange interaction naturally present in the simulator to construct a digital decomposition of the model-specific evolution and extract its full dynamics. This approach is universal and efficient, employing only resources that are polynomial in the number of spins, and indicates a path towards the controlled simulation of general spin dynamics in superconducting qubit platforms.

  20. Computer simulation of rare earth solvent extraction circuits

    International Nuclear Information System (INIS)

    Voit, D.O.

    1988-01-01

    A BASIC language program has been written that simulates the performance of an integrated solvent extraction circuit consisting of an extractor, a reflux fed scrubber, and a stripper. The program is designed to simulate the performance of a circuit having an aqueous feed containing each of the lanthanide as well as yttrium. The Kremser equation is used to determine the separation occurring in each section of the circuit. The required input variables are the feed composition, the separation factors, the light key extraction factors and extractor feed zone distribution coefficient, the number of stages, and the reflux ratios. The program calculates the composition of the streams at each mode in the circuit, the total loading, and the remaining distribution coefficients. User interaction with the program is essential. The program has no capability to determine if the calculated values are consistent with various real restraints. Knowledge of the physical, chemical, and equilibrium behavior is essential to successfully utilize the program. The number of iterations required to achieve steady-state provides insight to the circuit response times

  1. General Tokamak Circuit Simulation Program-GTCSP

    International Nuclear Information System (INIS)

    Matsukawa, Makoto; Miura, Yushi; Aoyagi, Tetsuo.

    1997-05-01

    General Tokamak Circuit Simulation Program (GTCSP) was originally developed for the design work of JT-60 Power Supply System in JAERI. Therefore the prepared models (components) to be analyzed are generator, thyristor converter and coils. This is one of the unique points of GTCSP in comparison with other conventional electric circuit analysis program, because they make a circuit from the small devices such as resister, coil, condenser, transistor and so on. However, GTCSP is also clearly conventional because it is possible to construct an electric circuit freely with the prepared components. Moreover, a similar function could be realized by addition a new component to GTCSP. This report is assumed to be used as an User Manual of the GTCSP, not only to present the development and the analytical functions. Then some useful examples are described, and how to get graphic outputs are also mentioned. (author)

  2. Model for transient simulation in a PWR steam circuit

    International Nuclear Information System (INIS)

    Mello, L.A. de.

    1982-11-01

    A computer code (SURF) was developed and used to simulate pressure losses along the tubes of the main steam circuit of a PWR nuclear power plant, and the steam flow through relief and safety valves when pressure reactors its thresholds values. A thermodynamic model of turbines (high and low pressure), and its associated components are simulated too. The SURF computer code was coupled to the GEVAP computer code, complementing the simulation of a PWR nuclear power plant main steam circuit. (Author) [pt

  3. Simulation of worst-case operating conditions for integrated circuits operating in a total dose environment

    International Nuclear Information System (INIS)

    Bhuva, B.L.

    1987-01-01

    Degradations in the circuit performance created by the radiation exposure of integrated circuits are so unique and abnormal that thorough simulation and testing of VLSI circuits is almost impossible, and new ways to estimate the operating performance in a radiation environment must be developed. The principal goal of this work was the development of simulation techniques for radiation effects on semiconductor devices. The mixed-mode simulation approach proved to be the most promising. The switch-level approach is used to identify the failure mechanisms and critical subcircuits responsible for operational failure along with worst-case operating conditions during and after irradiation. For precise simulations of critical subcircuits, SPICE is used. The identification of failure mechanisms enables the circuit designer to improve the circuit's performance and failure-exposure level. Identification of worst-case operating conditions during and after irradiation reduces the complexity of testing VLSI circuits for radiation environments. The results of test circuits for failure simulations using a conventional simulator and the new simulator showed significant time savings using the new simulator. The savings in simulation time proved to be circuit topology-dependent. However, for large circuits, the simulation time proved to be orders of magnitude smaller than simulation time for conventional simulators

  4. Model reduction for circuit simulation

    CERN Document Server

    Hinze, Michael; Maten, E Jan W Ter

    2011-01-01

    Simulation based on mathematical models plays a major role in computer aided design of integrated circuits (ICs). Decreasing structure sizes, increasing packing densities and driving frequencies require the use of refined mathematical models, and to take into account secondary, parasitic effects. This leads to very high dimensional problems which nowadays require simulation times too large for the short time-to-market demands in industry. Modern Model Order Reduction (MOR) techniques present a way out of this dilemma in providing surrogate models which keep the main characteristics of the devi

  5. Microwave integrated circuit for Josephson voltage standards

    Science.gov (United States)

    Holdeman, L. B.; Toots, J.; Chang, C. C. (Inventor)

    1980-01-01

    A microwave integrated circuit comprised of one or more Josephson junctions and short sections of microstrip or stripline transmission line is fabricated from thin layers of superconducting metal on a dielectric substrate. The short sections of transmission are combined to form the elements of the circuit and particularly, two microwave resonators. The Josephson junctions are located between the resonators and the impedance of the Josephson junctions forms part of the circuitry that couples the two resonators. The microwave integrated circuit has an application in Josephson voltage standards. In this application, the device is asymmetrically driven at a selected frequency (approximately equal to the resonance frequency of the resonators), and a d.c. bias is applied to the junction. By observing the current voltage characteristic of the junction, a precise voltage, proportional to the frequency of the microwave drive signal, is obtained.

  6. Circuit QED lattices: Towards quantum simulation with superconducting circuits

    Energy Technology Data Exchange (ETDEWEB)

    Schmidt, Sebastian [Institute for Theoretical Physics, ETH Zurich, 8093, Zurich (Switzerland); Koch, Jens [Department of Physics and Astronomy, Northwestern University, Evanston, IL, 60208 (United States)

    2013-06-15

    The Jaynes-Cummings model describes the coupling between photons and a single two-level atom in a simplified representation of light-matter interactions. In circuit QED, this model is implemented by combining microwave resonators and superconducting qubits on a microchip with unprecedented experimental control. Arranging qubits and resonators in the form of a lattice realizes a new kind of Hubbard model, the Jaynes-Cummings-Hubbard model, in which the elementary excitations are polariton quasi-particles. Due to the genuine openness of photonic systems, circuit QED lattices offer the possibility to study the intricate interplay of collective behavior, strong correlations and non-equilibrium physics. Thus, turning circuit QED into an architecture for quantum simulation, i.e., using a well-controlled system to mimic the intricate quantum behavior of another system too daunting for a theorist to tackle head-on, is an exciting idea which has served as theorists' playground for a while and is now also starting to catch on in experiments. This review gives a summary of the most recent theoretical proposals and experimental efforts. (copyright 2013 by WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  7. Basic guidelines to introduce electric circuit simulation software in a general physics course

    Science.gov (United States)

    Moya, A. A.

    2018-05-01

    The introduction of electric circuit simulation software for undergraduate students in a general physics course is proposed in order to contribute to the constructive learning of electric circuit theory. This work focuses on the lab exercises based on dc, transient and ac analysis in electric circuits found in introductory physics courses, and shows how students can use the simulation software to do simple activities associated with a lab exercise itself and with related topics. By introducing electric circuit simulation programs in a general physics course as a brief activitiy complementing lab exercise, students develop basic skills in using simulation software, improve their knowledge on the topology of electric circuits and perceive that the technology contributes to their learning, all without reducing the time spent on the actual content of the course.

  8. An improved electrical and thermal model of a microbolometer for electronic circuit simulation

    Science.gov (United States)

    Würfel, D.; Vogt, H.

    2012-09-01

    The need for uncooled infrared focal plane arrays (IRFPA) for imaging systems has increased since the beginning of the nineties. Examples for the application of IRFPAs are thermography, pedestrian detection for automotives, fire fighting, and infrared spectroscopy. It is very important to have a correct electro-optical model for the simulation of the microbolometer during the development of the readout integrated circuit (ROIC) used for IRFPAs. The microbolometer as the sensing element absorbs infrared radiation which leads to a change of its temperature due to a very good thermal insulation. In conjunction with a high temperature coefficient of resistance (TCR) of the sensing material (typical vanadium oxide or amorphous silicon) this temperature change results in a change of the electrical resistance. During readout, electrical power is dissipated in the microbolometer, which increases the temperature continuously. The standard model for the electro-optical simulation of a microbolometer includes the radiation emitted by an observed blackbody, radiation emitted by the substrate, radiation emitted by the microbolometer itself to the surrounding, a heat loss through the legs which connect the microbolometer electrically and mechanically to the substrate, and the electrical power dissipation during readout of the microbolometer (Wood, 1997). The improved model presented in this paper takes a closer look on additional radiation effects in a real IR camera system, for example the radiation emitted by the casing and the lens. The proposed model will consider that some parts of the radiation that is reflected from the casing and the substrate is also absorbed by the microbolometer. Finally, the proposed model will include that some fraction of the radiation is transmitted through the microbolometer at first and then absorbed after the reflection at the surface of the substrate. Compared to the standard model temperature and resistance of the microbolometer can be

  9. Simulating the JET ITER-like Antenna circuit

    International Nuclear Information System (INIS)

    Van Eester, D.; Lerche, E.; Durodie, F.; Evrard, M.; Huygen, S.; Ongena, J.; Vrancken, M.; Argouarch, A.; Blackman, T.; Jacquet, P.; Mayoral, M.-L.; Monakhov, I.; Nightingale, M.; Wooldridge, E.; Whitehurst, A.; Goulding, R. H.

    2009-01-01

    A set of simulation/interpretation tools based on transmission line theory and on the RF model developed by M. Vrancken has been developed to study the ITER-like Antenna (ILA) at JET. For given tuning element settings, the unique solution of the equations governing the ILA circuit requires solving a system of coupled linear equations relating the voltages and currents at the antenna straps and other key locations. This computation allows cross-checking predicted values against measured experimental ones. Further more, a minimization procedure allows improving the correspondence with the quantities measured in the circuit during shots, thus coping with unavoidable errors arising from uncertainties in the measurements or from inaccuracies in the adopted RF model. Typical applications are e.g. fine-tuning of the second-stage of the ILA circuit for increased ELM-resilience, cross-checking the calibration of the measurements throughout the circuit and predicting the antenna performance and matching conditions in new plasma scenarios.

  10. Variational integrators for electric circuits

    International Nuclear Information System (INIS)

    Ober-Blöbaum, Sina; Tao, Molei; Cheng, Mulin; Owhadi, Houman; Marsden, Jerrold E.

    2013-01-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator

  11. Modeling and simulation of single-event effect in CMOS circuit

    International Nuclear Information System (INIS)

    Yue Suge; Zhang Xiaolin; Zhao Yuanfu; Liu Lin; Wang Hanning

    2015-01-01

    This paper reviews the status of research in modeling and simulation of single-event effects (SEE) in digital devices and integrated circuits. After introducing a brief historical overview of SEE simulation, different level simulation approaches of SEE are detailed, including material-level physical simulation where two primary methods by which ionizing radiation releases charge in a semiconductor device (direct ionization and indirect ionization) are introduced, device-level simulation where the main emerging physical phenomena affecting nanometer devices (bipolar transistor effect, charge sharing effect) and the methods envisaged for taking them into account are focused on, and circuit-level simulation where the methods for predicting single-event response about the production and propagation of single-event transients (SETs) in sequential and combinatorial logic are detailed, as well as the soft error rate trends with scaling are particularly addressed. (review)

  12. SEMICONDUCTOR INTEGRATED CIRCUITS: A quasi-3-dimensional simulation method for a high-voltage level-shifting circuit structure

    Science.gov (United States)

    Jizhi, Liu; Xingbi, Chen

    2009-12-01

    A new quasi-three-dimensional (quasi-3D) numeric simulation method for a high-voltage level-shifting circuit structure is proposed. The performances of the 3D structure are analyzed by combining some 2D device structures; the 2D devices are in two planes perpendicular to each other and to the surface of the semiconductor. In comparison with Davinci, the full 3D device simulation tool, the quasi-3D simulation method can give results for the potential and current distribution of the 3D high-voltage level-shifting circuit structure with appropriate accuracy and the total CPU time for simulation is significantly reduced. The quasi-3D simulation technique can be used in many cases with advantages such as saving computing time, making no demands on the high-end computer terminals, and being easy to operate.

  13. Compact physical model of a-IGZO TFTs for circuit simulation

    NARCIS (Netherlands)

    Ghittorelli, M.; Torricelli, F.; Garripoli, C.; Van Der Steen, J.L.J.P.; Gelinck, G.H.; Abdinia, S.; Cantatore, E.; Kovacs-Vajna, Z.M.

    2017-01-01

    Amorphous InGaZnO (a-IGZO) is a candidate material for thin-film transistors (TFTs) owing to its large electron mobility. The development of high functionality circuits requires accurate and efficient circuit simulation that, in turn, is based on compact physical a-IGZO TFTs models. Here we propose

  14. Fabrication and simulation of organic transistors and functional circuits

    Energy Technology Data Exchange (ETDEWEB)

    Taylor, D. Martin, E-mail: d.m.taylor@bangor.ac.uk [School of Electronic Engineering, Bangor University, Dean Street, Bangor, Gwynedd LL57 1UT (United Kingdom); Patchett, Eifion R.; Williams, Aled [School of Electronic Engineering, Bangor University, Dean Street, Bangor, Gwynedd LL57 1UT (United Kingdom); Ding, Ziqian; Assender, Hazel E. [Department of Materials, Oxford University, Parks Road, Oxford OX1 3PH (United Kingdom); Morrison, John J.; Yeates, Stephen G. [School of Chemistry, University of Manchester, Oxford Road, Manchester M13 9PL (United Kingdom)

    2015-07-29

    Highlights: • Development of roll-to-roll fabrication protocol for organic TFTs and circuits. • Bottom-gate polystyrene/DNTT TFTs much better than top-gate TFTs. • High-yield and high mobility with polystyrene-buffered TPGDA. • Fabrication of functional circuits – ring oscillators and logic gates. • New baseline process allows TFT parameter extraction and circuit simulation. - Abstract: We report the development of a vacuum-evaporation route for the roll-to-roll fabrication of functioning organic circuits. A number of key findings and observations are highlighted which influenced the eventual fabrication protocol adopted. Initially, the role of interface roughness in determining carrier mobility in thin film transistors (TFTs) is investigated. Then it is shown that TFT yield is higher for devices fabricated on a flash-evaporated-plasma-polymerised tri(propyleneglycol) diacrylate (TPGDA) gate dielectric than for TFTs based on a spin-coated polystyrene (PS) dielectric. However, a degradation in mobility is observed which is attributed to the highly polar TPGDA surface. It is shown that high mobility, low gate-leakage currents and excellent stability are restored when the surface of TPGDA was buffered with a thin, spin-coated PS film. The resulting baseline process allowed arrays of functional circuits such as ring oscillators, NOR/NAND logic gates and S–R latches to be fabricated with high yield and their performance to be simulated.

  15. Analogue Electrical Circuit for Simulation of the Duffing-Holmes Equation

    DEFF Research Database (Denmark)

    Tamaseviciute, E.; Tamasevicius, A.; Mykolaitis, G.

    2008-01-01

    An extremely simple second order analogue electrical circuit for simulating the two-well Duffing-Holmes mathematical oscillator is described. Numerical results and analogue electrical simulations are illustrated with the snapshots of chaotic waveforms, phase portraits (Lissajous figures...

  16. Simulation of Higher-Order Electrical Circuits with Stochastic Parameters via SDEs

    Directory of Open Access Journals (Sweden)

    BRANCIK, L.

    2013-02-01

    Full Text Available The paper deals with a technique for the simulation of higher-order electrical circuits with parameters varying randomly. The principle consists in the utilization of the theory of stochastic differential equations (SDE, namely the vector form of the ordinary SDEs. Random changes of both excitation voltage and some parameters of passive circuit elements are considered, and circuit responses are analyzed. The voltage and/or current responses are computed and represented in the form of the sample means accompanied by their confidence intervals to provide reliable estimates. The method is applied to analyze responses of the circuit models of optional orders, specially those consisting of a cascade connection of the RLGC networks. To develop the model equations the state-variable method is used, afterwards a corresponding vector SDE is formulated and a stochastic Euler numerical method applied. To verify the results the deterministic responses are also computed by the help of the PSpice simulator or the numerical inverse Laplace transforms (NILT procedure in MATLAB, while removing random terms from the circuit model.

  17. Superconducting high current magnetic Circuit: Design and Parameter Estimation of a Simulation Model

    CERN Document Server

    Kiefer, Alexander; Reich, Werner Dr

    The Large Hadron Collider (LHC) utilizes superconducting main dipole magnets that bend the trajectory of the particle beams. In order to adjust the not completely homogeneous magnetic feld of the main dipole magnets, amongst others, sextupole correctcorrector magnets are used. In one of the 16 corrector magnet circuits placed in the LHC, 154 of these sextupole corrector magnets (MCS) are connected in series. This circuit extends on a 3.35 km tunnel section of the LHC. In 2015, at one of the 16 circuits a fault was detected. The simulation of this circuit is helpful for fnding the fault by applying alternating current at different frequencies. Within this Thesis a PSpice model for the simulation of the superconducting corrector magnet circuit was designed. The physical properties of the circuit and its elements were analyzed and implemented. For the magnets and bus-bars, sub-circuits were created which reflect the parasitic effects of electrodynamics and electrostats. The inductance values and capacitance valu...

  18. Stochastic Simulation of Integrated Circuits with Nonlinear Black-Box Components via Augmented Deterministic Equivalents

    Directory of Open Access Journals (Sweden)

    MANFREDI, P.

    2014-11-01

    Full Text Available This paper extends recent literature results concerning the statistical simulation of circuits affected by random electrical parameters by means of the polynomial chaos framework. With respect to previous implementations, based on the generation and simulation of augmented and deterministic circuit equivalents, the modeling is extended to generic and ?black-box? multi-terminal nonlinear subcircuits describing complex devices, like those found in integrated circuits. Moreover, based on recently-published works in this field, a more effective approach to generate the deterministic circuit equivalents is implemented, thus yielding more compact and efficient models for nonlinear components. The approach is fully compatible with commercial (e.g., SPICE-type circuit simulators and is thoroughly validated through the statistical analysis of a realistic interconnect structure with a 16-bit memory chip. The accuracy and the comparison against previous approaches are also carefully established.

  19. Research on burnout fault of moulded case circuit breaker based on finite element simulation

    Science.gov (United States)

    Xue, Yang; Chang, Shuai; Zhang, Penghe; Xu, Yinghui; Peng, Chuning; Shi, Erwei

    2017-09-01

    In the failure event of molded case circuit breaker, overheating of the molded case near the wiring terminal has a very important proportion. The burnout fault has become an important factor restricting the development of molded case circuit breaker. This paper uses the finite element simulation software to establish the model of molded case circuit breaker by coupling multi-physics field. This model can simulate the operation and study the law of the temperature distribution. The simulation results show that the temperature near the wiring terminal, especially the incoming side of the live wire, of the molded case circuit breaker is much higher than that of the other areas. The steady-state and transient simulation results show that the temperature at the wiring terminals is abnormally increased by increasing the contact resistance of the wiring terminals. This is consistent with the frequent occurrence of burnout of the molded case in this area. Therefore, this paper holds that the burnout failure of the molded case circuit breaker is mainly caused by the abnormal increase of the contact resistance of the wiring terminal.

  20. Circuit simulation model multi-quantum well laser diodes inducing transport and capture/escape

    International Nuclear Information System (INIS)

    Zhuber-Okrog, K.

    1996-04-01

    This work describes the development of world's first circuit simulation model for multi-quantum well (MQW) semiconductor lasers comprising caier transport and capture/escape effects. This model can be seen as the application of a new semiconductor device simulator for quasineutral structures including MQW layers with an extension for simple single mode modeling of optical behavior. It is implemented in a circuit simulation program. The model is applied to Fabry-Perot laser diodes and compared to measured data. (author)

  1. Contribution to the electrothermal simulation in power electronics. Development of a simulation methodology applied to switching circuits under variable operating conditions; Contribution a la simulation electrothermique en electronique de puissance. Developpement d`une methode de simulation pour circuits de commutation soumis a des commandes variables

    Energy Technology Data Exchange (ETDEWEB)

    Vales, P.

    1997-03-19

    In modern hybrid or monolithic integrated power circuits, electrothermal effects can no longer be ignored. A methodology is proposed in order to simulate electrothermal effects in power circuits, with a significant reduction of the computation time while taking into account electrical and thermal time constants which are usually widely different. A supervising program, written in Fortran, uses system call sequences and manages an interactive dialog between a fast thermal simulator and a general electrical simulator. This explicit coupling process between two specific simulators requires a multi-task operating system. The developed software allows for the prediction of the electrothermal power dissipation drift in the active areas of components, and the prediction of thermally-induced coupling effects between adjacent components. An application to the study of hard switching circuits working under variable operating conditions is presented

  2. Numaerical simulation of a SF6 circuit-breaker arc

    International Nuclear Information System (INIS)

    Vergne, P.J.; Gonzalez, J.J.; Gleizes, A.

    1995-01-01

    The design and the validation of high-voltage circuit breaker require more and more physical models which take into account complex phenomenae. We present here a numerical simulation of an SF 6 arc established in a simplified geometry of a circuit breaker prototype. Our study deals specially with the turbulent flow, the boundary conditions of the arc roots on the electrodes, the influence of the electromagnetic strengths and the radiative transfer. The results concern a stationary state with fixed geometry and current intensity (I=2000 A)

  3. Basic Guidelines to Introduce Electric Circuit Simulation Software in a General Physics Course

    Science.gov (United States)

    Moya, A. A.

    2018-01-01

    The introduction of electric circuit simulation software for undergraduate students in a general physics course is proposed in order to contribute to the constructive learning of electric circuit theory. This work focuses on the lab exercises based on dc, transient and ac analysis in electric circuits found in introductory physics courses, and…

  4. Circuit simulation of exponential transmission line for petawatt Z-pinch plasma drivers

    International Nuclear Information System (INIS)

    Zeng Zhengzhong

    2011-01-01

    It was demonstrated, based on the PSPICE circuit simulation, that the sectioning number for the circuit simulation of an exponential transmission line should be determined as twice the line's one-way electromagnetic wave transport time(electric length) divided by the wave-front of input pulse, owing to elimination of the wave reflections caused by artificial impedance discontinuity in the line's circuit simulation model, which employs a serial and sectional transmission line with impedances constant in each section but stair-step-varied between sections, and with total electric length the same as that of the exponential line under simulation. A pulse of 112.2 ns wave-front propagates through an exponential water transmission line of 1 234.2 ns one-way transport time will give the best sectioning number of 22, when the constant impedance of each section is given by the geometric mean of the two ends' impedances of the corresponding section on the exponential line under simulation. This sectioning rule is equivalent to the statement that the two-way transport time of each section should be equal to the input pulse's wave-front. (authors)

  5. submitter Simulation of a quench event in the upgraded High-Luminosity LHC Main dipole circuit including the 11 T Nb$_{3}$Sn dipole magnets

    CERN Document Server

    Fernandez Navarro, Alejandro Manuel; Verweij, Arjan P; Bortot, Lorenzo; Mentink, Matthias; Prioli, Marco; Auchmann, Bernhard; Izquierdo Bermudez, Susana; Ravaioli, Emmanuele; Yammine, Samer

    2018-01-01

    To achieve the goal of increased luminosity, two out of eight main dipole circuits of the accelerator will be reconfigured in the coming LHC upgrade by replacing one standard 14.3-m long, Nb-Ti-based, 8.3 T dipole magnet by two 5.3-m long, Nb$_{3}$Sn-based, 11.2 T magnets (MBH). The modified dipole circuits will contain 153 Nb-Ti magnets and two MBH magnets. The latter will be connected to an additional trim power converter to compensate for the differences in the magnetic transfer functions. These modifications imply a number of challenges from the point of view of the circuit integrity, operation, and quench protection. In order to assess the circuit performance under different scenarios and to validate the circuit quench protection strategy, reliable and accurate numerical transient simulations have to be performed. We present the field/circuit coupling simulation of the reconfigured main dipole magnet chain following the introduction of the MBH magnets. 2-D distributed LEDET models of the MBH's have been ...

  6. A quasi-3-dimensional simulation method for a high-voltage level-shifting circuit structure

    International Nuclear Information System (INIS)

    Liu Jizhi; Chen Xingbi

    2009-01-01

    A new quasi-three-dimensional (quasi-3D) numeric simulation method for a high-voltage level-shifting circuit structure is proposed. The performances of the 3D structure are analyzed by combining some 2D device structures; the 2D devices are in two planes perpendicular to each other and to the surface of the semiconductor. In comparison with Davinci, the full 3D device simulation tool, the quasi-3D simulation method can give results for the potential and current distribution of the 3D high-voltage level-shifting circuit structure with appropriate accuracy and the total CPU time for simulation is significantly reduced. The quasi-3D simulation technique can be used in many cases with advantages such as saving computing time, making no demands on the high-end computer terminals, and being easy to operate. (semiconductor integrated circuits)

  7. A quasi-3-dimensional simulation method for a high-voltage level-shifting circuit structure

    Energy Technology Data Exchange (ETDEWEB)

    Liu Jizhi; Chen Xingbi, E-mail: jzhliu@uestc.edu.c [State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 (China)

    2009-12-15

    A new quasi-three-dimensional (quasi-3D) numeric simulation method for a high-voltage level-shifting circuit structure is proposed. The performances of the 3D structure are analyzed by combining some 2D device structures; the 2D devices are in two planes perpendicular to each other and to the surface of the semiconductor. In comparison with Davinci, the full 3D device simulation tool, the quasi-3D simulation method can give results for the potential and current distribution of the 3D high-voltage level-shifting circuit structure with appropriate accuracy and the total CPU time for simulation is significantly reduced. The quasi-3D simulation technique can be used in many cases with advantages such as saving computing time, making no demands on the high-end computer terminals, and being easy to operate. (semiconductor integrated circuits)

  8. An electrical circuit model for simulation of indoor radon concentration.

    Science.gov (United States)

    Musavi Nasab, S M; Negarestani, A

    2013-01-01

    In this study, a new model based on electric circuit theory was introduced to simulate the behaviour of indoor radon concentration. In this model, a voltage source simulates radon generation in walls, conductivity simulates migration through walls and voltage across a capacitor simulates radon concentration in a room. This simulation considers migration of radon through walls by diffusion mechanism in one-dimensional geometry. Data reported in a typical Greek house were employed to examine the application of this technique of simulation to the behaviour of radon.

  9. Methods and models for accelerating dynamic simulation of fluid power circuits

    Energy Technology Data Exchange (ETDEWEB)

    Aaman, R.

    2011-07-01

    The objective of this dissertation is to improve the dynamic simulation of fluid power circuits. A fluid power circuit is a typical way to implement power transmission in mobile working machines, e.g. cranes, excavators etc. Dynamic simulation is an essential tool in developing controllability and energy-efficient solutions for mobile machines. Efficient dynamic simulation is the basic requirement for the real-time simulation. In the real-time simulation of fluid power circuits there exist numerical problems due to the software and methods used for modelling and integration. A simulation model of a fluid power circuit is typically created using differential and algebraic equations. Efficient numerical methods are required since differential equations must be solved in real time. Unfortunately, simulation software packages offer only a limited selection of numerical solvers. Numerical problems cause noise to the results, which in many cases leads the simulation run to fail. Mathematically the fluid power circuit models are stiff systems of ordinary differential equations. Numerical solution of the stiff systems can be improved by two alternative approaches. The first is to develop numerical solvers suitable for solving stiff systems. The second is to decrease the model stiffness itself by introducing models and algorithms that either decrease the highest eigenvalues or neglect them by introducing steady-state solutions of the stiff parts of the models. The thesis proposes novel methods using the latter approach. The study aims to develop practical methods usable in dynamic simulation of fluid power circuits using explicit fixed-step integration algorithms. In this thesis, two mechanisms which make the system stiff are studied. These are the pressure drop approaching zero in the turbulent orifice model and the volume approaching zero in the equation of pressure build-up. These are the critical areas to which alternative methods for modelling and numerical simulation

  10. A Comparison of Students' Conceptual Understanding of Electric Circuits in Simulation Only and Simulation-Laboratory Contexts

    Science.gov (United States)

    Jaakkola, Tomi; Nurmi, Sami; Veermans, Koen

    2011-01-01

    The aim of this experimental study was to compare learning outcomes of students using a simulation alone (simulation environment) with outcomes of those using a simulation in parallel with real circuits (combination environment) in the domain of electricity, and to explore how learning outcomes in these environments are mediated by implicit (only…

  11. Numerical Simulation Bidirectional Chaotic Synchronization of Spiegel-Moore Circuit and Its Application for Secure Communication

    Science.gov (United States)

    Sanjaya, W. S. M.; Anggraeni, D.; Denya, R.; Ismail, N.

    2017-03-01

    Spiegel-Moore is a dynamical chaotic system which shows irregular variability in the luminosity of stars. In this paper present the performed the design and numerical simulation of the synchronization Spiegel-Moore circuit and applied to security system for communication. The initial study in this paper is to analyze the eigenvalue structures, various attractors, Bifurcation diagram, and Lyapunov exponent analysis. We have studied the dynamic behavior of the system in the case of the bidirectional coupling via a linear resistor. Both experimental and simulation results have shown that chaotic synchronization is possible. Finally, the effectiveness of the bidirectional coupling scheme between two identical Spiegel-Moore circuits in a secure communication system is presented in details. Integration of theoretical electronic circuit, the numerical simulation by using MATLAB®, as well as the implementation of circuit simulations by using Multisim® has been performed in this study.

  12. PSPICE simulation of bipolar pulse converter based on short-circuited coaxial transmission line

    International Nuclear Information System (INIS)

    Shi Lei; Fan Yajun

    2010-01-01

    The operating principle of the bipolar pulse converter based on short-circuited coaxial transmission line type is given. The output bipolar pulses are simulated by using PSPICE program on condition of different electric length and different impedance of the short-circuited coaxial transmission line. The bipolar pulses are generated by using unipolar pulse with pulse width of 2 ns in experiment, the experimental result fit well with the simulation result. (authors)

  13. Analysis of specification of an electrode type sensor equivalent circuit on the base of impedance spectroscopy simulation

    International Nuclear Information System (INIS)

    Ogurtsov, V I; Mathewson, A; Sheehan, M M

    2005-01-01

    Simulation of electrochemical impedance spectroscopy (EIS) based on a LabVIEW model of a complex impedance measuring system in the frequency domain has been investigated to specify parameters of Randle's equivalent circuit, which is ordinarily used for electrode sensors. The model was based on a standard system for EIS instrumentation and consisted of a sensor modelled by Randle's equivalent circuit, a source of harmonic frequency sweep voltage applied to the sensor and a transimpedance amplifier, which transformed the sensor current to voltage. It provided impedance spectroscopy data for different levels of noise, modelled by current and voltage equivalent noise sources applied to the amplifier input. The noise influence on Randle's equivalent circuit specification was analysed by considering the behaviour of the approximation error. Different metrics including absolute, relative, semilogarithmic and logarithmic based distance between complex numbers on a complex plane were considered and compared to one another for evaluating this error. It was shown that the relative and logarithmic based metrics provide more reliable results for the determination of circuit parameters

  14. Analysis of specification of an electrode type sensor equivalent circuit on the base of impedance spectroscopy simulation

    Energy Technology Data Exchange (ETDEWEB)

    Ogurtsov, V I; Mathewson, A; Sheehan, M M [Tyndall National Institute, Lee Maltings, Prospect Row, Cork (Ireland)

    2005-01-01

    Simulation of electrochemical impedance spectroscopy (EIS) based on a LabVIEW model of a complex impedance measuring system in the frequency domain has been investigated to specify parameters of Randle's equivalent circuit, which is ordinarily used for electrode sensors. The model was based on a standard system for EIS instrumentation and consisted of a sensor modelled by Randle's equivalent circuit, a source of harmonic frequency sweep voltage applied to the sensor and a transimpedance amplifier, which transformed the sensor current to voltage. It provided impedance spectroscopy data for different levels of noise, modelled by current and voltage equivalent noise sources applied to the amplifier input. The noise influence on Randle's equivalent circuit specification was analysed by considering the behaviour of the approximation error. Different metrics including absolute, relative, semilogarithmic and logarithmic based distance between complex numbers on a complex plane were considered and compared to one another for evaluating this error. It was shown that the relative and logarithmic based metrics provide more reliable results for the determination of circuit parameters.

  15. Multi-Level Simulated Fault Injection for Data Dependent Reliability Analysis of RTL Circuit Descriptions

    Directory of Open Access Journals (Sweden)

    NIMARA, S.

    2016-02-01

    Full Text Available This paper proposes data-dependent reliability evaluation methodology for digital systems described at Register Transfer Level (RTL. It uses a hybrid hierarchical approach, combining the accuracy provided by Gate Level (GL Simulated Fault Injection (SFI and the low simulation overhead required by RTL fault injection. The methodology comprises the following steps: the correct simulation of the RTL system, according to a set of input vectors, hierarchical decomposition of the system into basic RTL blocks, logic synthesis of basic RTL blocks, data-dependent SFI for the GL netlists, and RTL SFI. The proposed methodology has been validated in terms of accuracy on a medium sized circuit – the parallel comparator used in Check Node Unit (CNU of the Low-Density Parity-Check (LDPC decoders. The methodology has been applied for the reliability analysis of a 128-bit Advanced Encryption Standard (AES crypto-core, for which the GL simulation was prohibitive in terms of required computational resources.

  16. SEAS: A simulated evolution approach for analog circuit synthesis

    NARCIS (Netherlands)

    Ning, Zhen-Qiu; Ning, Zhen-Qiu; Mouthaan, A.J.; Wallinga, Hans

    1991-01-01

    The authors present a simulated evolution approach for analog circuit synthesis based on an analogy with the natural selection process in biological environments and on the iterative improvements in solving engineering problems. A prototype framework based on this idea, called SEAS, has been

  17. Circuit Simulation for Solar Power Maximum Power Point Tracking with Different Buck-Boost Converter Topologies

    Directory of Open Access Journals (Sweden)

    Jaw-Kuen Shiau

    2014-08-01

    Full Text Available The power converter is one of the essential elements for effective use of renewable power sources. This paper focuses on the development of a circuit simulation model for maximum power point tracking (MPPT evaluation of solar power that involves using different buck-boost power converter topologies; including SEPIC, Zeta, and four-switch type buck-boost DC/DC converters. The circuit simulation model mainly includes three subsystems: a PV model; a buck-boost converter-based MPPT system; and a fuzzy logic MPPT controller. Dynamic analyses of the current-fed buck-boost converter systems are conducted and results are presented in the paper. The maximum power point tracking function is achieved through appropriate control of the power switches of the power converter. A fuzzy logic controller is developed to perform the MPPT function for obtaining maximum power from the PV panel. The MATLAB-based Simulink piecewise linear electric circuit simulation tool is used to verify the complete circuit simulation model.

  18. Sinusoidal excitation on the Chua's circuit simulation of limit cycles and chaos

    DEFF Research Database (Denmark)

    Lindberg, Erik

    1994-01-01

    of charging”, and stable limit cycle behaviour based on the balance between the energy lost in the regions with mainly positive losses and the energy gained in the regions with mainly negative losses. Convergence problems observed in connection with simulation of the ideal piecewise-linear model are solved......Experiments with modelling and simulation of sinusoidal excitation on Chua's circuit are presented. It is demonstrated that the behaviour of the circuit is based on the interaction of two different kinds of energy balance: chaotic behaviour based on a balance between two unstable “states...

  19. Modeling and simulation of floating gate nanocrystal FET devices and circuits

    Science.gov (United States)

    Hasaneen, El-Sayed A. M.

    The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to

  20. Simulation of the dynamic behaviour of the secondary circuit of a WWER-440 type nuclear power plant Pt. 1

    International Nuclear Information System (INIS)

    Gacs, A.; Janosy, J.S.; Kiss, Zs.

    1987-07-01

    This report describes the simulation model of the secondary circuit of a WWER-440 type nuclear power plant. The goal of this modelling is to simulate normal and small abnormal transients in a Basic Principles Simulator. The earlier reports describing the dynamic simulation of primary circuit of a WWER-440 nuclear power plant are KFKI--1983-127 and KFKI--1985-08. At present the controllers of the secondary circuit are not simulated. Finally, some simulation results are presented. (author)

  1. Quantum Simulation with Circuit-QED Lattices: from Elementary Building Blocks to Many-Body Theory

    Science.gov (United States)

    Zhu, Guanyu

    Recent experimental and theoretical progress in superconducting circuits and circuit QED (quantum electrodynamics) has helped to develop high-precision techniques to control, manipulate, and detect individual mesoscopic quantum systems. A promising direction is hence to scale up from individual building blocks to form larger-scale quantum many-body systems. Although realizing a scalable fault-tolerant quantum computer still faces major barriers of decoherence and quantum error correction, it is feasible to realize scalable quantum simulators with state-of-the-art technology. From the technological point of view, this could serve as an intermediate stage towards the final goal of a large-scale quantum computer, and could help accumulating experience with the control of quantum systems with a large number of degrees of freedom. From the physical point of view, this opens up a new regime where condensed matter systems can be simulated and studied, here in the context of strongly correlated photons and two-level systems. In this thesis, we mainly focus on two aspects of circuit-QED based quantum simulation. First, we discuss the elementary building blocks of the quantum simulator, in particular a fluxonium circuit coupled to a superconducting resonator. We show the interesting properties of the fluxonium circuit as a qubit, including the unusual structure of its charge matrix elements. We also employ perturbation theory to derive the effective Hamiltonian of the coupled system in the dispersive regime, where qubit and the photon frequencies are detuned. The observables predicted with our theory, including dispersive shifts and Kerr nonlinearity, are compared with data from experiments, such as homodyne transmission and two-tone spectroscopy. These studies also relate to the problem of detection in a circuit-QED quantum simulator. Second, we study many-body physics of circuit-QED lattices, serving as quantum simulators. In particular, we focus on two different

  2. Passive Guaranteed Simulation of Analog Audio Circuits: A Port-Hamiltonian Approach

    Directory of Open Access Journals (Sweden)

    Antoine Falaize

    2016-09-01

    Full Text Available We present a method that generates passive-guaranteed stable simulations of analog audio circuits from electronic schematics for real-time issues. On one hand, this method is based on a continuous-time power-balanced state-space representation structured into its energy-storing parts, dissipative parts, and external sources. On the other hand, a numerical scheme is especially designed to preserve this structure and the power balance. These state-space structures define the class of port-Hamiltonian systems. The derivation of this structured system associated with the electronic circuit is achieved by an automated analysis of the interconnection network combined with a dictionary of models for each elementary component. The numerical scheme is based on the combination of finite differences applied on the state (with respect to the time variable and on the total energy (with respect to the state. This combination provides a discrete-time version of the power balance. This set of algorithms is valid for both the linear and nonlinear case. Finally, three applications of increasing complexities are given: a diode clipper, a common-emitter bipolar-junction transistor amplifier, and a wah pedal. The results are compared to offline simulations obtained from a popular circuit simulator.

  3. Development of alternating current circuit simulation as essential learning support for senior high school student

    Directory of Open Access Journals (Sweden)

    Mayang Dwinta Trisniarti

    2017-02-01

    Full Text Available In this study an interactive simulation of Alternating Current circuit was developed by using Articulate Storyline 2 and Adobe Flash CS 6 programs. The aim of this study was providing a computer interactive simulation as essential learning support for Senior High School student. One of the most important features of AC circuit simulation is the easily and continuous material to attain learning objectivity and interest toward students. This AC circuit simulation is built to create real-time sine wave graphs so that student could compare the result if the variable were changed gradually. The validation is held through several experts and reviewers due to get obtained through questionnaires. The results of this research could be concluded that AC circuit simulation for Senior High School Physics have good criteria based on user interface, i.e. 50% of respondents rated enough, 16.67% of respondents rated good, and 33.33% of respondents rated very good. Based on maintenance, i.e. 50% of respondents rated enough, 20% of respondents rated good, and 30% of respondents rated very good. Then based on usability, i.e. 6.67% of respondents rated good and 93.33% rated very good. Furthermore, based on understanding, i.e. 6.67% of respondents rated enough, 30% of respondents rated good, and 73.33% of respondents rated very good. The use of AC circuit simulation could improve the senior high school students’ cognitive ability on the Physics’s course, i.e. with the average score increased from 68.67 to 80.5 based on 30 students.

  4. Relative ultrasound energy measurement circuit

    OpenAIRE

    Gustafsson, E.Martin I.; Johansson, Jonny; Delsing, Jerker

    2005-01-01

    A relative ultrasound energy estimation circuit has been designed in a standard 0.35-μm CMOS process, to be a part of a thumb size internet connected wireless ultrasound measurement system. This circuit measures the relative energy between received ultrasound pulses, and presents an output signal that is linear to the received energy. Post-layout simulations indicate 7 bit linearity for 500 mV input signals, 5 μsec startup and stop times, 2.6 mW power consumption during active state. The acti...

  5. Multi-qubit circuit quantum electrodynamics

    International Nuclear Information System (INIS)

    Viehmann, Oliver

    2013-01-01

    Circuit QED systems are macroscopic, man-made quantum systems in which superconducting artificial atoms, also called Josephson qubits, interact with a quantized electromagnetic field. These systems have been devised to mimic the physics of elementary quantum optical systems with real atoms in a scalable and more flexible framework. This opens up a variety of possible applications of circuit QED systems. For instance, they provide a promising platform for processing quantum information. Recent years have seen rapid experimental progress on these systems, and experiments with multi-component circuit QED architectures are currently starting to come within reach. In this thesis, circuit QED systems with multiple Josephson qubits are studied theoretically. We focus on simple and experimentally realistic extensions of the currently operated circuit QED setups and pursue investigations in two main directions. First, we consider the equilibrium behavior of circuit QED systems containing a large number of mutually noninteracting Josephson charge qubits. The currently accepted standard description of circuit QED predicts the possibility of superradiant phase transitions in such systems. However, a full microscopic treatment shows that a no-go theorem for superradiant phase transitions known from atomic physics applies to circuit QED systems as well. This reveals previously unknown limitations of the applicability of the standard theory of circuit QED to multi-qubit systems. Second, we explore the potential of circuit QED for quantum simulations of interacting quantum many-body systems. We propose and analyze a circuit QED architecture that implements the quantum Ising chain in a time-dependent transverse magnetic field. Our setup can be used to study quench dynamics, the propagation of localized excitations, and other non-equilibrium features in this paradigmatic model in the theory of non-equilibrium thermodynamics and quantumcritical phenomena. The setup is based on a

  6. Multi-qubit circuit quantum electrodynamics

    Energy Technology Data Exchange (ETDEWEB)

    Viehmann, Oliver

    2013-09-03

    Circuit QED systems are macroscopic, man-made quantum systems in which superconducting artificial atoms, also called Josephson qubits, interact with a quantized electromagnetic field. These systems have been devised to mimic the physics of elementary quantum optical systems with real atoms in a scalable and more flexible framework. This opens up a variety of possible applications of circuit QED systems. For instance, they provide a promising platform for processing quantum information. Recent years have seen rapid experimental progress on these systems, and experiments with multi-component circuit QED architectures are currently starting to come within reach. In this thesis, circuit QED systems with multiple Josephson qubits are studied theoretically. We focus on simple and experimentally realistic extensions of the currently operated circuit QED setups and pursue investigations in two main directions. First, we consider the equilibrium behavior of circuit QED systems containing a large number of mutually noninteracting Josephson charge qubits. The currently accepted standard description of circuit QED predicts the possibility of superradiant phase transitions in such systems. However, a full microscopic treatment shows that a no-go theorem for superradiant phase transitions known from atomic physics applies to circuit QED systems as well. This reveals previously unknown limitations of the applicability of the standard theory of circuit QED to multi-qubit systems. Second, we explore the potential of circuit QED for quantum simulations of interacting quantum many-body systems. We propose and analyze a circuit QED architecture that implements the quantum Ising chain in a time-dependent transverse magnetic field. Our setup can be used to study quench dynamics, the propagation of localized excitations, and other non-equilibrium features in this paradigmatic model in the theory of non-equilibrium thermodynamics and quantumcritical phenomena. The setup is based on a

  7. Student generated assignments about electrical circuits in a computer simulation

    NARCIS (Netherlands)

    Vreman-de Olde, Cornelise; de Jong, Anthonius J.M.

    2004-01-01

    In this study we investigated the design of assignments by students as a knowledge-generating activity. Students were required to design assignments for 'other students' in a computer simulation environment about electrical circuits. Assignments consisted of a question, alternatives, and feedback on

  8. Mathematical Modelling and Simulation of Electrical Circuits and Semiconductor Devices

    CERN Document Server

    Merten, K; Bulirsch, R

    1990-01-01

    Numerical simulation and modelling of electric circuits and semiconductor devices are of primal interest in today's high technology industries. At the Oberwolfach Conference more than forty scientists from around the world, in­ cluding applied mathematicians and electrical engineers from industry and universities, presented new results in this area of growing importance. The contributions to this conference are presented in these proceedings. They include contributions on special topics of current interest in circuit and device simulation, as well as contributions that present an overview of the field. In the semiconductor area special lectures were given on mixed finite element methods and iterative procedures for the solution of large linear systems. For three dimensional models new discretization procedures including software packages were presented. Con­ nections between semiconductor equations and the Boltzmann equation were shown as well as relations to the quantum transport equation. Other issues dis...

  9. Hamiltonian circuited simulations in reactor physics

    International Nuclear Information System (INIS)

    Rio Hirowati Shariffudin

    2002-01-01

    In the assessment of suitability of reactor designs and in the investigations into reactor safety, the steady state of a nuclear reactor has to be studied carefully. The analysis can be done through mockup designs but this approach costs a lot of money and consumes a lot of time. A less expensive approach is via simulations where the reactor and its neutron interactions are modelled mathematically. Finite difference discretization of the diffusion operator has been used to approximate the steady state multigroup neutron diffusion equations. The steps include the outer scheme which estimates the resulting right hand side of the matrix equation, the group scheme which calculates the upscatter problem and the inner scheme which solves for the flux for a particular group. The Hamiltonian circuited simulations for the inner iterations of the said neutron diffusion equation enable the effective use of parallel computing, especially where the solutions of multigroup neutron diffusion equations involving two or more space dimensions are required. (Author)

  10. Enhancement of galloping-based wind energy harvesting by synchronized switching interface circuits

    Science.gov (United States)

    Zhao, Liya; Liang, Junrui; Tang, Lihua; Yang, Yaowen; Liu, Haili

    2015-04-01

    Galloping phenomenon has attracted extensive research attention for small-scale wind energy harvesting. In the reported literature, the dynamics and harvested power of a galloping-based energy harvesting system are usually evaluated with a resistive AC load; these characteristics might shift when a practical harvesting interface circuit is connected for extracting useful DC power. In the family of piezoelectric energy harvesting interface circuits, synchronized switching harvesting on inductor (SSHI) has demonstrated its advantage for enhancing the harvested power from existing base vibrations. This paper investigates the harvesting capability of a galloping-based wind energy harvester using SSHI interfaces, with a focus on comparing the performances of Series SSHI (S-SSHI) and Parallel SSHI (P-SSHI) with that of a standard DC interface, in terms of power at various wind speeds. The prototyped galloping-based piezoelectric energy harvester (GPEH) comprises a piezoelectric cantilever attached with a square-sectioned bluff body made of foam. Equivalent circuit model (ECM) of the GPEH is established and system-level circuit simulations with SSHI and standard interfaces are performed and validated with wind tunnel tests. The benefits of SSHI compared to standard circuit become more significant when the wind speed gets higher; while SSHI circuits lose the benefits at small wind speeds. In both experiment and simulation, the superiority of P-SSHI is confirmed while S-SSHI demands further investigation. The power output is increased by 43.75% with P-SSHI compared to the standard circuit at a wind speed of 6m/s.

  11. MEMS 3-DoF gyroscope design, modeling and simulation through equivalent circuit lumped parameter model

    International Nuclear Information System (INIS)

    Mian, Muhammad Umer; Khir, M. H. Md.; Tang, T. B.; Dennis, John Ojur; Riaz, Kashif; Iqbal, Abid; Bazaz, Shafaat A.

    2015-01-01

    Pre-fabrication, behavioural and performance analysis with computer aided design (CAD) tools is a common and fabrication cost effective practice. In light of this we present a simulation methodology for a dual-mass oscillator based 3 Degree of Freedom (3-DoF) MEMS gyroscope. 3-DoF Gyroscope is modeled through lumped parameter models using equivalent circuit elements. These equivalent circuits consist of elementary components which are counterpart of their respective mechanical components, used to design and fabricate 3-DoF MEMS gyroscope. Complete designing of equivalent circuit model, mathematical modeling and simulation are being presented in this paper. Behaviors of the equivalent lumped models derived for the proposed device design are simulated in MEMSPRO T-SPICE software. Simulations are carried out with the design specifications following design rules of the MetalMUMPS fabrication process. Drive mass resonant frequencies simulated by this technique are 1.59 kHz and 2.05 kHz respectively, which are close to the resonant frequencies found by the analytical formulation of the gyroscope. The lumped equivalent circuit modeling technique proved to be a time efficient modeling technique for the analysis of complex MEMS devices like 3-DoF gyroscopes. The technique proves to be an alternative approach to the complex and time consuming couple field analysis Finite Element Analysis (FEA) previously used

  12. MEMS 3-DoF gyroscope design, modeling and simulation through equivalent circuit lumped parameter model

    Energy Technology Data Exchange (ETDEWEB)

    Mian, Muhammad Umer, E-mail: umermian@gmail.com; Khir, M. H. Md.; Tang, T. B. [Department of Electrical and Electronic Engineering, Universiti Teknologi PETRONAS, Tronoh, Perak (Malaysia); Dennis, John Ojur [Department of Fundamental & Applied Sciences, Universiti Teknologi PETRONAS, Tronoh, Perak (Malaysia); Riaz, Kashif; Iqbal, Abid [Faculty of Electronics Engineering, GIK Institute of Engineering Sciences and Technology, Topi, Khyber Pakhtunkhaw (Pakistan); Bazaz, Shafaat A. [Department of Computer Science, Center for Advance Studies in Engineering, Islamabad (Pakistan)

    2015-07-22

    Pre-fabrication, behavioural and performance analysis with computer aided design (CAD) tools is a common and fabrication cost effective practice. In light of this we present a simulation methodology for a dual-mass oscillator based 3 Degree of Freedom (3-DoF) MEMS gyroscope. 3-DoF Gyroscope is modeled through lumped parameter models using equivalent circuit elements. These equivalent circuits consist of elementary components which are counterpart of their respective mechanical components, used to design and fabricate 3-DoF MEMS gyroscope. Complete designing of equivalent circuit model, mathematical modeling and simulation are being presented in this paper. Behaviors of the equivalent lumped models derived for the proposed device design are simulated in MEMSPRO T-SPICE software. Simulations are carried out with the design specifications following design rules of the MetalMUMPS fabrication process. Drive mass resonant frequencies simulated by this technique are 1.59 kHz and 2.05 kHz respectively, which are close to the resonant frequencies found by the analytical formulation of the gyroscope. The lumped equivalent circuit modeling technique proved to be a time efficient modeling technique for the analysis of complex MEMS devices like 3-DoF gyroscopes. The technique proves to be an alternative approach to the complex and time consuming couple field analysis Finite Element Analysis (FEA) previously used.

  13. Stability and non-standard finite difference method of the generalized Chua's circuit

    KAUST Repository

    Radwan, Ahmed G.; Moaddy, K.; Momani, Shaher M.

    2011-01-01

    In this paper, we develop a framework to obtain approximate numerical solutions of the fractional-order Chua's circuit with Memristor using a non-standard finite difference method. Chaotic response is obtained with fractional-order elements as well

  14. Experiment and CFD simulation of exhaust tube in highvoltage circuit breaker

    Directory of Open Access Journals (Sweden)

    Ye Xiangyang

    2018-01-01

    Full Text Available In a high-voltage circuit breaker, the exhaust tube connects the arc zone with the exhaust volume. During the arc interruption process, the exhaust tube transports the hot gas from the arc interruption zone to the exhaust volume through its distributed holes. The design of a high performance exhaust tube in the circuit breaker development aims for well controlled hot gas evacuation mass flow and pressure waves. In this paper, the exhaust tube behaviour is investigated using Computational Fluid Dynamics (CFD. To verify the CFD simulation, a basic experimental study with pressure measurements at different positions of the exhaust tube is performed. Further, the design parameters influencing the exhaust tube behaviour and circuit breaker performance are investigated and discussed.

  15. Modelling, simulating and optimizing boiler heating surfaces and evaporator circuits

    DEFF Research Database (Denmark)

    Sørensen, K.; Condra, T.; Houbak, Niels

    2003-01-01

    A model for optimizing the dynamic performance of boiler have been developed. Design variables related to the size of the boiler and its dynamic performance have been defined. The object function to be optimized takes the weight of the boiler and its dynamic capability into account. As constraints...... for the optimization a dynamic model for the boiler is applied. Furthermore a function for the value of the dynamic performance is included in the model. The dynamic models for simulating boiler performance consists of a model for the flue gas side, a model for the evaporator circuit and a model for the drum....... The dynamic model has been developed for the purpose of determining boiler material temperatures and heat transfer from the flue gas side to the water-/steam side in order to simulate the circulation in the evaporator circuit and hereby the water level fluctuations in the drum. The dynamic model has been...

  16. Factors influencing the renal arterial Doppler waveform: a simulation study using an electrical circuit model (secondary publication)

    Energy Technology Data Exchange (ETDEWEB)

    Sung, Chang Kyu [Dept. of Radiology, SMG-SNU Boramae Medical Center, Seoul National University College of Medicine, Seoul (Korea, Republic of); Han, Bong Soo [Dept. of Radiological Science, College of Health Science, Yonsei University, Wonju (Korea, Republic of); Kim, Seung Hyup [Dept. of Radiology, Institute of Radiation Medicine, Seoul National University Hospital, Seoul National University College of Medicine, Seoul (Korea, Republic of)

    2016-01-15

    The goal of this study was to evaluate the effect of vascular compliance, resistance, and pulse rate on the resistive index (RI) by using an electrical circuit model to simulate renal blood flow. In order to analyze the renal arterial Doppler waveform, we modeled the renal blood-flow circuit with an equivalent simple electrical circuit containing resistance, inductance, and capacitance. The relationships among the impedance, resistance, and compliance of the circuit were derived from well-known equations, including Kirchhoff’s current law for alternating current circuits. Simulated velocity-time profiles for pulsatile flow were generated using Mathematica (Wolfram Research) and the influence of resistance, compliance, and pulse rate on waveforms and the RI was evaluated. Resistance and compliance were found to alter the waveforms independently. The impedance of the circuit increased with increasing proximal compliance, proximal resistance, and distal resistance. The impedance decreased with increasing distal compliance. The RI of the circuit decreased with increasing proximal compliance and resistance. The RI increased with increasing distal compliance and resistance. No positive correlation between impedance and the RI was found. Pulse rate was found to be an extrinsic factor that also influenced the RI. This simulation study using an electrical circuit model led to a better understanding of the renal arterial Doppler waveform and the RI, which may be useful for interpreting Doppler findings in various clinical settings.

  17. Factors influencing the renal arterial Doppler waveform: a simulation study using an electrical circuit model (secondary publication)

    International Nuclear Information System (INIS)

    Sung, Chang Kyu; Han, Bong Soo; Kim, Seung Hyup

    2016-01-01

    The goal of this study was to evaluate the effect of vascular compliance, resistance, and pulse rate on the resistive index (RI) by using an electrical circuit model to simulate renal blood flow. In order to analyze the renal arterial Doppler waveform, we modeled the renal blood-flow circuit with an equivalent simple electrical circuit containing resistance, inductance, and capacitance. The relationships among the impedance, resistance, and compliance of the circuit were derived from well-known equations, including Kirchhoff’s current law for alternating current circuits. Simulated velocity-time profiles for pulsatile flow were generated using Mathematica (Wolfram Research) and the influence of resistance, compliance, and pulse rate on waveforms and the RI was evaluated. Resistance and compliance were found to alter the waveforms independently. The impedance of the circuit increased with increasing proximal compliance, proximal resistance, and distal resistance. The impedance decreased with increasing distal compliance. The RI of the circuit decreased with increasing proximal compliance and resistance. The RI increased with increasing distal compliance and resistance. No positive correlation between impedance and the RI was found. Pulse rate was found to be an extrinsic factor that also influenced the RI. This simulation study using an electrical circuit model led to a better understanding of the renal arterial Doppler waveform and the RI, which may be useful for interpreting Doppler findings in various clinical settings

  18. Frontiers in Planar Lightwave Circuit Technology Design, Simulation, and Fabrication

    CERN Document Server

    Janz, Siegfried; Tanev, Stoyan

    2005-01-01

    This book is the result of the NATO Advanced Research Workshop on Frontiers in Planar Lightwave Circuit Technology, which took place in Ottawa, Canada from September 21-25, 2004. Many of the world’s leading experts in integrated photonic design, theory and experiment were invited to give lectures in their fields of expertise, and participate in discussions on current research and applications, as well as the new directions planar lightwave circuit technology is evolving towards. The sum of their contributions to this book constitutes an excellent record of many key issues and scientific problems in planar lightwave circuit research at the time of writing. In this volume the reader will find detailed overviews of experimental and theoretical work in high index contrast waveguide systems, micro-optical resonators, nonlinear optics, and advanced optical simulation methods, as well as articles describing emerging applications of integrated optics for medical and biological applications.

  19. ASDTIC control and standardized interface circuits applied to buck, parallel and buck-boost dc to dc power converters

    Science.gov (United States)

    Schoenfeld, A. D.; Yu, Y.

    1973-01-01

    Versatile standardized pulse modulation nondissipatively regulated control signal processing circuits were applied to three most commonly used dc to dc power converter configurations: (1) the series switching buck-regulator, (2) the pulse modulated parallel inverter, and (3) the buck-boost converter. The unique control concept and the commonality of control functions for all switching regulators have resulted in improved static and dynamic performance and control circuit standardization. New power-circuit technology was also applied to enhance reliability and to achieve optimum weight and efficiency.

  20. Simulation Analysis of DC and Switching Impulse Superposition Circuit

    Science.gov (United States)

    Zhang, Chenmeng; Xie, Shijun; Zhang, Yu; Mao, Yuxiang

    2018-03-01

    Surge capacitors running between the natural bus and the ground are affected by DC and impulse superposition voltage during operation in the converter station. This paper analyses the simulation aging circuit of surge capacitors by PSCAD electromagnetic transient simulation software. This paper also analyses the effect of the DC voltage to the waveform of the impulse voltage generation. The effect of coupling capacitor to the test voltage waveform is also studied. Testing results prove that the DC voltage has little effect on the waveform of the output of the surge voltage generator, and the value of the coupling capacitor has little effect on the voltage waveform of the sample. Simulation results show that surge capacitor DC and impulse superimposed aging test is feasible.

  1. Integrated Design Validation: Combining Simulation and Formal Verification for Digital Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Lun Li

    2006-04-01

    Full Text Available The correct design of complex hardware continues to challenge engineers. Bugs in a design that are not uncovered in early design stages can be extremely expensive. Simulation is a predominantly used tool to validate a design in industry. Formal verification overcomes the weakness of exhaustive simulation by applying mathematical methodologies to validate a design. The work described here focuses upon a technique that integrates the best characteristics of both simulation and formal verification methods to provide an effective design validation tool, referred as Integrated Design Validation (IDV. The novelty in this approach consists of three components, circuit complexity analysis, partitioning based on design hierarchy, and coverage analysis. The circuit complexity analyzer and partitioning decompose a large design into sub-components and feed sub-components to different verification and/or simulation tools based upon known existing strengths of modern verification and simulation tools. The coverage analysis unit computes the coverage of design validation and improves the coverage by further partitioning. Various simulation and verification tools comprising IDV are evaluated and an example is used to illustrate the overall validation process. The overall process successfully validates the example to a high coverage rate within a short time. The experimental result shows that our approach is a very promising design validation method.

  2. Simulation of a processor switching circuit with APLSV

    International Nuclear Information System (INIS)

    Dilcher, H.

    1979-01-01

    The report describes the simulation of a processor switching circuit with APL. Furthermore an APL function is represented to simulate a processor in an assembly like language. Both together serve as a tool for studying processor properties. By means of the programming function it is also possible to program other simulated processors. The processor is to be used in the processing of data in real time analysis that occur in high energy physics experiments. The data are already offered to the computer in digitalized form. A typical data rate is at 10 KB/ sec. The data are structured in blocks. The particular blocks are 1 KB wide and are independent from each other. Aprocessor has to decide, whether the block data belong to an event that is part of the backround noise and can therefore be forgotten, or whether the data should be saved for a later evaluation. (orig./WB) [de

  3. The application of standardized control and interface circuits to three dc to dc power converters.

    Science.gov (United States)

    Yu, Y.; Biess, J. J.; Schoenfeld, A. D.; Lalli, V. R.

    1973-01-01

    Standardized control and interface circuits were applied to the three most commonly used dc to dc converters: the buck-boost converter, the series-switching buck regulator, and the pulse-modulated parallel inverter. The two-loop ASDTIC regulation control concept was implemented by using a common analog control signal processor and a novel digital control signal processor. This resulted in control circuit standardization and superior static and dynamic performance of the three dc-to-dc converters. Power components stress control, through active peak current limiting and recovery of switching losses, was applied to enhance reliability and converter efficiency.

  4. Equivalent circuit and characteristic simulation of a brushless electrically excited synchronous wind power generator

    Science.gov (United States)

    Wang, Hao; Zhang, Fengge; Guan, Tao; Yu, Siyang

    2017-09-01

    A brushless electrically excited synchronous generator (BEESG) with a hybrid rotor is a novel electrically excited synchronous generator. The BEESG proposed in this paper is composed of a conventional stator with two different sets of windings with different pole numbers, and a hybrid rotor with powerful coupling capacity. The pole number of the rotor is different from those of the stator windings. Thus, an analysis method different from that applied to conventional generators should be applied to the BEESG. In view of this problem, the equivalent circuit and electromagnetic torque expression of the BEESG are derived on the basis of electromagnetic relation of the proposed generator. The generator is simulated and tested experimentally using the established equivalent circuit model. The experimental and simulation data are then analyzed and compared. Results show the validity of the equivalent circuit model.

  5. Active component modeling for analog integrated circuit design. Model parametrization and implementation in the SPICE-PAC circuit simulator

    International Nuclear Information System (INIS)

    Marchal, Xavier

    1992-01-01

    In order to use CAD efficiently in the analysis and design of electronic Integrated circuits, adequate modeling of active non-linear devices such as MOSFET transistors must be available to the designer. Many mathematical forms can be given to those models, such as explicit relations, or implicit equations to be solved. A major requirement in developing MOS transistor models for IC simulation is the availability of electrical characteristic curves over a wide range of channel width and length, including the sub-micrometer range. To account in a convenient way for bulk charge influence on I_D_S = f(V_D_S, V_G_S, v_B_S) device characteristics, all 3 standard SPICE MOS models use an empirical fitting parameter called the 'charge sharing factor'. Unfortunately, this formulation produces models which only describe correctly either some of the short channel phenomena, or some particular operating conditions (low injection, avalanche effect, etc.). We present here a cellular model (CDM = Charge Distributed Model) implemented in the open modular SPICE-PAC Simulator; this model is derived from the 4-terminal WANG charge controlled MOSFET model, using the charge sheet approximation. The CDM model describes device characteristics in ail operating regions without introducing drain current discontinuities and without requiring a 'charge sharing factor'. A usual problem to be faced by designers when they simulate MOS ICs is to find a reliable source of model parameters. Though most models have a physical basis, some of their parameters cannot be easily estimated from physical considerations. It can also happen that physically determined parameters values do not produce a good fit to measured device characteristics. Thus it is generally necessary to extract model parameters from measured transistor data, to ensure that model equations approximate measured curves accurately enough. Model parameters extraction can be done in 2 different ways, exposed in this thesis. The first

  6. Simulation and experimental study on lithium ion battery short circuit

    International Nuclear Information System (INIS)

    Zhao, Rui; Liu, Jie; Gu, Junjie

    2016-01-01

    Highlights: • Both external and internal short circuit tests were performed on Li-ion batteries. • An electrochemical–thermal model with an additional nail site heat source is presented. • The model can accurately simulate the temperature variations of non-venting batteries. • The model is reliable in predicting the occurrence and start time of thermal runaway. • A hydrogel cooling system proves its strength in preventing battery thermal runaway. - Abstract: Safety is the first priority in lithium ion (Li-ion) battery applications. A large portion of electrical and thermal hazards caused by Li-ion battery is associated with short circuit. In this paper, both external and internal short circuit tests are conducted. Li-ion batteries and battery packs of different capacities are used. The results indicate that external short circuit is worse for smaller size batteries due to their higher internal resistances, and this type of short can be well managed by assembling fuses. In internal short circuit tests, higher chance of failure is found on larger capacity batteries. A modified electrochemical–thermal model is proposed, which incorporates an additional heat source from nail site and proves to be successful in depicting temperature changes in batteries. Specifically, the model is able to estimate the occurrence and approximate start time of thermal runaway. Furthermore, the effectiveness of a hydrogel based thermal management system in suppressing thermal abuse and preventing thermal runaway propagation is verified through the external and internal short tests on batteries and battery packs.

  7. Simulation of the Mineração Serra Grande Industrial Grinding Circuit

    Directory of Open Access Journals (Sweden)

    Thiago Oliveira Nunan

    Full Text Available Abstract Increasing throughput during the mining cycle operation frequently generates significant capital gains for a company. However, it is necessary to evaluate plant capacity and expand it for obtaining the required throughput increase. Therefore, studies including different scenarios, installation of new equipment and/or optimization of existing ones are required. This study describes the sampling methodology, sample characterization, modeling and simulation of Mineração Serra Grande industrial grinding circuit, an AngloGold Ashanti company, located in Crixás, State of Goiás, Brazil. The studied scenarios were: (1 adding a third ball mill in series with existing two ball mills, (2 adding a third ball mill in parallel with existing mills, (3 adding a vertical mill in series with existing mills and (4 adding high pressure grinding rolls to existing mills. The four simulations were carried out for designing the respective circuit, assessing the interference with existing equipment and installations, as well as comparing the energy consumption among the selected expansion alternatives. Apart from the HPGR alternative, all other three simulations resulted in the required P80 and capacity. Among the three selected simulations, the Vertimill alternative showed the smallest installed power.

  8. Electronic circuits, systems and standards the best of EDN

    CERN Document Server

    Hickman, Ian

    2013-01-01

    Electronic Circuits, Systems and Standards: The Best of EDN is a collection of 66 EDN articles. The topics covered in this collection are diverse but all are relevant to controlled circulation electronics. The coverage of the text includes topics about software and algorithms, such as simple random number algorithm; simple log algorithm; and efficient algorithm for repeated FFTs. The book also tackles measurement related topics, including test for identifying a Gaussian noise source; enhancing product reliability; and amplitude-locked loop speeds filter test. The text will be useful to student

  9. Semiconductor device models for circuit simulation power electronics; Modeles de composants semiconducteurs pour la simulation des circuits en electronique de puissance

    Energy Technology Data Exchange (ETDEWEB)

    Berraies, M.O.

    1998-09-10

    In this thesis, an alternative strategy based on a regional approach to modeling and a new partition of the model library in the simulation is proposed. The main objective is to substitute for the usual concept of `one device, on model` that of an adaptable assembly of a limited number of submodels associated with well-identified regions of semiconductor structures. In other words, the library will only contain the primitive building-blocks of the power device models. This strategy guarantees the compatibility of the various semiconductor models in terms of physical concepts, validity domain, accuracy, homogeneity of parameter identification procedures, similarly of implementation in the simulator. This approach has been applied to PIN diodes and IGBTs for experimental validation. The next step consisted on the simulation of circuit involving several interacting devices. A simple IGBT/PIN diode chopper cell has been chosen. The results obtained compare well with experiment. This demonstrates the consistency of the proposed approach. (author) 43 refs.

  10. Circuit models and SPICE macro-models for quantum Hall effect devices

    International Nuclear Information System (INIS)

    Ortolano, Massimo; Callegaro, Luca

    2015-01-01

    Precise electrical measurement technology based on the quantum Hall effect is one of the pillars of modern quantum electrical metrology. Electrical networks including one or more QHE elements can be used as quantum resistance and impedance standards. The analysis of these networks allows metrologists to evaluate the effect of the inevitable parasitic parameters on their performance as standards. This paper presents a concise review of the various circuit models for QHE elements proposed in the literature, and the development of a new model. This last model is particularly suited to be employed with the analogue electronic circuit simulator SPICE. The SPICE macro-model and examples of SPICE simulations, validated by comparison with the corresponding analytical solution and/or experimental data, are provided. (paper)

  11. State-of-the-art assessment of testing and testability of custom LSI/VLSI circuits. Volume 8: Fault simulation

    Science.gov (United States)

    Breuer, M. A.; Carlan, A. J.

    1982-10-01

    Fault simulation is widely used by industry in such applications as scoring the fault coverage of test sequences and construction of fault dictionaries. For use in testing VLSI circuits a simulator is evaluated by its accuracy, i.e., modelling capability. To be accurate simulators must employ multi-valued logic in order to represent unknown signal values, impedance, signal transitions, etc., circuit delays such as transport rise/fall, inertial, and the fault modes it is capable of handling. Of the three basic fault simulators now in use (parallel, deductive and concurrent) concurrent fault simulation appears most promising.

  12. Back End of Line Nanorelays for Ultra-low Power Monolithic Integrated NEMS-CMOS Circuits

    KAUST Repository

    Lechuga Aranda, Jesus Javier

    2016-05-01

    Since the introduction of Complementary-Metal-Oxide-Semiconductor (CMOS) technology, the chip industry has enjoyed many benefits of transistor feature size scaling, including higher speed and device density and improved energy efficiency. However, in the recent years, the IC designers have encountered a few roadblocks, namely reaching the physical limits of scaling and also increased device leakage which has resulted in a slow-down of supply voltage and power density scaling. Therefore, there has been an extensive hunt for alternative circuit architectures and switching devices that can alleviate or eliminate the current crisis in the semiconductor industry. The Nano-Electro-Mechanical (NEM) relay is a promising alternative switch that offers zero leakage and abrupt turn-on behaviour. Even though these devices are intrinsically slower than CMOS transistors, new circuit design techniques tailored for the electromechanical properties of such devices can be leveraged to design medium performance, ultra-low power integrated circuits. In this thesis, we deal with a new generation of such devices that is built in the back end of line (BEOL) CMOS process and is an ideal option for full integration with current CMOS transistor technology. Simulation and verification at the circuit and system level is a critical step in the design flow of microelectronic circuits, and this is especially important for new technologies that lack the standard design infrastructure and well-known verification platforms. Although most of the physical and electrical properties of NEM structures can be simulated using standard electronic automation software, there is no report of a reliable behavioural model for NEMS switches that enable large circuit simulations. In this work, we present an optimised model of a BEOL nano relay that encompasses all the electromechanical characteristics of the device and is robust and lightweight enough for VLSI applications that require simulation of thousands of

  13. Standard high-reliability integrated circuit logic packaging. [for deep space tracking stations

    Science.gov (United States)

    Slaughter, D. W.

    1977-01-01

    A family of standard, high-reliability hardware used for packaging digital integrated circuits is described. The design transition from early prototypes to production hardware is covered and future plans are discussed. Interconnections techniques are described as well as connectors and related hardware available at both the microcircuit packaging and main-frame level. General applications information is also provided.

  14. Passive notch circuit for pulsed-off compression fields

    International Nuclear Information System (INIS)

    Nunnally, W.C.

    1976-06-01

    The operation and simulated results of a passive notch circuit used to pulse off the field in a multiturn, fusion-power system, compression coil are presented. The notch circuit permits initial plasma preparation at field zero, adiabatic compression as the field returns to its initial value, and long field decay time for plasma confinement. The major advantages and disadvantages of the notch circuit are compared with those of a standard capacitor power supply system. The major advantages are that: (1) slow-rising fields can be used for adiabatic compression, (2) solid-state switches can be used because of the inherent current and voltage waveforms, and (3) long field decay times are easier to attain than with single-turn coils

  15. Simulation of the dynamic behaviour of the secondary circuit of a WWER-440 type nuclear power plant Pt. 2

    International Nuclear Information System (INIS)

    Doorenbos, J.; Gacs, A.; Kiss, Zs.

    1987-12-01

    This report describes the dynamic simulation models of the most important controllers of the secondary circuit of a WWER-440 type nuclear power plant, i.e., the hydraulic turbine controller and the level controls of the condenser hotwell and that of the feedwater tank. Simulation results are also presented. (For dynamic simulation models of the primary circuit of WWER-440 type reactors see Reports KFKI--1983-127 and KFKI--1985-08.) (author) 15 figs

  16. Hidden attractors in dynamical models of phase-locked loop circuits: Limitations of simulation in MATLAB and SPICE

    Science.gov (United States)

    Kuznetsov, N. V.; Leonov, G. A.; Yuldashev, M. V.; Yuldashev, R. V.

    2017-10-01

    During recent years it has been shown that hidden oscillations, whose basin of attraction does not overlap with small neighborhoods of equilibria, may significantly complicate simulation of dynamical models, lead to unreliable results and wrong conclusions, and cause serious damage in drilling systems, aircrafts control systems, electromechanical systems, and other applications. This article provides a survey of various phase-locked loop based circuits (used in satellite navigation systems, optical, and digital communication), where such difficulties take place in MATLAB and SPICE. Considered examples can be used for testing other phase-locked loop based circuits and simulation tools, and motivate the development and application of rigorous analytical methods for the global analysis of phase-locked loop based circuits.

  17. Simulation of high SNR photodetector with L-C coupling and transimpedance amplifier circuit and its verification

    Science.gov (United States)

    Wang, Shaofeng; Xiang, Xiao; Zhou, Conghua; Zhai, Yiwei; Quan, Runai; Wang, Mengmeng; Hou, Feiyan; Zhang, Shougang; Dong, Ruifang; Liu, Tao

    2017-01-01

    In this paper, a model for simulating the optical response and noise performances of photodetectors with L-C coupling and transimpedance amplification circuit is presented. To verify the simulation, two kinds of photodetectors, which are based on the same printed-circuit-board (PCB) designing and PIN photodiode but different operational amplifiers, are developed and experimentally investigated. Through the comparisons between the numerical simulation results and the experimentally obtained data, excellent agreements are achieved, which show that the model provides a highly efficient guide for the development of a high signal to noise ratio photodetector. Furthermore, the parasite capacitances on the developed PCB, which are always hardly measured but play a non-negligible influence on the photodetectors' performances, are estimated.

  18. Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits

    Directory of Open Access Journals (Sweden)

    Shikha Panwar

    2014-01-01

    Full Text Available This paper presents several high performance and low power techniques for CMOS circuits. In these design methodologies, drain gating technique and its variations are modified by adding an additional NMOS sleep transistor at the output node which helps in faster discharge and thereby providing higher speed. In order to achieve high performance, the proposed design techniques trade power for performance in the delay critical sections of the circuit. Intensive simulations are performed using Cadence Virtuoso in a 45 nm standard CMOS technology at room temperature with supply voltage of 1.2 V. Comparative analysis of the present circuits with standard CMOS circuits shows smaller propagation delay and lesser power consumption.

  19. A novel double-convection chaotic attractor, its adaptive control and circuit simulation

    Science.gov (United States)

    Mamat, M.; Vaidyanathan, S.; Sambas, A.; Mujiarto; Sanjaya, W. S. M.; Subiyanto

    2018-03-01

    A 3-D novel double-convection chaotic system with three nonlinearities is proposed in this research work. The dynamical properties of the new chaotic system are described in terms of phase portraits, Lyapunov exponents, Kaplan-Yorke dimension, dissipativity, stability analysis of equilibria, etc. Adaptive control and synchronization of the new chaotic system with unknown parameters are achieved via nonlinear controllers and the results are established using Lyapunov stability theory. Furthermore, an electronic circuit realization of the new 3-D novel chaotic system is presented in detail. Finally, the circuit experimental results of the 3-D novel chaotic attractor show agreement with the numerical simulations.

  20. Modeling and simulation of equivalent circuits in description of biological systems - a fractional calculus approach

    Directory of Open Access Journals (Sweden)

    José Francisco Gómez Aguilar

    2012-07-01

    Full Text Available Using the fractional calculus approach, we present the Laplace analysis of an equivalent electrical circuit for a multilayered system, which includes distributed elements of the Cole model type. The Bode graphs are obtained from the numerical simulation of the corresponding transfer functions using arbitrary electrical parameters in order to illustrate the methodology. A numerical Laplace transform is used with respect to the simulation of the fractional differential equations. From the results shown in the analysis, we obtain the formula for the equivalent electrical circuit of a simple spectrum, such as that generated by a real sample of blood tissue, and the corresponding Nyquist diagrams. In addition to maintaining consistency in adjusted electrical parameters, the advantage of using fractional differential equations in the study of the impedance spectra is made clear in the analysis used to determine a compact formula for the equivalent electrical circuit, which includes the Cole model and a simple RC model as special cases.

  1. Numerical simulation for arc-plasma dynamics during contact opening process in electrical circuit-breakers

    International Nuclear Information System (INIS)

    Gupta, D N; Srinivas, D; Patil, G N; Kale, S S; Potnis, S B

    2010-01-01

    The high-energy, high-current thermal plasma that develops between electric contacts in a gas circuit-breaker during circuit interruption is an important phenomenon in the power transmission industry. The high temperature and pressure arc dissipates the tremendous amount of energy generated by the fault current. Simultaneously, this energy has to be transferred away from the contacts to build the dielectric strength level of the circuit-breaker. In order to interrupt the current, the arc must be weakened and finally extinguished. We model these phenomena by using a computer software code based on the solution of the unsteady Euler equations of gas dynamics. We consider the equations of fluid flows. These equations are solved numerically in complex circuit breaker geometries using a finite-volume method. The domain is initially filled with SF 6 gas. We begin our simulations from cold mode, where the fault current is not present (hence no arc). An axis-symmetric geometry of a 145 kV gas circuit-breaker is considered to study the pressure, density, and temperature profile during contact opening process.

  2. Active component modeling for analog integrated circuit design. Model parametrization and implementation in the SPICE-PAC circuit simulator; Modelisation de composants actifs pour la CAO de circuits integres analogiques. Parametrage et implantation de modeles dans le simulateur SPICE-PAC

    Energy Technology Data Exchange (ETDEWEB)

    Marchal, Xavier

    1992-06-19

    In order to use CAD efficiently in the analysis and design of electronic Integrated circuits, adequate modeling of active non-linear devices such as MOSFET transistors must be available to the designer. Many mathematical forms can be given to those models, such as explicit relations, or implicit equations to be solved. A major requirement in developing MOS transistor models for IC simulation is the availability of electrical characteristic curves over a wide range of channel width and length, including the sub-micrometer range. To account in a convenient way for bulk charge influence on I{sub DS} = f(V{sub DS}, V{sub GS}, v{sub BS}) device characteristics, all 3 standard SPICE MOS models use an empirical fitting parameter called the 'charge sharing factor'. Unfortunately, this formulation produces models which only describe correctly either some of the short channel phenomena, or some particular operating conditions (low injection, avalanche effect, etc.). We present here a cellular model (CDM = Charge Distributed Model) implemented in the open modular SPICE-PAC Simulator; this model is derived from the 4-terminal WANG charge controlled MOSFET model, using the charge sheet approximation. The CDM model describes device characteristics in ail operating regions without introducing drain current discontinuities and without requiring a 'charge sharing factor'. A usual problem to be faced by designers when they simulate MOS ICs is to find a reliable source of model parameters. Though most models have a physical basis, some of their parameters cannot be easily estimated from physical considerations. It can also happen that physically determined parameters values do not produce a good fit to measured device characteristics. Thus it is generally necessary to extract model parameters from measured transistor data, to ensure that model equations approximate measured curves accurately enough. Model parameters extraction can be done in 2 different ways, exposed in this thesis

  3. Application of Circuit Simulation Method for Differential Modeling of TIM-2 Iron Uptake and Metabolism in Mouse Kidney Cells

    Directory of Open Access Journals (Sweden)

    Zhijian eXie

    2013-06-01

    Full Text Available Circuit simulation is a powerful methodology to generate differential mathematical models. Due to its highly accurate modelling capability, circuit simulation can be used to investigate interactions between the parts and processes of a cellular system. Circuit simulation has become a core technology for the field of electrical engineering, but its application in biology has not yet been fully realized. As a case study for evaluating the more advanced features of a circuit simulation tool called Advanced Design System (ADS, we collected and modeled laboratory data for iron metabolism in mouse kidney cells for a H ferritin (HFt receptor, T cell immunoglobulin and mucin domain-2 (TIM-2. The internal controlling parameters of TIM-2 associated iron metabolism were extracted and the ratios of iron movement among cellular compartments were quantified by ADS. The differential model processed by circuit simulation demonstrated a capability to identify variables and predict outcomes that could not be readily measured by in vitro experiments. For example, an initial rate of uptake of iron-loaded HFt was 2.17 pmol per million cells. TIM-2 binding probability with iron-loaded HFt was 16.6%. An average of 8.5 minutes was required for the complex of TIM-2 and iron-loaded HFt to form an endosome. The endosome containing HFt lasted roughly 2 hours. At the end of endocytosis, about 28% HFt remained intact and the rest was degraded. Iron released from degraded HFt was in the labile iron pool (LIP and stimulated the generation of endogenous HFt for new storage. Both experimental data and the model showed that TIM-2 was not involved in the process of iron export. The extracted internal controlling parameters successfully captured the complexity of TIM-2 pathway and the use of circuit simulation-based modeling across a wider range of cellular systems is the next step for validating the significance and utility of this method.

  4. Report on research achievements in fiscal 1999 on development of simulation technology related to behavior of LSI circuit (re-commissioned portion); 1999 nendo LSI kairo no kyodo ni kansuru simulation gijutsu kaihatsu seika hokokusho (saiitakubun)

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2001-03-01

    Development has been advanced on a new circuit design technology, in which the present digital circuit design performed according to the intensive circuit theory that regards reception and transmission of signals as migration of electrons is carried out by a new circuit theory centering on the intensive system (Quasi static closed circuit, QSCC) that regards reception and transmission of signals as propagation of wave motions. Studies required for structuring the QSCC theory were performed, such as verification of the reliability and effectiveness of the QSCC theory by means of the electro-magnetic field-circuit simulation and experiments and improvement of their completeness, development of the electro-magnetic field simulation technology required for the QSCC theory structuring, and development of a simple type design system based on the QSCC theory and a simple simulator for design verification. Specifically, the research and development on the eight items were carried out, including: 1) analysis of the generation and propagation mechanisms of electro-magnetic waves including those from LSI to circuit substrates, 2) analysis of electro-magnetic details of signals and power supply circuits including those from LSI to circuit substrates, 3) preparation of a library including the items from LSI to circuit substrates, and 4) development of a simulation technology including those from LSI to circuit substrates (QSCC designer). (NEDO)

  5. Single-flux-quantum logic circuits exploiting collision-based fusion gates

    International Nuclear Information System (INIS)

    Asai, T.; Yamada, K.; Amemiya, Y.

    2008-01-01

    We propose a single-flux-quantum (SFQ) logic circuit based on the fusion computing systems--collision-based and reaction-diffusion fusion computers. A fusion computing system consists of regularly arrayed unit cells (fusion gates), where each unit has two input arms and two output arms and is connected to its neighboring cells with the arms. We designed functional SFQ circuits that implemented the fusion computation. The unit cell was able to be made with ten Josephson junctions. Circuit simulation with standard Nb/Al-AlOx/Nb 2.5-kA/cm 2 process parameters showed that the SFQ fusion computing systems could operate at 10 GHz clock

  6. Simulated annealing method for electronic circuits design: adaptation and comparison with other optimization methods

    International Nuclear Information System (INIS)

    Berthiau, G.

    1995-10-01

    The circuit design problem consists in determining acceptable parameter values (resistors, capacitors, transistors geometries ...) which allow the circuit to meet various user given operational criteria (DC consumption, AC bandwidth, transient times ...). This task is equivalent to a multidimensional and/or multi objective optimization problem: n-variables functions have to be minimized in an hyper-rectangular domain ; equality constraints can be eventually specified. A similar problem consists in fitting component models. In this way, the optimization variables are the model parameters and one aims at minimizing a cost function built on the error between the model response and the data measured on the component. The chosen optimization method for this kind of problem is the simulated annealing method. This method, provided by the combinatorial optimization domain, has been adapted and compared with other global optimization methods for the continuous variables problems. An efficient strategy of variables discretization and a set of complementary stopping criteria have been proposed. The different parameters of the method have been adjusted with analytical functions of which minima are known, classically used in the literature. Our simulated annealing algorithm has been coupled with an open electrical simulator SPICE-PAC of which the modular structure allows the chaining of simulations required by the circuit optimization process. We proposed, for high-dimensional problems, a partitioning technique which ensures proportionality between CPU-time and variables number. To compare our method with others, we have adapted three other methods coming from combinatorial optimization domain - the threshold method, a genetic algorithm and the Tabu search method - The tests have been performed on the same set of test functions and the results allow a first comparison between these methods applied to continuous optimization variables. Finally, our simulated annealing program

  7. Photonic circuit for high order USB and LSB separation for remote heterodyning: analysis and simulation.

    Science.gov (United States)

    Hasan, Mehedi; Hall, Trevor J

    2015-09-21

    A novel photonic integrated circuit is proposed that, using an RF source, generates at its output ports the same magnitude but opposite sign high order single optical side bands of a suppressed optical carrier. A single stage parallel Mach-Zehnder Modulator (MZM) and a two-stage series parallel MZM architecture are described and their relative merits discussed. A transfer matrix method is used to describe the operation of the circuits. The theoretical analysis is validated by computer simulation. As an illustration of a prospective application, it is shown how the circuit may be used as a key element of an optical transmission system to transport radio signals over fibre for wireless access; generating remotely a mm-wave carrier modulated by digital IQ data. A detailed calculation of symbol error rate is presented to characterise the system performance. The circuit may be fabricated in any integration platform offering a suitable phase modulator circuit element such as LiNbO(3), Silicon, and III-V or hybrid technology.

  8. Macromodels of digital integrated circuits for program packages of circuit engineering design

    Science.gov (United States)

    Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

    1984-04-01

    Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

  9. Synthesis and Analysis of a Quaternary Static RAM Using Quantizing Circuits

    Science.gov (United States)

    Syuto, Makoto; Magata, Hiroshi; Tanno, Koichi; Ishizuka, Okihiko

    1999-09-01

    In this paper, a voltage mode multiple valued static random access memory (MVSRAM) with a multiple valued quantizer is described. The proposed circuit has the merits of simplicity and low cost on fabrication, since it is implemented by standard CMOs process, instead of the conventional multi-level ion implantation usually applied in the voltage-mode multi-valued logic (MVL) circuit. The performance of the proposed MVSRAM is estimated by HSPICE simulations with MOSIS 2.0 microns CMOs process parameter.

  10. An novel frequent probability pattern mining algorithm based on circuit simulation method in uncertain biological networks

    Science.gov (United States)

    2014-01-01

    Background Motif mining has always been a hot research topic in bioinformatics. Most of current research on biological networks focuses on exact motif mining. However, due to the inevitable experimental error and noisy data, biological network data represented as the probability model could better reflect the authenticity and biological significance, therefore, it is more biological meaningful to discover probability motif in uncertain biological networks. One of the key steps in probability motif mining is frequent pattern discovery which is usually based on the possible world model having a relatively high computational complexity. Methods In this paper, we present a novel method for detecting frequent probability patterns based on circuit simulation in the uncertain biological networks. First, the partition based efficient search is applied to the non-tree like subgraph mining where the probability of occurrence in random networks is small. Then, an algorithm of probability isomorphic based on circuit simulation is proposed. The probability isomorphic combines the analysis of circuit topology structure with related physical properties of voltage in order to evaluate the probability isomorphism between probability subgraphs. The circuit simulation based probability isomorphic can avoid using traditional possible world model. Finally, based on the algorithm of probability subgraph isomorphism, two-step hierarchical clustering method is used to cluster subgraphs, and discover frequent probability patterns from the clusters. Results The experiment results on data sets of the Protein-Protein Interaction (PPI) networks and the transcriptional regulatory networks of E. coli and S. cerevisiae show that the proposed method can efficiently discover the frequent probability subgraphs. The discovered subgraphs in our study contain all probability motifs reported in the experiments published in other related papers. Conclusions The algorithm of probability graph isomorphism

  11. Simulation of a spiking neuron circuit using carbon nanotube transistors

    Energy Technology Data Exchange (ETDEWEB)

    Najari, Montassar, E-mail: malnjar@jazanu.edu.sa [Departement of Physics, Faculty of Sciences, University of Gabes, Gabes (Tunisia); IKCE unit, Jazan University, Jazan (Saudi Arabia); El-Grour, Tarek, E-mail: grour-tarek@hotmail.fr [Departement of Physics, Faculty of Sciences, University of Gabes, Gabes (Tunisia); Jelliti, Sami, E-mail: sjelliti@jazanu.edu.sa [IKCE unit, Jazan University, Jazan (Saudi Arabia); Hakami, Othman Mousa, E-mail: omhakami@jazanu.edu.sa [IKCE unit, Jazan University, Jazan (Saudi Arabia); Faculty of Sciences, Jazan University, Jazan (Saudi Arabia)

    2016-06-10

    Neuromorphic engineering is related to the existing analogies between the physical semiconductor VLSI (Very Large Scale Integration) and biophysics. Neuromorphic systems propose to reproduce the structure and function of biological neural systems for transferring their calculation capacity on silicon. Since the innovative research of Carver Mead, the neuromorphic engineering continues to emerge remarkable implementation of biological system. This work presents a simulation of an elementary neuron cell with a carbon nanotube transistor (CNTFET) based technology. The model of the cell neuron which was simulated is called integrate and fire (I&F) model firstly introduced by G. Indiveri in 2009. This circuit has been simulated with CNTFET technology using ADS environment to verify the neuromorphic activities in terms of membrane potential. This work has demonstrated the efficiency of this emergent device; i.e CNTFET on the design of such architecture in terms of power consumption and technology integration density.

  12. Simulation of a spiking neuron circuit using carbon nanotube transistors

    International Nuclear Information System (INIS)

    Najari, Montassar; El-Grour, Tarek; Jelliti, Sami; Hakami, Othman Mousa

    2016-01-01

    Neuromorphic engineering is related to the existing analogies between the physical semiconductor VLSI (Very Large Scale Integration) and biophysics. Neuromorphic systems propose to reproduce the structure and function of biological neural systems for transferring their calculation capacity on silicon. Since the innovative research of Carver Mead, the neuromorphic engineering continues to emerge remarkable implementation of biological system. This work presents a simulation of an elementary neuron cell with a carbon nanotube transistor (CNTFET) based technology. The model of the cell neuron which was simulated is called integrate and fire (I&F) model firstly introduced by G. Indiveri in 2009. This circuit has been simulated with CNTFET technology using ADS environment to verify the neuromorphic activities in terms of membrane potential. This work has demonstrated the efficiency of this emergent device; i.e CNTFET on the design of such architecture in terms of power consumption and technology integration density.

  13. TRANP - a computer code for digital simulation of steady - state and transient behavior of a pressurizer water reactor primary circuit

    International Nuclear Information System (INIS)

    Chalhoub, E.S.

    1980-09-01

    A digital computer code TRANP was developed to simulate the steady-state and transient behavior of a pressurizer water reactor primary circuit. The development of this code was based on the combining of three codes already developed for the simulation of a PWR core, a pressurizer, a steam generator and a main coolant pump, representing the primary circuit components. (Author) [pt

  14. Total dose and dose rate models for bipolar transistors in circuit simulation.

    Energy Technology Data Exchange (ETDEWEB)

    Campbell, Phillip Montgomery; Wix, Steven D.

    2013-05-01

    The objective of this work is to develop a model for total dose effects in bipolar junction transistors for use in circuit simulation. The components of the model are an electrical model of device performance that includes the effects of trapped charge on device behavior, and a model that calculates the trapped charge densities in a specific device structure as a function of radiation dose and dose rate. Simulations based on this model are found to agree well with measurements on a number of devices for which data are available.

  15. Cosimulation of electromagnetics-circuit systems exploiting DGTD and MNA

    KAUST Repository

    Li, Ping

    2014-06-01

    A hybrid electromagnetics (EM)-circuit simulator exploiting the discontinuous Galerkin time domain (DGTD) method and the modified nodal analysis (MNA) algorithm is developed for analyzing hybrid distributive and nonlinear multiport lumped circuit systems. The computational domain is split into two subsystems. One is the EM subsystem that is analyzed by DGTD, while the other is the circuit subsystem that is solved by the MNA method. The coupling between the EM and circuit subsystems is enforced at the lumped port where related field and circuit unknowns are coupled via the use of numerical flux, port voltages, and current sources. Since the spatial operations of DGTD are localized, thanks to the use of numerical flux, coupling matrices between EM and circuit subsystems are small and are directly inverted. To handle nonlinear devices within the circuit subsystem, the standard Newton-Raphson method is applied to the nonlinear coupling matrix system. In addition, a local time-stepping scheme is applied to improve the efficiency of the hybrid solver. Numerical examples including single and multiport linear/nonlinear circuit networks are presented to validate the proposed solver. © 2014 IEEE.

  16. Flexible Simulation E-Learning Environment for Studying Digital Circuits and Possibilities for It Deployment as Semantic Web Service

    Science.gov (United States)

    Radoyska, P.; Ivanova, T.; Spasova, N.

    2011-01-01

    In this article we present a partially realized project for building a distributed learning environment for studying digital circuits Test and Diagnostics at TU-Sofia. We describe the main requirements for this environment, substantiate the developer platform choice, and present our simulation and circuit parameter calculation tools.…

  17. Understanding the Pathophysiology of Portosystemic Shunt by Simulation Using an Electric Circuit.

    Science.gov (United States)

    Kim, Moonhwan; Lee, Keon-Young

    2016-01-01

    Portosystemic shunt (PSS) without a definable cause is a rare condition, and most of the studies on this topic are small series or based on case reports. Moreover, no firm agreement has been reached on the definition and classification of various forms of PSS, which makes it difficult to compare and analyze the management. The blood flow can be seen very similar to an electric current, governed by Ohm's law. The simulation of PSS using an electric circuit, combined with the interpretation of reported management results, can provide intuitive insights into the underlying mechanism of PSS development. In this article, we have built a model of PSS using electric circuit symbols and explained clinical manifestations as well as the possible mechanisms underlying a PSS formation.

  18. Circuit analysis with Multisim

    CERN Document Server

    Baez-Lopez, David

    2011-01-01

    This book is concerned with circuit simulation using National Instruments Multisim. It focuses on the use and comprehension of the working techniques for electrical and electronic circuit simulation. The first chapters are devoted to basic circuit analysis.It starts by describing in detail how to perform a DC analysis using only resistors and independent and controlled sources. Then, it introduces capacitors and inductors to make a transient analysis. In the case of transient analysis, it is possible to have an initial condition either in the capacitor voltage or in the inductor current, or bo

  19. Neuromorphic Implementation of Attractor Dynamics in a Two-Variable Winner-Take-All Circuit with NMDARs: A Simulation Study.

    Science.gov (United States)

    You, Hongzhi; Wang, Da-Hui

    2017-01-01

    Neural networks configured with winner-take-all (WTA) competition and N-methyl-D-aspartate receptor (NMDAR)-mediated synaptic dynamics are endowed with various dynamic characteristics of attractors underlying many cognitive functions. This paper presents a novel method for neuromorphic implementation of a two-variable WTA circuit with NMDARs aimed at implementing decision-making, working memory and hysteresis in visual perceptions. The method proposed is a dynamical system approach of circuit synthesis based on a biophysically plausible WTA model. Notably, slow and non-linear temporal dynamics of NMDAR-mediated synapses was generated. Circuit simulations in Cadence reproduced ramping neural activities observed in electrophysiological recordings in experiments of decision-making, the sustained activities observed in the prefrontal cortex during working memory, and classical hysteresis behavior during visual discrimination tasks. Furthermore, theoretical analysis of the dynamical system approach illuminated the underlying mechanisms of decision-making, memory capacity and hysteresis loops. The consistence between the circuit simulations and theoretical analysis demonstrated that the WTA circuit with NMDARs was able to capture the attractor dynamics underlying these cognitive functions. Their physical implementations as elementary modules are promising for assembly into integrated neuromorphic cognitive systems.

  20. RESEARCH INTO VALVE-ENGINE TRANSDUCERS OF BRUSHLESS SYNCHRONOUS AND ASYNCHRONIZED MACHINES IN A CIRCUIT SIMULATION SYSTEM.

    Directory of Open Access Journals (Sweden)

    A.M. Galynovskiy

    2013-10-01

    Full Text Available Designing features for valve-engine transducers of brushless synchronous and asynchronized machines are described. Global analysis of research results on the transducer models in a MicroCap circuit simulation system is made, recommendations on the simulation system application in both scientific research and educational process given.

  1. Errors in short circuit measurements due to spectral mismatch between sunlight and solar simulators

    Science.gov (United States)

    Curtis, H. B.

    1976-01-01

    Errors in short circuit current measurement were calculated for a variety of spectral mismatch conditions. The differences in spectral irradiance between terrestrial sunlight and three types of solar simulator were studied, as well as the differences in spectral response between three types of reference solar cells and various test cells. The simulators considered were a short arc xenon lamp AMO sunlight simulator, an ordinary quartz halogen lamp, and an ELH-type quartz halogen lamp. Three types of solar cells studied were a silicon cell, a cadmium sulfide cell and a gallium arsenide cell.

  2. The voltage—current relationship and equivalent circuit implementation of parallel flux-controlled memristive circuits

    International Nuclear Information System (INIS)

    Bao Bo-Cheng; Feng Fei; Dong Wei; Pan Sai-Hu

    2013-01-01

    A flux-controlled memristor characterized by smooth cubic nonlinearity is taken as an example, upon which the voltage—current relationships (VCRs) between two parallel memristive circuits — a parallel memristor and capacitor circuit (the parallel MC circuit), and a parallel memristor and inductor circuit (the parallel ML circuit) — are investigated. The results indicate that the VCR between these two parallel memristive circuits is closely related to the circuit parameters, and the frequency and amplitude of the sinusoidal voltage stimulus. An equivalent circuit model of the memristor is built, upon which the circuit simulations and experimental measurements of both the parallel MC circuit and the parallel ML circuit are performed, and the results verify the theoretical analysis results

  3. What's new about generator circuit breakers

    International Nuclear Information System (INIS)

    Kolarik, P.L.

    1979-01-01

    The need for updating ANSI C37 Standards for AC high-voltage circuit breakers has become necessary because of the increased interest in power circuit breakers for generator application. These circuit breakers, which have continuous current ratings and rated short-circuit currents that are much higher than those presently covered by existing C37 Standards, take on added importance because they are being installed in critical AC power supplies at nuclear power stations

  4. Design and application of multilayer monolithic microwave integrated circuit transformers

    Energy Technology Data Exchange (ETDEWEB)

    Economides, S.B

    1999-07-01

    The design and performance of planar spiral transformers, using multilayer GaAs and silicon MMIC technology, are presented. This multilayer technology gives new opportunities for improving the performance of planar transformers, couplers and baluns. Planar transformers have high parasitic resistance and capacitance and low levels of coupling. Using multilayer technology these problems are overcome by applying a multilayer structure of three metal layers separated by two polyimide dielectric layers. The improvements gained by placing the conductors on different metal layers, and using conductors raised on polyimide layers for low capacitance, have been investigated. The circuits were fabricated using a novel experimental fabrication process, which uses entirely standard materials and techniques and is compatible with BJT's and silicon-germanium HBT's. The transformers were all characterised up to 20 GHz using RF-on-wafer measurements. They demonstrated good performance, considering the experimental nature of in-house multilayer technology and the difficulties in simulating these three-dimensional new geometries. With high resistivity substrates, the silicon components achieved virtually the same performance as their gallium arsenide counterparts. The transformers were then used in simulations of transformer-coupled HBT amplifier circuits, to demonstrate their capabilities. It was shown that these circuits present good performance compared to standard off-the shelf component circuits and are very promising for use in most multilayer MMIC applications. The structures were further used in coupling configurations, and applied in balun circuits and pushpull amplifiers. The spiral transformer coupler can operate at low frequencies without using up much chip area. In a balun configuration, the balun can compensate for coupling and phase imbalance and operates over 5 to 15 GHz. The spiral coupler does not always need multilayer processing, so the balun may be

  5. Applications of modularized circuit designs in a new hyper-chaotic system circuit implementation

    International Nuclear Information System (INIS)

    Wang Rui; Sun Hui; Wang Jie-Zhi; Wang Lu; Wang Yan-Chao

    2015-01-01

    Modularized circuit designs for chaotic systems are introduced in this paper. Especially, a typical improved modularized design strategy is proposed and applied to a new hyper-chaotic system circuit implementation. In this paper, the detailed design procedures are described. Multisim simulations and physical experiments are conducted, and the simulation results are compared with Matlab simulation results for different system parameter pairs. These results are consistent with each other and they verify the existence of the hyper-chaotic attractor for this new hyper-chaotic system. (paper)

  6. Simulated annealing method for electronic circuits design: adaptation and comparison with other optimization methods; La methode du recuit simule pour la conception des circuits electroniques: adaptation et comparaison avec d`autres methodes d`optimisation

    Energy Technology Data Exchange (ETDEWEB)

    Berthiau, G

    1995-10-01

    The circuit design problem consists in determining acceptable parameter values (resistors, capacitors, transistors geometries ...) which allow the circuit to meet various user given operational criteria (DC consumption, AC bandwidth, transient times ...). This task is equivalent to a multidimensional and/or multi objective optimization problem: n-variables functions have to be minimized in an hyper-rectangular domain ; equality constraints can be eventually specified. A similar problem consists in fitting component models. In this way, the optimization variables are the model parameters and one aims at minimizing a cost function built on the error between the model response and the data measured on the component. The chosen optimization method for this kind of problem is the simulated annealing method. This method, provided by the combinatorial optimization domain, has been adapted and compared with other global optimization methods for the continuous variables problems. An efficient strategy of variables discretization and a set of complementary stopping criteria have been proposed. The different parameters of the method have been adjusted with analytical functions of which minima are known, classically used in the literature. Our simulated annealing algorithm has been coupled with an open electrical simulator SPICE-PAC of which the modular structure allows the chaining of simulations required by the circuit optimization process. We proposed, for high-dimensional problems, a partitioning technique which ensures proportionality between CPU-time and variables number. To compare our method with others, we have adapted three other methods coming from combinatorial optimization domain - the threshold method, a genetic algorithm and the Tabu search method - The tests have been performed on the same set of test functions and the results allow a first comparison between these methods applied to continuous optimization variables. (Abstract Truncated)

  7. Electrostatic Discharge Current Linear Approach and Circuit Design Method

    Directory of Open Access Journals (Sweden)

    Pavlos K. Katsivelis

    2010-11-01

    Full Text Available The Electrostatic Discharge phenomenon is a great threat to all electronic devices and ICs. An electric charge passing rapidly from a charged body to another can seriously harm the last one. However, there is a lack in a linear mathematical approach which will make it possible to design a circuit capable of producing such a sophisticated current waveform. The commonly accepted Electrostatic Discharge current waveform is the one set by the IEC 61000-4-2. However, the over-simplified circuit included in the same standard is incapable of producing such a waveform. Treating the Electrostatic Discharge current waveform of the IEC 61000-4-2 as reference, an approximation method, based on Prony’s method, is developed and applied in order to obtain a linear system’s response. Considering a known input, a method to design a circuit, able to generate this ESD current waveform in presented. The circuit synthesis assumes ideal active elements. A simulation is carried out using the PSpice software.

  8. Universal discrete Fourier optics RF photonic integrated circuit architecture.

    Science.gov (United States)

    Hall, Trevor J; Hasan, Mehedi

    2016-04-04

    This paper describes a coherent electro-optic circuit architecture that generates a frequency comb consisting of N spatially separated orders using a generalised Mach-Zenhder interferometer (MZI) with its N × 1 combiner replaced by an optical N × N Discrete Fourier Transform (DFT). Advantage may be taken of the tight optical path-length control, component and circuit symmetries and emerging trimming algorithms offered by photonic integration in any platform that offers linear electro-optic phase modulation such as LiNbO3, silicon, III-V or hybrid technology. The circuit architecture subsumes all MZI-based RF photonic circuit architectures in the prior art given an appropriate choice of output port(s) and dimension N although the principal application envisaged is phase correlated subcarrier generation for all optical orthogonal frequency division multiplexing. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. Implementation is found to be practical.

  9. Cell short circuit, preshort signature

    Science.gov (United States)

    Lurie, C.

    1980-01-01

    Short-circuit events observed in ground test simulations of DSCS-3 battery in-orbit operations are analyzed. Voltage signatures appearing in the data preceding the short-circuit event are evaluated. The ground test simulation is briefly described along with performance during reconditioning discharges. Results suggest that a characteristic signature develops prior to a shorting event.

  10. Simulation Approach for Timing Analysis of Genetic Logic Circuits

    DEFF Research Database (Denmark)

    Baig, Hasan; Madsen, Jan

    2017-01-01

    in a manner similar to electronic logic circuits, but they are much more stochastic and hence much harder to characterize. In this article, we introduce an approach to analyze the threshold value and timing of genetic logic circuits. We show how this approach can be used to analyze the timing behavior...... of single and cascaded genetic logic circuits. We further analyze the timing sensitivity of circuits by varying the degradation rates and concentrations. Our approach can be used not only to characterize the timing behavior but also to analyze the timing constraints of cascaded genetic logic circuits...

  11. Integrated Circuit Stellar Magnitude Simulator

    Science.gov (United States)

    Blackburn, James A.

    1978-01-01

    Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)

  12. Stability and non-standard finite difference method of the generalized Chua's circuit

    KAUST Repository

    Radwan, Ahmed G.

    2011-08-01

    In this paper, we develop a framework to obtain approximate numerical solutions of the fractional-order Chua\\'s circuit with Memristor using a non-standard finite difference method. Chaotic response is obtained with fractional-order elements as well as integer-order elements. Stability analysis and the condition of oscillation for the integer-order system are discussed. In addition, the stability analyses for different fractional-order cases are investigated showing a great sensitivity to small order changes indicating the poles\\' locations inside the physical s-plane. The GrnwaldLetnikov method is used to approximate the fractional derivatives. Numerical results are presented graphically and reveal that the non-standard finite difference scheme is an effective and convenient method to solve fractional-order chaotic systems, and to validate their stability. © 2011 Elsevier Ltd. All rights reserved.

  13. A programming language for composable DNA circuits.

    Science.gov (United States)

    Phillips, Andrew; Cardelli, Luca

    2009-08-06

    Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing.

  14. Circuit models and three-dimensional electromagnetic simulations of a 1-MA linear transformer driver stage

    Directory of Open Access Journals (Sweden)

    D. V. Rose

    2010-09-01

    Full Text Available A 3D fully electromagnetic (EM model of the principal pulsed-power components of a high-current linear transformer driver (LTD has been developed. LTD systems are a relatively new modular and compact pulsed-power technology based on high-energy density capacitors and low-inductance switches located within a linear-induction cavity. We model 1-MA, 100-kV, 100-ns rise-time LTD cavities [A. A. Kim et al., Phys. Rev. ST Accel. Beams 12, 050402 (2009PRABFM1098-440210.1103/PhysRevSTAB.12.050402] which can be used to drive z-pinch and material dynamics experiments. The model simulates the generation and propagation of electromagnetic power from individual capacitors and triggered gas switches to a radially symmetric output line. Multiple cavities, combined to provide voltage addition, drive a water-filled coaxial transmission line. A 3D fully EM model of a single 1-MA 100-kV LTD cavity driving a simple resistive load is presented and compared to electrical measurements. A new model of the current loss through the ferromagnetic cores is developed for use both in circuit representations of an LTD cavity and in the 3D EM simulations. Good agreement between the measured core current, a simple circuit model, and the 3D simulation model is obtained. A 3D EM model of an idealized ten-cavity LTD accelerator is also developed. The model results demonstrate efficient voltage addition when driving a matched impedance load, in good agreement with an idealized circuit model.

  15. The Simulation Computer Based Learning (SCBL) for Short Circuit Multi Machine Power System Analysis

    Science.gov (United States)

    Rahmaniar; Putri, Maharani

    2018-03-01

    Strengthening Competitiveness of human resources become the reply of college as a conductor of high fomal education. Electrical Engineering Program UNPAB (Prodi TE UNPAB) as one of the department of electrical engineering that manages the field of electrical engineering expertise has a very important part in preparing human resources (HR), Which is required by where graduates are produced by DE UNPAB, Is expected to be able to compete globally, especially related to the implementation of Asean Economic Community (AEC) which requires the active participation of graduates with competence and quality of human resource competitiveness. Preparation of HR formation Competitive is done with the various strategies contained in the Seven (7) Higher Education Standard, one part of which is the implementation of teaching and learning process in Electrical system analysis with short circuit analysis (SCA) This course is a course The core of which is the basis for the competencies of other subjects in the advanced semester at Development of Computer Based Learning model (CBL) is done in the learning of interference analysis of multi-machine short circuit which includes: (a) Short-circuit One phase, (B) Two-phase Short Circuit Disruption, (c) Ground Short Circuit Disruption, (d) Short Circuit Disruption One Ground Floor Development of CBL learning model for Electrical System Analysis course provides space for students to be more active In learning in solving complex (complicated) problems, so it is thrilling Ilkan flexibility of student learning how to actively solve the problem of short-circuit analysis and to form the active participation of students in learning (Student Center Learning, in the course of electrical power system analysis.

  16. Integrated Circuit Design of 3 Electrode Sensing System Using Two-Stage Operational Amplifier

    Science.gov (United States)

    Rani, S.; Abdullah, W. F. H.; Zain, Z. M.; N, Aqmar N. Z.

    2018-03-01

    This paper presents the design of a two-stage operational amplifier(op amp) for 3-electrode sensing system readout circuits. The designs have been simulated using 0.13μm CMOS technology from Silterra (Malaysia) with Mentor graphics tools. The purpose of this projects is mainly to design a miniature interfacing circuit to detect the redox reaction in the form of current using standard analog modules. The potentiostat consists of several op amps combined together in order to analyse the signal coming from the 3-electrode sensing system. This op amp design will be used in potentiostat circuit device and to analyse the functionality for each module of the system.

  17. Circuit model of the ITER-like antenna for JET and simulation of its control algorithms

    Energy Technology Data Exchange (ETDEWEB)

    Durodié, Frédéric, E-mail: frederic.durodie@rma.ac.be; Křivská, Alena [LPP-ERM/KMS, TEC Partner, Brussels (Belgium); Dumortier, Pierre; Lerche, Ernesto [LPP-ERM/KMS, TEC Partner, Brussels (Belgium); JET, Culham Science Centre, Abingdon, OX14 3DB (United Kingdom); Helou, Walid [CEA, IRFM, F-13108 St-Paul-Lez-Durance (France); Collaboration: EUROfusion Consortium

    2015-12-10

    The ITER-like Antenna (ILA) for JET [1] is a 2 toroidal by 2 poloidal array of Resonant Double Loops (RDL) featuring in-vessel matching capacitors feeding RF current straps in conjugate-T manner, a low impedance quarter-wave impedance transformer, a service stub allowing hydraulic actuator and water cooling services to reach the aforementioned capacitors and a 2nd stage phase-shifter-stub matching circuit allowing to correct/choose the conjugate-T working impedance. Toroidally adjacent RDLs are fed from a 3dB hybrid splitter. It has been operated at 33, 42 and 47MHz on plasma (2008-2009) while it presently estimated frequency range is from 29 to 49MHz. At the time of the design (2001-2004) as well as the experiments the circuit models of the ILA were quite basic. The ILA front face and strap array Topica model was relatively crude and failed to correctly represent the poloidal central septum, Faraday Screen attachment as well as the segmented antenna central septum limiter. The ILA matching capacitors, T-junction, Vacuum Transmission Line (VTL) and Service Stubs were represented by lumped circuit elements and simple transmission line models. The assessment of the ILA results carried out to decide on the repair of the ILA identified that achieving routine full array operation requires a better understanding of the RF circuit, a feedback control algorithm for the 2nd stage matching as well as tighter calibrations of RF measurements. The paper presents the progress in modelling of the ILA comprising a more detailed Topica model of the front face for various plasma Scrape Off Layer profiles, a comprehensive HFSS model of the matching capacitors including internal bellows and electrode cylinders, 3D-EM models of the VTL including vacuum ceramic window, Service stub, a transmission line model of the 2nd stage matching circuit and main transmission lines including the 3dB hybrid splitters. A time evolving simulation using the improved circuit model allowed to design and

  18. Circuit model of the ITER-like antenna for JET and simulation of its control algorithms

    Science.gov (United States)

    Durodié, Frédéric; Dumortier, Pierre; Helou, Walid; Křivská, Alena; Lerche, Ernesto

    2015-12-01

    The ITER-like Antenna (ILA) for JET [1] is a 2 toroidal by 2 poloidal array of Resonant Double Loops (RDL) featuring in-vessel matching capacitors feeding RF current straps in conjugate-T manner, a low impedance quarter-wave impedance transformer, a service stub allowing hydraulic actuator and water cooling services to reach the aforementioned capacitors and a 2nd stage phase-shifter-stub matching circuit allowing to correct/choose the conjugate-T working impedance. Toroidally adjacent RDLs are fed from a 3dB hybrid splitter. It has been operated at 33, 42 and 47MHz on plasma (2008-2009) while it presently estimated frequency range is from 29 to 49MHz. At the time of the design (2001-2004) as well as the experiments the circuit models of the ILA were quite basic. The ILA front face and strap array Topica model was relatively crude and failed to correctly represent the poloidal central septum, Faraday Screen attachment as well as the segmented antenna central septum limiter. The ILA matching capacitors, T-junction, Vacuum Transmission Line (VTL) and Service Stubs were represented by lumped circuit elements and simple transmission line models. The assessment of the ILA results carried out to decide on the repair of the ILA identified that achieving routine full array operation requires a better understanding of the RF circuit, a feedback control algorithm for the 2nd stage matching as well as tighter calibrations of RF measurements. The paper presents the progress in modelling of the ILA comprising a more detailed Topica model of the front face for various plasma Scrape Off Layer profiles, a comprehensive HFSS model of the matching capacitors including internal bellows and electrode cylinders, 3D-EM models of the VTL including vacuum ceramic window, Service stub, a transmission line model of the 2nd stage matching circuit and main transmission lines including the 3dB hybrid splitters. A time evolving simulation using the improved circuit model allowed to design and

  19. Optimal planning of series resistor to control time constant of test circuit for high-voltage AC circuit-breakers

    OpenAIRE

    Yoon-Ho Kim; Jung-Hyeon Ryu; Jin-Hwan Kim; Kern-Joong Kim

    2016-01-01

    The equivalent test circuit that can deliver both short-circuit current and recovery voltage is used to verify the performance of high-voltage circuit breakers. Most of the parameters in this circuit can be obtained by using a simple calculation or a simulation program. The ratings of the circuit breaker include rated short-circuit breaking current, rated short-circuit making current, rated operating sequence of the circuit breaker and rated short-time current. Among these ratings, the short-...

  20. Experiments for simulating a great leak in the primary coolant circuit of a PWR type reactor

    International Nuclear Information System (INIS)

    Liebig, E.

    1977-01-01

    A loss of coolant accident is to be simulated on a high pressure test rig. The accident is initiated by an externally induced rupture of a pair of rupture-disks installed in a coolant ejection device. Several problems of simulating leaks in the primary coolant circuit of PWR type reactors are dealt with. The selection of appropriate rupture-disks for such experiments is described

  1. Design of an improved RCD buffer circuit for full bridge circuit

    Science.gov (United States)

    Yang, Wenyan; Wei, Xueye; Du, Yongbo; Hu, Liang; Zhang, Liwei; Zhang, Ou

    2017-05-01

    In the full bridge inverter circuit, when the switch tube suddenly opened or closed, the inductor current changes rapidly. Due to the existence of parasitic inductance of the main circuit. Therefore, the surge voltage between drain and source of the switch tube can be generated, which will have an impact on the switch and the output voltage. In order to ab sorb the surge voltage. An improve RCD buffer circuit is proposed in the paper. The peak energy will be absorbed through the buffer capacitor of the circuit. The part energy feedback to the power supply, another part release through the resistor in the form of heat, and the circuit can absorb the voltage spikes. This paper analyzes the process of the improved RCD snubber circuit, According to the specific parameters of the main circuit, a reasonable formula for calculating the resistance capacitance is given. A simulation model will be modulated in Multisim, which compared the waveform of tube voltage and the output waveform of the circuit without snubber circuit with the improved RCD snubber circuit. By comparing and analyzing, it is proved that the improved buffer circuit can absorb surge voltage. Finally, experiments are demonstrated to validate that the correctness of the RC formula and the improved RCD snubber circuit.

  2. Computer simulation model of reflex e-beam systems coupled to an external circuit

    International Nuclear Information System (INIS)

    Jungwirth, K.; Stavinoha, P.

    1982-01-01

    Dynamics of ions and relativistic electrons in various high-voltage reflexing systems (reflex diodes and triodes) was investigated numerically by means of 1 1/2-dimensional PIC simulation model OREBIA. Its perfected version OREBIA-REX also accounts for system coupling to an external power source circuit, thus yielding the currents and applied voltage self-consistently. Various modes of operation of reflex diode and triode were studied using both models. It is shown that neglecting the influence of the external circuit can lead to seve--re overestimation of both ion currents and electron accumulation rates. In coupled systems with ions repeated collapses of impedance due to electron-ion relaxation processes are observed. The current and voltage pulses calculated for several reflex diodes and triodes with and without ions are presented. (J.U.)

  3. Circuits and filters handbook

    CERN Document Server

    Chen, Wai-Kai

    2003-01-01

    A bestseller in its first edition, The Circuits and Filters Handbook has been thoroughly updated to provide the most current, most comprehensive information available in both the classical and emerging fields of circuits and filters, both analog and digital. This edition contains 29 new chapters, with significant additions in the areas of computer-aided design, circuit simulation, VLSI circuits, design automation, and active and digital filters. It will undoubtedly take its place as the engineer's first choice in looking for solutions to problems encountered in the design, analysis, and behavi

  4. MOS integrated circuit design

    CERN Document Server

    Wolfendale, E

    2013-01-01

    MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

  5. INACSL Standards of Best Practice for Simulation: Past, Present, and Future.

    Science.gov (United States)

    Sittner, Barbara J; Aebersold, Michelle L; Paige, Jane B; Graham, Leslie L M; Schram, Andrea Parsons; Decker, Sharon I; Lioce, Lori

    2015-01-01

    To describe the historical evolution of the International Nursing Association for Clinical Simulation and Learning's (INACSL) Standards of Best Practice: Simulation. The establishment of simulation standards began as a concerted effort by the INACSL Board of Directors in 2010 to provide best practices to design, conduct, and evaluate simulation activities in order to advance the science of simulation as a teaching methodology. A comprehensive review of the evolution of INACSL Standards of Best Practice: Simulation was conducted using journal publications, the INACSL website, INACSL member survey, and reports from members of the INACSL Standards Committee. The initial seven standards, published in 2011, were reviewed and revised in 2013. Two new standards were published in 2015. The standards will continue to evolve as the science of simulation advances. As the use of simulation-based experiences increases, the INACSL Standards of Best Practice: Simulation are foundational to standardizing language, behaviors, and curricular design for facilitators and learners.

  6. MOS voltage automatic tuning circuit

    OpenAIRE

    李, 田茂; 中田, 辰則; 松本, 寛樹

    2004-01-01

    Abstract ###Automatic tuning circuit adjusts frequency performance to compensate for the process variation. Phase locked ###loop (PLL) is a suitable oscillator for the integrated circuit. It is a feedback system that compares the input ###phase with the output phase. It can make the output frequency equal to the input frequency. In this paper, PLL ###fomed of MOSFET's is presented.The presented circuit consists of XOR circuit, Low-pass filter and Relaxation ###Oscillator. On PSPICE simulation...

  7. The effect of different solar simulators on the measurement of short-circuit current temperature coefficients

    Science.gov (United States)

    Curtis, H. B.; Hart, R. E., Jr.

    1982-01-01

    Gallium arsenide solar cells are considered for several high temperature missions in space. Both near-Sun and concentrator missions could involve cell temperatures on the order of 200 C. Performance measurements of cells at elevated temperatures are usually made using simulated sunlight and a matched reference cell. Due to the change in bandgap with increasing temperature at portions of the spectrum where considerable simulated irradiance is present, there are significant differences in measured short circuit current at elevated temperatures among different simulators. To illustrate this, both experimental and theoretical data are presented for gallium arsenide cells.

  8. Substrate Effects in Wideband SiGe HBT Mixer Circuits

    DEFF Research Database (Denmark)

    Johansen, Tom Keinicke; Vidkjær, Jens; Krozer, Viktor

    2005-01-01

    are also applied to predict short distance substrate coupling effects. Simulation results using extracted equivalent circuit models and substrate coupling networks are compared with experimental results obtained on a wideband mixer circuit implemented in a 0.35 μm, 60 GHz ft SiGe HBT BiCMOS process.......In this paper, the influence from substrate effects on the performance of wideband SiGe HBT mixer circuits is investigated. Equivalent circuit models including substrate networks are extracted from on-wafer test structures and compared with electromagnetic simulations. Electromagnetic simulations...

  9. Unstable oscillators based hyperchaotic circuit

    DEFF Research Database (Denmark)

    Murali, K.; Tamasevicius, A.; G. Mykolaitis, A.

    1999-01-01

    A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations in the circ...... in the circuit. The performance of the circuit is investigated by means of numerical integration of appropriate differential equations, PSPICE simulations, and hardware experiment.......A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations...

  10. Standardization of Schwarz-Christoffel transformation for engineering design of semiconductor and hybrid integrated-circuit elements

    Science.gov (United States)

    Yashin, A. A.

    1985-04-01

    A semiconductor or hybrid structure into a calculable two-dimensional region mapped by the Schwarz-Christoffel transformation and a universal algorithm can be constructed on the basis of Maxwell's electro-magnetic-thermal similarity principle for engineering design of integrated-circuit elements. The design procedure involves conformal mapping of the original region into a polygon and then the latter into a rectangle with uniform field distribution, where conductances and capacitances are calculated, using tabulated standard mapping functions. Subsequent synthesis of a device requires inverse conformal mapping. Devices adaptable as integrated-circuit elements are high-resistance film resistors with periodic serration, distributed-resistance film attenuators with high transformation ratio, coplanar microstrip lines, bipolar transistors, directional couplers with distributed coupling to microstrip lines for microwave bulk devices, and quasirregular smooth matching transitions from asymmetric to coplanar microstrip lines.

  11. Performance of digital integrated circuit technologies at very high temperatures

    Energy Technology Data Exchange (ETDEWEB)

    Prince, J.L.; Draper, B.L.; Rapp, E.A.; Kromberg, J.N.; Fitch, L.T.

    1980-01-01

    Results of investigations of the performance and reliability of digital bipolar and CMOS integrated circuits over the 25 to 340/sup 0/C range are reported. Included in these results are both parametric variation information and analysis of the functional failure mechanisms. Although most of the work was done using commercially available circuits (TTL and CMOS) and test chips from commercially compatible processes, some results of experimental simulations of dielectrically isolated CMOS are also discussed. It was found that commercial Schottky clamped TTL, and dielectrically isolated, low power Schottky-clamped TTL, functioned to junction temperatures in excess of 325/sup 0/C. Standard gold doped TTL functioned only to 250/sup 0/C, while commercial, isolated I/sup 2/L functioned to the range 250/sup 0/C to 275/sup 0/C. Commercial junction isolated CMOS, buffered and unbuffered, functioned to the range 280/sup 0/C to 310/sup 0/C/sup +/, depending on the manufacturer. Experimental simulations of simple dielectrically isolated CMOS integrated circuits, fabricated with heavier doping levels than normal, functioned to temperatures in excess of 340/sup 0/C. High temperature life testing of experimental, silicone-encapsulated simple TTL and CMOS integrated circuits have shown no obvious life limiting problems to date. No barrier to reliable functionality of TTL bipolar or CMOS integrated ciruits at temperatures in excess of 300/sup 0/C has been found.

  12. The testing of generator circuit-breakers

    NARCIS (Netherlands)

    Smeets, R.P.P.; Linden, van der W.A.

    1998-01-01

    Generator circuit-breakers face much higher current and voltage stress than distribution switchgear. This has led to a special standard (ANSI C37.013). Strictly in accordance with this standard's requirements, test circuits and parameters for a 100 kA and 120 kA (25.3 kV) SF6 generator

  13. Circuit-Host Coupling Induces Multifaceted Behavioral Modulations of a Gene Switch.

    Science.gov (United States)

    Blanchard, Andrew E; Liao, Chen; Lu, Ting

    2018-02-06

    Quantitative modeling of gene circuits is fundamentally important to synthetic biology, as it offers the potential to transform circuit engineering from trial-and-error construction to rational design and, hence, facilitates the advance of the field. Currently, typical models regard gene circuits as isolated entities and focus only on the biochemical processes within the circuits. However, such a standard paradigm is getting challenged by increasing experimental evidence suggesting that circuits and their host are intimately connected, and their interactions can potentially impact circuit behaviors. Here we systematically examined the roles of circuit-host coupling in shaping circuit dynamics by using a self-activating gene switch as a model circuit. Through a combination of deterministic modeling, stochastic simulation, and Fokker-Planck equation formalism, we found that circuit-host coupling alters switch behaviors across multiple scales. At the single-cell level, it slows the switch dynamics in the high protein production regime and enlarges the difference between stable steady-state values. At the population level, it favors cells with low protein production through differential growth amplification. Together, the two-level coupling effects induce both quantitative and qualitative modulations of the switch, with the primary component of the effects determined by the circuit's architectural parameters. This study illustrates the complexity and importance of circuit-host coupling in modulating circuit behaviors, demonstrating the need for a new paradigm-integrated modeling of the circuit-host system-for quantitative understanding of engineered gene networks. Copyright © 2017 Biophysical Society. Published by Elsevier Inc. All rights reserved.

  14. Circuit design for reliability

    CERN Document Server

    Cao, Yu; Wirth, Gilson

    2015-01-01

    This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.

  15. Matchgate circuits and compressed quantum computation

    International Nuclear Information System (INIS)

    Boyajian, W.L.

    2015-01-01

    Simulating a quantum system with a classical computer seems to be an un- feasible task due to the exponential growths of the dimension of the Hilbert space as a function of the number of considered systems. This is why the classical simulation of quantum behavior is usually restricted to a few qubits, although the numerical methods became very powerful. However, as pointed out by [Feynman (1982)] and proven by [Llody (1996)] quantum systems can be used to simulate the behavior of the other. The former being such that constituents can be very precisely prepared, manipulated and measured. Many experiments are realizing such a simulation nowadays. Among them experiments utilizing ions in ion-traps, NMR or atoms in optical lattices (see for instance [Bloch et al. (2012); Lanyon et al. (2011); Houck et al. (2012)] and references therein). Here we are not concerned about this direct simulation of a quantum system. We are interested in a more economical way of simulating certain quantum behaviors. To this end, we are using the fact that some classes of quantum algorithms, among them those which are based on matchgates, can be simulated classically efficiently. Moreover, it can be shown that matchgate circuits can also be simulated by an exponentially smaller quantum computer [Jozsa et al. (2009)]. There, the classical computation is restricted in space such that the computation has to be performed by the quantum computer and cannot be performed by the classical computer. In fact, it has been shown that the computational power of matchgate circuits running on n qubits is equivalent to the one of space-bounded quantum computation with space restricted to being logarithmic in n [Jozsa et al. (2009)]. This thesis is organized as follows. In Part I, we recall some basic concepts of quantum mechanics, quantum computation and quantum simulation. Furthermore we discuss the main results of matchgate circuits and compressed quantum computation. We also recall the XY model and its

  16. Electronic circuit design with HEP computational tools

    International Nuclear Information System (INIS)

    Vaz, Mario

    1996-01-01

    CPSPICE is an electronic circuit statistical simulation program developed to run in a parallel environment under UNIX operating system and TCP/IP communications protocol, using CPS - Cooperative Processes Software , SPICE program and CERNLIB software package. It is part of a set of tools being develop, intended to help electronic engineers to design, model and simulate complex systems and circuits for High Energy Physics detectors, based on statistical methods, using the same software and methodology used by HEP physicists for data analysis. CPSPICE simulates electronic circuits by Monte Carlo method, through several different processes running simultaneously SPICE in UNIX parallel computers or workstation farms. Data transfer between CPS processes for a modified version of SPICE2G6 is done by RAM memory, but can also be done through hard disk files if no source files are available for the simulator, and for bigger simulation outputs files. Simulation results are written in a HBOOK file as a NTUPLE, to be examined by HBOOK in batch model or graphics, and analyzed by statistical procedures available. The HBOOK file be stored on hard disk for small amount of data, or into Exabyte tape file for large amount of data. HEP tools also helps circuit or component modeling, like MINUT program from CERNLIB, that implements Nelder and Mead Simplex and Gradient with or without derivatives algorithms, and can be used for design optimization.This paper presents CPSPICE program implementation. The scheme adopted is suitable to make parallel other electronic circuit simulators. (author)

  17. Impact of tubing length on hemodynamics in a simulated neonatal extracorporeal life support circuit.

    Science.gov (United States)

    Qiu, Feng; Uluer, Mehmet C; Kunselman, Allen; Clark, J Brian; Myers, John L; Undar, Akif

    2010-11-01

    During extracorporeal life support (ECLS), a large portion of the hemodynamic energy is lost to various components of the circuit. Minimization of this loss in the circuit leads to better vital organ perfusion and decreases the risk of systemic inflammation. In this study, we evaluated the hemodynamic properties of differing lengths of tubing in a simulated neonatal ECLS circuit. The neonatal ECLS circuit used in this study included a Capiox Baby RX05 oxygenator (Terumo Corporation, Tokyo, Japan), a Rotaflow centrifugal pump (MAQUET Cardiopulmonary AG, Hirrlingen, Germany), and a heater and cooler unit. An 8Fr Biomedicus arterial and a 10Fr Biomedicus venous cannula were connected to the pseudopatient. One-fourth inch tubing was used for both the arterial and the venous line. A Hoffman clamp was located upstream from the pseudopatient to maintain a certain patient pressure. Three pressure transducers were placed at different sites: postoxygenator, prearterial cannula, and postarterial cannula. The system was primed with Lactated Ringer's solution; human blood was then added to maintain a hematocrit of 40%. The volume of the pseudopatient was 500mL. We hemodynamically evaluated three circuits with different lengths of tubing: 6, 4, and 2 feet (182.88, 121.92, and 60.96 cm, respectively) for both arterial and venous lines; the priming volumes including all of the components of the circuits were 195, 155, and 115mL, respectively. In each circuit, we measured the pressure drops of the arterial tubing and the arterial cannula, as well as the flow rates at different rpm (1750-3000, 250 intervals) under three patient pressures (40, 60, and 80mm Hg). All the experiments were conducted at 37°C. The pressure drop across the arterial cannula is much larger than that of arterial tubing in all set-ups, especially under high flow rates. Upon cutting the tubing from 6 to 2 feet, the pressure drop of the arterial tubing decreased by half, while the pressure drop of the arterial

  18. Electronic Circuit Analysis Language (ECAL)

    Science.gov (United States)

    Chenghang, C.

    1983-03-01

    The computer aided design technique is an important development in computer applications and it is an important component of computer science. The special language for electronic circuit analysis is the foundation of computer aided design or computer aided circuit analysis (abbreviated as CACD and CACA) of simulated circuits. Electronic circuit analysis language (ECAL) is a comparatively simple and easy to use circuit analysis special language which uses the FORTRAN language to carry out the explanatory executions. It is capable of conducting dc analysis, ac analysis, and transient analysis of a circuit. Futhermore, the results of the dc analysis can be used directly as the initial conditions for the ac and transient analyses.

  19. Timing Analysis of Genetic Logic Circuits using D-VASim

    DEFF Research Database (Denmark)

    Baig, Hasan; Madsen, Jan

    and propagation delay analysis of single as well as cascaded geneticlogic circuits can be performed. D-VASim allows user to change the circuit parameters during runtime simulation to observe its effectson circuit’s timing behavior. The results obtained from D-VASim can be used not only to characterize the timing...... delay analysis may play a very significant role in the designing of genetic logic circuits. In thisdemonstration, we present the capability of D-VASim (Dynamic Virtual Analyzer and Simulator) to perform the timing and propagationdelay analysis of genetic logic circuits. Using D-VASim, the timing...... behavior of geneticlogic circuits but also to analyze the timing constraints of cascaded genetic logic circuits....

  20. Electrical circuit modeling and analysis of microwave acoustic interaction with biological tissues.

    Science.gov (United States)

    Gao, Fei; Zheng, Qian; Zheng, Yuanjin

    2014-05-01

    Numerical study of microwave imaging and microwave-induced thermoacoustic imaging utilizes finite difference time domain (FDTD) analysis for simulation of microwave and acoustic interaction with biological tissues, which is time consuming due to complex grid-segmentation and numerous calculations, not straightforward due to no analytical solution and physical explanation, and incompatible with hardware development requiring circuit simulator such as SPICE. In this paper, instead of conventional FDTD numerical simulation, an equivalent electrical circuit model is proposed to model the microwave acoustic interaction with biological tissues for fast simulation and quantitative analysis in both one and two dimensions (2D). The equivalent circuit of ideal point-like tissue for microwave-acoustic interaction is proposed including transmission line, voltage-controlled current source, envelop detector, and resistor-inductor-capacitor (RLC) network, to model the microwave scattering, thermal expansion, and acoustic generation. Based on which, two-port network of the point-like tissue is built and characterized using pseudo S-parameters and transducer gain. Two dimensional circuit network including acoustic scatterer and acoustic channel is also constructed to model the 2D spatial information and acoustic scattering effect in heterogeneous medium. Both FDTD simulation, circuit simulation, and experimental measurement are performed to compare the results in terms of time domain, frequency domain, and pseudo S-parameters characterization. 2D circuit network simulation is also performed under different scenarios including different sizes of tumors and the effect of acoustic scatterer. The proposed circuit model of microwave acoustic interaction with biological tissue could give good agreement with FDTD simulated and experimental measured results. The pseudo S-parameters and characteristic gain could globally evaluate the performance of tumor detection. The 2D circuit network

  1. Simulation of TunneLadder traveling-wave tube cold-test characteristics: Implementation of the three-dimensional, electromagnetic circuit analysis code micro-SOS

    Science.gov (United States)

    Kory, Carol L.; Wilson, Jeffrey D.

    1993-01-01

    The three-dimensional, electromagnetic circuit analysis code, Micro-SOS, can be used to reduce expensive time-consuming experimental 'cold-testing' of traveling-wave tube (TWT) circuits. The frequency-phase dispersion characteristics and beam interaction impedance of a TunneLadder traveling-wave tube slow-wave structure were simulated using the code. When reasonable dimensional adjustments are made, computer results agree closely with experimental data. Modifications to the circuit geometry that would make the TunneLadder TWT easier to fabricate for higher frequency operation are explored.

  2. Low-Voltage Switched-Capacitor Circuits

    DEFF Research Database (Denmark)

    Bidari, E.; Keskin, M.; Maloberti, F.

    1999-01-01

    Switched-capacitor stages are described which can function with very low (typically 1 V) supply voltages, without using voltage boosting or switched op-amps. Simulations indicate that high performance may be achieved using these circuits in filter or data converter applications.......Switched-capacitor stages are described which can function with very low (typically 1 V) supply voltages, without using voltage boosting or switched op-amps. Simulations indicate that high performance may be achieved using these circuits in filter or data converter applications....

  3. CMOS analog circuit design

    CERN Document Server

    Allen, Phillip E

    1987-01-01

    This text presents the principles and techniques for designing analog circuits to be implemented in a CMOS technology. The level is appropriate for seniors and graduate students familiar with basic electronics, including biasing, modeling, circuit analysis, and some familiarity with frequency response. Students learn the methodology of analog integrated circuit design through a hierarchically-oriented approach to the subject that provides thorough background and practical guidance for designing CMOS analog circuits, including modeling, simulation, and testing. The authors' vast industrial experience and knowledge is reflected in the circuits, techniques, and principles presented. They even identify the many common pitfalls that lie in the path of the beginning designer--expert advice from veteran designers. The text mixes the academic and practical viewpoints in a treatment that is neither superficial nor overly detailed, providing the perfect balance.

  4. Simulation of a turbine trip transient at Embalse NPP with full-circuit CATHENA model

    Energy Technology Data Exchange (ETDEWEB)

    Rabiti, A., E-mail: arabiti@na-sa.com.ar [Nucleoelectrica Argentina S.A., Embalse Nuclear Power Plant, Engineering Management Branch, Embalse (Argentina); Parrondo, A., E-mail: aparrondo@na-sa.com.ar [Nucleoelectrica Argentina S.A., Engineering Management, Buenos Aires (Argentina); Serrano, P., E-mail: pserrano@na-sa.com.ar [Nucleoelectrica Argentina S.A., Licensing Coordination Branch, Atucha II Project Branch (Unidad de Gestion), Buenos Aires (Argentina); Sablayrolles, A.; Damiani, H., E-mail: asablayrolles@na-sa.com.ar, E-mail: hdamiani@na-sa.com.ar [Nucleoelectrica Argentina S.A., Embalse Nuclear Power Plant, Embalse Life Extension Project Management, Embalse (Argentina)

    2015-07-01

    Embalse NPP is carrying on a Periodic Safety Review to deal with its life extension. This review includes tasks like Deterministic Analysis review for the Final Safety Analysis Report. In 2011, NA-SA (Nucleoelectrica Argentina S.A.) issued a first CATHENA full-circuit model representing the current plant. This model is used in this work. The simulation presented here corresponds to a turbine trip that occurred at Embalse NPP. Consistency between the simulation and the real event is demonstrated. Furthermore, NASA is currently performing Safety Analysis with a new model developed jointly with AECL and Candu Energy which includes post refurbishment changes and other improvements. (author)

  5. Circuit Simulation of All-Spin Logic

    KAUST Repository

    Alawein, Meshal

    2016-05-01

    With the aggressive scaling of complementary metal-oxide semiconductor (CMOS) nearing an inevitable physical limit and its well-known power crisis, the quest for an alternative/augmenting technology that surpasses the current semiconductor electronics is needed for further technological progress. Spintronic devices emerge as prime candidates for Beyond CMOS era by utilizing the electron spin as an extra degree of freedom to decrease the power consumption and overcome the velocity limit connected with the charge. By using the nonvolatility nature of magnetization along with its direction to represent a bit of information and then manipulating it by spin-polarized currents, routes are opened for combined memory and logic. This would not have been possible without the recent discoveries in the physics of nanomagnetism such as spin-transfer torque (STT) whereby a spin-polarized current can excite magnetization dynamics through the transfer of spin angular momentum. STT have expanded the available means of switching the magnetization of magnetic layers beyond old classical techniques, promising to fulfill the need for a new generation of dense, fast, and nonvolatile logic and storage devices. All-spin logic (ASL) is among the most promising spintronic logic switches due to its low power consumption, logic-in-memory structure, and operation on pure spin currents. The device is based on a lateral nonlocal spin valve and STT switching. It utilizes two nanomagnets (whereby information is stored) that communicate with pure spin currents through a spin-coherent nonmagnetic channel. By using the well-known spin physics and the recently proposed four-component spin circuit formalism, ASL can be thoroughly studied and simulated. Previous attempts to model ASL in the linear and diffusive regime either neglect the dynamic characteristics of transport or do not provide a scalable and robust platform for full micromagnetic simulations and inclusion of other effects like spin Hall

  6. Lumped element modelling of superconducting circuits with SPICE

    CERN Document Server

    Baveco, Maurice Antoine

    2015-01-01

    In this project research is carried out aimed at benchmarking a general-purpose circuit simulation software tool (”SPICE”). The project lasted for 8 weeks, from 29 June 2015 until 21 August 2015 at Performance Evaluation section at CERN. The goal was to apply it on a model of superconducting magnets, namely the main dipole circuit (RB circuit) of the the LHC (Large Hadron Collider), developed by members of the section. Then the strengths and the flaws of the tool were investigated. Transient effects were the main simulation focus point. In the first stage a simplified RB circuit was modelled in SPICE based on subcircuits. The first results were promising but still not with a perfect agreement. After implementing more detailed subcircuits there is an improvement and promising agreement achieved between SPICE and the results of the paper (PSpice) [2]. In general there are more strengths than drawbacks of simulating with SPICE. For example, it should have a shorter simulation time than PSpice for the same mo...

  7. Fast and Accurate Icepak-PSpice Co-Simulation of IGBTs under Short-Circuit with an Advanced PSpice Model

    DEFF Research Database (Denmark)

    Wu, Rui; Iannuzzo, Francesco; Wang, Huai

    2014-01-01

    A basic problem in the IGBT short-circuit failure mechanism study is to obtain realistic temperature distribution inside the chip, which demands accurate electrical simulation to obtain power loss distribution as well as detailed IGBT geometry and material information. This paper describes an unp...

  8. Josephson Circuits as Vector Quantum Spins

    Science.gov (United States)

    Samach, Gabriel; Kerman, Andrew J.

    While superconducting circuits based on Josephson junction technology can be engineered to represent spins in the quantum transverse-field Ising model, no circuit architecture to date has succeeded in emulating the vector quantum spin models of interest for next-generation quantum annealers and quantum simulators. Here, we present novel Josephson circuits which may provide these capabilities. We discuss our rigorous quantum-mechanical simulations of these circuits, as well as the larger architectures they may enable. This research was funded by the Office of the Director of National Intelligence (ODNI) and the Intelligence Advanced Research Projects Activity (IARPA) under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

  9. Universal programmable quantum circuit schemes to emulate an operator

    Energy Technology Data Exchange (ETDEWEB)

    Daskin, Anmer; Grama, Ananth; Kollias, Giorgos [Department of Computer Science, Purdue University, West Lafayette, Indiana 47907 (United States); Kais, Sabre [Department of Chemistry, Department of Physics and Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907 (United States); Qatar Environment and Energy Research Institute, Doha (Qatar)

    2012-12-21

    Unlike fixed designs, programmable circuit designs support an infinite number of operators. The functionality of a programmable circuit can be altered by simply changing the angle values of the rotation gates in the circuit. Here, we present a new quantum circuit design technique resulting in two general programmable circuit schemes. The circuit schemes can be used to simulate any given operator by setting the angle values in the circuit. This provides a fixed circuit design whose angles are determined from the elements of the given matrix-which can be non-unitary-in an efficient way. We also give both the classical and quantum complexity analysis for these circuits and show that the circuits require a few classical computations. For the electronic structure simulation on a quantum computer, one has to perform the following steps: prepare the initial wave function of the system; present the evolution operator U=e{sup -iHt} for a given atomic and molecular Hamiltonian H in terms of quantum gates array and apply the phase estimation algorithm to find the energy eigenvalues. Thus, in the circuit model of quantum computing for quantum chemistry, a crucial step is presenting the evolution operator for the atomic and molecular Hamiltonians in terms of quantum gate arrays. Since the presented circuit designs are independent from the matrix decomposition techniques and the global optimization processes used to find quantum circuits for a given operator, high accuracy simulations can be done for the unitary propagators of molecular Hamiltonians on quantum computers. As an example, we show how to build the circuit design for the hydrogen molecule.

  10. Universal programmable quantum circuit schemes to emulate an operator

    International Nuclear Information System (INIS)

    Daskin, Anmer; Grama, Ananth; Kollias, Giorgos; Kais, Sabre

    2012-01-01

    Unlike fixed designs, programmable circuit designs support an infinite number of operators. The functionality of a programmable circuit can be altered by simply changing the angle values of the rotation gates in the circuit. Here, we present a new quantum circuit design technique resulting in two general programmable circuit schemes. The circuit schemes can be used to simulate any given operator by setting the angle values in the circuit. This provides a fixed circuit design whose angles are determined from the elements of the given matrix–which can be non-unitary–in an efficient way. We also give both the classical and quantum complexity analysis for these circuits and show that the circuits require a few classical computations. For the electronic structure simulation on a quantum computer, one has to perform the following steps: prepare the initial wave function of the system; present the evolution operator U=e −iHt for a given atomic and molecular Hamiltonian H in terms of quantum gates array and apply the phase estimation algorithm to find the energy eigenvalues. Thus, in the circuit model of quantum computing for quantum chemistry, a crucial step is presenting the evolution operator for the atomic and molecular Hamiltonians in terms of quantum gate arrays. Since the presented circuit designs are independent from the matrix decomposition techniques and the global optimization processes used to find quantum circuits for a given operator, high accuracy simulations can be done for the unitary propagators of molecular Hamiltonians on quantum computers. As an example, we show how to build the circuit design for the hydrogen molecule.

  11. Circuit drawings in electrical energy technology. 6. rev. ed.

    International Nuclear Information System (INIS)

    Weinert, J.

    1991-01-01

    This book contains a survey of the most important standards for graphical symbols and circuit documents for the area of electrical energy technology; it explains the circuit symbols in their construction and in their material and mental contents of terms; it contains a comparison of the circuit symbols from the DIN standards and the new DINTEC symbols taken from harmonisation, produced by arrangement in the picture column with the addition of the letters IEC; it contains a selection of circuit symbols of the IEC, USA, Canada and Great Britain; it supplements the necessary standards for producing circuit documents by extracts and references; it shows examples for the symbols of electrical equipment by using circuit symbols; it develops and explains the various kinds of representation of electrical circuits by circuit diagrams; it leads to reading and understanding the functioning of circuits by descriptions of functions; it gives examples of applications for designing and producing circuit documents, as used in practice; it contributes to arranging electrical plant according to the 'recognised rules of electrical engineering' and increasing safety by reference to the DIN-VDE regulations connected with representation, and it is a great help in designing electrical energy plant by its technical and electrical data. (orig.) [de

  12. Technology CAD for germanium CMOS circuit

    Energy Technology Data Exchange (ETDEWEB)

    Saha, A.R. [Department of Electronics and ECE, IIT Kharagpur, Kharagpur-721302 (India)]. E-mail: ars.iitkgp@gmail.com; Maiti, C.K. [Department of Electronics and ECE, IIT Kharagpur, Kharagpur-721302 (India)

    2006-12-15

    Process simulation for germanium MOSFETs (Ge-MOSFETs) has been performed in 2D SILVACO virtual wafer fabrication (VWF) suite towards the technology CAD for Ge-CMOS process development. Material parameters and mobility models for Germanium were incorporated in simulation via C-interpreter function. We also report on the device design issues along with the DC and RF characterization of the bulk Ge-MOSFETs, AC parameter extraction and circuit simulation of Ge-CMOS. Simulation results are compared with bulk-Si devices. Simulations predict a cut-off frequency, f {sub T} of about 175 GHz for Ge-MOSFETs compared to 70 GHz for a similar gate-length Si MOSFET. For a single stage Ge-CMOS inverter circuit, a GATE delay of 0.6 ns is predicted.

  13. Technology CAD for germanium CMOS circuit

    International Nuclear Information System (INIS)

    Saha, A.R.; Maiti, C.K.

    2006-01-01

    Process simulation for germanium MOSFETs (Ge-MOSFETs) has been performed in 2D SILVACO virtual wafer fabrication (VWF) suite towards the technology CAD for Ge-CMOS process development. Material parameters and mobility models for Germanium were incorporated in simulation via C-interpreter function. We also report on the device design issues along with the DC and RF characterization of the bulk Ge-MOSFETs, AC parameter extraction and circuit simulation of Ge-CMOS. Simulation results are compared with bulk-Si devices. Simulations predict a cut-off frequency, f T of about 175 GHz for Ge-MOSFETs compared to 70 GHz for a similar gate-length Si MOSFET. For a single stage Ge-CMOS inverter circuit, a GATE delay of 0.6 ns is predicted

  14. Fermionic models with superconducting circuits

    Energy Technology Data Exchange (ETDEWEB)

    Las Heras, Urtzi; Garcia-Alvarez, Laura; Mezzacapo, Antonio; Lamata, Lucas [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); Solano, Enrique [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); IKERBASQUE, Basque Foundation for Science, Bilbao (Spain)

    2015-12-01

    We propose a method for the efficient quantum simulation of fermionic systems with superconducting circuits. It consists in the suitable use of Jordan-Wigner mapping, Trotter decomposition, and multiqubit gates, be with the use of a quantum bus or direct capacitive couplings. We apply our method to the paradigmatic cases of 1D and 2D Fermi-Hubbard models, involving couplings with nearest and next-nearest neighbours. Furthermore, we propose an optimal architecture for this model and discuss the benchmarking of the simulations in realistic circuit quantum electrodynamics setups. (orig.)

  15. Functional end-arterial circulation of the choroid assessed by using fat embolism and electric circuit simulation.

    Science.gov (United States)

    Lee, Ji Eun; Ahn, Ki Su; Park, Keun Heung; Pak, Kang Yeun; Kim, Hak Jin; Byon, Ik Soo; Park, Sung Who

    2017-05-30

    The discrepancy in the choroidal circulation between anatomy and function has remained unsolved for several decades. Postmortem cast studies revealed extensive anastomotic channels, but angiographic studies indicated end-arterial circulation. We carried out experimental fat embolism in cats and electric circuit simulation. Perfusion defects were observed in two categories. In the scatter perfusion defects suggesting an embolism at the terminal arterioles, fluorescein dye filled the non-perfused lobule slowly from the adjacent perfused lobule. In the segmental perfusion defects suggesting occlusion of the posterior ciliary arteries, the hypofluorescent segment became perfused by spontaneous resolution of the embolism without subsequent smaller infarction. The angiographic findings could be simulated with an electric circuit. Although electric currents flowed to the disconnected lobule, the level was very low compared with that of the connected ones. The choroid appeared to be composed of multiple sectors with no anastomosis to other sectors, but to have its own anastomotic arterioles in each sector. Blood flows through the continuous choriocapillaris bed in an end-arterial nature functionally to follow a pressure gradient due to the drainage through the collector venule.

  16. Simulation and Modeling Capability for Standard Modular Hydropower Technology

    Energy Technology Data Exchange (ETDEWEB)

    Stewart, Kevin M. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Smith, Brennan T. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Witt, Adam M. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); DeNeale, Scott T. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Bevelhimer, Mark S. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Pries, Jason L. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Burress, Timothy A. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Kao, Shih-Chieh [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Mobley, Miles H. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Lee, Kyutae [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Curd, Shelaine L. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Tsakiris, Achilleas [Univ. of Tennessee, Knoxville, TN (United States); Mooneyham, Christian [Univ. of Tennessee, Knoxville, TN (United States); Papanicolaou, Thanos [Univ. of Tennessee, Knoxville, TN (United States); Ekici, Kivanc [Univ. of Tennessee, Knoxville, TN (United States); Whisenant, Matthew J. [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States); Welch, Tim [US Department of Energy, Washington, DC (United States); Rabon, Daniel [US Department of Energy, Washington, DC (United States)

    2017-08-01

    Grounded in the stakeholder-validated framework established in Oak Ridge National Laboratory’s SMH Exemplary Design Envelope Specification, this report on Simulation and Modeling Capability for Standard Modular Hydropower (SMH) Technology provides insight into the concepts, use cases, needs, gaps, and challenges associated with modeling and simulating SMH technologies. The SMH concept envisions a network of generation, passage, and foundation modules that achieve environmentally compatible, cost-optimized hydropower using standardization and modularity. The development of standardized modeling approaches and simulation techniques for SMH (as described in this report) will pave the way for reliable, cost-effective methods for technology evaluation, optimization, and verification.

  17. Model Order Reduction for Electronic Circuits:

    DEFF Research Database (Denmark)

    Hjorth, Poul G.; Shontz, Suzanne

    Electronic circuits are ubiquitous; they are used in numerous industries including: the semiconductor, communication, robotics, auto, and music industries (among many others). As products become more and more complicated, their electronic circuits also grow in size and complexity. This increased...... in the semiconductor industry. Circuit simulation proceeds by using Maxwell’s equations to create a mathematical model of the circuit. The boundary element method is then used to discretize the equations, and the variational form of the equations are then solved on the graph network....

  18. Critical Review of Commercial Secondary Lithium-Ion Battery Safety Standards

    Science.gov (United States)

    Jones, Harry P.; Chapin, Thomas, J.; Tabaddor, Mahmod

    2010-09-01

    The development of Li-ion cells with greater energy density has lead to safety concerns that must be carefully assessed as Li-ion cells power a wide range of products from consumer electronics to electric vehicles to space applications. Documented field failures and product recalls for Li-ion cells, mostly for consumer electronic products, highlight the risk of fire, smoke, and even explosion. These failures have been attributed to the occurrence of internal short circuits and the subsequent thermal runaway that can lead to fire and explosion. As packaging for some applications include a large number of cells, the risk of failure is likely to be magnified. To address concerns about the safety of battery powered products, safety standards have been developed. This paper provides a review of various international safety standards specific to lithium-ion cells. This paper shows that though the standards are harmonized on a host of abuse conditions, most lack a test simulating internal short circuits. This paper describes some efforts to introduce internal short circuit tests into safety standards.

  19. An educational laboratory virtual instrumentation suite assisted experiment for studying fundamentals of series resistance-inductance-capacitance circuit

    Science.gov (United States)

    Rana, K. P. S.; Kumar, Vineet; Mendiratta, Jatin

    2017-11-01

    One of the most elementary concepts in freshmen Electrical Engineering subject comprises the Resistance-Inductance-Capacitance (RLC) circuit fundamentals, that is, their time and frequency domain responses. For a beginner, generally, it is difficult to understand and appreciate the step and the frequency responses, particularly the resonance. This paper proposes a student-friendly teaching and learning approach by inculcating the multifaceted versatile software LabVIEWTM along with the educational laboratory virtual instrumentation suite hardware, for studying the RLC circuit time and frequency domain responses. The proposed approach has offered an interactive laboratory experiment where students can model circuits in simulation and hardware circuits on prototype board, and then compare their performances. The theoretical simulations and the obtained experimental data are found to be in very close agreement, thereby enhancing the conviction of students. Finally, the proposed methodology was also subjected to the assessment of learning outcomes based on student feedback, and an average score of 8.05 out of 10 with a standard deviation of 0.471 was received, indicating the overall satisfaction of the students.

  20. Development of simulated and ovine models of extracorporeal life support to improve understanding of circuit-host interactions.

    Science.gov (United States)

    Shekar, Kiran; Fung, Yoke L; Diab, Sara; Mullany, Daniel V; McDonald, Charles I; Dunster, Kimble R; Fisquet, Stephanie; Platts, David G; Stewart, David; Wallis, Steven C; Smith, Maree T; Roberts, Jason A; Fraser, John F

    2012-06-01

    Extracorporeal life support (ECLS) is a lifesaving technology that is being increasingly used in patients with severe cardiorespiratory failure. However, ECLS is not without risks. The biosynthetic interface between the patient and the circuit can significantly alter inflammation, coagulation, pharmacokinetics and disposition of trace elements. The relative contributions of the pump, disease and patient in propagating these alterations are difficult to quantify in critically ill patients with multiple organ failure. To design a model where the relevance of individual components could be assessed, in isolation and in combination. Four ECLS models were developed and tested - an in-vitro simulated ECLS circuit; and ECLS in healthy sheep, sheep with acute lung injury (ALI), and sheep with ALI together with transfusion of old or new blood. Successful design of in-vitro and in-vivo models. We successfully conducted multiple experiments in the simulated circuits and ECLS runs in healthy and ALI sheep. We obtained preliminary data on inflammation, coagulation, histology, pharmacokinetics and trace element disposition during ECLS. The establishment of in-vitro and in-vivo models provides a powerful means for enhancing knowledge of the pathophysiology associated with ECLS and identification of key factors likely to influence patient outcomes. A clearer description of the contribution of disease and therapeutic interventions may allow improved design of equipment, membranes, medicines and physiological goals for improved patient care.

  1. A novel charge pump drive circuit for power MOSFETs

    International Nuclear Information System (INIS)

    Wang Songlin; Zhou Bo; Wang Hui; Guo Wangrui; Ye Qiang

    2010-01-01

    Novel improved power metal oxide semiconductor field effect transistor (MOSFET) drive circuits are introduced. An anti-deadlock block is used in the P-channel power MOSFET drive circuit to avoid deadlocks and improve the transient response. An additional charging path is added to the N-channel power MOSFET drive circuit to enhance its drive capability and improve the transient response. The entire circuit is designed in a 0.6 μm BCD process and simulated with Cadence Spectre. Compared with traditional power MOSFET drive circuits, the simulation results show that improved P-channel power MOSFET drive circuit makes the rise time reduced from 60 to 14 ns, the fall time reduced from 240 to 30 ns, and its power dissipation reduced from 2 to 1 mW, while the improved N-channel power MOSFET drive circuit makes the rise time reduced from 360 to 27 ns and its power dissipation reduced from 1.1 to 0.8 mW. (semiconductor integrated circuits)

  2. Physically based arc-circuit interaction

    International Nuclear Information System (INIS)

    Zhong-Lie, L.

    1984-01-01

    An integral arc model is extended to study the interaction of the gas blast arc with the test circuit in this paper. The deformation in the waveshapes of arc current and voltage around the current zero has been formulated to first approximation by using a simple model of arc voltage based on the arc core energy conservation. By supplementing with the time scale for the radiation, the time rates of arc processes were amended. Both the contributions of various arc processes and the influence of circuit parameters to the arc-circuit interaction have been estimated by this theory. Analysis generated a new method of calculating test circuit parameters which improves the accurate simulation of arc-circuit interaction. The new method agrees with the published experimental results

  3. Many-body physics with circuit quantum electrodynamics

    International Nuclear Information System (INIS)

    Leib, Martin H.

    2015-01-01

    We present proposals to simulate many-body physics with superconducting circuits. The ''body'' to work with for superconducting circuits is the microwave photon and interaction is induced by the nonlinearity of the Josephson effect. We present two different approaches to simulate Bose-Hubbard physics, one based on a polariton scheme and another with nonlinear resonators. We also present a Dicke-model like simulator for ultrastrongly coupled Josephson junctions to a resonator and show a scheme for implementing long range interactions.

  4. Standardization of transportation classes for object-oriented deployment simulations.

    Energy Technology Data Exchange (ETDEWEB)

    Burke, J. F., Jr.; Howard, D. L.; Jackson, J.; Macal, C. M.; Nevins, M. R.; Van Groningen, C. N.

    1999-07-30

    Many recent efforts to integrate transportation and deployment simulations, although beneficial, have lacked a feature vital for seamless integration: a common data class representation. It is an objective of the Department of Defense (DoD) to standardize all classes used in object-oriented deployment simulations by developing a standard class attribute representation and behavior for all deployment simulations that rely on an underlying class representation. The Extensive Hierarchy and Object Representation for Transportation Simulations (EXHORT) is a collection of three hierarchies that together will constitute a standard and consistent class attribute representation and behavior that could be used directly by a large set of deployment simulations. The first hierarchy is the Transportation Class Hierarchy (TCH), which describes a significant portion of the defense transportation system; the other two deal with infrastructure and resource classes. EXHORT will allow deployment simulations to use the same set of underlying class data, ensure transparent exchanges, reduce the effort needed to integrate simulations, and permit a detailed analysis of the defense transportation system. This paper describes EXHORT's first hierarchy, the TCH, and provides a rationale for why it is a helpful tool for modeling major portions of the defense transportation system.

  5. Measurement, modeling, and simulation of cryogenic SiGe HBT amplifier circuits for fast single spin readout

    Science.gov (United States)

    England, Troy; Curry, Matthew; Carr, Steve; Swartzentruber, Brian; Lilly, Michael; Bishop, Nathan; Carrol, Malcolm

    2015-03-01

    Fast, low-power quantum state readout is one of many challenges facing quantum information processing. Single electron transistors (SETs) are potentially fast, sensitive detectors for performing spin readout of electrons bound to Si:P donors. From a circuit perspective, however, their output impedance and nonlinear conductance are ill suited to drive the parasitic capacitance typical of coaxial conductors used in cryogenic environments, necessitating a cryogenic amplification stage. We will discuss calibration data, as well as modeling and simulation of cryogenic silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) circuits connected to a silicon SET and operating at 4 K. We find a continuum of solutions from simple, single-HBT amplifiers to more complex, multi-HBT circuits suitable for integration, with varying noise levels and power vs. bandwidth tradeoffs. This work was performed, in part, at the Center for Integrated Nanotechnologies, a U.S. DOE Office of Basic Energy Sciences user facility. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a Lockheed-Martin Company, for the U. S. Department of Energy under Contract No. DE-AC04-94AL85000.

  6. Peak reading detector circuit

    International Nuclear Information System (INIS)

    Courtin, E.; Grund, K.; Traub, S.; Zeeb, H.

    1975-01-01

    The peak reading detector circuit serves for picking up the instants during which peaks of a given polarity occur in sequences of signals in which the extreme values, their time intervals, and the curve shape of the signals vary. The signal sequences appear in measuring the foetal heart beat frequence from amplitude-modulated ultrasonic, electrocardiagram, and blood pressure signals. In order to prevent undesired emission of output signals from, e. g., disturbing intermediate extreme values, the circuit consists of the series connections of a circuit to simulate an ideal diode, a strong unit, a discriminator for the direction of charging current, a time-delay circuit, and an electronic switch lying in the decharging circuit of the storage unit. The time-delay circuit thereby causes storing of a preliminary maximum value being used only after a certain time delay for the emission of the output signal. If a larger extreme value occurs during the delay time the preliminary maximum value is cleared and the delay time starts running anew. (DG/PB) [de

  7. First-year university Physics students’ knowledge about direct current circuits: probing improvement in understanding as a function of teaching and learning interventions

    Science.gov (United States)

    Newman, Richard; van der Ventel, Brandon; Hanekom, Crischelle

    2017-07-01

    Probing university students’ understanding of direct-current (DC) resistive circuits is still a field of active physics education research. We report here on a study we conducted of this understanding, where the cohort consisted of students in a large-enrollment first-year physics module. This is a non-calculus based physics module for students in the life sciences stream. The study involved 366 students enrolled in the physics (bio) 154 module at Stellenbosch University in 2015. Students’ understanding of DC resistive circuits was probed by means of a standardized test instrument. The instrument comprises 29 multiple choice questions that students have to answer in ~40 min. Students were required to first complete the standardized test at the start of semester (July 2015). For ease of reference we call this test the pre-test. Students answered the pre-test having no university-level formal exposure to DC circuits in theory or practice. The pre-test therefore served to probe students’ school level knowledge of DC circuits. As the semester progressed students were exposed to a practical (E1), lectures, a prescribed textbook, a tutorial and online videos focusing on DC circuits. The E1 practical required students to solve DC circuit problems by means of physically constructing circuits, algebraically using Kirchhoff's Rules and Ohm’s Law, and by means of simulating circuits using the app iCircuit running on iPads (iOS platform). Each E1 practical involved ~50 students in a three hour session. The practical was repeated three afternoons per week over an eight week period. Twenty three iPads were distributed among students on a practical afternoon in order for them to do the circuit simulations in groups (of 4-5 students). At the end of the practical students were again required to do the standardized test on circuits and complete a survey on their experience of the use of the iPad and iCircuit app. For ease of reference we refer to this second test as the

  8. Proposal of a micromagnetic standard problem for ferromagnetic resonance simulations

    Energy Technology Data Exchange (ETDEWEB)

    Baker, Alexander [Department of Physics, Clarendon Laboratory, University of Oxford, Oxford, 3PU, OX1 (United Kingdom); Beg, Marijan; Ashton, Gregory; Albert, Maximilian; Chernyshenko, Dmitri [Faculty of Engineering and the Environment, University of Southampton, SO17 1BJ, Southampton (United Kingdom); Wang, Weiwei [Department of Physics, Ningbo University, Ningbo, 315211 China (China); Zhang, Shilei [Department of Physics, Clarendon Laboratory, University of Oxford, Oxford, 3PU, OX1 (United Kingdom); Bisotti, Marc-Antonio; Franchin, Matteo [Faculty of Engineering and the Environment, University of Southampton, SO17 1BJ, Southampton (United Kingdom); Hu, Chun Lian; Stamps, Robert [SUPA School of Physics and Astronomy, University of Glasgow, G12, Glasgow, 8QQ United Kingdom (United Kingdom); Hesjedal, Thorsten, E-mail: t.hesjedal1@physics.ox.ac.uk [Department of Physics, Clarendon Laboratory, University of Oxford, Oxford, 3PU, OX1 (United Kingdom); Fangohr, Hans [Faculty of Engineering and the Environment, University of Southampton, SO17 1BJ, Southampton (United Kingdom)

    2017-01-01

    Nowadays, micromagnetic simulations are a common tool for studying a wide range of different magnetic phenomena, including the ferromagnetic resonance. A technique for evaluating reliability and validity of different micromagnetic simulation tools is the simulation of proposed standard problems. We propose a new standard problem by providing a detailed specification and analysis of a sufficiently simple problem. By analyzing the magnetization dynamics in a thin permalloy square sample, triggered by a well defined excitation, we obtain the ferromagnetic resonance spectrum and identify the resonance modes via Fourier transform. Simulations are performed using both finite difference and finite element numerical methods, with OOMMF and Nmag simulators, respectively. We report the effects of initial conditions and simulation parameters on the character of the observed resonance modes for this standard problem. We provide detailed instructions and code to assist in using the results for evaluation of new simulator tools, and to help with numerical calculation of ferromagnetic resonance spectra and modes in general. - Highlights: ●Micromagnetic standard problem for FerroMagnetic Resonance (FMR). ●Overview of FMR simulation techniques. ●Define reproducible test problem with ring down method. ●Example configuration files, scripts and post processing for OOMMF and NMag. ●Code and data available in Ref. [23].

  9. High voltage short plus generation based on avalanche circuit

    International Nuclear Information System (INIS)

    Hu Yuanfeng; Yu Xiaoqi

    2006-01-01

    Simulate the avalanche circuit in series with PSPICE module, design the high voltage short plus generation circuit by avalanche transistor in series for the sweep deflection circuit of streak camera. The output voltage ranges 1.2 KV into 50 ohm load. The rise time of the circuit is less than 3 ns. (authors)

  10. Wide-band polarization controller for Si photonic integrated circuits.

    Science.gov (United States)

    Velha, P; Sorianello, V; Preite, M V; De Angelis, G; Cassese, T; Bianchi, A; Testa, F; Romagnoli, M

    2016-12-15

    A circuit for the management of any arbitrary polarization state of light is demonstrated on an integrated silicon (Si) photonics platform. This circuit allows us to adapt any polarization into the standard fundamental TE mode of a Si waveguide and, conversely, to control the polarization and set it to any arbitrary polarization state. In addition, the integrated thermal tuning allows kilohertz speed which can be used to perform a polarization scrambler. The circuit was used in a WDM link and successfully used to adapt four channels into a standard Si photonic integrated circuit.

  11. A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators

    Directory of Open Access Journals (Sweden)

    Leon Chua

    2012-03-01

    Full Text Available A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.

  12. Study of the formation and transport of corrosion products in PWR primary circuit simulators

    International Nuclear Information System (INIS)

    Noe, M.; Frejaville, G.; Camp, J.J.

    1983-01-01

    The formation, migration and deposition of corrosion products in PWR primary circuits are studied in out-of-reactor loops. The aim of these studies is to limit the build-up of the radiation fields impinging on out-of-flux walls and to reduce the danger of rapid corrosion of fuel cans, taking into account the tougher conditions imposed on current trends in the operation of such industrial plants. Four simulator loops and their respective possibilities and research methods are described. (author)

  13. Post-arc current simulation based on measurement in vacuum circuit breaker with a one-dimensional particle-in-cell model

    Science.gov (United States)

    Jia, Shenli; Mo, Yongpeng; Shi, Zongqian; Li, Junliang; Wang, Lijun

    2017-10-01

    The post-arc dielectric recovery process has a decisive effect on the current interruption performance in a vacuum circuit breaker. The dissipation of residual plasma at the moment of current zero under the transient recovery voltage, which is the first stage of the post-arc dielectric recovery process and forms the post-arc current, has attracted many concerns. A one-dimensional particle-in-cell model is developed to simulate the measured post-arc current in the vacuum circuit breaker in this paper. At first, the parameters of the residual plasma are estimated roughly by the waveform of the post-arc current which is taken from measurements. After that, different components of the post-arc current, which are formed by the movement of charged particles in the residual plasma, are discussed. Then, the residual plasma density is adjusted according to the proportion of electrons and ions absorbed by the post-arc anode derived from the particle-in-cell simulation. After this adjustment, the post-arc current waveform obtained from the simulation is closer to that obtained from measurements.

  14. Low-voltage circuit breaker arcs—simulation and measurements

    International Nuclear Information System (INIS)

    Yang, Fei; Wu, Yi; Rong, Mingzhe; Sun, Hao; Ren, Zhigang; Niu, Chunping; Murphy, Anthony B

    2013-01-01

    As one of the most important electrical components, the low-voltage circuit breaker (LVCB) has been widely used for protection in all types of low-voltage distribution systems. In particular, the low-voltage dc circuit breaker has been arousing great research interest in recent years. In this type of circuit breaker, an air arc is formed in the interrupting process which is a 3D transient arc in a complex chamber geometry with splitter plates. Controlling the arc evolution and the extinction are the most significant problems. This paper reviews published research works referring to LVCB arcs. Based on the working principle, the arcing process is divided into arc commutation, arc motion and arc splitting; we focus our attention on the modelling and measurement of these phases. In addition, previous approaches in papers of the critical physical phenomenon treatment are discussed, such as radiation, metal erosion, wall ablation and turbulence in the air arc. Recommendations for air arc modelling and measurement are presented for further investigation. (topical review)

  15. Hyperchaotic circuit with damped harmonic oscillators

    DEFF Research Database (Denmark)

    Lindberg, Erik; Murali, K.; Tamasevicius, A.

    2001-01-01

    A simple fourth-order hyperchaotic circuit with damped harmonic oscillators is described. ANP3 and PSpice simulations including an eigenvalue study of the linearized Jacobian are presented together with a hardware implementation. The circuit contains two inductors with series resistance, two ideal...... capacitors and one nonlinear active conductor. The Lyapunov exponents are presented to confirm the hyperchaotic nature of the oscillations of the circuit. The nonlinear conductor is realized with a diode. A negative impedance converter and a linear resistor. The performance of the circuit is investigated...... by means of numerical integration of the appropriate differential equations....

  16. DEVICES FOR COOLING ELECTRONIC CIRCUIT BOARDS

    OpenAIRE

    T. A. Ismailov; D. V. Evdulov; A. G. Mustafaev; D. K. Ramazanova

    2014-01-01

    In the work described structural variants of devices for cooling electronic circuit boards, made on the basis of thermoelectric batteries and consumable working substances, implementing uneven process of removing heat from heat-generating components. A comparison of temperature fields of electronic circuit simulator with his uniform and non-uniform cooling. 

  17. Performance prediction for silicon photonics integrated circuits with layout-dependent correlated manufacturing variability.

    Science.gov (United States)

    Lu, Zeqin; Jhoja, Jaspreet; Klein, Jackson; Wang, Xu; Liu, Amy; Flueckiger, Jonas; Pond, James; Chrostowski, Lukas

    2017-05-01

    This work develops an enhanced Monte Carlo (MC) simulation methodology to predict the impacts of layout-dependent correlated manufacturing variations on the performance of photonics integrated circuits (PICs). First, to enable such performance prediction, we demonstrate a simple method with sub-nanometer accuracy to characterize photonics manufacturing variations, where the width and height for a fabricated waveguide can be extracted from the spectral response of a racetrack resonator. By measuring the spectral responses for a large number of identical resonators spread over a wafer, statistical results for the variations of waveguide width and height can be obtained. Second, we develop models for the layout-dependent enhanced MC simulation. Our models use netlist extraction to transfer physical layouts into circuit simulators. Spatially correlated physical variations across the PICs are simulated on a discrete grid and are mapped to each circuit component, so that the performance for each component can be updated according to its obtained variations, and therefore, circuit simulations take the correlated variations between components into account. The simulation flow and theoretical models for our layout-dependent enhanced MC simulation are detailed in this paper. As examples, several ring-resonator filter circuits are studied using the developed enhanced MC simulation, and statistical results from the simulations can predict both common-mode and differential-mode variations of the circuit performance.

  18. Equivalent Circuit for Magnetoelectric Read and Write Operations

    Science.gov (United States)

    Camsari, Kerem Y.; Faria, Rafatul; Hassan, Orchi; Sutton, Brian M.; Datta, Supriyo

    2018-04-01

    We describe an equivalent circuit model applicable to a wide variety of magnetoelectric phenomena and use spice simulations to benchmark this model against experimental data. We use this model to suggest a different mode of operation where the 1 and 0 states are represented not by states with net magnetization (like mx , my, or mz) but by different easy axes, quantitatively described by (mx2-my2), which switches from 0 to 1 through the write voltage. This change is directly detected as a read signal through the inverse effect. The use of (mx2-my2) to represent a bit is a radical departure from the standard convention of using the magnetization (m ) to represent information. We then show how the equivalent circuit can be used to build a device exhibiting tunable randomness and suggest possibilities for extending it to nonvolatile memory with read and write capabilities, without the use of external magnetic fields or magnetic tunnel junctions.

  19. VIRTEX-5 Fpga Implementation of Advanced Encryption Standard Algorithm

    Science.gov (United States)

    Rais, Muhammad H.; Qasim, Syed M.

    2010-06-01

    In this paper, we present an implementation of Advanced Encryption Standard (AES) cryptographic algorithm using state-of-the-art Virtex-5 Field Programmable Gate Array (FPGA). The design is coded in Very High Speed Integrated Circuit Hardware Description Language (VHDL). Timing simulation is performed to verify the functionality of the designed circuit. Performance evaluation is also done in terms of throughput and area. The design implemented on Virtex-5 (XC5VLX50FFG676-3) FPGA achieves a maximum throughput of 4.34 Gbps utilizing a total of 399 slices.

  20. Arc modelling in SF6 circuit breakers

    International Nuclear Information System (INIS)

    Verite, J.C.; Boucher, T.; Comte, A.; Delalondre, C.; Robin-Jouan, P.; Serres, E.; Texier, V.; Barrault, M.; Chevrier, P.; Fievet, C.

    1995-06-01

    The paper presents the work done by an operator, EDF and two manufacturers to improve the physical models and numerical methods used to simulate the behavior of the plasma and cold gas around it in a breaking chamber of the HV SF6 circuit breaker, during the high-current phase. This work concerns flow phenomena, in particular incorporating compressibility and the study of turbulence, the coupling between these flow phenomena and electromagnetic phenomena, and finally, radiation - which plays an essential role in energy transfer during the high-current phase. For this latter aspect, emission but also absorption were proven to play a major role, and the two were introduced into the models. The paper presents the models developed and the results obtained with them for simulation of two circuit breaker mock-ups (a double-pressure circuit breaker mock-up and a self-expanding and rotating arc circuit breaker mock-up). (author)

  1. Improving Heat Transfer Performance of Printed Circuit Boards

    Science.gov (United States)

    Schatzel, Donald V.

    2009-01-01

    This paper will explore the ability of printed circuit boards laminated with a Carbon Core Laminate to transfer heat vs. standard printed circuit boards that use only thick layers of copper. The paper will compare the differences in heat transfer performance of printed circuit boards with and without CCL.

  2. A photonic circuit for complementary frequency shifting, in-phase quadrature/single sideband modulation and frequency multiplication: analysis and integration feasibility

    Science.gov (United States)

    Hasan, Mehedi; Hu, Jianqi; Nikkhah, Hamdam; Hall, Trevor

    2017-08-01

    A novel photonic integrated circuit architecture for implementing orthogonal frequency division multiplexing by means of photonic generation of phase-correlated sub-carriers is proposed. The circuit can also be used for implementing complex modulation, frequency up-conversion of the electrical signal to the optical domain and frequency multiplication. The principles of operation of the circuit are expounded using transmission matrices and the predictions of the analysis are verified by computer simulation using an industry-standard software tool. Non-ideal scenarios that may affect the correct function of the circuit are taken into consideration and quantified. The discussion of integration feasibility is illustrated by a photonic integrated circuit that has been fabricated using 'library' components and which features most of the elements of the proposed circuit architecture. The circuit is found to be practical and may be fabricated in any material platform that offers a linear electro-optic modulator such as organic or ferroelectric thin films hybridized with silicon photonics.

  3. DEVICES FOR COOLING ELECTRONIC CIRCUIT BOARDS

    Directory of Open Access Journals (Sweden)

    T. A. Ismailov

    2014-01-01

    Full Text Available In the work described structural variants of devices for cooling electronic circuit boards, made on the basis of thermoelectric batteries and consumable working substances, implementing uneven process of removing heat from heat-generating components. A comparison of temperature fields of electronic circuit simulator with his uniform and non-uniform cooling. 

  4. Cascade photonic integrated circuit architecture for electro-optic in-phase quadrature/single sideband modulation or frequency conversion.

    Science.gov (United States)

    Hasan, Mehedi; Hall, Trevor

    2015-11-01

    A photonic integrated circuit architecture for implementing frequency upconversion is proposed. The circuit consists of a 1×2 splitter and 2×1 combiner interconnected by two stages of differentially driven phase modulators having 2×2 multimode interference coupler between the stages. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. The intrinsic conversion efficiency of the proposed design is improved by 6 dB over the alternative functionally equivalent circuit based on dual parallel Mach-Zehnder modulators known in the prior art. A two-tone analysis is presented to study the linearity of the proposed circuit, and a comparison is provided over the alternative. The proposed circuit is suitable for integration in any platform that offers linear electro-optic phase modulation such as LiNbO(3), silicon, III-V, or hybrid technology.

  5. D-VASim: Dynamic Virtual Analyzer and Simulator for Genetic Circuits

    DEFF Research Database (Denmark)

    Baig, Hasan; Madsen, Jan

    2015-01-01

    are either assembled from a standard library of well-defined genetic gates or from parts of an available library, for instance, BioBricks. The obtained behavior can be validated through in-silico analysis, solving reaction kinetics using ordinary differential equations (ODEs) or by stochastic simulation...

  6. A study on the equivalent electric circuit simulation model of DBD streamer and glow alternate discharge

    International Nuclear Information System (INIS)

    Yao, J; Zhang, Z T; Xu, S J; Yu, Q X; Yu, Z; Zhao, J S

    2013-01-01

    This paper presents a dynamic simulating model of the dielectric barrier discharge (DBD), structured as an equivalent electric circuit of the streamer and glow discharge generated alternately in DBD. The main parameters of DBD have been established by means of analysing the structural characteristics of a single discharge cell. An electrical comprehensive Simulink /MATLAB model was developed in order to reveal the interaction of the adjacent two discharge cell. A series of simulations was carried out in order to estimate the key structural parameters that affect the alternate streamer and glow discharge mode. The comparison results of experimental and simulate indicate that there exists a close similarity of the current waveforms graphic. Therefore, we can grasp a deep understanding mechanism of the dielectric barrier discharge and optimize the plasma reactor.

  7. Simulation of electronic circuit sensitivity towards humidity using electrochemical data on water layer

    DEFF Research Database (Denmark)

    Joshy, Salil; Verdingovas, Vadimas; Jellesen, Morten Stendahl

    2015-01-01

    Climatic conditions like temperature and humidity have direct influence on the operation of electronic circuits. The effects of temperature on the operation of electronic circuits have been widely investigated, while the effect of humidity and solder flux residues are not well understood including...... the effect on circuit and PCBA (printed circuit board assembly) layout design. This paper elucidates a methodology for analyzing the sensitivity of an electronic circuit based on parasitic circuit analysis using data on electrical property of the water layer formed under humid as well as contaminated...

  8. Memristor-based nanoelectronic computing circuits and architectures

    CERN Document Server

    Vourkas, Ioannis

    2016-01-01

    This book considers the design and development of nanoelectronic computing circuits, systems and architectures focusing particularly on memristors, which represent one of today’s latest technology breakthroughs in nanoelectronics. The book studies, explores, and addresses the related challenges and proposes solutions for the smooth transition from conventional circuit technologies to emerging computing memristive nanotechnologies. Its content spans from fundamental device modeling to emerging storage system architectures and novel circuit design methodologies, targeting advanced non-conventional analog/digital massively parallel computational structures. Several new results on memristor modeling, memristive interconnections, logic circuit design, memory circuit architectures, computer arithmetic systems, simulation software tools, and applications of memristors in computing are presented. High-density memristive data storage combined with memristive circuit-design paradigms and computational tools applied t...

  9. Grounding and shielding circuits and interference

    CERN Document Server

    Morrison, Ralph

    2016-01-01

    Applies basic field behavior in circuit design and demonstrates how it relates to grounding and shielding requirements and techniques in circuit design This book connects the fundamentals of electromagnetic theory to the problems of interference in all types of electronic design. The text covers power distribution in facilities, mixing of analog and digital circuitry, circuit board layout at high clock rates, and meeting radiation and susceptibility standards. The author examines the grounding and shielding requirements and techniques in circuit design and applies basic physics to circuit behavior. The sixth edition of this book has been updated with new material added throughout the chapters where appropriate. The presentation of the book has also been rearranged in order to reflect the current trends in the field.

  10. Superconducting quantum circuits theory and application

    Science.gov (United States)

    Deng, Xiuhao

    Superconducting quantum circuit models are widely used to understand superconducting devices. This thesis consists of four studies wherein the superconducting quantum circuit is used to illustrate challenges related to quantum information encoding and processing, quantum simulation, quantum signal detection and amplification. The existence of scalar Aharanov-Bohm phase has been a controversial topic for decades. Scalar AB phase, defined as time integral of electric potential, gives rises to an extra phase factor in wavefunction. We proposed a superconducting quantum Faraday cage to detect temporal interference effect as a consequence of scalar AB phase. Using the superconducting quantum circuit model, the physical system is solved and resulting AB effect is predicted. Further discussion in this chapter shows that treating the experimental apparatus quantum mechanically, spatial scalar AB effect, proposed by Aharanov-Bohm, can't be observed. Either a decoherent interference apparatus is used to observe spatial scalar AB effect, or a quantum Faraday cage is used to observe temporal scalar AB effect. The second study involves protecting a quantum system from losing coherence, which is crucial to any practical quantum computation scheme. We present a theory to encode any qubit, especially superconducting qubits, into a universal quantum degeneracy point (UQDP) where low frequency noise is suppressed significantly. Numerical simulations for superconducting charge qubit using experimental parameters show that its coherence time is prolong by two orders of magnitude using our universal degeneracy point approach. With this improvement, a set of universal quantum gates can be performed at high fidelity without losing too much quantum coherence. Starting in 2004, the use of circuit QED has enabled the manipulation of superconducting qubits with photons. We applied quantum optical approach to model coupled resonators and obtained a four-wave mixing toolbox to operate photons

  11. FPGA based mixed-signal circuit novel testing techniques

    International Nuclear Information System (INIS)

    Pouros, Sotirios; Vassios, Vassilios; Papakostas, Dimitrios; Hristov, Valentin

    2013-01-01

    Electronic circuits fault detection techniques, especially on modern mixed-signal circuits, are evolved and customized around the world to meet the industry needs. The paper presents techniques used on fault detection in mixed signal circuits. Moreover, the paper involves standardized methods, along with current innovations for external testing like Design for Testability (DfT) and Built In Self Test (BIST) systems. Finally, the research team introduces a circuit implementation scheme using FPGA

  12. Dual Transformer Model based on Standard Circuit Elements for the Study of Low- and Mid-frequency Transients

    Science.gov (United States)

    Jazebi, Saeed

    iron core magnetizing characteristic is modified with the accurate measurement of the air-core inductance. The air-core inductance is measured using a non-ideal low-power rectifier. Its dc output serves to drive the transformer into deep saturation, and its ripple provides low-amplitude variable excitation. The principal advantage of this method is its simplicity. To model the eddy current effects in the windings, a novel equivalent circuit is proposed. The circuit is derived from the principle of duality and therefore, matches the electromagnetic physical behavior of the transformer windings. It properly models the flux paths and current distribution from dc to MHz. The model is synthesized from a non-uniform concentric discretization of the windings. Concise guidelines are given to optimally calculate the width of the sub-divisions for various transient simulations. To compute the circuit parameters only information about the geometry of the windings and about their material properties is needed. The calculation of the circuit parameters does not require an iterative process. Therefore, the parameters are always real, positive, and free from convergence problems. The proposed model is tested with single-phase transformers for the calculation of magnetizing inrush currents, series ferroresonance, and Geomagnetic Induced Currents (GIC). The electromagnetic transient response of the model is compared to laboratory measurements for validation. Also, 3D finite element simulations are used to validate the electromagnetic behavior of the transformer model. Large manufacturer of transformers, power system designers, and electrical utility companies can benefit from the new model. It simplifies the design and optimization of the transformers' insulation, thereby reducing cost, and enhancing reliability of the system. The model could also be used for inrush current and differential protection studies, geomagnetic induced current studies, harmonic penetration studies, and

  13. Evolvable designs of experiments applications for circuits

    CERN Document Server

    Iordache, Octavian

    2009-01-01

    Adopting a groundbreaking approach, the highly regarded author shows how to design methods for planning increasingly complex experiments. He begins with a brief introduction to standard quality methods and the technology in standard electric circuits. The book then gives numerous examples of how to apply the proposed methodology in a series of real-life case studies. Although these case studies are taken from the printed circuit board industry, the methods are equally applicable to other fields of engineering.

  14. Computer-aided engineering of semiconductor integrated circuits

    Science.gov (United States)

    Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

    1980-07-01

    Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

  15. Circuit analysis and computer simulations of ZT-40M

    International Nuclear Information System (INIS)

    Melton, J.G.

    1981-01-01

    The network analysis code SCEPTRE was extensively used to predict circuit performance under both normal and fault conditions. SCEPTRE's capabilities enabled us to include realistic nonlinear models for such components as the PF iron cores, the PCB transformers, the ignition switches, and even the complicated way in which the plasma couples the two circuits. Fault conditions for which protective measures were devised include; failure to achieve gas breakdown; disruption of the plasma current; saturation of the PF iron cores; prefire of a crowbar ignitron; overvoltage due to transients on the coax cables

  16. A real-time computer simulation of nuclear simulator software using standard PC hardware and linux environments

    International Nuclear Information System (INIS)

    Cha, K. H.; Kweon, K. C.

    2001-01-01

    A feasibility study, which standard PC hardware and Real-Time Linux are applied to real-time computer simulation of software for a nuclear simulator, is presented in this paper. The feasibility prototype was established with the existing software in the Compact Nuclear Simulator (CNS). Throughout the real-time implementation in the feasibility prototype, we has identified that the approach can enable the computer-based predictive simulation to be approached, due to both the remarkable improvement in real-time performance and the less efforts for real-time implementation under standard PC hardware and Real-Time Linux envrionments

  17. Design of nuclear pulse shaped circuit based on proportional counter

    International Nuclear Information System (INIS)

    Song Qianqian; Cheng Yi; Tuo Xianguo

    2011-01-01

    Use the self-developed proportional to sample gas tritium in environment and make the measurement. For this detector, a kind of pulse shape circuit based on second order active low pass filtering circuit realized filtering and shaping nuclear pulse by high-speed operational amplifier, with less stages that has been approved for filter Gaussian wave. Use Multisim 10.0 to simulate the different parameters of the filter circuit. The simulation result was consistent with the theoretical results. The experiments proved the feasibility of this circuit, and at the same time provided a convenient and reliable method for analysis and optimization of the nuclear pulse waveform in order for discriminating by MCA. (authors)

  18. Thermoreflectance temperature imaging of integrated circuits: calibration technique and quantitative comparison with integrated sensors and simulations

    International Nuclear Information System (INIS)

    Tessier, G; Polignano, M-L; Pavageau, S; Filloy, C; Fournier, D; Cerutti, F; Mica, I

    2006-01-01

    Camera-based thermoreflectance microscopy is a unique tool for high spatial resolution thermal imaging of working integrated circuits. However, a calibration is necessary to obtain quantitative temperatures on the complex surface of integrated circuits. The spatial and temperature resolutions reached by thermoreflectance are excellent (360 nm and 2.5 x 10 -2 K in 1 min here), but the precision is more difficult to assess, notably due to the lack of comparable thermal techniques at submicron scales. We propose here a Peltier element control of the whole package temperature in order to obtain calibration coefficients simultaneously on several materials visible on the surface of the circuit. Under high magnifications, movements associated with thermal expansion are corrected using a piezo electric displacement and a software image shift. This calibration method has been validated by comparison with temperatures measured using integrated thermistors and diodes and by a finite volume simulation. We show that thermoreflectance measurements agree within a precision of ±2.3% with the on-chip sensors measurements. The diode temperature is found to underestimate the actual temperature of the active area by almost 70% due to the thermal contact of the diode with the substrate, acting as a heat sink

  19. Two New Families of Floating FDNR Circuits

    Directory of Open Access Journals (Sweden)

    Ahmed M. Soliman

    2010-01-01

    Full Text Available Two new configurations for realizing ideal floating frequency-dependent negative resistor elements (FDNR are introduced. The proposed circuits are symmetrical and are realizable by four CCII or ICCII or a combination of both. Each configuration is realizable by eight different circuits. Simulation results are included to support the theory.

  20. Modeling the cosmic-ray-induced soft-error rate in integrated circuits: An overview

    International Nuclear Information System (INIS)

    Srinivasan, G.R.

    1996-01-01

    This paper is an overview of the concepts and methodologies used to predict soft-error rates (SER) due to cosmic and high-energy particle radiation in integrated circuit chips. The paper emphasizes the need for the SER simulation using the actual chip circuit model which includes device, process, and technology parameters as opposed to using either the discrete device simulation or generic circuit simulation that is commonly employed in SER modeling. Concepts such as funneling, event-by-event simulation, nuclear history files, critical charge, and charge sharing are examined. Also discussed are the relative importance of elastic and inelastic nuclear collisions, rare event statistics, and device vs. circuit simulations. The semi-empirical methodologies used in the aerospace community to arrive at SERs [also referred to as single-event upset (SEU) rates] in integrated circuit chips are reviewed. This paper is one of four in this special issue relating to SER modeling. Together, they provide a comprehensive account of this modeling effort, which has resulted in a unique modeling tool called the Soft-Error Monte Carlo Model, or SEMM

  1. Standard for Models and Simulations

    Science.gov (United States)

    Steele, Martin J.

    2016-01-01

    This NASA Technical Standard establishes uniform practices in modeling and simulation to ensure essential requirements are applied to the design, development, and use of models and simulations (MS), while ensuring acceptance criteria are defined by the program project and approved by the responsible Technical Authority. It also provides an approved set of requirements, recommendations, and criteria with which MS may be developed, accepted, and used in support of NASA activities. As the MS disciplines employed and application areas involved are broad, the common aspects of MS across all NASA activities are addressed. The discipline-specific details of a given MS should be obtained from relevant recommended practices. The primary purpose is to reduce the risks associated with MS-influenced decisions by ensuring the complete communication of the credibility of MS results.

  2. Applications of modularized circuit designs in a new hyper-chaotic system circuit implementation

    Science.gov (United States)

    Wang, Rui; Sun, Hui; Wang, Jie-Zhi; Wang, Lu; Wang, Yan-Chao

    2015-02-01

    Modularized circuit designs for chaotic systems are introduced in this paper. Especially, a typical improved modularized design strategy is proposed and applied to a new hyper-chaotic system circuit implementation. In this paper, the detailed design procedures are described. Multisim simulations and physical experiments are conducted, and the simulation results are compared with Matlab simulation results for different system parameter pairs. These results are consistent with each other and they verify the existence of the hyper-chaotic attractor for this new hyper-chaotic system. Project supported by the Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 61403395), the Natural Science Foundation of Tianjin, China (Grant No. 13JCYBJC39000), the Scientific Research Foundation for the Returned Overseas Chinese Scholars, State Education Ministry of China, the Fund from the Tianjin Key Laboratory of Civil Aircraft Airworthiness and Maintenance in Civil Aviation of China (Grant No. 104003020106), the National Basic Research Program of China (Grant No. 2014CB744904), and the Fund for the Scholars of Civil Aviation University of China (Grant No. 2012QD21x).

  3. A new approach of optimization procedure for superconducting integrated circuits

    International Nuclear Information System (INIS)

    Saitoh, K.; Soutome, Y.; Tarutani, Y.; Takagi, K.

    1999-01-01

    We have developed and tested a new circuit simulation procedure for superconducting integrated circuits which can be used to optimize circuit parameters. This method reveals a stable operation region in the circuit parameter space in connection with the global bias margin by means of a contour plot of the global bias margin versus the circuit parameters. An optimal set of parameters with margins larger than these of the initial values has been found in the stable region. (author)

  4. Multi-valued logic circuits using hybrid circuit consisting of three gates single-electron transistors (TG-SETs) and MOSFETs.

    Science.gov (United States)

    Shin, SeungJun; Yu, YunSeop; Choi, JungBum

    2008-10-01

    New multi-valued logic (MVL) families using the hybrid circuits consisting of three gates single-electron transistors (TG-SETs) and a metal-oxide-semiconductor field-effect transistor (MOSFET) are proposed. The use of SETs offers periodic literal characteristics due to Coulomb oscillation of SET, which allows a realization of binary logic (BL) circuits as well as multi-valued logic (MVL) circuits. The basic operations of the proposed MVL families are successfully confirmed through SPICE circuit simulation based on the physical device model of a TG-SET. The proposed MVL circuits are found to be much faster, but much larger power consumption than a previously reported MVL, and they have a trade-off between speed and power consumption. As an example to apply the newly developed MVL families, a half-adder is introduced.

  5. Receiver Front-End Circuits for Future Generations of Wireless Communications

    NARCIS (Netherlands)

    Sanduleanu, M.A.T.; Vidojkovic - Andjelovic, M.; Vidojkovic, V.; Roermund, van A.H.M.; Tasic, A.

    2007-01-01

    In this paper, new receiver concepts and CMOS circuits for future wireless communications standards are introduced. Tradeoffs between technology, performance and circuit choices of the RF front-end circuits are discussed. In particular, power consumption, noise figure and linearity trade-offs in

  6. The shared circuits model (SCM): how control, mirroring, and simulation can enable imitation, deliberation, and mindreading.

    Science.gov (United States)

    Hurley, Susan

    2008-02-01

    Imitation, deliberation, and mindreading are characteristically human sociocognitive skills. Research on imitation and its role in social cognition is flourishing across various disciplines. Imitation is surveyed in this target article under headings of behavior, subpersonal mechanisms, and functions of imitation. A model is then advanced within which many of the developments surveyed can be located and explained. The shared circuits model (SCM) explains how imitation, deliberation, and mindreading can be enabled by subpersonal mechanisms of control, mirroring, and simulation. It is cast at a middle, functional level of description, that is, between the level of neural implementation and the level of conscious perceptions and intentional actions. The SCM connects shared informational dynamics for perception and action with shared informational dynamics for self and other, while also showing how the action/perception, self/other, and actual/possible distinctions can be overlaid on these shared informational dynamics. It avoids the common conception of perception and action as separate and peripheral to central cognition. Rather, it contributes to the situated cognition movement by showing how mechanisms for perceiving action can be built on those for active perception.;>;>The SCM is developed heuristically, in five layers that can be combined in various ways to frame specific ontogenetic or phylogenetic hypotheses. The starting point is dynamic online motor control, whereby an organism is closely attuned to its embedding environment through sensorimotor feedback. Onto this are layered functions of prediction and simulation of feedback, mirroring, simulation of mirroring, monitored inhibition of motor output, and monitored simulation of input. Finally, monitored simulation of input specifying possible actions plus inhibited mirroring of such possible actions can generate information about the possible as opposed to actual instrumental actions of others, and the

  7. Reverse engineering of integrated circuits

    Science.gov (United States)

    Chisholm, Gregory H.; Eckmann, Steven T.; Lain, Christopher M.; Veroff, Robert L.

    2003-01-01

    Software and a method therein to analyze circuits. The software comprises several tools, each of which perform particular functions in the Reverse Engineering process. The analyst, through a standard interface, directs each tool to the portion of the task to which it is most well suited, rendering previously intractable problems solvable. The tools are generally used iteratively to produce a successively more abstract picture of a circuit, about which incomplete a priori knowledge exists.

  8. TCAD analysis of short-circuit oscillations in IGBTs

    DEFF Research Database (Denmark)

    Reigosa, Paula Diaz; Iannuzzo, Francesco; Rahimo, Munaf

    2017-01-01

    Insulated-Gate Bipolar Transistors (IGBTs) exhibit a gate-voltage oscillation phenomenon during short-circuit, which can result in a gate-oxide breakdown. The oscillations have been investigated through device simulations and experimental investigations of a 3.3-kV IGBT. It has been found...... during short circuit....

  9. Pulse generator circuit triggerable by nuclear radiation

    International Nuclear Information System (INIS)

    Fredrickson, P.B.

    1980-01-01

    A pulse generator circuit triggerable by a pulse of nuclear radiation is described. The pulse generator circuit includes a pair of transistors arranged, together with other electrical components, in the topology of a standard monostable multivibrator circuit. The circuit differs most significantly from a standard monostable multivibrator circuit in that the circuit is adapted to be triggered by a pulse of nuclear radiation rather than electrically and the transistors have substantially different sensitivities to radiation, due to different physical and electrical characteristics and parameters. One of the transistors is employed principally as a radiation detector and is in a normally non-conducting state and the other transistor is normally in a conducting state. When the circuit is exposed to a pulse of nuclear radiation, currents are induced in the collector-base junctions of both transistors but, due to the different radiation sensitivities of the transistors, the current induced in the collector-base junction of the radiation-detecting transistor is substantially greater than that induced in the collector-base junction of the other transistor. The pulse of radiation causes the radiation-detecting transistor to operate in its conducting state, causing the other transistor to operate in its non-conducting state. As the radiation-detecting transistor operates in its conducting state, an output signal is produced at an output terminal connected to the radiation-detecting transistor indicating the presence of a predetermined intensity of nuclear radiation

  10. A new high-voltage level-shifting circuit for half-bridge power ICs

    International Nuclear Information System (INIS)

    Kong Moufu; Chen Xingbi

    2013-01-01

    In order to reduce the chip area and improve the reliability of HVICs, a new high-voltage level-shifting circuit with an integrated low-voltage power supply, two PMOS active resistors and a current mirror is proposed. The integrated low-voltage power supply not only provides energy for the level-shifting circuit and the logic circuit, but also provides voltage signals for the gates and sources of the PMOS active resistors to ensure that they are normally-on. The normally-on PMOS transistors do not, therefore, need to be fabricated in the depletion process. The current mirror ensures that the level-shifting circuit has a constant current, which can reduce the process error of the high-voltage devices of the circuit. Moreover, an improved RS trigger is also proposed to improve the reliability of the circuit. The proposed level-shifting circuit is analyzed and confirmed by simulation with MEDICI, and the simulation results show that the function is achieved well. (semiconductor integrated circuits)

  11. Stability of operation versus temperature of a three-phase clock-driven chaotic circuit

    International Nuclear Information System (INIS)

    Zhou Ji-Chao; Son Hyunsik; Song Han Jung; Kim Namtae

    2013-01-01

    We evaluate the influence of temperature on the behavior of a three-phase clock-driven metal—oxide—semiconductor (MOS) chaotic circuit. The chaotic circuit consists of two nonlinear functions, a level shifter, and three sample and hold blocks. It is necessary to analyze a CMOS-based chaotic circuit with respect to variation in temperature for stability because the circuit is sensitive to the behavior of the circuit design parameters. The temperature dependence of the proposed chaotic circuit is investigated via the simulation program with integrated circuit emphasis (SPICE) using 0.6-μm CMOS process technology with a 5-V power supply and a 20-kHz clock frequency. The simulation results demonstrate the effects of temperature on the chaotic dynamics of the proposed chaotic circuit. The time series, frequency spectra, bifurcation phenomena, and Lyapunov exponent results are provided. (general)

  12. Arc modelling in SF{sub 6} circuit breakers

    Energy Technology Data Exchange (ETDEWEB)

    Verite, J.C. [Electricite de France, Clamart (France). Derection des Etudes et Recherches; Boucher, T.; Comte, A. [Electricite de France, Moret sur Loing (France). Direction des Etudes et Recherches; Delalondre, C. [Electricite de France, Chatou (France). Direction des Etudes et Recherches; Robin-Jouan, P.; Serres, E.; Texier, V. [GEC Alsthom, Villeurbanne (France). Direction Technique Haute et Moyenne Tension; Barrault, M.; Chevrier, P.; Fievet, C. [CEA Centre d`Etudes Nucleaires de Grenoble, 38 (France). Merlin Gerin

    1995-06-01

    The paper presents the work done by an operator, EDF and two manufacturers to improve the physical models and numerical methods used to simulate the behavior of the plasma and cold gas around it in a breaking chamber of the HV SF6 circuit breaker, during the high-current phase. This work concerns flow phenomena, in particular incorporating compressibility and the study of turbulence, the coupling between these flow phenomena and electromagnetic phenomena, and finally, radiation - which plays an essential role in energy transfer during the high-current phase. For this latter aspect, emission but also absorption were proven to play a major role, and the two were introduced into the models. The paper presents the models developed and the results obtained with them for simulation of two circuit breaker mock-ups (a double-pressure circuit breaker mock-up and a self-expanding and rotating arc circuit breaker mock-up). (author) 10 refs.

  13. Automatic design of digital synthetic gene circuits.

    Directory of Open Access Journals (Sweden)

    Mario A Marchisio

    2011-02-01

    Full Text Available De novo computational design of synthetic gene circuits that achieve well-defined target functions is a hard task. Existing, brute-force approaches run optimization algorithms on the structure and on the kinetic parameter values of the network. However, more direct rational methods for automatic circuit design are lacking. Focusing on digital synthetic gene circuits, we developed a methodology and a corresponding tool for in silico automatic design. For a given truth table that specifies a circuit's input-output relations, our algorithm generates and ranks several possible circuit schemes without the need for any optimization. Logic behavior is reproduced by the action of regulatory factors and chemicals on the promoters and on the ribosome binding sites of biological Boolean gates. Simulations of circuits with up to four inputs show a faithful and unequivocal truth table representation, even under parametric perturbations and stochastic noise. A comparison with already implemented circuits, in addition, reveals the potential for simpler designs with the same function. Therefore, we expect the method to help both in devising new circuits and in simplifying existing solutions.

  14. Superconducting quantum circuits theory and application

    OpenAIRE

    Deng, Xiuhao

    2015-01-01

    Superconducting quantum circuit models are widely used to understand superconducting devices. This thesis consists of four studies wherein the superconducting quantum circuit is used to illustrate challenges related to quantum information encoding and processing, quantum simulation, quantum signal detection and amplification.The existence of scalar Aharanov-Bohm phase has been a controversial topic for decades. Scalar AB phase, defined as time integral of electric potential, gives rises to a...

  15. On equivalent resistance of electrical circuits

    Science.gov (United States)

    Kagan, Mikhail

    2015-01-01

    While the standard (introductory physics) way of computing the equivalent resistance of nontrivial electrical circuits is based on Kirchhoff's rules, there is a mathematically and conceptually simpler approach, called the method of nodal potentials, whose basic variables are the values of the electric potential at the circuit's nodes. In this paper, we review the method of nodal potentials and illustrate it using the Wheatstone bridge as an example. We then derive a closed-form expression for the equivalent resistance of a generic circuit, which we apply to a few sample circuits. The result unveils a curious interplay between electrical circuits, matrix algebra, and graph theory and its applications to computer science. The paper is written at a level accessible by undergraduate students who are familiar with matrix arithmetic. Additional proofs and technical details are provided in appendices.

  16. An Icepak-PSpice Co-Simulation Method to Study the Impact of Bond Wires Fatigue on the Current and Temperature Distribution of IGBT Modules under Short-Circuit

    DEFF Research Database (Denmark)

    Wu, Rui; Iannuzzo, Francesco; Wang, Huai

    2014-01-01

    Bond wires fatigue is one of the dominant failure mechanisms of IGBT modules. Prior-art research mainly focuses on its impact on the end-of-life failure, while its effect on the short-circuit capability of IGBT modules is still an open issue. This paper proposes a new electro-thermal simulation...... approach enabling analyze the impact of the bond wires fatigue on the current and temperature distribution on IGBT chip surface under short-circuit. It is based on an Icepack-PSpice co-simulation by taking the advantage of both a finite element thermal model and an advanced PSpice-based multi-cell IGBT...

  17. Capacitive effects in IGBTs limiting their reliability under short circuit

    DEFF Research Database (Denmark)

    Reigosa, Paula Diaz; Iannuzzo, Francesco; Rahimo, Munaf

    2017-01-01

    The short-circuit oscillation mechanism in IGBTs is investigated in this paper by the aid of semiconductor device simulation tools. A 3.3-kV IGBT cell has been used for the simulations demonstrating that a single IGBT cell is able to oscillate together with the external circuit parasitic elements....... The work presented here through both circuit and device analysis, confirms that the oscillations can be understood with focus on the device capacitive effects coming from the interaction between carrier concentration and the electric field. The paper also shows the 2-D effects during one oscillation cycle...

  18. 30 CFR 75.601 - Short circuit protection of trailing cables.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Short circuit protection of trailing cables. 75... MINE SAFETY AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Trailing Cables § 75.601 Short circuit protection of trailing cables. [Statutory Provisions] Short circuit protection for trailing cables...

  19. Textbook Error: Short Circuiting on Electrochemical Cell

    Science.gov (United States)

    Bonicamp, Judith M.; Clark, Roy W.

    2007-01-01

    Short circuiting an electrochemical cell is an unreported but persistent error in the electrochemistry textbooks. It is suggested that diagrams depicting a cell delivering usable current to a load be postponed, the theory of open-circuit galvanic cells is explained, the voltages from the tables of standard reduction potentials is calculated and…

  20. A Alternative Analog Circuit Design Methodology Employing Integrated Artificial Intelligence Techniques

    Science.gov (United States)

    Tuttle, Jeffery L.

    In consideration of the computer processing power now available to the designer, an alternative analog circuit design methodology is proposed. Computer memory capacities no longer require the reduction of the transistor operational characteristics to an imprecise formulation. Therefore, it is proposed that transistor modelling be abandoned in favor of fully characterized transistor data libraries. Secondly, availability of the transistor libraries would facilitate an automated selection of the most appropriate device(s) for the circuit being designed. More specifically, a preprocessor computer program to a more sophisticated circuit simulator (e.g. SPICE) is developed to assist the designer in developing the basic circuit topology and the selection of the most appropriate transistor. Once this is achieved, the circuit topology and selected transistor data library would be downloaded to the simulator for full circuit operational characterization and subsequent design modifications. It is recognized that the design process is enhanced by the use of heuristics as applied to iterative design results. Accordingly, an artificial intelligence (AI) interface is developed to assist the designer in applying the preprocessor results. To demonstrate the retrofitability of the AI interface to established programs, the interface is specifically designed to be as non-intrusive to the host code as possible. Implementation of the proposed methodology offers the potential to speed the design process, since the preprocessor both minimizes the required number of simulator runs and provides a higher acceptance potential of the initial and subsequent simulator runs. Secondly, part count reductions may be realizable since the circuit topologies are not as strongly driven by transistor limitations. Thirdly, the predicted results should more closely match actual circuit operations since the inadequacies of the transistor models have been virtually eliminated. Finally, the AI interface

  1. A NEW CONTROL CIRCUIT AND COMPUTER SOFTWARE FOR CONTROLING PHOTOVOLTAIC SYSTEMS

    Directory of Open Access Journals (Sweden)

    Mustafa Berkant SELEK

    2008-02-01

    Full Text Available In this study, a new microcontroller circuit was designed and new computer software was implemented to control power flow currents of renewable energy system, which is established in Solar Energy Institute, Ege University, Bornova, Izmir, Turkey. PIC18F452 microcontroller based electronic circuit was designed to control another electronic circuit that includes power electronic switching components. Readily available standard control circuits are designed for switching single level inverters. In contrary, implemented circuit allows to switch multilevel inverters. In addition, because the efficiency of solar energy panels is considerably low, solar panels should be operated under the maximum power point (MPP. Therefore, MPP algorithm is included in the designed control circuit. Next, the control circuit also includes a serial communication interface based on RS232 standard. Using this interface enables the user to choose all functions available in the control circuit and take status report via computer software. Last, a general purpose command set was designed to establish communication between the computer software and the microcontroller-based control circuit. As a result, it is aimed that this study supply a basis for the researchers who want to develop own control circuits or more visual software.

  2. SEMICONDUCTOR INTEGRATED CIRCUITS: A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth

    Science.gov (United States)

    Tao, Tong; Baoyong, Chi; Ziqiang, Wang; Ying, Zhang; Hanjun, Jiang; Zhihua, Wang

    2010-05-01

    A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth in 0.35 μm CMOS is presented. The circuit consists of two variable gain amplifiers (VGA) in cascade and a Gm-C elliptic low-pass filter (LPF). The filter-order and the cut-off frequency of the LPF can be reconfigured to satisfy the requirements of various applications. In order to achieve the optimum power consumption, the bandwidth of the VGAs can also be dynamically reconfigured and some Gm cells can be cut off in the given application. Simulation results show that the analog baseband circuit consumes 16.8 mW for WLAN, 8.9 mW for WCDMA and only 6.5 mW for Bluetooth, all with a 3 V power supply. The analog baseband circuit could provide -10 to +40 dB variable gain, third-order low pass filtering with 1 MHz cut-off frequency for Bluetooth, fourth-order low pass filtering with 2.2 MHz cut-off frequency for WCDMA, and fifth-order low pass filtering with 11 MHz cut-off frequency for WLAN, respectively.

  3. Mixed-mode chaotic circuit with Wien-bridge configuration: The results of experimental verification

    International Nuclear Information System (INIS)

    Kilic, Recai

    2007-01-01

    In this paper, we deal with the experimentally implementation of inductorless Wien bridge-based mixed-mode chaotic circuit (MMCC) which is capable to exhibit both linear and nonlinear oscillations. The results of experimental implementation agree with the results of theoretical and computer simulation presented in literature. Since the proposed implementation of MMCC circuit uses different design blocks such as Wien bridge-based autonomous circuit part, CFOA (current feedback operational amplifier)-based floating inductance simulator, CFOA-based Chua's diode and switching mechanism, it offers very versatile chaotic circuit model for studying autonomous and nonautonomous chaotic dynamics

  4. Programming languages for circuit design.

    Science.gov (United States)

    Pedersen, Michael; Yordanov, Boyan

    2015-01-01

    This chapter provides an overview of a programming language for Genetic Engineering of Cells (GEC). A GEC program specifies a genetic circuit at a high level of abstraction through constraints on otherwise unspecified DNA parts. The GEC compiler then selects parts which satisfy the constraints from a given parts database. GEC further provides more conventional programming language constructs for abstraction, e.g., through modularity. The GEC language and compiler is available through a Web tool which also provides functionality, e.g., for simulation of designed circuits.

  5. NASA Standard for Models and Simulations: Philosophy and Requirements Overview

    Science.gov (United States)

    Blattnig, Steve R.; Luckring, James M.; Morrison, Joseph H.; Sylvester, Andre J.; Tripathi, Ram K.; Zang, Thomas A.

    2013-01-01

    Following the Columbia Accident Investigation Board report, the NASA Administrator chartered an executive team (known as the Diaz Team) to identify those CAIB report elements with NASA-wide applicability and to develop corrective measures to address each element. One such measure was the development of a standard for the development, documentation, and operation of models and simulations. This report describes the philosophy and requirements overview of the resulting NASA Standard for Models and Simulations.

  6. Methods and Tools for the Analysis, Verification and Synthesis of Genetic Logic Circuits,

    DEFF Research Database (Denmark)

    Baig, Hasan

    2017-01-01

    . This usually requires simulating the mathematical models of these genetic circuits and perceive whether or not the circuit behaves appropriately. Furthermore, synthetic biology utilizes the concepts from electronic design automation (EDA) of abstraction and automated construction to generate genetic circuits...... that the proposed approach is effective to determine the variation in the behavior of genetic circuits when the circuit’s parameters are changed. In addition, the thesis also attempts to propose a synthesis and technology mapping tool, called GeneTech, for genetic circuits. It allows users to construct a genetic...... important design characteristics. This thesis also introduces an automated approach to analyze the behavior of genetic logic circuits from the simulation data. With this capability, the boolean logic of complex genetic circuits can be analyzed and/or verified automatically. It is also shown in this thesis...

  7. Investigation of flip-flop effects in a linear analog comparator-with-hysteresis circuit

    International Nuclear Information System (INIS)

    Roche, N.J.H.; Buchner, S.P.; Warner, J.H.; McMorrow, D.; Roig, F.; Auriel, G.; Dusseau, L.; Boch, J.; Saigne, F.; Azais, B.

    2013-01-01

    The impact of the positive feedback loop on analog single event transient (ASET) shapes was investigated for a comparator- with-hysteresis circuit. Simulation based on previous developed ASET simulation tool is used to model the impact of the power supply voltage, the input voltage level and the injected energy. Simulation results show that these kinds of circuits are sensitive to flip-flop effects. This phenomenon occurs if the input voltage is in the hysteresis band range. In this case, simulations show that the ASET can latch the output into a non-desired state by changing the state of the circuit on his transfer characteristic curves. Laser experiments were conducted and show that the simulation outputs are in agreement with the experimental collected data. (authors)

  8. Simulations to investigate the eect of circuit imperfections on the slow extraction process

    CERN Document Server

    Van De Pontseele, Wouter

    2016-01-01

    The Super Proton Synchrotron (SPS) is a 400 GeV proton accelerator at CERN. Its main purpose is the last step in pre-acceleration of particles before injecting them into the Large Hadron Collider. Besides that, it is used for experiments directly connected to the SPS. For these xed target experiments, a steady slow extraction of the SPS beam is necessary over thousands of turns. The SPS slow extraction process makes use of the third-integer resonance in combination with an electrostatic septum. The stability of the extracted intensity and the losses at the septum are in uenced by the imperfections of the current circuit that drives the SPS quadrupoles. This report summarizes the studies that were carried out with MAD-X to simulate these imperfections.

  9. Time series analysis in chaotic diode resonator circuit

    Energy Technology Data Exchange (ETDEWEB)

    Hanias, M.P. [TEI of Chalkis, GR 34400, Evia, Chalkis (Greece)] e-mail: mhanias@teihal.gr; Giannaris, G. [TEI of Chalkis, GR 34400, Evia, Chalkis (Greece); Spyridakis, A. [TEI of Chalkis, GR 34400, Evia, Chalkis (Greece); Rigas, A. [TEI of Chalkis, GR 34400, Evia, Chalkis (Greece)

    2006-01-01

    A diode resonator chaotic circuit is presented. Multisim is used to simulate the circuit and show the presence of chaos. Time series analysis performed by the method proposed by Grasberger and Procaccia. The correlation and minimum embedding dimension {nu} and m {sub min}, respectively, were calculated. Also the corresponding Kolmogorov entropy was calculated.

  10. Time series analysis in chaotic diode resonator circuit

    International Nuclear Information System (INIS)

    Hanias, M.P.; Giannaris, G.; Spyridakis, A.; Rigas, A.

    2006-01-01

    A diode resonator chaotic circuit is presented. Multisim is used to simulate the circuit and show the presence of chaos. Time series analysis performed by the method proposed by Grasberger and Procaccia. The correlation and minimum embedding dimension ν and m min , respectively, were calculated. Also the corresponding Kolmogorov entropy was calculated

  11. Circuit design on plastic foils

    CERN Document Server

    Raiteri, Daniele; Roermund, Arthur H M

    2015-01-01

    This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics.  The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing.   • Discusses implications of problems associated with large-area electronics and compares them to standard silicon; • Provides the basis for understanding physics and modeling of disordered material; • Includes guidelines to quickly setup the basic CAD tools enabling efficient and reliable designs; • Illustrates practical solutions to cope with hard/soft faults, variability, mismatch, aging and bias stress at architecture, circuit, layout, and device levels.

  12. A simple electronic circuit realization of the tent map

    Energy Technology Data Exchange (ETDEWEB)

    Campos-Canton, I. [Fac. de Ciencias, Universidad Autonoma de San Luis Potosi, Alvaro Obregon 64, 78000 San Luis Potosi, SLP (Mexico)], E-mail: icampos@galia.fc.uaslp.mx; Campos-Canton, E. [Departamento de Fisico Matematicas, Universidad Autonoma de San Luis Potosi, Alvaro Obregon 64, 78000 San Luis Potosi, SLP (Mexico)], E-mail: ecamp@uaslp.mx; Murguia, J.S. [Departamento de Fisico Matematicas, Universidad Autonoma de San Luis Potosi, Alvaro Obregon 64, 78000 San Luis Potosi, SLP (Mexico)], E-mail: ondeleto@uaslp.mx; Rosu, H.C. [Division de Materiales Avanzados, Instituto Potosino de Investigacion Cientifica y Tecnologica, Camino a la presa San Jose 2055, 78216 San Luis Potosi, SLP (Mexico)], E-mail: hcr@ipicyt.edu.mx

    2009-10-15

    We present a very simple electronic implementation of the tent map, one of the best-known discrete dynamical systems. This is achieved by using integrated circuits and passive elements only. The experimental behavior of the tent map electronic circuit is compared with its numerical simulation counterpart. We find that the electronic circuit presents fixed points, periodicity, period doubling, chaos and intermittency that match with high accuracy the corresponding theoretical values.

  13. Short-Circuit Modeling of a Wind Power Plant: Preprint

    Energy Technology Data Exchange (ETDEWEB)

    Muljadi, E.; Gevorgian, V.

    2011-03-01

    This paper investigates the short-circuit behavior of a WPP for different types of wind turbines. The short-circuit behavior will be presented. Both the simplified models and detailed models are used in the simulations and both symmetrical faults and unsymmetrical faults are discussed.

  14. Boolean network model of the Pseudomonas aeruginosa quorum sensing circuits.

    Science.gov (United States)

    Dallidis, Stylianos E; Karafyllidis, Ioannis G

    2014-09-01

    To coordinate their behavior and virulence and to synchronize attacks against their hosts, bacteria communicate by continuously producing signaling molecules (called autoinducers) and continuously monitoring the concentration of these molecules. This communication is controlled by biological circuits called quorum sensing (QS) circuits. Recently QS circuits and have been recognized as an alternative target for controlling bacterial virulence and infections without the use of antibiotics. Pseudomonas aeruginosa is a Gram-negative bacterium that infects insects, plants, animals and humans and can cause acute infections. This bacterium has three interconnected QS circuits that form a very complex and versatile QS system, the operation of which is still under investigation. Here we use Boolean networks to model the complete QS system of Pseudomonas aeruginosa and we simulate and analyze its operation in both synchronous and asynchronous modes. The state space of the QS system is constructed and it turned out to be very large, hierarchical, modular and scale-free. Furthermore, we developed a simulation tool that can simulate gene knock-outs and study their effect on the regulons controlled by the three QS circuits. The model and tools we developed will give to life scientists a deeper insight to this complex QS system.

  15. Synthesis of logic circuits with evolutionary algorithms

    Energy Technology Data Exchange (ETDEWEB)

    JONES,JAKE S.; DAVIDSON,GEORGE S.

    2000-01-26

    In the last decade there has been interest and research in the area of designing circuits with genetic algorithms, evolutionary algorithms, and genetic programming. However, the ability to design circuits of the size and complexity required by modern engineering design problems, simply by specifying required outputs for given inputs has as yet eluded researchers. This paper describes current research in the area of designing logic circuits using an evolutionary algorithm. The goal of the research is to improve the effectiveness of this method and make it a practical aid for design engineers. A novel method of implementing the algorithm is introduced, and results are presented for various multiprocessing systems. In addition to evolving standard arithmetic circuits, work in the area of evolving circuits that perform digital signal processing tasks is described.

  16. Circuit modeling for electromagnetic compatibility

    CERN Document Server

    Darney, Ian B

    2013-01-01

    Very simply, electromagnetic interference (EMI) costs money, reduces profits, and generally wreaks havoc for circuit designers in all industries. This book shows how the analytic tools of circuit theory can be used to simulate the coupling of interference into, and out of, any signal link in the system being reviewed. The technique is simple, systematic and accurate. It enables the design of any equipment to be tailored to meet EMC requirements. Every electronic system consists of a number of functional modules interconnected by signal links and power supply lines. Electromagnetic interference

  17. Design of The High Efficiency Power Factor Correction Circuit for Power Supply

    Directory of Open Access Journals (Sweden)

    Atiye Hülya OBDAN

    2017-12-01

    Full Text Available Designing power factor correction circuits for switched power supplies has become important in recent years in terms of efficient use of energy. Power factor correction techniques play a significant role in high power density and energy efficiency. For these purposes, bridgeless PFC topologies and control strategies have been developed alongside basic boost PFC circuits. The power density can be increased using bridgeless structures by means of reducing losses in the circuit. This article examines bridgeless PFC structures and compares their performances in terms of losses and power factor. A semi-bridgeless PFC, which is widely used at high power levels, was analyzed and simulated. The designed circuit simulation using the current mode control method was performed in the PSIM program. A prototype of a 900 W semi-bridgeless PFC circuit was implemented and the results obtained from the circuit are presented

  18. Cosimulation of electromagnetics-circuit systems exploiting DGTD and MNA

    KAUST Repository

    Li, Ping; Jiang, Lijun; Bagci, Hakan

    2014-01-01

    and circuit subsystems are small and are directly inverted. To handle nonlinear devices within the circuit subsystem, the standard Newton-Raphson method is applied to the nonlinear coupling matrix system. In addition, a local time-stepping scheme is applied

  19. Mixed-mode chaotic circuit with Wien-bridge configuration: The results of experimental verification

    Energy Technology Data Exchange (ETDEWEB)

    Kilic, Recai [Erciyes University, Department of Electronic Engineering, 38039 Kayseri (Turkey)]. E-mail: kilic@erciyes.edu.tr

    2007-05-15

    In this paper, we deal with the experimentally implementation of inductorless Wien bridge-based mixed-mode chaotic circuit (MMCC) which is capable to exhibit both linear and nonlinear oscillations. The results of experimental implementation agree with the results of theoretical and computer simulation presented in literature. Since the proposed implementation of MMCC circuit uses different design blocks such as Wien bridge-based autonomous circuit part, CFOA (current feedback operational amplifier)-based floating inductance simulator, CFOA-based Chua's diode and switching mechanism, it offers very versatile chaotic circuit model for studying autonomous and nonautonomous chaotic dynamics.

  20. Logic circuits based on molecular spider systems.

    Science.gov (United States)

    Mo, Dandan; Lakin, Matthew R; Stefanovic, Darko

    2016-08-01

    Spatial locality brings the advantages of computation speed-up and sequence reuse to molecular computing. In particular, molecular walkers that undergo localized reactions are of interest for implementing logic computations at the nanoscale. We use molecular spider walkers to implement logic circuits. We develop an extended multi-spider model with a dynamic environment wherein signal transmission is triggered via localized reactions, and use this model to implement three basic gates (AND, OR, NOT) and a cascading mechanism. We develop an algorithm to automatically generate the layout of the circuit. We use a kinetic Monte Carlo algorithm to simulate circuit computations, and we analyze circuit complexity: our design scales linearly with formula size and has a logarithmic time complexity. Copyright © 2016 Elsevier Ireland Ltd. All rights reserved.

  1. Coherent quantum dynamics launched by incoherent relaxation in a quantum circuit simulator of a light-harvesting complex

    Science.gov (United States)

    Chin, A. W.; Mangaud, E.; Atabek, O.; Desouter-Lecomte, M.

    2018-06-01

    Engineering and harnessing coherent excitonic transport in organic nanostructures has recently been suggested as a promising way towards improving manmade light-harvesting materials. However, realizing and testing the dissipative system-environment models underlying these proposals is presently very challenging in supramolecular materials. A promising alternative is to use simpler and highly tunable "quantum simulators" built from programmable qubits, as recently achieved in a superconducting circuit by Potočnik et al. [A. Potočnik et al., Nat. Commun. 9, 904 (2018), 10.1038/s41467-018-03312-x]. We simulate the real-time dynamics of an exciton coupled to a quantum bath as it moves through a network based on the quantum circuit of Potočnik et al. Using the numerically exact hierarchical equations of motion to capture the open quantum system dynamics, we find that an ultrafast but completely incoherent relaxation from a high-lying "bright" exciton into a doublet of closely spaced "dark" excitons can spontaneously generate electronic coherences and oscillatory real-space motion across the network (quantum beats). Importantly, we show that this behavior also survives when the environmental noise is classically stochastic (effectively high temperature), as in present experiments. These predictions highlight the possibilities of designing matched electronic and spectral noise structures for robust coherence generation that do not require coherent excitation or cold environments.

  2. Design, Analysis and Test of Logic Circuits Under Uncertainty

    CERN Document Server

    Krishnaswamy, Smita; Hayes, John P

    2013-01-01

    Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits.  To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits.  The book describes techniques for:   • Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework;   • Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-l...

  3. Equivalent circuit analysis of terahertz metamaterial filters

    KAUST Repository

    Zhang, Xueqian

    2011-01-01

    An equivalent circuit model for the analysis and design of terahertz (THz) metamaterial filters is presented. The proposed model, derived based on LMC equivalent circuits, takes into account the detailed geometrical parameters and the presence of a dielectric substrate with the existing analytic expressions for self-inductance, mutual inductance, and capacitance. The model is in good agreement with the experimental measurements and full-wave simulations. Exploiting the circuit model has made it possible to predict accurately the resonance frequency of the proposed structures and thus, quick and accurate process of designing THz device from artificial metamaterials is offered. ©2011 Chinese Optics Letters.

  4. Modelling of optoelectronic circuits based on resonant tunneling diodes

    Science.gov (United States)

    Rei, João. F. M.; Foot, James A.; Rodrigues, Gil C.; Figueiredo, José M. L.

    2017-08-01

    Resonant tunneling diodes (RTDs) are the fastest pure electronic semiconductor devices at room temperature. When integrated with optoelectronic devices they can give rise to new devices with novel functionalities due to their highly nonlinear properties and electrical gain, with potential applications in future ultra-wide-band communication systems (see e.g. EU H2020 iBROW Project). The recent coverage on these devices led to the need to have appropriated simulation tools. In this work, we present RTD based optoelectronic circuits simulation packages to provide circuit signal level analysis such as transient and frequency responses. We will present and discuss the models, and evaluate the simulation packages.

  5. Simulant Basis for the Standard High Solids Vessel Design

    Energy Technology Data Exchange (ETDEWEB)

    Peterson, Reid A. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Fiskum, Sandra K. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Suffield, Sarah R. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Daniel, Richard C. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Gauglitz, Phillip A. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Wells, Beric E. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States)

    2017-09-30

    The Waste Treatment and Immobilization Plant (WTP) is working to develop a Standard High Solids Vessel Design (SHSVD) process vessel. To support testing of this new design, WTP engineering staff requested that a Newtonian simulant and a non-Newtonian simulant be developed that would represent the Most Adverse Design Conditions (in development) with respect to mixing performance as specified by WTP. The majority of the simulant requirements are specified in 24590-PTF-RPT-PE-16-001, Rev. 0. The first step in this process is to develop the basis for these simulants. This document describes the basis for the properties of these two simulant types. The simulant recipes that meet this basis will be provided in a subsequent document.

  6. Design of 3D integrated circuits and systems

    CERN Document Server

    Sharma, Rohit

    2014-01-01

    Three-dimensional (3D) integration of microsystems and subsystems has become essential to the future of semiconductor technology development. 3D integration requires a greater understanding of several interconnected systems stacked over each other. While this vertical growth profoundly increases the system functionality, it also exponentially increases the design complexity. Design of 3D Integrated Circuits and Systems tackles all aspects of 3D integration, including 3D circuit and system design, new processes and simulation techniques, alternative communication schemes for 3D circuits and sys

  7. Fractional-order RC and RL circuits

    KAUST Repository

    Radwan, Ahmed Gomaa

    2012-05-30

    This paper is a step forward to generalize the fundamentals of the conventional RC and RL circuits in fractional-order sense. The effect of fractional orders is the key factor for extra freedom, more flexibility, and novelty. The conditions for RC and RL circuits to act as pure imaginary impedances are derived, which are unrealizable in the conventional case. In addition, the sensitivity analyses of the magnitude and phase response with respect to all parameters showing the locations of these critical values are discussed. A qualitative revision for the fractional RC and RL circuits in the frequency domain is provided. Numerical and PSpice simulations are included to validate this study. © Springer Science+Business Media, LLC 2012.

  8. A new paradigm in the design of energy-efficient digital circuits using laterally-actuated double-gate NEMS

    KAUST Repository

    Dadgour, Hamed F.

    2010-01-01

    Nano-Electro-Mechanical Switches (NEMS) offer the prospect of improved energy-efficiency in digital circuits due to their near-zero subthreshold leakage and extremely low subthreshold swing values. Among the different approaches of implementing NEMS, laterallyactuated double-gate NEMS devices have attracted much attention as they provide unique and exciting circuit design opportunities. For instance, this paper demonstrates that compact XOR/XNOR gates can be implemented using only two such NEMS transistors. While this in itself is a major improvement, its implications for minimizing Boolean functions using Karnaugh maps (K-maps) are even more significant. In the standard K-map technique, which is used in digital circuit design, adjacent "1s" (minterms) are grouped only in horizontal and/or vertical directions; the diagonal (or zig-zag) grouping of adjacent "1s" is not an option due to the absence of compact XOR/XNOR gates. However, this work demonstrates, for the first time ever, that in lateral double-gate NEMS-based circuits, grouping of minterms is possible in horizontal and vertical as well as diagonal fashions. This is because the diagonal groupings of minterms require XOR/XNOR operations, which are available in such NEMS-based circuits at minimal costs. This novel design paradigm facilitates more compact implementations of Boolean functions and thus, considerably improves their energy-efficiency. For example, a lateral NEMS-based full-adder is implemented using less than half the number of transistors, which is required by a CMOS-based full-adder. Furthermore, circuit simulations are performed to evaluate the energy-efficiencies of the NEMS-based 32-bit carry-save adders compared to their standard CMOS-based counterparts. Copyright 2010 ACM.

  9. Discrete-State Simulated Annealing For Traveling-Wave Tube Slow-Wave Circuit Optimization

    Science.gov (United States)

    Wilson, Jeffrey D.; Bulson, Brian A.; Kory, Carol L.; Williams, W. Dan (Technical Monitor)

    2001-01-01

    Algorithms based on the global optimization technique of simulated annealing (SA) have proven useful in designing traveling-wave tube (TWT) slow-wave circuits for high RF power efficiency. The characteristic of SA that enables it to determine a globally optimized solution is its ability to accept non-improving moves in a controlled manner. In the initial stages of the optimization, the algorithm moves freely through configuration space, accepting most of the proposed designs. This freedom of movement allows non-intuitive designs to be explored rather than restricting the optimization to local improvement upon the initial configuration. As the optimization proceeds, the rate of acceptance of non-improving moves is gradually reduced until the algorithm converges to the optimized solution. The rate at which the freedom of movement is decreased is known as the annealing or cooling schedule of the SA algorithm. The main disadvantage of SA is that there is not a rigorous theoretical foundation for determining the parameters of the cooling schedule. The choice of these parameters is highly problem dependent and the designer needs to experiment in order to determine values that will provide a good optimization in a reasonable amount of computational time. This experimentation can absorb a large amount of time especially when the algorithm is being applied to a new type of design. In order to eliminate this disadvantage, a variation of SA known as discrete-state simulated annealing (DSSA), was recently developed. DSSA provides the theoretical foundation for a generic cooling schedule which is problem independent, Results of similar quality to SA can be obtained, but without the extra computational time required to tune the cooling parameters. Two algorithm variations based on DSSA were developed and programmed into a Microsoft Excel spreadsheet graphical user interface (GUI) to the two-dimensional nonlinear multisignal helix traveling-wave amplifier analysis program TWA3

  10. Electrothermal frequency references in standard CMOS

    CERN Document Server

    Kashmiri, S Mahdi

    2013-01-01

    This book describes an alternative method of accurate on-chip frequency generation in standard CMOS IC processes. This method exploits the thermal-diffusivity of silicon, the rate at which heat diffuses through a silicon substrate.  This is the first book describing thermal-diffusivity-based frequency references, including the complete theoretical methodology supported by practical realizations that prove the feasibility of the method.  Coverage also includes several circuit and system-level solutions for the analog electronic circuit design challenges faced.   ·         Surveys the state-of-the-art in all-silicon frequency references; ·         Examines the thermal properties of silicon as a solution for the challenge of on-chip accurate frequency generation; ·         Uses simplified modeling approaches that allow an electronics engineer easily to simulate the electrothermal elements; ·         Follows a top-down methodology in circuit design, in which system-level des...

  11. Integrated circuit implementation of fuzzy controllers

    OpenAIRE

    Huertas Díaz, José Luis; Sánchez Solano, Santiago; Baturone Castillo, María Iluminada; Barriga Barros, Ángel

    1996-01-01

    This paper presents mixed-signal current-mode CMOS circuits to implement programmable fuzzy controllers that perform the singleton or zero-order Sugeno’s method. Design equations to characterize these circuits are provided to explain the precision and speed that they offer. This analysis is illustrated with the experimental results of prototypes integrated in standard CMOS technologies. These tests show that an equivalent precision of 6 bits is achieved. The connection of these...

  12. Circuit mismatch influence on performance of paralleling silicon carbide MOSFETs

    DEFF Research Database (Denmark)

    Li, Helong; Munk-Nielsen, Stig; Pham, Cam

    2014-01-01

    This paper focuses on circuit mismatch influence on performance of paralleling SiC MOSFETs. Power circuit mismatch and gate driver mismatch influences are analyzed in detail. Simulation and experiment results show the influence of circuit mismatch and verify the analysis. This paper aims to give...... suggestions on paralleling discrete SiC MOSFETs and designing layout of power modules with paralleled SiC MOSFETs dies....

  13. A New Simple Chaotic Circuit Based on Memristor

    Science.gov (United States)

    Wu, Renping; Wang, Chunhua

    In this paper, a new memristor is proposed, and then an emulator built from off-the-shelf solid state components imitating the behavior of the proposed memristor is presented. Multisim simulation and breadboard experiment are done on the emulator, exhibiting a pinched hysteresis loop in the voltage-current plane when the emulator is driven by a periodic excitation voltage. In addition, a new simple chaotic circuit is designed by using the proposed memristor and other circuit elements. It is exciting that this circuit with only a linear negative resistor, a capacitor, an inductor and a memristor can generate a chaotic attractor. The dynamical behaviors of the proposed chaotic system are analyzed by Lyapunov exponents, phase portraits and bifurcation diagrams. Finally, an electronic circuit is designed to implement the chaotic system. For the sake of simple circuit topology, the proposed chaotic circuit can be easily manufactured at low cost.

  14. Xyce parallel electronic simulator design.

    Energy Technology Data Exchange (ETDEWEB)

    Thornquist, Heidi K.; Rankin, Eric Lamont; Mei, Ting; Schiek, Richard Louis; Keiter, Eric Richard; Russo, Thomas V.

    2010-09-01

    This document is the Xyce Circuit Simulator developer guide. Xyce has been designed from the 'ground up' to be a SPICE-compatible, distributed memory parallel circuit simulator. While it is in many respects a research code, Xyce is intended to be a production simulator. As such, having software quality engineering (SQE) procedures in place to insure a high level of code quality and robustness are essential. Version control, issue tracking customer support, C++ style guildlines and the Xyce release process are all described. The Xyce Parallel Electronic Simulator has been under development at Sandia since 1999. Historically, Xyce has mostly been funded by ASC, the original focus of Xyce development has primarily been related to circuits for nuclear weapons. However, this has not been the only focus and it is expected that the project will diversify. Like many ASC projects, Xyce is a group development effort, which involves a number of researchers, engineers, scientists, mathmaticians and computer scientists. In addition to diversity of background, it is to be expected on long term projects for there to be a certain amount of staff turnover, as people move on to different projects. As a result, it is very important that the project maintain high software quality standards. The point of this document is to formally document a number of the software quality practices followed by the Xyce team in one place. Also, it is hoped that this document will be a good source of information for new developers.

  15. Methodology for the digital calibration of analog circuits and systems with case studies

    CERN Document Server

    Pastre, Marc

    2006-01-01

    Methodology for the Digital Calibration of Analog Circuits and Systems shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. A complete methodology is proposed, and three applications are detailed. To start with, an in-depth analysis of existing compensation techniques for analog circuit imperfections is carried out. The M/2+M sub-binary digital-to-analog converter is thoroughly studied, and the use of this very low-area circuit in conjunction with a successive approximations algorithm for digital compensation is described. A complete methodology based on this compensation circuit and algorithm is then proposed. The detection and correction of analog circuit imperfections is studied, and a simulation tool allowing the transparent simulation of analog circuits with automatic compensation blocks is introduced. The first application shows how the sub-binary M/2+M structure can be employed as a conventional di...

  16. Topology Optimization of Building Blocks for Photonic Integrated Circuits

    DEFF Research Database (Denmark)

    Jensen, Jakob Søndergaard; Sigmund, Ole

    2005-01-01

    Photonic integrated circuits are likely candidates as high speed replacements for the standard electrical integrated circuits of today. However, in order to obtain a satisfactorily performance many design prob- lems that up until now have resulted in too high losses must be resolved. In this work...... we demonstrate how the method of topology optimization can be used to design a variety of high performance building blocks for the future circuits....

  17. Three-Dimensional Simulation of Plasma Deformation During Contact Opening in a Circuit Breaker, Including the Analysis of Kink Instability and Sausage Instability

    International Nuclear Information System (INIS)

    Abbasi, Vahid; Gholami, Ahmad; Niayesh, Kaveh

    2012-01-01

    A three-dimensional (3-D) transient model has been developed to investigate plasma deformation driven by a magnetic field and its influence on arc stability in a circuit breaker. The 3-D distribution of electric current density is obtained from a current continuity equation along with the generalized Ohm's law; while the magnetic field induced by the current flowing through the arc column is calculated by the magnetic vector potential equation. When gas interacts with an arc column, fundamental factors, such as Ampere's law, Ohm's law, the turbulence model, transport equations of mass, momentum and energy of plasma flow, have to be coupled for analyzing the phenomenon. The coupled interactions between arc and plasma flow are described in the framework of time-dependent magnetohydrodynamic (MHD) equations in conjunction with a K-ε turbulence model. Simulations have been focused on sausage and kink instabilities in plasma (these phenomena are related to pinch effects and electromagnetic fields). The 3-D simulation reveals the relation between plasma deformation and instability phenomena, which affect arc stability during circuit breaker operation. Plasma deformation is the consequence of coupled interactions between the electromagnetic force and plasma flow described in simulations. (plasma technology)

  18. Feasibility study and uncertainties in the validation of an existing safety-related control circuit with the ISO 13849-1:2006 design standard

    International Nuclear Information System (INIS)

    Jocelyn, Sabrina; Baudoin, James; Chinniah, Yuvin; Charpentier, Philippe

    2014-01-01

    In industry, machine users and people who modify or integrate equipment often have to evaluate the safety level of a safety-related control circuit that they have not necessarily designed. The modifications or integrations may involve work to make an existing machine that does not comply with normative or regulatory specifications safe. However, how can a circuit performing a safety function be validated a posteriori? Is the validation exercise feasible? What are the difficulties and limitations of such a procedure? The aim of this article is to answer these questions by presenting a validation study of a safety function of an existing machine. A plastic injection molding machine is used for this study, as well as standard ISO 13849-1:2006. Validation consists of performing an a posteriori (post-design) estimation of the performance level of the safety function. The procedure is studied for two contexts of use of the machine: in industry, and in laboratory. The calculations required by the ISO standard were done using Excel, followed by SIStema software. It is shown that, based on the context of use, the estimated performance level was different for the same safety-related circuit. The variability in the results is explained by the assumptions made by the person undertaking the validation without the involvement of the machine designer. - Highlights: • Validation of the performance level of a safety function is undertaken. • An injection molding machine and ISO 13849-1:2006 standard are used for the procedure. • The procedure is undertaken for two contexts of use of the machine. • In this study, the performance level depends on the context of use. • The assumptions made throughout the study partially explain this difference

  19. Demodulation Radio Frequency Interference Effects in Operational Amplifier Circuits

    Science.gov (United States)

    Sutu, Yue-Hong

    A series of investigations have been carried out to determine RFI effects in analog circuits using monolithic integrated operational amplifiers (op amps) as active devices. The specific RFI effect investigated is how amplitude-modulated (AM) RF signals are demodulated in op amp circuits to produce undesired low frequency responses at AM-modulation frequency. The undesired demodulation responses were shown to be characterized by a second-order nonlinear transfer function. Four representative op amp types investigated were the 741 bipolar op amp, the LM10 bipolar op amp, the LF355 JFET-Bipolar op amp, and the CA081 MOS-Bipolar op amp. Two op amp circuits were investigated. The first circuit was a noninverting unity voltage gain buffer circuit. The second circuit was an inverting op amp configuration. In the second circuit, the investigation includes the effects of an RFI suppression capacitor in the feedback path. Approximately 30 units of each op amp type were tested to determine the statistical variations of RFI demodulation effects in the two op amp circuits. The Nonlinear Circuit Analysis Program, NCAP, was used to simulate the demodulation RFI response. In the simulation, the op amp was replaced with its incremental macromodel. Values of macromodel parameters were obtained from previous investigations and manufacturer's data sheets. Some key results of this work are: (1) The RFI demodulation effects are 10 to 20 dB lower in CA081 and LF355 FET-bipolar op amp than in 741 and LM10 bipolar op amp except above 40 MHz where the LM10 RFI response begins to approach that of CA081. (2) The experimental mean values for 30 741 op amps show that RFI demodulation responses in the inverting amplifier with a 27 pF feedback capacitor were suppressed from 10 to 35 dB over the RF frequency range 0.1 to 150 MHz except at 0.15 MHz where only 3.5 dB suppression was observed. (3) The NCAP program can predict RFI demodulation responses in 741 and LF355 unity gain buffer circuits

  20. A novel ternary logic circuit using Josephson junction

    International Nuclear Information System (INIS)

    Morisue, M.; Oochi, K.; Nishizawa, M.

    1989-01-01

    This paper describes a novel Josephson complementary ternary logic circuit named as JCTL. This fundamental circuit is constructed by combination of two SQUIDs, one of which is switched in the positive direction and the other in the negative direction. The JCTL can perform the fundamental operations of AND, OR, NOT and Double NOT in ternary form. The principle of the operation and design criteria are described in detail. The results of the simulation show that the reliable operations of these circuits can be achieved with a high performance

  1. An integrated multichannel neural recording analog front-end ASIC with area-efficient driven right leg circuit.

    Science.gov (United States)

    Tao Tang; Wang Ling Goh; Lei Yao; Jia Hao Cheong; Yuan Gao

    2017-07-01

    This paper describes an integrated multichannel neural recording analog front end (AFE) with a novel area-efficient driven right leg (DRL) circuit to improve the system common mode rejection ratio (CMRR). The proposed AFE consists of an AC-coupled low-noise programmable-gain amplifier, an area-efficient DRL block and a 10-bit SAR ADC. Compared to conventional DRL circuit, the proposed capacitor-less DRL design achieves 90% chip area reduction with enhanced CMRR performance, making it ideal for multichannel biomedical recording applications. The AFE circuit has been designed in a standard 0.18-μm CMOS process. Post-layout simulation results show that the AFE provides two gain settings of 54dB/60dB while consuming 1 μA per channel under a supply voltage of 1 V. The input-referred noise of the AFE integrated from 1 Hz to 10k Hz is only 4 μVrms and the CMRR is 110 dB.

  2. Active quenching circuit for a InGaAs single-photon avalanche diode

    International Nuclear Information System (INIS)

    Zheng Lixia; Wu Jin; Xi Shuiqing; Shi Longxing; Liu Siyang; Sun Weifeng

    2014-01-01

    We present a novel gated operation active quenching circuit (AQC). In order to simulate the quenching circuit a complete SPICE model of a InGaAs SPAD is set up according to the I–V characteristic measurement results of the detector. The circuit integrated with aROIC (readout integrated circuit) is fabricated in an CSMC 0.5 μm CMOS process and then hybrid packed with the detector. Chip measurement results show that the functionality of the circuit is correct and the performance is suitable for practical system applications. (semiconductor integrated circuits)

  3. Ultra Low Energy Binary Decision Diagram Circuits Using Few Electron Transistors

    Science.gov (United States)

    Saripalli, Vinay; Narayanan, Vijay; Datta, Suman

    Novel medical applications involving embedded sensors, require ultra low energy dissipation with low-to-moderate performance (10kHz-100MHz) driving the conventional MOSFETs into sub-threshold operation regime. In this paper, we present an alternate ultra-low power computing architecture using Binary Decision Diagram based logic circuits implemented using Single Electron Transistors (SETs) operating in the Coulomb blockade regime with very low supply voltages. We evaluate the energy - performance tradeoff metrics of such BDD circuits using time domain Monte Carlo simulations and compare them with the energy-optimized CMOS logic circuits. Simulation results show that the proposed approach achieves better energy-delay characteristics than CMOS realizations.

  4. System and circuit models for microwave antennas

    OpenAIRE

    Sobhy, Mohammed; Sanz-Izquierdo, Benito; Batchelor, John C.

    2007-01-01

    This paper describes how circuit and system models are derived for antennas from measurement of the input reflection coefficient. Circuit models are used to optimize the antenna performance and to calculate the radiated power and the transfer function of the antenna. System models are then derived for transmitting and receiving antennas. The most important contribution of this study is to show how microwave structures can be integrated into the simulation of digital communication systems. Thi...

  5. Equivalent Circuit Modeling of Hysteresis Motors

    Energy Technology Data Exchange (ETDEWEB)

    Nitao, J J; Scharlemann, E T; Kirkendall, B A

    2009-08-31

    We performed a literature review and found that many equivalent circuit models of hysteresis motors in use today are incorrect. The model by Miyairi and Kataoka (1965) is the correct one. We extended the model by transforming it to quadrature coordinates, amenable to circuit or digital simulation. 'Hunting' is an oscillatory phenomenon often observed in hysteresis motors. While several works have attempted to model the phenomenon with some partial success, we present a new complete model that predicts hunting from first principles.

  6. Simulating the SU(2) sector of the standard model with dynamical fermions

    International Nuclear Information System (INIS)

    Lee, I. Hsiu.

    1988-01-01

    The two-generation SU(2) sector of the standard model with zero Yukawa couplings is studied on the lattice. The results from analytic studies and simulations with quenched fermions are reviewed. The methods and results of a Langevin simulation with dynamical fermions are presented. Implications for the strongly coupled standard model are mentioned. 23 refs

  7. A power management system for energy harvesting and wireless sensor networks application based on a novel charge pump circuit

    Science.gov (United States)

    Aloulou, R.; De Peslouan, P.-O. Lucas; Mnif, H.; Alicalapa, F.; Luk, J. D. Lan Sun; Loulou, M.

    2016-05-01

    Energy Harvesting circuits are developed as an alternative solution to supply energy to autonomous sensor nodes in Wireless Sensor Networks. In this context, this paper presents a micro-power management system for multi energy sources based on a novel design of charge pump circuit to allow the total autonomy of self-powered sensors. This work proposes a low-voltage and high performance charge pump (CP) suitable for implementation in standard complementary metal oxide semiconductor (CMOS) technologies. The CP design was implemented using Cadence Virtuoso with AMS 0.35μm CMOS technology parameters. Its active area is 0.112 mm2. Consistent results were obtained between the measured findings of the chip testing and the simulation results. The circuit can operate with an 800 mV supply and generate a boosted output voltage of 2.835 V with 1 MHz as frequency.

  8. A new AC driving circuit for a top emission AMOLED

    International Nuclear Information System (INIS)

    Zhang Yongwen; Chen Wenbin; Liu Haohan

    2013-01-01

    A new voltage programmed pixel circuit with top emission design for active-matrix organic light-emitting diode (AMOLED) displays is presented and verified by HSPICE simulations. The proposed pixel circuit consists of five poly-Si TFTs, and can effectively compensate for the threshold voltage variation of the driving TFT. Meanwhile, the proposed pixel circuit offers an AC driving mode for the OLED by the two adjacent pulse voltage sources, which can suppress the degradation of the OLED. Moreover, a high contrast ratio can be achieved by the proposed pixel circuit since the OLED does not emit any light except for the emission period. (semiconductor integrated circuits)

  9. Thirteen years test experience with short-circuit withstand capability of large power transformers

    NARCIS (Netherlands)

    Smeets, R.P.P.; Paske, te L.H.; Leufkens, P.P.; Fogelberg, T.

    2009-01-01

    The ability to withstand a short circuit is recognised more and more as an essential characteristic of power transformers. IEC and IEEE Standards, as well as other national standards specify short-circuit testing and how to check the withstand capability. Unfortunately, however, there is extensive

  10. Lumped-parameters equivalent circuit for condenser microphones modeling.

    Science.gov (United States)

    Esteves, Josué; Rufer, Libor; Ekeom, Didace; Basrour, Skandar

    2017-10-01

    This work presents a lumped parameters equivalent model of condenser microphone based on analogies between acoustic, mechanical, fluidic, and electrical domains. Parameters of the model were determined mainly through analytical relations and/or finite element method (FEM) simulations. Special attention was paid to the air gap modeling and to the use of proper boundary condition. Corresponding lumped-parameters were obtained as results of FEM simulations. Because of its simplicity, the model allows a fast simulation and is readily usable for microphone design. This work shows the validation of the equivalent circuit on three real cases of capacitive microphones, including both traditional and Micro-Electro-Mechanical Systems structures. In all cases, it has been demonstrated that the sensitivity and other related data obtained from the equivalent circuit are in very good agreement with available measurement data.

  11. Reliability and Availability Analysis of Some Systems with Common-Cause Failures Using SPICE Circuit Simulation Program

    Directory of Open Access Journals (Sweden)

    Muhammad Taher Abuelma'atti

    1999-01-01

    Full Text Available The effectiveness of SPICE circuit simulation program in calculating probabilities, reliability, steady-state availability and mean-time to failure of repairable systems described by Markov models is demonstrated. Two examples are presented. The first example is a warm standby system with common-cause failures and human errors. The second example is a non-identical unit parallel system with common-cause failures. In both cases recourse to numerical solution is inevitable to obtain the Laplace transforms of the probabilities. Results obtained using SPICE are compared with previously published results obtained using the Laplace transform method. Full SPICE listings are included.

  12. Research on current sharing of paralleled IGBTs in different DC breaker circuit topologies

    Directory of Open Access Journals (Sweden)

    Chen Ying

    2016-01-01

    Full Text Available IGBT modules used in series and parallel to satisfy the requirement in high-power DC circuit breakers are often prone to large-current destruction due to current unbalance between paralleled IGBTs. It is of great importance to identify the current unbalance causes and to find a method optimizing the current sharing of paralleled IGBTs. In this paper the current-sharing influencing factors are discussed and verified by simulation. Two possible circuit topologies used in DC circuit breakers are proposed and simulated to see their performance in current sharing. The results show that one of them can provide us with a simple and effective method to achieve good current balancing in the DC circuit breaker application.

  13. Short- circuit tests of circuit breakers

    OpenAIRE

    Chorovský, P.

    2015-01-01

    This paper deals with short-circuit tests of low voltage electrical devices. In the first part of this paper, there are described basic types of short- circuit tests and their principles. Direct and indirect (synthetic) tests with more details are described in the second part. Each test and principles are explained separately. Oscilogram is obtained from short-circuit tests of circuit breakers at laboratory. The aim of this research work is to propose a test circuit for performing indirect test.

  14. Design of a 0.13-μm CMOS cascade expandable ΣΔ modulator for multi-standard RF telecom systems

    Science.gov (United States)

    Morgado, Alonso; del Río, Rocío; de la Rosa, José M.

    2007-05-01

    This paper reports a 130-nm CMOS programmable cascade ΣΔ modulator for multi-standard wireless terminals, capable of operating on three standards: GSM, Bluetooth and UMTS. The modulator is reconfigured at both architecture- and circuit- level in order to adapt its performance to the different standards specifications with optimized power consumption. The design of the building blocks is based upon a top-down CAD methodology that combines simulation and statistical optimization at different levels of the system hierarchy. Transistor-level simulations show correct operation for all standards, featuring 13-bit, 11.3-bit and 9-bit effective resolution within 200-kHz, 1-MHz and 4-MHz bandwidth, respectively.

  15. Simulation of the Process of Arc Energy-Effect in High Voltage Auto-Expansion SF6 Circuit Breaker

    International Nuclear Information System (INIS)

    Rong Mingzhe; Yang Qian; Fan Chunduo

    2005-01-01

    A new magnetic hydro-dynamics (MHD) model of arc in H.V. auto-expansion SF 6 circuit breaker that takes into consideration nozzle ablation due to both radiation and thermal conduction is presented in this paper. The effect of PTFE (polytetrafluorethylene) vapor is considered in the mass, momentum and energy conservation equations of the constructed model. Then, the gas flow fields with and without conduction considered are simulated. By comparing the aforementioned two results, it is indicated that the arc's maximal temperature with conduction considered is 90 percent of that without considering conduction

  16. Logic analysis and verification of n-input genetic logic circuits

    DEFF Research Database (Denmark)

    Baig, Hasan; Madsen, Jan

    2017-01-01

    . In this paper, we present an approach to analyze and verify the Boolean logic of a genetic circuit from the data obtained through stochastic analog circuit simulations. The usefulness of this analysis is demonstrated through different case studies illustrating how our approach can be used to verify the expected......Nature is using genetic logic circuits to regulate the fundamental processes of life. These genetic logic circuits are triggered by a combination of external signals, such as chemicals, proteins, light and temperature, to emit signals to control other gene expressions or metabolic pathways...... accordingly. As compared to electronic circuits, genetic circuits exhibit stochastic behavior and do not always behave as intended. Therefore, there is a growing interest in being able to analyze and verify the logical behavior of a genetic circuit model, prior to its physical implementation in a laboratory...

  17. Evaluation of different diameter arterial tubing and arterial cannulae in simulated neonatal/pediatric cardiopulmonary bypass circuits.

    Science.gov (United States)

    Wang, Shigang; Rosenthal, Tami; Kunselman, Allen R; Ündar, Akif

    2015-01-01

    The objective of this study is to evaluate three different diameters of arterial tubing and three diameters of arterial cannulae in terms of pressure drop, and hemodynamic energy delivery in simulated neonatal/pediatric cardiopulmonary bypass (CPB) circuits. The CPB circuit consisted of a Terumo Capiox Baby FX05 oxygenator (Terumo Corporation, Tokyo, Japan), arterial tubing (1/4 in, 3/16 in, or 1/8 in × 150 cm), and a Medtronic Bio-Medicus arterial cannula (8, 10, or 12 Fr; Medtronic, Inc., Minneapolis, MN, USA). The pseudo patient's pressure was maintained at 50 mm Hg. The circuit was primed using lactated Ringer's solution and heparinized packed human red blood cells (hematocrit 30%). Trials were conducted at different flow rates and temperatures (35 and 28°C). Flow and pressure data were collected using a custom-based data acquisition system. Using 8 Fr arterial cannula at 500 mL/min, small diameter arterial tubing generated higher circuit pressure (294.6 ± 0.1 mm Hg [1/8 in], 213.5 ± 0.5 mm Hg [3/16 in], 208.4 ± 0.4 mm Hg [1/4 in] at 35°C) and arterial line pressure drop (158.3 ± 0.1 mm Hg [1/8 in], 79.6 ± 0.1 mm Hg [3/16 in], 62.1 ± 0.1 mm Hg [1/4 in] at 35°C). Using 10 Fr arterial cannula at 1000 mL/min, pre-oxygenator pressures were 266.8 ± 0.2 mm Hg (3/16 in) and 248.0 ± 0.3 mm Hg (1/4 in); arterial line pressure drops were 111.6 ± 0.0 mm Hg (3/16 in) and 74.0 ± 0.1 mm Hg (1/4 in) at 35°C. When using 12 Fr arterial cannula at 1500 mL/min, preoxygenator pressures reached 324.4 ± 0.3 mm Hg (3/16 in) and 302.5 ± 0.4 mm Hg (1/4 in); arterial line pressure drops were 154.0 ± 0.1 mm Hg (3/16 in) and 92.0 ± 0.2 mm Hg (1/4 in) at 35°C. Pressure drops across arterial line tubing were main CPB circuit pressure drops. High flow rate, hypothermia, small diameter arterial tubing. and

  18. Application of Circuit Model for Photovoltaic Energy Conversion System

    Directory of Open Access Journals (Sweden)

    Natarajan Pandiarajan

    2012-01-01

    Full Text Available Circuit model of photovoltaic (PV module is presented in this paper that can be used as a common platform by material scientists and power electronic circuit designers to develop better PV power plant. Detailed modeling procedure for the circuit model with numerical dimensions is presented using power system blockset of MATLAB/Simulink. The developed model is integrated with DC-DC boost converter with closed-loop control of maximum power point tracking (MPPT algorithm. Simulation results are validated with the experimental setup.

  19. Development and verification of printed circuit board toroidal transformer model

    DEFF Research Database (Denmark)

    Pejtersen, Jens; Mønster, Jakob Døllner; Knott, Arnold

    2013-01-01

    An analytical model of an air core printed circuit board embedded toroidal transformer configuration is presented. The transformer has been developed for galvanic isolation of very high frequency switch-mode dc-dc power converter applications. The theoretical model is developed and verified...... by comparing calculated parameters with 3D finite element simulations and experimental measurement results. The developed transformer model shows good agreement with the simulated and measured results. The model can be used to predict the parameters of printed circuit board toroidal transformer configurations...

  20. Incorporating Standardized Colleague Simulations in a Clinical Assessment Course and Evaluating the Impact on Interprofessional Communication.

    Science.gov (United States)

    Shrader, Sarah; Dunn, Brianne; Blake, Elizabeth; Phillips, Cynthia

    2015-05-25

    To determine the impact of incorporating standardized colleague simulations on pharmacy students' confidence and interprofessional communication skills. Four simulations using standardized colleagues portraying attending physicians in inpatient and outpatient settings were integrated into a required course. Pharmacy students interacted with the standardized colleagues using the Situation, Background, Assessment, Request/Recommendation (SBAR) communication technique and were evaluated on providing recommendations while on simulated inpatient rounds and in an outpatient clinic. Additionally, changes in student attitudes and confidence toward interprofessional communication were assessed with a survey before and after the standardized colleague simulations. One hundred seventy-one pharmacy students participated in the simulations. Student interprofessional communication skills improved after each simulation. Student confidence with interprofessional communication in both inpatient and outpatient settings significantly improved. Incorporation of simulations using standardized colleagues improves interprofessional communication skills and self-confidence of pharmacy students.

  1. Detection Method for Soft Internal Short Circuit in Lithium-Ion Battery Pack by Extracting Open Circuit Voltage of Faulted Cell

    Directory of Open Access Journals (Sweden)

    Minhwan Seo

    2018-06-01

    Full Text Available Early detection of internal short circuit which is main cause of thermal runaway in a lithium-ion battery is necessary to ensure battery safety for users. As a promising fault index, internal short circuit resistance can directly represent degree of the fault because it describes self-discharge phenomenon caused by the internal short circuit clearly. However, when voltages of individual cells in a lithium-ion battery pack are not provided, the effect of internal short circuit in the battery pack is not readily observed in whole terminal voltage of the pack, leading to difficulty in estimating accurate internal short circuit resistance. In this paper, estimating the resistance with the whole terminal voltages and the load currents of the pack, a detection method for the soft internal short circuit in the pack is proposed. Open circuit voltage of a faulted cell in the pack is extracted to reflect the self-discharge phenomenon obviously; this process yields accurate estimates of the resistance. The proposed method is verified with various soft short conditions in both simulations and experiments. The error of estimated resistance does not exceed 31.2% in the experiment, thereby enabling the battery management system to detect the internal short circuit early.

  2. Application of Memristors in Microwave Passive Circuits

    Directory of Open Access Journals (Sweden)

    M.Potrebic

    2015-06-01

    Full Text Available The recent implementation of the fourth fundamental electric circuit element, the memristor, opened new vistas in many fields of engineering applications. In this paper, we explore several RF/microwave passive circuits that might benefit from the memristor salient characteristics. We consider a power divider, coupled resonator bandpass filters, and a low-reflection quasi-Gaussian lowpass filter with lossy elements. We utilize memristors as configurable linear resistors and we propose memristor-based bandpass filters that feature suppression of parasitic frequency pass bands and widening of the desired rejection band. The simulations are performed in the time domain, using LTspice, and the RF/microwave circuits under consideration are modeled by ideal elements available in LTspice.

  3. Software architecture standard for simulation virtual machine, version 2.0

    Science.gov (United States)

    Sturtevant, Robert; Wessale, William

    1994-01-01

    The Simulation Virtual Machine (SBM) is an Ada architecture which eases the effort involved in the real-time software maintenance and sustaining engineering. The Software Architecture Standard defines the infrastructure which all the simulation models are built from. SVM was developed for and used in the Space Station Verification and Training Facility.

  4. Conceptual Design of Simulation Models in an Early Development Phase of Lunar Spacecraft Simulator Using SMP2 Standard

    Science.gov (United States)

    Lee, Hoon Hee; Koo, Cheol Hea; Moon, Sung Tae; Han, Sang Hyuck; Ju, Gwang Hyeok

    2013-08-01

    The conceptual study for Korean lunar orbiter/lander prototype has been performed in Korea Aerospace Research Institute (KARI). Across diverse space programs around European countries, a variety of simulation application has been developed using SMP2 (Simulation Modelling Platform) standard related to portability and reuse of simulation models by various model users. KARI has not only first-hand experience of a development of SMP compatible simulation environment but also an ongoing study to apply the SMP2 development process of simulation model to a simulator development project for lunar missions. KARI has tried to extend the coverage of the development domain based on SMP2 standard across the whole simulation model life-cycle from software design to its validation through a lunar exploration project. Figure. 1 shows a snapshot from a visualization tool for the simulation of lunar lander motion. In reality, a demonstrator prototype on the right-hand side of image was made and tested in 2012. In an early phase of simulator development prior to a kick-off start in the near future, targeted hardware to be modelled has been investigated and indentified at the end of 2012. The architectural breakdown of the lunar simulator at system level was performed and the architecture with a hierarchical tree of models from the system to parts at lower level has been established. Finally, SMP Documents such as Catalogue, Assembly, Schedule and so on were converted using a XML(eXtensible Mark-up Language) converter. To obtain benefits of the suggested approaches and design mechanisms in SMP2 standard as far as possible, the object-oriented and component-based design concepts were strictly chosen throughout a whole model development process.

  5. A new hyperchaotic system and its circuit implementation

    Science.gov (United States)

    Yujun, Niu; Xingyuan, Wang; Mingjun, Wang; Huaguang, Zhang

    2010-11-01

    In this paper, a new hyperchaotic system is presented by adding a nonlinear controller to the three-dimensional autonomous chaotic system. The generated hyperchaotic system undergoes hyperchaos, chaos, and some different periodic orbits with control parameters changed. The complex dynamic behaviors are verified by means of Lyapunov exponent spectrum, bifurcation analysis, phase portraits and circuit realization. The Multisim results of the hyperchaotic circuit were well agreed with the simulation results.

  6. Optimal Design of Rectification Circuit in Electronic Circuit Fault Self-repair Based on EHW and RBT

    Institute of Scientific and Technical Information of China (English)

    ZHANG Junbin; CAI Jinyan; MENG Yafeng

    2018-01-01

    Reliability of traditional electronic circuit is improved mainly by redundant fault-tolerant technol-ogy with large hardware resource consumption and limited fault self-repair capability. In complicated environment, electronic circuit faults appear easily. If on-site immedi-ate repair is not implemented, normal running of elec-tronic system will be directly affected. In order to solve these problems, Evolvable hardware (EHW) technology is widely used. The conventional EHW has some bottlenecks. The optimal design of Rectification circuit (RTC) is fur-ther researched on the basis of the previously proposed fault self-repair based on EHW and Reparation balance technology (RBT). Fault sets are selected by fault danger degree and fault coverage rate. The optimal designed RTC can completely repair faults in the fault set. Simulation re-sults prove that it has higher self-repair capability and less hardware resource.

  7. Novel circuits for radiation hardened memories

    International Nuclear Information System (INIS)

    Haraszti, T.P.; Mento, R.P.; Moyer, N.E.; Grant, W.M.

    1992-01-01

    This paper reports on implementation of large storage semiconductor memories which combine radiation hardness with high packing density, operational speed, and low power dissipation and require both hardened circuit and hardened process technologies. Novel circuits, including orthogonal shuffle type of write-read arrays, error correction by weighted bidirectional codes and associative iterative repair circuits, are proposed for significant improvements of SRAMs' immunity against the effects of total dose and cosmic particle impacts. The implementation of the proposed circuit resulted in fault-tolerant 40-Mbit and 10-Mbit monolithic memories featuring a data rate of 120 MHz and power dissipation of 880 mW. These experimental serial-parallel memories were fabricated with a nonhardened standard CMOS processing technology, yet provided a total dose hardness of 1 Mrad and a projected SEU rate of 1 x 10 - 12 error/bit/day. Using radiation hardened processing improvements by factors of 10 to 100 are predicted in both total dose hardness and SEU rate

  8. Standard Specification for Solar Simulation for Terrestrial Photovoltaic Testing

    CERN Document Server

    American Society for Testing and Materials. Philadelphia

    2010-01-01

    1.1 This specification provides means for classifying solar simulators intended for indoor testing of photovoltaic devices (solar cells or modules), according to their spectral match to a reference spectral irradiance, non-uniformity of spatial irradiance, and temporal instability of irradiance. 1.2 Testing of photovoltaic devices may require the use of solar simulators. Test Methods that require specific classification of simulators as defined in this specification include Test Methods E948, E1036, and E1362. 1.3 This standard is applicable to both pulsed and steady state simulators and includes recommended test requirements used for classifying such simulators. 1.4 A solar simulator usually consists of three major components: (1) light source(s) and associated power supply; (2) any optics and filters required to modify the output beam to meet the classification requirements in Section 4; and (3) the necessary controls to operate the simulator, adjust irradiance, etc. 1.5 A light source that does not mee...

  9. A Parallel Genetic Algorithm for Automated Electronic Circuit Design

    Science.gov (United States)

    Long, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris

    2000-01-01

    Parallelized versions of genetic algorithms (GAs) are popular primarily for three reasons: the GA is an inherently parallel algorithm, typical GA applications are very compute intensive, and powerful computing platforms, especially Beowulf-style computing clusters, are becoming more affordable and easier to implement. In addition, the low communication bandwidth required allows the use of inexpensive networking hardware such as standard office ethernet. In this paper we describe a parallel GA and its use in automated high-level circuit design. Genetic algorithms are a type of trial-and-error search technique that are guided by principles of Darwinian evolution. Just as the genetic material of two living organisms can intermix to produce offspring that are better adapted to their environment, GAs expose genetic material, frequently strings of 1s and Os, to the forces of artificial evolution: selection, mutation, recombination, etc. GAs start with a pool of randomly-generated candidate solutions which are then tested and scored with respect to their utility. Solutions are then bred by probabilistically selecting high quality parents and recombining their genetic representations to produce offspring solutions. Offspring are typically subjected to a small amount of random mutation. After a pool of offspring is produced, this process iterates until a satisfactory solution is found or an iteration limit is reached. Genetic algorithms have been applied to a wide variety of problems in many fields, including chemistry, biology, and many engineering disciplines. There are many styles of parallelism used in implementing parallel GAs. One such method is called the master-slave or processor farm approach. In this technique, slave nodes are used solely to compute fitness evaluations (the most time consuming part). The master processor collects fitness scores from the nodes and performs the genetic operators (selection, reproduction, variation, etc.). Because of dependency

  10. Improved Battery Charger Circuit Utilizing Reduced DC-link Capacitors

    Directory of Open Access Journals (Sweden)

    Vencislav Valchev

    2017-11-01

    Full Text Available The article presents a comparison of advantages and disadvantages of a battery charger circuit with and without the use of DC-link capacitors in it. The specific application requirements, namely ultra-light electric vehicles, are set as lightness, efficiency and robustness of the design. Prove of greater reliability and improvement on maintenance costs without significant decrease in the quality of charging process with the removal of DC-link capacitors in rectifier and boost converter circuits is accomplished. The proposed circuit parameters are analyzed by carried out simulations.

  11. Error Mitigation for Short-Depth Quantum Circuits

    Science.gov (United States)

    Temme, Kristan; Bravyi, Sergey; Gambetta, Jay M.

    2017-11-01

    Two schemes are presented that mitigate the effect of errors and decoherence in short-depth quantum circuits. The size of the circuits for which these techniques can be applied is limited by the rate at which the errors in the computation are introduced. Near-term applications of early quantum devices, such as quantum simulations, rely on accurate estimates of expectation values to become relevant. Decoherence and gate errors lead to wrong estimates of the expectation values of observables used to evaluate the noisy circuit. The two schemes we discuss are deliberately simple and do not require additional qubit resources, so to be as practically relevant in current experiments as possible. The first method, extrapolation to the zero noise limit, subsequently cancels powers of the noise perturbations by an application of Richardson's deferred approach to the limit. The second method cancels errors by resampling randomized circuits according to a quasiprobability distribution.

  12. Verification and Analysis of Implementing Virtual Electric Devices in Circuit Simulation of Pulsed DC Electrical Devices in the NI MULTISIM 10.1 Environment

    Directory of Open Access Journals (Sweden)

    V. A. Solov'ev

    2015-01-01

    Full Text Available The paper presents the analysis results of the implementation potential and evaluation of the virtual electric devices reliability when conducting circuit simulation of pulsed DC electrical devices in the NI Multisim 10.1environment. It analyses metrological properties of electric measuring devices and sensors of the NI Multisim 10.1environment. To calculate the reliable parameters of periodic non-sinusoidal electrical values based on their physical feasibility the mathematical expressions have been defined.To verify the virtual electric devices a circuit model of the power section of buck DC converter with enabled devices under consideration at its input and output is used as a consumer of pulse current of trapezoidal or triangular form. It is used as an example to show a technique to verify readings of virtual electric measuring devices in the NI Multisim 10.1environment.It is found that when simulating the pulsed DC electric devices to measure average and RMS voltage supply and current consumption values it is advisable to use the probe. Electric device power consumption read from the virtual power meter is equal to its average value, and its displayed power factor is inversely proportional to the input current form factor. To determine the RMS pulsed DC current by ammeter and multi-meter it is necessary to measure current by these devices in DC and AC modes, and then determine the RMS value of measurement results.Virtual electric devices verification has proved the possibility of their application to determine the energy performance of transistor converters for various purposes in the circuit simulation in the NI 10.1 Multisim environment, thus saving time of their designing.

  13. General-purpose parallel simulator for quantum computing

    International Nuclear Information System (INIS)

    Niwa, Jumpei; Matsumoto, Keiji; Imai, Hiroshi

    2002-01-01

    With current technologies, it seems to be very difficult to implement quantum computers with many qubits. It is therefore of importance to simulate quantum algorithms and circuits on the existing computers. However, for a large-size problem, the simulation often requires more computational power than is available from sequential processing. Therefore, simulation methods for parallel processors are required. We have developed a general-purpose simulator for quantum algorithms/circuits on the parallel computer (Sun Enterprise4500). It can simulate algorithms/circuits with up to 30 qubits. In order to test efficiency of our proposed methods, we have simulated Shor's factorization algorithm and Grover's database search, and we have analyzed robustness of the corresponding quantum circuits in the presence of both decoherence and operational errors. The corresponding results, statistics, and analyses are presented in this paper

  14. Commutation circuit for an HVDC circuit breaker

    Science.gov (United States)

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  15. The elusive memristor: properties of basic electrical circuits

    Energy Technology Data Exchange (ETDEWEB)

    Joglekar, Yogesh N; Wolf, Stephen J [Department of Physics, Indiana University Purdue University Indianapolis, Indianapolis, IN 46202 (United States)], E-mail: yojoglek@iupui.edu

    2009-07-15

    We present an introduction to and a tutorial on the properties of the recently discovered ideal circuit element, a memristor. By definition, a memristor M relates the charge q and the magnetic flux {phi} in a circuit and complements a resistor R, a capacitor C and an inductor L as an ingredient of ideal electrical circuits. The properties of these three elements and their circuits are a part of the standard curricula. The existence of the memristor as the fourth ideal circuit element was predicted in 1971 based on symmetry arguments, but was clearly experimentally demonstrated just last year. We present the properties of a single memristor, memristors in series and parallel, as well as ideal memristor-capacitor (MC), memristor-inductor (ML) and memristor-capacitor-inductor (MCL) circuits. We find that the memristor has hysteretic current-voltage characteristics. We show that the ideal MC (ML) circuit undergoes non-exponential charge (current) decay with two time scales and that by switching the polarity of the capacitor, an ideal MCL circuit can be tuned from overdamped to underdamped. We present simple models which show that these unusual properties are closely related to the memristor's internal dynamics. This tutorial complements the pedagogy of ideal circuit elements (R, C and L) and the properties of their circuits, and is aimed at undergraduate physics and electrical engineering students.

  16. The elusive memristor: properties of basic electrical circuits

    International Nuclear Information System (INIS)

    Joglekar, Yogesh N; Wolf, Stephen J

    2009-01-01

    We present an introduction to and a tutorial on the properties of the recently discovered ideal circuit element, a memristor. By definition, a memristor M relates the charge q and the magnetic flux φ in a circuit and complements a resistor R, a capacitor C and an inductor L as an ingredient of ideal electrical circuits. The properties of these three elements and their circuits are a part of the standard curricula. The existence of the memristor as the fourth ideal circuit element was predicted in 1971 based on symmetry arguments, but was clearly experimentally demonstrated just last year. We present the properties of a single memristor, memristors in series and parallel, as well as ideal memristor-capacitor (MC), memristor-inductor (ML) and memristor-capacitor-inductor (MCL) circuits. We find that the memristor has hysteretic current-voltage characteristics. We show that the ideal MC (ML) circuit undergoes non-exponential charge (current) decay with two time scales and that by switching the polarity of the capacitor, an ideal MCL circuit can be tuned from overdamped to underdamped. We present simple models which show that these unusual properties are closely related to the memristor's internal dynamics. This tutorial complements the pedagogy of ideal circuit elements (R, C and L) and the properties of their circuits, and is aimed at undergraduate physics and electrical engineering students

  17. Triple inverter pierce oscillator circuit suitable for CMOS

    Science.gov (United States)

    Wessendorf,; Kurt, O [Albuquerque, NM

    2007-02-27

    An oscillator circuit is disclosed which can be formed using discrete field-effect transistors (FETs), or as a complementary metal-oxide-semiconductor (CMOS) integrated circuit. The oscillator circuit utilizes a Pierce oscillator design with three inverter stages connected in series. A feedback resistor provided in a feedback loop about a second inverter stage provides an almost ideal inverting transconductance thereby allowing high-Q operation at the resonator-controlled frequency while suppressing a parasitic oscillation frequency that is inherent in a Pierce configuration using a "standard" triple inverter for the sustaining amplifier. The oscillator circuit, which operates in a range of 10 50 MHz, has applications for use as a clock in a microprocessor and can also be used for sensor applications.

  18. Classical and quantum stochastic models of resistive and memristive circuits

    Science.gov (United States)

    Gough, John E.; Zhang, Guofeng

    2017-07-01

    The purpose of this paper is to examine stochastic Markovian models for circuits in phase space for which the drift term is equivalent to the standard circuit equations. In particular, we include dissipative components corresponding to both a resistor and a memristor in series. We obtain a dilation of the problem which is canonical in the sense that the underlying Poisson bracket structure is preserved under the stochastic flow. We do this first of all for standard Wiener noise but also treat the problem using a new concept of symplectic noise, where the Poisson structure is extended to the noise as well as the circuit variables, and in particular where we have canonically conjugate noises. Finally, we construct a dilation which describes the quantum mechanical analogue.

  19. TOFPET 2: A high-performance circuit for PET time-of-flight

    Energy Technology Data Exchange (ETDEWEB)

    Di Francesco, Agostino, E-mail: agodifra@lip.pt [LIP, Lisbon (Portugal); Bugalho, Ricardo [LIP, Lisbon (Portugal); PETsys Electronics, Oeiras (Portugal); Oliveira, Luis [CTS-UNINOVA, DEE FCT-UNL, Caparica (Portugal); Rivetti, Angelo [INFN - sez. Torino (Italy); Rolo, Manuel [LIP, Lisbon (Portugal); INFN - sez. Torino (Italy); Silva, Jose C.; Varela, Joao [LIP, Lisbon (Portugal); PETsys Electronics, Oeiras (Portugal)

    2016-07-11

    We present a readout and digitization ASIC featuring low-noise and low-power for time-of flight (TOF) applications using SiPMs. The circuit is designed in standard CMOS 110 nm technology, has 64 independent channels and is optimized for time-of-flight measurement in Positron Emission Tomography (TOF-PET). The input amplifier is a low impedance current conveyor based on a regulated common-gate topology. Each channel has quad-buffered analogue interpolation TDCs (time binning 20 ps) and charge integration ADCs with linear response at full scale (1500 pC). The signal amplitude can also be derived from the measurement of time-over-threshold (ToT). Simulation results show that for a single photo-electron signal with charge 200 (550) fC generated by a SiPM with (320 pF) capacitance the circuit has 24 (30) dB SNR, 75 (39) ps r.m.s. resolution, and 4 (8) mW power consumption. The event rate is 600 kHz per channel, with up to 2 MHz dark counts rejection.

  20. Multiplier less high-speed squaring circuit for binary numbers

    Science.gov (United States)

    Sethi, Kabiraj; Panda, Rutuparna

    2015-03-01

    The squaring operation is important in many applications in signal processing, cryptography etc. In general, squaring circuits reported in the literature use fast multipliers. A novel idea of a squaring circuit without using multipliers is proposed in this paper. Ancient Indian method used for squaring decimal numbers is extended here for binary numbers. The key to our success is that no multiplier is used. Instead, one squaring circuit is used. The hardware architecture of the proposed squaring circuit is presented. The design is coded in VHDL and synthesised and simulated in Xilinx ISE Design Suite 10.1 (Xilinx Inc., San Jose, CA, USA). It is implemented in Xilinx Vertex 4vls15sf363-12 device (Xilinx Inc.). The results in terms of time delay and area is compared with both modified Booth's algorithm and squaring circuit using Vedic multipliers. Our proposed squaring circuit seems to have better performance in terms of both speed and area.

  1. A current-mode multi-valued adder circuit for multi-operand addition

    Science.gov (United States)

    Cini, Ugur; Morgül, Avni

    2011-06-01

    Static CMOS logic circuits have a robust working performance. However, they generate excessive noise when the switching activity is high. Source-coupled logic (SCL) circuits can be an alternative for analogue-friendly design where constant current is driven from the power supply, independent of the switching activity of the circuit. In this work, a compact current-mode multi-operand adder cell, similar to SCL circuits, is designed. The circuit adds up seven input operands using a technique similar to the (7, 3) counter circuit, but with less active elements when compared to a conventional binary (7, 3) counter. The design has comparable power and delay characteristics compared to conventional SCL implementation. The proposed circuit requires only 69 transistors, where 96 transistors are required for the equivalent SCL implementation. Hence the circuit saves on both transistor count and interconnections. The design is optimised for low power operation of high performance arithmetic circuits. The proposed multi-operand adder circuit is designed in UMC 0.18 µm technology. As an example of application, an 8 × 8 bit multiplier circuit is designed and simulated using HSPICE.

  2. Smart Power: New power integrated circuit technologies and their applications

    Science.gov (United States)

    Kuivalainen, Pekka; Pohjonen, Helena; Yli-Pietilae, Timo; Lenkkeri, Jaakko

    1992-05-01

    Power Integrated Circuits (PIC) is one of the most rapidly growing branches of the semiconductor technology. The PIC markets has been forecast to grow from 660 million dollars in 1990 to 1658 million dollars in 1994. It has even been forecast that at the end of the 1990's the PIC markets would correspond to the value of the whole semiconductor production in 1990. Automotive electronics will play the leading role in the development of the standard PIC's. Integrated motor drivers (36 V/4 A), smart integrated switches (60 V/30 A), solenoid drivers, integrated switch-mode power supplies and regulators are the latest standard devices of the PIC manufactures. ASIC (Application Specific Integrated Circuits) PIC solutions are needed for the same reasons as other ASIC devices: there are no proper standard devices, a company has a lot of application knowhow, which should be kept inside the company, the size of the product must be reduced, and assembly costs are wished to be reduced by decreasing the number of discrete devices. During the next few years the most probable ASIC PIC applications in Finland will be integrated solenoid and motor drivers, an integrated electronic lamp ballast circuit and various sensor interface circuits. Application of the PIC technologies to machines and actuators will strongly be increased all over the world. This means that various PIC's, either standard PIC's or full custom ASIC circuits, will appear in many products which compete with the corresponding Finnish products. Therefore the development of the PIC technologies must be followed carefully in order to immediately be able to apply the latest development in the smart power technologies and their design methods.

  3. Memristor Circuits and Systems

    KAUST Repository

    Zidan, Mohammed A.

    2015-05-01

    Current CMOS-based technologies are facing design challenges related to the continuous scaling down of the minimum feature size, according to Moore’s law. Moreover, conventional computing architecture is no longer an effective way of fulfilling modern applications demands, such as big data analysis, pattern recognition, and vector processing. Therefore, there is an exigent need to shift to new technologies, at both the architecture and the device levels. Recently, memristor devices and structures attracted attention for being promising candidates for this job. Memristor device adds a new dimension for designing novel circuits and systems. In addition, high-density memristor-based crossbar is widely considered to be the essential element for future memory and bio-inspired computing systems. However, numerous challenges need to be addressed before the memristor genuinely replaces current memory and computing technologies, which is the motivation behind this research effort. In order to address the technology challenges, we begin by fabricating and modeling the memristor device. The devices fabricated at our local clean room enriched our understanding of the memristive phenomenon and enabled the experimental testing for our memristor-based circuits. Moreover, our proposed mathematical modeling for memristor behavior is an essential element for the theoretical circuit design stage. Designing and addressing the challenges of memristor systems with practical complexity, however, requires an extra step, which takes the form of a reliable and modular simulation platform. We, therefore, built a new simulation platform for the resistive crossbar, which can simulate realistic size arrays filled with real memory data. In addition, this simulation platform includes various crossbar nonidealities in order to obtain accurate simulation results. Consequently, we were able to address the significant challenges facing the high density memristor crossbar, as the building block for

  4. Pulse Detecting Genetic Circuit – A New Design Approach

    Science.gov (United States)

    Inniss, Mara; Iba, Hitoshi; Way, Jeffrey C.

    2016-01-01

    A robust cellular counter could enable synthetic biologists to design complex circuits with diverse behaviors. The existing synthetic-biological counters, responsive to the beginning of the pulse, are sensitive to the pulse duration. Here we present a pulse detecting circuit that responds only at the falling edge of a pulse–analogous to negative edge triggered electric circuits. As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events. This transcription-based pulse detecting circuit depends on the interaction of two co-expressed lambdoid phage-derived proteins: the first is unstable and inhibits the regulatory activity of the second, stable protein. At the end of the pulse the unstable inhibitor protein disappears from the cell and the second protein triggers the recording of the event completion. Using stochastic simulation we showed that the proposed design can detect the completion of the pulse irrespective to the pulse duration. In our simulation we also showed that fusing the pulse detector with a phage lambda memory element we can construct a counter which can be extended to count larger numbers. The proposed design principle is a new control mechanism for synthetic biology which can be integrated in different circuits for identifying the completion of an event. PMID:27907045

  5. The review of radiation effects of γ total dose in CMOS circuits

    International Nuclear Information System (INIS)

    Chen Panxun; Gao Wenming; Xie Zeyuan; Mi Bang

    1992-01-01

    Radiation performances of commercial and rad-hard CMOS circuits are reviewed. Threshold voltage, static power current, V in -V out characteristic and propagation delay time related with total dose are presented for CMOS circuits from several manufacturing processes. The performance of radiation-annealing of experimental circuits had been observed for two years. The comparison has been made between the CMOS circuits made in China and the commercial RCA products. 60 Co γ source can serve as γ simulator of the nuclear explosion

  6. Inter digital transducer modelling through Mason equivalent circuit model

    DEFF Research Database (Denmark)

    Mishra, Dipti; Singh, Abhishek; Hussain, Dil muhammed Akbar

    2016-01-01

    ) is projected which is well-suited with a broadly cast-off universal resolution circuit simulator SPICE built-in out with the proficiency to simulate the negative capacitances and inductances. The investigation is done to prove the straightforwardness of establishing the frequency and time domain physical...

  7. An Improved Memristive Diode Bridge-Based Band Pass Filter Chaotic Circuit

    Directory of Open Access Journals (Sweden)

    Quan Xu

    2017-01-01

    Full Text Available By replacing a series resistor in active band pass filter (BPF with an improved memristive diode bridge emulator, a third-order memristive BPF chaotic circuit is presented. The improved memristive diode bridge emulator without grounded limitation is equivalently achieved by a diode bridge cascaded with only one inductor, whose fingerprints of pinched hysteresis loop are examined by numerical simulations and hardware experiments. The memristive BPF chaotic circuit has only one zero unstable saddle point but causes complex dynamical behaviors including period, chaos, period doubling bifurcation, and coexisting bifurcation modes. Specially, it should be highly significant that two kinds of bifurcation routes are displayed under different initial conditions and the coexistence of three different topological attractors is found in a narrow parameter range. Moreover, hardware circuit using discrete components is fabricated and experimental measurements are performed, upon which the numerical simulations are validated. Notably, the proposed memristive BPF chaotic circuit is only third-order and has simple topological structure.

  8. Analog circuit design automation for performance

    NARCIS (Netherlands)

    Ning, Zhen-Qiu; Ning, Zhen-Qiu; Kole, Marq; Kole, M.E.; Mouthaan, A.J.; Wallinga, Hans

    1992-01-01

    This paper describes an improved version of the program SEAS (a Simulated Evolution approach for Analog circuit Synthesis), in which an approach for selection of alternatives based on the evaluation of mutation values is developed, and design automafion for high performance comparators is covered.

  9. Diagnosis of soft faults in analog integrated circuits based on fractional correlation

    International Nuclear Information System (INIS)

    Deng Yong; Shi Yibing; Zhang Wei

    2012-01-01

    Aiming at the problem of diagnosing soft faults in analog integrated circuits, an approach based on fractional correlation is proposed. First, the Volterra series of the circuit under test (CUT) decomposed by the fractional wavelet packet are used to calculate the fractional correlation functions. Then, the calculated fractional correlation functions are used to form the fault signatures of the CUT. By comparing the fault signatures, the different soft faulty conditions of the CUT are identified and the faults are located. Simulations of benchmark circuits illustrate the proposed method and validate its effectiveness in diagnosing soft faults in analog integrated circuits. (semiconductor integrated circuits)

  10. Oscillator circuits

    CERN Document Server

    Graf, Rudolf F

    1996-01-01

    This series of circuits provides designers with a quick source for oscillator circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listing

  11. Measuring circuits

    CERN Document Server

    Graf, Rudolf F

    1996-01-01

    This series of circuits provides designers with a quick source for measuring circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listings

  12. Circuit theoretical methods for efficient solution of finite element structural mechanics problems

    OpenAIRE

    Ekinci, Ahmet Suat

    1999-01-01

    Ankara : The Department of Electrical and Electronics Engineering and the Institute of Engineering and Sciences of Bilkent Univ., 1999. Thesis (Ph.D.) -- Bilkent University, 1999. Includes bibliographical references leaves 78-84. Shrinking device dimensions in integrated circuit technology made integrated circuits with millions of components a reality. As a result of this advance, electrical circuit simulators that can handle very large number of components have emerged. These...

  13. A plausible neural circuit for decision making and its formation based on reinforcement learning.

    Science.gov (United States)

    Wei, Hui; Dai, Dawei; Bu, Yijie

    2017-06-01

    A human's, or lower insects', behavior is dominated by its nervous system. Each stable behavior has its own inner steps and control rules, and is regulated by a neural circuit. Understanding how the brain influences perception, thought, and behavior is a central mandate of neuroscience. The phototactic flight of insects is a widely observed deterministic behavior. Since its movement is not stochastic, the behavior should be dominated by a neural circuit. Based on the basic firing characteristics of biological neurons and the neural circuit's constitution, we designed a plausible neural circuit for this phototactic behavior from logic perspective. The circuit's output layer, which generates a stable spike firing rate to encode flight commands, controls the insect's angular velocity when flying. The firing pattern and connection type of excitatory and inhibitory neurons are considered in this computational model. We simulated the circuit's information processing using a distributed PC array, and used the real-time average firing rate of output neuron clusters to drive a flying behavior simulation. In this paper, we also explored how a correct neural decision circuit is generated from network flow view through a bee's behavior experiment based on the reward and punishment feedback mechanism. The significance of this study: firstly, we designed a neural circuit to achieve the behavioral logic rules by strictly following the electrophysiological characteristics of biological neurons and anatomical facts. Secondly, our circuit's generality permits the design and implementation of behavioral logic rules based on the most general information processing and activity mode of biological neurons. Thirdly, through computer simulation, we achieved new understanding about the cooperative condition upon which multi-neurons achieve some behavioral control. Fourthly, this study aims in understanding the information encoding mechanism and how neural circuits achieve behavior control

  14. Circuit Design and Implementation of Micro-Displacement Measurement System of Laser Self-Mixing Interference

    Directory of Open Access Journals (Sweden)

    Guang Ya LIU

    2014-02-01

    Full Text Available In this paper we put forward the basic structure of a micro-displacement measuring system based on the basic theory of laser feedback, and designed a hardware circuit of the system, including the LD driver and modulation circuit, photoelectric signal amplifier and filter circuit, which meet the requirements of the follow-up experimental study by theoretical analysis and Multisim simulation to the circuit.

  15. The Pierce diode with an external circuit: II, Non-uniform equilibria

    International Nuclear Information System (INIS)

    Lawson, W.S.

    1987-01-01

    The non-uniform (non-linear) equilibria of the classical (short circuit) Pierce diode and the extended (series RLC external circuit) Pierce diode are described theoretically, and explored via computer simulation. It is found that most equilibria are correctly predicted by theory, but that the continuous set of equilibria of the classical Pierce diode at α = 2π are not observed. The stability characteristics of the non-uniform equilibria are also worked out, and are consistent with the simulations. 8 refs., 22 figs., 3 tabs

  16. Design for manufacturability of a VDSM standard cell library

    International Nuclear Information System (INIS)

    Zhou Chong; Zeng Jianping; Chen Lan; Yin Minghui; Zhao Jie

    2012-01-01

    This paper presents a method of designing a 65 nm DFM standard cell library. By reducing the amount of the library largely, the process of optical proximity correction (OPC) becomes more efficient and the need for large storage is reduced. This library is more manufacture-friendly as each cell has been optimized according to the DFM rule and optical simulation. The area penalty is minor compared with traditional library, and the timing, as well as power has a good performance. Furthermore, this library has passed the test from the Technology Design Department of Foundry. The result shows this DFM standard cell library has advantages that improve the yield. (semiconductor integrated circuits)

  17. Study of recursive model for pole-zero cancellation circuit

    International Nuclear Information System (INIS)

    Zhou Jianbin; Zhou Wei; Hong Xu; Hu Yunchuan; Wan Xinfeng; Du Xin; Wang Renbo

    2014-01-01

    The output of charge sensitive amplifier (CSA) is a negative exponential signal with long decay time which will result in undershoot after C-R differentiator. Pole-zero cancellation (PZC) circuit is often applied to eliminate undershoot in many radiation detectors. However, it is difficult to use a zero created by PZC circuit to cancel a pole in CSA output signal accurately because of the influences of electronic components inherent error and environmental factors. A novel recursive model for PZC circuit is presented based on Kirchhoff's Current Law (KCL) in this paper. The model is established by numerical differentiation algorithm between the input and the output signal. Some simulation experiments for a negative exponential signal are carried out using Visual Basic for Application (VBA) program and a real x-ray signal is also tested. Simulated results show that the recursive model can reduce the time constant of input signal and eliminate undershoot. (authors)

  18. Investigation of SFQ integrated circuits using Nb fabrication technology

    International Nuclear Information System (INIS)

    Numata, H.; Tanaka, M.; Kitagawa, Y.; Tahara, S.

    1999-01-01

    In NEC's standard process, the minimum junction size is 2 μm and the critical current density (J C ) is 2.5 kA cm -2 . In the process, i-line stepper lithography and reactive ion etching with SF 6 gas are used and the standard deviation (σ) of the critical current (I C ) was 0.9% for the 2 μm junctions. This junction uniformity enables integration of more than 10M junctions if an I C variation of ±10% permits correct circuit operation. A 512-bit shift register was designed and fabricated by our standard process. Correct 512-bit delay operation was obtained. These results are promising for the large-scale integration of single flux quantum circuits. (author)

  19. FinFET modeling for IC simulation and design

    CERN Document Server

    Hu, Chenming; Lu, Darsen D

    2015-01-01

    This book is the first to explain FinFET modeling for IC simulation and the industry standard - BSIM-CMG - describing the rush in demand for advancing the technology from planar to 3D architecture, as now enabled by the approved industry standard. The book gives a strong foundation on the physics and operation of FinFET, details aspects of the BSIM-CMG model such as surface potential, charge and current calculations, and includes a dedicated chapter on parameter extraction procedures, providing a step-by-step approach for the efficient extraction of model parameters. With this book you will learn: * Why you should use FinFET* The physics and operation of FinFET* Details of the FinFET standard model (BSIM-CMG)* Parameter extraction in BSIM-CMG* FinFET circuit design and simulation * Authored by the lead inventor and developer of FinFET, and developers of the BSIM-CM standard model, providing an experts' insight into the specifications of the standard* The first book on the industry-standard FinFET model - BSIM...

  20. Formalization, equivalence and generalization of basic resonance electrical circuits

    Science.gov (United States)

    Penev, Dimitar; Arnaudov, Dimitar; Hinov, Nikolay

    2017-12-01

    In the work are presented basic resonance circuits, which are used in resonance energy converters. The following resonant circuits are considered: serial, serial with parallel load parallel capacitor, parallel and parallel with serial loaded inductance. For the circuits under consideration, expressions are generated for the frequencies of own oscillations and for the equivalence of the active power emitted in the load. Mathematical expressions are graphically constructed and verified using computer simulations. The results obtained are used in the model based design of resonant energy converters with DC or AC output. This guaranteed the output indicators of power electronic devices.

  1. FDTD-SPICE for Characterizing Metamaterials Integrated with Electronic Circuits

    Directory of Open Access Journals (Sweden)

    Zhengwei Hao

    2012-01-01

    Full Text Available A powerful time-domain FDTD-SPICE simulator is implemented and applied to the broadband analysis of metamaterials integrated with active and tunable circuit elements. First, the FDTD-SPICE modeling theory is studied and details of interprocess communication and hybridization of the two techniques are discussed. To verify the model, some simple cases are simulated with results in both time domain and frequency domain. Then, simulation of a metamaterial structure constructed from periodic resonant loops integrated with lumped capacitor elements is studied, which demonstrates tuning resonance frequency of medium by changing the capacitance of the integrated elements. To increase the bandwidth of the metamaterial, non-Foster transistor configurations are integrated with the loops and FDTD-SPICE is applied to successfully bridge the physics of electromagnetic and circuit topologies and to model the whole composite structure. Our model is also applied to the design and simulation of a metasurface integrated with nonlinear varactors featuring tunable reflection phase characteristic.

  2. Resonance circuits for adiabatic circuits

    Directory of Open Access Journals (Sweden)

    C. Schlachta

    2003-01-01

    Full Text Available One of the possible techniques to reduces the power consumption in digital CMOS circuits is to slow down the charge transport. This slowdown can be achieved by introducing an inductor in the charging path. Additionally, the inductor can act as an energy storage element, conserving the energy that is normally dissipated during discharging. Together with the parasitic capacitances from the circuit a LCresonant circuit is formed.

  3. Dynamics of pi-junction interferometer circuits

    DEFF Research Database (Denmark)

    Kornkev, V.K.; Mozhaev, P.B.; Borisenko, I.V.

    2002-01-01

    The pi-junction superconducting circuit dynamics was studied by means of numerical simulation technique. Parallel arrays consisting of Josephson junctions of both 0- and pi-type were studied as a model of high-T-c grain-boundary Josephson junction. The array dynamics and the critical current depe...

  4. Synthetic Biology: A Unifying View and Review Using Analog Circuits.

    Science.gov (United States)

    Teo, Jonathan J Y; Woo, Sung Sik; Sarpeshkar, Rahul

    2015-08-01

    We review the field of synthetic biology from an analog circuits and analog computation perspective, focusing on circuits that have been built in living cells. This perspective is well suited to pictorially, symbolically, and quantitatively representing the nonlinear, dynamic, and stochastic (noisy) ordinary and partial differential equations that rigorously describe the molecular circuits of synthetic biology. This perspective enables us to construct a canonical analog circuit schematic that helps unify and review the operation of many fundamental circuits that have been built in synthetic biology at the DNA, RNA, protein, and small-molecule levels over nearly two decades. We review 17 circuits in the literature as particular examples of feedforward and feedback analog circuits that arise from special topological cases of the canonical analog circuit schematic. Digital circuit operation of these circuits represents a special case of saturated analog circuit behavior and is automatically incorporated as well. Many issues that have prevented synthetic biology from scaling are naturally represented in analog circuit schematics. Furthermore, the deep similarity between the Boltzmann thermodynamic equations that describe noisy electronic current flow in subthreshold transistors and noisy molecular flux in biochemical reactions has helped map analog circuit motifs in electronics to analog circuit motifs in cells and vice versa via a `cytomorphic' approach. Thus, a body of knowledge in analog electronic circuit design, analysis, simulation, and implementation may also be useful in the robust and efficient design of molecular circuits in synthetic biology, helping it to scale to more complex circuits in the future.

  5. Testing of SF6- and vacuum generator circuit breakers

    NARCIS (Netherlands)

    Smeets, R.P.P.; Paske, te L.H.

    2011-01-01

    Generator circuit breakers differ in various aspects from standard distribution breakers. One of the main differences is in the electrical stresses during fault current interruption. This situation will be discussed in the present contribution, along with the standardization status and the

  6. Improving the Short-Circuit Reliability in IGBTs

    DEFF Research Database (Denmark)

    Reigosa, Paula Diaz; Iannuzzo, Francesco; Rahimo, Munaf

    2018-01-01

    takes place during the IGBT short-circuit, whose time-varying element is the Miller capacitance, which is involved in the amplification mechanism. This hypothesis has been validated through simulations and its mitigation is possible by increasing the electric field at the emitter of the IGBT......In this paper, the oscillation mechanism limiting the ruggedness of IGBTs is investigated through both circuit and device analysis. The work presented here is based on a time-domain approach for two different IGBT cell structures (i.e., trench-gate and planar), illustrating the 2-D effects during...

  7. Approximation for Transient of Nonlinear Circuits Using RHPM and BPES Methods

    Directory of Open Access Journals (Sweden)

    H. Vazquez-Leal

    2013-01-01

    Full Text Available The microelectronics area constantly demands better and improved circuit simulation tools. Therefore, in this paper, rational homotopy perturbation method and Boubaker Polynomials Expansion Scheme are applied to a differential equation from a nonlinear circuit. Comparing the results obtained by both techniques revealed that they are effective and convenient.

  8. CMOS analog integrated circuit design technology; CMOS anarogu IC sekkei gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Fujimoto, H.; Fujisawa, A. [Fuji Electric Co. Ltd., Tokyo (Japan)

    2000-08-10

    In the field of the LSI (large scale integrated circuit) in rapid progress toward high integration and advanced functions, CAD (computer-aided design) technology has become indispensable to LSI development within a short period. Fuji Electric has developed design technologies and automatic design system to develop high-quality analog ICs (integrated circuits), including power supply ICs. within a short period. This paper describes CMOS (complementary metal-oxide semiconductor) analog macro cell, circuit simulation, automatic routing, and backannotation technologies. (author)

  9. Reduced-order modeling of piezoelectric energy harvesters with nonlinear circuits under complex conditions

    Science.gov (United States)

    Xiang, Hong-Jun; Zhang, Zhi-Wei; Shi, Zhi-Fei; Li, Hong

    2018-04-01

    A fully coupled modeling approach is developed for piezoelectric energy harvesters in this work based on the use of available robust finite element packages and efficient reducing order modeling techniques. At first, the harvester is modeled using finite element packages. The dynamic equilibrium equations of harvesters are rebuilt by extracting system matrices from the finite element model using built-in commands without any additional tools. A Krylov subspace-based scheme is then applied to obtain a reduced-order model for improving simulation efficiency but preserving the key features of harvesters. Co-simulation of the reduced-order model with nonlinear energy harvesting circuits is achieved in a system level. Several examples in both cases of harmonic response and transient response analysis are conducted to validate the present approach. The proposed approach allows to improve the simulation efficiency by several orders of magnitude. Moreover, the parameters used in the equivalent circuit model can be conveniently obtained by the proposed eigenvector-based model order reduction technique. More importantly, this work establishes a methodology for modeling of piezoelectric energy harvesters with any complicated mechanical geometries and nonlinear circuits. The input load may be more complex also. The method can be employed by harvester designers to optimal mechanical structures or by circuit designers to develop novel energy harvesting circuits.

  10. Operational Excellence through Schedule Optimization and Production Simulation of Application Specific Integrated Circuits.

    Energy Technology Data Exchange (ETDEWEB)

    Flory, John Andrew [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Padilla, Denise D. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Gauthier, John H. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Zwerneman, April Marie [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Miller, Steven P [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2016-05-01

    Upcoming weapon programs require an aggressive increase in Application Specific Integrated Circuit (ASIC) production at Sandia National Laboratories (SNL). SNL has developed unique modeling and optimization tools that have been instrumental in improving ASIC production productivity and efficiency, identifying optimal operational and tactical execution plans under resource constraints, and providing confidence in successful mission execution. With ten products and unprecedented levels of demand, a single set of shared resources, highly variable processes, and the need for external supplier task synchronization, scheduling is an integral part of successful manufacturing. The scheduler uses an iterative multi-objective genetic algorithm and a multi-dimensional performance evaluator. Schedule feasibility is assessed using a discrete event simulation (DES) that incorporates operational uncertainty, variability, and resource availability. The tools provide rapid scenario assessments and responses to variances in the operational environment, and have been used to inform major equipment investments and workforce planning decisions in multiple SNL facilities.

  11. Research of Measurement Circuits for High Voltage Current Transformer Based on Rogowski Coils

    Directory of Open Access Journals (Sweden)

    Yan Bing

    2014-02-01

    Full Text Available The electronic current transformer plays an irreplaceable position in the field of relay protection and current measurement of the power system. Rogowski coils are used as sensor parts, and in order to improve the measurement accuracy and reliability, the circuits at the high voltage system are introduced and improved in this paper, including the analog integral element, the filtering circuit and the phase shift circuit. Simulations results proved the reliability and accuracy of the improved circuits.

  12. 30 CFR 75.509 - Electric power circuit and electric equipment; deenergization.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric power circuit and electric equipment... LABOR COAL MINE SAFETY AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Electrical Equipment-General § 75.509 Electric power circuit and electric equipment; deenergization. [Statutory Provisions] All...

  13. Analysis of Power Transfer Efficiency of Standard Integrated Circuit Immunity Test Methods

    Directory of Open Access Journals (Sweden)

    Hai Au Huynh

    2015-01-01

    Full Text Available Direct power injection (DPI and bulk current injection (BCI methods are defined in IEC 62132-3 and IEC 62132-4 as the electromagnetic immunity test method of integrated circuits (IC. The forward power measured at the RF noise generator when the IC malfunctions is used as the measure of immunity level of the IC. However, the actual power that causes failure in ICs is different from forward power measured at the noise source. Power transfer efficiency is used as a measure of power loss of the noise injection path. In this paper, the power transfer efficiencies of DPI and BCI methods are derived and validated experimentally with immunity test setup of a clock divider IC. Power transfer efficiency varies significantly over the frequency range as a function of the test method used and the IC input impedance. For the frequency range of 15 kHz to 1 GHz, power transfer efficiency of the BCI test was constantly higher than that of the DPI test. In the DPI test, power transfer efficiency is particularly low in the lower test frequency range up to 10 MHz. When performing the IC immunity tests following the standards, these characteristics of the test methods need to be considered.

  14. VHDL-AMS Simulation Framework for Molecular-FET Device-to-Circuit Modeling and Design

    Directory of Open Access Journals (Sweden)

    Mariagrazia Graziano

    2018-01-01

    Full Text Available We concentrate on Molecular-FET as a device and present a new modular framework based on VHDL-AMS. We have implemented different Molecular-FET models within the framework. The framework allows comparison between the models in terms of the capability to calculate accurate I-V characteristics. It also provides the option to analyze the impact of Molecular-FET and its implementation in the circuit with the extension of its use in an architecture based on the crossbar configuration. This analysis evidences the effect of choices of technological parameters, the ability of models to capture the impact of physical quantities, and the importance of considering defects at circuit fabrication level. The comparison tackles the computational efforts of different models and techniques and discusses the trade-off between accuracy and performance as a function of the circuit analysis final requirements. We prove this methodology using three different models and test them on a 16-bit tree adder included in Pentium 4 that, to the best of our knowledge, is the biggest circuits based on molecular device ever designed and analyzed.

  15. Dichotomy of nonlinear systems: Application to chaos control of nonlinear electronic circuit

    International Nuclear Information System (INIS)

    Wang Jinzhi; Duan Zhisheng; Huang Lin

    2006-01-01

    In this Letter a new method of chaos control for Chua's circuit and the modified canonical Chua's electrical circuit is proposed by using the results of dichotomy in nonlinear systems. A linear feedback control based on linear matrix inequality (LMI) is given such that chaos oscillation or hyperchaos phenomenon of circuit systems injected control signal disappear. Numerical simulations are presented to illustrate the efficiency of the proposed method

  16. Quantum information processing with superconducting circuits: a review

    Science.gov (United States)

    Wendin, G.

    2017-10-01

    During the last ten years, superconducting circuits have passed from being interesting physical devices to becoming contenders for near-future useful and scalable quantum information processing (QIP). Advanced quantum simulation experiments have been shown with up to nine qubits, while a demonstration of quantum supremacy with fifty qubits is anticipated in just a few years. Quantum supremacy means that the quantum system can no longer be simulated by the most powerful classical supercomputers. Integrated classical-quantum computing systems are already emerging that can be used for software development and experimentation, even via web interfaces. Therefore, the time is ripe for describing some of the recent development of superconducting devices, systems and applications. As such, the discussion of superconducting qubits and circuits is limited to devices that are proven useful for current or near future applications. Consequently, the centre of interest is the practical applications of QIP, such as computation and simulation in Physics and Chemistry.

  17. Voltage-Mode All-Pass Filters Including Minimum Component Count Circuits

    Directory of Open Access Journals (Sweden)

    Sudhanshu Maheshwari

    2007-01-01

    Full Text Available This paper presents two new first-order voltage-mode all-pass filters using a single-current differencing buffered amplifier and four passive components. Each circuit is compatible to a current-controlled current differencing buffered amplifier with only two passive elements, thus resulting in two more circuits, which employ a capacitor, a resistor, and an active element, thus using a minimum of active and passive component counts. The proposed circuits possess low output impedance, and hence can be easily cascaded for voltage-mode systems. PSPICE simulation results are given to confirm the theory.

  18. CAD-CAM printed circuit board design

    Science.gov (United States)

    Agy, W. E.

    A step-by-step procedure for a printed circuit design achieved by CAD is presented. The operator at the interactive CRT station moves a stylus across a graphics tablet and intersperses commands which result in computer-generated pictorial forms on the screen that were drawn on the pad. Standard symbols are used for commands allowing, for instance, connections to be made of specific types in certain locations, which can be automatically edited from a materials list. An entire network of drawn lines can be referenced by a signal name for recall, and a finished circuit schematic can be checked for designs rules compliance, including fault reporting in terms of designator/pin number. A map may be present delineating the boundaries of the circuitry area, and previously completed circuitry segments can be recalled for piece-by-piece assembly of the circuit board.

  19. A perturbation-based model for rectifier circuits

    Directory of Open Access Journals (Sweden)

    Vipin B. Vats

    2006-01-01

    Full Text Available A perturbation-theoretic analysis of rectifier circuits is presented. The governing differential equation of the half-wave rectifier with capacitor filter is analyzed by expanding the output voltage as a Taylor series with respect to an artificially introduced parameter in the nonlinearity of the diode characteristic as is done in quantum theory. The perturbation parameter introduced in the analysis is independent of the circuit components as compared to the method presented by multiple scales. The various terms appearing in the perturbation series are then modeled in the form of an equivalent circuit. This model is subsequently used in the analysis of full-wave rectifier. Matlab simulation results are included which confirm the validity of the theoretical formulations. Perturbation analysis acts a helpful tool in analyzing time-varying systems and chaotic systems.

  20. Quantum Effect in the Mesoscopic RLC Circuits with a Source

    International Nuclear Information System (INIS)

    Liu Jianxin; Yan Zhanyuan

    2005-01-01

    The research work on the quantum effects in mesoscopic circuits has undergone a rapid development recently, however the whole quantum theory of the mesoscopic circuits should consider the discreteness of the electric charge. In this paper, based on the fundamental fact that the electric charge takes discrete values, the finite-difference Schroedinger equation of the mesoscopic RLC circuit with a source is achieved. With a unitary transformation, the Schroedinger equation becomes the standard Mathieu equation, then the energy spectrum and the wave functions of the system are obtained. Using the WKBJ method, the average of currents and square of the current are calculated. The results show the existence of the current fluctuation, which causes noise in the circuits. This paper is an application of the whole quantum mesoscopic circuits theory to the fundamental circuits, and the results will shed light on the design of the miniation circuits, especially on the purpose of reducing quantum noise coherent controlling of the mesoscopic quantum states.

  1. The compact simulator for Tihange nuclear plant

    International Nuclear Information System (INIS)

    Gueben, M.

    1982-01-01

    After an introduction about the simulators for nuclear plants, a description is given of the compact simulator for the Tihange nuclear power plant as well as the simulated circuits and equipments such as the primary and secondary coolant circuits. The extent of simulation, the functions used by the instructor, the use of the simulator, the formation programme and construction planning are described. (AF)

  2. A CMOS integrated timing discriminator circuit for fast scintillation counters

    International Nuclear Information System (INIS)

    Jochmann, M.W.

    1998-01-01

    Based on a zero-crossing discriminator using a CR differentiation network for pulse shaping, a new CMOS integrated timing discriminator circuit is proposed for fast (t r ≥ 2 ns) scintillation counters at the cooler synchrotron COSY-Juelich. By eliminating the input signal's amplitude information by means of an analog continuous-time divider, a normalized pulse shape at the zero-crossing point is gained over a wide dynamic input amplitude range. In combination with an arming comparator and a monostable multivibrator this yields in a highly precise timing discriminator circuit, that is expected to be useful in different time measurement applications. First measurement results of a CMOS integrated logarithmic amplifier, which is part of the analog continuous-time divider, agree well with the corresponding simulations. Moreover, SPICE simulations of the integrated discriminator circuit promise a time walk well below 200 ps (FWHM) over a 40 dB input amplitude dynamic range

  3. Statistics for demodulation RFI in inverting operational amplifier circuits

    Science.gov (United States)

    Sutu, Y.-H.; Whalen, J. J.

    An investigation was conducted with the objective to determine statistical variations for RFI demodulation responses in operational amplifier (op amp) circuits. Attention is given to the experimental procedures employed, a three-stage op amp LED experiment, NCAP (Nonlinear Circuit Analysis Program) simulations of demodulation RFI in 741 op amps, and a comparison of RFI in four op amp types. Three major recommendations for future investigations are presented on the basis of the obtained results. One is concerned with the conduction of additional measurements of demodulation RFI in inverting amplifiers, while another suggests the employment of an automatic measurement system. It is also proposed to conduct additional NCAP simulations in which parasitic effects are accounted for more thoroughly.

  4. Modeling and simulation of different and representative engineering problems using Network Simulation Method.

    Science.gov (United States)

    Sánchez-Pérez, J F; Marín, F; Morales, J L; Cánovas, M; Alhama, F

    2018-01-01

    Mathematical models simulating different and representative engineering problem, atomic dry friction, the moving front problems and elastic and solid mechanics are presented in the form of a set of non-linear, coupled or not coupled differential equations. For different parameters values that influence the solution, the problem is numerically solved by the network method, which provides all the variables of the problems. Although the model is extremely sensitive to the above parameters, no assumptions are considered as regards the linearization of the variables. The design of the models, which are run on standard electrical circuit simulation software, is explained in detail. The network model results are compared with common numerical methods or experimental data, published in the scientific literature, to show the reliability of the model.

  5. Accelerating functional verification of an integrated circuit

    Science.gov (United States)

    Deindl, Michael; Ruedinger, Jeffrey Joseph; Zoellin, Christian G.

    2015-10-27

    Illustrative embodiments include a method, system, and computer program product for accelerating functional verification in simulation testing of an integrated circuit (IC). Using a processor and a memory, a serial operation is replaced with a direct register access operation, wherein the serial operation is configured to perform bit shifting operation using a register in a simulation of the IC. The serial operation is blocked from manipulating the register in the simulation of the IC. Using the register in the simulation of the IC, the direct register access operation is performed in place of the serial operation.

  6. Simulation of SEU transients in CMOS ICs

    International Nuclear Information System (INIS)

    Kaul, N.; Bhuva, B.L.; Kerns, S.E.

    1991-01-01

    This paper reports that available analytical models of the number of single-event-induced errors (SEU) in combinational logic systems are not easily applicable to real integrated circuits (ICs). An efficient computer simulation algorithm set, SITA, predicts the vulnerability of data stored in and processed by complex combinational logic circuits to SEU. SITA is described in detail to allow researchers to incorporate it into their error analysis packages. Required simulation algorithms are based on approximate closed-form equations modeling individual device behavior in CMOS logic units. Device-level simulation is used to estimate the probability that ion-device interactions produce erroneous signals capable of propagating to a latch (or n output node), and logic-level simulation to predict the spread of such erroneous, latched information through the IC. Simulation results are compared to those from SPICE for several circuit and logic configurations. SITA results are comparable to this established circuit-level code, and SITA can analyze circuits with state-of-the-art device densities (which SPICE cannot). At all IC complexity levels, SITAS offers several factors of 10 savings in simulation time over SPICE

  7. Project Circuits in a Basic Electric Circuits Course

    Science.gov (United States)

    Becker, James P.; Plumb, Carolyn; Revia, Richard A.

    2014-01-01

    The use of project circuits (a photoplethysmograph circuit and a simple audio amplifier), introduced in a sophomore-level electric circuits course utilizing active learning and inquiry-based methods, is described. The development of the project circuits was initiated to promote enhanced engagement and deeper understanding of course content among…

  8. Advanced engineering materials and thick film hybrid circuit technology

    International Nuclear Information System (INIS)

    Faisal, S.; Aslam, M.; Mehmood, K.

    2006-01-01

    The use of Thick Film hybrid Technology to manufacture electronic circuits and passive components continues to grow at rapid rate. Thick Film Technology can be viewed as a means of packaging active devices, spanning the gap between monolithic integrated circuit chips and printed circuit boards with attached active and passive components. An advancement in engineering materials has moved from a formulating art to a base of greater understanding of relationship of material chemistry to the details of electrical and mechanical performance. This amazing advancement in the field of engineering materials has brought us up to a magnificent standard that we are able to manufacture small size, low cost and sophisticated electronic circuits of Military, Satellite systems, Robotics, Medical and Telecommunications. (author)

  9. Hopf bifurcation analysis of Chen circuit with direct time delay feedback

    International Nuclear Information System (INIS)

    Hai-Peng, Ren; Wen-Chao, Li; Ding, Liu

    2010-01-01

    Direct time delay feedback can make non-chaotic Chen circuit chaotic. The chaotic Chen circuit with direct time delay feedback possesses rich and complex dynamical behaviours. To reach a deep and clear understanding of the dynamics of such circuits described by delay differential equations, Hopf bifurcation in the circuit is analysed using the Hopf bifurcation theory and the central manifold theorem in this paper. Bifurcation points and bifurcation directions are derived in detail, which prove to be consistent with the previous bifurcation diagram. Numerical simulations and experimental results are given to verify the theoretical analysis. Hopf bifurcation analysis can explain and predict the periodical orbit (oscillation) in Chen circuit with direct time delay feedback. Bifurcation boundaries are derived using the Hopf bifurcation analysis, which will be helpful for determining the parameters in the stabilisation of the originally chaotic circuit

  10. Effects of smoke on functional circuits

    International Nuclear Information System (INIS)

    Tanaka, T.J.

    1997-10-01

    Nuclear power plants are converting to digital instrumentation and control systems; however, the effects of abnormal environments such as fire and smoke on such systems are not known. There are no standard tests for smoke, but previous smoke exposure tests at Sandia National Laboratories have shown that digital communications can be temporarily interrupted during a smoke exposure. Another concern is the long-term corrosion of metals exposed to the acidic gases produced by a cable fire. This report documents measurements of basic functional circuits during and up to 1 day after exposure to smoke created by burning cable insulation. Printed wiring boards were exposed to the smoke in an enclosed chamber for 1 hour. For high-resistance circuits, the smoke lowered the resistance of the surface of the board and caused the circuits to short during the exposure. These circuits recovered after the smoke was vented. For low-resistance circuits, the smoke caused their resistance to increase slightly. A polyurethane conformal coating substantially reduced the effects of smoke. A high-speed digital circuit was unaffected. A second experiment on different logic chip technologies showed that the critical shunt resistance that would cause failure was dependent on the chip technology and that the components used in the smoke exposures were some of the most smoke tolerant. The smoke densities in these tests were high enough to cause changes in high impedance (resistance) circuits during exposure, but did not affect most of the other circuits. Conformal coatings and the characteristics of chip technologies should be considered when designing circuitry for nuclear power plant safety systems, which must be highly reliable under a variety of operating and accident conditions. 10 refs., 34 figs., 18 tabs

  11. A parallel simulated annealing algorithm for standard cell placement on a hypercube computer

    Science.gov (United States)

    Jones, Mark Howard

    1987-01-01

    A parallel version of a simulated annealing algorithm is presented which is targeted to run on a hypercube computer. A strategy for mapping the cells in a two dimensional area of a chip onto processors in an n-dimensional hypercube is proposed such that both small and large distance moves can be applied. Two types of moves are allowed: cell exchanges and cell displacements. The computation of the cost function in parallel among all the processors in the hypercube is described along with a distributed data structure that needs to be stored in the hypercube to support parallel cost evaluation. A novel tree broadcasting strategy is used extensively in the algorithm for updating cell locations in the parallel environment. Studies on the performance of the algorithm on example industrial circuits show that it is faster and gives better final placement results than the uniprocessor simulated annealing algorithms. An improved uniprocessor algorithm is proposed which is based on the improved results obtained from parallelization of the simulated annealing algorithm.

  12. Economic testing of large integrated switching circuits - a challenge to the test engineer

    International Nuclear Information System (INIS)

    Kreinberg, W.

    1978-01-01

    With reference to large integrated switching circuits, one can use an incoming standard programme test or the customer's switching circuits. The author describes the development of suitable, extensive and economical test programmes. (orig.) [de

  13. Dynamic simulation of natural convection bypass two-circuit cycle refrigerator-freezer and its application Part I: Component models

    International Nuclear Information System (INIS)

    Ding Guoliang; Zhang Chunlu; Lu Zhili

    2004-01-01

    In order to reduce the greenhouse gas emissions, efficient household refrigerator/freezers (RFs) are required. Bypass two-circuit cycle RFs with one compressor are proved to be more efficient than two-evaporator in series cycle RFs. In order to study the characteristics and improve the design of bypass two-circuit cycle RFs, a dynamic model is developed in this paper. In part I, the mathematic models of all components are presented, considering not only the accuracy of the models but also the computation stability and speed to solve the models. An efficiency model that requires a single calorimeter data point at the standard test condition is employed for compressor. A multi-zone model is employed for condenser and for evaporator, with its wall thermal capacity considered by effective metal method. The approximate integral analytic model is employed for adiabatic capillary tube, and the effective inlet enthalpy method is used to transfer the non-adiabatic capillary tube to adiabatic capillary tube. The z-transfer function model is employed for cabinet load calculation

  14. Optimal design of RTCs in digital circuit fault self-repair based on global signal optimization

    Institute of Scientific and Technical Information of China (English)

    Zhang Junbin; Cai Jinyan; Meng Yafeng

    2016-01-01

    Since digital circuits have been widely and thoroughly applied in various fields, electronic systems are increasingly more complicated and require greater reliability. Faults may occur in elec-tronic systems in complicated environments. If immediate field repairs are not made on the faults, elec-tronic systems will not run normally, and this will lead to serious losses. The traditional method for improving system reliability based on redundant fault-tolerant technique has been unable to meet the requirements. Therefore, on the basis of (evolvable hardware)-based and (reparation balance technology)-based electronic circuit fault self-repair strategy proposed in our preliminary work, the optimal design of rectification circuits (RTCs) in electronic circuit fault self-repair based on global sig-nal optimization is deeply researched in this paper. First of all, the basic theory of RTC optimal design based on global signal optimization is proposed. Secondly, relevant considerations and suitable ranges are analyzed. Then, the basic flow of RTC optimal design is researched. Eventually, a typical circuit is selected for simulation verification, and detailed simulated analysis is made on five circumstances that occur during RTC evolution. The simulation results prove that compared with the conventional design method based RTC, the global signal optimization design method based RTC is lower in hardware cost, faster in circuit evolution, higher in convergent precision, and higher in circuit evolution success rate. Therefore, the global signal optimization based RTC optimal design method applied in the elec-tronic circuit fault self-repair technology is proven to be feasible, effective, and advantageous.

  15. Simulation optimisation

    International Nuclear Information System (INIS)

    Anon

    2010-01-01

    Over the past decade there has been a significant advance in flotation circuit optimisation through performance benchmarking using metallurgical modelling and steady-state computer simulation. This benchmarking includes traditional measures, such as grade and recovery, as well as new flotation measures, such as ore floatability, bubble surface area flux and froth recovery. To further this optimisation, Outotec has released its HSC Chemistry software with simulation modules. The flotation model developed by the AMIRA P9 Project, of which Outotec is a sponsor, is regarded by industry as the most suitable flotation model to use for circuit optimisation. This model incorporates ore floatability with flotation cell pulp and froth parameters, residence time, entrainment and water recovery. Outotec's HSC Sim enables you to simulate mineral processes in different levels, from comminution circuits with sizes and no composition, through to flotation processes with minerals by size by floatability components, to full processes with true particles with MLA data.

  16. Simulation of the Universal-Time Diurnal Variation of the Global Electric Circuit Charging Rate

    Science.gov (United States)

    Mackerras, D.; Darvenzia, M.; Orville, R. E.; Williams, E. R.; Goodman, S. J.

    1999-01-01

    A global lightning model that includes diurnal and annual lightning variation, and total flash density versus latitude for each major land and ocean, has been used as the basis for simulating the global electric circuit charging rate. A particular objective has been to reconcile the difference in amplitude ratios [AR=(max-min)/mean] between global lightning diurnal variation (AR approx. = 0.8) and the diurnal variation of typical atmospheric potential gradient curves (AR approx. = 0.35). A constraint on the simulation is that the annual mean charging current should be about 1000 A. The global lightning model shows that negative ground flashes can contribute, at most, about 10-15% of the required current. For the purpose of the charging rate simulation, it was assumed that each ground flash contributes 5 C to the charging process. It was necessary to assume that all electrified clouds contribute to charging by means other than lightning, that the total flash rate can serve as an indirect indicator of the rate of charge transfer, and that oceanic electrified clouds contribute to charging even though they are relatively inefficient in producing lightning. It was also found necessary to add a diurnally invariant charging current component. By trial and error it was found that charging rate diurnal variation curves in Universal time (UT) could be produced with amplitude ratios and general shapes similar to those of the potential gradient diurnal variation curves measured over ocean and arctic regions during voyages of the Carnegie Institute research vessels.

  17. Spike timing precision of neuronal circuits.

    Science.gov (United States)

    Kilinc, Deniz; Demir, Alper

    2018-04-17

    Spike timing is believed to be a key factor in sensory information encoding and computations performed by the neurons and neuronal circuits. However, the considerable noise and variability, arising from the inherently stochastic mechanisms that exist in the neurons and the synapses, degrade spike timing precision. Computational modeling can help decipher the mechanisms utilized by the neuronal circuits in order to regulate timing precision. In this paper, we utilize semi-analytical techniques, which were adapted from previously developed methods for electronic circuits, for the stochastic characterization of neuronal circuits. These techniques, which are orders of magnitude faster than traditional Monte Carlo type simulations, can be used to directly compute the spike timing jitter variance, power spectral densities, correlation functions, and other stochastic characterizations of neuronal circuit operation. We consider three distinct neuronal circuit motifs: Feedback inhibition, synaptic integration, and synaptic coupling. First, we show that both the spike timing precision and the energy efficiency of a spiking neuron are improved with feedback inhibition. We unveil the underlying mechanism through which this is achieved. Then, we demonstrate that a neuron can improve on the timing precision of its synaptic inputs, coming from multiple sources, via synaptic integration: The phase of the output spikes of the integrator neuron has the same variance as that of the sample average of the phases of its inputs. Finally, we reveal that weak synaptic coupling among neurons, in a fully connected network, enables them to behave like a single neuron with a larger membrane area, resulting in an improvement in the timing precision through cooperation.

  18. Vacuum circuit breaker postarc current modelling based on the theory of Langmuir probes

    NARCIS (Netherlands)

    Lanen, van E.P.A.; Smeets, R.; Popov, M.; Sluis, van der L.

    2007-01-01

    High-resolution measurements on the postarc current in vacuum circuit breakers (VCBs) reveal a period, immediately following current-zero, in which the voltage remains practically zero. The most widely used model for simulating the interaction between the postarc current with the electrical circuit

  19. Power analysis dataset for QCA based multiplexer circuits

    Directory of Open Access Journals (Sweden)

    Md. Abdullah-Al-Shafi

    2017-04-01

    Full Text Available Power consumption in irreversible QCA logic circuits is a vital and a major issue; however in the practical cases, this focus is mostly omitted.The complete power depletion dataset of different QCA multiplexers have been worked out in this paper. At −271.15 °C temperature, the depletion is evaluated under three separate tunneling energy levels. All the circuits are designed with QCADesigner, a broadly used simulation engine and QCAPro tool has been applied for estimating the power dissipation.

  20. Implementing phase-covariant cloning in circuit quantum electrodynamics

    Energy Technology Data Exchange (ETDEWEB)

    Zhu, Meng-Zheng [School of Physics and Material Science, Anhui University, Hefei 230039 (China); School of Physics and Electronic Information, Huaibei Normal University, Huaibei 235000 (China); Ye, Liu, E-mail: yeliu@ahu.edu.cn [School of Physics and Material Science, Anhui University, Hefei 230039 (China)

    2016-10-15

    An efficient scheme is proposed to implement phase-covariant quantum cloning by using a superconducting transmon qubit coupled to a microwave cavity resonator in the strong dispersive limit of circuit quantum electrodynamics (QED). By solving the master equation numerically, we plot the Wigner function and Poisson distribution of the cavity mode after each operation in the cloning transformation sequence according to two logic circuits proposed. The visualizations of the quasi-probability distribution in phase-space for the cavity mode and the occupation probability distribution in the Fock basis enable us to penetrate the evolution process of cavity mode during the phase-covariant cloning (PCC) transformation. With the help of numerical simulation method, we find out that the present cloning machine is not the isotropic model because its output fidelity depends on the polar angle and the azimuthal angle of the initial input state on the Bloch sphere. The fidelity for the actual output clone of the present scheme is slightly smaller than one in the theoretical case. The simulation results are consistent with the theoretical ones. This further corroborates our scheme based on circuit QED can implement efficiently PCC transformation.

  1. Integrated coincidence circuits

    International Nuclear Information System (INIS)

    Borejko, V.F.; Grebenyuk, V.M.; Zinov, V.G.

    1976-01-01

    The description is given of two coincidence units employing integral circuits in the VISHNYA standard. The units are distinguished for the coincidence selection element which is essentially a combination of a tunnel diode and microcircuits. The output fast response of the units is at least 90 MHz in the mode of the output signal unshaped in duration and 50 MHz minimum in the mode of the output signal shaping. The resolution time of the units is dependent upon the duration of input signals

  2. Duffing–van der Pol oscillator type dynamics in Murali–Lakshmanan–Chua (MLC) circuit

    International Nuclear Information System (INIS)

    Srinivasan, K.; Chandrasekar, V.K.; Venkatesan, A.; Raja Mohamed, I.

    2016-01-01

    Highlights: • Proposed an electronic circuit with diode based nonlinear element equivalent to a well known Murali–Lakshmanan–Chua (MLC) circuit. • For chosen circuit parameters this circuit admits familiar MLC type attractor and also Duffing–van der Pol circuit type chaotic attractor. • The performance of the circuit is investigated by means of explicit laboratory experiments, numerical simulations and analytical studies. - Abstract: We have constructed a simple second-order dissipative nonautonomous circuit exhibiting ordered and chaotic behaviour. This circuit is the well known Murali–Lakshmanan–Chua(MLC) circuit but with diode based nonlinear element. For chosen circuit parameters this circuit admits familiar MLC type attractor and also Duffing–van der Pol circuit type chaotic attractors. It is interesting to note that depending upon the circuit parameters the circuit shows both period doubling route to chaos and quasiperiodic route to chaos. In our study we have constructed two-parameter bifurcation diagrams in the forcing amplitude–frequency plane, one parameter bifurcation diagrams, Lyapunov exponents, 0–1 test and phase portrait. The performance of the circuit is investigated by means of laboratory experiments, numerical integration of appropriate mathematical model and explicit analytic studies.

  3. Novel start-up circuit with enhanced power-up characteristic for bandgap references

    DEFF Research Database (Denmark)

    Tuan Vu, Cao; Wisland, Dag T.; Lande, Tor Sverre

    This paper presents a new start-up circuit for low-power bandgap reference (BGR) voltage generators. The BGR is designed for providing a stable 0.3 V power supply for application in low power wireless sensor nodes. The BGR has an enhanced power-up characteristic and demonstrates a reduction...... of the total stand-by current. Simulated results confirm that the proposed start-up circuit does not affect the performance of the BGR even though the supply voltage (VDD) is higher and has more stable power-up characteristic than the conventional start-up circuits. The new start-up circuit is designed with 65...

  4. Mathematical models and numerical simulation in electromagnetism

    CERN Document Server

    Bermúdez, Alfredo; Salgado, Pilar

    2014-01-01

    The book represents a basic support for a master course in electromagnetism oriented to numerical simulation. The main goal of the book is that the reader knows the boundary-value problems of partial differential equations that should be solved in order to perform computer simulation of electromagnetic processes. Moreover it includes a part devoted to electric circuit theory  based on ordinary differential equations. The book is mainly oriented to electric engineering applications, going from the general to the specific, namely, from the full Maxwell’s equations to the particular cases of electrostatics, direct current, magnetostatics and eddy currents models. Apart from standard exercises related to analytical calculus, the book includes some others oriented to real-life applications solved with MaxFEM free simulation software.

  5. Set of CAMAC modules on the base of large integrated circuits for an accelerator synchronization system

    International Nuclear Information System (INIS)

    Glejbman, Eh.M.; Pilyar, N.V.

    1986-01-01

    Parameters of functional moduli in the CAMAC standard developed for accelerator synchronization system are presented. They comprise BZN-8K and BZ-8K digital delay circuits, timing circuit and pulse selection circuit. In every module 3 large integral circuits of KR 580 VI53 type programmed timer, circuits of the given system bus bar interface with bus bars of crate, circuits of data recording control, 2 peripheric storage devices, circuits of initial regime setting, input and output shapers, circuits of installation and removal of blocking in channels are used

  6. Essential knowledge for transistor-level LSI circuit design

    CERN Document Server

    Nakura, Toru

    2016-01-01

    This book is a collection of the miscellaneous knowledge essential for transistor-level LSI circuit design, summarized as the issues that need to be considered in each design step. To design an LSI that actually functions and to be able to properly measure it, an extremely large amount of diverse, detailed knowledge is necessary. Even though one may read a textbook about an op-amp, for example, the op-amp circuit design may not actually be possible to complete in one’s CAD tools. The first half of this text explains important design issues such as the operating principles of CAD tools, including schematic entry, SPICE simulation, layout and verification, and RC extraction. Then, mistake-prone topics for many circuit design beginners, resulting from their lack of consideration of these subjects, are explained including IO buffers, noise, and problems due to the progress of miniaturization. Following these topics, basic but very specialized issues for LSI circuit measurement are explained including measuremen...

  7. Implementation of chaotic secure communication systems based on OPA circuits

    International Nuclear Information System (INIS)

    Huang, C.-K.; Tsay, S.-C.; Wu, Y.-R.

    2005-01-01

    In this paper, we proposed a novel three-order autonomous circuit to construct a chaotic circuit with double scroll characteristic. The design idea is to use RLC elements and a nonlinear resistor. The one of salient features of the chaotic circuit is that the circuit with two flexible breakpoints of nonlinear element, and the advantage of the flexible breakpoint is that it increased complexity of the dynamical performance. Here, if we take a large and suitable breakpoint value, then the chaotic state can masking a large input signal in the circuit. Furthermore, we proposed a secure communication hyperchaotic system based on the proposed chaotic circuits, where the chaotic communication system is constituted by a chaotic transmitter and a chaotic receiver. To achieve the synchronization between the transmitter and the receiver, we are using a suitable Lyapunov function and Lyapunov theorem to design the feedback control gain. Thus, the transmitting message masked by chaotic state in the transmitter can be guaranteed to perfectly recover in the receiver. To achieve the systems performance, some basic components containing OPA, resistor and capacitor elements are used to implement the proposed communication scheme. From the viewpoints of circuit implementation, this proposed chaotic circuit is superior to the Chua chaotic circuits. Finally, the test results containing simulation and the circuit measurement are shown to demonstrate that the proposed method is correct and feasible

  8. Multistability in Chua's circuit with two stable node-foci

    International Nuclear Information System (INIS)

    Bao, B. C.; Wang, N.; Xu, Q.; Li, Q. D.

    2016-01-01

    Only using one-stage op-amp based negative impedance converter realization, a simplified Chua's diode with positive outer segment slope is introduced, based on which an improved Chua's circuit realization with more simpler circuit structure is designed. The improved Chua's circuit has identical mathematical model but completely different nonlinearity to the classical Chua's circuit, from which multiple attractors including coexisting point attractors, limit cycle, double-scroll chaotic attractor, or coexisting chaotic spiral attractors are numerically simulated and experimentally captured. Furthermore, with dimensionless Chua's equations, the dynamical properties of the Chua's system are studied including equilibrium and stability, phase portrait, bifurcation diagram, Lyapunov exponent spectrum, and attraction basin. The results indicate that the system has two symmetric stable nonzero node-foci in global adjusting parameter regions and exhibits the unusual and striking dynamical behavior of multiple attractors with multistability.

  9. 49 CFR 236.308 - Mechanical or electric locking or electric circuits; requisites.

    Science.gov (United States)

    2010-10-01

    ..., AND APPLIANCES Interlocking Standards § 236.308 Mechanical or electric locking or electric circuits; requisites. Mechanical or electric locking or electric circuits shall be installed to prevent signals from... 49 Transportation 4 2010-10-01 2010-10-01 false Mechanical or electric locking or electric...

  10. DQ reference frame modeling and control of single-phase active power decoupling circuits

    DEFF Research Database (Denmark)

    Tang, Yi; Qin, Zian; Blaabjerg, Frede

    2015-01-01

    . This paper presents the dq synchronous reference frame modeling of single-phase power decoupling circuits and a complete model describing the dynamics of dc-link ripple voltage is presented. The proposed model is universal and valid for both inductive and capacitive decoupling circuits, and the input...... of decoupling circuits can be either dependent or independent of its front-end converters. Based on this model, a dq synchronous reference frame controller is designed which allows the decoupling circuit to operate in two different modes because of the circuit symmetry. Simulation and experimental results...... are presented to verify the effectiveness of the proposed modeling and control method....

  11. Circuit Implementation of Coronary Artery Chaos Phenomenon and Optimal PID Synchronization Controller Design

    Directory of Open Access Journals (Sweden)

    Cheng-Yu Yeh

    2012-01-01

    Full Text Available This study aimed at the implementation and synchronization control of cardiac circuit. First, the MATLAB-Simulink was used to simulate the dynamic behavior of cardiac chaotic circuit, and simple electronic modules were used to implement the cardiac system. Then the Particle Swarm Optimization (PSO was used to seek for the proportional, integral, and derivative gains of optimal PID controller, and the PID controller which could synchronize the slave cardiac circuit and the master cardiac circuit was obtained, in order to synchronize the master/slave chaotic cardiac circuits. This method can be provided for cardiac doctors to diagnose and medicate cardiac abnormality.

  12. Application of simulated standard spectra in natural radioactivity measurements using gamma spectrometry

    International Nuclear Information System (INIS)

    Narayani, K.; Pant, A.D.; Bhosle, Nitin; Anilkumar, S.; Singh, Rajvir; Pradeepkumar, K.S.

    2014-01-01

    Gamma ray spectrometry is one of the well known analytical techniques for environmental radioactivity measurements. Gamma spectrometer based on NaI(Tl) scintillation detectors is very popular since it offers high efficiency, low cost and case in handling. The poor energy resolution of the NaI(TI) detector is the major disadvantage making tile analysis of complex gamma ray spectra difficult. Least square method or the full spectrum analysis method is widely used for the analysis of complex spectra from scintillation detectors. The main requirement of this method is that the individual standard spectra of all nuclides expected in the complex spectrum in the same measurement geometry must be available. It is not always possible and feasible to have all the standards of nuclides in the desired geometry. A methodology based on the use of simulated standard spectra generated by Monte Carlo technique was proposed for analysis of complex spectra of nuclides. In the present work, for the analysis of 238 U, 233 Th and 40 K in soil samples, the same methodology was applied by using the simulated standard spectra in soil matrix. The details of the simulation method and results analysis of 238 U, 232 Th and 40 K in environmental samples are discussed in this paper

  13. Research of time-domain equivalent circuit method in solving dispersion of coupled-cavity traveling-wave tube

    International Nuclear Information System (INIS)

    Li Wenjun; China Academy of Engineering Physics, Mianyang; Xu Zhou; Li Ming; Yang Xingfan; Chen Yanan; Liu Jie; Jin Xiao; Lin Yuzheng

    2008-01-01

    In this paper, a time-domain equivalent circuit method is applied to solve dispersion of coupled-cavity travelling-wave tube (CCTWT). First, the time-domain circuit equations of CCTWT coupled-cavity chain are deduced from the equivalent circuit model. Then, the equations are solved numerically by fourth-order Runge-Kutta method and a program CTTDCP is developed using MATLAB. Last, a L-band CCTWT is calculated using CTTDCP and the cavity pass-band of this tube is computed to be 1.08-1.48 GHz, which is consistent with the experimental results and the simulation results of electromagnetic code and demonstrates the validity of the time-domain equivalent circuit method. In addition, a new design method which uses the equivalent circuit method and electromagnetic simulation together to optimize the cold cavity characteristics of CCTWT is proposed. (authors)

  14. Java Based Symbolic Circuit Solver For Electrical Engineering Curriculum

    Directory of Open Access Journals (Sweden)

    Ruba Akram Amarin

    2012-11-01

    Full Text Available The interactive technical electronic book, TechEBook, currently under development at the University of Central Florida (UCF, introduces a paradigm shift by replacing the traditional electrical engineering course with topic-driven modules that provide a useful tool for engineers and scientists. The TechEBook comprises the two worlds of classical circuit books and interactive operating platforms such as iPads, laptops and desktops. The TechEBook provides an interactive applets screen that holds many modules, each of which has a specific application in the self learning process. This paper describes one of the interactive techniques in the TechEBook known as Symbolic Circuit Solver (SymCirc. The SymCirc develops a versatile symbolic based linear circuit with a switches solver. The solver works by accepting a Netlist and the element that the user wants to find the voltage across or current on, as input parameters. Then it either produces the plot or the time domain expression of the output. Frequency domain plots or Symbolic Transfer Functions are also produced. The solver gets its input from a Web-based GUI circuit drawer developed at UCF. Typical simulation tools that electrical engineers encounter are numerical in nature, that is, when presented with an input circuit they iteratively solve the circuit across a set of small time steps. The result is represented as a data set of output versus time, which can be plotted for further inspection. Such results do not help users understand the ultimate nature of circuits as Linear Time Invariant systems with a finite dimensional basis in the solution space. SymCirc provides all simulation results as time domain expressions composed of the basic functions that exclusively include exponentials, sines, cosines and/or t raised to any power. This paper explains the motivation behind SymCirc, the Graphical User Interface front end and how the solver actually works. The paper also presents some examples and

  15. Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm

    Science.gov (United States)

    Asaithambi, Sasikumar; Rajappa, Muthaiah

    2018-05-01

    In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

  16. Digital logic circuit design with ALTERA MAX+PLUS II

    International Nuclear Information System (INIS)

    Lee, Seung Ho; Park, Yong Su; Park, Gun Jong; Lee, Ju Heon

    2006-09-01

    This book is composed of five parts. The first part has introduction of ALTERA MAX+PLUS II and graphic editor, text editor, compiler, waveform editor simulator and timing analyzer of it. The second part is about direction of digital logic circuit design with training kit. The third part has grammar and practice of VHDL in ALTERA MAX+PLUS II including example and history of VHDL. The fourth part shows the design example of digital logic circuit by VHDL of ALTERA MAX+PLUS II which lists designs of adder and subtractor, code converter, counter, state machine and LCD module. The last part explains design example of digital logic circuit by graphic editor in ALTERA MAX+PLUS II.

  17. Development and simulation results of a sparsification and readout circuit for wide pixel matrices

    International Nuclear Information System (INIS)

    Gabrielli, A.; Giorgi, F.; Morsani, F.; Villa, M.

    2011-01-01

    In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm 2 with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s -1 . cm -2 with a temporal resolution below 1 μs. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

  18. Development and simulation results of a sparsification and readout circuit for wide pixel matrices

    Energy Technology Data Exchange (ETDEWEB)

    Gabrielli, A.; Giorgi, F. [University and INFN of Bologna (Italy); Morsani, F. [University and INFN of Pisa (Italy); Villa, M. [University and INFN of Bologna (Italy)

    2011-06-15

    In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm{sup 2} with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s{sup -1} . cm{sup -2} with a temporal resolution below 1 {mu}s. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

  19. Modeling the electrochemistry of the primary circuits of light water reactors

    International Nuclear Information System (INIS)

    Bertuch, A.; Macdonald, D.D.; Pang, J.; Kriksunov, L.; Arioka, K.

    1994-01-01

    To model the corrosion behaviors of the heat transport circuits of light water reactors, a mixed potential model (NTM) has been developed and applied to both boiling water reactors (BWRs) and pressurized water reactors (PWRs). Using the data generated by the GE/UKEA-Harwell radiolysis model, electrochemical potentials (ECPs) have been calculated for the heat transport circuits of eight BWRs operating under hydrogen water chemistry (HWC). By modeling the corrosion behaviors of these reactors, the effectiveness of HWC at limiting IGSCC and IASCC can be determined. For simulating PWR primary circuits, a chemical-radiolysis model (developed by the authors) was used to generate input parameters for the MPM. Corrosion potentials of Type 304 and 316 SSs in PWR primary environments were calculated using the NTM and were found to be in good agreement with the corrosion potentials measured in the laboratory for simulated PWR primary environments

  20. Artificial immune system algorithm in VLSI circuit configuration

    Science.gov (United States)

    Mansor, Mohd. Asyraf; Sathasivam, Saratha; Kasihmuddin, Mohd Shareduwan Mohd

    2017-08-01

    In artificial intelligence, the artificial immune system is a robust bio-inspired heuristic method, extensively used in solving many constraint optimization problems, anomaly detection, and pattern recognition. This paper discusses the implementation and performance of artificial immune system (AIS) algorithm integrated with Hopfield neural networks for VLSI circuit configuration based on 3-Satisfiability problems. Specifically, we emphasized on the clonal selection technique in our binary artificial immune system algorithm. We restrict our logic construction to 3-Satisfiability (3-SAT) clauses in order to outfit with the transistor configuration in VLSI circuit. The core impetus of this research is to find an ideal hybrid model to assist in the VLSI circuit configuration. In this paper, we compared the artificial immune system (AIS) algorithm (HNN-3SATAIS) with the brute force algorithm incorporated with Hopfield neural network (HNN-3SATBF). Microsoft Visual C++ 2013 was used as a platform for training, simulating and validating the performances of the proposed network. The results depict that the HNN-3SATAIS outperformed HNN-3SATBF in terms of circuit accuracy and CPU time. Thus, HNN-3SATAIS can be used to detect an early error in the VLSI circuit design.

  1. Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

    Science.gov (United States)

    McConkey, M. L.

    1984-12-01

    A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

  2. Integrated Equivalent Circuit and Thermal Model for Simulation of Temperature-Dependent LiFePO4 Battery in Actual Embedded Application

    Directory of Open Access Journals (Sweden)

    Zuchang Gao

    2017-01-01

    Full Text Available A computational efficient battery pack model with thermal consideration is essential for simulation prototyping before real-time embedded implementation. The proposed model provides a coupled equivalent circuit and convective thermal model to determine the state-of-charge (SOC and temperature of the LiFePO4 battery working in a real environment. A cell balancing strategy applied to the proposed temperature-dependent battery model balanced the SOC of each cell to increase the lifespan of the battery. The simulation outputs are validated by a set of independent experimental data at a different temperature to ensure the model validity and reliability. The results show a root mean square (RMS error of 1.5609 × 10−5 for the terminal voltage and the comparison between the simulation and experiment at various temperatures (from 5 °C to 45 °C shows a maximum RMS error of 7.2078 × 10−5.

  3. Modeling and simulation of different and representative engineering problems using Network Simulation Method

    Science.gov (United States)

    2018-01-01

    Mathematical models simulating different and representative engineering problem, atomic dry friction, the moving front problems and elastic and solid mechanics are presented in the form of a set of non-linear, coupled or not coupled differential equations. For different parameters values that influence the solution, the problem is numerically solved by the network method, which provides all the variables of the problems. Although the model is extremely sensitive to the above parameters, no assumptions are considered as regards the linearization of the variables. The design of the models, which are run on standard electrical circuit simulation software, is explained in detail. The network model results are compared with common numerical methods or experimental data, published in the scientific literature, to show the reliability of the model. PMID:29518121

  4. TELEMETRY CIRCUITS IN A RADIATION ENVIRONMENT

    Energy Technology Data Exchange (ETDEWEB)

    Olesen, H. L.

    1963-05-15

    Radiation effects are a serious problem for designers of space vehicle electronic equipment. By simulating the environment and irradiating various components and circuits, more and more data become available for engineering application. However, it is not possible to simulate the pulsed radiation environment correctly, because it is not possible to obtain the high radiation intensities occurring in the actual environment. The following represents experimental data obtained at radiation intensities >10/sup 12/ rad/sec. This is an intensity 4 to 5 orders of magnitude greater than previous experimental data. (auth)

  5. Energy-efficient STDP-based learning circuits with memristor synapses

    Science.gov (United States)

    Wu, Xinyu; Saxena, Vishal; Campbell, Kristy A.

    2014-05-01

    It is now accepted that the traditional von Neumann architecture, with processor and memory separation, is ill suited to process parallel data streams which a mammalian brain can efficiently handle. Moreover, researchers now envision computing architectures which enable cognitive processing of massive amounts of data by identifying spatio-temporal relationships in real-time and solving complex pattern recognition problems. Memristor cross-point arrays, integrated with standard CMOS technology, are expected to result in massively parallel and low-power Neuromorphic computing architectures. Recently, significant progress has been made in spiking neural networks (SNN) which emulate data processing in the cortical brain. These architectures comprise of a dense network of neurons and the synapses formed between the axons and dendrites. Further, unsupervised or supervised competitive learning schemes are being investigated for global training of the network. In contrast to a software implementation, hardware realization of these networks requires massive circuit overhead for addressing and individually updating network weights. Instead, we employ bio-inspired learning rules such as the spike-timing-dependent plasticity (STDP) to efficiently update the network weights locally. To realize SNNs on a chip, we propose to use densely integrating mixed-signal integrate-andfire neurons (IFNs) and cross-point arrays of memristors in back-end-of-the-line (BEOL) of CMOS chips. Novel IFN circuits have been designed to drive memristive synapses in parallel while maintaining overall power efficiency (<1 pJ/spike/synapse), even at spike rate greater than 10 MHz. We present circuit design details and simulation results of the IFN with memristor synapses, its response to incoming spike trains and STDP learning characterization.

  6. Relating Standardized Visual Perception Measures to Simulator Visual System Performance

    Science.gov (United States)

    Kaiser, Mary K.; Sweet, Barbara T.

    2013-01-01

    Human vision is quantified through the use of standardized clinical vision measurements. These measurements typically include visual acuity (near and far), contrast sensitivity, color vision, stereopsis (a.k.a. stereo acuity), and visual field periphery. Simulator visual system performance is specified in terms such as brightness, contrast, color depth, color gamut, gamma, resolution, and field-of-view. How do these simulator performance characteristics relate to the perceptual experience of the pilot in the simulator? In this paper, visual acuity and contrast sensitivity will be related to simulator visual system resolution, contrast, and dynamic range; similarly, color vision will be related to color depth/color gamut. Finally, we will consider how some characteristics of human vision not typically included in current clinical assessments could be used to better inform simulator requirements (e.g., relating dynamic characteristics of human vision to update rate and other temporal display characteristics).

  7. Ultra-low power integrated circuit design circuits, systems, and applications

    CERN Document Server

    Li, Dongmei; Wang, Zhihua

    2014-01-01

    This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

  8. Development and Simulation of Increased Generation on a Secondary Circuit of a Microgrid

    Science.gov (United States)

    Reyes, Karina

    As fossil fuels are depleted and their environmental impacts remain, other sources of energy must be considered to generate power. Renewable sources, for example, are emerging to play a major role in this regard. In parallel, electric vehicle (EV) charging is evolving as a major load demand. To meet reliability and resiliency goals demanded by the electricity market, interest in microgrids are growing as a distributed energy resource (DER). In this thesis, the effects of intermittent renewable power generation and random EV charging on secondary microgrid circuits are analyzed in the presence of a controllable battery in order to characterize and better understand the dynamics associated with intermittent power production and random load demands in the context of the microgrid paradigm. For two reasons, a secondary circuit on the University of California, Irvine (UCI) Microgrid serves as the case study. First, the secondary circuit (UC-9) is heavily loaded and an integral component of a highly characterized and metered microgrid. Second, a unique "next-generation" distributed energy resource has been deployed at the end of the circuit that integrates photovoltaic power generation, battery storage, and EV charging. In order to analyze this system and evaluate the impact of the DER on the secondary circuit, a model was developed to provide a real-time load flow analysis. The research develops a power management system applicable to similarly integrated systems. The model is verified by metered data obtained from a network of high resolution electric meters and estimated load data for the buildings that have unknown demand. An increase in voltage is observed when the amount of photovoltaic power generation is increased. To mitigate this effect, a constant power factor is set. Should the real power change dramatically, the reactive power is changed to mitigate voltage fluctuations.

  9. Neuroelectric Tuning of Cortical Oscillations by Apical Dendrites in Loop Circuits

    Directory of Open Access Journals (Sweden)

    David LaBerge

    2017-06-01

    Full Text Available Bundles of relatively long apical dendrites dominate the neurons that make up the thickness of the cerebral cortex. It is proposed that a major function of the apical dendrite is to produce sustained oscillations at a specific frequency that can serve as a common timing unit for the processing of information in circuits connected to that apical dendrite. Many layer 5 and 6 pyramidal neurons are connected to thalamic neurons in loop circuits. A model of the apical dendrites of these pyramidal neurons has been used to simulate the electric activity of the apical dendrite. The results of that simulation demonstrated that subthreshold electric pulses in these apical dendrites can be tuned to specific frequencies and also can be fine-tuned to narrow bandwidths of less than one Hertz (1 Hz. Synchronous pulse outputs from the circuit loops containing apical dendrites can tune subthreshold membrane oscillations of neurons they contact. When the pulse outputs are finely tuned, they function as a local “clock,” which enables the contacted neurons to synchronously communicate with each other. Thus, a shared tuning frequency can select neurons for membership in a circuit. Unlike layer 6 apical dendrites, layer 5 apical dendrites can produce burst firing in many of their neurons, which increases the amplitude of signals in the neurons they contact. This difference in amplitude of signals serves as basis of selecting a sub-circuit for specialized processing (e.g., sustained attention within the typically larger layer 6-based circuit. After examining the sustaining of oscillations in loop circuits and the processing of spikes in network circuits, we propose that cortical functioning can be globally viewed as two systems: a loop system and a network system. The loop system oscillations influence the network system’s timing and amplitude of pulse signals, both of which can select circuits that are momentarily dominant in cortical activity.

  10. Electronic circuit encyclopedia 2

    Energy Technology Data Exchange (ETDEWEB)

    Park, Sun Ho

    1992-10-15

    This book is composed of 15 chapters, which are amplification of weak signal and measurement circuit audio control and power amplification circuit, data transmission and wireless system, forwarding and isolation, signal converting circuit, counter and comparator, discriminator circuit, oscillation circuit and synthesizer, digital and circuit on computer image processing circuit, sensor drive circuit temperature sensor circuit, magnetic control and application circuit, motor driver circuit, measuring instrument and check tool and power control and stability circuit.

  11. Electronic circuit encyclopedia 2

    International Nuclear Information System (INIS)

    Park, Sun Ho

    1992-10-01

    This book is composed of 15 chapters, which are amplification of weak signal and measurement circuit audio control and power amplification circuit, data transmission and wireless system, forwarding and isolation, signal converting circuit, counter and comparator, discriminator circuit, oscillation circuit and synthesizer, digital and circuit on computer image processing circuit, sensor drive circuit temperature sensor circuit, magnetic control and application circuit, motor driver circuit, measuring instrument and check tool and power control and stability circuit.

  12. Design and Characterization of DNA Strand-Displacement Circuits in Serum-Supplemented Cell Medium.

    Science.gov (United States)

    Fern, Joshua; Schulman, Rebecca

    2017-09-15

    The functional stability and lifetimes of synthetic molecular circuits in biological environments are important for long-term, stable sensors or controllers of cell or tissue behavior. DNA-based molecular circuits, in particular DNA strand-displacement circuits, provide simple and effective biocompatible control mechanisms and sensors, but are vulnerable to digestion by nucleases present in living tissues and serum-supplemented cell culture. The stability of double-stranded and single-stranded DNA circuit components in serum-supplemented cell medium and the corresponding effect of nuclease-mediated degradation on circuit performance were characterized to determine the major routes of degradation and DNA strand-displacement circuit failure. Simple circuit design choices, such as the use of 5' toeholds within the DNA complexes used as reactants in the strand-displacement reactions and the termination of single-stranded components with DNA hairpin domains at the 3' termini, significantly increase the functional lifetime of the circuit components in the presence of nucleases. Simulations of multireaction circuits, guided by the experimentally measured operation of single-reaction circuits, enable predictive realization of multilayer and competitive-reaction circuit behavior. Together, these results provide a basic route to increased DNA circuit stability in cell culture environments.

  13. Novel Methodology for Functional Modeling and Simulation of Wireless Embedded Systems

    Directory of Open Access Journals (Sweden)

    Sosa Morales Emma

    2008-01-01

    Full Text Available Abstract A novel methodology is presented for the modeling and the simulation of wireless embedded systems. Tight interaction between the analog and the digital functionality makes the design and verification of such systems a real challenge. The applied methodology brings together the functional models of the baseband algorithms written in C language with the circuit descriptions at behavioral level in Verilog or Verilog-AMS for the system simulations in a single kernel environment. The physical layer of an ultrawideband system has been successfully modeled and simulated. The results confirm that this methodology provides a standardized framework in order to efficiently and accurately simulate complex mixed signal applications for embedded systems.

  14. High-Voltage-Input Level Translator Using Standard CMOS

    Science.gov (United States)

    Yager, Jeremy A.; Mojarradi, Mohammad M.; Vo, Tuan A.; Blalock, Benjamin J.

    2011-01-01

    proposed integrated circuit would translate (1) a pair of input signals having a low differential potential and a possibly high common-mode potential into (2) a pair of output signals having the same low differential potential and a low common-mode potential. As used here, "low" and "high" refer to potentials that are, respectively, below or above the nominal supply potential (3.3 V) at which standard complementary metal oxide/semiconductor (CMOS) integrated circuits are designed to operate. The input common-mode potential could lie between 0 and 10 V; the output common-mode potential would be 2 V. This translation would make it possible to process the pair of signals by use of standard 3.3-V CMOS analog and/or mixed-signal (analog and digital) circuitry on the same integrated-circuit chip. A schematic of the circuit is shown in the figure. Standard 3.3-V CMOS circuitry cannot withstand input potentials greater than about 4 V. However, there are many applications that involve low-differential-potential, high-common-mode-potential input signal pairs and in which standard 3.3-V CMOS circuitry, which is relatively inexpensive, would be the most appropriate circuitry for performing other functions on the integrated-circuit chip that handles the high-potential input signals. Thus, there is a need to combine high-voltage input circuitry with standard low-voltage CMOS circuitry on the same integrated-circuit chip. The proposed circuit would satisfy this need. In the proposed circuit, the input signals would be coupled into both a level-shifting pair and a common-mode-sensing pair of CMOS transistors. The output of the level-shifting pair would be fed as input to a differential pair of transistors. The resulting differential current output would pass through six standoff transistors to be mirrored into an output branch by four heterojunction bipolar transistors. The mirrored differential current would be converted back to potential by a pair of diode-connected transistors

  15. Monolithic readout circuits for RHIC

    Energy Technology Data Exchange (ETDEWEB)

    O`Connor, P.; Harder, J. [Brookhaven National Laboratory, Upton, NY (United States)

    1991-12-31

    Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.

  16. Monolithic readout circuits for RHIC

    International Nuclear Information System (INIS)

    O'Connor, P.; Harder, J.; Sippach, W.

    1991-10-01

    Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology

  17. Process design kit and circuits at a 2 µm technology node for flexible wearable electronics applications (Conference Presentation)

    Science.gov (United States)

    Torres-Miranda, Miguel; Petritz, Andreas; Gold, Herbert; Stadlober, Barbara

    2016-09-01

    In this work we present our most advanced technology node of organic thin film transistors (OTFTs) manufactured with a channel length as short as 2 μm by contact photolithography and a self-alignment process directly on a plastic substrate. Our process design kit (PDK) is described with P-type transistors, capacitors and 3 metal layers for connections of complex circuits. The OTFTs are composed of a double dielectric layer with a photopatternable ultra thin polymer (PNDPE) and alumina, with a thickness on the order of 100 nm. The organic semiconductor is either Pentacene or DNTT, which have a stable average mobility up to 0.1 cm2/Vs. Finally, a polymer (e.g.: Parylene-C) is used as a passivation layer. We describe also our design rules for the placement of standard circuit cells. A "plastic wafer" is fabricated containing 49 dies. Each die of 1 cm2 has between 25 to 50 devices, proving larger scale integration in such a small space, unique in organic technologies. Finally, we present the design (by simulations using a Spice model for OTFTs) and the test of analog and digital basic circuits: amplifiers with DC gains of about 20 dB, comparators, inverters and logic gates working in the frequency range of 1-10 kHz. These standard circuit cells could be used for signal conditioning and integrated as active matrices for flexible sensors from 3rd party institutions, thus opening our fab to new ideas and sophisticated pre-industrial low cost applications for the emerging fields of biomedical devices and wearable electronics for virtual/augmented reality.

  18. Solid-state circuits

    CERN Document Server

    Pridham, G J

    2013-01-01

    Solid-State Circuits provides an introduction to the theory and practice underlying solid-state circuits, laying particular emphasis on field effect transistors and integrated circuits. Topics range from construction and characteristics of semiconductor devices to rectification and power supplies, low-frequency amplifiers, sine- and square-wave oscillators, and high-frequency effects and circuits. Black-box equivalent circuits of bipolar transistors, physical equivalent circuits of bipolar transistors, and equivalent circuits of field effect transistors are also covered. This volume is divided

  19. A Novel LTPS-TFT Pixel Circuit to Compensate the Electronic Degradation for Active-Matrix Organic Light-Emitting Diode Displays

    Directory of Open Access Journals (Sweden)

    Ching-Lin Fan

    2013-01-01

    Full Text Available A novel pixel driving circuit for active-matrix organic light-emitting diode (AMOLED displays with low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs is studied. The proposed compensation pixel circuit is driven by voltage programming scheme, which is composed of five TFTs and one capacitor, and has been certified to provide uniform output current by the Automatic Integrated Circuit Modeling Simulation Program with Integrated Circuit Emphasis (AIM-SPICE simulator. The results of simulation show excellent performance, such as the low average error rate of OLED current variation (<0.5% and the low average nonuniformity of OLED current variation (<0.8% while the shift of threshold voltage of the driving poly-Si TFT and the OLED are both in the worst case ( V for TFT and  V for OLED. The proposed pixel circuit shows high immunity to the threshold voltage deviation of both the driving poly-Si TFT and the OLED.

  20. VLSI scaling methods and low power CMOS buffer circuit

    International Nuclear Information System (INIS)

    Sharma Vijay Kumar; Pattanaik Manisha

    2013-01-01

    Device scaling is an important part of the very large scale integration (VLSI) design to boost up the success path of VLSI industry, which results in denser and faster integration of the devices. As technology node moves towards the very deep submicron region, leakage current and circuit reliability become the key issues. Both are increasing with the new technology generation and affecting the performance of the overall logic circuit. The VLSI designers must keep the balance in power dissipation and the circuit's performance with scaling of the devices. In this paper, different scaling methods are studied first. These scaling methods are used to identify the effects of those scaling methods on the power dissipation and propagation delay of the CMOS buffer circuit. For mitigating the power dissipation in scaled devices, we have proposed a reliable leakage reduction low power transmission gate (LPTG) approach and tested it on complementary metal oxide semiconductor (CMOS) buffer circuit. All simulation results are taken on HSPICE tool with Berkeley predictive technology model (BPTM) BSIM4 bulk CMOS files. The LPTG CMOS buffer reduces 95.16% power dissipation with 84.20% improvement in figure of merit at 32 nm technology node. Various process, voltage and temperature variations are analyzed for proving the robustness of the proposed approach. Leakage current uncertainty decreases from 0.91 to 0.43 in the CMOS buffer circuit that causes large circuit reliability. (semiconductor integrated circuits)

  1. Packaging Solutions for Mitigating IGBT Short-Circuit Instabilities

    DEFF Research Database (Denmark)

    Reigosa, Paula Diaz; Iannuzzo, Francesco; Blaabjerg, Frede

    2017-01-01

    In this paper, the gate voltage oscillations occurring under short-circuit conditions in Insulated-Gate Bipolar Transistors are investigated, together with their dependency with respect to stray inductance variations. By using AnSYS Q3D Extractor, electromagnetic simulations are conducted to extr...

  2. A standard-enabled workflow for synthetic biology

    KAUST Repository

    Myers, Chris J.

    2017-06-15

    A synthetic biology workflow is composed of data repositories that provide information about genetic parts, sequence-level design tools to compose these parts into circuits, visualization tools to depict these designs, genetic design tools to select parts to create systems, and modeling and simulation tools to evaluate alternative design choices. Data standards enable the ready exchange of information within such a workflow, allowing repositories and tools to be connected from a diversity of sources. The present paper describes one such workflow that utilizes, among others, the Synthetic Biology Open Language (SBOL) to describe genetic designs, the Systems Biology Markup Language to model these designs, and SBOL Visual to visualize these designs. We describe how a standard-enabled workflow can be used to produce types of design information, including multiple repositories and software tools exchanging information using a variety of data standards. Recently, the ACS Synthetic Biology journal has recommended the use of SBOL in their publications.

  3. Implementation of interconnect simulation tools in spice

    Science.gov (United States)

    Satsangi, H.; Schutt-Aine, J. E.

    1993-01-01

    Accurate computer simulation of high speed digital computer circuits and communication circuits requires a multimode approach to simulate both the devices and the interconnects between devices. Classical circuit analysis algorithms (lumped parameter) are needed for circuit devices and the network formed by the interconnected devices. The interconnects, however, have to be modeled as transmission lines which incorporate electromagnetic field analysis. An approach to writing a multimode simulator is to take an existing software package which performs either lumped parameter analysis or field analysis and add the missing type of analysis routines to the package. In this work a traditionally lumped parameter simulator, SPICE, is modified so that it will perform lossy transmission line analysis using a different model approach. Modifying SPICE3E2 or any other large software package is not a trivial task. An understanding of the programming conventions used, simulation software, and simulation algorithms is required. This thesis was written to clarify the procedure for installing a device into SPICE3E2. The installation of three devices is documented and the installations of the first two provide a foundation for installation of the lossy line which is the third device. The details of discussions are specific to SPICE, but the concepts will be helpful when performing installations into other circuit analysis packages.

  4. Mutator for transferring a memristor emulator into meminductive and memcapacitive circuits

    International Nuclear Information System (INIS)

    Yu Dong-Sheng; Liang Yan; Lu, Herbert H. C.; Hu Yi-Hua

    2014-01-01

    In this paper, a concise but effective interface circuit for transforming a memristor into meminductive and memcapacitive systems is designed. This newly proposed interface circuit, constructed by only two current conveyors, is equipped with three available ports, which can provide six connecting combinations in terms of one resistor, one capacitor, and one memristor. For the sake of confirming the design effectiveness, theoretical and simulation discussions are hence introduced and all the experimental waveforms provide conclusive evidence to validate the correctness of these new mutators. The most attractive features of this new interface circuit are the floating terminals and convenient practical implementation. (general)

  5. Collective of mechatronics circuit

    International Nuclear Information System (INIS)

    1987-02-01

    This book is composed of three parts, which deals with mechatronics system about sensor, circuit and motor. The contents of the first part are photo sensor of collector for output, locating detection circuit with photo interrupts, photo sensor circuit with CdS cell and lamp, interface circuit with logic and LED and temperature sensor circuit. The second part deals with oscillation circuit with crystal, C-R oscillation circuit, F-V converter, timer circuit, stability power circuit, DC amp and DC-DC converter. The last part is comprised of bridge server circuit, deformation bridge server, controlling circuit of DC motor, controlling circuit with IC for PLL and driver circuit of stepping motor and driver circuit of Brushless.

  6. Collective of mechatronics circuit

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1987-02-15

    This book is composed of three parts, which deals with mechatronics system about sensor, circuit and motor. The contents of the first part are photo sensor of collector for output, locating detection circuit with photo interrupts, photo sensor circuit with CdS cell and lamp, interface circuit with logic and LED and temperature sensor circuit. The second part deals with oscillation circuit with crystal, C-R oscillation circuit, F-V converter, timer circuit, stability power circuit, DC amp and DC-DC converter. The last part is comprised of bridge server circuit, deformation bridge server, controlling circuit of DC motor, controlling circuit with IC for PLL and driver circuit of stepping motor and driver circuit of Brushless.

  7. Fault Detection and Location of IGBT Short-Circuit Failure in Modular Multilevel Converters

    Directory of Open Access Journals (Sweden)

    Bin Jiang

    2018-06-01

    Full Text Available A single fault detection and location for Modular Multilevel Converter (MMC is of great significance, as numbers of sub-modules (SMs in MMC are connected in series. In this paper, a novel fault detection and location method is proposed for MMC in terms of the Insulated Gate Bipolar Translator (IGBT short-circuit failure in SM. The characteristics of IGBT short-circuit failures are analyzed, based on which a Differential Comparison Low-Voltage Detection Method (DCLVDM is proposed to detect the short-circuit fault. Lastly, the faulty IGBT is located based on the capacitor voltage of the faulty SM by Continuous Wavelet Transform (CWT. Simulations have been done in the simulation software PSCAD/EMTDC and the results confirm the validity and reliability of the proposed method.

  8. Influence of the spectral distribution of light on the characteristics of photovoltaic panel. Comparison between simulation and experimental

    Science.gov (United States)

    Chadel, Meriem; Bouzaki, Mohammed Moustafa; Chadel, Asma; Petit, Pierre; Sawicki, Jean-Paul; Aillerie, Michel; Benyoucef, Boumediene

    2017-02-01

    We present and analyze experimental results obtained with a laboratory setup based on a hardware and smart instrumentation for the complete study of performance of PV panels using for illumination an artificial radiation source (Halogen lamps). Associated to an accurate analysis, this global experimental procedure allows the determination of effective performance under standard conditions thanks to a simulation process originally developed under Matlab software environment. The uniformity of the irradiated surface was checked by simulation of the light field. We studied the response of standard commercial photovoltaic panels under enlightenment measured by a spectrometer with different spectra for two sources, halogen lamps and sunlight. Then, we bring a special attention to the influence of the spectral distribution of light on the characteristics of photovoltaic panel, that we have performed as a function of temperature and for different illuminations with dedicated measurements and studies of the open circuit voltage and short-circuit current.

  9. Nonlinear behavior analysis of split-winding dry-type transformer using a new star model and a coupled field-circuit approach

    Directory of Open Access Journals (Sweden)

    Azizian Davood

    2016-12-01

    Full Text Available Regarding the importance of short circuit and inrush current simulations in the split-winding transformer, a novel nonlinear equivalent circuit is introduced in this paper for nonlinear simulation of this transformer. The equivalent circuit is extended using the nonlinear inductances. Employing a numerical method, leakage and magnetizing inductances in the split-winding transformer are extracted and the nonlinear model inductances are estimated using these inductances. The introduced model is validated and using this nonlinear model, inrush and short-circuit currents are calculated. It has been seen that the introduced model is valid and suitable for simulations of the split-winding transformer due to various loading conditions. Finally, the effects of nonlinearity of the model inductances are discussed in the following.

  10. Computer model of a reverberant and parallel circuit coupling

    Science.gov (United States)

    Kalil, Camila de Andrade; de Castro, Maria Clícia Stelling; Cortez, Célia Martins

    2017-11-01

    The objective of the present study was to deepen the knowledge about the functioning of the neural circuits by implementing a signal transmission model using the Graph Theory in a small network of neurons composed of an interconnected reverberant and parallel circuit, in order to investigate the processing of the signals in each of them and the effects on the output of the network. For this, a program was developed in C language and simulations were done using neurophysiological data obtained in the literature.

  11. LTS junction technology for RSFQ and qubit circuit applications

    International Nuclear Information System (INIS)

    Buchholz, F.-Im.; Balashov, D.V.; Dolata, R.; Hagedorn, D.; Khabipov, M.I.; Kohlmann, J.; Zorin, A.B.; Niemeyer, J.

    2006-01-01

    The potentials of LTS junction technology and electronics offer innovative solutions for the processing of quantum information in RSFQ and qubit circuits. We discuss forthcoming approaches based on standard SIS technology and addressed to the development of new superconducting device concepts. The challenging problem of reducing back action noise of the RSFQ circuits deteriorating coherent properties of the qubit is currently solved by implementing Josephson junctions with non-linear shunts based on LTS SIS-SIN technology. Upgraded NbAlO x trilayer technology enables the fabrication of high-quality mesoscopic Josephson junction transistors down to the nanometer range suitable for a qubit-operation regime. As applications, circuit concepts are presented which combine superconducting devices of different nature

  12. Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

    OpenAIRE

    石橋, 孝昭

    2012-01-01

    This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

  13. Implementation of Electrical Simulation Model for IEC Standard Type-3A Generator

    DEFF Research Database (Denmark)

    Subramanian, Chandrasekaran; Casadei, Domenico; Tani, Angelo

    2013-01-01

    This paper describes the implementation of electrical simulation model for IEC 61400-27-1 standard Type-3A generator. A general overview of the different wind electric generators(WEG) types are given and the main focused on Type-3A WEG standard models, namely a model for a variable speed wind tur...

  14. Source-synchronous networks-on-chip circuit and architectural interconnect modeling

    CERN Document Server

    Mandal, Ayan; Mahapatra, Rabi

    2014-01-01

    This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks.  The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized.  Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.   • Describes novel methods for high-speed network-on-chip (NoC) design; • Enables readers to understand NoC design from both circuit and architectural levels; • Provides circuit-level details of the NoC (including clocking, router design), along with a high-speed, resonant clocking style which is used in the NoC; • Includes architectural simulations of the NoC, demonstrating significantly superior performance over the state-of-the-art.

  15. Hybrid Circuit QED with Electrons on Helium

    Science.gov (United States)

    Yang, Ge

    Electrons on helium (eHe) is a 2-dimensional system that forms naturally at the interface between superfluid helium and vacuum. It has the highest measured electron mobility, and long predicted spin coherence time. In this talk, we will first review various quantum computer architecture proposals that take advantage of these exceptional properties. In particular, we describe how electrons on helium can be combined with superconducting microwave circuits to take advantage of the recent progress in the field of circuit quantum electrodynamics (cQED). We will then demonstrate how to reliably trap electrons on these devices hours at a time, at millikelvin temperatures inside a dilution refrigerator. The coupling between the electrons and the microwave resonator exceeds 1 MHz, and can be reproduced from the design geometry using our numerical simulation. Finally, we will present our progress on isolating individual electrons in such circuits, to build single-electron quantum dots with electrons on helium.

  16. First applications of high temperature superconductors in microelectronic. Subproject: Foundations of a reality-near simulation of superconducting high frequency circuits. Final report

    International Nuclear Information System (INIS)

    Wolff, I.; Konopka, J.; Fritsch, U.; Hofschen, S.; Rittweger, M.; Becks, T.; Schroeder, W.; Ma Jianguo.

    1994-01-01

    The basis of computer aided design of the physical properties of high temperature superconductors in high frequency and microwave areas were not well known and understood at the beginning of this research project. For this reason within in the research project as well new modells for describing the microwave properties of these superconductors have been developed as alos well known numerical analysis techniques as e.g. the boundary integral method, the method of finite differences in time domain and the spectral domain analysis technique have been changed so that they meet the requirements of superconducting high frequency and microwave circuits. Hereby it especially also was considered that the substrate materials used for high temperature superconductors normally have high dielectric constants and big anisotropies so that new analysis techniques had to be developed to consider the influence of these parameters on the components and circuits. The dielectric properties of the substrate materials furthermore have been a subject of measurement activities in which the permittivity tensor of the materials have been determined with high accuracy and ogver a large frequency range. As a result of the performed investigations now improved numerical simulation techniques on a realistic basis are available for the analysis of superconducting high frequency and microwave circuits. (orig.) [de

  17. MOS Current Mode Logic Near Threshold Circuits

    Directory of Open Access Journals (Sweden)

    Alexander Shapiro

    2014-06-01

    Full Text Available Near threshold circuits (NTC are an attractive and promising technology that provides significant power savings with some delay penalty. The combination of NTC technology with MOS current mode logic (MCML is examined in this work. By combining MCML with NTC, the constant power consumption of MCML is reduced to leakage power levels that can be tolerated in certain modern applications. Additionally, the speed of NTC is improved due to the high speed nature of MCML technology. A 14 nm Fin field effect transistor (FinFET technology is used to evaluate these combined circuit techniques. A 32-bit Kogge Stone adder is chosen as a demonstration vehicle for feasibility analysis. MCML with NTC is shown to yield enhanced power efficiency when operated above 1 GHz with a 100% activity factor as compared to standard CMOS. MCML with NTC is more power efficient than standard CMOS beyond 9 GHz over a wide range of activity factors. MCML with NTC also exhibits significantly lower noise levels as compared to standard CMOS. The results of the analysis demonstrate that pairing NTC and MCML is efficient when operating at high frequencies and activity factors.

  18. E-Learning System for Learning Virtual Circuit Making with a Microcontroller and Programming to Control a Robot

    Science.gov (United States)

    Takemura, Atsushi

    2015-01-01

    This paper proposes a novel e-Learning system for learning electronic circuit making and programming a microcontroller to control a robot. The proposed e-Learning system comprises a virtual-circuit-making function for the construction of circuits with a versatile, Arduino microcontroller and an educational system that can simulate behaviors of…

  19. Hazard-Free Pyrotechnic Simulator

    Science.gov (United States)

    Mcalister, William B., Jr.

    1988-01-01

    Simulator evaluates performance of firing circuits for electroexplosive devices (EED's) safely and inexpensively. Tests circuits realistically when pyrotechnic squibs not connected and eliminates risks of explosions. Used to test such devices as batteries where test conditions might otherwise degrade them.

  20. Effect of 1MeV electron beam on transistors and circuits

    International Nuclear Information System (INIS)

    Lee, Tae Hoon

    1998-02-01

    It has been known that semiconductor devices operating in a radiation environment exhibited significant alterations of their electrical responses. Since an electron beam bombardment produces lattice damage in Si and charged defects in SiO 2 , several electrical parameters of transistors exhibit significant changes. Those parameters are the current gain of BJT (Bipolar Junction Transistor) and the threshold voltage of MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The degradation of transistors brings about that of circuits. This paper presents the results of experiments and simulations performed to study the effects of 1MeV electron beam irradiation on selected silicon transistors and circuits. For BJTs, the current gains of npn (2N3904) and pnp (2N3906) linearly decreased as the irradiation dose increased, and from this result, the damage constants, Ks were obtained as 13.65 for 2N3904 and 22.52 for 2N3906 in MGy, indicating a more stable operation in the electron radiation environment for pnp than that for npn. The decrease of current gain was due to that of minority-carrier lifetime in the base region. For MOSFETs (CD4007s), the threshold voltages of NMOS and PMOS shifted to the lower values, which was resulted from the accumulation of charge in SiO 2 . The charges could be categorized into fixed oxide charge and interfacial trap charge. From experimental results, the amounts of the induced charges could be quantitatively estimated. These degradations of transistors brought about the decrease in the voltage gain of CE (Common Emitter) amplifier and the shifts in the inverting voltage of inverter. Additionally, PSpice simulations of these circuits were carried out by modeling of irradiated transistors. The comparison of simulation with experiment showed the relatively good agreement of simulation for the degradation of circuits after irradiation

  1. EM Simulation Accuracy Enhancement for Broadband Modeling of On-Wafer Passive Components

    DEFF Research Database (Denmark)

    Johansen, Tom Keinicke; Jiang, Chenhui; Hadziabdic, Dzenan

    2007-01-01

    This paper describes methods for accuracy enhancement in broadband modeling of on-wafer passive components using electromagnetic (EM) simulation. It is shown that standard excitation schemes for integrated component simulation leads to poor correlation with on-wafer measurements beyond the lower...... GHz frequency range. We show that this is due to parasitic effects and higher-order modes caused by the excitation schemes. We propose a simple equivalent circuit for the parasitic effects in the well-known ground ring excitation scheme. An extended L-2L calibration method is shown to improve...

  2. Color Coding of Circuit Quantities in Introductory Circuit Analysis Instruction

    Science.gov (United States)

    Reisslein, Jana; Johnson, Amy M.; Reisslein, Martin

    2015-01-01

    Learning the analysis of electrical circuits represented by circuit diagrams is often challenging for novice students. An open research question in electrical circuit analysis instruction is whether color coding of the mathematical symbols (variables) that denote electrical quantities can improve circuit analysis learning. The present study…

  3. Representative-Sandwich Model for Mechanical-Crush and Short-Circuit Simulation of Lithium-ion Batteries

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Chao; Santhanagopalan, Shriram; Sprague, Michael A.; Pesaran, Ahmad A.

    2015-07-28

    Lithium-ion batteries are currently the state-of-the-art power sources for a variety of applications, from consumer electronic devices to electric-drive vehicles (EDVs). Being an energized component, failure of the battery is an essential concern, which can result in rupture, smoke, fire, or venting. The failure of Lithium-ion batteries can be due to a number of external abusive conditions (impact/crush, overcharge, thermal ramp, etc.) or internal conditions (internal short circuits, excessive heating due to resistance build-up, etc.), of which the mechanical-abuse-induced short circuit is a very practical problem. In order to better understand the behavior of Lithium-ion batteries under mechanical abuse, a coupled modeling methodology encompassing the mechanical, thermal and electrical response has been developed for predicting short circuit under external crush.

  4. Composite behaviors of dual meminductor circuits

    International Nuclear Information System (INIS)

    Zheng Ci-Yan; Yu Dong-Sheng; Liang Yan; Chen Meng-Ke

    2015-01-01

    This paper focuses on analyzing the composite dynamic behaviors of two meminductors in serial and parallel connections with different polarities. Based on the constitutive relations, two time-integral-of-flux (TIF) controlled meminductors are adopted to theoretically demonstrate the variation of memductance in terms of TIF, charge, flux, and current. By utilizing a floating memristor-less meminductor emulator, the theoretical analysis reported in this paper is confirmed via a PSPICE simulation study and hardware experiment. Good agreement among theoretical analysis, simulation, and hardware validation confirms that dual meminductor circuits in composite connections behave as a new meminductor with higher complexity. (paper)

  5. Analog circuit design designing dynamic circuit response

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    This second volume, Designing Dynamic Circuit Response builds upon the first volume Designing Amplifier Circuits by extending coverage to include reactances and their time- and frequency-related behavioral consequences.

  6. A fast novel soft-start circuit for peak current-mode DC—DC buck converters

    International Nuclear Information System (INIS)

    Li Jie; Yang Miao; Sun Weifeng; Lu Xiaoxia; Xu Shen; Lu Shengli

    2013-01-01

    A fully integrated soft-start circuit for DC—DC buck converters is presented. The proposed high speed soft-start circuit is made of two sections: an overshoot suppression circuit and an inrush current suppression circuit. The overshoot suppression circuit is presented to control the input of the error amplifier to make output voltage limit increase in steps without using an external capacitor. A variable clock signal is adopted in the inrush current suppression circuit to increase the duty cycle of the system and suppress the inrush current. The DC—DC converter with the proposed soft-start circuit has been fabricated with a standard 0.13 μm CMOS process. Experimental results show that the proposed high speed soft-start circuit has achieved less than 50 μs start-up time. The inductor current and the output voltage increase smoothly over the whole load range. (semiconductor integrated circuits)

  7. Physically-insightful equivalent circuit models for electromagnetic periodic structures

    Science.gov (United States)

    Mesa, F.; Rodríguez-Berral, R.; Medina, F.

    2018-02-01

    In this presentation it will be discussed how to obtain analytical or quasi-analytical equivalent circuits to deal with periodic structures such as frequency selective surfaces and/or metasurfaces. Both the topology and the values of the involved elements of these circuits are obtained from a basic rationale to solve the corresponding integral equation. This procedure, besides providing a very efficient analysis/design tool, allows for a good physical insight into the operating mechanisms of the structure in contrast with the almost blind numerical scheme of commercial simulators.

  8. Circuit effects on pierce instabilities, and double-layer formation

    International Nuclear Information System (INIS)

    Raadu, M.A.; Silevitch, M.B.

    1982-11-01

    The role of the Pierce instability in the formation of double layers is considered and compared with that of the Buneman instability. Pierce instabilities have been identified in a double-layer experiment, where they lead to ion trapping. Here the effects of external circuit elements are considered. In the case of immobile ions the onset criteria are unaffected, but in the unstable range the growth rate is reduced by the external impedance. Required experimental values of the circuit elements are estimated. The possible relevance to computer simulations is noted. (Authors)

  9. Efficient/reliable dc-to-dc inverter circuit

    Science.gov (United States)

    Pasciutti, E. R.

    1970-01-01

    Feedback loop, which contains an inductor in series with a saturable reactor, is added to a standard inverter circuit to permit the inverter power transistors to be switched in a controlled and efficient manner. This inverter is applicable where the power source has either high or low impedance properties.

  10. 30 CFR 56.4011 - Abandoned electric circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Abandoned electric circuits. 56.4011 Section 56.4011 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT OF LABOR METAL AND NONMETAL MINE SAFETY AND HEALTH SAFETY AND HEALTH STANDARDS-SURFACE METAL AND NONMETAL MINES Fire Prevention and...

  11. Power management techniques for integrated circuit design

    CERN Document Server

    Chen, Ke-Horng

    2016-01-01

    This book begins with the premise that energy demands are directing scientists towards ever-greener methods of power management, so highly integrated power control ICs (integrated chip/circuit) are increasingly in demand for further reducing power consumption. * A timely and comprehensive reference guide for IC designers dealing with the increasingly widespread demand for integrated low power management * Includes new topics such as LED lighting, fast transient response, DVS-tracking and design with advanced technology nodes * Leading author (Chen) is an active and renowned contributor to the power management IC design field, and has extensive industry experience * Accompanying website includes presentation files with book illustrations, lecture notes, simulation circuits, solution manuals, instructors manuals, and program downloads.

  12. Simplified model of a PWR primary circuit

    International Nuclear Information System (INIS)

    Souza, A.L.; Faya, A.J.G.

    1988-07-01

    The computer program RENUR was developed to perform a very simplified simulation of a typical PWR primary circuit. The program has mathematical models for the thermal-hydraulics of the reactor core and the pressurizer, the rest of the circuit being treated as a single volume. Heat conduction in the fuel rod is analyzed by a nodal model. Average and hot channels are treated so that bulk response of the core and DNBR can be evaluated. A homogenenous model is employed in the pressurizer. Results are presented for a steady-state situation as well as for a loss of load transient. Agreement with the results of more elaborate computer codes is good with substantial reduction in computer costs. (author) [pt

  13. Analog Multilayer Perceptron Circuit with On-chip Learning: Portable Electronic Nose

    Science.gov (United States)

    Pan, Chih-Heng; Tang, Kea-Tiong

    2011-09-01

    This article presents an analog multilayer perceptron (MLP) neural network circuit with on-chip back propagation learning. This low power and small area analog MLP circuit is proposed to implement as a classifier in an electronic nose (E-nose). Comparing with the E-nose using microprocessor or FPGA as a classifier, the E-nose applying analog circuit as a classifier can be faster and much smaller, demonstrate greater power efficiency and be capable of developing a portable E-nose [1]. The system contains four inputs, four hidden neurons, and only one output neuron; this simple structure allows the circuit to have a smaller area and less power consumption. The circuit is fabricated using TSMC 0.18 μm 1P6M CMOS process with 1.8 V supply voltage. The area of this chip is 1.353×1.353 mm2 and the power consumption is 0.54 mW. Post-layout simulations show that the proposed analog MLP circuit can be successively trained to identify three kinds of fruit odors.

  14. Accelerating transient simulation of linear reduced order models.

    Energy Technology Data Exchange (ETDEWEB)

    Thornquist, Heidi K.; Mei, Ting; Keiter, Eric Richard; Bond, Brad

    2011-10-01

    Model order reduction (MOR) techniques have been used to facilitate the analysis of dynamical systems for many years. Although existing model reduction techniques are capable of providing huge speedups in the frequency domain analysis (i.e. AC response) of linear systems, such speedups are often not obtained when performing transient analysis on the systems, particularly when coupled with other circuit components. Reduced system size, which is the ostensible goal of MOR methods, is often insufficient to improve transient simulation speed on realistic circuit problems. It can be shown that making the correct reduced order model (ROM) implementation choices is crucial to the practical application of MOR methods. In this report we investigate methods for accelerating the simulation of circuits containing ROM blocks using the circuit simulator Xyce.

  15. THE CORRELATED TRACK RECEIVER OF TONE TRACK CIRCUITS

    Directory of Open Access Journals (Sweden)

    K. V. Goncharov

    2011-05-01

    Full Text Available The work is devoted to further improvement of processing algorithm of checking signals of rail line. The simulation modeling of correlation track receiver of tone rail circuits has been executed; the benchmark analysis of correlation receiver and direct amplifier receiver has been executed.

  16. Development of circuit model for arcing on solar panels

    International Nuclear Information System (INIS)

    Mehta, Bhoomi K; Deshpande, S P; Mukherjee, S; Gupta, S B; Ranjan, M; Rane, R; Vaghela, N; Acharya, V; Sudhakar, M; Sankaran, M; Suresh, E P

    2010-01-01

    The increased requirements of payload capacity of the satellites have resulted in much higher power requirements of the satellites. In order to minimize the energy loss during power transmission due to cable loss, use of high voltage solar panels becomes necessary. When a satellite encounters space plasma it floats negatively with respect to the surrounding space plasma environment. At high voltage, charging and discharging on solar panels causes the power system breakdown. Once a solar panel surface is charged and potential difference between surface insulator and conductor exceeds certain value, electrostatic discharge (ESD) may occur. This ESD may trigger a secondary arc that can destroy the solar panel circuit. ESD is also called as primary or minor arc and secondary is called major arc. The energy of minor arc is supplied by the charge stored in the coverglass of solar array and is a pulse of typically several 100 ns to several 100 μs duration. The damage caused by minor arc is less compared to major arcs, but it is observed that the minor arc is cause of major arc. Therefore it is important to develop an understanding of minor arc and mitigation techniques. In this paper we present a linear circuit analysis for minor arcs on solar panels. To study arcing event, a ground experimental facility to simulate space plasma environment has been developed at Facilitation Centre for Industrial Plasma Technologies (Institute for Plasma Research) in collaboration with Indian Space Research Organization's ISRO Satellite Technology Centre (ISAC). A linear circuit model has been developed to explain the experimental results by representing the coverglass, solar cell interconnect and wiring by an LCR circuit and the primary arc by an equivalent LR circuit. The aim of the circuit analysis is to predict the arc current which flows through the arc plasma. It is established from the model that the current depends on various parameters like potential difference between insulator

  17. A reliable ground bounce noise reduction technique for nanoscale CMOS circuits

    Science.gov (United States)

    Sharma, Vijay Kumar; Pattanaik, Manisha

    2015-11-01

    Power gating is the most effective method to reduce the standby leakage power by adding header/footer high-VTH sleep transistors between actual and virtual power/ground rails. When a power gating circuit transitions from sleep mode to active mode, a large instantaneous charge current flows through the sleep transistors. Ground bounce noise (GBN) is the high voltage fluctuation on real ground rail during sleep mode to active mode transitions of power gating circuits. GBN disturbs the logic states of internal nodes of circuits. A novel and reliable power gating structure is proposed in this article to reduce the problem of GBN. The proposed structure contains low-VTH transistors in place of high-VTH footer. The proposed power gating structure not only reduces the GBN but also improves other performance metrics. A large mitigation of leakage power in both modes eliminates the need of high-VTH transistors. A comprehensive and comparative evaluation of proposed technique is presented in this article for a chain of 5-CMOS inverters. The simulation results are compared to other well-known GBN reduction circuit techniques at 22 nm predictive technology model (PTM) bulk CMOS model using HSPICE tool. Robustness against process, voltage and temperature (PVT) variations is estimated through Monte-Carlo simulations.

  18. Comparative Study of Crosstalk Reduction Techniques in RF Printed Circuit Board Using FDTD Method

    Directory of Open Access Journals (Sweden)

    Rajeswari Packianathan

    2015-01-01

    Full Text Available Miniaturization of the feature size in modern electronic circuits results from placing interconnections in close proximity with a high packing density. As a result, coupling between the adjacent lines has increased significantly, causing crosstalk to become an important concern in high-performance circuit design. In certain applications, microstriplines may be used in printed circuit boards for propagating high-speed signals, rather than striplines. Here, the electromagnetic coupling effects are analyzed for various microstrip transmission line structures, namely, microstriplines with a guard trace, double stub microstriplines, and parallel serpentine microstriplines using the finite-difference time-domain method. The numerical results are compared with simulation results, where the variants are simulated using an Ansoft high-frequency structure simulator. The analysis and simulation results are experimentally validated by fabricating a prototype and establishing a good correspondence between them. Numerical results are compared with simulation and experimental results, showing that double stub microstriplines reduce the far end crosstalk by 7 dB and increase the near end crosstalk by about 2 dB compared with the parallel microstriplines. Parallel serpentine microstriplines reduce the far end crosstalk by more than 10 dB and also reduce more than 15 mV of peak far end crosstalk voltage, compared with parallel microstriplines.

  19. SED-ML web tools: generate, modify and export standard-compliant simulation studies.

    Science.gov (United States)

    Bergmann, Frank T; Nickerson, David; Waltemath, Dagmar; Scharm, Martin

    2017-04-15

    The Simulation Experiment Description Markup Language (SED-ML) is a standardized format for exchanging simulation studies independently of software tools. We present the SED-ML Web Tools, an online application for creating, editing, simulating and validating SED-ML documents. The Web Tools implement all current SED-ML specifications and, thus, support complex modifications and co-simulation of models in SBML and CellML formats. Ultimately, the Web Tools lower the bar on working with SED-ML documents and help users create valid simulation descriptions. http://sysbioapps.dyndns.org/SED-ML_Web_Tools/ . fbergman@caltech.edu . © The Author 2017. Published by Oxford University Press. All rights reserved. For Permissions, please e-mail: journals.permissions@oup.com

  20. Modeling and Analysis of a Fractional-Order Generalized Memristor-Based Chaotic System and Circuit Implementation

    Science.gov (United States)

    Yang, Ningning; Xu, Cheng; Wu, Chaojun; Jia, Rong; Liu, Chongxin

    2017-12-01

    Memristor is a nonlinear “missing circuit element”, that can easily achieve chaotic oscillation. Memristor-based chaotic systems have received more and more attention. Research shows that fractional-order systems are more close to real systems. As an important parameter, the order can increase the flexibility and degree of freedom of the system. In this paper, a fractional-order generalized memristor, which consists of a diode bridge and a parallel circuit with an equivalent unit circuit and a linear resistance, is proposed. Frequency and electrical characteristics of the fractional-order memristor are analyzed. A chain structure circuit is used to implement the fractional-order unit circuit. Then replacing the conventional Chua’s diode by the fractional-order generalized memristor, a fractional-order memristor-based chaotic circuit is proposed. A large amount of research work has been done to investigate the influence of the order on the dynamical behaviors of the fractional-order memristor-based chaotic circuit. Varying with the order, the system enters the chaotic state from the periodic state through the Hopf bifurcation and period-doubling bifurcation. The chaotic state of the system has two types of attractors: single-scroll and double-scroll attractor. The stability theory of fractional-order systems is used to determine the minimum order occurring Hopf bifurcation. And the influence of the initial value on the system is analyzed. Circuit simulations are designed to verify the results of theoretical analysis and numerical simulation.

  1. Design of Microcantilever-Based Biosensor with Digital Feedback Control Circuit

    Directory of Open Access Journals (Sweden)

    Jayu P. Kalambe

    2012-01-01

    Full Text Available This paper present the design of cantilever-based biosensors with new readout, which hold promises as fast and cheap “point of care” device as well as interesting research tools. The fabrication process and related issues of the cantilever based bio-sensor are discussed. Coventorware simulation is carried out to analyze the device behavior. A fully integrated control circuit has been designed to solve manufacturing challenge which will take care of positioning of the cantilever instead of creating nanometer gap between the electrodes. The control circuit will solve the manufacturing challenge faced by the readout methods where it is essential to maintain precise gap between the electrodes. The circuit can take care of variation obtained due to fabrication process and maintain the precise gap between the electrodes by electrostatic actuation. The control circuit consist of analog and digital modules. The reliability issues of the sensor are also discussed.

  2. A Comprehensive Investigation on the Short Circuit Performance of MW-level IGBT Power Modules

    DEFF Research Database (Denmark)

    Wu, Rui; Reigosa, Paula Diaz; Iannuzzo, Francesco

    2015-01-01

    This paper investigates the short circuit performance of commercial 1.7 kV / 1 kA IGBT power modules by means of a 6 kA Non-Destructive-Tester. A mismatched current distribution among the parallel chips has been observed, which can reduce the short circuit capability of the IGBT power module unde...... short circuit conditions. Further Spice simulations reveal that the stray parameters inside the module play an important role in contributing to such a phenomenon....

  3. High speed and leakage-tolerant domino circuits for high fan-in applications in 70nm CMOS technology

    DEFF Research Database (Denmark)

    Moradi, Farshad; Wisland, Dag; Mahmoodi, Hamid

    This paper presents two proposed circuits that employ a footer transistor that is initially OFF in the evaluation phase to reduce leakage and then turned ON to complete the evaluation. Also a new circuit is added using a NAND gate that improves the performance more than 10% -15% compared...... with latter proposed circuit. According to simulations in a predictive 70 nm process, the proposed circuit increases noise immunity by more than 26X for wide OR gates and shows performance improvement of up to 20% compared to conventional domino logic circuits. The proposed circuit reduces the contention...

  4. Efficient quantum circuits for Szegedy quantum walks

    International Nuclear Information System (INIS)

    Loke, T.; Wang, J.B.

    2017-01-01

    A major advantage in using Szegedy’s formalism over discrete-time and continuous-time quantum walks lies in its ability to define a unitary quantum walk by quantizing a Markov chain on a directed or weighted graph. In this paper, we present a general scheme to construct efficient quantum circuits for Szegedy quantum walks that correspond to classical Markov chains possessing transformational symmetry in the columns of the transition matrix. In particular, the transformational symmetry criteria do not necessarily depend on the sparsity of the transition matrix, so this scheme can be applied to non-sparse Markov chains. Two classes of Markov chains that are amenable to this construction are cyclic permutations and complete bipartite graphs, for which we provide explicit efficient quantum circuit implementations. We also prove that our scheme can be applied to Markov chains formed by a tensor product. We also briefly discuss the implementation of Markov chains based on weighted interdependent networks. In addition, we apply this scheme to construct efficient quantum circuits simulating the Szegedy walks used in the quantum Pagerank algorithm for some classes of non-trivial graphs, providing a necessary tool for experimental demonstration of the quantum Pagerank algorithm. - Highlights: • A general theoretical framework for implementing Szegedy walks using quantum circuits. • Explicit efficient quantum circuit implementation of the Szegedy walk for several classes of graphs. • Efficient implementation of Szegedy walks for quantum page-ranking of a certain class of graphs.

  5. Transient-induced latchup in CMOS integrated circuits

    CERN Document Server

    Ker, Ming-Dou

    2009-01-01

    "Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process."--Publisher's description.

  6. Anomalous transport in discrete arcs and simulation of double layers in a model auroral circuit

    Science.gov (United States)

    Smith, Robert A.

    1987-01-01

    The evolution and long-time stability of a double layer in a discrete auroral arc requires that the parallel current in the arc, which may be considered uniform at the source, be diverted within the arc to charge the flanks of the U-shaped double-layer potential structure. A simple model is presented in which this current re-distribution is effected by anomalous transport based on electrostatic lower hybrid waves driven by the flank structure itself. This process provides the limiting constraint on the double-layer potential. The flank charging may be represented as that of a nonlinear transmission. A simplified model circuit, in which the transmission line is represented by a nonlinear impedance in parallel with a variable resistor, is incorporated in a 1-d simulation model to give the current density at the DL boundaries. Results are presented for the scaling of the DL potential as a function of the width of the arc and the saturation efficiency of the lower hybrid instability mechanism.

  7. Anomalous transport in discrete arcs and simulation of double layers in a model auroral circuit

    International Nuclear Information System (INIS)

    Smith, R.A.

    1987-01-01

    The evolution and long-time stability of a double layer (DL) in a discrete auroral arc requires that the parallel current in the arc, which may be considered uniform at the source, be diverted within the arc to charge the flanks of the U-shaped double layer potential structure. A simple model is presented in which this current redistribution is effected by anomalous transport based on electrostatic lower hybrid waves driven by the flank structure itself. This process provides the limiting constraint on the double layer potential. The flank charging may be represented as that of a nonlinear transmission line. A simplified model circuit, in which the transmission line is represented by a nonlinear impedance in parallel with a variable resistor, is incorporated in a one-dimensional simulation model to give the current density at the DL boundaries. Results are presented for the scaling of the DL potential as a function of the width of the arc and the saturation efficiency of the lower hybrid instability mechanism

  8. A simple electric circuit model for proton exchange membrane fuel cells

    Science.gov (United States)

    Lazarou, Stavros; Pyrgioti, Eleftheria; Alexandridis, Antonio T.

    A simple and novel dynamic circuit model for a proton exchange membrane (PEM) fuel cell suitable for the analysis and design of power systems is presented. The model takes into account phenomena like activation polarization, ohmic polarization, and mass transport effect present in a PEM fuel cell. The proposed circuit model includes three resistors to approach adequately these phenomena; however, since for the PEM dynamic performance connection or disconnection of an additional load is of crucial importance, the proposed model uses two saturable inductors accompanied by an ideal transformer to simulate the double layer charging effect during load step changes. To evaluate the effectiveness of the proposed model its dynamic performance under load step changes is simulated. Experimental results coming from a commercial PEM fuel cell module that uses hydrogen from a pressurized cylinder at the anode and atmospheric oxygen at the cathode, clearly verify the simulation results.

  9. Development of data acquisition system for test circuit for the Thermo-Hydraulic Laboratory of CDTN

    International Nuclear Information System (INIS)

    Corrade, Thales Jose Rodrigues; Mesquita, Amir Zacarias; Santos, Andre Augusto Campagnole dos

    2013-01-01

    The Circuit Water-Air (CWA), present in the Laboratorio de Termo-Hidraulica of the Centro de Desenvolvimento da Tecnologia Nuclear/Comissao Nacional de Energia Nuclear (CDTN / CNEN), has been used to evaluate devices present in nuclear fuel elements of a PWR (Pressurized Water Reactor). Currently, a segment of 5x5 beam simulators grids with spacer bars is being tested, serving one of the activities under the Project FUJB / FINEP / INB - 'Development of New Generation of Nuclear Fuel Element '. For the measurements of pressure drop along this beam, a system of data acquisition based on Basic language was created. Although this system is efficient and robust, their resources are very limited. Therefore, it was decided to use the software LabVIEW® implementing a more versatile and modern system. This article describes the new data acquisition system, and presents some results. The main parameters are monitored: temperature, density, dynamic viscosity, Reynolds number. The values of standard deviation, mean and uncertainty of an arbitrary channel are calculated. The system was installed and tested in the circuit under experimental conditions and showed satisfactory results.

  10. Memory Circuit Fault Simulator

    Science.gov (United States)

    Sheldon, Douglas J.; McClure, Tucker

    2013-01-01

    Spacecraft are known to experience significant memory part-related failures and problems, both pre- and postlaunch. These memory parts include both static and dynamic memories (SRAM and DRAM). These failures manifest themselves in a variety of ways, such as pattern-sensitive failures, timingsensitive failures, etc. Because of the mission critical nature memory devices play in spacecraft architecture and operation, understanding their failure modes is vital to successful mission operation. To support this need, a generic simulation tool that can model different data patterns in conjunction with variable write and read conditions was developed. This tool is a mathematical and graphical way to embed pattern, electrical, and physical information to perform what-if analysis as part of a root cause failure analysis effort.

  11. Magneto-sensor circuit efficiency incremented by Fourier-transformation

    KAUST Repository

    Talukdar, Abdul Hafiz Ibne; Useinov, Arthur; Hussain, Muhammad Mustafa

    2011-01-01

    In this paper detection by recognized intelligent algorithm for different magnetic films with the aid of a cost-effective and simple high efficient circuit are realized. Well-known, magnetic films generate oscillating frequencies when they stay a part of an LC- oscillatory circuit. These frequencies can be further analyzed to gather information about their magnetic properties. For the first time in this work we apply the signal analysis in frequency domain to create the Fourier frequency spectra which was used to detect the sample properties and their recognition. In this paper we have summarized both the simulation and experimental results. © 2011 Elsevier Ltd. All rights reserved.

  12. Magneto-sensor circuit efficiency incremented by Fourier-transformation

    KAUST Repository

    Talukdar, Abdul Hafiz Ibne

    2011-10-01

    In this paper detection by recognized intelligent algorithm for different magnetic films with the aid of a cost-effective and simple high efficient circuit are realized. Well-known, magnetic films generate oscillating frequencies when they stay a part of an LC- oscillatory circuit. These frequencies can be further analyzed to gather information about their magnetic properties. For the first time in this work we apply the signal analysis in frequency domain to create the Fourier frequency spectra which was used to detect the sample properties and their recognition. In this paper we have summarized both the simulation and experimental results. © 2011 Elsevier Ltd. All rights reserved.

  13. Xyce Parallel Electronic Simulator : users' guide, version 2.0.

    Energy Technology Data Exchange (ETDEWEB)

    Hoekstra, Robert John; Waters, Lon J.; Rankin, Eric Lamont; Fixel, Deborah A.; Russo, Thomas V.; Keiter, Eric Richard; Hutchinson, Scott Alan; Pawlowski, Roger Patrick; Wix, Steven D.

    2004-06-01

    These input formats include standard analytical models, behavioral models look-up Parallel Electronic Simulator is designed to support a variety of device model inputs. tables, and mesh-level PDE device models. Combined with this flexible interface is an architectural design that greatly simplifies the addition of circuit models. One of the most important feature of Xyce is in providing a platform for computational research and development aimed specifically at the needs of the Laboratory. With Xyce, Sandia now has an 'in-house' capability with which both new electrical (e.g., device model development) and algorithmic (e.g., faster time-integration methods) research and development can be performed. Ultimately, these capabilities are migrated to end users.

  14. ChemicalVia: a CERN-patented technology for use in high-density circuits

    CERN Multimedia

    Patrice Loïez

    2003-01-01

    High-density multilayer printed circuits such as those pictured here are found in miniaturized modern equipment from video cameras to mobile phones. Adjacent layers in these circuits are electrically connected by microvias, consisting of a small-diameter hole (usually 50 µm) with a thin metal-deposited surface covering their cylindrical walls to ensure local conductivity between the two layers. ChemicalVia is a new method, patented by CERN, to make microvias on high-density multilayer printed circuits using chemicals rather than complex laser, plasma or photoimaging technology. The process is compatible with all standard printed-circuit assembly lines, and has the advantages of low initial investment and reduced manufacturing costs. http://www.cern.ch/ttdatabase

  15. Modelling and numerical simulation of the corrosion product transport in the pressurised water reactor primary circuit

    International Nuclear Information System (INIS)

    Marchetto, C.

    2002-05-01

    During operation of pressurised water reactor, corrosion of the primary circuit alloys leads to the release of metallic species such as iron, nickel and cobalt in the primary fluid. These corrosion products are implicated in different transport phenomena and are activated in the reactor core where they are submitted to neutron flux. The radioactive corrosion products are afterwards present in the out of flux parts of primary circuit where they generate a radiation field. The first part of this study deals with the modelling of the corrosion: product transport phenomena. In particular, considering the current state of the art, corrosion and release mechanisms are described empirically, which allows to take into account the material surface properties. New mass balance equations describing the corrosion product behaviour are thus obtained. The numerical resolution of these equations is implemented in the second part of this work. In order to obtain large time steps, we choose an implicit time scheme. The associated system is linearized from the Newton method and is solved by a preconditioned GMRES method. Moreover, a time step auto-adaptive management based on Newton iterations is performed. Consequently, an efficient resolution has been implemented, allowing to describe not only the quasi-steady evolutions but also the fast transients. In a last step, numerical simulations are carried out in order to validate the new corrosion product transport modelling and to illustrate the capabilities of this modelling. Notably, the numerical results obtained indicate that the code allows to restore the on-site observations underlining the influence of material surface properties on reactor contamination. (author)

  16. A Universal Quantum Circuit Scheme For Finding Complex Eigenvalues

    OpenAIRE

    Daskin, Anmer; Grama, Ananth; Kais, Sabre

    2013-01-01

    We present a general quantum circuit design for finding eigenvalues of non-unitary matrices on quantum computers using the iterative phase estimation algorithm. In particular, we show how the method can be used for the simulation of resonance states for quantum systems.

  17. Wiring Together Synthetic Bacterial Consortia to Create a Biological Integrated Circuit.

    Science.gov (United States)

    Perry, Nicolas; Nelson, Edward M; Timp, Gregory

    2016-12-16

    The promise of adapting biology to information processing will not be realized until engineered gene circuits, operating in different cell populations, can be wired together to express a predictable function. Here, elementary biological integrated circuits (BICs), consisting of two sets of transmitter and receiver gene circuit modules with embedded memory placed in separate cell populations, were meticulously assembled using live cell lithography and wired together by the mass transport of quorum-sensing (QS) signal molecules to form two isolated communication links (comlinks). The comlink dynamics were tested by broadcasting "clock" pulses of inducers into the networks and measuring the responses of functionally linked fluorescent reporters, and then modeled through simulations that realistically captured the protein production and molecular transport. These results show that the comlinks were isolated and each mimicked aspects of the synchronous, sequential networks used in digital computing. The observations about the flow conditions, derived from numerical simulations, and the biofilm architectures that foster or silence cell-to-cell communications have implications for everything from decontamination of drinking water to bacterial virulence.

  18. Fast 4-2 Compressor of Booth Multiplier Circuits for High-Speed RISC Processor

    Science.gov (United States)

    Yuan, S. C.

    2008-11-01

    We use different XOR circuits to optimize the XOR structure 4-2 compressor, and design the transmission gates(TG) 4-2 compressor use single to dual rail circuit configurations. The maximum propagation delay, the power consumption and the layout area of the designed 4-2 compressors are simulated with 0.35μm and 0.25μm CMOS process parameters and compared with results of the synthesized 4-2 circuits, and show that the designed 4-2 compressors are faster and area smaller than the synthesized one.

  19. 30 CFR 57.6605 - Isolation of blasting circuits.

    Science.gov (United States)

    2010-07-01

    ... NONMETAL MINE SAFETY AND HEALTH SAFETY AND HEALTH STANDARDS-UNDERGROUND METAL AND NONMETAL MINES Explosives Extraneous Electricity-Surface and Underground § 57.6605 Isolation of blasting circuits. Lead wires and blasting lines shall be isolated and insulated from power conductors, pipelines, and railroad tracks, and...

  20. Fermion-fermion scattering in quantum field theory with superconducting circuits.

    Science.gov (United States)

    García-Álvarez, L; Casanova, J; Mezzacapo, A; Egusquiza, I L; Lamata, L; Romero, G; Solano, E

    2015-02-20

    We propose an analog-digital quantum simulation of fermion-fermion scattering mediated by a continuum of bosonic modes within a circuit quantum electrodynamics scenario. This quantum technology naturally provides strong coupling of superconducting qubits with a continuum of electromagnetic modes in an open transmission line. In this way, we propose qubits to efficiently simulate fermionic modes via digital techniques, while we consider the continuum complexity of an open transmission line to simulate the continuum complexity of bosonic modes in quantum field theories. Therefore, we believe that the complexity-simulating-complexity concept should become a leading paradigm in any effort towards scalable quantum simulations.

  1. Parts & Pools: A Framework for Modular Design of Synthetic Gene Circuits

    Energy Technology Data Exchange (ETDEWEB)

    Marchisio, Mario Andrea, E-mail: marchisio@hit.edu.cn [School of Life Science and Technology, Harbin Institute of Technology, Harbin (China)

    2014-10-06

    Published in 2008, Parts & Pools represents one of the first attempts to conceptualize the modular design of bacterial synthetic gene circuits with Standard Biological Parts (DNA segments) and Pools of molecules referred to as common signal carriers (e.g., RNA polymerases and ribosomes). The original framework for modeling bacterial components and designing prokaryotic circuits evolved over the last years and brought, first, to the development of an algorithm for the automatic design of Boolean gene circuits. This is a remarkable achievement since gene digital circuits have a broad range of applications that goes from biosensors for health and environment care to computational devices. More recently, Parts & Pools was enabled to give a proper formal description of eukaryotic biological circuit components. This was possible by employing a rule-based modeling approach, a technique that permits a faithful calculation of all the species and reactions involved in complex systems such as eukaryotic cells and compartments. In this way, Parts & Pools is currently suitable for the visual and modular design of synthetic gene circuits in yeast and mammalian cells too.

  2. Parts & Pools: A Framework for Modular Design of Synthetic Gene Circuits

    International Nuclear Information System (INIS)

    Marchisio, Mario Andrea

    2014-01-01

    Published in 2008, Parts & Pools represents one of the first attempts to conceptualize the modular design of bacterial synthetic gene circuits with Standard Biological Parts (DNA segments) and Pools of molecules referred to as common signal carriers (e.g., RNA polymerases and ribosomes). The original framework for modeling bacterial components and designing prokaryotic circuits evolved over the last years and brought, first, to the development of an algorithm for the automatic design of Boolean gene circuits. This is a remarkable achievement since gene digital circuits have a broad range of applications that goes from biosensors for health and environment care to computational devices. More recently, Parts & Pools was enabled to give a proper formal description of eukaryotic biological circuit components. This was possible by employing a rule-based modeling approach, a technique that permits a faithful calculation of all the species and reactions involved in complex systems such as eukaryotic cells and compartments. In this way, Parts & Pools is currently suitable for the visual and modular design of synthetic gene circuits in yeast and mammalian cells too.

  3. General Voltage Feedback Circuit Model in the Two-Dimensional Networked Resistive Sensor Array

    Directory of Open Access Journals (Sweden)

    JianFeng Wu

    2015-01-01

    Full Text Available To analyze the feature of the two-dimensional networked resistive sensor array, we firstly proposed a general model of voltage feedback circuits (VFCs such as the voltage feedback non-scanned-electrode circuit, the voltage feedback non-scanned-sampling-electrode circuit, and the voltage feedback non-scanned-sampling-electrode circuit. By analyzing the general model, we then gave a general mathematical expression of the effective equivalent resistor of the element being tested in VFCs. Finally, we evaluated the features of VFCs with simulation and test experiment. The results show that the expression is applicable to analyze the VFCs’ performance of parameters such as the multiplexers’ switch resistors, the nonscanned elements, and array size.

  4. An Evaluation of Parallel Synchronous and Conservative Asynchronous Logic-Level Simulations

    Directory of Open Access Journals (Sweden)

    Ausif Mahmood

    1996-01-01

    a circuit remain fixed during the entire simulation. We remove this limitation and, by extending the analyses to multi-input, multi-output circuits with an arbitrary number of input events, show that the conservative asynchronous simulation extracts more parallelism and executes faster than synchronous simulation in general. Our conclusions are supported by a comparison of the idealized execution times of synchronous and conservative asynchronous algorithms on ISCAS combinational and sequential benchmark circuits.

  5. A parallel algorithm for switch-level timing simulation on a hypercube multiprocessor

    Science.gov (United States)

    Rao, Hariprasad Nannapaneni

    1989-01-01

    The parallel approach to speeding up simulation is studied, specifically the simulation of digital LSI MOS circuitry on the Intel iPSC/2 hypercube. The simulation algorithm is based on RSIM, an event driven switch-level simulator that incorporates a linear transistor model for simulating digital MOS circuits. Parallel processing techniques based on the concepts of Virtual Time and rollback are utilized so that portions of the circuit may be simulated on separate processors, in parallel for as large an increase in speed as possible. A partitioning algorithm is also developed in order to subdivide the circuit for parallel processing.

  6. Design of remote laser-induced fluorescence system's acquisition circuit

    Science.gov (United States)

    Wang, Guoqing; Lou, Yue; Wang, Ran; Yan, Debao; Li, Xin; Zhao, Xin; Chen, Dong; Zhao, Qi

    2017-10-01

    Laser-induced fluorescence system(LIfS) has been found its significant application in identifying one kind of substance from another by its properties even it's thimbleful, and becomes useful in plenty of fields. Many superior works have reported LIfS' theoretical analysis , designs and uses. However, the usual LIPS is always constructed in labs to detect matter quite closely, for the system using low-power laser as excitation source and charge coupled device (CCD) as detector. Promoting the detectivity of LIfS is of much concern to spread its application. Here, we take a high-energy narrow-pulse laser instead of commonly used continuous wave laser to operate sample, thus we can get strong fluorescent. Besides, photomultiplier (PMT) with high sensitivity is adopted in our system to detect extremely weak fluorescence after a long flight time from the sample to the detector. Another advantage in our system, as the fluorescence collected into spectroscopy, multiple wavelengths of light can be converted to the corresponding electrical signals with the linear array multichannel PMT. Therefore, at the cost of high-powered incentive and high-sensitive detector, a remote LIFS is get. In order to run this system, it is of importance to turn light signal to digital signal which can be processed by computer. The pulse width of fluorescence is deeply associated with excitation laser, at the nanosecond(ns) level, which has a high demand for acquisition circuit. We design an acquisition circuit including, I/V conversion circuit, amplifying circuit and peak-holding circuit. The simulation of circuit shows that peak-holding circuit can be one effective approach to reducing difficulty of acquisition circuit.

  7. Device reliability challenges for modern semiconductor circuit design – a review

    Directory of Open Access Journals (Sweden)

    C. Schlünder

    2009-05-01

    Full Text Available Product development based on highly integrated semiconductor circuits faces various challenges. To ensure the function of circuits the electrical parameters of every device must be in a specific window. This window is restricted by competing mechanisms like process variations and device degradation (Fig. 1. Degradation mechanisms like Negative Bias Temperature Instability (NBTI or Hot Carrier Injection (HCI lead to parameter drifts during operation adding on top of the process variations.

    The safety margin between real lifetime of MOSFETs and product lifetime requirements decreases at advanced technologies. The assignment of tasks to ensure the product lifetime has to be changed for the future. Up to now technology development has the main responsibility to adjust the technology processes to achieve the required lifetime. In future, reliability can no longer be the task of technology development only. Device degradation becomes a collective challenge for semiconductor technologist, reliability experts and circuit designers. Reliability issues have to be considered in design as well to achieve reliable and competitive products. For this work, designers require support by smart software tools with built-in reliability know how. Design for reliability will be one of the key requirements for modern product designs.

    An overview will be given of the physical device damage mechanisms, the operation conditions within circuits leading to stress and the impact of the corresponding device parameter degradation on the function of the circuit. Based on this understanding various approaches for Design for Reliability (DfR will be described. The function of aging simulators will be explained and the flow of circuit-simulation will be described. Furthermore, the difference between full custom and semi custom design and therefore, the different required approaches will be discussed.

  8. Three-phase short circuit calculation method based on pre-computed surface for doubly fed induction generator

    Science.gov (United States)

    Ma, J.; Liu, Q.

    2018-02-01

    This paper presents an improved short circuit calculation method, based on pre-computed surface to determine the short circuit current of a distribution system with multiple doubly fed induction generators (DFIGs). The short circuit current, injected into power grid by DFIG, is determined by low voltage ride through (LVRT) control and protection under grid fault. However, the existing methods are difficult to calculate the short circuit current of DFIG in engineering practice due to its complexity. A short circuit calculation method, based on pre-computed surface, was proposed by developing the surface of short circuit current changing with the calculating impedance and the open circuit voltage. And the short circuit currents were derived by taking into account the rotor excitation and crowbar activation time. Finally, the pre-computed surfaces of short circuit current at different time were established, and the procedure of DFIG short circuit calculation considering its LVRT was designed. The correctness of proposed method was verified by simulation.

  9. Theory and Circuit Model for Lossy Coaxial Transmission Line

    Energy Technology Data Exchange (ETDEWEB)

    Genoni, T. C.; Anderson, C. N.; Clark, R. E.; Gansz-Torres, J.; Rose, D. V.; Welch, Dale Robert

    2017-04-01

    The theory of signal propagation in lossy coaxial transmission lines is revisited and new approximate analytic formulas for the line impedance and attenuation are derived. The accuracy of these formulas from DC to 100 GHz is demonstrated by comparison to numerical solutions of the exact field equations. Based on this analysis, a new circuit model is described which accurately reproduces the line response over the entire frequency range. Circuit model calculations are in excellent agreement with the numerical and analytic results, and with finite-difference-time-domain simulations which resolve the skindepths of the conducting walls.

  10. Chemical sensors fabricated by a photonic integrated circuit foundry

    Science.gov (United States)

    Stievater, Todd H.; Koo, Kee; Tyndall, Nathan F.; Holmstrom, Scott A.; Kozak, Dmitry A.; Goetz, Peter G.; McGill, R. Andrew; Pruessner, Marcel W.

    2018-02-01

    We describe the detection of trace concentrations of chemical agents using waveguide-enhanced Raman spectroscopy in a photonic integrated circuit fabricated by AIM Photonics. The photonic integrated circuit is based on a five-centimeter long silicon nitride waveguide with a trench etched in the top cladding to allow access to the evanescent field of the propagating mode by analyte molecules. This waveguide transducer is coated with a sorbent polymer to enhance detection sensitivity and placed between low-loss edge couplers. The photonic integrated circuit is laid-out using the AIM Photonics Process Design Kit and fabricated on a Multi-Project Wafer. We detect chemical warfare agent simulants at sub parts-per-million levels in times of less than a minute. We also discuss anticipated improvements in the level of integration for photonic chemical sensors, as well as existing challenges.

  11. Designing a Distributed Space Systems Simulation in Accordance with the Simulation Interoperability Standards Organization (SISO)

    Science.gov (United States)

    Cowen, Benjamin

    2011-01-01

    Simulations are essential for engineering design. These virtual realities provide characteristic data to scientists and engineers in order to understand the details and complications of the desired mission. A standard development simulation package known as Trick is used in developing a source code to model a component (federate in HLA terms). The runtime executive is integrated into an HLA based distributed simulation. TrickHLA is used to extend a Trick simulation for a federation execution, develop a source code for communication between federates, as well as foster data input and output. The project incorporates international cooperation along with team collaboration. Interactions among federates occur throughout the simulation, thereby relying on simulation interoperability. Communication through the semester went on between participants to figure out how to create this data exchange. The NASA intern team is designing a Lunar Rover federate and a Lunar Shuttle federate. The Lunar Rover federate supports transportation across the lunar surface and is essential for fostering interactions with other federates on the lunar surface (Lunar Shuttle, Lunar Base Supply Depot and Mobile ISRU Plant) as well as transporting materials to the desired locations. The Lunar Shuttle federate transports materials to and from lunar orbit. Materials that it takes to the supply depot include fuel and cargo necessary to continue moon-base operations. This project analyzes modeling and simulation technologies as well as simulation interoperability. Each team from participating universities will work on and engineer their own federate(s) to participate in the SISO Spring 2011 Workshop SIW Smackdown in Boston, Massachusetts. This paper will focus on the Lunar Rover federate.

  12. Integrated electric circuit CAD system in Minolta Camera Co. Ltd

    Energy Technology Data Exchange (ETDEWEB)

    Nakagami, Tsuyoshi; Hirata, Sumiaki; Matsumura, Fumihiko

    1988-08-26

    Development background, fundamental concept, details and future plan of the integrated electric circuit CAD system for OA equipment are presented. The central integrated database is basically intended to store experiences or know-hows, to cover the wide range of data required for designs, and to provide a friendly interface. This easy-to-use integrated database covers the drawing data, parts information, design standards, know-hows and system data. The system contains the circuit design function to support drawing circuit diagrams, the wiring design function to support the wiring and arrangement of printed circuit boards and various parts integratedly, and the function to verify designs, to make full use of parts or technical information, to maintain the system security. In the future, as the system will be wholly in operation, the design period reduction, quality improvement and cost saving will be attained by this integrated design system. (19 figs, 2 tabs)

  13. 30 CFR 75.800-2 - Approved circuit schemes.

    Science.gov (United States)

    2010-07-01

    ... undervoltage protection if the relay coils are designed to trip the circuit breaker when line voltage decreases to 40 percent to 60 percent of the nominal line voltage; (b) Ground trip relays on resistance... AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Underground High-Voltage Distribution...

  14. A Novel Programmable CMOS Fuzzifiers Using Voltage-to-Current Converter Circuit

    Directory of Open Access Journals (Sweden)

    K. P. Abdulla

    2012-01-01

    Full Text Available This paper presents a new voltage-input, current-output programmable membership function generator circuit (MFC using CMOS technology. It employs a voltage-to-current converter to provide the required current bias for the membership function circuit. The proposed MFC has several advantageous features. This MFC can be reconfigured to perform triangular, trapezoidal, S-shape, Z-Shape, and Gaussian membership forms. This membership function can be programmed in terms of its width, slope, and its center locations in its universe of discourses. The easily adjustable characteristics of the proposed circuit and its accuracy make it suitable for embedded system and industrial control applications. The proposed MFC is designed using the spice software, and simulation results are obtained.

  15. X-Band GaN Power Amplifier MMIC with a Third Harmonic-Tuned Circuit

    Directory of Open Access Journals (Sweden)

    Kyung-Tae Bae

    2017-11-01

    Full Text Available This paper presents an X-band GaN HEMT power amplifier with a third harmonic-tuned circuit for a higher power density per area and a higher power-added efficiency (PAE using a 0.25 μm GaN HEMT process of WIN semiconductors, Inc. The optimum load impedances at the fundamental and third harmonic frequencies are extracted from load-pull simulations at the transistor’s extrinsic plane, including the drain-source capacitance and the series drain inductance. The third harmonic-tuned circuit is effectively integrated with the output matching circuit at the fundamental frequency, without complicating the whole output matching circuit. The input matching circuit uses a lossy matching scheme, which allows a good return loss and a simple LC low-pass circuit configuration. The fabricated power amplifier monolithic microwave integrated circuit (MMIC occupies an area of 13.26 mm2, and shows a linear gain of 20 dB or more, a saturated output power of 43.2~44.7 dBm, and a PAE of 35~37% at 8.5 to 10.5 GHz.

  16. Conductance and activation energy for electron transport in series and parallel intramolecular circuits.

    Science.gov (United States)

    Hsu, Liang-Yan; Wu, Ning; Rabitz, Herschel

    2016-11-30

    We investigate electron transport through series and parallel intramolecular circuits in the framework of the multi-level Redfield theory. Based on the assumption of weak monomer-bath couplings, the simulations depict the length and temperature dependence in six types of intramolecular circuits. In the tunneling regime, we find that the intramolecular circuit rule is only valid in the weak monomer coupling limit. In the thermally activated hopping regime, for circuits based on two different molecular units M a and M b with distinct activation energies E act,a > E act,b , the activation energies of M a and M b in series are nearly the same as E act,a while those in parallel are nearly the same as E act,b . This study gives a comprehensive description of electron transport through intramolecular circuits from tunneling to thermally activated hopping. We hope that this work can motivate additional studies to design intramolecular circuits based on different types of building blocks, and to explore the corresponding circuit laws and the length and temperature dependence of conductance.

  17. Three hydrogenated amorphous silicon photodiodes stacked for an above integrated circuit colour sensor

    Energy Technology Data Exchange (ETDEWEB)

    Gidon, Pierre; Giffard, Benoit; Moussy, Norbert; Parrein, Pascale; Poupinet, Ludovic [CEA-LETI, MINATEC, CEA-Grenoble, 17 rue des Martyrs, 38054 Grenoble Cedex 9 (France)

    2010-03-15

    We present theoretical simulation and experimental results of a new colour pixel structure. This pixel catches the light in three stacked amorphous silicon photodiodes encompassed between transparent electrodes. The optical structure has been simulated for signal optimisation. The thickness of each stacked layer is chosen in order to absorb the maximum of light and the three signals allow to linearly calculate the CIE colour coordinates 1 with minimum error and noise. The whole process is compatible with an above integrated circuit (IC) approach. Each photodiode is an n-i-p structure. For optical reason, the upper diode must be controlled down to 25 nm thickness. The first test pixel structure allows a good recovering of colour coordinates. The measured absorption spectrum of each photodiode is in good agreement with our simulations. This specific stack with three photodiodes per pixel totalises two times more signal than an above IC pixel under a standard Bayer pattern 2,3. In each square of this GretagMacbeth chart is the reference colour on the right and the experimentally measured colour on the left with three amorphous silicon photodiodes per pixel. (Abstract Copyright [2010], Wiley Periodicals, Inc.)

  18. An analytical approach to bistable biological circuit discrimination using real algebraic geometry.

    Science.gov (United States)

    Siegal-Gaskins, Dan; Franco, Elisa; Zhou, Tiffany; Murray, Richard M

    2015-07-06

    Biomolecular circuits with two distinct and stable steady states have been identified as essential components in a wide range of biological networks, with a variety of mechanisms and topologies giving rise to their important bistable property. Understanding the differences between circuit implementations is an important question, particularly for the synthetic biologist faced with determining which bistable circuit design out of many is best for their specific application. In this work we explore the applicability of Sturm's theorem--a tool from nineteenth-century real algebraic geometry--to comparing 'functionally equivalent' bistable circuits without the need for numerical simulation. We first consider two genetic toggle variants and two different positive feedback circuits, and show how specific topological properties present in each type of circuit can serve to increase the size of the regions of parameter space in which they function as switches. We then demonstrate that a single competitive monomeric activator added to a purely monomeric (and otherwise monostable) mutual repressor circuit is sufficient for bistability. Finally, we compare our approach with the Routh-Hurwitz method and derive consistent, yet more powerful, parametric conditions. The predictive power and ease of use of Sturm's theorem demonstrated in this work suggest that algebraic geometric techniques may be underused in biomolecular circuit analysis.

  19. Novel concept of TDI readout circuit for LWIR detector

    Science.gov (United States)

    Kim, Byunghyuck; Yoon, Nanyoung; Lee, Hee Chul; Kim, Choong-Ki

    2000-07-01

    Noise property is the prime consideration in readout circuit design. The output noise caused by the photon noise, which dominates total noise in BLIP detectors, is limited by the integration time that an element looks at a specific point in the scene. Large integration time leads to a low noise performance. Time-delay integration (TDI) is used to effectively increase the integration time and reduce the photon noise. However, it increases the number of dead pixels and requires large integration capacitors and low noise output stage of the readout circuit. In this paper, to solve these problems, we propose a new concept of readout circuit, which performs background suppression, cell-to-cell background current non-uniformity compensation, and dead pixel correction using memory, ADC, DAC, and current copier cell. In simulation results, comparing with the conventional TDI readout circuit, the integration capacitor size can be reduced to 1/5 and trans-impedance gain can be increased by five times. Therefore, the new TDI readout circuit does not require large area and low noise output stage. And the error of skimming current is less than 2%, and the fixed pattern noise induced by cell-to-cell background current variation is reduced to less than 1%.

  20. Circuit analysis for dummies

    CERN Document Server

    Santiago, John

    2013-01-01

    Circuits overloaded from electric circuit analysis? Many universities require that students pursuing a degree in electrical or computer engineering take an Electric Circuit Analysis course to determine who will ""make the cut"" and continue in the degree program. Circuit Analysis For Dummies will help these students to better understand electric circuit analysis by presenting the information in an effective and straightforward manner. Circuit Analysis For Dummies gives you clear-cut information about the topics covered in an electric circuit analysis courses to help