WorldWideScience

Sample records for sinx gate dielectric

  1. Fabrication of SiNx Thin Film of Micro Dielectric Barrier Discharge Reactor for Maskless Nanoscale Etching

    Directory of Open Access Journals (Sweden)

    Qiang Li

    2016-12-01

    Full Text Available The prevention of glow-to-arc transition exhibited by micro dielectric barrier discharge (MDBD, as well as its long lifetime, has generated much excitement across a variety of applications. Silicon nitride (SiNx is often used as a dielectric barrier layer in DBD due to its excellent chemical inertness and high electrical permittivity. However, during fabrication of the MDBD devices with multilayer films for maskless nano etching, the residual stress-induced deformation may bring cracks or wrinkles of the devices after depositing SiNx by plasma enhanced chemical vapor deposition (PECVD. Considering that the residual stress of SiNx can be tailored from compressive stress to tensile stress under different PECVD deposition parameters, in order to minimize the stress-induced deformation and avoid cracks or wrinkles of the MDBD device, we experimentally measured stress in each thin film of a MDBD device, then used numerical simulation to analyze and obtain the minimum deformation of multilayer films when the intrinsic stress of SiNx is −200 MPa compressive stress. The stress of SiNx can be tailored to the desired value by tuning the deposition parameters of the SiNx film, such as the silane (SiH4–ammonia (NH3 flow ratio, radio frequency (RF power, chamber pressure, and deposition temperature. Finally, we used the optimum PECVD process parameters to successfully fabricate a MDBD device with good quality.

  2. High permittivity gate dielectric materials

    CERN Document Server

    2013-01-01

    "The book comprehensively covers all the current and the emerging areas of the physics and the technology of high permittivity gate dielectric materials, including, topics such as MOSFET basics and characteristics, hafnium-based gate dielectric materials, Hf-based gate dielectric processing, metal gate electrodes, flat-band and threshold voltage tuning, channel mobility, high-k gate stack degradation and reliability, lanthanide-based high-k gate stack materials, ternary hafnia and lanthania based high-k gate stack films, crystalline high-k oxides, high mobility substrates, and parameter extraction. Each chapter begins with the basics necessary for understanding the topic, followed by a comprehensive review of the literature, and ultimately graduating to the current status of the technology and our scientific understanding and the future prospects."

  3. Materials Fundamentals of Gate Dielectrics

    CERN Document Server

    Demkov, Alexander A

    2006-01-01

    This book presents materials fundamentals of novel gate dielectrics that are being introduced into semiconductor manufacturing to ensure the continuous scalling of the CMOS devices. This is a very fast evolving field of research so we choose to focus on the basic understanding of the structure, thermodunamics, and electronic properties of these materials that determine their performance in device applications. Most of these materials are transition metal oxides. Ironically, the d-orbitals responsible for the high dielectric constant cause sever integration difficulties thus intrinsically limiting high-k dielectrics. Though new in the electronics industry many of these materials are wel known in the field of ceramics, and we describe this unique connection. The complexity of the structure-property relations in TM oxides makes the use of the state of the art first-principles calculations necessary. Several chapters give a detailed description of the modern theory of polarization, and heterojunction band discont...

  4. Nano-CMOS gate dielectric engineering

    CERN Document Server

    Wong, Hei

    2011-01-01

    According to Moore's Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the gate dielectric thickness will be shrunk to less than half-nanometer oxide equivalent thickness (EOT) to maintain proper operation of the transistors, leaving high-k materials as the only viable solution for such small-scale EOT. This comprehensive, up-to-date text covering the physics, materials, devic

  5. Organic Field Effect Transistors with Dipole-Polarized Polymer Gate Dielectrics for Control of Threshold Voltage

    OpenAIRE

    Sakai, Heisuke; Takahashi, Yoshikazu; Murata, Hideyuki

    2007-01-01

    The authors demonstrate organic field effect transistors (OFETs) with a dipole-polarized polyurea for the gate dielectrics. In the dielectrics, the internal electric field induces the mobile charge carrier in the semiconductor layer to the semiconductor-dielectric interface. OFETs with dipole-polarized gate dielectrics exhibit lower threshold voltage. With nonpolarized gate dielectrics, the threshold voltage was -11.4 V, whereas that decreased to -5.3 V with polarized gate dielectrics. In a...

  6. Nanoscale gadolinium oxide capping layers on compositionally variant gate dielectrics

    KAUST Repository

    Alshareef, Husam N.

    2010-11-19

    Metal gate work function enhancement using nanoscale (1.0 nm) Gd2O3 interfacial layers has been evaluated as a function of silicon oxide content in the HfxSiyOz gate dielectric and process thermal budget. It is found that the effective work function tuning by the Gd2O3 capping layer varied by nearly 400 mV as the composition of the underlying dielectric changed from 0% to 100% SiO2, and by nearly 300 mV as the maximum process temperature increased from ambient to 1000 °C. A qualitative model is proposed to explain these results, expanding the existing models for the lanthanide capping layer effect.

  7. A solid dielectric gated graphene nanosensor in electrolyte solutions.

    Science.gov (United States)

    Zhu, Yibo; Wang, Cheng; Petrone, Nicholas; Yu, Jaeeun; Nuckolls, Colin; Hone, James; Lin, Qiao

    2015-03-23

    This letter presents a graphene field effect transistor (GFET) nanosensor that, with a solid gate provided by a high- κ dielectric, allows analyte detection in liquid media at low gate voltages. The gate is embedded within the sensor and thus is isolated from a sample solution, offering a high level of integration and miniaturization and eliminating errors caused by the liquid disturbance, desirable for both in vitro and in vivo applications. We demonstrate that the GFET nanosensor can be used to measure pH changes in a range of 5.3-9.3. Based on the experimental observations and quantitative analysis, the charging of an electrical double layer capacitor is found to be the major mechanism of pH sensing.

  8. Fullerene thin-film transistors fabricated on polymeric gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Puigdollers, J. [Micro and Nano Technology Group (MNT), Dept. Enginyeria Electronica, Universitat Politecnica Catalunya, C/ Jordi Girona 1-3, Modul C4, 08034-Barcelona (Spain)], E-mail: jpuigd@eel.upc.edu; Voz, C. [Micro and Nano Technology Group (MNT), Dept. Enginyeria Electronica, Universitat Politecnica Catalunya, C/ Jordi Girona 1-3, Modul C4, 08034-Barcelona (Spain); Cheylan, S. [ICFO - Mediterranean Technology Park, Avda del Canal Olimpic s/n, 08860-Castelldefels (Spain); Orpella, A.; Vetter, M.; Alcubilla, R. [Micro and Nano Technology Group (MNT), Dept. Enginyeria Electronica, Universitat Politecnica Catalunya, C/ Jordi Girona 1-3, Modul C4, 08034-Barcelona (Spain)

    2007-07-16

    Thin-film transistors with fullerene as n-type organic semiconductor have been fabricated. A polymeric gate dielectric, polymethyl methacrylate, has been used as an alternative to usual inorganic dielectrics. No significant differences in the microstructure of fullerene thin-films grown on polymethyl methacrylate were observed. Devices with either gold or aluminium top electrodes have been fabricated. Although the lower work-function of aluminium compared to gold should favour electron injection, similar field-effect mobilities in the range of 10{sup -2} cm{sup 2} V{sup -1} s{sup -1} were achieved in both cases. Actually, the output characteristics indicate that organic thin-film transistors behave more linearly with gold than with aluminium electrodes. These results confirm that not only energy barriers determine carrier injection at metal/organic interfaces, but also chemical interactions.

  9. Fullerene thin-film transistors fabricated on polymeric gate dielectric

    International Nuclear Information System (INIS)

    Puigdollers, J.; Voz, C.; Cheylan, S.; Orpella, A.; Vetter, M.; Alcubilla, R.

    2007-01-01

    Thin-film transistors with fullerene as n-type organic semiconductor have been fabricated. A polymeric gate dielectric, polymethyl methacrylate, has been used as an alternative to usual inorganic dielectrics. No significant differences in the microstructure of fullerene thin-films grown on polymethyl methacrylate were observed. Devices with either gold or aluminium top electrodes have been fabricated. Although the lower work-function of aluminium compared to gold should favour electron injection, similar field-effect mobilities in the range of 10 -2 cm 2 V -1 s -1 were achieved in both cases. Actually, the output characteristics indicate that organic thin-film transistors behave more linearly with gold than with aluminium electrodes. These results confirm that not only energy barriers determine carrier injection at metal/organic interfaces, but also chemical interactions

  10. HfO2/Pr2O3 gate dielectric stacks

    Science.gov (United States)

    Sidorov, F.; Molchanova, A.; Rogozhin, A.

    2016-12-01

    Electrical properties of MOS structures based on molecular beam epitaxy formed HfO2/Pr2O3 gate dielectric stacks have been studied by CV, GV and IV characteristics. Electrical properties of the structures with HfO2/Pr2O3 and PEALD HfO2 dielectric layers were compared. Higher gate leakage current and lower interface trap level density in the structure with HfO2/Pr2O3 dielectric layer was observed.

  11. Direct deposition of aluminum oxide gate dielectric on graphene channel using nitrogen plasma treatment

    International Nuclear Information System (INIS)

    Lim, Taekyung; Kim, Dongchool; Ju, Sanghyun

    2013-01-01

    Deposition of high-quality dielectric on a graphene channel is an essential technology to overcome structural constraints for the development of nano-electronic devices. In this study, we investigated a method for directly depositing aluminum oxide (Al 2 O 3 ) on a graphene channel through nitrogen plasma treatment. The deposited Al 2 O 3 thin film on graphene demonstrated excellent dielectric properties with negligible charge trapping and de-trapping in the gate insulator. A top-gate-structural graphene transistor was fabricated using Al 2 O 3 as the gate dielectric with nitrogen plasma treatment on graphene channel region, and exhibited p-type transistor characteristics

  12. Simulation of dual-gate SOI MOSFET with different dielectric layers

    Science.gov (United States)

    Yadav, Jyoti; Chaudhary, R.; Mukhiya, R.; Sharma, R.; Khanna, V. K.

    2016-04-01

    The paper presents the process design and simulation of silicon-on-insulator (SOI)-based dual-gate metal oxide field-effect transistor (DG-MOSFET) stacked with different dielectric layers on the top of gate oxide. A detailed 2D process simulation of SOI-MOSFETs and its electrical characterization has been done using SILVACO® TCAD tool. A variation in transconductance was observed with different dielectric layers, AlN-gate MOSFET having the highest tranconductance value as compared to other three dielectric layers (SiO2, Si3N4 and Al2O3).

  13. Hysteresis behaviour of low-voltage organic field-effect transistors employing high dielectric constant polymer gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Se Hyun; Yun, Won Min; Kwon, Oh-Kwan; Hong, Kipyo; Yang, Chanwoo; Park, Chan Eon [POSTECH Organic Electronics Laboratory, Department of Chemical Engineering, Pohang University of Science and Technology, Pohang 790-784 (Korea, Republic of); Choi, Woon-Seop, E-mail: cep@postech.ac.k, E-mail: wschoi@hoseo.ed [School of Display Engineering, Hoseo University, Asan City, Chungnam 336-795 (Korea, Republic of)

    2010-11-24

    Here, we report on the fabrication of low-voltage-operating pentacene-based organic field-effect transistors (OFETs) that utilize crosslinked cyanoethylated poly(vinyl alcohol) (CR-V) gate dielectrics. The crosslinked CR-V-based OFET could be operated successfully at low voltages (below 4 V), but abnormal behaviour during device operation, such as uncertainty in the field-effect mobility ({mu}) and hysteresis, was induced by the slow polarization of moieties embedded in the gate dielectric (e.g. polar functionalities, ionic impurities, water and solvent molecules). In an effort to improve the stability of OFET operation, we measured the dependence of {mu} and hysteresis on dielectric thickness, CR-V crosslinking conditions and sweep rate of the gate bias. The influence of the CR-V surface properties on {mu}, hysteresis, and the structural and morphological features of the pentacene layer grown on the gate dielectric was characterized and compared with the properties of pentacene grown on a polystyrene surface.

  14. Current Tunnelling in MOS Devices with Al2O3/SiO2 Gate Dielectric

    Directory of Open Access Journals (Sweden)

    A. Bouazra

    2008-01-01

    Full Text Available With the continued scaling of the SiO2 thickness below 2 nm in CMOS devices, a large direct-tunnelling current flow between the gate electrode and silicon substrate is greatly impacting device performance. Therefore, higher dielectric constant materials are desirable for reducing the gate leakage while maintaining transistor performance for very thin dielectric layers. Despite its not very high dielectric constant (∼10, Al2O3 has emerged as one of the most promising high-k candidates in terms of its chemical and thermal stability as its high-barrier offset. In this paper, a theoretical study of the physical and electrical properties of Al2O3 gate dielectric is reported including I(V and C(V characteristics. By using a stack of Al2O3/SiO2 with an appropriate equivalent oxide thickness of gate dielectric MOS, the gate leakage exhibits an important decrease. The effect of carrier trap parameters (depth and width at the Al2O3/SiO2 interface is also discussed.

  15. Transport Properties of Polymer Semiconductor Controlled by Ionic Liquid as a Gate Dielectric and a Pressure Medium

    NARCIS (Netherlands)

    Shi, Wu; Ye, Jianting; Checkelsky, Joseph G.; Terakura, Chieko; Iwasa, Yoshihiro

    An effective way of using ionic liquid as a gate dielectric as well as a pressure medium to tune the transport of an exemplary polymer semiconductor, poly(2,5-bis(3-tetradecyl-thiophene-2-yl)thieno[3,2-b]thiophene) (pBTTT-C14) is presented. Working as gate dielectrics, the ionic liquids exhibit the

  16. Enhanced ZnO Thin-Film Transistor Performance Using Bilayer Gate Dielectrics

    KAUST Repository

    Alshammari, Fwzah Hamud

    2016-08-24

    We report ZnO TFTs using Al2O3/Ta2O5 bilayer gate dielectrics grown by atomic layer deposition. The saturation mobility of single layer Ta2O5 dielectric TFT was 0.1 cm2 V-1 s-1, but increased to 13.3 cm2 V-1 s-1 using Al2O3/Ta2O5 bilayer dielectric with significantly lower leakage current and hysteresis. We show that point defects present in ZnO film, particularly VZn, are the main reason for the poor TFT performance with single layer dielectric, although interfacial roughness scattering effects cannot be ruled out. Our approach combines the high dielectric constant of Ta2O5 and the excellent Al2O3/ZnO interface quality, resulting in improved device performance. © 2016 American Chemical Society.

  17. Comparative analysis of full-gate and short-gate dielectric modulated electrically doped Tunnel-FET based biosensors

    Science.gov (United States)

    Sharma, Dheeraj; Singh, Deepika; Pandey, Sunil; Yadav, Shivendra; Kondekar, P. N.

    2017-11-01

    In this work, we have done a comprehensive study between full-gate and short-gate dielectrically modulated (DM) electrically doped tunnel field-effect transistor (SGDM-EDTFET) based biosensors of equivalent dimensions. However, in both the structures, dielectric constant and charge density are considered as a sensing parameter for sensing the charged and non-charged biomolecules in the given solution. In SGDM-EDTFET architecture, the reduction in gate length results a significant improvement in the tunneling current due to occurrence of strong coupling between gate and channel region which ensures higher drain current sensitivity for detection of the biomolecules. Moreover, the sensitivity of dual metal SGDM-EDTFET is compared with the single metal SGDM-EDTFET to analyze the better sensing capability of both the devices for the biosensor application. Further, the effect of sensing parameter i.e., ON-current (ION), and ION/IOFF ratio is analysed for dual metal SGDM-EDTFET in comparison with dual metal SGDM-EDFET. From the comparison, it is found that dual metal SGDM-EDTFET based biosensor attains relatively better sensitivity and can be utilized as a suitable candidate for biosensing applications.

  18. Design of a recessed-gate GaN-based MOSFET using a dual gate dielectric for high-power applications

    International Nuclear Information System (INIS)

    Yoon, Young Jun; Kang, Hee Sung; Seo, Jae Hwa; Kim, Young Jo; Bae, Jin Hyuk; Lee, Jung Hee; Kang, In Man; Cho, Eou Sik; Cho, Seong Jae

    2014-01-01

    We have investigated gallium-nitride (GaN)-based metal-oxide-semiconductor field-effect transistors(MOSFETs) having a recessed-gate structure for high-power applications. Recessed-gate GaN-based MOSFETs have been designed with a dual high-k dielectric structure to overcome low current drivability. Compared to recessed-gate GaN-based MOSFETs having a single gate dielectric with the same oxide thickness, recessed-gate GaN-based MOSFETs having a dual high-k dielectric composed of Al 2 O 3 and HfO 2 have achieved a high drain current (I D ) and transconductance (g m ) due to the high dielectric constant of HfO 2 . Also, because the dual high-k dielectric forms a high electron density in the channel layer with outstanding gate control capability, low channel resistances (R ch ) have obtained. In addition, we have studied the effect of the length between the gate and the drain (L gd ) on the on-resistance (R on ) to minimize the R on that is associated with power consumption and switching performance. Also, the electric field distribution of a device having a dual high-k dielectric has been examined with a field plate structure for high drive voltage. The proposed device was confirmed to be a remarkable candidate for switching devices in high-power applications.

  19. Study of strained-Si p-channel MOSFETs with HfO2 gate dielectric

    Science.gov (United States)

    Pradhan, Diana; Das, Sanghamitra; Dash, Tara Prasanna

    2016-10-01

    In this work, the transconductance of strained-Si p-MOSFETs with high-K dielectric (HfO2) as gate oxide, has been presented through simulation using the TCAD tool Silvaco-ATLAS. The results have been compared with a SiO2/strained-Si p-MOSFET device. Peak transconductance enhancement factors of 2.97 and 2.73 has been obtained for strained-Si p-MOSFETs in comparison to bulk Si channel p-MOSFETs with SiO2 and high-K dielectric respectively. This behavior is in good agreement with the reported experimental results. The transconductance of the strained-Si device at low temperatures has also been simulated. As expected, the mobility and hence the transconductance increases at lower temperatures due to reduced phonon scattering. However, the enhancements with high-K gate dielectric is less as compared to that with SiO2.

  20. A High-Performance Top-Gated Graphene Field-Effect Transistor with Excellent Flexibility Enabled by an iCVD Copolymer Gate Dielectric.

    Science.gov (United States)

    Oh, Joong Gun; Pak, Kwanyong; Kim, Choong Sun; Bong, Jae Hoon; Hwang, Wan Sik; Im, Sung Gap; Cho, Byung Jin

    2018-03-01

    A high-performance top-gated graphene field-effect transistor (FET) with excellent mechanical flexibility is demonstrated by implementing a surface-energy-engineered copolymer gate dielectric via a solvent-free process called initiated chemical vapor deposition. The ultrathin, flexible copolymer dielectric is synthesized from two monomers composed of 1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane and 1-vinylimidazole (VIDZ). The copolymer dielectric enables the graphene device to exhibit excellent dielectric performance and substantially enhanced mechanical flexibility. The p-doping level of the graphene can be tuned by varying the polar VIDZ fraction in the copolymer dielectric, and the Dirac voltage (V Dirac ) of the graphene FET can thus be systematically controlled. In particular, the V Dirac approaches neutrality with higher VIDZ concentrations in the copolymer dielectric, which minimizes the carrier scattering and thereby improves the charge transport of the graphene device. As a result, the graphene FET with 20 nm thick copolymer dielectrics exhibits field-effect hole and electron mobility values of over 7200 and 3800 cm 2 V -1 s -1 , respectively, at room temperature. These electrical characteristics remain unchanged even at the 1 mm bending radius, corresponding to a tensile strain of 1.28%. The formed gate stack with the copolymer gate dielectric is further investigated for high-frequency flexible device applications. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. The origin of excellent gate-bias stress stability in organic field-effect transistors employing fluorinated-polymer gate dielectrics.

    Science.gov (United States)

    Kim, Jiye; Jang, Jaeyoung; Kim, Kyunghun; Kim, Haekyoung; Kim, Se Hyun; Park, Chan Eon

    2014-11-12

    Tuning of the energetic barriers to charge transfer at the semiconductor/dielectric interface in organic field-effect transistors (OFETs) is achieved by varying the dielectric functionality. Based on this, the correlation between the magnitude of the energy barrier and the gate-bias stress stability of the OFETs is demonstrated, and the origin of the excellent device stability of OFETs employing fluorinated dielectrics is revealed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  2. Frequency-Stable Ionic-Type Hybrid Gate Dielectrics for High Mobility Solution-Processed Metal-Oxide Thin-Film Transistors

    Directory of Open Access Journals (Sweden)

    Jae Sang Heo

    2017-06-01

    Full Text Available In this paper, we demonstrate high mobility solution-processed metal-oxide thin-film transistors (TFTs by using a high-frequency-stable ionic-type hybrid gate dielectric (HGD. The HGD gate dielectric, a blend of sol-gel aluminum oxide (AlOx and poly(4-vinylphenol (PVP, exhibited high dielectric constant (ε~8.15 and high-frequency-stable characteristics (1 MHz. Using the ionic-type HGD as a gate dielectric layer, an minimal electron-double-layer (EDL can be formed at the gate dielectric/InOx interface, enhancing the field-effect mobility of the TFTs. Particularly, using the ionic-type HGD gate dielectrics annealed at 350 °C, InOx TFTs having an average field-effect mobility of 16.1 cm2/Vs were achieved (maximum mobility of 24 cm2/Vs. Furthermore, the ionic-type HGD gate dielectrics can be processed at a low temperature of 150 °C, which may enable their applications in low-thermal-budget plastic and elastomeric substrates. In addition, we systematically studied the operational stability of the InOx TFTs using the HGD gate dielectric, and it was observed that the HGD gate dielectric effectively suppressed the negative threshold voltage shift during the negative-illumination-bias stress possibly owing to the recombination of hole carriers injected in the gate dielectric with the negatively charged ionic species in the HGD gate dielectric.

  3. Hetero-gate-dielectric double gate junctionless transistor (HGJLT) with reduced band-to-band tunnelling effects in subthreshold regime

    Science.gov (United States)

    Ghosh, Bahniman; Mondal, Partha; Akram, M. W.; Bal, Punyasloka; Salimath, Akshay Kumar

    2014-06-01

    We propose a hetero-gate-dielectric double gate junctionless transistor (HGJLT), taking high-k gate insulator at source side and low-k gate insulator at drain side, which reduces the effects of band-to-band tunnelling (BTBT) in the sub-threshold region. A junctionless transistor (JLT) is turned off by the depletion of carriers in the highly doped thin channel (device layer) which results in a significant band overlap between the valence band of the channel region and the conduction band of the drain region, due to off-state drain bias, that triggers electrons to tunnel from the valence band of the channel region to the conduction band of the drain region leaving behind holes in the channel. These effects of band-to-band tunnelling increase the sub-threshold leakage current, and the accumulation of holes in the channel forms a parasitic bipolar junction transistor (n-p-n BJT for channel JLT) in the lateral direction by the source (emitter), channel (base) and drain (collector) regions in JLT structure in off-state. The proposed HGJLT reduces the subthreshold leakage current and suppresses the parasitic BJT action in off-state by reducing the band-to-band tunnelling probability.

  4. SiC Power MOSFET with Improved Gate Dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Sbrockey, Nick M. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Tompa, Gary S. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Spencer, Michael G. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Chandrashekhar, Chandra M.V. S. [Structured Materials Industries, Inc., Piscataway, NJ (United States)

    2010-08-23

    In this STTR program, Structured Materials Industries (SMI), and Cornell University are developing novel gate oxide technology, as a critical enabler for silicon carbide (SiC) devices. SiC is a wide bandgap semiconductor material, with many unique properties. SiC devices are ideally suited for high-power, highvoltage, high-frequency, high-temperature and radiation resistant applications. The DOE has expressed interest in developing SiC devices for use in extreme environments, in high energy physics applications and in power generation. The development of transistors based on the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) structure will be critical to these applications.

  5. Influence of Gate Dielectrics, Electrodes and Channel Width on OFET Characteristics

    Science.gov (United States)

    Liyana, V. P.; Stephania, A. M.; Shiju, K.; Predeep, P.

    2015-06-01

    Organic Field Effect Transistors (OFET) possess wide applications in large area electronics owing to their attractive features like easy fabrication process, light weight, flexibility, cost effectiveness etc. But instability, high operational voltages and low carrier mobility act as inhibitors to commercialization of OFETs and various approaches were tried on a regular basis so as to make it viable. In this work, Poly 3-hexylthiophene-2,5diyl (P3HT) based OFETs with bottom-contact top-gate configuration using Poly vinyl alcohol (PVA) and Poly (methyl methacrylate) (PMMA) as gate dielectrics, aluminium and copper as source-drain electrodes are investigated. An effort is made to compare the effect of these dielectric materials and electrodes on the performance of OFET. Also, an attempt has been made to optimize the channel width of the device. These devices are characterised with mobility (μ), threshold voltage (VT), on-off ratio (Ion/Ioff) and their comparative analysis is reported.

  6. Comparative study of CAVET with dielectric and p-GaN gate and Mg ion-implanted current blocking layer

    Science.gov (United States)

    Mandal, Saptarshi; Agarwal, Anchal; Ahmadi, Elaheh; Mahadeva Bhat, K.; Laurent, Matthew A.; Keller, Stacia; Chowdhury, Srabanti

    2017-08-01

    In this work, a study of two different types of current aperture vertical electron transistor (CAVET) with ion-implanted blocking layer are presented. The device fabrication and performance limitation of a CAVET with a dielectric gate is discussed, and the breakdown limiting structure is evaluated using on-wafer test structures. The gate dielectric limited the device breakdown to 50V, while the blocking layer was able to withstand over 400V. To improve the device performance, an alternative CAVET structure with a p-GaN gate instead of dielectric is designed and realized. The pGaN gated CAVET structure increased the breakdown voltage to over 400V. Measurement of test structures on the wafer showed the breakdown was limited by the blocking layer instead of the gate p-n junction.

  7. DNA-nucleobases: Gate Dielectric/Passivation Layer for Flexible GFET-based Sensor Applications (Postprint)

    Science.gov (United States)

    2015-09-24

    deposition of the gate dielectric layer used for making transistor devices. The approach was introducing a thin film of deoxyribonucleic acid (DNA...were investigated as well. This is an important first step to realizing high performance graphene-based transistors that have potential use in bio ...deposition; Sensors; Thin films ; 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT: SAR 18. NUMBER OF PAGES 9 19a. NAME OF

  8. Investigation of High-k Dielectrics and Metal Gate Electrodes for Non-volatile Memory Applications

    Science.gov (United States)

    Jayanti, Srikant

    Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Integration of thin metal FGs and high-k dielectrics into a dual floating gate memory structure to result in both volatile and non-volatile modes of operation has been demonstrated, for plausible application in future unified memory architectures. The electrical characterization was performed on simple MIS/MIM and memory capacitors, fabricated through CMOS compatible processes. Various analytical characterization techniques were done to gain more insight into the material behavior of the layers in the device structure. In the first part of this study, interfacial engineering was investigated by exploring La2O3 as SiO2 scavenging layer. Through the silicate formation, the consumption of low-k SiO2 was controlled and resulted in a significant improvement in dielectric leakage. The performance improvement was also gauged through memory capacitors. In the second part of the study, a novel memory structure consisting of continuous metal FG

  9. Transparent field-effect transistors based on AlN-gate dielectric and IGZO-channel semiconductor

    Energy Technology Data Exchange (ETDEWEB)

    Besleaga, C.; Stan, G.E.; Pintilie, I. [National Institute of Materials Physics, 405A Atomistilor, 077125 Magurele-Ilfov (Romania); Barquinha, P.; Fortunato, E. [CENIMAT/I3N, Departamento de Ciência dos Materiais, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa, and CEMOP-UNINOVA, 2829-516 Caparica (Portugal); Martins, R., E-mail: rm@uninova.pt [CENIMAT/I3N, Departamento de Ciência dos Materiais, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa, and CEMOP-UNINOVA, 2829-516 Caparica (Portugal)

    2016-08-30

    Highlights: • TFTs based on IGZO channel semiconductor and AlN gate dielectric were fabricated. • AlN films – a viable and cheap gate dielectric alternative for transparent TFTs. • Influence of gate dielectric layer thickness on TFTs electrical characteristics. • No degradation of AlN gate dielectric was observed during devices stress testing. - Abstract: The degradation of thin-film transistors (TFTs) caused by the self-heating effect constitutes a problem to be solved for the next generation of displays. Aluminum nitride (AlN) is a viable alternative for gate dielectric of TFTs due to its good thermal conductivity, matching coefficient of thermal expansion to indium–gallium–zinc-oxide, and excellent stability at high temperatures. Here, AlN thin films of different thicknesses were fabricated by a low temperature reactive radio-frequency magnetron sputtering process, using a low cost, metallic Al target. Their electrical properties have been thoroughly assessed. Furthermore, the 200 nm and 500 nm thick AlN layers have been integrated as gate-dielectric in transparent TFTs with indium–gallium–zinc-oxide as channel semiconductor. Our study emphasizes the potential of AlN thin films for transparent electronics, whilst the functionality of the fabricated field-effect transistors is explored and discussed.

  10. Transparent field-effect transistors based on AlN-gate dielectric and IGZO-channel semiconductor

    International Nuclear Information System (INIS)

    Besleaga, C.; Stan, G.E.; Pintilie, I.; Barquinha, P.; Fortunato, E.; Martins, R.

    2016-01-01

    Highlights: • TFTs based on IGZO channel semiconductor and AlN gate dielectric were fabricated. • AlN films – a viable and cheap gate dielectric alternative for transparent TFTs. • Influence of gate dielectric layer thickness on TFTs electrical characteristics. • No degradation of AlN gate dielectric was observed during devices stress testing. - Abstract: The degradation of thin-film transistors (TFTs) caused by the self-heating effect constitutes a problem to be solved for the next generation of displays. Aluminum nitride (AlN) is a viable alternative for gate dielectric of TFTs due to its good thermal conductivity, matching coefficient of thermal expansion to indium–gallium–zinc-oxide, and excellent stability at high temperatures. Here, AlN thin films of different thicknesses were fabricated by a low temperature reactive radio-frequency magnetron sputtering process, using a low cost, metallic Al target. Their electrical properties have been thoroughly assessed. Furthermore, the 200 nm and 500 nm thick AlN layers have been integrated as gate-dielectric in transparent TFTs with indium–gallium–zinc-oxide as channel semiconductor. Our study emphasizes the potential of AlN thin films for transparent electronics, whilst the functionality of the fabricated field-effect transistors is explored and discussed.

  11. Highly stable organic field-effect transistors with engineered gate dielectrics (Conference Presentation)

    Science.gov (United States)

    Kippelen, Bernard; Wang, Cheng-Yin; Fuentes-Hernandez, Canek; Yun, Minseong; Singh, Ankit K.; Dindar, Amir; Choi, Sangmoo; Graham, Samuel

    2016-11-01

    Organic field-effect transistors (OFETs) have the potential to lead to low-cost flexible displays, wearable electronics, and sensors. While recent efforts have focused greatly on improving the maximum charge mobility that can be achieved in such devices, studies about the stability and reliability of such high performance devices are relatively scarce. In this talk, we will discuss the results of recent studies aimed at improving the stability of OFETs under operation and their shelf lifetime. In particular, we will focus on device architectures where the gate dielectric is engineered to act simultaneously as an environmental barrier layer. In the past, our group had demonstrated solution-processed top-gate OFETs using TIPS-pentacene and PTAA blends as a semiconductor layer with a bilayer gate dielectric layer of CYTOP/Al2O3, where the oxide layer was fabricated by atomic layer deposition, ALD. Such devices displayed high operational stability with little degradation after 20,000 on/off scan cycles or continuous operation (24 h), and high environmental stability when kept in air for more than 2 years, with unchanged carrier mobility. Using this stable device geometry, simple circuits and sensors operating in aqueous conditions were demonstrated. However, the Al2O3 layer was found to degrade due to corrosion under prolonged exposure in aqueous solutions. In this talk, we will report on the use of a nanolaminate (NL) composed of Al2O3 and HfO2 by ALD to replace the Al2O3 single layer in the bilayer gate dielectric use in top-gate OFETs. Such OFETs were found to operate under harsh condition such as immersion in water at 95 °C. This work was funded by the Department of Energy (DOE) through the Bay Area Photovoltaics Consortium (BAPVC) under Award Number DE-EE0004946.

  12. Solution processed lanthanum aluminate gate dielectrics for use in metal oxide-based thin film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Esro, M.; Adamopoulos, G., E-mail: g.adamopoulos@lancaster.ac.uk [Engineering Department, Lancaster University, Lancaster LA1 4YR (United Kingdom); Mazzocco, R.; Kolosov, O.; Krier, A. [Physics Department, Lancaster University, Lancaster, LA1 4YB (United Kingdom); Vourlias, G. [Physics Department, Aristotle University of Thessaloniki, 54124 Thessaloniki (Greece); Milne, W. I. [Department of Engineering, University of Cambridge, 9 JJ Thomson Avenue, Cambridge CB3 0FA (United Kingdom); Department of Electrical and Computing Engineering, University of Canterbury, 4800 Christchurch (New Zealand)

    2015-05-18

    We report on ZnO-based thin-film transistors (TFTs) employing lanthanum aluminate gate dielectrics (La{sub x}Al{sub 1−x}O{sub y}) grown by spray pyrolysis in ambient atmosphere at 440 °C. The structural, electronic, optical, morphological, and electrical properties of the La{sub x}Al{sub 1−x}O{sub y} films and devices as a function of the lanthanum to aluminium atomic ratio were investigated using a wide range of characterization techniques such as UV-visible absorption spectroscopy, impedance spectroscopy, spectroscopic ellipsometry, atomic force microscopy, x-ray diffraction, and field-effect measurements. As-deposited LaAlO{sub y} dielectrics exhibit a wide band gap (∼6.18 eV), high dielectric constant (k ∼ 16), low roughness (∼1.9 nm), and very low leakage currents (<3 nA/cm{sup 2}). TFTs employing solution processed LaAlO{sub y} gate dielectrics and ZnO semiconducting channels exhibit excellent electron transport characteristics with hysteresis-free operation, low operation voltages (∼10 V), high on/off current modulation ratio of >10{sup 6}, subthreshold swing of ∼650 mV dec{sup −1}, and electron mobility of ∼12 cm{sup 2} V{sup −1} s{sup −1}.

  13. Solution-Processed Rare-Earth Oxide Thin Films for Alternative Gate Dielectric Application.

    Science.gov (United States)

    Zhuang, Jiaqing; Sun, Qi-Jun; Zhou, Ye; Han, Su-Ting; Zhou, Li; Yan, Yan; Peng, Haiyan; Venkatesh, Shishir; Wu, Wei; Li, Robert K Y; Roy, V A L

    2016-11-16

    Previous investigations on rare-earth oxides (REOs) reveal their high possibility as dielectric films in electronic devices, while complicated physical methods impede their developments and applications. Herein, we report a facile route to fabricate 16 REOs thin insulating films through a general solution process and their applications in low-voltage thin-film transistors as dielectrics. The formation and properties of REOs thin films are analyzed by atomic force microscopy (AFM), X-ray diffraction (XRD), spectroscopic ellipsometry, water contact angle measurement, X-ray photoemission spectroscopy (XPS), and electrical characterizations, respectively. Ultrasmooth, amorphous, and hydrophilic REO films with thickness around 10 nm have been obtained through a combined spin-coating and postannealing method. The compositional analysis results reveal the formation of RE hydrocarbonates on the surface and silicates at the interface of REOs films annealed on Si substrate. The dielectric properties of REO films are investigated by characterizing capacitors with a Si/Ln 2 O 3 /Au (Ln = La, Gd, and Er) structure. The observed low leakage current densities and large areal capacitances indicate these REO films can be employed as alternative gate dielectrics in transistors. Thus, we have successfully fabricated a series of low-voltage organic thin-film transistors based on such sol-gel derived REO films to demonstrate their application in electronics. The optimization of REOs dielectrics in transistors through further surface modification has also been studied. The current study provides a simple solution process approach to fabricate varieties of REOs insulating films, and the results reveal their promising applications as alternative gate dielectrics in thin-film transistors.

  14. The memory effect of a pentacene field-effect transistor with a polarizable gate dielectric

    Science.gov (United States)

    Unni, K. N. N.; de Bettignies, Remi; Dabos-Seignon, Sylvie; Nunzi, Jean-Michel

    2004-06-01

    The nonvolatile transistor memory element is an interesting topic in organic electronics. In this case a memory cell consists of only one device where the stored information is written as a gate insulator polarization by a gate voltage pulse and read by the channel conductance control with channel voltage pulse without destruction of the stored information. Therefore such transistor could be the base of non-volatile non-destructively readable computer memory of extremely high density. Also devices with polarizable gate dielectrics can function more effectively in certain circuits. The effective threshold voltage Vt can be brought very close to zero, for applications where the available gate voltage is limited. Resonant and adaptive circuits can be tuned insitu by polarizing the gates. Poly(vinylidene fluoride), PVDF and its copolymer with trifluoroethylene P(VDF-TrFE) are among the best known and most widely used ferroelectric polymers. In this manuscript, we report new results of an organic FET, fabricated with pentacene as the active material and P(VDF-TrFE) as the gate insulator. Application of a writing voltage of -50 V for short duration results in significant change in the threshold voltage and remarkable increase in the drain current. The memory effect is retained over a period of 20 hours.

  15. Electro-spun PEDOT-PSS nano-ribbon transistor using ion-gel gate dielectric

    Science.gov (United States)

    Ortiz, Deliris N.; Pinto, Nicholas J.

    Poly(3,4-ethylenedioxythiophene) doped with poly(styrenesulfonic acid)-PEDOT:PSS is a p-doped conducting polymer. Using the electrospinning technique, we have fabricated nano-ribbons of this polymer and deposited them on pre-patterned doped Si/SiO2 wafers. Using the doped Si substrate as the back gate electrode and the SiO2 as the dielectric insulator, the ribbon was characterized in a 3-terminal transistor configuration. No change in the channel current was observed for back gate bias under these conditions. We also used an ion-gel gate dielectric by placing a drop of the ion-gel over the ribbon and inserting a Au wire into the drop. By applying a bias to this contact (top gate), we were able to modulate the current through the ribbon at low voltages. The device operated like a field effect/electrochemical transistor, characteristic of a p-doped semiconductor with an on/off ratio of 350, threshold voltage of 0.7V, mobility of 5 cm2/V-s, and a zero gate bias conductivity of 15 S/cm. The large specific capacitance of the ion-gel (as compared to SiO2) and the formation of an electric double layer at the semiconductor/ion-gel interface was responsible for its operation below 2V. The device was also successfully tested at 100Hz making it useful in low frequency applications. NSF-DMR: RUI 1360772; PREM-1523463.

  16. SEMICONDUCTOR DEVICES: Structural and electrical characteristics of lanthanum oxide gate dielectric film on GaAs pHEMT technology

    Science.gov (United States)

    Chia-Song, Wu; Hsing-Chung, Liu

    2009-11-01

    This paper investigates the feasibility of using a lanthanum oxide thin film (La2O3) with a high dielectric constant as a gate dielectric on GaAs pHEMTs to reduce gate leakage current and improve the gate to drain breakdown voltage relative to the conventional GaAs pHEMT. An E/D mode pHEMT in a single chip was realized by selecting the appropriate La2O3 thickness. The thin La2O3 film was characterized: its chemical composition and crystalline structure were determined by X-ray photoelectron spectroscopy and X-ray diffraction, respectively. La2O3 exhibited good thermal stability after post-deposition annealing at 200, 400 and 600 °C because of its high binding-energy (835.6 eV). Experimental results clearly demonstrated that the La2O3 thin film was thermally stable. The DC and RF characteristics of Pt/La2O3/Ti/Au gate and conventional Pt/Ti/Au gate pHEMTs were examined. The measurements indicated that the transistor with the Pt/La2O3/Ti/Au gate had a higher breakdown voltage and lower gate leakage current. Accordingly, the La2O3 thin film is a potential high-k material for use as a gate dielectric to improve electrical performance and the thermal effect in high-power applications.

  17. Study of 6T SRAM cell using High-K gate dielectric based junctionless silicon nanotube FET

    Science.gov (United States)

    Tayal, Shubham; Nandi, Ashutosh

    2017-12-01

    This paper investigates the performance of 6 T SRAM cell using high-K gate dielectric based junctionless silicon nanotube FET (JLSiNTFET). It is observed that the use of high-K gate dielectric enhances the delay performance of the JLSiNTFET based 6 T SRAM cell. Read access time (RAT) and write access time (WAT) improves by ∼18% and ∼20% when TiO2 is used as gate dielectric instead of SiO2. The hold, read, and write SNMs (static noise margin) of the 6 T SRAM cell also improves marginally by the use of high-K gate dielectric. Furthermore, it is also observed that the improvement in hold SNM (HSNM), read SNM (RSNM), and write SNM (WSNM) can be boosted by using higher interfacial layer thickness (TI). However, the improvement in read access times (RAT) & write access time (WAT) degrades at higher TI. Thus, high-K gate dielectrics with high interfacial layer thickness are more suitable for JLSiNT-FET based 6 T SRAM cell.

  18. Temperature Effects on a-IGZO Thin Film Transistors Using HfO2 Gate Dielectric Material

    Directory of Open Access Journals (Sweden)

    Yu-Hsien Lin

    2014-01-01

    Full Text Available This study investigated the temperature effect on amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using hafnium oxide (HfO2 gate dielectric material. HfO2 is an attractive candidate as a high-κ dielectric material for gate oxide because it has great potential to exhibit superior electrical properties with a high drive current. In the process of integrating the gate dielectric and IGZO thin film, postannealing treatment is an essential process for completing the chemical reaction of the IGZO thin film and enhancing the gate oxide quality to adjust the electrical characteristics of the TFTs. However, the hafnium atom diffused the IGZO thin film, causing interface roughness because of the stability of the HfO2 dielectric thin film during high-temperature annealing. In this study, the annealing temperature was optimized at 200°C for a HfO2 gate dielectric TFT exhibiting high mobility, a high ION/IOFF ratio, low IOFF current, and excellent subthreshold swing (SS.

  19. QUALITY ANALYSIS OF THE GATE DIELECTRIC OF THE MOS-STRUCTURES BY CAPACITY-VOLTAGE CHARACTERISTICS

    Directory of Open Access Journals (Sweden)

    V. B. Odzhaev

    2015-01-01

    Full Text Available There were investigated the capacity-voltage characteristics of the MOS transistors, fabricated by the similar process charts, with the identical applied technological materials, however at various time (appropriately further in the text series A and series B. It was shown, that the measurements of the capacityvoltage characteristics of the MOS structures make it possible to perform the quality diagnostics of the gate dielectric. The kind and shape of the measured characteristics are determined by the value of the additional positive charge in the dielectrics and density of the fast surface states on the Si-SiO2 interface, which correlate with the surface concentration of the technological impurities, adsorbed on the surface of the wafers in process of the devices fabrication, which makes it possible to make a conclusion about the quality of the applied materials and compliance of the manufacturing process. 

  20. Electrical Properties of Ultrathin Hf-Ti-O Higher k Gate Dielectric Films and Their Application in ETSOI MOSFET.

    Science.gov (United States)

    Xiong, Yuhua; Chen, Xiaoqiang; Wei, Feng; Du, Jun; Zhao, Hongbin; Tang, Zhaoyun; Tang, Bo; Wang, Wenwu; Yan, Jiang

    2016-12-01

    Ultrathin Hf-Ti-O higher k gate dielectric films (~2.55 nm) have been prepared by atomic layer deposition. Their electrical properties and application in ETSOI (fully depleted extremely thin SOI) PMOSFETs were studied. It is found that at the Ti concentration of Ti/(Ti + Hf) ~9.4%, low equivalent gate oxide thickness (EOT) of ~0.69 nm and acceptable gate leakage current density of 0.61 A/cm 2 @ (V fb  - 1)V could be obtained. The conduction mechanism through the gate dielectric is dominated by the F-N tunneling in the gate voltage range of -0.5 to -2 V. Under the same physical thickness and process flow, lower EOT and higher I on /I off ratio could be obtained while using Hf-Ti-O as gate dielectric compared with HfO 2 . With Hf-Ti-O as gate dielectric, two ETSOI PMOSFETs with gate width/gate length (W/L) of 0.5 μm/25 nm and 3 μm/40 nm show good performances such as high I on , I on /I off ratio in the magnitude of 10 5 , and peak transconductance, as well as suitable threshold voltage (-0.3~-0.2 V). Particularly, ETSOI PMOSFETs show superior short-channel control capacity with DIBL <82 mV/V and subthreshold swing <70 mV/decade.

  1. Gallium nitride-dielectric interface formation for gate dielectrics and passivation layers using remote plasma processing

    Science.gov (United States)

    Bae, Choelhwyi

    In previous studies, device quality Si-SiO2 interfaces and dielectric bulk films (SiO2) were prepared using a two-step process; (i) remote plasma-assisted oxidation (RPAO) to form a superficially interfacial oxide (˜0.6 nm) and (ii) remote plasma enhanced chemical vapor deposition (RPECVD) to deposit the oxide film. The same approach has been applied to the GaN-SiO2 system. After a 300°C remote N2/He plasma treatment of the GaN surface, residual C and Cl were reduced below Auger electron spectroscopy (AES) detection, and the AES peak ratio of O KLL and N KLL was ˜0.06 or ˜0.1 monolayer of oxygen. RPAO of GaN surfaces using O2, N2O, and N 2O in N2 source gases were investigated by on-line AES to determine the oxidation kinetics and chemical composition of the interfacial oxide. Without an RPAO step, subcutaneous oxidation of GaN takes place during RPECVD deposition of SiO2, and on-line AES indicates a ˜0.7 nm subcutaneous oxide. Compared to single step SiO2 deposition, significantly reduced interface state density (Dit) was obtained at the GaN-SiO2 interface by independent control of GaN-Ga2O3 interface formation by thin RPAO oxide (˜1 nm) and SiO2 film deposition by RPECVD. High-low frequency method and conductance method indicate that Dit of GaN Metal-Oxide-Semiconductor (MOS) sample without RPAO is ˜5 times larger than that of the sample with RPAO. For the GaN MOS structures with remote plasma-assisted oxidation and nitridation, determined values of D it were in the range of low-to-mid x 1011 cm-2eV-1. Also, we report on high temperature and photo-assisted capacitance-voltage (C-V) characteristics.

  2. Ternary rare-earth based alternative gate-dielectrics for future integration in MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Schubert, Juergen; Lopes, Joao Marcelo; Durgun Oezben, Eylem; Luptak, Roman; Lenk, Steffi; Zander, Willi; Roeckerath, Martin [IBN 1-IT, Forschungszentrum Juelich, 52425 Juelich (Germany)

    2009-07-01

    The dielectric SiO{sub 2} has been the key to the tremendous improvements in Si-based metal-oxide-semiconductor (MOS) device performance over the past four decades. It has, however, reached its limit in terms of scaling since it exhibits a leakage current density higher than 1 A/cm{sup 2} and does not retain its intrinsic physical properties at thicknesses below 1.5 nm. In order to overcome these problems and keep Moore's law ongoing, the use of higher dielectric constant (k) gate oxides has been suggested. These high-k materials must satisfy numerous requirements such as the high k, low leakage currents, suitable band gap und offsets to silicon. Rare-earth based dielectrics are promising materials which fulfill these needs. We will review the properties of REScO{sub 3} (RE = La, Dy, Gd, Sm, Tb) and LaLuO{sub 3} thin films, grown with pulsed laser deposition, e-gun evaporation or molecular beam deposition, integrated in capacitors and transistors. A k > 20 for the REScO{sub 3} (RE = Dy, Gd) and around 30 for (RE = La, Sm, Tb) and LaLuO{sub 3} are obtained. Transistors prepared on SOI and sSOI show mobility values up to 380 cm{sup 2}/Vs on sSOI, which are comparable to such prepared with HfO{sub 2}.

  3. Low-Temperature Solution-Processed Gate Dielectrics for High-Performance Organic Thin Film Transistors

    Directory of Open Access Journals (Sweden)

    Jaekyun Kim

    2015-10-01

    Full Text Available A low-temperature solution-processed high-k gate dielectric layer for use in a high-performance solution-processed semiconducting polymer organic thin-film transistor (OTFT was demonstrated. Photochemical activation of sol-gel-derived AlOx films under 150 °C permitted the formation of a dense film with low leakage and relatively high dielectric-permittivity characteristics, which are almost comparable to the results yielded by the conventionally used vacuum deposition and high temperature annealing method. Octadecylphosphonic acid (ODPA self-assembled monolayer (SAM treatment of the AlOx was employed in order to realize high-performance (>0.4 cm2/Vs saturation mobility and low-operation-voltage (<5 V diketopyrrolopyrrole (DPP-based OTFTs on an ultra-thin polyimide film (3-μm thick. Thus, low-temperature photochemically-annealed solution-processed AlOx film with SAM layer is an attractive candidate as a dielectric-layer for use in high-performance organic TFTs operated at low voltages.

  4. Investigation of high- k yttrium copper titanate thin films as alternative gate dielectrics

    International Nuclear Information System (INIS)

    Monteduro, Anna Grazia; Ameer, Zoobia; Rizzato, Silvia; Martino, Maurizio; Caricato, Anna Paola; Maruccio, Giuseppe; Tasco, Vittorianna; Lekshmi, Indira Chaitanya; Hazarika, Abhijit; Choudhury, Debraj; Sarma, D D

    2016-01-01

    Nearly amorphous high- k yttrium copper titanate thin films deposited by laser ablation were investigated in both metal–oxide–semiconductor (MOS) and metal–insulator–metal (MIM) junctions in order to assess the potentialities of this material as a gate oxide. The trend of dielectric parameters with film deposition shows a wide tunability for the dielectric constant and AC conductivity, with a remarkably high dielectric constant value of up to 95 for the thick films and conductivity as low as 6  ×  10 −10 S cm −1 for the thin films deposited at high oxygen pressure. The AC conductivity analysis points out a decrease in the conductivity, indicating the formation of a blocking interface layer, probably due to partial oxidation of the thin films during cool-down in an oxygen atmosphere. Topography and surface potential characterizations highlight differences in the thin film microstructure as a function of the deposition conditions; these differences seem to affect their electrical properties. (paper)

  5. Flexible SiInZnO thin film transistor with organic/inorganic hybrid gate dielectric processed at 150 °C

    Science.gov (United States)

    Choi, J. Y.; Kim, S.; Hwang, B.-U.; Lee, N.-E.; Lee, S. Y.

    2016-12-01

    Silicon indium zinc oxide (SIZO) thin film transistors (TFTs) have been fabricated on a flexible polyimide (PI) substrate by using organic/inorganic hybrid gate dielectrics of poly-4vinyl phenol (PVP) and Al2O3. To improve the mechanical stability, Al2O3 has been used as a buffer layer on the flexible substrate. The Al2O3 layer of hybrid gate dielectrics protected the organic gate dielectric and improved mechanical flexibility. The different surface roughness of the gate dielectrics is investigated. The performance of the device with smooth surface roughness was significantly improved. Finally, the electrical characteristics of the TFTs with hybrid gate dielectrics were measured as well as the promising electrical endurance characteristics at the bending radius of 5 mm.

  6. Electron energy dissipation model of gate dielectric progressive breakdown in n- and p-channel field effect transistors

    Science.gov (United States)

    Lombardo, S.; Wu, E. Y.; Stathis, J. H.

    2017-08-01

    We report the data and a model showing that the energy loss experienced by the carriers flowing through breakdown spots is the primary cause of progressive breakdown spot growth. The experiments are performed in gate dielectrics of metal-oxide-semiconductor (MOS) devices subjected to accelerated high electric field constant voltage stress under inversion conditions. The model is analytical and contains few free parameters of clear physical meaning. This is compared to a large set of data on breakdown transients at various oxide thicknesses, stress voltages, and temperatures, both in cases of n-channel and p-channel transistors and polycrystalline Si/oxynitride/Si and metal gate/high k dielectric/Si gate stacks. The basic idea is that the breakdown transient is due to the growth of one or more filaments in the dielectric promoted by electromigration driven by the energy lost by the electrons traveling through the breakdown spots. Both cases of polycrystalline Si/oxynitride/Si and metal gate/high-k dielectric/Si MOS structures are investigated. The best fit values of the model to the data, reported and discussed in the paper, consistently describe a large set of data. The case of simultaneous growth of multiple progressive breakdown spots in the same device is also discussed in detail.

  7. Ta2O5 as gate dielectric material for low-voltage organic thin-film transistors

    NARCIS (Netherlands)

    Bartic, Carmen; Jansen, Henricus V.; Campitelli, Andrew; Borghs, Staf

    In this paper we report the use of Ta2O5 as gate dielectric material for organic thin-film transistors. Ta2O5 has already attracted a lot of attention as insulating material for VLSI applications. We have deposited Ta2O5 thin-films with different thickness by means of electron-beam evaporation.

  8. Hybrid top-gate transistors based on ink-jet printed zinc tin oxide and different organic dielectrics

    Science.gov (United States)

    Sykora, Benedikt; von Seggern, Heinz

    2018-01-01

    We report about hybrid top-gate transistors based on ink-jet printed zinc tin oxide (ZTO) and different spin-coated organic dielectrics. Transistors using the polar dielectric poly(methyl methacrylate) (PMMA) and the nonpolar polystyrene (PS) were evaluated. By applying PMMA, we were able to process field-effect transistors with a saturation mobility of up to 4.3 cm2 V-1 s-1. This is the highest reported mobility of an ink-jet printed ZTO top-gate transistor using a spin-coated PMMA dielectric. This transistor also exhibits a small threshold voltage of 1.7 V and an on/off-current ratio exceeding 105. The usage of PS as another organic dielectric leads to functional devices with inferior performance, meaning a saturation mobility of 0.2 cm2 V-1 s-1 and a threshold voltage of 9.7 V. The more polar character of the PMMA compared to the PS dielectric leading to a better adhesion on the quite hydrophilic ZTO surface could explain the improved device performance of the ZTO top-gate transistor using PMMA.

  9. Chemical vapor deposited monolayer MoS2 top-gate MOSFET with atomic-layer-deposited ZrO2 as gate dielectric

    Science.gov (United States)

    Hu, Yaoqiao; Jiang, Huaxing; Lau, Kei May; Li, Qiang

    2018-04-01

    For the first time, ZrO2 dielectric deposition on pristine monolayer MoS2 by atomic layer deposition (ALD) is demonstrated and ZrO2/MoS2 top-gate MOSFETs have been fabricated. ALD ZrO2 overcoat, like other high-k oxides such as HfO2 and Al2O3, was shown to enhance the MoS2 channel mobility. As a result, an on/off current ratio of over 107, a subthreshold slope of 276 mV dec-1, and a field-effect electron mobility of 12.1 cm2 V-1 s-1 have been achieved. The maximum drain current of the MOSFET with a top-gate length of 4 μm and a source/drain spacing of 9 μm is measured to be 1.4 μA μm-1 at V DS = 5 V. The gate leakage current is below 10-2 A cm-2 under a gate bias of 10 V. A high dielectric breakdown field of 4.9 MV cm-1 is obtained. Gate hysteresis and frequency-dependent capacitance-voltage measurements were also performed to characterize the ZrO2/MoS2 interface quality, which yielded an interface state density of ˜3 × 1012 cm-2 eV-1.

  10. PMMA–SiO{sub 2} hybrid films as gate dielectric for ZnO based thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Morales-Acosta, M.D. [Centro de Investigación y de Estudios Avanzados del IPN, Unidad Querétaro, Apdo. Postal 1-798, Querétaro, Qro. 76001 (Mexico); Quevedo-López, M.A. [Department of Materials Science and Engineering, The University of Texas at Dallas, Richardson, TX 75083 (United States); Ramírez-Bon, R., E-mail: rrbon@qro.cinvestav.mx [Centro de Investigación y de Estudios Avanzados del IPN, Unidad Querétaro, Apdo. Postal 1-798, Querétaro, Qro. 76001 (Mexico)

    2014-08-01

    In this paper we report a low temperature sol–gel deposition process of PMMA–SiO{sub 2} hybrid films, with variable dielectric properties depending on the composition of the precursor solution, for applications to gate dielectric layers in field-effect thin film transistors (FE-TFT). The hybrid layers were processed by a modified sol–gel route using as precursors Tetraethyl orthosilicate (TEOS) and Methyl methacrylate (MMA), and 3-(Trimethoxysilyl)propyl methacrylate (TMSPM) as the coupling agent. Three types of hybrid films were processed with molar ratios of the precursors in the initial solution 1.0: 0.25, 0.50, 0.75: 1.0 for TEOS: TMSPM: MMA, respectively. The hybrid films were deposited by spin coating of the hybrid precursor solutions onto p-type Si (100) substrates and heat-treated at 90 °C for 24 h. The chemical bonding in the hybrid films was analyzed by Fourier Transform Infrared Spectroscopy to confirm their hybrid nature. The refractive index of the hybrid films as a function of the TMSPM coupling agent concentration, were determined from a simultaneous analysis of optical reflectance and spectroscopic ellipsometry experimental data. The PMMA–SiO{sub 2} hybrid films were studied as dielectric films using metal-insulator-metal structures. Capacitance–Voltage (C–V) and current–voltage (I–V) electrical methods were used to extract the dielectric properties of the different hybrid layers. The three types of hybrid films were tested as gate dielectric layers in thin film transistors with structure ZnO/PMMA–SiO{sub 2}/p-Si with a common bottom gate and patterned Al source/drain contacts, with different channel lengths. We analyzed the output electrical responses of the ZnO-based TFTs to determine their performance parameters as a function of channel length and hybrid gate dielectric layer. - Highlights: • PMMA–SiO{sub 2} hybrid films as dielectric material synthesized by sol–gel process at low temperature. • PMMA–SiO{sub 2

  11. A pentacene thin film transistor with good performance using sol-gel derived SiO2 gate dielectric layer

    Science.gov (United States)

    Cavas, M.; Al-Ghamdi, Ahmed A.; Al-Hartomy, O. A.; El-Tantawy, F.; Yakuphanoglu, F.

    2013-02-01

    A low-voltage pentacene field-effect transistor with sol-gel derived SiO2 gate dielectric was fabricated. The mobility of the transistor was achieved as high as 1.526 cm2/V on the bared SiO2/Si substrate by a higher dielectric constant. The interface state density for the transistor was found to vary from 3.8 × 1010 to 7.5 × 1010 eV-1 cm-2 at frequency range of 100 kHz-1 MHz. It is evaluated that the SiO2 derived by low cost sol-gel is quite a promising candidate as a gate dielectric layer for low-voltage pentacene field-effect transistor.

  12. Ultimate Scaling of High-κ Gate Dielectrics: Higher-κ or Interfacial Layer Scavenging?

    Directory of Open Access Journals (Sweden)

    Takashi Ando

    2012-03-01

    Full Text Available Current status and challenges of aggressive equivalent-oxide-thickness (EOT scaling of high-κ gate dielectrics via higher-κ ( > 20 materials and interfacial layer (IL scavenging techniques are reviewed. La-based higher-κ materials show aggressive EOT scaling (0.5–0.8 nm, but with effective workfunction (EWF values suitable only for n-type field-effect-transistor (FET. Further exploration for p-type FET-compatible higher-κ materials is needed. Meanwhile, IL scavenging is a promising approach to extend Hf-based high-κ dielectrics to future nodes. Remote IL scavenging techniques enable EOT scaling below 0.5 nm. Mobility-EOT trends in the literature suggest that short-channel performance improvement is attainable with aggressive EOT scaling via IL scavenging or La-silicate formation. However, extreme IL scaling (e.g., zero-IL is accompanied by loss of EWF control and with severe penalty in reliability. Therefore, highly precise IL thickness control in an ultra-thin IL regime ( < 0.5 nm will be the key technology to satisfy both performance and reliability requirements for future CMOS devices.

  13. Normally-off fully recess-gated GaN metal-insulator-semiconductor field-effect transistor using Al2O3/Si3N4 bilayer as gate dielectrics

    Science.gov (United States)

    Wang, Hongyue; Wang, Jinyan; Liu, Jingqian; Li, Mengjun; He, Yandong; Wang, Maojun; Yu, Min; Wu, Wengang; Zhou, Yang; Dai, Gang

    2017-10-01

    By a self-terminating gate recess etching technique, a normally-off fully recess-gated GaN metal-insulator-semiconductor field-effect transistor (MISFET) was fabricated using Al2O3/Si3N4 bilayer as gate dielectrics. Owing to the high breakdown electric field (˜10 MV/cm) of the gate dielectrics, the device exhibits a large gate swing of 18 V, a high threshold voltage of 1.7 V (at I D = 100 µA/mm), a large maximum drain current of 534 mA/mm, a gate leakage current lower than 20 nA/mm in the whole gate swing, and a high OFF-state breakdown voltage of 1282 V. Furthermore, owing to the high gate overdrive (V GS - V TH), the on-resistance of the device only increases by 5.4% under a constant stress of V GS/V DS = 18 V/1 V.

  14. Al2O3 nanocrystals embedded in amorphous Lu2O3 high-k gate dielectric for floating gate memory application

    International Nuclear Information System (INIS)

    Yuan, C L; Chan, M Y; Lee, P S; Darmawan, P; Setiawan, Y

    2007-01-01

    The integration of nanoparticles has high potential in technological applications and opens up possibilities of the development of new devices. Compared to the conventional floating gate memory, a structure containing nanocrystals embedded in dielectrics shows high potential to produce a memory with high endurance, low operating voltage, fast write-erase speeds and better immunity to soft errors [S. Tiwari, F. Rana, H. Hanafi et al. 1996 Appl.Phys. Lett. 68, 1377]. A significant improvement on data retention [J. J. Lee, X. Wang et al. 2003 Proceedings of the VLSI Technol. Symposium, p33] can be observed when discrete nanodots are used instead of continuous floating gate as charge storage nodes because local defect related leakage can be reduced efficiently. Furthermore, using a high-k dielectric in place of the conventional SiO2 based dielectric, nanodots flash memory is able to achieve significantly improved programming efficiency and data retention [A. Thean and J. -P. Leburton, 2002 IEEE Potentials 21, 35; D. W. Kim, T. Kim and S. K. Banerjee, 2003 IEEE Trans. Electron Devices 50, 1823]. We have recently successfully developed a method to produce nanodots embedded in high-k gate dielectrics [C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Electrochemical and Solid-State Letters 9, F53; C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Europhys. Lett. 74, 177]. In this paper, we fabricated the memory structure of Al 2 O 3 nanocrystals embedded in amorphous Lu 2 O 3 high k dielectric using pulsed laser ablation. The mean size and density of the Al 2 O 3 nanocrystals are estimated to be about 5 nm and 7x1011 cm -2 , respectively. Good electrical performances in terms of large memory window and good data retention were observed. Our preparation method is simple, fast and economical

  15. Al2O3 nanocrystals embedded in amorphous Lu2O3 high-k gate dielectric for floating gate memory application

    Science.gov (United States)

    Yuan, C. L.; Chan, M. Y.; Lee, P. S.; Darmawan, P.; Setiawan, Y.

    2007-04-01

    The integration of nanoparticles has high potential in technological applications and opens up possibilities of the development of new devices. Compared to the conventional floating gate memory, a structure containing nanocrystals embedded in dielectrics shows high potential to produce a memory with high endurance, low operating voltage, fast write-erase speeds and better immunity to soft errors [S. Tiwari, F. Rana, H. Hanafi et al. 1996 Appl.Phys. Lett. 68, 1377]. A significant improvement on data retention [J. J. Lee, X. Wang et al. 2003 Proceedings of the VLSI Technol. Symposium, p33] can be observed when discrete nanodots are used instead of continuous floating gate as charge storage nodes because local defect related leakage can be reduced efficiently. Furthermore, using a high-k dielectric in place of the conventional SiO2 based dielectric, nanodots flash memory is able to achieve significantly improved programming efficiency and data retention [A. Thean and J. -P. Leburton, 2002 IEEE Potentials 21, 35; D. W. Kim, T. Kim and S. K. Banerjee, 2003 IEEE Trans. Electron Devices 50, 1823]. We have recently successfully developed a method to produce nanodots embedded in high-k gate dielectrics [C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Electrochemical and Solid-State Letters 9, F53; C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Europhys. Lett. 74, 177]. In this paper, we fabricated the memory structure of Al2O3 nanocrystals embedded in amorphous Lu2O3 high k dielectric using pulsed laser ablation. The mean size and density of the Al2O3 nanocrystals are estimated to be about 5 nm and 7x1011 cm-2, respectively. Good electrical performances in terms of large memory window and good data retention were observed. Our preparation method is simple, fast and economical.

  16. Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance

    Science.gov (United States)

    Yadav, Dharmendra Singh; Verma, Abhishek; Sharma, Dheeraj; Tirkey, Sukeshni; Raad, Bhagwan Ram

    2017-11-01

    Tunnel-field-effect-transistor (TFET) has emerged as one of the most prominent devices to replace conventional MOSFET due to its ability to provide sub-threshold slope below 60 mV/decade (SS ≤ 60 mV/decade) and low leakage current. Despite this, TFETs suffer from ambipolar behavior, lower ON-state current, and poor RF performance. To address these issues, we have introduced drain and gate work function engineering with hetero gate dielectric for the first time in charge plasma based doping-less TFET (DL TFET). In this, the usage of dual work functionality over the drain region significantly reduces the ambipolar behavior of the device by varying the energy barrier at drain/channel interface. Whereas, the presence of dual work function at the gate terminal increases the ON-state current (ION). The combined effect of dual work function at the gate and drain electrode results in the increment of ON-state current (ION) and decrement of ambipolar conduction (Iambi) respectively. Furthermore, the incorporation of hetero gate dielectric along with dual work functionality at the drain and gate electrode provides an overall improvement in the performance of the device in terms of reduction in ambipolarity, threshold voltage and sub-threshold slope along with improved ON-state current and high frequency figures of merit.

  17. A novel approach for the improvement of electrostatic behaviour of physically doped TFET using plasma formation and shortening of gate electrode with hetero-gate dielectric

    Science.gov (United States)

    Soni, Deepak; Sharma, Dheeraj; Aslam, Mohd.; Yadav, Shivendra

    2018-04-01

    This article presents a new device configuration to enhance current drivability and suppress negative conduction (ambipolar conduction) with improved RF characteristics of physically doped TFET. Here, we used a new approach to get excellent electrical characteristics of hetero-dielectric short gate source electrode TFET (HD-SG SE-TFET) by depositing a metal electrode of 5.93 eV work function over the heavily doped source (P+) region. Deposition of metal electrode induces the plasma (thin layer) of holes under the Si/HfO2 interface due to work function difference of metal and semiconductor. Plasma layer of holes is advantageous to increase abruptness as well as decrease the tunneling barrier at source/channel junction for attaining higher tunneling rate of charge carriers (i.e., electrons), which turns into 86.66 times higher ON-state current compared with the conventional physically doped TFET (C-TFET). Along with metal electrode deposition, gate electrode is under-lapped for inducing asymmetrical concentration of charge carriers in the channel region, which is helpful for widening the tunneling barrier width at the drain/channel interface. Consequently, HD-SG SE-TFET shows suppression of ambipolar behavior with reduction in gate-to-drain capacitance which is beneficial for improvement in RF performance. Furthermore, the effectiveness of hetero-gate dielectric concept has been used for improving the RF performance. Furthermore, reliability of C-TFET and proposed structures has been confirmed in term of linearity.

  18. Medium band gap polymer based solution-processed high-κ composite gate dielectrics for ambipolar OFET

    Science.gov (United States)

    Canımkurbey, Betül; Unay, Hande; Çakırlar, Çiğdem; Büyükköse, Serkan; Çırpan, Ali; Berber, Savas; Altürk Parlak, Elif

    2018-03-01

    The authors present a novel ambipolar organic filed-effect transistors (OFETs) composed of a hybrid dielectric thin film of Ta2O5:PMMA nanocomposite material, and solution processed poly(selenophene, benzotriazole and dialkoxy substituted [1,2-b:4, 5-b‧] dithiophene (P-SBTBDT)-based organic semiconducting material as the active layer of the device. We find that the Ta2O5:PMMA insulator shows n-type conduction character, and its combination with the p-type P-SBTBDT organic semiconductor leads to an ambipolar OFET device. Top-gated OFETs were fabricated on glass substrate consisting of interdigitated ITO electrodes. P-SBTBDT-based material was spin coated on the interdigitated ITO electrodes. Subsequently, a solution processed Ta2O5:PMMA nanocomposite material was spin coated, thereby creating the gate dielectric layer. Finally, as a gate metal, an aluminum layer was deposited by thermal evaporation. The fabricated OFETs exhibited an ambipolar performance with good air-stability, high field-induced current and relatively high electron and hole mobilities although Ta2O5:PMMA nanocomposite films have slightly higher leakage current compared to the pure Ta2O5 films. Dielectric properties of the devices with different ratios of Ta2O5:PMMA were also investigated. The dielectric constant varied between 3.6 and 5.3 at 100 Hz, depending on the Ta2O5:PMMA ratio.

  19. Effect of gate dielectrics on the performance of p-type Cu2O TFTs processed at room temperature

    KAUST Repository

    Al-Jawhari, Hala A.

    2013-12-01

    Single-phase Cu2O films with p-type semiconducting properties were successfully deposited by reactive DC magnetron sputtering at room temperature followed by post annealing process at 200°C. Subsequently, such films were used to fabricate bottom gate p-channel Cu2O thin film transistors (TFTs). The effect of using high-κ SrTiO3 (STO) as a gate dielectric on the Cu2O TFT performance was investigated. The results were then compared to our baseline process which uses a 220 nm aluminum titanium oxide (ATO) dielectric deposited on a glass substrate coated with a 200 nm indium tin oxide (ITO) gate electrode. We found that with a 150 nm thick STO, the Cu2O TFTs exhibited a p-type behavior with a field-effect mobility of 0.54 cm2.V-1.s-1, an on/off ratio of around 44, threshold voltage equaling -0.62 V and a sub threshold swing of 1.64 V/dec. These values were obtained at a low operating voltage of -2V. The advantages of using STO as a gate dielectric relative to ATO are discussed. © (2014) Trans Tech Publications, Switzerland.

  20. Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

    Directory of Open Access Journals (Sweden)

    Yu-Hsien Lin

    2015-01-01

    Full Text Available We investigated amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using different high-k gate dielectric materials such as silicon nitride (Si3N4 and aluminum oxide (Al2O3 at low temperature process (<300°C and compared them with low temperature silicon dioxide (SiO2. The IGZO device with high-k gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, postannealing treatment is an essential process for completing the process. The chemical reaction of the high-k/IGZO interface due to heat formation in high-k/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-k gate dielectric materials and explained the interface effect by charge band diagram.

  1. Low operating voltage n-channel organic field effect transistors using lithium fluoride/PMMA bilayer gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Kumar, S.; Dhar, A., E-mail: adhar@phy.iitkgp.ernet.in

    2015-10-15

    Highlights: • Alternative to chemically crosslinking of PMMA to achieve low leakage in provided. • Effect of LiF in reducing gate leakage through the OFET device is studied. • Effect of gate leakage on transistor performance has been investigated. • Low voltage operable and low temperature processed n-channel OFETs were fabricated. - Abstract: We report low temperature processed, low voltage operable n-channel organic field effect transistors (OFETs) using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C{sub 8}) organic semiconductor and poly(methylmethacrylate) (PMMA)/lithium fluoride (LiF) bilayer gate dielectric. We have studied the role of LiF buffer dielectric in effectively reducing the gate leakage through the device and thus obtaining superior performance in contrast to the single layer PMMA dielectric devices. The bilayer OFET devices had a low threshold voltage (V{sub t}) of the order of 5.3 V. The typical values of saturation electron mobility (μ{sub s}), on/off ratio and inverse sub-threshold slope (S) for the range of devices made were estimated to be 2.8 × 10{sup −3} cm{sup 2}/V s, 385, and 3.8 V/decade respectively. Our work thus provides a potential substitution for much complicated process of chemically crosslinking PMMA to achieve low leakage, high capacitance, and thus low operating voltage OFETs.

  2. High carrier mobility of CoPc wires based field-effect transistors using bi-layer gate dielectric

    Directory of Open Access Journals (Sweden)

    Murali Gedda

    2013-11-01

    Full Text Available Polyvinyl alcohol (PVA and anodized Al2O3 layers were used as bi-layer gate for the fabrication of cobalt phthalocyanine (CoPc wire base field-effect transistors (OFETs. CoPc wires were grown on SiO2 surfaces by organic vapor phase deposition method. These devices exhibit a field-effect carrier mobility (μEF value of 1.11 cm2/Vs. The high carrier mobility for CoPc molecules is attributed to the better capacitive coupling between the channel of CoPc wires and the gate through organic-inorganic dielectric layer. Our measurements also demonstrated the way to determine the thicknesses of the dielectric layers for a better process condition of OFETs.

  3. High carrier mobility of CoPc wires based field-effect transistors using bi-layer gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Gedda, Murali; Obaidulla, Sk. Md. [Department of Physics, Indian Institute of Technology Guwahati, Guwahati-781039 (India); Subbarao, Nimmakayala V. V. [Centre for Nano Technology, Indian Institute of Technology Guwahati, Guwahati-781039 (India); Goswami, Dipak K. [Department of Physics, Indian Institute of Technology Guwahati, Guwahati-781039 (India); Centre for Nano Technology, Indian Institute of Technology Guwahati, Guwahati-781039 (India)

    2013-11-15

    Polyvinyl alcohol (PVA) and anodized Al{sub 2}O{sub 3} layers were used as bi-layer gate for the fabrication of cobalt phthalocyanine (CoPc) wire base field-effect transistors (OFETs). CoPc wires were grown on SiO{sub 2} surfaces by organic vapor phase deposition method. These devices exhibit a field-effect carrier mobility (μ{sub EF}) value of 1.11 cm{sup 2}/Vs. The high carrier mobility for CoPc molecules is attributed to the better capacitive coupling between the channel of CoPc wires and the gate through organic-inorganic dielectric layer. Our measurements also demonstrated the way to determine the thicknesses of the dielectric layers for a better process condition of OFETs.

  4. HfO2 as gate dielectric on Ge: Interfaces and deposition techniques

    International Nuclear Information System (INIS)

    Caymax, M.; Van Elshocht, S.; Houssa, M.; Delabie, A.; Conard, T.; Meuris, M.; Heyns, M.M.; Dimoulas, A.; Spiga, S.; Fanciulli, M.; Seo, J.W.; Goncharova, L.V.

    2006-01-01

    To fabricate MOS gate stacks on Ge, one can choose from a multitude of metal oxides as dielectric material which can be deposited by many chemical or physical vapor deposition techniques. As a few typical examples, we will discuss here the results from atomic layer deposition (ALD), metal organic CVD (MOCVD) and molecular beam deposition (MBD) using HfO 2 /Ge as materials model system. It appears that a completely interface layer free HfO 2 /Ge combination can be made in MBD, but this results in very bad capacitors. The same bad result we find if HfGe y (Hf germanides) are formed like in the case of MOCVD on HF-dipped Ge. A GeO x interfacial layer appears to be indispensable (if no other passivating materials are applied), but the composition of this interfacial layer (as determined by XPS, TOFSIMS and MEIS) is determining for the C/V quality. On the other hand, the presence of Ge in the HfO 2 layer is not the most important factor that can be responsible for poor C/V, although it can still induce bumps in C/V curves, especially in the form of germanates (Hf-O-Ge). We find that most of these interfacial GeO x layers are in fact sub-oxides, and that this could be (part of) the explanation for the high interfacial state densities. In conclusion, we find that the Ge surface preparation is determining for the gate stack quality, but it needs to be adapted to the specific deposition technique

  5. Ambipolar transport in CVD grown MoSe2 monolayer using an ionic liquid gel gate dielectric

    Directory of Open Access Journals (Sweden)

    Deliris N. Ortiz

    2018-03-01

    Full Text Available CVD grown MoSe2 monolayers were electrically characterized at room temperature in a field effect transistor (FET configuration using an ionic liquid (IL as the gate dielectric. During the growth, instead of using MoO3 powder, ammonium heptamolybdate was used for better Mo control of the source and sodium cholate added for lager MoSe2 growth areas. In addition, a high specific capacitance (∼7 μF/cm2 IL was used as the gate dielectric to significantly reduce the operating voltage. The device exhibited ambipolar charge transport at low voltages with enhanced parameters during n- and p-FET operation. IL gating thins the Schottky barrier at the metal/semiconductor interface permitting efficient charge injection into the channel and reduces the effects of contact resistance on device performance. The large specific capacitance of the IL was also responsible for a much higher induced charge density compared to the standard SiO2 dielectric. The device was successfully tested as an inverter with a gain of ∼2. Using a common metal for contacts simplifies fabrication of this ambipolar device, and the possibility of radiative recombination of holes and electrons could further extend its use in low power optoelectronic applications.

  6. Effects of Annealing Time on the Performance of OTFT on Glass with ZrO2 as Gate Dielectric

    Directory of Open Access Journals (Sweden)

    W. M. Tang

    2012-01-01

    Full Text Available Copper phthalocyanine-based organic thin-film transistors (OTFTs with zirconium oxide (ZrO2 as gate dielectric have been fabricated on glass substrates. The gate dielectric is annealed in N2 at different durations (5, 15, 40, and 60 min to investigate the effects of annealing time on the electrical properties of the OTFTs. Experimental results show that the longer the annealing time for the OTFT, the better the performance. Among the devices studied, OTFTs with gate dielectric annealed at 350°C in N2 for 60 min exhibit the best device performance. They have a small threshold voltage of −0.58 V, a low subthreshold slope of 0.8 V/decade, and a low off-state current of 0.73 nA. These characteristics demonstrate that the fabricated device is suitable for low-voltage and low-power operations. When compared with the TFT samples annealed for 5 min, the ones annealed for 60 min have 20% higher mobility and nearly two times smaller the subthreshold slope and off-state current. The extended annealing can effectively reduce the defects in the high-k film and produces a better insulator/organic interface. This results in lower amount of carrier scattering and larger CuPc grains for carrier transport.

  7. Electrical and materials properties of ZrO2 gate dielectrics grown by atomic layer chemical vapor deposition

    Science.gov (United States)

    Perkins, Charles M.; Triplett, Baylor B.; McIntyre, Paul C.; Saraswat, Krishna C.; Haukka, Suvi; Tuominen, Marko

    2001-04-01

    Structural and electrical properties of gate stack structures containing ZrO2 dielectrics were investigated. The ZrO2 films were deposited by atomic layer chemical vapor deposition (ALCVD) after different substrate preparations. The structure, composition, and interfacial characteristics of these gate stacks were examined using cross-sectional transmission electron microscopy and x-ray photoelectron spectroscopy. The ZrO2 films were polycrystalline with either a cubic or tetragonal crystal structure. An amorphous interfacial layer with a moderate dielectric constant formed between the ZrO2 layer and the substrate during ALCVD growth on chemical oxide-terminated silicon. Gate stacks with a measured equivalent oxide thickness (EOT) of 1.3 nm showed leakage values of 10-5 A/cm2 at a bias of -1 V from flatband, which is significantly less than that seen with SiO2 dielectrics of similar EOT. A hysteresis of 8-10 mV was seen for ±2 V sweeps while a midgap interface state density (Dit) of ˜3×1011 states/cm eV was determined from comparisons of measured and ideal capacitance curves.

  8. Design of Higher-k and More Stable Rare Earth Oxides as Gate Dielectrics for Advanced CMOS Devices

    Directory of Open Access Journals (Sweden)

    Yi Zhao

    2012-08-01

    Full Text Available High permittivity (k gate dielectric films are widely studied to substitute SiO2 as gate oxides to suppress the unacceptable gate leakage current when the traditional SiO2 gate oxide becomes ultrathin. For high-k gate oxides, several material properties are dominantly important. The first one, undoubtedly, is permittivity. It has been well studied by many groups in terms of how to obtain a higher permittivity for popular high-k oxides, like HfO2 and La2O3. The second one is crystallization behavior. Although it’s still under the debate whether an amorphous film is definitely better than ploy-crystallized oxide film as a gate oxide upon considering the crystal boundaries induced leakage current, the crystallization behavior should be well understood for a high-k gate oxide because it could also, to some degree, determine the permittivity of the high-k oxide. Finally, some high-k gate oxides, especially rare earth oxides (like La2O3, are not stable in air and very hygroscopic, forming hydroxide. This topic has been well investigated in over the years and significant progresses have been achieved. In this paper, I will intensively review the most recent progresses of the experimental and theoretical studies for preparing higher-k and more stable, in terms of hygroscopic tolerance and crystallization behavior, Hf- and La-based ternary high-k gate oxides.

  9. Performance analysis of asymmetric dielectric modulated dual short gate tunnel field effect transistor

    Science.gov (United States)

    Pon, Adhithan; Carmel, A. Santhia; Bhattacharyya, A.; Ramesh, R.

    2018-01-01

    In this work, a novel asymmetric dielectric modulated dual short gate (ADMDG) TFET is designed and their performance was analysed. The ADMDG TFET using silicon, germanium, and SiGe as channel and source materials were simulated and results are compared with conventional DGTFET. The device simulation has been performed using Sentaurus TCAD simulator. It is found that the proposed structure provides overall improved performance for silicon TFET such as higher on-current (Ion = 4.2 μA), smaller SS = 40mV/decade and maximum Ion/Ioff ratio (8.2 × 1010) compared to conventional DGTFET. The on-current values obtained for SiGe source, Ge source and Ge channel ADMDG TFET are 0.22 mA, 0.69 mA and 0.14 mA respectively compared to silicon ADMDG TFET but compromises other dc parameters such as SS and Ion/Ioff ratio. For CMOS circuits, the p-type silicon TFET of the proposed structure were also simulated and presented. Moreover, the proposed TFET structure is also simulated for different temperatures and its performance were compared and analysed.

  10. Modeling of Dual Gate Material Hetero-dielectric Strained PNPN TFET for Improved ON Current

    Science.gov (United States)

    Kumari, Tripty; Saha, Priyanka; Dash, Dinesh Kumar; Sarkar, Subir Kumar

    2018-01-01

    The tunnel field effect transistor (TFET) is considered to be a promising alternative device for future low-power VLSI circuits due to its steep subthreshold slope, low leakage current and its efficient performance at low supply voltage. However, the main challenging issue associated with realizing TFET for wide scale applications is its low ON current. To overcome this, a dual gate material with the concept of dielectric engineering has been incorporated into conventional TFET structure to tune the tunneling width at source-channel interface allowing significant flow of carriers. In addition to this, N+ pocket is implanted at source-channel junction of the proposed structure and the effect of strain is added for exploring the performance of the model in nanoscale regime. All these added features upgrade the device characteristics leading to higher ON current, low leakage and low threshold voltage. The present work derives the surface potential, electric field expression and drain current by solving 2D Poisson's equation at different boundary conditions. A comparative analysis of proposed model with conventional TFET has been done to establish the superiority of the proposed structure. All analytical results have been compared with the results obtained in SILVACO ATLAS device simulator to establish the accuracy of the derived analytical model.

  11. New Dual-Dielectric Gate All Around (DDGAA) RADFET dosimeter design to improve the radiation sensitivity

    Energy Technology Data Exchange (ETDEWEB)

    Meguellati, M. [LEA, Department of Electronics, University of Batna, Batna 05000 (Algeria); Djeffal, F., E-mail: faycal.djeffal@univ-batna.dz [LEA, Department of Electronics, University of Batna, Batna 05000 (Algeria); LEPCM, University of Batna, Batna 05000 (Algeria)

    2012-08-11

    In this paper, a new radiation sensitive FET (RADFET) dosimeter design (called the Dual-Dielectric Gate All Around DDGAA RADFET dosimeter) to improve the radiation sensitivity performance and its analytical analysis has been proposed, investigated and expected to improve the sensitivity behavior and fabrication process for RADFET dosimeter-based applications. Analytical models have been developed to predict and compare the performance of the proposed design and conventional (bulk) RADFET, where the comparison of device architectures shows that the proposed design exhibits a superior performance with respect to the conventional RADFET in term of fabrication process and sensitivity performances. The proposed design has linear radiation sensitivities of approximately 95.45 {mu}V/Gy for wide irradiation dose range (from Dose=50 Gy to Dose=3000 Gy). Our results showed that the analytical analysis is in close agreement with the 2-D numerical simulation over a wide range of device parameters. As a result, we demonstrate that DDGAA RADFET dosimeter can be a viable option to enhance the performance of CMOS-based dosimeter technology for nuclear industry, space, radiotherapy and environment monitoring applications.

  12. Solvent-Free Processable and Photo-Patternable Hybrid Gate Dielectric for Flexible Top-Gate Organic Field-Effect Transistors.

    Science.gov (United States)

    Kwon, Jun Seon; Park, Han Wool; Kim, Do Hwan; Kwark, Young-Je

    2017-02-15

    We report a novel solvent-free and direct photopatternable poly[(mercaptopropyl)methyl-siloxane] (PMMS) hybrid dielectric for flexible top-gate organic field-effect transistors (OFETs) utilizing a photoactivated thiol-ene reaction under UV irradiation of 254 nm to induce cross-linking, even in air and at low temperatures. In particular, a solvent-free PMMS-f dielectric film, for which an optimal cross-linking density is shown by a well-organized molar ratio between thiol and vinyl in the thiol-ene reaction, exhibited a high dielectric constant (5.4 @ 100 Hz) and a low leakage current (OFETs with a high reliability against the radius of curvature (9.5, 7.0, and 5.5 mm) and repetitive bending cycles at the radius of curvature of 5.5 mm. This will eventually enable the proposed dielectric design to be used in a variety of applications such as flexible displays and soft organic sensors including chemical and tactile capability.

  13. Reduced Subthreshold Characteristics and Flicker Noise of an AlGaAs/InGaAs PHEMT Using Liquid Phase Deposited TiO2 as a Gate Dielectric

    Directory of Open Access Journals (Sweden)

    Kai-Yuen Lam

    2016-10-01

    Full Text Available This study presents the fabrication and improved properties of an AlGaAs/InGaAs metal-oxide-semiconductor pseudomorphic high-electron-mobility transistor (MOS-PHEMT using liquid phase deposited titanium dioxide (LPD-TiO2 as a gate dielectric. Sulfur pretreatment and postoxidation rapid thermal annealing (RTA were consecutively employed before and after the gate dielectric was deposited to fill dangling bonds and therefore release interface trapped charges. Compared with a benchmark PHEMT, the AlGaAs/InGaAs MOS-PHEMT using LPD-TiO2 exhibited larger gate bias operation, higher breakdown voltage, suppressed subthreshold characteristics, and reduced flicker noise. As a result, the device with proposed process and using LPD-TiO2 as a gate dielectric is promising for high-speed applications that demand little noise at low frequencies.

  14. Epitaxial ZnO gate dielectrics deposited by RF sputter for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Science.gov (United States)

    Yoon, Seonno; Lee, Seungmin; Kim, Hyun-Seop; Cha, Ho-Young; Lee, Hi-Deok; Oh, Jungwoo

    2018-01-01

    Radio frequency (RF)-sputtered ZnO gate dielectrics for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) were investigated with varying O2/Ar ratios. The ZnO deposited with a low oxygen content of 4.5% showed a high dielectric constant and low interface trap density due to the compensation of oxygen vacancies during the sputtering process. The good capacitance-voltage characteristics of ZnO-on-AlGaN/GaN capacitors resulted from the high crystallinity of oxide at the interface, as investigated by x-ray diffraction and high-resolution transmission electron microscopy. The MOS-HEMTs demonstrated comparable output electrical characteristics with conventional Ni/Au HEMTs but a lower gate leakage current. At a gate voltage of -20 V, the typical gate leakage current for a MOS-HEMT with a gate length of 6 μm and width of 100 μm was found to be as low as 8.2 × 10-7 mA mm-1, which was three orders lower than that of the Ni/Au Schottky gate HEMT. The reduction of the gate leakage current improved the on/off current ratio by three orders of magnitude. These results indicate that RF-sputtered ZnO with a low O2/Ar ratio is a good gate dielectric for high-performance AlGaN/GaN MOS-HEMTs.

  15. Improvements in gate-dielectric characteristics of nitrided oxides prepared by rapid thermal processing. Kyusoku kanetsu chikka sankamaku ni yoru gate zetsuenmaku tokusei no kojo

    Energy Technology Data Exchange (ETDEWEB)

    Hori, T. (Matsushita Electric Industral Co. Ltd., Osaka (Japan))

    1991-11-10

    This paper indicates that, in improving gate-dielectric characteristics of MOSFET, a nitriding treatment (light nitridation) using the rapid thermal processing (RTP) is superior to a treatment using resistance heating furnace (heavy nitridation) in terms of the controllability of the teatment processes. Although a nitridation treatment alone will not be able to achive simultaneously the suppression of the interface level generation in the gate insulation films, and the reduction of electron capturing, the paper claims that both requirements can be met if nitrided oxide films generated by the nitridation are re-oxidezed by the RTP. It is suggested that when the re-oxidized nitrided oxide films (provided they are re-oxidized after light nitridation) are used for the gate insulation films in place of the conventional SiO{sub 2} films, the various characteristics representing the performance and reliability of micronized MOS devices (subthreshold characteristics, characteristics of insulation break-down with time, etc.) in general can be equivalent or better. 18 refs., 7 figs., 2 tabs.

  16. Comparative study of CNT, silicon nanowire and fullerene embedded multilayer high-k gate dielectric MOS memory devices

    Energy Technology Data Exchange (ETDEWEB)

    Sengupta, Amretashis; Sarkar, Chandan Kumar [Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata-700 032 (India); Requejo, Felix G, E-mail: amretashis@gmail.com [INIFTA, Departmento de Quimica and Departmento de Fisica, Facultad de Ciencias Exactas, Universidad Nacional de La Plata, CC/67-1900, La Plata (Argentina)

    2011-10-12

    Here, we present a comparative theoretical study on stacked (multilayer) gate dielectric MOS memory devices, having a metallic/semiconducting carbon nanotube (CNT), silicon nanowire (Si NW) and fullerene (C60) embedded nitride layer acting as a floating gate. Two types of devices, one with HfO{sub 2}-SiO{sub 2} stack (stack-1) and the other with La{sub 2}O{sub 3}-SiO{sub 2} stack (stack-2) as the tunnel oxide were compared. We evaluated the effective barrier height, the dielectric constant and the effective electron mobility in the composite gate dielectric with the Maxwell-Garnett effective medium theory. Thereafter applying the WKB approximation, we simulated the Fowler-Nordheim (F-N) tunnelling/writing current and the direct tunnelling/leakage current in these devices. We evaluated the I-V characteristics, the charge decay and also the impact of CNT/Si NW aspect ratio and the volume fraction on the effective barrier height and the write voltage, respectively. We also simulated the write time, retention time and the erase time of these MOS devices. Based on the simulation results, it was concluded that the metallic CNT embedded stack-1 device offered the best performance in terms of higher F-N tunnelling current, lower direct tunnelling current and lesser write voltage and write time compared with the other devices. In case of direct tunnelling leakage and retention time it was found that the met CNT embedded stack-2 device showed better characteristics. For erasing, however, the C60 embedded stack-1 device showed the smallest erase time. When compared with earlier reports, it was seen that CNT, C60 and Si NW embedded devices all performed better than nanocrystalline Si embedded MOS non-volatile memories.

  17. Comparative study of CNT, silicon nanowire and fullerene embedded multilayer high-k gate dielectric MOS memory devices

    Science.gov (United States)

    Sengupta, Amretashis; Sarkar, Chandan Kumar; Requejo, Felix G.

    2011-10-01

    Here, we present a comparative theoretical study on stacked (multilayer) gate dielectric MOS memory devices, having a metallic/semiconducting carbon nanotube (CNT), silicon nanowire (Si NW) and fullerene (C60) embedded nitride layer acting as a floating gate. Two types of devices, one with HfO2-SiO2 stack (stack-1) and the other with La2O3-SiO2 stack (stack-2) as the tunnel oxide were compared. We evaluated the effective barrier height, the dielectric constant and the effective electron mobility in the composite gate dielectric with the Maxwell-Garnett effective medium theory. Thereafter applying the WKB approximation, we simulated the Fowler-Nordheim (F-N) tunnelling/writing current and the direct tunnelling/leakage current in these devices. We evaluated the I-V characteristics, the charge decay and also the impact of CNT/Si NW aspect ratio and the volume fraction on the effective barrier height and the write voltage, respectively. We also simulated the write time, retention time and the erase time of these MOS devices. Based on the simulation results, it was concluded that the metallic CNT embedded stack-1 device offered the best performance in terms of higher F-N tunnelling current, lower direct tunnelling current and lesser write voltage and write time compared with the other devices. In case of direct tunnelling leakage and retention time it was found that the met CNT embedded stack-2 device showed better characteristics. For erasing, however, the C60 embedded stack-1 device showed the smallest erase time. When compared with earlier reports, it was seen that CNT, C60 and Si NW embedded devices all performed better than nanocrystalline Si embedded MOS non-volatile memories.

  18. Impact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics

    KAUST Repository

    Salas-Villasenor, A. L.

    2010-06-29

    Cadmium sulfide thin film transistors were demonstrated as the n-type device for use in flexible electronics. CdS thin films were deposited by chemical bath deposition (70° C) on either 100 nm HfO2 or SiO2 as the gate dielectrics. Common gate transistors with channel lengths of 40-100 μm were fabricated with source and drain aluminum top contacts defined using a shadow mask process. No thermal annealing was performed throughout the device process. X-ray diffraction results clearly show the hexagonal crystalline phase of CdS. The electrical performance of HfO 2 /CdS -based thin film transistors shows a field effect mobility and threshold voltage of 25 cm2 V-1 s-1 and 2 V, respectively. Improvement in carrier mobility is associated with better nucleation and growth of CdS films deposited on HfO2. © 2010 The Electrochemical Society.

  19. Modification of electronic properties of top-gated graphene devices by ultrathin yttrium-oxide dielectric layers.

    Science.gov (United States)

    Wang, Lin; Chen, Xiaolong; Wang, Yang; Wu, Zefei; Li, Wei; Han, Yu; Zhang, Mingwei; He, Yuheng; Zhu, Chao; Fung, Kwok Kwong; Wang, Ning

    2013-02-07

    We report the structure characterization and electronic property modification of single layer graphene (SLG) field-effect transistor (FET) devices top-gated using ultrathin Y(2)O(3) as dielectric layers. Based on the Boltzmann transport theory within variant screening, Coulomb scattering is confirmed quantitatively to be dominant in Y(2)O(3)-covered SLG and a very few short-range impurities have been introduced by Y(2)O(3). Both DC transport and AC capacitance measurements carried out at cryogenic temperatures demonstrate that the broadening of Landau levels is mainly due to the additional charged impurities and inhomogeneity of carriers induced by Y(2)O(3) layers.

  20. A complementary organic inverter of porphyrazine thin films: low-voltage operation using ionic liquid gate dielectrics.

    Science.gov (United States)

    Fujimoto, Takuya; Miyoshi, Yasuhito; Matsushita, Michio M; Awaga, Kunio

    2011-05-28

    We studied a complementary organic inverter consisting of a p-type semiconductor, metal-free phthalocyanine (H(2)Pc), and an n-type semiconductor, tetrakis(thiadiazole)porphyrazine (H(2)TTDPz), operated through the ionic-liquid gate dielectrics of N,N-diethyl-N-methyl(2-methoxyethyl)ammonium bis(trifluoromethylsulfonyl)imide (DEME-TFSI). This organic inverter exhibits high performance with a very low operation voltage below 1.0 V and a dynamic response up to 20 Hz. © The Royal Society of Chemistry 2011

  1. Study of surface-modified PVP gate dielectric in organic thin film transistors with the nano-particle silver ink source/drain electrode.

    Science.gov (United States)

    Yun, Ho-Jin; Ham, Yong-Hyun; Shin, Hong-Sik; Jeong, Kwang-Seok; Park, Jeong-Gyu; Choi, Deuk-Sung; Lee, Ga-Won

    2011-07-01

    We have fabricated the flexible pentacene based organic thin film transistors (OTFTs) with formulated poly[4-vinylphenol] (PVP) gate dielectrics treated by CF4/O2 plasma on poly[ethersulfones] (PES) substrate. The solution of gate dielectrics is made by adding methylated poly[melamine-co-formaldehyde] (MMF) to PVP. The PVP gate dielectric layer was cross linked at 90 degrees under UV ozone exposure. Source/drain electrodes are formed by micro contact printing (MCP) method using nano particle silver ink for the purposes of low cost and high throughput. The optimized OTFT shows the device performance with field effect mobility of the 0.88 cm2/V s, subthreshold slope of 2.2 V/decade, and on/off current ratios of 1.8 x 10(-6) at -40 V gate bias. We found that hydrophobic PVP gate dielectric surface can influence on the initial film morphologies of pentacene making dense, which is more important for high performance OTFTs than large grain size. Moreover, hydrophobic gate dielelctric surface reduces voids and -OH groups that interrupt the carrier transport in OTFTs.

  2. Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress

    International Nuclear Information System (INIS)

    Lagger, P.; Steinschifter, P.; Reiner, M.; Stadtmüller, M.; Denifl, G.; Ostermaier, C.; Naumann, A.; Müller, J.; Wilde, L.; Sundqvist, J.; Pogany, D.

    2014-01-01

    The high density of defect states at the dielectric/III-N interface in GaN based metal-insulator-semiconductor structures causes tremendous threshold voltage drifts, ΔV th , under forward gate bias conditions. A comprehensive study on different dielectric materials, as well as varying dielectric thickness t D and barrier thickness t B , is performed using capacitance-voltage analysis. It is revealed that the density of trapped electrons, ΔN it , scales with the dielectric capacitance under spill-over conditions, i.e., the accumulation of a second electron channel at the dielectric/AlGaN barrier interface. Hence, the density of trapped electrons is defined by the charging of the dielectric capacitance. The scaling behavior of ΔN it is explained universally by the density of accumulated electrons at the dielectric/III-N interface under spill-over conditions. We conclude that the overall density of interface defects is higher than what can be electrically measured, due to limits set by dielectric breakdown. These findings have a significant impact on the correct interpretation of threshold voltage drift data and are of relevance for the development of normally off and normally on III-N/GaN high electron mobility transistors with gate insulation.

  3. A threshold-voltage model for small-scaled GaAs nMOSFET with stacked high-k gate dielectric

    International Nuclear Information System (INIS)

    Liu Chaowen; Xu Jingping; Liu Lu; Lu Hanhan; Huang Yuan

    2016-01-01

    A threshold-voltage model for a stacked high-k gate dielectric GaAs MOSFET is established by solving a two-dimensional Poisson's equation in channel and considering the short-channel, DIBL and quantum effects. The simulated results are in good agreement with the Silvaco TCAD data, confirming the correctness and validity of the model. Using the model, impacts of structural and physical parameters of the stack high-k gate dielectric on the threshold-voltage shift and the temperature characteristics of the threshold voltage are investigated. The results show that the stacked gate dielectric structure can effectively suppress the fringing-field and DIBL effects and improve the threshold and temperature characteristics, and on the other hand, the influence of temperature on the threshold voltage is overestimated if the quantum effect is ignored. (paper)

  4. A threshold-voltage model for small-scaled GaAs nMOSFET with stacked high-k gate dielectric

    Science.gov (United States)

    Chaowen, Liu; Jingping, Xu; Lu, Liu; Hanhan, Lu; Yuan, Huang

    2016-02-01

    A threshold-voltage model for a stacked high-k gate dielectric GaAs MOSFET is established by solving a two-dimensional Poisson's equation in channel and considering the short-channel, DIBL and quantum effects. The simulated results are in good agreement with the Silvaco TCAD data, confirming the correctness and validity of the model. Using the model, impacts of structural and physical parameters of the stack high-k gate dielectric on the threshold-voltage shift and the temperature characteristics of the threshold voltage are investigated. The results show that the stacked gate dielectric structure can effectively suppress the fringing-field and DIBL effects and improve the threshold and temperature characteristics, and on the other hand, the influence of temperature on the threshold voltage is overestimated if the quantum effect is ignored. Project supported by the National Natural Science Foundation of China (No. 61176100).

  5. Structural and Electrical Properties of Zr x Y1- x O y Nanocomposites for Gate Dielectric Applications

    Science.gov (United States)

    Ebrahimzadeh, Masoud; Bahari, Ali

    2016-01-01

    The possibility of ultrathin Zr x Y1- x O y films was investigated as a good gate dielectric structure for metal-oxide-semiconductor field-effect transistors (MOSFETs). Zr-doped Y2O3 nanocrystallites were synthesized by the sol-gel method. The nanocrystallite size was determined using the Scherrer equation and x-ray powder method from the main peak of the sample phase observed in x-ray diffraction patterns. Moreover, qualitative elemental analysis was performed by energy-dispersive x-ray spectroscopy. The nanocrystallite properties were characterized by scanning electron microscopy. The nanocrystallite morphology was determined by atomic force microscopy, showing that the grain size of the nanoparticles observed at the surface depends on the type of metal dopant and the annealing temperature. The capacitance-voltage and current density-voltage characteristics of the Zr x Y1- x O y /Si structures were analyzed. The results indicate that the Zr0.1Y0.9O y nanocomposite can be used as a good gate dielectric for next-generation MOSFET devices. The conduction mechanism in electrical fields below 0.25 MV/cm and the temperature range of 333 K < T < 423 K was found to be ohmic emission. A thermal excitation model is proposed to explain the ohmic current conduction mechanism.

  6. Experimental and theoretical investigation of the effect of SiO2 content in gate dielectrics on work function shift induced by nanoscale capping layers

    KAUST Repository

    Caraveo-Frescas, J. A.

    2012-09-10

    The impact of SiO2 content in ultrathin gate dielectrics on the magnitude of the effective work function (EWF) shift induced by nanoscale capping layers has been investigated experimentally and theoretically. The magnitude of the effective work function shift for four different capping layers (AlN, Al2O3, La2O3, and Gd2O3) is measured as a function of SiO2 content in the gate dielectric. A nearly linear increase of this shift with SiO2 content is observed for all capping layers. The origin of this dependence is explained using density functional theory simulations.

  7. Sol–gel deposited ceria thin films as gate dielectric for CMOS ...

    Indian Academy of Sciences (India)

    tacts are made to the metal gate and the back contact to the semiconductor. Accumulation occurs typically for nega- tive voltages (p-Si substrate), where the negative charge on the gate attracts holes from the substrate to the oxide– semiconductor interface. Depletion occurs for positive volta- ges; the positive charge on the ...

  8. Influence of O2 flow rate on HfO2 gate dielectrics for back-gated graphene transistors

    Science.gov (United States)

    Lakshmi Ganapathi, Kolla; Bhat, Navakanta; Mohan, Sangeneni

    2014-05-01

    HfO2 thin films deposited on Si substrate using electron beam evaporation, are evaluated for back-gated graphene transistors. The amount of O2 flow rate, during evaporation is optimized for 35 nm thick HfO2 films, to achieve the best optical, chemical and electrical properties. It has been observed that with increasing oxygen flow rate, thickness of the films increased and refractive index decreased due to increase in porosity resulting from the scattering of the evaporant. The films deposited at low O2 flow rates (1 and 3 SCCM) show better optical and compositional properties. The effects of post-deposition annealing and post-metallization annealing in forming gas ambience (FGA) on the optical and electrical properties of the films have been analyzed. The film deposited at 3 SCCM O2 flow rate shows the best properties as measured on MOS capacitors. To evaluate the performance of device properties, back-gated bilayer graphene transistors on HfO2 films deposited at two O2 flow rates of 3 and 20 SCCM have been fabricated and characterized. The transistor with HfO2 film deposited at 3 SCCM O2 flow rate shows better electrical properties consistent with the observations on MOS capacitor structures. This suggests that an optimum oxygen pressure is necessary to get good quality films for high performance devices.

  9. Nanocrystals embedded in hafnium dioxide-based dielectrics as charge storage nodes of nano-floating gate memory

    Science.gov (United States)

    Lee, Pui Fai

    2007-12-01

    Nanocrystals (NC) embedded in dielectrics have attracted a great deal of attention recently because they can potentially be applied in nonvolatile, high-speed, high-density and low-power memory devices. This device benefits from a relatively low operating voltage, high endurance, fast write-erase speeds and better immunity to soft errors. The nanocrystal materials suitable for such an application can be either metals or semiconductors. Recent studies have shown that high-k dielectrics, instead of SiO2 , for the tunneling layer in nanocrystal floating gate memory can improve the trade-off between data retention and program efficiency due to the unique band alignment of high-k dielectrics in the programming and retention modes. In this project, HfAlO has been selected as the high- k dielectric for the nanocrystal floating gate memory structure. The trilayer structure (HfAlO/Ge-NC/HfAlO) on Si was fabricated by PLD. Results revealed that relatively low substrate temperature and growth rate are favourable for the formation of smaller-size Ge nanocrystals. Effects of size/density of the Ge nanocrystal, the tunneling and control oxide layer thicknesses and the oxygen partial pressure during their growth on the charge storage and charge retention characteristics have also been studied. The island structure of the Ge nanocrystal suggests that the growth is based on the Volmer-Webber mode. The self-organized Ge nanocrystals so formed were uniform in size (5--20 nm diameter) and distribution with a density approaching 1012--1013cm-2. Flat-band voltage shift (DeltaVFB) of about 3.6 V and good retention property have been achieved. By varying aggregation distance, sputtering gas pressure and ionization power of the nanocluster source, nanoclusters of Ge with different sizes can be formed. The memory effect of the trilayer structure so formed with 10 nm Ge nanoclusters are manifested by the counter-clockwise hysteresis loop in the C-V curves and a maximum flat-band voltage

  10. Physics of Trap Generation and Electrical Breakdown in Ultra-thin SiO2 and SiON Gate Dielectric Materials

    NARCIS (Netherlands)

    Nicollian, Paul Edward

    2007-01-01

    This work spans nearly a decade of industrial research in the reliability physics of deeply scaled SiO2 and SiON gate dielectrics. In this work, we will present our following original contributions to the field: • Below 5V stress, the dominant mechanism for stressed induced leakage current in the

  11. A TIPS-TPDO-tetraCN-Based n-Type Organic Field-Effect Transistor with a Cross-linked PMMA Polymer Gate Dielectric.

    Science.gov (United States)

    Jung, Sungyeop; Albariqi, Mohammed; Gruntz, Guillaume; Al-Hathal, Thamer; Peinado, Alba; Garcia-Caurel, Enric; Nicolas, Yohann; Toupance, Thierry; Bonnassieux, Yvan; Horowitz, Gilles

    2016-06-15

    Recent improvement in the performance of the n-type organic semiconductors as well as thin gate dielectrics based on cross-linked polymers offers new opportunities to develop high-performance low-voltage n-type OFETs suitable for organic complementary circuits. Using TIPS-tetracyanotriphenodioxazine (TIPS-TPDO-tetraCN) and cross-linked poly(methyl methacrylate) (c-PMMA), respectively as n-type organic semiconductor and gate dielectric, linear regime field-effect mobility (1.8 ± 0.2) × 10(-2) cm(2) V(-1)s(-1), small spatial standard deviation of threshold voltage (∼0.1 V), and operating voltage less than 3 V are attainable with the same device structure and contact materials used commonly for p-type OFETs. Through comparative static and dynamic characterizations of c-PMMA and PMMA gate dielectrics, it is shown that both smaller thickness and larger relative permittivity of c-PMMA contributes to reduced operating voltage. Furthermore, negligible hysteresis brings evidence to small trap states in the semiconductor near gate dielectric of the n-type OFETs with c-PMMA. The use of TIPS-TPDO-tetraCN and c-PMMA is fully compatible with polyethylene terephthalate substrate, giving promise to various flexible applications.

  12. Ferroelectric/Dielectric Double Gate Insulator Spin-Coated Using Barium Titanate Nanocrystals for an Indium Oxide Nanocrystal-Based Thin-Film Transistor.

    Science.gov (United States)

    Pham, Hien Thu; Yang, Jin Ho; Lee, Don-Sung; Lee, Byoung Hun; Jeong, Hyun-Dam

    2016-03-23

    Barium titanate nanocrystals (BT NCs) were prepared under solvothermal conditions at 200 °C for 24 h. The shape of the BT NCs was tuned from nanodot to nanocube upon changing the polarity of the alcohol solvent, varying the nanosize in the range of 14-22 nm. Oleic acid-passivated NCs showed good solubility in a nonpolar solvent. The effect of size and shape of the BT NCs on the ferroelectric properties was also studied. The maximum polarization value of 7.2 μC/cm(2) was obtained for the BT-5 NC thin film. Dielectric measurements of the films showed comparable dielectric constant values of BT NCs over 1-100 kHz without significant loss. Furthermore, the bottom gate In2O3 NC thin film transistors exhibited outstanding device performance with a field-effect mobility of 11.1 cm(2) V(-1) s(-1) at a low applied gate voltage with BT-5 NC/SiO2 as the gate dielectric. The low-density trapped state was observed at the interface between the In2O3 NC semiconductor and the BT-5 NCs/SiO2 dielectric film. Furthermore, compensation of the applied gate field by an electric dipole-induced dipole field within the BT-5 NC film was also observed.

  13. Low-voltage organic field-effect transistors (OFETs) with solution-processed metal-oxide as gate dielectric.

    Science.gov (United States)

    Su, Yaorong; Wang, Chengliang; Xie, Weiguang; Xie, Fangyan; Chen, Jian; Zhao, Ni; Xu, Jianbin

    2011-12-01

    In this study, low-voltage copper phthalocyanine (CuPc)-based organic field-effect transistors (OFETs) are demonstrated utilizing solution-processed bilayer high-k metal-oxide (Al(2)O(y)/TiO(x)) as gate dielectric. The high-k metal-oxide bilayer is fabricated at low temperatures (OFETs show high electric performance with high hole mobility of 0.06 cm(2)/(V s), threshold voltage of -0.5 V, on/off ration of 2 × 10(3) and a very small subthreshold slope of 160 mV/dec when operated at -1.5 V. Our study demonstrates a simple and robust approach that could be used to achieve low-voltage operation with solution-processed technique. © 2011 American Chemical Society

  14. DNA and RNA sequencing by nanoscale reading through programmable electrophoresis and nanoelectrode-gated tunneling and dielectric detection

    Science.gov (United States)

    Lee, James W.; Thundat, Thomas G.

    2005-06-14

    An apparatus and method for performing nucleic acid (DNA and/or RNA) sequencing on a single molecule. The genetic sequence information is obtained by probing through a DNA or RNA molecule base by base at nanometer scale as though looking through a strip of movie film. This DNA sequencing nanotechnology has the theoretical capability of performing DNA sequencing at a maximal rate of about 1,000,000 bases per second. This enhanced performance is made possible by a series of innovations including: novel applications of a fine-tuned nanometer gap for passage of a single DNA or RNA molecule; thin layer microfluidics for sample loading and delivery; and programmable electric fields for precise control of DNA or RNA movement. Detection methods include nanoelectrode-gated tunneling current measurements, dielectric molecular characterization, and atomic force microscopy/electrostatic force microscopy (AFM/EFM) probing for nanoscale reading of the nucleic acid sequences.

  15. Sol–gel deposited ceria thin films as gate dielectric for CMOS ...

    Indian Academy of Sciences (India)

    In this work, cerium oxide thin films were prepared using cerium chloride heptahydrate, ethanol and citric acid as an additive by .... LCR meter. Electrical dielectric constant and density of inter- face traps (Dit) have been determined with the help of C–V and G–V curves. 2.1 MOS structure. The MOS capacitor structure is ...

  16. Organic thin film transistors with polymer brush gate dielectrics synthesized by atom transfer radical polymerization

    DEFF Research Database (Denmark)

    Pinto, J.C.; Whiting, G.L.; Khodabakhsh, S.

    2008-01-01

    , synthesized by atom transfer radical polymerization (ATRP), were used to fabricate low voltage OFETs with both evaporated pentacene and solution deposited poly(3-hexylthiophene). The semiconductor-dielectric interfaces in these systems were studied with a variety of methods including scanning force microscopy...

  17. 2 MeV electron irradiation effects on bulk and interface of atomic layer deposited high-k gate dielectrics on silicon

    Energy Technology Data Exchange (ETDEWEB)

    García, H., E-mail: hecgar@ele.uva.es [Departamento de Electricidad y Electrónica, ETSI Telecomunicación, Universidad de Valladolid, 47011 Valladolid (Spain); Castán, H.; Dueñas, S.; Bailón, L. [Departamento de Electricidad y Electrónica, ETSI Telecomunicación, Universidad de Valladolid, 47011 Valladolid (Spain); Campabadal, F.; Rafí, J.M.; Zabala, M.; Beldarrain, O. [Institut de Microelectrònica de Barcelona (IMB-CNM), CSIC, Campus UAB, 08193 Bellaterra (Spain); Ohyama, H.; Takakura, K.; Tsunoda, I. [Department of Electronic Engineering, Kumamoto National College of Technology, Kumamoto 861-1102 (Japan)

    2013-05-01

    2 MeV electron irradiation effects on the electrical properties of Al{sub 2}O{sub 3} and HfO{sub 2}-based metal–insulator–semiconductor capacitors have been studied. High-k dielectrics were directly grown on silicon by atomic layer deposition. Capacitors were exposed to three different electron irradiation doses of 0.025, 0.25 and 2.5 MGy. Capacitance–voltage, deep-level transient spectroscopy, conductance transients, flat-band voltage transients and current–voltage techniques were used to characterize the defects induced or activated by irradiation on the dielectric bulk and on the interface with silicon substrate. In all cases, positive charge is trapped in the dielectric bulk after irradiation indicating the existence of hole traps in the dielectric. When the samples are exposed to 2 MeV electron beam (e-beam) irradiation, electron–hole pairs are created and holes are then captured by the hole traps. Insulator/semiconductor interface quality slightly improves for low irradiation doses, but it is degraded for high doses. Irradiation always degrades the dielectric layers in terms of gate leakage current: the trapped holes are mobile charge which can contribute to leakage current by hopping from trap to trap. - Highlights: ► Positive charge accumulates inside dielectrics after electron irradiation. ► Irradiation improves oxide/semiconductor interface for low doses. ► Irradiation increases gate leakage current.

  18. Investigation of MOS Interfaces with Atomic-Layer-Deposited High-k Gate Dielectrics on III-V Semiconductors

    Science.gov (United States)

    Suri, Rahul

    The purpose of this research work was to investigate the surface passivation methods and metal gate/high-k dielectric gate stacks for metal-oxide-semiconductor devices (MOS) on III-V compound semiconductor materials -- (i) GaAs for future high-speed low-power logic devices and (ii) AlGaN/GaN heterostructure for future high-speed high-power devices. GaAs is a candidate material for high-mobility channel in a NMOS transistor to extend the CMOS scaling up to and beyond the 16-nm technology node. AlGaN/GaN heterostructure is useful in a MOS-high electron mobility transistor (MOS-HEMT) device for providing a high current-carrying two dimensional electron gas (2DEG) channel. The interaction of GaAs surface with atomic layer deposition of high- k dielectrics was investigated to gain fundamental insights into the chemical properties of GaAs surface oxides and high-k/GaAs interface. Electrical characterization of devices was performed to understand the impact of high-k/GaAs interface on MOS device characteristics in order to form a suitable metal/high-k/GaAs gatestack for future high-speed logic and power devices. Reduction of native oxides on GaAs was found to occur during atomic layer deposition (ALD) of high-k dielectrics- HfO2 and Al2O3/HfO 2 nanolaminates on GaAs. Reaction between ALD metal precursor and native oxides on GaAs was identified to be the cause for consumption of native oxides. It was established that the ALD growth temperature has a strong impact on this phenomenon. During post-dielectric annealing the residual arsenic oxides at the interface decomposed leading to an increase in the interfacial gallium oxides. Presence of gallium oxide, Ga2O3 was identified as a cause for observed frequency dispersion in MOS capacitance-voltage curves indicative of a high interface state density. The chemical properties of the AlGaN/GaN heterostructure surface prepared by wet chemical treatment using HCl/HF and NH4OH solutions were investigated and compared. Both HCl and

  19. Oligo- and polymeric FET devices: Thiophene-based active materials and their interaction with different gate dielectrics

    International Nuclear Information System (INIS)

    Porzio, W.; Destri, S.; Pasini, M.; Bolognesi, A.; Angiulli, A.; Di Gianvincenzo, P.; Natali, D.; Sampietro, M.; Caironi, M.; Fumagalli, L.; Ferrari, S.; Peron, E.; Perissinotti, F.

    2006-01-01

    Derivatives of both oligo- and polythiophene-based FET were recently considered for low cost electronic applications. In the device optimization, factors like redox reversibility of the molecule/polymer, electronic level compatibility with source/drain electrodes, packing closeness, and orientation versus the electrodes, can determine the overall performance. In addition, a gate insulator with a high dielectric constant, a low leakage current, and capability to promote ordering in the semiconductor is required to increase device performances and to lower the FET operating voltage. In this view, Al 2 O 3 appears a good candidate, although its widespread adoption is limited by the disorder that such oxide induces on the semiconductor with detrimental consequences on semiconductor electrical properties. In this contribution, an overview of recent results obtained on thiophene-derivative-based FET devices, fabricated by different growth techniques, and using both thermally grown SiO 2 and Al 2 O 3 from atomic layer deposition gate insulators will be reported and discussed with particular reference to organic solid state aggregation, morphology, and organic-inorganic interface

  20. Proton Conducting Graphene Oxide/Chitosan Composite Electrolytes as Gate Dielectrics for New-Concept Devices.

    Science.gov (United States)

    Feng, Ping; Du, Peifu; Wan, Changjin; Shi, Yi; Wan, Qing

    2016-09-30

    New-concept devices featuring the characteristics of ultralow operation voltages and low fabrication cost have received increasing attention recently because they can supplement traditional Si-based electronics. Also, organic/inorganic composite systems can offer an attractive strategy to combine the merits of organic and inorganic materials into promising electronic devices. In this report, solution-processed graphene oxide/chitosan composite film was found to be an excellent proton conducting electrolyte with a high specific capacitance of ~3.2 μF/cm 2 at 1.0 Hz, and it was used to fabricate multi-gate electric double layer transistors. Dual-gate AND logic operation and two-terminal diode operation were realized in a single device. A two-terminal synaptic device was proposed, and some important synaptic behaviors were emulated, which is interesting for neuromorphic systems.

  1. OTFT with pentacene-gate dielectric interface modified by silicon nanoparticles

    International Nuclear Information System (INIS)

    Jakabovic, J.; Kovac, J.; Srnanek, R.; Guldan, S.; Donoval, D.; Weis, M.; Sokolsky, M.; Cirak, J.; Broch, K.; Schreiber, F.

    2011-01-01

    We have for the first time investigated the structural and electrical properties of pentacene OTFT deposited on the semiconductor-gate insulator interface covered with SiNPs monolayer prepared by the LB method and compared these to a reference sample (without SiNPs). The micro-Raman, AFM and XRD measurements confirmed that the pentacene layer deposited on the semiconductor-gate insulator interface covered with a SiNPs monolayer on both hydrophobic and hydrophilic surfaces changes the structure. The Raman measurements show that the average value of α is between 0.8 and 1.0. The different structural quality of pentacene leads to better OTFTs electrical characteristics mainly saturation current of OTFTs with SiNPs increasing (∼ 2.5 x) with storing time (85 days) in comparison to OTFTs without SiNPs, which decrease similarly after 85 days.

  2. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-06-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

  3. Pentacene thin-film transistors and inverters with plasma-enhanced atomic-layer-deposited Al2O3 gate dielectric

    International Nuclear Information System (INIS)

    Koo, Jae Bon; Lim, Jung Wook; Kim, Seong Hyun; Yun, Sun Jin; Ku, Chan Hoe; Lim, Sang Chul; Lee, Jung Hun

    2007-01-01

    The performances of pentacene thin-film transistor with plasma-enhanced atomic-layer-deposited (PEALD) 150 nm thick Al 2 O 3 dielectric are reported. Saturation mobility of 0.38 cm 2 /V s, threshold voltage of 1 V, subthreshold swing of 0.6 V/decade, and on/off current ratio of about 10 8 have been obtained. Both depletion and enhancement mode inverter have been realized with the change of treatment method of hexamethyldisilazane on PEALD Al 2 O 3 gate dielectric. Full swing depletion mode inverter has been demonstrated at input voltages ranging from 5 V to - 5 V at supply voltage of - 5 V

  4. Ester-free cross-linker molecules for ultraviolet-light-cured polysilsesquioxane gate dielectric layers of organic thin-film transistors

    Science.gov (United States)

    Okada, Shuichi; Nakahara, Yoshio; Uno, Kazuyuki; Tanaka, Ichiro

    2018-04-01

    Pentacene thin-film transistors (TFTs) were fabricated with ultraviolet-light (UV)-cured polysilsesquioxane (PSQ) gate dielectric layers using cross-linker molecules with or without ester groups. To polymerize PSQ without ester groups, thiol-ene reaction was adopted. The TFTs fabricated with PSQ layers comprising ester-free cross-linkers showed a higher carrier mobility than the TFTs with PSQ layers cross-linked with ester groups, which had large electric dipole moments that limited the carrier mobility. It was demonstrated that the thiol-ene reaction is more suitable than the conventional radical reaction for UV-cured PSQ with small dielectric constant.

  5. Pulsed laser deposition of aluminate YAlO3 and LaAlO3 thin films for alternative gate dielectric applications

    International Nuclear Information System (INIS)

    Liu, J.-M.; Shi, G.H.; Yu, L.C.; Li, T.L.; Liu, Z.G.; Dai, J.Y.

    2005-01-01

    Amorphous aluminate YAlO 3 (YAO) thin films on n-type silicon wafers as gate dielectric layers of metal-oxide-semiconductor devices are prepared by pulsed laser deposition. As a comparison, amorphous aluminate LaAlO 3 (LAO) thin films are also prepared. The structural and electrical characterization shows that the as-prepared YAO films remain amorphous until 900 C and the dielectric constant is ∝14. The measured leakage current of less than 10 -3 A/cm 2 at a bias of V G =1.0 V for ∝40-nm-thick YAO and LAO films obeys the Fowler-Nordheim tunneling mechanism. It is revealed that the electrical property can be significantly affected by the oxygen pressure during deposition and post rapid thermal annealing, which may change the fixed negative charge density at the gate interface. (orig.)

  6. Thermal elastic-wave attenuation in low-dimensional SiNx bars at low temperatures

    Science.gov (United States)

    Withington, S.; Williams, E.; Goldie, D. J.; Thomas, C. N.; Schneiderman, M.

    2017-08-01

    At low temperatures, mK, the thermal flux through low-dimensional amorphous dielectric bars, 400 μm, it is known that the conductance scales as 1/L, where L is the length, but for short bars, 1 μm ultra-low-noise superconducting Transition Edge Sensors to measure the heat flux through a set of SiNx bars to establish the characteristic scale size of the ballistic to diffusive transition. For bars supporting 6 to 7 modes, we measure a thermal elastic-wave attenuation length of 20 μm. The measurement is important because it sheds light on the scattering processes, which in turn are closely related to the generation of thermal fluctuation noise. Our own interest lies in creating patterned phononic filters for controlling heat flow and thermal noise in ultra-low-noise devices, but the work will be of interest to others trying to isolate devices from their environments and studying loss mechanisms in micro-mechanical resonators.

  7. Titanium-tungsten nanocrystals embedded in a SiO2/Al2O3 gate dielectric stack for low-voltage operation in non-volatile memory

    International Nuclear Information System (INIS)

    Yang Shiqian; Wang Qin; Zhang Manhong; Long Shibing; Liu Jing; Liu Ming

    2010-01-01

    Titanium-tungsten nanocrystals (NCs) were fabricated by a self-assembly rapid thermal annealing (RTA) process. Well isolated Ti 0.46 W 0.54 NCs were embedded in the gate dielectric stack of SiO 2 /Al 2 O 3 . A metal-oxide-semiconductor (MOS) capacitor was fabricated to investigate its application in a non-volatile memory (NVM) device. It demonstrated a large memory window of 6.2 V in terms of flat-band voltage (V FB ) shift under a dual-directional sweeping gate voltage of - 10 to 10 V. A 1.1 V V FB shift under a low dual-directional sweeping gate voltage of - 4 to 4 V was also observed. The retention characteristic of this MOS capacitor was demonstrated by a 0.5 V memory window after 10 4 s of elapsed time at room temperature. The endurance characteristic was demonstrated by a program/erase cycling test.

  8. Low-temperature fabrication of sputtered high-k HfO2 gate dielectric for flexible a-IGZO thin film transistors

    Science.gov (United States)

    Yao, Rihui; Zheng, Zeke; Xiong, Mei; Zhang, Xiaochen; Li, Xiaoqing; Ning, Honglong; Fang, Zhiqiang; Xie, Weiguang; Lu, Xubing; Peng, Junbiao

    2018-03-01

    In this work, low temperature fabrication of a sputtered high-k HfO2 gate dielectric for flexible a-IGZO thin film transistors (TFTs) on polyimide substrates was investigated. The effects of Ar-pressure during the sputtering process and then especially the post-annealing treatments at low temperature (≤200 °C) for HfO2 on reducing the density of defects in the bulk and on the surface were systematically studied. X-ray reflectivity, UV-vis and X-ray photoelectron spectroscopy, and micro-wave photoconductivity decay measurements were carried out and indicated that the high quality of optimized HfO2 film and its high dielectric properties contributed to the low concentration of structural defects and shallow localized defects such as oxygen vacancies. As a result, the well-structured HfO2 gate dielectric exhibited a high density of 9.7 g/cm3, a high dielectric constant of 28.5, a wide optical bandgap of 4.75 eV, and relatively low leakage current. The corresponding flexible a-IGZO TFT on polyimide exhibited an optimal device performance with a saturation mobility of 10.3 cm2 V-1 s-1, an Ion/Ioff ratio of 4.3 × 107, a SS value of 0.28 V dec-1, and a threshold voltage (Vth) of 1.1 V, as well as favorable stability under NBS/PBS gate bias and bending stress.

  9. Interfacial and electrical properties of InGaAs metal-oxide-semiconductor capacitor with TiON/TaON multilayer composite gate dielectric

    Science.gov (United States)

    Wang, L. S.; Xu, J. P.; Liu, L.; Lu, H. H.; Lai, P. T.; Tang, W. M.

    2015-03-01

    InGaAs metal-oxide-semiconductor (MOS) capacitors with composite gate dielectric consisting of Ti-based oxynitride (TiON)/Ta-based oxynitride (TaON) multilayer are fabricated by RF sputtering. The interfacial and electrical properties of the TiON/TaON/InGaAs and TaON/TiON/InGaAs MOS structures are investigated and compared. Experimental results show that the former exhibits lower interface-state density (1.0 × 1012 cm-2 eV-1 at midgap), smaller gate leakage current (9.5 × 10-5 A/cm2 at a gate voltage of 2 V), larger equivalent dielectric constant (19.8), and higher reliability under electrical stress than the latter. The involved mechanism lies in the fact that the ultrathin TaON interlayer deposited on the sulfur-passivated InGaAs surface can effectively reduce the defective states and thus unpin the Femi level at the TaON/InGaAs interface, improving the electrical properties of the device.

  10. Effects of the gate dielectric on the subthreshold transport of carbon nanotube network transistors grown by using plasma-enhanced chemical vapor deposition

    International Nuclear Information System (INIS)

    Jeong, Seung Geun; Park, Wan Jun

    2010-01-01

    In this study, we investigated the subthreshold slope of random network carbon nanotube transistors with different geometries and passivations. Single-wall carbon nanotubes with lengths of 1-2 m were grown by using plasma-enhanced chemical vapor deposition to form the transistor channels. A critical channel length, where the subthreshold slope was saturated, of 7 μm was obtained. This was due to the percolational behavior of the nanotube random networks. With the dielectric passivation, the subthreshold slope was dramatically reduced from 9 V/decade to 0.9 V/decade by reducing interfacial trap sites, which then reduced the interface capacitance between the nanotube network and the gate dielectric.

  11. Interfacial charge trapping in extrinsic Y2O3/SiO2 bilayer gate dielectric based MIS devices on Si(100)

    Science.gov (United States)

    Rastogi, A. C.; Sharma, R. N.

    2001-08-01

    Metal-insulator-semiconductor (MIS) structures based on an extrinsic Y2O3 dielectric film on Si show high leakage currents due to roughness-related highly localized fields. Oxygen annealing increases the dielectric constant and strength and reduces leakage currents by transforming Y2O3 (film)/Si(100) into a bilayer Y2O3 (film)/SiO2/Si(100) dielectric structure. Evolution of interfacial SiO2 causes generation of mid-gap interface states at Ev + 0.23 eV and Ev + 0.43 eV, which act as electron traps and are responsible for hysteresis effects in capacitance-voltage (C-V) and current-voltage (I-V) behaviour in the accumulation-inversion modes. The electron trapping reduces the cathodic field and causes lowering of the current and the shift in current to higher fields after successive ramps. The charge trapping effects cause varied and unstable C-V and I-V behaviour of MIS structures based on a Y2O3/SiO2 bilayer gate dielectric. Its origin has been attributed to microstructure and defect state modification at the Y2O3 film-Si interface. This limits its application in high-density dynamic random access memory and ultra-large-scale integration devices.

  12. High-performance, low-operating voltage, and solution-processable organic field-effect transistor with silk fibroin as the gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Shi, Leilei; Xu, Xinjun, E-mail: xuxj@mater.ustb.edu.cn, E-mail: lidong@mater.ustb.edu.cn; Ma, Mingchao; Li, Lidong, E-mail: xuxj@mater.ustb.edu.cn, E-mail: lidong@mater.ustb.edu.cn [State Key Lab for Advanced Metals and Materials, School of Materials Science and Engineering, University of Science and Technology Beijing, Beijing 100083 (China)

    2014-01-13

    We report the use of silk fibroin as the gate dielectric material in solution-processed organic field-effect transistors (OFETs) with poly(3-hexylthiophene) (P3HT) as the semiconducting layer. Such OFETs exhibit a low threshold of −0.77 V and a low-operating voltage (0 to −3 V) compatible with the voltage level commonly-used in current electronic industry. The carrier mobility of such OFETs is as high as 0.21 cm{sup 2} V{sup −1} s{sup −1} in the saturation regime, comparable to the best value of P3HT-based OFETs with dielectric layer that is not solution-processed. The high-performance of this kind of OFET is related with the high content of β strands in fibroin dielectric which leads to an array of fibers in a highly ordered structure, thus reducing the trapping sites at the semiconductor/dielectric interface.

  13. Electrical properties of Al2O3-HfTiO laminate gate dielectric stacks with an equivalent oxide thickness below 0.8 nm

    International Nuclear Information System (INIS)

    Mikhelashvili, V.; Eisenstein, G.

    2007-01-01

    We report high quality nanolaminate films consisting of five Al 2 O 3 -HfTiO layers with a dielectric constant of about 29. The dielectric stack was deposited on unheated p-Si substrate from Al 2 O 3 and 1HfO 2 /1TiO 2 targets using an electron beam gun evaporation system without addition of oxygen. A dielectric constant for a thick HfTiO film of about 83 was also demonstrated. The electrical characteristics of as deposited structures and ones which were annealed for 5-10 min in an O 2 atmosphere at up to 950 deg. C were investigated. Two types of gate electrodes: Pt and Ti were compared. The dielectric stack which was annealed up to 500 deg. C exhibits a leakage current density as small as ∼ 1 x 10 -4 A/cm 2 at an electric of field 1.5 MV/cm for a quantum mechanical corrected equivalent oxide thickness of ∼ 0.76 nm. These values change to ∼ 1 x 10 -8 A/cm 2 and 1.82 nm respectively, after annealing at 950 deg. C for 5 min

  14. BE-SONOS flash memory along with metal gate and high-k dielectrics in tunnel barrier and its impact on charge retention dynamics

    Science.gov (United States)

    Jain, Sonal; Gupta, Deepika; Neema, Vaibhav; Vishwakarma, Santosh

    2016-03-01

    We investigate the effect of a high-k dielectric in the tunnel layer to improve the erase speed-retention trade-off. Here, the proposed stack in the tunnel layer is AlLaO3/HfAlO/SiO2. These proposed materials possess low valence band offset with high permittivity to improve both the erase speed and retention time in barrier engineered silicon-oxide-nitride-oxide-silicon (BE-SONOS). In the proposed structure HfAlO and AlLaO3 replace Si3N4 and the top SiO2 layer in a conventional oxide/nitride/oxide (ONO) tunnel stack. Due to the lower conduction band offset (CBO) and high permittivity of the proposed material in the tunnel layer, it offers better program/erase (P/E) speed and retention time. In this work the gate length is also scaled down from 220 to 55 nm to observe the effect of high-k materials while scaling, for the same equivalent oxide thickness (EOT). We found that the scaling down of the gate length has a negligible impact on the memory window of the devices. Hence, various investigated tunnel oxide stacks possess a good memory window with a charge retained up to 87.4% (at room temperature) after a period of ten years. We also examine the use of a metal gate instead of a polysilicon gate, which shows improved P/E speed and retention time.

  15. BE-SONOS flash memory along with metal gate and high-k dielectrics in tunnel barrier and its impact on charge retention dynamics

    International Nuclear Information System (INIS)

    Jain, Sonal; Neema, Vaibhav; Gupta, Deepika; Vishwakarma, Santosh

    2016-01-01

    We investigate the effect of a high-k dielectric in the tunnel layer to improve the erase speed-retention trade-off. Here, the proposed stack in the tunnel layer is AlLaO 3 /HfAlO/SiO 2 . These proposed materials possess low valence band offset with high permittivity to improve both the erase speed and retention time in barrier engineered silicon-oxide-nitride-oxide-silicon (BE-SONOS). In the proposed structure HfAlO and AlLaO 3 replace Si 3 N 4 and the top SiO 2 layer in a conventional oxide/nitride/oxide (ONO) tunnel stack. Due to the lower conduction band offset (CBO) and high permittivity of the proposed material in the tunnel layer, it offers better program/erase (P/E) speed and retention time. In this work the gate length is also scaled down from 220 to 55 nm to observe the effect of high-k materials while scaling, for the same equivalent oxide thickness (EOT). We found that the scaling down of the gate length has a negligible impact on the memory window of the devices. Hence, various investigated tunnel oxide stacks possess a good memory window with a charge retained up to 87.4% (at room temperature) after a period of ten years. We also examine the use of a metal gate instead of a polysilicon gate, which shows improved P/E speed and retention time. (paper)

  16. Gate dielectric surface treatments for performance improvement of poly(3-hexylthiophene-2,5-diyl) based organic field-effect transistors

    Science.gov (United States)

    Nawaz, Ali; de, Cristiane, , Col; Cruz-Cruz, Isidro; Kumar, Anshu; Kumar, Anil; Hümmelgen, Ivo A.

    2015-08-01

    We report on enhanced performance in poly(3-hexylthiophene-2,5-diyl) (P3HT) based organic field effect transistors (OFETs) achieved by improvement in hole transport along the channel near the insulator/semiconductor (I/S) interface. The improvement in hole transport is demonstrated to occur very close to the I/S interface, after treatment of the insulator layer with sodium dodecyl sulfate (SDS). SDS is an anionic surfactant, with negatively charged heads, known for formation of micelles above critical micelle concentration (CMC), which contribute to the passivation of positively charged traps. Investigation of field-effect mobility (μFET) as a function of channel bottleneck thickness in OFETs reveals the favorable gate voltage regime where mobility is the highest. In addition, it shows that the gate dielectric surface treatment not only leads to an increase in mobility in that regime, but also displaces charge transport closer to the interface, hence pointing toward passivation of the charge traps at I/S interface. OFETs with SDS treatment were compared with untreated and vitamin C or hexadecyltrimethylammonium bromide (CTAB) treated OFETs. All the treatments resulted in significant improvements in specific dielectric capacitance, μFET, on/off current ratio and transconductance.

  17. Fabrication of hybrid self-assembled monolayer/hafnium oxide gate dielectric by radical oxidation for molybdenum disulfide field-effect transistors

    Science.gov (United States)

    Kawanago, Takamasa; Ikoma, Ryo; Oba, Tomoaki; Takagi, Hiroyuki

    2017-11-01

    In this study, radical oxidation is applied to the fabrication of a hybrid self-assembled monolayer (SAM)/hafnium oxide (HfOx) gate dielectric in molybdenum disulfide (MoS2) field-effect transistors. The fabrication process involves radical oxidation to form HfOx at the surface of metallic HfN, SAM formation by immersion, and the deterministic transfer of MoS2 flakes. A subthreshold slope of 75 mV/dec and small hysteresis were demonstrated, indicating superior interfacial properties. Cross-sectional transmission electron microscopy revealed the uniform formation of the HfOx layer at the surface of HfN. The SAM is indispensable for the superior interfacial properties in MoS2 field-effect transistors. The radical oxidation is not restricted to the oxidation of silicon and germanium substrates and was also found to be applicable to the fabrication of a high-k gate dielectric. This study opens up interesting possibilities of radical oxidation for research on functional electronic devices.

  18. Low-voltage back-gated atmospheric pressure chemical vapor deposition based graphene-striped channel transistor with high-κ dielectric showing room-temperature mobility > 11 000 cm2/V·s

    KAUST Repository

    Smith, Casey

    2013-07-23

    Utilization of graphene may help realize innovative low-power replacements for III-V materials based high electron mobility transistors while extending operational frequencies closer to the THz regime for superior wireless communications, imaging, and other novel applications. Device architectures explored to date suffer a fundamental performance roadblock due to lack of compatible deposition techniques for nanometer-scale dielectrics required to efficiently modulate graphene transconductance (gm) while maintaining low gate capacitance-voltage product (CgsVgs). Here we show integration of a scaled (10 nm) high-κ gate dielectric aluminum oxide (Al2O3) with an atmospheric pressure chemical vapor deposition (APCVD)-derived graphene channel composed of multiple 0.25 μm stripes to repeatedly realize room-temperature mobility of 11 000 cm 2/V·s or higher. This high performance is attributed to the APCVD graphene growth quality, excellent interfacial properties of the gate dielectric, conductivity enhancement in the graphene stripes due to low t ox/Wgraphene ratio, and scaled high-κ dielectric gate modulation of carrier density allowing full actuation of the device with only ±1 V applied bias. The superior drive current and conductance at Vdd = 1 V compared to other top-gated devices requiring undesirable seed (such as aluminum and poly vinyl alcohol)-assisted dielectric deposition, bottom gate devices requiring excessive gate voltage for actuation, or monolithic (nonstriped) channels suggest that this facile transistor structure provides critical insight toward future device design and process integration to maximize CVD-based graphene transistor performance. © 2013 American Chemical Society.

  19. Dielectric Modulated FET (DMFET)

    Indian Academy of Sciences (India)

    First page Back Continue Last page Graphics. Working Principle: Change in Dielectric constant due to immobilization of biomolecules in the nanogap cavity leads to change in effective gate capacitance and thus gate bias for FET. Working Principle: Change in Dielectric constant due to immobilization of biomolecules in the ...

  20. Titanium-tungsten nanocrystals embedded in a SiO(2)/Al(2)O(3) gate dielectric stack for low-voltage operation in non-volatile memory.

    Science.gov (United States)

    Yang, Shiqian; Wang, Qin; Zhang, Manhong; Long, Shibing; Liu, Jing; Liu, Ming

    2010-06-18

    Titanium-tungsten nanocrystals (NCs) were fabricated by a self-assembly rapid thermal annealing (RTA) process. Well isolated Ti(0.46)W(0.54) NCs were embedded in the gate dielectric stack of SiO(2)/Al(2)O(3). A metal-oxide-semiconductor (MOS) capacitor was fabricated to investigate its application in a non-volatile memory (NVM) device. It demonstrated a large memory window of 6.2 V in terms of flat-band voltage (V(FB)) shift under a dual-directional sweeping gate voltage of - 10 to 10 V. A 1.1 V V(FB) shift under a low dual-directional sweeping gate voltage of - 4 to 4 V was also observed. The retention characteristic of this MOS capacitor was demonstrated by a 0.5 V memory window after 10(4) s of elapsed time at room temperature. The endurance characteristic was demonstrated by a program/erase cycling test.

  1. Use of water vapor for suppressing the growth of unstable low-{kappa} interlayer in HfTiO gate-dielectric Ge metal-oxide-semiconductor capacitors with sub-nanometer capacitance equivalent thickness

    Energy Technology Data Exchange (ETDEWEB)

    Xu, J.P. [Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan, 430074 (China); Zou, X. [School of Electromachine and Architecture Engineering, Jianghan University, Wuhan, 430056 (China); Lai, P.T. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)], E-mail: laip@eee.hku.hk; Li, C.X.; Chan, C.L. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)

    2009-03-02

    Annealing of high-permittivity HfTiO gate dielectric on Ge substrate in different gases (N{sub 2}, NH{sub 3}, NO and N{sub 2}O) with or without water vapor is investigated. Analysis by transmission electron microscopy indicates that the four wet anneals can greatly suppress the growth of a GeO{sub x} interlayer at the dielectric/Ge interface, and thus decrease interface states, oxide charges and gate leakage current. Moreover, compared with the wet N{sub 2} anneal, the wet NH{sub 3}, NO and N{sub 2}O anneals decrease the equivalent permittivity of the gate dielectric due to the growth of a GeO{sub x}N{sub y} interlayer. Among the eight anneals, the wet N{sub 2} anneal produces the best dielectric performance with an equivalent relative permittivity of 35, capacitance equivalent thickness of 0.81 nm, interface-state density of 6.4 x 10{sup 11} eV{sup -1} cm{sup -2} and gate leakage current of 2.7 x 10{sup -4} A/cm{sup 2} at V{sub g} = 1 V.

  2. Direct patterning of solution-processed organic thin-film transistor by selective control of solution wettability of polymer gate dielectric

    Science.gov (United States)

    Fujisaki, Yoshihide; Ito, Hiroshi; Nakajima, Yoshiki; Nakata, Mitsuru; Tsuji, Hiroshi; Yamamoto, Toshihiro; Furue, Hirokazu; Kurita, Taiichiro; Shimidzu, Naoki

    2013-04-01

    A simple direct patterning method for solution-processable organic semiconductors (OSCs) is demonstrated. The solution-wettable and nonwettable regions of a polymer gate dielectric layer were selectively controlled by a short tetrafluoromethane gas plasma treatment, and we precisely patterned the OSC film in the desired channel region by lamination coating. The patterned OSC films represent polycrystalline structures consisting of crystalline domains varying from 30 to 60 μm, and the resulting short-channel thin-film transistor (TFT) showed a high mobility of up to 1.3 cm2/Vs, a large on/off ratio over 108, and a negligible hysteresis curve. The proposed method is scalable for patterning TFT arrays with large-area dimensions.

  3. Experimental investigation of localized stress-induced leakage current distribution in gate dielectrics using array test circuit

    Science.gov (United States)

    Park, Hyeonwoo; Teramoto, Akinobu; Kuroda, Rihito; Suwa, Tomoyuki; Sugawa, Shigetoshi

    2018-04-01

    Localized stress-induced leakage current (SILC) has become a major problem in the reliability of flash memories. To reduce it, clarifying the SILC mechanism is important, and statistical measurement and analysis have to be carried out. In this study, we applied an array test circuit that can measure the SILC distribution of more than 80,000 nMOSFETs with various gate areas at a high speed (within 80 s) and a high accuracy (on the 10-17 A current order). The results clarified that the distributions of localized SILC in different gate areas follow a universal distribution assuming the same SILC defect density distribution per unit area, and the current of localized SILC defects does not scale down with the gate area. Moreover, the distribution of SILC defect density and its dependence on the oxide field for measurement (E OX-Measure) were experimentally determined for fabricated devices.

  4. Low-voltage organic thin film transistors (OTFTs) using crosslinked polyvinyl alcohol (PVA)/neodymium oxide (Nd2O3) bilayer gate dielectrics

    Science.gov (United States)

    Khound, Sagarika; Sarma, Ranjit

    2018-01-01

    We have reported here on the design, processing and dielectric properties of pentacene-based organic thin film transitors (OTFTs) with a bilayer gate dilectrics of crosslinked PVA/Nd2O3 which enables low-voltage organic thin film operations. The dielectric characteristics of PVA/Nd2O3 bilayer films are studied by capacitance-voltage ( C- V) and current-voltage ( I- V) curves in the metal-insulator-metal (MIM) structure. We have analysed the output electrical responses and transfer characteristics of the OTFT devices to determine their performance of OTFT parameters. The mobility of 0.94 cm2/Vs, the threshold voltage of - 2.8 V, the current on-off ratio of 6.2 × 105, the subthreshold slope of 0.61 V/decade are evaluated. Low leakage current of the device is observed from current density-electric field ( J- E) curve. The structure and the morphology of the device are studied using X-ray diffraction (XRD) and atomic force microscope (AFM), respectively. The study demonstrates an effective way to realize low-voltage, high-performance OTFTs at low cost.

  5. High-k Gate Dielectric Films Studied by Extremely Asymmetric X-ray Diffraction and X-ray Photoelectron Spectroscopy

    Energy Technology Data Exchange (ETDEWEB)

    Ito, Yuki [Graduate School of Engineering, Nagoya University, Nagoya, 464-8603 (Japan); Akimoto, Koichi [Graduate School of Engineering, Nagoya University, Nagoya, 464-8603 (Japan); Yoshida, Hironori [Graduate School of Engineering, Nagoya University, Nagoya, 464-8603 (Japan); Emoto, Takashi [Toyota National College of Technology, Toyota, Aichi 471-8525 (Japan); Kobayashi, Daisuke [Institute of Space and Astronautical Science, Sagamihara, Kanagawa 229-8510 (Japan); Hirose, Kazuyuki [Institute of Space and Astronautical Science, Sagamihara, Kanagawa 229-8510 (Japan)

    2007-10-15

    We studied HfAlO{sub x}(N)/SiO{sub 2}/Si films which were fabricated by the layer-by-layer deposition and annealing (LL-D and A) method with different annealing conditions. In this time, in-situ annealing was performed at various temperatures in an NH{sub 3} ambient. In addition, post-deposition annealing (PDA) was performed for some samples. For each sample, the interfacial lattice strain was evaluated using extremely asymmetric X-ray diffraction and the local dielectric constant near the Al atoms was measured by X-ray photoelectron spectroscopy (XPS). Observation of the strain field was done by measuring the X-ray rocking curve of the Si 113 reflection of the Si (001) substrate under grazing incidence conditions. It was found that in the case of the samples without PDA, for higher in-situ annealing temperatures compressive strain is introduced and the local dielectric constant becomes lower. For the samples with PDA, the differences of the lattice strain and the local dielectric constant are small for different in-situ annealing temperatures.

  6. Fabrication and electrical properties of metal-oxide semiconductor capacitors based on polycrystalline p-Cu{sub x}O and HfO{sub 2}/SiO{sub 2} high-{kappa} stack gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Zou Xiao [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Department of Electromachine Engineering, Jianghan University, Wuhan, 430056 (China); Fang Guojia, E-mail: gjfang@whu.edu.c [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Yuan Longyan; Liu Nishuang; Long Hao; Zhao Xingzhong [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China)

    2010-05-31

    Polycrystalline p-type Cu{sub x}O films were deposited after the growth of HfO{sub 2} dielectric on Si substrate by pulsed laser deposition, and Cu{sub x}O metal-oxide-semiconductor (MOS) capacitors with HfO{sub 2}/SiO{sub 2} stack gate dielectric were primarily fabricated and investigated. X-ray diffraction and X-ray photoelectron spectroscopy were applied to analyze crystalline structure and Cu{sup +}/Cu{sup 2+} ratios of Cu{sub x}O films respectively. SiO{sub 2} interlayer formed between the high-{kappa} dielectric and substrate was estimated by the transmission electron microscope. Results of electrical characteristic measurement indicate that the permittivity of HfO{sub 2} is about 22, and the gate leakage current density of MOS capacitor with 11.3 nm HfO{sub 2}/SiO{sub 2} stack dielectrics is {approx} 10{sup -4} A/cm{sup 2}. Results also show that the annealing in N{sub 2} can improve the quality of Cu{sub x}O/HfO{sub 2} interface and thus reduce the gate leakage density.

  7. Modulation of sub-threshold properties of InGaAs MOSFETs by La2O3 gate dielectrics

    Directory of Open Access Journals (Sweden)

    C.-Y. Chang

    2017-09-01

    Full Text Available We have found the ferroelectric-like characteristics in atomic layer deposition (ALD La2O3 films with thermal budget lower than 300oC in polarization-electric field (P-E and capacitance-gate voltage (C-V measurements on W/La2O3/W and W/La2O3/InGaAs capacitors. The observed hysteresis and saturation of polarization in the P-E characteristics of the W/La2O3/W and the W/La2O3/InGaAs capacitors, and the counter-clockwise C-V hysteresis in the C-V curves of the W/La2O3/InGaAs capacitors suggest a possibility of ferroelectricity in the present La2O3 films. By using this gate stack, W/La2O3/InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs were fabricated in order to examine the negative capacitance (NC effect due to La2O3. It is found that the sub-threshold swing (SS of W/La2O3/InGaAs MOSFETs is lower at low temperature than the theoretical limit of MOSFETs. This result strongly suggests that the W/La2O3/InGaAs MOSFETs can work as a steep-slope III-V negative capacitance field-effect transistor (NCFET.

  8. Investigating compositional effects of atomic layer deposition ternary dielectric Ti-Al-O on metal-insulator-semiconductor heterojunction capacitor structure for gate insulation of InAlN/GaN and AlGaN/GaN

    Energy Technology Data Exchange (ETDEWEB)

    Colon, Albert; Stan, Liliana; Divan, Ralu; Shi, Junxia

    2016-11-01

    Gate insulation/surface passivation in AlGaN/GaN and InAlN/GaN heterojunction field-effect transistors is a major concern for passivation of surface traps and reduction of gate leakage current. However, finding the most appropriate gate dielectric materials is challenging and often involves a compromise of the required properties such as dielectric constant, conduction/valence band-offsets, or thermal stability. Creating a ternary compound such as Ti-Al-O and tailoring its composition may result in a reasonably good gate material in terms of the said properties. To date, there is limited knowledge of the performance of ternary dielectric compounds on AlGaN/GaN and even less on InAlN/GaN. To approach this problem, the authors fabricated metal-insulator-semiconductor heterojunction (MISH) capacitors with ternary dielectrics Ti-Al-O of various compositions, deposited by atomic layer deposition (ALD). The film deposition was achieved by alternating cycles of TiO2 and Al2O3 using different ratios of ALD cycles. TiO2 was also deposited as a reference sample. The electrical characterization of the MISH capacitors shows an overall better performance of ternary compounds compared to the pure TiO2. The gate leakage current density decreases with increasing Al content, being similar to 2-3 orders of magnitude lower for a TiO2:Al2O3 cycle ratio of 2:1. Although the dielectric constant has the highest value of 79 for TiO2 and decreases with increasing the number of Al2O3 cycles, it is maintaining a relatively high value compared to an Al2O3 film. Capacitance voltage sweeps were also measured in order to characterize the interface trap density. A decreasing trend in the interface trap density was found while increasing Al content in the film. In conclusion, our study reveals that the desired high-kappa properties of TiO2 can be adequately maintained while improving other insulator performance factors. The ternary compounds may be an excellent choice as a gate material for both

  9. Channel shape and interpoly dielectric material effects on electrical characteristics of floating-gate-type three-dimensional fin channel flash memories

    Science.gov (United States)

    Liu, Yongxun; Nabatame, Toshihide; Nguyen, Num; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Ishikawa, Yuki; Mizubayashi, Wataru; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Chikyow, Toyohiro; Masahara, Meishoku

    2015-04-01

    Floating-gate (FG)-type three-dimensional (3D) fin channel flash memories with triangular fin (TF) and rectangular fin (RF) channels and different interpoly dielectric (IPD) materials have been successfully fabricated using (100)- and (110)-oriented silicon-on-insulator (SOI) wafers and orientation-dependent wet etching. The electrical characteristics of the fabricated FG-type 3D fin channel flash memories including threshold voltage (Vt) variability, program/erase (P/E) speed, memory window, endurance, and data retention at room temperature and 85 °C have been comparatively investigated. A higher P/E speed, a larger memory window, and a lower-voltage operation are experimentally obtained in the TF channel flash memories with an Al2O3-nitride-oxide (ANO) IPD layer (TF-ANO) than in the RF channel ones with the same ANO IPD layer (RF-ANO) and the TF channel ones with an oxide-nitride-oxide (ONO) IPD layer (TF-ONO). The larger memory window and lower-voltage operation of TF-ANO flash memories are due to the high-k effect of the Al2O3 layer and the electric field enhancement at the sharp foot edges of the TF channels. It was also found that data retention for all fabricated FG-type 3D fin channel flash memories shows a weak dependence on temperature.

  10. Impact of Gd2O3 passivation layer on interfacial and electrical properties of atomic-layer-deposited ZrO2 gate dielectric on GaAs

    Science.gov (United States)

    Gong, Youpin; Zhai, Haifa; Liu, Xiaojie; Kong, Jizhou; Wu, Di; Li, Aidong

    2014-02-01

    ZrO2 gate dielectric films were fabricated on n-GaAs substrates by atomic layer deposition (ALD), using metal organic chemical vapor deposition (MOCVD)-derived ultrathin Gd2O3 film as interfacial control layer between ZrO2 and n-GaAs. The interfacial structure, capacitance-voltage and current-voltage properties of ZrO2/n-GaAs and ZrO2/Gd2O3/n-GaAs metal-oxide-semiconductor (MOS) capacitors have been investigated. The introduction of an ultrathin Gd2O3 control layer can effectively suppress the formation of As oxides and high valence Ga oxide at the high k/GaAs interface which evidently improved the electrical properties of GaAs-based MOS capacitors, such as higher accumulation capacitance and lower leakage current density. It was found that the current conduction mechanism of MOS capacitors varied from Poole-Frenkel emission to Schottky-Richardson emission after introducing the thin Gd2O3 layer. The band alignments of interfaces for ZrO2/GaAs and ZrO2/Gd2O3/GaAs were established, which indicates that the conduction band offset (CBO) for ZrO2/GaAs and ZrO2/Gd2O3/GaAs stacks are ˜1.45 and ˜1.62 eV, correspondingly.

  11. Synthesis and electrical characterization of low-temperature thermal-cured epoxy resin/functionalized silica hybrid-thin films for application as gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Na, Moonkyong, E-mail: nmk@keri.re.kr [HVDC Research Division, Korea Electrotechnology Research Institute, Changwon, 642-120 (Korea, Republic of); System on Chip Chemical Process Research Center, Department of Chemical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, 790-784 (Korea, Republic of); Kang, Young Taec [Creative and Fundamental Research Division, Korea Electrotechnology Research Institute, Changwon, 642-120 (Korea, Republic of); Department of Polymer Science and Engineering, Pusan National University, Busan, 609-735 (Korea, Republic of); Kim, Sang Cheol [HVDC Research Division, Korea Electrotechnology Research Institute, Changwon, 642-120 (Korea, Republic of); Kim, Eun Dong [Creative and Fundamental Research Division, Korea Electrotechnology Research Institute, Changwon, 642-120 (Korea, Republic of)

    2013-07-31

    Thermal-cured hybrid materials were synthesized from homogenous hybrid sols of epoxy resins and organoalkoxysilane-functionalized silica. The chemical structures of raw materials and obtained hybrid materials were characterized using Fourier transform infrared spectroscopy. The thermal resistance of the hybrids was enhanced by hybridization. The interaction between epoxy matrix and the silica particles, which caused hydrogen bonding and van der Waals force was strengthened by organoalkoxysilane. The degradation temperature of the hybrids was improved by approximately 30 °C over that of the parent epoxy material. The hybrid materials were formed into uniformly coated thin films of about 50 nm-thick using a spin coater. An optimum mixing ratio was used to form smooth-surfaced hybrid films. The electrical property of the hybrid film was characterized, and the leakage current was found to be well below 10{sup −6} A cm{sup −2}. - Highlights: • Preparation of thermal-curable hybrid materials using epoxy resin and silica. • The thermal stability was enhanced through hybridization. • The insulation property of hybrid film was investigated as gate dielectrics.

  12. ALD TiO x as a top-gate dielectric and passivation layer for InGaZnO115 ISFETs

    Science.gov (United States)

    Pavlidis, S.; Bayraktaroglu, B.; Leedy, K.; Henderson, W.; Vogel, E.; Brand, O.

    2017-11-01

    The suitability of atomic layer deposited (ALD) titanium oxide (TiO x ) as a top gate dielectric and passivation layer for indium gallium zinc oxide (InGaZnO115) ion sensitive field effect transistors (ISFETs) is investigated. TiO x is an attractive barrier material, but reports of its use for InGaZnO thin film transistor (TFT) passivation have been conflicting thus far. In this work, it is found that the passivated TFT’s behavior depends on the TiO x deposition temperature, affecting critical device characteristics such as threshold voltage, field-effect mobility and sub-threshold swing. An O2 annealing step is required to recover TFT performance post passivation. It is also observed that the positive bias stress response of the passivated TFTs improves compared the original bare device. Secondary ion mass spectroscopy excludes the effects of hydrogen doping and inter-diffusion as sources of the temperature-dependent performance change, therefore indicating that oxygen gettering induced by TiO x passivation is the likely source of oxygen vacancies and, consequently, carriers in the InGaZnO film. It is also shown that potentiometric sensing using ALD TiO x exhibits a near Nernstian response to pH change, as well as minimizes V TH drift in TiO x passivated InGaZnO TFTs immersed in an acidic liquid. These results add to the understanding of InGaZnO passivation effects and underscore the potential for low-temperature fabricated InGaZnO ISFETs to be used as high-performance mobile chemical sensors.

  13. Electrical characteristics of AlO sub x N sub y prepared by oxidation of sub-10-nm-thick AlN films for MOS gate dielectric applications

    CERN Document Server

    Jeon, S H; Kim, H S; Noh, D Y; Hwang, H S

    2000-01-01

    In this research, the feasibility of ultrathin AlO sub x N sub y prepared by oxidation of sub 100-A-thick AlN thin films for metal-oxide-semiconductor (MOS) gate dielectric applications was investigated. Oxidation of 51-A-and 98-A-thick as-deposited AlN at 800 .deg. C was used to form 72-A-and 130-A-thick AlO sub x N sub y , respectively. Based on the capacitance-voltage (C-V) measurements of the MOS capacitor, the dielectric constants of 72 A-thick and 130 A-thick Al-oxynitride were 5.15 and 7, respectively. The leakage current of Al-oxynitride at low field was almost the same as that of thermal SiO sub 2. based on the CV data, the interface state density of Al-oxynitride was relatively higher than that of SiO sub 2. Although process optimization is still necessary, the Al-oxynitride exhibits some possibility for future MOS gate dielectric applications.

  14. Properties of the c-Si/Al2O3 interface of ultrathin atomic layer deposited Al2O3 layers capped by SiNx for c-Si surface passivation

    Science.gov (United States)

    Schuldis, D.; Richter, A.; Benick, J.; Saint-Cast, P.; Hermle, M.; Glunz, S. W.

    2014-12-01

    This work presents a detailed study of c-Si/Al2O3 interfaces of ultrathin Al2O3 layers deposited with atomic layer deposition (ALD), and capped with SiNx layers deposited with plasma-enhanced chemical vapor deposition. A special focus was the characterization of the fixed charge density of these dielectric stacks and the interface defect density as a function of the Al2O3 layer thickness for different ALD Al2O3 deposition processes (plasma-assisted ALD and thermal ALD) and different thermal post-deposition treatments. Based on theoretical calculations with the extended Shockley-Read-Hall model for surface recombination, these interface properties were found to explain well the experimentally determined surface recombination. Thus, these interface properties provide fundamental insights into to the passivation mechanisms of these Al2O3/SiNx stacks, a stack system highly relevant, particularly for high efficiency silicon solar cells. Based on these findings, it was also possible to improve the surface passivation quality of stacks with thermal ALD Al2O3 by oxidizing the c-Si surface prior to the Al2O3 deposition.

  15. Control of Ga-oxide interlayer growth and Ga diffusion in SiO2/GaN stacks for high-quality GaN-based metal–oxide–semiconductor devices with improved gate dielectric reliability

    Science.gov (United States)

    Yamada, Takahiro; Watanabe, Kenta; Nozaki, Mikito; Yamada, Hisashi; Takahashi, Tokio; Shimizu, Mitsuaki; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

    2018-01-01

    A simple and feasible method for fabricating high-quality and highly reliable GaN-based metal–oxide–semiconductor (MOS) devices was developed. The direct chemical vapor deposition of SiO2 films on GaN substrates forming Ga-oxide interlayers was carried out to fabricate SiO2/GaO x /GaN stacked structures. Although well-behaved hysteresis-free GaN-MOS capacitors with extremely low interface state densities below 1010 cm‑2 eV‑1 were obtained by postdeposition annealing, Ga diffusion into overlying SiO2 layers severely degraded the dielectric breakdown characteristics. However, this problem was found to be solved by rapid thermal processing, leading to the superior performance of the GaN-MOS devices in terms of interface quality, insulating property, and gate dielectric reliability.

  16. Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er2O3 as a gate dielectric

    International Nuclear Information System (INIS)

    Lin, Ray-Ming; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

    2013-01-01

    In this study, the rare earth erbium oxide (Er 2 O 3 ) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N t ) of the MOS–HEMT were 125 mV/decade and 4.3 × 10 12 cm −2 , respectively. The dielectric constant of the Er 2 O 3 layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er 2 O 3 MOS–HEMT. - Highlights: ► GaN/AlGaN/Er 2 O 3 metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er 2 O 3 with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I ON /I OFF ratio

  17. Application of deposited by ALD HfO2 and Al2O3 layers in double-gate dielectric stacks for non-volatile semiconductor memory (NVSM) devices

    International Nuclear Information System (INIS)

    Mroczyński, Robert; Taube, Andrzej; Gierałtowska, Sylwia; Guziewicz, Elżbieta; Godlewski, Marek

    2012-01-01

    The feasibility of the application of double-gate dielectric stacks with fabricated by atomic layer deposited (ALD) HfO 2 and Al 2 O 3 layers in non-volatile semiconductor memory (NVSM) devices was investigated. Significant improvement in retention at elevated temperatures after the application of ALD high-k oxides was demonstrated. Superior memory window (extrapolated at 10 years) of flat-band voltage (U fb ) value of the order of 2.6 V and 4.55 V at 85 °C, for stack with HfO 2 and Al 2 O 3 , respectively, was obtained. Moreover, the analysis of conduction mechanisms in the investigated stacks under negative voltage revealed F-N tunneling in the range of high values of electric field intensity and lowering of barrier height with increasing temperature.

  18. Improved linearity and reliability in GaN metal-oxide-semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric

    Science.gov (United States)

    Hsu, Ching-Hsiang; Shih, Wang-Cheng; Lin, Yueh-Chin; Hsu, Heng-Tung; Hsu, Hisang-Hua; Huang, Yu-Xiang; Lin, Tai-Wei; Wu, Chia-Hsun; Wu, Wen-Hao; Maa, Jer-Shen; Iwai, Hiroshi; Kakushima, Kuniyuki; Chang, Edward Yi

    2016-04-01

    Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated.

  19. Oxide Charge Engineering of Atomic Layer Deposited AlOxNy/Al2O3 Gate Dielectrics: A Path to Enhancement Mode GaN Devices.

    Science.gov (United States)

    Negara, M A; Kitano, M; Long, R D; McIntyre, P C

    2016-08-17

    Nitrogen incorporation to produce negative fixed charge in Al2O3 gate insulator layers is investigated as a path to achieve enhancement mode GaN device operation. A uniform distribution of nitrogen across the resulting AlOxNy films is obtained using N2 plasma enhanced atomic layer deposition (ALD). The flat band voltage (Vfb) increases to a significantly more positive value with increasing nitrogen concentration. Insertion of a 2 nm thick Al2O3 interlayer greatly decreases the trap density of the insulator/GaN interface, and reduces the voltage hysteresis and frequency dispersion of gate capacitance compared to single-layer AlOxNy gate insulators in GaN MOSCAPs.

  20. Surface Decoration on Polymeric Gate Dielectrics for Flexible Organic Field-Effect Transistors via Hydroxylation and Subsequent Monolayer Self-Assembly.

    Science.gov (United States)

    Yan, Yan; Huang, Long-Biao; Zhou, Ye; Han, Su-Ting; Zhou, Li; Sun, Qijun; Zhuang, Jiaqing; Peng, Haiyan; Yan, He; Roy, V A L

    2015-10-28

    A simple photochemical reaction based on confined photocatalytic oxidation (CPO) treatment and hydrolysis was employed to efficiently convert C-H bonds into C-OH groups on polymeric material surfaces, followed by investigation of monolayer self-assembly decoration on polymeric dielectrics via chemical bonding for the organic field-effect transistors (OFETs) applications. This method is a low temperature process and has negligible etching effect on polymeric dielectric layers. Various types of self-assembled monolayers have been tested and successfully attached onto the hydroxylated polymeric dielectric surfaces through chemical bonding, ensuring the stability of decorated functional films during the subsequent device fabrication consisting of solution processing of the polymer active layer. With the surface decoration of functional groups, both n-type and p-type polymers exhibit enhanced carrier mobilities in the unipolar OFETs. In addition, enhanced and balanced mobilities are obtained in the ambipolar OFETs with the blend of polymer semiconductors. The anchored self-assembled monolayers on the dielectric surfaces dramatically preclude the solvent effect, thus enabling an improvement of carrier mobility up to 2 orders of magnitude. Our study opens a way of targeted modifications of polymeric surfaces and related applications in organic electronics.

  1. The SiNx films process research by plasma-enhanced chemical vapor deposition in crystalline silicon solar cells

    Science.gov (United States)

    Chen, Bitao; Zhang, Yingke; Ouyang, Qiuping; Chen, Fei; Zhan, Xinghua; Gao, Wei

    2017-07-01

    SiNx thin film has been widely used in crystalline silicon solar cell production because of the good anti-reflection and passivation effect. We can effectively optimize the cells performance by plasma-enhanced chemical vapor deposition (PECVD) method to change deposition conditions such as temperature, gas flow ratio, etc. In this paper, we deposit a new layer of SiNx thin film on the basis of double-layers process. By changing the process parameters, the compactness of thin films is improved effectively. The NH3 passivation technology is augmented in a creative way, which improves the minority carrier lifetime. In sight of this, a significant increase is generated in the photoelectric performance of crystalline silicon solar cell.

  2. Energy-band alignment of (HfO2)x(Al2O3)1-x gate dielectrics deposited by atomic layer deposition on β-Ga2O3 (-201)

    Science.gov (United States)

    Yuan, Lei; Zhang, Hongpeng; Jia, Renxu; Guo, Lixin; Zhang, Yimen; Zhang, Yuming

    2018-03-01

    Energy band alignments between series band of Al-rich high-k materials (HfO2)x(Al2O3)1-x and β-Ga2O3 are investigated using X-Ray Photoelectron Spectroscopy (XPS). The results exhibit sufficient conduction band offsets (1.42-1.53 eV) in (HfO2)x(Al2O3)1-x/β-Ga2O3. In addition, it is also obtained that the value of Eg, △Ec, and △Ev for (HfO2)x(Al2O3)1-x/β-Ga2O3 change linearly with x, which can be expressed by 6.98-1.27x, 1.65-0.56x, and 0.48-0.70x, respectively. The higher dielectric constant and higher effective breakdown electric field of (HfO2)x(Al2O3)1-x compared with Al2O3, coupled with sufficient barrier height and lower gate leakage makes it a potential dielectric for high voltage β-Ga2O3 power MOSFET, and also provokes interest in further investigation of HfAlO/β-Ga2O3 interface properties.

  3. Subthreshold swing improvement in MoS2transistors by the negative-capacitance effect in a ferroelectric Al-doped-HfO2/HfO2gate dielectric stack.

    Science.gov (United States)

    Nourbakhsh, Amirhasan; Zubair, Ahmad; Joglekar, Sameer; Dresselhaus, Mildred; Palacios, Tomás

    2017-05-11

    Obtaining a subthreshold swing (SS) below the thermionic limit of 60 mV dec -1 by exploiting the negative-capacitance (NC) effect in ferroelectric (FE) materials is a novel effective technique to allow the reduction of the supply voltage and power consumption in field effect transistors (FETs). At the same time, two-dimensional layered semiconductors, such as molybdenum disulfide (MoS 2 ), have been shown to be promising candidates to replace silicon MOSFETs in sub-5 nm-channel technology nodes. In this paper, we demonstrate NC MoS 2 FETs by incorporating a ferroelectric Al-doped HfO 2 (Al : HfO 2 ), a technologically compatible material, in the FET gate stack. Al : HfO 2 thin films were deposited on Si wafers by atomic layer deposition. Voltage amplification up to 1.25 times was observed in a FE bilayer stack of Al : HfO 2 /HfO 2 with a Ni metallic intermediate layer. The minimum SS (SS min ) of the NC-MoS 2 FET built on the FE bilayer improved to 57 mV dec -1 at room temperature, compared with SS min = 67 mV dec -1 for the MoS 2 FET with only HfO 2 as a gate dielectric.

  4. High-permitivity cerium oxide prepared by molecular beam deposition as gate dielectric and passivation layer and applied to AlGaN/GaN power high electron mobility transistor devices

    Science.gov (United States)

    Chiu, Yu Sheng; Liao, Jen Ting; Lin, Yueh Chin; Chien Liu, Shin; Lin, Tai Ming; Iwai, Hiroshi; Kakushima, Kuniyuki; Chang, Edward Yi

    2016-05-01

    High-κ cerium oxide (CeO2) was applied to AlGaN/GaN high-electron-mobility transistors (HEMTs) as a gate insulator and a passivation layer by molecular beam deposition (MBD) for high-power applications. From capacitance-voltage (C-V) measurement results, the dielectric constant of the CeO2 film was 25.2. The C-V curves showed clear accumulation and depletion behaviors with a small hysteresis (20 mV). Moreover, the interface trap density (D it) was calculated to be 5.5 × 1011 eV-1 cm-2 at 150 °C. A CeO2 MOS-HEMT was fabricated and demonstrated a low subthreshold swing (SS) of 87 mV/decade, a high ON/OFF drain current ratio (I ON/I OFF) of 1.14 × 109, and a low gate leakage current density (J leakage) of 2.85 × 10-9 A cm-2 with an improved dynamic ON-resistance (R ON), which is about one order of magnitude lower than that of a conventional HEMT.

  5. Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er{sub 2}O{sub 3} as a gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Lin, Ray-Ming, E-mail: rmlin@mail.cgu.edu.tw; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

    2013-10-01

    In this study, the rare earth erbium oxide (Er{sub 2}O{sub 3}) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N{sub t}) of the MOS–HEMT were 125 mV/decade and 4.3 × 10{sup 12} cm{sup −2}, respectively. The dielectric constant of the Er{sub 2}O{sub 3} layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er{sub 2}O{sub 3} MOS–HEMT. - Highlights: ► GaN/AlGaN/Er{sub 2}O{sub 3} metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er{sub 2}O{sub 3} with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I{sub ON}/I{sub OFF} ratio.

  6. Organic Field-Effect Transistors Based on a Liquid-Crystalline Polymeric Semiconductor using SU-8 Gate Dielectrics onFlexible Substrates

    Directory of Open Access Journals (Sweden)

    Kornelius Tetzner

    2014-10-01

    Full Text Available In this work, the insulating properties of poly(4-vinylphenol (PVP and SU-8 (MicroChem, Westborough, MA, USA dielectrics are analyzed and compared with each other. We further investigate the performance behavior of organic field-effect transistors based on a semiconducting liquid-crystal polymer (LCP using both dielectric materials and evaluate the results regarding the processability. Due to the lower process temperature needed for the SU-8 deposition, the realization of organic transistors on flexible substrates is demonstrated showing comparable charge carrier mobilities to devices using PVP on glass. In addition, a µ-dispensing procedure of the LCP on SU-8 is presented, improving the switching behavior of the organic transistors, and the promising stability data of the SU-8/LCP stack are verified after storing the structures for 60 days in ambient air showing negligible irreversible degradation of the organic semiconductor.

  7. The low threshold voltage n-type silicon transistors based on a polymer/silica nanocomposite gate dielectric: The effect of annealing temperatures on their operation

    Science.gov (United States)

    Hashemi, Adeleh; Bahari, Ali; Ghasemi, Shahram

    2017-09-01

    In this work, povidone/silica nanocomposite dielectric layers were deposited on the n-type Si (100) substrates for application in n-type silicon field-effect transistors (FET). Thermogravimetric analysis (TGA) indicated that strong chemical interactions between polymer and silica nanoparticles were created. In order to examine the effect of annealing temperatures on chemical interactions and nanostructure properties, annealing process was done at 423-513 K. Atomic force microscopy (AFM) images show the very smooth surfaces with very low surface roughness (0.038-0.088 nm). The Si2p and C1s core level photoemission spectra were deconvoluted to the chemical environments of Si and C atoms respectively. The obtained results of deconvoluted X-ray photoelectron spectroscopy (XPS) spectra revealed a high percentage of silanol hydrogen bonds in the sample which was not annealed. These bonds were inversed to stronger covalence bonds (siloxan bonds) at annealing temperature of 423 K. By further addition of temperature, siloxan bonds were shifted to lower binding energy of about 1 eV and their intensity were abated at annealing temperature of 513 K. The electrical characteristics were extracted from current-Voltage (I-V) and capacitance-voltage (C-V) measurements in metal-insulator-semiconductor (MIS) structure. The all n-type Si transistors showed very low threshold voltages (-0.24 to 1 V). The formation of the strongest cross-linking at nanostructure of dielectric film annealed at 423 K caused resulted in an un-trapped path for the transport of charge carriers yielding the lowest threshold voltage (0.08 V) and the highest electron mobility (45.01 cm2/V s) for its FET. By increasing the annealing temperature (473 and 513 K) on the nanocomposite dielectric films, the values of the average surface roughness, the capacitance and the FET threshold voltage increased and the value of FET electron field-effect mobility decreased.

  8. Effects of Gate Stack Structural and Process Defectivity on High-k Dielectric Dependence of NBTI Reliability in 32 nm Technology Node PMOSFETs

    Directory of Open Access Journals (Sweden)

    H. Hussin

    2014-01-01

    Full Text Available We present a simulation study on negative bias temperature instability (NBTI induced hole trapping in E′ center defects, which leads to depassivation of interface trap precursor in different geometrical structures of high-k PMOSFET gate stacks using the two-stage NBTI model. The resulting degradation is characterized based on the time evolution of the interface and hole trap densities, as well as the resulting threshold voltage shift. By varying the physical thicknesses of the interface silicon dioxide (SiO2 and hafnium oxide (HfO2 layers, we investigate how the variation in thickness affects hole trapping/detrapping at different stress temperatures. The results suggest that the degradations are highly dependent on the physical gate stack parameters for a given stress voltage and temperature. The degradation is more pronounced by 5% when the thicknesses of HfO2 are increased but is reduced by 11% when the SiO2 interface layer thickness is increased during lower stress voltage. However, at higher stress voltage, greater degradation is observed for a thicker SiO2 interface layer. In addition, the existence of different stress temperatures at which the degradation behavior differs implies that the hole trapping/detrapping event is thermally activated.

  9. Molecular-beam-deposited yttrium-oxide dielectrics in aluminum-gated metal - oxide - semiconductor field-effect transistors: Effective electron mobility

    International Nuclear Information System (INIS)

    Ragnarsson, L.-A degree.; Guha, S.; Copel, M.; Cartier, E.; Bojarczuk, N. A.; Karasinski, J.

    2001-01-01

    We report on high effective mobilities in yttrium-oxide-based n-channel metal - oxide - semiconductor field-effect transistors (MOSFETs) with aluminum gates. The yttrium oxide was grown in ultrahigh vacuum using a reactive atomic-beam-deposition system. Medium-energy ion-scattering studies indicate an oxide with an approximate composition of Y 2 O 3 on top of a thin layer of interfacial SiO 2 . The thickness of this interfacial oxide as well as the effective mobility are found to be dependent on the postgrowth anneal conditions. Optimum conditions result in mobilities approaching that of SiO 2 -based MOSFETs at higher fields with peak mobilities at approximately 210 cm 2 /Vs. [copyright] 2001 American Institute of Physics

  10. Gate induced drain leakage reduction with analysis of gate fringing field effect on high-κ/metal gate CMOS technology

    Science.gov (United States)

    Jang, Esan; Shin, Sunhae; Jung, Jae Won; Rok Kim, Kyung

    2015-06-01

    We suggest the optimum permittivity for a high-κ/metal gate (HKMG) CMOS structure based on the trade-off characteristics between the fringing field induced barrier lowering (FIBL) and gate induced drain leakage (GIDL). By adopting the high-κ gate dielectric, the GIDL from the band-to-band tunneling at the interface of gate and lightly doped drain (LDD) is suppressed with wide tunneling width owing to the enhanced fringing field, while the FIBL effects is degenerated as the previous reports. These two effects from the gate fringing field are studied extensively to manage the leakage current of HKMG for low power applications.

  11. A novel trench gate MOSFET with a multiple-layered gate oxide for high-reliability operation

    International Nuclear Information System (INIS)

    Kim, Sang Gi; Kah, Dong Ha; Na, Kyoung Il; Yang, Yil Suk; Koo, Jin Gun; Kim, Jong Dae; Lee, Jin Ho; Park, Hoon Soo

    2012-01-01

    Gate dielectrics in trench structures for trench gate metal oxide semiconductor field-effect transistor (MOSFET) power devices are very important to realize excellent characteristics. In this paper we describe multiple-layer gate dielectrics for trench gate MOSFETs with both thermal and chemical vapor deposition (CVD) gate oxides that exhibit excellent gate oxide properties and surface roughness. Through various trench etching experiments for better surface conditions in the trench, the optimum etching gas chemistry and etch conditions were found. The destruction of gate dielectric in trench gate MOSFET occurs at the top and the bottom trench corner edges. The structure of the gate electrode is pulled out with the polysilicon layer which is buried in the trench. Thus, high electric field operation is inevitable at the gate between source diffusion and the gate polysilicon. Moreover, the trench corner oxide suffers from the high electric field. We propose a multiple-gate dielectric structure of a thermal oxide and CVD oxide for highly reliable operation of the device. This enables trench surface smoothing and low thermal stress at the trench corners and provides the oxide thickness uniformity, giving superior device characteristics of high breakdown voltage and low leakage current. These improvements are caused by the excellent quality of the gate oxide and the good thickness uniformity that is formed at the inner trench with a specific geometrical factor.

  12. Surface properties of SiO2 with and without H2O2 treatment as gate dielectrics for pentacene thin-film transistor applications

    Science.gov (United States)

    Hung, Cheng-Chun; Lin, Yow-Jon

    2018-01-01

    The effect of H2O2 treatment on the surface properties of SiO2 is studied. H2O2 treatment leads to the formation of Si(sbnd OH)x at the SiO2 surface that serves to reduce the number of trap states, inducing the shift of the Fermi level toward the conduction band minimum. H2O2 treatment also leads to a noticeable reduction in the value of the SiO2 capacitance per unit area. The effect of SiO2 layers with H2O2 treatment on the behavior of carrier transports for the pentacene/SiO2-based organic thin-film transistor (OTFT) is also studied. Experimental identification confirms that the shift of the threshold voltage towards negative gate-source voltages is due to the reduced number of trap states in SiO2 near the pentacene/SiO2 interface. The existence of a hydrogenated layer between pentacene and SiO2 leads to a change in the pentacene-SiO2 interaction, increasing the value of the carrier mobility.

  13. Processing and performance of organic insulators as a gate layer in ...

    Indian Academy of Sciences (India)

    methylmethacrylate) (PMMA), as a gate layer in pentacene-based organic thin film transistor on PET substrate. We have used thermogravimetric analysis of organic dielectric solution to determine annealing temperature for spin-coated films of these dielectrics.

  14. Dielectric strength of SiO2 in a CMOS transistor structure

    International Nuclear Information System (INIS)

    Soden, J.M.

    1979-01-01

    The distribution of experimental dielectric strengths of SiO 2 gate dielectric in a CMOS transistor structure is shown to be composed of a primary, statistically-normal distribution of high dielectric strength and a secondary distribution spread through the lower dielectric strength region. The dielectric strength was not significantly affected by high level (1 x 10 6 RADS (Si)) gamma radiation or high temperature (200 0 C) stress. The primary distribution breakdowns occurred at topographical edges, mainly at the gate/field oxide interface, and the secondary distribution breakdowns occurred at random locations in the central region of the gate

  15. Forward gated-diode method for parameter extraction of MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Zhang Chenfei; He Jin; Wang Guozeng; Yang Zhang; Liu Zhiwei [Peking University Shenzhen SOC Key Laboratory, PKU HKUST Shenzhen Institute, Shenzhen 518057 (China); Ma Chenyue; Guo Xinjie; Zhang Xiufang, E-mail: frankhe@pku.edu.cn [TSRC, Institute of Microelectronics, School of Electronic Engineering and Computer Science, Peking University, Beijing 100871 (China)

    2011-02-15

    The forward gated-diode method is used to extract the dielectric oxide thickness and body doping concentration of MOSFETs, especially when both of the variables are unknown previously. First, the dielectric oxide thickness and the body doping concentration as a function of forward gated-diode peak recombination-generation (R-G) current are derived from the device physics. Then the peak R-G current characteristics of the MOSFETs with different dielectric oxide thicknesses and body doping concentrations are simulated with ISE-Dessis for parameter extraction. The results from the simulation data demonstrate excellent agreement with those extracted from the forward gated-diode method. (semiconductor devices)

  16. Surface passivation of n-type c-Si wafers by a-Si/SiO2/SiNx stack with <1 cm/s effective surface recombination velocity

    Science.gov (United States)

    Herasimenka, Stanislau Y.; Tracy, Clarence J.; Sharma, Vivek; Vulic, Natasa; Dauksher, William J.; Bowden, Stuart G.

    2013-10-01

    The passivation quality of an a-Si/SiO2/SiNx (aSON) stack deposited by conventional PECVD at corona charging of SiNx is presented. textured n-type Czochralski (CZ) substrates. It was shown that very good passivation can be achieved using 60 ms on 5000 Ω-cm and 20.9 ms on 1.7 Ω-cm mirror polished float zone (FZ) material passivated with aSON stacks.

  17. Dielectric Metamaterials

    Science.gov (United States)

    2015-05-29

    Final Report  29 May 2015 Dielectric Metamaterials SRI Project P21340 ONR Contract N00014-12-1-0722 Prepared by: Srini Krishnamurthy...2 2. Theory of Metamaterials ....................................................................................................... 2 2.1...accurately assess the impact of various forms of disorder on metamaterials (MMs) (both dielectric and metal inclusions); and (5) identify designs

  18. Linear gate

    International Nuclear Information System (INIS)

    Suwono.

    1978-01-01

    A linear gate providing a variable gate duration from 0,40μsec to 4μsec was developed. The electronic circuity consists of a linear circuit and an enable circuit. The input signal can be either unipolar or bipolar. If the input signal is bipolar, the negative portion will be filtered. The operation of the linear gate is controlled by the application of a positive enable pulse. (author)

  19. Thermal expansion coefficient and thermomechanical properties of SiN(x) thin films prepared by plasma-enhanced chemical vapor deposition.

    Science.gov (United States)

    Tien, Chuen-Lin; Lin, Tsai-Wei

    2012-10-20

    We present a new method based on fast Fourier transform (FFT) for evaluating the thermal expansion coefficient and thermomechanical properties of thin films. The silicon nitride thin films deposited on Corning glass and Si wafers were prepared by plasma-enhanced chemical vapor deposition in this study. The anisotropic residual stress and thermomechanical properties of silicon nitride thin films were studied. Residual stresses in thin films were measured by a modified Michelson interferometer associated with the FFT method under different heating temperatures. We found that the average residual-stress value increases when the temperature increases from room temperature to 100°C. Increased substrate temperature causes the residual stress in SiN(x) film deposited on Si wafers to be more compressive, but the residual stress in SiN(x) film on Corning glass becomes more tensile. The residual-stress versus substrate-temperature relation is a linear correlation after heating. A double substrate technique is used to determine the thermal expansion coefficients of the thin films. The experimental results show that the thermal expansion coefficient of the silicon nitride thin films is 3.27×10(-6)°C(-1). The biaxial modulus is 1125 GPa for SiN(x) film.

  20. Comparative analysis of the effects of tantalum doping and annealing on atomic layer deposited (Ta2O5)x(Al2O3)1-x as potential gate dielectrics for GaN/AlxGa1-xN/GaN high electron mobility transistors

    Science.gov (United States)

    Partida-Manzanera, T.; Roberts, J. W.; Bhat, T. N.; Zhang, Z.; Tan, H. R.; Dolmanan, S. B.; Sedghi, N.; Tripathy, S.; Potter, R. J.

    2016-01-01

    This paper describes a method to optimally combine wide band gap Al2O3 with high dielectric constant (high-κ) Ta2O5 for gate dielectric applications. (Ta2O5)x(Al2O3)1-x thin films deposited by thermal atomic layer deposition (ALD) on GaN-capped AlxGa1-xN/GaN high electron mobility transistor (HEMT) structures have been studied as a function of the Ta2O5 molar fraction. X-ray photoelectron spectroscopy shows that the bandgap of the oxide films linearly decreases from 6.5 eV for pure Al2O3 to 4.6 eV for pure Ta2O5. The dielectric constant calculated from capacitance-voltage measurements also increases linearly from 7.8 for Al2O3 up to 25.6 for Ta2O5. The effect of post-deposition annealing in N2 at 600 °C on the interfacial properties of undoped Al2O3 and Ta-doped (Ta2O5)0.12(Al2O3)0.88 films grown on GaN-HEMTs has been investigated. These conditions are analogous to the conditions used for source/drain contact formation in gate-first HEMT technology. A reduction of the Ga-O to Ga-N bond ratios at the oxide/HEMT interfaces is observed after annealing, which is attributed to a reduction of interstitial oxygen-related defects. As a result, the conduction band offsets (CBOs) of the Al2O3/GaN-HEMT and (Ta2O5)0.16(Al2O3)0.84/GaN-HEMT samples increased by ˜1.1 eV to 2.8 eV and 2.6 eV, respectively, which is advantageous for n-type HEMTs. The results demonstrate that ALD of Ta-doped Al2O3 can be used to control the properties of the gate dielectric, allowing the κ-value to be increased, while still maintaining a sufficient CBO to the GaN-HEMT structure for low leakage currents.

  1. Comparative analysis of the effects of tantalum doping and annealing on atomic layer deposited (Ta2O5)x(Al2O3)1−x as potential gate dielectrics for GaN/AlxGa1−xN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Partida-Manzanera, T.; Roberts, J. W.; Sedghi, N.; Potter, R. J.; Bhat, T. N.; Zhang, Z.; Tan, H. R.; Dolmanan, S. B.; Tripathy, S.

    2016-01-01

    This paper describes a method to optimally combine wide band gap Al 2 O 3 with high dielectric constant (high-κ) Ta 2 O 5 for gate dielectric applications. (Ta 2 O 5 ) x (Al 2 O 3 ) 1−x thin films deposited by thermal atomic layer deposition (ALD) on GaN-capped Al x Ga 1−x N/GaN high electron mobility transistor (HEMT) structures have been studied as a function of the Ta 2 O 5 molar fraction. X-ray photoelectron spectroscopy shows that the bandgap of the oxide films linearly decreases from 6.5 eV for pure Al 2 O 3 to 4.6 eV for pure Ta 2 O 5 . The dielectric constant calculated from capacitance-voltage measurements also increases linearly from 7.8 for Al 2 O 3 up to 25.6 for Ta 2 O 5 . The effect of post-deposition annealing in N 2 at 600 °C on the interfacial properties of undoped Al 2 O 3 and Ta-doped (Ta 2 O 5 ) 0.12 (Al 2 O 3 ) 0.88 films grown on GaN-HEMTs has been investigated. These conditions are analogous to the conditions used for source/drain contact formation in gate-first HEMT technology. A reduction of the Ga-O to Ga-N bond ratios at the oxide/HEMT interfaces is observed after annealing, which is attributed to a reduction of interstitial oxygen-related defects. As a result, the conduction band offsets (CBOs) of the Al 2 O 3 /GaN-HEMT and (Ta 2 O 5 ) 0.16 (Al 2 O 3 ) 0.84 /GaN-HEMT samples increased by ∼1.1 eV to 2.8 eV and 2.6 eV, respectively, which is advantageous for n-type HEMTs. The results demonstrate that ALD of Ta-doped Al 2 O 3 can be used to control the properties of the gate dielectric, allowing the κ-value to be increased, while still maintaining a sufficient CBO to the GaN-HEMT structure for low leakage currents

  2. Characterizing the effects of free carriers in fully etched, dielectric-clad silicon waveguides

    Science.gov (United States)

    Sharma, Rajat; Puckett, Matthew W.; Lin, Hung-Hsi; Vallini, Felipe; Fainman, Yeshaiahu

    2015-06-01

    We theoretically characterize the free-carrier plasma dispersion effect in fully etched silicon waveguides, with various dielectric material claddings, due to fixed interface charges and trap states at the silicon-dielectric interfaces. The values used for these charges are obtained from the measured capacitance-voltage characteristics of SiO2, SiNx, and Al2O3 thin films deposited on silicon substrates. The effect of the charges on the properties of silicon waveguides is then calculated using the semiconductor physics tool Silvaco in combination with the finite-difference time-domain method solver Lumerical. Our results show that, in addition to being a critical factor in the analysis of such active devices as capacitively driven silicon modulators, this effect should also be taken into account when considering the propagation losses of passive silicon waveguides.

  3. Preparation of B-doped Si quantum dots embedded in SiNx films for Si quantum dot solar cells

    Science.gov (United States)

    Chen, Xiaobo; Yang, Peizhi

    2018-01-01

    Silicon quantum dots (Si-QDs) embedded B-doped SiNx films were fabricated by magnetron co-sputtering. The effects of B content on the structural, optical and electrical properties of the films were studied. The study found that the amount of B dopant has no significant effect on the crystallization characteristics of the films. B atoms may be doped in the Si-QDs or exist in the silicon nitride or the interface between Si-QDs and the matrix. PL intensity increases with increasing B content, but increases at first and then decreases. The conductivity as a function of the dopant concentration increases at first from a value of 2.71 × 10-4 S/cm to 5.83 × 10-2 S/cm until 0.9 at.% and then decreases. By employing B-doped Si-QDs films, Si-QDs/c-Si heterojunction solar cells were fabricated and the effect of B doping concentration on the photovoltaic properties was studied. It was found that, with the increase of B doping amount, the photovoltaic performance is improved, when the B doping amount is 0.9 at.%, the efficiency reaches the highest value of 4.26%.

  4. Mismatch of dielectric constants at the interface of nanometer metal ...

    Indian Academy of Sciences (India)

    A fully self-consistent solution of the coupled Schrödinger–Poisson equations demonstrates that a larger dielectric-constant mismatch between the gate dielectric and silicon substrate can reduce electron density in the channel of a MOS device under inversion bias. Such a reduction in inversion electron density of the ...

  5. Selective femtosecond laser structuring of dielectric thin films with different band gaps: a time-resolved study of ablation mechanisms

    Science.gov (United States)

    Rapp, Stephan; Schmidt, Michael; Huber, Heinz P.

    2016-12-01

    Ultrashort pulse lasers have been increasingly gaining importance for the selective structuring of dielectric thin films in industrial applications. In a variety of works the ablation of thin SiO2 and SiNx films from Si substrates has been investigated with near infrared laser wavelengths with photon energies of about 1.2 eV where both dielectrics are transparent (E_{{gap,SiO2}}≈ 8 eV; E_{{gap,SiN}x}≈ 2.5 eV). In these works it was found that few 100 nm thick SiO2 films are selectively ablated with a "lift-off" initiated by confined laser ablation whereas the SiN_{{x}} films are ablated by a combination of confined and direct laser ablation. In the work at hand, ultrafast pump-probe imaging was applied to compare the laser ablation dynamics of the two thin film systems directly with the uncoated Si substrate—on the same setup and under identical parameters. On the SiO2 sample, results show the pulse absorption in the Si substrate, leading to the confined ablation of the SiO2 layer by the expansion of the substrate. On the SiN_{{x}} sample, direct absorption in the layer is observed leading to its removal by evaporation. The pump-probe measurements combined with reflectivity corrected threshold fluence investigations suggest that melting of the Si substrate is sufficient to initiate the lift-off of an overlaying transparent film—evaporation of the substrate seems not to be necessary.

  6. Processing and performance of organic insulators as a gate layer in ...

    Indian Academy of Sciences (India)

    Although several organic dielectrics have been used as gate insulator, it is difficult to choose one in absence of a comparative study covering processing of dielectric layer on polyethylene terephthalate (PET), characterization of dielectric property, pentacene film morphology and OTFT characterization. Here, we present the ...

  7. Effect of SiNx diffusion barrier thickness on the structural properties and photocatalytic activity of TiO2 films obtained by sol–gel dip coating and reactive magnetron sputtering

    Directory of Open Access Journals (Sweden)

    Mohamed Nawfal Ghazzal

    2015-10-01

    Full Text Available We investigate the effect of the thickness of the silicon nitride (SiNx diffusion barrier on the structural and photocatalytic efficiency of TiO2 films obtained with different processes. We show that the structural and photocatalytic efficiency of TiO2 films produced using soft chemistry (sol–gel and physical methods (reactive sputtering are affected differentially by the intercalating SiNx diffusion barrier. Increasing the thickness of the SiNx diffusion barrier induced a gradual decrease of the crystallite size of TiO2 films obtained by the sol–gel process. However, TiO2 obtained using the reactive sputtering method showed no dependence on the thickness of the SiNx barrier diffusion. The SiNx barrier diffusion showed a beneficial effect on the photocatalytic efficiency of TiO2 films regardless of the synthesis method used. The proposed mechanism leading to the improvement in the photocatalytic efficiency of the TiO2 films obtained by each process was discussed.

  8. Comparative analysis of the effects of tantalum doping and annealing on atomic layer deposited (Ta{sub 2}O{sub 5}){sub x}(Al{sub 2}O{sub 3}){sub 1−x} as potential gate dielectrics for GaN/Al{sub x}Ga{sub 1−x}N/GaN high electron mobility transistors

    Energy Technology Data Exchange (ETDEWEB)

    Partida-Manzanera, T., E-mail: sgtparti@liv.ac.uk [Centre for Materials and Structures, School of Engineering, University of Liverpool, Liverpool, L69 3GH (United Kingdom); Institute of Materials Research and Engineering, A*STAR (Agency for Science, Technology and Research), Innovis, 2 Fusionopolis way, Singapore 138634 (Singapore); Roberts, J. W.; Sedghi, N.; Potter, R. J. [Centre for Materials and Structures, School of Engineering, University of Liverpool, Liverpool, L69 3GH (United Kingdom); Bhat, T. N.; Zhang, Z.; Tan, H. R.; Dolmanan, S. B.; Tripathy, S. [Institute of Materials Research and Engineering, A*STAR (Agency for Science, Technology and Research), Innovis, 2 Fusionopolis way, Singapore 138634 (Singapore)

    2016-01-14

    This paper describes a method to optimally combine wide band gap Al{sub 2}O{sub 3} with high dielectric constant (high-κ) Ta{sub 2}O{sub 5} for gate dielectric applications. (Ta{sub 2}O{sub 5}){sub x}(Al{sub 2}O{sub 3}){sub 1−x} thin films deposited by thermal atomic layer deposition (ALD) on GaN-capped Al{sub x}Ga{sub 1−x}N/GaN high electron mobility transistor (HEMT) structures have been studied as a function of the Ta{sub 2}O{sub 5} molar fraction. X-ray photoelectron spectroscopy shows that the bandgap of the oxide films linearly decreases from 6.5 eV for pure Al{sub 2}O{sub 3} to 4.6 eV for pure Ta{sub 2}O{sub 5}. The dielectric constant calculated from capacitance-voltage measurements also increases linearly from 7.8 for Al{sub 2}O{sub 3} up to 25.6 for Ta{sub 2}O{sub 5}. The effect of post-deposition annealing in N{sub 2} at 600 °C on the interfacial properties of undoped Al{sub 2}O{sub 3} and Ta-doped (Ta{sub 2}O{sub 5}){sub 0.12}(Al{sub 2}O{sub 3}){sub 0.88} films grown on GaN-HEMTs has been investigated. These conditions are analogous to the conditions used for source/drain contact formation in gate-first HEMT technology. A reduction of the Ga-O to Ga-N bond ratios at the oxide/HEMT interfaces is observed after annealing, which is attributed to a reduction of interstitial oxygen-related defects. As a result, the conduction band offsets (CBOs) of the Al{sub 2}O{sub 3}/GaN-HEMT and (Ta{sub 2}O{sub 5}){sub 0.16}(Al{sub 2}O{sub 3}){sub 0.84}/GaN-HEMT samples increased by ∼1.1 eV to 2.8 eV and 2.6 eV, respectively, which is advantageous for n-type HEMTs. The results demonstrate that ALD of Ta-doped Al{sub 2}O{sub 3} can be used to control the properties of the gate dielectric, allowing the κ-value to be increased, while still maintaining a sufficient CBO to the GaN-HEMT structure for low leakage currents.

  9. Photo-Curable Polymer Blend Dielectrics for Advancing Organic Field-Effect Transistor Applications

    Energy Technology Data Exchange (ETDEWEB)

    S Kim; K Hong; M Jang; J Jang; J Anthony; H Yang; C Park

    2011-12-31

    A solution method of photo-curable and -patternable polymer gate dielectrics was introduced by using blend solutions of poly(4-dimethylsilyl styrene) (PDMSS) and poly(melamine-co-formaldehyde) acrylate (PMFA). The fabrication was optimized to produce a smooth hydrophobic gate dielectric with good insulating and solvent-resistant properties. On the optimized PDMSS/PMFA blend gate dielectric, pentacene could grow into highly ordered structure, showing high electric performances for the resulting OFETs, as well as PTCDI-C13 and TES-ADT.

  10. Method and apparatus for measurement of trap density and energy distribution in dielectric films

    Science.gov (United States)

    Maserjian, J. (Inventor)

    1976-01-01

    Trap densities in dielectric films are determined by tunnel injection measurements when the film is incorporated in an insulated-gate field effect transistor. Under applied bias to the transistor gate, carriers (electrons or holes) tunnel into traps in the dielectric film. The resulting space charge tends to change channel conductance. By feeding back a signal from the source contact to the gate electrode, channel conductance is held constant, and by recording the gate voltage as a function of time, trap density can be determined as a function of distance from the dielectric-semiconductor interface. The process is repeated with the gate bias voltage at different levels in order to determine the energy distribution of traps as a function of distance from the interface.

  11. Tunnel field-effect transistor with two gated intrinsic regions

    Directory of Open Access Journals (Sweden)

    Y. Zhang

    2014-07-01

    Full Text Available In this paper, we propose and validate (using simulations a novel design of silicon tunnel field-effect transistor (TFET, based on a reverse-biased p+-p-n-n+ structure. 2D device simulation results show that our devices have significant improvements of switching performance compared with more conventional devices based on p-i-n structure. With independent gate voltages applied to two gated intrinsic regions, band-to-band tunneling (BTBT could take place at the p-n junction, and no abrupt degenerate doping profile is required. We developed single-side-gate (SSG structure and double-side-gate (DSG structure. SSG devices with HfO2 gate dielectric have a point subthreshold swing of 9.58 mV/decade, while DSG devices with polysilicon gate electrode material and HfO2 gate dielectric have a point subthreshold swing of 16.39 mV/decade. These DSG devices have ON-current of 0.255 μA/μm, while that is lower for SSG devices. Having two nano-scale independent gates will be quite challenging to realize with good uniformity across the wafer and the improved behavior of our TFET makes it a promising steep-slope switch candidate for further investigations.

  12. Device characteristics of polymer dual-gate field-effect transistors

    NARCIS (Netherlands)

    Maddalena, F.; Spijkman, M.; Brondijk, J. J.; Fonteijn, P.; Brouwer, F.; Hummelen, J. C.; de Leeuw, D. M.; Blom, P. W. M.; de Boer, B.

    2008-01-01

    Dual-gate organic field-effect transistors (OFETs) were fabricated by solution processing using different p-type polymer semiconductors and polymer top-dielectric materials on prefabricated substrates with gold source-drain contacts defined by photolithography. The semiconductors and top dielectrics

  13. Highly stable carbon nanotube top-gate transistors with tunable threshold voltage

    NARCIS (Netherlands)

    Wang, H.; Cobb, B.; Breemen, A. van; Gelinck, G.H.; Bao, Z.

    2014-01-01

    Carbon-nanotube top-gate transistors with fluorinated dielectrics are presented. With PTrFE as the dielectric, the devices have absent or small hysteresis at different sweep rates and excellent bias-stress stability under ambient conditions. Ambipolar single-walled carbon nanotube (SWNT) transistors

  14. Physical mechanisms of SiNx layer structuring with ultrafast lasers by direct and confined laser ablation

    International Nuclear Information System (INIS)

    Rapp, S.; Heinrich, G.; Wollgarten, M.; Huber, H. P.; Schmidt, M.

    2015-01-01

    In the production process of silicon microelectronic devices and high efficiency silicon solar cells, local contact openings in thin dielectric layers are required. Instead of photolithography, these openings can be selectively structured with ultra-short laser pulses by confined laser ablation in a fast and efficient lift off production step. Thereby, the ultrafast laser pulse is transmitted by the dielectric layer and absorbed at the substrate surface leading to a selective layer removal in the nanosecond time domain. Thermal damage in the substrate due to absorption is an unwanted side effect. The aim of this work is to obtain a deeper understanding of the physical laser-material interaction with the goal of finding a damage-free ablation mechanism. For this, thin silicon nitride (SiN x ) layers on planar silicon (Si) wafers are processed with infrared fs-laser pulses. Two ablation types can be distinguished: The known confined ablation at fluences below 300 mJ/cm 2 and a combined partial confined and partial direct ablation at higher fluences. The partial direct ablation process is caused by nonlinear absorption in the SiN x layer in the center of the applied Gaussian shaped laser pulses. Pump-probe investigations of the central area show ultra-fast reflectivity changes typical for direct laser ablation. Transmission electron microscopy results demonstrate that the Si surface under the remaining SiN x island is not damaged by the laser ablation process. At optimized process parameters, the method of direct laser ablation could be a good candidate for damage-free selective structuring of dielectric layers on absorbing substrates

  15. Breakdown of coupling dielectrics for Si microstrip detectors

    International Nuclear Information System (INIS)

    Candelori, A.; Paccagnella, A.; Padova Univ.; Saglimbeni, G.

    1999-01-01

    Double-layer coupling dielectrics for AC-coupled Si microstrip detectors have been electrically characterized in order to determine their performance in a radiation-harsh environment, with a focus on the dielectric breakdown. Two different dielectric technologies have been investigated: SiO 2 /TEOS and SiO 2 /Si 3 N 4 . Dielectrics have been tested by using a negative gate voltage ramp of 0.2 MV/(cm·s). The metal/insulator/Si I-V characteristics show different behaviours depending on the technology. The extrapolated values of the breakdown field for unirradiated devices are significantly higher for SiO 2 /Si 3 N 4 dielectrics, but the data dispersion is lower for SiO 2 /TEOS devices. No significant variation of the breakdown field has been measured after a 10 Mrad (Si) γ irradiation for SiO 2 /Si 3 N 4 dielectrics. Finally, the SiO 2 /Si 3 N 4 DC conduction is enhanced if a positive gate voltage ramp is applied with respect to the negative one, due to the asymmetric conduction of the double-layer dielectric

  16. Super dielectric capacitor using scaffold dielectric

    OpenAIRE

    Phillips, Jonathan

    2018-01-01

    Patent A capacitor having first and second electrodes and a scaffold dielectric. The scaffold dielectric comprises an insulating material with a plurality of longitudinal channels extending across the dielectric and filled with a liquid comprising cations and anions. The plurality of longitudinal channels are substantially parallel and the liquid within the longitudinal channels generally has an ionic strength of at least 0.1. Capacitance results from the migrations of...

  17. Mismatch of dielectric constants at the interface of nanometer metal ...

    Indian Academy of Sciences (India)

    Abstract. The comparison of the inversion electron density between a nanometer metal-oxide- semiconductor (MOS) device with high-K gate dielectric and a SiO2 MOS device with the same equivalent oxide thickness has been discussed. A fully self-consistent solution of the coupled. Schrödinger–Poisson equations ...

  18. High mobility polymer gated organic field effect transistor using zinc ...

    Indian Academy of Sciences (India)

    Parylene film prepared by chemical vapour deposition was used as the organic gate insulator. ... properties, due to their spatially extended π-electron system ... tronic defects (Gershenson et al 2006). Parylene forms pin hole free, thin conformal transparent coatings with excellent dielectric and mechanical properties ...

  19. Cleaning Challenges of High-κ/Metal Gate Structures

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-12-20

    High-κ/metal gates are used as transistors for advanced logic applications to improve speed and eliminate electrical issues associated with polySi and SiO2 gates. Various integration schemes are possible and will be discussed, such as dual gate, gate-first, and gate-last, both of which require specialized cleaning and etching steps. Specific areas of discussion will include cleaning and conditioning of the silicon surface, forming a high-quality chemical oxide, removal of the high-κ dielectric with selectivity to the SiO2 layer, cleaning and residue removal after etching, and prevention of galvanic corrosion during cleaning. © 2011 Scrivener Publishing LLC. All rights reserved.

  20. Dielectric characterisation of soil

    NARCIS (Netherlands)

    Hilhorst, M.A.

    1998-01-01

    The potential of dielectric measuring techniques for soil characterisation has not been fully explored. This is attributed to the complex and incomplete theory on dielectrics, as well as to the lack of sensors suited for practical applications.

    The theory on dielectric properties of soils is

  1. Radiation sensors based on the generation of mobile protons in organic dielectrics.

    Science.gov (United States)

    Kapetanakis, Eleftherios; Douvas, Antonios M; Argitis, Panagiotis; Normand, Pascal

    2013-06-26

    A sensing scheme based on mobile protons generated by radiation, including ionizing radiation (IonR), in organic gate dielectrics is investigated for the development of metal-insulator-semiconductor (MIS)-type dosimeters. Application of an electric field to the gate dielectric moves the protons and thereby alters the flat band voltage (VFB) of the MIS device. The shift in the VFB is proportional to the IonR-generated protons and, therefore, to the IonR total dose. Triphenylsulfonium nonaflate (TPSNF) photoacid generator (PAG)-containing poly(methyl methacrylate) (PMMA) polymeric films was selected as radiation-sensitive gate dielectrics. The effects of UV (249 nm) and gamma (Co-60) irradiations on the high-frequency capacitance versus the gate voltage (C-VG) curves of the MIS devices were investigated for different total dose values. Systematic improvements in sensitivity can be accomplished by increasing the concentration of the TPSNF molecules embedded in the polymeric matrix.

  2. New gate opening hours

    CERN Multimedia

    GS Department

    2009-01-01

    Please note the new opening hours of the gates as well as the intersites tunnel from the 19 May 2009: GATE A 7h - 19h GATE B 24h/24 GATE C 7h - 9h\t17h - 19h GATE D 8h - 12h\t13h - 16h GATE E 7h - 9h\t17h - 19h Prévessin 24h/24 The intersites tunnel will be opened from 7h30 to 18h non stop. GS-SEM Group Infrastructure and General Services Department

  3. Dielectrics in electric fields

    CERN Document Server

    Raju, Gorur G

    2003-01-01

    Discover nontraditional applications of dielectric studies in this exceptionally crafted field reference or text for seniors and graduate students in power engineering tracks. This text contains more than 800 display equations and discusses polarization phenomena in dielectrics, the complex dielectric constant in an alternating electric field, dielectric relaxation and interfacial polarization, the measurement of absorption and desorption currents in time domains, and high field conduction phenomena. Dielectrics in Electric Fields is an interdisciplinary reference and text for professionals and students in electrical and electronics, chemical, biochemical, and environmental engineering; physical, surface, and colloid chemistry; materials science; and chemical physics.

  4. Reduction of ambipolar characteristics of vertical channel tunneling field-effect transistor by using dielectric sidewall

    International Nuclear Information System (INIS)

    Park, Chun Woong; Cho, Il Hwan; Choi, Woo Young; Lee, Jong-Ho

    2013-01-01

    Ambipolar characteristics of tunneling FETs have been improved by introducing a novel structure which contains dielectric sidewall in the gate region. In the ambipolar operation mode, gate field effect on intrinsic-drain junction region can be reduced with dielectric sidewall. As a result, ambipolar state tunneling probability is decreased at the intrinsic-drain junction. Since the sidewall region is located near the drain region, tunneling probability of source-intrinsic region is not affected by dielectric sidewall. This asymmetric characteristics means only ambipolar current of tunneling FETs can be prohibited by dielectric sidewall. Reduction of ambipolar characteristic of proposed structure has been evaluated with dimension and location of dielectric sidewall. Quantitative analysis of ambipolar characteristics is also investigated with tunneling. (paper)

  5. Lattices of dielectric resonators

    CERN Document Server

    Trubin, Alexander

    2016-01-01

    This book provides the analytical theory of complex systems composed of a large number of high-Q dielectric resonators. Spherical and cylindrical dielectric resonators with inferior and also whispering gallery oscillations allocated in various lattices are considered. A new approach to S-matrix parameter calculations based on perturbation theory of Maxwell equations, developed for a number of high-Q dielectric bodies, is introduced. All physical relationships are obtained in analytical form and are suitable for further computations. Essential attention is given to a new unified formalism of the description of scattering processes. The general scattering task for coupled eigen oscillations of the whole system of dielectric resonators is described. The equations for the  expansion coefficients are explained in an applicable way. The temporal Green functions for the dielectric resonator are presented. The scattering process of short pulses in dielectric filter structures, dielectric antennas  and lattices of d...

  6. Volatile and Nonvolatile Characteristics of Asymmetric Dual-Gate Thyristor RAM with Vertical Structure.

    Science.gov (United States)

    Kim, Hyun-Min; Kwon, Dae Woong; Kim, Sihyun; Lee, Kitae; Lee, Junil; Park, Euyhwan; Lee, Ryoongbin; Kim, Hyungjin; Kim, Sangwan; Park, Byung-Gook

    2018-09-01

    In this paper, the volatile and nonvolatile characteristics of asymmetric dual-gate thyristor random access memory (TRAM) are investigated using the technology of a computer-aided design (TCAD) simulation. Owing to the use of two independent gates having different gate dielectric layers, volatile and nonvolatile memory functions can be realized in a single device. The first gate with a silicon oxide layer controls the one-transistor dynamic random access memory (1T-DRAM) characteristics of the device. From the simulation results, a rapid write speed (107) can be achieved. The second gate, whose dielectric material is composed of oxide/nitride/oxide (O/N/O) layers, is used to implement the nonvolatile property by trapping charges in the nitride layer. In addition, this offers an advantage when processing the 3D-stack memory application, as the device has a vertical channel structure with polycrystalline silicon.

  7. Characterization of dielectric materials

    Energy Technology Data Exchange (ETDEWEB)

    King, Danny J.; Babinec, Susan; Hagans, Patrick L.; Maxey, Lonnie C.; Payzant, Edward A.; Daniel, Claus; Sabau, Adrian S.; Dinwiddie, Ralph B.; Armstrong, Beth L.; Howe, Jane Y.; Wood, III, David L.; Nembhard, Nicole S.

    2017-06-27

    A system and a method for characterizing a dielectric material are provided. The system and method generally include applying an excitation signal to electrodes on opposing sides of the dielectric material to evaluate a property of the dielectric material. The method can further include measuring the capacitive impedance across the dielectric material, and determining a variation in the capacitive impedance with respect to either or both of a time domain and a frequency domain. The measured property can include pore size and surface imperfections. The method can still further include modifying a processing parameter as the dielectric material is formed in response to the detected variations in the capacitive impedance, which can correspond to a non-uniformity in the dielectric material.

  8. Stable Low-Voltage Operation Top-Gate Organic Field-Effect Transistors on Cellulose Nanocrystal Substrates

    Science.gov (United States)

    Cheng-Yin Wang; Canek Fuentes-Hernandez; Jen-Chieh Liu; Amir Dindar; Sangmoo Choi; Jeffrey P. Youngblood; Robert J. Moon; Bernard Kippelen

    2015-01-01

    We report on the performance and the characterization of top-gate organic field-effect transistors (OFETs), comprising a bilayer gate dielectric of CYTOP/ Al2O3 and a solution-processed semiconductor layer made of a blend of TIPS-pentacene:PTAA, fabricated on recyclable cellulose nanocrystal−glycerol (CNC/glycerol...

  9. Resonant dielectric metamaterials

    Science.gov (United States)

    Loui, Hung; Carroll, James; Clem, Paul G; Sinclair, Michael B

    2014-12-02

    A resonant dielectric metamaterial comprises a first and a second set of dielectric scattering particles (e.g., spheres) having different permittivities arranged in a cubic array. The array can be an ordered or randomized array of particles. The resonant dielectric metamaterials are low-loss 3D isotropic materials with negative permittivity and permeability. Such isotropic double negative materials offer polarization and direction independent electromagnetic wave propagation.

  10. Dielectric Transduction of NEMS

    OpenAIRE

    Howell, Kaitlin

    2017-01-01

    We report on a four-mask process flow for creating resonant NanoElectroMechanical Systems (NEMS) based on dielectric transduction. Current transduction mechanisms for NEMS include piezoelectricity, flexoelectricity and dielectric force. While piezoelectricity gives the highest electromechanical efficiency in, NEMS using flexoelectricity and dielectric force are interesting alternatives with a larger range of possible active materials and potentially simpler fabrication. In this four-mask proc...

  11. Role of SiNx Barrier Layer on the Performances of Polyimide Ga2O3-doped ZnO p-i-n Hydrogenated Amorphous Silicon Thin Film Solar Cells

    Directory of Open Access Journals (Sweden)

    Fang-Hsing Wang

    2014-02-01

    Full Text Available In this study, silicon nitride (SiNx thin films were deposited on polyimide (PI substrates as barrier layers by a plasma enhanced chemical vapor deposition (PECVD system. The gallium-doped zinc oxide (GZO thin films were deposited on PI and SiNx/PI substrates at room temperature (RT, 100 and 200 °C by radio frequency (RF magnetron sputtering. The thicknesses of the GZO and SiNx thin films were controlled at around 160 ± 12 nm and 150 ± 10 nm, respectively. The optimal deposition parameters for the SiNx thin films were a working pressure of 800 × 10−3 Torr, a deposition power of 20 W, a deposition temperature of 200 °C, and gas flowing rates of SiH4 = 20 sccm and NH3 = 210 sccm, respectively. For the GZO/PI and GZO-SiNx/PI structures we had found that the GZO thin films deposited at 100 and 200 °C had higher crystallinity, higher electron mobility, larger carrier concentration, smaller resistivity, and higher optical transmittance ratio. For that, the GZO thin films deposited at 100 and 200 °C on PI and SiNx/PI substrates with thickness of ~1000 nm were used to fabricate p-i-n hydrogenated amorphous silicon (α-Si thin film solar cells. 0.5% HCl solution was used to etch the surfaces of the GZO/PI and GZO-SiNx/PI substrates. Finally, PECVD system was used to deposit α-Si thin film onto the etched surfaces of the GZO/PI and GZO-SiNx/PI substrates to fabricate α-Si thin film solar cells, and the solar cells’ properties were also investigated. We had found that substrates to get the optimally solar cells’ efficiency were 200 °C-deposited GZO-SiNx/PI.

  12. C-V characterization of Schottky- and MIS-gate SiGe/Si HEMT structures

    International Nuclear Information System (INIS)

    Onojima, Norio; Kasamatsu, Akihumi; Hirose, Nobumitsu; Mimura, Takashi; Matsui, Toshiaki

    2008-01-01

    Electrical properties of Schottky- and metal-insulator-semiconductor (MIS)-gate SiGe/Si high electron mobility transistors (HEMTs) were investigated with capacitance-voltage (C-V) measurements. The MIS-gate HEMT structure was fabricated using a SiN gate insulator formed by catalytic chemical vapor deposition (Cat-CVD). The Cat-CVD SiN thin film (5 nm) was found to be an effective gate insulator with good gate controllability and dielectric properties. We previously investigated device characteristics of sub-100-nm-gate-length Schottky- and MIS-gate HEMTs, and reported that the MIS-gate device had larger maximum drain current density and transconductance (g m ) than the Schottky-gate device. The radio frequency (RF) measurement of the MIS-gate device, however, showed a relatively lower current gain cutoff frequency f T compared with that of the Schottky-gate device. In this study, C-V characterization of the MIS-gate HEMT structure demonstrated that two electron transport channels existed, one at the SiGe/Si buried channel and the other at the SiN/Si surface channel

  13. Trap behaviours characterization of AlGaN/GaN high electron mobility transistors by room-temperature transient capacitance measurement

    Directory of Open Access Journals (Sweden)

    Bin Dong

    2016-09-01

    Full Text Available In this paper, the trap behaviours in AlGaN/GaN high electron mobility transistors (HEMTs are investigated using transient capacitance measurement. By measuring the transient gate capacitance variance (ΔC with different pulse height, the gate pulse induced trap behaviours in SiNX gate dielectric layer or at the SiNX/AlGaN interface is revealed. Based on the results, a model on electron traps in AlGaN/GaN HEMTs is proposed. The threshold voltage (Vth instability in AlGaN/GaN HEMTs is believed to be correlated with the presence of these traps in SiNX gate dielectric layer or at the SiNX/AlGaN interface. Furthermore, trap density before and after step-stress applied on drain electrode is quantitatively analyzed based on ΔC measurement.

  14. Trap behaviours characterization of AlGaN/GaN high electron mobility transistors by room-temperature transient capacitance measurement

    Science.gov (United States)

    Dong, Bin; Lin, Jie; Wang, Ning; Jiang, Ling-li; Liu, Zong-dai; Hu, Xiaoyan; Cheng, Kai; Yu, Hong-yu

    2016-09-01

    In this paper, the trap behaviours in AlGaN/GaN high electron mobility transistors (HEMTs) are investigated using transient capacitance measurement. By measuring the transient gate capacitance variance (Δ C ) with different pulse height, the gate pulse induced trap behaviours in SiNX gate dielectric layer or at the SiNX/AlGaN interface is revealed. Based on the results, a model on electron traps in AlGaN/GaN HEMTs is proposed. The threshold voltage (Vth) instability in AlGaN/GaN HEMTs is believed to be correlated with the presence of these traps in SiNX gate dielectric layer or at the SiNX/AlGaN interface. Furthermore, trap density before and after step-stress applied on drain electrode is quantitatively analyzed based on Δ C measurement.

  15. Optimal Super Dielectric Material

    Science.gov (United States)

    2015-09-01

    can potentially be optimized to create capacitors with unprecedented energy density. 14. SUBJECT TERMS capacitor , supercapacitor, super ... Capacitor -Increase Area (A)............8 b. Multi-layer Ceramic Capacitor -Decrease Thickness (d) .......10 c. Super Dielectric Material-Increase...EDLC and far above ceramic capacitors , after [5] ............................................9 Table 3. Super Dielectric Material Capacitors from

  16. Contemporary dielectric materials

    CERN Document Server

    Saravanan, R

    2016-01-01

    This book deals with experimental results of the physical characterization of several important, dielectric materials of great current interest. The experimental tools used for the analysis of these materials include X-ray diffraction, dielectric measurements, magnetic measurements using a vibrating sample magnetometer, optical measurements using a UV-Visible spectrometer etc.

  17. Surface properties of dielectrics

    International Nuclear Information System (INIS)

    Le Gressus, C.; Maire, P.; Duraud, J.P.; Lecayon, G.

    1988-03-01

    Importance of defects on dielectric behaviour (breakdown), mechanical behaviour (fracture, adhesion) and thermochemical behaviour of insulating materials is recalled. Then effect of a mechanical stress on breakdown voltage is studied. An experimental verification shows that fracture of Y 2 O 3 is propagated in grain boundaries enriched in oxygen vacancies for a non stoichiometric sample by local variation of dielectric constant [fr

  18. Light in complex dielectrics

    NARCIS (Netherlands)

    Schuurmans, F.J.P.

    1999-01-01

    In this thesis the properties of light in complex dielectrics are described, with the two general topics of "modification of spontaneous emission" and "Anderson localization of light". The first part focuses on the spontaneous emission rate of an excited atom in a dielectric host with variable

  19. Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures

    International Nuclear Information System (INIS)

    Chakraborty, Gargi; Sarkar, C K; Lu, X B; Dai, J Y

    2008-01-01

    The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter

  20. Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures.

    Science.gov (United States)

    Chakraborty, Gargi; Sarkar, C K; Lu, X B; Dai, J Y

    2008-06-25

    The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter.

  1. Properties of low-temperature passivation of silicon with ALD Al2O3 films and their PV applications

    Science.gov (United States)

    Kim, Kwang-Ho; Kim, Hyun-Jun; Jang, Pyungwoo; Jung, Chisup; Seomoon, Kyu

    2011-06-01

    Low-temperature-deposited aluminium oxide (Al2O3) thin films were grown on p-type Si substrates by the remote plasma atomic layer deposition (RPALD) technique. The RPALD technique uses an alternative trimethylaluminum precursor and oxygen radicals to obtain good interface properties for metal-insulatorsemiconductor (MIS) inversion-layer solar cell applications. Si MIS capacitors with ultra-thin Al2O3 (film thickness ranges from 1 nm to 6 nm) gate dielectric and SiNx films were fabricated at 300°C and at room temperature (RT), respectively. Low-temperature-deposited Al2O3 and SiNx films were characterized by electrical properties such as capacitance-voltage (C-V), and current-voltage (I-V). The interface state density (Dit) of the MIS capacitors with SiNx films and without SiNx films was derived from the 1 MHz frequency C-V curves. By using ultra-thin RPALD Al2O3, RT-sputtered SiNx films and a simple fabrication-processing sequence, MIS solar cells were fabricated on 1 Ω·cm to 10 Ω·cm p-Si wafers. The fabricated MIS solar cell with passivated Al2O3 and SiNx films has 8.21% efficiency.

  2. Thin film transistors for flexible electronics: Contacts, dielectrics and semiconductors

    KAUST Repository

    Quevedo-López, Manuel Angel Quevedo

    2011-06-01

    The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed. Copyright © 2011 American Scientific Publishers.

  3. Atomic layer deposition of dielectrics on graphene using reversibly physisorbed ozone.

    Science.gov (United States)

    Jandhyala, Srikar; Mordi, Greg; Lee, Bongki; Lee, Geunsik; Floresca, Carlo; Cha, Pil-Ryung; Ahn, Jinho; Wallace, Robert M; Chabal, Yves J; Kim, Moon J; Colombo, Luigi; Cho, Kyeongjae; Kim, Jiyoung

    2012-03-27

    Integration of graphene field-effect transistors (GFETs) requires the ability to grow or deposit high-quality, ultrathin dielectric insulators on graphene to modulate the channel potential. Here, we study a novel and facile approach based on atomic layer deposition through ozone functionalization to deposit high-κ dielectrics (such as Al(2)O(3)) without breaking vacuum. The underlying mechanisms of functionalization have been studied theoretically using ab initio calculations and experimentally using in situ monitoring of transport properties. It is found that ozone molecules are physisorbed on the surface of graphene, which act as nucleation sites for dielectric deposition. The physisorbed ozone molecules eventually react with the metal precursor, trimethylaluminum to form Al(2)O(3). Additionally, we successfully demonstrate the performance of dual-gated GFETs with Al(2)O(3) of sub-5 nm physical thickness as a gate dielectric. Back-gated GFETs with mobilities of ~19,000 cm(2)/(V·s) are also achieved after Al(2)O(3) deposition. These results indicate that ozone functionalization is a promising pathway to achieve scaled gate dielectrics on graphene without leaving a residual nucleation layer. © 2012 American Chemical Society

  4. Low pull-in voltage electrostatic MEMS switch using liquid dielectric

    KAUST Repository

    Zidan, Mohammed A.

    2014-08-01

    In this paper, we present an electrostatic MEMS switch with liquids as dielectric to reduce the actuation voltage. The concept is verified by simulating a lateral dual gate switch, where the required pull-in voltage is reduced by more than 8 times after using water as a dielectric, to become as low as 5.36V. The proposed switch is simulated using COMSOL multiphysics using various liquid volumes to study their effect on the switching performance. Finally, we propose the usage of the lateral switch as a single switch XOR logic gate.

  5. Improved linearity in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors with nonlinear polarization dielectric

    International Nuclear Information System (INIS)

    Gao, Tao; Xu, Ruimin; Kong, Yuechan; Zhou, Jianjun; Kong, Cen; Dong, Xun; Chen, Tangsheng

    2015-01-01

    We demonstrate highly improved linearity in a nonlinear ferroelectric of Pb(Zr 0.52 Ti 0.48 )-gated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT). Distinct double-hump feature in the transconductance-gate voltage (g m -V g ) curve is observed, yielding remarkable enhancement in gate voltage swing as compared to MIS-HEMT with conventional linear gate dielectric. By incorporating the ferroelectric polarization into a self-consistent calculation, it is disclosed that in addition to the common hump corresponding to the onset of electron accumulation, the second hump at high current level is originated from the nonlinear polar nature of ferroelectric, which enhances the gate capacitance by increasing equivalent dielectric constant nonlinearly. This work paves a way for design of high linearity GaN MIS-HEMT by exploiting the nonlinear properties of dielectric

  6. Improved linearity in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors with nonlinear polarization dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Gao, Tao [Fundamental Science on EHF Laboratory, University of Electronic Science and Technology of China (UESTC), Chengdu 611731 (China); Science and Technology on Monolithic Integrated Circuits and Modules Laboratory, Nanjing Electronic Devices Institute, Nanjing 210016 (China); Xu, Ruimin [Fundamental Science on EHF Laboratory, University of Electronic Science and Technology of China (UESTC), Chengdu 611731 (China); Kong, Yuechan, E-mail: kycfly@163.com; Zhou, Jianjun; Kong, Cen; Dong, Xun; Chen, Tangsheng [Science and Technology on Monolithic Integrated Circuits and Modules Laboratory, Nanjing Electronic Devices Institute, Nanjing 210016 (China)

    2015-06-15

    We demonstrate highly improved linearity in a nonlinear ferroelectric of Pb(Zr{sub 0.52}Ti{sub 0.48})-gated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT). Distinct double-hump feature in the transconductance-gate voltage (g{sub m}-V{sub g}) curve is observed, yielding remarkable enhancement in gate voltage swing as compared to MIS-HEMT with conventional linear gate dielectric. By incorporating the ferroelectric polarization into a self-consistent calculation, it is disclosed that in addition to the common hump corresponding to the onset of electron accumulation, the second hump at high current level is originated from the nonlinear polar nature of ferroelectric, which enhances the gate capacitance by increasing equivalent dielectric constant nonlinearly. This work paves a way for design of high linearity GaN MIS-HEMT by exploiting the nonlinear properties of dielectric.

  7. Improved linearity in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors with nonlinear polarization dielectric

    Science.gov (United States)

    Gao, Tao; Xu, Ruimin; Kong, Yuechan; Zhou, Jianjun; Kong, Cen; Dong, Xun; Chen, Tangsheng

    2015-06-01

    We demonstrate highly improved linearity in a nonlinear ferroelectric of Pb(Zr0.52Ti0.48)-gated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT). Distinct double-hump feature in the transconductance-gate voltage (gm-Vg) curve is observed, yielding remarkable enhancement in gate voltage swing as compared to MIS-HEMT with conventional linear gate dielectric. By incorporating the ferroelectric polarization into a self-consistent calculation, it is disclosed that in addition to the common hump corresponding to the onset of electron accumulation, the second hump at high current level is originated from the nonlinear polar nature of ferroelectric, which enhances the gate capacitance by increasing equivalent dielectric constant nonlinearly. This work paves a way for design of high linearity GaN MIS-HEMT by exploiting the nonlinear properties of dielectric.

  8. Intrinsic multistate switching of gold clusters through electrochemical gating

    DEFF Research Database (Denmark)

    Albrecht, Tim; Mertens, S.F.L.; Ulstrup, Jens

    2007-01-01

    The electrochemical behavior of small metal nanoparticles is governed by Coulomb-like charging and equally spaced charge-transfer transitions. Using electrochemical gating at constant bias voltage, we show, for the first time, that individual nanoparticles can be operated as multistate switches...... in condensed media at room temperature, displaying distinct peak features in the tunneling current. The tunneling conductance increases with particle charge, suggesting that solvent reorganization and dielectric saturation become increasingly important....

  9. Gate-induced carrier delocalization in quantum dot field effect transistors.

    Science.gov (United States)

    Turk, Michael E; Choi, Ji-Hyuk; Oh, Soong Ju; Fafarman, Aaron T; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R; Kikkawa, James M

    2014-10-08

    We study gate-controlled, low-temperature resistance and magnetotransport in indium-doped CdSe quantum dot field effect transistors. We show that using the gate to accumulate electrons in the quantum dot channel increases the "localization product" (localization length times dielectric constant) describing transport at the Fermi level, as expected for Fermi level changes near a mobility edge. Our measurements suggest that the localization length increases to significantly greater than the quantum dot diameter.

  10. Dielectric materials for electrical engineering

    CERN Document Server

    Martinez-Vega, Juan

    2013-01-01

    Part 1 is particularly concerned with physical properties, electrical ageing and modeling with topics such as the physics of charged dielectric materials, conduction mechanisms, dielectric relaxation, space charge, electric ageing and life end models and dielectric experimental characterization. Part 2 concerns some applications specific to dielectric materials: insulating oils for transformers, electrorheological fluids, electrolytic capacitors, ionic membranes, photovoltaic conversion, dielectric thermal control coatings for geostationary satellites, plastics recycling and piezoelectric poly

  11. Ion-Gel-Gated Graphene Optical Modulator with Hysteretic Behavior.

    Science.gov (United States)

    Kim, Jin Tae; Choi, Hongkyw; Choi, Yongsuk; Cho, Jeong Ho

    2018-01-17

    We propose a graphene-based optical modulator and comprehensively investigate its photonic characteristics by electrically controlling the device with an ion-gel top-gate dielectric. The density of the electrically driven charge carriers in the ion-gel gate dielectric plays a key role in tuning the optical output power of the device. The charge density at the ion-gel-graphene interface is tuned electrically, and the chemical potential of graphene is then changed to control its light absorption strength. The optical behavior of the ion-gel gate dielectric exhibits a large hysteresis which originates from the inherent nature of the ionic gel and the graphene-ion-gel interface and a slow polarization response time of ions. The photonic device is applicable to both TE- and TM-polarized light waves, covering two entire optical communication bands, the O-band (1.26-1.36 μm) and the C-band (1.52-1.565 μm). The experimental results are in good agreement with theoretically simulated predictions. The temporal behavior of the ion-gel-graphene-integrated optical modulator reveals a long-term modulation state because of the relatively low mobility of the ions in the ion-gel solution and formation of the electric double layer in the graphene-ion-gel interface. Fast dynamic recovery is observed by applying an opposite voltage gate pulse. This study paves the way to the understanding of the operational principles and future applications of ion-gel-gated graphene optical devices in photonics.

  12. MoS2 based dual input logic AND gate

    Science.gov (United States)

    Martinez, Luis M.; Pinto, Nicholas J.; Naylor, Carl H.; Johnson, A. T. Charlie

    2016-12-01

    Crystalline monolayers of CVD MoS2 are used as the active semiconducting channel in a split-gate field effect transistor. The device demonstrates logic AND functionality that is controlled by independently addressing each gate terminal with ±10V. When +10V was simultaneously applied to both gates, the device was conductive (ON), while any other combination of gate voltages rendered the device resistive (OFF). The ON/OFF ratio of the device was ˜ 35 and the charge mobility using silicon nitride as the gate dielectric was 1.2cm2/V-s and 0.1cm2/V-s in the ON and OFF states respectively. Clear discrimination between the two states was observed when a simple circuit containing a load resistor was used to test the device logic AND functionality at 10Hz. One advantage is that split gate technology can reduce the number of devices required in complex circuits, leading to compact electronics and large scale integration based on intrinsic 2-D semiconducting materials.

  13. Gated community Na Krutci

    Czech Academy of Sciences Publication Activity Database

    Hnídková, Vendula

    2012-01-01

    Roč. 91, č. 12 (2012), s. 750-752 ISSN 0042-4544 Institutional support: RVO:68378033 Keywords : Gated community * Czech contemporary architecture * Kuba Pilař Subject RIV: AL - Art, Architecture , Cultural Heritage

  14. Reversible gates and circuits descriptions

    Science.gov (United States)

    Gracki, Krzystof

    2017-08-01

    This paper presents basic methods of reversible circuit description. To design reversible circuit a set of gates has to be chosen. Most popular libraries are composed of three types of gates so called CNT gates (Control, NOT and Toffoli). The gate indexing method presented in this paper is based on the CNT gates set. It introduces a uniform indexing of the gates used during synthesis process of reversible circuits. The paper is organized as follows. Section 1 recalls basic concepts of reversible logic. In Section 2 and 3 a graphical representation of the reversible gates and circuits is described. Section 4 describes proposed uniform NCT gates indexing. The presented gate indexing method provides gate numbering scheme independent of lines number of the designed circuit. The solution for a circuit consisting of smaller number of lines is a subset of solution for a larger circuit.

  15. Advanced insulated gate bipolar transistor gate drive

    Science.gov (United States)

    Short, James Evans [Monongahela, PA; West, Shawn Michael [West Mifflin, PA; Fabean, Robert J [Donora, PA

    2009-08-04

    A gate drive for an insulated gate bipolar transistor (IGBT) includes a control and protection module coupled to a collector terminal of the IGBT, an optical communications module coupled to the control and protection module, a power supply module coupled to the control and protection module and an output power stage module with inputs coupled to the power supply module and the control and protection module, and outputs coupled to a gate terminal and an emitter terminal of the IGBT. The optical communications module is configured to send control signals to the control and protection module. The power supply module is configured to distribute inputted power to the control and protection module. The control and protection module outputs on/off, soft turn-off and/or soft turn-on signals to the output power stage module, which, in turn, supplies a current based on the signal(s) from the control and protection module for charging or discharging an input capacitance of the IGBT.

  16. The human respiratory gate

    Science.gov (United States)

    Eckberg, Dwain L.

    2003-01-01

    Respiratory activity phasically alters membrane potentials of preganglionic vagal and sympathetic motoneurones and continuously modulates their responsiveness to stimulatory inputs. The most obvious manifestation of this 'respiratory gating' is respiratory sinus arrhythmia, the rhythmic fluctuations of electrocardiographic R-R intervals observed in healthy resting humans. Phasic autonomic motoneurone firing, reflecting the throughput of the system, depends importantly on the intensity of stimulatory inputs, such that when levels of stimulation are low (as with high arterial pressure and sympathetic activity, or low arterial pressure and vagal activity), respiratory fluctuations of sympathetic or vagal firing are also low. The respiratory gate has a finite capacity, and high levels of stimulation override the ability of respiration to gate autonomic responsiveness. Autonomic throughput also depends importantly on other factors, including especially, the frequency of breathing, the rate at which the gate opens and closes. Respiratory sinus arrhythmia is small at rapid, and large at slow breathing rates. The strong correlation between systolic pressure and R-R intervals at respiratory frequencies reflects the influence of respiration on these two measures, rather than arterial baroreflex physiology. A wide range of evidence suggests that respiratory activity gates the timing of autonomic motoneurone firing, but does not influence its tonic level. I propose that the most enduring significance of respiratory gating is its use as a precisely controlled experimental tool to tease out and better understand otherwise inaccessible human autonomic neurophysiological mechanisms.

  17. Development of High-k Dielectric for Antimonides and a sub 350 degree Celsius III-V pMOSFET Outperforming Germanium

    Science.gov (United States)

    2010-12-01

    Development of high-k dielectric for Antimonides and a sub 350ºC III-V pMOSFET outperforming Germanium Aneesh Nainani, Toshifumi Irisawa, Ze Yuan...dielectric for Antimonides and a sub 350degreeC III-V pMOSFET outperforming Germanium 5a. CONTRACT NUMBER 5b. GRANT NUMBER 5c. PROGRAM ELEMENT...area etch HCl based clean + 100 cyl. ALD Al2O3 @ 300ºC (~10nm) as gate dielectric Aluminum evaporation + Gate patterning Be implant(9e14dose/10keV)+S

  18. Ac conductivity and dielectric study of LiNiPO 4 synthesized by solid ...

    Indian Academy of Sciences (India)

    Administrator

    characterized by X-ray powder diffraction, infrared, Raman analysis spectroscopy and electrical impedance spectroscopy. ... gated material. Keywords. LiNiPO4; complex impedance; a.c. conductivity; dielectric modulus. 1. Introduction ..... suggested equivalent circuit describes the pellet–electrolyte interface reasonably well.

  19. Processing and performance of organic insulators as a gate layer in ...

    Indian Academy of Sciences (India)

    Abstract. Fabrication of organic thin film transistor (OTFT) on flexible substrates is a challenge, because of its low softening temperature, high roughness and flexible nature. Although several organic dielectrics have been used as gate insulator, it is difficult to choose one in absence of a comparative study covering ...

  20. Fast programming metal-gate Si quantum dot nonvolatile memory using green nanosecond laser spike annealing

    Science.gov (United States)

    Lien, Yu-Chung; Shieh, Jia-Min; Huang, Wen-Hsien; Tu, Cheng-Hui; Wang, Chieh; Shen, Chang-Hong; Dai, Bau-Tong; Pan, Ci-Ling; Hu, Chenming; Yang, Fu-Liang

    2012-04-01

    The ultrafast metal-gate silicon quantum-dot (Si-QD) nonvolatile memory (NVM) with program/erase speed of 1 μs under low operating voltages of ± 7 V is achieved by thin tunneling oxide, in situ Si-QD-embedded dielectrics, and metal gate. Selective source/drain activation by green nanosecond laser spike annealing, due to metal-gate as light-blocking layer, responds to low thermal damage on gate structures and, therefore, suppresses re-crystallization/deformation/diffusion of embedded Si-QDs. Accordingly, it greatly sustains efficient charge trapping/de-trapping in numerous deep charge-trapping sites in discrete Si-QDs. Such a gate nanostructure also ensures excellent endurance and retention in the microsecond-operation Si-QD NVM.

  1. Super Dielectric Materials.

    Science.gov (United States)

    Fromille, Samuel; Phillips, Jonathan

    2014-12-22

    Evidence is provided here that a class of materials with dielectric constants greater than 10⁵ at low frequency (super dielectric materials (SDM), can be generated readily from common, inexpensive materials. Specifically it is demonstrated that high surface area alumina powders, loaded to the incipient wetness point with a solution of boric acid dissolved in water, have dielectric constants, near 0 Hz, greater than 4 × 10⁸ in all cases, a remarkable increase over the best dielectric constants previously measured for energy storage capabilities, ca. 1 × 10⁴. It is postulated that any porous, electrically insulating material (e.g., high surface area powders of silica, titania, etc. ), filled with a liquid containing a high concentration of ionic species will potentially be an SDM. Capacitors created with the first generated SDM dielectrics (alumina with boric acid solution), herein called New Paradigm Super (NPS) capacitors display typical electrostatic capacitive behavior, such as increasing capacitance with decreasing thickness, and can be cycled, but are limited to a maximum effective operating voltage of about 0.8 V. A simple theory is presented: Water containing relatively high concentrations of dissolved ions saturates all, or virtually all, the pores (average diameter 500 Å) of the alumina. In an applied field the positive ionic species migrate to the cathode end, and the negative ions to the anode end of each drop. This creates giant dipoles with high charge, hence leading to high dielectric constant behavior. At about 0.8 V, water begins to break down, creating enough ionic species to "short" the individual water droplets. Potentially NPS capacitor stacks can surpass "supercapacitors" in volumetric energy density.

  2. Super Dielectric Materials

    Directory of Open Access Journals (Sweden)

    Samuel Fromille

    2014-12-01

    Full Text Available Evidence is provided here that a class of materials with dielectric constants greater than 105 at low frequency (<10−2 Hz, herein called super dielectric materials (SDM, can be generated readily from common, inexpensive materials. Specifically it is demonstrated that high surface area alumina powders, loaded to the incipient wetness point with a solution of boric acid dissolved in water, have dielectric constants, near 0 Hz, greater than 4 × 108 in all cases, a remarkable increase over the best dielectric constants previously measured for energy storage capabilities, ca. 1 × 104. It is postulated that any porous, electrically insulating material (e.g., high surface area powders of silica, titania, etc., filled with a liquid containing a high concentration of ionic species will potentially be an SDM. Capacitors created with the first generated SDM dielectrics (alumina with boric acid solution, herein called New Paradigm Super (NPS capacitors display typical electrostatic capacitive behavior, such as increasing capacitance with decreasing thickness, and can be cycled, but are limited to a maximum effective operating voltage of about 0.8 V. A simple theory is presented: Water containing relatively high concentrations of dissolved ions saturates all, or virtually all, the pores (average diameter 500 Å of the alumina. In an applied field the positive ionic species migrate to the cathode end, and the negative ions to the anode end of each drop. This creates giant dipoles with high charge, hence leading to high dielectric constant behavior. At about 0.8 V, water begins to break down, creating enough ionic species to “short” the individual water droplets. Potentially NPS capacitor stacks can surpass “supercapacitors” in volumetric energy density.

  3. Chemical sensitivity of Mo gate Mos capacitors

    Energy Technology Data Exchange (ETDEWEB)

    Lombardi, R.M.; Aragon, R. [Laboratorio de Peliculas delgadas, Facultad de Ingenieria, Paseo Colon 850, 1063, Buenos Aires (Argentina)

    2006-07-01

    Mo gate Mos capacitors exhibit a negative shift of their C-V characteristic by up to 240 mV, at 125 C, in response to 1000 ppm hydrogen, in controlled nitrogen atmospheres. The experimental methods for obtaining capacitance and conductance, as a function of polarisation voltage, as well as the relevant equivalent circuits are reviewed. The single-state interface state density, at the semiconductor-dielectric interface, decreases from 2.66 x 10{sup 11} cm{sup -2} e-v{sup -1}, in pure nitrogen, to 2.5 x 10{sup 11} cm{sup -2} e-v{sup -1} in 1000 ppm hydrogen in nitrogen mixtures, at this temperature. (Author)

  4. High-Sensitivity, Highly Transparent, Gel-Gated MoS2 Phototransistor on Biodegradable Nanopaper

    KAUST Repository

    Zhang, Qing

    2016-06-21

    Transition metal dichalcogenides hold great promise for a variety of novel electrical, optical and mechanical devices and applications. Among them, molybdenum disulphide (MoS2) is gaining increasing attention as the gate dielectric and semiconductive channel for high-perfomance field effect transistors. Here we report on the first MoS2 phototransistor built on flexible, transparent and biodegradable substrate with electrolyte gate dielectric. We have carried out systematic studies on its electrical and optoelectronic properties. The MoS2 phototransistor exhibited excellent photo responsivity of ~1.5 kA/W, about two times higher compared to typical back-gated devices reported in previous studies. The device is highly transparent at the same time with an average optical transmittance of 82%. Successful fabrication of phototransistors on flexible cellulose nanopaper with excellent performance and transparency suggests that it is feasible to achieve an ecofriendly, biodegradable phototransistor with great photoresponsivity, broad spectral range and durable flexibility.

  5. Spin gating electrical current

    Science.gov (United States)

    Ciccarelli, C.; Zârbo, L. P.; Irvine, A. C.; Campion, R. P.; Gallagher, B. L.; Wunderlich, J.; Jungwirth, T.; Ferguson, A. J.

    2012-09-01

    The level of the chemical potential is a fundamental parameter of the electronic structure of a physical system, which consequently plays an important role in defining the properties of active electrical devices. We directly measure the chemical potential shift in the relativistic band structure of the ferromagnetic semiconductor (Ga,Mn)As, controlled by changes in its magnetic order parameter. Our device comprises a non-magnetic aluminum single electron channel capacitively coupled to the (Ga,Mn)As gate electrode. The chemical potential shifts of the gate are directly read out from the shifts in the Coulomb blockade oscillations of the single electron transistor. The experiments introduce a concept of spin gating electrical current. In our spin transistor spin manipulation is completely removed from the electrical current carrying channel.

  6. Cardiac gated ventilation

    Science.gov (United States)

    Hanson, C. William, III; Hoffman, Eric A.

    1995-05-01

    There are several theoretic advantages to synchronizing positive pressure breaths with the cardiac cycle, including the potential for improving distribution of pulmonary and myocardial blood flow and enhancing cardiac output. We evaluated the effects of synchronizing respiration to the cardiac cycle using a programmable ventilator and electron beam CT (EBCT) scanning. The hearts of anesthetized dogs were imaged during cardiac gated respiration with a 50msec scan aperture. Multislice, short axis, dynamic image data sets spanning the apex to base of the left ventricle were evaluated to determine the volume of the left ventricular chamber at end-diastole and end-systole during apnea, systolic and diastolic cardiac gating. We observed an increase in cardiac output of up to 30% with inspiration gated to the systolic phase of the cardiac cycle in a nonfailing model of the heart.

  7. The relevance of electrostatics for scanning-gate microscopy

    Science.gov (United States)

    Schnez, S.; Güttinger, J.; Stampfer, C.; Ensslin, K.; Ihn, T.

    2011-05-01

    Scanning-probe techniques have been developed to extract local information from a given physical system. In particular, conductance maps obtained by means of scanning-gate microscopy (SGM), where a conducting tip of an atomic-force microscope is used as a local and movable gate, seem to present an intuitive picture of the underlying physical processes. Here, we argue that the interpretation of such images is complex and not very intuitive under certain circumstances: scanning a graphene quantum dot (QD) in the Coulomb-blockaded regime, we observe an apparent shift of features in scanning-gate images as a function of gate voltages, which cannot be a real shift of the physical system. Furthermore, we demonstrate the appearance of more than one set of Coulomb rings arising from the graphene QD. We attribute these effects to screening between the metallic tip and the gates. Our results are relevant for SGM on any kind of nanostructure, but are of particular importance for nanostructures that are not covered with a dielectric, e.g. graphene or carbon nanotube structures.

  8. Biocompatible/Degradable Silk Fibroin:Poly(Vinyl Alcohol)-Blended Dielectric Layer Towards High-Performance Organic Field-Effect Transistor

    Science.gov (United States)

    Zhuang, Xinming; Huang, Wei; Yang, Xin; Han, Shijiao; Li, Lu; Yu, Junsheng

    2016-10-01

    Biocompatible silk fibroin (SF):poly(vinyl alcohol) (PVA) blends were prepared as the dielectric layers of organic field-effect transistors (OFETs). Compared with those with pure SF dielectric layer, an optimal threshold voltage of ~0 V, high on/off ratio of ~104, and enhanced field-effect mobility of 0.22 cm2/Vs of OFETs were obtained by carefully controlling the weight ratio of SF:PVA blends to 7:5. Through the morphology characterization of dielectrics and organic semiconductors by utilizing atom force microscopy and electrical characterization of the devices, the performance improvement of OFETs with SF:PVA hybrid gate dielectric layers were attributed to the smooth and homogeneous morphology of blend dielectrics. Furthermore, due to lower charge carrier trap density, the OFETs based on SF:PVA-blended dielectric exhibited a higher bias stability than those based on pure SF dielectric.

  9. Dielectric elastomer memory

    Science.gov (United States)

    O'Brien, Benjamin M.; McKay, Thomas G.; Xie, Sheng Q.; Calius, Emilio P.; Anderson, Iain A.

    2011-04-01

    Life shows us that the distribution of intelligence throughout flexible muscular networks is a highly successful solution to a wide range of challenges, for example: human hearts, octopi, or even starfish. Recreating this success in engineered systems requires soft actuator technologies with embedded sensing and intelligence. Dielectric Elastomer Actuator(s) (DEA) are promising due to their large stresses and strains, as well as quiet flexible multimodal operation. Recently dielectric elastomer devices were presented with built in sensor, driver, and logic capability enabled by a new concept called the Dielectric Elastomer Switch(es) (DES). DES use electrode piezoresistivity to control the charge on DEA and enable the distribution of intelligence throughout a DEA device. In this paper we advance the capabilities of DES further to form volatile memory elements. A set reset flip-flop with inverted reset line was developed based on DES and DEA. With a 3200V supply the flip-flop behaved appropriately and demonstrated the creation of dielectric elastomer memory capable of changing state in response to 1 second long set and reset pulses. This memory opens up applications such as oscillator, de-bounce, timing, and sequential logic circuits; all of which could be distributed throughout biomimetic actuator arrays. Future work will include miniaturisation to improve response speed, implementation into more complex circuits, and investigation of longer lasting and more sensitive switching materials.

  10. Theory of Dielectric Elastomers

    Science.gov (United States)

    2010-10-25

    energy can be converted? Transactions on Mechatronics, in press. 37. Diaz- Calleja ., R., Llovera-Segovia, P., Energy diagrams and stability...stability of dielectric elastomers‖, Appl. Phys. Lett., 2008, 92: 026101. 62. Diaz- Calleja , R., Riande, E. and Sanchis, M.J., On electromechanical stability

  11. Dielectric Waveguide lasers

    NARCIS (Netherlands)

    Pollnau, Markus; Orlovic, V.A.; Pachenko, V.; Scherbakov, I.A.

    2007-01-01

    Our recent results on planar and channel waveguide fabrication and lasers in the dielectric oxide materials Ti:sapphire and rare-earth-ion-doped potassium yttrium double tungstate (KYW) are reviewed. We have employed waveguide fabrication methods such as liquid phase epitaxy and reactive ion etching

  12. Low dielectric constant-based organic field-effect transistors and metal-insulator-semiconductor capacitors

    Science.gov (United States)

    Ukah, Ndubuisi Benjamin

    This thesis describes a study of PFB and pentacene-based organic field-effect transistors (OFET) and metal-insulator-semiconductor (MIS) capacitors with low dielectric constant (k) poly(methyl methacrylate) (PMMA), poly(4-vinyl phenol) (PVP) and cross-linked PVP (c-PVP) gate dielectrics. A physical method -- matrix assisted pulsed laser evaporation (MAPLE) -- of fabricating all-polymer field-effect transistors and MIS capacitors that circumvents inherent polymer dissolution and solvent-selectivity problems, is demonstrated. Pentacene-based OFETs incorporating PMMA and PVP gate dielectrics usually have high operating voltages related to the thickness of the dielectric layer. Reduced PMMA layer thickness (≤ 70 nm) was obtained by dissolving the PMMA in propylene carbonate (PC). The resulting pentacene-based transistors exhibited very low operating voltage (below -3 V), minimal hysteresis in their transfer characteristics, and decent electrical performance. Also low voltage (within -2 V) operation using thin (≤ 80 nm) low-k and hydrophilic PVP and c-PVP dielectric layers obtained via dissolution in high dipole moment and high-k solvents -- PC and dimethyl sulfoxide (DMSO), is demonstrated to be a robust means of achieving improved electrical characteristics and high operational stability in OFETs incorporating PVP and c-PVP dielectrics.

  13. Gate valve performance prediction

    International Nuclear Information System (INIS)

    Harrison, D.H.; Damerell, P.S.; Wang, J.K.; Kalsi, M.S.; Wolfe, K.J.

    1994-01-01

    The Electric Power Research Institute is carrying out a program to improve the performance prediction methods for motor-operated valves. As part of this program, an analytical method to predict the stem thrust required to stroke a gate valve has been developed and has been assessed against data from gate valve tests. The method accounts for the loads applied to the disc by fluid flow and for the detailed mechanical interaction of the stem, disc, guides, and seats. To support development of the method, two separate-effects test programs were carried out. One test program determined friction coefficients for contacts between gate valve parts by using material specimens in controlled environments. The other test program investigated the interaction of the stem, disc, guides, and seat using a special fixture with full-sized gate valve parts. The method has been assessed against flow-loop and in-plant test data. These tests include valve sizes from 3 to 18 in. and cover a considerable range of flow, temperature, and differential pressure. Stem thrust predictions for the method bound measured results. In some cases, the bounding predictions are substantially higher than the stem loads required for valve operation, as a result of the bounding nature of the friction coefficients in the method

  14. Antenna with Dielectric Having Geometric Patterns

    Science.gov (United States)

    Dudley, Kenneth L. (Inventor); Elliott, Holly A. (Inventor); Cravey, Robin L. (Inventor); Connell, John W. (Inventor); Ghose, Sayata (Inventor); Watson, Kent A. (Inventor); Smith, Jr., Joseph G. (Inventor)

    2013-01-01

    An antenna includes a ground plane, a dielectric disposed on the ground plane, and an electrically-conductive radiator disposed on the dielectric. The dielectric includes at least one layer of a first dielectric material and a second dielectric material that collectively define a dielectric geometric pattern, which may comprise a fractal geometry. The radiator defines a radiator geometric pattern, and the dielectric geometric pattern is geometrically identical, or substantially geometrically identical, to the radiator geometric pattern.

  15. The four-gate transistor

    Science.gov (United States)

    Mojarradi, M. M.; Cristoveanu, S.; Allibert, F.; France, G.; Blalock, B.; Durfrene, B.

    2002-01-01

    The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications.

  16. Stanford, Duke, Rice,... and Gates?

    Science.gov (United States)

    Carey, Kevin

    2009-01-01

    This article presents an open letter to Bill Gates. In his letter, the author suggests that Bill Gates should build a brand-new university, a great 21st-century institution of higher learning. This university will be unlike anything the world has ever seen. He asks Bill Gates not to stop helping existing colleges create the higher-education system…

  17. Study on the electrical degradation of AlGaN/GaN MIS-HEMTs induced by residual stress of SiNx passivation

    Science.gov (United States)

    Bai, Zhiyuan; Du, Jiangfeng; Liu, Yong; Xin, Qi; Liu, Yang; Yu, Qi

    2017-07-01

    In this paper, we report a new phenomenon in C-V measurement of different gate length MIS-HEMTs, which can be associated with traps character of the AlGaN/GaN interface. The analysis of DC measurement, frequency dependent capacitance-voltage measurements and simulation show that the stress from passivation layer may induce a decrease of drain output current Ids, an increase of on-resistance, serious nonlinearity of transconductance gm, and a new peak of C-V curve. The value of the peak is reduced to zero while the gate length and measure frequency are increasing to 21 μm and 1 MHz, respectively. By using conductance method, the SiNx/GaN interface traps with energy level of EC-0.42 eV to EC-0.45 eV and density of 3.2 × 1012 ∼ 5.0 × 1012 eV-1 cm-2 is obtained after passivation. According to the experimental and simulation results, formation of the acceptor-like traps with concentration of 3 × 1011 cm-2 and energy level of EC-0.37 eV under the gate on AlGaN barrier side of AlGaN/GaN interface is the main reason for the degradation after the passivation. He is currently an Associate Professor with State Key Laboratory of Electronic Thin Films and Integrated Devices, School of Microelectronics and Solid-State Electronics, UESTC. He is the author of over 30 peer-reviewed journal papers and more than 20 conference papers. He has also hold over 20 patents. His research interests include Gallium Nitride based high-voltage power switching devices, microwave and millimeter-wave power devices and integrated technologies. Dr. Yu was a recipient of the prestigious Award of Science and Technology of China

  18. Thin film silicon on silicon nitride for radiation hardened dielectrically isolated MISFET's

    International Nuclear Information System (INIS)

    Neamen, D.; Shedd, W.; Buchanan, B.

    1975-01-01

    The permanent ionizing radiation effects resulting from charge trapping in a silicon nitride isolation dielectric have been determined for a total ionizing dose up to 10 7 rads (Si). Junction FET's, whose active channel region is directly adjacent to the silicon-silicon nitride interface, were used to measure the effects of the radiation induced charge trapping in the Si 3 N 4 isolation dielectric. The JFET saturation current and channel conductance versus junction gate voltage and substrate voltage were characterized as a function of the total ionizing radiation dose. The experimental results on the Si 3 N 4 are compared to results on similar devices with SiO 2 dielectric isolation. The ramifications of using the silicon nitride for fabricating radiation hardened dielectrically isolated MIS devices are discussed

  19. Dielectric nanoresonators for light manipulation

    Science.gov (United States)

    Yang, Zhong-Jian; Jiang, Ruibin; Zhuo, Xiaolu; Xie, Ya-Ming; Wang, Jianfang; Lin, Hai-Qing

    2017-07-01

    Nanostructures made of dielectric materials with high or moderate refractive indexes can support strong electric and magnetic resonances in the optical region. They can therefore function as nanoresonators. In addition to plasmonic metal nanostructures that have been widely investigated, dielectric nanoresonators provide a new type of building blocks for realizing powerful and versatile nanoscale light manipulation. In contrast to plasmonic metal nanostructures, nanoresonators made of appropriate dielectric materials are low-cost, earth-abundant and have very small or even negligible light energy losses. As a result, they will find potential applications in a number of photonic devices, especially those that require low energy losses. In this review, we describe the recent progress on the experimental and theoretical studies of dielectric nanoresonators. We start from the basic theory of the electromagnetic responses of dielectric nanoresonators and their fabrication methods. The optical properties of individual dielectric nanoresonators are then elaborated, followed by the coupling behaviors between dielectric nanoresonators, between dielectric nanoresonators and substrates, and between dielectric nanoresonators and plasmonic metal nanostructures. The applications of dielectric nanoresonators are further described. Finally, the challenges and opportunities in this field are discussed.

  20. Dielectric properties of polyethylene

    International Nuclear Information System (INIS)

    Darwish, S.; Riad, A.S.; El-Shabasy, M.

    2005-01-01

    The temperature dependence of dielectric properties in polyethylene was measured in the frequency range from 10 to 105 Hz. The frequency dependence of the complex impedance in the complex plane could be fitted by semicircles. The system could be represented by an equivalent circuit of a bulk resistance in series with parallel surface resistance-capacitance combination. The relaxation time, has been evaluated from experimental results. Results reveal that the temperature dependence, is a thermally activated process

  1. All-dielectric metamaterials.

    Science.gov (United States)

    Jahani, Saman; Jacob, Zubin

    2016-01-01

    The ideal material for nanophotonic applications will have a large refractive index at optical frequencies, respond to both the electric and magnetic fields of light, support large optical chirality and anisotropy, confine and guide light at the nanoscale, and be able to modify the phase and amplitude of incoming radiation in a fraction of a wavelength. Artificial electromagnetic media, or metamaterials, based on metallic or polar dielectric nanostructures can provide many of these properties by coupling light to free electrons (plasmons) or phonons (phonon polaritons), respectively, but at the inevitable cost of significant energy dissipation and reduced device efficiency. Recently, however, there has been a shift in the approach to nanophotonics. Low-loss electromagnetic responses covering all four quadrants of possible permittivities and permeabilities have been achieved using completely transparent and high-refractive-index dielectric building blocks. Moreover, an emerging class of all-dielectric metamaterials consisting of anisotropic crystals has been shown to support large refractive index contrast between orthogonal polarizations of light. These advances have revived the exciting prospect of integrating exotic electromagnetic effects in practical photonic devices, to achieve, for example, ultrathin and efficient optical elements, and realize the long-standing goal of subdiffraction confinement and guiding of light without metals. In this Review, we present a broad outline of the whole range of electromagnetic effects observed using all-dielectric metamaterials: high-refractive-index nanoresonators, metasurfaces, zero-index metamaterials and anisotropic metamaterials. Finally, we discuss current challenges and future goals for the field at the intersection with quantum, thermal and silicon photonics, as well as biomimetic metasurfaces.

  2. Dielectric lattice gauge theory

    International Nuclear Information System (INIS)

    Mack, G.

    1983-06-01

    Dielectric lattice gauge theory models are introduced. They involve variables PHI(b)epsilong that are attached to the links b = (x+esub(μ),x) of the lattice and take their values in the linear space g which consists of real linear combinations of matrices in the gauge group G. The polar decomposition PHI(b)=U(b)osub(μ)(x) specifies an ordinary lattice gauge field U(b) and a kind of dielectric field epsilonsub(ij)proportionalosub(i)osub(j)sup(*)deltasub(ij). A gauge invariant positive semidefinite kinetic term for the PHI-field is found, and it is shown how to incorporate Wilson fermions in a way which preserves Osterwalder Schrader positivity. Theories with G = SU(2) and without matter fields are studied in some detail. It is proved that confinement holds, in the sense that Wilson loop expectation values show an area law decay, if the Euclidean action has certain qualitative features which imply that PHI = 0 (i.e. dielectric field identical 0) is the unique maximum of the action. (orig.)

  3. A low specific on-resistance SOI MOSFET with dual gates and a recessed drain

    International Nuclear Information System (INIS)

    Luo Xiao-Rong; Hu Gang-Yi; Zhang Zheng-Yuan; Luo Yin-Chun; Fan Ye; Wang Xiao-Wei; Fan Yuan-Hang; Cai Jin-Yong; Wang Pei; Zhou Kun

    2013-01-01

    A low specific on-resistance (R on,sp ) integrable silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistor (MOSFET) is proposed and investigated by simulation. The MOSFET features a recessed drain as well as dual gates, which consist of a planar gate and a trench gate extended to the buried oxide layer (BOX) (DGRD MOSFET). First, the dual gates form dual conduction channels, and the extended trench gate also acts as a field plate to improve the electric field distribution. Second, the combination of the trench gate and the recessed drain widens the vertical conduction area and shortens the current path. Third, the P-type top layer not only enhances the drift doping concentration but also modulates the surface electric field distributions. All of these sharply reduce R on,sp and maintain a high breakdown voltage (BV). The BV of 233 V and R on,sp of 4.151 mΩ·cm 2 (V GS = 15 V) are obtained for the DGRD MOSFET with 15-μm half-cell pitch. Compared with the trench gate SOI MOSFET and the conventional MOSFET, R on,sp of the DGRD MOSFET decreases by 36% and 33% with the same BV, respectively. The trench gate extended to the BOX synchronously acts as a dielectric isolation trench, simplifying the fabrication processes. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  4. Interface band alignment in high-k gate stacks

    Science.gov (United States)

    Eric, Bersch; Hartlieb, P.

    2005-03-01

    In order to successfully implement alternate high-K dielectric materials into MOS structures, the interface properties of MOS gate stacks must be better understood. Dipoles that may form at the metal/dielectric and dielectric/semiconductor interfaces make the band offsets difficult to predict. We have measured the conduction and valence band densities of states for a variety MOS stacks using in situ using inverse photoemission (IPE) and photoemission spectroscopy (PES), respectively. Results obtained from clean and metallized (with Ru or Al) HfO2/Si, SiO2/Si and mixed silicate films will be presented. IPE indicates a shift of the conduction band minimum (CBM) to higher energy (i.e. away from EF) with increasing SiO2. The effect of metallization on the location of band edges depends upon the metal species. The addition of N to the dielectrics shifts the CBM in a way that is thickness dependent. Possible mechanisms for these observed effects will be discussed.

  5. Improving pH sensitivity by field-induced charge regulation in flexible biopolymer electrolyte gated oxide transistors

    Science.gov (United States)

    Liu, Ning; Gan, Lu; Liu, Yu; Gui, Weijun; Li, Wei; Zhang, Xiaohang

    2017-10-01

    Electrical manipulation of charged ions in electrolyte-gated transistors is crucial for enhancing the electric-double-layer (EDL) gating effect, thereby improving their sensing abilities. Here, indium-zinc-oxide (IZO) based thin-film-transistors (TFTs) are fabricated on flexible plastic substrate. Acid doped chitosan-based biopolymer electrolyte is used as the gate dielectric, exhibiting an extremely high EDL capacitance. By regulating the dynamic EDL charging process with special gate potential profiles, the EDL gating effect of the chitosan-gated TFT is enhanced, and then resulting in higher pH sensitivities. An extremely high sensitivity of ∼57.8 mV/pH close to Nernst limit is achieved when the gate bias of the TFT sensor sweeps at a rate of 10 mV/s. Additionally, an enhanced sensitivity of 2630% in terms of current variation with pH range from 11 to 3 is realized when the device is operated in the ion depletion mode with a negative gate bias of -0.7 V. Robust ionic modulation is demonstrated in such chitosan-gated sensors. Efficiently driving the charged ions in the chitosan-gated IZO-TFT provides a new route for ultrasensitive, low voltage, and low-cost biochemical sensing technologies.

  6. Noise Gating Solar Images

    Science.gov (United States)

    DeForest, Craig; Seaton, Daniel B.; Darnell, John A.

    2017-08-01

    I present and demonstrate a new, general purpose post-processing technique, "3D noise gating", that can reduce image noise by an order of magnitude or more without effective loss of spatial or temporal resolution in typical solar applications.Nearly all scientific images are, ultimately, limited by noise. Noise can be direct Poisson "shot noise" from photon counting effects, or introduced by other means such as detector read noise. Noise is typically represented as a random variable (perhaps with location- or image-dependent characteristics) that is sampled once per pixel or once per resolution element of an image sequence. Noise limits many aspects of image analysis, including photometry, spatiotemporal resolution, feature identification, morphology extraction, and background modeling and separation.Identifying and separating noise from image signal is difficult. The common practice of blurring in space and/or time works because most image "signal" is concentrated in the low Fourier components of an image, while noise is evenly distributed. Blurring in space and/or time attenuates the high spatial and temporal frequencies, reducing noise at the expense of also attenuating image detail. Noise-gating exploits the same property -- "coherence" -- that we use to identify features in images, to separate image features from noise.Processing image sequences through 3-D noise gating results in spectacular (more than 10x) improvements in signal-to-noise ratio, while not blurring bright, resolved features in either space or time. This improves most types of image analysis, including feature identification, time sequence extraction, absolute and relative photometry (including differential emission measure analysis), feature tracking, computer vision, correlation tracking, background modeling, cross-scale analysis, visual display/presentation, and image compression.I will introduce noise gating, describe the method, and show examples from several instruments (including SDO

  7. Accurate characterization of organic thin film transistors in the presence of gate leakage current

    Directory of Open Access Journals (Sweden)

    Vinay K. Singh

    2011-12-01

    Full Text Available The presence of gate leakage through polymer dielectric in organic thin film transistors (OTFT prevents accurate estimation of transistor characteristics especially in subthreshold regime. To mitigate the impact of gate leakage on transfer characteristics and allow accurate estimation of mobility, subthreshold slope and on/off current ratio, a measurement technique involving simultaneous sweep of both gate and drain voltages is proposed. Two dimensional numerical device simulation is used to illustrate the validity of the proposed technique. Experimental results obtained with Pentacene/PMMA OTFT with significant gate leakage show a low on/off current ratio of ∼ 102 and subthreshold is 10 V/decade obtained using conventional measurement technique. The proposed technique reveals that channel on/off current ratio is more than two orders of magnitude higher at ∼104 and subthreshold slope is 4.5 V/decade.

  8. A quantum Fredkin gate.

    Science.gov (United States)

    Patel, Raj B; Ho, Joseph; Ferreyrol, Franck; Ralph, Timothy C; Pryde, Geoff J

    2016-03-01

    Minimizing the resources required to build logic gates into useful processing circuits is key to realizing quantum computers. Although the salient features of a quantum computer have been shown in proof-of-principle experiments, difficulties in scaling quantum systems have made more complex operations intractable. This is exemplified in the classical Fredkin (controlled-SWAP) gate for which, despite theoretical proposals, no quantum analog has been realized. By adding control to the SWAP unitary, we use photonic qubit logic to demonstrate the first quantum Fredkin gate, which promises many applications in quantum information and measurement. We implement example algorithms and generate the highest-fidelity three-photon Greenberger-Horne-Zeilinger states to date. The technique we use allows one to add a control operation to a black-box unitary, something that is impossible in the standard circuit model. Our experiment represents the first use of this technique to control a two-qubit operation and paves the way for larger controlled circuits to be realized efficiently.

  9. Effect of Dielectric Interface on the Performance of MoS2Transistors.

    Science.gov (United States)

    Li, Xuefei; Xiong, Xiong; Li, Tiaoyang; Li, Sichao; Zhang, Zhenfeng; Wu, Yanqing

    2017-12-27

    Because of their wide bandgap and ultrathin body properties, two-dimensional materials are currently being pursued for next-generation electronic and optoelectronic applications. Although there have been increasing numbers of studies on improving the performance of MoS 2 field-effect transistors (FETs) using various methods, the dielectric interface, which plays a decisive role in determining the mobility, interface traps, and thermal transport of MoS 2 FETs, has not been well explored and understood. In this article, we present a comprehensive experimental study on the effect of high-k dielectrics on the performance of few-layer MoS 2 FETs from 300 to 4.3 K. Results show that Al 2 O 3 /HfO 2 could boost the mobility and drain current. Meanwhile, MoS 2 transistors with Al 2 O 3 /HfO 2 demonstrate a 2× reduction in oxide trap density compared to that of the devices with the conventional SiO 2 substrate. Also, we observe a negative differential resistance effect on the device with 1 μm-channel length when using conventional SiO 2 as the gate dielectric due to self-heating, and this is effectively eliminated by using the Al 2 O 3 /HfO 2 gate dielectric. This dielectric engineering provides a highly viable route to realizing high-performance transition metal dichalcogenide-based FETs.

  10. 100-nm gate lithography for double-gate transistors

    Science.gov (United States)

    Krasnoperova, Azalia A.; Zhang, Ying; Babich, Inna V.; Treichler, John; Yoon, Jung H.; Guarini, Kathryn; Solomon, Paul M.

    2001-09-01

    The double gate field effect transistor (FET) is an exploratory device that promises certain performance advantages compared to traditional CMOS FETs. It can be scaled down further than the traditional devices because of the greater electrostatic control by the gates on the channel (about twice as short a channel length for the same gate oxide thickness), has steeper sub-threshold slope and about double the current for the same width. This paper presents lithographic results for double gate FET's developed at IBM's T. J. Watson Research Center. The device is built on bonded wafers with top and bottom gates self-aligned to each other. The channel is sandwiched between the top and bottom polysilicon gates and the gate length is defined using DUV lithography. An alternating phase shift mask was used to pattern gates with critical dimensions of 75 nm, 100 nm and 125 nm in photoresist. 50 nm gates in photoresist have also been patterned by 20% over-exposure of nominal 100 nm lines. No trim mask was needed because of a specific way the device was laid out. UV110 photoresist from Shipley on AR-3 antireflective layer were used. Process windows, developed and etched patterns are presented.

  11. Boron nitride as two dimensional dielectric: Reliability and dielectric breakdown

    Energy Technology Data Exchange (ETDEWEB)

    Ji, Yanfeng; Pan, Chengbin; Hui, Fei; Shi, Yuanyuan; Lanza, Mario, E-mail: mlanza@suda.edu.cn [Institute of Functional Nano and Soft Materials, Collaborative Innovation Center of Suzhou Nano Science and Technology, Soochow University, 199 Ren-Ai Road, Suzhou 215123 (China); Zhang, Meiyun; Long, Shibing [Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 (China); Lian, Xiaojuan; Miao, Feng [National Laboratory of Solid State Microstructures, School of Physics, Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093 (China); Larcher, Luca [DISMI, Università di Modena e Reggio Emilia, 42122 Reggio Emilia (Italy); Wu, Ernest [IBM Research Division, Essex Junction, Vermont 05452 (United States)

    2016-01-04

    Boron Nitride (BN) is a two dimensional insulator with excellent chemical, thermal, mechanical, and optical properties, which make it especially attractive for logic device applications. Nevertheless, its insulating properties and reliability as a dielectric material have never been analyzed in-depth. Here, we present the first thorough characterization of BN as dielectric film using nanoscale and device level experiments complementing with theoretical study. Our results reveal that BN is extremely stable against voltage stress, and it does not show the reliability problems related to conventional dielectrics like HfO{sub 2}, such as charge trapping and detrapping, stress induced leakage current, and untimely dielectric breakdown. Moreover, we observe a unique layer-by-layer dielectric breakdown, both at the nanoscale and device level. These findings may be of interest for many materials scientists and could open a new pathway towards two dimensional logic device applications.

  12. Optics of dielectric microstructures

    DEFF Research Database (Denmark)

    Søndergaard, Thomas

    2002-01-01

    and photonic crystal microcavity. In chapter 4 a general theory based on a Green's tensor formalism is put forward for spontaneous emission in active dielectric microstructures, and an example is given whre the method is applied to a fiber amplifier. The Green's tensor in chapter 4 is constructed a a summation...... over a biorthogonal set of electromagnetic modes. An alternative method based on a Lippmann-Schwinger type integral equation is presented in chapter 5 for the construction of the Green's tensor and calculation of emission of radiation by sources. The integral equation approach is applied to calculate...

  13. Quantum transport and dielectric response of nanometer scale transistors using empirical pseudopotentials

    Science.gov (United States)

    Fang, Jingtian

    As transistors, the most basic component of central processing units (CPU) in all electronic products, are scaling down to the nanometer scale, quantum mechanical effects must be studied to investigate their performance. A formalism to treat quantum electronic transport at the nanometer scale based on empirical pseudopotentials is presented in this dissertation. We develop the transport equations and show the expressions to calculate the device characteristics, such as device current and charge density. We apply this formalism to study ballistic transport in a gate-all-around (GAA) silicon nanowire field-effect transistor (FET) with a body-size of 0.39 nm, a gate length of 6.52 nm, and an effective oxide thickness of 0.43 nm. Simulation results show that this device exhibits a subthreshold slope (SS) of ˜66 mV/decade and a drain-induced barrier-lowering of ~2.5 mV/V. This formalism is also applied to assess the ballistic performance of FETs with armchair-edge graphene nanoribbon (aGNRs) and silicon nanowire (SiNWs) channels and with gate lengths ranging from 5 nm to 15 nm. The device characteristics of the transistors with a 5 nm gate length are compared. Source-to-drain tunneling effects are investigated for SiNWFETs and GNRFETs by comparing the I-V characteristics of each respective transistor with different channel lengths. While a uniform dielectric constant is assumed in solving Poisson equation for the devices simulated above, the knowledge of the atomistic (i.e., local) dielectric permittivity that considers the atomistic electron distribution and quantum-confinement effect is necessary to treat the electrostatic properties accurately. The local permittivity can also provide information about the dielectric property at the interfaces. We use the random-phase approximation, first-order perturbation theory, and empirical pseudopotentials to calculate the static polarizability, susceptibility, and dielectric response function in graphene and GNRs. While the

  14. Field effect doping of graphene in metal/dielectric/graphene heterostructures: A model based upon first-principles calculations

    NARCIS (Netherlands)

    Bokdam, Menno; Khomyakov, Petr; Brocks, G.; Kelly, Paul J.

    2013-01-01

    We study how the Fermi energy of a graphene monolayer separated from a conducting substrate by a dielectric spacer depends on the properties of the substrate and on an applied voltage. An analytical model is developed that describes the Fermi level shift as a function of the gate voltage, of the

  15. SEMICONDUCTOR TECHNOLOGY: TaN wet etch for application in dual-metal-gate integration technology

    Science.gov (United States)

    Yongliang, Li; Qiuxia, Xu

    2009-12-01

    Wet-etch etchants and the TaN film method for dual-metal-gate integration are investigated. Both HF/HN O3/H2O and NH4OH/H2O2 solutions can etch TaN effectively, but poor selectivity to the gate dielectric for the HF/HNO3/H2O solution due to HF being included in HF/HNO3/H2O, and the fact that TaN is difficult to etch in the NH4OH/H2O2 solution at the first stage due to the thin TaOxNy layer on the TaN surface, mean that they are difficult to individually apply to dual-metal-gate integration. A two-step wet etching strategy using the HF/HNO3/H2O solution first and the NH4OH/H2O2 solution later can fully remove thin TaN film with a photo-resist mask and has high selectivity to the HfSiON dielectric film underneath. High-k dielectric film surfaces are smooth after wet etching of the TaN metal gate and MOSCAPs show well-behaved C-V and Jg-Vg characteristics, which all prove that the wet etching of TaN has little impact on electrical performance and can be applied to dual-metal-gate integration technology for removing the first TaN metal gate in the PMOS region.

  16. Broadening of Distribution of Trap States in PbS Quantum Dot Field-Effect Transistors with High-k Dielectrics.

    Science.gov (United States)

    Nugraha, Mohamad I; Häusermann, Roger; Watanabe, Shun; Matsui, Hiroyuki; Sytnyk, Mykhailo; Heiss, Wolfgang; Takeya, Jun; Loi, Maria A

    2017-02-08

    We perform a quantitative analysis of the trap density of states (trap DOS) in PbS quantum dot field-effect transistors (QD-FETs), which utilize several polymer gate insulators with a wide range of dielectric constants. With increasing gate dielectric constant, we observe increasing trap DOS close to the lowest unoccupied molecular orbital (LUMO) of the QDs. In addition, this increase is also consistently followed by broadening of the trap DOS. We rationalize that the increase and broadening of the spectral trap distribution originate from dipolar disorder as well as polaronic interactions, which are appearing at strong dielectric polarization. Interestingly, the increased polaron-induced traps do not show any negative effect on the charge carrier mobility in our QD devices at the highest applied gate voltage, giving the possibility to fabricate efficient low-voltage QD devices without suppressing carrier transport.

  17. Expert Oracle GoldenGate

    CERN Document Server

    Prusinski, Ben; Chung, Richard

    2011-01-01

    Expert Oracle GoldenGate is a hands-on guide to creating and managing complex data replication environments using the latest in database replication technology from Oracle. GoldenGate is the future in replication technology from Oracle, and aims to be best-of-breed. GoldenGate supports homogeneous replication between Oracle databases. It supports heterogeneous replication involving other brands such as Microsoft SQL Server and IBM DB2 Universal Server. GoldenGate is high-speed, bidirectional, highly-parallelized, and makes only a light impact on the performance of databases involved in replica

  18. Channel mobility degradation and charge trapping in high-k/metal gate NMOSFETs

    International Nuclear Information System (INIS)

    Mathew, Shajan; Bera, L.K.; Balasubramanian, N.; Joo, M.S.; Cho, B.J.

    2004-01-01

    NMOSFETs with Metalo-Organic Chemical Vapor Deposited (MOCVD) HfAlO gate dielectric and TiN metal gate have been fabricated. Channel electron mobility was measured using the split-CV method and compared with SiO 2 devices. All high-k devices showed lower mobility compared with SiO 2 reference devices. High-k MOSFETs exhibited significant charge trapping and threshold instability. Threshold voltage recovery with time was studied on devices with oxide/nitride interfacial layer between high-k film and silicon substrate

  19. Top-gate organic field-effect transistors fabricated on shape-memory polymer substrates

    Science.gov (United States)

    Choi, Sangmoo; Fuentes-Hernandez, Canek; Wang, Cheng-Yin; Wei, Andrew; Voit, Walter; Zhang, Yadong; Barlow, Stephen; Marder, Seth R.; Kippelen, Bernard

    2015-08-01

    We demonstrate top-gate organic field-effect transistors (OFETs) with a bilayer gate dielectric and doped contacts fabricated on shape-memory polymer (SMP) substrates. SMPs exhibit large variations in Young's modulus dependent on temperature and have the ability to fix two or more geometric configurations when a proper stimulus is applied. These unique properties make SMPs desirable for three-dimensional shape applications of OFETs. The electrical properties of OFETs on SMP substrates are presented and compared to those of OFETs on traditional glass substrates.

  20. Dielectric Actuation of Polymers

    Science.gov (United States)

    Niu, Xiaofan

    Dielectric polymers are widely used in a plurality of applications, such as electrical insulation, dielectric capacitors, and electromechanical actuators. Dielectric polymers with large strain deformations under an electric field are named dielectric elastomers (DE), because of their relative low modulus, high elongation at break, and outstanding resilience. Dielectric elastomer actuators (DEA) are superior to traditional transducers as a muscle-like technology: large strains, high energy densities, high coupling efficiency, quiet operation, and light weight. One focus of this dissertation is on the design of DE materials with high performance and easy processing. UV radiation curing of reactive species is studied as a generic synthesis methodology to provide a platform for material scientists to customize their own DE materials. Oligomers/monomers, crosslinkers, and other additives are mixed and cured at appropriate ratios to control the stress-strain response, suppress electromechanical instability of the resulting polymers, and provide stable actuation strains larger than 100% and energy densities higher than 1 J/g. The processing is largely simplified in the new material system by removal of the prestretching step. Multilayer stack actuators with 11% linear strain are demonstrated in a procedure fully compatible with industrial production. A multifunctional DE derivative material, bistable electroactive polymer (BSEP), is invented enabling repeatable rigid-to-rigid deformation without bulky external structures. Bistable actuation allows the polymer actuator to have two distinct states that can support external load without device failure. Plasticizers are used to lower the glass transition temperature to 45 °C. Interpenetrating polymer network structure is established inside the BSEP to suppress electromechanical instability, providing a breakdown field of 194 MV/m and a stable bistable strain as large as 228% with a 97% strain fixity. The application of BSEP

  1. Quantum-coherence-assisted tunable on- and off-resonance tunneling through a quantum-dot-molecule dielectric film

    International Nuclear Information System (INIS)

    Shen Jianqi; Zeng Ruixi

    2017-01-01

    Quantum-dot-molecular phase coherence (and the relevant quantum-interference-switchable optical response) can be utilized to control electromagnetic wave propagation via a gate voltage, since quantum-dot molecules can exhibit an effect of quantum coherence (phase coherence) when quantum-dot-molecular discrete multilevel transitions are driven by an electromagnetic wave. Interdot tunneling of carriers (electrons and holes) controlled by the gate voltage can lead to destructive quantum interference in a quantum-dot molecule that is coupled to an incident electromagnetic wave, and gives rise to a quantum coherence effect (e.g., electromagnetically induced transparency, EIT) in a quantum-dot-molecule dielectric film. The tunable on- and off-resonance tunneling effect of an incident electromagnetic wave (probe field) through such a quantum-coherent quantum-dot-molecule dielectric film is investigated. It is found that a high gate voltage can lead to the EIT phenomenon of the quantum-dot-molecular systems. Under the condition of on-resonance light tunneling through the present quantum-dot-molecule dielectric film, the probe field should propagate without loss if the probe frequency detuning is zero. Such an effect caused by both EIT and resonant tunneling, which is sensitive to the gate voltage, can be utilized for designing devices such as photonic switching, transistors, and logic gates. (author)

  2. Molecular logic gate arrays.

    Science.gov (United States)

    de Silva, A Prasanna

    2011-03-01

    Chemists are now able to emulate the ideas and instruments of mathematics and computer science with molecules. The integration of molecular logic gates into small arrays has been a growth area during the last few years. The design principles underlying a collection of these cases are examined. Some of these computing molecules are applicable in medical- and biotechnologies. Cases of blood diagnostics, 'lab-on-a-molecule' systems, and molecular computational identification of small objects are included. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  3. Liquid–Solid Dual-Gate Organic Transistors with Tunable Threshold Voltage for Cell Sensing

    KAUST Repository

    Zhang, Yu

    2017-10-17

    Liquid electrolyte-gated organic field effect transistors and organic electrochemical transistors have recently emerged as powerful technology platforms for sensing and simulation of living cells and organisms. For such applications, the transistors are operated at a gate voltage around or below 0.3 V because prolonged application of a higher voltage bias can lead to membrane rupturing and cell death. This constraint often prevents the operation of the transistors at their maximum transconductance or most sensitive regime. Here, we exploit a solid–liquid dual-gate organic transistor structure, where the threshold voltage of the liquid-gated conduction channel is controlled by an additional gate that is separated from the channel by a metal-oxide gate dielectric. With this design, the threshold voltage of the “sensing channel” can be linearly tuned in a voltage window exceeding 0.4 V. We have demonstrated that the dual-gate structure enables a much better sensor response to the detachment of human mesenchymal stem cells. In general, the capability of tuning the optimal sensing bias will not only improve the device performance but also broaden the material selection for cell-based organic bioelectronics.

  4. Graphene-graphene oxide floating gate transistor memory.

    Science.gov (United States)

    Jang, Sukjae; Hwang, Euyheon; Lee, Jung Heon; Park, Ho Seok; Cho, Jeong Ho

    2015-01-21

    A novel transparent, flexible, graphene channel floating-gate transistor memory (FGTM) device is fabricated using a graphene oxide (GO) charge trapping layer on a plastic substrate. The GO layer, which bears ammonium groups (NH3+), is prepared at the interface between the crosslinked PVP (cPVP) tunneling dielectric and the Al2 O3 blocking dielectric layers. Important design rules are proposed for a high-performance graphene memory device: (i) precise doping of the graphene channel, and (ii) chemical functionalization of the GO charge trapping layer. How to control memory characteristics by graphene doping is systematically explained, and the optimal conditions for the best performance of the memory devices are found. Note that precise control over the doping of the graphene channel maximizes the conductance difference at a zero gate voltage, which reduces the device power consumption. The proposed optimization via graphene doping can be applied to any graphene channel transistor-type memory device. Additionally, the positively charged GO (GO-NH3+) interacts electrostatically with hydroxyl groups of both UV-treated Al2 O3 and PVP layers, which enhances the interfacial adhesion, and thus the mechanical stability of the device during bending. The resulting graphene-graphene oxide FGTMs exhibit excellent memory characteristics, including a large memory window (11.7 V), fast switching speed (1 μs), cyclic endurance (200 cycles), stable retention (10(5) s), and good mechanical stability (1000 cycles). © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. Physical implication of transition voltage in organic nano-floating-gate nonvolatile memories

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Shun; Gao, Xu, E-mail: wangsd@suda.edu.cn, E-mail: gaoxu@suda.edu.cn; Zhong, Ya-Nan; Zhang, Zhong-Da; Xu, Jian-Long; Wang, Sui-Dong, E-mail: wangsd@suda.edu.cn, E-mail: gaoxu@suda.edu.cn [Institute of Functional Nano and Soft Materials (FUNSOM), Jiangsu Key Laboratory for Carbon-Based Functional Materials and Devices, Soochow University, Suzhou, Jiangsu 215123 (China)

    2016-07-11

    High-performance pentacene-based organic field-effect transistor nonvolatile memories, using polystyrene as a tunneling dielectric and Au nanoparticles as a nano-floating-gate, show parallelogram-like transfer characteristics with a featured transition point. The transition voltage at the transition point corresponds to a threshold electric field in the tunneling dielectric, over which stored electrons in the nano-floating-gate will start to leak out. The transition voltage can be modulated depending on the bias configuration and device structure. For p-type active layers, optimized transition voltage should be on the negative side of but close to the reading voltage, which can simultaneously achieve a high ON/OFF ratio and good memory retention.

  6. Design of double gate vertical tunnel field effect transistor using HDB and its performance estimation

    Science.gov (United States)

    Seema; Chauhan, Sudakar Singh

    2018-05-01

    In this paper, we demonstrate the double gate vertical tunnel field-effect transistor using homo/hetero dielectric buried oxide (HDB) to obtain the optimized device characteristics. In this concern, the existence of double gate, HDB and electrode work-function engineering enhances DC performance and Analog/RF performance. The use of electrostatic doping helps to achieve higher on-current owing to occurrence of higher tunneling generation rate of charge carriers at the source/epitaxial interface. Further, lightly doped drain region and high- k dielectric below channel and drain region are responsible to suppress the ambipolar current. Simulated results clarifies that proposed device have achieved the tremendous performance in terms of driving current capability, steeper subthreshold slope (SS), drain induced barrier lowering (DIBL), hot carrier effects (HCEs) and high frequency parameters for better device reliability.

  7. Anomalous positive flatband voltage shifts in metal gate stacks containing rare-earth oxide capping layers

    KAUST Repository

    Caraveo-Frescas, J. A.

    2012-03-09

    It is shown that the well-known negative flatband voltage (VFB) shift, induced by rare-earth oxide capping in metal gate stacks, can be completely reversed in the absence of the silicon overlayer. Using TaN metal gates and Gd2O3-doped dielectric, we measure a ∼350 mV negative shift with the Si overlayer present and a ∼110 mV positive shift with the Si overlayer removed. This effect is correlated to a positive change in the average electrostatic potential at the TaN/dielectric interface which originates from an interfacial dipole. The dipole is created by the replacement of interfacial oxygen atoms in the HfO2 lattice with nitrogen atoms from TaN.

  8. High performance organic field-effect transistors with ultra-thin HfO{sub 2} gate insulator deposited directly onto the organic semiconductor

    Energy Technology Data Exchange (ETDEWEB)

    Ono, S., E-mail: shimpei@criepi.denken.or.jp [Central Research Institute of Electric Power Industry, Komae, Tokyo 201-8511 (Japan); Häusermann, R. [Central Research Institute of Electric Power Industry, Komae, Tokyo 201-8511 (Japan); Laboratory for Solid State Physics, ETH Zurich, Zurich 8093 (Switzerland); Chiba, D. [Institute for Chemical Research, Kyoto University, Gokasho, Uji, Kyoto 611-0011 (Japan); PRESTO, Japan Science and Technology Agency, 4-1-8 Honcho Kawaguchi, Saitama 322-0012 (Japan); Department of Applied Physics, University of Tokyo, Tokyo 113-8656 (Japan); Shimamura, K.; Ono, T. [Institute for Chemical Research, Kyoto University, Gokasho, Uji, Kyoto 611-0011 (Japan); Batlogg, B. [Laboratory for Solid State Physics, ETH Zurich, Zurich 8093 (Switzerland)

    2014-01-06

    We have produced stable organic field-effect transistors (OFETs) with an ultra-thin HfO{sub 2} gate insulator deposited directly on top of rubrene single crystals by atomic layer deposition (ALD). We find that ALD is a gentle deposition process to grow thin films without damaging rubrene single crystals, as results these devices have a negligibly small threshold voltage and are very stable against gate-bias-stress, and the mobility exceeds 1 cm{sup 2}/V s. Moreover, the devices show very little degradation even when kept in air for more than 2 months. These results demonstrate thin HfO{sub 2} layers deposited by ALD to be well suited as high capacitance gate dielectrics in OFETs operating at small gate voltage. In addition, the dielectric layer acts as an effective passivation layer to protect the organic semiconductor.

  9. Works close to gate B

    CERN Document Server

    GS Department

    2011-01-01

    In connection to the TRAM project, drainage works will be carried out close to gate B until the end of next week. In order to avoid access problems, if arriving by car, please use gates A and E. Department of General Infrastructure Services (GS) GS-SE Group

  10. Penn State DOE GATE Program

    Energy Technology Data Exchange (ETDEWEB)

    Anstrom, Joel

    2012-08-31

    The Graduate Automotive Technology Education (GATE) Program at The Pennsylvania State University (Penn State) was established in October 1998 pursuant to an award from the U.S. Department of Energy (U.S. DOE). The focus area of the Penn State GATE Program is advanced energy storage systems for electric and hybrid vehicles.

  11. GATE: Improving the computational efficiency

    Energy Technology Data Exchange (ETDEWEB)

    Staelens, S. [UGent-ELIS, St-Pietersnieuwstraat, 41, B-9000 Gent (Belgium)]. E-mail: steven.staelens@ugent.be; De Beenhouwer, J. [UGent-ELIS, St-Pietersnieuwstraat, 41, B-9000 Gent (Belgium); Kruecker, D. [Institute of Medicine-Forschungszemtrum Juelich, D-52425 Juelich (Germany); Maigne, L. [Departement de Curietherapie-Radiotherapie, Centre Jean Perrin, F-63000 Clermont-Ferrand (France); Rannou, F. [Departamento de Ingenieria Informatica, Universidad de Santiago de Chile, Santiago (Chile); Ferrer, L. [INSERM U601, CHU Nantes, F-44093 Nantes (France); D' Asseler, Y. [UGent-ELIS, St-Pietersnieuwstraat, 41, B-9000 Gent (Belgium); Buvat, I. [INSERM U678 UPMC, CHU Pitie-Salpetriere, F-75634 Paris (France); Lemahieu, I. [UGent-ELIS, St-Pietersnieuwstraat, 41, B-9000 Gent (Belgium)

    2006-12-20

    GATE is a software dedicated to Monte Carlo simulations in Single Photon Emission Computed Tomography (SPECT) and Positron Emission Tomography (PET). An important disadvantage of those simulations is the fundamental burden of computation time. This manuscript describes three different techniques in order to improve the efficiency of those simulations. Firstly, the implementation of variance reduction techniques (VRTs), more specifically the incorporation of geometrical importance sampling, is discussed. After this, the newly designed cluster version of the GATE software is described. The experiments have shown that GATE simulations scale very well on a cluster of homogeneous computers. Finally, an elaboration on the deployment of GATE on the Enabling Grids for E-Science in Europe (EGEE) grid will conclude the description of efficiency enhancement efforts. The three aforementioned methods improve the efficiency of GATE to a large extent and make realistic patient-specific overnight Monte Carlo simulations achievable.

  12. GATE: Improving the computational efficiency

    International Nuclear Information System (INIS)

    Staelens, S.; De Beenhouwer, J.; Kruecker, D.; Maigne, L.; Rannou, F.; Ferrer, L.; D'Asseler, Y.; Buvat, I.; Lemahieu, I.

    2006-01-01

    GATE is a software dedicated to Monte Carlo simulations in Single Photon Emission Computed Tomography (SPECT) and Positron Emission Tomography (PET). An important disadvantage of those simulations is the fundamental burden of computation time. This manuscript describes three different techniques in order to improve the efficiency of those simulations. Firstly, the implementation of variance reduction techniques (VRTs), more specifically the incorporation of geometrical importance sampling, is discussed. After this, the newly designed cluster version of the GATE software is described. The experiments have shown that GATE simulations scale very well on a cluster of homogeneous computers. Finally, an elaboration on the deployment of GATE on the Enabling Grids for E-Science in Europe (EGEE) grid will conclude the description of efficiency enhancement efforts. The three aforementioned methods improve the efficiency of GATE to a large extent and make realistic patient-specific overnight Monte Carlo simulations achievable

  13. Thermal Simulation of Switching Pulses in an Insulated Gate Bipolar Transistor (IGBT) Power Module

    Science.gov (United States)

    2015-02-01

    prepared with SolidWorks computer-aided design software. The module has 8 silicon IGBTs mounted on copper (Cu) lands bonded onto a dielectric circuit...aluminum nitride ARL US Army Research Laboratory Cu copper IGBT insulated gate bipolar transistor ms millisecond 3D 3-dimensional W watt...RDRL CIO LL TECHL LIB 1 GOVT PRNTG OFC (PDF) ATTN A MALHOTRA 5 US ARMY RSRCH LAB (PDF) ATTN RDRL SED C W TIPTON ATTN RDRL SED P D

  14. Solution-Processed Dielectrics Based on Thickness-Sorted Two-Dimensional Hexagonal Boron Nitride Nanosheets

    Energy Technology Data Exchange (ETDEWEB)

    Zhu, Jian; Kang, Joohoon; Kang, Junmo; Jariwala, Deep; Wood, Joshua D.; Seo, Jung-Woo T.; Chen, Kan-Sheng; Marks, Tobin J.; Hersam, Mark C.

    2015-10-14

    Gate dielectrics directly affect the mobility, hysteresis, power consumption, and other critical device metrics in high-performance nanoelectronics. With atomically flat and dangling bond-free surfaces, hexagonal boron nitride (h-BN) has emerged as an ideal dielectric for graphene and related two-dimensional semiconductors. While high-quality, atomically thin h-BN has been realized via micromechanical cleavage and chemical vapor deposition, existing liquid exfoliation methods lack sufficient control over h-BN thickness and large-area film quality, thus limiting its use in solution-processed electronics. Here, we employ isopycnic density gradient ultracentrifugation for the preparation of monodisperse, thickness-sorted h-BN inks, which are subsequently layer-by-layer assembled into ultrathin dielectrics with low leakage currents of 3 × 10–9 A/cm2 at 2 MV/cm and high capacitances of 245 nF/cm2. The resulting solution-processed h-BN dielectric films enable the fabrication of graphene field-effect transistors with negligible hysteresis and high mobilities up to 7100 cm2 V–1 s–1 at room temperature. These h-BN inks can also be used as coatings on conventional dielectrics to minimize the effects of underlying traps, resulting in improvements in overall device performance. Overall, this approach for producing and assembling h-BN dielectric inks holds significant promise for translating the superlative performance of two-dimensional heterostructure devices to large-area, solution-processed nanoelectronics.

  15. Tunable dielectric properties of ferrite-dielectric based metamaterial.

    Directory of Open Access Journals (Sweden)

    K Bi

    Full Text Available A ferrite-dielectric metamaterial composed of dielectric and ferrite cuboids has been investigated by experiments and simulations. By interacting with the electromagnetic wave, the Mie resonance can take place in the dielectric cuboids and the ferromagnetic precession will appear in the ferrite cuboids. The magnetic field distributions show the electric Mie resonance of the dielectric cuboids can be influenced by the ferromagnetic precession of ferrite cuboids when a certain magnetic field is applied. The effective permittivity of the metamaterial can be tuned by modifying the applied magnetic field. A good agreement between experimental and simulated results is demonstrated, which confirms that these metamaterials can be used for tunable microwave devices.

  16. The nature of dielectric breakdown

    Science.gov (United States)

    Li, X.; Tung, C. H.; Pey, K. L.

    2008-08-01

    Dielectric breakdown is the process of local materials transiting from insulating to conductive when the dielectric is submerged in a high external electric field environment. We show that the atomistic changes of the chemical bonding in a nanoscale breakdown path are extensive and irreversible. Oxygen atoms in dielectric SiO2 are washed out with substoichiometric silicon oxide (SiOx with x <2) formation, and local energy gap lowering with intermediate bonding state of silicon atoms (Si1+, Si2+, and Si3+) in the percolation leakage path. Oxygen deficiency within the breakdown path is estimated to be as high as 50%-60%.

  17. Study of Gaussian Doped Double Gate JunctionLess (GD-DG-JL) transistor including source drain depletion length: Model for sub-threshold behavior

    Science.gov (United States)

    Kumari, Vandana; Kumar, Ayush; Saxena, Manoj; Gupta, Mridula

    2018-01-01

    The sub-threshold model formulation of Gaussian Doped Double Gate JunctionLess (GD-DG-JL) FET including source/drain depletion length is reported in the present work under the assumption that the ungated regions are fully depleted. To provide deeper insight into the device performance, the impact of gaussian straggle, channel length, oxide and channel thickness and high-k gate dielectric has been studied using extensive TCAD device simulation.

  18. Manipulation of plasmonic resonances in graphene coated dielectric cylinders

    KAUST Repository

    Ge, Lixin

    2016-11-16

    Graphene sheets can support surface plasmon as the Dirac electrons oscillate collectively with electromagnetic waves. Compared with the surface plasmon in conventional metal (e.g., Ag and Au), graphene plasmonic owns many remarkable merits especially in Terahertz and far infrared frequencies, such as deep sub-wavelength, low loss, and high tunability. For graphene coated dielectric nano-scatters, localized surface plasmon (LSP)exist and can be excited under specific conditions. The LSPs are associated with the Mie resonance modes, leading to extraordinary large scattering and absorption cross section. In this work, we study systematically the optical scattering properties for graphene coated dielectric cylinders. It is found that the LSP can be manipulated by geometrical parameters and external electric gating. Generally, the resonance frequencies for different resonance modes are not the same. However, under proper design, we show that different resonance modes (e.g., dipole mode, quadruple mode etc.) can be excited at the same frequency. Thus, the scattering and absorption by graphene coated dielectric cylinders can indeed overcome the single channel limit. Our finding may open up new avenues in applications for the graphene-based THz optoelectronic devices.

  19. Light propagation in quasiperiodic dielectric multilayers separated by graphene

    Science.gov (United States)

    Costa, Carlos H.; Pereira, Luiz F. C.; Bezerra, Claudionor G.

    2017-09-01

    The study of photonic crystals, artificial materials whose dielectric properties can be tailored according to the stacking of its constituents, remains an attractive research area. In this article we have employed a transfer matrix treatment to study the propagation of light waves in Fibonacci quasiperiodic dielectric multilayers with graphene embedded. We calculated their dispersion and transmission spectra in order to investigate the effects of the graphene monolayers and quasiperiodic disorder on the system physical behavior. The quasiperiodic dielectric multilayer is composed of two building blocks, silicon dioxide (building block A =SiO2 ) and titanium dioxide (building block B =TiO2 ). Our numerical results show that the presence of graphene monolayers reduces the transmissivity on the whole range of frequency and induces a transmission gap in the low frequency region. Regarding the polarization of the light wave, we found that the transmission coefficient is higher for the transverse magnetic (TM) case than for the transverse electric (TE) one. We also conclude from our numerical results that the graphene induced photonic band gaps (GIPBGs) do not depend on the polarization (TE or TM) of the light wave nor on the Fibonacci generation index n . Moreover, the GIPBGs are omnidirectional photonic band gaps, therefore light cannot propagate in these structures for frequencies lower than a certain value, whatever the incidence angle. Finally, a plot of the transmission spectra versus chemical potential shows that one can, in principle, adjust the width of the photonic band gap by tuning the chemical potential via a gate voltage.

  20. Voltage gating by molecular subunits of Na+ and K+ ion channels: higher-dimensional cubic kinetics, rate constants, and temperature.

    Science.gov (United States)

    Fohlmeister, Jürgen F

    2015-06-01

    The structural similarity between the primary molecules of voltage-gated Na and K channels (alpha subunits) and activation gating in the Hodgkin-Huxley model is brought into full agreement by increasing the model's sodium kinetics to fourth order (m(3) → m(4)). Both structures then virtually imply activation gating by four independent subprocesses acting in parallel. The kinetics coalesce in four-dimensional (4D) cubic diagrams (16 states, 32 reversible transitions) that show the structure to be highly failure resistant against significant partial loss of gating function. Rate constants, as fitted in phase plot data of retinal ganglion cell excitation, reflect the molecular nature of the gating transitions. Additional dimensions (6D cubic diagrams) accommodate kinetically coupled sodium inactivation and gating processes associated with beta subunits. The gating transitions of coupled sodium inactivation appear to be thermodynamically irreversible; response to dielectric surface charges (capacitive displacement) provides a potential energy source for those transitions and yields highly energy-efficient excitation. A comparison of temperature responses of the squid giant axon (apparently Arrhenius) and mammalian channel gating yields kinetic Q10 = 2.2 for alpha unit gating, whose transitions are rate-limiting at mammalian temperatures; beta unit kinetic Q10 = 14 reproduces the observed non-Arrhenius deviation of mammalian gating at low temperatures; the Q10 of sodium inactivation gating matches the rate-limiting component of activation gating at all temperatures. The model kinetics reproduce the physiologically large frequency range for repetitive firing in ganglion cells and the physiologically observed strong temperature dependence of recovery from inactivation. Copyright © 2015 the American Physiological Society.

  1. Gated equilibrium bloodpool scintigraphy

    International Nuclear Information System (INIS)

    Reinders Folmer, S.C.C.

    1981-01-01

    This thesis deals with the clinical applications of gated equilibrium bloodpool scintigraphy, performed with either a gamma camera or a portable detector system, the nuclear stethoscope. The main goal has been to define the value and limitations of noninvasive measurements of left ventricular ejection fraction as a parameter of cardiac performance in various disease states, both for diagnostic purposes as well as during follow-up after medical or surgical intervention. Secondly, it was attempted to extend the use of the equilibrium bloodpool techniques beyond the calculation of ejection fraction alone by considering the feasibility to determine ventricular volumes and by including the possibility of quantifying valvular regurgitation. In both cases, it has been tried to broaden the perspective of the observations by comparing them with results of other, invasive and non-invasive, procedures, in particular cardiac catheterization, M-mode echocardiography and myocardial perfusion scintigraphy. (Auth.)

  2. High-k perovskite gate oxide BaHfO3

    Science.gov (United States)

    Kim, Young Mo; Park, Chulkwon; Ha, Taewoo; Kim, Useong; Kim, Namwook; Shin, Juyeon; Kim, Youjung; Yu, Jaejun; Kim, Jae Hoon; Char, Kookrin

    2017-01-01

    We have investigated epitaxial BaHfO3 as a high-k perovskite dielectric. From x-ray diffraction measurement, we confirmed the epitaxial growth of BaHfO3 on BaSnO3 and MgO. We measured optical and dielectric properties of the BaHfO3 gate insulator; the optical bandgap, the dielectric constant, and the breakdown field. Furthermore, we fabricated a perovskite heterostructure field effect transistor using epitaxial BaHfO3 as a gate insulator and La-doped BaSnO3 as a channel layer on SrTiO3 substrate. To reduce the threading dislocations and enhance the electrical properties of the channel, an undoped BaSnO3 buffer layer was grown on SrTiO3 substrates before the channel layer deposition. The device exhibited a field effect mobility value of 52.7 cm2 V-1 s-1, a Ion/Ioff ratio higher than 107, and a subthreshold swing value of 0.80 V dec-1. We compare the device performances with those of other field effect transistors based on BaSnO3 channels and different gate oxides.

  3. High-k perovskite gate oxide BaHfO3

    Directory of Open Access Journals (Sweden)

    Young Mo Kim

    2017-01-01

    Full Text Available We have investigated epitaxial BaHfO3 as a high-k perovskite dielectric. From x-ray diffraction measurement, we confirmed the epitaxial growth of BaHfO3 on BaSnO3 and MgO. We measured optical and dielectric properties of the BaHfO3 gate insulator; the optical bandgap, the dielectric constant, and the breakdown field. Furthermore, we fabricated a perovskite heterostructure field effect transistor using epitaxial BaHfO3 as a gate insulator and La-doped BaSnO3 as a channel layer on SrTiO3 substrate. To reduce the threading dislocations and enhance the electrical properties of the channel, an undoped BaSnO3 buffer layer was grown on SrTiO3 substrates before the channel layer deposition. The device exhibited a field effect mobility value of 52.7 cm2 V−1 s−1, a Ion/Ioff ratio higher than 107, and a subthreshold swing value of 0.80 V dec−1. We compare the device performances with those of other field effect transistors based on BaSnO3 channels and different gate oxides.

  4. Dielectric collapse at the LaAlO3/SrTiO3(001) heterointerface under applied electric field.

    Science.gov (United States)

    Minohara, M; Hikita, Y; Bell, C; Inoue, H; Hosoda, M; Sato, H K; Kumigashira, H; Oshima, M; Ikenaga, E; Hwang, H Y

    2017-08-25

    The fascinating interfacial transport properties at the LaAlO 3 /SrTiO 3 heterointerface have led to intense investigations of this oxide system. Exploiting the large dielectric constant of SrTiO 3 at low temperatures, tunability in the interfacial conductivity over a wide range has been demonstrated using a back-gate device geometry. In order to understand the effect of back-gating, it is crucial to assess the interface band structure and its evolution with external bias. In this study, we report measurements of the gate-bias dependent interface band alignment, especially the confining potential profile, at the conducting LaAlO 3 /SrTiO 3 (001) heterointerface using soft and hard x-ray photoemission spectroscopy in conjunction with detailed model simulations. Depth-profiling analysis incorporating the electric field dependent dielectric constant in SrTiO 3 reveals that a significant potential drop on the SrTiO 3 side of the interface occurs within ~2 nm of the interface under negative gate-bias. These results demonstrate gate control of the collapse of the dielectric permittivity at the interface, and explain the dramatic loss of electron mobility with back-gate depletion.

  5. Ultrafast, high precision gated integrator

    Energy Technology Data Exchange (ETDEWEB)

    Wang, X.

    1995-01-01

    An ultrafast, high precision gated integrator has been developed by introducing new design approaches that overcome the problems associated with earlier gated integrator circuits. The very high speed is evidenced by the output settling time of less than 50 ns and 20 MHz input pulse rate. The very high precision is demonstrated by the total output offset error of less than 0.2mV and the output droop rate of less than 10{mu}V/{mu}s. This paper describes the theory of this new gated integrator circuit operation. The completed circuit test results are presented.

  6. New designs of a complete set of Photonic Crystals logic gates

    Science.gov (United States)

    Hussein, Hussein M. E.; Ali, Tamer A.; Rafat, Nadia H.

    2018-03-01

    In this paper, we introduce new designs of all-optical OR, AND, XOR, NOT, NOR, NAND and XNOR logic gates based on the interference effect. The designs are built using 2D square lattice Photonic Crystal (PhC) structure of dielectric rods embedded in air background. The lattice constant, a, and the rod radius, r, are designed to achieve maximum operating range of frequencies using the gap map. We use the Plane Wave Expansion (PWE) method to obtain the band structure and the gap map of the proposed designs. The operating wavelengths achieve a wide band range that varies between 1266.9 nm and 1996 nm with center wavelength at 1550 nm. The Finite-Difference Time-Domain (FDTD) method is used to study the field behavior inside the PhC gates. The gates satisfy their truth tables with reasonable power contrast ratio between logic '1' and logic '0'.

  7. Analysis of OFF-state and ON-state performance in a silicon-on-insulator power MOSFET with a low-k dielectric trench

    International Nuclear Information System (INIS)

    Wang Zhigang; Zhang Bo; Li Zhaoji

    2013-01-01

    A novel silicon-on-insulator (SOI) MOSFET with a variable low-k dielectric trench (LDT MOSFET) is proposed and its performance and characteristics are investigated. The trench in the drift region between drain and source is filled with low-k dielectric to extend the effective drift region. At OFF state, the low-k dielectric trench (LDT) can sustain high voltage and enhance the dielectric field due to the accumulation of ionized charges. At the same time, the vertical dielectric field in the buried oxide can also be enhanced by these ionized charges. Additionally, ON-state analysis of LDT MOSFET demonstrates excellent forward characteristics, such as low gate-to-drain charge density ( 2 ) and a robust safe operating area (0–84 V). (semiconductor devices)

  8. 49 CFR 234.223 - Gate arm.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Gate arm. 234.223 Section 234.223 Transportation... Maintenance Standards § 234.223 Gate arm. Each gate arm, when in the downward position, shall extend across... clearly viewed by approaching highway users. Each gate arm shall start its downward motion not less than...

  9. Demonstration of a Quantum Nondemolition Sum Gate

    DEFF Research Database (Denmark)

    Yoshikawa, J.; Miwa, Y.; Huck, Alexander

    2008-01-01

    The sum gate is the canonical two-mode gate for universal quantum computation based on continuous quantum variables. It represents the natural analogue to a qubit C-NOT gate. In addition, the continuous-variable gate describes a quantum nondemolition (QND) interaction between the quadrature...

  10. Reversible logic gates on Physarum Polycephalum

    International Nuclear Information System (INIS)

    Schumann, Andrew

    2015-01-01

    In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum

  11. Systematic reliability study of top-gate p- and n-channel organic field-effect transistors.

    Science.gov (United States)

    Hwang, Do Kyung; Fuentes-Hernandez, Canek; Fenoll, Mathieu; Yun, Minseong; Park, Jihoon; Shim, Jae Won; Knauer, Keith A; Dindar, Amir; Kim, Hyungchul; Kim, Yongjin; Kim, Jungbae; Cheun, Hyeunseok; Payne, Marcia M; Graham, Samuel; Im, Seongil; Anthony, John E; Kippelen, Bernard

    2014-03-12

    We report on a systematic investigation on the performance and stability of p-channel and n-channel top-gate OFETs, with a CYTOP/Al2O3 bilayer gate dielectric, exposed to controlled dry oxygen and humid atmospheres. Despite the severe conditions of environmental exposure, p-channel and n-channel top-gate OFETs show only minor changes of their performance parameters without undergoing irreversible damage. When correlated with the conditions of environmental exposure, these changes provide new insight into the possible physical mechanisms in the presence of oxygen and water. Photoexcited charge collection spectroscopy experiments provided further evidence of oxygen and water effects on OFETs. Top-gate OFETs also display outstanding durability, even when exposed to oxygen plasma and subsequent immersion in water or operated under aqueous media. These remarkable properties arise as a consequence of the use of relatively air stable organic semiconductors and proper engineering of the OFET structure.

  12. Bill Gates vil redde Folkeskolen

    DEFF Research Database (Denmark)

    Fejerskov, Adam Moe

    2014-01-01

    Det amerikanske uddannelsessystem bliver for tiden udsat for hård kritik, ledt an af Microsoft stifteren Bill Gates. Gates har indtil videre brugt 3 mia. kroner på at skabe opbakning til tiltag som præstationslønning af lærere og strømlining af pensum på tværs af alle skoler i landet...

  13. Latest design of gate valves

    Energy Technology Data Exchange (ETDEWEB)

    Kurzhofer, U.; Stolte, J.; Weyand, M.

    1996-12-01

    Babcock Sempell, one of the most important valve manufacturers in Europe, has delivered valves for the nuclear power industry since the beginning of the peaceful application of nuclear power in the 1960s. The latest innovation by Babcock Sempell is a gate valve that meets all recent technical requirements of the nuclear power technology. At the moment in the United States, Germany, Sweden, and many other countries, motor-operated gate and globe valves are judged very critically. Besides the absolute control of the so-called {open_quotes}trip failure,{close_quotes} the integrity of all valve parts submitted to operational forces must be maintained. In case of failure of the limit and torque switches, all valve designs have been tested with respect to the quality of guidance of the gate. The guidances (i.e., guides) shall avoid a tilting of the gate during the closing procedure. The gate valve newly designed by Babcock Sempell fulfills all these characteristic criteria. In addition, the valve has cobalt-free seat hardfacing, the suitability of which has been proven by friction tests as well as full-scale blowdown tests at the GAP of Siemens in Karlstein, West Germany. Babcock Sempell was to deliver more than 30 gate valves of this type for 5 Swedish nuclear power stations by autumn 1995. In the presentation, the author will report on the testing performed, qualifications, and sizing criteria which led to the new technical design.

  14. Synthesis, characterization and radiation damage studies of high-k dielectric (HfO2) films for MOS device applications

    Science.gov (United States)

    Manikanthababu, N.; Arun, N.; Dhanunjaya, M.; Saikiran, V.; Nageswara Rao, S. V. S.; Pathak, A. P.

    2015-03-01

    The current trend in miniaturization of metal oxide semiconductor devices needs high-k dielectric materials as gate dielectrics. Among all the high-k dielectric materials, HfO2 enticed the most attention, and it has already been introduced as a new gate dielectric by the semiconductor industry. High dielectric constant (HfO2) films (10 nm) were deposited on Si substrates using the e-beam evaporation technique. These samples were characterized by various structural and electrical characterization techniques. Rutherford backscattering spectrometry, X-ray reflectivity, and energy-dispersive X-ray analysis measurements were performed to determine the thickness and stoichiometry of these films. The results obtained from various measurements are found to be consistent with each other. These samples were further characterized by I-V (leakage current) and C-V measurements after depositing suitable metal contacts. A significant decrease in the leakage current and the corresponding increase in device capacitance are observed when these samples were annealed in oxygen atmosphere. Furthermore, we have studied the influence of gamma irradiation on the electrical properties of these films as a function of the irradiation dose. The observed increase in the leakage current accompanied by changes in various other parameters, such as accumulation capacitance, inversion capacitance, flat band voltage, mid-gap voltage, etc., indicates the presence of various types of defects in irradiated samples.

  15. New theory of effective work functions at metal/high-k dielectric interfaces : application to metal/high-k HfO2 and la2O 3 dielectric interfaces

    OpenAIRE

    Shiraishi, Kenji; Nakayama, Takashi; Akasaka, Yasushi; Miyazaki, Seiichi; Nakaoka, Takashi; Ohmori, Kenji; Ahmet, Parhat; Torii, Kazuyoshi; Watanabe, Heiji; Chikyow, Toyohiro; Nara, Yasuo; Iwai, Hiroshi; Yamada, Keisaku

    2006-01-01

    We have constructed a universal theory of the work functions at metal/high-k HfO2 and La2O3 dielectric interfaces by introducing a new concept of generalized charge neutrality levels. Our theory systematically reproduces the experimentally observed work functions of various gate metals on Hf-based high-k dielectrics, including the hitherto unpredictable behaviors of the work functions of p-metals. Our new concept provides effective guiding principles to achieving near-bandedge work functions ...

  16. Test structures for accurate UHF C-V measurements of nano-scale CMOSFETs with HfSiON and TiN metal gate

    NARCIS (Netherlands)

    Lee, Kyong-Taek; Schmitz, Jurriaan; Brown, George A.; Heh, Dawei; Choi, Rino; Harris, Rusty; Song, Seung-Chul; Lee, Byoung Hun; Han, In-Sikh; Lee, Hi-Deok; Jeong, Yoon-Ha

    2007-01-01

    Test structures for accurate UHF capacitance –voltage (C-V) measurements of high performance CMOSFETs with Hf-based high-k dielectric and TiN metal gate are analyzed. It is shown that series resistance or substrate resistance between the channel region and body contact plays a role in UHF C-V

  17. Analog/RF performance analysis of channel engineered high-K gate-stack based junctionless Trigate-FinFET

    Science.gov (United States)

    Tayal, Shubham; Nandi, Ashutosh

    2017-12-01

    In this paper, the effect of channel parameters like channel thickness (TSi) and channel length (Lg) on the analog/RF performance of high-K gate-stack based junctionless Trigate-FinFET (JLT-FinFET) have been studied using TCAD mixed-mode Sentaurus device simulator. It is observed that use of high-K gate dielectric deteriorates the analog/RF performance of the gate-stack based JLT-FinFET. The variation of change in analog/RF FOMs (ΔFOM = FOMK=3.9 - FOMK=40) with respect to channel parameters have been focused throughout this study. It is observed that the deterioration in intrinsic dc gain (ΔAV = (AV(K=3.9) - AV(K=40))) with high-K gate dielectrics aggravates with scaling down of TSi (from 2.31 dB at TSi = 12 nm to 5.2 dB at TSi = 6 nm) but increases marginally with scaling down of Lg (ΔAV = 7.6 dB at Lg = 30 nm and ΔAV = 8.7 dB at Lg = 15 nm). However, the deterioration in maximum oscillation frequency (ΔfMAX) and cut-off frequency (ΔfT) are almost negligible. Moreover, it is also observed that the deterioration in analog/RF FOMs due to high-K gate dielectrics can be reduced by upscaling of interfacial layer thickness (TI). Consequently, higher TI value can be convenient in designing of high-K gate-stack based junctionless Trigate-FinFET at lower TSi for analog/RF applications.

  18. Laser amplification in excited dielectrics

    Science.gov (United States)

    Winkler, Thomas; Haahr-Lillevang, Lasse; Sarpe, Cristian; Zielinski, Bastian; Götte, Nadine; Senftleben, Arne; Balling, Peter; Baumert, Thomas

    2018-01-01

    Wide-bandgap dielectrics such as glasses or water are transparent at visible and infrared wavelengths. This changes when they are exposed to ultrashort and highly intense laser pulses. Different interaction mechanisms lead to the appearance of various transient nonlinear optical phenomena. Using these, the optical properties of dielectrics can be controlled from the transparent to the metal-like state. Here we expand this range by a yet unexplored mechanism in excited dielectrics: amplification. In a two-colour pump-probe experiment, we show that a 400 nm femtosecond laser pulse is coherently amplified inside an excited sapphire sample on a scale of a few micrometres. Simulations strongly support the proposed two-photon stimulated emission process, which is temporally and spatially controllable. Consequently, we expect applications in all fields that demand strongly localized amplification.

  19. Laser amplification in excited dielectrics

    DEFF Research Database (Denmark)

    Winkler, Thomas; Haahr-Lillevang, Lasse; Sarpe, Cristian

    2018-01-01

    Wide-bandgap dielectrics such as glasses or water are transparent at visible and infrared wavelengths. This changes when they are exposed to ultrashort and highly intense laser pulses. Different interaction mechanisms lead to the appearance of various transient nonlinear optical phenomena. Using...... these, the optical properties of dielectrics can be controlled from the transparent to the metal-like state. Here we expand this range by a yet unexplored mechanism in excited dielectrics: amplification. In a two-colour pump-probe experiment, we show that a 400nm femtosecond laser pulse is coherently...... amplified inside an excited sapphire sample on a scale of a few micrometres. Simulations strongly support the proposed two-photon stimulated emission process, which is temporally and spatially controllable. Consequently, we expect applications in all fields that demand strongly localized amplification....

  20. Dielectric Properties of Soils, Fort Carson, CO

    National Research Council Canada - National Science Library

    Curtis, John

    1996-01-01

    This report contains dielectric property measurement results for soils. The original data were collected in the form of the real and imaginary parts of the complex dielectric constant versus frequency...

  1. Capacitive Cells for Dielectric Constant Measurement

    Science.gov (United States)

    Aguilar, Horacio Munguía; Maldonado, Rigoberto Franco

    2015-01-01

    A simple capacitive cell for dielectric constant measurement in liquids is presented. As an illustrative application, the cell is used for measuring the degradation of overheated edible oil through the evaluation of their dielectric constant.

  2. Silicone elastomers with high dielectric permittivity and high dielectric breakdown strength based on tunable functionalized copolymers

    DEFF Research Database (Denmark)

    Madsen, Frederikke Bahrt; Yu, Liyun; Daugaard, Anders Egede

    2015-01-01

    system, with respect to functionalization, is achieved. It is investigated how the different functionalization variables affect essential DE properties, including dielectric permittivity, dielectric loss, elastic modulus and dielectric breakdown strength, and the optimal degree of chemical......%) was obtained without compromising other vital DE properties such as elastic modulus, gel fraction, dielectric and viscous loss and electrical breakdown strength....

  3. Geometric phase from dielectric matrix

    International Nuclear Information System (INIS)

    Banerjee, D.

    2005-10-01

    The dielectric property of the anisotropic optical medium is found by considering the polarized photon as two component spinor of spherical harmonics. The Geometric Phase of a polarized photon has been evaluated in two ways: the phase two-form of the dielectric matrix through a twist and the Pancharatnam phase (GP) by changing the angular momentum of the incident polarized photon over a closed triangular path on the extended Poincare sphere. The helicity in connection with the spin angular momentum of the chiral photon plays the key role in developing these phase holonomies. (author)

  4. Silicone-based Dielectric Elastomers

    DEFF Research Database (Denmark)

    Skov, Anne Ladegaard

    energy efficient solutions are highly sought. These properties allow for interesting products ranging very broadly, e.g. from eye implants over artificial skins over soft robotics to huge wave energy harvesting plants. All these products utilize the inherent softness and compliance of the dielectric...... investigated but rarely discussed in the context of mechani-cal integrity and thus product reliability. Focus here is on long-term reliability of the dielectric elastomers and how to achieve this by means of careful elastomer design. This thesis presents methods and results of analyses acquired in the cross...

  5. Dielectric response of the human tooth dentine

    Energy Technology Data Exchange (ETDEWEB)

    Leskovec, J. [Dental Clinic, Faculty of Medicine, University of Ljubljana, Hrvatski trg 6, 1104 Ljubljana (Slovenia); Filipic, C. [Jozef Stefan Institute, P.O. Box 3000, 1001 Ljubljana (Slovenia); Levstik, A. [Jozef Stefan Institute, P.O. Box 3000, 1001 Ljubljana (Slovenia)]. E-mail: adrijan.levstik@ijs.si

    2005-07-15

    Dielectric properties of tooth dentine can be well described by the model which was developed for the dielectric response to hydrating porous cement paste. It is shown that the normalized dielectric constant and the normalized specific conductivity are proportional to the model parameters -bar {sub v0} and {sigma}{sub v}, indicating the deposition of AgCl in the dentine tubules during the duration of the precipitation. The fractal dimension of the tooth dentine was determined by dielectric spectroscopy.

  6. Dielectric response of the human tooth dentine

    International Nuclear Information System (INIS)

    Leskovec, J.; Filipic, C.; Levstik, A.

    2005-01-01

    Dielectric properties of tooth dentine can be well described by the model which was developed for the dielectric response to hydrating porous cement paste. It is shown that the normalized dielectric constant and the normalized specific conductivity are proportional to the model parameters -bar v0 and σ v , indicating the deposition of AgCl in the dentine tubules during the duration of the precipitation. The fractal dimension of the tooth dentine was determined by dielectric spectroscopy

  7. Dielectric response of the human tooth dentine

    Science.gov (United States)

    Leskovec, J.; Filipič, C.; Levstik, A.

    2005-07-01

    Dielectric properties of tooth dentine can be well described by the model which was developed for the dielectric response to hydrating porous cement paste. It is shown that the normalized dielectric constant and the normalized specific conductivity are proportional to the model parameters ɛ and σv, indicating the deposition of AgCl in the dentine tubules during the duration of the precipitation. The fractal dimension of the tooth dentine was determined by dielectric spectroscopy.

  8. Sensory gating in primary insomnia.

    Science.gov (United States)

    Hairston, Ilana S; Talbot, Lisa S; Eidelman, Polina; Gruber, June; Harvey, Allison G

    2010-06-01

    Although previous research indicates that sleep architecture is largely intact in primary insomnia (PI), the spectral content of the sleeping electroencephalographic trace and measures of brain metabolism suggest that individuals with PI are physiologically more aroused than good sleepers. Such observations imply that individuals with PI may not experience the full deactivation of sensory and cognitive processing, resulting in reduced filtering of external sensory information during sleep. To test this hypothesis, gating of sensory information during sleep was tested in participants with primary insomnia (n = 18) and good sleepers (n = 20). Sensory gating was operationally defined as (i) the difference in magnitude of evoked response potentials elicited by pairs of clicks presented during Wake and Stage II sleep, and (ii) the number of K complexes evoked by the same auditory stimulus. During wake the groups did not differ in magnitude of sensory gating. During sleep, sensory gating of the N350 component was attenuated and completely diminished in participants with insomnia. P450, which occurred only during sleep, was strongly gated in good sleepers, and less so in participants with insomnia. Additionally, participants with insomnia showed no stimulus-related increase in K complexes. Thus, PI is potentially associated with impaired capacity to filter out external sensory information, especially during sleep. The potential of using stimulus-evoked K complexes as a biomarker for primary insomnia is discussed.

  9. New opening hours of the gates

    CERN Multimedia

    GS Department

    2009-01-01

    Please note the new opening hours of the gates as well as the intersites tunnel from the 19 May 2009: GATE A 7h - 19h GATE B 24h/24 GATE C 7h - 9h\t17h - 19h GATE D 8h - 12h\t13h - 16h GATE E 7h - 9h\t17h - 19h Prévessin 24h/24 The intersites tunnel will be opened from 7h30 to 18h non stop. GS-SEM Group Infrastructure and General Services Department

  10. Tailoring the Dielectric Layer Structure for Enhanced Performance of Organic Field-Effect Transistors: The Use of a Sandwiched Polar Dielectric Layer.

    Science.gov (United States)

    Han, Shijiao; Yang, Xin; Zhuang, Xinming; Yu, Junsheng; Li, Lu

    2016-07-07

    To investigate the origins of hydroxyl groups in a polymeric dielectric and its applications in organic field-effect transistors (OFETs), a polar polymer layer was inserted between two polymethyl methacrylate (PMMA) dielectric layers, and its effect on the performance as an organic field-effect transistor (OFET) was studied. The OFETs with a sandwiched dielectric layer of poly(vinyl alcohol) (PVA) or poly(4-vinylphenol) (PVP) containing hydroxyl groups had shown enhanced characteristics compared to those with only PMMA layers. The field-effect mobility had been raised more than 10 times in n -type devices (three times in the p -type one), and the threshold voltage had been lowered almost eight times in p -type devices (two times in the n -type). The on-off ratio of two kinds of devices had been enhanced by almost two orders of magnitude. This was attributed to the orientation of hydroxyl groups from disordered to perpendicular to the substrate under gate-applied voltage bias, and additional charges would be induced by this polarization at the interface between the semiconductor and dielectrics, contributing to the accumulation of charge transfer.

  11. Tailoring the Dielectric Layer Structure for Enhanced Performance of Organic Field-Effect Transistors: The Use of a Sandwiched Polar Dielectric Layer

    Directory of Open Access Journals (Sweden)

    Shijiao Han

    2016-07-01

    Full Text Available To investigate the origins of hydroxyl groups in a polymeric dielectric and its applications in organic field-effect transistors (OFETs, a polar polymer layer was inserted between two polymethyl methacrylate (PMMA dielectric layers, and its effect on the performance as an organic field-effect transistor (OFET was studied. The OFETs with a sandwiched dielectric layer of poly(vinyl alcohol (PVA or poly(4-vinylphenol (PVP containing hydroxyl groups had shown enhanced characteristics compared to those with only PMMA layers. The field-effect mobility had been raised more than 10 times in n-type devices (three times in the p-type one, and the threshold voltage had been lowered almost eight times in p-type devices (two times in the n-type. The on-off ratio of two kinds of devices had been enhanced by almost two orders of magnitude. This was attributed to the orientation of hydroxyl groups from disordered to perpendicular to the substrate under gate-applied voltage bias, and additional charges would be induced by this polarization at the interface between the semiconductor and dielectrics, contributing to the accumulation of charge transfer.

  12. Dielectric polarization in random media

    International Nuclear Information System (INIS)

    Ramshaw, J.D.

    1984-01-01

    The theory of dielectric polarization in random media is systematically formulated in terms of response kernels. The primary response kernel K(12) governs the mean dielectric response at the point r 1 to the external electric field at the point r 2 in an infinite system. The inverse of K(12) is denoted by L(12);. it is simpler and more fundamental than K(12) itself. Rigorous expressions are obtained for the effective dielectric constant epsilon( in terms of L(12) and K(12). The latter expression involves the Onsger-Kirkwood function (epsilon(-epsilon 0 (2epsilon(+epsilon 0 )/epsilon 0 epsilon( (where epsilon 0 is an arbitrary reference value), and appears to be new to the random medium context. A wide variety of series representations for epsilon( are generated by means of general perturbation expansions for K(12) and L(12). A discussion is given of certain pitfalls in the theory, most of which are related to the fact that the response kernels are long ranged. It is shown how the dielectric behavior of nonpolar molecular fluids may be treated as a special case of the general theory. The present results for epsilon( apply equally well to other effective phenomenological coefficients of the same generic type, such as thermal and electrical conductivity, magnetic susceptibility, and diffusion coefficients

  13. Respiratory gating in cardiac PET

    DEFF Research Database (Denmark)

    Lassen, Martin Lyngby; Rasmussen, Thomas; Christensen, Thomas E

    2017-01-01

    BACKGROUND: Respiratory motion due to breathing during cardiac positron emission tomography (PET) results in spatial blurring and erroneous tracer quantification. Respiratory gating might represent a solution by dividing the PET coincidence dataset into smaller respiratory phase subsets. The aim...... stress (82)RB-PET. Respiratory rates and depths were measured by a respiratory gating system in addition to registering actual respiratory rates. Patients undergoing adenosine stress showed a decrease in measured respiratory rate from initial to later scan phase measurements [12.4 (±5.7) vs 5.6 (±4.......7) min(-1), P PET...

  14. Design of gate stacks for improved program/erase speed, retention and process margin aiming next generation metal nanocrystal memories

    International Nuclear Information System (INIS)

    Jang, Jaeman; Choi, Changmin; Min, Kyeong-Sik; Kim, Dong Myong; Kim, Dae Hwan; Lee, Jang-Sik; Lee, Jaegab

    2009-01-01

    In this work, gate stacks in metal nanocrystal (NC) memories, as promising next generation storage devices and their systems, are extensively investigated. A comparative analysis and characterization of the program/erase (P/E) speed, retention and the process margin of cobalt NC memories including high-k and bandgap engineering technologies are performed by using the technology computer-aided design (TCAD) simulation. It is shown that NC memory with high-k dielectric (HfO 2 ) has better performance in P/E speed and retention when the diameter of NC is below 5 nm. When the diameter is beyond 5 nm, on the other hand, the bandgap-engineered bottom oxide gate structure shows improved performance in P/E speed and retention. From the process margin perspective, as the permittivity of the dielectric gets larger, the limits of the diameter and the density of NCs allow the degree of freedom to become larger

  15. The Electrical Breakdown of Thin Dielectric Elastomers

    DEFF Research Database (Denmark)

    Zakaria, Shamsul Bin; Morshuis, Peter H. F.; Yahia, Benslimane Mohamed

    2014-01-01

    . In this study, we model the electrothermal breakdown in thin PDMS based dielectric elastomers in order to evaluate the thermal mechanisms behind the electrical failures. The objective is to predict the operation range of PDMS based dielectric elastomers with respect to the temperature at given electric field....... We performed numerical analysis with a quasi-steady state approximation to predict thermal runaway of dielectric elastomer films. We also studied experimentally the effect of temperature on dielectric properties of different PDMS dielectric elastomers. Different films with different percentages...

  16. Atomic Layer Epitaxy Dielectric Based GaN MOS Devices and Beyond

    Science.gov (United States)

    Zhou, Hong

    GaN HEMT usually suffers from high Ig and ID current collapse due to its limited Schottky barrier height and high density of surface states. Although GaN MOSHEMT with amorphous gate dielectric is an effective way to suppress the Ig and passivate the surface states, high-quality gate dielectric on GaN MOS devices are still lacking. In this work, single crystalline gate dielectric Mg0.25Ca0.75O, grown by ALE, has been successfully integrated into three kinds of GaN MOSHEMTs, namely InAlN/GaN/SiC, AlGaN/GaN/SiC and AlGaN/GaN/Si MOSHEMTs. With a nearly lattice-matched oxide, the interface quality between the oxide and barrier is significantly improved. Ig is reduced by several orders of magnitudes compared to HEMTs. All three kinds of MOSHEMTs exhibit high ID on/off ratio exceeding 1011, near ideal SS, negligible ID-V GS hysteresis and negligible current collapse. RF small-signal characteristics of AlGaN/GaN/SiC MOSHEMTs show ft/fmax of 101/150 GHz for a Lg of 120 nm device and large-signal characteristics with Pout of 4.18 W/mm for a Lg=150 nm device at f=35 GHz. Enhancement-mode non-recessed AlGaN/GaN/Si fin-MOSHEMTs are also realized through the side-wall depletion of the fin structures. Combining with the high ID, high peak gm, and low Ron, MgCaO turns out to be a new and very promising gate dielectric for GaN MOS technology. Beyond the wide bandgap semiconductor GaN, promising next generation ultra-wide bandgap semiconductor beta-Ga2O3 is also investigated. Piranha solution and PDA were first used to optimize the ALD Al2O3/beta-Ga2O3 interface. Low C-V hysteresis of 0.1 V and Dit=2.3x1011 cm-2˙eV-1 are achieved due to the passivated dangling bonds at the interface. Meanwhile, we have demonstrated a record high ID of 600/450 mA/mm for D/E-mode back-gate GOOI FETs at a beta-Ga2O3 doping concentration of 2.8x1018 cm-3. Following the motivation of chasing higher I D and lower Ron, we have increased the doping concentration to 7.8x1018 cm-3 and the record ID has been

  17. Robust logic gates and realistic quantum computation

    International Nuclear Information System (INIS)

    Xiao Li; Jones, Jonathan A.

    2006-01-01

    The composite rotation approach has been used to develop a range of robust quantum logic gates, including single qubit gates and two qubit gates, which are resistant to systematic errors in their implementation. Single qubit gates based on the BB1 family of composite rotations have been experimentally demonstrated in a variety of systems, but little study has been made of their application in extended computations, and there has been no experimental study of the corresponding robust two qubit gates to date. Here we describe an application of robust gates to nuclear magnetic resonance studies of approximate quantum counting. We find that the BB1 family of robust gates is indeed useful, but that the related NB1, PB1, B4, and P4 families of tailored logic gates are less useful than initially expected

  18. Ultra-low power thin film transistors with gate oxide formed by nitric acid oxidation method

    International Nuclear Information System (INIS)

    Kobayashi, H.; Kim, W. B.; Matsumoto, T.

    2011-01-01

    We have developed a low temperature fabrication method of SiO 2 /Si structure by use of nitric acid, i.e., nitric acid oxidation of Si (NAOS) method, and applied it to thin film transistors (TFT). A silicon dioxide (SiO 2 ) layer formed by the NAOS method at room temperature possesses 1.8 nm thickness, and its leakage current density is as low as that of thermally grown SiO 2 layer with the same thickness formed at ∼900 deg C. The fabricated TFTs possess an ultra-thin NAOS SiO 2 /CVD SiO 2 stack gate dielectric structure. The ultrathin NAOS SiO 2 layer effectively blocks a gate leakage current, and thus, the thickness of the gate oxide layer can be decreased from 80 to 20 nm. The thin gate oxide layer enables to decrease the operation voltage to 2 V (cf. the conventional operation voltage of TFTs with 80 nm gate oxide: 12 V) because of the low threshold voltages, i.e., -0.5 V for P-ch TFTs and 0.5 V for N-ch TFTs, and thus the consumed power decreases to 1/36 of that of the conventional TFTs. The drain current increases rapidly with the gate voltage, and the sub-threshold voltage is ∼80 mV/dec. The low sub-threshold swing is attributable to the thin gate oxide thickness and low interface state density of the NAOS SiO 2 layer. (authors)

  19. Low-Loss, Low-Noise, Crystalline and Amorphous Silicon Dielectrics for Superconducting Microstriplines and Kinetic Inductance Detector Capacitors

    Science.gov (United States)

    Golwala, Sunil

    Prospective future PCOS (Inflation Probe) and COR (Origins Space Telescope, FIR Interferometer) missions require large arrays of highly sensitive millimeter-wave and submillimeter (mm/submm) detectors, including spectroscopic detectors. A number of technology developments in superconducting sensors for these applications require lowloss dielectric thin films. Examples include: Microstrip-coupled superconducting mm/submm detectors, which rely on superconductor-dielectric-superconductor microstrip transmission line to transmit optical power from a coherent reception element (feed horn, lens coupled antenna, phased-array antenna) to detectors; Superconducting spectrometers (SuperSpec, TIME, MicroSpec), which use such microstrip to route optical power to detectors and to define spectral channels; Kinetic inductance detectors (KIDs), which use capacitors. In the above, the dielectric loss, quantified by the loss tangent (tan delta), is critical: it determines the optical loss in the microstrip, the resolution of spectral channels, and the two-level-system (TLS) dielectric fluctuation noise of the KID capacitor. Currently, the amorphous dielectrics SiO2 and SiNx are used because they are most convenient for fabrication. They have tan delta 1e-3. This loss tangent is acceptable for microstripline but severely limits the possible architectures and spectral resolving power, and it is too large for KID capacitors. Lower loss dielectric would result in a quantum leap in capability, opening up design space heretofore inaccessible and enabling design innovations. Specific impacts on the above technologies would be: For phased-array antennas, lower optical loss would allow the detectors to be moved away from the antenna, allowing them to be shielded from absorption of light that has not been spatially or spectrally filtered and also obviating long wiring busses. More sophisticated antenna designs, such as multiscale antennas covering a decade of spectral bandwidth, could be

  20. Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

    Science.gov (United States)

    Long, Rathnait D.; McIntyre, Paul C.

    2012-01-01

    The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

  1. Gating Technology for Vertically Parted Green Sand Moulds

    DEFF Research Database (Denmark)

    Larsen, Per

    Gating technology for vertically parted green sand moulds. Literature study of different ways of designing gating systems.......Gating technology for vertically parted green sand moulds. Literature study of different ways of designing gating systems....

  2. Damage evaluation in graphene underlying atomic layer deposition dielectrics

    Science.gov (United States)

    Tang, Xiaohui; Reckinger, Nicolas; Poncelet, Olivier; Louette, Pierre; Ureña, Ferran; Idrissi, Hosni; Turner, Stuart; Cabosart, Damien; Colomer, Jean-François; Raskin, Jean-Pierre; Hackens, Benoit; Francis, Laurent A.

    2015-08-01

    Based on micro-Raman spectroscopy (μRS) and X-ray photoelectron spectroscopy (XPS), we study the structural damage incurred in monolayer (1L) and few-layer (FL) graphene subjected to atomic-layer deposition of HfO2 and Al2O3 upon different oxygen plasma power levels. We evaluate the damage level and the influence of the HfO2 thickness on graphene. The results indicate that in the case of Al2O3/graphene, whether 1L or FL graphene is strongly damaged under our process conditions. For the case of HfO2/graphene, μRS analysis clearly shows that FL graphene is less disordered than 1L graphene. In addition, the damage levels in FL graphene decrease with the number of layers. Moreover, the FL graphene damage is inversely proportional to the thickness of HfO2 film. Particularly, the bottom layer of twisted bilayer (t-2L) has the salient features of 1L graphene. Therefore, FL graphene allows for controlling/limiting the degree of defect during the PE-ALD HfO2 of dielectrics and could be a good starting material for building field effect transistors, sensors, touch screens and solar cells. Besides, the formation of Hf-C bonds may favor growing high-quality and uniform-coverage dielectric. HfO2 could be a suitable high-K gate dielectric with a scaling capability down to sub-5-nm for graphene-based transistors.

  3. Dynamic gating window for compensation of baseline shift in respiratory-gated radiation therapy

    International Nuclear Information System (INIS)

    Pepin, Eric W.; Wu Huanmei; Shirato, Hiroki

    2011-01-01

    Purpose: To analyze and evaluate the necessity and use of dynamic gating techniques for compensation of baseline shift during respiratory-gated radiation therapy of lung tumors. Methods: Motion tracking data from 30 lung tumors over 592 treatment fractions were analyzed for baseline shift. The finite state model (FSM) was used to identify the end-of-exhale (EOE) breathing phase throughout each treatment fraction. Using duty cycle as an evaluation metric, several methods of end-of-exhale dynamic gating were compared: An a posteriori ideal gating window, a predictive trend-line-based gating window, and a predictive weighted point-based gating window. These methods were evaluated for each of several gating window types: Superior/inferior (SI) gating, anterior/posterior beam, lateral beam, and 3D gating. Results: In the absence of dynamic gating techniques, SI gating gave a 39.6% duty cycle. The ideal SI gating window yielded a 41.5% duty cycle. The weight-based method of dynamic SI gating yielded a duty cycle of 36.2%. The trend-line-based method yielded a duty cycle of 34.0%. Conclusions: Dynamic gating was not broadly beneficial due to a breakdown of the FSM's ability to identify the EOE phase. When the EOE phase was well defined, dynamic gating showed an improvement over static-window gating.

  4. Bill Gates eyes healthcare market.

    Science.gov (United States)

    Dunbar, C

    1995-02-01

    The entrepreneurial spirit is still top in Bill Gates' mind as he look toward healthcare and other growth industries. Microsoft's CEO has not intention of going the way of other large technology companies that became obsolete before they could compete today.

  5. Cyanoethyl cellulose-based nanocomposite dielectric for low-voltage, solution-processed organic field-effect transistors (OFETs)

    Science.gov (United States)

    Faraji, Sheida; Danesh, Ehsan; Tate, Daniel J.; Turner, Michael L.; Majewski, Leszek A.

    2016-05-01

    Low voltage organic field-effect transistors (OFETs) using solution-processed cyanoethyl cellulose (CEC) and CEC-based nanocomposites as the gate dielectric are demonstrated. Barium strontium titanate (BST) nanoparticles are homogeneously dispersed in CEC to form the high-k (18.0  ±  0.2 at 1 kHz) nanocomposite insulator layer. The optimised p-channel DPPTTT OFETs with BST-CEC nanocomposite as the gate dielectric operate with minimal hysteresis, display field-effect mobilities in excess of 1 cm2 V-1 s-1 at 3 V, possess low subthreshold swings (132  ±  8 mV dec-1), and have on/off ratios greater than 103. Addition of a 40-50 nm layer of cross-linked poly(vinyl phenol) (PVP) on the surface of the nanocomposite layer significantly decreases the gate leakage current (OFETs at 1.5 V. The presented bilayer BST-CEC/PVP dielectrics are a promising alternative for the fabrication of low voltage, solution-processed OFETs that are suitable for use in low power, portable electronics.

  6. ``Gate-to-gate`` BJT obtained from the double-gate input JFET to reset charge preamplifiers

    Energy Technology Data Exchange (ETDEWEB)

    Fazzi, A. [Politecnico di Milano (Italy). Dipartimento di Ingegneria Nucleare; Rehak, P. [Brookhaven National Laboratory, Upton, NY 11973 (United States)

    1996-08-01

    A novel charge restoration mechanism to reset charge sensitive preamplifiers is presented. The ``gate-to-gate`` Bipolar Junction Transistor transversal to the input JFET with independent top and bottom gates is exploited as a ``reset transistor`` embodied in the preamplifier input device. The p-n junction between the bottom gate and the channel is forward-biased by a proper feedback loop supplying the necessary restoration current to the input node capacitance through the top gate-channel reversed-biased junction. The continuous reset mode is here analysed with reference to the DC stability, the pulse response and the noise behaviour. Experimental results are reported. (orig.).

  7. Investigation of 6T SRAM memory circuit using high-k dielectrics based nano scale junctionless transistor

    Science.gov (United States)

    Charles Pravin, J.; Nirmal, D.; Prajoon, P.; Mohan Kumar, N.; Ajayan, J.

    2017-04-01

    In this paper the Dual Metal Surround Gate Junctionless Transistor (DMSGJLT) has been implemented with various high-k dielectric. The leakage current in the device is analysed in detail by obtaining the band structure for different high-k dielectric material. It is noticed that with increasing dielectric constant the device provides more resistance for the direct tunnelling of electron in off state. The gate oxide capacitance also shows 0.1 μF improvement with Hafnium Oxide (HfO2) than Silicon Oxide (SiO2). This paved the way for a better memory application when high-k dielectric is used. The Six Transistor (6T) Static Random Access Memory (SRAM) circuit implemented shows 41.4% improvement in read noise margin for HfO2 than SiO2. It also shows 37.49% improvement in write noise margin and 30.16% improvement in hold noise margin for HfO2 than SiO2.

  8. Numerical analysis of the reverse blocking enhancement in High-K passivation AlGaN/GaN Schottky barrier diodes with gated edge termination

    Science.gov (United States)

    Bai, Zhiyuan; Du, Jiangfeng; Xin, Qi; Li, Ruonan; Yu, Qi

    2018-02-01

    We conducted a numerical analysis on high-K dielectric passivated AlGaN/GaN Schottky barrier diodes (HPG-SBDs) with a gated edge termination (GET). The reverse blocking characteristics were significantly enhanced without the stimulation of any parasitic effect by varying the dielectric thickness dge under the GET, thickness TP, and dielectric constant εr of the high-K passivation layer. The leakage current was reduced by increasing εr and decreasing dge. The breakdown voltage of the device was enhanced by increasing εr and TP. The highest breakdown voltage of 970 V and the lowest leakage current of 0.5 nA/mm were achieved under the conditions of εr = 80, TP = 800 nm, and dge = 10 nm. C-V simulation revealed that the HPG-SBDs induced no parasitic capacitance by comparing the integrated charges of the devices with different high-K dielectrics and different dge.

  9. Theoretical and Experimental Studies of New Polymer-Metal High-Dielectric Constant Nanocomposites

    Science.gov (United States)

    Ginzburg, Valeriy; Elwell, Michael; Myers, Kyle; Cieslinski, Robert; Malowinski, Sarah; Bernius, Mark

    2006-03-01

    High-dielectric-constant (high-K) gate materials are important for the needs of electronics industry. Most polymers have dielectric constant in the range 2 materials with K > 10 it is necessary to combine polymers with ceramic or metal nanoparticles. Several formulations based on functionalized Au-nanoparticles (R ˜ 5 -— 10 nm) and PMMA matrix polymer are prepared. Nanocomposite films are subsequently cast from solution. We study the morphology of those nanocomposites using theoretical (Self-Consistent Mean-Field Theory [SCMFT]) and experimental (Transmission Electron Microscopy [TEM]) techniques. Good qualitative agreement between theory and experiment is found. The study validates the utility of SCMFT as screening tool for the preparation of stable (or at least metastable) polymer/nanoparticle mixtures.

  10. Hysteresis mechanism and control in pentacene organic field-effect transistors with polymer dielectric

    Directory of Open Access Journals (Sweden)

    Wei Huang

    2013-05-01

    Full Text Available Hysteresis mechanism of pentacene organic field-effect transistors (OFETs with polyvinyl alcohol (PVA and/or polymethyl methacrylate (PMMA dielectrics is studied. Through analyzing the electrical characteristics of OFETs with various PVA/PMMA arrangements, it shows that charge, which is trapped in PVA bulk and at the interface of pentacene/PVA, is one of the origins of hysteresis. The results also show that memory window is proportional to both trap amount in PVA and charge density at the gate/PVA or PVA/pentacene interfaces. Hence, the controllable memory window of around 0 ∼ 10 V can be realized by controlling the thickness and combination of triple-layer polymer dielectrics.

  11. Band diagram determination of MOS structures with different gate materials on 3C-SiC substrate

    Science.gov (United States)

    Piskorski, K.; Przewlocki, H.; Esteve, R.; Bakowski, M.

    2012-03-01

    MOS capacitors were fabricated on 3C-SiC n-type substrate (001) with a 10-μm N-type epitaxial layer. An SiO2 layer of the thickness tOX ≈55 nm was deposited by PECVD. Circular Al, Ni, and Au gate contacts 0.7 mm in diameter were formed by ion beam sputtering and lift-off. Energy band diagrams of the MOS capacitors were determined using the photoelectric, electric, and optical measurement methods. Optical method (ellipsometry) was used to determine the gate and dielectric layer thicknesses and their optical indices: the refraction n and the extinction k coefficients. Electrical method of C = f(VG) characteristic measurements allowed to determine the doping density ND and the flat band voltage VFB in the semiconductor. Most of the parameters which were necessary for the construction of the band diagrams and for determination of the basic physical properties of the structures (e.g. the effective contact potential difference ϕMS) were measured by several photoelectric methods and calculated using the measurement data. As a result, complete energy band diagrams have been determined for MOS capacitors with three different gate materials and they are demonstrated for two different gate voltages VG: for the flat-band in the semiconductor (VG = VFB) and for the flat-band in the dielectric (VG = VG0).

  12. The influence of fibril composition and dimension on the performance of paper gated oxide transistors

    Science.gov (United States)

    Pereira, L.; Gaspar, D.; Guerin, D.; Delattre, A.; Fortunato, E.; Martins, R.

    2014-03-01

    Paper electronics is a topic of great interest due the possibility of having low-cost, disposable and recyclable electronic devices. The final goal is to make paper itself an active part of such devices. In this work we present new approaches in the selection of tailored paper, aiming to use it simultaneously as substrate and dielectric in oxide based paper field effect transistors (FETs). From the work performed, it was observed that the gate leakage current in paper FETs can be reduced using a dense microfiber/nanofiber cellulose paper as the dielectric. Also, the stability of these devices against changes in relative humidity is improved. On other hand, if the pH of the microfiber/nanofiber cellulose pulp is modified by the addition of HCl, the saturation mobility of the devices increases up to 16 cm2 V-1 s-1, with an ION/IOFF ratio close to 105.

  13. High-mobility BaSnO3 thin-film transistor with HfO2 gate insulator

    Science.gov (United States)

    Kim, Young Mo; Park, Chulkwon; Kim, Useong; Ju, Chanjong; Char, Kookrin

    2016-01-01

    Thin-film transistors have been fabricated using La-doped BaSnO3 as n-type channels and (In,Sn)2O3 as source, drain, and gate electrodes. HfO2 was grown as gate insulators by atomic layer deposition. The field-effect mobility, Ion/Ioff ratio, and subthreshold swing of the device are 24.9 cm2 V-1 s-1, 6.0 × 106, and 0.42 V dec-1, respectively. The interface trap density, evaluated to be higher than 1013 cm-2 eV-1, was found to be slightly lower than that of the thin-film transistor with an Al2O3 gate insulator. We attribute the much smaller subthreshold swing values to the higher dielectric constant of HfO2.

  14. Silicone elastomers with high dielectric permittivity and high dielectric breakdown strength based on dipolar copolymers

    DEFF Research Database (Denmark)

    Madsen, Frederikke Bahrt; Yu, Liyun; Daugaard, Anders Egede

    2014-01-01

    Dielectric elastomers (DES) are a promising new transducer technology, but high driving voltages limit their current commercial potential. One method used to lower driving voltage is to increase dielectric permittivity of the elastomer. A novel silicone elastomer system with high dielectric permi......-4-nitrobenzene. Here, a high increase in dielectric permittivity (similar to 70%) was obtained without compromising other favourable DE properties such as elastic modulus, gel fraction, dielectric loss and electrical breakdown strength. © 2014 Elsevier Ltd. All rights reserved.......Dielectric elastomers (DES) are a promising new transducer technology, but high driving voltages limit their current commercial potential. One method used to lower driving voltage is to increase dielectric permittivity of the elastomer. A novel silicone elastomer system with high dielectric...

  15. Junctionless Thin-Film Transistors Gated by an H₃PO₄-Incorporated Chitosan Proton Conductor.

    Science.gov (United States)

    Liu, Huixuan; Xun, Damao

    2018-04-01

    We fabricated an H3PO4-incorporated chitosan proton conductor film that exhibited the electric double layer effect and showed a high specific capacitance of 4.42 μF/cm2. Transparent indium tin oxide thin-film transistors gated by H3PO4-incorporated chitosan films were fabricated by sputtering through a shadow mask. The operating voltage was as low as 1.2 V because of the high specific capacitance of the H3PO4-incorporated chitosan dielectrics. The junctionless transparent indium tin oxide thin film transistors exhibited good performance, including an estimated current on/off ratio and field-effect mobility of 1.2 × 106 and 6.63 cm2V-1s-1, respectively. These low-voltage thin-film electric-double-layer transistors gated by H3PO4-incorporated chitosan are promising for next generation battery-powered "see-through" portable sensors.

  16. Stretchable carbon nanotube charge-trap floating-gate memory and logic devices for wearable electronics.

    Science.gov (United States)

    Son, Donghee; Koo, Ja Hoon; Song, Jun-Kyul; Kim, Jaemin; Lee, Mincheol; Shim, Hyung Joon; Park, Minjoon; Lee, Minbaek; Kim, Ji Hoon; Kim, Dae-Hyeong

    2015-05-26

    Electronics for wearable applications require soft, flexible, and stretchable materials and designs to overcome the mechanical mismatch between the human body and devices. A key requirement for such wearable electronics is reliable operation with high performance and robustness during various deformations induced by motions. Here, we present materials and device design strategies for the core elements of wearable electronics, such as transistors, charge-trap floating-gate memory units, and various logic gates, with stretchable form factors. The use of semiconducting carbon nanotube networks designed for integration with charge traps and ultrathin dielectric layers meets the performance requirements as well as reliability, proven by detailed material and electrical characterizations using statistics. Serpentine interconnections and neutral mechanical plane layouts further enhance the deformability required for skin-based systems. Repetitive stretching tests and studies in mechanics corroborate the validity of the current approaches.

  17. Voltage-gated Proton Channels

    Science.gov (United States)

    DeCoursey, Thomas E.

    2014-01-01

    Voltage-gated proton channels, HV1, have vaulted from the realm of the esoteric into the forefront of a central question facing ion channel biophysicists, namely the mechanism by which voltage-dependent gating occurs. This transformation is the result of several factors. Identification of the gene in 2006 revealed that proton channels are homologues of the voltage-sensing domain of most other voltage-gated ion channels. Unique, or at least eccentric, properties of proton channels include dimeric architecture with dual conduction pathways, perfect proton selectivity, a single-channel conductance ~103 smaller than most ion channels, voltage-dependent gating that is strongly modulated by the pH gradient, ΔpH, and potent inhibition by Zn2+ (in many species) but an absence of other potent inhibitors. The recent identification of HV1 in three unicellular marine plankton species has dramatically expanded the phylogenetic family tree. Interest in proton channels in their own right has increased as important physiological roles have been identified in many cells. Proton channels trigger the bioluminescent flash of dinoflagellates, facilitate calcification by coccolithophores, regulate pH-dependent processes in eggs and sperm during fertilization, secrete acid to control the pH of airway fluids, facilitate histamine secretion by basophils, and play a signaling role in facilitating B-cell receptor mediated responses in B lymphocytes. The most elaborate and best-established functions occur in phagocytes, where proton channels optimize the activity of NADPH oxidase, an important producer of reactive oxygen species. Proton efflux mediated by HV1 balances the charge translocated across the membrane by electrons through NADPH oxidase, minimizes changes in cytoplasmic and phagosomal pH, limits osmotic swelling of the phagosome, and provides substrate H+ for the production of H2O2 and HOCl, reactive oxygen species crucial to killing pathogens. PMID:23798303

  18. Deposition and characterization of titanium dioxide and hafnium dioxide thin films for high dielectric applications

    Science.gov (United States)

    Yoon, Meeyoung

    The industry's demand for higher integrated circuit density and performance has forced the gate dielectric layer thickness to decrease rapidly. The use of conventional SiO2 films as gate oxide is reaching its limit due to the rapid increase in tunneling current. Therefore, a need for a high dielectric material to produce large oxide capacitance and low leakage current has emerged. Metal-oxides such as titanium dioxide (TiO2) and hafnium dioxide (HfO2) are attractive candidates for gate dielectrics due to their electrical and physical properties suitable for high dielectric applications. MOCVD of TiO2 using titanium isopropoxide (TTIP) precursor on p-type Si(100) has been studied. Insertion of a TiO x buffer layer, formed by depositing metallic Ti followed by oxidation, at the TiO2/Si interface has reduced the carbon contamination in the TiO2 film. Elemental Ti films, analyzed by in-situ AES, were found to grow according to Stranski-Krastanov mode on Si(100). Carbon-free, stoichiometric TiO2 films were successfully produced on Si(100) without any parasitic SiO2 layers at the TiO 2/Si interface. Electron-beam deposition of HfO2 films on Si(100) has also been investigated in this work. HfO2 films are formed by depositing elemental Hf on Si(100) and then oxidizing it either in O2 or O 3. XPS results reveal that with oxidation Hf(4f) peak shifts +3.45eV with 02 and +3.65eV with O3 oxidation. LEED and AFM studies show that the initially ordered crystalline Hf becomes disordered after oxidation. The thermodynamic stability of HfO2 films on Si has been studied using a unique test-bed structure of Hf/O3/Si. Post-Oxidation of Layer Deposition (POLD) has been employed to produce HfO2 films with a desired thickness. XPS results indicate that stoichiometric HfO 2 films were successfully produced using the POLD process. The investigation of the growth and thin film properties of TiO 2 and HfO2 using oxygen and ozone has laid a foundation for the application of these metal

  19. Terahertz dielectric measurements of household powders

    Science.gov (United States)

    Khan, Usman A.; Afsar, Mohammed N.

    2007-09-01

    The dielectric properties of common household powders from 0.6 to 1.2 THz are presented in this paper. Terahertz Dispersive Fourier Transform Spectroscopy was used to yield the dielectric properties of powders as a continuous function of frequency. Tests were conducted using a polarized interferometer and two cryogenically-cooled high frequency detectors. Dielectric spectroscopy was utilized to provide high-resolution and precise information on the dielectric spectra of powders including the powder's unique resonance signature. This signature can be employed to detect the presence of a hoax or harmful powder within a baggage or mail package.

  20. Terahertz-frequency dielectric response of liquids

    DEFF Research Database (Denmark)

    Jepsen, Peter Uhd; Møller, Uffe; Cooke, David

    The dielectric response of liquids spans many decades in frequency. The dielectric response of a polar liquid is typically determined by relaxational dynamics of the dipolar moments of the liquid. In contrast, the dielectric response of a nonpolar liquid is determined by much weaker collision-ind...... function of liquids at terahertz frequencies. We will review the current understanding of the high-frequency dielectric spectrum of water, and discuss the relation between the dielectric spectrum and the thermodynamic properties of certain aqueous solutions.......The dielectric response of liquids spans many decades in frequency. The dielectric response of a polar liquid is typically determined by relaxational dynamics of the dipolar moments of the liquid. In contrast, the dielectric response of a nonpolar liquid is determined by much weaker collision......-induced dipole moments. In the polar liquid water the fastest relaxational dynamics is found at terahertz frequencies, just below the first intermolecular vibrational and librational modes. In this presentation we will discuss optical terahertz spectroscopic techniques for measurement of the full dielectric...

  1. Dielectric screening enhanced performance in graphene FET.

    Science.gov (United States)

    Chen, Fang; Xia, Jilin; Ferry, David K; Tao, Nongjian

    2009-07-01

    We have studied the transport properties of graphene transistors in different solvents with dielectric constant varying over 2 orders of magnitude. Upon increasing the dielectric constant, the carrier mobility increases up to 3 orders of magnitude and reaches approximately 7 x 10(4) cm(2)/v.s at the dielectric constant of approximately 47. This mobility value changes little in higher dielectric constant solvents, which indicates that we are approaching the intrinsic limit of room temperature mobility in graphene supported on SiO(2) substrates. The results are discussed in terms of long-range Coulomb scattering originated from the charged impurities underneath graphene.

  2. Dielectric properties of barium titanate supramolecular nanocomposites.

    Science.gov (United States)

    Lee, Keun Hyung; Kao, Joseph; Parizi, Saman Salemizadeh; Caruntu, Gabriel; Xu, Ting

    2014-04-07

    Nanostructured dielectric composites can be obtained by dispersing high permittivity fillers, barium titanate (BTO) nanocubes, within a supramolecular framework. Thin films of BTO supramolecular nanocomposites exhibit a dielectric permittivity (εr) as high as 15 and a relatively low dielectric loss of ∼0.1 at 1 kHz. These results demonstrate a new route to control the dispersion of high permittivity fillers toward high permittivity dielectric nanocomposites with low loss. Furthermore, the present study shows that the size distribution of nanofillers plays a key role in their spatial distribution and local ordering and alignment within supramolecular nanostructures.

  3. Nanosecond Time-Resolved Microscopic Gate-Modulation Imaging of Polycrystalline Organic Thin-Film Transistors

    Science.gov (United States)

    Matsuoka, Satoshi; Tsutsumi, Jun'ya; Matsui, Hiroyuki; Kamata, Toshihide; Hasegawa, Tatsuo

    2018-02-01

    We develop a time-resolved microscopic gate-modulation (μ GM ) imaging technique to investigate the temporal evolution of the channel current and accumulated charges in polycrystalline pentacene thin-film transistors (TFTs). A time resolution of as high as 50 ns is achieved by using a fast image-intensifier system that could amplify a series of instantaneous optical microscopic images acquired at various time intervals after the stepped gate bias is switched on. The differential images obtained by subtracting the gate-off image allows us to acquire a series of temporal μ GM images that clearly show the gradual propagation of both channel charges and leaked gate fields within the polycrystalline channel layers. The frontal positions for the propagations of both channel charges and leaked gate fields coincide at all the time intervals, demonstrating that the layered gate dielectric capacitors are successively transversely charged up along the direction of current propagation. The initial μ GM images also indicate that the electric field effect is originally concentrated around a limited area with a width of a few micrometers bordering the channel-electrode interface, and that the field intensity reaches a maximum after 200 ns and then decays. The time required for charge propagation over the whole channel region with a length of 100 μ m is estimated at about 900 ns, which is consistent with the measured field-effect mobility and the temporal-response model for organic TFTs. The effect of grain boundaries can be also visualized by comparison of the μ GM images for the transient and the steady states, which confirms that the potential barriers at the grain boundaries cause the transient shift in the accumulated charges or the transient accumulation of additional charges around the grain boundaries.

  4. Epitaxial top-gated atomic-scale silicon wire in a three-dimensional architecture.

    Science.gov (United States)

    McKibbin, S R; Scappucci, G; Pok, W; Simmons, M Y

    2013-02-01

    Three-dimensional (3D) control of dopant profiles in silicon is a critical requirement for fabricating atomically precise transistors. We demonstrate conductance modulation through an atomic scale 3 nm wide δ-doped silicon-phosphorus wire using a vertically separated epitaxial doped Si:P top-gate. We show that intrinsic crystalline silicon grown at low temperatures (∼250 °C) serves as an effective gate dielectric permitting us to achieve large gate ranges (∼2.6 V) with leakage currents below 1 pA. Combining scanning tunneling lithography for precise lateral confinement, with monolayer doping and low temperature epitaxial overgrowth for precise vertical confinement, we can realize multiple layers of nano-patterned dopants in a single crystal material. These results demonstrate the viability of highly doped, vertically separated epitaxial gates in an all-crystalline architecture with long-term implications for monolithic 3D silicon circuits and for the realization of atomically precise donor architectures for quantum computing.

  5. Suppression of short channel effects in FinFETs using crystalline ZrO2 high-K/Al2O3 buffer layer gate stack for low power device applications

    Science.gov (United States)

    Tsai, Meng-Chen; Wang, Chin-I.; Chen, Yen-Chang; Chen, Yi-Ju; Li, Kai-Shin; Chen, Min-Cheng; Chen, Miin-Jang

    2018-03-01

    The electrical characteristics of FinFETs with a crystalline ZrO2/Al2O3 buffer layer gate stack and a crystalline ZrO2 high-K dielectric single layer, along with different fin widths and gate lengths, are investigated. Compared with the FinFETs with a single layer of crystalline ZrO2 high-K dielectric, the gate stack comprising the crystalline ZrO2/Al2O3 buffer layer on FinFETs leads to the suppression of short channel effects in terms of a low drain induced barrier lowering, reduced threshold voltage roll-off, and improved subthreshold swing. The ON/OFF current ratio and gate leakage current of FinFETs are also improved by the crystalline ZrO2/Al2O3 buffer layer gate stack. The improvement of electrical characteristics is ascribed to the reduced interface state density and gate leakage as a result of the insertion of an Al2O3 buffer layer between ZrO2 and Si. The results demonstrate that the crystalline ZrO2/Al2O3 buffer layer structure is a promising high-K gate stack for next-generation nanoscale transistors.

  6. Ionic Structure at Dielectric Interfaces

    Science.gov (United States)

    Jing, Yufei

    The behavior of ions in liquids confined between macromolecules determines the outcome of many nanoscale assembly processes in synthetic and biological materials such as colloidal dispersions, emulsions, hydrogels, DNA, cell membranes, and proteins. Theoretically, the macromolecule-liquid boundary is often modeled as a dielectric interface and an important quantity of interest is the ionic structure in a liquid confined between two such interfaces. The knowledge gleaned from the study of ionic structure in such models can be useful in several industrial applications, such as biosensors, lithium-ion batteries double-layer supercapacitors for energy storage and seawater desalination. Electrostatics plays a critical role in the development of such functional materials. Many of the functions of these materials, result from charge and composition heterogeneities. There are great challenges in solving electrostatics problems in heterogeneous media with arbitrary shapes because electrostatic interactions remains unknown but depend on the particular density of charge distributions. Charged molecules in heterogeneous media affect the media's dielectric response and hence the interaction between the charges is unknown since it depends on the media and on the geometrical properties of the interfaces. To determine the properties of heterogeneous systems including crucial effects neglected in classical mean field models such as the hard core of the ions, the dielectric mismatch and interfaces with arbitrary shapes. The effect of hard core interactions accounts properly for short range interactions and the effect of local dielectric heterogeneities in the presence of ions and/or charged molecules for long-range interactions are both analyzed via an energy variational principle that enables to update charges and the medium's response in the same simulation time step. In particular, we compute the ionic structure in a model system of electrolyte confined by two planar dielectric

  7. Ferroelectric dielectrics integrated on silicon

    CERN Document Server

    Defay, Emmanuel

    2013-01-01

    This book describes up-to-date technology applied to high-K materials for More Than Moore applications, i.e. microsystems applied to microelectronics core technologies.After detailing the basic thermodynamic theory applied to high-K dielectrics thin films including extrinsic effects, this book emphasizes the specificity of thin films. Deposition and patterning technologies are then presented. A whole chapter is dedicated to the major role played in the field by X-Ray Diffraction characterization, and other characterization techniques are also described such as Radio frequency characterizat

  8. High-k dielectrics as bioelectronic interface for field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Borstlap, D.

    2007-03-15

    Ion-sensitive field-effect transistors (ISFETs) are employed as bioelectronic sensors for the cell-transistor coupling and for the detection of DNA sequences. For these applications, thermally grown SiO{sub 2} films are used as standard gate dielectric. In the first part of this dissertation, the suitability of high-k dielectrics was studied to increase the gate capacitance and hence the signal-to-noise ratio of bioelectronic ISFETs: Upon culturing primary rat neurons on the corresponding high-k dielectrics, Al{sub 2}O{sub 3}, yttria stabilised zirkonia (YSZ), DyScO{sub 3}, CeO{sub 2}, LaAlO{sub 3}, GdScO{sub 3} and LaScO{sub 3} proved to be biocompatible substrates. Comprehensive electrical and electrochemical current-voltage measurements and capacitance-voltage measurements were performed for the determination of the dielectric properties of the high-k dielectrics. In the second part of the dissertation, standard SiO{sub 2} ISFETs with lower input capacitance and high-k dielectric Al{sub 2}O{sub 3}, YSZ und DyScO{sub 3} ISFETs were comprehensively characterised and compared with each other regarding their signal-to-noise ratio, their ion sensitivity and their drift behaviour. The ion sensitivity measurements showed that the YSZ ISFETs were considerably more sensitive to K{sup +} and Na{sup +} ions than the SiO{sub 2}, Al{sub 2}O{sub 3} und DyScO{sub 3} ISFETs. In the final third part of the dissertation, bioelectronic experiments were performed with the high-k ISFETs. The shape of the signals, which were measured from HL-1 cells with YSZ ISFETs, differed considerably from the corresponding measurements with SiO{sub 2} and DyScO{sub 3} ISFETs: After the onset of the K{sup +} current, the action potentials measured with YSZ ISFETs showed a strong drift in the direction opposite to the K{sup +} current signal. First coupling experiments between HEK 293 cells, which were transfected with a K{sup +} ion channel, and YSZ ISFETs affirmed the assumption from the HL-1

  9. Cognitive mechanisms associated with auditory sensory gating

    Science.gov (United States)

    Jones, L.A.; Hills, P.J.; Dick, K.M.; Jones, S.P.; Bright, P.

    2016-01-01

    Sensory gating is a neurophysiological measure of inhibition that is characterised by a reduction in the P50 event-related potential to a repeated identical stimulus. The objective of this work was to determine the cognitive mechanisms that relate to the neurological phenomenon of auditory sensory gating. Sixty participants underwent a battery of 10 cognitive tasks, including qualitatively different measures of attentional inhibition, working memory, and fluid intelligence. Participants additionally completed a paired-stimulus paradigm as a measure of auditory sensory gating. A correlational analysis revealed that several tasks correlated significantly with sensory gating. However once fluid intelligence and working memory were accounted for, only a measure of latent inhibition and accuracy scores on the continuous performance task showed significant sensitivity to sensory gating. We conclude that sensory gating reflects the identification of goal-irrelevant information at the encoding (input) stage and the subsequent ability to selectively attend to goal-relevant information based on that previous identification. PMID:26716891

  10. High thermal conductivity lossy dielectric using a multi layer configuration

    Science.gov (United States)

    Tiegs, Terry N.; Kiggans, Jr., James O.

    2003-01-01

    Systems and methods are described for loss dielectrics. A loss dielectric includes at least one high dielectric loss layer and at least one high thermal conductivity-electrically insulating layer adjacent the at least one high dielectric loss layer. A method of manufacturing a loss dielectric includes providing at least one high dielectric loss layer and providing at least one high thermal conductivity-electrically insulating layer adjacent the at least one high dielectric loss layer. The systems and methods provide advantages because the loss dielectrics are less costly and more environmentally friendly than the available alternatives.

  11. Organic transistors making use of room temperature ionic liquids as gating medium

    Science.gov (United States)

    Hoyos, Jonathan Javier Sayago

    The ability to couple ionic and electronic transport in organic transistors, based on pi conjugated organic materials for the transistor channel, can be particularly interesting to achieve low voltage transistor operation, i.e. below 1 V. The operation voltage in typical organic transistors based on conventional dielectrics (200 nm thick SiO2) is commonly higher than 10 V. Electrolyte-gated (EG) transistors, i.e. employing an electrolyte as the gating medium, permit current modulations of several orders of magnitude at relatively low gate voltages thanks to the exceptionally high capacitance at the electrolyte/transistor channel interface, in turn due to the low thickness (ca. 3 nm) of the electrical double layers forming at the electrolyte/semiconductor interface. Electrolytes based on room temperature ionic liquids (RTILs) are promising in EG transistor applications for their high electrochemical stability and good ionic conductivity. The main motivation behind this work is to achieve low voltage operation in organic transistors by making use of RTILs as gating medium. First we demonstrate the importance of the gate electrode material in the EG transistor performance. The use of high surface area carbon gate electrodes limits undesirable electrochemical processes and renders unnecessary the presence of a reference electrode to monitor the channel potential. This was demonstrated using activated carbon as gate electrode, the electronic conducting polymer MEH-PPV, poly[2-methoxy-5-(2'-ethylhexyloxy)-1,4-phenylene vinylene] channel material, and the ionic liquid [EMIM][TFSI] (1-ethyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide), as gating medium. Using high surface area gate electrodes resulted in sub-1 V operation and charge carrier mobilities of (1.0 +/- 0.5) x 10-2 cm2V -1s-1. A challenge in the field of EG transistors is to decrease their response time, a consequence of the slow ion redistribution in the transistor channel upon application of electric

  12. P-channel differential multiple-time programmable memory cells by laterally coupled floating metal gate fin field-effect transistors

    Science.gov (United States)

    Wang, Tai-Min; Chien, Wei-Yu; Hsu, Chia-Ling; Lin, Chrong Jung; King, Ya-Chin

    2018-04-01

    In this paper, we present a new differential p-channel multiple-time programmable (MTP) memory cell that is fully compatible with advanced 16 nm CMOS fin field-effect transistors (FinFET) logic processes. This differential MTP cell stores complementary data in floating gates coupled by a slot contact structure, which make different read currents possible on a single cell. In nanoscale CMOS FinFET logic processes, the gate dielectric layer becomes too thin to retain charges inside floating gates for nonvolatile data storage. By using a differential architecture, the sensing window of the cell can be extended and maintained by an advanced blanket boost scheme. The charge retention problem in floating gate cells can be improved by periodic restoring lost charges when significant read window narrowing occurs. In addition to high programming efficiency, this p-channel MTP cells also exhibit good cycling endurance as well as disturbance immunity. The blanket boost scheme can remedy the charge loss problem under thin gate dielectrics.

  13. MCP gated x-ray framing camera

    Science.gov (United States)

    Cai, Houzhi; Liu, Jinyuan; Niu, Lihong; Liao, Hua; Zhou, Junlan

    2009-11-01

    A four-frame gated microchannel plate (MCP) camera is described in this article. Each frame photocathode coated with gold on the MCP is part of a transmission line with open circuit end driven by the gating electrical pulse. The gating pulse is 230 ps in width and 2.5 kV in amplitude. The camera is tested by illuminating its photocathode with ultraviolet laser pulses, 266 nm in wavelength, which shows exposure time as short as 80 ps.

  14. A Split Ring Resonator Dielectric Probe for Near-Field Dielectric Imaging.

    Science.gov (United States)

    Isakov, Dmitry; Stevens, Chris J; Castles, Flynn; Grant, Patrick S

    2017-05-17

    A single split-ring resonator (SRR) probe for 2D surface mapping and imaging of relative dielectric permittivity for the characterisation of composite materials has been developed. The imaging principle, the analysis and the sensitivity of the SRR surface dielectric probe data is described. The surface dielectric properties of composite materials in the frequency range 1-3 GHz have been measured based on the magnetic resonance frequency of the transmission loss of the SRR dielectric probe when in contact with the surface. The SRR probe performance was analysed analytically and using full-wave simulation, and predictions showed close agreement with experiment for composite materials with spatially varying dielectric permittivity manufactured by 3D printing. The spatial and permittivity resolution of the SRR dielectric probe were controlled by the geometrical parameters of the SRR which provided flexibility to tune the SRR probe. The best accuracy of the dielectric permittivity measurements was within 5%.

  15. Dielectric spectroscopy of watermelons for quality sensing

    Science.gov (United States)

    Nelson, Stuart O.; Guo, Wen-chuan; Trabelsi, Samir; Kays, Stanley J.

    2007-07-01

    Dielectric properties of four small-sized watermelon cultivars, grown and harvested to provide a range of maturities, were measured with an open-ended coaxial-line probe and an impedance analyser over the frequency range from 10 MHz to 1.8 GHz. Probe measurements were made on the external surface of the melons and also on tissue samples from the edible internal tissue. Moisture content and soluble solids content (SSC) were measured for internal tissue samples, and SSC (sweetness) was used as the quality factor for correlation with the dielectric properties. Individual dielectric constant and loss factor correlations with SSC were low, but a high correlation was obtained between the SSC and permittivity from a complex-plane plot of dielectric constant and loss factor, each divided by SSC. However, SSC prediction from the dielectric properties by this relationship was not as high as expected (coefficient of determination about 0.4). Permittivity data (dielectric constant and loss factor) for the melons are presented graphically to show their relationships with frequency for the four melon cultivars and for external surface and internal tissue measurements. A dielectric relaxation for the external surface measurements, which may be attributable to a combination of bound water, Maxwell-Wagner, molecular cluster or ion-related effects, is also illustrated. Coefficients of determination for complex-plane plots, moisture content and SSC relationship, and penetration depth are also shown graphically. Further studies are needed for determining the practicality of sensing melon quality from their dielectric properties.

  16. Spectroscopic, morphological, thermal and dielectrical analysis of ...

    Indian Academy of Sciences (India)

    Dielectric studies reveal that the dielectric constant and ac-conductivity of the compositeincreased by several orders of magnitude as compared with pure polythiophene at all frequencies, thus showing that thematerial can be used for various applications in the fields of charge storage devices and high-frequency device ...

  17. Improvement in the microwave dielectric properties of ...

    Indian Academy of Sciences (India)

    Administrator

    Microwave dielectric ceramics in the Sr1–xBaxCa4Nb4TiO17 (0 ≤ x ≤ 0⋅75) composition series were fabricated via a solid-state mixed oxide route. ... wavelengths of microwaves in a dielectric medium and free space, respectively. Several ceramic .... The reflections from all the compositions were identical and could be ...

  18. Dielectric behaviour of strontium tartrate single crystals

    Indian Academy of Sciences (India)

    Unknown

    dielectric loss (tan δ) as functions of frequency and temperature. Ion core type polarization is seen in the tempera- ture range 75–180°C, and above 180°C, there is interfacial polarization for relatively lower frequency range. One observes dielectric dispersion at lower frequency presumably due to domain wall relaxation.

  19. Preparation, characterization and dielectric behaviour of some ...

    Indian Academy of Sciences (India)

    Unknown

    insulating, thus enveloping the semiconductor grains. This gives rise to barrier layer at grain/grain boundary interfaces imparting very high dielectric constant to the resulting material. One therefore expects high dielectric constant and porosity in doped stannates. In this paper, we report the preparation, structural charac-.

  20. Improvement in the microwave dielectric properties of ...

    Indian Academy of Sciences (India)

    Administrator

    Keywords. XRD; processing; phase; ceramics. 1. Introduction. Ceramics are extensively studied due to their unique microwave dielectric properties which make them potential candidate materials for manufacture of compact and low- cost dielectric resonators for wireless telecommunication devices (Reaney and Idles 2006).

  1. Dielectric, elastic, anelastic and conductivity behaviour of ...

    Indian Academy of Sciences (India)

    The presence of two phases was confirmed by X-ray diffraction. The temperature variation of dielectric constant, ', dielectric loss, tan , d.c. conductivity, a.c. conductivity, elastic and anelastic behaviour of ferrite–ferroelectric composites were studied in the temperature range 30–350°C. The a.c. conductivity measurements ...

  2. Dielectric properties of nanosilica filled epoxy nanocomposites

    Indian Academy of Sciences (India)

    M G Veena

    This paper presents the development of epoxy-silica nanocomposites and characterized for dielectric properties. The effect of ... However, at higher silica loading TEM showed inter-contactity of the particles. The dielectric constant (e. 0. ) ..... of the mechanical and permeability properties of nano- and micron-TiO2 filled epoxy ...

  3. Microwave dielectrics: solid solution, ordering and microwave ...

    Indian Academy of Sciences (India)

    Home; Journals; Bulletin of Materials Science; Volume 40; Issue 6. Microwave dielectrics: solid solution, ordering and microwave dielectric properties of ( 1 − x ) Ba(Mg 1 / 3 Nb 2 / 3 )O 3 − x Ba(Mg 1 / 8 Nb 3 / 4 )O3 ceramics. YOGITA BISHT RICHA TOMAR PULLANCHIYODAN ABHILASH DEEPA RAJENDRAN LEKSHMI M ...

  4. Aging of Dielectric Properties below Tg

    DEFF Research Database (Denmark)

    Olsen, Niels Boye; Dyre, Jeppe; Christensen, Tage Emil

    The dielectric loss at 1Hz in TPP is studied during a temperature step from one equilibrium state to another. In the applied cryostate the temperature can be equilibrated on a timescale of 1 second. The aging time dependence of the dielectric loss is studied below Tg applying temperature steps...

  5. Gating-ML: XML-based gating descriptions in flow cytometry.

    Science.gov (United States)

    Spidlen, Josef; Leif, Robert C; Moore, Wayne; Roederer, Mario; Brinkman, Ryan R

    2008-12-01

    The lack of software interoperability with respect to gating due to lack of a standardized mechanism for data exchange has traditionally been a bottleneck, preventing reproducibility of flow cytometry (FCM) data analysis and the usage of multiple analytical tools. To facilitate interoperability among FCM data analysis tools, members of the International Society for the Advancement of Cytometry (ISAC) Data Standards Task Force (DSTF) have developed an XML-based mechanism to formally describe gates (Gating-ML). Gating-ML, an open specification for encoding gating, data transformations and compensation, has been adopted by the ISAC DSTF as a Candidate Recommendation. Gating-ML can facilitate exchange of gating descriptions the same way that FCS facilitated for exchange of raw FCM data. Its adoption will open new collaborative opportunities as well as possibilities for advanced analyses and methods development. The ISAC DSTF is satisfied that the standard addresses the requirements for a gating exchange standard.

  6. Dielectric breakdown of fast switching LCD shutters

    Science.gov (United States)

    Mozolevskis, Gatis; Sekacis, Ilmars; Nitiss, Edgars; Medvids, Arturs; Rutkis, Martins

    2017-02-01

    Fast liquid crystal optical shutters due to fast switching, vibrationless control and optical properties have found various applications: substitutes for mechanical shutters, 3D active shutter glasses, 3D volumetric displays and more. Switching speed depends not only on properties of liquid crystal, but also on applied electric field intensity. Applied field in the shutters can exceed >10 V/micron which may lead to dielectric breakdown. Therefore, a dielectric thin film is needed between transparent conductive electrodes in order to reduce breakdown probability. In this work we have compared electrical and optical properties of liquid crystal displays with dielectric thin films with thicknesses up to few hundred nanometers coated by flexo printing method and magnetron sputtering. Dielectric breakdown values show flexographic thin films to have higher resistance to dielectric breakdown, although sputtered coatings have better optical properties, such as higher transmission and no coloration.

  7. Instant Oracle GoldenGate

    CERN Document Server

    Bruzzese, Tony

    2013-01-01

    Filled with practical, step-by-step instructions and clear explanations for the most important and useful tasks. Get the job done and learn as you go. A how-To book with practical recipes accompanied with rich screenshots for easy comprehension.This is a Packt Instant How-to guide, which provides concise and clear recipes for performing the core task of replication using Oracle GoldenGate.The book is aimed at DBAs from any of popular RDBMS systems such as Oracle, SQL Server, Teradata, Sybase, and so on. The level of detail provides quick applicability to beginners and a handy review for more a

  8. Time complexity and gate complexity

    International Nuclear Information System (INIS)

    Koike, Tatsuhiko; Okudaira, Yosuke

    2010-01-01

    We formulate and investigate the simplest version of time-optimal quantum computation theory (TO-QCT), where the computation time is defined by the physical one and the Hamiltonian contains only one- and two-qubit interactions. This version of TO-QCT is also considered as optimality by sub-Riemannian geodesic length. The work has two aims: One is to develop a TO-QCT itself based on a physically natural concept of time, and the other is to pursue the possibility of using TO-QCT as a tool to estimate the complexity in conventional gate-optimal quantum computation theory (GO-QCT). In particular, we investigate to what extent is true the following statement: Time complexity is polynomial in the number of qubits if and only if gate complexity is also. In the analysis, we relate TO-QCT and optimal control theory (OCT) through fidelity-optimal computation theory (FO-QCT); FO-QCT is equivalent to TO-QCT in the limit of unit optimal fidelity, while it is formally similar to OCT. We then develop an efficient numerical scheme for FO-QCT by modifying Krotov's method in OCT, which has a monotonic convergence property. We implemented the scheme and obtained solutions of FO-QCT and of TO-QCT for the quantum Fourier transform and a unitary operator that does not have an apparent symmetry. The former has a polynomial gate complexity and the latter is expected to have an exponential one which is based on the fact that a series of generic unitary operators has an exponential gate complexity. The time complexity for the former is found to be linear in the number of qubits, which is understood naturally by the existence of an upper bound. The time complexity for the latter is exponential in the number of qubits. Thus, both the targets seem to be examples satisfyng the preceding statement. The typical characteristics of the optimal Hamiltonians are symmetry under time reversal and constancy of one-qubit operation, which are mathematically shown to hold in fairly general situations.

  9. High charge density and mobility in poly(3-hexylthiophene) using a polarizable gate dielectric

    NARCIS (Netherlands)

    Naber, R.C.G.; Mulder, M; de Boer, B; Blom, PWM; de Leeuw, DM

    Organic field-effect transistors (OFETs) typically exhibit either a high charge transport mobility or a high charge density. Here we demonstrate an OFET in which both the mobility and the charge density have high values of 0.1 cm(2)/V s and 28 mC/m(2), respectively. The high charge density is

  10. Numerical investigation of dielectric barrier discharges

    Science.gov (United States)

    Li, Jing

    1997-12-01

    A dielectric barrier discharge (DBD) is a transient discharge occurring between two electrodes in coaxial or planar arrangements separated by one or two layers of dielectric material. The charge accumulated on the dielectric barrier generates a field in a direction opposite to the applied field. The discharge is quenched before an arc is formed. It is one of the few non-thermal discharges that operates at atmospheric pressure and has the potential for use in pollution control. In this work, a numerical model of the dielectric barrier discharge is developed, along with the numerical approach. Adaptive grids based on the charge distribution is used. A self-consistent method is used to solve for the electric field and charge densities. The Successive Overrelaxation (SOR) method in a non-uniform grid spacing is used to solve the Poisson's equation in the cylindrically-symmetric coordinate. The Flux Corrected Transport (FCT) method is modified to solve the continuity equations in the non-uniform grid spacing. Parametric studies of dielectric barrier discharges are conducted. General characteristics of dielectric barrier discharges in both anode-directed and cathode-directed streamer are studied. Effects of the dielectric capacitance, the applied field, the resistance in external circuit and the type of gases (O2, air, N2) are investigated. We conclude that the SOR method in an adaptive grid spacing for the solution of the Poisson's equation in the cylindrically-symmetric coordinate is convergent and effective. The dielectric capacitance has little effect on the g-factor of radical production, but it determines the strength of the dielectric barrier discharge. The applied field and the type of gases used have a significant role on the current peak, current pulse duration and radical generation efficiency, discharge strength, and microstreamer radius, whereas the external series resistance has very little effect on the streamer properties. The results are helpful in

  11. Design and control of interface reaction between Al-based dielectrics and AlGaN layer in AlGaN/GaN metal-oxide-semiconductor structures

    Science.gov (United States)

    Watanabe, Kenta; Nozaki, Mikito; Yamada, Takahiro; Nakazawa, Satoshi; Anda, Yoshiharu; Ishida, Masahiro; Ueda, Tetsuzo; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

    2017-07-01

    Important clues for achieving well-behaved AlGaN/GaN metal-oxide-semiconductor (MOS) devices with Al-based gate dielectrics were systematically investigated on the basis of electrical and physical characterizations. We found that low-temperature deposition of alumina insulators on AlGaN surfaces is crucial to improve the interface quality, thermal stability, and variability of MOS devices by suppressing Ga diffusion into the gate oxides. Moreover, aluminum oxynitride grown in a reactive nitric atmosphere was proven to expand the optimal process window that would improve the interface quality and to enhance immunity against charge injection into the gate dielectrics. The results constitute common guidelines for achieving high-performance and reliable AlGaN/GaN MOS devices.

  12. Structure and Properties of Epitaxial Dielectrics on gallium nitride

    Science.gov (United States)

    Wheeler, Virginia Danielle

    GaN is recognized as a possible material for metal oxide semiconductor field effect transistors (MOSFETs) used in high temperature, high power and high speed electronic applications. However, high gate leakage and low device breakdown voltages limit their use in these applications. The use of high-kappa dielectrics, which have both a high permittivity (ε) and high band gap energy (Eg), can reduce the leakage current density that adversely affects MOS devices. La2O3 and Sc2O 3 are rare earth oxides with a large Eg (6.18 eV and 6.3 eV respectively) and a relatively high ε (27 and 14.1 respectively), which make them good candidates for enhancing MOSFET performance. Epitaxial growth of oxides is a possible approach to reducing leakage current and Fermi level pinning related to a high density of interface states for dielectrics on compound semiconductors. In this work, La2O3 and Sc2O 3 were characterized structurally and electronically as potential epitaxial gate dielectrics for use in GaN based MOSFETs. GaN surface treatments were examined as a means for additional interface passivation and influencing subsequent oxide formation. Potassium persulfate (K2(SO4)2) and potassium hydroxide (KOH) were explored as a way to achieve improved passivation and desired surface termination for GaN films deposited on sapphire substrates by metal organic chemical vapor deposition (MOCVD). X-ray photoelectron spectroscopy (XPS) showed that KOH left a nitrogen-rich interface, while K2(SO 4)2 left a gallium-rich interface, which provides a way to control surface oxide formation. K2(SO4)2 exhibited a shift in the O1s peak indicating the formation of a gallium-rich GaOx at the surface with decreased carbon contaminants. GaO x acts as a passivating layer prior to dielectric deposition, which resulted in an order of magnitude reduction in leakage current, a reduced hysteresis window, and an overall improvement in device performance. Furthermore, K2(SO4)2 resulted in an additional 0.4 eV of

  13. Boolean gates on actin filaments

    Energy Technology Data Exchange (ETDEWEB)

    Siccardi, Stefano, E-mail: ssiccardi@2ssas.it [The Unconventional Computing Centre, University of the West of England, Bristol (United Kingdom); Tuszynski, Jack A., E-mail: jackt@ualberta.ca [Department of Oncology, University of Alberta, Edmonton, Alberta (Canada); Adamatzky, Andrew, E-mail: andrew.adamatzky@uwe.ac.uk [The Unconventional Computing Centre, University of the West of England, Bristol (United Kingdom)

    2016-01-08

    Actin is a globular protein which forms long polar filaments in the eukaryotic cytoskeleton. Actin networks play a key role in cell mechanics and cell motility. They have also been implicated in information transmission and processing, memory and learning in neuronal cells. The actin filaments have been shown to support propagation of voltage pulses. Here we apply a coupled nonlinear transmission line model of actin filaments to study interactions between voltage pulses. To represent digital information we assign a logical TRUTH value to the presence of a voltage pulse in a given location of the actin filament, and FALSE to the pulse's absence, so that information flows along the filament with pulse transmission. When two pulses, representing Boolean values of input variables, interact, then they can facilitate or inhibit further propagation of each other. We explore this phenomenon to construct Boolean logical gates and a one-bit half-adder with interacting voltage pulses. We discuss implications of these findings on cellular process and technological applications. - Highlights: • We simulate interaction between voltage pulses using on actin filaments. • We use a coupled nonlinear transmission line model. • We design Boolean logical gates via interactions between the voltage pulses. • We construct one-bit half-adder with interacting voltage pulses.

  14. Surface patterned dielectrics by direct writing of anodic oxides using scanning droplet cell microscopy

    International Nuclear Information System (INIS)

    Siket, Christian M.; Mardare, Andrei Ionut; Kaltenbrunner, Martin; Bauer, Siegfried; Hassel, Achim Walter

    2013-01-01

    Highlights: • Scanning droplet cell microscopy was applied for local gate oxide writing. • Sharp lines are obtained at the highest writing speed of 1 mm min −1 . • 13.4 kC cm −3 was found as charge per volume for aluminium oxide. • High field constant of 24 nm V −1 and dielectric constant of 12 were determined for Al 2 O 3 by CV and EIS. -- Abstract: Scanning droplet cell microscopy was used for patterning of anodic oxide lines on the surface of Al thin films by direct writing. The structural modifications of the written oxide lines as a function of the writing speed were studied by analyzing the relative error of the line widths. Sharper lines were obtained for writing speeds faster than 1 mm min −1 . An increase in sharpness was observed for higher writing speeds. A theoretical model based on the Faraday law is proposed to explain the constant anodisation current measured during the writing process and yielded a charge per volume of 13.4 kC cm −3 for Al 2 O 3 . From calculated oxide film thicknesses the high field constant was found to be 24 nm V −1 . Electrochemical impedance spectroscopy revealed an increase of the electrical permittivity up to ε = 12 with the decrease of the writing speed of the oxide line. Writing of anodic oxide lines was proven to be an important step in preparing capacitors and gate dielectrics in plastic electronics

  15. Remote N2 plasma treatment to deposit ultrathin high-k dielectric as tunneling contact layer for single-layer MoS2 MOSFET

    Science.gov (United States)

    Qian, Qingkai; Zhang, Zhaofu; Hua, Mengyuan; Wei, Jin; Lei, Jiacheng; Chen, Kevin J.

    2017-12-01

    Remote N2 plasma treatment is explored as a surface functionalization technique to deposit ultrathin high-k dielectric on single-layer MoS2. The ultrathin dielectric is used as a tunneling contact layer, which also serves as an interfacial layer below the gate region for fabricating top-gate MoS2 metal–oxide–semiconductor field-effect transistors (MOSFETs). The fabricated devices exhibited small hysteresis and mobility as high as 14 cm2·V‑1·s‑1. The contact resistance was significantly reduced, which resulted in the increase of drain current from 20 to 56 µA/µm. The contact resistance reduction can be attributed to the alleviated metal–MoS2 interface reaction and the preserved conductivity of MoS2 below the source/drain metal contact.

  16. A gate drive circuit for gate-turn-off (GTO) devices in series stack

    International Nuclear Information System (INIS)

    Despe, O.

    1999-01-01

    A gate-turn-off (GTO) switch is under development at the Advanced Photon Source as a replacement for a thyratron switch in high power pulsed application. The high voltage in the application requires multiple GTOs connected in series. One component that is critical to the success of GTO operation is the gate drive circuit. The gate drive circuit has to provide fast high-current pulses to the GTO gate for fast turn-on and turn-off. It also has to be able to operate while floating at high voltage. This paper describes a gate drive circuit that meets these requirements

  17. Terahertz amplification in RTD-gated HEMTs with a grating-gate wave coupling topology

    Energy Technology Data Exchange (ETDEWEB)

    Condori Quispe, Hugo O.; Sensale-Rodriguez, Berardi [The University of Utah, Salt Lake City, Utah 84112 (United States); Encomendero-Risco, Jimy J.; Xing, Huili Grace [University of Notre Dame, Notre Dame, Indiana 46556 (United States); Cornell University, Ithaca, New York 14853 (United States)

    2016-08-08

    We theoretically analyze the operation of a terahertz amplifier consisting of a resonant-tunneling-diode gated high-electron-mobility transistor (RTD-gated HEMT) in a grating-gate topology. In these devices, the key element enabling substantial power gain is the efficient coupling of terahertz waves into and out of plasmons in the RTD-gated HEMT channel, i.e., the gain medium, via the grating-gate itself, part of the active device, rather than by an external antenna structure as discussed in previous works, therefore potentially enabling terahertz amplification with associated power gains >40 dB.

  18. The color dielectric model of QCD

    International Nuclear Information System (INIS)

    Pirner, H.-J.; Massachusetts Inst. of Tech., Cambridge, MA; Massachusetts Inst. of Tech., Cambridge, MA

    1992-01-01

    This paper demonstrates the emergence of valence gluons and their bound states, the glueballs from perturbative quantum chromodynamics (QCD). We discuss the phenomenological constraints and theoretical method needed to generate effective glueballs actions. We show how color dielectric confinement works naively and in the lattice model of color dielectrics. This lattice model is derived for SU(2) color by a blockspinning Monte Carlo renormalization group procedure. We interpret the resulting long-distance as a strongly interacting lattice string theory where the valence link gluon fields randomize in the color dielectric background which mimics the integrated out high-frequency gluon modes in the vacuum. The fluctuations of the color dielectric fields are related to color neutral glueballs modes. We give the extension of this color dielectric SU(2) theory for general SU(N) with quarks and address the problems associated with combining confinement and chiral symmetry breaking. Finally we prove the efficiency of the effective theory in applications to the heavy quark system, the the baryon, to the nucleon-nucleon interaction, to baryon models and the gluon plasma transition. In all those cases the behavior of the higher energy gluons can be monitored via the color dielectric fields. An increase in the energy density from ''deconfining'' the higher frequency modes inside the flux tube or in thermally excited matter shows up as an increase in the value of the color dielectric field and its associated energy density. (Author)

  19. Gates Auto Door Car With Lights Modulated

    OpenAIRE

    Lina Carolina; Luyung Dinani, Skom, MMSi

    2002-01-01

    In scientific writing wi ll be explained about automatic gates with modulated headlights, where to find the car lights were adjusted by the relative frequency darker because of this background that the author alleviate human task in performing daily activities by using an automatic gate with the car lights modulated.

  20. Protected gates for topological quantum field theories

    Science.gov (United States)

    Beverland, Michael E.; Buerschaper, Oliver; Koenig, Robert; Pastawski, Fernando; Preskill, John; Sijher, Sumit

    2016-02-01

    We study restrictions on locality-preserving unitary logical gates for topological quantum codes in two spatial dimensions. A locality-preserving operation is one which maps local operators to local operators — for example, a constant-depth quantum circuit of geometrically local gates, or evolution for a constant time governed by a geometrically local bounded-strength Hamiltonian. Locality-preserving logical gates of topological codes are intrinsically fault tolerant because spatially localized errors remain localized, and hence sufficiently dilute errors remain correctable. By invoking general properties of two-dimensional topological field theories, we find that the locality-preserving logical gates are severely limited for codes which admit non-abelian anyons, in particular, there are no locality-preserving logical gates on the torus or the sphere with M punctures if the braiding of anyons is computationally universal. Furthermore, for Ising anyons on the M-punctured sphere, locality-preserving gates must be elements of the logical Pauli group. We derive these results by relating logical gates of a topological code to automorphisms of the Verlinde algebra of the corresponding anyon model, and by requiring the logical gates to be compatible with basis changes in the logical Hilbert space arising from local F-moves and the mapping class group.

  1. Protected gates for topological quantum field theories

    Energy Technology Data Exchange (ETDEWEB)

    Beverland, Michael E.; Pastawski, Fernando; Preskill, John [Institute for Quantum Information and Matter, California Institute of Technology, Pasadena, California 91125 (United States); Buerschaper, Oliver [Dahlem Center for Complex Quantum Systems, Freie Universität Berlin, 14195 Berlin (Germany); Koenig, Robert [Institute for Advanced Study and Zentrum Mathematik, Technische Universität München, 85748 Garching (Germany); Sijher, Sumit [Institute for Quantum Computing and Department of Applied Mathematics, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada)

    2016-02-15

    We study restrictions on locality-preserving unitary logical gates for topological quantum codes in two spatial dimensions. A locality-preserving operation is one which maps local operators to local operators — for example, a constant-depth quantum circuit of geometrically local gates, or evolution for a constant time governed by a geometrically local bounded-strength Hamiltonian. Locality-preserving logical gates of topological codes are intrinsically fault tolerant because spatially localized errors remain localized, and hence sufficiently dilute errors remain correctable. By invoking general properties of two-dimensional topological field theories, we find that the locality-preserving logical gates are severely limited for codes which admit non-abelian anyons, in particular, there are no locality-preserving logical gates on the torus or the sphere with M punctures if the braiding of anyons is computationally universal. Furthermore, for Ising anyons on the M-punctured sphere, locality-preserving gates must be elements of the logical Pauli group. We derive these results by relating logical gates of a topological code to automorphisms of the Verlinde algebra of the corresponding anyon model, and by requiring the logical gates to be compatible with basis changes in the logical Hilbert space arising from local F-moves and the mapping class group.

  2. Femtosecond optomagnetism in dielectric antiferromagnets

    Science.gov (United States)

    Bossini, D.; Rasing, Th

    2017-02-01

    Optical femtosecond manipulation of magnetic order is attractive for the development of new concepts for ultrafast magnetic recording. Theoretical and experimental investigations in this research area aim at establishing a physical understanding of magnetic media in light-induced non-equilibrium states. Such a quest requires one to adjust the theory of magnetism, since the thermodynamical concepts of elementary excitations and spin alignment determined by the exchange interaction are not applicable on the femtosecond time-scale after the photo-excitation. Here we report some key milestones concerning the femtosecond optical control of spins in dielectric antiferromagnets, whose spin dynamics is by nature faster than that of ferromagnets and can be triggered even without any laser heating. The recent progress of the opto-magnetic effect in the sub-wavelength regime makes this exciting research area even more promising, in terms of both fundamental breakthroughs and technological perspectives.

  3. 7-Octenyltrichrolosilane/trimethyaluminum hybrid dielectrics fabricated by molecular-atomic layer deposition on ZnO thin film transistors

    Science.gov (United States)

    Huang, Jie; Lee, Mingun; Lucero, Antonio T.; Cheng, Lanxia; Ha, Min-Woo; Kim, Jiyoung

    2016-06-01

    We demonstrate the fabrication of 7-octenytrichlorosilane (7-OTS)/trimethylaluminum (TMA) organic-inorganic hybrid films using molecular-atomic layer deposition (MALD). The properties of 7-OTS/TMA hybrid films are extensively investigated using transmission electron microscopy (TEM), Fourier transform infrared spectroscopy (FTIR), atomic force microscopy (AFM), and electrical measurements. Our results suggest that uniform and smooth amorphous hybrid thin films with excellent insulating properties are obtained using the MALD process. Films have a relatively high dielectric constant of approximately 5.0 and low leakage current density. We fabricate zinc oxide (ZnO) based thin film transistors (TFTs) using 7-OTS/TMA hybrid material as a back gate dielectric with the top ZnO channel layer deposited in-situ via MALD. The ZnO TFTs exhibit a field effect mobility of approximately 0.43 cm2 V-1 s-1, a threshold voltage of approximately 1 V, and an on/off ratio of approximately 103 under low voltage operation (from -3 to 9 V). This work demonstrates an organic-inorganic hybrid gate dielectric material potentially useful in flexible electronics application.

  4. Effect of Thermal Budget on the Electrical Characterization of Atomic Layer Deposited HfSiO/TiN Gate Stack MOSCAP Structure.

    Directory of Open Access Journals (Sweden)

    Z N Khan

    Full Text Available Metal Oxide Semiconductor (MOS capacitors (MOSCAP have been instrumental in making CMOS nano-electronics realized for back-to-back technology nodes. High-k gate stacks including the desirable metal gate processing and its integration into CMOS technology remain an active research area projecting the solution to address the requirements of technology roadmaps. Screening, selection and deposition of high-k gate dielectrics, post-deposition thermal processing, choice of metal gate structure and its post-metal deposition annealing are important parameters to optimize the process and possibly address the energy efficiency of CMOS electronics at nano scales. Atomic layer deposition technique is used throughout this work because of its known deposition kinetics resulting in excellent electrical properties and conformal structure of the device. The dynamics of annealing greatly influence the electrical properties of the gate stack and consequently the reliability of the process as well as manufacturable device. Again, the choice of the annealing technique (migration of thermal flux into the layer, time-temperature cycle and sequence are key parameters influencing the device's output characteristics. This work presents a careful selection of annealing process parameters to provide sufficient thermal budget to Si MOSCAP with atomic layer deposited HfSiO high-k gate dielectric and TiN gate metal. The post-process annealing temperatures in the range of 600°C -1000°C with rapid dwell time provide a better trade-off between the desirable performance of Capacitance-Voltage hysteresis and the leakage current. The defect dynamics is thought to be responsible for the evolution of electrical characteristics in this Si MOSCAP structure specifically designed to tune the trade-off at low frequency for device application.

  5. Characterization and Modeling of Charge Trapping and Retention in Novel Multi-Dielectric Nonvolatile Semiconductor Memory Devices.

    Science.gov (United States)

    Roy, Anirban

    This dissertation deals with the synthesis and analysis of new multidielectric memory devices to identify a viable low voltage programmable (5-10V) electrically erasable programmable read only memory (EEPROM) cell for memory densities exceeding 1MB/chip. The memory devices are variations of the triple dielectric silicon dioxide -silicon nitride-silicon dioxide (ONO) structure, where the silicon nitride is the "memory layer". We have developed physically based analytical and numerical models to explain the charge trapping and storage in the scaled down nitride (~100 A) layer. The recombination kinetics in the nitride is modeled with amphoteric traps acting as "memory" centers for electrons and holes injected through the tunneling oxide during programming. We have investigated electron and hole charge separation at the silicon-insulator interface. Surface channel or buried channel transistors can only separate electrons and holes under one gate bias polarity. We have demonstrated, for the first time, charge separation for both gate polarities with the specially designed dual channel (n-buried channel and p-surface channel under the same gate) transistor. We have gained evidence to prove that the memory properties of thin-oxide SONOS devices is dominated by electron and hole recombination in the nitride bulk. We have fabricated ONO memory capacitors and transistors with bottom(tunneling) oxide thicknesses in the range of 15-23A, nitride thicknesses in the range of 50-205A and top(blocking) oxide thicknesses in the range of 17-56A. We have demonstrated 5-10V programming on both uniform and graded(Si-rich composition bounded by N-rich composition) nitride ONO memory devices. We have shown that the graded nitride devices are better than uniform composition nitride for long term (>10 years) charge retention. We have shown that a Au gate electrode reduces electron injection from the gate for large negative gate bias, when compared with Al or n^+ poly gate electrodes. Based

  6. Multi-gated field emitters for a micro-column

    International Nuclear Information System (INIS)

    Mimura, Hidenori; Kioke, Akifumi; Aoki, Toru; Neo, Yoichiro; Yoshida, Tomoya; Nagao, Masayoshi

    2011-01-01

    We have developed a multi-gated field emitter (FE) such as a quadruple-gated FE with a three-stacked electrode lens and a quintuple-gated FE with a four-stacked electrode lens. Both the FEs can focus the electron beam. However, the quintuple-gated FE has a stronger electron convergence than the quadruple-gated FE, and a beam crossover is clearly observed for the quintuple-gated FE.

  7. Top-gate pentacene-based organic field-effect transistor with amorphous rubrene gate insulator

    Science.gov (United States)

    Hiroki, Mizuha; Maeda, Yasutaka; Ohmi, Shun-ichiro

    2018-02-01

    The scaling of organic field-effect transistors (OFETs) is necessary for high-density integration and for this, OFETs with a top-gate configuration are required. There have been several reports of damageless lithography processes for organic semiconductor or insulator layers. However, it is still difficult to fabricate scaled OFETs with a top-gate configuration. In this study, the lift-off process and the device characteristics of the OFETs with a top-gate configuration utilizing an amorphous (α) rubrene gate insulator were investigated. We have confirmed that α-rubrene shows an insulating property, and its extracted linear mobility was 2.5 × 10‑2 cm2/(V·s). The gate length and width were 10 and 60 µm, respectively. From these results, the OFET with a top-gate configuration utilizing an α-rubrene gate insulator is promising for the high-density integration of scaled OFETs.

  8. A dielectric approach to high temperature superconductivity

    International Nuclear Information System (INIS)

    Mahanty, J.; Das, M.P.

    1989-01-01

    The dielectric response of an electron-ion system to the presence of a pair of charges is investigated. From the nature of the dielectric function, it is shown that a strong attractive pair formation is possible depending on the dispersion of the ion branches. The latter brings a reduction to the sound velocity which is used as a criterion for the superconductivity. By solving the BCS equation with the above dielectric function, we obtain a reasonable value of T/sub c/. 17 refs., 1 fig

  9. Epoxy Foam Encapsulants: Processing and Dielectric Characterization

    Energy Technology Data Exchange (ETDEWEB)

    Linda Domeier; Marion Hunter

    1999-01-01

    The dielectric performance of epoxy foams was investigated to determine if such materials might provide advantages over more standard polyurethane foams in the encapsulation of electronic assemblies. Comparisons of the dielectric characteristics of epoxy and urethane encapsulant foams found no significant differences between the two resin types and no significant difference between as-molded and machined foams. This study specifically evaluated the formulation and processing of epoxy foams using simple methylhydrosiloxanes as the flowing agent and compared the dielectric performance of those to urethane foams of similar density.

  10. Impact of oxidation and reduction annealing on the electrical properties of Ge/La2O3/ZrO2gate stacks.

    Science.gov (United States)

    Henkel, Christoph; Hellström, Per-Erik; Ostling, Mikael; Stöger-Pollach, Michael; Bethge, Ole; Bertagnolli, Emmerich

    2012-08-01

    The paper addresses the passivation of Germanium surfaces by using layered La 2 O 3 /ZrO 2 high- k dielectrics deposited by Atomic Layer Deposition to be applied in Ge-based MOSFET devices. Improved electrical properties of these multilayered gate stacks exposed to oxidizing and reducing ambient during thermal post treatment in presence of thin Pt cap layers are demonstrated. The results suggest the formation of thin intermixed La x Ge y O z interfacial layers with thicknesses controllable by oxidation time. This formation is further investigated by XPS, EDX/EELS and TEM analysis. An additional reduction annealing treatment further improves the electrical properties of the gate dielectrics in contact with the Ge substrate. As a result low interface trap densities on (1 0 0) Ge down to 3 × 10 11  eV -1  cm -2 are demonstrated. The formation of the high- k La x Ge y O z layer is in agreement with the oxide densification theory and may explain the improved interface trap densities. The scaling potential of the respective layered gate dielectrics used in Ge-based MOS-based device structures to EOT of 1.2 nm or below is discussed. A trade-off between improved interface trap density and a lowered equivalent oxide thickness is found.

  11. Identification of structural relaxation in the dielectric response of water

    DEFF Research Database (Denmark)

    Hansen, Jesper Schmidt; Kisliuk, Alexander; Solokov, Alexei P.

    2016-01-01

    One century ago pioneering dielectric results obtained for water and n-alcohols triggered the advent of molecular rotation diffusion theory considered by Debye to describe the primary dielectric absorption in these liquids. Comparing dielectric, viscoelastic, and light scattering results, we...... unambiguously demonstrate that the structural relaxation appears only as a high-frequency shoulder in the dielectric spectra of water. In contrast, the main dielectric peak is related to a supramolecular structure, analogous to the Debye-like peak observed in monoalcohols....

  12. Influence of the oxygen concentration of atomic-layer-deposited HfO2 films on the dielectric property and interface trap density

    Science.gov (United States)

    Park, Jaehoo; Cho, Moonju; Kim, Seong Keun; Park, Tae Joo; Lee, Suk Woo; Hong, Sug Hun; Hwang, Cheol Seong

    2005-03-01

    The influence of the ozone concentration (160-370g/m3) during atomic layer deposition of HfO2-gate dielectrics on the dielectric performance of the films grown on Si was studied. Although ozone was effective in reducing the impurity concentration in the film compared to H2O, the higher concentration slightly deteriorated the dielectric performance. More importantly, the degradation in the interface trap property with increasing post-annealing temperature became more serious as the ozone concentration increased. Investigation of the interface states using x-ray photoelectron spectroscopy revealed that the excessive oxygen incorporated during the film growth made the interfacial sub-oxide species (SiO, Si2O3, and silicate) and SiO2 coordinate more with oxygen. This increased the interface trap density and degraded the interface properties.

  13. Multiscale dipole relaxation in dielectric materials

    DEFF Research Database (Denmark)

    Hansen, Jesper Schmidt

    2016-01-01

    Dipole relaxation from thermally induced perturbations is investigated on different length scales for dielectric materials. From the continuum dynamical equations for the polarisation, expressions for the transverse and longitudinal dipole autocorrelation functions are derived in the limit where...

  14. Charge accumulation in lossy dielectrics: a review

    DEFF Research Database (Denmark)

    Rasmussen, Jørgen Knøster; McAllister, Iain Wilson; Crichton, George C

    1999-01-01

    At present, the phenomenon of charge accumulation in solid dielectrics is under intense experimental study. Using a field theoretical approach, we review the basis for charge accumulation in lossy dielectrics. Thereafter, this macroscopic approach is applied to planar geometries such that the mat......At present, the phenomenon of charge accumulation in solid dielectrics is under intense experimental study. Using a field theoretical approach, we review the basis for charge accumulation in lossy dielectrics. Thereafter, this macroscopic approach is applied to planar geometries...... such that the material parameters which influence charge accumulation are clearly identified; viz. the conductivity, permittivity and dimensions of the insulating media. The two former parameters, together with the applied voltage, govern both the magnitude and polarity of the accumulated charge....

  15. Deformation and instabilities in dielectric elastomer composites

    Science.gov (United States)

    Li, Wenyuan; Landis, Chad M.

    2012-09-01

    The deformation behavior in dielectric elastomer composites due to applied mechanical and electrical loadings is investigated using finite element methods. The composite structure consists of a dielectric elastomer matrix with a regular square array of cylindrical holes or rigid conducting inclusions. The dielectric elastomer material is represented with either a compressible Neo-Hookean model for the elasticity or a compressible Gent model. Following previous work, the dielectric constant relating the true electric displacement to the true electric field is taken to be independent of the deformation. The finite element method is used to analyze the electromechanical behavior of representative unit cells of the composite material structure. Results are presented for the stress-strain, electric field-electric displacement and coupled electromechanical responses of the different composite types.

  16. Infrared and THz spectroscopy of nanostructured dielectrics

    Directory of Open Access Journals (Sweden)

    Jan Petzelt

    2009-09-01

    Full Text Available Results achieved using the infrared/THz spectroscopy of various inhomogeneous dielectrics in the Department of Dielectrics, Institute of Physics, Prague, during the last decade are briefly reviewed. The discussion concerns high-permittivity ceramics with inevitable low-permittivity dead layers along the grain boundaries, relaxor ferroelectrics with highly anisotropic polar nano-regions, classical matrix-type composites, core-shell composites, filled nanoporous glasses, polycrystalline and epitaxial thin films, heterostructures and superlattices on dielectric substrates. The analysis using models based on the effective medium approach is discussed. The importance of depolarizing field and of the percolation of components on the effective ac dielectric response and the excitations contributing to it are emphasized.

  17. PREFACE: Dielectrics 2009: Measurement Analysis and Applications

    Science.gov (United States)

    Vaughan, Alun; Williams, Graham

    2009-07-01

    The conference Dielectrics 2009: Measurements, Analysis and Applications represents a significant milestone in the evolution of dielectrics research in the UK. It is reasonable to state that the academic study of dielectrics has led to many fundamental advances and that dielectric materials underpin the modern world in devices ranging from field effect transistors, which operate at extremely high fields, albeit low voltages, to the high voltage plants that provide the energy that powers our economy. The origins of the Dielectrics Group of the Institute of Physics (IOP), which organized this conference, can be traced directly back to the early 1960s, when Professor Mansel Davies was conducting research into the dielectric relaxation behaviour of polar liquids and solids at The Edward Davies Chemical Laboratories of the University College of Wales, Aberystwyth. He was already well-known internationally for his studies of molecular structure and bonding of small molecules, using infra-red-spectroscopy, and of the physical properties of hydrogen-bonded liquids and solids, using thermodynamic methods. Dielectric spectroscopy was a fairly new area for him and he realized that opportunities for scientists in the UK to gather together and discuss their research in this developing area of physical chemistry/chemical physics were very limited. He conceived the idea of forming a Dielectrics Discussion Group (DDG), which would act as a meeting point and provide a platform for dielectrics research in the UK and beyond and, as a result, a two-day Meeting was convened in the spring of 1968 at Gregynog Hall of the University of Wales, near Newtown, Montgomeryshire. It was organized by Mansel Davies, Alun Price and Graham Williams, all physical chemists from the UCW, Aberystwyth. Fifty scientists attended, being a mix of physical chemists, theoretical chemists, physicists, electrical engineers, polymer and materials scientists, all from the UK, except Dr Brendan Scaife of Trinity

  18. ELABORATION AND DIELECTRIC CHARACTERIZATION OF A ...

    African Journals Online (AJOL)

    in the phase morphotropique zone (FMP). Key words: Ceramics PZT, Dielectric properties, Dielectric constant / loss constant. 1. INTRODUCTION. Les composées à base d'oxyde de formule générale Pb (ZrxTi1-x)O3 de structure pérovskite (ABO3) appelées PZT présentent des propriétés particulièrement intéressantes.

  19. In-beam dielectric properties of alumina

    International Nuclear Information System (INIS)

    Molla, J.; Ibarra, A.; Hodgson, E.R.

    1995-01-01

    The dielectric properties (permittivity and loss tangent) of a 99.7% purity alumina grade have been measured over a wide frequency range (1 kHz-15 GHz) before and after 2 MeV electron irradiation at different temperatures. The dielectric properties at 15 GHz were measured during irradiation. Both prompt and fluence effects are observed together with permanent changes which continue to evolve following irradiation. The behaviour is complex, consistent with both radiation induced electronic effects and aggregation processes. ((orig.))

  20. Ambipolarity reduction in DMG asymmetric vacuum dielectric Schottky Barrier GAA MOSFET to improve hot carrier reliability

    Science.gov (United States)

    Kumar, Manoj; Haldar, Subhasis; Gupta, Mridula; Gupta, R. S.

    2017-11-01

    An explicit surface potential and subthreshold current model for novel Dual Metal Gate (DMG) Asymmetric Vacuum (AV) as gate dielectric Schottky Barrier (SB) Cylindrical Gate All Around (CGAA) MOSFET with the incorporation of localized charges (Nf) is developed to provide excellent immunity against threshold voltage (Vth) degradation due to hot carriers. Hot carrier induced Localized Charges (LC) either positive or negative leads to degrade the threshold of the device. The major advantage of the proposed DMG-AV-SB-CGAA MOSFET is that it mitigates the ambipolar behavior thus offering very good on current to off current ratio; and also reduces the electron temperature which leads to less hot carrier generation thus lesser degradation in Vth and improved Hot Carrier reliability. The surface potential is determined for three different regions by solving 1-D Poisson's and 2-D Laplace equation through separation of variable method to facilitate an optimal model for calculating the subthreshold drain current from Si-SiO2 interface boundary. The developed model results are in good agreement with that of ATLAS-TCAD simulation.

  1. Solution processable high dielectric constant nanocomposites based on ZrO2 nanoparticles for flexible organic transistors.

    Science.gov (United States)

    Beaulieu, Michael R; Baral, Jayanta K; Hendricks, Nicholas R; Tang, Yuying; Briseño, Alejandro L; Watkins, James J

    2013-12-26

    A solution-based strategy for fabrication of high dielectric constant (κ) nanocomposites for flexible organic field effect transistors (OFETs) has been developed. The nanocomposite was composed of a high-κ polymer, cyanoethyl pullulan (CYELP), and a high-κ nanoparticle, zirconium dioxide (ZrO2). Organic field effect transistors (OFETs) based on neat CYELP exhibited anomalous behavior during device operation, such as large hysteresis and variable threshold voltages, which yielded inconsistent devices and poor electrical characteristics. To improve the stability of the OFET, we introduced ZrO2 nanoparticles that bind with residual functional groups on the high-κ polymer, which reduces the number of charge trapping sites. The nanoparticles, which serve as physical cross-links, reduce the hysteresis without decreasing the dielectric constant. The dielectric constant of the nanocomposites was tuned over the range of 15.6-21 by varying the ratio of the two components in the composite dielectrics, resulting in a high areal capacitance between 51 and 74 nF cm(-2) at 100 kHz and good insulating properties of a low leakage current of 1.8 × 10(-6) A cm(-2) at an applied voltage of -3.5 V (0.25 MV cm(-1)). Bottom-gate, top-contact (BGTC) low operating voltage p-channel OFETs using these solution processable high-κ nanocomposites were fabricated by a contact film transfer (CFT) technique with poly(3-hexylthiophene) (P3HT) as the charge transport layer. Field effect mobilities as high as 0.08 cm(2) V(-1) s(-1) and on/off current ratio of 1.2 × 10(3) for P3HT were measured for devices using the high-κ dielectric ZrO2 nanocomposite. These materials are promising for generating solution coatable dielectrics for low cost, large area, low operating voltage flexible transistors.

  2. Dielectric properties of PMMA/Soot nanocomposites.

    Science.gov (United States)

    Clayton, Lanetra M; Cinke, Martin; Meyyappan, M; Harmon, Julie P

    2007-07-01

    Dielectric analysis (DEA) of relaxation behavior in poly(methyl methacrylate) (PMMA) soot nanocomposites is described herein. The soot, an inexpensive material, consists of carbon nanotubes, amorphous and graphitic carbon and metal particles. Results are compared to earlier studies on PMMA/multi-walled nanotube (MWNT) composites and PMMA/single-walled nanotube (SWNT) composites. The beta relaxation process appeared to be unaffected by the presence of the soot, as was noted earlier in nanotube composites. The gamma relaxation region in PMMA, normally dielectrically inactive, was "awakened" in the PMMA/soot composite. This occurrence is consistent with previously published data on nanotube composites. The dielectric permittivity, s', increased with soot content. The sample with 1% soot exhibited a permittivity (at 100 Hz and 25 degrees C) of 7.3 as compared to 5.1 for neat PMMA. Soot increased the dielectric strength, deltaE, of the composites. The 1% soot sample exhibited a dielectric strength of 6.38, while the neat PMMA had a value of 2.95 at 40 degrees C. The symmetric broadening term (alpha) was slightly higher for the 1% composite at temperatures near the secondary relaxation and near the primary relaxation, but all samples deviated from symmetrical semi-circular behavior (alpha = 1). The impact of the soot filler is seen more clearly in dielectric properties than in mechanical properties studies conducted earlier.

  3. Calibration of submerged multi-sluice gates

    Directory of Open Access Journals (Sweden)

    Mohamed F. Sauida

    2014-09-01

    The main objective of this work is to study experimentally and verify empirically the different parameters affecting the discharge through submerged multiple sluice gates (i.e., the expansion ratios, gates operational management, etc.. Using multiple regression analysis of the experimental results, a general equation for discharge coefficient is developed. The results show, that the increase in the expansion ratio and the asymmetric operation of gates, give higher values for the discharge coefficient. The obtained predictions of the discharge coefficient using the developed equations are compared to the experimental data. The present developed equations showed good consistency and high accuracy.

  4. A class of quantum gate entanglers

    International Nuclear Information System (INIS)

    Heydari, Hoshang

    2010-01-01

    We construct quantum gate entanglers for different classes of multipartite states based on the definition of W and GHZ concurrence classes. First, we review the basic construction of concurrence classes based on the orthogonal complement of a positive operator valued measure (POVM) on quantum phase. Then, we construct quantum gate entanglers for different classes of multi-qubit states. In particular, we show that these operators can entangle multipartite states if they satisfy some conditions for W and GHZ classes of states. Finally, we explicitly give the W class and GHZ classes of quantum gate entanglers for four-qubit states.

  5. Resonantly driven CNOT gate for electron spins

    Science.gov (United States)

    Zajac, D. M.; Sigillito, A. J.; Russ, M.; Borjans, F.; Taylor, J. M.; Burkard, G.; Petta, J. R.

    2018-01-01

    To build a universal quantum computer—the kind that can handle any computational task you throw at it—an essential early step is to demonstrate the so-called CNOT gate, which acts on two qubits. Zajac et al. built an efficient CNOT gate by using electron spin qubits in silicon quantum dots, an implementation that is especially appealing because of its compatibility with existing semiconductor-based electronics (see the Perspective by Schreiber and Bluhm). To showcase the potential, the authors used the gate to create an entangled quantum state called the Bell state.

  6. Stay vane and wicket gate relationship study

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2005-01-19

    This report evaluates potential environmental and performance gains that can be achieved in a Kaplan turbine through non-structural modifications to stay vane and wicket gate assemblies. This summary is based primarily on data and conclusions drawn from models and studies of Lower Granite Dam. Based on this investigation, the study recommends (1) a proof of concept at Lower Granite Dam to establish predicted improvements for the existing turbine and to further refine the stay vane wicket gate designs for fish passage; and (2) consideration of the stay vane wicket gate systems in any future turbine rehabilitation studies.

  7. Gate A: changes to opening hours

    CERN Multimedia

    2015-01-01

    Due to maintenance work, the opening hours of Gate A (near Reception) will be modified between Monday, 13 and Friday, 17 April 2015.   During this period, the gate will be open to vehicles between 7 a.m. and 9.30 a.m., then between 4.30 p.m. and 7 p.m. It will be completely closed to traffic between 9.30 a.m. and 4.30 p.m. Pedestrians and cyclists may continue to use the gate. We apologise for any inconvenience and thank you for your understanding.

  8. Getting started with FortiGate

    CERN Document Server

    Fabbri, Rosato

    2013-01-01

    This book is a step-by-step tutorial that will teach you everything you need to know about the deployment and management of FortiGate, including high availability, complex routing, various kinds of VPN working, user authentication, security rules and controls on applications, and mail and Internet access.This book is intended for network administrators, security managers, and IT pros. It is a great starting point if you have to administer or configure a FortiGate unit, especially if you have no previous experience. For people that have never managed a FortiGate unit, the book helpfully walks t

  9. Effects of Ambient Air and Temperature on Ionic Gel Gated Single-Walled Carbon Nanotube Thin-Film Transistor and Circuits.

    Science.gov (United States)

    Li, Huaping; Zhou, Lili

    2015-10-21

    Single-walled carbon nanotube thin-film transistor (SWCNT TFT) and circuits were fabricated by fully inkjet printing gold nanoparticles as source/drain electrodes, semiconducting SWCNT thin films as channel materials, PS-PMMA-PS/EMIM TFSI composite gel as gate dielectrics, and PEDOT/PSS as gate electrodes. The ionic gel gated SWCNT TFT shows reversible conversion from p-type transistor behavior in air to ambipolar features under vacuum due to reversible oxygen doping in semiconducting SWCNT thin films. The threshold voltages of ionic gel gated SWCNT TFT and inverters are largely shifted to the low value (0.5 V for p-region and 1.0 V for n-region) by vacuum annealing at 140 °C to exhausively remove water that is incorporated in the ionic gel as floating gates. The vacuum annealed ionic gel gated SWCNT TFT shows linear temperature dependent transconductances and threshold voltages for both p- and n-regions. The strong temperature dependent transconductances (0.08 μS/K for p-region, 0.4 μS/K for n-region) indicate their potential application in thermal sensors. In the other hand, the weak temperature dependent threshold voltages (-1.5 mV/K for p-region, -1.1 mV/K for n-region) reflect their excellent thermal stability.

  10. Hydrophobic dielectric surface influenced active layer thickness effect on hysteresis and mobility degradation in organic field effect transistors

    Science.gov (United States)

    Padma, N.

    2016-02-01

    Effect of active layer thickness, influenced by the hydrophobic dielectric surface, on the performance of copper phthalocyanine based organic field effect transistors (OFETs) was studied. While charge carrier mobility was found to be highest for an optimum thickness of 30 nm, hysteresis and threshold voltage shift were found to be minimum for 15 nm thick film which is attributed to the excess availability of photogenerated carriers, especially close to the dielectric/semiconductor interface, as this thickness is within the exciton quenching length in organic semiconductors. But prolonged bias stress resulted in larger decay in drain current for higher thickness indicating the dominant role played by the larger grain boundary density in the increased volume. These results were found to be different from that on unmodified SiO2 dielectric with higher surface energy and were suggested to be caused by the 3D growth mode of CuPc films on the hydrophobic surface. Mobility degradation at higher gate voltages also exhibited a dependence on the active layer thickness which was tuned by the hydrophobic surface induced growth mode at the dielectric/semiconductor interface.

  11. EduGATE - basic examples for educative purpose using the GATE simulation platform.

    Science.gov (United States)

    Pietrzyk, Uwe; Zakhnini, Abdelhamid; Axer, Markus; Sauerzapf, Sophie; Benoit, Didier; Gaens, Michaela

    2013-02-01

    EduGATE is a collection of basic examples to introduce students to the fundamental physical aspects of medical imaging devices. It is based on the GATE platform, which has received a wide acceptance in the field of simulating medical imaging devices including SPECT, PET, CT and also applications in radiation therapy. GATE can be configured by commands, which are, for the sake of simplicity, listed in a collection of one or more macro files to set up phantoms, multiple types of sources, detection device, and acquisition parameters. The aim of the EduGATE is to use all these helpful features of GATE to provide insights into the physics of medical imaging by means of a collection of very basic and simple GATE macros in connection with analysis programs based on ROOT, a framework for data processing. A graphical user interface to define a configuration is also included. Copyright © 2012. Published by Elsevier GmbH.

  12. Mechanosensitive gating of Kv channels.

    Directory of Open Access Journals (Sweden)

    Catherine E Morris

    Full Text Available K-selective voltage-gated channels (Kv are multi-conformation bilayer-embedded proteins whose mechanosensitive (MS Popen(V implies that at least one conformational transition requires the restructuring of the channel-bilayer interface. Unlike Morris and colleagues, who attributed MS-Kv responses to a cooperative V-dependent closed-closed expansion↔compaction transition near the open state, Mackinnon and colleagues invoke expansion during a V-independent closed↔open transition. With increasing membrane tension, they suggest, the closed↔open equilibrium constant, L, can increase >100-fold, thereby taking steady-state Popen from 0→1; "exquisite sensitivity to small…mechanical perturbations", they state, makes a Kv "as much a mechanosensitive…as…a voltage-dependent channel". Devised to explain successive gK(V curves in excised patches where tension spontaneously increased until lysis, their L-based model falters in part because of an overlooked IK feature; with recovery from slow inactivation factored in, their g(V datasets are fully explained by the earlier model (a MS V-dependent closed-closed transition, invariant L≥4. An L-based MS-Kv predicts neither known Kv time courses nor the distinctive MS responses of Kv-ILT. It predicts Kv densities (hence gating charge per V-sensor several-fold different from established values. If opening depended on elevated tension (L-based model, standard gK(V operation would be compromised by animal cells' membrane flaccidity. A MS V-dependent transition is, by contrast, unproblematic on all counts. Since these issues bear directly on recent findings that mechanically-modulated Kv channels subtly tune pain-related excitability in peripheral mechanoreceptor neurons we undertook excitability modeling (evoked action potentials. Kvs with MS V-dependent closed-closed transitions produce nuanced mechanically-modulated excitability whereas an L-based MS-Kv yields extreme, possibly excessive

  13. C-V Test Structures for Metal Gate CMOS

    NARCIS (Netherlands)

    Bankras, R.G.; Tiggelman, M.P.J.; Negara, M. Adi; Sasse, G.T.; Schmitz, Jurriaan

    2006-01-01

    Gate leakage has complicated the layout and measurement of C-V test structures. In this paper the impact of metal gate introduction to C-V test structure design is discussed. The metal gate allows for wider-gate structures and for the application of n+-p+ diffusion edges. We show, both theoretically

  14. Greening the Golden Gate National Recreation Area

    Science.gov (United States)

    The Golden Gate National Recreation Area was recognized a 2016 Federal Green Challenge Award for making significant strides to reduce its carbon footprint with the goal of becoming a carbon neutral park.

  15. Active gated imaging in driver assistance system

    Science.gov (United States)

    Grauer, Yoav

    2014-04-01

    In this paper, we shall present the active gated imaging system (AGIS) in relation to the automotive field. AGIS is based on a fast-gated camera and pulsed illuminator, synchronized in the time domain to record images of a certain range of interest. A dedicated gated CMOS imager sensor and near infra-red (NIR) pulsed laser illuminator, is presented in this paper to provide active gated technology. In recent years, we have developed these key components and learned the system parameters, which are most beneficial to nighttime (in all weather conditions) driving in terms of field of view, illumination profile, resolution, and processing power. We shall present our approach of a camera-based advanced driver assistance systems (ADAS) named BrightEye™, which makes use of the AGIS technology in the automotive field.

  16. Golden Gate and Pt. Reyes Acoustic Detections

    Data.gov (United States)

    National Oceanic and Atmospheric Administration, Department of Commerce — This dataset contains detections of acoustic tagged fish from two general locations: Golden Gate (east and west line) and Pt. Reyes. Several Vemco 69khz acoustic...

  17. Extending Double Optical Gating to the Midinfrared

    Science.gov (United States)

    Gorman, Timothy; Camper, Antoine; Agostini, Pierre; Dimauro, Louis

    2015-05-01

    In the past decade there has been great interest in creating broadband isolated attosecond pulses (IAPs). Primarily these IAPs have been generated using Ti:Sapphire 800nm short pulses, namely through spatiotemporal gating with the attosecond lighthouse technique, amplitude gating, polarization gating, and double optical gating (DOG). Here we present theoretical calculations and experimental investigations into extending DOG to using a 2 μm driving wavelength, the benefits of which include extended harmonic cutoff and longer input driving pulse durations. It is proposed that broadband IAPs with cutoffs extending up to 250 eV can be generated in Argon by using >30 fs pulses from the passively-CEP stabilized 2 μm idler out of an optical parametric amplifier combined with a collinear DOG experimental setup.

  18. Ultrathin gate valve for high vacuum operation

    Science.gov (United States)

    Ugiansky, R. J.

    1971-01-01

    Thin, compact, high-vacuum gate valve used to join two vacuum systems together demonstrates multiple operation reliability. Valve measurements and non-protruding handle make valve usable in confined areas.

  19. 2010 ARRA Lidar: Golden Gate (CA)

    Data.gov (United States)

    National Oceanic and Atmospheric Administration, Department of Commerce — The Golden Gate LiDAR Project is a cooperative project sponsored by the US Geological Survey (USGS) and San Francisco State University (SFSU) that has resulted in...

  20. GATING SYSTEMS FOR PRODUCTION OF HYDRODISTRIBUTORS

    Directory of Open Access Journals (Sweden)

    D. A. Volkov

    2010-01-01

    Full Text Available Gating systems of the first group of special ways of casting into shell molds, casting in lined chill mold as more effective for production of hydrodistributors were developed and studied.

  1. High-Performance Organic Field-Effect Transistors with Dielectric and Active Layers Printed Sequentially by Ultrasonic Spraying

    Energy Technology Data Exchange (ETDEWEB)

    Shao, Ming [ORNL; Sanjib, Das [University of Tennessee, Knoxville (UTK); Chen, Jihua [ORNL; Keum, Jong Kahk [ORNL; Ivanov, Ilia N [ORNL; Gu, Gong [University of Tennessee, Knoxville (UTK); Geohegan, David B [ORNL; Xiao, Kai [ORNL

    2013-01-01

    High-performance, flexible organic field-effect transistors (OFETs) are reported with PVP dielectric and TIPS-PEN active layers sequentially deposited by ultrasonic spray-coating on plastic substrate. OFETs fabricated in ambient air with a bottom-gate/top-contact geometry are shown to achieve on/off ratios of >104 and mobilities as high as 0.35 cm2/Vs. These rival the characteristics of the best solution-processible small molecule FETs fabricated by other fabrication methods such as drop casting and ink-jet printing.

  2. Smart gating membranes with in situ self-assembled responsive nanogels as functional gates

    Science.gov (United States)

    Luo, Feng; Xie, Rui; Liu, Zhuang; Ju, Xiao-Jie; Wang, Wei; Lin, Shuo; Chu, Liang-Yin

    2015-01-01

    Smart gating membranes, inspired by the gating function of ion channels across cell membranes, are artificial membranes composed of non-responsive porous membrane substrates and responsive gates in the membrane pores that are able to dramatically regulate the trans-membrane transport of substances in response to environmental stimuli. Easy fabrication, high flux, significant response and strong mechanical strength are critical for the versatility of such smart gating membranes. Here we show a novel and simple strategy for one-step fabrication of smart gating membranes with three-dimensionally interconnected networks of functional gates, by self-assembling responsive nanogels on membrane pore surfaces in situ during a vapor-induced phase separation process for membrane formation. The smart gating membranes with in situ self-assembled responsive nanogels as functional gates show large flux, significant response and excellent mechanical property simultaneously. Because of the easy fabrication method as well as the concurrent enhancement of flux, response and mechanical property, the proposed smart gating membranes will expand the scope of membrane applications, and provide ever better performances in their applications. PMID:26434387

  3. Crystalline silicotitanate gate review analysis

    International Nuclear Information System (INIS)

    Schlahta, S.N.; Carreon, R.; Gentilucci, J.A.

    1997-11-01

    Crystalline silicotitanate (CST) is an ion-exchange method for removing radioactive cesium from tank waste to allow the separation of the waste into high- and low-level fractions. The CST, originally developed Sandia National Laboratories personnel in association with Union Oil Products Corporation, has both a high affinity and selectivity for sorbing cesium-137 from highly alkaline or acidic solutions. For several years now, the U.S. Department of Energy has funded work to investigate applying CST to large-scale removal of cesium-137 from radioactive tank wastes. In January 1997, an expert panel sponsored by the Tanks Focus Area met to review the current state of the technology and to determine whether it was ready for routine use. The review also sought to identify any technical issues that must be resolved or additional CST development that must occur before full implementation by end-users. The CST Gate Review Group concluded that sufficient work has been done to close developmental work on CST and turn the remaining site-specific tasks over to the users. This report documents the review group''s findings, issues, concerns, and recommendations as well as responses from the Tanks Focus Area expert staff to specific pretreatment and immobilization issues

  4. Range gated strip proximity sensor

    Science.gov (United States)

    McEwan, T.E.

    1996-12-03

    A range gated strip proximity sensor uses one set of sensor electronics and a distributed antenna or strip which extends along the perimeter to be sensed. A micro-power RF transmitter is coupled to the first end of the strip and transmits a sequence of RF pulses on the strip to produce a sensor field along the strip. A receiver is coupled to the second end of the strip, and generates a field reference signal in response to the sequence of pulse on the line combined with received electromagnetic energy from reflections in the field. The sensor signals comprise pulses of radio frequency signals having a duration of less than 10 nanoseconds, and a pulse repetition rate on the order of 1 to 10 MegaHertz or less. The duration of the radio frequency pulses is adjusted to control the range of the sensor. An RF detector feeds a filter capacitor in response to received pulses on the strip line to produce a field reference signal representing the average amplitude of the received pulses. When a received pulse is mixed with a received echo, the mixing causes a fluctuation in the amplitude of the field reference signal, providing a range-limited Doppler type signature of a field disturbance. 6 figs.

  5. Boolean gates on actin filaments

    Science.gov (United States)

    Siccardi, Stefano; Tuszynski, Jack A.; Adamatzky, Andrew

    2016-01-01

    Actin is a globular protein which forms long polar filaments in the eukaryotic cytoskeleton. Actin networks play a key role in cell mechanics and cell motility. They have also been implicated in information transmission and processing, memory and learning in neuronal cells. The actin filaments have been shown to support propagation of voltage pulses. Here we apply a coupled nonlinear transmission line model of actin filaments to study interactions between voltage pulses. To represent digital information we assign a logical TRUTH value to the presence of a voltage pulse in a given location of the actin filament, and FALSE to the pulse's absence, so that information flows along the filament with pulse transmission. When two pulses, representing Boolean values of input variables, interact, then they can facilitate or inhibit further propagation of each other. We explore this phenomenon to construct Boolean logical gates and a one-bit half-adder with interacting voltage pulses. We discuss implications of these findings on cellular process and technological applications.

  6. A simple method for reducing inevitable dielectric loss in high-permittivity dielectric elastomers

    DEFF Research Database (Denmark)

    Madsen, Frederikke Bahrt; Yu, Liyun; Mazurek, Piotr Stanislaw

    2016-01-01

    Commercial viability of dielectric elastomers (DEs) is currently limited by a few obstacles, including high driving voltages (in the kV range). Driving voltage can be lowered by either decreasing the Young's modulus or increasing the dielectric permittivity of silicone elastomers, or a combination...... thereof. A decrease in the Young's modulus, however, is often accompanied by a loss in mechanical stability, whereas increases in dielectric permittivity are usually followed by a large increase in dielectric loss followed by a decrease in breakdown strength and thereby the lifetime of the DE. A new soft...... elastomer matrix, with high dielectric permittivity and a low Young's modulus, aligned with no loss of mechanical stability, was prepared through the use of commercially available chloropropyl-functional silicone oil mixed into a tough commercial liquid silicone rubber silicone elastomer. The addition...

  7. Radiation Characteristics Enhancement of Dielectric Resonator Antenna Using Solid/Discrete Dielectric Lenses

    Directory of Open Access Journals (Sweden)

    H. A. E. Malhat

    2015-02-01

    Full Text Available The radiation characteristics of the dielectric resonator antennas (DRA is enhanced using different types of solid and discrete dielectric lenses. One of these approaches is by loading the DRA with planar superstrate, spherical lens, or by discrete lens (transmitarray. The dimensions and dielectric constant of each lens are optimized to maximize the gain of the DRA. A comparison between the radiations characteristics of the DRA loaded with different lenses are introduced. The design of the dielectric transmitarray depends on optimizing the heights of the dielectric material of the unit cell. The optimized transmitarray achieves 7 dBi extra gain over the single DRA with preserving the circular polarization. The proposed antenna is suitable for various applications that need high gain and focused antenna beam.

  8. On the reduction of direct tunneling leakage through ultrathin gate oxides by a one-dimensional Schrödinger-Poisson solver

    Science.gov (United States)

    Cassan, Eric

    2000-06-01

    A full self-consistent one-dimensional Schrödinger-Poisson model is reported in this article, which is specifically dedicated to the study of direct tunneling current through ultrathin gate oxide of metal-oxide-semiconductor (MOS) structures. The gate current is obtained by estimating the quasibound state lifetimes within the formalism of the formal reflection delay time of wave packets using the transfer-matrix method. As an alternative design to conventional MOS structures, two strategies are investigated in this work to scale oxide thickness in the sub 1.5 nm range while keeping an acceptable gate current leakage of some A/cm2. These include nitride/oxide stacked gate dielectrics used to increase the insulator thickness, and heterostructure MOS capacitors to confine electrons in a buried quantum well. Tensile strained Si1-yCy/Si and Si/Si1-xGex heterostructures that provide a convenient conduction band offset are proposed in this order. A conduction band offset of 0.19 eV is shown to yield nearly the same but limited improvement than the stacked gate dielectrics structure. Compared with the conventional MOS device of equivalent oxide thickness, a gate current reduction by more than two orders of magnitude is reached by using a heterostructure with a conduction band offset of 0.31 eV. For MOS transistor application this significant gain may be in addition to the driving current increase that can be expected from the strain-induced improvement of electron transport properties.

  9. Induced Cavities for Photonic Quantum Gates

    Science.gov (United States)

    Lahad, Ohr; Firstenberg, Ofer

    2017-09-01

    Effective cavities can be optically induced in atomic media and employed to strengthen optical nonlinearities. Here we study the integration of induced cavities with a photonic quantum gate based on Rydberg blockade. Accounting for loss in the atomic medium, we calculate the corresponding finesse and gate infidelity. Our analysis shows that the conventional limits imposed by the blockade optical depth are mitigated by the induced cavity in long media, thus establishing the total optical depth of the medium as a complementary resource.

  10. Entanglement and Quantum Logical Gates. Part I.

    Science.gov (United States)

    Freytes, H.; Giuntini, R.; Leporini, R.; Sergioli, G.

    2015-12-01

    Is it possible to give a logical characterization of entanglement and of entanglement-measures in terms of the probabilistic behavior of some gates? This question admits different (positive or negative) answers in the case of different systems of gates and in the case of different classes of density operators. In the first part of this article we investigate possible relations between entanglement-measures and the probabilistic behavior of quantum computational conjunctions.

  11. Dual-gated volumetric modulated arc therapy

    International Nuclear Information System (INIS)

    Fahimian, Benjamin; Wu, Junqing; Wu, Huanmei; Geneser, Sarah; Xing, Lei

    2014-01-01

    Gated Volumetric Modulated Arc Therapy (VMAT) is an emerging radiation therapy modality for treatment of tumors affected by respiratory motion. However, gating significantly prolongs the treatment time, as delivery is only activated during a single respiratory phase. To enhance the efficiency of gated VMAT delivery, a novel dual-gated VMAT (DG-VMAT) technique, in which delivery is executed at both exhale and inhale phases in a given arc rotation, is developed and experimentally evaluated. Arc delivery at two phases is realized by sequentially interleaving control points consisting of MUs, MLC sequences, and angles of VMAT plans generated at the exhale and inhale phases. Dual-gated delivery is initiated when a respiration gating signal enters the exhale window; when the exhale delivery concludes, the beam turns off and the gantry rolls back to the starting position for the inhale window. The process is then repeated until both inhale and exhale arcs are fully delivered. DG-VMAT plan delivery accuracy was assessed using a pinpoint chamber and diode array phantom undergoing programmed motion. DG-VMAT delivery was experimentally implemented through custom XML scripting in Varian’s TrueBeam™ STx Developer Mode. Relative to single gated delivery at exhale, the treatment time was improved by 95.5% for a sinusoidal breathing pattern. The pinpoint chamber dose measurement agreed with the calculated dose within 0.7%. For the DG-VMAT delivery, 97.5% of the diode array measurements passed the 3%/3 mm gamma criterion. The feasibility of DG-VMAT delivery scheme has been experimentally demonstrated for the first time. By leveraging the stability and natural pauses that occur at end-inspiration and end-exhalation, DG-VMAT provides a practical method for enhancing gated delivery efficiency by up to a factor of two

  12. Dielectric effect on electric fields in the vicinity of the metal–vacuum–dielectric junction

    International Nuclear Information System (INIS)

    Chung, M.S.; Mayer, A.; Miskovsky, N.M.; Weiss, B.L.; Cutler, P.H.

    2013-01-01

    The dielectric effect was theoretically investigated in order to describe the electric field in the vicinity of a junction of a metal, dielectric, and vacuum. The assumption of two-dimensional symmetry of the junction leads to a simple analytic form and to a systematic numerical calculation for the field. The electric field obtained for the triple junction was found to be enhanced or reduced according to a certain criterion determined by the contact angles and dielectric constant. Further numerical calculations of the dielectric effect show that an electric field can experience a larger enhancement or reduction for a quadruple junction than that achieved for the triple junction. It was also found that even though it changes slowly in comparison with the shape effect, the dielectric effect was noticeably large over the entire range of the shape change. - Highlights: ► This work explains how a very strong electric field can be produced due to the dielectric in the vicinity of metal–dielectric contact. ► This work deals with configurations which enhance electric fields using the dielectric effect. The configuration is a type of junction at which metal, vacuum and dielectric meet. ► This work suggests the criterion to determine whether field enhancement occurs or not in the triple junction of metal, vacuum and dielectric. ► This work suggests that a quadruple junction is more effective in enhancing the electric field than a triple junction. The quadruple junction is formed by an additional vacuum portion to the triple junction. ► This work suggests that a triple junction can be a breakthrough candidate for a cold electron source

  13. Cognitive mechanisms associated with auditory sensory gating.

    Science.gov (United States)

    Jones, L A; Hills, P J; Dick, K M; Jones, S P; Bright, P

    2016-02-01

    Sensory gating is a neurophysiological measure of inhibition that is characterised by a reduction in the P50 event-related potential to a repeated identical stimulus. The objective of this work was to determine the cognitive mechanisms that relate to the neurological phenomenon of auditory sensory gating. Sixty participants underwent a battery of 10 cognitive tasks, including qualitatively different measures of attentional inhibition, working memory, and fluid intelligence. Participants additionally completed a paired-stimulus paradigm as a measure of auditory sensory gating. A correlational analysis revealed that several tasks correlated significantly with sensory gating. However once fluid intelligence and working memory were accounted for, only a measure of latent inhibition and accuracy scores on the continuous performance task showed significant sensitivity to sensory gating. We conclude that sensory gating reflects the identification of goal-irrelevant information at the encoding (input) stage and the subsequent ability to selectively attend to goal-relevant information based on that previous identification. Copyright © 2015 The Authors. Published by Elsevier Inc. All rights reserved.

  14. Sensory gating deficits in parents of schizophrenics

    Energy Technology Data Exchange (ETDEWEB)

    Waldo, M.; Madison, A.; Freedman, R. [Univ. of Colorado Health Sciences Center, Denver, CO (United States)] [and others

    1995-12-18

    Although schizophrenia clusters in families, it is not inherited in Mendelian fashion. This suggests that there may be alternative phenotypic expressions of genes that convey risk for schizophrenia, such as more elementary physiological or biochemical defects. One proposed phenotype is impaired inhibitory gating of the auditory evoked potential to repeated stimuli. Normally, the amplitude of the P50 response to the second stimulus is significantly less than the response to the first, but this gating of response is generally impaired in schizophrenia. Clinically unaffected individuals within a pedigree who have both an ancestral and descendant history of schizophrenia may be useful for studying whether this physiological defect is a possible alternative phenotype. We have studied inhibitory gating of the auditory P50 response to pairs of auditory stimuli in 17 nuclear families. In 11, there was one parent who had another relative with a chronic psychotic illness, in addition to the schizophrenic proband. AR of the parents with family histories of schizophrenia had gating of the P50 response similar to their schizophrenia offspring, whereas only 7% of the parents without family history had gating of the P50 response in the abnormal range. These results support loss of gating of the auditory P50 wave as an inherited deficit related to schizophrenia and suggest that studies of parents may help elucidate the neurobiological expression of genes that convey risk for schizophrenia. 36 refs., 2 figs., 2 tabs.

  15. VKCDB: Voltage-gated potassium channel database

    Directory of Open Access Journals (Sweden)

    Gallin Warren J

    2004-01-01

    Full Text Available Abstract Background The family of voltage-gated potassium channels comprises a functionally diverse group of membrane proteins. They help maintain and regulate the potassium ion-based component of the membrane potential and are thus central to many critical physiological processes. VKCDB (Voltage-gated potassium [K] Channel DataBase is a database of structural and functional data on these channels. It is designed as a resource for research on the molecular basis of voltage-gated potassium channel function. Description Voltage-gated potassium channel sequences were identified by using BLASTP to search GENBANK and SWISSPROT. Annotations for all voltage-gated potassium channels were selectively parsed and integrated into VKCDB. Electrophysiological and pharmacological data for the channels were collected from published journal articles. Transmembrane domain predictions by TMHMM and PHD are included for each VKCDB entry. Multiple sequence alignments of conserved domains of channels of the four Kv families and the KCNQ family are also included. Currently VKCDB contains 346 channel entries. It can be browsed and searched using a set of functionally relevant categories. Protein sequences can also be searched using a local BLAST engine. Conclusions VKCDB is a resource for comparative studies of voltage-gated potassium channels. The methods used to construct VKCDB are general; they can be used to create specialized databases for other protein families. VKCDB is accessible at http://vkcdb.biology.ualberta.ca.

  16. Selective Dielectric Metasurfaces Based on Directional Conditions of Silicon Nanopillars.

    Science.gov (United States)

    Algorri, José Francisco; García-Cámara, Braulio; Cuadrado, Alexander; Sánchez-Pena, José Manuel; Vergaz, Ricardo

    2017-07-07

    Dielectric metasurfaces based on high refractive index materials have been proposed recently. This type of structure has several advantages over their metallic counterparts. In this work, we demonstrate that dielectric metasurfaces can be theoretically designed satisfying Kerker's zero-forward condition. This is the first time that a dielectric metasurface based on this principle has been designed. A selective dielectric metasurface of silicon nanopillars is designed to work at 632.8 nm. This structure could work both as a dielectric mirror and a reject band filter. Furthermore, by scaling up the structure, it could be possible to manufacture a terahertz (THz) dielectric mirror.

  17. Material parameters from frequency dispersion simulation of floating gate memory with Ge nanocrystals in HfO2

    Science.gov (United States)

    Palade, C.; Lepadatu, A. M.; Slav, A.; Lazanu, S.; Teodorescu, V. S.; Stoica, T.; Ciurea, M. L.

    2018-01-01

    Trilayer memory capacitors with Ge nanocrystals (NCs) floating gate in HfO2 were obtained by magnetron sputtering deposition on p-type Si substrate followed by rapid thermal annealing at relatively low temperature of 600 °C. The frequency dispersion of capacitance and resistance was measured in accumulation regime of Al/HfO2 gate oxide/Ge NCs in HfO2 floating gate/HfO2 tunnel oxide/SiOx/p-Si/Al memory capacitors. For simulation of the frequency dispersion a complex circuit model was used considering an equivalent parallel RC circuit for each layer of the trilayer structure. A series resistance due to metallic contacts and Si substrate was necessary to be included in the model. A very good fit to the experimental data was obtained and the parameters of each layer in the memory capacitor, i.e. capacitances and resistances were determined and in turn the intrinsic material parameters, i.e. dielectric constants and resistivities of layers were evaluated. The results are very important for the study and optimization of the hysteresis behaviour of floating gate memories based on NCs embedded in oxide.

  18. Magnetoresistance of a Low-k Dielectric

    Science.gov (United States)

    McGowan, Brian Thomas

    Low-k dielectrics have been incorporated into advanced computer chip technologies as a part of the continuous effort to improve computer chip performance. One drawback associated with the implementation of low-k dielectrics is the large leakage current which conducts through the material, relative to silica. Another drawback is that the breakdown voltage of low-k dielectrics is low, relative to silica [1]. This low breakdown voltage makes accurate reliability assessment of the failure mode time dependent dielectric breakdown (TDDB) in low-k dielectrics critical for the successful implementation of these materials. The accuracy with which one can assess this reliability is currently a topic of debate. These material drawbacks have motivated the present work which aims both to contribute to the understanding of electronic conduction mechanisms in low-k dielectrics, and to improve the ability to experimentally characterize changes which occur within the material prior to TDDB failure. What follows is a study of the influence of an applied magnetic field on the conductivity of a low-k dielectric, or in other words, a study of the material's magnetoresistance. This study shows that low-k dielectrics used as intra-level dielectrics exhibit a relatively large negative magnetoresistance effect (˜2%) at room temperature and with modest applied magnetic fields (˜100 Oe). The magnetoresistance is attributed to the spin dependence of trapping electrons from the conduction band into localized electronic sites. Mixing of two-electron spin states via interactions between electron spins and the the spins of hydrogen nuclei is suppressed by an applied magnetic field. As a result, the rate of trapping is reduced, and the conductivity of the material increases. This study further demonstrates that the magnitude of the magnetoresistance changes as a function of time subjected to electrical bias and temperature stress. The rate that the magnetoresistance changes correlates to the

  19. A comparison of the 60Co gamma radiation hardness, breakdown characteristics and the effect of SiNx capping on InAlN and AlGaN HEMTs for space applications

    International Nuclear Information System (INIS)

    Smith, M D; Parbrook, P J; O’Mahony, D; Vitobello, F; Muschitiello, M; Costantino, A; Barnes, A R

    2016-01-01

    Electrical performance and stability of InAlN and AlGaN high electron mobility transistors (HEMTs) subjected 9.1 mrad of 60 Co gamma radiation and off-state voltage step-stressing until breakdown are reported. Comparison with commercially available production-level AlGaN HEMT devices, which showed negligible drift in DC performance throughout all experiments, suggests degradation mechanisms must be managed and suppressed through development of advanced epitaxial and surface passivation techniques in order to fully exploit the robustness of the III-nitride material system. Of the research level devices without dielectric layer surface capping, InAlN HEMTs exhibited the greater stability compared with AlGaN under off-state bias stressing and gamma irradiation in terms of their DC characteristics, although AlGaN HEMTs had significantly higher breakdown voltages. The effect of plasma-enhanced chemical vapour deposition SiN x surface capping is explored, highlighting the sensitivity of InAlN HEMT performance to surface passivation techniques. InAlN–SiN x HEMTs suffered more from trap related degradation than AlGaN–SiN x devices in terms of radiation hardness and step-stress characteristics, attributed to an increased capturing of carriers in traps at the InAlN/SiN x interface. (paper)

  20. Accelerating Dielectrics Design Using Thinking Machines

    Science.gov (United States)

    Ramprasad, R.

    2013-03-01

    High energy density capacitors are required for several pulsed power and energy storage applications, including food preservation, nuclear test simulations, electric propulsion of ships and hybrid electric vehicles. The maximum electrostatic energy that can be stored in a capacitor dielectric is proportional to its dielectric constant and the square of its breakdown field. The current standard material for capacitive energy storage is polypropylene which has a large breakdown field but low dielectric constant. We are involved in a search for new classes of polymers superior to polypropylene using first principles computations combined with statistical and machine learning methods. Essential to this search are schemes to efficiently compute the dielectric constant of polymers and the intrinsic dielectric breakdown field, as well as methods to determine the stable structures of new classes of polymers and strategies to efficiently navigate through the polymer chemical space offered by the periodic table. These methodologies have been combined with statistical learning paradigms in order to make property predictions rapidly, and promising classes of polymeric systems for energy storage applications have been identified. This work is being supported by the Office of Naval Research.

  1. Effect of titanium oxide–polystyrene nanocomposite dielectrics on morphology and thin film transistor performance for organic and polymeric semiconductors

    International Nuclear Information System (INIS)

    Della Pelle, Andrea M.; Maliakal, Ashok; Sidorenko, Alexander; Thayumanavan, S.

    2012-01-01

    Previous studies have shown that organic thin film transistors with pentacene deposited on gate dielectrics composed of a blend of high K titanium oxide–polystyrene core–shell nanocomposite (TiO 2 –PS) with polystyrene (PS) perform with an order of magnitude increase in saturation mobility for TiO 2 –PS (K = 8) as compared to PS devices (K = 2.5). The current study finds that this performance enhancement can be translated to alternative small single crystal organics such as α-sexithiophene (α-6T) (enhancement factor for field effect mobility ranging from 30-100× higher on TiO 2 –PS/PS blended dielectrics as compared to homogenous PS dielectrics). Interestingly however, in the case of semicrystalline polymers such as (poly-3-hexylthiophene) P3HT, this dramatic enhancement is not observed, possibly due to the difference in processing conditions used to fabricate these devices (film transfer as opposed to thermal evaporation). The morphology for α-sexithiophene (α-6T) grown by thermal evaporation on TiO 2 –PS/PS blended dielectrics parallels that observed in pentacene devices. Smaller grain size is observed for films grown on dielectrics with higher TiO 2 –PS content. In the case of poly(3-hexylthiophene) (P3HT) devices, constructed via film transfer, morphological differences exist for the P3HT on different substrates, as discerned by atomic force microscopy studies. However, these devices only exhibit a modest (2×) increase in mobility with increasing TiO 2 –PS content in the films. After annealing of the transferred P3HT thin film transistor (TFT) devices, no appreciable enhancement in mobility is observed across the different blended dielectrics. Overall the results support the hypothesis that nucleation rate is responsible for changes in film morphology and device performance in thermally evaporated small molecule crystalline organic semiconductor TFTs. The increased nucleation rate produces organic polycrystalline films with small grain

  2. On equilibrium charge distribution above dielectric surface

    Directory of Open Access Journals (Sweden)

    Yu.V. Slyusarenko

    2009-01-01

    Full Text Available The problem of the equilibrium state of the charged many-particle system above dielectric surface is formulated. We consider the case of the presence of the external attractive pressing field and the case of its absence. The equilibrium distributions of charges and the electric field, which is generated by these charges in the system in the case of ideally plane dielectric surface, are obtained. The solution of electrostatic equations of the system under consideration in case of small spatial heterogeneities caused by the dielectric surface, is also obtained. These spatial inhomogeneities can be caused both by the inhomogeneities of the surface and by the inhomogeneous charge distribution upon it. In particular, the case of the "wavy" spatially periodic surface is considered taking into account the possible presence of the surface charges.

  3. Studies on metal-dielectric plasmonic structures.

    Energy Technology Data Exchange (ETDEWEB)

    Chettiar, Uday K. (Purdue University, West Lafayette, IN); Liu, Zhengtong (Purdue University, West Lafayette, IN); Thoreson, Mark D. (Purdue University, West Lafayette, IN); Shalaev, Vladimir M. (Purdue University, West Lafayette, IN); Drachev, Vladimir P. (Purdue University, West Lafayette, IN); Pack, Michael Vern; Kildishev, Alexander V. (Purdue University, West Lafayette, IN); Nyga, Piotr (Purdue University, West Lafayette, IN)

    2010-01-01

    The interaction of light with nanostructured metal leads to a number of fascinating phenomena, including plasmon oscillations that can be harnessed for a variety of cutting-edge applications. Plasmon oscillation modes are the collective oscillation of free electrons in metals under incident light. Previously, surface plasmon modes have been used for communication, sensing, nonlinear optics and novel physics studies. In this report, we describe the scientific research completed on metal-dielectric plasmonic films accomplished during a multi-year Purdue Excellence in Science and Engineering Graduate Fellowship sponsored by Sandia National Laboratories. A variety of plasmonic structures, from random 2D metal-dielectric films to 3D composite metal-dielectric films, have been studied in this research for applications such as surface-enhanced Raman sensing, tunable superlenses with resolutions beyond the diffraction limit, enhanced molecular absorption, infrared obscurants, and other real-world applications.

  4. High field dielectric properties of piezoelectric materials

    Energy Technology Data Exchange (ETDEWEB)

    Stewart, M.; Cain, M

    1999-05-01

    These guidelines are intended to enable a user to perform high field dielectric measurements on piezoelectric ceramic materials such as PZT (lead zirconium titanate). Many of the properties of piezoelectric ceramics such as PZT are highly dependant on the applied field, and therefore to make intelligent design choices, the dielectric properties are required at these field levels. These guidelines cover measurements at a fixed frequency of 1 kHz, to enable comparison with measurements made at low field. The measurement methods could all safely be extended from line frequency up to several tens of kHz, to cover a broad range of applications. However, for frequencies in the MHz range and above different factors need to be considered which are not covered in this guide. The guidelines give some general advice on high field dielectric measurements followed by a detailed description of three different measurement methods:Schering bridge; impedance analysis; and PE hysteresis loop methods. (author)

  5. Impedance Spectroscopy of Dielectrics and Electronic Conductors

    DEFF Research Database (Denmark)

    Bonanos, Nikolaos; Pissis, Polycarpos; Macdonald, J. Ross

    2013-01-01

    Impedance spectroscopy is used for the characterization of materials, such as electroceramics, solid and liquid electrochemical cells, dielectrics and also fully integrated devices, such as fuel cells. It consists of measuring the electrical impedance - or a closely related property, such as admi......Impedance spectroscopy is used for the characterization of materials, such as electroceramics, solid and liquid electrochemical cells, dielectrics and also fully integrated devices, such as fuel cells. It consists of measuring the electrical impedance - or a closely related property......, and procedures for the correction of measurement errors. The applications of impedance spectroscopy are illustrated with examples from electroceramics and polymer-based dielectric systems. The way in which the technique is applied to the two classes of materials is compared with reference to the different models...

  6. Gallium arsenide processing for gate array logic

    Science.gov (United States)

    Cole, Eric D.

    1989-01-01

    The development of a reliable and reproducible GaAs process was initiated for applications in gate array logic. Gallium Arsenide is an extremely important material for high speed electronic applications in both digital and analog circuits since its electron mobility is 3 to 5 times that of silicon, this allows for faster switching times for devices fabricated with it. Unfortunately GaAs is an extremely difficult material to process with respect to silicon and since it includes the arsenic component GaAs can be quite dangerous (toxic) especially during some heating steps. The first stage of the research was directed at developing a simple process to produce GaAs MESFETs. The MESFET (MEtal Semiconductor Field Effect Transistor) is the most useful, practical and simple active device which can be fabricated in GaAs. It utilizes an ohmic source and drain contact separated by a Schottky gate. The gate width is typically a few microns. Several process steps were required to produce a good working device including ion implantation, photolithography, thermal annealing, and metal deposition. A process was designed to reduce the total number of steps to a minimum so as to reduce possible errors. The first run produced no good devices. The problem occurred during an aluminum etch step while defining the gate contacts. It was found that the chemical etchant attacked the GaAs causing trenching and subsequent severing of the active gate region from the rest of the device. Thus all devices appeared as open circuits. This problem is being corrected and since it was the last step in the process correction should be successful. The second planned stage involves the circuit assembly of the discrete MESFETs into logic gates for test and analysis. Finally the third stage is to incorporate the designed process with the tested circuit in a layout that would produce the gate array as a GaAs integrated circuit.

  7. Temperature dependent Dielectric studies of Poly(Ethylene Oxide)

    Science.gov (United States)

    Shiva Kumar, B. P.; Gurumurthy, T. M.; Praveen, D.

    2018-02-01

    Polymers are known to be better materials for dielectric applications. Various polymers with different molecular weights are being studied for dielectric applications. In the present paper, we report the dielectric measurements of Poly(Ethylene Oxide) {PEO} using Impedance spectroscopy studies. The dielectric studies of PEO were carried out on pellets as a function of temperature. It was found that the dielectric constant seems to be negligibly varying with increase in temperature at high frequencies, however, at low frequencies, dielectric constant varies increases with temperature. This may be due to the fact that with the thermal energy provided to the system, more and more dipoles participate and hence the net dielectric constant of the material is also higher at higher temperature. Also at very high frequencies, due to many non-responsive dipoles for fast switching of the applied signal, net dielectric constant of the material also does vary much with temperatures.

  8. Doctoral Research in Wavelet NDE and Novel Dielectrics

    National Research Council Canada - National Science Library

    DeFacio, Brian

    1999-01-01

    .... The wavelet studies were directed toward nondestructive evaluation using ultrasonic waves. The novel dielectrics were mainly the PBGS, photonic band structures-periodic arrays of a dielectric with permittivity e...

  9. Method for fabrication of crack-free ceramic dielectric films

    Energy Technology Data Exchange (ETDEWEB)

    Ma, Beihai; Narayanan, Manoj; Balachandran, Uthamalingam; Chao, Sheng; Liu, Shanshan

    2017-12-05

    The invention provides a process for forming crack-free dielectric films on a substrate. The process comprises the application of a dielectric precursor layer of a thickness from about 0.3 .mu.m to about 1.0 .mu.m to a substrate. The deposition is followed by low temperature heat pretreatment, prepyrolysis, pyrolysis and crystallization step for each layer. The deposition, heat pretreatment, prepyrolysis, pyrolysis and crystallization are repeated until the dielectric film forms an overall thickness of from about 1.5 .mu.m to about 20.0 .mu.m and providing a final crystallization treatment to form a thick dielectric film. The process provides a thick crack-free dielectric film on a substrate, the dielectric forming a dense thick crack-free dielectric having an overall dielectric thickness of from about 1.5 .mu.m to about 20.0 .mu.m.

  10. New calibration algorithms for dielectric-based microwave moisture sensors

    Science.gov (United States)

    New calibration algorithms for determining moisture content in granular and particulate materials from measurement of the dielectric properties at a single microwave frequency are proposed. The algorithms are based on identifying empirically correlations between the dielectric properties and the par...

  11. Dielectric loss against piezoelectric power harvesting

    International Nuclear Information System (INIS)

    Liang, Junrui; Shu-Hung Chung, Henry; Liao, Wei-Hsin

    2014-01-01

    Piezoelectricity is one of the most popular electromechanical transduction mechanisms for constructing kinetic energy harvesting systems. When a standard energy harvesting (SEH) interface circuit, i.e., bridge rectifier plus filter capacitor, is utilized for collecting piezoelectric power, the previous literature showed that the power conversion can be well predicted without much consideration for the effect of dielectric loss. Yet, as the conversion power gets higher by adopting power-boosting interface circuits, such as synchronized switch harvesting on inductor (SSHI), the neglect of dielectric loss might give rise to deviation in harvested power estimation. Given the continuous progress on power-boosting interface circuits, the role of dielectric loss in practical piezoelectric energy harvesting (PEH) systems should receive attention with better evaluation. Based on the integrated equivalent impedance network model, this fast track communication provides a comprehensive study on the susceptibility of harvested power in PEH systems under different conditions. It shows that, dielectric loss always counteracts piezoelectric power harvesting by causing charge leakage across piezoelectric capacitance. In particular, taking corresponding ideal lossless cases as references, the counteractive effect might be aggravated under one of the five conditions: larger dielectric loss tangent, lower vibration frequency, further away from resonance, weaker electromechanical coupling, or using power-boosting interface circuit. These relationships are valuable for the study of PEH systems, as they not only help explain the role of dielectric loss in piezoelectric power harvesting, but also add complementary insights for material, structure, excitation, and circuit considerations towards holistic evaluation and design for practical PEH systems. (fast track communications)

  12. Dielectric barrier discharge image processing by Photoshop

    Science.gov (United States)

    Dong, Lifang; Li, Xuechen; Yin, Zengqian; Zhang, Qingli

    2001-09-01

    In this paper, the filamentary pattern of dielectric barrier discharge has been processed by using Photoshop, the coordinates of each filament can also be obtained. By using Photoshop two different ways have been used to analyze the spatial order of the pattern formation in dielectric barrier discharge. The results show that the distance of the neighbor filaments at U equals 14 kV and d equals 0.9 mm is about 1.8 mm. In the scope of the experimental error, the results from the two different methods are similar.

  13. Mie scattering by a charged dielectric particle.

    Science.gov (United States)

    Heinisch, R L; Bronold, F X; Fehske, H

    2012-12-14

    We study for a dielectric particle the effect of surplus electrons on the anomalous scattering of light arising from the transverse optical phonon resonance in the particle's dielectric function. Excess electrons affect the polarizability of the particle by their phonon-limited conductivity, either in a surface layer (negative electron affinity) or the conduction band (positive electron affinity). We show that surplus electrons shift an extinction resonance in the infrared. This offers an optical way to measure the charge of the particle and to use it in a plasma as a minimally invasive electric probe.

  14. Gold nanoparticles extraction from dielectric scattering background

    Science.gov (United States)

    Hong, Xin; Wang, Jingxin

    2014-11-01

    The unique advantages such as brightness, non-photobleaching, good bio-compatibility make gold nanoparticles desirable labels and play important roles in biotech and related research and applications. Distinguishing gold nanoparticles from other dielectric scattering particles is of more importance, especially in bio-tracing and imaging. The enhancement image results from the localized surface plasmon resonance associated with gold nanopartilces makes themselves distinguishable from other dielectric particles, based on which, we propose a dual-wavelength detection method by employing a high sensitive cross-polarization microscopy.

  15. Optical dielectric function of intrinsic amorphous silicon

    International Nuclear Information System (INIS)

    Ching, W.Y.; Lin, C.C.

    1978-01-01

    The imaginary part of the optical dielectric function epsilon 2 (ω) has been calculated using a continuous-random-tetrahedral network as the structural model for the atomic positions. Here the electronic energies and wave functions are determined by first-principles calculations with the method of linear combinations of atomic orbitals (LCAO), and the momentum matrix elements are evaluated directly from the LCAO wave functions. The calculated dielectric function is in good overall agreement with experiment. At energies within 1 eV above the threshold, the epsilon 2 curve shows some structures that are due to interband transitions between the localized states near the band gap

  16. Multipactor experiment on a dielectric surface

    Science.gov (United States)

    Anderson, Rex Beach, III

    2001-12-01

    Multipactor is an electron multiplication process, or electron avalanche, that occurs on metallic and dielectric surfaces in the presence of rf microwave fields. Just as a rock avalanche only needs one rock to cause a larger slide of destruction, one electron under multipactor conditions can cause a tremendous amount of damage to electrical components. Multipactor is a nuisance that can cause excessive noise in communication satellites and radar, and damage to vacuum windows in particle accelerators. Single-surface multipactor on dielectrics is responsible for poor transmission properties of vacuum windows and can eventually lead to vacuum window failure. The repercussions of multipactor affect a wide range of people. For example, a civilian placing a call on a cell phone, or a captain dependent on radar for his ship's safety could both be affected by multipactor. In order to combat this expensive annoyance, a unique experiment to investigate single-surface multipactor on a dielectric surface was developed and tested. The motivation of this thesis is to introduce a novel experiment for multipactor that is designed to verify theoretical calculations and explore the physics behind the phenomenon. The compact apparatus consists of a small brass microwave cavity in a high vacuum system. Most single-surface multipactor experiments consist of a large resonant ring wave guide with a MW power supply. This experiment is the first to utilize a high Q resonant cavity and kW-level power supply to create multipactor on a dielectric surface. The small brass resonant cavity has an inner length of 9.154 cm with an inner diameter of 9.045 cm. A pulsed, variable frequency microwave source at ˜2.4 GHz, 2 kW peak excites the TE111 mode with a strong electric field parallel to a dielectric plate (˜0.2 cm thickness) that is inserted at the mid-plane of the cavity. The microwave pulses from the power supply are monitored by calibrated microwave diodes. These calibrated diodes along

  17. Dielectric insulation and high-voltage issues

    CERN Document Server

    Tommasini, D

    2010-01-01

    Electrical faults are in most cases dramatic events for magnets, due to the large stored energy which is potentially available to be dissipated at the fault location. After a reminder of the principles of electrostatics in Section 1, the basic mechanisms of conduction and breakdown in dielectrics are summarized in Section 2. Section 3 introduces the types and function of the electrical insulation in magnets, and Section 4 its relevant failure mechanisms. Section 5 deals with ageing and, finally, Section 6 gives some principles for testing. Though the School specifically dealt with warm magnets, for completeness some principles of dielectric insulation for superconducting accelerator magnets are briefly summarized in a dedicated appendix.

  18. The dielectric function of condensed systems

    CERN Document Server

    Keldysh, LV; Kirzhnitz, DA

    1989-01-01

    Much progress has been made in the understanding of the general properties of the dielectric function and in the calculation of this quantity for many classes of media. This volume gathers together the considerable information available and presents a detailed overview of the present status of the theory of electromagnetic response functions, whilst simultaneously covering a wide range of problems in its application to condensed matter physics.The following subjects are covered:- the dielectric function of the homogeneous electron gas, of crystalline systems, and of inh

  19. Dielectric Engineered Tunnel Field-Effect Transistor

    OpenAIRE

    Ilatikhameneh, Hesameddin; Ameen, Tarek A.; Klimeck, Gerhard; Appenzeller, Joerg; Rahman, Rajib

    2015-01-01

    The dielectric engineered tunnel field-effect transistor (DE-TFET) as a high performance steep transistor is proposed. In this device, a combination of high-k and low-k dielectrics results in a high electric field at the tunnel junction. As a result a record ON-current of about 1000 uA/um and a subthreshold swing (SS) below 20mV/dec are predicted for WTe2 DE-TFET. The proposed TFET works based on a homojunction channel and electrically doped contacts both of which are immune to interface stat...

  20. A realistic 3-D gated cardiac phantom for quality control of gated myocardial perfusion SPET: the Amsterdam gated (AGATE) cardiac phantom

    NARCIS (Netherlands)

    Visser, Jacco J. N.; Sokole, Ellinor Busemann; Verberne, Hein J.; Habraken, Jan B. A.; van de Stadt, Huybert J. F.; Jaspers, Joris E. N.; Shehata, Morgan; Heeman, Paul M.; van Eck-Smit, Berthe L. F.

    2004-01-01

    A realistic 3-D gated cardiac phantom with known left ventricular (LV) volumes and ejection fractions (EFs) was produced to evaluate quantitative measurements obtained from gated myocardial single-photon emission tomography (SPET). The 3-D gated cardiac phantom was designed and constructed to fit

  1. Palladium gates for reproducible quantum dots in silicon.

    Science.gov (United States)

    Brauns, Matthias; Amitonov, Sergey V; Spruijtenburg, Paul-Christiaan; Zwanenburg, Floris A

    2018-04-09

    We replace the established aluminium gates for the formation of quantum dots in silicon with gates made from palladium. We study the morphology of both aluminium and palladium gates with transmission electron microscopy. The native aluminium oxide is found to be formed all around the aluminium gates, which could lead to the formation of unintentional dots. Therefore, we report on a novel fabrication route that replaces aluminium and its native oxide by palladium with atomic-layer-deposition-grown aluminium oxide. Using this approach, we show the formation of low-disorder gate-defined quantum dots, which are reproducibly fabricated. Furthermore, palladium enables us to further shrink the gate design, allowing us to perform electron transport measurements in the few-electron regime in devices comprising only two gate layers, a major technological advancement. It remains to be seen, whether the introduction of palladium gates can improve the excellent results on electron and nuclear spin qubits defined with an aluminium gate stack.

  2. Instantons in Self-Organizing Logic Gates

    Science.gov (United States)

    Bearden, Sean R. B.; Manukian, Haik; Traversa, Fabio L.; Di Ventra, Massimiliano

    2018-03-01

    Self-organizing logic is a recently suggested framework that allows the solution of Boolean truth tables "in reverse"; i.e., it is able to satisfy the logical proposition of gates regardless to which terminal(s) the truth value is assigned ("terminal-agnostic logic"). It can be realized if time nonlocality (memory) is present. A practical realization of self-organizing logic gates (SOLGs) can be done by combining circuit elements with and without memory. By employing one such realization, we show, numerically, that SOLGs exploit elementary instantons to reach equilibrium points. Instantons are classical trajectories of the nonlinear equations of motion describing SOLGs and connect topologically distinct critical points in the phase space. By linear analysis at those points, we show that these instantons connect the initial critical point of the dynamics, with at least one unstable direction, directly to the final fixed point. We also show that the memory content of these gates affects only the relaxation time to reach the logically consistent solution. Finally, we demonstrate, by solving the corresponding stochastic differential equations, that, since instantons connect critical points, noise and perturbations may change the instanton trajectory in the phase space but not the initial and final critical points. Therefore, even for extremely large noise levels, the gates self-organize to the correct solution. Our work provides a physical understanding of, and can serve as an inspiration for, models of bidirectional logic gates that are emerging as important tools in physics-inspired, unconventional computing.

  3. Iron Gates Natural Park - Administration and Management

    Directory of Open Access Journals (Sweden)

    Sînziana Pauliuc

    2016-11-01

    Full Text Available This paper analyzes the management and administration of one of the largest, beautiful and complex natural parks from Romania, the Iron Gates Natural Park. The management plan is a frame of integration of the biodiversity conservation problems and protection of the natural and cultural environment that also supports socio-economic development of Iron Gates Natural Park. It is also an instrument of dialog between the institutions which coordinate this area. The management plan is a document approved by H.G 1048/2013 and it resulted after consulting the interested factors of the area (city halls, local and central authorities, civil society. The administration of Iron Gates Natural Park has a new structure, founded in 2003 and is working as a subunit of Forest-National Administration (Romsilva, which assures the necessary personal and equipment for administrating the area. The area has the status of: Natural Park, Natura 2000 and Ramsar site. The forest represents 65% of the total area, 98% being a state property. Analysing Iron Gates Natural Park documents (Iron Gates Natural Park management plan, scientific council and park administration documents, visits and observations within park, we can conclude that the park has a good administration leaded by the scientific councils, who also achieved many successful European projects.

  4. The pollution of the 'iron gate' reservoir

    International Nuclear Information System (INIS)

    Babic-Mladenovic, M.; Varga, S; Popovic, L.; Damjanovic, M.

    2002-01-01

    The paper presents the characteristics of the Iron Gate I (the Djerdap) Water Power and Navigational System, one of the largest in Europe (completed in 1972 by joint efforts of Yugoslavia and Romania). In this paper the attention is devoted to review of the sediment monitoring program and impacts of reservoir sedimentation, as well as to the investigations of water and sediment quality. Special consideration is paid to the issue of sediment pollution research needs. Namely, the hot spot of the 'Iron Gate' sedimentation represents a scarcely known pollution of sediment deposits. The present pollution probably is considerable, since the 'Iron Gate' reservoir drains about 577000 km 2 , with over 80 million inhabitants, and developed municipal and industrial infrastructure. Therefore, in the thirty-year reservoir life various types of sediment-bound pollutants entered and deposited within it. Especially severe incidents happened during 1999 (as a result of NATO bombing campaign) and 2000 (two accidental pollutions in the Tisza river catchment). The study of the 'Iron Gate' reservoir pollution should be prepared in order to enlighten the present state of reservoir sedimentation and pollution. The main objectives of the study are to enhance the government and public awareness of the present environmental state of the 'Iron Gate' reservoir and to serve as a baseline for all future actions. (author)

  5. Noisy signaling through promoter logic gates.

    Science.gov (United States)

    Gerstung, Moritz; Timmer, Jens; Fleck, Christian

    2009-01-01

    We study the influence of noisy transcription factor signals on cis-regulatory promoter elements. These elements process the probability of binary binding events analogous to computer logic gates. At equilibrium, this probability is given by the so-called input function. We show that transcription factor noise causes deviations from the equilibrium value due to the nonlinearity of the input function. For a single binding site, the correction is always negative resulting in an occupancy below the mean-field level. Yet for more complex promoters it depends on the correlation of the transcription factor signals and the geometry of the input function. We present explicit solutions for the basic types of AND and OR gates. The correction size varies among these different types of gates and signal types, mainly being larger in AND gates and for correlated fluctuations. In all cases we find excellent agreement between the analytical results and numerical simulations. We also study the E. coli Lac operon as an example of an AND NOR gate. We present a consistent mathematical method that allows one to separate different sources of noise and quantifies their effect on promoter occupation. A surprising result of our analysis is that Poissonian molecular fluctuations, in contrast to external fluctuations, do no contribute to the correction.

  6. Temperature dependence of the dielectric properties of rubber wood

    Science.gov (United States)

    Mohammed Firoz Kabir; Wan M. Daud; Kaida B. Khalid; Haji A.A. Sidek

    2001-01-01

    The effect of temperature on the dielectric properties of rubber wood was investigated in three anisotropic directions—longitudinal, radial, and tangential, and at different measurement frequencies. Low frequency measurements were conducted with a dielectric spectrometer, and high frequencies used microwave applied with open-ended coaxial probe sensors. Dielectric...

  7. Dielectric properties of Al-substituted Co ferrite nanoparticles

    Indian Academy of Sciences (India)

    Administrator

    tric loss, ε″ and dielectric loss tangent, tan δ, have been studied for nanocrystalline ferrite samples as a func- tion of frequency. The dielectric constant and dielectric loss obtained for the nanocrystalline ferrites proposed by this technique possess lower value than that of the ferrites prepared by other methods for the same ...

  8. New perovskite-related oxides having high dielectric constant ...

    Indian Academy of Sciences (India)

    Unknown

    30. Ferroelectric oxides have very high dielectric constant (~10,000) but have a high dielectric loss. Materials with reasonably high dielectric constant (>40) and low loss are rare. This has led chemists to take up the challenge to search for ...

  9. Dielectric measurements on PWB materials at microwave frequencies

    Indian Academy of Sciences (India)

    In quest of finding new substrate for printed wiring board (PWB) having low dielectric constant, we have made PSF/PMMA blends and evaluated the dielectric parameters at 8.92 GHz frequency and at 35°C temperature. Incorporating PMMA in PSF matrix results in reduced dielectric constant than that of pure PSF.

  10. Elaboration and dielectric characterization of a doped ferroelectric ...

    African Journals Online (AJOL)

    ... 1150,1180 and 1200 °C successively to optimize the sintering temperature optimal where the density of the sample is maximum (near theoretical density) and therefore the product has better physical quality. The study of dielectric properties of all samples showed a high permittivity dielectric εr = 18018, low dielectric loss: ...

  11. Dielectric properties of KDP-type ferroelectric crystals in the ...

    Indian Academy of Sciences (India)

    renormalized soft mode frequency, Curie temperature, dielectric constant and dielectric loss are evaluated. ... temperature and electric field dependences of soft mode frequency, dielectric constant and loss have been ... its ability to generate second- and third-harmonics of higher power Nd:YAG and. Nd:glass lasers [2].

  12. RF cavity using liquid dielectric for tuning and cooling

    Science.gov (United States)

    Popovic, Milorad [Warrenville, IL; Johnson, Rolland P [Newport News, VA

    2012-04-17

    A system for accelerating particles includes an RF cavity that contains a ferrite core and a liquid dielectric. Characteristics of the ferrite core and the liquid dielectric, among other factors, determine the resonant frequency of the RF cavity. The liquid dielectric is circulated to cool the ferrite core during the operation of the system.

  13. The dielectric genome of van der Waals heterostructures

    DEFF Research Database (Denmark)

    Andersen, Kirsten; Latini, Simone; Thygesen, Kristian Sommer

    2015-01-01

    with ab-initio accuracy using a multi-scale approach where the dielectric functions of the individual layers (the dielectric building blocks) are coupled simply via their long-range Coulomb interaction. We use the method to illustrate the 2D- 3D dielectric transition in multi-layer MoS2 crystals...

  14. Mechanical stretch influence on lifetime of dielectric elastomer films

    NARCIS (Netherlands)

    Iannarelli, A.; Ghaffarian Niasar, M.; Bar-Cohen, Yoseph

    2017-01-01

    Film pre-stretching is a widely adopted solution to improve dielectric strength of the DEA systems. However, to date, long term reliability of this solution has not been investigated. In this work it is explored how the dielectric elastomer lifetime is affected by film pre-stretching. The dielectric

  15. Internal current amplification induced by dielectric hole trapping in monolayer MoS2 transistor

    Science.gov (United States)

    Liu, Pang-Shiuan; Lin, Ching-Ting; Hudec, Boris; Hou, Tuo-Hung

    2017-11-01

    Carrier transport in layered transition-metal dichalcogenides is highly sensitive to surrounding charges because of the atomically thin thickness. By exploiting this property, we report a new internal current amplification mechanism through positive feedback induced by dielectric hole trapping in a MoS2 back-gate transistor on a tantalum oxide substrate. The device exhibits an extremely steep subthreshold slope of 17 mV/decade, which is strongly dependent on the substrate material and drain bias. The steep subthreshold slope is attributed to the internal current amplification arising from the positive feedback between hole generation in MoS2 triggered by large lateral electric field and Schottky barrier narrowing induced by localized hole trapping in tantalum oxide near the source contact.

  16. Four-gate transistor analog multiplier circuit

    Science.gov (United States)

    Mojarradi, Mohammad M. (Inventor); Blalock, Benjamin (Inventor); Cristoloveanu, Sorin (Inventor); Chen, Suheng (Inventor); Akarvardar, Kerem (Inventor)

    2011-01-01

    A differential output analog multiplier circuit utilizing four G.sup.4-FETs, each source connected to a current source. The four G.sup.4-FETs may be grouped into two pairs of two G.sup.4-FETs each, where one pair has its drains connected to a load, and the other par has its drains connected to another load. The differential output voltage is taken at the two loads. In one embodiment, for each G.sup.4-FET, the first and second junction gates are each connected together, where a first input voltage is applied to the front gates of each pair, and a second input voltage is applied to the first junction gates of each pair. Other embodiments are described and claimed.

  17. TOURISM IN THE TOURIST AREA "IRON GATES"

    Directory of Open Access Journals (Sweden)

    DINU LOREDANA

    2015-12-01

    Full Text Available This paper wants to highlight the trends of tourist demanding from the touristic area Iron Gates. We will see that the future of tourism include new forms such as those caused by the increased interest in areas with agritourism attractions or areas and portions of parks and nature reserves, which will raise the attractiveness of Danube, putting in a new pole of attraction area. Thus, we conducted a research based on survey among visitors on the tourist area "Iron Gates". The main endpoint based on survey was highlighting the motivation that determined the choice of the tourist area "Iron Gates", but also knowledge of consumer satisfaction for the tourists to the visited area (tourist product studied. The main objectives were, of course, linked with socio - economic and demographic characteristics of tourists to form a clearer picture of the motivational factors involved.

  18. Active gated imaging for automotive safety applications

    Science.gov (United States)

    Grauer, Yoav; Sonn, Ezri

    2015-03-01

    The paper presents the Active Gated Imaging System (AGIS), in relation to the automotive field. AGIS is based on a fast gated-camera equipped with a unique Gated-CMOS sensor, and a pulsed Illuminator, synchronized in the time domain to record images of a certain range of interest which are then processed by computer vision real-time algorithms. In recent years we have learned the system parameters which are most beneficial to night-time driving in terms of; field of view, illumination profile, resolution and processing power. AGIS provides also day-time imaging with additional capabilities, which enhances computer vision safety applications. AGIS provides an excellent candidate for camera-based Advanced Driver Assistance Systems (ADAS) and the path for autonomous driving, in the future, based on its outstanding low/high light-level, harsh weather conditions capabilities and 3D potential growth capabilities.

  19. The Airport Gate Assignment Problem: A Survey

    Science.gov (United States)

    Ghaleb, Mageed A.; Salem, Ahmed M.

    2014-01-01

    The airport gate assignment problem (AGAP) is one of the most important problems operations managers face daily. Many researches have been done to solve this problem and tackle its complexity. The objective of the task is assigning each flight (aircraft) to an available gate while maximizing both conveniences to passengers and the operational efficiency of airport. This objective requires a solution that provides the ability to change and update the gate assignment data on a real time basis. In this paper, we survey the state of the art of these problems and the various methods to obtain the solution. Our survey covers both theoretical and real AGAP with the description of mathematical formulations and resolution methods such as exact algorithms, heuristic algorithms, and metaheuristic algorithms. We also provide a research trend that can inspire researchers about new problems in this area. PMID:25506074

  20. Electrical characterization of amorphous Al2O3 dielectric films on n-type 4H-SiC

    Science.gov (United States)

    Khosa, R. Y.; Thorsteinsson, E. B.; Winters, M.; Rorsman, N.; Karhu, R.; Hassan, J.; Sveinbjörnsson, E. Ö.

    2018-02-01

    We report on the electrical properties of Al2O3 films grown on 4H-SiC by successive thermal oxidation of thin Al layers at low temperatures (200°C - 300°C). MOS capacitors made using these films contain lower density of interface traps, are more immune to electron injection and exhibit higher breakdown field (5MV/cm) than Al2O3 films grown by atomic layer deposition (ALD) or rapid thermal processing (RTP). Furthermore, the interface state density is significantly lower than in MOS capacitors with nitrided thermal silicon dioxide, grown in N2O, serving as the gate dielectric. Deposition of an additional SiO2 film on the top of the Al2O3 layer increases the breakdown voltage of the MOS capacitors while maintaining low density of interface traps. We examine the origin of negative charges frequently encountered in Al2O3 films grown on SiC and find that these charges consist of trapped electrons which can be released from the Al2O3 layer by depletion bias stress and ultraviolet light exposure. This electron trapping needs to be reduced if Al2O3 is to be used as a gate dielectric in SiC MOS technology.

  1. DIELECTRIC WAKE FIELD RESONATOR ACCELERATOR MODULE

    Energy Technology Data Exchange (ETDEWEB)

    Hirshfield, Jay L.

    2013-11-06

    Results are presented from experiments, and numerical analysis of wake fields set up by electron bunches passing through a cylindrical or rectangular dielectric-lined structure. These bunches excite many TM-modes, with Ez components of the wake fields sharply localized on the axis of the structure periodically behind the bunches. The experiment with the cylindrical structure, carried out at ATF Brookhaven National Laboratory, used up to three 50 MeV bunches spaced by one wake field period (21 cm) to study the superposition of wake fields by measuring the energy loss of each bunch after it passed through the 53-cm long dielectric element. The millimeter-wave spectrum of radiation excited by the passage of bunches is also studied. Numerical analysis was aimed not only to simulate the behavior of our device, but in general to predict dielectric wake field accelerator performance. It is shown that one needs to match the radius of the cylindrical dielectric channel with the bunch longitudinal rms-length to achieve optimal performance.

  2. Characterization of dielectric charging in RF MEMS

    NARCIS (Netherlands)

    Herfst, R.W.; Huizing, H.G.A.; Steeneken, P.G.; Schmitz, Jurriaan

    2005-01-01

    Capacitive RF MEMS switches show great promise for use in wireless communication devices such as mobile phones, but the successful application of these switches is hindered by the reliability of the devices: charge injection in the dielectric layer (SiN) can cause irreversible stiction of the moving

  3. 7th International Symposium on Gaseous Dielectrics

    CERN Document Server

    James, David

    1994-01-01

    The Seventh International Symposium on Gaseous Dielectrics was held in Knoxville, Tennessee, U. S. A. , on April 24-28, 1994. The symposium continued the interdisciplinary character and comprehensive approach of the preceding six symposia. Gaseous DielecIries VII is a detailed record of the symposium proceedings. It covers recent advances and developments in a wide range of basic, applied and industrial areas of gaseous dielectrics. It is hoped that Gaseous DielecIries VII will aid future research and development in, and encourage wider industrial use of, gaseous dielectrics. The Organizing Committee of the Seventh International Symposium on Gaseous Dielectrics consisted of G. Addis (U. S. A. ), L. G. Christophorou (U. S. A. ), F. Y. Chu (Canada), A. H. Cookson (U. S. A. ), O. Farish (U. K. ), I. Gallimberti (Italy) , A. Garscadden (U. S. A. ), D. R. James (U. S. A. ), E. Marode (France), T. Nitta (Japan), W. Pfeiffer (Germany), Y. Qiu (China), I. Sauers (U. S. A. ), R. J. Van Brunt (U. S. A. ), and W. Zaengl...

  4. Thermal aspects of resistors embedded in dielectrics

    International Nuclear Information System (INIS)

    Caprari, R.S.

    1995-10-01

    This note presents a formula for estimating the temperature of a distributed resistor or resistor chain that is immersed in a dielectric medium, which in turn is surrounded by a heat reservoir. An example computation from an actual instrument in included. 6 refs

  5. Characterization of Dielectric Electroactive Polymer transducers

    DEFF Research Database (Denmark)

    Nielsen, Dennis; Møller, Martin B.; Sarban, Rahimullah

    2014-01-01

    This paper analysis the small-signal model of the Dielectric Electro Active Polymer (DEAP) transducer. The DEAP transducer have been proposed as an alternative to the electrodynamic transducer in sound reproduction systems. In order to understand how the DEAP transducer works, and provide guideli...

  6. Thermally stimulated discharge current (TSDC) and dielectric ...

    Indian Academy of Sciences (India)

    Unknown

    2001-10-09

    Oct 9, 2001 ... Semiconducting glass; TSDC; trap energy; dielectric constant. 1. Introduction ... Repeated grinding of mixture was done to ensure ... The samples were quenched at 200°C to avoid cracking and shattering of glass. After quenching, all samples were immediately trans- ferred to an annealing furnace.

  7. Testing quantised inertia on emdrives with dielectrics

    Science.gov (United States)

    McCulloch, M. E.

    2017-05-01

    Truncated-cone-shaped cavities with microwaves resonating within them (emdrives) move slightly towards their narrow ends, in contradiction to standard physics. This effect has been predicted by a model called quantised inertia (MiHsC) which assumes that the inertia of the microwaves is caused by Unruh radiation, more of which is allowed at the wide end. Therefore, photons going towards the wide end gain inertia, and to conserve momentum the cavity must move towards its narrow end, as observed. A previous analysis with quantised inertia predicted a controversial photon acceleration, which is shown here to be unnecessary. The previous analysis also mispredicted the thrust in those emdrives with dielectrics. It is shown here that having a dielectric at one end of the cavity is equivalent to widening the cavity at that end, and when dielectrics are considered, then quantised inertia predicts these results as well as the others, except for Shawyer's first test where the thrust is predicted to be the right size but in the wrong direction. As a further test, quantised inertia predicts that an emdrive's thrust can be enhanced by using a dielectric at the wide end.

  8. Dielectric barrier discharges applied for optical spectrometry

    Czech Academy of Sciences Publication Activity Database

    Brandt, S.; Schütz, A.; Klute, F. D.; Kratzer, Jan; Franzke, J.

    2016-01-01

    Roč. 123, SEP (2016), s. 6-32 ISSN 0584-8547 R&D Projects: GA ČR GA14-23532S Institutional support: RVO:68081715 Keywords : dielectric barrier discharge * analytical spectroscopy * applications Subject RIV: CB - Analytical Chemistry , Separation Impact factor: 3.241, year: 2016

  9. An Introduction to Electrical Breakdown in Dielectrics

    Science.gov (United States)

    1985-04-01

    Examples include the insulation in parallel plate transmission lines, the dielectrics in high voltage capacitors, and transformer bushings . This can...of the electrodes has a significant effect on the breakdown voltage. Some equip- ment, such as vacuum switchgear , would be rated below the lowest

  10. Quantum optics of dispersive dielectric media

    International Nuclear Information System (INIS)

    Lenac, Z.

    2003-01-01

    We quantize the electromagnetic field in a polar medium starting with the fundamental equations of motion. In our model the medium is described by a Lorenz-type dielectric function ε(r,ω) appropriate, e.g., for ionic crystals, metals, and inert dielectrics. There are no restrictions on the spatial behavior of the dielectric function, i.e., there can be many different polar media with arbitrary shapes. We assume no losses in our system so the dielectric function for the whole space is assumed as real. The quantization procedure is based on an expansion of the total field (transverse and longitudinal) in terms of the coupled (polariton) eigenmodes, and this approach incorporates all previous results derived for similar but restricted systems (e.g., without spatial or frequency dependence of coupled modes). Within the same model, we also quantize the Hamiltonian of a nonretarded electromagnetic field in polar media. Particular attention is paid to the derivation of the orthogonality and closure relations, which are used in a discussion of the fundamental (equal-time) commutation relations between the conjugate field operators

  11. Development of dielectric window to conductor assembly

    International Nuclear Information System (INIS)

    Heikinheimo, L.; Nuutinen, S.; Taehtinen, S.

    1998-01-01

    The report summarises the work done by Association Euratom-Tekes in developing manufacturing procedures for vacuum tight ceramic to metal joints and in manufacturing full scale components for the ICRF vacuum window construction. The development started at VTT Manufacturing Technology in 1996 under the Task T238.2 and continued in 1997 under the Underlying Technology tasks. In the design of the components, the following issues were addressed and resolved: (1) The choice of dielectric material; The choice is made as the best compromise among nuclear, mechanical, and thermal properties, but in due consideration of material availability, fabrication issues and response to cyclic loads, (2) Layout and detailed design. The shape of the dielectric window is optimized to minimize electric fields in the dielectric materials; The optimised field distribution is computed in a 2D geometry; The design includes thermal calculation and the cooling layout and includes provision for remote handling replacement in one block, (3) Metal/dielectric joining. The joining technology is selected and justified. Joining tests on material selections to verify the applicability has been done, the validation of the design pre-prototype tests have been carried out selectively. The steps for the manufacture of these full scale components are described in the report with the appropriate concluding remarks and suggestions for the further actions. (orig.)

  12. Effects of Radiation on Capacitor Dielectrics

    Science.gov (United States)

    Bouquet, F. L.; Somoano, R. B.; Frickland, P. O.

    1987-01-01

    Data gathered on key design parameters. Report discusses study of electrical and mechanical properties of irradiated polymer dielectric materials. Data compiled for use by designers of high-energy-density capacitors that operate in presence of ionizing radiation. Study focused on polycarbonates, polyetheretherketones, polymethylpentenes, polyimides (including polyetherimide), polyolefins, polysulfones (including polyethersulfone and polyphenylsulfone), and polyvinylidene fluorides.

  13. Dielectric barrier discharges applied for optical spectrometry

    Czech Academy of Sciences Publication Activity Database

    Brandt, S.; Schütz, A.; Klute, F. D.; Kratzer, Jan; Franzke, J.

    2016-01-01

    Roč. 123, SEP (2016), s. 6-32 ISSN 0584-8547 R&D Projects: GA ČR GA14-23532S Institutional support: RVO:68081715 Keywords : dielectric barrier discharge * analytical spectroscopy * applications Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 3.241, year: 2016

  14. Synthesis, spectral, thermal, optical dispersion and dielectric ...

    Indian Academy of Sciences (India)

    2016-08-26

    Aug 26, 2016 ... Home; Journals; Bulletin of Materials Science; Volume 39; Issue 1. Synthesis, spectral, thermal, optical dispersion and dielectric properties of nanocrystalline dimer complex (PEPyr–diCd) thin films as novel organic semiconductor. Ahmed Farouk Al-Hossainy. Volume 39 Issue 1 February 2016 pp 209-222 ...

  15. Pentaquarks in chiral color dielectric model

    Indian Academy of Sciences (India)

    Recent experiments indicate that a narrow baryonic state having strangeness +1 and mass of about 1540 MeV may be existing. Such a state was predicted in chiral model by Diakonov et al. In this work I compute the mass and width of this state in chiral color dielectric model. I show that the computed width is about 30 MeV.

  16. Electrical breakdown phenomena of dielectric elastomers

    DEFF Research Database (Denmark)

    Mateiu, Ramona Valentina; Yu, Liyun; Skov, Anne Ladegaard

    2017-01-01

    years. However, optimization with respect to the dielectric permittivity solely may lead to other problematic phenomena such as premature electrical breakdown. In this work, we investigate the electrical breakdown phenomena of various types of permittivity-enhanced silicone elastomers. Two types...

  17. Dihyperons in chiral color dielectric model

    Indian Academy of Sciences (India)

    The mass of the dibaryon having spin, parity =0+, isospin = 0 and strangeness -2 is computed using chiral color dielectric model. ... Color magnetic energy due to gluon exchange, meson self energy and energy correction due to center of mass motion are computed. ... Institute of Physics, Bhubaneswar 751 005, India ...

  18. Pentaquarks in chiral color dielectric model

    Indian Academy of Sciences (India)

    In this work I compute the mass and width of this state in chiral color dielectric model. I show that ... I find that the mass of the state can be fitted to the experimentally observed mass by invoking a color neutral vector field and its interaction with the quarks. ... Institute of Physics, Sachivalaya Marg, Bhubaneswar 751 005, India ...

  19. Synthesis, crystal structure, thermal analysis and dielectric

    Indian Academy of Sciences (India)

    Annual Meetings · Mid Year Meetings · Discussion Meetings · Public Lectures · Lecture Workshops · Refresher Courses · Symposia · Live Streaming. Home; Journals; Bulletin of Materials Science; Volume 39; Issue 5. Synthesis, crystal structure, thermal analysis and dielectric properties of two mixed trichlorocadmiates (II).

  20. Structural, optical, photoluminescence, dielectric and electrical ...

    Indian Academy of Sciences (India)

    Such type of states affect the transport phenomena in thin films to a great extent by acting as traps and recom- bination centres for carriers. These states may also lead to the probable formation of dipoles, which are responsi- ble for the dielectric behaviour. When the thin films are subjected to electric field, the electron hop ...