Development of a pixel sensor with fine space-time resolution based on SOI technology for the ILC vertex detector

Energy Technology Data Exchange (ETDEWEB)

Ono, Shun, E-mail: s-ono@champ.hep.sci.osaka-u.ac.jp [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Togawa, Manabu; Tsuji, Ryoji; Mori, Teppei [Osaka University, 1-1 Machikaneyama, Toyonaka (Japan); Yamada, Miho; Arai, Yasuo; Tsuboyama, Toru; Hanagaki, Kazunori [Institute of Particle and Nuclear Studies, High Energy Accelerator Research Org. (KEK), 1-1 Oho, Tsukuba (Japan)

2017-02-11

We have been developing a new monolithic pixel sensor with silicon-on-insulator (SOI) technology for the International Linear Collider (ILC) vertex detector system. The SOI monolithic pixel detector is realized using standard CMOS circuits fabricated on a fully depleted sensor layer. The new SOI sensor SOFIST can store both the position and timing information of charged particles in each 20×20 μm{sup 2} pixel. The position resolution is further improved by the position weighted with the charges spread to multiple pixels. The pixel also records the hit timing with an embedded time-stamp circuit. The sensor chip has column-parallel analog-to-digital conversion (ADC) circuits and zero-suppression logic for high-speed data readout. We are designing and evaluating some prototype sensor chips for optimizing and minimizing the pixel circuit.

Micromachined thin-film sensors for SOI-CMOS co-integration

CERN Document Server

Laconte, Jean; Raskin, Jean-Pierre

2006-01-01

Co-integration of MEMS and MOS in SOI technology is promising and well demonstrated hereThe impact of Micromachining on SOI devices is deeply analyzed for the first timeInclude extensive TMAH etching, residual stress, microheaters, gas-flow sensors reviewResidual stresses in thin films need to be more and more monitored in MEMS designsTMAH micromachining is an attractive alternative to KOH.

Sub-50 nm gate length SOI transistor development for high performance microprocessors

International Nuclear Information System (INIS)

Horstmann, M.; Greenlaw, D.; Feudel, Th.; Wei, A.; Frohberg, K.; Burbach, G.; Gerhardt, M.; Lenski, M.; Stephan, R.; Wieczorek, K.; Schaller, M.; Hohage, J.; Ruelke, H.; Klais, J.; Huebler, P.; Luning, S.; Bentum, R. van; Grasshoff, G.; Schwan, C.; Cheek, J.; Buller, J.; Krishnan, S.; Raab, M.; Kepler, N.

2004-01-01

Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40 nm gate length (L GATE ) PD SOI transistors into volume manufacturing for high-speed microprocessors. The key innovations developed for this transistor in order to overcome classical gate oxide and L GATE scaling is an unique differential triple spacer structure, stressed overlayer films inducing strain in the Silicon channel and optimized junctions. This transistor structure yields an outstanding ring oscillator speed with an unloaded inverter delay of 5.5 ps. The found improvements are highly manufacturable and scaleable for future device technologies like FD SOI

SOI MESFETs for Extreme Environment Electronics, Phase I

Data.gov (United States)

National Aeronautics and Space Administration — We are proposing a new extreme environment electronics (EEE) technology based on silicon-on-insulator (SOI) metal-semiconductor field-effect transistors (MESFETs)....

FinFET and UTBB for RF SOI communication systems

Science.gov (United States)

Raskin, Jean-Pierre

2016-11-01

Performance of RF integrated circuit (IC) is directly linked to the analog and high frequency characteristics of the transistors, the quality of the back-end of line process as well as the electromagnetic properties of the substrate. Thanks to the introduction of the trap-rich high-resistivity Silicon-on-Insulator (SOI) substrate on the market, the ICs requirements in term of linearity are fulfilled. Today partially depleted SOI MOSFET is the mainstream technology for RF SOI systems. Future generations of mobile communication systems will require transistors with better high frequency performance at lower power consumption. The advanced MOS transistors in competition are FinFET and Ultra Thin Body and Buried oxide (UTBB) SOI MOSFETs. Both devices have been intensively studied these last years. Most of the reported data concern their digital performance. In this paper, their analog/RF behavior is described and compared. Both show similar characteristics in terms of transconductance, Early voltage, voltage gain, self-heating issue but UTBB outperforms FinFET in terms of cutoff frequencies thanks to their relatively lower fringing parasitic capacitances.

High performance flexible CMOS SOI FinFETs

KAUST Repository

Fahad, Hossain M.; Sevilla, Galo T.; Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

2014-01-01

We demonstrate the first ever CMOS compatible soft etch back based high performance flexible CMOS SOI FinFETs. The move from planar to non-planar FinFETs has enabled continued scaling down to the 14 nm technology node. This has been possible due

Integrated circuits of silicon on insulator S.O.I. technologies: State of the art and perspectives

International Nuclear Information System (INIS)

Leray, J.L.; Dupont-Nivet, E.; Raffaelli, M.; Coic, Y.M.; Musseau, O.; Pere, J.F.; Lalande, P.; Bredy, J.; Auberton-Herve, A.J.; Bruel, M.; Giffard, B.

1989-01-01

Silicon On Insulator technologies have been proposed to increase the integrated circuits performances in radiation operation. Active researches are conducted, in France and abroad. This paper reviews briefly radiation effects phenomenology in that particular type of structure S.O.I. New results are presented that show very good radiation behaviour in term of speed, dose (10 to 100 megarad (Si)), dose rate and S.E.U. performances [fr

Extra source implantation for suppression floating-body effect in partially depleted SOI MOSFETs

International Nuclear Information System (INIS)

Chen Jing; Luo Jiexin; Wu Qingqing; Chai Zhan; Huang Xiaolu; Wei Xing; Wang Xi

2012-01-01

Silicon-on-insulate (SOI) MOSFETs offer benefits over bulk competitors for fully isolation and smaller junction capacitance. The performance of partially depleted (PD) SOI MOSFETs, though, is not good enough. Since the body is floating, the extra holes (for nMOSFETs) in this region accumulate, causing body potential arise, which of course degrades the performance of the device. How to suppress the floating-body effect becomes critical. There are mainly two ways for the goal. One is to employ body-contact structures, and the other SiGe source/drain structures. However, the former consumes extra area, not welcomed in the state-of-the-art chips design. The latter is not compatible with the traditional CMOS technology. Finding a structure both saving area and compatible technology is the most urgent for PD SOI MOSFETs. Recently, we have developed a new structure with extra heavy boron implantation in the source region for PD SOI nMOSFETs. It consumes no extra area and is also compatible with CMOS technology. The device is found to be free of kink effect in simulation, which implies the floating-body effect is greatly suppressed. In addition, the mechanisms of the kink-free, as well as the impact of different implanting conditions are interpreted.

A MEMS SOI-based piezoresistive fluid flow sensor

Science.gov (United States)

Tian, B.; Li, H. F.; Yang, H.; Song, D. L.; Bai, X. W.; Zhao, Y. L.

2018-02-01

In this paper, a SOI (silicon-on-insulator)-based piezoresistive fluid flow sensor is presented; the presented flow sensor mainly consists of a nylon sensing head, stainless steel cantilever beam, SOI sensor chip, printed circuit board, half-cylinder gasket, and stainless steel shell. The working principle of the sensor and some detailed contrastive analysis about the sensor structure were introduced since the nylon sensing head and stainless steel cantilever beam have distinct influence on the sensor performance; the structure of nylon sensing head and stainless steel cantilever beam is also discussed. The SOI sensor chip was fabricated using micro-electromechanical systems technologies, such as reactive ion etching and low pressure chemical vapor deposition. The designed fluid sensor was packaged and tested; a calibration installation system was purposely designed for the sensor experiment. The testing results indicated that the output voltage of the sensor is proportional to the square of the fluid flow velocity, which is coincident with the theoretical derivation. The tested sensitivity of the sensor is 3.91 × 10-4 V ms2/kg.

Propriété de soi et indifférence morale du rapport à soi

Directory of Open Access Journals (Sweden)

Nathalie Maillard Romagnoli

2011-05-01

Full Text Available Je m’interroge dans cet article sur les implications du principe libertarien de la pleine propriété de soi sur la question du rapport moral à soi-même. À travers le principe de la pleine propriété de soi, les libertariens défendent la liberté entière de chacun de vivre comme il l���entend, pourvu que les droits des autres soient respectés. Apparemment, ce principe n’a pas grand-chose à nous dire sur ce que nous sommes moralement autorisés à nous faire à nous-mêmes ou non. Certains libertariens, comme Vallentyne, soutiennent toutefois que le principe de la pleine propriété de soi est incompatible avec l’existence de devoirs envers soi. La pleine propriété de soi impliquerait l’indifférence morale du rapport à soi. Je soutiens dans cet article que le principe de la pleine propriété de soi n’implique pas que ce que nous nous faisons à nous-mêmes soit moralement indifférent. Je veux aussi montrer que même si les libertariens, et en particulier Vallentyne, soutiennent la thèse de l’indifférence morale du rapport à soi, celle-ci n’est pas liée à la thèse de la pleine propriété de soi, mais bien plutôt à leur subjectivisme moral.ABSTRACTI ask in this article what the libertarian principle of full self-ownership has to say about volontary actions directed towards oneself. Through the principle of full self-ownership, libertarians defend the persons’ individual liberty to live as they choose to do, as long as they don’t infringe on the rights of others. Apparently, this principle doesn’t have much to say about what we are morally allowed to do to ourselves or not. Some libertarians, however, like Vallentyne, maintain that, if we have duties or obligations to ourselves, then we cannot be full self-owner. In this perspective, full self-ownership would imply that what we do to ourselves is morally indifferent. I want to show in this article that full self-ownership is compatible with the

Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature

Science.gov (United States)

Pavanello, Marcelo Antonio; de Souza, Michelly; Ribeiro, Thales Augusto; Martino, João Antonio; Flandre, Denis

2016-11-01

This paper presents the operation of Graded-Channel (GC) Silicon-On-Insulator (SOI) nMOSFETs at low temperatures down to liquid helium temperature in comparison to standard uniformly doped transistors. Devices from two different technologies have been measured and show that the mobility increase rate with temperature for GC SOI transistors is similar to uniformly doped devices for temperatures down to 90 K. However, at liquid helium temperature the rate of mobility increase is larger in GC SOI than in standard devices because of the different mobility scattering mechanisms. The analog properties of GC SOI devices have been investigated down to 4.16 K and show that because of its better transconductance and output conductance, an intrinsic voltage gain improvement with temperature is also obtained for devices in the whole studied temperature range. GC devices are also capable of reducing the impact ionization due to the high electric field in the drain region, increasing the drain breakdown voltage of fully-depleted SOI MOSFETs at any studied temperature and the kink voltage at 4.16 K.

Micromachined Thin-Film Sensors for SOI-CMOS Co-Integration

Science.gov (United States)

Laconte, Jean; Flandre, D.; Raskin, Jean-Pierre

Co-integration of sensors with their associated electronics on a single silicon chip may provide many significant benefits regarding performance, reliability, miniaturization and process simplicity without significantly increasing the total cost. Micromachined Thin-Film Sensors for SOI-CMOS Co-integration covers the challenges and interests and demonstrates the successful co-integration of gas flow sensors on dielectric membrane, with their associated electronics, in CMOS-SOI technology. We firstly investigate the extraction of residual stress in thin layers and in their stacking and the release, in post-processing, of a 1 μm-thick robust and flat dielectric multilayered membrane using Tetramethyl Ammonium Hydroxide (TMAH) silicon micromachining solution.

Analysis of silicon on insulator (SOI) optical microring add-drop filter based on waveguide intersections

Science.gov (United States)

Kaźmierczak, Andrzej; Bogaerts, Wim; Van Thourhout, Dries; Drouard, Emmanuel; Rojo-Romeo, Pedro; Giannone, Domenico; Gaffiot, Frederic

2008-04-01

We present a compact passive optical add-drop filter which incorporates two microring resonators and a waveguide intersection in silicon-on-insulator (SOI) technology. Such a filter is a key element for designing simple layouts of highly integrated complex optical networks-on-chip. The filter occupies an area smaller than 10μm×10μm and exhibits relatively high quality factors (up to 4000) and efficient signal dropping capabilities. In the present work, the influence of filter parameters such as the microring-resonators radii and the coupling section shape are analyzed theoretically and experimentally

Special Issue: Planar Fully-Depleted SOI technology

Science.gov (United States)

Allibert, F.; Hiramoto, T.; Nguyen, B. Y.

2016-03-01

We are in the era of mobile computing with smart handheld devices and remote data storage "in the cloud," with devices that are almost always on and driven by needs of high data transmission rate, instant access/connection and long battery life. With all the ambitious requirements for better performance with lower power consumption, the SoC solution must also be cost-effective in order to capture the large, highly-competitive consumer mobile and wearable markets. The Fully-Depleted SOI device/circuit is a unique option that can satisfy all these requirements and has made tremendous progress in development for various applications and adoption by foundries, integrated device manufacturers (IDM), and fabless companies in the last 3 years.

Charge collection mechanisms in MOS/SOI transistors irradiated by energetic heavy ions

International Nuclear Information System (INIS)

Musseau, O.; Leray, J.L.; Ferlet, V.; Umbert, A.; Coic, Y.M.; Hesto, P.

1991-01-01

We have investigated with both experimental and numerical methods (Monte Carlo and drift-diffusion models) various charge collection mechanisms in NMOS/SOI transistors irradiated by single energetic heavy ions. Our physical interpretations of data emphasize the influence of various parasitic structures of the device. Two charge collection mechanisms are detailed: substrate funneling in buried MOS capacitor and latching of the parasitic bipolar transistor. Based on carrier transport and charge collection, the sensitivity of future scaled down CMOS/SOI technologies is finally discussed

Method to improve commercial bonded SOI material

Science.gov (United States)

Maris, Humphrey John; Sadana, Devendra Kumar

2000-07-11

A method of improving the bonding characteristics of a previously bonded silicon on insulator (SOI) structure is provided. The improvement in the bonding characteristics is achieved in the present invention by, optionally, forming an oxide cap layer on the silicon surface of the bonded SOI structure and then annealing either the uncapped or oxide capped structure in a slightly oxidizing ambient at temperatures greater than 1200.degree. C. Also provided herein is a method for detecting the bonding characteristics of previously bonded SOI structures. According to this aspect of the present invention, a pico-second laser pulse technique is employed to determine the bonding imperfections of previously bonded SOI structures.

Test-beam results of a SOI pixel detector prototype

CERN Document Server

Bugiel, Roma; Dannheim, Dominik; Fiergolski, Adrian; Hynds, Daniel; Idzik, Marek; Kapusta, P; Kucewicz, Wojciech; Munker, Ruth Magdalena; Nurnberg, Andreas Matthias

2018-01-01

This paper presents the test-beam results of a monolithic pixel-detector prototype fabricated in 200 nm Silicon-On-Insulator (SOI) CMOS technology. The SOI detector was tested at the CERN SPS H6 beam line. The detector is fabricated on a 500 μm thick high-resistivity float- zone n-type (FZ-n) wafer. The pixel size is 30 μm × 30 μm and its readout uses a source- follower configuration. The test-beam data are analysed in order to compute the spatial resolution and detector efficiency. The analysis chain includes pedestal and noise calculation, cluster reconstruction, as well as alignment and η-correction for non-linear charge sharing. The results show a spatial resolution of about 4.3 μm.

Advanced Liquid-Free, Piezoresistive, SOI-Based Pressure Sensors for Measurements in Harsh Environments.

Science.gov (United States)

Ngo, Ha-Duong; Mukhopadhyay, Biswaijit; Ehrmann, Oswin; Lang, Klaus-Dieter

2015-08-18

In this paper we present and discuss two innovative liquid-free SOI sensors for pressure measurements in harsh environments. The sensors are capable of measuring pressures at high temperatures. In both concepts media separation is realized using a steel membrane. The two concepts represent two different strategies for packaging of devices for use in harsh environments and at high temperatures. The first one is a "one-sensor-one-packaging_technology" concept. The second one uses a standard flip-chip bonding technique. The first sensor is a "floating-concept", capable of measuring pressures at temperatures up to 400 °C (constant load) with an accuracy of 0.25% Full Scale Output (FSO). A push rod (mounted onto the steel membrane) transfers the applied pressure directly to the center-boss membrane of the SOI-chip, which is placed on a ceramic carrier. The chip membrane is realized by Deep Reactive Ion Etching (DRIE or Bosch Process). A novel propertied chip housing employing a sliding sensor chip that is fixed during packaging by mechanical preloading via the push rod is used, thereby avoiding chip movement, and ensuring optimal push rod load transmission. The second sensor can be used up to 350 °C. The SOI chips consists of a beam with an integrated centre-boss with was realized using KOH structuring and DRIE. The SOI chip is not "floating" but bonded by using flip-chip technology. The fabricated SOI sensor chip has a bridge resistance of 3250 Ω. The realized sensor chip has a sensitivity of 18 mV/µm measured using a bridge current of 1 mA.

Evaluation of a High Temperature SOI Half-Bridge MOSFET Driver, Type CHT-HYPERION

Science.gov (United States)

Patterson, Richard; Hammoud, Ahmad

2010-01-01

Silicon-On-Insulator (SOI) technology utilizes the addition of an insulation layer in its structure to reduce leakage currents and to minimize parasitic junctions. As a result, SOIbased devices exhibit reduced internal heating as compared to the conventional silicon devices, consume less power, and can withstand higher operating temperatures. In addition, SOI electronic integrated circuits display good tolerance to radiation by virtue of introducing barriers or lengthening the path for penetrating particles and/or providing a region for trapping incident ionization. The benefits of these parts make them suitable for use in deep space and planetary exploration missions where extreme temperatures and radiation are encountered. Although designed for high temperatures, very little data exist on the operation of SOI devices and circuits at cryogenic temperatures. In this work, the performance of a commercial-off-the-shelf (COTS) SOI half-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

Performance analysis of SOI MOSFET with rectangular recessed channel

Science.gov (United States)

Singh, M.; Mishra, S.; Mohanty, S. S.; Mishra, G. P.

2016-03-01

In this paper a two dimensional (2D) rectangular recessed channel-silicon on insulator metal oxide semiconductor field effect transistor (RRC-SOI MOSFET), using the concept of groove between source and drain regions, which is one of the channel engineering technique to suppress the short channel effect (SCE). This suppression is mainly due to corner potential barrier of the groove and the simulation is carried out by using ATLAS 2D device simulator. To have further improvement of SCE in RRC-SOI MOSFET, three more devices are designed by using dual material gate (DMG) and gate dielectric technique, which results in formation of devices i.e. DMRRC-SOI,MLSMRRC-SOI, MLDMRRC-SOI MOSFET. The effect of different structures of RRC-SOI on AC and RF parameters are investigated and the importance of these devices over RRC MOSFET regarding short channel effect is analyzed.

Performance analysis of SOI MOSFET with rectangular recessed channel

International Nuclear Information System (INIS)

Singh, M; Mishra, G P; Mishra, S; Mohanty, S S

2016-01-01

In this paper a two dimensional (2D) rectangular recessed channel–silicon on insulator metal oxide semiconductor field effect transistor (RRC-SOI MOSFET), using the concept of groove between source and drain regions, which is one of the channel engineering technique to suppress the short channel effect (SCE). This suppression is mainly due to corner potential barrier of the groove and the simulation is carried out by using ATLAS 2D device simulator. To have further improvement of SCE in RRC-SOI MOSFET, three more devices are designed by using dual material gate (DMG) and gate dielectric technique, which results in formation of devices i.e. DMRRC-SOI,MLSMRRC-SOI, MLDMRRC-SOI MOSFET. The effect of different structures of RRC-SOI on AC and RF parameters are investigated and the importance of these devices over RRC MOSFET regarding short channel effect is analyzed. (paper)

Characterization of pixel sensor designed in 180 nm SOI CMOS technology

Science.gov (United States)

Benka, T.; Havranek, M.; Hejtmanek, M.; Jakovenko, J.; Janoska, Z.; Marcisovska, M.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Vrba, V.

2018-01-01

A new type of X-ray imaging Monolithic Active Pixel Sensor (MAPS), X-CHIP-02, was developed using a 180 nm deep submicron Silicon On Insulator (SOI) CMOS commercial technology. Two pixel matrices were integrated into the prototype chip, which differ by the pixel pitch of 50 μm and 100 μm. The X-CHIP-02 contains several test structures, which are useful for characterization of individual blocks. The sensitive part of the pixel integrated in the handle wafer is one of the key structures designed for testing. The purpose of this structure is to determine the capacitance of the sensitive part (diode in the MAPS pixel). The measured capacitance is 2.9 fF for 50 μm pixel pitch and 4.8 fF for 100 μm pixel pitch at -100 V (default operational voltage). This structure was used to measure the IV characteristics of the sensitive diode. In this work, we report on a circuit designed for precise determination of sensor capacitance and IV characteristics of both pixel types with respect to X-ray irradiation. The motivation for measurement of the sensor capacitance was its importance for the design of front-end amplifier circuits. The design of pixel elements, as well as circuit simulation and laboratory measurement techniques are described. The experimental results are of great importance for further development of MAPS sensors in this technology.

An analysis of radiation effects on electronics and soi-mos devices as an alternative

International Nuclear Information System (INIS)

Ikraiam, F. A.

2013-01-01

The effects of radiation on semiconductors and electronic components are analyzed. The performance of such circuitry depends upon the reliability of electronic devices where electronic components will be unavoidably exposed to radiation. This exposure can be detrimental or even fatal to the expected function of the devices. Single event effects (SEE), in particular, which lead to sudden device or system failure and total dose effects can reduce the lifetime of electronic devices in such systems are discussed. Silicon-on-insulator (SOI) technology is introduced as an alternative for radiation-hardened devices. I-V Characteristics Curves for SOI-MOS devices subjected to a different total radiation doses are illustrated. In addition, properties of some semiconductor materials such as diamond, diamond-like carbon films, SiC, GaP, and AlGaN/GaN are compared with those of SOI devices. The recognition of the potential usefulness of SOI-MOS semiconductor materials for harsh environments is discussed. A summary of radiation effects, impacts and mitigation techniques is also presented. (authors)

Performance of the INTPIX6 SOI pixel detector

International Nuclear Information System (INIS)

Arai, Y.; Miyoshi, T.; Bugiel, Sz.; Dasgupta, R.; Idzik, M.; Kapusta, P.; Turala, M.; Kucewicz, W.

2017-01-01

Characterization of the monolithic pixel detector INPTIX6, designed at KEK and fabricated in Lapis 0.2 μ  m Fully-Depleted, Low-Leakage Silicon-On-Insulator (SOI) CMOS technology, was performed. The INTPIX6 comprises a large area of 1408 × 896 integrating type squared pixels of 12 micron pitch. In this work the performance and measurement results of the prototypes produced on lower resistivity Czochralski type (CZ-n) and high resistivity floating zone (FZ-n) sensor wafers are presented. Using 241 Am radioactive source the noise of INTPIX6 was measured, showing the ENC (Equivalent Noise Charge) of about 70 e − . The resolution calculated from the FWHM of the Iron-55 X-ray peak was about 100 e − . The radiation hardness of the SOI pixel detector was also investigated. The CZ-n type INTPIX6 received a dose of 60 krad and its performance has been continuously monitored during the irradiation.

Performance of the INTPIX6 SOI pixel detector

Science.gov (United States)

Arai, Y.; Bugiel, Sz.; Dasgupta, R.; Idzik, M.; Kapusta, P.; Kucewicz, W.; Miyoshi, T.; Turala, M.

2017-01-01

Characterization of the monolithic pixel detector INPTIX6, designed at KEK and fabricated in Lapis 0.2 μ m Fully-Depleted, Low-Leakage Silicon-On-Insulator (SOI) CMOS technology, was performed. The INTPIX6 comprises a large area of 1408 × 896 integrating type squared pixels of 12 micron pitch. In this work the performance and measurement results of the prototypes produced on lower resistivity Czochralski type (CZ-n) and high resistivity floating zone (FZ-n) sensor wafers are presented. Using 241Am radioactive source the noise of INTPIX6 was measured, showing the ENC (Equivalent Noise Charge) of about 70 e-. The resolution calculated from the FWHM of the Iron-55 X-ray peak was about 100 e-. The radiation hardness of the SOI pixel detector was also investigated. The CZ-n type INTPIX6 received a dose of 60 krad and its performance has been continuously monitored during the irradiation.

Gate Engineering in SOI LDMOS for Device Reliability

Directory of Open Access Journals (Sweden)

Aanand

2016-01-01

Full Text Available A linearly graded doping drift region with step gate structure, used for improvement of reduced surface field (RESURF SOI LDMOS transistor performance has been simulated with 0.35µm technology in this paper. The proposed device has one poly gate and double metal gate arranged in a stepped manner, from channel to drift region. The first gate uses n+ poly (near source where as other two gates of aluminium. The first gate with thin gate oxide has good control over the channel charge. The third gate with thick gate oxide at drift region reduce gate to drain capacitance. The arrangement of second and third gates in a stepped manner in drift region spreads the electric field uniformly. Using two dimensional device simulations, the proposed SOI LDMOS is compared with conventional structure and the extended metal structure. We demonstrate that the proposed device exhibits significant enhancement in linearity, breakdown voltage, on-resistance and HCI. Double metal gate reduces the impact ionization area which helps to improve the Hot Carrier Injection effect..

Le soi et l’estime de soi chez l’enfant: Une revue systématique de la littérature

OpenAIRE

Pinto, Alexandra Maria Pereira Inácio Sequeira; Gatinho, Ana Rita dos Santos; Tereno, Susana; Veríssimo, Manuela

2016-01-01

Cette étude vise : a) à analyser les différentes méthodes utilisées pour l’étude du Soi et chez les enfants, en ce que concerne sa qualité et son potentiel et b) à synthétiser les résultats déjà obtenus en termes de Soi/d’estime de soi/d’autoconcept, pour les enfants en âge préscolaire. Après avoir établi des critères rigoureux d’inclusion et d’exclusion, 33 articles ont été sélectionnés, dans plusieurs bases de données, nationales et international...

Electrical activation of solid-phase epitaxially regrown ultra-low energy boron implants in Ge preamorphised silicon and SOI

International Nuclear Information System (INIS)

Hamilton, J.J.; Collart, E.J.H.; Colombeau, B.; Jeynes, C.; Bersani, M.; Giubertoni, D.; Sharp, J.A.; Cowern, N.E.B.; Kirkby, K.J.

2005-01-01

The formation of highly activated ultra-shallow junctions (USJ) is one of the key requirements for the next generation of CMOS devices. One promising method for achieving this is the use of Ge preamorphising implants (PAI) prior to ultra-low energy B implantation. In future technology nodes, bulk silicon wafers may be supplanted by Silicon-on-Insulator (SOI), and an understanding of the Solid Phase Epitaxial (SPE) regrowth process and its correlation to dopant electrical activation in both bulk silicon and SOI is essential in order to understand the impact of this potential technology change. This kind of understanding will also enable tests of fundamental models for defect evolution and point-defect reactions at silicon/oxide interfaces. In the present work, B is implanted into Ge PAI silicon and SOI wafers with different PAI conditions and B doses, and resulting samples are annealed at various temperatures and times. Glancing-exit Rutherford Backscattering Spectrometry (RBS) is used to monitor the regrowth of the amorphous silicon, and the resulting redistribution and electrical activity of B are monitored by SIMS and Hall measurements. The results confirm the expected enhancement of regrowth velocity by B doping, and show that this velocity is otherwise independent of the substrate type and the Ge implant distribution within the amorphised layer. Hall measurements on isochronally annealed samples show that B deactivates less in SOI material than in bulk silicon, in cases where the Ge PAI end-of-range defects are close to the SOI back interface

Ultrabroadband Hybrid III-V/SOI Grating Reflector for On-chip Lasers

DEFF Research Database (Denmark)

Park, Gyeong Cheol; Taghizadeh, Alireza; Chung, Il-Sug

2016-01-01

We report on a new type of III-V/SOI grating reflector with a broad stopband of 350 nm. This reflector has promising prospects for applications in high-speed III-V/SOI vertical cavity lasers with an improved heat dissipation capability.......We report on a new type of III-V/SOI grating reflector with a broad stopband of 350 nm. This reflector has promising prospects for applications in high-speed III-V/SOI vertical cavity lasers with an improved heat dissipation capability....

Advanced Liquid-Free, Piezoresistive, SOI-Based Pressure Sensors for Measurements in Harsh Environments

Directory of Open Access Journals (Sweden)

Ha-Duong Ngo

2015-08-01

Full Text Available In this paper we present and discuss two innovative liquid-free SOI sensors for pressure measurements in harsh environments. The sensors are capable of measuring pressures at high temperatures. In both concepts media separation is realized using a steel membrane. The two concepts represent two different strategies for packaging of devices for use in harsh environments and at high temperatures. The first one is a “one-sensor-one-packaging_technology” concept. The second one uses a standard flip-chip bonding technique. The first sensor is a “floating-concept”, capable of measuring pressures at temperatures up to 400 °C (constant load with an accuracy of 0.25% Full Scale Output (FSO. A push rod (mounted onto the steel membrane transfers the applied pressure directly to the center-boss membrane of the SOI-chip, which is placed on a ceramic carrier. The chip membrane is realized by Deep Reactive Ion Etching (DRIE or Bosch Process. A novel propertied chip housing employing a sliding sensor chip that is fixed during packaging by mechanical preloading via the push rod is used, thereby avoiding chip movement, and ensuring optimal push rod load transmission. The second sensor can be used up to 350 °C. The SOI chips consists of a beam with an integrated centre-boss with was realized using KOH structuring and DRIE. The SOI chip is not “floating” but bonded by using flip-chip technology. The fabricated SOI sensor chip has a bridge resistance of 3250 Ω. The realized sensor chip has a sensitivity of 18 mV/µm measured using a bridge current of 1 mA.

Thin NbN film structures on SOI for SNSPD

Energy Technology Data Exchange (ETDEWEB)

Il' in, Konstantin; Kurz, Stephan; Henrich, Dagmar; Hofherr, Matthias; Siegel, Michael [IMS, KIT, Karlsruhe (Germany); Semenov, Alexei; Huebers, Heinz-Wilhelm [DLR, Berlin (Germany)

2012-07-01

Superconducting Nanowire Single-Photon Detectors (SNSPD) made from ultra-thin NbN films on sapphire demonstrate almost 100% intrinsic detection efficiency (DE). However the system DE values is less than 10% mostly limited by a very low absorptance of NbN films thinner than 5 nm. Integration of SNSPD in Si photonic circuit is a promising way to overcome this problem. We present results on optimization of technology of thin NbN film nanostructures on SOI (Silicon on Insulator) substrate used in Si photonics technology. Superconducting and normal state properties of these structures important for SNSPD development are presented and discussed.

Investigation of veritcal graded channel doping in nanoscale fully-depleted SOI-MOSFET

Science.gov (United States)

Ramezani, Zeinab; Orouji, Ali A.

2016-10-01

For achieving reliable transistor, we investigate an amended channel doping (ACD) engineering which improves the electrical and thermal performances of fully-depleted silicon-on-insulator (SOI) MOSFET. We have called the proposed structure with the amended channel doping engineering as ACD-SOI structure and compared it with a conventional fully-depleted SOI MOSFET (C-SOI) with uniform doping distribution using 2-D ATLAS simulator. The amended channel doping is a vertical graded doping that is distributed from the surface of structure with high doping density to the bottom of channel, near the buried oxide, with low doping density. Short channel effects (SCEs) and leakage current suppress due to high barrier height near the source region and electric field modification in the ACD-SOI in comparison with the C-SOI structure. Furthermore, by lower electric field and electron temperature near the drain region that is the place of hot carrier generation, we except the improvement of reliability and gate induced drain lowering (GIDL) in the proposed structure. Undesirable Self heating effect (SHE) that become a critical challenge for SOI MOSFETs is alleviated in the ACD-SOI structure because of utilizing low doping density near the buried oxide. Thus, refer to accessible results, the ACD-SOI structure with graded distribution in vertical direction is a reliable device especially in low power and high temperature applications.

Total dose induced latch in short channel NMOS/SOI transistors

International Nuclear Information System (INIS)

Ferlet-Cavrois, V.; Quoizola, S.; Musseau, O.; Flament, O.; Leray, J.L.; Pelloie, J.L.; Raynaud, C.; Faynot, O.

1998-01-01

A latch effect induced by total dose irradiation is observed in short channel SOI transistors. This effect appears on NMOS transistors with either a fully or a partially depleted structure. It is characterized by a hysteresis behavior of the Id-Vg characteristics at high drain bias for a given critical dose. Above this dose, the authors still observe a limited leakage current at low drain bias (0.1 V), but a high conduction current at high drain bias (2 V) as the transistor should be in the off-state. The critical dose above which the latch appears strongly depends on gate length, transistor structure (fully or partially depleted), buried oxide thickness and supply voltage. Two-dimensional (2D) numerical simulations indicate that the parasitic condition is due to the latch of the back gate transistor triggered by charge trapping in the buried oxide. To avoid the latch induced by the floating body effect, different techniques can be used: doping engineering, body contacts, etc. The study of the main parameters influencing the latch (gate length, supply voltage) shows that the scaling of technologies does not necessarily imply an increased latch sensitivity. Some technological parameters like the buried oxide hardness and thickness can be used to avoid latch, even at high cumulated dose, on highly integrated SOI technologies

Croire en soi, croire en l'autre

Directory of Open Access Journals (Sweden)

Eugène Enriquez

2014-04-01

Full Text Available La croyance aux Dieux ou en un Dieu unique c'est-à-dire à l'incroyable est fort répandue et semble normale comme avoir confiance en soi et en l'autre. Mais croire en soi et en l'autre apparaît étonnant car ce serait se mettre sur le même rang que Dieu. Effectivement l'homme essaie de ressembler à Dieu. Mais à Dieu blessé, faillible, s'interrogeant constamment. Ce Dieu nouveau est un "sujet amoureux" amoureux de soi, de l'autre et de la vie. Il se conduit comme un "Dichter" assumant une responsabilité morale. Il est difficile, voire souvent impossible de se situer comme un "Dichter". C'est pourtant la tâche à laquelle l'homme contemporain est confronté.

Performance of an SOI Boot-Strapped Full-Bridge MOSFET Driver, Type CHT-FBDR, under Extreme Temperatures

Science.gov (United States)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems designed for use in deep space and planetary exploration missions are expected to encounter extreme temperatures and wide thermal swings. Silicon-based devices are limited in their wide-temperature capability and usually require extra measures, such as cooling or heating mechanisms, to provide adequate ambient temperature for proper operation. Silicon-On-Insulator (SOI) technology, on the other hand, lately has been gaining wide spread use in applications where high temperatures are encountered. Due to their inherent design, SOI-based integrated circuit chips are able to operate at temperatures higher than those of the silicon devices by virtue of reducing leakage currents, eliminating parasitic junctions, and limiting internal heating. In addition, SOI devices provide faster switching, consume less power, and offer improved radiation-tolerance. Very little data, however, exist on the performance of such devices and circuits under cryogenic temperatures. In this work, the performance of an SOI bootstrapped, full-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

Influence of edge effects on single event upset susceptibility of SOI SRAMs

International Nuclear Information System (INIS)

Gu, Song; Liu, Jie; Zhao, Fazhan; Zhang, Zhangang; Bi, Jinshun; Geng, Chao; Hou, Mingdong; Liu, Gang; Liu, Tianqi; Xi, Kai

2015-01-01

An experimental investigation of the single event upset (SEU) susceptibility for heavy ions at tilted incidence was performed. The differences of SEU cross-sections between tilted incidence and normal incidence at equivalent effective linear energy transfer were 21% and 57% for the silicon-on-insulator (SOI) static random access memories (SRAMs) of 0.5 μm and 0.18 μm feature size, respectively. The difference of SEU cross-section raised dramatically with increasing tilt angle for SOI SRAM of deep-submicron technology. The result of CRÈME-MC simulation for tilted irradiation of the sensitive volume indicates that the energy deposition spectrum has a substantial tail extending into the low energy region. The experimental results show that the influence of edge effects on SEU susceptibility cannot be ignored in particular with device scaling down

Characterizing SOI Wafers By Use Of AOTF-PHI

Science.gov (United States)

Cheng, Li-Jen; Li, Guann-Pyng; Zang, Deyu

1995-01-01

Developmental nondestructive method of characterizing layers of silicon-on-insulator (SOI) wafer involves combination of polarimetric hyperspectral imaging by use of acousto-optical tunable filters (AOTF-PHI) and computational resources for extracting pertinent data on SOI wafers from polarimetric hyperspectral images. Offers high spectral resolution and both ease and rapidity of optical-wavelength tuning. Further efforts to implement all of processing of polarimetric spectral image data in special-purpose hardware for sake of procesing speed. Enables characterization of SOI wafers in real time for online monitoring and adjustment of production. Also accelerates application of AOTF-PHI to other applications in which need for high-resolution spectral imaging, both with and without polarimetry.

VCSELs and silicon light sources exploiting SOI grating mirrors

DEFF Research Database (Denmark)

Chung, Il-Sug; Mørk, Jesper

2012-01-01

In this talk, novel vertical-cavity laser structure consisting of a dielectric Bragg reflector, a III-V active region, and a high-index-contrast grating made in the Si layer of a silicon-on-insulator (SOI) wafer will be presented. In the Si light source version of this laser structure, the SOI...... the Bragg reflector. Numerical simulations show that both the silicon light source and the VCSEL exploiting SOI grating mirrors have superior performances, compared to existing silicon light sources and long wavelength VCSELs. These devices are highly adequate for chip-level optical interconnects as well...

Hybrid III-V/SOI Resonant Cavity Photodetector

DEFF Research Database (Denmark)

Learkthanakhachon, Supannee; Taghizadeh, Alireza; Park, Gyeong Cheol

2016-01-01

A hybrid III-V/SOI resonant cavity photo detector has been demonstrated, which comprises an InP grating reflectorand a Si grating reflector. It can selectively detects an incident light with 1.54-µm wavelength and TM polarization.......A hybrid III-V/SOI resonant cavity photo detector has been demonstrated, which comprises an InP grating reflectorand a Si grating reflector. It can selectively detects an incident light with 1.54-µm wavelength and TM polarization....

Study of CMOS-SOI Integrated Temperature Sensing Circuits for On-Chip Temperature Monitoring.

Science.gov (United States)

Malits, Maria; Brouk, Igor; Nemirovsky, Yael

2018-05-19

This paper investigates the concepts, performance and limitations of temperature sensing circuits realized in complementary metal-oxide-semiconductor (CMOS) silicon on insulator (SOI) technology. It is shown that the MOSFET threshold voltage ( V t ) can be used to accurately measure the chip local temperature by using a V t extractor circuit. Furthermore, the circuit's performance is compared to standard circuits used to generate an accurate output current or voltage proportional to the absolute temperature, i.e., proportional-to-absolute temperature (PTAT), in terms of linearity, sensitivity, power consumption, speed, accuracy and calibration needs. It is shown that the V t extractor circuit is a better solution to determine the temperature of low power, analog and mixed-signal designs due to its accuracy, low power consumption and no need for calibration. The circuit has been designed using 1 µm partially depleted (PD) CMOS-SOI technology, and demonstrates a measurement inaccuracy of ±1.5 K across 300 K⁻500 K temperature range while consuming only 30 µW during operation.

A novel nanoscale SOI MOSFET by embedding undoped region for improving self-heating effect

Science.gov (United States)

Ghaffari, Majid; Orouji, Ali A.

2018-06-01

Because of the low thermal conductivity of the SiO2 (oxide), the Buried Oxide (BOX) layer in a Silicon-On-Insulator Metal-Oxide Semiconductor Field-Effect Transistor (SOI MOSFET) prevents heat dissipation in the silicon layer and causes increase in the device lattice temperature. In this paper, a new technique is proposed for reducing Self-Heating Effects (SHEs). The key idea in the proposed structure is using a Silicon undoped Region (SR) in the nanoscale SOI MOSFET under the drain and channel regions in order to decrease the SHE. The novel transistor is named Silicon undoped Region SOI-MOSFET (SR-SOI). Due to the embedded silicon undoped region in the suitable place, the proposed structure has decreased the device lattice temperature. The location and dimensions of the proposed region have been carefully optimized to achieve the best results. This work has explored enhancement such as decreased maximum lattice temperature, increased electron mobility, increased drain current, lower DC drain conductance and higher DC transconductance and also decreased bandgap energy variations. Also, for modeling of the structure in the SPICE tools, the main characterizations have been extracted such as thermal resistance (RTH), thermal capacitance (CTH), and SHE characteristic frequency (fTH). All parameters are extracted in relation with the AC operation indicate excellent performance of the SR-SOI device. The results show that proposed region is a suitable alternative to oxide as a part of the buried oxide layer in SOI structures and has better performance in high temperature. Using two-dimensional (2-D) and two-carrier device simulation is done comparison of the SR-SOI structure with a Conventional SOI (C-SOI). As a result, the SR-SOI device can be regarded as a useful substitution for the C-SOI device in nanoscale integrated circuits as a reliable device.

Heterojunction fully depleted SOI-TFET with oxide/source overlap

Science.gov (United States)

Chander, Sweta; Bhowmick, B.; Baishya, S.

2015-10-01

In this work, a hetero-junction fully depleted (FD) Silicon-on-Insulator (SOI) Tunnel Field Effect Transistor (TFET) nanostructure with oxide overlap on the Germanium-source region is proposed. Investigations using Synopsys Technology Computer Aided Design (TCAD) simulation tools reveal that the simple oxide overlap on the Germanium-source region increases the tunneling area as well as the tunneling current without degrading the band-to-band tunneling (BTBT) and improves the device performance. More importantly, the improvement is independent of gate overlap. Simulation study shows improvement in ON current, subthreshold swing (SS), OFF current, ION/IOFF ration, threshold voltage and transconductance. The proposed device with hafnium oxide (HfO2)/Aluminium Nitride (AlN) stack dielectric material offers an average subthreshold swing of 22 mV/decade and high ION/IOFF ratio (∼1010) at VDS = 0.4 V. Compared to conventional TFET, the Miller capacitance of the device shows the enhanced performance. The impact of the drain voltage variation on different parameters such as threshold voltage, subthreshold swing, transconductance, and ION/IOFF ration are also found to be satisfactory. From fabrication point of view also it is easy to utilize the existing CMOS process flows to fabricate the proposed device.

Worst-Case Bias During Total Dose Irradiation of SOI Transistors

International Nuclear Information System (INIS)

Ferlet-Cavrois, V.; Colladant, T.; Paillet, P.; Leray, J.-L; Musseau, O.; Schwank, James R.; Shaneyfelt, Marty R.; Pelloie, J.L.; Du Port de Poncharra, J.

2000-01-01

The worst case bias during total dose irradiation of partially depleted SOI transistors (from SNL and from CEA/LETI) is correlated to the device architecture. Experiments and simulations are used to analyze SOI back transistor threshold voltage shift and charge trapping in the buried oxide

The Bridges SOI Model School Program at Palo Verde School, Palo Verde, Arizona.

Science.gov (United States)

Stock, William A.; DiSalvo, Pamela M.

The Bridges SOI Model School Program is an educational service based upon the SOI (Structure of Intellect) Model School curriculum. For the middle seven months of the academic year, all students in the program complete brief daily exercises that develop specific cognitive skills delineated in the SOI model. Additionally, intensive individual…

A novel self-aligned oxygen (SALOX) implanted SOI MOSFET device structure

Science.gov (United States)

Tzeng, J. C.; Baerg, W.; Ting, C.; Siu, B.

The morphology of the novel self-aligned oxygen implanted SOI (SALOX SOI) [1] MOSFET was studied. The channel silicon of SALOX SOI was confirmed to be undamaged single crystal silicon and was connected with the substrate. Buried oxide formed by oxygen implantation in this SALOX SOI structure was shown by a cross section transmission electron micrograph (X-TEM) to be amorphous. The source/drain silicon on top of the buried oxide was single crystal, as shown by the transmission electron diffraction (TED) pattern. The source/drain regions were elevated due to the buried oxide volume expansion. A sharp silicon—silicon dioxide interface between the source/drain silicon and buried oxide was observed by Auger electron spectroscopy (AES). Well behaved n-MOS transistor current voltage characteristics were obtained and showed no I-V kink.

Insulator photocurrents: Application to dose rate hardening of CMOS/SOI integrated circuits

International Nuclear Information System (INIS)

Dupont-Nivet, E.; Coiec, Y.M.; Flament, O.; Tinel, F.

1998-01-01

Irradiation of insulators with a pulse of high energy x-rays can induce photocurrents in the interconnections of integrated circuits. The authors present, here, a new method to measure and analyze this effect together with a simple model. They also demonstrate that these insulator photocurrents have to be taken into account to obtain high levels of dose-rate hardness with CMOS on SOI integrated circuits, especially flip-flops or memory blocks of ASICs. They show that it explains some of the upsets observed in a SRAM embedded in an ASIC

Deep sub-micron FD-SOI for front-end application

International Nuclear Information System (INIS)

Ikeda, H.; Arai, Y.; Hara, K.; Hayakawa, H.; Hirose, K.; Ikegami, Y.; Ishino, H.; Kasaba, Y.; Kawasaki, T.; Kohriki, T.; Martin, E.; Miyake, H.; Mochizuki, A.; Tajima, H.; Tajima, O.; Takahashi, T.; Takashima, T.; Terada, S.; Tomita, H.; Tsuboyama, T.

2007-01-01

In order to confirm benefits of a deep sub-micron FD-SOI and to identify possible issues concerning front-end circuits with the FD-SOI, we have submitted a small design to Oki Electric Industry Co., Ltd. via the multi-chip project service of VDEC, the University of Tokyo. The initial test results and future plans for development are presented

A 2D simulation study and characterization of a novel vertical SOI MOSFET with a smart source/body tie

International Nuclear Information System (INIS)

Lin, Jyi-Tsong; Lee, Tai-Yi; Lin, Kao-Cheng

2008-01-01

A novel vertical silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) with a smart source/body contact, SSBVMOS, is presented here for the first time. 2D simulations reveal that the SSBVMOS reduces self-heating effects, with the lattice temperature reduced by 14% and the hole temperature reduced by 25%. The SSBVMOS also eliminates the floating body effect, something that other SOI vertical MOSFETs are unable to accomplish, regardless of the thickness of the thin film. The SSBVMOS is further found to have a better drain-induced barrier lowering and subthreshold swing than either a conventional vertical MOSFET or an SOI vertical MOSFET. Moreover, these results are achieved using typical pillar heights and buried oxide thicknesses. Should future technological advances allow for lower pillars or thinner buried oxides, the SSBVMOS performance would further increase

Second Harmonic Generation characterization of SOI wafers: Impact of layer thickness and interface electric field

Science.gov (United States)

Damianos, D.; Vitrant, G.; Lei, M.; Changala, J.; Kaminski-Cachopo, A.; Blanc-Pelissier, D.; Cristoloveanu, S.; Ionica, I.

2018-05-01

In this work, we investigate Second Harmonic Generation (SHG) as a non-destructive characterization method for Silicon-On-Insulator (SOI) materials. For thick SOI stacks, the SHG signal is related to the thickness variations of the different layers. However, in thin SOI films, the comparison between measurements and optical modeling suggests a supplementary SHG contribution attributed to the electric fields at the SiO2/Si interfaces. The impact of the electric field at each interface of the SOI on the SHG is assessed. The SHG technique can be used to evaluate interfacial electric fields and consequently interface charge density in SOI materials.

Process optimization of a deep trench isolation structure for high voltage SOI devices

International Nuclear Information System (INIS)

Zhu Kuiying; Qian Qinsong; Zhu Jing; Sun Weifeng

2010-01-01

The process reasons for weak point formation of the deep trench on SOI wafers have been analyzed in detail. An optimized trench process is also proposed. It is found that there are two main reasons: one is over-etching laterally of the silicon on the surface of the buried oxide caused by a fringe effect; and the other is the slow growth rate of the isolation oxide in the concave silicon corner of the trench bottom. In order to improve the isolation performance of the deep trench, two feasible ways for optimizing the trench process are proposed. The improved process thickens the isolation oxide and rounds sharp silicon corners at their weak points, increasing the applied voltage by 15-20 V at the same leakage current. The proposed new trench isolation process has been verified in the foundry's 0.5-μm HV SOI technology. (semiconductor devices)

An SEU resistant 256K SOI SRAM

Science.gov (United States)

Hite, L. R.; Lu, H.; Houston, T. W.; Hurta, D. S.; Bailey, W. E.

1992-12-01

A novel SEU (single event upset) resistant SRAM (static random access memory) cell has been implemented in a 256K SOI (silicon on insulator) SRAM that has attractive performance characteristics over the military temperature range of -55 to +125 C. These include worst-case access time of 40 ns with an active power of only 150 mW at 25 MHz, and a worst-case minimum WRITE pulse width of 20 ns. Measured SEU performance gives an Adams 10 percent worst-case error rate of 3.4 x 10 exp -11 errors/bit-day using the CRUP code with a conservative first-upset LET threshold. Modeling does show that higher bipolar gain than that measured on a sample from the SRAM lot would produce a lower error rate. Measurements show the worst-case supply voltage for SEU to be 5.5 V. Analysis has shown this to be primarily caused by the drain voltage dependence of the beta of the SOI parasitic bipolar transistor. Based on this, SEU experiments with SOI devices should include measurements as a function of supply voltage, rather than the traditional 4.5 V, to determine the worst-case condition.

An SOI CMOS-Based Multi-Sensor MEMS Chip for Fluidic Applications.

Science.gov (United States)

Mansoor, Mohtashim; Haneef, Ibraheem; Akhtar, Suhail; Rafiq, Muhammad Aftab; De Luca, Andrea; Ali, Syed Zeeshan; Udrea, Florin

2016-11-04

An SOI CMOS multi-sensor MEMS chip, which can simultaneously measure temperature, pressure and flow rate, has been reported. The multi-sensor chip has been designed keeping in view the requirements of researchers interested in experimental fluid dynamics. The chip contains ten thermodiodes (temperature sensors), a piezoresistive-type pressure sensor and nine hot film-based flow rate sensors fabricated within the oxide layer of the SOI wafers. The silicon dioxide layers with embedded sensors are relieved from the substrate as membranes with the help of a single DRIE step after chip fabrication from a commercial CMOS foundry. Very dense sensor packing per unit area of the chip has been enabled by using technologies/processes like SOI, CMOS and DRIE. Independent apparatuses were used for the characterization of each sensor. With a drive current of 10 µA-0.1 µA, the thermodiodes exhibited sensitivities of 1.41 mV/°C-1.79 mV/°C in the range 20-300 °C. The sensitivity of the pressure sensor was 0.0686 mV/(V excit kPa) with a non-linearity of 0.25% between 0 and 69 kPa above ambient pressure. Packaged in a micro-channel, the flow rate sensor has a linearized sensitivity of 17.3 mV/(L/min) -0.1 in the tested range of 0-4.7 L/min. The multi-sensor chip can be used for simultaneous measurement of fluid pressure, temperature and flow rate in fluidic experiments and aerospace/automotive/biomedical/process industries.

Simulation Opportunity Index, A Simple and Effective Method to Boost the Hydrocarbon Recovery

KAUST Repository

Saputra, Wardana

2016-09-08

During periods of low oil prices, profitability of field developments drops drastically. To help with this difficulty, a cost-effective method has been proposed to boost the hydrocarbon recovery by optimizing well locations through the Simulated Opportunity Index (SOI). SOI is an intelligent method to identify zones with high potential for production which is empirically calculated from basic rock and fluid properties, and from reservoir pressure as its energy capacity. In order to obtain the best results, the original SOI formula (Molina et al., 2009) was extended to both oil and gas fields. Based on this modified SOI formula, a software program has been developed to locate the best well locations considering multilayer, existing wells, and fault existences. This paper describes how the SOI software helps as a simple, fast, and accurate way to obtain the higher hydrocarbon production than that of trial-error method and previous studies in two different fields located in offshore Indonesia. On one hand, the proposed method could save money by minimizing the required number of wells. On the other hand, it could maximize profit by maximizing recovery.

SOI MESFETs on high-resistivity, trap-rich substrates

Science.gov (United States)

Mehr, Payam; Zhang, Xiong; Lepkowski, William; Li, Chaojiang; Thornton, Trevor J.

2018-04-01

The DC and RF characteristics of metal-semiconductor field-effect-transistors (MESFETs) on conventional CMOS silicon-on-insulator (SOI) substrates are compared to nominally identical devices on high-resistivity, trap-rich SOI substrates. While the DC transfer characteristics are statistically identical on either substrate, the maximum available gain at GHz frequencies is enhanced by ∼2 dB when using the trap-rich substrates, with maximum operating frequencies, fmax, that are approximately 5-10% higher. The increased fmax is explained by the reduced substrate conduction at GHz frequencies using a lumped-element, small-signal model.

L’estime de soi : un cas particulier d’estime sociale ?

OpenAIRE

Santarelli, Matteo

2016-01-01

Un des traits plus originaux de la théorie intersubjective de la reconnaissance d’Axel Honneth, consiste dans la façon dont elle discute la relation entre estime sociale et estime de soi. En particulier, Honneth présente l’estime de soi comme un reflet de l’estime sociale au niveau individuel. Dans cet article, je discute cette conception, en posant la question suivante : l’estime de soi est-elle un cas particulier de l’estime sociale ? Pour ce faire, je me concentre sur deux problèmes crucia...

Performance projections and design optimization of planar double gate SOI MOSFETs for logic technology applications

International Nuclear Information System (INIS)

Kranti, Abhinav; Hao Ying; Armstrong, G Alastair

2008-01-01

In this paper, by investigating the influence of source/drain extension region engineering (also known as gate–source/drain underlap) in nanoscale planar double gate (DG) SOI MOSFETs, we offer new insights into the design of future nanoscale gate-underlap DG devices to achieve ITRS projections for high performance (HP), low standby power (LSTP) and low operating power (LOP) logic technologies. The impact of high-κ gate dielectric, silicon film thickness, together with parameters associated with the lateral source/drain doping profile, is investigated in detail. The results show that spacer width along with lateral straggle can not only effectively control short-channel effects, thus presenting low off-current in a gate underlap device, but can also be optimized to achieve lower intrinsic delay and higher on–off current ratio (I on /I off ). Based on the investigation of on-current (I on ), off-current (I off ), I on /I off , intrinsic delay (τ), energy delay product and static power dissipation, we present design guidelines to select key device parameters to achieve ITRS projections. Using nominal gate lengths for different technologies, as recommended from ITRS specification, optimally designed gate-underlap DG MOSFETs with a spacer-to-straggle (s/σ) ratio of 2.3 for HP/LOP and 3.2 for LSTP logic technologies will meet ITRS projection. However, a relatively narrow range of lateral straggle lying between 7 to 8 nm is recommended. A sensitivity analysis of intrinsic delay, on-current and off-current to important parameters allows a comparative analysis of the various design options and shows that gate workfunction appears to be the most crucial parameter in the design of DG devices for all three technologies. The impact of back gate misalignment on I on , I off and τ is also investigated for optimized underlap devices

An SOI CMOS-Based Multi-Sensor MEMS Chip for Fluidic Applications †

Science.gov (United States)

Mansoor, Mohtashim; Haneef, Ibraheem; Akhtar, Suhail; Rafiq, Muhammad Aftab; De Luca, Andrea; Ali, Syed Zeeshan; Udrea, Florin

2016-01-01

An SOI CMOS multi-sensor MEMS chip, which can simultaneously measure temperature, pressure and flow rate, has been reported. The multi-sensor chip has been designed keeping in view the requirements of researchers interested in experimental fluid dynamics. The chip contains ten thermodiodes (temperature sensors), a piezoresistive-type pressure sensor and nine hot film-based flow rate sensors fabricated within the oxide layer of the SOI wafers. The silicon dioxide layers with embedded sensors are relieved from the substrate as membranes with the help of a single DRIE step after chip fabrication from a commercial CMOS foundry. Very dense sensor packing per unit area of the chip has been enabled by using technologies/processes like SOI, CMOS and DRIE. Independent apparatuses were used for the characterization of each sensor. With a drive current of 10 µA–0.1 µA, the thermodiodes exhibited sensitivities of 1.41 mV/°C–1.79 mV/°C in the range 20–300 °C. The sensitivity of the pressure sensor was 0.0686 mV/(Vexcit kPa) with a non-linearity of 0.25% between 0 and 69 kPa above ambient pressure. Packaged in a micro-channel, the flow rate sensor has a linearized sensitivity of 17.3 mV/(L/min)−0.1 in the tested range of 0–4.7 L/min. The multi-sensor chip can be used for simultaneous measurement of fluid pressure, temperature and flow rate in fluidic experiments and aerospace/automotive/biomedical/process industries. PMID:27827904

A study of process-related electrical defects in SOI lateral bipolar transistors fabricated by ion implantation

Science.gov (United States)

Yau, J.-B.; Cai, J.; Hashemi, P.; Balakrishnan, K.; D'Emic, C.; Ning, T. H.

2018-04-01

We report a systematic study of process-related electrical defects in symmetric lateral NPN transistors on silicon-on-insulator (SOI) fabricated using ion implantation for all the doped regions. A primary objective of this study is to see if pipe defects (emitter-collector shorts caused by locally enhanced dopant diffusion) are a show stopper for such bipolar technology. Measurements of IC-VCE and Gummel currents in parallel-connected transistor chains as a function of post-fabrication rapid thermal anneal cycles allow several process-related electrical defects to be identified. They include defective emitter-base and collector-base diodes, pipe defects, and defects associated with a dopant-deficient region in an extrinsic base adjacent its intrinsic base. There is no evidence of pipe defects being a major concern in SOI lateral bipolar transistors.

Charge accumulation in the buried oxide of SOI structures with the bonded Si/SiO2 interface under γ-irradiation: effect of preliminary ion implantation

International Nuclear Information System (INIS)

Naumova, O V; Fomin, B I; Ilnitsky, M A; Popov, V P

2012-01-01

In this study, we examined the effect of preliminary boron or phosphorous implantation on charge accumulation in the buried oxide of SOI-MOSFETs irradiated with γ-rays in the total dose range (D) of 10 5 –5 × 10 7 rad. The buried oxide was obtained by high-temperature thermal oxidation of Si, and it was not subjected to any implantation during the fabrication process of SOI structures. It was found that implantation with boron or phosphorous ions, used in fabrication technologies of SOI-MOSFETs, increases the concentration of precursor traps in the buried oxide of SOI structures. Unlike in the case of boron implantation, phosphorous implantation leads to an increased density of states at the Si/buried SiO 2 interface during subsequent γ-irradiation. In the γ-irradiated SOI-MOSFETs, the accumulated charge density and the density of surface states in the Si/buried oxide layer systems both vary in proportion to k i ln D. The coefficients k i for as-fabricated and ion-implanted Si/buried SiO 2 systems were evaluated. From the data obtained, it was concluded that a low density of precursor hole traps was a factor limiting the positive charge accumulation in the buried oxide of as-fabricated (non-implanted) SOI structures with the bonded Si/buried SiO 2 interface. (paper)

Development of an X-ray imaging system with SOI pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Nishimura, Ryutaro, E-mail: ryunishi@post.kek.jp [School of High Energy Accelerator Science, SOKENDAI (The Graduate University for Advanced Studies), Oho 1-1, Tsukuba, Ibaraki 305-0801 (Japan); Arai, Yasuo; Miyoshi, Toshinobu [Institute of Particle and Nuclear Studies, High Energy Accelerator Research Organization (KEK-IPNS), Oho 1-1, Tsukuba, Ibaraki 305-0801 (Japan); Hirano, Keiichi; Kishimoto, Shunji; Hashimoto, Ryo [Institute of Materials Structure Science, High Energy Accelerator Research Organization (KEK-IMSS), Oho 1-1, Tsukuba, Ibaraki 305-0801 (Japan)

2016-09-21

An X-ray imaging system employing pixel sensors in silicon-on-insulator technology is currently under development. The system consists of an SOI pixel detector (INTPIX4) and a DAQ system based on a multi-purpose readout board (SEABAS2). To correct a bottleneck in the total throughput of the DAQ of the first prototype, parallel processing of the data taking and storing processes and a FIFO buffer were implemented for the new DAQ release. Due to these upgrades, the DAQ throughput was improved from 6 Hz (41 Mbps) to 90 Hz (613 Mbps). The first X-ray imaging system with the new DAQ software release was tested using 33.3 keV and 9.5 keV mono X-rays for three-dimensional computerized tomography. The results of these tests are presented. - Highlights: • The X-ray imaging system employing the SOI pixel sensor is currently under development. • The DAQ of the first prototype has the bottleneck in the total throughput. • The new DAQ release solve the bottleneck by parallel processing and FIFO buffer. • The new DAQ release was tested using 33.3 keV and 9.5 keV mono X-rays.

Information technology made simple

CERN Document Server

Carter, Roger

1991-01-01

Information Technology: Made Simple covers the full range of information technology topics, including more traditional subjects such as programming languages, data processing, and systems analysis. The book discusses information revolution, including topics about microchips, information processing operations, analog and digital systems, information processing system, and systems analysis. The text also describes computers, computer hardware, microprocessors, and microcomputers. The peripheral devices connected to the central processing unit; the main types of system software; application soft

Single-Event Upset and Scaling Trends in New Generation of the Commercial SOI PowerPC Microprocessors

Science.gov (United States)

Irom, Farokh; Farmanesh, Farhad; Kouba, Coy K.

2006-01-01

Single-event upset effects from heavy ions are measured for Motorola silicon-on-insulator (SOI) microprocessor with 90 nm feature sizes. The results are compared with previous results for SOI microprocessors with feature sizes of 130 and 180 nm. The cross section of the 90 nm SOI processors is smaller than results for 130 and 180 nm counterparts, but the threshold is about the same. The scaling of the cross section with reduction of feature size and core voltage for SOI microprocessors is discussed.

Output-Conductance Transition-Free Method for Improving Radio-Frequency Linearity of SOI MOSFET Circuits

Directory of Open Access Journals (Sweden)

A. Daghighi

2013-09-01

Full Text Available In this article, a novel concept is introduced to improve the radio frequency (RF linearity of partially-depleted (PD silicon-on-insulator (SOI MOSFET circuits. The transition due to the non-zero body resistance (RBody in output conductance of PD SOI devices leads to linearity degradation. A relation for RBody is defined to eliminate the transition and a method to obtain transition-free circuit is shown. 3-D Simulations of various body-contacted devices are carried out to extract the transition-free body resistances. To identify the output conductance transition-free concept and its application to RF circuits, a 2.4 GHz low noise amplifier (LNA is analyzed. Mixed mode device-circuit analysis is carried out to simultaneously solve device transport equations and circuit spice models. FFT calculations are performed on the output signal to compute harmonic distortion figures. Comparing the conventional body-contacted and transition-free SOI LNAs, third harmonic distortion (HD3 and total harmonic distortion (THD are improved by 16% and 24%, respectively. Two-tone test is used to analyze third order intermodulation distortions. OIP3 is improved in transition-free SOI LNA by 17% comparing with the conventional body-contacted SOI LNA. These results show the possibility of application of transition-free design concept to improve linearity of RF SOI MOSFET circuits.

A high voltage SOI pLDMOS with a partial interface equipotential floating buried layer

International Nuclear Information System (INIS)

Wu Lijuan; Zhang Wentong; Zhang Bo; Li Zhaoji

2013-01-01

A novel silicon-on-insulator (SOI) high-voltage pLDMOS is presented with a partial interface equipotential floating buried layer (FBL) and its analytical model is analyzed in this paper. The surface heavily doped p-top layers, interface floating buried N + /P + layers, and three-step field plates are designed carefully in the FBL SOI pLDMOS to optimize the electric field distribution of the drift region and reduce the specific resistance. On the condition of ESIMOX (epoxy separated by implanted oxygen), it has been shown that the breakdown voltage of the FBL SOI pLDMOS is increased from −232 V of the conventional SOI to −425 V and the specific resistance R on,sp is reduced from 0.88 to 0.2424 Ω·cm 2 . (semiconductor devices)

Fabrication and simulation of single crystal p-type Si nanowire using SOI technology

International Nuclear Information System (INIS)

Dehzangi, Arash; Larki, Farhad; Naseri, Mahmud G.; Navasery, Manizheh; Majlis, Burhanuddin Y.; Razip Wee, Mohd F.; Halimah, M.K.; Islam, Md. Shabiul; Md Ali, Sawal H.; Saion, Elias

2015-01-01

Highlights: • Single crystal silicon nanowire is fabricated on Si on insulator substrate, using atomic force microscope (AFM) nanolithography and KOH + IPA chemical wet etching. • Some of major parameters in fabrication process, such as writing speed and applied voltage along with KOH etching depth are investigated, and then the I–V characteristic of Si nanowires is measured. • For better understanding of the charge transmission through the nanowire, 3D-TCAD simulation is performed to simulate the Si nanowires with the same size of the fabricated ones, and variation of majority and minority carriers, hole quasi-Fermi level and generation/recombination rate are investigated. - Abstract: Si nanowires (SiNWs) as building blocks for nanostructured materials and nanoelectronics have attracted much attention due to their major role in device fabrication. In the present work a top-down fabrication approach as atomic force microscope (AFM) nanolithography was performed on Si on insulator (SOI) substrate to fabricate a single crystal p-type SiNW. To draw oxide patterns on top of the SOI substrate local anodic oxidation was carried out by AFM in contact mode. After the oxidation procedure, an optimized solution of 30 wt.% KOH with 10 vol.% IPA for wet etching at 63 °C was applied to extract the nanostructure. The fabricated SiNW had 70–85 nm full width at half maximum width, 90 nm thickness and 4 μm length. The SiNW was simulated using Sentaurus 3D software with the exact same size of the fabricated device. I–V characterization of the SiNW was measured and compared with simulation results. Using simulation results variation of carrier's concentrations, valence band edge energy and recombination generation rate for different applied voltage were investigated

Fabrication and simulation of single crystal p-type Si nanowire using SOI technology

Energy Technology Data Exchange (ETDEWEB)

Dehzangi, Arash, E-mail: arashd53@hotmail.com [Institute of Microengineering and Nanoelectronics (IMEN), Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor (Malaysia); Larki, Farhad [Institute of Microengineering and Nanoelectronics (IMEN), Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor (Malaysia); Naseri, Mahmud G. [Department of Physics, Faculty of Science, Malayer University, Malayer, Hamedan (Iran, Islamic Republic of); Navasery, Manizheh [Department of Physics, Faculty of Science, Universiti Putra Malaysia, 43400 Serdang, Selangor (Malaysia); Majlis, Burhanuddin Y.; Razip Wee, Mohd F. [Institute of Microengineering and Nanoelectronics (IMEN), Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor (Malaysia); Halimah, M.K. [Department of Physics, Faculty of Science, Universiti Putra Malaysia, 43400 Serdang, Selangor (Malaysia); Islam, Md. Shabiul; Md Ali, Sawal H. [Institute of Microengineering and Nanoelectronics (IMEN), Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor (Malaysia); Saion, Elias [Department of Physics, Faculty of Science, Universiti Putra Malaysia, 43400 Serdang, Selangor (Malaysia)

2015-04-15

Highlights: • Single crystal silicon nanowire is fabricated on Si on insulator substrate, using atomic force microscope (AFM) nanolithography and KOH + IPA chemical wet etching. • Some of major parameters in fabrication process, such as writing speed and applied voltage along with KOH etching depth are investigated, and then the I–V characteristic of Si nanowires is measured. • For better understanding of the charge transmission through the nanowire, 3D-TCAD simulation is performed to simulate the Si nanowires with the same size of the fabricated ones, and variation of majority and minority carriers, hole quasi-Fermi level and generation/recombination rate are investigated. - Abstract: Si nanowires (SiNWs) as building blocks for nanostructured materials and nanoelectronics have attracted much attention due to their major role in device fabrication. In the present work a top-down fabrication approach as atomic force microscope (AFM) nanolithography was performed on Si on insulator (SOI) substrate to fabricate a single crystal p-type SiNW. To draw oxide patterns on top of the SOI substrate local anodic oxidation was carried out by AFM in contact mode. After the oxidation procedure, an optimized solution of 30 wt.% KOH with 10 vol.% IPA for wet etching at 63 °C was applied to extract the nanostructure. The fabricated SiNW had 70–85 nm full width at half maximum width, 90 nm thickness and 4 μm length. The SiNW was simulated using Sentaurus 3D software with the exact same size of the fabricated device. I–V characterization of the SiNW was measured and compared with simulation results. Using simulation results variation of carrier's concentrations, valence band edge energy and recombination generation rate for different applied voltage were investigated.

Electrical characterization of thin SOI wafers using lateral MOS transient capacitance measurements

International Nuclear Information System (INIS)

Wang, D.; Ueda, A.; Takada, H.; Nakashima, H.

2006-01-01

A novel electrical evaluation method was proposed for crystal quality characterization of thin Si on insulator (SOI) wafers, which was done by measurement of minority carrier generation lifetime (τ g ) using transient capacitance method for lateral metal-oxide-semiconductor (MOS) capacitor. The lateral MOS capacitors were fabricated on three kinds of thin SOI wafers. The crystal quality difference among these three wafers was clearly shown by the τ g measurement results and discussed from a viewpoint of SOI fabrication. The series resistance influence on the capacitance measurement for this lateral MOS capacitor was discussed in detail. The validity of this method was confirmed by comparing the intensities of photoluminescence signals due to electron-hole droplet in the band-edge emission

Simulation of dual-gate SOI MOSFET with different dielectric layers

Science.gov (United States)

Yadav, Jyoti; Chaudhary, R.; Mukhiya, R.; Sharma, R.; Khanna, V. K.

2016-04-01

The paper presents the process design and simulation of silicon-on-insulator (SOI)-based dual-gate metal oxide field-effect transistor (DG-MOSFET) stacked with different dielectric layers on the top of gate oxide. A detailed 2D process simulation of SOI-MOSFETs and its electrical characterization has been done using SILVACO® TCAD tool. A variation in transconductance was observed with different dielectric layers, AlN-gate MOSFET having the highest tranconductance value as compared to other three dielectric layers (SiO2, Si3N4 and Al2O3).

A 60 GOPS/W, -1.8 V to 0.9 V body bias ULP cluster in 28 nm UTBB FD-SOI technology

Science.gov (United States)

Rossi, Davide; Pullini, Antonio; Loi, Igor; Gautschi, Michael; Gürkaynak, Frank K.; Bartolini, Andrea; Flatresse, Philippe; Benini, Luca

2016-03-01

Ultra-low power operation and extreme energy efficiency are strong requirements for a number of high-growth application areas, such as E-health, Internet of Things, and wearable Human-Computer Interfaces. A promising approach to achieve up to one order of magnitude of improvement in energy efficiency over current generation of integrated circuits is near-threshold computing. However, frequency degradation due to aggressive voltage scaling may not be acceptable across all performance-constrained applications. Thread-level parallelism over multiple cores can be used to overcome the performance degradation at low voltage. Moreover, enabling the processors to operate on-demand and over a wide supply voltage and body bias ranges allows to achieve the best possible energy efficiency while satisfying a large spectrum of computational demands. In this work we present the first ever implementation of a 4-core cluster fabricated using conventional-well 28 nm UTBB FD-SOI technology. The multi-core architecture we present in this work is able to operate on a wide range of supply voltages starting from 0.44 V to 1.2 V. In addition, the architecture allows a wide range of body bias to be applied from -1.8 V to 0.9 V. The peak energy efficiency 60 GOPS/W is achieved at 0.5 V supply voltage and 0.5 V forward body bias. Thanks to the extended body bias range of conventional-well FD-SOI technology, high energy efficiency can be guaranteed for a wide range of process and environmental conditions. We demonstrate the ability to compensate for up to 99.7% of chips for process variation with only ±0.2 V of body biasing, and compensate temperature variation in the range -40 °C to 120 °C exploiting -1.1 V to 0.8 V body biasing. When compared to leading-edge near-threshold RISC processors optimized for extremely low power applications, the multi-core architecture we propose has 144× more performance at comparable energy efficiency levels. Even when compared to other low-power processors

One-dimensional breakdown voltage model of SOI RESURF lateral power device based on lateral linearly graded approximation

International Nuclear Information System (INIS)

Zhang Jun; Guo Yu-Feng; Xu Yue; Lin Hong; Yang Hui; Hong Yang; Yao Jia-Fei

2015-01-01

A novel one-dimensional (1D) analytical model is proposed for quantifying the breakdown voltage of a reduced surface field (RESURF) lateral power device fabricated on silicon on an insulator (SOI) substrate. We assume that the charges in the depletion region contribute to the lateral PN junctions along the diagonal of the area shared by the lateral and vertical depletion regions. Based on the assumption, the lateral PN junction behaves as a linearly graded junction, thus resulting in a reduced surface electric field and high breakdown voltage. Using the proposed model, the breakdown voltage as a function of device parameters is investigated and compared with the numerical simulation by the TCAD tools. The analytical results are shown to be in fair agreement with the numerical results. Finally, a new RESURF criterion is derived which offers a useful scheme to optimize the structure parameters. This simple 1D model provides a clear physical insight into the RESURF effect and a new explanation on the improvement in breakdown voltage in an SOI RESURF device. (paper)

A novel δ-doped partially insulated dopant-segregated Schottky barrier SOI MOSFET for analog/RF applications

International Nuclear Information System (INIS)

Patil, Ganesh C; Qureshi, S

2011-01-01

In this paper, a comparative analysis of single-gate dopant-segregated Schottky barrier (DSSB) SOI MOSFET and raised source/drain ultrathin-body SOI MOSFET (RSD UTB) has been carried out to explore the thermal efficiency, scalability and analog/RF performance of these devices. A novel p-type δ-doped partially insulated DSSB SOI MOSFET (DSSB Pi-OX-δ) has been proposed to reduce the self-heating effect and to improve the high-frequency performance of DSSB SOI MOSFET over RSD UTB. The improved analog/RF figures of merit such as transconductance, transconductance generation factor, unity-gain frequency, maximum oscillation frequency, short-circuit current gain and unilateral power gain in DSSB Pi-OX-δ MOSFET show the suitability of this device for analog/RF applications. The reduced drain-induced barrier lowering, subthreshold swing and parasitic capacitances also make this device highly scalable. By using mixed-mode simulation capability of MEDICI simulator a cascode amplifier has been implemented using all the structures (RSD UTB, DSSB SOI and DSSB Pi-OX-δ MOSFETs). The results of this implementation show that the gain-bandwidth product in the case of DSSB Pi-OX-δ MOSFET has improved by 50% as compared to RSD UTB and by 20% as compared to DSSB SOI MOSFET. The detailed fabrication flow of DSSB Pi-OX-δ MOSFET has been proposed which shows that with the bare minimum of steps the performance of DSSB SOI MOSFET can be improved significantly in comparison to RSD UTB

SOI silicon on glass for optical MEMS

DEFF Research Database (Denmark)

Larsen, Kristian Pontoppidan; Ravnkilde, Jan Tue; Hansen, Ole

2003-01-01

and a final sealing at the interconnects can be performed using a suitable polymer. Packaged MEMS on glass are advantageous within Optical MEMS and for sensitive capacitive devices. We report on experiences with bonding SOI to Pyrex. Uniform DRIE shallow and deep etching was achieved by a combination......A newly developed fabrication method for fabrication of single crystalline Si (SCS) components on glass, utilizing Deep Reactive Ion Etching (DRIE) of a Silicon On Insulator (SOI) wafer is presented. The devices are packaged at wafer level in a glass-silicon-glass (GSG) stack by anodic bonding...... of an optimized device layout and an optimized process recipe. The behavior of the buried oxide membrane when used as an etch stop for the through-hole etch is described. No harmful buckling or fracture of the membrane is observed for an oxide thickness below 1 μm, but larger and more fragile released structures...

DOUBLE BOSS SCULPTURED DIAPHRAGM EMPLOYED PIEZORESISTIVE MEMS PRESSURE SENSOR WITH SILICON-ON-INSULATOR (SOI

Directory of Open Access Journals (Sweden)

D. SINDHANAISELVI

2017-07-01

Full Text Available This paper presents the detailed study on the measurement of low pressure sensor using double boss sculptured diaphragm of piezoresistive type with MEMS technology in flash flood level measurement. The MEMS based very thin diaphragms to sense the low pressure is analyzed by introducing supports to achieve linearity. The simulation results obtained from Intellisuite MEMS CAD design tool show that very thin diaphragms with rigid centre or boss give acceptable linearity. Further investigations on very thin diaphragms embedded with piezoresistor for low pressure measurement show that it is essential to analyse the piezoresistor placement and size of piezoresistor to achieve good sensitivity. A modified analytical modelling developed in this study for double boss sculptured diaphragm results were compared with simulated results. Further the enhancement of sensitivity is analyzed using non uniform thickness diaphragm and Silicon-On-Insulator (SOI technique. The simulation results indicate that the double boss square sculptured diaphragm with SOI layer using 0.85μm thickness yields the higher voltage sensitivity, acceptable linearity with Small Scale Deflection.

A Demonstration of TIA Using FD-SOI CMOS OPAMP for Far-Infrared Astronomy

Science.gov (United States)

Nagase, Koichi; Wada, Takehiko; Ikeda, Hirokazu; Arai, Yasuo; Ohno, Morifumi; Hanaoka, Misaki; Kanada, Hidehiro; Oyabu, Shinki; Hattori, Yasuki; Ukai, Sota; Suzuki, Toyoaki; Watanabe, Kentaroh; Baba, Shunsuke; Kochi, Chihiro; Yamamoto, Keita

2016-07-01

We are developing a fully depleted silicon-on-insulator (FD-SOI) CMOS readout integrated circuit (ROIC) operated at temperatures below ˜ 4 K. Its application is planned for the readout circuit of high-impedance far-infrared detectors for astronomical observations. We designed a trans-impedance amplifier (TIA) using a CMOS operational amplifier (OPAMP) with FD-SOI technique. The TIA is optimized to readout signals from a germanium blocked impurity band (Ge BIB) detector which is highly sensitive to wavelengths of up to ˜ 200 \\upmu m. For the first time, we demonstrated the FD-SOI CMOS OPAMP combined with the Ge BIB detector at 4.5 K. The result promises to solve issues faced by conventional cryogenic ROICs.

Indium arsenide-on-SOI MOSFETs with extreme lattice mismatch

Science.gov (United States)

Wu, Bin

Both molecular beam epitaxy (MBE) and metal organic chemical vapor deposition (MOCVD) have been used to explore the growth of InAs on Si. Despite 11.6% lattice mismatch, planar InAs structures have been observed by scanning electron microscopy (SEM) when nucleating using MBE on patterned submicron Si-on-insulator (SOI) islands. Planar structures of size as large as 500 x 500 nm 2 and lines of width 200 nm and length a few microns have been observed. MOCVD growth of InAs also generates single grain structures on Si islands when the size is reduced to 100 x 100 nm2. By choosing SOI as the growth template, selective growth is enabled by MOCVD. Post-growth pattern-then-anneal process, in which MOCVD InAs is deposited onto unpatterned SOI followed with patterning and annealing of InAs-on-Si structure, is found to change the relative lattice parameters of encapsulated 17/5 nm InAs/Si island. Observed from transmission electron diffraction (TED) patterns, the lattice mismatch of 17/5 nm InAs/Si island reduces from 11.2 to 4.2% after being annealed at 800°C for 30 minutes. High-k Al2O3 dielectrics have been deposited by both electron-beam-enabled physical vapor deposition (PVD) and atomic layer deposition (ALD). Films from both techniques show leakage currents on the order of 10-9A/cm2, at ˜1 MV/cm electric field, breakdown field > ˜6 MV/cm, and dielectric constant > 6, comparable to those of reported ALD prior arts by Groner. The first MOSFETs with extreme lattice mismatch InAs-on-SOI channels using PVD Al2O3 as the gate dielectric are characterized. Channel recess was used to improve the gate control of the drain current.

Formation of SIMOX–SOI structure by high-temperature oxygen implantation

International Nuclear Information System (INIS)

Hoshino, Yasushi; Kamikawa, Tomohiro; Nakata, Jyoji

2015-01-01

We have performed oxygen ion implantation in silicon at very high substrate-temperatures (⩽1000 °C) for the purpose of forming silicon-on-insulator (SOI) structure. We have expected that the high-temperature implantation can effectively avoids ion-beam-induced damages in the SOI layer and simultaneously stabilizes the buried oxide (BOX) and SOI-Si layer. Such a high-temperature implantation makes it possible to reduce the post-implantation annealing temperature. In the present study, oxygen ions with 180 keV are incident on Si(0 0 1) substrates at various temperatures from room temperature (RT) up to 1000 °C. The ion-fluencies are in order of 10"1"7–10"1"8 ions/cm"2. Samples have been analyzed by atomic force microscope, Rutherford backscattering, and micro-Raman spectroscopy. It is found in the AFM analysis that the surface roughness of the samples implanted at 500 °C or below are significantly small with mean roughness of less than 1 nm, and gradually increased for the 800 °C-implanted sample. On the other hand, a lot of dents are observed for the 1000 °C-implanted sample. RBS analysis has revealed that stoichiometric SOI-Si and BOX-SiO_2 layers are formed by oxygen implantation at the substrate temperatures of RT, 500, and 800 °C. However, SiO_2-BOX layer has been desorbed during the implantation. Raman spectra shows that the ion-beam-induced damages are fairly suppressed by such a high-temperatures implantation.

A novel SOI pressure sensor for high temperature application

International Nuclear Information System (INIS)

Li Sainan; Liang Ting; Wang Wei; Hong Yingping; Zheng Tingli; Xiong Jijun

2015-01-01

The silicon on insulator (SOI) high temperature pressure sensor is a novel pressure sensor with high-performance and high-quality. A structure of a SOI high-temperature pressure sensor is presented in this paper. The key factors including doping concentration and power are analyzed. The process of the sensor is designed with the critical process parameters set appropriately. The test result at room temperature and high temperature shows that nonlinear error below is 0.1%, and hysteresis is less than 0.5%. High temperature measuring results show that the sensor can be used for from room temperature to 350 °C in harsh environments. It offers a reference for the development of high temperature piezoresistive pressure sensors. (semiconductor devices)

Generation and confinement of mobile charges in buried oxide of SOI substrates; Generation et confinement de charges mobiles dans les oxydes enterres de substrats SOI

Energy Technology Data Exchange (ETDEWEB)

Gruber, O.; Krawiec, S.; Musseau, O.; Paillet, Ph.; Courtot-Descharles, A. [CEA Bruyeres-le-Chatel, DIF, 91 (France)

1999-07-01

We analyze the mechanisms of generation and confinement of mobile protons resulting from hydrogen annealing of SOI buried oxides. This study of the mechanisms of generation and confinement of mobile protons in the buried oxide of SOI wafers emphasizes the importance of H+ diffusion in the oxide in the formation of a mobile charge. Under specific electric field conditions the irradiation of these devices results in a pinning of this mobile charge at the bottom Si-SiO{sub 2} interface. Ab initio calculations are in progress to investigate the possible precursor defects in the oxide and detail the mechanism for mobile proton generation and confinement. (authors)

Ultra-low specific on-resistance SOI double-gate trench-type MOSFET

International Nuclear Information System (INIS)

Lei Tianfei; Luo Xiaorong; Ge Rui; Chen Xi; Wang Yuangang; Yao Guoliang; Jiang Yongheng; Zhang Bo; Li Zhaoji

2011-01-01

An ultra-low specific on-resistance (R on,sp ) silicon-on-insulator (SOI) double-gate trench-type MOSFET (DG trench MOSFET) is proposed. The MOSFET features double gates and an oxide trench: the oxide trench is in the drift region, one trench gate is inset in the oxide trench and one trench gate is extended into the buried oxide. Firstly, the double gates reduce R on,sp by forming dual conduction channels. Secondly, the oxide trench not only folds the drift region, but also modulates the electric field, thereby reducing device pitch and increasing the breakdown voltage (BV). ABV of 93 V and a R on,sp of 51.8 mΩ·mm 2 is obtained for a DG trench MOSFET with a 3 μm half-cell pitch. Compared with a single-gate SOI MOSFET (SG MOSFET) and a single-gate SOI MOSFET with an oxide trench (SG trench MOSFET), the R on,sp of the DG trench MOSFET decreases by 63.3% and 33.8% at the same BV, respectively. (semiconductor devices)

Electron mobility in the inversion layers of fully depleted SOI films

Energy Technology Data Exchange (ETDEWEB)

Zaitseva, E. G., E-mail: ZaytsevaElza@yandex.ru; Naumova, O. V.; Fomin, B. I. [Russian Academy of Sciences, Rzhanov Institute of Semiconductor Physics, Siberian Branch (Russian Federation)

2017-04-15

The dependences of the electron mobility μ{sub eff} in the inversion layers of fully depleted double–gate silicon-on-insulator (SOI) metal–oxide–semiconductor (MOS) transistors on the density N{sub e} of induced charge carriers and temperature T are investigated at different states of the SOI film (inversion–accumulation) from the side of one of the gates. It is shown that at a high density of induced charge carriers of N{sub e} > 6 × 10{sup 12} cm{sup –2} the μeff(T) dependences allow the components of mobility μ{sub eff} that are related to scattering at surface phonons and from the film/insulator surface roughness to be distinguished. The μ{sub eff}(N{sub e}) dependences can be approximated by the power functions μ{sub eff}(N{sub e}) ∝ N{sub e}{sup −n}. The exponents n in the dependences and the dominant mechanisms of scattering of electrons induced near the interface between the SOI film and buried oxide are determined for different N{sub e} ranges and film states from the surface side.

Ultra compact triplexing filters based on SOI nanowire AWGs

Science.gov (United States)

Jiashun, Zhang; Junming, An; Lei, Zhao; Shijiao, Song; Liangliang, Wang; Jianguang, Li; Hongjie, Wang; Yuanda, Wu; Xiongwei, Hu

2011-04-01

An ultra compact triplexing filter was designed based on a silicon on insulator (SOI) nanowire arrayed waveguide grating (AWG) for fiber-to-the-home FTTH. The simulation results revealed that the design performed well in the sense of having a good triplexing function. The designed SOI nanowire AWGs were fabricated using ultraviolet lithography and induced coupler plasma etching. The experimental results showed that the crosstalk was less than -15 dB, and the 3 dB-bandwidth was 11.04 nm. The peak wavelength output from ports a, c, and b were 1455, 1510 and 1300 nm, respectively, which deviated from our original expectations. The deviation of the wavelength is mainly caused by 45 nm width deviation of the arrayed waveguides during the course of the fabrication process and partly caused by material dispersion.

Design and fabrication of piezoresistive p-SOI Wheatstone bridges for high-temperature applications

Science.gov (United States)

Kähler, Julian; Döring, Lutz; Merzsch, Stephan; Stranz, Andrej; Waag, Andreas; Peiner, Erwin

2011-06-01

For future measurements while depth drilling, commercial sensors are required for a temperature range from -40 up to 300 °C. Conventional piezoresistive silicon sensors cannot be used at higher temperatures due to an exponential increase of leakage currents which results in a drop of the bridge voltage. A well-known procedure to expand the temperature range of silicon sensors and to reduce leakage currents is to employ Silicon-On-Insulator (SOI) instead of standard wafer material. Diffused resistors can be operated up to 200 °C, but show the same problems beyond due to leakage of the p-njunction. Our approach is to use p-SOI where resistors as well as interconnects are defined by etching down to the oxide layer. Leakage is suppressed and the temperature dependence of the bridges is very low (TCR = (2.6 +/- 0.1) μV/K@1 mA up to 400 °C). The design and process flow will be presented in detail. The characteristics of Wheatstone bridges made of silicon, n- SOI, and p-SOI will be shown for temperatures up to 300 °C. Besides, thermal FEM-simulations will be described revealing the effect of stress between silicon and the silicon-oxide layer during temperature cycling.

Impact of back-gate bias on the hysteresis effect in partially depleted SOI MOSFETs

International Nuclear Information System (INIS)

Luo Jie-Xin; Chen Jing; Zhou Jian-Hua; Wu Qing-Qing; Chai Zhan; Yu Tao; Wang Xi

2012-01-01

The hysteresis effect in the output characteristics, originating from the floating body effect, has been measured in partially depleted (PD) silicon-on-insulator (SOI) MOSFETs at different back-gate biases. I D hysteresis has been developed to clarify the hysteresis characteristics. The fabricated devices show the positive and negative peaks in the I D hysteresis. The experimental results show that the I D hysteresis is sensitive to the back gate bias in 0.13-μm PD SOI MOSFETs and does not vary monotonously with the back-gate bias. Based on the steady-state Shockley-Read-Hall (SRH) recombination theory, we have successfully interpreted the impact of the back-gate bias on the hysteresis effect in PD SOI MOSFETs. (condensed matter: structural, mechanical, and thermal properties)

A linear 180 nm SOI CMOS antenna switch module using integrated passive device filters for cellular applications

Science.gov (United States)

Jie, Cui; Lei, Chen; Peng, Zhao; Xu, Niu; Yi, Liu

2014-06-01

A broadband monolithic linear single pole, eight throw (SP8T) switch has been fabricated in 180 nm thin film silicon-on-insulator (SOI) CMOS technology with a quad-band GSM harmonic filter in integrated passive devices (IPD) technology, which is developed for cellular applications. The antenna switch module (ASM) features 1.2 dB insertion loss with filter on 2G bands and 0.4 dB insertion loss in 3G bands, less than -45 dB isolation and maximum -103 dB intermodulation distortion for mobile front ends by applying distributed architecture and adaptive supply voltage generator.

High performance flexible CMOS SOI FinFETs

KAUST Repository

Fahad, Hossain M.

2014-06-01

We demonstrate the first ever CMOS compatible soft etch back based high performance flexible CMOS SOI FinFETs. The move from planar to non-planar FinFETs has enabled continued scaling down to the 14 nm technology node. This has been possible due to the reduction in off-state leakage and reduced short channel effects on account of the superior electrostatic charge control of multiple gates. At the same time, flexible electronics is an exciting expansion opportunity for next generation electronics. However, a fully integrated low-cost system will need to maintain ultra-large-scale-integration density, high performance and reliability - same as today\\'s traditional electronics. Up until recently, this field has been mainly dominated by very weak performance organic electronics enabled by low temperature processes, conducive to low melting point plastics. Now however, we show the world\\'s highest performing flexible version of 3D FinFET CMOS using a state-of-the-art CMOS compatible fabrication technique for high performance ultra-mobile consumer applications with stylish design. © 2014 IEEE.

Ultra compact triplexing filters based on SOI nanowire AWGs

Energy Technology Data Exchange (ETDEWEB)

Zhang Jiashun; An Junming; Zhao Lei; Song Shijiao; Wang Liangliang; Li Jianguang; Wang Hongjie; Wu Yuanda; Hu Xiongwei, E-mail: junming@red.semi.ac.cn [State Key Laboratory on Integrated Optoelectronics, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083 (China)

2011-04-15

An ultra compact triplexing filter was designed based on a silicon on insulator (SOI) nanowire arrayed waveguide grating (AWG) for fiber-to-the-home FTTH. The simulation results revealed that the design performed well in the sense of having a good triplexing function. The designed SOI nanowire AWGs were fabricated using ultraviolet lithography and induced coupler plasma etching. The experimental results showed that the crosstalk was less than -15 dB, and the 3 dB-bandwidth was 11.04 nm. The peak wavelength output from ports a, c, and b were 1455, 1510 and 1300 nm, respectively, which deviated from our original expectations. The deviation of the wavelength is mainly caused by 45 nm width deviation of the arrayed waveguides during the course of the fabrication process and partly caused by material dispersion. (semiconductor devices)

Ultra compact triplexing filters based on SOI nanowire AWGs

International Nuclear Information System (INIS)

Zhang Jiashun; An Junming; Zhao Lei; Song Shijiao; Wang Liangliang; Li Jianguang; Wang Hongjie; Wu Yuanda; Hu Xiongwei

2011-01-01

An ultra compact triplexing filter was designed based on a silicon on insulator (SOI) nanowire arrayed waveguide grating (AWG) for fiber-to-the-home FTTH. The simulation results revealed that the design performed well in the sense of having a good triplexing function. The designed SOI nanowire AWGs were fabricated using ultraviolet lithography and induced coupler plasma etching. The experimental results showed that the crosstalk was less than -15 dB, and the 3 dB-bandwidth was 11.04 nm. The peak wavelength output from ports a, c, and b were 1455, 1510 and 1300 nm, respectively, which deviated from our original expectations. The deviation of the wavelength is mainly caused by 45 nm width deviation of the arrayed waveguides during the course of the fabrication process and partly caused by material dispersion. (semiconductor devices)

Comparative study of SOI/Si hybrid substrates fabricated using high-dose and low-dose oxygen implantation

International Nuclear Information System (INIS)

Dong Yemin; Chen Meng; Chen Jing; Wang Xiang; Wang Xi

2004-01-01

Hybrid substrates comprising both silicon-on-insulator (SOI) and bulk Si regions have been fabricated using the technique of patterned separation by implantation of oxygen (SIMOX) with high-dose (1.5 x 10 18 cm -2 ) and low-dose ((1.5-3.5) x 10 17 cm -2 ) oxygen ions, respectively. Cross-sectional transmission electron microscopy (XTEM) was employed to examine the microstructures of the resulting materials. Experimental results indicate that the SOI/Si hybrid substrate fabricated using high-dose SIMOX is of inferior quality with very large surface height step and heavily damaged transitions between the SOI and bulk regions. However, the quality of the SOI/Si hybrid substrate is enhanced dramatically by reducing the implant dose. The defect density in transitions is reduced considerably. Moreover, the expected surface height difference does not exist and the surface is exceptionally flat. The possible mechanisms responsible for the improvements in quality are discussed

SOI Digital Accelerometer Based on Pull-in Time Configuration

NARCIS (Netherlands)

Pakula, L.S.; Rajaraman, V.; French, P.J.

2009-01-01

The operation principle, design, fabrication and measurement results of a quasi digital accelerometer fabricated on a thin silicon-on-insulator (SOI) substrate is presented. The accelerometer features quasi-digital output, therefore eliminating the need for analogue signal conditioning. The

Performance study of double SOI image sensors

Science.gov (United States)

Miyoshi, T.; Arai, Y.; Fujita, Y.; Hamasaki, R.; Hara, K.; Ikegami, Y.; Kurachi, I.; Nishimura, R.; Ono, S.; Tauchi, K.; Tsuboyama, T.; Yamada, M.

2018-02-01

Double silicon-on-insulator (DSOI) sensors composed of two thin silicon layers and one thick silicon layer have been developed since 2011. The thick substrate consists of high resistivity silicon with p-n junctions while the thin layers are used as SOI-CMOS circuitry and as shielding to reduce the back-gate effect and crosstalk between the sensor and the circuitry. In 2014, a high-resolution integration-type pixel sensor, INTPIX8, was developed based on the DSOI concept. This device is fabricated using a Czochralski p-type (Cz-p) substrate in contrast to a single SOI (SSOI) device having a single thin silicon layer and a Float Zone p-type (FZ-p) substrate. In the present work, X-ray spectra of both DSOI and SSOI sensors were obtained using an Am-241 radiation source at four gain settings. The gain of the DSOI sensor was found to be approximately three times that of the SSOI device because the coupling capacitance is reduced by the DSOI structure. An X-ray imaging demonstration was also performed and high spatial resolution X-ray images were obtained.

Analysis and modeling of wafer-level process variability in 28 nm FD-SOI using split C-V measurements

Science.gov (United States)

Pradeep, Krishna; Poiroux, Thierry; Scheer, Patrick; Juge, André; Gouget, Gilles; Ghibaudo, Gérard

2018-07-01

This work details the analysis of wafer level global process variability in 28 nm FD-SOI using split C-V measurements. The proposed approach initially evaluates the native on wafer process variability using efficient extraction methods on split C-V measurements. The on-wafer threshold voltage (VT) variability is first studied and modeled using a simple analytical model. Then, a statistical model based on the Leti-UTSOI compact model is proposed to describe the total C-V variability in different bias conditions. This statistical model is finally used to study the contribution of each process parameter to the total C-V variability.

A technique for simultaneously improving the product of cutoff frequency–breakdown voltage and thermal stability of SOI SiGe HBT

International Nuclear Information System (INIS)

Fu Qiang; Zhang Wan-Rong; Jin Dong-Yue; Zhao Yan-Xiao; Wang Xiao

2016-01-01

The product of the cutoff frequency and breakdown voltage ( f T ×BV CEO ) is an important figure of merit (FOM) to characterize overall performance of heterojunction bipolar transistor (HBT). In this paper, an approach to introducing a thin N + -buried layer into N collector region in silicon-on-insulator (SOI) SiGe HBT to simultaneously improve the FOM of f T ×BV CEO and thermal stability is presented by using two-dimensional (2D) numerical simulation through SILVACO device simulator. Firstly, in order to show some disadvantages of the introduction of SOI structure, the effects of SOI insulation layer thickness ( T BOX ) on f T , BV CEO , and the FOM of f T ×BV CEO are presented. The introduction of SOI structure remarkably reduces the electron concentration in collector region near SOI substrate insulation layer, obviously reduces f T , slightly increases BV CEO to some extent, but ultimately degrades the FOM of f T ×BV CEO . Although the f T , BV CEO , and the FOM of f T ×BV CEO can be improved by increasing SOI insulator SiO 2 layer thickness T BOX in SOI structure, the device temperature and collector current are increased due to lower thermal conductivity of SiO 2 layer, as a result, the self-heating effect of the device is enhanced, and the thermal stability of the device is degraded. Secondly, in order to alleviate the foregoing problem of low electron concentration in collector region near SOI insulation layer and the thermal stability resulting from thick T BOX , a thin N + -buried layer is introduced into collector region to not only improve the FOM of f T ×BV CEO , but also weaken the self-heating effect of the device, thus improving the thermal stability of the device. Furthermore, the effect of the location of the thin N + -buried layer in collector region is investigated in detail. The result show that the FOM of f T ×BV CEO is improved and the device temperature decreases as the N + -buried layer shifts toward SOI substrate insulation layer

A linear 180 nm SOI CMOS antenna switch module using integrated passive device filters for cellular applications

International Nuclear Information System (INIS)

Cui Jie; Chen Lei; Liu Yi; Zhao Peng; Niu Xu

2014-01-01

A broadband monolithic linear single pole, eight throw (SP8T) switch has been fabricated in 180 nm thin film silicon-on-insulator (SOI) CMOS technology with a quad-band GSM harmonic filter in integrated passive devices (IPD) technology, which is developed for cellular applications. The antenna switch module (ASM) features 1.2 dB insertion loss with filter on 2G bands and 0.4 dB insertion loss in 3G bands, less than −45 dB isolation and maximum −103 dB intermodulation distortion for mobile front ends by applying distributed architecture and adaptive supply voltage generator. (semiconductor integrated circuits)

A graphene spin diode based on Rashba SOI

International Nuclear Information System (INIS)

Mohammadpour, Hakimeh

2015-01-01

In this paper a graphene-based two-terminal electronic device is modeled for application in spintronics. It is based on a gapped armchair graphene nanoribbon (GNR). The electron transport is considered through a scattering or channel region which is sandwiched between two lateral semi-infinite ferromagnetic leads. The two ferromagnetic leads, being half-metallic, are supposed to be in either parallel or anti-parallel magnetization. Meanwhile, the central channel region is a normal layer under the influence of the Rashba SOI, induced e.g., by the substrate. The device operation is based on modulating the (spin-) current by tuning the strength of the RSOI. The resultant current, being spin-polarized, is controlled by the RSOI in mutual interplay with the channel length. Inverting alternating bias voltage to a fully rectified spin-current is the main achievement of this paper. - Highlights: • Graphene-based electronic device is modeled with ferromagnetic leads. • The device operation is based on modulating the (spin-) current by Rashba SOI. • Inverting alternating bias voltage to rectified spin-current is the main achievement

Generation and confinement of mobile charges in buried oxide of SOI substrates

International Nuclear Information System (INIS)

Gruber, O.; Krawiec, S.; Musseau, O.; Paillet, Ph.; Courtot-Descharles, A.

1999-01-01

We analyze the mechanisms of generation and confinement of mobile protons resulting from hydrogen annealing of SOI buried oxides. This study of the mechanisms of generation and confinement of mobile protons in the buried oxide of SOI wafers emphasizes the importance of H+ diffusion in the oxide in the formation of a mobile charge. Under specific electric field conditions the irradiation of these devices results in a pinning of this mobile charge at the bottom Si-SiO 2 interface. Ab initio calculations are in progress to investigate the possible precursor defects in the oxide and detail the mechanism for mobile proton generation and confinement. (authors)

arXiv Charge collection properties in an irradiated pixel sensor built in a thick-film HV-SOI process

CERN Document Server

INSPIRE-00541780; Cindro, V.; Gorišek, A.; Hemperek, T.; Kishishita, T.; Kramberger, G.; Krüger, H.; Mandić, I.; Mikuž, M.; Wermes, N.; Zavrtanik, M.

2017-10-25

Investigation of HV-CMOS sensors for use as a tracking detector in the ATLAS experiment at the upgraded LHC (HL-LHC) has recently been an active field of research. A potential candidate for a pixel detector built in Silicon-On-Insulator (SOI) technology has already been characterized in terms of radiation hardness to TID (Total Ionizing Dose) and charge collection after a moderate neutron irradiation. In this article we present results of an extensive irradiation hardness study with neutrons up to a fluence of 1x10e16 neq/cm2. Charge collection in a passive pixelated structure was measured by Edge Transient Current Technique (E-TCT). The evolution of the effective space charge concentration was found to be compliant with the acceptor removal model, with the minimum of the space charge concentration being reached after 5x10e14 neq/cm2. An investigation of the in-pixel uniformity of the detector response revealed parasitic charge collection by the epitaxial silicon layer characteristic for the SOI design. The r...

A technique for simultaneously improving the product of cutoff frequency-breakdown voltage and thermal stability of SOI SiGe HBT

Science.gov (United States)

Fu, Qiang; Zhang, Wan-Rong; Jin, Dong-Yue; Zhao, Yan-Xiao; Wang, Xiao

2016-12-01

The product of the cutoff frequency and breakdown voltage (fT×BVCEO) is an important figure of merit (FOM) to characterize overall performance of heterojunction bipolar transistor (HBT). In this paper, an approach to introducing a thin N+-buried layer into N collector region in silicon-on-insulator (SOI) SiGe HBT to simultaneously improve the FOM of fT×BVCEO and thermal stability is presented by using two-dimensional (2D) numerical simulation through SILVACO device simulator. Firstly, in order to show some disadvantages of the introduction of SOI structure, the effects of SOI insulation layer thickness (TBOX) on fT, BVCEO, and the FOM of fT×BVCEO are presented. The introduction of SOI structure remarkably reduces the electron concentration in collector region near SOI substrate insulation layer, obviously reduces fT, slightly increases BVCEO to some extent, but ultimately degrades the FOM of fT×BVCEO. Although the fT, BVCEO, and the FOM of fT×BVCEO can be improved by increasing SOI insulator SiO2 layer thickness TBOX in SOI structure, the device temperature and collector current are increased due to lower thermal conductivity of SiO2 layer, as a result, the self-heating effect of the device is enhanced, and the thermal stability of the device is degraded. Secondly, in order to alleviate the foregoing problem of low electron concentration in collector region near SOI insulation layer and the thermal stability resulting from thick TBOX, a thin N+-buried layer is introduced into collector region to not only improve the FOM of fT×BVCEO, but also weaken the self-heating effect of the device, thus improving the thermal stability of the device. Furthermore, the effect of the location of the thin N+-buried layer in collector region is investigated in detail. The result show that the FOM of fT×BVCEO is improved and the device temperature decreases as the N+-buried layer shifts toward SOI substrate insulation layer. The approach to introducing a thin N+-buried layer

A PD-SOI based DTI-LOCOS combined cross isolation technique for minimizing TID radiation induced leakage in high density memory

International Nuclear Information System (INIS)

Qiao Fengying; Pan Liyang; Wu Dong; Liu Lifang; Xu Jun

2014-01-01

In order to minimize leakage current increase under total ionizing dose (TID) radiation in high density memory circuits, a new isolation technique, combining deep trench isolation (DTI) between the wells, local oxidation of silicon (LOCOS) isolation between the devices within the well, and a P-diffused area in order to limit leakage at the isolation edge is implemented in partly-depleted silicon-on-insulator (PD-SOI) technology. This radiation hardening technique can minimize the layout area by more than 60%, and allows flexible placement of the body contact. Radiation hardened transistors and 256 Kb flash memory chips are designed and fabricated in a 0.6 μm PD-SOI process. Experiments show that no obvious increase in leakage current is observed for single transistors under 1 Mrad(Si) radiation, and that the 256 Kb memory chip still functions well after a TID of 100 krad(Si), with only 50% increase of the active power consumption in read mode. (semiconductor devices)

Impact of technology scaling in SOI back-channel total dose tolerance. A 2-D numerical study using a self-consistent oxide code; Effet du facteur d'echelle sur la tolerance en dose de rayonnement dans le cas du courant de fuite arriere des transistors MOS/SOI. Une etude d'un oxyde utilise un code auto coherent en deux dimensions

Energy Technology Data Exchange (ETDEWEB)

Leray, J.L.; Paillet, Ph.; Ferlet-Cavrois, V. [CEA Bruyeres le Chatel DRIF, 91 (France); Tavernier, C.; Belhaddad, K. [ISE Integrated System Engineering AG (Switzerland); Penzin, O. [ISE Integrated System Engineering Inc., San Jose (United States)

1999-07-01

A new 2-D and 3-D self-consistent code has been developed and is applied to understanding the charge trapping in SOI buried oxide causing back-channel MOS leakage in SOI transistors. Clear indications on scaling trends are obtained with respect to supply voltage and oxide thickness. (authors)

APPLYING SIMPLE TECHNOLOGY ACCOMPLISHES VISUAL INSPECTION CHALLENGES

International Nuclear Information System (INIS)

Robinson, C

2007-01-01

This paper discusses the successful implementation of simple video technologies at the Savannah River Site (SRS) to perform complex visual inspection, monitoring, and surveillance tasks. Because SRS facilities are similar to those of an industrial plant, the environmental and accessibility considerations for remote viewing are the primary determining factors in the selection of technology. The constraints and challenges associated with remote viewing are discussed, and examples of applications are given

Anomalous radiation effects in fully depleted SOI MOSFETs fabricated on SIMOX

Science.gov (United States)

Li, Ying; Niu, Guofu; Cressler, J. D.; Patel, J.; Marshall, C. J.; Marshall, P. W.; Kim, H. S.; Reed, R. A.; Palmer, M. J.

2001-12-01

We investigate the proton tolerance of fully depleted silicon-on-insulator (SOI) MOSFETs with H-gate and regular-gate structural configurations. For the front-gate characteristics, the H-gate does not show the edge leakage observed in the regular-gate transistor. An anomalous kink in the back-gate linear I/sub D/-V/sub GS/ characteristics of the fully depleted SOI nFETs has been observed at high radiation doses. This kink is attributed to charged traps generated in the bandgap at the buried oxide/silicon film interface during irradiation. Extensive two-dimensional simulations with MEDICI were used to understand the physical origin of this kink. We also report unusual self-annealing effects in the devices when they are cooled to liquid nitrogen temperature.

Jean-Pierre Famose et Jean Bertsch, L’estime de soi : une controverse éducative, Paris, PUF, 2009, 192 p

OpenAIRE

Benamar, Aïcha

2015-01-01

L’ouvrage porte sur l’estime de soi, dans la sphère sociale en général et le monde éducatif en particulier. L’estime de soi est au cœur du comportement individuel, apportant confiance et assurance, permettant de progresser et in fine de réussir. Une faible estime de soi est fréquemment à l’origine de difficultés pour un individu : doutes, hésitations, ou à l’inverse vanité et arrogance. Un bon niveau d’estime de soi confère à la personnalité : capacité à s’affirmer et respect des autres. Cent...

SOI Transistor measurement techniques using body contacted transistors

International Nuclear Information System (INIS)

Worley, E.R.; Williams, R.

1989-01-01

Measurements of body contacted SOI transistors are used to isolate parameters of the back channel and island edge transistor. Properties of the edge and back channel transistor have been measured before and after X-ray irradiation (ARACOR). The unique properties of the edge transistor are shown to be a result of edge geometry as confirmed by a two dimensional transistor simulator

A high efficiency lateral light emitting device on SOI

NARCIS (Netherlands)

Hoang, T.; Le Minh, P.; Holleman, J.; Zieren, V.; Goossens, M.J.; Schmitz, Jurriaan

2005-01-01

The infrared light emission of lateral p/sup +/-p-n/sup +/ diodes realized on SIMOX-SOI (separation by implantation of oxygen - silicon on insulator) substrates has been studied. The confinement of the free carriers in one dimension due to the buried oxide was suggested to be a key point to increase

Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration

KAUST Repository

Pirro, Luca

2015-09-01

Recent experimental results have demonstrated the possibility of characterizing silicon-on-insulator (SOI) wafers through split C-V measurements in the pseudo-MOSFET configuration. This paper analyzes the capacitance and conductance versus frequency characteristics. We discuss the conditions under which it is possible to extract interface trap density in bare SOI wafers. The results indicate, through both measurements and simulations, that the signature due to interface trap density is present in small-area samples, but is masked by the RC response of the channel in regular, large-area ones, making the extraction in standard samples problematic. © 1963-2012 IEEE.

Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration

KAUST Repository

Pirro, Luca; Diab, Amer El Hajj; Ionica, Irina; Ghibaudo, Gerard; Faraone, Lorenzo; Cristoloveanu, Sorin

2015-01-01

Recent experimental results have demonstrated the possibility of characterizing silicon-on-insulator (SOI) wafers through split C-V measurements in the pseudo-MOSFET configuration. This paper analyzes the capacitance and conductance versus frequency characteristics. We discuss the conditions under which it is possible to extract interface trap density in bare SOI wafers. The results indicate, through both measurements and simulations, that the signature due to interface trap density is present in small-area samples, but is masked by the RC response of the channel in regular, large-area ones, making the extraction in standard samples problematic. © 1963-2012 IEEE.

Improving breakdown voltage performance of SOI power device with folded drift region

Science.gov (United States)

Qi, Li; Hai-Ou, Li; Ping-Jiang, Huang; Gong-Li, Xiao; Nian-Jiong, Yang

2016-07-01

A novel silicon-on-insulator (SOI) high breakdown voltage (BV) power device with interlaced dielectric trenches (IDT) and N/P pillars is proposed. In the studied structure, the drift region is folded by IDT embedded in the active layer, which results in an increase of length of ionization integral remarkably. The crowding phenomenon of electric field in the corner of IDT is relieved by the N/P pillars. Both traits improve two key factors of BV, the ionization integral length and electric field magnitude, and thus BV is significantly enhanced. The electric field in the dielectric layer is enhanced and a major portion of bias is borne by the oxide layer due to the accumulation of inverse charges (holes) at the corner of IDT. The average value of the lateral electric field of the proposed device reaches 60 V/μm with a 10 μm drift length, which increases by 200% in comparison to the conventional SOI LDMOS, resulting in a breakdown voltage of 607 V. Project supported by the Guangxi Natural Science Foundation of China (Grant Nos. 2013GXNSFAA019335 and 2015GXNSFAA139300), Guangxi Experiment Center of Information Science of China (Grant No. YB1406), Guangxi Key Laboratory of Wireless Wideband Communication and Signal Processing of China, Key Laboratory of Cognitive Radio and Information Processing (Grant No. GXKL061505), Guangxi Key Laboratory of Automobile Components and Vehicle Technology of China (Grant No. 2014KFMS04), and the National Natural Science Foundation of China (Grant Nos. 61361011, 61274077, and 61464003).

Process Optimization for Monolithic Integration of Piezoresistive Pressure Sensor and MOSFET Amplifier with SOI Approach

International Nuclear Information System (INIS)

Kumar, V Vinoth; Dasgupta, A; Bhat, K N; KNatarajan

2006-01-01

In this paper we present the design and process optimization for fabricating piezoresitive pressure sensor and MOSFET Differential Amplifier simultaneously on the same chip. Silicon On Insulator approach has been used for realizing the membrane as well as the electronics on the same chip. The amplifier circuit has been configured in the common source connection and it has been designed with PSPICE simulation to achieve a voltage gain of about 5. In the initial set of experiments the Pressure sensor and the amplifier were fabricated on separate chips to optimize the process steps and tested in the hybrid mode. In the next set of experiments, SOI wafer having the SOI layer thickness of about 11 microns was used for realizing the membrane by anisotropic etching from the backside. The piezo-resistive pressure sensor was realized on this membrane by connecting the polysilicon resistors in the form of a Wheatstone bridge. The MOSFET source follower amplifier was also fabricated on the same SOI wafer by tailoring the process steps to suit the requirement of simultaneous fabrication of piezoresistors and the amplifier for achieving MOSFET Integrated Pressure Sensor. Reproducible results have been achieved on the SOI wafers, with the process steps developed in the laboratory. Sensitivity of 270 mV /Bar/10V, with the on chip amplifier gain of 4.5, has been achieved with this process

Une dialectique de la pudeur : les pratiques de mise en visibilité de soi sur Facebook

OpenAIRE

Mell , Laurent

2017-01-01

L’amplification des usages des technologies de l’information et de la communication (TIC), et plus particulièrement des réseaux socionumériques, ont induit des évolutions significatives dans le rapport des individus aux normes relatives à la pudeur. Dans cet article, nous proposons de discuter des pratiques de mise en visibilité de soi sur le réseau socionumérique Facebook. Tout d’abord, nous montrons que l’augmentation de la considération pour la vie privée amène à une sélection des informat...

Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

Science.gov (United States)

Zheng, Xinyu (Inventor); Pain, Bedabrata (Inventor)

2005-01-01

Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

A low on-resistance SOI LDMOS using a trench gate and a recessed drain

International Nuclear Information System (INIS)

Ge Rui; Luo Xiaorong; Jiang Yongheng; Zhou Kun; Wang Pei; Wang Qi; Wang Yuangang; Zhang Bo; Li Zhaoji

2012-01-01

An integrable silicon-on-insulator (SOI) power lateral MOSFET with a trench gate and a recessed drain (TGRD MOSFET) is proposed to reduce the on-resistance. Both of the trench gate extended to the buried oxide (BOX) and the recessed drain reduce the specific on-resistance (R on,sp ) by widening the vertical conduction area and shortening the extra current path. The trench gate is extended as a field plate improves the electric field distribution. Breakdown voltage (BV) of 97 V and R on,sp of 0.985 mΩ·cm 2 (V GS = 5 V) are obtained for a TGRD MOSFET with 6.5 μm half-cell pitch. Compared with the trench gate SOI MOSFET (TG MOSFET) and the conventional MOSFET, R on,sp of the TGRD MOSFET decreases by 46% and 83% at the same BV, respectively. Compared with the SOI MOSFET with a trench gate and a trench drain (TGTD MOSFET), BV of the TGRD MOSFET increases by 37% at the same R on,sp . (semiconductor devices)

Design and simulation of resistive SOI CMOS micro-heaters for high temperature gas sensors

International Nuclear Information System (INIS)

Iwaki, T; Covington, J A; Udrea, F; Ali, S Z; Guha, P K; Gardner, J W

2005-01-01

This paper describes the design of doped single crystal silicon (SCS) microhotplates for gas sensors. Resistive heaters are formed by an n+/p+ implantation into a Silicon-On-Insulator (SOI) wafer with a post-CMOS deep reactive ion etch to remove the silicon substrate. Hence they are fully compatible with CMOS technologies and allows for the integration of associated drive/detection circuitry. 2D electro-thermal models have been constructed and the results of numerical simulations using FEMLAB[reg] are given. Simulations show these micro-hotplates can operate at temperatures of 500 deg. C with a drive voltage of only 5 V and a power consumption of less than 100 mW

Fully etched apodized grating coupler on the SOI platform with −058 dB coupling efficiency

DEFF Research Database (Denmark)

Ding, Yunhong; Peucheret, Christophe; Ou, Haiyan

2014-01-01

We design and fabricate an ultrahigh coupling efficiency (CE) fully etched apodized grating coupler on the silicon- on-insulator (SOI) platform using subwavelength photonic crystals and bonded aluminum mirror. Fabrication error sensitivity andcoupling angle dependence are experimentally investiga......We design and fabricate an ultrahigh coupling efficiency (CE) fully etched apodized grating coupler on the silicon- on-insulator (SOI) platform using subwavelength photonic crystals and bonded aluminum mirror. Fabrication error sensitivity andcoupling angle dependence are experimentally...

A new SOI high-voltage device with a step-thickness drift region and its analytical model for the electric field and breakdown voltage

International Nuclear Information System (INIS)

Luo Xiaorong; Zhang Wei; Zhang Bo; Li Zhaoji; Yang Shouguo; Zhan Zhan; Fu Daping

2008-01-01

A new SOI high-voltage device with a step-thickness drift region (ST SOI) and its analytical model for the two-dimension electric field distribution and the breakdown voltage are proposed. The electric field in the drift region is modulated and that of the buried layer is enhanced by the variable thickness SOI layer, thereby resulting in the enhancement of the breakdown voltage. Based on the Poisson equation, the expression for the two-dimension electric field distribution is presented taking the modulation effect into account, from which the RESURF (REduced SURface Field) condition and the approximate but explicit expression for the maximal breakdown voltage are derived. The analytical model can explain the effects of the device parameters, such as the step height and the step length of the SOI layer, the doping concentration and the buried oxide thickness, on the electric field distribution and the breakdown voltage. The validity of this model is demonstrated by a comparison with numerical simulations. Improvement on both the breakdown voltage and the on-resistance (R on ) for the ST SOI is obtained due to the variable thickness SOI layer

Impact of underlap spacer region variation on electrostatic and analog performance of symmetrical high-k SOI FinFET at 20 nm channel length

Science.gov (United States)

Jain, Neeraj; Raj, Balwinder

2017-12-01

Continued scaling of CMOS technology to achieve high performance and low power consumption of semiconductor devices in the complex integrated circuits faces the degradation in terms of electrostatic integrity, short channel effects (SCEs), leakage currents, device variability and reliability etc. Nowadays, multigate structure has become the promising candidate to overcome these problems. SOI FinFET is one of the best multigate structures that has gained importance in all electronic design automation (EDA) industries due to its improved short channel effects (SCEs), because of its more effective gate-controlling capabilities. In this paper, our aim is to explore the sensitivity of underlap spacer region variation on the performance of SOI FinFET at 20 nm channel length. Electric field modulation is analyzed with spacer length variation and electrostatic performance is evaluated in terms of performance parameter like electron mobility, electric field, electric potential, sub-threshold slope (SS), ON current (I on), OFF current (I off) and I on/I off ratio. The potential benefits of SOI FinFET at drain-to-source voltage, V DS = 0.05 V and V DS = 0.7 V towards analog and RF design is also evaluated in terms of intrinsic gain (A V), output conductance (g d), trans-conductance (g m), gate capacitance (C gg), and cut-off frequency (f T = g m/2πC gg) with spacer region variations.

Proton induced single event upset cross section prediction for 0.15 μm six-transistor (6T) silicon-on-insulator static random access memories

International Nuclear Information System (INIS)

Li Lei; Zhou Wanting; Liu Huihua

2012-01-01

In this paper, an efficient physics-based method to estimate the saturated proton upset cross section for six-transistor (6T) silicon-on-insulator (SOI) static random access memory (SRAM) cells using layout and technology parameters is proposed. This method calculates the effects of radiation based on device physics. The simple method handles the problem with ease by SPICE simulations, which can be divided into two stages. At first, it uses a standard SPICE program to predict the cross section for recoiling heavy ions with linear energy transfer (LET) of 14 MeV-cm 2 /mg. Then, the predicted cross section for recoiling heavy ions with LET of 14 MeV-cm 2 /mg is used to estimate the saturated proton upset cross section for 6T SOI SRAM cells with a simple model. The calculated proton induced upset cross section based on this method is in good agreement with the test results of 6T SOI SRAM cells processed using 0.15 μm technology. (author)

Simulation Opportunity Index, A Simple and Effective Method to Boost the Hydrocarbon Recovery

KAUST Repository

Saputra, Wardana

2016-01-01

This paper describes how the SOI software helps as a simple, fast, and accurate way to obtain the higher hydrocarbon production than that of trial-error method and previous studies in two different fields located in offshore Indonesia. On one hand, the proposed method could save money by minimizing the required number of wells. On the other hand, it could maximize profit by maximizing recovery.

Dimensional effects and scalability of Meta-Stable Dip (MSD) memory effect for 1T-DRAM SOI MOSFETs

Science.gov (United States)

Hubert, A.; Bawedin, M.; Cristoloveanu, S.; Ernst, T.

2009-12-01

The difficult scaling of bulk Dynamic Random Access Memories (DRAMs) has led to various concepts of capacitor-less single-transistor (1T) architectures based on SOI transistor floating-body effects. Amongst them, the Meta-Stable Dip RAM (MSDRAM), which is a double-gate Fully Depleted SOI transistor, exhibits attractive performances. The Meta-Stable Dip effect results from the reduced junction leakage current and the long carrier generation lifetime in thin silicon film transistors. In this study, various devices with different gate lengths, widths and silicon film thicknesses have been systematically explored, revealing the impact of transistor dimensions on the MSD effect. These experimental results are discussed and validated by two-dimensional numerical simulations. It is found that MSD is maintained for small dimensions even in standard SOI MOSFETs, although specific optimizations are expected to enhance MSDRAM performances.

Analyses of the radiation-caused characteristics change in SOI MOSFETs using field shield isolation

International Nuclear Information System (INIS)

Hirano, Yuuichi; Maeda, Shigeru; Fernandez, Warren; Iwamatsu, Toshiaki; Yamaguchi, Yasuo; Maegawa, Shigeto; Nishimura, Tadashi

1999-01-01

Reliability against radiation ia an important issue in silicon on insulator metal oxide semiconductor field effect transistors (SOI MOSFETs) used in satellites and nuclear power plants and so forth which are severely exposed to radiation. Radiation-caused characteristic change related to the isolation-edge in an irradiated environment was analyzed on SOI MOSFETs. Moreover short channel effects for an irradiated environment were investigated by simulations. It was revealed that the leakage current which was observed in local oxidation of silicon (LOCOS) isolated SOI MOSFETs was successfully suppressed by using field shield isolation. Simulated potential indicated that the potential rise at the LOCOS edge can not be seen in the case of field shield isolation edge which does not have physical isolation. Also it was found that the threshold voltage shift caused by radiation in short channel regime is severer than that in long regime channel. In transistors with a channel length of 0.18μm, a potential rise of the body region by radiation-induced trapped holes can be seen in comparison with that of 1.0μm. As a result, we must consider these effects for designing deep submicron devices used in an irradiated environment. (author)

Density dependence of electron mobility in the accumulation mode for fully depleted SOI films

Energy Technology Data Exchange (ETDEWEB)

Naumova, O. V., E-mail: naumova@isp.nsc.ru; Zaitseva, E. G.; Fomin, B. I.; Ilnitsky, M. A.; Popov, V. P. [Russian Academy of Sciences, Rzhanov Institute of Semiconductor Physics, Siberian Branch (Russian Federation)

2015-10-15

The electron mobility µ{sub eff} in the accumulation mode is investigated for undepleted and fully depleted double-gate n{sup +}–n–n{sup +} silicon-on-insulator (SOI) metal–oxide–semiconductor field-effect transistors (MOSFET). To determine the range of possible values of the mobility and the dominant scattering mechanisms in thin-film structures, it is proposed that the field dependence of the mobility µ{sub eff} be replaced with the dependence on the density N{sub e} of induced charge carriers. It is shown that the dependences µ{sub eff}(N{sub e}) can be approximated by the power functions µ{sub eff}(N{sub e}) ∝ N{sub e}{sup -n}, where the exponent n is determined by the chargecarrier scattering mechanism as in the mobility field dependence. The values of the exponent n in the dependences µ{sub eff}(N{sub e}) are determined when the SOI-film mode near one of its surfaces varies from inversion to accumulation. The obtained results are explained from the viewpoint of the electron-density redistribution over the SOI-film thickness and changes in the scattering mechanisms.

Effect of the Ion Mass and Energy on the Response of 70-nm SOI Transistors to the Ion Deposited Charge by Direct Ionization

International Nuclear Information System (INIS)

Raine, M.; Gaillardin, M.; Sauvestre, J.E.; Flament, O.; Bournel, A.; Aubry-Fortuna, V.

2010-01-01

The response of SOI transistors under heavy ion irradiation is analyzed using Geant4 and Synopsys Sentaurus device simulations. The ion mass and energy have a significant impact on the radial ionization profile of the ion deposited charge. For example, for an identical LET, the higher the ion energy per nucleon, the wider the radial ionization track. For a 70-nm SOI technology, the track radius of high energy ions (≥ 10 MeV/a) is larger than the transistor sensitive volume; part of the ion charge recombines in the highly doped source or drain regions and does not participate to the transistor electric response. At lower energy (≤ 10 MeV/a), as often used for ground testing, the track radius is smaller than the transistor sensitive volume, and the entire charge is used for the transistor response. The collected charge is then higher, corresponding to a worst-case response of the transistor. Implications for the hardness assurance of highly-scaled generations are discussed. (authors)

New Insights into Fully-Depleted SOI Transistor Response During Total Dose Irradiation

International Nuclear Information System (INIS)

Burns, J.A.; Dodd, P.E.; Keast, C.L.; Schwank, J.R.; Shaneyfelt, M.R.; Wyatt, P.W.

1999-01-01

Worst-case bias configuration for total-dose testing fully-depleted SOI transistors was found to be process dependent. No evidence was found for total-dose induced snap back. These results have implications for hardness assurance testing

HARM processing techniques for MEMS and MOEMS devices using bonded SOI substrates and DRIE

Science.gov (United States)

Gormley, Colin; Boyle, Anne; Srigengan, Viji; Blackstone, Scott C.

2000-08-01

Silicon-on-Insulator (SOI) MEMS devices (1) are rapidly gaining popularity in realizing numerous solutions for MEMS, especially in the optical and inertia application fields. BCO recently developed a DRIE trench etch, utilizing the Bosch process, and refill process for high voltage dielectric isolation integrated circuits on thick SOI substrates. In this paper we present our most recently developed DRIE processes for MEMS and MOEMS devices. These advanced etch techniques are initially described and their integration with silicon bonding demonstrated. This has enabled process flows that are currently being utilized to develop optical router and filter products for fiber optics telecommunications and high precision accelerometers.

Single halo SDODEL n-MOSFET: an alternative low-cost pseudo-SOI with better analog performance

Science.gov (United States)

Sarkar, Partha; Mallik, Abhijit; Sarkar, Chandan Kumar

2009-03-01

In this paper, with the help of extensive TCAD simulations, we investigate the analog performance of source/drain on depletion layer (SDODEL) MOSFETs with a single-halo (SH) implant near the source side of the channel. We use the SH implant in such a structure for the first time. The analog performance parameters in SH SDODEL MOSFETs are compared to those in SH MOSFETs as well as in SH SOI MOSFETs. In addition to reduced junction capacitance for the SH SDODEL structure as compared to that in bulk SH devices, it has been shown that such devices lead to improved performance and lower power dissipation for sub-100 nm CMOS technologies. Our results show that, in SH SDODEL MOSFETs, there is significant improvement in the intrinsic device performance for analog applications (such as device gain, gm/ID, etc) for the sub-100 nm technologies.

Single halo SDODEL n-MOSFET: an alternative low-cost pseudo-SOI with better analog performance

International Nuclear Information System (INIS)

Sarkar, Partha; Mallik, Abhijit; Sarkar, Chandan Kumar

2009-01-01

In this paper, with the help of extensive TCAD simulations, we investigate the analog performance of source/drain on depletion layer (SDODEL) MOSFETs with a single-halo (SH) implant near the source side of the channel. We use the SH implant in such a structure for the first time. The analog performance parameters in SH SDODEL MOSFETs are compared to those in SH MOSFETs as well as in SH SOI MOSFETs. In addition to reduced junction capacitance for the SH SDODEL structure as compared to that in bulk SH devices, it has been shown that such devices lead to improved performance and lower power dissipation for sub-100 nm CMOS technologies. Our results show that, in SH SDODEL MOSFETs, there is significant improvement in the intrinsic device performance for analog applications (such as device gain, g m /I D , etc) for the sub-100 nm technologies

Proposal for fabrication-tolerant SOI polarization splitter-rotator based on cascaded MMI couplers and an assisted bi-level taper.

Science.gov (United States)

Wang, Jing; Qi, Minghao; Xuan, Yi; Huang, Haiyang; Li, You; Li, Ming; Chen, Xin; Jia, Qi; Sheng, Zhen; Wu, Aimin; Li, Wei; Wang, Xi; Zou, Shichang; Gan, Fuwan

2014-11-17

A novel silicon-on-insulator (SOI) polarization splitter-rotator (PSR) with a large fabrication tolerance is proposed based on cascaded multimode interference (MMI) couplers and an assisted mode-evolution taper. The tapers are designed to adiabatically convert the input TM(0) mode into the TE(1) mode, which will output as the TE(0) mode after processed by the subsequent MMI mode converter, 90-degree phase shifter (PS) and MMI 3 dB coupler. The numerical simulation results show that the proposed device has a silicon photonics technology.

Superconducting nanowire single-photon detectors (SNSPDs) on SOI for near-infrared range

Energy Technology Data Exchange (ETDEWEB)

Trojan, Philipp; Il' in, Konstantin; Henrich, Dagmar; Hofherr, Matthias; Doerner, Steffen; Siegel, Michael [Institut fuer Mikro- und Nanoelektronische Systeme (IMS), Karlsruher Institut fuer Technologie (KIT) (Germany); Semenov, Alexey [Institut fuer Planetenforschung, DLR, Berlin-Adlershof (Germany); Huebers, Heinz-Wilhelm [Institut fuer Planetenforschung, DLR, Berlin-Adlershof (Germany); Institut fuer Optik und Atomare Physik, Technische Universitaet Berlin (Germany)

2013-07-01

Superconducting nanowire single-photon detectors are promising devices for photon detectors with high count rates, low dark count rates and low dead times. At wavelengths beyond the visible range, the detection efficiency of today's SNSPDs drops significantly. Moreover, the low absorption in ultra-thin detector films is a limiting factor over the entire spectral range. Solving this problem requires approaches for an enhancement of the absorption range in feeding the light to the detector element. A possibility to obtain a better absorption is the use of multilayer substrate materials for photonic waveguide structures. We present results on development of superconducting nanowire single-photon detectors made from niobium nitride on silicon-on-insulator (SOI) multilayer substrates. Optical and superconducting properties of SNSPDs on SOI will be discussed and compared with the characteristics of detectors on common substrates.

The effect of gate length on SOI-MOSFETS operation | Baedi ...

African Journals Online (AJOL)

The effect of gate length on the operation of silicon-on-insulator (SOI) MOSFET structure with a layer of buried silicon oxide added to isolate the device body has been simulated. Three transistors with gate lengths of 100, 200 and 500 nm were simulated. Simulations showed that with a fixed channel length, when the gate ...

Mixed logic style adder circuit designed and fabricated using SOI substrate for irradiation-hardened experiment

Science.gov (United States)

Yuan, Shoucai; Liu, Yamei

2016-08-01

This paper proposed a rail to rail swing, mixed logic style 28-transistor 1-bit full adder circuit which is designed and fabricated using silicon-on-insulator (SOI) substrate with 90 nm gate length technology. The main goal of our design is space application where circuits may be damaged by outer space radiation; so the irradiation-hardened technique such as SOI structure should be used. The circuit's delay, power and power-delay product (PDP) of our proposed gate diffusion input (GDI)-based adder are HSPICE simulated and compared with other reported high-performance 1-bit adder. The GDI-based 1-bit adder has 21.61% improvement in delay and 18.85% improvement in PDP, over the reported 1-bit adder. However, its power dissipation is larger than that reported with 3.56% increased but is still comparable. The worst case performance of proposed 1-bit adder circuit is also seen to be less sensitive to variations in power supply voltage (VDD) and capacitance load (CL), over a wide range from 0.6 to 1.8 V and 0 to 200 fF, respectively. The proposed and reported 1-bit full adders are all layout designed and wafer fabricated with other circuits/systems together on one chip. The chip measurement and analysis has been done at VDD = 1.2 V, CL = 20 fF, and 200 MHz maximum input signal frequency with temperature of 300 K.

Development of monolithic pixel detector with SOI technology for the ILC vertex detector

Science.gov (United States)

Yamada, M.; Ono, S.; Tsuboyama, T.; Arai, Y.; Haba, J.; Ikegami, Y.; Kurachi, I.; Togawa, M.; Mori, T.; Aoyagi, W.; Endo, S.; Hara, K.; Honda, S.; Sekigawa, D.

2018-01-01

We have been developing a monolithic pixel sensor for the International Linear Collider (ILC) vertex detector with the 0.2 μm FD-SOI CMOS process by LAPIS Semiconductor Co., Ltd. We aim to achieve a 3 μm single-point resolution required for the ILC with a 20×20 μm2 pixel. Beam bunch crossing at the ILC occurs every 554 ns in 1-msec-long bunch trains with an interval of 200 ms. Each pixel must record the charge and time stamp of a hit to identify a collision bunch for event reconstruction. Necessary functions include the amplifier, comparator, shift register, analog memory and time stamp implementation in each pixel, and column ADC and Zero-suppression logic on the chip. We tested the first prototype sensor, SOFIST ver.1, with a 120 GeV proton beam at the Fermilab Test Beam Facility in January 2017. SOFIST ver.1 has a charge sensitive amplifier and two analog memories in each pixel, and an 8-bit Wilkinson-type ADC is implemented for each column on the chip. We measured the residual of the hit position to the reconstructed track. The standard deviation of the residual distribution fitted by a Gaussian is better than 3 μm.

A new partial SOI-LDMOSFET with a modified buried oxide layer for improving self-heating and breakdown voltage

International Nuclear Information System (INIS)

Jamali Mahabadi, S E; Orouji, Ali A; Keshavarzi, P; Moghadam, Hamid Amini

2011-01-01

In this paper, for the first time, we propose a partial silicon-on-insulator (P-SOI) lateral double-diffused metal-oxide-semiconductor-field-effect-transistor (LDMOSFET) with a modified buried layer in order to improve breakdown voltage (BV) and self-heating effects (SHEs). The main idea of this work is to control the electric field by shaping the buried layer. With two steps introduced in the buried layer, the electric field distribution is modified. Also a P-type window introduced makes the substrate share the vertical voltage drop, leading to a high vertical BV. Moreover, four interface electric field peaks are introduced by the buried P-layer, the Si window and two steps, which modulate the electric field in the SOI layer and the substrate. Hence, a more uniform electric field is obtained; consequently, a high BV is achieved. Furthermore, the Si window creates a conduction path between the active layer and substrate and alleviates the SHE. Two-dimensional simulations show that the BV of double step partial silicon on insulator is nearly 69% higher and alleviates SHEs 17% in comparison with its single step partial SOI counterpart and nearly 265% higher and alleviate SHEs 18% in comparison with its conventional SOI counterpart

A 680 V LDMOS on a thin SOI with an improved field oxide structure and dual field plate

International Nuclear Information System (INIS)

Wang Zhongjian; Cheng Xinhong; Xia Chao; Xu Dawei; Cao Duo; Song Zhaorui; Yu Yuehui; Shen Dashen

2012-01-01

A 680 V LDMOS on a thin SOI with an improved field oxide (FOX) and dual field plate was studied experimentally. The FOX structure was formed by an 'oxidation-etch-oxidation' process, which took much less time to form, and had a low protrusion profile. A polysilicon field plate extended to the FOX and a long metal field plate was used to improve the specific on-resistance. An optimized drift region implant for linear-gradient doping was adopted to achieve a uniform lateral electric field. Using a SimBond SOI wafer with a 1.5 μm top silicon and a 3 μm buried oxide layer, CMOS compatible SOI LDMOS processes are designed and implemented successfully. The off-state breakdown voltage reached 680 V, and the specific on-resistance was 8.2 Ω·mm 2 . (semiconductor devices)

Research on SOI-based micro-resonator devices

Science.gov (United States)

Xiao, Xi; Xu, Haihua; Hu, Yingtao; Zhou, Liang; Xiong, Kang; Li, Zhiyong; Li, Yuntao; Fan, Zhongchao; Han, Weihua; Yu, Yude; Yu, Jinzhong

2010-10-01

SOI (silicon-on-insulator)-based micro-resonator is the key building block of silicon photonics, which is considered as a promising solution to alleviate the bandwidth bottleneck of on-chip interconnects. Silicon-based sub-micron waveguide, microring and microdisk devices are investigated in Institute of Semiconductors, Chinese Academy of Sciences. The main progress in recent years is presented in this talk, such as high Q factor single mode microdisk filters, compact thirdorder microring filters with the through/drop port extinctions to be ~ 30/40 dB, fast microring electro-optical switches with the switch time of 10 Gbit/s high speed microring modulators.

Total dose radiation effects of pressure sensors fabricated on uni-bond-SOI materials

International Nuclear Information System (INIS)

Zhu Shiyang; Huang Yiping; Wang Jin; Li Anzhen; Shen Shaoqun; Bao Minhang

2001-01-01

Piezoresistive pressure sensors with a twin-island structure were successfully fabricated using high quality Uni-bond-SOI (On Insulator) materials. Since the piezoresistors were structured by the single crystalline silicon overlayer of the SOI wafer and were totally isolated by the buried SiO 2 , the sensors are radiation-hard. The sensitivity and the linearity of the pressure sensors keep their original values after being irradiated by 60 Co γ-rays up to 2.3 x 10 4 Gy(H 2 O). However, the offset voltage of the sensor has a slight drift, increasing with the radiation dose. The absolute value of the offset voltage deviation depends on the pressure sensor itself. For comparison, corresponding polysilicon pressure sensors were fabricated using the similar process and irradiated at the same condition

Electrical properties and radiation hardness of SOI systems with multilayer buried dielectric

International Nuclear Information System (INIS)

Barchuk, I.P.; Kilchitskaya, V.I.; Lysenko, V.S.

1997-01-01

In this work SOI structures with buried SiO 2 -Si 3 N 4 -SiO 2 layers have been fabricated by the ZMR-technique with the aim of improving the total dose radiation hardness of the buried dielectric layer. To optimize the fabrication process, buried layers were investigated by secondary ion mass spectrometry before and after the ZMR process, and the obtained results were compared with electrical measurements. It is shown that optimization of the preparation processes of the initial buried dielectric layers provides ZMR SOI structures with multilayer buried isolation, which are of high quality for both Si film interfaces. Particular attention is paid to the investigation of radiation-induced charge trapping in buried insulators. Buried isolation structures with a nitride layer exhibit significant reduction of radiation-induced positive charge as compared to classical buried SiO 2 layers produced by either the ZMR or the SIMOX technique

New insights into fully-depleted SOI transistor response during total-dose irradiation

International Nuclear Information System (INIS)

Schwank, J.R.; Shaneyfelt, M.R.; Dodd, P.E.; Burns, J.A.; Keast, C.L.; Wyatt, P.W.

1999-01-01

In this paper, we present irradiation results on 2-fully depleted processes (HYSOI6, RKSOI) that show SOI (silicon on insulator) device response can be more complicated than originally suggested by others. The major difference between the 2 process versions is that the RKSOI process incorporates special techniques to minimize pre-irradiation parasitic leakage current from trench sidewalls. Transistors were irradiated at room temperature using 10 keV X-ray source. Worst-case bias configuration for total-dose testing fully-depleted SOI transistors was found to be process dependent. It appears that the worst-case bias for HYPOI6 process is the bias that causes the largest increase in sidewall leakage. The RKSOI process shows a different response during irradiation, the transition response appears to be dominated by charge trapping in the buried oxide. These results have implications for hardness assurance testing. (A.C.)

Novel technique of source and drain engineering for dual-material double-gate (DMDG) SOI MOSFETS

Science.gov (United States)

Yadav, Himanshu; Malviya, Abhishek Kumar; Chauhan, R. K.

2018-04-01

The dual-metal dual-gate (DMDG) SOI has been used with Dual Sided Source and Drain Engineered 50nm SOI MOSFET with various high-k gate oxide. It has been scrutinized in this work to enhance its electrical performance. The proposed structure is designed by creating Dual Sided Source and Drain Modification and its characteristics are evaluated on ATLAS device simulator. The consequence of this dual sided assorted doping on source and drain side of the DMDG transistor has better leakage current immunity and heightened ION current with higher ION to IOFF Ratio. Which thereby vesting the proposed device appropriate for low power digital applications.

Méditation et pratique de soi chez Malebranche.

Directory of Open Access Journals (Sweden)

Éric Dubreucq

2004-04-01

Full Text Available Une étude des Méditations pour se disposer à l’Humilité et à la pénitence qui les replace dans le cadre des pratiques de son époque, par exemple, chez François de Sales, celles de l’oraison, de la méditation et de la contemplation, permet d’apercevoir que l’une des thèses majeures du malebranchisme, la vision en Dieu, est un effet instauré dans le destinataire par un dispositif textuel. Celui-ci tire sa puissance prescriptive de l’a priori pratique où il s’inscrit. C’est à une opération de production de soi que l’exercice spirituel donne lieu : l’analyse des quatre premières Méditations chrétiennes et métaphysiques, en particulier, montre que c’est une organisation de la substance personnelle que provoque le travail spirituel sur soi. Celui-ci consiste à déterminer le rapport à soi comme relation d’une vision attentive à une activité illuminante, par un décentrement textuel du « je » vers le « tu ».One of the major Malebranche’s assertion, that we see truth in God, is not a mere theoretical thesis. I study first the Méditations pour se disposer à l’Humilité et à la pénitence and compare them with François de Sales’ spiritual exercitations, and show that prayer, meditation and contemplation constitute the practical frameworks of this period. The text of the Méditations is an apparatus which is fit to cause an effect in its target – the self of the reader : the vision in God. The practical a priori of the meditation provides the text with prescriptive power to transform the self. Then I study the Méditations chrétiennes et métaphysiques i-iv : we see that Malebranche set his textual apparatus so that it prescribes its receiver a form of « work-on-one’s-self ». The self is here produced by the organisation of relationship between attentive vision and lighting action, and this structure is built in the self by a movement, induced by the text, which leads the self from

Characterization of ultrathin SOI film and application to short channel MOSFETs.

Science.gov (United States)

Tang, Xiaohui; Reckinger, Nicolas; Larrieu, Guilhem; Dubois, Emmanuel; Flandre, Denis; Raskin, Jean-Pierre; Nysten, Bernard; Jonas, Alain M; Bayot, Vincent

2008-04-23

In this study, a very dilute solution (NH(4)OH:H(2)O(2):H(2)O 1:8:64 mixture) was employed to reduce the thickness of commercially available SOI wafers down to 3 nm. The etch rate is precisely controlled at 0.11 Å s(-1) based on the self-limited etching speed of the solution. The thickness uniformity of the thin film, evaluated by spectroscopic ellipsometry and by high-resolution x-ray reflectivity, remains constant through the thinning process. Moreover, the film roughness, analyzed by atomic force microscopy, slightly improves during the thinning process. The residual stress in the thin film is much smaller than that obtained by sacrificial oxidation. Mobility, measured by means of a bridge-type Hall bar on 15 nm film, is not significantly reduced compared to the value of bulk silicon. Finally, the thinned SOI wafers were used to fabricate Schottky-barrier metal-oxide-semiconductor field-effect transistors with a gate length down to 30 nm, featuring state-of-the-art current drive performance.

Hybrid III-V/SOI resonant cavity enhanced photodetector

DEFF Research Database (Denmark)

Learkthanakhachon, Supannee; Taghizadeh, Alireza; Park, Gyeong Cheol

2016-01-01

A hybrid III–V/SOI resonant-cavity-enhanced photodetector (RCE-PD) structure comprising a high-contrast grating (HCG) reflector, a hybrid grating (HG) reflector, and an air cavity between them, has been proposed and investigated. In the proposed structure, a light absorbing material is integrated...... as part of the HG reflector, enabling a very compact vertical cavity. Numerical investigations show that a quantum efficiency close to 100 % and a detection linewidth of about 1 nm can be achieved, which are desirable for wavelength division multiplexing applications. Based on these results, a hybrid RCE...

Photonic bandpass filter characteristics of multimode SOI waveguides integrated with submicron gratings.

Science.gov (United States)

Sah, Parimal; Das, Bijoy Krishna

2018-03-20

It has been shown that a fundamental mode adiabatically launched into a multimode SOI waveguide with submicron grating offers well-defined flat-top bandpass filter characteristics in transmission. The transmitted spectral bandwidth is controlled by adjusting both waveguide and grating design parameters. The bandwidth is further narrowed down by cascading two gratings with detuned parameters. A semi-analytical model is used to analyze the filter characteristics (1500  nm≤λ≤1650  nm) of the device operating in transverse-electric polarization. The proposed devices were fabricated with an optimized set of design parameters in a SOI substrate with a device layer thickness of 250 nm. The pass bandwidth of waveguide devices integrated with single-stage gratings are measured to be ∼24  nm, whereas the device with two cascaded gratings with slightly detuned periods (ΔΛ=2  nm) exhibits a pass bandwidth down to ∼10  nm.

A Temperature Sensor using a Silicon-on-Insulator (SOI) Timer for Very Wide Temperature Measurement

Science.gov (United States)

Patterson, Richard L.; Hammoud, Ahmad; Elbuluk, Malik; Culley, Dennis E.

2008-01-01

A temperature sensor based on a commercial-off-the-shelf (COTS) Silicon-on-Insulator (SOI) Timer was designed for extreme temperature applications. The sensor can operate under a wide temperature range from hot jet engine compartments to cryogenic space exploration missions. For example, in Jet Engine Distributed Control Architecture, the sensor must be able to operate at temperatures exceeding 150 C. For space missions, extremely low cryogenic temperatures need to be measured. The output of the sensor, which consisted of a stream of digitized pulses whose period was proportional to the sensed temperature, can be interfaced with a controller or a computer. The data acquisition system would then give a direct readout of the temperature through the use of a look-up table, a built-in algorithm, or a mathematical model. Because of the wide range of temperature measurement and because the sensor is made of carefully selected COTS parts, this work is directly applicable to the NASA Fundamental Aeronautics/Subsonic Fixed Wing Program--Jet Engine Distributed Engine Control Task and to the NASA Electronic Parts and Packaging (NEPP) Program. In the past, a temperature sensor was designed and built using an SOI operational amplifier, and a report was issued. This work used an SOI 555 timer as its core and is completely new work.

Anomalous DIBL Effect in Fully Depleted SOI MOSFETs Using Nanoscale Gate-Recessed Channel Process

Directory of Open Access Journals (Sweden)

Avi Karsenty

2015-01-01

Full Text Available Nanoscale Gate-Recessed Channel (GRC Fully Depleted- (FD- SOI MOSFET device with a silicon channel thickness (tSi as low as 2.2 nm was first tested at room temperature for functionality check and then tested at low temperature (77 K for I-V characterizations. In spite of its FD-SOI nanoscale thickness and long channel feature, the device has surprisingly exhibited a Drain-Induced Barrier Lowering (DIBL effect at RT. However, this effect was suppressed at 77 K. If the apparition of such anomalous effect can be explained by a parasitic short channel transistor located at the edges of the channel, its suppression is explained by the decrease of the potential barrier between the drain and the channel when lowering the temperature.

Structural Make-up, Biopolymer Conformation, and Biodegradation Characteristics of Newly Developed Super Genotype of Oats (CDC SO-I vs. Conventional Varieties): Novel Approach

International Nuclear Information System (INIS)

Damiran, D.; Yu, P.

2010-01-01

Recently, a new 'super' genotype of oats (CDC SO-I or SO-I) has been developed. The objectives of this study were to determine structural makeup (features) of oat grain in endosperm and pericarp regions and to reveal and identify differences in protein amide I and II and carbohydrate structural makeup (conformation) between SO-I and two conventional oats (CDC Dancer and Derby) grown in western Canada in 2006, using advanced synchrotron radiation based Fourier transform infrared microspectroscopy (SRFTIRM). The SRFTIRM experiments were conducted at National Synchrotron Light Sources, Brookhaven National Laboratory (NSLS, BNL, U.S. Department of Energy). From the results, it was observed that comparison between the new genotype oats and conventional oats showed (1) differences in basic chemical and protein subfraction profiles and energy values with the new SO-I oats containing lower lignin (21 g/kg of DM) and higher soluble crude protein (530 g/kg CP), crude fat (59 g/kg of DM), and energy values (TDN, 820 g/kg of DM; NE L3x , 7.8 MJ/kg of DM); (2) significant differences in rumen biodegradation kinetics of dry matter, starch, and protein with the new SO-I oats containing lower EDDM (638 g/kg of DM) and higher EDCP (103 g/kg of DM); (3) significant differences in nutrient supply with highest truly absorbed rumen undegraded protein (ARUP, 23 g/kg of DM) and total metabolizable protein supply (MP, 81 g/kg of DM) from the new SO-I oats; and (4) significant differences in structural makeup in terms of protein amide I in the endosperm region (with amide I peak height from 0.13 to 0.22 IR absorbance unit) and cellulosic compounds to carbohydrate ratio in the pericarp region (ratio from 0.02 to 0.06). The results suggest that with the SRFTIRM technique, the structural makeup differences between the new genotype oats (SO-I) and two conventional oats (Dancer and Derby) could be revealed.

The founder of the Friends Foundation--Tessie Soi.

Science.gov (United States)

Topurua, Ore

2013-01-01

Tessie Soi is well known in Papua New Guinea and beyond for her work with HIV/AIDS (human immunodeficiency virus/acquired immune deficiency syndrome) patients, including through the Friends Foundation, an organization that focuses on helping families affected by HIV and AIDS. This article explores Tessie's early life and childhood, providing insight into some of the values she learned from her parents. Providing details about the Friends Foundation and the Orphan Buddy Systems program, a program Tessie established to support AIDS orphans, the article offers insight into Tessie's beliefs and compassion, simultaneously highlighting the value she places on her family.

Three-dimensional simulations in optimal performance trial between two types of Hall sensors fabrication technologies

Energy Technology Data Exchange (ETDEWEB)

Paun, Maria-Alexandra, E-mail: map65@cam.ac.uk

2015-10-01

The main objective of the present work is to make a comparison between Hall devices integrated in regular bulk and Silicon-on-Insulator (SOI) CMOS technology. A three-dimensional model based on numerical estimation is provided for a particular XL Hall structure in two different technologies (the first one is XFAB XH 0.35 µm regular bulk CMOS and the second one is XFAB SOI XI10 1 µm non-fully depleted). In assessing the performance of the Hall Effect sensors included in the comparison, both three-dimensional physical simulations and measurements results will be used. In order to discriminate which category of sensors has the highest performance, their main characteristic parameters, including input resistance, Hall voltage, absolute sensitivity and their temperature drift, will be extracted and compared. Electrostatic potential and current density distribution are important aspects that are also investigated. The particular technology offering the highest sensor performance is identified. - Highlights: • A comparison between Hall devices integrated in regular bulk and SOI CMOS technologies is made. • A three-dimensional model for the XL Hall structure, in the two technologies, is provided. • The main characteristic parameters and the temperature drift are investigated. • The sensors performance is evaluated using 3D physical simulations and measurements data.

Comparison of short-circuit characteristics of trench gate and planar gate U-shaped channel SOI-LIGBTs

Science.gov (United States)

Zhang, Long; Zhu, Jing; Sun, Weifeng; Zhao, Minna; Huang, Xuequan; Chen, Jiajun; Shi, Longxing; Chen, Jian; Ding, Desheng

2017-09-01

Comparison of short-circuit (SC) characteristics of 500 V rated trench gate U-shaped channel (TGU) SOI-LIGBT and planar gate U-shaped channel (PGU) SOI-LIGBT is made for the first time in this paper. The on-state carrier profile of the TGU structure is reshaped by the dual trenches (a gate trench G1 and a hole barrier trench G2), which leads to a different conduction behavior from that of the PGU structure. The TGU structure exhibits a higher latchup immunity but a severer self-heating effect. At current density (JC) 640 A/cm2. Comparison of layouts and fabrication processes are also made between the two types of devices.

Structural makeup, biopolymer conformation, and biodegradation characteristics of a newly developed super genotype of oats (CDC SO-I versus conventional varieties): a novel approach.

Science.gov (United States)

Damiran, Daalkhaijav; Yu, Peiqiang

2010-02-24

Recently, a new "super" genotype of oats (CDC SO-I or SO-I) has been developed. The objectives of this study were to determine structural makeup (features) of oat grain in endosperm and pericarp regions and to reveal and identify differences in protein amide I and II and carbohydrate structural makeup (conformation) between SO-I and two conventional oats (CDC Dancer and Derby) grown in western Canada in 2006, using advanced synchrotron radiation based Fourier transform infrared microspectroscopy (SRFTIRM). The SRFTIRM experiments were conducted at National Synchrotron Light Sources, Brookhaven National Laboratory (NSLS, BNL, U.S. Department of Energy). From the results, it was observed that comparison between the new genotype oats and conventional oats showed (1) differences in basic chemical and protein subfraction profiles and energy values with the new SO-I oats containing lower lignin (21 g/kg of DM) and higher soluble crude protein (530 g/kg CP), crude fat (59 g/kg of DM), and energy values (TDN, 820 g/kg of DM; NE(L3x), 7.8 MJ/kg of DM); (2) significant differences in rumen biodegradation kinetics of dry matter, starch, and protein with the new SO-I oats containing lower EDDM (638 g/kg of DM) and higher EDCP (103 g/kg of DM); (3) significant differences in nutrient supply with highest truly absorbed rumen undegraded protein (ARUP, 23 g/kg of DM) and total metabolizable protein supply (MP, 81 g/kg of DM) from the new SO-I oats; and (4) significant differences in structural makeup in terms of protein amide I in the endosperm region (with amide I peak height from 0.13 to 0.22 IR absorbance unit) and cellulosic compounds to carbohydrate ratio in the pericarp region (ratio from 0.02 to 0.06). The results suggest that with the SRFTIRM technique, the structural makeup differences between the new genotype oats (SO-I) and two conventional oats (Dancer and Derby) could be revealed.

Effects of ultra-thin Si-fin body widths upon SOI PMOS FinFETs

Science.gov (United States)

Liaw, Yue-Gie; Chen, Chii-Wen; Liao, Wen-Shiang; Wang, Mu-Chun; Zou, Xuecheng

2018-05-01

Nano-node tri-gate FinFET devices have been developed after integrating a 14 Å nitrided gate oxide upon the silicon-on-insulator (SOI) wafers established on an advanced CMOS logic platform. These vertical double gate (FinFET) devices with ultra-thin silicon fin (Si-fin) widths ranging from 27 nm to 17 nm and gate length down to 30 nm have been successfully developed with a 193 nm scanner lithography tool. Combining the cobalt fully silicidation and the CESL strain technology beneficial for PMOS FinFETs was incorporated into this work. Detailed analyses of Id-Vg characteristics, threshold voltage (Vt), and drain-induced barrier lowering (DIBL) illustrate that the thinnest 17 nm Si-fin width FinFET exhibits the best gate controllability due to its better suppression of short channel effect (SCE). However, higher source/drain resistance (RSD), channel mobility degradation due to dry etch steps, or “current crowding effect” will slightly limit its transconductance (Gm) and drive current.

Inverse Design of a SOI T-junction Polarization Beamsplitter

Science.gov (United States)

Ye, Zi; Qiu, Jifang; Meng, Chong; Zheng, Li; Dong, Zhenli; Wu, Jian

2017-06-01

A SOI T-junction polarization beamsplitter with an ultra-compact footprint of 2.8×2.8μm2 is designed based on the method of inverse design. Simulated results show that the conversion efficiencies for TE and TM lights are 73.34% (simulated insertion loss of 2dB) and 80.4% (simulated insertion loss of 1.7dB) at 1550nm, respectively; the simulated extinction ratios for TE and TM lights are 19.3dB and 13.99dB at 1558nm, respectively.

Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

Science.gov (United States)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures

Juan Goytisolo: Le soi, le monde et la création littéraire

Directory of Open Access Journals (Sweden)

Pablo Romero Alegría

2010-01-01

Full Text Available Reseña de la obra: Yannick Llored. Le soi, le monde et la création littéraire. Presses Universitaires du Septentrion. Villeneuve d’Ascq (Francia. 2009. 421 págs. ISBN: 978-2-75740-0089-0

Nonlinear Parasitic Capacitance Modelling of High Voltage Power MOSFETs in Partial SOI Process

DEFF Research Database (Denmark)

Fan, Lin; Knott, Arnold; Jørgensen, Ivan Harald Holger

2016-01-01

: off-state, sub-threshold region, and on-state in the linear region. A high voltage power MOSFET is designed in a partial Silicon on Insulator (SOI) process, with the bulk as a separate terminal. 3D plots and contour plots of the capacitances versus bias voltages for the transistor summarize...

Temperature characteristics research of SOI pressure sensor based on asymmetric base region transistor

Science.gov (United States)

Zhao, Xiaofeng; Li, Dandan; Yu, Yang; Wen, Dianzhong

2017-07-01

Based on the asymmetric base region transistor, a pressure sensor with temperature compensation circuit is proposed in this paper. The pressure sensitive structure of the proposed sensor is constructed by a C-type silicon cup and a Wheatstone bridge with four piezoresistors ({R}1, {R}2, {R}3 and {R}4) locating on the edge of a square silicon membrane. The chip was designed and fabricated on a silicon on insulator (SOI) wafer by micro electromechanical system (MEMS) technology and bipolar transistor process. When the supply voltage is 5.0 V, the corresponding temperature coefficient of the sensitivity (TCS) for the sensor before and after temperature compensation are -1862 and -1067 ppm/°C, respectively. Through varying the ratio of the base region resistances {r}1 and {r}2, the TCS for the sensor with the compensation circuit is -127 ppm/°C. It is possible to use this compensation circuit to improve the temperature characteristics of the pressure sensor. Project supported by the National Natural Science Foundation of China (No. 61471159), the Natural Science Foundation of Heilongjiang Province (No. F201433), the University Nursing Program for Young Scholars with Creative Talents in Heilongjiang Province (No. 2015018), and the Special Funds for Science and Technology Innovation Talents of Harbin in China (No. 2016RAXXJ016).

A two dimensional analytical modeling of surface potential in triple metal gate (TMG) fully-depleted Recessed-Source/Drain (Re-S/D) SOI MOSFET

Science.gov (United States)

Priya, Anjali; Mishra, Ram Awadh

2016-04-01

In this paper, analytical modeling of surface potential is proposed for new Triple Metal Gate (TMG) fully depleted Recessed-Source/Dain Silicon On Insulator (SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The metal with the highest work function is arranged near the source region and the lowest one near the drain. Since Recessed-Source/Drain SOI MOSFET has higher drain current as compared to conventional SOI MOSFET due to large source and drain region. The surface potential model developed by 2D Poisson's equation is verified by comparison to the simulation result of 2-dimensional ATLAS simulator. The model is compared with DMG and SMG devices and analysed for different device parameters. The ratio of metal gate length is varied to optimize the result.

300 nm bandwidth adiabatic SOI polarization splitter-rotators exploiting continuous symmetry breaking.

Science.gov (United States)

Socci, Luciano; Sorianello, Vito; Romagnoli, Marco

2015-07-27

Adiabatic polarization splitter-rotators are investigated exploiting continuous symmetry breaking thereby achieving significant device size and losses reduction in a single mask fabrication process for both SOI channel and ridge waveguides. A crosstalk lower than -25 dB is expected over 300nm bandwidth, making the device suitable for full grid CWDM and diplexer/triplexer FTTH applications at 1310, 1490 and 1550nm.

Room to high temperature measurements of flexible SOI FinFETs with sub-20-nm fins

KAUST Repository

Diab, Amer El Hajj

2014-12-01

We report the temperature dependence of the core electrical parameters and transport characteristics of a flexible version of fin field-effect transistor (FinFET) on silicon-on-insulator (SOI) with sub-20-nm wide fins and high-k/metal gate-stacks. For the first time, we characterize them from room to high temperature (150 °C) to show the impact of temperature variation on drain current, gate leakage current, and transconductance. Variation of extracted parameters, such as low-field mobility, subthreshold swing, threshold voltage, and ON-OFF current characteristics, is reported too. Direct comparison is made to a rigid version of the SOI FinFETs. The mobility degradation with temperature is mainly caused by phonon scattering mechanism. The overall excellent devices performance at high temperature after release is outlined proving the suitability of truly high-performance flexible inorganic electronics with such advanced architecture.

Advanced Microelectronics Technologies for Future Small Satellite Systems

Science.gov (United States)

Alkalai, Leon

1999-01-01

Future small satellite systems for both Earth observation as well as deep-space exploration are greatly enabled by the technological advances in deep sub-micron microelectronics technologies. Whereas these technological advances are being fueled by the commercial (non-space) industries, more recently there has been an exciting new synergism evolving between the two otherwise disjointed markets. In other words, both the commercial and space industries are enabled by advances in low-power, highly integrated, miniaturized (low-volume), lightweight, and reliable real-time embedded systems. Recent announcements by commercial semiconductor manufacturers to introduce Silicon On Insulator (SOI) technology into their commercial product lines is driven by the need for high-performance low-power integrated devices. Moreover, SOI has been the technology of choice for many space semiconductor manufacturers where radiation requirements are critical. This technology has inherent radiation latch-up immunity built into the process, which makes it very attractive to space applications. In this paper, we describe the advanced microelectronics and avionics technologies under development by NASA's Deep Space Systems Technology Program (also known as X2000). These technologies are of significant benefit to both the commercial satellite as well as the deep-space and Earth orbiting science missions. Such a synergistic technology roadmap may truly enable quick turn-around, low-cost, and highly capable small satellite systems for both Earth observation as well as deep-space missions.

Electrical characteristics of SiGe-base bipolar transistors on thin-film SOI substrates

International Nuclear Information System (INIS)

Liao, Shu-Hui; Chang, Shu-Tong

2010-01-01

This paper, based on two-dimensional simulations, provides a comprehensive analysis of the electrical characteristics of the Silicon germanium (SiGe)-base bipolar transistors on thin-film siliconon-insulator (SOI) substrates. The impact of the buried oxide thickness (T OX ), the emitter width (W E ), and the lateral distance between the edge of the intrinsic base and the reach-through region (L col ) on both the AC and DC device characteristics was analyzed in detail. Regarding the DC characteristics, the simulation results suggest that a thicker T OX gives a larger base-collector breakdown voltage (BV CEO ), whereas reducing the T OX leads to an enhanced maximum electric field at the B-C junction. As for the AC characteristics, cut-off frequency (f T ) increases slightly with increasing buried oxide thickness and finally saturates to a constant value when the buried oxide thickness is about 0.15 μm. The collector-substrate capacitance (C CS ) decreases with increasing buried oxide thickness while the maximum oscillation frequency (f max ) increases with increasing buried oxide thickness. Furthermore, the impact of self-heating effects in the device was analyzed in various areas. The thermal resistance as a function of the buried oxide thickness indicates that the thermal resistance of the SiGe-base bipolar transistor on a SOI substrate is slightly higher than that of a bulk SiGe-base bipolar transistor. The thermal resistance is reduced by ∼37.89% when the emitter width is increased by a factor of 5 for a fixed buried oxide thickness of 0.1 μm. All the results can be used to design and optimize SiGe-base bipolar transistors on SOI substrates with minimum thermal resistance to enhance device performance.

A Lateral Differential Resonant Pressure Microsensor Based on SOI-Glass Wafer-Level Vacuum Packaging

Directory of Open Access Journals (Sweden)

Bo Xie

2015-09-01

Full Text Available This paper presents the fabrication and characterization of a resonant pressure microsensor based on SOI-glass wafer-level vacuum packaging. The SOI-based pressure microsensor consists of a pressure-sensitive diaphragm at the handle layer and two lateral resonators (electrostatic excitation and capacitive detection on the device layer as a differential setup. The resonators were vacuum packaged with a glass cap using anodic bonding and the wire interconnection was realized using a mask-free electrochemical etching approach by selectively patterning an Au film on highly topographic surfaces. The fabricated resonant pressure microsensor with dual resonators was characterized in a systematic manner, producing a quality factor higher than 10,000 (~6 months, a sensitivity of about 166 Hz/kPa and a reduced nonlinear error of 0.033% F.S. Based on the differential output, the sensitivity was increased to two times and the temperature-caused frequency drift was decreased to 25%.

A CMOS/SOI Single-input PWM Discriminator for Low-voltage Body-implanted Applications

Directory of Open Access Journals (Sweden)

Jader A. De Lima

2002-01-01

Full Text Available A CMOS/SOI circuit to decode Pulse-Width Modulation (PWM signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a novel double-integration concept and does not require low-pass filtering. Non-overlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 μm single-metal thin-film CMOS/SOI fabrication process and has an effective area of 2 mm2. Measured resolution of encoding parameter α is better than 10% at 6 MHz and VDD = 3.3 V. Idle-mode consumption is 340 μW. Pulses of frequencies up to15 MHz and α =10% can be discriminated for 2.3 V ≤ VDD ≤ 3.3 V. Such an excellent immunity to VDD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.

Hybrid orientation technology and strain engineering for ultra-high ...

Indian Academy of Sciences (India)

Abstract. We report here RF MOSFET performance in sub-45-nm hybrid orientation CMOS technology. Based ... can provide a greater benefit for hole mobility (Yang et al. 2003). ... types of structures; type-I with p-FET on the (110) SOI and.

Band to Band Tunneling (BBT) Induced Leakage Current Enhancement in Irradiated Fully Depleted SOI Devices

Science.gov (United States)

Adell, Phillipe C.; Barnaby, H. J.; Schrimpf, R. D.; Vermeire, B.

2007-01-01

We propose a model, validated with simulations, describing how band-to-band tunneling (BBT) affects the leakage current degradation in some irradiated fully-depleted SOI devices. The dependence of drain current on gate voltage, including the apparent transition to a high current regime is explained.

Reduced nonlinearities in 100-nm high SOI waveguides

Science.gov (United States)

Lacava, C.; Marchetti, R.; Vitali, V.; Cristiani, I.; Giuliani, G.; Fournier, M.; Bernabe, S.; Minzioni, P.

2016-03-01

Here we show the results of an experimental analysis dedicated to investigate the impact of optical non linear effects, such as two-photon absorption (TPA), free-carrier absorption (FCA) and free-carrier dispersion (FCD), on the performance of integrated micro-resonator based filters for application in WDM telecommunication systems. The filters were fabricated using SOI (Silicon-on-Insulator) technology by CEA-Leti, in the frame of the FP7 Fabulous Project, which aims to develop low-cost and high-performance integrated optical devices to be used in new generation passive optical- networks (NG-PON2). Different designs were tested, including both ring-based structures and racetrack-based structures, with single-, double- or triple- resonator configuration, and using different waveguide cross-sections (from 500 x 200 nm to 825 x 100 nm). Measurements were carried out using an external cavity tunable laser source operating in the extended telecom bandwidth, using both continuous wave signals and 10 Gbit/s modulated signals. Results show that the use 100-nm high waveguide allows reducing the impact of non-linear losses, with respect to the standard waveguides, thus increasing by more than 3 dB the maximum amount of optical power that can be injected into the devices before causing significant non-linear effects. Measurements with OOK-modulated signals at 10 Gbit/s showed that TPA and FCA don't affect the back-to-back BER of the signal, even when long pseudo-random-bit-sequences (PRBS) are used, as the FCD-induced filter-detuning increases filter losses but "prevents" excessive signal degradation.

Evaluation of COTS SiGe, SOI, and Mixed Signal Electronic Parts for Extreme Temperature Use in NASA Missions

Science.gov (United States)

Patterson, Richard L.; Hammoud, Ahmad

2010-01-01

The NASA Electronic Parts and Packaging (NEPP) Program sponsors a task at the NASA Glenn Research Center titled "Reliability of SiGe, SOI, and Advanced Mixed Signal Devices for Cryogenic Space Missions." In this task COTS parts and flight-like are evaluated by determining their performance under extreme temperatures and thermal cycling. The results from the evaluations are published on the NEPP website and at professional conferences in order to disseminate information to mission planners and system designers. This presentation discusses the task and the 2010 highlights and technical results. Topics include extreme temperature operation of SiGe and SOI devices, all-silicon oscillators, a floating gate voltage reference, a MEMS oscillator, extreme temperature resistors and capacitors, and a high temperature silicon operational amplifier.

Extreme group index measured and calculated in 2D SOI-based photonic crystal waveguides

DEFF Research Database (Denmark)

Lavrinenko, Andrei; Jacobsen, Rune Shim; Fage-Pedersen, Jacob

2005-01-01

lattice of air-holes in the 216-nm thick silicon layer in an SOI material. Experimental transmission spectra show a mode cut-off around 1562.5 nm for the fundamental photonic bandgap mode. In order to measure and model the group index of modes in the PCW, a time-of-flight (ToF) method is applied....

Quantification, modelling and design for signal history dependent effects in mixed-signal SOI/SOS circuits; Quantification, modelisation et conception prenant en compte les etats anterieurs des signaux dans les circuits mixtes SOI/SOS

Energy Technology Data Exchange (ETDEWEB)

Edwards, C.F.; Redman-White, W.; Bracey, M.; Tenbroek, B.M.; Lee, M.S. [Southampton Univ., Dept. of Electronics and Computer Sciences (United Kingdom); Uren, M.J.; Brunson, K.M. [DERA Farnborough, GU, Hants (United Kingdom)

1999-07-01

This paper deals with how the radiation hardness of mixed signal SOI/SOS CMOS circuits is taken into account at both architectural terms as well as the the transistor level cell designs. The primary issue is to deal with divergent transistor threshold shifts, and to understand the effects of large amplitude non stationary signals on analogue cell behaviour. (authors)

Directly Modulated and ER Enhanced Hybrid III-V/SOI DFB Laser Operating up to 20 Gb/s for Extended Reach Applications in PONs

DEFF Research Database (Denmark)

Cristofori, Valentina; Da Ros, Francesco; Chaibi, Mohamed E.

2017-01-01

We demonstrate error-free performance of an MRR filtered DML on the SOI platform over 40- and 81-km of SSW. The device operates up to 17.5 Gb/s over 81 km and 20 Gb/s over 40 km.......We demonstrate error-free performance of an MRR filtered DML on the SOI platform over 40- and 81-km of SSW. The device operates up to 17.5 Gb/s over 81 km and 20 Gb/s over 40 km....

SOI N-Channel Field Effect Transistors, CHT-NMOS80, for Extreme Temperatures

Science.gov (United States)

Patterson, Richard L.; Hammoud, Almad

2009-01-01

Extreme temperatures, both hot and cold, are anticipated in many of NASA space exploration missions as well as in terrestrial applications. One can seldom find electronics that are capable of operation under both regimes. Even for operation under one (hot or cold) temperature extreme, some thermal controls need to be introduced to provide appropriate ambient temperatures so that spacecraft on-board or field on-site electronic systems work properly. The inclusion of these controls, which comprise of heating elements and radiators along with their associated structures, adds to the complexity in the design of the system, increases cost and weight, and affects overall reliability. Thus, it would be highly desirable and very beneficial to eliminate these thermal measures in order to simplify system's design, improve efficiency, reduce development and launch costs, and improve reliability. These requirements can only be met through the development of electronic parts that are designed for proper and efficient operation under extreme temperature conditions. Silicon-on-insulator (SOI) based devices are finding more use in harsh environments due to the benefits that their inherent design offers in terms of reduced leakage currents, less power consumption, faster switching speeds, good radiation tolerance, and extreme temperature operability. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. The objective of this work was to evaluate the performance of a new commercial-off-the-shelf (COTS) SOI parts over an extended temperature range and to determine the effects of thermal cycling on their performance. The results will establish a baseline on the suitability of such devices for use in space exploration missions under extreme temperatures, and will aid mission planners and circuit designers in the proper selection of electronic parts and circuits. The electronic part investigated in this work comprised of a CHT-NMOS80

Approaches of multilayer overlay process control for 28nm FD-SOI derivative applications

Science.gov (United States)

Duclaux, Benjamin; De Caunes, Jean; Perrier, Robin; Gatefait, Maxime; Le Gratiet, Bertrand; Chapon, Jean-Damien; Monget, Cédric

2018-03-01

Derivative technology like embedded Non-Volatile Memories (eNVM) is raising new types of challenges on the "more than Moore" path. By its construction: overlay is critical across multiple layers, by its running mode: usage of high voltage are stressing leakages and breakdown, and finally with its targeted market: Automotive, Industry automation, secure transactions… which are all requesting high device reliability (typically below 1ppm level). As a consequence, overlay specifications are tights, not only between one layer and its reference, but also among the critical layers sharing the same reference. This work describes a broad picture of the key points for multilayer overlay process control in the case of a 28nm FD-SOI technology and its derivative flows. First, the alignment trees of the different flow options have been optimized using a realistic process assumptions calculation for indirect overlay. Then, in the case of a complex alignment tree involving heterogeneous scanner toolset, criticality of tool matching between reference layer and critical layers of the flow has been highlighted. Improving the APC control loops of these multilayer dependencies has been studied with simulations of feed-forward as well as implementing new rework algorithm based on multi-measures. Finally, the management of these measurement steps raises some issues for inline support and using calculations or "virtual overlay" could help to gain some tool capability. A first step towards multilayer overlay process control has been taken.

The lucky image-motion prediction for simple scene observation based soft-sensor technology

Science.gov (United States)

Li, Yan; Su, Yun; Hu, Bin

2015-08-01

High resolution is important to earth remote sensors, while the vibration of the platforms of the remote sensors is a major factor restricting high resolution imaging. The image-motion prediction and real-time compensation are key technologies to solve this problem. For the reason that the traditional autocorrelation image algorithm cannot meet the demand for the simple scene image stabilization, this paper proposes to utilize soft-sensor technology in image-motion prediction, and focus on the research of algorithm optimization in imaging image-motion prediction. Simulations results indicate that the improving lucky image-motion stabilization algorithm combining the Back Propagation Network (BP NN) and support vector machine (SVM) is the most suitable for the simple scene image stabilization. The relative error of the image-motion prediction based the soft-sensor technology is below 5%, the training computing speed of the mathematical predication model is as fast as the real-time image stabilization in aerial photography.

Quantification, modelling and design for signal history dependent effects in mixed-signal SOI/SOS circuits

International Nuclear Information System (INIS)

Edwards, C.F.; Redman-White, W.; Bracey, M.; Tenbroek, B.M.; Lee, M.S.; Uren, M.J.; Brunson, K.M.

1999-01-01

This paper deals with how the radiation hardness of mixed signal SOI/SOS CMOS circuits is taken into account at both architectural terms as well as the the transistor level cell designs. The primary issue is to deal with divergent transistor threshold shifts, and to understand the effects of large amplitude non stationary signals on analogue cell behaviour. (authors)

Analysis of pre-service physics teacher skills designing simple physics experiments based technology

Science.gov (United States)

Susilawati; Huda, C.; Kurniawan, W.; Masturi; Khoiri, N.

2018-03-01

Pre-service physics teacher skill in designing simple experiment set is very important in adding understanding of student concept and practicing scientific skill in laboratory. This study describes the skills of physics students in designing simple experiments based technologicall. The experimental design stages include simple tool design and sensor modification. The research method used is descriptive method with the number of research samples 25 students and 5 variations of simple physics experimental design. Based on the results of interviews and observations obtained the results of pre-service physics teacher skill analysis in designing simple experimental physics charged technology is good. Based on observation result, pre-service physics teacher skill in designing simple experiment is good while modification and sensor application are still not good. This suggests that pre-service physics teacher still need a lot of practice and do experiments in designing physics experiments using sensor modifications. Based on the interview result, it is found that students have high enough motivation to perform laboratory activities actively and students have high curiosity to be skilled at making simple practicum tool for physics experiment.

Modulation of the SSTA decadal variation on ENSO events and relationships of SSTA With LOD,SOI, etc

Science.gov (United States)

Liao, D. C.; Zhou, Y. H.; Liao, X. H.

2007-01-01

Interannual and decadal components of the length of day (LOD), Southern Oscillation Index (SOI) and Sea Surface Temperature anomaly (SSTA) in Nino regions are extracted by band-pass filtering, and used for research of the modulation of the SSTA on the ENSO events. Results show that besides the interannual components, the decadal components in SSTA have strong impacts on monitoring and representing of the ENSO events. When the ENSO events are strong, the modulation of the decadal components of the SSTA tends to prolong the life-time of the events and enlarge the extreme anomalies of the SST, while the ENSO events, which are so weak that they can not be detected by the interannual components of the SSTA, can also be detected with the help of the modulation of the SSTA decadal components. The study further draws attention to the relationships of the SSTA interannual and decadal components with those of LOD, SOI, both of the sea level pressure anomalies (SLPA) and the trade wind anomalies (TWA) in tropic Pacific, and also with those of the axial components of the atmospheric angular momentum (AAM) and oceanic angular momentum (OAM). Results of the squared coherence and coherent phases among them reveal close connections with the SSTA and almost all of the parameters mentioned above on the interannual time scales, while on the decadal time scale significant connections are among the SSTA and SOI, SLPA, TWA, ?3w and ?3w+v as well, and slight weaker connections between the SSTA and LOD, ?3pib and ?3bp

Ultra-low power high temperature and radiation hard complementary metal-oxide-semiconductor (CMOS) silicon-on-insulator (SOI) voltage reference.

Science.gov (United States)

Boufouss, El Hafed; Francis, Laurent A; Kilchytska, Valeriya; Gérard, Pierre; Simon, Pascal; Flandre, Denis

2013-12-13

This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40-200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.

Boron impurity at the Si/SiO2 interface in SOI wafers and consequences for piezoresistive MEMS devices

International Nuclear Information System (INIS)

Nafari, A; Karlen, D; Enoksson, P; Rusu, C; Svensson, K

2009-01-01

In this work, the electrical performance of piezoresistive devices fabricated on thinned SOI wafers has been investigated. Specifically, SOI wafers manufactured with the standard bond-and-etch back method (BESOI), commonly used for MEMS fabrication, have been studied. Results from electrical measurements and SIMS characterization show the presence of a boron impurity close to the buried oxide, even on unprocessed wafers. If the boron impurity overlaps with the piezoresistors on the device, it can create non-defined pn-junctions and thus allow conduction through the substrate, leading to stray connections and excessive noise. The thickness of the boron impurity can extend up to several µm, thus setting a thickness limit for the thinnest parts of a MEMS device. This work shows how this impurity can fundamentally affect the functionality of piezoresistive devices. Design rules of how to avoid this are presented

Space and military radiation effects in silicon-on-insulator devices

International Nuclear Information System (INIS)

Schwank, J.R.

1996-09-01

Advantages in transient ionizing and single-event upset (SEU) radiation hardness of silicon-on-insulator (SOI) technology spurred much of its early development. Both of these advantages are a direct result of the reduced charge collection volume inherent to SOI technology. The fact that SOI transistor structures do not include parasitic n-p-n-p paths makes them immune to latchup. Even though considerable improvement in transient and single-event radiation hardness can be obtained by using SOI technology, there are some attributes of SOI devices and circuits that tend to limit their overall hardness. These attributes include the bipolar effect that can ultimately reduce the hardness of SOI ICs to SEU and transient ionizing radiation, and charge buildup in buried and sidewall oxides that can degrade the total-dose hardness of SOI devices. Nevertheless, high-performance SOI circuits can be fabricated that are hardened to both space and nuclear radiation environments, and radiation-hardened systems remain an active market for SOI devices. The effects of radiation on SOI MOS devices are reviewed

Report on achievements in fiscal 1998. Development on an immediately effective and innovative energy and environment technology (Research and development of an information terminal LSI requiring very low power consumption); 1998 nendo sokkoteki kakushinteki energy kankyo gijutsu kaihatsu seika hokokusho. Gokuteidenryoku joho tanmatsuyo LSI no kenkyu kaihatsu

Energy Technology Data Exchange (ETDEWEB)

NONE

1999-09-01

It is intended that the technology for SOI expected of consuming very small power and operating at high speed be realized as an information terminal LSI for the coming 21st century. Therefore, research and development is made on the fundamental technology for LSI which operates in CMOS devices at high speed even with as very low voltage as about 0.5V by applying the optimized digital and analog circuit technology. Specifically, the aim is placed on enhancement of drive capability of transistors over that in the present devices, reduction of load capacity, and a very thin film complete depletion type SOI device that can be most expected of reduction of area as the main subjects. It is also intended to establish a method to realize very low power consuming LSI by using a CMOS circuit (a multi threshold value type CMOS circuit) that uses transistors with different threshold voltages and is optimized for the above SOI device. The achievements in this fiscal year include: a prototype 256kbSRAM was fabricated by using different design rules and wafer sizes, and the performance evaluation thereon was obtained; investigations were carried out on selection of SOI models for circuit simulation and on a high accuracy complete depletion type SOI models; and design criteria required for LSI design were put in order for comprehensive trial fabrication. (NEDO)

Monolithic integration of InGaAs/InP multiple quantum wells on SOI substrates for photonic devices

Science.gov (United States)

Li, Zhibo; Wang, Mengqi; Fang, Xin; Li, Yajie; Zhou, Xuliang; Yu, Hongyan; Wang, Pengfei; Wang, Wei; Pan, Jiaoqing

2018-02-01

A direct epitaxy of III-V nanowires with InGaAs/InP multiple quantum wells on v-shaped trenches patterned silicon on insulator (SOI) substrates was realized by combining the standard semiconductor fabrication process with the aspect ratio trapping growth technique. Silicon thickness as well as the width and gap of each nanowire were carefully designed to accommodate essential optical properties and appropriate growth conditions. The III-V element ingredient, crystalline quality, and surface topography of the grown nanowires were characterized by X-ray diffraction spectroscopy, photoluminescence, and scanning electron microscope. Geometrical details and chemical information of multiple quantum wells were revealed by transmission electron microscopy and energy dispersive spectroscopy. Numerical simulations confirmed that the optical guided mode supported by one single nanowire was able to propagate 50 μm with ˜30% optical loss. This proposed integration scheme opens up an alternative pathway for future photonic integrations of III-V devices on the SOI platform at nanoscale.

A National Partnership-Based Summer Learning Initiative to Engage Underrepresented Students with Science, Technology, Engineering and Mathematics

Science.gov (United States)

Melvin, Leland

2010-01-01

In response to the White House Educate to Innovate campaign, NASA developed a new science, technology, engineering, and mathematics (STEM) education program for non-traditional audiences that also focused on public-private partnerships and nationwide participation. NASA recognized that summer break is an often overlooked but opportune time to engage youth in STEM experiences, and elevated its ongoing commitment to the cultivation of diversity. The Summer of Innovation (SoI) is the resulting initiative that uses NASA's unique missions and resources to boost summer learning, particularly for students who are underrepresented, underserved and underperforming in STEM. The SoI pilot, launched in June 2010, is a multi-faceted effort designed to improve STEM teaching and learning through partnership, multi-week summer learning programs, special events, a national concluding event, and teacher development. The SoI pilot features strategic infusion of NASA content and educational resource materials, sustainability through STEM Learning Communities, and assessments of effectiveness of SoI interventions with other pilot efforts. This paper examines the inception and development of the Summer of Innovation pilot project, including achievements and effectiveness, as well as lessons learned for future efforts.

LORINE: Neutron emission Locator by SOI detectors

Energy Technology Data Exchange (ETDEWEB)

Hamrita, H.; Kondrasovs, V.; Borbotte, J. M.; Normand, S. [CEA, LIST, Laboratoire Capteurs et Architectures Electronique, F-91191 Gif-sur-Yvette Cedex (France); Saurel, N. [CEA, DAM, VALDUC, F-21120 Is sur Tille (France)

2009-07-01

The aim of this work is to develop a fast Neutron Emission Locator based on silicon on Insulator detector (LORINE). This locator can be used in the presence of significant flux of gamma radiation. LORINE was developed to locate areas containing a significant amount of actinide during the dismantling operations of equipment. From the results obtained in laboratory, we have proposed the prototype of neutron emission locator as follows: the developed design consists of 5 SOI (Silicon-on-insulator) detectors (1*1 cm{sup 2}) with their charge preamplifiers and their respective converters. All are installed on 5 faces of a boron polyethylene cube (5*5*5 cm{sup 3}). This cube plays the role of neutron shielding between the several detectors. The design must be so compact for use in glove boxes. An electronic card based on micro-controller has been made to control sensors and to send the necessary information to the computer. Location of fast neutron sources does not yet exist in a so compact design and it can be operated in the presence of very important gamma radiation flux

On-chip grating coupler array on the SOI platform for fan-in/fan-out of multi-core fibers with low insertion loss and crosstalk

DEFF Research Database (Denmark)

Ding, Yunhong; Ye, Feihong; Peucheret, Christophe

2014-01-01

We design and fabricate a compact multi-core fiber fan-in/fan-out using a fully-etched grating coupler array on the SOI platform. Lowest coupling loss of 6.8 dB with 3 dB bandwidth of 48 nm and crosstalk lower than ×32 dB are demonstrated.......We design and fabricate a compact multi-core fiber fan-in/fan-out using a fully-etched grating coupler array on the SOI platform. Lowest coupling loss of 6.8 dB with 3 dB bandwidth of 48 nm and crosstalk lower than ×32 dB are demonstrated....

A New Nonlinear Model of Body Resistance in Nanometer PD SOI MOSFETs

Directory of Open Access Journals (Sweden)

Arash Daghighi

2011-01-01

Full Text Available In this paper, a nonlinear model for the body resistance of a 45nm PD SOI MOSFET is developed. This model verified on the base of the small signal three-dimensional simulation results. In this paper by using the three-dimensional simulation of ISE-TCAD software, the indicating factors of body resistance in nanometer transistors and then are shown, using the surface potential model. A mathematical relation to calculat the body resistance incorporating device width and body potential was derived. Excellent agreement was obtained by comparing the model outputs and three-dimensional simulation results.

Exploring the Impact of Fuel Data Acquisition Technology on the USMC Expeditionary Energy Command and Control System

Science.gov (United States)

2016-09-01

CA: Sage Publications, Inc. Tulusan, J., Soi, L., Paefgen, J., Brogle, M., & Staake, T. (2011). Eco -efficient feedback technologies : Which eco ...IMPACT OF FUEL DATA ACQUISITION TECHNOLOGY ON THE USMC EXPEDITIONARY ENERGY COMMAND AND CONTROL SYSTEM by Jeremy F. Thomas September 2016...DATE September 2016 3. REPORT TYPE AND DATES COVERED Master’s Thesis 4. TITLE AND SUBTITLE EXPLORING THE IMPACT OF FUEL DATA ACQUISITION TECHNOLOGY

Fiscal 2000 achievement report. Development of prompt-effect technology for innovative energy environment (Research and development of extremely low power consuming LSI for information terminal); 2000 nendo sokkoteki kakushinteki energy kankyo gijutsu kaihatsu seika hokokusho. Gokuteidenryoku joho tanmatsuyo LSI no kenkyu kaihatsu

Energy Technology Data Exchange (ETDEWEB)

NONE

2001-03-01

With the advancement of information technologies, multimedia information terminals such as handyphone systems and mobile computers are increasing in number and improving in quality, sharply increasing power consumption in this domain. So as to suppress the power consumption, efforts are exerted to develop technologies for information terminal LSI (large-scale integration) substrates consuming extremely low power and still capable of high-speed operation. Studied are a device technology of SOI (silicon on insulator) to realize a remarkable reduction in power consumption and enable high-speed operation and a circuit technology of the multi-threshold CMOS (complementary metal-oxide semiconductor) advantageous to the achievement of low-voltage high-speed operation. In concrete terms, the efforts center about an extremely thin film SOI device of the full depletion type higher in transistor driving capability, lower in load capacity, and smaller in surface area than those currently in use, and aim to put such an SOI device on an optimized multi-threshold CMOS circuit for the establishment of techniques toward the embodiment of an LSI substrate consuming extremely low electric power. (NEDO)

Total dose behavior of partially depleted SOI dynamic threshold voltage MOS (DTMOS) for very low supply voltage applications (0.6 - 1 V)

International Nuclear Information System (INIS)

Ferlet-Cavrois, V.; Musseau, O.; Leray, J.L.; Faynot, O.; Raynaud, C.; Pelloie, J.L.

1999-01-01

In this paper, we presented two DTMOS architectures processed with a partially depleted SOI technology. The first architecture, DTMOS without limiting transistor, is dedicated to ultra-low voltage applications, at 0.6 V. For 1V applications, the second architecture, DTMOS with limiting transistor, needs an additional transistor to limit the body-source diode current. The total dose irradiation of both DTMOS architectures induces no change of the drain current, but an increase of the body-source diode current. Total dose induced trapped charge in the buried oxide increases the body potential of the DTMOS transistor. It induces an increase of the current flow at the back interface of the silicon film. Irradiation of complex circuits using DTMOS transistors would lead to a degradation of the stand-by consumption. (authors)

Fully-etched apodized fiber-to-chip grating coupler on the SOI platform with -0.78 dB coupling efficiency using photonic crystals and bonded Al mirror

DEFF Research Database (Denmark)

Ding, Yunhong; Ou, Haiyan; Peucheret, Christophe

2014-01-01

We design and fabricate an ultra-high coupling efficiency fully-etched apodized grating coupler on the SOI platform using photonic crystals and bonded aluminum mirror. Ultra-high coupling efficiency of -0.78 dB with a 3 dB bandwidth of 74 nm are demonstrated.......We design and fabricate an ultra-high coupling efficiency fully-etched apodized grating coupler on the SOI platform using photonic crystals and bonded aluminum mirror. Ultra-high coupling efficiency of -0.78 dB with a 3 dB bandwidth of 74 nm are demonstrated....

A low specific on-resistance SOI MOSFET with dual gates and a recessed drain

International Nuclear Information System (INIS)

Luo Xiao-Rong; Hu Gang-Yi; Zhang Zheng-Yuan; Luo Yin-Chun; Fan Ye; Wang Xiao-Wei; Fan Yuan-Hang; Cai Jin-Yong; Wang Pei; Zhou Kun

2013-01-01

A low specific on-resistance (R on,sp ) integrable silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistor (MOSFET) is proposed and investigated by simulation. The MOSFET features a recessed drain as well as dual gates, which consist of a planar gate and a trench gate extended to the buried oxide layer (BOX) (DGRD MOSFET). First, the dual gates form dual conduction channels, and the extended trench gate also acts as a field plate to improve the electric field distribution. Second, the combination of the trench gate and the recessed drain widens the vertical conduction area and shortens the current path. Third, the P-type top layer not only enhances the drift doping concentration but also modulates the surface electric field distributions. All of these sharply reduce R on,sp and maintain a high breakdown voltage (BV). The BV of 233 V and R on,sp of 4.151 mΩ·cm 2 (V GS = 15 V) are obtained for the DGRD MOSFET with 15-μm half-cell pitch. Compared with the trench gate SOI MOSFET and the conventional MOSFET, R on,sp of the DGRD MOSFET decreases by 36% and 33% with the same BV, respectively. The trench gate extended to the BOX synchronously acts as a dielectric isolation trench, simplifying the fabrication processes. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Mapping the broadband polarization properties of linear 2D SOI photonic crystal waveguides

DEFF Research Database (Denmark)

Canning, John; Skivesen, Nina; Kristensen, Martin

2007-01-01

Both quasi-TE and TM polarisation spectra for a silicon- on-insulator (SOI) waveguide are recorded over (1100-1700) nm using a broadband supercontinuum source. By studying both the input and output polarisation eigenstates we observe narrowband resonant cross coupling near the lowest quasi-TE mode...... cut-off. We also observe relatively broadband mixing between the two eigenstates to generate a complete photonic bandgap. By careful analysis of the output polarisation state we report on an inherent non-reciprocity between quasi TE and TM fundamental mode cross coupling. The nature of polarisation...

Universal trench design method for a high-voltage SOI trench LDMOS

Institute of Scientific and Technical Information of China (English)

Hu Xiarong; Zhang Bo; Luo Xiaorong; Li Zhaoji

2012-01-01

The design method for a high-voltage SOl trench LDMOS for various trench permittivities,widths and depths is introduced.A universal method for efficient design is presented for the first time,taking the trade-off between breakdown voltage (BV) and specific on-resistance (Rs,on) into account.The high-k (relative permittivity)dielectric is suitable to fill a shallow and wide trench while the low-k dielectric is suitable to fill a deep and narrow trench.An SOI LDMOS with a vacuum trench in the drift region is also discussed.Simulation results show that the high FOM BV2/Rs,on can be achieved with a trench filled with the low-k dielectric due to its shortened cell-pitch.

Characterization of silicon-on-insulator wafers

Science.gov (United States)

Park, Ki Hoon

The silicon-on-insulator (SOI) is attracting more interest as it is being used for an advanced complementary-metal-oxide-semiconductor (CMOS) and a base substrate for novel devices to overcome present obstacles in bulk Si scaling. Furthermore, SOI fabrication technology has improved greatly in recent years and industries produce high quality wafers with high yield. This dissertation investigated SOI material properties with simple, yet accurate methods. The electrical properties of as-grown wafers such as electron and hole mobilities, buried oxide (BOX) charges, interface trap densities, and carrier lifetimes were mainly studied. For this, various electrical measurement techniques were utilized such as pseudo-metal-oxide-semiconductor field-effect-transistor (PseudoMOSFET) static current-voltage (I-V) and transient drain current (I-t), Hall effect, and MOS capacitance-voltage/capacitance-time (C-V/C-t). The electrical characterization, however, mainly depends on the pseudo-MOSFET method, which takes advantage of the intrinsic SOI structure. From the static current-voltage and pulsed measurement, carrier mobilities, lifetimes and interface trap densities were extracted. During the course of this study, a pseudo-MOSFET drain current hysteresis regarding different gate voltage sweeping directions was discovered and the cause was revealed through systematic experiments and simulations. In addition to characterization of normal SOI, strain relaxation of strained silicon-on-insulator (sSOI) was also measured. As sSOI takes advantage of wafer bonding in its fabrication process, the tenacity of bonding between the sSOI and the BOX layer was investigated by means of thermal treatment and high dose energetic gamma-ray irradiation. It was found that the strain did not relax with processes more severe than standard CMOS processes, such as anneals at temperature as high as 1350 degree Celsius.

Discovery of Teleconnections Using Data Mining Technologies in Global Climate Datasets

Directory of Open Access Journals (Sweden)

Fan Lin

2007-10-01

Full Text Available In this paper, we apply data mining technologies to a 100-year global land precipitation dataset and a 100-year Sea Surface Temperature (SST dataset. Some interesting teleconnections are discovered, including well-known patterns and unknown patterns (to the best of our knowledge, such as teleconnections between the abnormally low temperature events of the North Atlantic and floods in Northern Bolivia, abnormally low temperatures of the Venezuelan Coast and floods in Northern Algeria and Tunisia, etc. In particular, we use a high dimensional clustering method and a method that mines episode association rules in event sequences. The former is used to cluster the original time series datasets into higher spatial granularity, and the later is used to discover teleconnection patterns among events sequences that are generated by the clustering method. In order to verify our method, we also do experiments on the SOI index and a 100-year global land precipitation dataset and find many well-known teleconnections, such as teleconnections between SOI lower events and drought events of Eastern Australia, South Africa, and North Brazil; SOI lower events and flood events of the middle-lower reaches of Yangtze River; etc. We also do explorative experiments to help domain scientists discover new knowledge.

Optimal Design of an Ultrasmall SOI-Based 1 × 8 Flat-Top AWG by Using an MMI

Directory of Open Access Journals (Sweden)

Hongqiang Li

2013-01-01

Full Text Available Four methods based on a multimode interference (MMI structure are optimally designed to flatten the spectral response of silicon-on-insulator- (SOI- based arrayed-waveguide grating (AWG applied in a demodulation integration microsystem. In the design for each method, SOI is selected as the material, the beam propagation method is used, and the performances (including the 3 dB passband width, the crosstalk, and the insertion loss of the flat-top AWG are studied. Moreover, the output spectrum responses of AWGs with or without a flattened structure are compared. The results show that low insertion loss, crosstalk, and a flat and efficient spectral response are simultaneously achieved for each kind of structure. By comparing the four designs, the design that combines a tapered MMI with tapered input/output waveguides, which has not been previously reported, was shown to yield better results than others. The optimized design reduced crosstalk to approximately −21.9 dB and had an insertion loss of −4.36 dB and a 3 dB passband width, that is, approximately 65% of the channel spacing.

A novel partial SOI LDMOSFET with periodic buried oxide for breakdown voltage and self heating effect enhancement

Science.gov (United States)

Jamali Mahabadi, S. E.; Rajabi, Saba; Loiacono, Julian

2015-09-01

In this paper a partial silicon on insulator (PSOI) lateral double diffused metal oxide semiconductor field effect transistor (LDMOSFET) with periodic buried oxide layer (PBO) for enhancing breakdown voltage (BV) and self-heating effects (SHEs) is proposed for the first time. This new structure is called periodic buried oxide partial silicon on insulator (PBO-PSOI). In this structure, periodic small pieces of SiO2 were used as the buried oxide (BOX) layer in PSOI to modulate the electric field in the structure. It was demonstrated that the electric field is distributed more evenly by producing additional electric field peaks, which decrease the common peaks near the drain and gate junctions in the PBO-PSOI structure. Hence, the area underneath the electric field curve increases which leads to higher breakdown voltage. Also a p-type Si window was introduced in the source side to force the substrate to share the vertical voltage drop, leading to a higher vertical BV. Furthermore, the Si window under the source and those between periodic pieces of SiO2 create parallel conduction paths between the active layer and substrate thereby alleviating the SHEs. Simulations with the two dimensional ATLAS device simulator from the Silvaco suite of simulation tools show that the BV of PBO-PSOI is 100% higher than that of the conventional partial SOI (C-PSOI) structure. Furthermore the PBO-PSOI structure alleviates SHEs to a greater extent than its C-PSOI counterpart. The achieved drain current for the PBO-PSOI structure (100 μA), at drain-source voltage of VDS = 100 V and gate-source voltage of VGS = 25 V, is shown to be significantly larger than that in C-PSOI and fully depleted SOI (FD-SOI) structures (87 μA and 51 μA respectively). Drain current can be further improved at the expense of BV by increasing the doping of the drift region.

Growth and characterization of InP/GaAs on SOI by MOCVD

International Nuclear Information System (INIS)

Karam, N.H.; Haven, V.; Vernon, S.M.; Namavar, F.; El-Masry, N.; Haegel, N.; Al-Jassin, M.M.

1990-01-01

This paper reports that epitaxial InP films have been successfully deposited on GaAs coated silicon wafers with a buried oxide for the first time by MOCVD. The SOI wafers were prepared using the Separation by Implantation of Oxygen (SIMOX) process. The quality of InP on SIMOX is comparable to the best of InP on Si deposited in the same reactor. Preliminary results on defect reduction techniques such as Thermal Cycle Growth (TCG) show an order of magnitude increase in the photoluminescence intensity and a factor of five reduction in the defect density. TCG has been found more effective than Thermal Cycle Annealing (TCA) in improving the crystalline perfection and optical properties of the deposited films

Radiation effects in semiconductors: technologies for hardened integrated circuits

International Nuclear Information System (INIS)

Charlot, J.M.

1984-01-01

Various technologies are used to manufacture integrated circuits for electronic systems. But for specific applications, including those with radiation environment, it is necessary to choose an appropriate technology or to improve a specific one in order to reach a definite hardening level. The aim of this paper is to present the main effects induced by radiation (neutrons and gamma rays) into the basic semiconductor devices, to explain some physical degradation mechanisms and to propose solutions for hardened integrated circuit fabrication. The analysis involves essentially the monolithic structure of the integrated circuits and the isolation technology of active elements. In conclusion, the advantages of EPIC and SOS technologies are described and the potentialities of new technologies (GaAs and SOI) are presented. (author)

A rugged 650 V SOI-based high-voltage half-bridge IGBT gate driver IC for motor drive applications

Science.gov (United States)

Hua, Qing; Li, Zehong; Zhang, Bo; Chen, Weizhong; Huang, Xiangjun; Feng, Yuxiang

2015-05-01

This paper proposes a rugged high-voltage N-channel insulated gate bipolar transistor (IGBT) gate driver integrated circuit. The device integrates a high-side and a low-side output stages on a single chip, which is designed specifically for motor drive applications. High-voltage level shift technology enables the high-side stage of this device to operate up to 650 V. The logic inputs are complementary metal oxide semiconductor (CMOS)/transistor transistor logic compatible down to 3.3 V. Undervoltage protection functionality with hysteresis characteristic has also been integrated to enhance the device reliability. The device is fabricated in a 1.0 μm, 650 V high-voltage bipolar CMOS double-diffused metal oxide semiconductor (BCD) on silicon-on-insulator (SOI) process. Deep trench dielectric isolation technology is employed to provide complete electrical isolation with advantages such as reduced parasitic effects, excellent noise immunity and low leakage current. Experimental results show that the isolation voltage of this device can be up to approximately 779 V at 25°C, and the leakage current is only 5 nA at 650 V, which is 15% higher and 67% lower than the conventional ones. In addition, it delivers an excellent thermal stability and needs very low quiescent current and offers a high gate driver capability which is needed to adequately drive IGBTs that have large input capacitances.

SiC materials: a semiconductor family for the next century

Science.gov (United States)

Camassel, Jean; Contreras, Sylvie; Robert, Jean-Louis

2000-03-01

The current status of SiC semiconductor materials is reviewed, with emphasize on forthcoming applications. In a first part one focuses on the most important physical properties. Then, power device and micro-opto-electronic applications, using both 4H and 6H-SiC, are presented. Technological problems which have to be solved in order to realize simple planar device are considered. Emphasize is set on the French and European efforts, and on the USA and Japan's ones. In a second part, one deals with advanced high temperature industrial sensor applications. Interest for cubic 3C-SiC eposited on Silicon On Insulator (SOI) is demonstrated and results of comparative examinations of different 3CSiC/SOI materials are briefly given.

Launching of multi-project wafer runs in ePIXfab with micron-scale silicon rib waveguide technology

Science.gov (United States)

Aalto, Timo; Cherchi, Matteo; Harjanne, Mikko; Ylinen, Sami; Kapulainen, Markku; Vehmas, Tapani

2014-03-01

Silicon photonics is a rapidly growing R&D field where universities, institutes and companies are all involved and the business expectations for the next few years are high. One of the key enabling elements that led to the present success of silicon photonics is ePIXfab. It is a consortium of institutes that has together offered multi-project wafer (MPW) runs, packaging services, training, and feasibility studies. These services have significantly lowered the barrier of various research groups and companies to start developing silicon photonics. Until now the MPW services have been offered by the ePIXfab partners IMEC, CEA-Leti and IHP, which all use CMOS-type silicon photonics technology with a typical silicon-on-insulator (SOI) waveguide thickness of 220 nm. In November 2013 this MPW offering was expanded by the ePIXfab partner VTT that opened the access to its 3 μm SOI waveguide platform via ePIXfab MPW runs. This technology platform is complementary to the mainstream silicon photonics technology (220 nm) and it offers such benefits as very low losses, small polarization dependency, ultrabroadband operation and low starting costs

Hole mobility enhancement of p-MOSFETs using global and local Ge-channel technologies

International Nuclear Information System (INIS)

Takagi, Shinichi; Tezuka, T.; Irisawa, T.; Nakaharai, S.; Maeda, T.; Numata, T.; Ikeda, K.; Sugiyama, N.

2006-01-01

Mobility enhancement technologies have currently been recognized as mandatory for future scaled MOSFETs. In this paper, we review our recent results on high hole mobility p-MOSFETs using global/local SiGe or Ge channels. There are two directions for introducing SiGe or Ge channels into Si CMOS platform. One is to use SiGe or Ge global substrates and the other is to form SiGe or Ge-channel regions locally on Si wafers. In both cases, the Ge condensation technique, where Ge-channel layers are formed by oxidizing SiGe films on SOI substrates, are effectively utilized. As for the global technologies, ultrathin GOI substrates are prepared and used to fabricate high mobility GOI p-MOSFETs. As for the local technologies, SGOI or GOI channels are formed locally in the active area of p-MOSFETs on SOI wafers. It is shown that the hole mobility enhancement factor of as high as 10 is obtained in locally fabricated p-MOSFETs through the effects of high-Ge content and the compressive strain. Furthermore, the local Ge-channel technologies are combined with global SiGe or Ge substrates for pursuing the optimal and individual design of n-MOSFETs and p-MOSFETs on a single Si wafer. The CMOS device composed of strained-Si n-MOSFETs and SGOI p-MOSFETs is successfully integrated on a same wafer, which is a promising CMOS structure under deep sub 100 nm technology nodes

Error-free Dispersion-uncompensated Transmission at 20 Gb/s over SSMF using a Hybrid III-V/SOI DML with MRR Filtering

DEFF Research Database (Denmark)

Cristofori, Valentina; Kamchevska, Valerija; Ding, Yunhong

2016-01-01

Error-free 20-Gb/s directly-modulated transmission is achieved by enhancing the dispersion tolerance of a III-V/SOI DFB laser with a silicon micro-ring resonator. Low (∼0.4 dB) penalty compared to back-to-back without ring is demonstrated after 5-km SSMF....

Dielectric isolation for power integrated circuits; Isolation dielectrique enterree pour les circuits integres de puissance

Energy Technology Data Exchange (ETDEWEB)

Zerrouk, D.

1997-07-18

Considerable efforts have been recently directed towards integrating onto the same chip, sense or protection elements that is low voltage analog and/or digital control circuitry together with high voltage/high current devices. Most of these so called `smart power` devices use either self isolation, junction isolation or Silicon-On-Insulator (SOI) to integrate low voltage elements with vertical power devices. Dielectric isolation is superior to the other isolation techniques such as self isolation or junction isolation. Thesis work consists of the study of the feasibility of a dielectric technology based on the melting and the solidification in a Rapid Thermal Processing furnace (RTP), of thick polysilicon films deposited on oxide. The purpose of this technique is to obtain substrate with localized SOI structures for smart power applications. SOI technology offers significant potential advantages, such as non-occurrence of latch-up in CMOS structures, high packaging density, low parasitic capacitance and the possibility of 3D structures. In addition, SOI technology using thick silicon films (10-100 {mu}m) offers special advantages for high voltage integrated circuits. Several techniques have been developed to form SOI films. Zone melting recrystallization is one of the most promising for localized SOI. The SOI structures have first been analyzed in term of extended defects. N-channel MOSFET`s transistors have also been fabricated in the SOI substrates and electrically characterized (threshold voltages, off-state leakage current, mobilities,...). The SOI transistors exhibit good characteristics, although inferior to witness transistors. The recrystallized silicon films are therefore found to be suitable for the fabrication of SOI devices. (author) 106 refs.

Radiation effects in semiconductors: technologies for hardened integrated circuits

International Nuclear Information System (INIS)

Charlot, J.M.

1983-09-01

Various technologies are used to manufacture integrated circuits for electronic systems. But for specific applications, including those with radiation environment, it is necessary to choose an appropriate technologie or to improve a specific one in order to reach a definite hardening level. The aim of this paper is to present the main effects induced by radiation (neutrons and gamma rays) into the basic semiconductor devices, to explain some physical degradation mechanisms and to propose solutions for hardened integrated circuit fabrication. The analysis involves essentially the monolithic structure of the integrated circuits and the isolation technology of active elements. In conclusion, the advantages of EPIC and SOS technologies are described and the potentialities of new technologies (GaAs and SOI) are presented

A silicon doped hafnium oxide ferroelectric p–n–p–n SOI tunneling field–effect transistor with steep subthreshold slope and high switching state current ratio

Directory of Open Access Journals (Sweden)

Saeid Marjani

2016-09-01

Full Text Available In this paper, a silicon–on–insulator (SOI p–n–p–n tunneling field–effect transistor (TFET with a silicon doped hafnium oxide (Si:HfO2 ferroelectric gate stack is proposed and investigated via 2D device simulation with a calibrated nonlocal band–to–band tunneling model. Utilization of Si:HfO2 instead of conventional perovskite ferroelectrics such as lead zirconium titanate (PbZrTiO3 and strontium bismuth tantalate (SrBi2Ta2O9 provides compatibility to the CMOS process as well as improved device scalability. By using Si:HfO2 ferroelectric gate stack, the applied gate voltage is effectively amplified that causes increased electric field at the tunneling junction and reduced tunneling barrier width. Compared with the conventional p–n–p–n SOI TFET, the on–state current and switching state current ratio are appreciably increased; and the average subthreshold slope (SS is effectively reduced. The simulation results of Si:HfO2 ferroelectric p–n–p–n SOI TFET show significant improvement in transconductance (∼9.8X enhancement at high overdrive voltage and average subthreshold slope (∼35% enhancement over nine decades of drain current at room temperature, indicating that this device is a promising candidate to strengthen the performance of p–n–p–n and conventional TFET for a switching performance.

Grazing-incident PIXE Analysis Technology

International Nuclear Information System (INIS)

Li Hongri; Wang Guangpu; Liang Kun; Yang Ru; Han Dejun

2009-01-01

In the article, the grazing incidence technology is first applied to the PIXE (proton induced X-ray emission) analysis. Three pieces of samples were investigated, including the contaminated aluminium substrate, the SIMOX (separated by oxygen implantation) SOI (Silicon on Insulator) sample and the silicon wafer implanted with Fe + . The results reveal that the grazing-incident proton can improve the sensitivity of PIXE in trace analysis, especially for samples contaminated on surface. With the penetration depth of the proton bean decreased, the ratio of the peak area to the detection limit raised observably and the sensitivity near the sample surface increased. (authors)

L’empathie comme outil herméneutique du soi: Note sur Paul Ricœur et Heinz Kohut

Directory of Open Access Journals (Sweden)

Michel Dupuis

2011-01-01

Full Text Available Le bref texte que Paul Ricœur consacre en 1986 à la psychanalyse développée par Heinz Kohut révèle une réinterprétation phénoménologique à la fois du contenu et des fonctions de l'empathie, au total considérée comme un véritable outil à l'œuvre dans l'herméneutique du soi. La vision kohutienne de la constitution du soi et du processus thérapeutique analytique produit une espèce de “dé-sentimentalisation” de l'empathie, en soulignant le rôle crucial du transfert intersubjectif, fort à distance de la théorie (freudienne solipsiste de l'ego.The short text published in 1986 by Paul Ricoeur about Heinz Kohut's psychoanalysis of the self reveals a phenomenological reinterpretation of the content and the functions of empathy, finally considered as an effective tool of the hermeneutics of the self. Kohut's model of constitution of the self and of the therapeutic analytical process produces a kind of “de-sentimentalization” of empathy, pointing to the crucial role of intersubjective transfer, far from a (Freudian solipsistic theory of the ego.

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

Science.gov (United States)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high

A three-dimensional breakdown model of SOI lateral power transistors with a circular layout

International Nuclear Information System (INIS)

Guo Yufeng; Wang Zhigong; Sheu Gene

2009-01-01

This paper presents an analytical three-dimensional breakdown model of SOI lateral power devices with a circular layout. The Poisson equation is solved in cylindrical coordinates to obtain the radial surface potential and electric field distributions for both fully- and partially-depleted drift regions. The breakdown voltages for N + N and P + N junctions are derived and employed to investigate the impact of cathode region curvature. A modified RESURF criterion is proposed to provide a design guideline for optimizing the breakdown voltage and doping concentration in the drift region in three dimensional space. The analytical results agree well with MEDICI simulation results and experimental data from earlier publications. (semiconductor devices)

Intrinsic Nonlinearities and Layout Impacts of 100 V Integrated Power MOSFETs in Partial SOI Process

DEFF Research Database (Denmark)

Fan, Lin; Knott, Arnold; Jørgensen, Ivan Harald Holger

Parasitic capacitances of power semiconductors are a part of the key design parameters of state-of-the-art very high frequency (VHF) power supplies. In this poster, four 100 V integrated power MOSFETs with different layout structures are designed, implemented, and analyzed in a 0.18 ȝm partial...... Silicon-on-Insulator (SOI) process with a die area 2.31 mm2.  A small-signal model of power MOSFETs is proposed to systematically analyze the nonlinear parasitic capacitances in different transistor states: off-state, sub-threshold region, and on-state in the linear region. 3D plots are used to summarize...

An analytical threshold voltage model for a short-channel dual-metal-gate (DMG) recessed-source/drain (Re-S/D) SOI MOSFET

Science.gov (United States)

Saramekala, G. K.; Santra, Abirmoya; Dubey, Sarvesh; Jit, Satyabrata; Tiwari, Pramod Kumar

2013-08-01

In this paper, an analytical short-channel threshold voltage model is presented for a dual-metal-gate (DMG) fully depleted recessed source/drain (Re-S/D) SOI MOSFET. For the first time, the advantages of recessed source/drain (Re-S/D) and of dual-metal-gate structure are incorporated simultaneously in a fully depleted SOI MOSFET. The analytical surface potential model at Si-channel/SiO2 interface and Si-channel/buried-oxide (BOX) interface have been developed by solving the 2-D Poisson’s equation in the channel region with appropriate boundary conditions assuming parabolic potential profile in the transverse direction of the channel. Thereupon, a threshold voltage model is derived from the minimum surface potential in the channel. The developed model is analyzed extensively for a variety of device parameters like the oxide and silicon channel thicknesses, thickness of source/drain extension in the BOX, control and screen gate length ratio. The validity of the present 2D analytical model is verified with ATLAS™, a 2D device simulator from SILVACO Inc.

Fabrication of SGOI material by oxidation of an epitaxial SiGe layer on an SOI wafer with H ions implantation

International Nuclear Information System (INIS)

Cheng Xinli; Chen Zhijun; Wang Yongjin; Jin Bo; Zhang Feng; Zou Shichang

2005-01-01

SGOI materials were fabricated by thermal dry oxidation of epitaxial H-ion implanted SiGe layers on SOI wafers. The hydrogen implantation was found to delay the oxidation rate of SiGe layer and to decrease the loss of Ge atoms during oxidation. Further, the H implantation did not degrade the crystallinity of SiGe layer during fabrication of the SGOI

Mechanisms of Low-Energy Operation of XCT-SOI CMOS Devices—Prospect of Sub-20-nm Regime

Directory of Open Access Journals (Sweden)

Yasuhisa Omura

2014-01-01

Full Text Available This paper describes the performance prospect of scaled cross-current tetrode (XCT CMOS devices and demonstrates the outstanding low-energy aspects of sub-30-nm-long gate XCT-SOI CMOS by analyzing device operations. The energy efficiency improvement of such scaled XCT CMOS circuits (two orders higher stems from the “source potential floating effect”, which offers the dynamic reduction of effective gate capacitance. It is expected that this feature will be very important in many medical implant applications that demand a long device lifetime without recharging the battery.

Six-beam homodyne laser Doppler vibrometry based on silicon photonics technology.

Science.gov (United States)

Li, Yanlu; Zhu, Jinghao; Duperron, Matthieu; O'Brien, Peter; Schüler, Ralf; Aasmul, Soren; de Melis, Mirko; Kersemans, Mathias; Baets, Roel

2018-02-05

This paper describes an integrated six-beam homodyne laser Doppler vibrometry (LDV) system based on a silicon-on-insulator (SOI) full platform technology, with on-chip photo-diodes and phase modulators. Electronics and optics are also implemented around the integrated photonic circuit (PIC) to enable a simultaneous six-beam measurement. Measurement of a propagating guided elastic wave in an aluminum plate (speed ≈ 909 m/s @ 61.5 kHz) is demonstrated.

Investigation of AWG demultiplexer based SOI for CWDM application

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Juhari Nurjuliana

2017-01-01

Full Text Available 9-channel Arrayed Waveguide Grating (AWG demultiplexer for conventional and tapered structure were simulated using beam propagation method (BPM with channel spacing of 20 nm. The AWG demultiplexer was design using high refractive index (n~3.47 material namely silicon-on-insulator (SOI with rib waveguide structure. The characteristics of insertion loss, adjacent crosstalk and output spectrum response at central wavelength of 1.55 μm for both designs were compared and analyzed. The conventional AWG produced a minimum insertion loss of 6.64 dB whereas the tapered AWG design reduced the insertion loss by 2.66 dB. The lowest adjacent crosstalk value of -16.96 dB was obtained in the conventional AWG design and this was much smaller compared to the tapered AWG design where the lowest crosstalk value is -17.23 dB. Hence, a tapered AWG design significantly reduces the insertion loss but has a slightly higher adjacent crosstalk compared to the conventional AWG design. On the other hand, the output spectrum responses that are obtained from both designs were close to the Coarse Wavelength Division Multiplexing (CWDM wavelength grid.

The effect of interface trapped charges in DMG-S-SOI MOSFET: a perspective study

International Nuclear Information System (INIS)

Mohapatra, S K; Pradhan, K P; Sahu, P K; Pati, G S; Kumar, M R

2014-01-01

In this paper, the existing two-dimensional (2D) threshold voltage model for a dual material gate fully depleted strained silicon on insulator (DMG-FD-S-SOI) metal-oxide-semiconductor field effect transistor (MOSFET) is modified by considering the interface trapped charge effects. The interface trapped charge is a common phenomenon, and this charge cannot be neglected in nanoscale devices. For finding out the surface potential, parabolic approximation has been utilized and the virtual cathode potential method is used to formulate the threshold voltage. The developed threshold voltage model incorporates both positive as well as negative interface charges. Finally, validity of the presented model is verified with 2D device simulator Sentaurus™. (paper)

The effect of interface trapped charges in DMG-S-SOI MOSFET: a perspective study

Science.gov (United States)

Mohapatra, S. K.; Pradhan, K. P.; Sahu, P. K.; Pati, G. S.; Kumar, M. R.

2014-12-01

In this paper, the existing two-dimensional (2D) threshold voltage model for a dual material gate fully depleted strained silicon on insulator (DMG-FD-S-SOI) metal-oxide-semiconductor field effect transistor (MOSFET) is modified by considering the interface trapped charge effects. The interface trapped charge is a common phenomenon, and this charge cannot be neglected in nanoscale devices. For finding out the surface potential, parabolic approximation has been utilized and the virtual cathode potential method is used to formulate the threshold voltage. The developed threshold voltage model incorporates both positive as well as negative interface charges. Finally, validity of the presented model is verified with 2D device simulator Sentaurus™.

Food security among individuals experiencing homelessness and mental illness in the At Home/Chez Soi Trial.

Science.gov (United States)

O'Campo, Patricia; Hwang, Stephen W; Gozdzik, Agnes; Schuler, Andrée; Kaufman-Shriqui, Vered; Poremski, Daniel; Lazgare, Luis Ivan Palma; Distasio, Jino; Belbraouet, Slimane; Addorisio, Sindi

2017-08-01

Individuals experiencing homelessness are particularly vulnerable to food insecurity. The At Home/Chez Soi study provides a unique opportunity to first examine baseline levels of food security among homeless individuals with mental illness and second to evaluate the effect of a Housing First (HF) intervention on food security in this population. At Home/Chez Soi was a 2-year randomized controlled trial comparing the effectiveness of HF compared with usual care among homeless adults with mental illness, stratified by level of need for mental health services (high or moderate). Logistic regressions tested baseline associations between food security (US Food Security Survey Module), study site, sociodemographic variables, duration of homelessness, alcohol/substance use, physical health and service utilization. Negative binomial regression determined the impact of the HF intervention on achieving levels of high or marginal food security over an 18-month follow-up period (6 to 24 months). Community settings at five Canadian sites (Moncton, Montreal, Toronto, Winnipeg and Vancouver). Homeless adults with mental illness (n 2148). Approximately 41 % of our sample reported high or marginal food security at baseline, but this figure varied with gender, age, mental health issues and substance use problems. High need participants who received HF were more likely to achieve marginal or high food security than those receiving usual care, but only at the Toronto and Moncton sites. Our large multi-site study demonstrated low levels of food security among homeless experiencing mental illness. HF showed promise for improving food security among participants with high levels of need for mental health services, with notable site differences.

Design of novel SOI 1 × 4 optical power splitter using seven horizontally slotted waveguides

Science.gov (United States)

Katz, Oded; Malka, Dror

2017-07-01

In this paper, we demonstrate a compact silicon on insulator (SOI) 1 × 4 optical power splitter using seven horizontal slotted waveguides. Aluminum nitride (AIN) surrounded by silicon (Si) was used to confine the optical field in the slot region. All of the power analysis has been done in transverse magnetic (TM) polarization mode and a compact optical power splitter as short as 14.5 μm was demonstrated. The splitter was designed by using full vectorial beam propagation method (FV-BPM) simulations. Numerical investigations show that this device can work across the whole C-band (1530-1565 nm) with excess loss better than 0.23 dB.

Blog : un journal intime comme mémoire de soi

Directory of Open Access Journals (Sweden)

Nolwenn Hénaff

2011-08-01

Full Text Available Tenir un journal est devenu, pour un individu, une manière possible de vivre, ou d’accompagner un moment de sa vie (Lejeune, 2006. Les usages sont donc multiples : construction d’une identité narrative, fixation du temps, libération du moi, introspection, outil de contrôle, de soutien, méthode d’organisation de la pensée, plaisir d’écrire. Si l’écriture papier reste la forme la plus courante du récit biographique, d’autres supports médiatiques comme la télévision ou la radio sont venus offrir de nouveaux terrains d’expérimentation de ces récits de soi. Plus récemment, l’avènement d’Internet et de ses outils simplifiés de publication ont fait émerger des formes biographiques innovantes. Pourtant, qu’il s’agisse de traverser une crise, de garder la mémoire d’une expérience forte, ou, plus ordinairement, de relater ses vacances et ses voyages, le journal se positionne avant tout, et résolument, comme un espace de liberté : on écrit quand on veut, comme on veut. Le « Souci de soi » comme dirait Foucault, l’espace dominé par les sensations, et la temporalité marquée par la notion d’instants, de moments ayant une connotation expressément personnelle sont autant d’indices révélant la pratique de l’écriture intime en ligne. Le blog apparaît à des moments de vie et accompagne souvent des tournants biographiques (ruptures, questionnement mais aussi nouveaux apprentissages, nouvelles rencontres, etc.. Nous proposons dans cet article d’analyser le blog en tant que support de mémoire personnelle et d’étudier à travers des exemples concrets les stratégies développées par les blogueurs pour se créer via ce dispositif communicationnel innovant un « espace de conserverie de soi » en ligne.Keeping a journal has become a way of live, or to moment a moment in one’s life (Lejeune, 2006. It has multiple uses: construction of a narrative identity, marking time, liberating the

Technology for the compatible integration of silicon detectors with readout electronics

International Nuclear Information System (INIS)

Zimmer, G.

1984-01-01

Compatible integration of detectors and readout electronics on the same silicon substrate is of growing interest. As the methods of microelectronics technology have already been adapted for detector fabrication, a common technology basis for detectors and readout electronics is available. CMOS technology exhibits most attractive features for the compatible realization of readout electronics when advanced LSI processing steps are combined with detector requirements. The essential requirements for compatible integration are the availability of high resistivity (100)-oriented single crystalline silicon substrate, the formation of suitably doped areas for MOS circuits and the isolation of the low voltage circuit from the detector operated at much higher supply voltage. Junction isolation as a first approach based on present production technology and dielectric isolation based on an advanced SOI-LSI technology are discussed as the most promising solutions for present and future applications, respectively. (orig.)

Single Grain TFTs for High Speed Flexible Electronics

NARCIS (Netherlands)

Baiano, A.

2009-01-01

SG-TFTs fabricated by the ?-Czochralski process have already reached a performance as high as that of SOI MOSFET devices. However, one of the most important and challenging goals is extending SG-TFT technology to reach a higher level of performance than that achieved with SOI technology. This thesis

Factors Influencing Self-Regulation in E-learning 2.0: Confirmatory Factor Model | Facteurs qui influencent la maîtrise de soi en cyberapprentissage 2.0 : modèle de facteur confirmative

Directory of Open Access Journals (Sweden)

Hong Zhao

2016-04-01

Full Text Available The importance of self-regulation in e-learning has been well noted in research. Relevant studies have shown a consistent positive correlation between learners’ self-regulation and their success rate in e-learning. Increasing attention has been paid to developing learners’ self-regulated abilities in e-learning. For students, what and how to learn are largely predetermined by the learning environment provided by their institutions. Environmental determinants play a key role in shaping self-regulation in the learning process. This paper reports a study on the influences of the e-learning 2.0 environment on self-regulation. The study identified the factors that influence self-regulation in such an environment and determine the relationships between the factors and self-regulation. A theoretical model to categorize the success factors for self-regulated learning was proposed for this kind of environment. Based on the model, a questionnaire was designed and administered to more than two hundred and fifty distance learning students in Beijing and Hong Kong. Through structural equation modeling (SEM technique, relationships between environmental factors and self-regulation were analyzed. Statistical results showed that several factors affect self-regulation in the e-learning 2.0 environment. They include system quality, information quality, service quality, and user satisfaction. L’importance de la maîtrise de soi en cyberapprentissage a été bien étudiée. Les études pertinentes ont démontré une corrélation positive uniforme entre la maîtrise de soi des apprenants et leurs taux de réussite en apprentissage en ligne. Une attention croissante a été portée au développement des aptitudes de maîtrise de soi des élèves en cyberapprentissage. Pour les élèves, quoi apprendre et comment sont des questions principalement prédéterminées par l’environnement d’apprentissage qu’offrent leurs établissements. Les d

Analysis of photonic spot profile converter and bridge structure on SOI platform for horizontal and vertical integration

Science.gov (United States)

Majumder, Saikat; Jha, Amit Kr.; Biswas, Aishik; Banerjee, Debasmita; Ganguly, Dipankar; Chakraborty, Rajib

2017-08-01

Horizontal spot size converter required for horizontal light coupling and vertical bridge structure required for vertical integration are designed on high index contrast SOI platform in order to form more compact integrated photonic circuits. Both the structures are based on the concept of multimode interference. The spot size converter can be realized by successive integration of multimode interference structures with reducing dimension on horizontal plane, whereas the optical bridge structure consists of a number of vertical multimode interference structure connected by single mode sections. The spot size converter can be modified to a spot profile converter when the final single mode waveguide is replaced by a slot waveguide. Analysis have shown that by using three multimode sections in a spot size converter, an Gaussian input having spot diameter of 2.51 μm can be converted to a spot diameter of 0.25 μm. If the output single mode section is replaced by a slot waveguide, this input profile can be converted to a flat top profile of width 50 nm. Similarly, vertical displacement of 8μm is possible by using a combination of two multimode sections and three single mode sections in the vertical bridge structure. The analyses of these two structures are carried out for both TE and TM modes at 1550 nm wavelength using the semi analytical matrix method which is simple and fast in computation time and memory. This work shows that the matrix method is equally applicable for analysis of horizontally as well as vertically integrated photonic circuit.

New insights on SOI Tunnel FETs with low-temperature process flow for CoolCube™ integration

Science.gov (United States)

Diaz Llorente, C.; Le Royer, C.; Batude, P.; Fenouillet-Beranger, C.; Martinie, S.; Lu, C.-M. V.; Allain, F.; Colinge, J.-P.; Cristoloveanu, S.; Ghibaudo, G.; Vinet, M.

2018-06-01

This paper reports the fabrication and electrical characterization of planar SOI Tunnel FETs (TFETs) made using a Low-Temperature (LT) process designed for 3D sequential integration. These proof-of-concept TFETs feature junctions obtained by Solid Phase Epitaxy Regrowth (SPER). Their electrical behavior is analyzed and compared to reference samples (regular process using High-Temperature junction formation, HT). Dual ID-VDS measurements verify that the TFET structures present Band-to-Band tunnelling (BTBT) carrier injection and not Schottky Barrier tunnelling. P-mode operating LT TFETs deliver an ON state current similar to that of the HT reference, opening the door towards optimized devices operating with very low threshold voltage VTH and low supply voltage VDD.

CMOS MEMS Fabrication Technologies and Devices

Directory of Open Access Journals (Sweden)

Hongwei Qu

2016-01-01

Full Text Available This paper reviews CMOS (complementary metal-oxide-semiconductor MEMS (micro-electro-mechanical systems fabrication technologies and enabled micro devices of various sensors and actuators. The technologies are classified based on the sequence of the fabrication of CMOS circuitry and MEMS elements, while SOI (silicon-on-insulator CMOS MEMS are introduced separately. Introduction of associated devices follows the description of the respective CMOS MEMS technologies. Due to the vast array of CMOS MEMS devices, this review focuses only on the most typical MEMS sensors and actuators including pressure sensors, inertial sensors, frequency reference devices and actuators utilizing different physics effects and the fabrication processes introduced. Moreover, the incorporation of MEMS and CMOS is limited to monolithic integration, meaning wafer-bonding-based stacking and other integration approaches, despite their advantages, are excluded from the discussion. Both competitive industrial products and state-of-the-art research results on CMOS MEMS are covered.

Magnetization of a parabolic quantum dot in the presence of Rashba and Dresselhaus spin-orbit interactions

Energy Technology Data Exchange (ETDEWEB)

Kumar, D. Sanjeev, E-mail: sanjeevchs@gmail.com; Chatterjee, Ashok [School of Physics, University of Hyderabad, Hyderabad 500046 (India); Mukhopadhyay, Soma [Department of Physics, DVR College of Engineering and Technology, Kashipur, Sangareddy Mandal, Hyderabad 502 285 (India)

2015-05-15

The magnetization of a parabolic quantum dot has been studied as a function of temperature and external magnetic field in the presence of Rashba, Dresselhaus Spin Orbit Interactions (SOI) and the electron-electron interactions. By the introduction of a simple and physically reasonable model potential, the problem has been solved exactly up to second order in both the SOI terms. Both the SOI found to be showing considerable effects on the magnetization of the quantum dot. The effect of electron-electron interaction on the magnetization also has been studied.

Magnetization of a parabolic quantum dot in the presence of Rashba and Dresselhaus spin-orbit interactions

International Nuclear Information System (INIS)

Kumar, D. Sanjeev; Chatterjee, Ashok; Mukhopadhyay, Soma

2015-01-01

The magnetization of a parabolic quantum dot has been studied as a function of temperature and external magnetic field in the presence of Rashba, Dresselhaus Spin Orbit Interactions (SOI) and the electron-electron interactions. By the introduction of a simple and physically reasonable model potential, the problem has been solved exactly up to second order in both the SOI terms. Both the SOI found to be showing considerable effects on the magnetization of the quantum dot. The effect of electron-electron interaction on the magnetization also has been studied

Modeling and analysis of surface potential of single gate fully depleted SOI MOSFET using 2D-Poisson's equation

Science.gov (United States)

Mani, Prashant; Tyagi, Chandra Shekhar; Srivastav, Nishant

2016-03-01

In this paper the analytical solution of the 2D Poisson's equation for single gate Fully Depleted SOI (FDSOI) MOSFET's is derived by using a Green's function solution technique. The surface potential is calculated and the threshold voltage of the device is minimized for the low power consumption. Due to minimization of threshold voltage the short channel effect of device is suppressed and after observation we obtain the device is kink free. The structure and characteristics of SingleGate FDSOI MOSFET were matched by using MathCAD and silvaco respectively.

Improvement of SOI microdosimeter performance using pulse shape discrimination techniques

International Nuclear Information System (INIS)

Cornelius, I.

2002-01-01

Full text: Microdosimetry is used to study the radiobiological properties of densely ionising radiations encountered in hadron therapy and space environments by measuring energy deposition in microscopic volumes. The creation of a solid state microdosimeter to replace the traditional tissue equivalent proportional counter is a topic of ongoing research. The Centre for Medical Radiation Physics has been investigating a technique using microscopic arrays of reverse biased pn junctions to measure the linear energy transfer of ions. A prototype silicon-on-insulator (SOI) microdosimeter was developed and measurements were conducted at boron neutron capture therapy, proton therapy, and fast neutron therapy facilities. Previous studies have shown the current microdosimeter possesses a poorly defined sensitive volume, a consequence of charge collection events being measured for ion strikes outside the pn junction via the diffusion of charge carriers. As a result, the amount of charge collected by the microdosimeter following an ion strike has a strong dependence on the location of the strike on the device and the angle of incidence of the ion. The aim of this work was to investigate the use of pulse shape discrimination (PSD) techniques to preclude the acquisition of events resulting from ion strikes outside the depletion region of the pn junction. Experiments were carried out using the Heavy Ion Microprobe (HIMP) at the Australian Nuclear Science and Technology Organisation, Lucas Heights, Australia. The HIMP was used to measure the charge collection time as a function of ion strike location on the microdosimeter array. As expected, the charge collection time was seen to increase monotonically as the distance of the ion strike from the junction increased. The charge collection time corresponding to ion strikes within the junction was determined. Through use of suitable electronics it was possible to gate the charge collection signal based on simultaneous measurements of

Monolithic silicon photonics in a sub-100nm SOI CMOS microprocessor foundry: progress from devices to systems

Science.gov (United States)

Popović, Miloš A.; Wade, Mark T.; Orcutt, Jason S.; Shainline, Jeffrey M.; Sun, Chen; Georgas, Michael; Moss, Benjamin; Kumar, Rajesh; Alloatti, Luca; Pavanello, Fabio; Chen, Yu-Hsin; Nammari, Kareem; Notaros, Jelena; Atabaki, Amir; Leu, Jonathan; Stojanović, Vladimir; Ram, Rajeev J.

2015-02-01

We review recent progress of an effort led by the Stojanović (UC Berkeley), Ram (MIT) and Popović (CU Boulder) research groups to enable the design of photonic devices, and complete on-chip electro-optic systems and interfaces, directly in standard microelectronics CMOS processes in a microprocessor foundry, with no in-foundry process modifications. This approach allows tight and large-scale monolithic integration of silicon photonics with state-of-the-art (sub-100nm-node) microelectronics, here a 45nm SOI CMOS process. It enables natural scale-up to manufacturing, and rapid advances in device design due to process repeatability. The initial driver application was addressing the processor-to-memory communication energy bottleneck. Device results include 5Gbps modulators based on an interleaved junction that take advantage of the high resolution of the sub-100nm CMOS process. We demonstrate operation at 5fJ/bit with 1.5dB insertion loss and 8dB extinction ratio. We also demonstrate the first infrared detectors in a zero-change CMOS process, using absorption in transistor source/drain SiGe stressors. Subsystems described include the first monolithically integrated electronic-photonic transmitter on chip (modulator+driver) with 20-70fJ/bit wall plug energy/bit (2-3.5Gbps), to our knowledge the lowest transmitter energy demonstrated to date. We also demonstrate native-process infrared receivers at 220fJ/bit (5Gbps). These are encouraging signs for the prospects of monolithic electronics-photonics integration. Beyond processor-to-memory interconnects, our approach to photonics as a "More-than- Moore" technology inside advanced CMOS promises to enable VLSI electronic-photonic chip platforms tailored to a vast array of emerging applications, from optical and acoustic sensing, high-speed signal processing, RF and optical metrology and clocks, through to analog computation and quantum technology.

A simple satellite system to locate gamma-ray bursters using scintillating fiber technology

International Nuclear Information System (INIS)

Colavita, A.; Fratnik, F.

1993-07-01

We present a study on the feasibility of using a system of small, light, long-lived and simple satellites in order to locate gamma-ray bursters. Each small satellite possesses only electronics to discriminate gamma-rays out of the large background of cosmic rays and to time the arrival of the front of a gamma-ray burst. The arrival of a γ-ray strikes a plane made out of scintillating fibers. A layered structure of thin lead foils and scintillating fibers is used to obtain a low trigger threshold of approximately 20 MeV. To locate the burster applying triangulation methods, we use the time of arrival of the front of the gamma-ray burst and the position of the satellites at that very moment. We review an elementary version of the triangulation method to study the angular error in the determination of the burster position. We show that for almost all non-pathological distances among satellites we can determine the angular location of the source to better than one arc min. This precision allows us to find the visible counterpart of the burster, if it exists. These simple satellites can be made modular in order to customize their sizes or weights in order to use spare space available during major launches. We also propose a block diagram for the satellite architecture as well as a simple and strong detector using scintillating fiber technology. (author). 13 refs, 5 figs

Development of Gravity Acceleration Measurement Using Simple Harmonic Motion Pendulum Method Based on Digital Technology and Photogate Sensor

Science.gov (United States)

Yulkifli; Afandi, Zurian; Yohandri

2018-04-01

Development of gravitation acceleration measurement using simple harmonic motion pendulum method, digital technology and photogate sensor has been done. Digital technology is more practical and optimizes the time of experimentation. The pendulum method is a method of calculating the acceleration of gravity using a solid ball that connected to a rope attached to a stative pole. The pendulum is swung at a small angle resulted a simple harmonic motion. The measurement system consists of a power supply, Photogate sensors, Arduino pro mini and seven segments. The Arduino pro mini receives digital data from the photogate sensor and processes the digital data into the timing data of the pendulum oscillation. The calculation result of the pendulum oscillation time is displayed on seven segments. Based on measured data, the accuracy and precision of the experiment system are 98.76% and 99.81%, respectively. Based on experiment data, the system can be operated in physics experiment especially in determination of the gravity acceleration.

Simple technologies for on-farm composting of cattle slurry solid fraction

International Nuclear Information System (INIS)

Brito, L.M.; Mourão, I.; Coutinho, J.; Smith, S.R.

2012-01-01

Highlights: ► Simple management techniques were examined for composting slurry solid fraction. ► Composting slurry solids was effective without bulking agents, turning or rewetting. ► Maximum rates of organic matter destruction were observed in short piles. ► Thermophilic temperatures in tall piles maximised sanitation and moisture reduction. ► The simple compost management approach maximised N retention and agronomic value. - Abstract: Composting technologies and control systems have reached an advanced stage of development, but these are too complex and expensive for most agricultural practitioners for treating livestock slurries. The development of simple, but robust and cost-effective techniques for composting animal slurries is therefore required to realise the potential benefits of waste sanitation and soil improvement associated with composted livestock manures. Cattle slurry solid fraction (SF) was collected at the rates of 4 m 3 h −1 and 1 m 3 h −1 and composted in tall (1.7 m) and short (1.2 m) static piles, to evaluate the physicochemical characteristics and nutrient dynamics of SF during composting without addition of bulking agent materials, and without turning or water addition. Highest maximum temperatures (62–64 °C) were measured in tall piles compared to short piles (52 °C). However, maximum rates of organic matter (OM) destruction were observed at mesophilic temperature ranges in short piles, compared to tall piles, whereas thermophilic temperatures in tall piles maximised sanitation and enhanced moisture reduction. Final OM losses were within the range of 520–660 g kg −1 dry solids and the net loss of OM significantly (P 4 + and increased concentrations of NO 3 - in SF composts. The results indicated that minimum intervention composting of SF in static piles over 168 days can produce agronomically effective organic soil amendments containing significant amounts of OM (772–856 g kg −1 ) and plant nutrients. The

Simple technologies and diverse food strategies of the Late Pleistocene and Early Holocene at Huaca Prieta, Coastal Peru.

Science.gov (United States)

Dillehay, Tom D; Goodbred, Steve; Pino, Mario; Vásquez Sánchez, Víctor F; Tham, Teresa Rosales; Adovasio, James; Collins, Michael B; Netherly, Patricia J; Hastorf, Christine A; Chiou, Katherine L; Piperno, Dolores; Rey, Isabel; Velchoff, Nancy

2017-05-01

Simple pebble tools, ephemeral cultural features, and the remains of maritime and terrestrial foods are present in undisturbed Late Pleistocene and Early Holocene deposits underneath a large human-made mound at Huaca Prieta and nearby sites on the Pacific coast of northern Peru. Radiocarbon ages indicate an intermittent human presence dated between ~15,000 and 8000 calendar years ago before the mound was built. The absence of fishhooks, harpoons, and bifacial stone tools suggests that technologies of gathering, trapping, clubbing, and exchange were used primarily to procure food resources along the shoreline and in estuarine wetlands and distant mountains. The stone artifacts are minimally worked unifacial stone tools characteristic of several areas of South America. Remains of avocado, bean, and possibly cultivated squash and chile pepper are also present, suggesting human transport and consumption. Our new findings emphasize an early coastal lifeway of diverse food procurement strategies that suggest detailed observation of resource availability in multiple environments and a knowledgeable economic organization, although technologies were simple and campsites were seemingly ephemeral and discontinuous. These findings raise questions about the pace of early human movement along some areas of the Pacific coast and the level of knowledge and technology required to exploit maritime and inland resources.

Design and application of 8-channel SOI-based AWG demultiplexer for CWDM-system

International Nuclear Information System (INIS)

Juhari, Nurjuliana; Menon, P. Susthitha; Ehsan, Abang Annuar; Shaari, Sahbudin

2015-01-01

Arrayed Waveguide Grating (AWG) serving as a demultiplexer (demux) has been designed on SOI platform and was utilized in a Coarse Wavelength Division Multiplexing (CWDM) system ranging from 1471 nm to 1611 nm. The investigation was carried out at device and system levels. At device level, 20 nm (∼ 2500 GHz) channel spacing was successfully simulated using beam propagation method (BPM) under TE mode polarization with a unique double S-shape pattern at arrays region. The performance of optical properties gave the low values of 0.96 dB dB for insertion loss and – 22.38 dB for optical crosstalk. AWG device was then successfully used as demultiplexer in CWDM system when 10 Gb/s data rate was applied in the system. Limitation of signal power due to attenuation and fiber dispersion detected by BER analyzer =10 −9 of the system was compared with theoretical value. Hence, the maximum distance of optical fiber can be achieved

Design and application of 8-channel SOI-based AWG demultiplexer for CWDM-system

Energy Technology Data Exchange (ETDEWEB)

Juhari, Nurjuliana; Menon, P. Susthitha; Ehsan, Abang Annuar; Shaari, Sahbudin [Institute of Microengineering and Nanoelectronics (IMEN), Universiti Kebangsaan Malaysia (UKM), 43600 UKM Bangi, Selangor (Malaysia)

2015-04-24

Arrayed Waveguide Grating (AWG) serving as a demultiplexer (demux) has been designed on SOI platform and was utilized in a Coarse Wavelength Division Multiplexing (CWDM) system ranging from 1471 nm to 1611 nm. The investigation was carried out at device and system levels. At device level, 20 nm (∼ 2500 GHz) channel spacing was successfully simulated using beam propagation method (BPM) under TE mode polarization with a unique double S-shape pattern at arrays region. The performance of optical properties gave the low values of 0.96 dB dB for insertion loss and – 22.38 dB for optical crosstalk. AWG device was then successfully used as demultiplexer in CWDM system when 10 Gb/s data rate was applied in the system. Limitation of signal power due to attenuation and fiber dispersion detected by BER analyzer =10{sup −9} of the system was compared with theoretical value. Hence, the maximum distance of optical fiber can be achieved.

Design and fabrication of two kind of SOI-based EA-type VOAs

Science.gov (United States)

Yuan, Pei; Wang, Yue; Wu, Yuanda; An, Junming; Hu, Xiongwei

2018-06-01

SOI-based variable optical attenuators based on electro-absorption mechanism are demonstrated in this paper. Two different doping structures are adopted to realize the attenuation: a structure with a single lateral p-i-n diode and a structure with several lateral p-i-n diodes connected in series. The VOAs with lateral p-i-n diodes connected in series (series VOA) can greatly improve the device attenuation efficiency compared to VOAs with a single lateral p-i-n diode structure (single VOA), which is verified by the experimental results that the attenuation efficiency of the series VOA and the single VOA is 3.76 dB/mA and 0.189 dB/mA respectively. The corresponding power consumption at 20 dB attenuation is 202 mW (series VOA) and 424 mW (single VOA) respectively. The raise time is 34.5 ns (single VOA) and 45.5 ns (series VOA), and the fall time is 37 ns (single VOA) and 48.5 ns (series VOA).

Spacer engineered Trigate SOI TFET: An investigation towards harsh temperature environment applications

Science.gov (United States)

Mallikarjunarao; Ranjan, Rajeev; Pradhan, K. P.; Artola, L.; Sahu, P. K.

2016-09-01

In this paper, a novel N-channel Tunnel Field Effect Transistor (TFET) i.e., Trigate Silicon-ON-Insulator (SOI) N-TFET with high-k spacer is proposed for better Sub-threshold swing (SS) and OFF-state current (IOFF) by keeping in mind the sensitivity towards temperature. The proposed model can achieve a Sub-threshold swing less than 35 mV/decade at various temperatures, which is desirable for designing low power CTFET for digital circuit applications. In N-TFET source doping has a significant effect on the ON-state current (ION) level; therefore more electrons will tunnel from source to channel region. High-k Spacer i.e., HfO2 is used to enhance the device performance and also it avoids overlapping of transistors in an integrated circuits (IC's). We have designed a reliable device by performing the temperature analysis on Transfer characteristics, Drain characteristics and also on various performance metrics like ON-state current (ION), OFF-state current (IOFF), ION/IOFF, Trans-conductance (gm), Trans-conductance Generation Factor (TGF), Sub-threshold Swing (SS) to observe the applications towards harsh temperature environment.

FY 1999 New Sunshine Project survey research project - Survey on the long-term energy technology strategy, etc. Fundamental survey to decide on the industrial technology strategy - Technology strategy by field (Material technology field - Nonferrous metal field); 1999 nendo choki energy gijutsu senryaku nado ni kansuru chosa hokokusho. Sangyo gijutsu senryaku sakutei kiban chosa (bun'yabetsu gijutsu senryaku (zairyo gijutsu bun'ya (hitetsu kinzoku bun'ya)))

Energy Technology Data Exchange (ETDEWEB)

NONE

2000-03-01

The survey/study were conducted to contribute to proposing technology strategies such as technical competitive force and the forecast in the material field, especially in the silicon wafer and compound semiconductor field. As to the silicon wafer technology, the following technologies were pointed out as those to be reinforced: future silicon crystals, mirror processing wafer, breakthrough technology needed for super LSI, heat-treated wafer, epitaxial wafer, SOI wafer, measuring/assessment technology, etc. In relation to the compound semiconductor technology, survey/study were made on the bulk crystal growth technology, epitaxial growth technology, crystal growth device technology, wafer processing technology, inspection/evaluation technology, device processing technology, etc. As the comprehensive strategy, the following were proposed: establishment of the place for industry/government/university cooperation, establishment of the center for evaluation of wafer materials/characteristics/process, and establishment of the compound semiconductor R and D center where men of practical business ability from industry/government/university get together and conduct the R and D of production technology and production facilities for compound semiconductor materials and devices. (NEDO)

A High-Voltage SOI CMOS Exciter Chip for a Programmable Fluidic Processor System.

Science.gov (United States)

Current, K W; Yuk, K; McConaghy, C; Gascoyne, P R C; Schwartz, J A; Vykoukal, J V; Andrews, C

2007-06-01

waveform frequency is about 200 Hz; and standard 5-V CMOS logic data communication rate is variable up to 250 kHz. This HV demonstration chip is fabricated in a 130-V 1.0-mum SOI CMOS fabrication technology, dissipates a maximum of 1.87 W, and is about 10.4 mm x 8.2 mm.

Device fabrication and transport measurements of FinFETs built with 28Si SOI wafers towards donor qubits in silicon

Energy Technology Data Exchange (ETDEWEB)

Lo, Cheuk Chi; Persaud, Arun; Dhuey, Scott; Olynick, Deirdre; Borondics, Ferenc; Martin, Michael C.; Bechtel, Hans A.; Bokor, Jeffrey; Schenkel, Thomas

2009-06-10

We report fabrication of transistors in a FinFET geometry using isotopically purified silicon-28 -on-insulator (28-SOI) substrates. Donor electron spin coherence in natural silicon is limited by spectral diffusion due to the residual 29Si nuclear spin bath, making isotopically enriched nuclear spin-free 28Si substrates a promising candidate for forming spin quantum bit devices. The FinFET architecture is fully compatible with single-ion implant detection for donor-based qubits, and the donor spin-state readout through electrical detection of spin resonance. We describe device processing steps and discuss results on electrical transport measurements at 0.3 K.

A simple electron multiplexer

International Nuclear Information System (INIS)

Dobrzynski, L; Akjouj, A; Djafari-Rouhani, B; Al-Wahsh, H; Zielinski, P

2003-01-01

We present a simple multiplexing device made of two atomic chains coupled by two other transition metal atoms. We show that this simple atomic device can transfer electrons at a given energy from one wire to the other, leaving all other electron states unaffected. Closed-form relations between the transmission coefficients and the inter-atomic distances are given to optimize the desired directional electron ejection. Such devices can be adsorbed on insulating substrates and characterized by current surface technologies. (letter to the editor)

Analysis of the rectangular resonator with butterfly MMI coupler using SOI

Science.gov (United States)

Kim, Sun-Ho; Park, Jun-Hee; Kim, Eudum; Jeon, Su-Jin; Kim, Ji-Hoon; Choi, Young-Wan

2018-02-01

We propose a rectangular resonator sensor structure with butterfly MMI coupler using SOI. It consists of the rectangular resonator, total internal reflection (TIR) mirror, and the butterfly MMI coupler. The rectangular resonator is expected to be used as bio and chemical sensors because of the advantages of using MMI coupler and the absence of bending loss unlike ring resonators. The butterfly MMI coupler can miniaturize the device compared to conventional MMI by using a linear butterfly shape instead of a square in the MMI part. The width, height, and slab height of the rib type waveguide are designed to be 1.5 μm, 1.5 μm, and 0.9 μm, respectively. This structure is designed as a single mode. When designing a TIR mirror, we considered the Goos-Hänchen shift and critical angle. We designed 3:1 MMI coupler because rectangular resonator has no bending loss. The width of MMI is designed to be 4.5 μm and we optimize the length of the butterfly MMI coupler using finite-difference time-domain (FDTD) method for higher Q-factor. It has the equal performance with conventional MMI even though the length is reduced by 1/3. As a result of the simulation, Qfactor of rectangular resonator can be obtained as 7381.

A 6 device SOI new technology for mixed analog-digital and rad-hard applications

International Nuclear Information System (INIS)

Blanc, J.P.; Bonaime, J.; Delevoye, E.; Pontcharra, J. de; Gautier, J.; Truche, R.

1993-01-01

DMILL technology is being developed for very rad-hard analog-digital applications, such as space and military circuits or as electronics for the future generation of high energy collider (LHC, CERN, Geneva). Both CMOS and junction (JFET and bipolar) transistors are needed. A new process has been integrated, based on a 1.2μm thick silicon film on insulator (SIMOX plus epitaxy), a complete dielectric isolation and low temperature process. The mean feature is that six different components are fabricated on the same wafer, taking into account the 12 volts supply voltage constraint for some analog applications. The first electrical characteristics are presented in this paper. The optimization capabilities of such a hardened CBi-CJ-CMOS technology are discussed

Sustainable development - billions of watts under the seas - Marine current turbines play simple - Technological waves

International Nuclear Information System (INIS)

Lucas, Th.

2011-01-01

The author evokes the opportunities of power generation by the development of sea current or tidal stream turbines. Some developments are already tested by Norwegian, French, Danish, British and American companies. Some specific turbines are briefly presented. In order to reduce the cost of the electricity production from sea currents, manufacturers are using simple and robust technologies, and exploit the experience gained on wind turbines. Some designs and prototypes are evoked for the production of electricity by sea waves (Pelamis and Oyster projects). Principles, strengths and production projects are briefly indicated. The challenge of maintenance in sea environment is outlined for these projects

Line-edge roughness induced single event transient variation in SOI FinFETs

International Nuclear Information System (INIS)

Wu Weikang; An Xia; Jiang Xiaobo; Chen Yehua; Liu Jingjing; Zhang Xing; Huang Ru

2015-01-01

The impact of process induced variation on the response of SOI FinFET to heavy ion irradiation is studied through 3-D TCAD simulation for the first time. When FinFET biased at OFF state configuration (V gs = 0, V ds = V dd ) is struck by a heavy ion, the drain collects ionizing charges under the electric field and a current pulse (single event transient, SET) is consequently formed. The results reveal that with the presence of line-edge roughness (LER), which is one of the major variation sources in nano-scale FinFETs, the device-to-device variation in terms of SET is observed. In this study, three types of LER are considered: type A has symmetric fin edges, type B has irrelevant fin edges and type C has parallel fin edges. The results show that type A devices have the largest SET variation while type C devices have the smallest variation. Further, the impact of the two main LER parameters, correlation length and root mean square amplitude, on SET variation is discussed as well. The results indicate that variation may be a concern in radiation effects with the down scaling of feature size. (paper)

High temperature piezoresistive {beta}-SiC-on-SOI pressure sensor for combustion engines

Energy Technology Data Exchange (ETDEWEB)

Berg, J. von; Ziermann, R.; Reichert, W.; Obermeier, E. [Tech. Univ. Berlin (Germany). Microsensor and Actuator Technol. Center; Eickhoff, M.; Kroetz, G. [Daimler Benz AG, Munich (Germany); Thoma, U.; Boltshauser, T.; Cavalloni, C. [Kistler Instrumente AG, Winterthur (Switzerland); Nendza, J.P. [TRW Deutschland GmbH, Barsinghausen (Germany)

1998-08-01

For measuring the cylinder pressure in combustion engines of automobiles a high temperature pressure sensor has been developed. The sensor is made of a membrane based piezoresistive {beta}-SiC-on-SOI (SiCOI) sensor chip and a specially designed housing. The SiCOI sensor was characterized under static pressures of up to 200 bar in the temperature range between room temperature and 300 C. The sensitivity of the sensor at room temperature is approximately 0.19 mV/bar and decreases to about 0.12 mV/bar at 300 C. For monitoring the dynamic cylinder pressure the sensor was placed into the combustion chamber of a gasoline engine. The measurements were performed at 1500 rpm under different loads, and for comparison a quartz pressure transducer from Kistler AG was used as a reference. The maximum pressure at partial load operation amounts to about 15 bar. The difference between the calibrated SiCOI sensor and the reference sensor is significantly less than 1 bar during the whole operation. (orig.) 8 refs.

Synthetic metabolic engineering-a novel, simple technology for designing a chimeric metabolic pathway

Directory of Open Access Journals (Sweden)

Ye Xiaoting

2012-09-01

Full Text Available Abstract Background The integration of biotechnology into chemical manufacturing has been recognized as a key technology to build a sustainable society. However, the practical applications of biocatalytic chemical conversions are often restricted due to their complexities involving the unpredictability of product yield and the troublesome controls in fermentation processes. One of the possible strategies to overcome these limitations is to eliminate the use of living microorganisms and to use only enzymes involved in the metabolic pathway. Use of recombinant mesophiles producing thermophilic enzymes at high temperature results in denaturation of indigenous proteins and elimination of undesired side reactions; consequently, highly selective and stable biocatalytic modules can be readily prepared. By rationally combining those modules together, artificial synthetic pathways specialized for chemical manufacturing could be designed and constructed. Results A chimeric Embden-Meyerhof (EM pathway with balanced consumption and regeneration of ATP and ADP was constructed by using nine recombinant E. coli strains overproducing either one of the seven glycolytic enzymes of Thermus thermophilus, the cofactor-independent phosphoglycerate mutase of Pyrococcus horikoshii, or the non-phosphorylating glyceraldehyde-3-phosphate dehydrogenase of Thermococcus kodakarensis. By coupling this pathway with the Thermus malate/lactate dehydrogenase, a stoichiometric amount of lactate was produced from glucose with an overall ATP turnover number of 31. Conclusions In this study, a novel and simple technology for flexible design of a bespoke metabolic pathway was developed. The concept has been testified via a non-ATP-forming chimeric EM pathway. We designated this technology as “synthetic metabolic engineering”. Our technology is, in principle, applicable to all thermophilic enzymes as long as they can be functionally expressed in the host, and thus would be

SOI Fully complementary BI-JFET-MOS technology for analog-digital applications with vertical BJT's

International Nuclear Information System (INIS)

Delevoye, E.; Blanc, J.P.; Bonaime, J.; Pontcharra, J. de; Gautier, J.; Martin, F.; Truche, R.

1993-01-01

A silicon-on-insulator, fully complementary, Bi-JFET-MOS technology has been developed for realizing multi-megarad hardened mixed analog-digital circuits. The six different active components plus resistors and capacitors have been successfully integrated in a 25-mask process using SIMOX substrate and 1 μm thick epitaxial layer. Different constraints such as device compatibility, complexity not higher than BiCMOS technology and breakdown voltages suitable for analog applications have been considered. Several process splits have been realized and all the characteristics presented here have been measured on the same split. P + gate is used for PMOS transistor to get N and PMOST symmetrical characteristics. Both NPN and PNP vertical bipolar transistors with poly-emitters show f T > 5 GHz. 2-separated gate JFET's need no additional mask. (authors). 9 figs., 1 tab

Investigation of the stability of polysilicon layers in SOI-structures under irradiation by electrons and hard magnetic field influence

Directory of Open Access Journals (Sweden)

Khoverko Yu. N.

2010-10-01

Full Text Available The properties of recrystallized polysilicon on insulator layers of p-type conductive SOI-structures with different carrier concentration irradiated with high-energy electrons flow about 1017 сm–2 in temperature range 4,2—300 К and high magnetic fields were investigated. It was found that heavily doped laser recrystallized polysilicon on insulator layers show its radiation resistance under irradiation with high-energy electrons and magnetoresistance of such material remains quite low in magnetic field about 14 T does not exceed 1—2%. Such qulity can be applied in designing of microelectronic sensors of mechanical values operable in hard conditions of exploitation.

Simple technologies for on-farm composting of cattle slurry solid fraction

Energy Technology Data Exchange (ETDEWEB)

Brito, L.M., E-mail: miguelbrito@esa.ipvc.pt [Escola Superior Agraria, Instituto Politecnico de Viana do Castelo, Refoios, 4990-706 Ponte de Lima (Portugal) and Mountain Research Centre (CIMO), IPB, Campus de St Apolonia, Apartado 1172, 5301-855 Braganca (Portugal); Mourao, I. [Escola Superior Agraria, Instituto Politecnico de Viana do Castelo, Refoios, 4990-706 Ponte de Lima (Portugal) and Mountain Research Centre (CIMO), IPB, Campus de St Apolonia, Apartado 1172, 5301-855 Braganca (Portugal); Coutinho, J., E-mail: j_coutin@utad.pt [C. Quimica, DeBA, EC Vida e Ambiente, Universidade de Tras-os-Montes e Alto Douro, ap 1013, 5001-911 Vila Real (Portugal); Smith, S.R., E-mail: s.r.smith@imperial.ac.uk [Department of Civil and Environmental Engineering, Imperial College London, South Kensington Campus, London, SW7 2AZ (United Kingdom)

2012-07-15

Highlights: Black-Right-Pointing-Pointer Simple management techniques were examined for composting slurry solid fraction. Black-Right-Pointing-Pointer Composting slurry solids was effective without bulking agents, turning or rewetting. Black-Right-Pointing-Pointer Maximum rates of organic matter destruction were observed in short piles. Black-Right-Pointing-Pointer Thermophilic temperatures in tall piles maximised sanitation and moisture reduction. Black-Right-Pointing-Pointer The simple compost management approach maximised N retention and agronomic value. - Abstract: Composting technologies and control systems have reached an advanced stage of development, but these are too complex and expensive for most agricultural practitioners for treating livestock slurries. The development of simple, but robust and cost-effective techniques for composting animal slurries is therefore required to realise the potential benefits of waste sanitation and soil improvement associated with composted livestock manures. Cattle slurry solid fraction (SF) was collected at the rates of 4 m{sup 3} h{sup -1} and 1 m{sup 3} h{sup -1} and composted in tall (1.7 m) and short (1.2 m) static piles, to evaluate the physicochemical characteristics and nutrient dynamics of SF during composting without addition of bulking agent materials, and without turning or water addition. Highest maximum temperatures (62-64 Degree-Sign C) were measured in tall piles compared to short piles (52 Degree-Sign C). However, maximum rates of organic matter (OM) destruction were observed at mesophilic temperature ranges in short piles, compared to tall piles, whereas thermophilic temperatures in tall piles maximised sanitation and enhanced moisture reduction. Final OM losses were within the range of 520-660 g kg{sup -1} dry solids and the net loss of OM significantly (P < 0.001) increased nutrient concentrations during the composting period. An advanced degree of stabilization of the SF was indicated by low final

Low power wide spectrum optical transmitter using avalanche mode LEDs in SOI CMOS technology

NARCIS (Netherlands)

Agarwal, V.; Dutta, S; Annema, AJ; Hueting, RJE; Steeneken, P.G.; Nauta, B

2017-01-01

This paper presents a low power monolithically integrated optical transmitter with avalanche mode light emitting diodes in a 140 nm silicon-on-insulator CMOS technology. Avalanche mode LEDs in silicon exhibit wide-spectrum electroluminescence (400 nm < λ < 850 nm), which has a significant

New dynamic silicon photonic components enabled by MEMS technology

Science.gov (United States)

Errando-Herranz, Carlos; Edinger, Pierre; Colangelo, Marco; Björk, Joel; Ahmed, Samy; Stemme, Göran; Niklaus, Frank; Gylfason, Kristinn B.

2018-02-01

Silicon photonics is the study and application of integrated optical systems which use silicon as an optical medium, usually by confining light in optical waveguides etched into the surface of silicon-on-insulator (SOI) wafers. The term microelectromechanical systems (MEMS) refers to the technology of mechanics on the microscale actuated by electrostatic actuators. Due to the low power requirements of electrostatic actuation, MEMS components are very power efficient, making them well suited for dense integration and mobile operation. MEMS components are conventionally also implemented in silicon, and MEMS sensors such as accelerometers, gyros, and microphones are now standard in every smartphone. By combining these two successful technologies, new active photonic components with extremely low power consumption can be made. We discuss our recent experimental work on tunable filters, tunable fiber-to-chip couplers, and dynamic waveguide dispersion tuning, enabled by the marriage of silicon MEMS and silicon photonics.

Mechanism of floating body effect mitigation via cutting off source injection in a fully-depleted silicon-on-insulator technology

International Nuclear Information System (INIS)

Huang Pengcheng; Chen Shuming; Chen Jianjun

2016-01-01

In this paper, the effect of floating body effect (FBE) on a single event transient generation mechanism in fully depleted (FD) silicon-on-insulator (SOI) technology is investigated using three-dimensional technology computer-aided design (3D-TCAD) numerical simulation. The results indicate that the main SET generation mechanism is not carrier drift/diffusion but floating body effect (FBE) whether for positive or negative channel metal oxide semiconductor (PMOS or NMOS). Two stacking layout designs mitigating FBE are investigated as well, and the results indicate that the in-line stacking (IS) layout can mitigate FBE completely and is area penalty saving compared with the conventional stacking layout. (paper)

On substrate dopant engineering for ET-SOI MOSFETs with UT-BOX

International Nuclear Information System (INIS)

Wu Hao; Xu Miao; Wan Guangxing; Zhu Huilong; Zhao Lichuan; Tong Xiaodong; Zhao Chao; Chen Dapeng; Ye Tianchun

2014-01-01

The importance of substrate doping engineering for extremely thin SOI MOSFETs with ultra-thin buried oxide (ES-UB-MOSFETs) is demonstrated by simulation. A new substrate/backgate doping engineering, lateral non-uniform dopant distributions (LNDD) is investigated in ES-UB-MOSFETs. The effects of LNDD on device performance, V t -roll-off, channel mobility and random dopant fluctuation (RDF) are studied and optimized. Fixing the long channel threshold voltage (V t ) at 0.3 V, ES-UB-MOSFETs with lateral uniform doping in the substrate and forward back bias can scale only to 35 nm, meanwhile LNDD enables ES-UB-MOSFETs to scale to a 20 nm gate length, which is 43% smaller. The LNDD degradation is 10% of the carrier mobility both for nMOS and pMOS, but it is canceled out by a good short channel effect controlled by the LNDD. Fixing V t at 0.3 V, in long channel devices, due to more channel doping concentration for the LNDD technique, the RDF in LNDD controlled ES-UB-MOSFETs is worse than in back-bias controlled ES-UB-MOSFETs, but in the short channel, the RDF for LNDD controlled ES-UB-MOSFET is better due to its self-adaption of substrate doping engineering by using a fixed thickness inner-spacer. A novel process flow to form LNDD is proposed and simulated. (semiconductor devices)

Determined Initial lead for South Of Isua (SOI) terrain suggests a single homogeneous source for it and possibly other archaean rocks

Science.gov (United States)

Tera, F.

2011-12-01

A Thorogenic-Uranogenic Lead Isotope Plane (TULIP), which entails plotting 206/208 (or its reverse) vs 207/208 (or its reverse), was applied to the Pb data on South of Isua (SOI) by Kamber et al., (1). When the data on 20 samples of these rocks and feldspars are plotted in pairs (each pair is a rock and its feldspar) on TULIP, they fall on 10 mixing lines that converge on a single spot (Fig. 1). This is the end member initial lead (EMIL). The 206/208 & 207/208 so determined are 0.3675 and 0.43525, respectively. From these values one calculates 207/206 = 1.1843 ± 0.0007, for EMIL. This pattern requires either: A) each pair has a singular kappa, K = 232Th/238U, different from others, or B) a pair's in situ decay Pb was homogenized in recent times. On 204/206 vs 207/206 diagram, the whole rocks of SOI define a 3.776 Ga isochron (2). From this and EMIL's 207/206, one obtains: 206/204 = 10.977, 207/204 = 12.974; and 208/204 = 29.756. This singularity of initial Pb contrasts with a deduced variability by the original authors (1). EMIL's radiogenic *(207/206) = 1.6220, gives a single-stage age = 5.9 Ga, indicating inapplicability of its evolution in one stage. Also, the μ calculated from 238U-206Pb for the single stage is different from that inferred from 235U-207Pb, confirming disqualification of this scenario. Reconciliation of the two decay schemes necessitates assumption of EMIL evolution in a minimum of two stages. Starting at 4.563 Ga, five scenarios were assumed: First stage ends and second starts at 4.55, 4.54, 4.53, 4.52 or 4.51 Ga. Second stages end at 3.776 Ga. The calculated μ1 for the first stage are 106, 59.5, 44.6, 36.3 and 30.9 respectively. For μ2 the change is limited, from 5.45 to 5.28. Only an average calculated K for both stages is possible. For the five outlined scenarios it ranges from 1.118 to 1.111. Earlier, Tera (3) observed that initial Pb of the oldest terrestrial reservoir requires evolution in two stages. There too μ1 >> μ2. Data on

Simple sorting algorithm test based on CUDA

OpenAIRE

Meng, Hongyu; Guo, Fangjin

2015-01-01

With the development of computing technology, CUDA has become a very important tool. In computer programming, sorting algorithm is widely used. There are many simple sorting algorithms such as enumeration sort, bubble sort and merge sort. In this paper, we test some simple sorting algorithm based on CUDA and draw some useful conclusions.

Rapid, simple and direct detection of Meloidogyne hapla from infected root galls using loop-mediated isothermal amplification combined with FTA technology.

Science.gov (United States)

Peng, Huan; Long, Haibo; Huang, Wenkun; Liu, Jing; Cui, Jiangkuan; Kong, Lingan; Hu, Xianqi; Gu, Jianfeng; Peng, Deliang

2017-04-03

The northern root-knot nematode (Meloidogyne hapla) is a damaging nematode that has caused serious economic losses worldwide. In the present study, a sensitive, simple and rapid method was developed for detection of M. hapla in infested plant roots by combining a Flinders Technology Associates (FTA) card with loop-mediated isothermal amplification (LAMP). The specific primers of LAMP were designed based on the distinction of internal transcribed spacer (ITS) sequences between M. hapla and other Meloidogyne spp. The LAMP assay can detect nematode genomic DNA at concentrations low to 1/200 000, which is 100 times more sensitive than conventional PCR. The LAMP was able to highly specifically distinguish M. hapla from other closely related nematode species. Furthermore, the advantages of the FTA-LAMP assay to detect M. hapla were demonstrated by assaying infected root galls that were artificially inoculated. In addition, M. hapla was successfully detected from six of forty-two field samples using FTA-LAMP technology. This study was the first to provide a simple diagnostic assay for M. hapla using the LAMP assay combined with FTA technology. In conclusion, the new FTA-LAMP assay has the potential for diagnosing infestation in the field and managing the pathogen M. hapla.

The role of advocacy coalitions in a project implementation process: the example of the planning phase of the At Home/Chez Soi project dealing with homelessness in Montreal.

Science.gov (United States)

Fleury, Marie-Josée; Grenier, Guy; Vallée, Catherine; Hurtubise, Roch; Lévesque, Paul-André

2014-08-01

This study analyzed the planning process (summer 2008 to fall 2009) of a Montreal project that offers housing and community follow-up to homeless people with mental disorders, with or without substance abuse disorders. With the help of the Advocacy Coalition Framework (ACF), advocacy groups that were able to navigate a complex intervention implementation process were identified. In all, 25 people involved in the Montreal At Home/Chez Soi project were surveyed through interviews (n=18) and a discussion group (n=7). Participant observations and documentation (minutes and correspondence) were also used for the analysis. The start-up phase of the At Home/Chez may be broken down into three separate periods qualified respectively as "honeymoon;" "clash of cultures;" and "acceptance & commitment". In each of the planning phases of the At Home/Chez Soi project in Montreal, at least two advocacy coalitions were in confrontation about their specific belief systems concerning solutions to address the recurring homelessness social problem, while a third, more moderate one contributed in rallying most key actors under specified secondary aspects. The study confirms the importance of policy brokers in achieving compromises acceptable to all advocacy coalitions. Copyright © 2014 Elsevier Ltd. All rights reserved.

Athermal and wavelength-trimmable photonic filters based on TiO₂-cladded amorphous-SOI.

Science.gov (United States)

Lipka, Timo; Moldenhauer, Lennart; Müller, Jörg; Trieu, Hoc Khiem

2015-07-27

Large-scale integrated silicon photonic circuits suffer from two inevitable issues that boost the overall power consumption. First, fabrication imperfections even on sub-nm scale result in spectral device non-uniformity that require fine-tuning during device operation. Second, the photonic devices need to be actively corrected to compensate thermal drifts. As a result significant amount of power is wasted if no athermal and wavelength-trimmable solutions are utilized. Consequently, in order to minimize the total power requirement of photonic circuits in a passive way, trimming methods are required to correct the device inhomogeneities from manufacturing and athermal solutions are essential to oppose temperature fluctuations of the passive/active components during run-time. We present an approach to fabricate CMOS backend-compatible and athermal passive photonic filters that can be corrected for fabrication inhomogeneities by UV-trimming based on low-loss amorphous-SOI waveguides with TiO2 cladding. The trimming of highly confined 10 μm ring resonators is proven over a free spectral range retaining athermal operation. The athermal functionality of 2nd-order 5 μm add/drop microrings is demonstrated over 40°C covering a broad wavelength interval of 60 nm.

Compact Si-based asymmetric MZI waveguide on SOI as a thermo-optical switch

Science.gov (United States)

Rizal, C. S.; Niraula, B.

2018-03-01

A compact low power consuming asymmetric MZI based optical modulator with fast response time has been proposed on SOI platform. The geometrical and performance characteristics were analyzed in depth and optimized using coupled mode analysis and FDTD simulation tools, respectively. It was tested with and without implementation of thermo-optic (TO) effect. The device showed good frequency modulating characteristics when tested without the implementation of the TO effect. The fabricated device showed quality factor, Q ≈ 10,000, and this value is comparable to the Q of the device simulated with 25% transmission loss, showing FSR of 0.195 nm, FWHM ≈ 0.16 nm, and ER of 13 dB. With TO effect, it showed temperature sensitivity of 0.01 nm/°C and FSR of 0.19 nm. With the heater length of 4.18 mm, the device required 0.26 mW per π shift power with a switching voltage of 0.309 V, response time of 10 μ, and figure-of-merit of 2.6 mW μs. All of these characteristics make this device highly attractive for use in integrated Si photonics network as optical switch and wavelength modulator.

Numerical study of self-heating effects of small-size MOSFETs fabricated on silicon-on-aluminum nitride substrate

International Nuclear Information System (INIS)

Ding Yanfang; Zhu Ziqiang; Zhu Ming; Lin Chenglu

2006-01-01

Compared with bulk-silicon technology, silicon-on-insulator (SOI) technology possesses many advantages but it is inevitable that the buried silicon dioxide layer also thermally insulates the metal-oxide-silicon field-effect transistors (MOSFETs) from the bulk due to the low thermal conductivity. One of the alternative insulator to replace the buried oxide layer is aluminum nitride (MN), which has a thermal conductivity that is about 200 times higher than that of SiO 2 (320 W·m -1 ·K -1 versus 1.4 W·m -1 ·K -l ). To investigate the self-heating effects of small-size MOSFETs fabricated on silicon-on-aluminum nitride (SOAN) substrate, a two-dimensional numerical analysis is performed by using a device simulator called MEDICI run on a Solaris workstation to simulate the electrical characteristics and temperature distribution by comparing with those of bulk and standard SOI MOSFETs. Our study suggests that AIN is a suitable alternative to silicon dioxide as a buried dielectric in SOI and expands the applications of SOI to high temperature conditions. (authors)

Characterization of dielectric materials in thin layers for the development of S.O.I. (Silicon on Insulator) substrates

International Nuclear Information System (INIS)

Gruber, Olivier

1999-01-01

This thesis deals with the characterization of oxide layer placed inside S.O.I. substrates and submitted to irradiation. This type of material is used for the development of hardened electronic components, that is to say components able to be used in a radiative environment. The irradiation induces charges (electrons or holes) in the recovered oxide. A part of these charges is trapped which leads to changes of the characteristics of the electronic components made on these substrates. The main topic of this study is the characterization of trapping properties of recovered oxides and more particularly of 'Unibond' material carried out with a new fabrication process: the 'smart-cut' process. This work is divided into three parts: - study with one carrier: this case is limited to low radiation doses where is only observed holes trapping. The evolution of the physical and chemical properties of the 'Unibond' material recovered oxide has been revealed, this evolution being due to the fabrication process. - Study with two carriers: in this case, there is trapping of holes and electrons. This type of trapping is observed in the case of strong radiation doses. A new type of electrons traps has been identified with the 'Unibond' material oxide. The transport and the trapping of holes and electrons have been studied in the case of transient phenomena created by short radiative pulses. This study has been carried out using a new measurement method. - Study with three carriers: here are added to holes and electrons the protons introduced in the recovered oxide by the annealing under hydrogen. These protons are movable when they are submitted to the effect of an electric field and they induce a memory effect according to their position in the oxide. These different works show that the 'Unibond' material is a very good solution for the future development of S.O.I. (author) [fr

SOI detector with drift field due to majority carrier flow - an alternative to biasing in depletion

Energy Technology Data Exchange (ETDEWEB)

Trimpl, M.; Deptuch, G.; Yarema, R.; /Fermilab

2010-11-01

This paper reports on a SOI detector with drift field induced by the flow of majority carriers. It is proposed as an alternative method of detector biasing compared to standard depletion. N-drift rings in n-substrate are used at the front side of the detector to provide charge collecting field in depth as well as to improve the lateral charge collection. The concept was verified on a 2.5 x 2.5 mm{sup 2} large detector array with 20 {micro}m and 40 {micro}m pixel pitch fabricated in August 2009 using the OKI semiconductor process. First results, obtained with a radioactive source to demonstrate spatial resolution and spectroscopic performance of the detector for the two different pixel sizes will be shown and compared to results obtained with a standard depletion scheme. Two different diode designs, one using a standard p-implantation and one surrounded by an additional BPW implant will be compared as well.

SOI detector with drift field due to majority carrier flow - an alternative to biasing in depletion

International Nuclear Information System (INIS)

Trimpl, M.; Deptuch, G.; Yarema, R.

2010-01-01

This paper reports on a SOI detector with drift field induced by the flow of majority carriers. It is proposed as an alternative method of detector biasing compared to standard depletion. N-drift rings in n-substrate are used at the front side of the detector to provide charge collecting field in depth as well as to improve the lateral charge collection. The concept was verified on a 2.5 x 2.5 mm 2 large detector array with 20 (micro)m and 40 (micro)m pixel pitch fabricated in August 2009 using the OKI semiconductor process. First results, obtained with a radioactive source to demonstrate spatial resolution and spectroscopic performance of the detector for the two different pixel sizes will be shown and compared to results obtained with a standard depletion scheme. Two different diode designs, one using a standard p-implantation and one surrounded by an additional BPW implant will be compared as well.

Optical interconnects based on VCSELs and low-loss silicon photonics

Science.gov (United States)

Aalto, Timo; Harjanne, Mikko; Karppinen, Mikko; Cherchi, Matteo; Sitomaniemi, Aila; Ollila, Jyrki; Malacarne, Antonio; Neumeyr, Christian

2018-02-01

Silicon photonics with micron-scale Si waveguides offers most of the benefits of submicron SOI technology while avoiding most of its limitations. In particular, thick silicon-on-insulator (SOI) waveguides offer 0.1 dB/cm propagation loss, polarization independency, broadband single-mode (SM) operation from 1.2 to >4 µm wavelength and ability to transmit high optical powers (>1 W). Here we describe the feasibility of Thick-SOI technology for advanced optical interconnects. With 12 μm SOI waveguides we demonstrate efficient coupling between standard single-mode fibers, vertical-cavity surface-emitting lasers (VCSELs) and photodetectors (PDs), as well as wavelength multiplexing in small footprint. Discrete VCSELs and PDs already support 28 Gb/s on-off keying (OOK), which shows a path towards 50-100 Gb/s bandwidth per wavelength by using more advanced modulation formats like PAM4. Directly modulated VCSELs enable very power-efficient optical interconnects for up to 40 km distance. Furthermore, with 3 μm SOI waveguides we demonstrate extremely dense and low-loss integration of numerous optical functions, such as multiplexers, filters, switches and delay lines. Also polarization independent and athermal operation is demonstrated. The latter is achieved by using short polymer waveguides to compensate for the thermo-optic effect in silicon. New concepts for isolator integration and polarization rotation are also explained.

Advanced TEM Characterization for the Development of 28-14nm nodes based on fully-depleted Silicon-on-Insulator Technology

International Nuclear Information System (INIS)

Servanton, G; Clement, L; Lepinay, K; Lorut, F; Pantel, R; Pofelski, A; Bicais, N

2013-01-01

The growing demand for wireless multimedia applications (smartphones, tablets, digital cameras) requires the development of devices combining both high speed performances and low power consumption. A recent technological breakthrough making a good compromise between these two antagonist conditions has been proposed: the 28-14nm CMOS transistor generations based on a fully-depleted Silicon-on-Insulator (FD-SOI) performed on a thin Si film of 5-6nm. In this paper, we propose to review the TEM characterization challenges that are essential for the development of extremely power-efficient System on Chip (SoC)

Si-nanowire-based multistage delayed Mach-Zehnder interferometer optical MUX/DeMUX fabricated by an ArF-immersion lithography process on a 300 mm SOI wafer.

Science.gov (United States)

Jeong, Seok-Hwan; Shimura, Daisuke; Simoyama, Takasi; Horikawa, Tsuyoshi; Tanaka, Yu; Morito, Ken

2014-07-01

We report good phase controllability and high production yield in Si-nanowire-based multistage delayed Mach-Zehnder interferometer-type optical multiplexers/demultiplexers (MUX/DeMUX) fabricated by an ArF-immersion lithography process on a 300 mm silicon-on-insulator (SOI) wafer. Three kinds of devices fabricated in this work exhibit clear 1×4 Ch wavelength filtering operations for various optical frequency spacing. These results are promising for their applications in high-density wavelength division multiplexing-based optical interconnects.

On-chip grating coupler array on the SOI platform for fan-in/fan-out of MCFs with low insertion loss and crosstalk

DEFF Research Database (Denmark)

Ding, Yunhong; Ye, Feihong; Peucheret, Christophe

2015-01-01

We report the design and fabrication of a compact multi-core fiber fan-in/fan-out using a grating coupler array on the SOI platform. The grating couplers are fully-etched, enabling the whole circuit to be fabricated in a single lithography and etching step. Thanks to the apodized design...... for the grating couplers and the introduction of an aluminum reflective mirror, a highest coupling efficiency of -3.8 dB with 3 dB coupling bandwidth of 48 nm and 1.5 dB bandwidth covering the whole C band, together with crosstalk lower than -32 dB are demonstrated. (C)2015 Optical Society of America...

Universal modeling of weak antilocalization corrections in quasi-two-dimensional electron systems using predetermined return orbitals

Science.gov (United States)

Sawada, A.; Koga, T.

2017-02-01

We have developed a method to calculate the weak localization and antilocalization corrections based on the real-space simulation, where we provide 147 885 predetermined return orbitals of quasi-two-dimensional electrons with up to 5000 scattering events that are repeatedly used. Our model subsumes that of Golub [L. E. Golub, Phys. Rev. B 71, 235310 (2005), 10.1103/PhysRevB.71.235310] when the Rashba spin-orbit interaction (SOI) is assumed. Our computation is very simple, fast, and versatile, where the numerical results, obtained all at once, cover wide ranges of the magnetic field under various one-electron interactions H' exactly. Thus, it has straightforward extensibility to incorporate interactions other than the Rashba SOI, such as the linear and cubic Dresselhaus SOIs, Zeeman effect, and even interactions relevant to the valley and pseudo spin degrees of freedom, which should provide a unique tool to study new classes of materials like emerging 2D materials. Using our computation, we also demonstrate the robustness of a persistent spin helix state against the cubic Dresselhaus SOI.

Novel detectors for silicon based microdosimetry, their concepts and applications

Science.gov (United States)

Rosenfeld, Anatoly B.

2016-02-01

This paper presents an overview of the development of semiconductor microdosimetry and the most current (state-of-the-art) Silicon on Insulator (SOI) detectors for microdosimetry based mainly on research and development carried out at the Centre for Medical Radiation Physics (CMRP) at the University of Wollongong with collaborators over the last 18 years. In this paper every generation of CMRP SOI microdosimeters, including their fabrication, design, and electrical and charge collection characterisation are presented. A study of SOI microdosimeters in various radiation fields has demonstrated that under appropriate geometrical scaling, the response of SOI detectors with the well-known geometry of microscopically sensitive volumes will record the energy deposition spectra representative of tissue cells of an equivalent shape. This development of SOI detectors for microdosimetry with increased complexity has improved the definition of microscopic sensitive volume (SV), which is modelling the deposition of ionising energy in a biological cell, that are led from planar to 3D SOI detectors with an array of segmented microscopic 3D SVs. The monolithic ΔE-E silicon telescope, which is an alternative to the SOI silicon microdosimeter, is presented, and as an example, applications of SOI detectors and ΔE-E monolithic telescope for microdosimetery in proton therapy field and equivalent neutron dose measurements out of field are also presented. An SOI microdosimeter "bridge" with 3D SVs can derive the relative biological effectiveness (RBE) in 12C ion radiation therapy that matches the tissue equivalent proportional counter (TEPC) quite well, but with outstanding spatial resolution. The use of SOI technology in experimental microdosimetry offers simplicity (no gas system or HV supply), high spatial resolution, low cost, high count rates, and the possibility of integrating the system onto a single device with other types of detectors.

Vécu des situations scolaires, estime de soi et Développement : du jugement moral a la période de la latence

Directory of Open Access Journals (Sweden)

Emile-Henri Riard

2011-06-01

Full Text Available Suivant une approche de psychologie sociale clinique, le point de vue adopté dans cet article est triple : 1- considérer les situations scolaires “ ordinaires ” comme potentiellement génératrices de difficultés; 2- s’inscrire en amont de l’adolescence afin d’améliorer la compréhension de cette dernière; 3 – considérer le vécu des élèves. La recherche menée en France (enfants de 6 à 11 ans, par questionnaire (48 situations relevant de la scolarité : classe, cour de récréation, trajet domicile/école et domicile ont été proposées ; test d’estime de soi (Coopersmith ; développement moral (Kohlberg. Variables : âge, sexe, mode d’habitat, position scolaire, classement, département. Les résultats (analyse de variance démontrent un fonctionnement “ en bloc ” du niveau de vécu de difficulté. Ressortent comme variables significatives, par ordre d’importance décroissante: le sexe (les garçons ressentent davantage les difficultés que les filles; l’âge (le niveau de difficulté vécue décroît avec l’âge mais concerne surtout la cour de récréation ; le mode d’habitat (collectif. La classe est l’espace le plus porteur de différences de vécu de difficultés indépendamment des variables. Le niveau d’autonomie et l’estime de soi sont schématiquement inversement proportionnés au niveau de difficulté vécu. La conclusion met l’accent sur l’importance des effets interactif et d’accumulation des situations.

Simple BiCMOS CCCTA design and resistorless analog function realization.

Science.gov (United States)

Tangsrirat, Worapong

2014-01-01

The simple realization of the current-controlled conveyor transconductance amplifier (CCCTA) in BiCMOS technology is introduced. The proposed BiCMOS CCCTA realization is based on the use of differential pair and basic current mirror, which results in simple structure. Its characteristics, that is, parasitic resistance (R x) and current transfer (i o/i z), are also tunable electronically by external bias currents. The realized circuit is suitable for fabrication using standard 0.35 μm BiCMOS technology. Some simple and compact resistorless applications employing the proposed CCCTA as active elements are also suggested, which show that their circuit characteristics with electronic controllability are obtained. PSPICE simulation results demonstrating the circuit behaviors and confirming the theoretical analysis are performed.

Simple BiCMOS CCCTA Design and Resistorless Analog Function Realization

Directory of Open Access Journals (Sweden)

Worapong Tangsrirat

2014-01-01

Full Text Available The simple realization of the current-controlled conveyor transconductance amplifier (CCCTA in BiCMOS technology is introduced. The proposed BiCMOS CCCTA realization is based on the use of differential pair and basic current mirror, which results in simple structure. Its characteristics, that is, parasitic resistance (Rx and current transfer (io/iz, are also tunable electronically by external bias currents. The realized circuit is suitable for fabrication using standard 0.35 μm BiCMOS technology. Some simple and compact resistorless applications employing the proposed CCCTA as active elements are also suggested, which show that their circuit characteristics with electronic controllability are obtained. PSPICE simulation results demonstrating the circuit behaviors and confirming the theoretical analysis are performed.

Influence of Bipolar Pulse Poling Technique for Piezoelectric Vibration Energy Harvesters using Pb(Zr,Ti)O3 Films on 200 mm SOI Wafers

International Nuclear Information System (INIS)

Moriwaki, N; Fujimoto, K; Suzuki, K; Kobayashi, T; Itoh, T; Maeda, R; Suzuki, Y; Makimoto, N

2013-01-01

Piezoelectric vibration energy harvester arrays using Pb(Zr,Ti)O 3 thin films on 200 mm SOI wafers were fabricated. In-plane distribution of influence of bipolar pulse poling technique on direct current (DC) power output from the harvesters was investigated. The results indicate that combination poling treatment of DC and bipolar pulse poling increases a piezoelectric property and reduces a dielectric constant. It means that this poling technique improves the figure of merit of sensors and harvesters. Maximum DC power from a harvester treated by DC poling after bipolar pulse poling is about five times larger than a one treated by DC poling only

Silicon Integrated Dual-Mode Interferometer with Differential Outputs

Directory of Open Access Journals (Sweden)

Niklas Hoppe

2017-09-01

Full Text Available The dual-mode interferometer (DMI is an attractive alternative to Mach-Zehnder interferometers for sensor purposes, achieving sensitivities to refractive index changes close to state-of-the-art. Modern designs on silicon-on-insulator (SOI platforms offer thermally stable and compact devices with insertion losses of less than 1 dB and high extinction ratios. Compact arrays of multiple DMIs in parallel are easy to fabricate due to the simple structure of the DMI. In this work, the principle of operation of an integrated DMI with differential outputs is presented which allows the unambiguous phase shift detection with a single wavelength measurement, rather than using a wavelength sweep and evaluating the optical output power spectrum. Fluctuating optical input power or varying attenuation due to different analyte concentrations can be compensated by observing the sum of the optical powers at the differential outputs. DMIs with two differential single-mode outputs are fabricated in a 250 nm SOI platform, and corresponding measurements are shown to explain the principle of operation in detail. A comparison of DMIs with the conventional Mach-Zehnder interferometer using the same technology concludes this work.

Molecular sensing using monolayer floating gate, fully depleted SOI MOSFET acting as an exponential transducer.

Science.gov (United States)

Takulapalli, Bharath R

2010-02-23

Field-effect transistor-based chemical sensors fall into two broad categories based on the principle of signal transduction-chemiresistor or Schottky-type devices and MOSFET or inversion-type devices. In this paper, we report a new inversion-type device concept-fully depleted exponentially coupled (FDEC) sensor, using molecular monolayer floating gate fully depleted silicon on insulator (SOI) MOSFET. Molecular binding at the chemical-sensitive surface lowers the threshold voltage of the device inversion channel due to a unique capacitive charge-coupling mechanism involving interface defect states, causing an exponential increase in the inversion channel current. This response of the device is in opposite direction when compared to typical MOSFET-type sensors, wherein inversion current decreases in a conventional n-channel sensor device upon addition of negative charge to the chemical-sensitive device surface. The new sensor architecture enables ultrahigh sensitivity along with extraordinary selectivity. We propose the new sensor concept with the aid of analytical equations and present results from our experiments in liquid phase and gas phase to demonstrate the new principle of signal transduction. We present data from numerical simulations to further support our theory.

Rapid, simple and direct detection of Meloidogyne hapla from infected root galls using loop-mediated isothermal amplification combined with FTA technology

OpenAIRE

Peng, Huan; Long, Haibo; Huang, Wenkun; Liu, Jing; Cui, Jiangkuan; Kong, Lingan; Hu, Xianqi; Gu, Jianfeng; Peng, Deliang

2017-01-01

The northern root-knot nematode (Meloidogyne hapla) is a damaging nematode that has caused serious economic losses worldwide. In the present study, a sensitive, simple and rapid method was developed for detection of M. hapla in infested plant roots by combining a Flinders Technology Associates (FTA) card with loop-mediated isothermal amplification (LAMP). The specific primers of LAMP were designed based on the distinction of internal transcribed spacer (ITS) sequences between M. hapla and oth...

Fabrication of double-dot single-electron transistor in silicon nanowire

International Nuclear Information System (INIS)

Jo, Mingyu; Kaizawa, Takuya; Arita, Masashi; Fujiwara, Akira; Ono, Yukinori; Inokawa, Hiroshi; Choi, Jung-Bum; Takahashi, Yasuo

2010-01-01

We propose a simple method for fabricating Si single-electron transistors (SET) with coupled dots by means of a pattern-dependent-oxidation (PADOX) method. The PADOX method is known to convert a small one-dimensional Si wire formed on a silicon-on-insulator (SOI) substrate into a SET automatically. We fabricated a double-dot Si SET when we oxidized specially designed Si nanowires formed on SOI substrates. We analyzed the measured electrical characteristics by fitting the measurement and simulation results and confirmed the double-dot formation and the position of the two dots in the Si wire.

Compliments, motivation et estime de soi : l'effet paradoxal de féliciter les capacités des enfants

DEFF Research Database (Denmark)

Hansen, Mikkel

2014-01-01

motivation may suffer when given feedback that evaluates their person. We discuss links between different types of feedback and children’s motivational frameworks, including their self-esteem. // RÉSUMÉ L’objectif de compliments tels que « T’es très fort, très intelligent » est d’encourager les enfants, mais...... des recherches récentes montrent que de telles propositions en feedback peuvent dissuader les enfants de s’engager dans des tâches difficiles, réduisant ainsi leurs apprentissages. Nous exposerons les travaux de Dweck (e.g., 2000) qui démontrent comment les compliments centrés sur l’évaluation de la...... personne influent négativement sur la motivation intrinsèque du sujet. Nous discuterons des liens existant entre différents types de feedback et les cadres motivationnels où évoluent les enfants, ainsi que de leur estime de soi....

Photographie et représentation de soi dans W ou le Souvenir d’enfance de Georges Perec

Directory of Open Access Journals (Sweden)

Siriki Ouattara

2014-04-01

Full Text Available W ou le souvenir d’enfance convoque ouvertement en son sein des éléments paralittéraires comme la photographie qui le déconstruit. Le désir de Georges Perec de reconstituer ou de reconstruire son histoire est si ardent qu’il lui a consacré ce roman particulier. Dans cette œuvre autobiographique atypique, l’auteur fait appel à diverses techniques de représentation de soi, la photographie. Cette dernière est un élément nouveau en littérature (même s´elle y est prise en compte depuis le dix-neuvième siècle qui redéfinit nombre d´habitudes littéraires. Ainsi, elle occasionne un renouvellement de l´écriture à travers l´institution de nouveaux rapports qui, tout en changeant les vieux rôles narratifs, invitent à dire autrement, voire à raconter différemment. La photographie offre alors l´occasion d´expérimenter une nouvelle discursivité de la représentation.

On the convex hull of the simple integer recourse objective function

NARCIS (Netherlands)

Klein Haneveld, Willem K.; Stougie, L.; van der Vlerk, Maarten H.

1995-01-01

We consider the objective function of a simple integer recourse problem with fixed technology matrix. Using properties of the expected value function, we prove a relation between the convex hull of this function and the expected value function of a continuous simple recourse program. We present an

A simple and efficient electrochemical reductive method for ...

Indian Academy of Sciences (India)

Administrator

This approach opens up a new, practical and green reducing method to prepare large- scale graphene. ... has the following significant advantages: (1) It is simple to operate. .... The authors thank the National High Technology Research.

Experimental verification of temperature coefficients of resistance for uniformly doped P-type resistors in SOI

Science.gov (United States)

Olszacki, M.; Maj, C.; Bahri, M. Al; Marrot, J.-C.; Boukabache, A.; Pons, P.; Napieralski, A.

2010-06-01

Many today's microsystems like strain-gauge-based piezoresistive pressure sensors contain doped resistors. If one wants to predict correctly the temperature impact on the performance of such devices, the accurate data about the temperature coefficients of resistance (TCR) are essential. Although such data may be calculated using one of the existing mobility models, our experiments showed that we can observe the huge mismatch between the calculated and measured values. Thus, in order to investigate the TCR values, a set of the test structures that contained doped P-type resistors was fabricated. As the TCR value also depends on the doping profile shape, we decided to use the very thin, 340 nm thick SOI wafers in order to fabricate the quasi-uniformly doped silicon layers ranging from 2 × 1017 at cm-3 to 1.6 × 1019 at cm-3. The results showed that the experimental data for the first-order TCR are quite far from the calculated ones especially over the doping range of 1018-1019 at cm-3 and quite close to the experimental ones obtained by Bullis about 50 years ago for bulk silicon. Moreover, for the first time, second-order coefficients that were not very consistent with the calculations were obtained.

Experimental verification of temperature coefficients of resistance for uniformly doped P-type resistors in SOI

International Nuclear Information System (INIS)

Olszacki, M; Maj, C; Al Bahri, M; Marrot, J-C; Boukabache, A; Pons, P; Napieralski, A

2010-01-01

Many today's microsystems like strain-gauge-based piezoresistive pressure sensors contain doped resistors. If one wants to predict correctly the temperature impact on the performance of such devices, the accurate data about the temperature coefficients of resistance (TCR) are essential. Although such data may be calculated using one of the existing mobility models, our experiments showed that we can observe the huge mismatch between the calculated and measured values. Thus, in order to investigate the TCR values, a set of the test structures that contained doped P-type resistors was fabricated. As the TCR value also depends on the doping profile shape, we decided to use the very thin, 340 nm thick SOI wafers in order to fabricate the quasi-uniformly doped silicon layers ranging from 2 × 10 17 at cm −3 to 1.6 × 10 19 at cm −3 . The results showed that the experimental data for the first-order TCR are quite far from the calculated ones especially over the doping range of 10 18 –10 19 at cm −3 and quite close to the experimental ones obtained by Bullis about 50 years ago for bulk silicon. Moreover, for the first time, second-order coefficients that were not very consistent with the calculations were obtained.

A Mixed Analog-Digital Radiation Hard Technology for High Energy Physics Electronics: DMILL~(Durci~Mixte~sur~Isolant~Logico-Lineaire)

CERN Multimedia

Lugiez, F; Leray, J; Rouger, M; Fourches, N T; Musseau, O; Potheau, R

2002-01-01

%RD29 %title\\\\ \\\\Physics experiments under preparation with the future LHC require a fast, low noise, very rad-hard (>10 Mrad and >10$^{14}$ neutron/cm$^{2}$), mixed analog-digital microelectronics VLSI technology.\\\\ \\\\The DMILL microelectronics technology (RD29) was developed between 1990 and 1995 by a Consortium gathering the CEA and the firm Thomson-TCS, with the collaboration of IN2P3. The goal of the DMILL program, which is now completed, was to provide the High Energy Physics community, space industry, nuclear industry, and other applications, with an industrial very rad-hard mixed analog-digital microelectronics technology.\\\\ \\\\DMILL integrates mixed analog-digital very rad-hard (>10 Mrad and >10$^{14}$ neutron/cm$^{2}$) vertical bipolar, 0.8 $\\mu$m CMOS and 1.2 $\\mu$m PJFET transistors. Its SOI substrate and its dielectric trenches strongly reduce SEU sensitivity and completely eliminate any possibility of latch-up. Its four transistors are optimized to obtain low-noise features. DMILL also integrates...

Investigation of the Low-Temperature Behavior of FD-SOI MOSFETs in the Saturation Regime Using Y and Z Functions

Directory of Open Access Journals (Sweden)

A. Karsenty

2014-01-01

Full Text Available The saturation regime of two types of fully depleted (FD SOI MOSFET devices was studied. Ultrathin body (UTB and gate recessed channel (GRC devices were fabricated simultaneously on the same silicon wafer through a selective “gate recessed” process. They share the same W/L ratio but have a channel film thickness of 46 nm and 2.2 nm, respectively. Their standard characteristics (IDS-VDS and IDS-VGS of the devices were measured at room temperature before cooling down to 77 K. Surprisingly, their respective temperature dependence is found to be opposite. In this paper, we focus our comparative analysis on the devices' conduction using a Y-function applied to the saturation domain. The influence of the temperature in this domain is presented for the first time. We point out the limits of the Y-function analysis and show that a new function called Z can be used to extract the series resistance in the saturation regime.

Engineered SOI slot waveguide ring resonator V-shape resonance combs for refraction index sensing up to 1300nm/RIU (Conference Presentation)

Science.gov (United States)

Zhang, Weiwei; Serna, Samuel; Le Roux, Xavier; Vivien, Laurent; Cassan, Eric

2016-05-01

Bio-detection based on CMOS technology boosts the miniaturization of detection systems and the success on highly efficient, robust, accurate, and low coast Lab-on-Chip detection schemes. Such on chip detection technologies have covered healthy related harmful gases, bio-chemical analytes, genetic micro RNA, etc. Their monitoring accuracy is mainly qualified in terms of sensitivity and limit of the detection (LOD) of the detection system. In this context, recently developed silicon on insulator (SOI) optical devices have displayed highly performant detection abilities that LOD could go beyond 10-8RIU and sensitivity could exceeds 103nm/RIU. The SOI integrated optical sensing devices include strip/slotted waveguide consisting in structures like Mach-Zehnder interferometers (MZI), ring resonators (RR), nano cavities, etc. Typically, hollow core RR and nano-cavities could exhibit higher sensitivity due to their optical mode confinement properties with a partial localization of the electric field in low index sensing regions than devices based on evanescent field tails outside of the optical cores. Furthermore, they also provide larger sensing areas for surface functionalization to reach higher sensitivities and lower LODs. The state of art of hollow core devices, either based on Bragg gratings formed from a slot waveguide cavity or photonic crystal slot cavities, show sensitivities (S) up to 400nm/RIU and Figure of Merit (FOM) around 3,000 in water environment, FOM being defined as the inverse of LOD and precisely as FOM=SQ/λ, with λ the resonance wavelength and Q the quality factor of the considered resonator. Such high achieved FOMs in nano cavities are mainly due to their large Q factors around 15,000. While for mostly used RR, which do not require particular design strategies, relatively low Q factors around 1800 in water are met and moderate sensitivities about 300nm/RIU are found. In this work, we present here a novel slot ring resonator design to make

Modeling of the Channel Thickness Influence on Electrical Characteristics and Series Resistance in Gate-Recessed Nanoscale SOI MOSFETs

Directory of Open Access Journals (Sweden)

A. Karsenty

2013-01-01

Full Text Available Ultrathin body (UTB and nanoscale body (NSB SOI-MOSFET devices, sharing a similar W/L but with a channel thickness of 46 nm and lower than 5 nm, respectively, were fabricated using a selective “gate-recessed” process on the same silicon wafer. Their current-voltage characteristics measured at room temperature were found to be surprisingly different by several orders of magnitude. We analyzed this result by considering the severe mobility degradation and the influence of a huge series resistance and found that the last one seems more coherent. Then the electrical characteristics of the NSB can be analytically derived by integrating a gate voltage-dependent drain source series resistance. In this paper, the influence of the channel thickness on the series resistance is reported for the first time. This influence is integrated to the analytical model in order to describe the trends of the saturation current with the channel thickness. This modeling approach may be useful to interpret anomalous electrical behavior of other nanodevices in which series resistance and/or mobility degradation is of a great concern.

A Simple Guide to Enhancing Learning through Web 2.0 Technologies

Science.gov (United States)

Nichol, David; Hunter, Julie; Yaseen, Jonathan; Prescott-Clements, Linda

2012-01-01

This article describes the potential of new and emerging learning technologies to promote excellence in learning and teaching and further seeks to respond positively to the key trends in learning technologies for the higher education community. Through this article, we hope to positively enrich the student experience with technology-enhanced…

Simple technologies for on-farm composting of cattle slurry solid fraction.

Science.gov (United States)

Brito, L M; Mourão, I; Coutinho, J; Smith, S R

2012-07-01

Composting technologies and control systems have reached an advanced stage of development, but these are too complex and expensive for most agricultural practitioners for treating livestock slurries. The development of simple, but robust and cost-effective techniques for composting animal slurries is therefore required to realise the potential benefits of waste sanitation and soil improvement associated with composted livestock manures. Cattle slurry solid fraction (SF) was collected at the rates of 4m(3)h(-1) and 1m(3)h(-1) and composted in tall (1.7 m) and short (1.2m) static piles, to evaluate the physicochemical characteristics and nutrient dynamics of SF during composting without addition of bulking agent materials, and without turning or water addition. Highest maximum temperatures (62-64 °C) were measured in tall piles compared to short piles (52 °C). However, maximum rates of organic matter (OM) destruction were observed at mesophilic temperature ranges in short piles, compared to tall piles, whereas thermophilic temperatures in tall piles maximised sanitation and enhanced moisture reduction. Final OM losses were within the range of 520-660 g kg(-1) dry solids and the net loss of OM significantly (Pcomposting period. An advanced degree of stabilization of the SF was indicated by low final pile temperatures and C/N ratio, low concentrations of NH(4)(+) and increased concentrations of NO(3)(-) in SF composts. The results indicated that minimum intervention composting of SF in static piles over 168 days can produce agronomically effective organic soil amendments containing significant amounts of OM (772-856 g kg(-1)) and plant nutrients. The implications of a minimal intervention management approach to composting SF on compost pathogen reduction are discussed and possible measures to improve sanitation are suggested. Copyright © 2012 Elsevier Ltd. All rights reserved.

Preface to the special issue of Solid State Electronics EUROSOI/ULIS 2017

Science.gov (United States)

Nassiopoulou, Androula G.

2018-05-01

This special issue is devoted to selected papers presented at the EuroSOI-ULIS2017 international conference, held in Athens on 3-5 April 2017. EuroSOI-ULIS2017 Conference was mainly devoted to Si devices, which constitute the basic building blocks of any microelectronic circuit. It included papers on advanced Si technologies, novel nanoscale devices, advanced electronic materials and device architectures, mechanisms involved, test structures, substrate materials and technologies, modeling/simulation and characterization. Both CMOS and beyond CMOS devices were presented, covering the More Moore domain, as well as new functionalities in silicon-compatible nanostructures and innovative devices, representing the More than Moore domain (on-chip sensors, biosensors, energy harvesting devices, RF passives, etc.).

The importance of using simple and indigenous technologies for the exploitation of water resources in rural areas of developing countries

Science.gov (United States)

Faillace, C.

Taking care of thousands of village water supply systems requires a large organization and large financial inputs which most developing countries cannot afford. The author, after having briefly outlined the main points to be considered for the implementation of successful rural water programs, stresses the need to introduce simple, low-cost technologies for supplying safe water to small rural villages. The risk of failure is greatly reduced if there is an active participation of villagers in the various phases of the project. Health education village sanitation and training in the use and repair of equipment are essential for the long life of the water systems.

Aluminium alloyed iron-silicide/silicon solar cells: A simple approach for low cost environmental-friendly photovoltaic technology.

Science.gov (United States)

Kumar Dalapati, Goutam; Masudy-Panah, Saeid; Kumar, Avishek; Cheh Tan, Cheng; Ru Tan, Hui; Chi, Dongzhi

2015-12-03

This work demonstrates the fabrication of silicide/silicon based solar cell towards the development of low cost and environmental friendly photovoltaic technology. A heterostructure solar cells using metallic alpha phase (α-phase) aluminum alloyed iron silicide (FeSi(Al)) on n-type silicon is fabricated with an efficiency of 0.8%. The fabricated device has an open circuit voltage and fill-factor of 240 mV and 60%, respectively. Performance of the device was improved by about 7 fold to 5.1% through the interface engineering. The α-phase FeSi(Al)/silicon solar cell devices have promising photovoltaic characteristic with an open circuit voltage, short-circuit current and a fill factor (FF) of 425 mV, 18.5 mA/cm(2), and 64%, respectively. The significant improvement of α-phase FeSi(Al)/n-Si solar cells is due to the formation p(+-)n homojunction through the formation of re-grown crystalline silicon layer (~5-10 nm) at the silicide/silicon interface. Thickness of the regrown silicon layer is crucial for the silicide/silicon based photovoltaic devices. Performance of the α-FeSi(Al)/n-Si solar cells significantly depends on the thickness of α-FeSi(Al) layer and process temperature during the device fabrication. This study will open up new opportunities for the Si based photovoltaic technology using a simple, sustainable, and los cost method.

InP on SOI devices for optical communication and optical network on chip

Science.gov (United States)

Fedeli, J.-M.; Ben Bakir, B.; Olivier, N.; Grosse, Ph.; Grenouillet, L.; Augendre, E.; Phillippe, P.; Gilbert, K.; Bordel, D.; Harduin, J.

2011-01-01

For about ten years, we have been developing InP on Si devices under different projects focusing first on μlasers then on semicompact lasers. For aiming the integration on a CMOS circuit and for thermal issue, we relied on SiO2 direct bonding of InP unpatterned materials. After the chemical removal of the InP substrate, the heterostructures lie on top of silicon waveguides of an SOI wafer with a separation of about 100nm. Different lasers or photodetectors have been achieved for off-chip optical communication and for intra-chip optical communication within an optical network. For high performance computing with high speed communication between cores, we developed InP microdisk lasers that are coupled to silicon waveguide and produced 100μW of optical power and that can be directly modulated up to 5G at different wavelengths. The optical network is based on wavelength selective circuits with ring resonators. InGaAs photodetectors are evanescently coupled to the silicon waveguide with an efficiency of 0.8A/W. The fabrication has been demonstrated at 200mm wafer scale in a microelectronics clean room for CMOS compatibility. For off-chip communication, silicon on InP evanescent laser have been realized with an innovative design where the cavity is defined in silicon and the gain localized in the QW of bonded InP hererostructure. The investigated devices operate at continuous wave regime with room temperature threshold current below 100 mA, the side mode suppression ratio is as high as 20dB, and the fibercoupled output power is {7mW. Direct modulation can be achieved with already 6G operation.

Humanizing Chemistry Education: From Simple Contextualization to Multifaceted Problematization

Science.gov (United States)

Sjöström, Jesper; Talanquer, Vicente

2014-01-01

Chemistry teaching has traditionally been weakly connected to everyday life, technology, society, and history and philosophy of science. This article highlights knowledge areas and perspectives needed by the humanistic (and critical-reflexive) chemistry teacher. Different humanistic approaches in chemistry teaching, from simple contextualization…

Crosstalk analysis of silicon-on-insulator nanowire-arrayed waveguide grating

International Nuclear Information System (INIS)

Li Kai-Li; An Jun-Ming; Zhang Jia-Shun; Wang Yue; Wang Liang-Liang; Li Jian-Guang; Wu Yuan-Da; Yin Xiao-Jie; Hu Xiong-Wei

2016-01-01

The factors influencing the crosstalk of silicon-on-insulator (SOI) nanowire arrayed waveguide grating (AWG) are analyzed using the transfer function method. The analysis shows that wider and thicker arrayed waveguides, outsider fracture of arrayed waveguide, and larger channel space, could mitigate the deterioration of crosstalk. The SOI nanowire AWGs with different arrayed waveguide widths are fabricated by using deep ultraviolet lithography (DUV) and inductively coupled plasma etching (ICP) technology. The measurement results show that the crosstalk performance is improved by about 7 dB through adopting 800 nm arrayed waveguide width. (paper)

3D circuit integration for Vertex and other detectors

Energy Technology Data Exchange (ETDEWEB)

Yarema, Ray; /Fermilab

2007-09-01

High Energy Physics continues to push the technical boundaries for electronics. There is no area where this is truer than for vertex detectors. Lower mass and power along with higher resolution and radiation tolerance are driving forces. New technologies such as SOI CMOS detectors and three dimensional (3D) integrated circuits offer new opportunities to meet these challenges. The fundamentals for SOI CMOS detectors and 3D integrated circuits are discussed. Examples of each approach for physics applications are presented. Cost issues and ways to reduce development costs are discussed.

Electrical Control of Structural and Physical Properties via Strong Spin-Orbit Interactions in Sr2IrO4

Science.gov (United States)

Cao, G.; Terzic, J.; Zhao, H. D.; Zheng, H.; De Long, L. E.; Riseborough, Peter S.

2018-01-01

Electrical control of structural and physical properties is a long-sought, but elusive goal of contemporary science and technology. We demonstrate that a combination of strong spin-orbit interactions (SOI) and a canted antiferromagnetic Mott state is sufficient to attain that goal. The antiferromagnetic insulator Sr2IrO4 provides a model system in which strong SOI lock canted Ir magnetic moments to IrO6 octahedra, causing them to rigidly rotate together. A novel coupling between an applied electrical current and the canting angle reduces the Néel temperature and drives a large, nonlinear lattice expansion that closely tracks the magnetization, increases the electron mobility, and precipitates a unique resistive switching effect. Our observations open new avenues for understanding fundamental physics driven by strong SOI in condensed matter, and provide a new paradigm for functional materials and devices.

Une genese du «parler de soi » du deja-la a l’evocation de l’absent dans l’activite dialogique du tout jeune enfant

Directory of Open Access Journals (Sweden)

Amina Bensalah

2010-12-01

Full Text Available

L’analyse porte sur des productions langagières verbales et non-verbales les plus ordinaires entre des adultes et de très jeunes enfants âgés de moins de deux ans. En articulant les notions de l’évocation de l’absent et du déjà-là, notions qui mettent en avant le processus d’une «temporalité-spatialisée», je problématise la genèse d’un soi comme objet qui se donne à voir dans et par l’activité discursive. Mon hypothèse est que, s’agissant du tout jeune enfant qui ne peut donc s’auto-thématiser ni référer à lui-même de façon explicite, c’est bien dans l’évocation d’autrui et d’autres objets du monde qu’indirectement, il nous «parle» de lui. Trois éléments viennent étayer ma réfl exion pour répondre à la problématique posée : les notions de temporalité, de spatialité et d’affect. Elles sont clairement présentes dans les initiatives de demande, dans les mouvements des échanges et dans les séquences «pré-narratives» produites par l’enfant. Au vu des corpus, ces trois notions m’ont paru inséparables du lieu même où elles font ancrage, à savoir : l’interaction et le dialogue avec l’autre. L’approche adoptée dans l’analyse pour argumenter l’idée de l’expression d’un «parler de soi» chez le tout jeune enfant n’est pas tant, au sens strict, de type linguistique que de type pragmatique. Aussi, j’analyse les effets réciproques entre l’interaction et les échanges qui la modèlent.

Operational characterization of CSFH MEMS technology based hinges

Science.gov (United States)

Crescenzi, Rocco; Balucani, Marco; Belfiore, Nicola Pio

2018-05-01

Progress in MEMS technology continuously stimulates new developments in the mechanical structure of micro systems, such as, for example, the concept of so-called CSFH (conjugate surfaces flexural hinge), which makes it possible, simultaneously, to minimize the internal stresses and to increase motion range and robustness. Such a hinge may be actuated by means of a rotary comb-drive, provided that a proper set of simulations and tests are capable to assess its feasibility. In this paper, a CSFH has been analyzed with both theoretical and finite element (FEM) methods, in order to obtain the relation between voltage and generated torque. The FEM model considers also the fringe effect on the comb drive finger. Electromechanical couple-field analysis is performed by means of both direct and load transfer methods. Experimental tests have been also performed on a CSFH embedded in a MEMS prototype, which has been fabricated starting from a SOI wafer and using D-RIE (deep reactive ion etching). Results showed that CSFH performs better than linear flexure hinges in terms of larger rotations and less stress for given applied voltage.

The impact of silicon nano-wire technology on the design of single-work-function CMOS transistors and circuits

International Nuclear Information System (INIS)

Bindal, Ahmet; Hamedi-Hagh, Sotoudeh

2006-01-01

This three-dimensional exploratory study on vertical silicon wire MOS transistors with metal gates and undoped bodies demonstrates that these transistors dissipate less power and occupy less layout area while producing comparable transient response with respect to the state-of-the-art bulk and SOI technologies. The study selects a single metal gate work function for both NMOS and PMOS transistors to alleviate fabrication difficulties and then determines a common device geometry to produce an OFF current smaller than 1 pA for each transistor. Once an optimum wire radius and effective channel length is determined, DC characteristics including threshold voltage roll-off, drain-induced barrier lowering and sub-threshold slope of each transistor are measured. Simple CMOS gates such as an inverter, two- and three-input NAND, NOR and XOR gates and a full adder, composed of the optimum NMOS and PMOS transistors, are built to measure transient performance, power dissipation and layout area. Simulation results indicate that worst-case transient time and worst-case delay are 1.63 and 1.46 ps, respectively, for a two-input NAND gate and 7.51 and 7.43 ps, respectively, for a full adder for a fan-out of six transistor gates (24 aF). Worst-case power dissipation is 62.1 nW for a two-input NAND gate and 118.1 nW for a full adder at 1 GHz for the same output capacitance. The layout areas are 0.0066 μm 2 for the two-input NAND gate and 0.049 μm 2 for the full adder circuits

Ballistic spin interferometer based on the Rashba and Dresselhaus spin-orbit interactions

International Nuclear Information System (INIS)

Ni Jiating; Chen Bin; Koga, T.

2008-01-01

By using the Al'tshuler-Aronov-Spivak (AAS) model, we give the amplitude changing with Rashba spin-orbit interaction (SOI) and Dresselhaus SOI strength. In the first idea 1D square loop (SL), Rashba SOI acts on two sides while Dresselhaus SOI acts on the other two sides. In the second SL, we consume Rashba SOI and Dresselhaus SOI act on four sides simultaneously. This model can be replaced by another one that Rashba SOI and Dresselhaus SOI act on every side independently, and each side is twice long. We theoretically illustrate the influence of the Dresselhaus SOI on node position and number. To explain the 'half oscillation' phenomenon found in experiment, we apply Dresselhaus SOI to the ideal 1D SL. The conclusion is that the Dresselhaus SOI has a strong effect on the emergence of 'half oscillation'

Simple machines

CERN Document Server

Graybill, George

2007-01-01

Just how simple are simple machines? With our ready-to-use resource, they are simple to teach and easy to learn! Chocked full of information and activities, we begin with a look at force, motion and work, and examples of simple machines in daily life are given. With this background, we move on to different kinds of simple machines including: Levers, Inclined Planes, Wedges, Screws, Pulleys, and Wheels and Axles. An exploration of some compound machines follows, such as the can opener. Our resource is a real time-saver as all the reading passages, student activities are provided. Presented in s

Écritures de soi en souffrance: une lecture des régimes structurant l’imaginaire du texte social vivant

Directory of Open Access Journals (Sweden)

Orazio Maria Valastro

2010-02-01

Full Text Available Les études ici réunies vont nous permettre d’examiner différentes genres d’écritures et typologies d’écrivains (poétique et épistolaire, roman autobiographique et autofiction, narratif et témoignage, explorant un corpus considérable (œuvres littéraires et littératures personnelles et des pratiques significatives (activités narratives et autobiographiques. Le thème proposé, les écritures de soi en souffrance, se dénoue sollicitant une réflexion sur les rapports entre les œuvres et les différents contextes sociaux et historiques. Nous pouvons envisager et saisir l’ensemble du corpus et des pratiques considérées en tant que texte social vivant, inscrivant l’expérience de l’existence et du monde dans la pratique de l’écriture. (... Nous allons solliciter et proposer une lecture sociologique et anthropologique de l’ensemble des études proposés au sein du numéro monographique, privilégiant une analyse de la matrice du discours social structurant la conscience individuelle et collective.

Invention de soi et compétences à l’ère des réseaux sociaux

Directory of Open Access Journals (Sweden)

Daniel Apollon

2011-06-01

Full Text Available Les réseaux sociaux en ligne encouragent de nouvelles approches de la compétence centrées sur la construction biographique de l’individu et l’invention de soi. Ce nouvel art de faire des « produsagers », répond au besoin d’inventer une réponse individuelle et collective au sentiment aliénant de vacuité des sociétés post-industrielles et post-traditionnelles. Combinant opposition et soumission aux éléments structurants et aliénants de cette modernité tardive, ces produsagers réactualisent diverses ruses, tactiques et schèmes immémoriaux déjà explorés par divers auteurs avant Internet. Sur cette toile de fond, l’auteur propose une réinterprétation plus large de la notion de compétence.Social media practices encourage new approaches and visions of competence focusing on the construction of individual biography and the "invention of oneself". The new "artful skills" of "produsers" address the need to invent individual and collective responses to the sense of alienating emptiness pervading postindustrial and posttraditional societies. Combining and submission and opposition to both structuring and alienating aspects of late modernity, these produsagers actualize various tricks, tactics and immemorial schemes already mapped by various authors before the Internet. On this backdrop the author proposes a broader reinterpretation of the concept of competence.

Analytical Subthreshold Current and Subthreshold Swing Models for a Fully Depleted (FD) Recessed-Source/Drain (Re-S/D) SOI MOSFET with Back-Gate Control

Science.gov (United States)

Saramekala, Gopi Krishna; Tiwari, Pramod Kumar

2017-08-01

Two-dimensional (2D) analytical models for the subthreshold current and subthreshold swing of the back-gated fully depleted recessed-source/drain (Re-S/D) silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) are presented. The surface potential is determined by solving the 2D Poisson equation in both channel and buried-oxide (BOX) regions, considering suitable boundary conditions. To derive closed-form expressions for the subthreshold characteristics, the virtual cathode potential expression has been derived in terms of the minimum of the front and back surface potentials. The effect of various device parameters such as gate oxide and Si film thicknesses, thickness of source/drain penetration into BOX, applied back-gate bias voltage, etc. on the subthreshold current and subthreshold swing has been analyzed. The validity of the proposed models is established using the Silvaco ATLAS™ 2D device simulator.

What's special about human technology?

OpenAIRE

Robert Aunger

2010-01-01

Human technology is difficult to understand because it is so complex. However, human technology evolved from the simpler technologies of other species. Comparison with these other technologies should illuminate why human technology is distinct. Some birds and primates make tools, or simple technological objects whose function is closely related to their form. Humans, on the other hand, make machines--relatively complex objects whose functionality derives from the interaction of parts with res...

Material synthesis for silicon integrated-circuit applications using ion implantation

Science.gov (United States)

Lu, Xiang

As devices scale down into deep sub-microns, the investment cost and complexity to develop more sophisticated device technologies have increased substantially. There are some alternative potential technologies, such as silicon-on-insulator (SOI) and SiGe alloys, that can help sustain this staggering IC technology growth at a lower cost. Surface SiGe and SiGeC alloys with germanium peak composition up to 16 atomic percent are formed using high-dose ion implantation and subsequent solid phase epitaxial growth. RBS channeling spectra and cross-sectional TEM studies show that high quality SiGe and SiGeC crystals with 8 atomic percent germanium concentration are formed at the silicon surface. Extended defects are formed in SiGe and SiGeC with 16 atomic percent germanium concentration. X-ray diffraction experiments confirm that carbon reduces the lattice strain in SiGe alloys but without significant crystal quality improvement as detected by RBS channeling spectra and XTEM observations. Separation by plasma implantation of oxygen (SPIMOX) is an economical method for SOI wafer fabrication. This process employs plasma immersion ion implantation (PIII) for the implantation of oxygen ions. The implantation rate for Pm is considerably higher than that of conventional implantation. The feasibility of SPIMOX has been demonstrated with successful fabrication of SOI structures implementing this process. Secondary ion mass spectrometry (SIMS) analysis and cross-sectional transmission electron microscopy (XTEM) micrographs of the SPIMOX sample show continuous buried oxide under single crystal overlayer with sharp silicon/oxide interfaces. The operational phase space of implantation condition, oxygen dose and annealing requirement has been identified. Physical mechanisms of hydrogen induced silicon surface layer cleavage have been investigated using a combination of microscopy and hydrogen profiling techniques. The evolution of the silicon cleavage phenomenon is recorded by a series

A simple algorithm for measuring particle size distributions on an uneven background from TEM images

DEFF Research Database (Denmark)

Gontard, Lionel Cervera; Ozkaya, Dogan; Dunin-Borkowski, Rafal E.

2011-01-01

Nanoparticles have a wide range of applications in science and technology. Their sizes are often measured using transmission electron microscopy (TEM) or X-ray diffraction. Here, we describe a simple computer algorithm for measuring particle size distributions from TEM images in the presence of a...... application to images of heterogeneous catalysts is presented.......Nanoparticles have a wide range of applications in science and technology. Their sizes are often measured using transmission electron microscopy (TEM) or X-ray diffraction. Here, we describe a simple computer algorithm for measuring particle size distributions from TEM images in the presence...

Technological Implications for Assessment Ecosystems: Opportunities for Digital Technology to Advance Assessment

Science.gov (United States)

Behrens, John T.; DiCerbo, Kristen E.

2014-01-01

Background: It would be easy to think the technological shifts in the digital revolution are simple incremental progressions in societal advancement. However, the nature of digital technology is resulting in qualitative differences in nearly all parts of daily life. Purpose: This paper investigates how the new possibilities for understanding,…

A Novel Fully Depleted Air AlN Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor

International Nuclear Information System (INIS)

Yuan, Yang; Yong, Gao; Peng-Liang, Gong

2008-01-01

A novel fully depleted air AlN silicon-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOS-FET) is presented, which can eliminate the self-heating effect and solve the problem that the off-state current of SOI MOSFETs increases and the threshold voltage characteristics become worse when employing a high thermal conductivity material as a buried layer. The simulation results reveal that the lattice temperature in normal SOI devices is 75 K higher than the atmosphere temperature, while the lattice temperature is just 4K higher than the atmosphere temperature resulting in less severe self-heating effect in air AlN SOI MOSFETs and AlN SOI MOSFETs. The on-state current of air AlN SOI MOSFETs is similar to the AlN SOI structure, and improves 12.3% more than that of normal SOI MOSFETs. The off-state current of AlN SOI is 6.7 times of normal SOI MOSFETs, while the counterpart of air AlN SOI MOSFETs is lower than that of SOI MOSFETs by two orders of magnitude. The threshold voltage change of air AlN SOI MOSFETs with different drain voltage is much less than that of AlN SOI devices, when the drain voltage is biased at 0.8 V, this difference is 28mV, so the threshold voltage change induced by employing high thermal conductivity material is cured. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Leaky Integrate and Fire Neuron by Charge-Discharge Dynamics in Floating-Body MOSFET.

Science.gov (United States)

Dutta, Sangya; Kumar, Vinay; Shukla, Aditya; Mohapatra, Nihar R; Ganguly, Udayan

2017-08-15

Neuro-biology inspired Spiking Neural Network (SNN) enables efficient learning and recognition tasks. To achieve a large scale network akin to biology, a power and area efficient electronic neuron is essential. Earlier, we had demonstrated an LIF neuron by a novel 4-terminal impact ionization based n+/p/n+ with an extended gate (gated-INPN) device by physics simulation. Excellent improvement in area and power compared to conventional analog circuit implementations was observed. In this paper, we propose and experimentally demonstrate a compact conventional 3-terminal partially depleted (PD) SOI- MOSFET (100 nm gate length) to replace the 4-terminal gated-INPN device. Impact ionization (II) induced floating body effect in SOI-MOSFET is used to capture LIF neuron behavior to demonstrate spiking frequency dependence on input. MHz operation enables attractive hardware acceleration compared to biology. Overall, conventional PD-SOI-CMOS technology enables very-large-scale-integration (VLSI) which is essential for biology scale (~10 11 neuron based) large neural networks.

Broadband non-polarizing beam splitter based on guided mode resonance effect

Science.gov (United States)

Ma, Jian-Yong; Xu, Cheng; Qiang, Ying-Huai; Zhu, Ya-Bo

2011-10-01

A broadband non-polarizing beam splitter (NPBS) operating in the telecommunication C+L band is designed by using the guided mode resonance effect of periodic silicon-on-insulator (SOI) elements. It is shown that this double layer SOI structure can provide ~50/50 beam ratio with the maximum divergences between reflection and transmission being less than 8% over the spectrum of 1.4 μm~1.7 μm and 1% in the telecommunication band for both TE and TM polarizations. The physical basis of this broadband non-polarizing property is on the simultaneous excitation of the TE and TM strong modulation waveguide modes near the designed spectrum band. Meanwhile, the electric field distributions for both TE and TM polarizations verify the resonant origin of spectrum in the periodic SOI structure. Furthermore, it is demonstrated with our calculations that the beam splitter proposed here is tolerant to the deviations of incident angle and structure parameters, which make it very easy to be fabricated with current IC technology.

Massive Growth Of Banking Technology with the Aid of 5G Technologies

OpenAIRE

Sreeramana Aithal; K. Krishna Prasad

2015-01-01

The advancement in information technology has resulted in explosive growth in banking technology like ATMs, internet banking, and mobile banking. Banks which emphasize more on existing customer satisfaction and in attracting new customer have implemented online banking and mobile technology to make banking more convenient, attractive and simple. Computerization, wireless network, ATMS, internet banking and mobile banking can connect any customer of any bank in any branch with a...

110 GHz hybrid mode-locked fiber laser with enhanced extinction ratio based on nonlinear silicon-on-insulator micro-ring-resonator (SOI MRR)

International Nuclear Information System (INIS)

Liu, Yang; Hsu, Yung; Chow, Chi-Wai; Yang, Ling-Gang; Lai, Yin-Chieh; Yeh, Chien-Hung; Tsang, Hon-Ki

2016-01-01

We propose and experimentally demonstrate a new 110 GHz high-repetition-rate hybrid mode-locked fiber laser using a silicon-on-insulator microring-resonator (SOI MRR) acting as the optical nonlinear element and optical comb filter simultaneously. By incorporating a phase modulator (PM) that is electrically driven at a fraction of the harmonic frequency, an enhanced extinction ratio (ER) of the optical pulses can be produced. The ER of the optical pulse train increases from 3 dB to 10 dB. As the PM is only electrically driven by the signal at a fraction of the harmonic frequency, in this case 22 GHz (110 GHz/5 GHz), a low bandwidth PM and driving circuit can be used. The mode-locked pulse width and the 3 dB spectral bandwidth of the proposed mode-locked fiber laser are measured, showing that the optical pulses are nearly transform limited. Moreover, stability evaluation for an hour is performed, showing that the proposed laser can achieve stable mode-locking without the need for optical feedback or any other stabilization mechanism. (letter)

Communications technology handbook

CERN Document Server

Lewis, Geoff

2013-01-01

This is the first point of reference for the communications industries. It offers an introduction to a wide range of topics and concepts encountered in the field of communications technology. Whether you are looking for a simple explanation, or need to go into a subject in more depth, the Communications Technology Handbook provides all the information you need in one single volume.This second edition has been updated to include the latest technology including: Video on DemandWire-less Distribution systemsHigh spee

A discerning approach to simple aesthetic orthodontics.

Science.gov (United States)

Noar, J H; Sharma, S; Roberts-Harry, D; Qureshi, T

2015-02-16

There is currently considerable interest from general dental practitioners (GDPs) in the use of simple orthodontics to treat adult malocclusions. There is controversy in this, particularly in relation to 'quick fixes', simple orthodontics and 'straight teeth in six months' as opposed to more conventional treatment where the whole malocclusion is treated. This article will present a case for the use of simple aesthetic adult orthodontics in a measured and planned way. It will discuss the processes, planning and the importance of consent. It will also highlight how digital technology is used to preview, consent and execute an aesthetic result. Many of the recent systems emerging, have been as a result of the demand and supply of cosmetic dentistry. This, to a degree, has not helped since the implication of a 'quick-fix' is associated with this field. There has also been discussion on what the limits of GDP orthodontics should be. There is variability in how GDPs approach orthodontics, their experience, skill and ability to treat to an acceptable standard. Short courses may be one way of delivering orthodontic training but some of these courses are not regulated and the amount of internal mentoring is variable. This article highlights some of the systems in use, and potential upsides and downsides of this approach.

Multiplexing of adjacent vortex modes with the forked grating coupler

Science.gov (United States)

Nadovich, Christopher T.; Kosciolek, Derek J.; Crouse, David T.; Jemison, William D.

2017-08-01

For vortex fiber multiplexing to reach practical commercial viability, simple silicon photonic interfaces with vortex fiber will be required. These interfaces must support multiplexing. Toward this goal, an efficient singlefed multimode Forked Grating Coupler (FGC) for coupling two different optical vortex OAM charges to or from the TE0 and TE1 rectangular waveguide modes has been developed. A simple, apodized device implemented with e-beam lithography and a conventional dual-etch processing on SOI wafer exhibits low crosstalk and reasonable mode match. Advanced designs using this concept are expected to further improve performance.

Disruptive Technology Enhanced Learning: The Use and Misuse of Digital Technologies in Higher Education

Science.gov (United States)

Flavin, Michael

2017-01-01

This book is about how technologies are used in practice to support learning and teaching in higher education. Despite digitization and e-learning becoming ever-increasingly popular in university teaching settings, this book convincingly argues instead in favour of simple and convenient technologies, thus disrupting traditional patterns of…

I-PFO: the new technology for simple and flexible implementation of high productive on-the-fly remote processes

Science.gov (United States)

Müllegger, Andreas; Ryba, Tracey

2017-02-01

Standardized production systems which can be implemented, programmed, maintained and sourced in a simple and efficient way are key for a successful global production of automobiles or related parts at component suppliers. This is also valid for systems, which are built by laser based processes. One of the key applications is remote laser welding (RLW) of "Body in White" (BIW) parts (such as hang-on parts, B-Pillars, side frames, etc.), but also builtin components (such as car seats, batteries, etc.). The majority of RLW applications are based on the implementation of a 3-D scanner optic (e.g. the PFO 3D from TRUMPF) which positions the laser beam on the various component surfaces to be welded. Over the past 10 years it has been proven that the most efficient way to build up the RLW process is to have a system where an industrial robot and a scanner optic are combined in one production cell. They usually cooperate within an "On-The-Fly" (OTF) process as this ensures minimum cycle times. Until now there are several technologies on the market which can coordinate both the robot and scanner in the OTF mode. But none of them meet all requirements of global standardized production solutions. With the introduction of the I-PFO (Intelligent Programmable Focusing Optics) technology the situation has changed. It is now possible to program or adopt complex remote processes in a fast and easy way by the "Teach-in" function via the robot teach pendant. Additionally a 3D offline designer software is an option for this system. It automatically creates the ideal remote process based on the part, fixture, production cell and required process parameters. The I-PFO technology doesn't need additional hardware due to the fact that it runs on the controller within the PFO 3D. Furthermore it works together with different types of industrial robots (e.g. ABB, Fanuc and KUKA) which allow highest flexibility for the production planning phase. Finally a single TRUMPF laser source can supply

Simple Kidney Cysts

Science.gov (United States)

... Solitary Kidney Your Kidneys & How They Work Simple Kidney Cysts What are simple kidney cysts? Simple kidney cysts are abnormal, fluid-filled ... that form in the kidneys. What are the kidneys and what do they do? The kidneys are ...

The Simple Analytics of the Environmental Kuznets Curve

OpenAIRE

James Andreoni; Arik Levinson

1998-01-01

Evidence suggests that some pollutants follow an inverse-U-shaped pattern relative to countries' incomes. This relationship has been called the out a simple and straight-forward static model of the microfoundations of the pollution-income relationship. We show that the environmental Kuznets curve can be derived directly from the technological link between consumption of a desired good and abatement of its undesirable byproduct. The inverse-U shape does not depend on the dynamics of growth, po...

Single Versus Multiple Solid Organ Injuries Following Blunt Abdominal Trauma.

Science.gov (United States)

El-Menyar, Ayman; Abdelrahman, Husham; Al-Hassani, Ammar; Peralta, Ruben; AbdelAziz, Hiba; Latifi, Rifat; Al-Thani, Hassan

2017-11-01

We aimed to describe the pattern of solid organ injuries (SOIs) and analyze the characteristics, management and outcomes based on the multiplicity of SOIs. A retrospective study in a Level 1 trauma center was conducted and included patients admitted with blunt abdominal trauma between 2011 and 2014. Data were analyzed and compared for patients with single versus multiple SOIs. A total of 504 patients with SOIs were identified with a mean age of 28 ± 13 years. The most frequently injured organ was liver (45%) followed by spleen (30%) and kidney (18%). One-fifth of patients had multiple SOIs, of that 87% had two injured organs. Patients with multiple SOIs had higher frequency of head injury and injury severity scores (p hepatic injuries (13%) than the other SOIs. SOIs represent one-tenth of trauma admissions in Qatar. Although liver was the most frequently injured organ, the rate of mortality was higher in pancreatic injury. Patients with multiple SOIs had higher morbidity which required frequent operative management. Further prospective studies are needed to develop management algorithm based on the multiplicity of SOIs.

Modal analysis and modeling of a frictionless electrostatic rotary stepper micromotor

NARCIS (Netherlands)

Stranczl, M.; Sarajlic, Edin; Krijnen, Gijsbertus J.M.; Fujita, H.; Gijs, M.A.M.; Yamahata, C.

2011-01-01

We present the design, modeling and characterization of a 3-phase electrostatic rotary stepper micromotor. The proposed motor is a monolithic device fabricated using silicon-on-insulator (SOI) technology. The rotor is suspended with a frictionless flexural pivot bearing and reaches an unprecedented

Exploring the value of mixed methods within the At Home/Chez Soi housing first project: a strategy to evaluate the implementation of a complex population health intervention for people with mental illness who have been homeless.

Science.gov (United States)

Macnaughton, Eric L; Goering, Paula N; Nelson, Geoffrey B

2012-05-02

This paper is a methodological case study that describes the At Home/Chez Soi (Housing First) Initiative's mixed-methods strategy for implementation evaluation and discusses the value of these methods in evaluating the implementation of such complex population health interventions. The Housing First (HF) model is being implemented in five cities: Vancouver, Winnipeg, Toronto, Montréal and Moncton. At Home/Chez Soi is an intervention trial that aims to address the issue of homelessness in people with mental health issues. The HF model emphasizes choices, hopefulness and connecting people with resources that make a difference to their quality of life. A component of HF is supported housing, which provides a rent subsidy and rapid access to housing of choice in private apartments; a second component is support. Quantitative and qualitative methods were used to evaluate HF implementation. The findings of this case study illustrate how the critical ingredients of complex interventions, such as HF, can be adapted to different contexts while implementation fidelity is maintained at a theoretical level. The findings also illustrate how the project's mixed methods approach helped to facilitate the adaptation process. Another value of this approach is that it identifies systemic and organizational factors (e.g., housing supply, discrimination, housing procurement strategy) that affect implementation of key elements of HF. In general, the approach provides information about both whether and how key aspects of the intervention are implemented effectively across different settings. It thus provides implementation data that are rigorous, contextually relevant and practical.

Modern devices the simple physics of sophisticated technology

CERN Document Server

Joseph, Charles L

2016-01-01

This book discusses the principles of physics through applications of state-of-the-art technologies and advanced instruments. The authors use diagrams, sketches, and graphs coupled with equations and mathematical analysis to enhance the reader's understanding of modern devices. Readers will learn to identify common underlying physical principles that govern several types of devices, while gaining an understanding of the performance trade-off imposed by the physical limitations of various processing methods. The topics discussed in the book assume readers have taken an introductory physics course, college algebra, and have a basic understanding of calculus. * Describes the basic physics behind a large number of devices encountered in everyday life, from the air conditioner to Blu-ray discs * Covers state-of-the-art devices such as spectrographs, photoelectric image sensors, spacecraft systems, astronomical and planetary observatories, biomedical imaging instruments, particle accelerators, and jet engines * Inc...

Is simple nephrectomy truly simple? Comparison with the radical alternative.

Science.gov (United States)

Connolly, S S; O'Brien, M Frank; Kunni, I M; Phelan, E; Conroy, R; Thornhill, J A; Grainger, R

2011-03-01

The Oxford English dictionary defines the term "simple" as "easily done" and "uncomplicated". We tested the validity of this terminology in relation to open nephrectomy surgery. Retrospective review of 215 patients undergoing open, simple (n = 89) or radical (n = 126) nephrectomy in a single university-affiliated institution between 1998 and 2002. Operative time (OT), estimated blood loss (EBL), operative complications (OC) and length of stay in hospital (LOS) were analysed. Statistical analysis employed Fisher's exact test and Stata Release 8.2. Simple nephrectomy was associated with shorter OT (mean 126 vs. 144 min; p = 0.002), reduced EBL (mean 729 vs. 859 cc; p = 0.472), lower OC (9 vs. 17%; 0.087), and more brief LOS (mean 6 vs. 8 days; p < 0.001). All parameters suggest favourable outcome for the simple nephrectomy group, supporting the use of this terminology. This implies "simple" nephrectomies are truly easier to perform with less complication than their radical counterpart.

Broadband non-polarizing beam splitter based on guided mode resonance effect

International Nuclear Information System (INIS)

Ma Jian-Yong; Xu Cheng; Qiang Ying-Huai; Zhu Ya-Bo

2011-01-01

A broadband non-polarizing beam splitter (NPBS) operating in the telecommunication C+L band is designed by using the guided mode resonance effect of periodic silicon-on-insulator (SOI) elements. It is shown that this double layer SOI structure can provide ∼50/50 beam ratio with the maximum divergences between reflection and transmission being less than 8% over the spectrum of 1.4 μm∼1.7 μm and 1% in the telecommunication band for both TE and TM polarizations. The physical basis of this broadband non-polarizing property is on the simultaneous excitation of the TE and TM strong modulation waveguide modes near the designed spectrum band. Meanwhile, the electric field distributions for both TE and TM polarizations verify the resonant origin of spectrum in the periodic SOI structure. Furthermore, it is demonstrated with our calculations that the beam splitter proposed here is tolerant to the deviations of incident angle and structure parameters, which make it very easy to be fabricated with current IC technology. (electromagnetism, optics, acoustics, heat transfer, classical mechanics, and fluid dynamics)

A Numerical Study on Phonon Spectral Contributions to Thermal Conduction in Silicon-on-Insulator Transistor Using Electron-Phonon Interaction Model

Energy Technology Data Exchange (ETDEWEB)

Kang, Hyung-sun; Koh, Young Ha; Jin, Jae Sik [Chosun College of Science and Technology, Gwangju (Korea, Republic of)

2017-06-15

The aim of this study is to understand the phonon transfer characteristics of a silicon thin film transistor. For this purpose, the Joule heating mechanism was considered through the electron-phonon interaction model whose validation has been done. The phonon transport characteristics were investigated in terms of phonon mean free path for the variations in the device power and silicon layer thickness from 41 nm to 177 nm. The results may be used for developing the thermal design strategy for achieving reliability and efficiency of the silicon-on-insulator (SOI) transistor, further, they will increase the understanding of heat conduction in SOI systems, which are very important in the semiconductor industry and the nano-fabrication technology.

a simple a simple excitation control excitation control excitation

African Journals Online (AJOL)

eobe

field voltages determined follow a simple quadratic relationship that offer a very simple control scheme, dependent on only the stator current. Keywords: saturated reactances, no-load field voltage, excitation control, synchronous generators. 1. Introduction. Introduction. Introduction. The commonest generator in use today is ...

Development of a Cognitive Robotic System for Simple Surgical Tasks

Directory of Open Access Journals (Sweden)

Riccardo Muradore

2015-04-01

Full Text Available The introduction of robotic surgery within the operating rooms has significantly improved the quality of many surgical procedures. Recently, the research on medical robotic systems focused on increasing the level of autonomy in order to give them the possibility to carry out simple surgical actions autonomously. This paper reports on the development of technologies for introducing automation within the surgical workflow. The results have been obtained during the ongoing FP7 European funded project Intelligent Surgical Robotics (I-SUR. The main goal of the project is to demonstrate that autonomous robotic surgical systems can carry out simple surgical tasks effectively and without major intervention by surgeons. To fulfil this goal, we have developed innovative solutions (both in terms of technologies and algorithms for the following aspects: fabrication of soft organ models starting from CT images, surgical planning and execution of movement of robot arms in contact with a deformable environment, designing a surgical interface minimizing the cognitive load of the surgeon supervising the actions, intra-operative sensing and reasoning to detect normal transitions and unexpected events. All these technologies have been integrated using a component-based software architecture to control a novel robot designed to perform the surgical actions under study. In this work we provide an overview of our system and report on preliminary results of the automatic execution of needle insertion for the cryoablation of kidney tumours.

A simple and proven technology for reclaiming acidic mine waters

International Nuclear Information System (INIS)

Bourke, Chris; Mack, Bernie

2011-01-01

The cost of water treatment is now more than ever a major consideration for maintaining an environmentally and economically sustainable mining operation. As an industry, we often have to consider water sources that are highly impure and difficult to treat. We are also discovering the value of our waste waters in this regard and using new and improved methods and technology to reclaim and reuse water. In many instances, the water or waste water to be treated is highly acidic and saturated in sparingly soluble salts. Conventional systems used to liberate this type of water typically involve high doses of lime with large volumes of waste sludge produced, and are comparatively complex to operate, to pretreat the water in order to reduce scaling tendency on the reverse osmosis stage. However, if the water is considered valuable for reuse, then why not avoid difficult and cumbersome pretreatment processes and treat the water at low pH to keep the sparingly soluble salts, metals and other dissolved species in solution. This paper describes a patented technology that uses and successfully proves this concept as a cost effective option for certain situations. Results from a treatability study on an Australian groundwater are discussed, along with an economic comparison to a conventional method and discussion on full-scale potential.

A Simple Model of Offshore Outsourcing, Technology Upgrading and Welfare

OpenAIRE

Jung , Jaewon; Mercenier , Jean

2009-01-01

We adapt Yeaple's (2005) heterogeneous agents framework to model firms in the North as making explicit offshore outsourcing decisions to cheap-labor economies. Globalization results from a lowering of the set-up costs incurred when engaging in offshore activities. We highlight how firms'technology transformations due to global- ization will induce skill upgrading in the North, increase aggregate productivity, av- erage wages and therefore total welfare at the cost of increased wage inequaliti...

Simple model systems: a challenge for Alzheimer's disease

Directory of Open Access Journals (Sweden)

Di Carlo Marta

2012-04-01

Full Text Available Abstract The success of biomedical researches has led to improvement in human health and increased life expectancy. An unexpected consequence has been an increase of age-related diseases and, in particular, neurodegenerative diseases. These disorders are generally late onset and exhibit complex pathologies including memory loss, cognitive defects, movement disorders and death. Here, it is described as the use of simple animal models such as worms, fishes, flies, Ascidians and sea urchins, have facilitated the understanding of several biochemical mechanisms underlying Alzheimer's disease (AD, one of the most diffuse neurodegenerative pathologies. The discovery of specific genes and proteins associated with AD, and the development of new technologies for the production of transgenic animals, has helped researchers to overcome the lack of natural models. Moreover, simple model systems of AD have been utilized to obtain key information for evaluating potential therapeutic interventions and for testing efficacy of putative neuroprotective compounds.

Field effect of screened charges: electrical detection of peptides and proteins by a thin-film resistor.

Science.gov (United States)

Lud, Simon Q; Nikolaides, Michael G; Haase, Ilka; Fischer, Markus; Bausch, Andreas R

2006-02-13

For many biotechnological applications the label-free detection of biomolecular interactions is becoming of outstanding importance. In this Article we report the direct electrical detection of small peptides and proteins by their intrinsic charges using a biofunctionalized thin-film resistor. The label-free selective and quantitative detection of small peptides and proteins is achieved using hydrophobized silicon-on-insulator (SOI) substrates functionalized with lipid membranes that incorporate metal-chelating lipids. The response of the nanometer-thin conducting silicon film to electrolyte screening effects is taken into account to determine quantitatively the charges of peptides. It is even possible to detect peptides with a single charge and to distinguish single charge variations of the analytes even in physiological electrolyte solutions. As the device is based on standard semiconductor technologies, parallelization and miniaturization of the SOI-based biosensor is achievable by standard CMOS technologies and thus a promising basis for high-throughput screening or biotechnological applications.

An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

Science.gov (United States)

Teo, Adrian J. T.; Li, Holden; Tan, Say Hwa; Yoon, Yong-Jin

2017-06-01

Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G-1, and a highest recorded sensitivity of 44.1 mV G-1. A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices.

An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

International Nuclear Information System (INIS)

Teo, Adrian J T; Li, Holden; Yoon, Yong-Jin; Tan, Say Hwa

2017-01-01

Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G −1 , and a highest recorded sensitivity of 44.1 mV G −1 . A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices. (technical note)

Supercritical Fluid (SCF) Technologies: Assessment of Applicability to Installation Restoration Processes

Science.gov (United States)

1994-03-10

for the 3 regeneration of activated carbon which had been used for adsorption of pesticides or other I MKO~RT:22SOI.O4~acbva3 -300314𔄃 U * Table 3-3...Dichloroethane Propanol Ethylbenzene Propionic acid I Furfural Trichloroethane Gasoline Trichloroethylene Heptane Toluene Ketones Vinyl acetate Methyl acetate...during extraction from contaminated soil. The polar modifier addition had the further benefit of displacing PAIl molecules at polar adsorption sites on

Why to use mobile technology?

OpenAIRE

Bolat, Elvira

2014-01-01

No holistic portrayal exists to map and discuss values deriving from mobile technology use. This empirical paper addresses this gap. To address research purpose adapted grounded theory approach is applied to collect and analyse in-depth interviews with twenty-eight SME managers. This study concludes that mobile technology represents novel and unique category of technology. Whether MT is a simple mean to advanced communication with no physical boundaries of time and location or a business tool...

Enhancing Learning Objectives by Use of Simple Virtual Microscopic Slides in Cellular Physiology and Histology: Impact and Attitudes

Science.gov (United States)

Anyanwu, Godson Emeka; Agu, Augustine Uchechukwu; Anyaehie, Ugochukwu Bond

2012-01-01

The impact and perception of students on the use of a simple, low technology-driven version of a virtual microscope in teaching and assessments in cellular physiology and histology were studied. Its impact on the time and resources of the faculty were also assessed. Simple virtual slides and conventional microscopes were used to conduct the same…

Crossing simple resonances

International Nuclear Information System (INIS)

Collins, T.

1985-08-01

A simple criterion governs the beam distortion and/or loss of protons on a fast resonance crossing. Results from numerical integrations are illustrated for simple sextupole, octupole, and 10-pole resonances

Crossing simple resonances

Energy Technology Data Exchange (ETDEWEB)

Collins, T.

1985-08-01

A simple criterion governs the beam distortion and/or loss of protons on a fast resonance crossing. Results from numerical integrations are illustrated for simple sextupole, octupole, and 10-pole resonances.

Radiation Effects in Advanced Multiple Gate and Silicon-on-Insulator Transistors

Science.gov (United States)

Simoen, Eddy; Gaillardin, Marc; Paillet, Philippe; Reed, Robert A.; Schrimpf, Ron D.; Alles, Michael L.; El-Mamouni, Farah; Fleetwood, Daniel M.; Griffoni, Alessio; Claeys, Cor

2013-06-01

The aim of this review paper is to describe in a comprehensive manner the current understanding of the radiation response of state-of-the-art Silicon-on-Insulator (SOI) and FinFET CMOS technologies. Total Ionizing Dose (TID) response, heavy-ion microdose effects and single-event effects (SEEs) will be discussed. It is shown that a very high TID tolerance can be achieved by narrow-fin SOI FinFET architectures, while bulk FinFETs may exhibit similar TID response to the planar devices. Due to the vertical nature of FinFETs, a specific heavy-ion response can be obtained, whereby the angle of incidence becomes highly important with respect to the vertical sidewall gates. With respect to SEE, the buried oxide in the SOI FinFETs suppresses the diffusion tails from the charge collection in the substrate compared to the planar bulk FinFET devices. Channel lengths and fin widths are now comparable to, or smaller than the dimensions of the region affected by the single ionizing ions or lasers used in testing. This gives rise to a high degree of sensitivity to individual device parameters and source-drain shunting during ion-beam or laser-beam SEE testing. Simulations are used to illuminate the mechanisms observed in radiation testing and the progress and needs for the numerical modeling/simulation of the radiation response of advanced SOI and FinFET transistors are highlighted.

77 FR 33740 - Announcement of Requirements and Registration for “Health Data Platform Simple Sign-On Challenge”

Science.gov (United States)

2012-06-07

... creativity of entrepreneurs and productivity of developers. The ``Health Data Platform Simple Sign-On... interacting across multiple HDP technology components, making it easier for community collaborators to...

Silicon-on-Insulator Lateral-Insulated-Gate-Bipolar-Transistor with Built-in Self-anti-ESD Diode

Directory of Open Access Journals (Sweden)

Xiaojun Cheng

2014-05-01

Full Text Available Power SOI (Silicon-On-Insulator devices have an inherent sandwich structure of MOS (Metal-Oxide-Semiconductor gate which is very easy to suffer ESD (Electro-Static Discharge overstress. To solve this reliability problem, studies on design and modification of a built-in self-anti-ESD diode for a preliminarily optimized high voltage SOI LIGBT (Lateral-Insulated-Gate-Bipolar-Transistor were carried out on the Silvaco TCAD (Technology-Computer-Aided-Design platform. According to the constrains of the technological process, the new introduction of the N+ doped region into P-well region that form the built-in self-anti-ESD diode should be done together with the doping of source under the same mask. The modifications were done by adjusting the vertical impurity profile in P-well into retrograde distribution and designing a cathode plate with a proper length to cover the forward depletion terminal and make sure that the thickness of the cathode plate is the same as that of the gate plate. The simulation results indicate that the modified device structure is compatible with the original one in process and design, the breakdown voltage margin of the former was expanded properly, and both the transient cathode voltages are clamped low enough very quickly. Therefore, the design and optimization results of the modified device structure of the built-in self-anti-ESD diode for the given SOI LIGBT meet the given requirements.

Simple unification

International Nuclear Information System (INIS)

Ponce, W.A.; Zepeda, A.

1987-08-01

We present the results obtained from our systematic search of a simple Lie group that unifies weak and electromagnetic interactions in a single truly unified theory. We work with fractionally charged quarks, and allow for particles and antiparticles to belong to the same irreducible representation. We found that models based on SU(6), SU(7), SU(8) and SU(10) are viable candidates for simple unification. (author). 23 refs

The market outlook for integrated gasification combined cycle technology

International Nuclear Information System (INIS)

MacGregor, P.R.; Maslak, C.E.; Stoll, H.G.

1991-01-01

Integrated gasification combined cycle (IGCC) technology was developed in the 1970s and is now competitive with other coal fired technologies. Because it is a new technology, IGCC technology developments are continuing at a rapid pace and the trend in decreasing capital costs is similar to the same trend seen during the early decades of simple cycle gas turbines. Consequently, IGCC technology is expected to be even more economical during the mid and late 1990s than it is today. The objective of this paper is to provide an examination of the basic economic principles of IGCC technology and to illustrate the extent to which this technology is a viable least-cost generation addition technology. Moreover, key reliability and emissions issues are addressed in relation to the technology alternatives. This paper is organized to first review the IGCC technology and to contrast its reliability, emission, performance and cost data with the three key commercially proven technologies: simple cycle combustion turbines, combined cycle plants, and coal-fired steam plants. Economic screening curves are used to illustrate the need for a balanced generation expansion mix of technologies. The regional market opportunity for coal fueled technology orders in the US from 1992 through 2005 is presented

The Impact of a 24 Month Housing First Intervention on Participants' Body Mass Index and Waist Circumference: Results from the At Home / Chez Soi Toronto Site Randomized Controlled Trial.

Science.gov (United States)

Woodhall-Melnik, Julia; Misir, Vachan; Kaufman-Shriqui, Vered; O'Campo, Patricia; Stergiopoulos, Vicky; Hwang, Stephen

2015-01-01

Research suggests that individuals experiencing homelessness have high rates of overweight and obesity. Unhealthy weights and homelessness are both associated with increased risk of poor health and mortality. Using longitudinal data from 575 participants at the Toronto site of the At Home/Chez Soi randomized controlled trial, we investigate the impact of receiving a Housing First intervention on the Body Mass Index (BMI) and waist circumference of participants with moderate and high needs for mental health support services. The ANCOVA results indicate that the intervention resulted in no significant change in BMI or waist circumference from baseline to 24 months. The findings suggest a need for a better understanding of factors contributing to overweight, obesity, and high waist circumference in populations who have histories of housing precarity and experience low-income in tandem with other concerns such as mental illness and addictions. International Standard Randomized Control Trial Number Register ISRCTN42520374.

Dynamic control of chaotic resonators

KAUST Repository

Di Falco, A.; Bruck, R.; Liu, C.; Muskens, O.; Fratalocchi, Andrea

2016-01-01

We report on the all-optical control of chaotic optical resonators based on silicon on insulator (SOI) platform. We show that simple non-chaotic cavities can be tuned to exhibit chaotic behavior via intense optical pump- ing, inducing a local change of refractive index. To this extent we have fabricated a number of devices and demonstrated experimentally and theoretically that chaos can be triggered on demand on an optical chip. © 2016 SPIE.

Dynamic control of chaotic resonators

KAUST Repository

Di Falco, A.

2016-02-16

We report on the all-optical control of chaotic optical resonators based on silicon on insulator (SOI) platform. We show that simple non-chaotic cavities can be tuned to exhibit chaotic behavior via intense optical pump- ing, inducing a local change of refractive index. To this extent we have fabricated a number of devices and demonstrated experimentally and theoretically that chaos can be triggered on demand on an optical chip. © 2016 SPIE.

A quantitative discussion on the assessment of power supply technologies: DEA (data envelopment analysis) and SAW (simple additive weighting) as complementary methods for the “Grammar”

International Nuclear Information System (INIS)

Shakouri, Hamed G.; Nabaee, Mahdis; Aliakbarisani, Sajad

2014-01-01

The growing concern about the negative effects of fossil fuels on the environment, and the limited resources of them have forced more intensive use of other energy sources. In absence of sufficient economically feasible renewable energies, nuclear power may play essential role in this field. Recently, the advantages and disadvantages of nuclear power and fossil fuels regarding their efficiencies have been attracted researchers' interest. This paper discusses on the findings from “A Grammar for assessing the performance of power supply systems: comparing nuclear energy to fossil energy” (Diaz-Maurin F, Giampietro M. 2013). Although the “Grammar” is a very valuable approach, it can be accomplished by using helpful quantitative methods. In this discussion, we apply quantitative decision-making approaches to compare the same fossil fuel (coal) power plants with nuclear power plants. Economic variables are also taken into consideration. The DEA (data envelopment analysis) and SAW (simple additive weighting) are the methods applied. Results confirm the results of the reference paper in most cases and show that the fossil fuel power plants with CCS (carbon capture and storage) are slightly more efficient than nuclear power plants. However, selection of input and output variables is disputable. Assuming job creation as a desired output can change the ranking results. - Highlights: • A numeric decision making approach is proposed to facilitate assessment of technologies introduced as a “Grammar”. • Two different methods are chosen (SAW and DEA) since the results obtained for ranking may differ with different methods. • We propose to use the original fractional objective function of DEA with equal weightings applied for the attributes. • Proper combinations of both input and output attributes including economic variables are discussed. • The attributes for assessment of the technologies differ from different viewpoints. Labor force and costs are simple

Research and development of basic technologies for the next generation industries, 'three-dimensional circuit elements'. Evaluation on the research and development; Jisedai sangyo kiban gijutsu kenkyu kaihatsu 'sanjigen kairo soshi'. Kenkyu kaihatsu hyoka

Energy Technology Data Exchange (ETDEWEB)

NONE

1991-04-01

Research, development and evaluation were performed with an objective of establishing the basic technology related to three-dimensional circuit elements that integrate functions at ultra-high density. For the basic technology of lamination, the SOI technology suitable for the three-dimensional circuit elements was developed, and it has become possible to manufacture high-quality multi-layered crystalline structure by means of annealing that uses laser and electron beam. In addition, a lateral epitaxial technology for solid phase was developed, and the base to be applied to the three-dimensional circuit elements was established. Furthermore, the technology to put thin film circuits together would be useful for high-density integration in the future. The three-dimensional circuit makes parallel processing in each segment possible, whereas a possibility was shown that the processing can be performed at much higher speed than before. Actually a prototype three-dimensional circuit equipped with functions for parallel processing and judgment processing was fabricated. The image pre-processing which has been impossible on the real time basis in the conventional two-dimensional integrated circuit was realized in a speed as fast as milli-second order. These achievements lead to a belief that the targets for the present research and development have been achieved. (NEDO)

Towards a fully integrated indium-phosphide membrane on silicon photonics platform

NARCIS (Netherlands)

van Engelen, J.P.; Pogoretskiy, V.; Smit, M.K.; van der Tol, J.J.G.M.; Jiao, Y.

2017-01-01

Recently a uni-traveling-carrier photodetector with high speed (> 67GHz) and a high-gain optical amplifier (110/cm at 4 kA/cm2) have been demonstrated using the InP membrane-on-Silicon (IMOS) integration technology. Passives in IMOS have shown features comparable to SOI platforms due to the tight

Spin Interference in Rectangle Loop Based on Rashba and Dresselhaus Spin-Orbit Interactions

International Nuclear Information System (INIS)

Jia-Ting, Ni; Bin, Chen; Xiao-Wan, Liang; Koga, T.

2009-01-01

We demonstrate the amplitude and spin polarization of AAS oscillation changing with Rashba spin-orbit interaction (SOI) and Dresselhaus SOI. The amplitude and spin polarization of AB oscillation changing with Rashba SOI and Dresselhaus SOI are demonstrated as well. The ideal quasi-one-dimensional square loop does not exist in reality, therefore to match the experiment better we should consider the shape of the rectangle loop in theory

Response of Simple, Model Systems to Extreme Conditions

Energy Technology Data Exchange (ETDEWEB)

Ewing, Rodney C. [Univ. of Michigan, Ann Arbor, MI (United States); Lang, Maik [Univ. of Michigan, Ann Arbor, MI (United States)

2015-07-30

The focus of the research was on the application of high-pressure/high-temperature techniques, together with intense energetic ion beams, to the study of the behavior of simple oxide systems (e.g., SiO₂, GeO₂, CeO₂, TiO₂, HfO₂, SnO₂, ZnO and ZrO₂) under extreme conditions. These simple stoichiometries provide unique model systems for the analysis of structural responses to pressure up to and above 1 Mbar, temperatures of up to several thousands of kelvin, and the extreme energy density generated by energetic heavy ions (tens of keV/atom). The investigations included systematic studies of radiation- and pressure-induced amorphization of high P-T polymorphs. By studying the response of simple stoichiometries that have multiple structural “outcomes”, we have established the basic knowledge required for the prediction of the response of more complex structures to extreme conditions. We especially focused on the amorphous state and characterized the different non-crystalline structure-types that result from the interplay of radiation and pressure. For such experiments, we made use of recent technological developments, such as the perforated diamond-anvil cell and in situ investigation using synchrotron x-ray sources. We have been particularly interested in using extreme pressures to alter the electronic structure of a solid prior to irradiation. We expected that the effects of modified band structure would be evident in the track structure and morphology, information which is much needed to describe theoretically the fundamental physics of track-formation. Finally, we investigated the behavior of different simple-oxide, composite nanomaterials (e.g., uncoated nanoparticles vs. core/shell systems) under coupled, extreme conditions. This provided insight into surface and boundary effects on phase stability under extreme conditions.

Concurrent rib and pelvic fractures as an indicator of solid abdominal organ injury.

Science.gov (United States)

Al-Hassani, Ammar; Afifi, Ibrahim; Abdelrahman, Husham; El-Menyar, Ayman; Almadani, Ammar; Recicar, Jan; Al-Thani, Hassan; Maull, Kimball; Latifi, Rifat

2013-01-01

To study the association of solid organ injuries (SOIs) in patients with concurrent rib and pelvic fractures. Retrospective analysis of prospectively collected data from November 2007 to May 2010. Patients' demographics, mechanism of injury, Injury severity scoring, pelvic fracture, and SOIs were analyzed. Patients with SOIs were compared in rib fractures with and without pelvic fracture. The study included 829 patients (460 with rib fractures ± pelvic fracture and 369 with pelvic fracture alone) with mean age of 35 ± 12.7 years. Motor vehicle crashes (45%) and falls from height (30%) were the most common mechanism of injury. The overall incidence of SOIs in this study was 22% (185/829). Further, 15% of patient with rib fractures had associated pelvic fracture. SOI was predominant in patients with concurrent rib fracture and pelvic fracture compared to ribs or pelvic fractures alone (42% vs. 26% vs. 15%, respectively, p = 0.02). Concurrent multiple rib fractures and pelvic fracture increases the risk of SOI compared to either group alone. Lower RFs and pelvic fracture had higher association for SOI and could be used as an early indicator of the presence of SOIs. Copyright © 2013 Surgical Associates Ltd. Published by Elsevier Ltd. All rights reserved.

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

Science.gov (United States)

Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

2012-07-01

In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

Why not stop transfer of technology

Energy Technology Data Exchange (ETDEWEB)

Baumer, J M

1979-01-01

One of the crucial themes in the dialogue between rich and poor nations is the nature and volume of the transfer of technology from the industrialized to the developing world. In contrast to the demand of overcoming the technology gap, Prof. Baumer argues that the postulate should rather be formulated as reduction of technological dependence. Industrialized countries say without technology, there is no growth; they say modern technology is the right technology. They are indeed against a cutting of costs and basically against simplifying the getting hold of their technology. Of prime importance is the development of technology at the site of the problems themselves. Problems can be solved in technically quite different ways - from simple to very complicated - and drawer-technology is only in the rarest cases the best solution. (MCW)

Magnetic chirality induced from Ruderman-Kittel-Kasuya-Yosida interaction at an interface of a ferromagnet/heavy metal heterostructure

International Nuclear Information System (INIS)

Shibuya, Taira; Matsuura, Hiroyasu; Ogata, Masao

2016-01-01

We study a microscopic derivation and the properties of the Dzyaloshinskii-Moriya interaction (DMI) between local magnetic moments in ferromagnet/heavy metal heterostructures. First, we derive DMI by Ruderman-Kittel-Kasuya-Yosida interaction through electrons in a heavy metal with Rashba spin orbit interaction (SOI). Next, we study the dependences of the DMI on the Rashba SOI, lattice constant, and chemical potential. We find that the DMI amplitude increases linearly when the Rashba SOI is small, has a maximum when the Rashba SOI is comparable to the hopping integral, and decreases when the Rashba SOI is large. The sign of the DMI not only changes depending on the sign of the Rashba SOI but also the lattice constants and the chemical potential of the heavy metal. The implications of the obtained results for experiments are discussed. (author)

A Simple Demonstration for Exploring the Radio Waves Generated by a Mobile Phone

Science.gov (United States)

Hare, Jonathan

2010-01-01

Described is a simple low cost home-made device that converts the radio wave energy from a mobile phone signal into electricity for lighting an LED. No battery or complex circuitry is required. The device can form the basis of a range of interesting experiments on the physics and technology of mobile phones. (Contains 5 figures.)

A simple and inexpensive way to document simple husbandry in animal care facilities using QR code scanning.

Science.gov (United States)

Green, Tyler; Smith, Terry; Hodges, Richard; Fry, W Mark

2017-12-01

Record keeping within research animal care facilities is a key part of the guidelines set forth by national regulatory bodies and mandated by federal laws. Research facilities must maintain records of animal health issues, procedures and usage. Facilities are also required to maintain records regarding regular husbandry such as general animal checks, feeding and watering. The level of record keeping has the potential to generate excessive amounts of paper which must be retained in a fashion as to be accessible. In addition it is preferable not to retain within administrative areas any paper records which may have been in contact with animal rooms. Here, we present a flexible, simple and inexpensive process for the generation and storage of electronic animal husbandry records using smartphone technology over a WiFi or cellular network.

The Impact of a 24 Month Housing First Intervention on Participants' Body Mass Index and Waist Circumference: Results from the At Home / Chez Soi Toronto Site Randomized Controlled Trial.

Directory of Open Access Journals (Sweden)

Julia Woodhall-Melnik

Full Text Available Research suggests that individuals experiencing homelessness have high rates of overweight and obesity. Unhealthy weights and homelessness are both associated with increased risk of poor health and mortality. Using longitudinal data from 575 participants at the Toronto site of the At Home/Chez Soi randomized controlled trial, we investigate the impact of receiving a Housing First intervention on the Body Mass Index (BMI and waist circumference of participants with moderate and high needs for mental health support services. The ANCOVA results indicate that the intervention resulted in no significant change in BMI or waist circumference from baseline to 24 months. The findings suggest a need for a better understanding of factors contributing to overweight, obesity, and high waist circumference in populations who have histories of housing precarity and experience low-income in tandem with other concerns such as mental illness and addictions.International Standard Randomized Control Trial Number Register ISRCTN42520374.

IEEE 802.11 Networks: A Simple Model Geared Towards Offloading Studies and Considerations on Future Small Cells

DEFF Research Database (Denmark)

Garcia, Luis Guilherme Uzeda; Rodriguez, Ignacio; Catania, Davide

2013-01-01

WiFi is the prevalent wireless access technology in local area deployments and is expected to play a major role in a mobile operator’s data offloading strategy. As a result, having simple tools that are able to assess the offloading potential of IEEE 802.11 networks is vital. In this paper, we...... propose a simple closed-form solution to calculate down- and uplink throughput values per user under full-buffer traffic when small WiFi cells are used to offload macrocells. Extensive measurement campaigns and simulation results demonstrate that there is an excellent quantitative match between analytical...... model and data despite the simplicity of the former. Finally, in light of our observations we discuss some of the fundamental technological limitations that may have a significant impact on the future of small cells....

Comparative Study for Evaluation of Mass Flow Rate for Simple Solar Still and Active with Heat Pump

OpenAIRE

Hidouri Khaoula; Benhmidene Ali; Chaouachi Bechir; Ravishankar Sathyamurthy

2017-01-01

In isolated and arid areas, especially in the almost Maghreb regions, the abundant solar radiation intensity along the year and the available brackish water resources are the two favorable conditions for using solar desalination technology to produce fresh water. The present study is based on the use of three groups of correlation, for evaluating mass transfer. Theoretical results are compared with those obtained experimentally for a Simple Solar Distiller (SSD) and a Simple Solar Distiller H...

Silicon Nanowires for All-Optical Signal Processing in Optical Communication

DEFF Research Database (Denmark)

Pu, Minhao; Hu, Hao; Ji, Hua

2012-01-01

Silicon (Si), the second most abundant element on earth, has dominated in microelectronics for many decades. It can also be used for photonic devices due to its transparency in the range of optical telecom wavelengths which will enable a platform for a monolithic integration of optics...... and microelectronics. Silicon photonic nanowire waveguides fabricated on silicon-on-insulator (SOI) substrates are crucial elements in nano-photonic integrated circuits. The strong light confinement in nanowires induced by high index contrast SOI material enhances the nonlinear effects in the silicon nanowire core...... such as four-wave mixing (FWM) which is an imperative process for optical signal processing. Since the current mature silicon fabrication technology enables a precise dimension control on nanowires, dispersion engineering can be performed by tailoring nanowire dimensions to realize an efficient nonlinear...

Une affaire de générations : la construction d’un entre-soi à l’épreuve de la mixité intergénérationnelle.

Directory of Open Access Journals (Sweden)

François Madoré

2010-06-01

Full Text Available Depuis les années 2000 en France, un nouveau type d’environnement résidentiel sécurisé (et souvent fermé mais pas de façon systématique se développe, incarné par les multiples figures du village senior. Ce phénomène soulève l’hypothèse d’une transposition d’un modèle d’entre-soi générationnel des États-Unis, où, dès les années 1950, des retirement communities ou active adults communities sont apparues, qui ont depuis proliféré vers la France. Il pose aussi la question de la construction d’un entre-soi et de sa confrontation à la mixité mais aussi à l’altérité. C’est cette interrogation qui sous-tend cet article. Celui-ci observe les modes d’habiter dans une résidence construite à l’origine exclusivement pour les seniors mais ouverte depuis à des ménages plus jeunes pour combattre la vacance d’une partie des logements. Il s’agit de la Villa Vermeil de Biscarrosse (Landes, complexe résidentiel fermé avec contrôle des accès, composé d’une résidence locative de 108 maisons gérée par le groupe Omnium Finance. Des entretiens longs et semi-directifs ont été conduits en 2008 auprès de résidants de cet ensemble d’habitat et du gestionnaire du club Villa Vermeil. Cette méthode permet de faire émerger les discours d’existence, donnant accès aux images et aux représentations des habitants dans la construction de leur rapport à l’habiter. L’intérêt de cette approche monographique est de bien illustrer la façon dont peut se construire ou non l’entre-soi générationnel et le rapport aux autres classes d’âge, dans un contexte où la mixité intergénérationnelle, étrangère à la conception du projet, a été imposée « après coup », ce qui n’est pas toujours bien perçu par les seniors, loin s’en faut, certains vivant cette mixité imposée comme une trahison et en décalage avec ce qu’ils étaient venus chercher en s’installant dans ce lieu. Since the

Public support for energy sources and related technologies: The impact of simple information provision

International Nuclear Information System (INIS)

Hobman, Elizabeth V.; Ashworth, Peta

2013-01-01

Increasing public awareness and understanding of alternative energy sources and related technologies is an essential component of informed decision-making regarding new options of generating energy for a low carbon future. The current study examined the influence of psychological factors (i.e., pro-environmental beliefs, and subjective norms) and the provision of factual information on public support for a range of energy sources and related technologies. A representative sample of 1907 Australians completed an on-line survey that measured perceptions of a range of climate change and energy issues. Results showed that support for renewables is stronger than support for traditional fossil-fuel based energy sources (i.e., coal or gas) or nuclear energy. The provision of factual information about generation cost and emissions significantly changed support ratings, particularly when cost information was provided. Regression analyses revealed that pro-environmental beliefs were significantly related to support ratings for alternative energy sources. Subjective norms, however, were the strongest positive explanatory factor, suggesting that social mechanisms may be key drivers of support for new and emerging energy sources and related technologies. - Highlights: • We examine support for a wide range of energy sources and technologies. • Support changes when information on cost and emissions is provided. • Pro-environmental beliefs and social norms positively relate to support

Research and development of basic technologies for the next generation industries, 'three-dimensional circuit elements'. Evaluation on the research and development; Jisedai sangyo kiban gijutsu kenkyu kaihatsu 'sanjigen kairo soshi'. Kenkyu kaihatsu hyoka

Energy Technology Data Exchange (ETDEWEB)

NONE

1991-04-01

Research, development and evaluation were performed with an objective of establishing the basic technology related to three-dimensional circuit elements that integrate functions at ultra-high density. For the basic technology of lamination, the SOI technology suitable for the three-dimensional circuit elements was developed, and it has become possible to manufacture high-quality multi-layered crystalline structure by means of annealing that uses laser and electron beam. In addition, a lateral epitaxial technology for solid phase was developed, and the base to be applied to the three-dimensional circuit elements was established. Furthermore, the technology to put thin film circuits together would be useful for high-density integration in the future. The three-dimensional circuit makes parallel processing in each segment possible, whereas a possibility was shown that the processing can be performed at much higher speed than before. Actually a prototype three-dimensional circuit equipped with functions for parallel processing and judgment processing was fabricated. The image pre-processing which has been impossible on the real time basis in the conventional two-dimensional integrated circuit was realized in a speed as fast as milli-second order. These achievements lead to a belief that the targets for the present research and development have been achieved. (NEDO)

Simple arithmetic: not so simple for highly math anxious individuals.

Science.gov (United States)

Chang, Hyesang; Sprute, Lisa; Maloney, Erin A; Beilock, Sian L; Berman, Marc G

2017-12-01

Fluency with simple arithmetic, typically achieved in early elementary school, is thought to be one of the building blocks of mathematical competence. Behavioral studies with adults indicate that math anxiety (feelings of tension or apprehension about math) is associated with poor performance on cognitively demanding math problems. However, it remains unclear whether there are fundamental differences in how high and low math anxious individuals approach overlearned simple arithmetic problems that are less reliant on cognitive control. The current study used functional magnetic resonance imaging to examine the neural correlates of simple arithmetic performance across high and low math anxious individuals. We implemented a partial least squares analysis, a data-driven, multivariate analysis method to measure distributed patterns of whole-brain activity associated with performance. Despite overall high simple arithmetic performance across high and low math anxious individuals, performance was differentially dependent on the fronto-parietal attentional network as a function of math anxiety. Specifically, low-compared to high-math anxious individuals perform better when they activate this network less-a potential indication of more automatic problem-solving. These findings suggest that low and high math anxious individuals approach even the most fundamental math problems differently. © The Author (2017). Published by Oxford University Press.

Experimental verification of layout physical verification of silicon photonics

Science.gov (United States)

El Shamy, Raghi S.; Swillam, Mohamed A.

2018-02-01

Silicon photonics have been approved as one of the best platforms for dense integration of photonic integrated circuits (PICs) due to the high refractive index contrast among its materials. Silicon on insulator (SOI) is a widespread photonics technology, which support a variety of devices for lots of applications. As the photonics market is growing, the number of components in the PICs increases which increase the need for an automated physical verification (PV) process. This PV process will assure reliable fabrication of the PICs as it will check both the manufacturability and the reliability of the circuit. However, PV process is challenging in the case of PICs as it requires running an exhaustive electromagnetic (EM) simulations. Our group have recently proposed an empirical closed form models for the directional coupler and the waveguide bends based on the SOI technology. The models have shown a very good agreement with both finite element method (FEM) and finite difference time domain (FDTD) solvers. These models save the huge time of the 3D EM simulations and can be easily included in any electronic design automation (EDA) flow as the equations parameters can be easily extracted from the layout. In this paper we present experimental verification for our previously proposed models. SOI directional couplers with different dimensions have been fabricated using electron beam lithography and measured. The results from the measurements of the fabricate devices have been compared to the derived models and show a very good agreement. Also the matching can reach 100% by calibrating certain parameter in the model.

3D-vertical integration of sensors and electronics

International Nuclear Information System (INIS)

Lipton, R.

2007-01-01

Technologies are being developed which enable the vertical integration of sensors and electronics as well as multilayer electronic circuits. New thinning and wafer bonding techniques and the formation of small vias between resulting thin layers of electronics enable the design of dense integrated sensor/readout structures. We discuss candidate technologies based on SOI and bulk CMOS. A prototype 3D chip developed at Fermilab that incorporates three tiers of 0.18μm CMOS is described

Foundations of semantic web technologies

CERN Document Server

Hitzler, Pascal; Rudolph, Sebastian

2009-01-01

The Quest for Semantics Building Models Calculating with Knowledge Exchanging Information Semanic Web Technologies RESOURCE DESCRIPTION LANGUAGE (RDF)Simple Ontologies in RDF and RDF SchemaIntroduction to RDF Syntax for RDF Advanced Features Simple Ontologies in RDF Schema Encoding of Special Data Structures An ExampleRDF Formal Semantics Why Semantics? Model-Theoretic Semantics for RDF(S) Syntactic Reasoning with Deduction Rules The Semantic Limits of RDF(S)WEB ONTOLOGY LANGUAGE (OWL) Ontologies in OWL OWL Syntax and Intuitive Semantics OWL Species The Forthcoming OWL 2 StandardOWL Formal Sem

A simple ion implanter for material modifications in agriculture and gemmology

Science.gov (United States)

Singkarat, S.; Wijaikhum, A.; Suwannakachorn, D.; Tippawan, U.; Intarasiri, S.; Bootkul, D.; Phanchaisri, B.; Techarung, J.; Rhodes, M. W.; Suwankosum, R.; Rattanarin, S.; Yu, L. D.

2015-12-01

In our efforts in developing ion beam technology for novel applications in biology and gemmology, an economic simple compact ion implanter especially for the purpose was constructed. The designing of the machine was aimed at providing our users with a simple, economic, user friendly, convenient and easily operateable ion implanter for ion implantation of biological living materials and gemstones for biotechnological applications and modification of gemstones, which would eventually contribute to the national agriculture, biomedicine and gem-industry developments. The machine was in a vertical setup so that the samples could be placed horizontally and even without fixing; in a non-mass-analyzing ion implanter style using mixed molecular and atomic nitrogen (N) ions so that material modifications could be more effective; equipped with a focusing/defocusing lens and an X-Y beam scanner so that a broad beam could be possible; and also equipped with a relatively small target chamber so that living biological samples could survive from the vacuum period during ion implantation. To save equipment materials and costs, most of the components of the machine were taken from decommissioned ion beam facilities. The maximum accelerating voltage of the accelerator was 100 kV, ideally necessary for crop mutation induction and gem modification by ion beams from our experience. N-ion implantation of local rice seeds and cut gemstones was carried out. Various phenotype changes of grown rice from the ion-implanted seeds and improvements in gemmological quality of the ion-bombarded gemstones were observed. The success in development of such a low-cost and simple-structured ion implanter provides developing countries with a model of utilizing our limited resources to develop novel accelerator-based technologies and applications.

A simple ion implanter for material modifications in agriculture and gemmology

International Nuclear Information System (INIS)

Singkarat, S.; Wijaikhum, A.; Suwannakachorn, D.; Tippawan, U.; Intarasiri, S.; Bootkul, D.; Phanchaisri, B.; Techarung, J.; Rhodes, M.W.; Suwankosum, R.; Rattanarin, S.; Yu, L.D.

2015-01-01

In our efforts in developing ion beam technology for novel applications in biology and gemmology, an economic simple compact ion implanter especially for the purpose was constructed. The designing of the machine was aimed at providing our users with a simple, economic, user friendly, convenient and easily operateable ion implanter for ion implantation of biological living materials and gemstones for biotechnological applications and modification of gemstones, which would eventually contribute to the national agriculture, biomedicine and gem-industry developments. The machine was in a vertical setup so that the samples could be placed horizontally and even without fixing; in a non-mass-analyzing ion implanter style using mixed molecular and atomic nitrogen (N) ions so that material modifications could be more effective; equipped with a focusing/defocusing lens and an X–Y beam scanner so that a broad beam could be possible; and also equipped with a relatively small target chamber so that living biological samples could survive from the vacuum period during ion implantation. To save equipment materials and costs, most of the components of the machine were taken from decommissioned ion beam facilities. The maximum accelerating voltage of the accelerator was 100 kV, ideally necessary for crop mutation induction and gem modification by ion beams from our experience. N-ion implantation of local rice seeds and cut gemstones was carried out. Various phenotype changes of grown rice from the ion-implanted seeds and improvements in gemmological quality of the ion-bombarded gemstones were observed. The success in development of such a low-cost and simple-structured ion implanter provides developing countries with a model of utilizing our limited resources to develop novel accelerator-based technologies and applications.

A simple ion implanter for material modifications in agriculture and gemmology

Energy Technology Data Exchange (ETDEWEB)

Singkarat, S. [Plasma and Beam Physics Research Facility, Department of Physics and Materials Science, Faculty of Science, Chiang Mai University, Chiang Mai 50200 (Thailand); Thailand Center of Excellence in Physics, Commission on Higher Education, 328 Si Ayutthaya Road, Bangkok 10400 (Thailand); Wijaikhum, A. [Plasma and Beam Physics Research Facility, Department of Physics and Materials Science, Faculty of Science, Chiang Mai University, Chiang Mai 50200 (Thailand); Department of Physics, University of York, Heslington, York YO10 5DD (United Kingdom); Suwannakachorn, D.; Tippawan, U. [Plasma and Beam Physics Research Facility, Department of Physics and Materials Science, Faculty of Science, Chiang Mai University, Chiang Mai 50200 (Thailand); Intarasiri, S. [Science and Technology Research Institute, Chiang Mai University, Chiang Mai 50200 (Thailand); Bootkul, D. [Department of General Science, Faculty of Science, Srinakharinwirot University, Bangkok 10110 (Thailand); Phanchaisri, B.; Techarung, J. [Science and Technology Research Institute, Chiang Mai University, Chiang Mai 50200 (Thailand); Rhodes, M.W.; Suwankosum, R.; Rattanarin, S. [Plasma and Beam Physics Research Facility, Department of Physics and Materials Science, Faculty of Science, Chiang Mai University, Chiang Mai 50200 (Thailand); Yu, L.D., E-mail: yuld@thep-center.org [Plasma and Beam Physics Research Facility, Department of Physics and Materials Science, Faculty of Science, Chiang Mai University, Chiang Mai 50200 (Thailand); Thailand Center of Excellence in Physics, Commission on Higher Education, 328 Si Ayutthaya Road, Bangkok 10400 (Thailand)

2015-12-15

In our efforts in developing ion beam technology for novel applications in biology and gemmology, an economic simple compact ion implanter especially for the purpose was constructed. The designing of the machine was aimed at providing our users with a simple, economic, user friendly, convenient and easily operateable ion implanter for ion implantation of biological living materials and gemstones for biotechnological applications and modification of gemstones, which would eventually contribute to the national agriculture, biomedicine and gem-industry developments. The machine was in a vertical setup so that the samples could be placed horizontally and even without fixing; in a non-mass-analyzing ion implanter style using mixed molecular and atomic nitrogen (N) ions so that material modifications could be more effective; equipped with a focusing/defocusing lens and an X–Y beam scanner so that a broad beam could be possible; and also equipped with a relatively small target chamber so that living biological samples could survive from the vacuum period during ion implantation. To save equipment materials and costs, most of the components of the machine were taken from decommissioned ion beam facilities. The maximum accelerating voltage of the accelerator was 100 kV, ideally necessary for crop mutation induction and gem modification by ion beams from our experience. N-ion implantation of local rice seeds and cut gemstones was carried out. Various phenotype changes of grown rice from the ion-implanted seeds and improvements in gemmological quality of the ion-bombarded gemstones were observed. The success in development of such a low-cost and simple-structured ion implanter provides developing countries with a model of utilizing our limited resources to develop novel accelerator-based technologies and applications.

Strategy as simple rules.

Science.gov (United States)

Eisenhardt, K M; Sull, D N

2001-01-01

The success of Yahoo!, eBay, Enron, and other companies that have become adept at morphing to meet the demands of changing markets can't be explained using traditional thinking about competitive strategy. These companies have succeeded by pursuing constantly evolving strategies in market spaces that were considered unattractive according to traditional measures. In this article--the third in an HBR series by Kathleen Eisenhardt and Donald Sull on strategy in the new economy--the authors ask, what are the sources of competitive advantage in high-velocity markets? The secret, they say, is strategy as simple rules. The companies know that the greatest opportunities for competitive advantage lie in market confusion, but they recognize the need for a few crucial strategic processes and a few simple rules. In traditional strategy, advantage comes from exploiting resources or stable market positions. In strategy as simple rules, advantage comes from successfully seizing fleeting opportunities. Key strategic processes, such as product innovation, partnering, or spinout creation, place the company where the flow of opportunities is greatest. Simple rules then provide the guidelines within which managers can pursue such opportunities. Simple rules, which grow out of experience, fall into five broad categories: how- to rules, boundary conditions, priority rules, timing rules, and exit rules. Companies with simple-rules strategies must follow the rules religiously and avoid the temptation to change them too frequently. A consistent strategy helps managers sort through opportunities and gain short-term advantage by exploiting the attractive ones. In stable markets, managers rely on complicated strategies built on detailed predictions of the future. But when business is complicated, strategy should be simple.

Process-conditioned bias correction for seasonal forecasting: a case-study with ENSO in Peru

Science.gov (United States)

Manzanas, R.; Gutiérrez, J. M.

2018-05-01

This work assesses the suitability of a first simple attempt for process-conditioned bias correction in the context of seasonal forecasting. To do this, we focus on the northwestern part of Peru and bias correct 1- and 4-month lead seasonal predictions of boreal winter (DJF) precipitation from the ECMWF System4 forecasting system for the period 1981-2010. In order to include information about the underlying large-scale circulation which may help to discriminate between precipitation affected by different processes, we introduce here an empirical quantile-quantile mapping method which runs conditioned on the state of the Southern Oscillation Index (SOI), which is accurately predicted by System4 and is known to affect the local climate. Beyond the reduction of model biases, our results show that the SOI-conditioned method yields better ROC skill scores and reliability than the raw model output over the entire region of study, whereas the standard unconditioned implementation provides no added value for any of these metrics. This suggests that conditioning the bias correction on simple but well-simulated large-scale processes relevant to the local climate may be a suitable approach for seasonal forecasting. Yet, further research on the suitability of the application of similar approaches to the one considered here for other regions, seasons and/or variables is needed.

Simple WZW currents

International Nuclear Information System (INIS)

Fuchs, J.

1990-08-01

A complete classification of simple currents of WZW theory is obtained. The proof is based on an analysis of the quantum dimensions of the primary fields. Simple currents are precisely the primaries with unit quantum dimension; for WZW theories explicit formulae for the quantum dimensions can be derived so that an identification of the fields with unit quantum dimension is possible. (author). 19 refs.; 2 tabs

Weak antilocalization induced by Rashba spin-orbit interaction in layered III-VI compound semiconductor GaSe thin films

Science.gov (United States)

Takasuna, Shoichi; Shiogai, Junichi; Matsuzaka, Shunichiro; Kohda, Makoto; Oyama, Yutaka; Nitta, Junsaku

2017-10-01

Magnetoconductance (MC) at low temperature was measured to investigate spin-related transport affected by spin-orbit interaction (SOI) in III-VI compound n -type GaSe thin films. Results reveal that MC shows weak antilocalization (WAL). Its temperature and gate voltage dependences reveal that the dominant spin relaxation is governed by the D'yakonov-Perel' mechanism associated with the Rashba SOI. The estimated Rashba SOI strength in GaSe is much stronger than that of III-V compound GaAs quantum wells, although the energy gap and spin split-off band in GaSe closely resemble those in GaAs. The angle dependence of WAL amplitude in the in-plane magnetic field direction is almost isotropic. This isotropy indicates that the strength of the Dresselhaus SOI is negligible compared with the Rashba SOI strength. The SOI effect in n -GaSe thin films differs greatly from those of III-V compound semiconductors and transition-metal dichalcogenides.

Technological Progress, Exit and Trade

DEFF Research Database (Denmark)

Schröder, Philipp; Sørensen, Allan

productivity exporters are more likely to continue to export, and market exit is typically preceded by periods of contracting market shares. We show that the simple inclusion of exogenous economy wide technological progress into the standard Melitz (2003) model generates a tractable dynamic framework...

Structure of simple liquids; Structure des liquides simples

Energy Technology Data Exchange (ETDEWEB)

Blain, J F [Commissariat a l' Energie Atomique, Fontenay-aux-Roses (France). Centre d' Etudes Nucleaires

1969-07-01

The results obtained by application to argon and sodium of the two important methods of studying the structure of liquids: scattering of X-rays and neutrons, are presented on one hand. On the other hand the principal models employed for reconstituting the structure of simple liquids are exposed: mathematical models, lattice models and their derived models, experimental models. (author) [French] On presente d'une part les resultats obtenus par application a l'argon et au sodium des deux principales methodes d'etude de la structure des liquides: la diffusion des rayons X et la diffusion des neutrons; d'autre part, les principaux modeles employes pour reconstituer la structure des liquides simples sont exposes: modeles mathematiques, modeles des reseaux et modeles derives, modeles experimentaux. (auteur)

Simple Genome Editing of Rodent Intact Embryos by Electroporation.

Directory of Open Access Journals (Sweden)

Takehito Kaneko

Full Text Available The clustered regularly interspaced short palindromic repeat (CRISPR/CRISPR-associated (Cas system is a powerful tool for genome editing in animals. Recently, new technology has been developed to genetically modify animals without using highly skilled techniques, such as pronuclear microinjection of endonucleases. Technique for animal knockout system by electroporation (TAKE method is a simple and effective technology that produces knockout rats by introducing endonuclease mRNAs into intact embryos using electroporation. Using TAKE method and CRISPR/Cas system, the present study successfully produced knockout and knock-in mice and rats. The mice and rats derived from embryos electroporated with Cas9 mRNA, gRNA and single-stranded oligodeoxynucleotide (ssODN comprised the edited targeted gene as a knockout (67% of mice and 88% of rats or knock-in (both 33%. The TAKE method could be widely used as a powerful tool to produce genetically modified animals by genome editing.

Mixed-signal 0.18μm CMOS and SiGe BiCMOS foundry technologies for ROIC applications

Science.gov (United States)

Kar-Roy, Arjun; Howard, David; Racanelli, Marco; Scott, Mike; Hurwitz, Paul; Zwingman, Robert; Chaudhry, Samir; Jordan, Scott

2010-10-01

Today's readout integrated-circuits (ROICs) require a high level of integration of high performance analog and low power digital logic. TowerJazz offers a commercial 0.18μm CMOS technology platform for mixed-signal, RF, and high performance analog applications which can be used for ROIC applications. The commercial CA18HD dual gate oxide 1.8V/3.3V and CA18HA dual gate oxide 1.8V/5V RF/mixed signal processes, consisting of six layers of metallization, have high density stacked linear MIM capacitors, high-value resistors, triple-well isolation and thick top aluminum metal. The CA18HA process also has scalable drain extended LDMOS devices, up to 40V Vds, for high-voltage sensor applications, and high-performance bipolars for low noise requirements in ROICs. Also discussed are the available features of the commercial SBC18 SiGe BiCMOS platform with SiGe NPNs operating up to 200/200GHz (fT/fMAX frequencies in manufacturing and demonstrated to 270 GHz fT, for reduced noise and integrated RF capabilities which could be used in ROICs. Implementation of these technologies in a thick film SOI process for integrated RF switch and power management and the availability of high fT vertical PNPs to enable complementary BiCMOS (CBiCMOS), for RF enabled ROICs, are also described in this paper.

Use of computer aids including expert systems to enhance diagnosis of NPP safety status and operator response. VDU displays in accidents - Interact

International Nuclear Information System (INIS)

Humble, P.; Welbourne, D.

1998-01-01

This report describes NNC development of a demonstration concept called Interact of Visual Display Unit (VDU) displays, integrating on-screen control of plant actions. Most plant vendors now propose on-screen control and it is being included on some plants. The integration of Station Operating Instructions (SOI) into VDU presentation of plants is being developed rapidly. With on-screen control, SOIs can be displayed with control targets able to initiate plant control, directly as called for in the SOIs. Interact displays information and control options, using a cursor to simulate on-screen display and plant control. The displays show a method which integrates soft control and SOI information into a single unified presentation. They simulate the SOI for an accident, on-screen, with simulated inserted plant values

Simple Rules, Not So Simple: The Use of International Ovarian Tumor Analysis (IOTA) Terminology and Simple Rules in Inexperienced Hands in a Prospective Multicenter Cohort Study.

Science.gov (United States)

Meys, Evelyne; Rutten, Iris; Kruitwagen, Roy; Slangen, Brigitte; Lambrechts, Sandrina; Mertens, Helen; Nolting, Ernst; Boskamp, Dieuwke; Van Gorp, Toon

2017-12-01

 To analyze how well untrained examiners - without experience in the use of International Ovarian Tumor Analysis (IOTA) terminology or simple ultrasound-based rules (simple rules) - are able to apply IOTA terminology and simple rules and to assess the level of agreement between non-experts and an expert.  This prospective multicenter cohort study enrolled women with ovarian masses. Ultrasound was performed by non-expert examiners and an expert. Ultrasound features were recorded using IOTA nomenclature, and used for classifying the mass by simple rules. Interobserver agreement was evaluated with Fleiss' kappa and percentage agreement between observers.  50 consecutive women were included. We observed 46 discrepancies in the description of ovarian masses when non-experts utilized IOTA terminology. Tumor type was misclassified often (n = 22), resulting in poor interobserver agreement between the non-experts and the expert (kappa = 0.39, 95 %-CI 0.244 - 0.529, percentage of agreement = 52.0 %). Misinterpretation of simple rules by non-experts was observed 57 times, resulting in an erroneous diagnosis in 15 patients (30 %). The agreement for classifying the mass as benign, malignant or inconclusive by simple rules was only moderate between the non-experts and the expert (kappa = 0.50, 95 %-CI 0.300 - 0.704, percentage of agreement = 70.0 %). The level of agreement for all 10 simple rules features varied greatly (kappa index range: -0.08 - 0.74, percentage of agreement 66 - 94 %).  Although simple rules are useful to distinguish benign from malignant adnexal masses, they are not that simple for untrained examiners. Training with both IOTA terminology and simple rules is necessary before simple rules can be introduced into guidelines and daily clinical practice. © Georg Thieme Verlag KG Stuttgart · New York.

A simple wavelength division multiplexing system for active learning teaching

Science.gov (United States)

Zghal, Mourad; Ghalila, Hassen; Ben Lakhdar, Zohra

2009-06-01

The active learning project consists in a series of workshops for educators, researchers and students and promotes an innovative method of teaching physics using simple, inexpensive materials that can be fabricated locally. The objective of the project is to train trainers and inspire students to learn physics. The workshops are based on the use of laboratory work and hands-on activities in the classroom. The interpretation of these experiments is challenging for some students, and the experiments can lead to a significant amount of discussion. The workshops are organized within the framework of the project ``Active Learning in Optics and Photonics" (ALOP) mainly funded by UNESCO, with the support of ICTP (Abdus Salam International Centre for Theoretical Physics) and SPIE. ALOP workshops offer high school, college or university physics teachers the opportunity to improve their conceptual understanding of optics. These workshops usually run for five days and cover several of the topics usually found in any introductory university physics program. Optics and photonics are used as subject matter because it is relevant as well as adaptable to research and educational conditions in many developing countries [1]. In this paper, we will mainly focus on a specific topic of the ALOP workshops, namely optical communications and Wavelength Division Multiplexing technology (WDM). This activity was originally developed by Mazzolini et al [2]. WDM is a technology used in fibre-optic communications for transmitting two or more separate signals over a single fibre optic cable by using a separate wavelength for each signal. Multiple signals are carried together as separate wavelengths of light in a multiplexed signal. Simple and inexpensive WDM system was implemented in our laboratory using light emitting diodes or diode lasers, plastic optical fibres, a set of optical filters and lenses, prism or grating, and photodiodes. Transmission of audio signals using home-made, simple

Design and Fabrication of Silicon-on-Silicon-Carbide Substrates and Power Devices for Space Applications

Directory of Open Access Journals (Sweden)

Gammon P.M.

2017-01-01

Full Text Available A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si wafer bonded to silicon carbide (SiC. This novel silicon-on-silicon-carbide (Si/SiC substrate solution promises to combine the benefits of silicon-on-insulator (SOI technology (i.e device confinement, radiation tolerance, high and low temperature performance with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance. Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.

Silicon nanowire hot carrier electroluminescence

Energy Technology Data Exchange (ETDEWEB)

Plessis, M. du, E-mail: monuko@up.ac.za; Joubert, T.-H.

2016-08-31

Avalanche electroluminescence from silicon pn junctions has been known for many years. However, the internal quantum efficiencies of these devices are quite low due to the indirect band gap nature of the semiconductor material. In this study we have used reach-through biasing and SOI (silicon-on-insulator) thin film structures to improve the internal power efficiency and the external light extraction efficiency. Both continuous silicon thin film pn junctions and parallel nanowire pn junctions were manufactured using a custom SOI technology. The pn junctions are operated in the reach-through mode of operation, thus increasing the average electric field within the fully depleted region. Experimental results of the emission spectrum indicate that the most dominant photon generating mechanism is due to intraband hot carrier relaxation processes. It was found that the SOI nanowire light source external power efficiency is at least an order of magnitude better than the comparable bulk CMOS (Complementary Metal Oxide Semiconductor) light source. - Highlights: • We investigate effect of electric field on silicon avalanche electroluminescence. • With reach-through pn junctions the current and carrier densities are kept constant. • Higher electric fields increase short wavelength radiation. • Higher electric fields decrease long wavelength radiation. • The effect of the electric field indicates intraband transitions as main mechanism.

Advantages of combined touch screen technology and text hyperlink for the pathology grossing manual: a simple approach to access instructive information in biohazardous environments.

Science.gov (United States)

Qu, Zhenhong; Ghorbani, Rhonda P; Li, Hongyan; Hunter, Robert L; Hannah, Christina D

2007-03-01

Gross examination, encompassing description, dissection, and sampling, is a complex task and an essential component of surgical pathology. Because of the complexity of the task, standardized protocols to guide the gross examination often become a bulky manual that is difficult to use. This problem is further compounded by the high specimen volume and biohazardous nature of the task. As a result, such a manual is often underused, leading to errors that are potentially harmful and time consuming to correct-a common chronic problem affecting many pathology laboratories. To combat this problem, we have developed a simple method that incorporates complex text and graphic information of a typical procedure manual and yet allows easy access to any intended instructive information in the manual. The method uses the Object-Linking-and-Embedding function of Microsoft Word (Microsoft, Redmond, WA) to establish hyperlinks among different contents, and then it uses the touch screen technology to facilitate navigation through the manual on a computer screen installed at the cutting bench with no need for a physical keyboard or a mouse. It takes less than 4 seconds to reach any intended information in the manual by 3 to 4 touches on the screen. A 3-year follow-up study shows that this method has increased use of the manual and has improved the quality of gross examination. The method is simple and can be easily tailored to different formats of instructive information, allowing flexible organization, easy access, and quick navigation. Increased compliance to instructive information reduces errors at the grossing bench and improves work efficiency.

Head-Disk Interface Technology: Challenges and Approaches

Science.gov (United States)

Liu, Bo

Magnetic hard disk drive (HDD) technology is believed to be one of the most successful examples of modern mechatronics systems. The mechanical beauty of magnetic HDD includes simple but super high accuracy positioning head, positioning technology, high speed and stability spindle motor technology, and head-disk interface technology which keeps the millimeter sized slider flying over a disk surface at nanometer level slider-disk spacing. This paper addresses the challenges and possible approaches on how to further reduce the slider disk spacing whilst retaining the stability and robustness level of head-disk systems for future advanced magnetic disk drives.

Simple-MSSM: a simple and efficient method for simultaneous multi-site saturation mutagenesis.

Science.gov (United States)

Cheng, Feng; Xu, Jian-Miao; Xiang, Chao; Liu, Zhi-Qiang; Zhao, Li-Qing; Zheng, Yu-Guo

2017-04-01

To develop a practically simple and robust multi-site saturation mutagenesis (MSSM) method that enables simultaneously recombination of amino acid positions for focused mutant library generation. A general restriction enzyme-free and ligase-free MSSM method (Simple-MSSM) based on prolonged overlap extension PCR (POE-PCR) and Simple Cloning techniques. As a proof of principle of Simple-MSSM, the gene of eGFP (enhanced green fluorescent protein) was used as a template gene for simultaneous mutagenesis of five codons. Forty-eight randomly selected clones were sequenced. Sequencing revealed that all the 48 clones showed at least one mutant codon (mutation efficiency = 100%), and 46 out of the 48 clones had mutations at all the five codons. The obtained diversities at these five codons are 27, 24, 26, 26 and 22, respectively, which correspond to 84, 75, 81, 81, 69% of the theoretical diversity offered by NNK-degeneration (32 codons; NNK, K = T or G). The enzyme-free Simple-MSSM method can simultaneously and efficiently saturate five codons within one day, and therefore avoid missing interactions between residues in interacting amino acid networks.

Gate-controlled switching between persistent and inverse persistent spin helix states

International Nuclear Information System (INIS)

Yoshizumi, K.; Sasaki, A.; Kohda, M.; Nitta, J.

2016-01-01

We demonstrate gate-controlled switching between persistent spin helix (PSH) state and inverse PSH state, which are detected by quantum interference effect on magneto-conductance. These special symmetric spin states showing weak localization effect give rise to a long spin coherence when the strength of Rashba spin-orbit interaction (SOI) is close to that of Dresselhaus SOI. Furthermore, in the middle of two persistent spin helix states, where the Rashba SOI can be negligible, the bulk Dresselhaus SOI parameter in a modulation doped InGaAs/InAlAs quantum well is determined.

Gate-controlled switching between persistent and inverse persistent spin helix states

Energy Technology Data Exchange (ETDEWEB)

Yoshizumi, K.; Sasaki, A.; Kohda, M.; Nitta, J. [Department of Materials Science, Tohoku University, Sendai 980-8579 (Japan)

2016-03-28

We demonstrate gate-controlled switching between persistent spin helix (PSH) state and inverse PSH state, which are detected by quantum interference effect on magneto-conductance. These special symmetric spin states showing weak localization effect give rise to a long spin coherence when the strength of Rashba spin-orbit interaction (SOI) is close to that of Dresselhaus SOI. Furthermore, in the middle of two persistent spin helix states, where the Rashba SOI can be negligible, the bulk Dresselhaus SOI parameter in a modulation doped InGaAs/InAlAs quantum well is determined.

Feature Extraction and Classification of Magnetic and EMI Data, Camp Beale, CA

Science.gov (United States)

2012-05-01

and non-specialists. However, as part of ESTCP 1004 we are presently working on transitioning our inversion algorithms to an API that will be...10 0 Time (ms) Cell 663 - Target 1965 - Model 1 (SOI) ISO IVS 0.001 0.005 10 0 Time (ms) Cell 1104 - Target 2532 - Model 1 (SOI) ISO IVS...0.0 1 0.005 10 0 Time (ms) Cell 663 - Target 1965 - Model 1 (SOI) ISO IVS 0.0 1 0.005 10 0 Time (ms) Cell 1104 - Target 2532 - Model 1 (SOI

Simple Finite Sums

KAUST Repository

Alabdulmohsin, Ibrahim M.

2018-01-01

We will begin our treatment of summability calculus by analyzing what will be referred to, throughout this book, as simple finite sums. Even though the results of this chapter are particular cases of the more general results presented in later chapters, they are important to start with for a few reasons. First, this chapter serves as an excellent introduction to what summability calculus can markedly accomplish. Second, simple finite sums are encountered more often and, hence, they deserve special treatment. Third, the results presented in this chapter for simple finite sums will, themselves, be used as building blocks for deriving the most general results in subsequent chapters. Among others, we establish that fractional finite sums are well-defined mathematical objects and show how various identities related to the Euler constant as well as the Riemann zeta function can actually be derived in an elementary manner using fractional finite sums.

Simple Finite Sums

KAUST Repository

Alabdulmohsin, Ibrahim M.

2018-03-07

We will begin our treatment of summability calculus by analyzing what will be referred to, throughout this book, as simple finite sums. Even though the results of this chapter are particular cases of the more general results presented in later chapters, they are important to start with for a few reasons. First, this chapter serves as an excellent introduction to what summability calculus can markedly accomplish. Second, simple finite sums are encountered more often and, hence, they deserve special treatment. Third, the results presented in this chapter for simple finite sums will, themselves, be used as building blocks for deriving the most general results in subsequent chapters. Among others, we establish that fractional finite sums are well-defined mathematical objects and show how various identities related to the Euler constant as well as the Riemann zeta function can actually be derived in an elementary manner using fractional finite sums.

Programming Turing Machines as a game for technology sense-making

DEFF Research Database (Denmark)

Valente, Andrea; Marchetti, Emanuela

2011-01-01

statistics and qualitative analysis. This initial study suggests that simple paper tangibles and tinkering have a place in future, technology-enhanced learning, and that central technological concepts can be discussed on the basis of low-cost tabletop-like games. We also notice a general interest...

Mobile Workforce, Mobile Technology, Mobile Threats

International Nuclear Information System (INIS)

Garcia, J.

2015-01-01

Mobile technologies' introduction into the world of safeguards business processes such as inspection creates tremendous opportunity for novel approaches and could result in a number of improvements to such processes. Mobile applications are certainly the wave of the future. The success of the application ecosystems has shown that users want full fidelity, highly-usable, simple purpose applications with simple installation, quick responses and, of course, access to network resources at all times. But the counterpart to opportunity is risk, and the widespread adoption of mobile technologies requires a deep understanding of the threats and vulnerabilities inherent in mobile technologies. Modern mobile devices can be characterized as small computers. As such, the threats against computing infrastructure apply to mobile devices. Meanwhile, the attributes of mobile technology that make it such an obvious benefit over traditional computing platforms all have elements of risk: pervasive, always-on networking; diverse ecosystems; lack of centralized control; constantly shifting technological foundations; intense competition among competitors in the marketplace; the scale of the installation base (from millions to billions); and many more. This paper will explore the diverse and massive environment of mobile, the number of attackers and vast opportunities for compromise. The paper will explain how mobile devices prove valuable targets to both advanced and persistent attackers as well as less-skilled casual hackers. Organized crime, national intelligence agencies, corporate espionage are all part of the landscape. (author)

Guided Acoustic and Optical Waves in Silicon-on-Insulator for Brillouin Scattering and Optomechanics

Science.gov (United States)

2016-08-01

APL PHOTONICS 1, 071301 (2016) Guided acoustic and optical waves in silicon-on- insulator for Brillouin scattering and optomechanics Christopher J...is possible to simultaneously guide optical and acoustic waves in the technologically important silicon on insulator (SOI) material system. Thin...high sound velocity — makes guiding acoustic waves difficult, motivating the use of soft chalcogenide glasses and partial or complete releases (removal

SOIL VAPOR EXTRACTION TECHNOLOGY: REFERENCE HANDBOOK

Science.gov (United States)

Soil vapor extraction (SVE) systems are being used in Increasing numbers because of the many advantages these systems hold over other soil treatment technologies. SVE systems appear to be simple in design and operation, yet the fundamentals governing subsurface vapor transport ar...

Sustainable development - billions of watts under the seas - Marine current turbines play simple - Technological waves; Developpement durable - Des milliards de watts sous les mers - Les hydroliennes jouent la simplicite - Vagues technologiques

Energy Technology Data Exchange (ETDEWEB)

Lucas, Th.

2011-10-27

The author evokes the opportunities of power generation by the development of sea current or tidal stream turbines. Some developments are already tested by Norwegian, French, Danish, British and American companies. Some specific turbines are briefly presented. In order to reduce the cost of the electricity production from sea currents, manufacturers are using simple and robust technologies, and exploit the experience gained on wind turbines. Some designs and prototypes are evoked for the production of electricity by sea waves (Pelamis and Oyster projects). Principles, strengths and production projects are briefly indicated. The challenge of maintenance in sea environment is outlined for these projects

Waveguide-integrated vertical pin photodiodes of Ge fabricated on p+ and n+ Si-on-insulator layers

Science.gov (United States)

Ito, Kazuki; Hiraki, Tatsurou; Tsuchizawa, Tai; Ishikawa, Yasuhiko

2017-04-01

Vertical pin structures of Ge photodiodes (PDs) integrated with Si optical waveguides are fabricated by depositing Ge epitaxial layers on Si-on-insulator (SOI) layers, and the performances of n+-Ge/i-Ge/p+-SOI PDs are compared with those of p+-Ge/i-Ge/n+-SOI PDs. Both types of PDs show responsivities as high as 1.0 A/W at 1.55 µm, while the dark leakage current is different, which is consistent with previous reports on free-space PDs formed on bulk Si wafers. The dark current of the p+-Ge/i-Ge/n+-SOI PDs is higher by more than one order of magnitude. Taking into account the activation energies for dark current as well as the dependence on PD area, the dark current of the n+-Ge/i-Ge/p+-SOI PDs is dominated by the thermal generation of carriers via mid-gap defect levels in Ge, while for the p+-Ge/i-Ge/n+-SOI PDs, the dark current is ascribed to not only thermal generation but also other mechanisms such as locally formed conduction paths.

Future Automotive Systems Technology Simulator (FASTSim)

Energy Technology Data Exchange (ETDEWEB)

2018-04-11

An advanced vehicle powertrain systems analysis tool, the Future Automotive Systems Technology Simulator (FASTSim) provides a simple way to compare powertrains and estimate the impact of technology improvements on light-, medium- and heavy-duty vehicle efficiency, performance, cost, and battery life. Created by the National Renewable Energy Laboratory, FASTSim accommodates a range of vehicle types - including conventional vehicles, electric-drive vehicles, and fuel cell vehicles - and is available for free download in Microsoft Excel and Python formats.

Trends in the use of digital technology for control and regulation of power supplies

International Nuclear Information System (INIS)

Carwardine, J.; Lenkszus, F.

1999-01-01

Since the availability of computers, accelerator power supplies have relied on digital technology in some way, from such simple tasks as turning the supplies on and off to the supplying of computer-controlled references. However, advances in digital technology, both in performance and cost, allow considerably more than simple control and monitoring. This, coupled with increasing demand for higher performance and monitoring capabilities, has made it appealing to integrate such technology into power supply designs. This paper will review current trends in the use of such advanced technology as embedded DSP controllers, and the application of real-time algorithms to the regulation and control of power supplies for accelerators and other large-scale physics applications

The Effects of Computer-Assisted Instruction of Simple Circuits on Experimental Process Skills

Directory of Open Access Journals (Sweden)

Şeyma ULUKÖK

2013-01-01

Full Text Available The experimental and control groups were composed of 30 sophomores majoring in Classroom Teaching for this study investigating the effects of computer-assisted instruction of simple circuits on the development of experimental process skills. The instruction includes experiments and studies about simple circuits and its elements (serial, parallel, and mixed conncetions of resistors covered in Science and Technology Laboratory II course curriculum. In this study where quantitative and qualitative methods were used together, the control list developed by the researchers was used to collect data. Results showed that experimental process skills of sophomores in experimental group were more developed than that of those in control group. Thus, it can be said that computer-assisted instruction has a positive impact on the development of experimental process skills of students.

Optical signal processing by silicon photonics

CERN Document Server

Ahmed, Jameel; Adeel, Freeha; Hussain, Ashiq

2014-01-01

The main objective of this book is to make respective graduate students understand the nonlinear effects inside SOI waveguide and possible applications of SOI waveguides in this emerging research area of optical fibre communication. This book focuses on achieving successful optical frequency shifting by Four Wave Mixing (FWM) in silicon-on-insulator (SOI) waveguide by exploiting a nonlinear phenomenon.

CMOS Compatible SOI MESFETs for Radiation Hardened DC-to-DC Converters, Phase I

Data.gov (United States)

National Aeronautics and Space Administration — We have developed a novel metal-semiconductor field-effect-transistor (MESFET) technology suitable for extreme environment electronics. The MESFET technology is...

Uniting Evidence-Based Evaluation with the ACGME Plastic Surgery Milestones: A Simple and Reliable Assessment of Resident Operative Performance.

Science.gov (United States)

Kobraei, Edward M; Bohnen, Jordan D; George, Brian C; Mullen, John T; Lillemoe, Keith D; Austen, William G; Liao, Eric C

2016-08-01

Milestones evaluations in plastic surgery reflect a shift toward competency-based training but have created a number of challenges. The authors have incorporated the smartphone application evaluation tool, System for Improving and Measuring Procedural Learning (SIMPL), that was recently developed by a multi-institutional research collaborative. In this pilot study, the authors hypothesize that SIMPL can improve resident evaluation and also collect granular performance data to simplify compliance with the plastic surgery Milestones. SIMPL was prospectively piloted with a plastic surgery resident and faculty surgeon at Massachusetts General Hospital in this institutional review board-approved study. The study period was a 2-month interval corresponding to the resident's rotation. The resident-faculty combination performed 20 cases together. All cases were evaluated with SIMPL. SIMPL evaluations uniformly took under 1 minute to submit. The average time to completed evaluation from surgery completion was 5 hours (technology will support a shared vocabulary between residents and faculty to enhance intraoperative education.

Ecrire et s'écrire en prison

OpenAIRE

Lionel Rebout

2010-01-01

Dans cette contribution, j’entendrai l’écriture de soi au sens de la subjectivité, c’est-à-dire un rapport à soi nécessairement recomposé et remis en cause dans le champ carcéral, cadre décontenançant par la force des choses et source d’une souffrance originale dans la vie d’un homme. Et j’entendrai l’écriture de soi dans ses rapports à l’écriture en tant que technique, pratique de l’intime pour approcher, saisir, questionner l’autre écriture, celle de soi. Ainsi j’interrogerai la prison lors...

Simulaci??n y modelado de transistores MOS de doble puerta

OpenAIRE

Cartujo Cassinello, Pedro

2000-01-01

En este trabajo se hace un estudio del transistor MOS de doble puerta analizando las posibles ventajas de esta nueva estructura frene al transistor convencional y el transistor MOS SOI de puerta simple. Para ello se ha analizado una secci??n transversal de un transistor MOS de doble puerta de canal N, con el fin de examinar detalladamente las peculiaridades de la distribuci??n de electrones con una amplia variedad de valores de todos los par??mentros tecnol??gicos y condiciones de operaci??n,...

Simple prostatectomy

Science.gov (United States)

... Han M, Partin AW. Simple prostatectomy: open and robot-assisted laparoscopic approaches. In: Wein AJ, Kavoussi LR, ... M. is also a founding member of Hi-Ethics and subscribes to the principles of the Health ...

A simple magic cup to inject excitement and curiosity in physics

Science.gov (United States)

Amir, Nazir

2018-05-01

This article highlights a simple demonstration kit that can be easily fabricated in Design & Technology (D&T) workshops to inject excitement and curiosity into students’ learning of physics concepts such as density and optics. Using an ice cream cup from a fast food restaurant and a transparent circular acrylic piece, students can be guided to make a ‘magic’ cup, while at the same time get inquisitive about the physics behind the magic. The project highlights a way of linking physics to D&T in a feasible manner which can motivate and engage students.

Sociosexuality from Argentina to Zimbabwe: a 48-nation study of sex, culture, and strategies of human mating.

Science.gov (United States)

Schmitt, David P

2005-04-01

The Sociosexual Orientation Inventory (SOI; Simpson & Gangestad 1991) is a self-report measure of individual differences in human mating strategies. Low SOI scores signify that a person is sociosexually restricted, or follows a more monogamous mating strategy. High SOI scores indicate that an individual is unrestricted, or has a more promiscuous mating strategy. As part of the International Sexuality Description Project (ISDP), the SOI was translated from English into 25 additional languages and administered to a total sample of 14,059 people across 48 nations. Responses to the SOI were used to address four main issues. First, the psychometric properties of the SOI were examined in cross-cultural perspective. The SOI possessed adequate reliability and validity both within and across a diverse range of modem cultures. Second, theories concerning the systematic distribution of sociosexuality across cultures were evaluated. Both operational sex ratios and reproductively demanding environments related in evolutionary-predicted ways to national levels of sociosexuality. Third, sex differences in sociosexuality were generally large and demonstrated cross-cultural universality across the 48 nations of the ISDP, confirming several evolutionary theories of human mating. Fourth, sex differences in sociosexuality were significantly larger when reproductive environments were demanding but were reduced to more moderate levels in cultures with more political and economic gender equality. Implications for evolutionary and social role theories of human sexuality are discussed.

Factors Influencing Information and Communication Technology ...

African Journals Online (AJOL)

Information and communication technology (ICT) is a veritable tool for sustainable agricultural development in Nigeria. This paper analyzed the factors that influenced ICT use by women research scientists in the Universities of Agriculture in Nigeria. Simple random sampling technique was used to select 40 respondents per ...

A Simple Synthesis of an N-Doped Carbon ORR Catalyst: Hierarchical Micro/Meso/Macro Porosity and Graphitic Shells

NARCIS (Netherlands)

Eisenberg, D.; Stroek, W.; Geels, N.J.; Sandu, C.S.; Heller, A.; Yan, N.; Rothenberg, G.

2016-01-01

Replacing platinum as an oxygen reduction catalyst is an important scientific and technological challenge. Herein we report a simple synthesis of a complex carbon with very good oxygen reduction reaction (ORR) activity at pH 13. Pyrolysis of magnesium nitrilotriacetate yields a carbon with

Simple extraction-solvothermal synthesis of single-crystalline silver microplates

Energy Technology Data Exchange (ETDEWEB)

You, Ting; Sun, Sixiu; Song, Xinyu; Xu, Shuling [Department of Chemistry and Chemical Engineering, Shandong University (China)

2009-08-15

Single-crystalline silver microplates, with average edge length of about 1.5{mu}m and thickness of 100 nm, have been synthesized by a simple extraction-solvothermal method. Samples were characterized in detail by X-ray diffraction (XRD), field-emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM) and High-resolution transmission electron microscopy (HRTEM) technologies. Extractant primary amine N1923 can also act as reducing agent. It has been found that microstructure of the silver can be controlled by the n-octanol during the solvothermal treatment. Based on a series of experimental analysis, the possible formation mechanism of these microplates was discussed briefly. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

A new spin-functional MOSFET based on magnetic tunnel junction technology: pseudo-spin-MOSFET

OpenAIRE

Shuto, Yusuke; Nakane, Ryosho; Wang, Wenhong; Sukegawa, Hiroaki; Yamamoto, Shuu'ichirou; Tanaka, Masaaki; Inomata, Koichiro; Sugahara, Satoshi

2009-01-01

We fabricated and characterized a new spin-functional MOSFET referred to as a pseudo-spin-MOSFET (PS-MOSFET). The PS-MOSFET is a circuit using an ordinary MOSFET and magnetic tunnel junction (MTJ) for reproducing functions of spin-transistors. Device integration techniques for a bottom gate MOSFET using a silicon-on-insulator (SOI) substrate and for an MTJ with a full-Heusler alloy electrode and MgO tunnel barrier were developed. The fabricated PS-MOSFET exhibited high and low transconductanc...

Droids Made Simple

CERN Document Server

Mazo, Gary

2011-01-01

If you have a Droid series smartphone - Droid, Droid X, Droid 2, or Droid 2 Global - and are eager to get the most out of your device, Droids Made Simple is perfect for you. Authors Martin Trautschold, Gary Mazo and Marziah Karch guide you through all of the features, tips, and tricks using their proven combination of clear instructions and detailed visuals. With hundreds of annotated screenshots and step-by-step directions, Droids Made Simple will transform you into a Droid expert, improving your productivity, and most importantly, helping you take advantage of all of the cool features that c

Association "Les Simples"

OpenAIRE

Thouzery, Michel

2014-01-01

Fondée par les producteurs du Syndicat Inter-Massifs pour la Production et l’Économie des Simples (S.I.M.P.L.E.S), l’association base son action sur la recherche et le maintien d’une production de qualité (herboristerie et préparations à base de plantes) qui prend en compte le respect de l’environnement et la pérennité des petits producteurs en zone de montagne. Actions de formation Stages de découverte de la flore médicinale sauvage, Stages de culture et transformation des plantes médicinale...

Computational Study of Stratified Combustion in an Optical Diesel Engine

KAUST Repository

Jaasim, Mohammed

2017-03-28

Full cycle simulations of KAUST optical diesel engine were conducted in order to provide insights into the details of fuel spray, mixing, and combustion characteristics at different start of injection (SOI) conditions. Although optical diagnostics provide valuable information, the high fidelity simulations with matched parametric conditions improve fundamental understanding of relevant physical and chemical processes by accessing additional observables such as the local mixture distribution, intermediate species concentrations, and detailed chemical reaction rates. Commercial software, CONVERGE™, was used as the main simulation tool, with the Reynolds averaged Navier-Stokes (RANS) turbulence model and the multi-zone (SAGE) combustion model to compute the chemical reaction terms. SOI is varied from late compression ignition (CI) to early partially premixed combustion (PPC) conditions. The simulation results revealed a stronger correlation between fuel injection timing and combustion phasing for late SOI conditions, whereas the combustion phasing starts to decouple from SOI for early SOI cases. The predictions are consistent with the experimental observations, in terms of the overall trends in combustion and emission characteristics, while the high fidelity simulations provided further insights into the effects of mixture stratifications resulting from different SOI conditions.

Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

Science.gov (United States)

Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

2001-01-01

A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

Silicon-on-insulator-based polarization-independent 1×3 broadband beam splitter with adiabatic coupling

Science.gov (United States)

Gong, Yuanhao; Liu, Lei; Chang, Limin; Li, Zhiyong; Tan, Manqing; Yu, Yude

2017-10-01

We propose and numerically simulate a polarization-independent 1×3 broadband beam splitter based on silicon-on-insulator (SOI) technology with adiabatic coupling. The designed structure is simulated by beam-propagation-method (BPM) and gets simulated transmission uniformity of three outputs better than 0.3dB for TE-polarization and 0.8dB for TM-polarization in a broadband of 180nm.

DC Characterization of Different Advanced MOSFET Architectures

International Nuclear Information System (INIS)

Jomaah, J.; Fadlallah, M.; Ghibaudo, G.

2011-01-01

A review of recent results concerning the DC characterization of FD- and Double Gate SOI MOSFET's and FinFETs in modern CMOS technologies is given. By proper extraction techniques, distinction between the different interaction mechanisms is done. Parameter extraction conducted at room and low temperature clearly indicates that the mobility is directly impacted by shrinking the gate length in sub 100nm architectures. (author)

Increased carrier lifetimes in epitaxial silicon layers on buried silicon nitride produced by ion implantation

International Nuclear Information System (INIS)

Skorupa, W.; Kreissig, U.; Hensel, E.; Bartsch, H.

1984-01-01

Carrier lifetimes were measured in epitaxial silicon layers deposited on buried silicon nitride produced by high-dose nitrogen implantation at 330 keV. The values were in the range 20-200 μs. The results are remarkable taking into account the high density of crystal defects in the epitaxial layers. Comparing with other SOI technologies the measured lifetimes are higher by 1-2 orders of magnitude. (author)

Design of Wireless Point of Sale Based on ZigBee Technology

Directory of Open Access Journals (Sweden)

Xiaoning Jiang

2014-02-01

Full Text Available With the rapid development of Point of Sale technology and modern communication technology, financial Point of Sale terminal system has been started from wired to wireless. Wireless payment technology can used where can’t rely on or even no cable network. As one of the most important technologies in the information era, Wireless Sensor Network has been widely used in banking business and other various modem business fields. This paper describes a kind of simple portable Point of Sale terminal based on the ZigBee wireless network 1, which is a low power, low cost, flexible, safe and reliable network. This Point of Sale system can be applied gas stations, liquefied petroleum gas stations and other complex sales environment, and it improves safety of gas station and personnel safety. Simple and user-friendly, this formula design and optimization method greatly improves efficiency and thus has much value for practical application.

Le tourisme gay : aller ailleurs pour être soi-même ?

Directory of Open Access Journals (Sweden)

Emmanuel Jaurand

2010-02-01

Full Text Available L’orientation dominante des études sur le tourisme, longtemps marquées par l’importance de la dimension économique et par un désintérêt pour les questions touchant au corps, au sexe ou au genre, explique le silence autour du tourisme gay (qui n’est pas le tourisme des gays jusqu’aux années 1990. Pourtant, ce tourisme identitaire existe depuis longtemps et sa visibilité se développe, surtout dans les pays développés occidentaux. La métaphore du voyage et la recherche du paradis (sexuel perdu sont au cœur de l’identité homosexuelle depuis le 19 e siècle. Le tourisme gay se caractérise par des structures (tour-opérateurs, hébergements, croisières… et des destinations spécifiques. Pour les gays il s’agit, dans l’espace-temps des vacances, propice au relâchement et à la recréation de soi, de fuir un monde structuré par le système hétérosexiste et de rejoindre les autres (gays. La recherche de la rencontre du semblable et la sexualisation assumée du tourisme gay, à travers la libération et la dénudation des corps, participent d’une véritable quête pour valider son identité de gay. Elles font que les destinations préférées par les gays sont les stations balnéaires et les grandes villes : elles sont en effet dotées d’espaces publics, d’équipements commerciaux et de formes d’hébergement fermées favorables aux interactions et à la réalisation d’une éphémère « communauté gay ». The mainstream orientation of tourism studies, focused on the sole economic dimension for a long time, without any interest for questions about the body, sex or gender, explains the silence surrounding gay tourism (which is not the tourism of gay men since the 1990s. However, this identity tourism has existed for a long time and its visibility is growing, especially in Western developed countries. The metaphor of the journey and the search for a (sexual paradise lost have been at the core of the

Collaborative Middle School Geometry through Blogs and Other Web 2.0 Technologies

Science.gov (United States)

Hossain, Mokter; Wiest, Lynda R.

2013-01-01

This paper explores the use of blogs, a simple application of Web 2.0 technologies, in middle school geometry instruction. Specifically, it provides an overview of the interactive features of Web 2.0 technologies and the feasibility of using Web 2.0 technologies in geometry teaching and learning, as well as a proposed model for creating a…

Effects of spin–orbit coupling and many-body correlations in STM transport through copper phthalocyanine

Directory of Open Access Journals (Sweden)

Benjamin Siegert

2015-12-01

Full Text Available The interplay of exchange correlations and spin–orbit interaction (SOI on the many-body spectrum of a copper phtalocyanine (CuPc molecule and their signatures in transport are investigated. We first derive a minimal model Hamiltonian in a basis of frontier orbitals that is able to reproduce experimentally observed singlet–triplet splittings. In a second step SOI effects are included perturbatively. Major consequences of the SOI are the splitting of former degenerate levels and a magnetic anisotropy, which can be captured by an effective low-energy spin Hamiltonian. We show that scanning tunneling microscopy-based magnetoconductance measurements can yield clear signatures of both these SOI-induced effects.

A Fabrication Technique for Nano-gap Electrodes by Atomic Force Microscopy Nano lithography

International Nuclear Information System (INIS)

Jalal Rouhi; Shahrom Mahmud; Hutagalung, S.D.; Kakooei, S.

2011-01-01

A simple technique is introduced for fabrication of nano-gap electrodes by using nano-oxidation atomic force microscopy (AFM) lithography with a Cr/ Pt coated silicon tip. AFM local anodic oxidation was performed on silicon-on-insulator (SOI) surfaces by optimization of desired conditions to control process in contact mode. Silicon electrodes with gaps of sub 31 nm were fabricated by nano-oxidation method. This technique which is simple, controllable, inexpensive and fast is capable of fabricating nano-gap structures. The current-voltage measurements (I-V) of the electrodes demonstrated very good insulating characteristics. The results show that silicon electrodes have a great potential for fabrication of single molecule transistors (SMT), single electron transistors (SET) and the other nano electronic devices. (author)

Emerging heterogeneous integrated photonic platforms on silicon

Directory of Open Access Journals (Sweden)

Fathpour Sasan

2015-05-01

Full Text Available Silicon photonics has been established as a mature and promising technology for optoelectronic integrated circuits, mostly based on the silicon-on-insulator (SOI waveguide platform. However, not all optical functionalities can be satisfactorily achieved merely based on silicon, in general, and on the SOI platform, in particular. Long-known shortcomings of silicon-based integrated photonics are optical absorption (in the telecommunication wavelengths and feasibility of electrically-injected lasers (at least at room temperature. More recently, high two-photon and free-carrier absorptions required at high optical intensities for third-order optical nonlinear effects, inherent lack of second-order optical nonlinearity, low extinction ratio of modulators based on the free-carrier plasma effect, and the loss of the buried oxide layer of the SOI waveguides at mid-infrared wavelengths have been recognized as other shortcomings. Accordingly, several novel waveguide platforms have been developing to address these shortcomings of the SOI platform. Most of these emerging platforms are based on heterogeneous integration of other material systems on silicon substrates, and in some cases silicon is integrated on other substrates. Germanium and its binary alloys with silicon, III–V compound semiconductors, silicon nitride, tantalum pentoxide and other high-index dielectric or glass materials, as well as lithium niobate are some of the materials heterogeneously integrated on silicon substrates. The materials are typically integrated by a variety of epitaxial growth, bonding, ion implantation and slicing, etch back, spin-on-glass or other techniques. These wide range of efforts are reviewed here holistically to stress that there is no pure silicon or even group IV photonics per se. Rather, the future of the field of integrated photonics appears to be one of heterogenization, where a variety of different materials and waveguide platforms will be used for

Lightning rod: a simple and low cost experiment for eletrostatics

Directory of Open Access Journals (Sweden)

Carlos Eduardo Laburú

2008-09-01

Full Text Available With the objective of contributing to make significant the scientific learning, this work suggests a simple and low-cost experiment to demonstrate electrostatics knowledge studied in High School. The experimental proposal has yet the concern of focusing the content, linking it to daily technological elements. Doing that, and due to the practical interest it can arouse in student, we presented the operation of an idealized Lightning Rod to apply in electrostatics school knowledge and to show that the same one can have an important day by day usefulness and it cannot be a turned off abstraction or distant from the reality.

Fabrication of a Paper-Based Microfluidic Device to Readily Determine Nitrite Ion Concentration by Simple Colorimetric Assay

Science.gov (United States)

Wang, Bo; Lin, Zhiqiang; Wang, Min

2015-01-01

Paper-based microfluidic devices (µPAD) are a burgeoning platform of microfluidic analysis technology. The method described herein is for use in undergraduate and high school chemistry laboratories. A simple and convenient µPAD was fabricated by easy patterning of filter paper using a permanent marker pen. The usefulness of the device was…

Análisis en tiempo-frecuencia de la conexión entre la atmósfera y el océano Pacífico tropical

Directory of Open Access Journals (Sweden)

Ana Laura Berman

2011-12-01

Full Text Available En este trabajo son exploradas las relaciones entre el Indice de Oscilación Sur (SOI y la temperatura de la superficie del mar (TSM tanto del Pacifico tropical como de la región subtropical del Pacífico Sur para las diferentes bandas del espacio de tiempo-frecuencia mediante la transformada de ondeleta (transformada wavelet. En el Pacífico tropical central, los resultados muestran que el conocido sistema acoplado El Niño-Oscilación Sur (ENOS caracterizado por simultáneas anomalías positivas (negativas del SOI y negativas (positivas de la TSM ocurre en todo el espacio de frecuencias. Sin embargo, estas relaciones significativas con el SOI se interrumpen en el océano tropical oeste en oscilaciones alrededor de 8 años cerca del destacado cambio climático de 1976/77. En las periodicidades más largas, el SOI tiene una débil relación con las áreas del océano tropical oeste y no tiene conexión con las regiones del este. Los índices de TSM subtropical exhiben relaciones complejas con el SOI. Estas son significativas pero no estacionarias con la TSM de la región del oeste, con la región central son detectadas solo estrechas conexiones en específicas periodicidades y en la región este prácticamente desaparecen.El análisis de series reconstruidas para periodos pre-instrumental revela que las esporádicas desconexiones entre el SOI y el Pacifico tropical fueron comunes durante los últimos siglos.Relations between the Southern Oscillation Index (SOI and the sea surface temperature (SST in the tropical and subtropical South Pacific are explored in this paper for different bands of the time-frequency space using the wavelet transform. In the tropical central Pacific, results show that the widely know coupled system El Niño-Southern Oscillation (ENSO characterized by simultaneous positive (negative SOI anomalies and negative (positive SST anomalies occurs in the entire range of frequency. However, these significant links with the SOI

The impact of global warming on the Southern Oscillation Index

Energy Technology Data Exchange (ETDEWEB)

Power, Scott B.; Kociuba, Greg [Bureau of Meteorology, Centre for Australian Weather and Climate Research, Melbourne (Australia)

2011-11-15

The Southern Oscillation Index (SOI) - a measure of air pressure difference across the Pacific Ocean, from Tahiti in the south-east to Darwin in the west - is one of the world's most important climatic indices. The SOI is used to track and predict changes in both the El Nino-Southern Oscillation phenomenon, and the Walker Circulation (WC). During El Nino, for example, the WC weakens and the SOI tends to be negative. Climatic variations linked to changes in the WC have a profound influence on climate, ecosystems, agriculture, and societies in many parts of the world. Previous research has shown that (1) the WC and the SOI weakened in recent decades and that (2) the WC in climate models tends to weaken in response to elevated atmospheric greenhouse gas concentrations. Here we examine changes in the SOI and air pressure across the Pacific in the observations and in numerous WCRP/CMIP3 climate model integrations for both the 20th and 21st centuries. The difference in mean-sea level air pressure (MSLP) between the eastern and western equatorial Pacific tends to weaken during the 21st century, consistent with previous research. Here we show that this primarily arises because of an increase in MSLP in the west Pacific and not a decline in the east. We also show, in stark contrast to expectations, that the SOI actually tends to increase during the 21st century, not decrease. Under global warming MSLP tends to increase at both Darwin and Tahiti, but tends to rise more at Tahiti than at Darwin. Tahiti lies in an extensive region where MSLP tends to rise in response to global warming. So while the SOI is an excellent indicator of interannual variability in both the equatorial MSLP gradient and the WC, it is a highly misleading indicator of long-term equatorial changes linked to global warming. Our results also indicate that the observed decline in the SOI in recent decades has been driven by natural, internally generated variability. The externally forced signal in the

Simulación y modelado de transistores MOS de doble puerta

OpenAIRE

Cartujo Cassinello, Pedro

2013-01-01

En este trabajo se hace un estudio del transistor MOS de doble puerta analizando las posibles ventajas de esta nueva estructura frene al transistor convencional y el transistor MOS SOI de puerta simple. Para ello se ha analizado una sección transversal de un transistor MOS de doble puerta de canal N, con el fin de examinar detalladamente las peculiaridades de la distribución de electrones con una amplia variedad de valores de todos los parámentros tecnológicos y condiciones de operación, y se...

Using simple wind-diesel systems without energy storage to obtain high penetration and market acceptance in the near future

International Nuclear Information System (INIS)

Lundsager, P.; Sherwin, R.W. Jr.

1991-01-01

A wind/diesel hybrid power system combines wind energy technology with diesel generation to provide continous AC electrical power with reduced fuel consumption. The objectives of this paper are to summarize the reasoning behind the simple Wind-Diesel system concept using low or negative load operation of the diesels, including the diesel backdrive technique proposed by Atlantic Orient, and to outline a strategy within an international framework to make simple Wind-Diesel systems with standard induction generator wind turbines commercially available and accepted by the market. (au) (11 refs.)

Reconstructing Nearly Simple Polytopes from their Graph

OpenAIRE

Doolittle, Joseph

2017-01-01

We present a partial description of which polytopes are reconstructible from their graphs. This is an extension of work by Blind and Mani (1987) and Kalai (1988), which showed that simple polytopes can be reconstructed from their graphs. In particular, we introduce a notion of $h$-nearly simple and prove that 1-nearly simple and 2-nearly simple polytopes are reconstructible from their graphs. We also give an example of a 3-nearly simple polytope which is not reconstructible from its graph. Fu...

Home and Away: The Use of Institutional and Non-Institutional Technologies to Support Learning and Teaching

Science.gov (United States)

Flavin, Michael

2016-01-01

This paper examines the usage of institutional and non-institutional technologies to support learning and teaching in UK higher education. Previous work on disruptive technology and disruptive innovation has argued that users prefer simple and convenient technologies, and often repurpose technologies from designers' intentions; this paper…

A simple approach to estimate soil organic carbon and soil co/sub 2/ emission

International Nuclear Information System (INIS)

Abbas, F.

2013-01-01

SOC (Soil Organic Carbon) and soil CO/sub 2/ (Carbon Dioxide) emission are among the indicator of carbon sequestration and hence global climate change. Researchers in developed countries benefit from advance technologies to estimate C (Carbon) sequestration. However, access to the latest technologies has always been challenging in developing countries to conduct such estimates. This paper presents a simple and comprehensive approach for estimating SOC and soil CO/sub 2/ emission from arable- and forest soils. The approach includes various protocols that can be followed in laboratories of the research organizations or academic institutions equipped with basic research instruments and technology. The protocols involve soil sampling, sample analysis for selected properties, and the use of a worldwide tested Rothamsted carbon turnover model. With this approach, it is possible to quantify SOC and soil CO/sub 2/ emission over short- and long-term basis for global climate change assessment studies. (author)

Electromagnetic forming - a potentially viable technique for accelerator technology

International Nuclear Information System (INIS)

Rajawat, R.K.; Desai, S.V.; Kulkarni, M.R.; Dolly Rani; Nagesh, K.V.; Sethi, R.C.

2003-01-01

Modern day accelerator development encompasses a myriad technologies required for their diverse needs. Whereas RF, high voltage, vacuum, cryogenics etc., technologies meet their functional requirements, high finish lapping processes, ceramic-metal joining, oven brazing, spark erosion or wire cutting etc., are a must to meet their fabrication requirements. Electromagnetic (EM) forming technique falls in the latter category and is developed as a special technology. It is currently catering to the development as a nuclear reactor technology, but has the potential to meet accelerator requirements too. This paper highlights the general principle of its working, simple design guidelines, advantages, and suggests some specific areas where this could benefit accelerator technologies

Factors Influencing the Integration of Technology by Community College Adjunct Faculty

Science.gov (United States)

Paver, Jonathan David

2012-01-01

This research examined the factors that predict intention to integrate technology into instruction by community college adjunct faculty. For this study the integration of technology was defined as beyond simple occasional use, within the next academic year. The decomposed theory of planned behavior was tested for its predictive ability with this…

Alternative method for the quantitative determination of Rashba- and Dresselhaus spin–orbit interaction using the magnetization

International Nuclear Information System (INIS)

Wilde, M A; Grundler, D

2013-01-01

The quantum oscillatory magnetization M of a two-dimensional electron system in a magnetic field B is found to provide quantitative information on both the Rashba- and Dresselhaus spin–orbit interaction (SOI). This is shown by first numerically solving the model Hamiltonian including the linear Rashba- and Dresselhaus SOI and the Zeeman term in particular in a doubly tilted magnetic field and second evaluating the intrinsically anisotropic magnetization for different directions of the in-plane magnetic field component. The amplitude of specific magnetic quantum oscillations in M(B) is found to be a direct measure of the SOI strength at fields B where SOI-induced Landau level anticrossings occur. The anisotropic M allows one to quantify the magnitude of both contributions as well as their relative sign. The influence of cubic Dresselhaus SOI on the results is discussed. We use realistic sample parameters and show that recently reported experimental techniques provide a sensitivity which allows for the detection of the predicted phenomena. (paper)

The Design of SimpleITK

Directory of Open Access Journals (Sweden)

Bradley Christopher Lowekamp

2013-12-01

Full Text Available SimpleITK is a new interface to the Insight Segmentation andRegistration Toolkit (ITK designed to facilitate rapid prototyping, educationand scientific activities, via high level programminglanguages. ITK is a templated C++ library of image processingalgorithms and frameworks for biomedical and other applications, andit was designed to be generic, flexible and extensible. Initially, ITKprovided a direct wrapping interface to languages such as Python andTcl through the WrapITK system. Unlike WrapITK, which exposed ITK'scomplex templated interface, SimpleITK was designed to provide an easyto use and simplified interface to ITK's algorithms. It includesprocedural methods, hides ITK's demand driven pipeline, and provides atemplate-less layer. Also SimpleITK provides practical conveniencessuch as binary distribution packages and overloaded operators. Ouruser-friendly design goals dictated a departure from the directinterface wrapping approach of WrapITK, towards a new facadeclass structure that only exposes the required functionality, hidingITK's extensive template use. Internally SimpleITK utilizes a manualdescription of each filter with code-generation and advanced C++meta-programming to provide the higher-level interface, bringing thecapabilities of ITK to a wider audience. SimpleITK is licensed asopen source software under the Apache License Version 2.0 and more informationabout downloading it can be found at http://www.simpleitk.org.

Pseudo-simple heteroclinic cycles in R4

Science.gov (United States)

Chossat, Pascal; Lohse, Alexander; Podvigina, Olga

2018-06-01

We study pseudo-simple heteroclinic cycles for a Γ-equivariant system in R4 with finite Γ ⊂ O(4) , and their nearby dynamics. In particular, in a first step towards a full classification - analogous to that which exists already for the class of simple cycles - we identify all finite subgroups of O(4) admitting pseudo-simple cycles. To this end we introduce a constructive method to build equivariant dynamical systems possessing a robust heteroclinic cycle. Extending a previous study we also investigate the existence of periodic orbits close to a pseudo-simple cycle, which depends on the symmetry groups of equilibria in the cycle. Moreover, we identify subgroups Γ ⊂ O(4) , Γ ⊄ SO(4) , admitting fragmentarily asymptotically stable pseudo-simple heteroclinic cycles. (It has been previously shown that for Γ ⊂ SO(4) pseudo-simple cycles generically are completely unstable.) Finally, we study a generalized heteroclinic cycle, which involves a pseudo-simple cycle as a subset.

Two simple tools for industrial OR

Directory of Open Access Journals (Sweden)

K. Sandrock

2003-12-01

Full Text Available At the 1985 Annual Congress of the South African Production & Inventory Control Society it was pointed out that the productivity growth rate for South Africa is completely out of kilter with that for the western industrialised nations. The latter all display positive rates (some as high as that of Japan whereas the rate for South Africa is - NEGATIVE. Partly as a result of this situation, more and more attention is being given to quality control and reliability engineering by our industrialists in their attempts to improve productivity. This is going hand in hand with the introduction of better techniques and better use of the latest technology. We should also give attention to analytical tools that may be used in a simple inexpensive way to improve our methods of analysing industrial data, and in this way to improve our performance at little or no additional cost. To this end two tools are discussed. They are by means new. But it does seem as though they could be more widely applied in the industrial milieu.

SSIART: Opening the Way to Wireless Sensor Networks On-Board Spacecraft with an Inter-Agency Research Environment

Science.gov (United States)

Gunes-Lasnet, Sev; Dufour, Jean-Francois

2012-08-01

The potential uses and benefits of wireless technologies in space are very broad. Since many years the CCSDS SOIS wireless working group has worked at the identification of key applications for which wireless would bring benefits, and at supporting the deployment of wireless in space thanks to documents, in particular a Green informative book and magenta books presenting recommended practices.The Smart Sensor Inter-Agency Research Test bench (SSIART) is being designed to provide the space Agencies and the Industry with a reference smart sensor platform to test wireless sensor technologies in reference representative applications and RF propagation environments, while promoting these technologies at the same time.

Characteristics of biosolids from sludge treatment wetlands for agricultural reuse

DEFF Research Database (Denmark)

Uggetti, Enrica; Ferrer, Ivet; Nielsen, Steen

2012-01-01

Sludge treatment wetlands (STW) consist of constructed wetlands systems specifically developed for sludge treatment over the last decades. Sludge dewatering and stabilisation are the main features of this technology, leading to a final product which may be recycled as an organic fertiliser or soi...... legal limits for land application of the sludge. Our results suggest that biosolids from the studied STW can be valorised in agriculture, especially as soil conditioner....

Advanced CMOS Radiation Effects Testing and Analysis

Science.gov (United States)

Pellish, J. A.; Marshall, P. W.; Rodbell, K. P.; Gordon, M. S.; LaBel, K. A.; Schwank, J. R.; Dodds, N. A.; Castaneda, C. M.; Berg, M. D.; Kim, H. S.;

Group IV Materials for High Performance Methane Sensing in Novel Slot Optical Waveguides at 2.883 μm and 3.39 μm

Directory of Open Access Journals (Sweden)

Vittorio M. N. PASSARO

2012-03-01

Full Text Available In this paper a detailed investigation of novel photonic sensors based on slot waveguides has been carried out. Appropriate alloys of group IV materials, such as germanium (Ge, silicon (Si, carbon (C and tin (Sn, are applied in silicon-on-insulator (SOI technology for homogeneous optical sensing at 2.883 µm and 3.39 μm. Electronic and optical properties of group IV alloys have been investigated. In addition, we have designed novel group IV vertical slot waveguides in order to achieve ultra-high sensitivities, as well as good fabrication tolerances. All these features have been compared with well-known SOI slot waveguides for optical label-free homogeneous sensing at 1.55 µm. In conclusion, theoretical investigation of ring resonators based on these novel slot waveguides has revealed very good results in terms of ultra high sensing performance of methane gas, i.e., limit of detection ~ 3.6×10-5 RIU and wavelength sensitivity > 2×103 nm/RIU.

The use of assistive technology in the everyday lives of young people living with dementia and their caregivers. Can a simple remote control make a difference?

Science.gov (United States)

Jentoft, Rita; Holthe, Torhild; Arntzen, Cathrine

2014-12-01

This study was a part of a larger study exploring the impact of assistive technology on the lives of young people living with dementia (YPD). This paper focuses on one of the most useful devices, the simple remote control (SRC). The objective was to explore the reason why the SRC is significant and beneficial in the everyday lives of YPD and their caregivers. This qualitative longitudinal study had a participatory design. Eight participants received an SRC. The range for using it was 0-15 months. In-depth interviews and observations were conducted at baseline and repeated every third month up to 18 months. A situated learning approach was used in the analysis to provide a deeper understanding of the significance and use of SRC. Young people having dementia spend a substantial amount of time alone. Watching television was reported to be important, but handling remote controls was challenging and created a variety of problems. YPD learned to use SRC, which made important differences in the everyday lives of all family members. Comprehensive support from caregivers and professionals was important for YPD in the learning process. The SRC was deemed a success because it solved challenges regarding the use of television in everyday lives of families. The design was recognizable and user-friendly, thus allowing YPD to learn its operation. Access to professional support and advice regarding assistive technology is vital for establishing a system for follow-up and continued collaboration to make future adaptations and adjustments.

Climate policies and learning by doing: Impacts and timing of technology subsidies

International Nuclear Information System (INIS)

Kverndokk, Snorre; Rosendahl, Knut Einar

2007-01-01

We study the role of technology subsidies in climate policies, using a simple dynamic equilibrium model with learning by doing. The optimal subsidy rate of a carbon-free technology is high when the technology is first adopted, but falls significantly over the next decades. However, the efficiency costs of uniform instead of optimal subsidies, may be low if there are adjustment costs for a new technology. Finally, supporting existing energy technologies only, may lead to technology lock-in, and the impacts of lock-in increase with the learning potential of new technologies as well as the possibilities for early entry. (author)

Clusters in simple fluids

International Nuclear Information System (INIS)

Sator, N.

2003-01-01

This article concerns the correspondence between thermodynamics and the morphology of simple fluids in terms of clusters. Definitions of clusters providing a geometric interpretation of the liquid-gas phase transition are reviewed with an eye to establishing their physical relevance. The author emphasizes their main features and basic hypotheses, and shows how these definitions lead to a recent approach based on self-bound clusters. Although theoretical, this tutorial review is also addressed to readers interested in experimental aspects of clustering in simple fluids

Practical Packaging Technology for Microfluidic Systems

International Nuclear Information System (INIS)

Lee, Hwan Yong; Han, Song I; Han, Ki Ho

2010-01-01

This paper presents the technology for the design, fabrication, and characterization of a microfluidic system interface (MSI): the purpose of this technology is to enable the integration of complex microfluidic systems. The MSI technology can be applied in a simple manner for realizing complex arrangements of microfluidic interconnects, integrated microvalves for fluid control, and optical windows for on-chip optical processes. A microfluidic system for the preparation of genetic samples was used as the test vehicle to prove the effectiveness of the MSI technology for packaging complex microfluidic systems with multiple functionalities. The miniaturized genetic sample preparation system comprised several functional compartments, including compartments for cell purification, cell separation, cell lysis, solid-phase DNA extraction, polymerase chain reaction, and capillary electrophoresis. Additionally, the functional operation of the solid-phase extraction and PCR thermocycling compartments was demonstrated by using the MSI

Simple indicator to identify the environmental soundness of growth of consumption and technology: "eco-velocity of consumption".

Science.gov (United States)

Nansai, Keisuke; Kagawa, Shigemi; Suh, Sangwon; Inaba, Rokuta; Moriguchi, Yuichi

2007-02-15

Today's material welfare has been achieved at the expense of consumption of finite resources and generation of environmental burdens. Over the past few decades the volume of global consumption has grown dramatically, while at the same time technological advances have enabled products with greater efficiencies. These two directions of change, consumption growth and technological advance, are the foci of the present paper. Using quantitative measures for these two factors, we define a new indicator, "eco-velocity of consumption", analogous to velocity in physics. The indicator not only identifies the environmental soundness of consumption growth and technological advance but also indicates whether and to what extent our society is shifting toward sustainable consumption. This study demonstrates the practicability of the indicator through a case study in which we calculate the eco-velocities of Japanese household consumption in 2 years: 1995 and 2000. The rate of technological advance during the periods concerned is quantified in terms of the embodied carbon dioxide emission per yen of product. The results show that the current growth rate of Japanese household consumption is greater than the rate of technological advance to mitigate carbon dioxide emissions. The eco-velocities at the level of individual commodity groups are also examined, and the sources of changes in eco-velocity for each commodity are identified using structural decomposition analysis.

Complexity is simple!

Science.gov (United States)

Cottrell, William; Montero, Miguel

2018-02-01

In this note we investigate the role of Lloyd's computational bound in holographic complexity. Our goal is to translate the assumptions behind Lloyd's proof into the bulk language. In particular, we discuss the distinction between orthogonalizing and `simple' gates and argue that these notions are useful for diagnosing holographic complexity. We show that large black holes constructed from series circuits necessarily employ simple gates, and thus do not satisfy Lloyd's assumptions. We also estimate the degree of parallel processing required in this case for elementary gates to orthogonalize. Finally, we show that for small black holes at fixed chemical potential, the orthogonalization condition is satisfied near the phase transition, supporting a possible argument for the Weak Gravity Conjecture first advocated in [1].

Disruptive Technologies: A Credible Threat to Leading Programs in Continuing Medical Education?

Science.gov (United States)

Christensen, Clayton M.; Armstrong, Elizabeth G.

1998-01-01

Disruptive technologies are simple convenient innovations that have triggered failures of some well-managed companies. They may threaten continuing medical-education programs so focused on leading-edge technology they lose sight of the very different educational needs of growing numbers of health care providers, who are turning to consultants, the…

NASA/ESTO investments in remote sensing technologies (Conference Presentation)

Science.gov (United States)

Babu, Sachidananda R.

2017-02-01

For more then 18 years NASA Earth Science Technology Office has been investing in remote sensing technologies. During this period ESTO has invested in more then 900 tasks. These tasks are managed under multiple programs like Instrument Incubator Program (IIP), Advanced Component Technology (ACT), Advanced Information Systems Technology (AIST), In-Space Validation of Earth Science Technologies (InVEST), Sustainable Land Imaging - Technology (SLI-T) and others. This covers the whole spectrum of technologies from component to full up satellite in space and software. Over the years many of these technologies have been infused into space missions like Aquarius, SMAP, CYGNSS, SWOT, TEMPO and others. Over the years ESTO is actively investing in Infrared sensor technologies for space applications. Recent investments have been for SLI-T and InVEST program. On these tasks technology development is from simple Bolometers to Advanced Photonic waveguide based spectrometers. Some of the details on these missions and technologies will be presented.

ESTO Investments in Innovative Sensor Technologies for Remote Sensing

Science.gov (United States)

Babu, Sachidananda R.

2017-01-01

For more then 18 years NASA Earth Science Technology Office has been investing in remote sensing technologies. During this period ESTO has invested in more then 900 tasks. These tasks are managed under multiple programs like Instrument Incubator Program (IIP), Advanced Component Technology (ACT), Advanced Information Systems Technology (AIST), In-Space Validation of Earth Science Technologies (InVEST), Sustainable Land Imaging - Technology (SLI-T) and others. This covers the whole spectrum of technologies from component to full up satellite in space and software. Over the years many of these technologies have been infused into space missions like Aquarius, SMAP, CYGNSS, SWOT, TEMPO and others. Over the years ESTO is actively investing in Infrared sensor technologies for space applications. Recent investments have been for SLI-T and InVEST program. On these tasks technology development is from simple Bolometers to Advanced Photonic waveguide based spectrometers. Some of the details on these missions and technologies will be presented.

Interfacial spin-orbit splitting and current-driven spin torque in anisotropic tunnel junctions

KAUST Repository

Manchon, Aurelien

2011-05-17

Spin transport in magnetic tunnel junctions comprising a single magnetic layer in the presence of interfacial spin-orbit interaction (SOI) is investigated theoretically. Due to the presence of interfacial SOI, a current-driven spin torque can be generated at the second order in SOI, even in the absence of an external spin polarizer. This torque possesses two components, one in plane and one perpendicular to the plane of rotation, that can induce either current-driven magnetization switching from an in-plane to out-of-plane configuration or magnetization precessions, similar to spin transfer torque in spin valves. Consequently, it appears that it is possible to control the magnetization steady state and dynamics by either varying the bias voltage or electrically modifying the SOI at the interface.

Detection and Control of Spin-Orbit Interactions in a GaAs Hole Quantum Point Contact

Science.gov (United States)

Srinivasan, A.; Miserev, D. S.; Hudson, K. L.; Klochan, O.; Muraki, K.; Hirayama, Y.; Reuter, D.; Wieck, A. D.; Sushkov, O. P.; Hamilton, A. R.

2017-04-01

We investigate the relationship between the Zeeman interaction and the inversion-asymmetry-induced spin-orbit interactions (Rashba and Dresselhaus SOIs) in GaAs hole quantum point contacts. The presence of a strong SOI results in the crossing and anticrossing of adjacent spin-split hole subbands in a magnetic field. We demonstrate theoretically and experimentally that the anticrossing energy gap depends on the interplay between the SOI terms and the highly anisotropic hole g tensor and that this interplay can be tuned by selecting the crystal axis along which the current and magnetic field are aligned. Our results constitute the independent detection and control of the Dresselhaus and Rashba SOIs in hole systems, which could be of importance for spintronics and quantum information applications.

Anisotropic spin transport affected by competition between spin orbit interaction and Zeeman effect in an InGaAs based wire

International Nuclear Information System (INIS)

Nitta, Junsaku; Moulis, Sylvain; Kohda, Makoto

2011-01-01

Spin transport affected by competition between Zeeman effect and spin-orbit interaction (SOI) is investigated in order to check a proposed method to deduce the Rashba SOI α and Dresselhaus SOI β ratio. The experimentally obtained ratio α/β of the present sample is about 4 from angle dependence of magnetoconductance under in-plane magnetic field. The proposed method to detect the ratio by transport measurement is promising although further improvement of sample fabrication and measurement is required.

Participatory Design & Health Information Technology

DEFF Research Database (Denmark)

Health Information Technology (HIT) continues to increase in importance as a component of healthcare provision, but designing HIT is complex. The creation of cooperative learning processes for future HIT users is not a simple task. The importance of engaging end users such as health professionals......, in collaboration with a wide range of people, a broad repertoire of methods and techniques to apply PD within multiple domains has been established. This book, Participatory Design & Health Information Technology, presents the contributions of researchers from 5 countries, who share their experience and insights......, patients and relatives in the design process is widely acknowledged, and Participatory Design (PD) is the primary discipline for directly involving people in the technological design process. Exploring the application of PD in HIT is crucial to all those involved in engaging end users in HIT design and...

Investigation of piezoresistive effect in p-channel metal–oxide–semiconductor field-effect transistors fabricated on circular silicon-on-insulator diaphragms using cost-effective minimal-fab process

Science.gov (United States)

Liu, Yongxun; Tanaka, Hiroyuki; Umeyama, Norio; Koga, Kazuhiro; Khumpuang, Sommawan; Nagao, Masayoshi; Matsukawa, Takashi; Hara, Shiro

2018-06-01

P-channel metal–oxide–semiconductor field-effect transistors (PMOSFETs) with the 〈110〉 or 〈100〉 channel direction have been successfully fabricated on circular silicon-on-insulator (SOI) diaphragms using a cost-effective minimal-fab process, and their electrical characteristics have been systematically investigated before and after the SOI diaphragm formation. It was found that almost the same subthreshold slope (S-slope) and threshold voltage (V t) are observed in the fabricated PMOSFETs before and after the SOI diaphragm formation, and they are independent of the channel direction. On the other hand, significant variations in drain current were observed in the fabricated PMOSFETs with the 〈110〉 channel direction after the SOI diaphragm formation owing to the residual mechanical stress-induced piezoresistive effect. It was also confirmed that electrical characteristics of the fabricated PMOSFETs with the 〈100〉 channel direction are almost the same before and after the SOI diaphragm formation, i.e., not sensitive to the mechanical stress. Moreover, the drain current variations at different directions of mechanical stress and current flow were systematically investigated and discussed.

Classical emergence of intrinsic spin-orbit interaction of light at the nanoscale

Science.gov (United States)

Vázquez-Lozano, J. Enrique; Martínez, Alejandro

2018-03-01

Traditionally, in macroscopic geometrical optics intrinsic polarization and spatial degrees of freedom of light can be treated independently. However, at the subwavelength scale these properties appear to be coupled together, giving rise to the spin-orbit interaction (SOI) of light. In this work we address theoretically the classical emergence of the optical SOI at the nanoscale. By means of a full-vector analysis involving spherical vector waves we show that the spin-orbit factorizability condition, accounting for the mutual influence between the amplitude (spin) and phase (orbit), is fulfilled only in the far-field limit. On the other side, in the near-field region, an additional relative phase introduces an extra term that hinders the factorization and reveals an intricate dynamical behavior according to the SOI regime. As a result, we find a suitable theoretical framework able to capture analytically the main features of intrinsic SOI of light. Besides allowing for a better understanding into the mechanism leading to its classical emergence at the nanoscale, our approach may be useful to design experimental setups that enhance the response of SOI-based effects.

Technology and its ethics in nursing and caring journals: An integrative literature review.

Science.gov (United States)

Korhonen, Eila-Sisko; Nordman, Tina; Eriksson, Katie

2015-08-01

Over the past 20 years, the impact of technology has increased significantly in health care. The diversity of technology is growing and its knowledge scattered. The concept of technology is ambiguous in caring and nursing sciences and its ethics remains unidentified. To find evidence on how the concept of technology and its ethics are defined in caring and nursing sciences and practice. The purpose of this study is to describe and summarize the concept of technology and its ethics in the past nursing and caring literature. The integrative literature review of the past nursing and caring literature. The data were collected from caring and nursing journal articles from 2000 to 2013 focusing on technology and its ethics.The results were summarized and themed. Technology as a concept has three implications. First, technology is devices and products, including ICT and advanced, simple and assistive technology. Second, technology refers to a process consisting of methods for helping people. Third, technology as a service indicates the production of care by technology. The ethics of technology has not been established as a guiding principle. Some studies excluded ethical reflection completely. Many studies discussed the ethics of technology as benefits such as improved communication and symptoms management, and the simple use of e-health services whilst others remained critical presenting ethical problems such as unwillingness and the inability to use technology, or conflicts with human aspects or questions of inequality. In conclusion, this study indicates that technology as a concept is described diversely. The relation between technology and ethics is not a truism. Despite some evidence, more is needed to promote ethical care when using technology. © The Author(s) 2014.

Synthesis of highly integrated optical network based on microdisk-resonator add-drop filters in silicon-on-insulator technology

Science.gov (United States)

Kaźmierczak, Andrzej; Dortu, Fabian; Giannone, Domenico; Bogaerts, Wim; Drouard, Emmanuel; Rojo-Romeo, Pedro; Gaffiot, Frederic

2009-10-01

We analyze a highly compact optical add-drop filter topology based on a pair of microdisk resonators and a bus waveguide intersection. The filter is further assessed on an integrated optical 4×4 network for optical on-chip communication. The proposed network structure, as compact as 50×50 μm, is fabricated in a CMOS-compatible process on a silicon-on-insulator (SOI) substrate. Finally, the experimental results demonstrate the proper operation of the fabricated devices.

Implementation of NFC technology for industrial applications: case flexible production

Science.gov (United States)

Sallinen, Mikko; Strömmer, Esko; Ylisaukko-oja, Arto

2007-09-01

Near Field communication (NFC) technology enables a flexible short range communication. It has large amount of envisaged applications in consumer, welfare and industrial sector. Compared with other short range communication technologies such as Bluetooth or Wibree it provides advantages that we will introduce in this paper. In this paper, we present an example of applying NFC technology to industrial application where simple tasks can be automatized and industrial assembly process can be improved radically by replacing manual paperwork and increasing trace of the products during the production.

Market penetration of energy supply technologies

Science.gov (United States)

Condap, R. J.

1980-03-01

Techniques to incorporate the concepts of profit-induced growth and risk aversion into policy-oriented optimization models of the domestic energy sector are examined. After reviewing the pertinent market penetration literature, simple mathematical programs in which the introduction of new energy technologies is constrained primarily by the reinvestment of profits are formulated. The main results involve the convergence behavior of technology production levels under various assumptions about the form of the energy demand function. Next, profitability growth constraints are embedded in a full-scale model of U.S. energy-economy interactions. A rapidly convergent algorithm is developed to utilize optimal shadow prices in the computation of profitability for individual technologies. Allowance is made for additional policy variables such as government funding and taxation. The result is an optimal deployment schedule for current and future energy technologies which is consistent with the sector's ability to finance capacity expansion.

Simulations for Making On-farm Decisions in Relation to ENSO in Semi-arid Areas, South Africa

Science.gov (United States)

Tesfuhuney, W. A.; Crespo, O. O.; Walker, S. S.; Steyn, S. A.

2017-12-01

The study was employed to investigate and improve on-farm decision making on planting dates and fertilization by relating simulated yield and seasonal outlook information. The Agricultural Production Systems SIMulator model (APSIM) was used to explore ENSO/SOI effects for small-scale farmers to represent weather conditions and soil forms of semi-arid areas of Bothaville, Bethlehem and Bloemfontein regions in South Africa. The relationships of rainfall and SOI anomalies indicate a positive correlation, signifies ENSO/SOI as seasonal outlooks for study areas. Model evaluation results showed higher degree of bias (RMSEs/RMSE value of 0.88-0.98). The D-index of agreement in the range 0.61-0.71 indicate the ability of the APSIM-Maize model is an adequate tool in evaluating relative changes in maize yield in relation to various management practices and seasonal variations. During rainy, La Niño years (SOI > +5), highest simulated yields were found for Bethlehem in November with addition of 100 - 150 kg ha-1 N fertilization and up to 50 kg ha-1 for both Bothaville and Bloemfontein. With respect to various levels of fertilization, the dry El Niño years (SOI risk for dryland farming in semi-arid regions. Key word: Semi-arid; APSIM; SOI; El Niño / La Niña; On-farm Decisions

8 CFR 293.3 - Simple interest table.

Science.gov (United States)

2010-01-01

... 8 Aliens and Nationality 1 2010-01-01 2010-01-01 false Simple interest table. 293.3 Section 293.3 Aliens and Nationality DEPARTMENT OF HOMELAND SECURITY IMMIGRATION REGULATIONS DEPOSIT OF AND INTEREST ON CASH RECEIVED TO SECURE IMMIGRATION BONDS § 293.3 Simple interest table. Following is a simple interest...

Integrated MEMS-based variable optical attenuator and 10Gb/s receiver

Science.gov (United States)

Aberson, James; Cusin, Pierre; Fettig, H.; Hickey, Ryan; Wylde, James

2005-03-01

MEMS devices can be successfully commercialized in favour of competing technologies only if they offer an advantage to the customer in terms of lower cost or increased functionality. There are limited markets where MEMS can be manufactured cheaper than similar technologies due to large volumes: automotive, printing technology, wireless communications, etc. However, success in the marketplace can also be realized by adding significant value to a system at minimal cost or leverging MEMS technology when other solutions simply will not work. This paper describes a thermally actuated, MEMS based, variable optical attenuator that is co-packaged with existing opto-electronic devices to develop an integrated 10Gb/s SONET/SDH receiver. The configuration of the receiver opto-electronics and relatively low voltage availability (12V max) in optical systems bar the use of LCD, EO, and electro-chromic style attenuators. The device was designed and fabricated using a silicon-on-insulator (SOI) starting material. The design and performance of the device (displacement, power consumption, reliability, physical geometry) was defined by the receiver parameters geometry. This paper will describe how these design parameters (hence final device geometry) were determined in light of both the MEMS device fabrication process and the receiver performance. Reference will be made to the design tools used and the design flow which was a joint effort between the MEMS vendor and the end customer. The SOI technology offered a robust, manufacturable solution that gave the required performance in a cost-effective process. However, the singulation of the devices required the development of a new singulation technique that allowed large volumes of silicon to be removed during fabrication yet still offer high singulation yields.

Teacher Readiness to Integrate Information Technology into ...

African Journals Online (AJOL)

... of simple percentage and frequency calculation. The results revealed that majority of the teachers have low level of knowledge about IT. In the same vein, majority of teachers in the schools in this study did not have adequate IT skills. However, the teachers have positive attitude toward the use of information technology.

Focused ion beam scan routine, dwell time and dose optimizations for submicrometre period planar photonic crystal components and stamps in silicon

International Nuclear Information System (INIS)

Hopman, Wico C L; Ay, Feridun; Hu, Wenbin; Gadgil, Vishwas J; Kuipers, Laurens; Pollnau, Markus; Ridder, Rene M de

2007-01-01

Focused ion beam (FIB) milling is receiving increasing attention for nanostructuring in silicon (Si). These structures can for example be used for photonic crystal structures in a silicon-on-insulator (SOI) configuration or for moulds which can have various applications in combination with imprint technologies. However, FIB fabrication of submicrometre holes having perfectly vertical sidewalls is still challenging due to the redeposition effect in Si. In this study we show how the scan routine of the ion beam can be used as a sidewall optimization parameter. The experiments have been performed in Si and SOI. Furthermore, we show that sidewall angles as small as 1.5 0 are possible in Si membranes using a spiral scan method. We investigate the effect of the dose, loop number and dwell time on the sidewall angle, interhole milling and total milling depth by studying the milling of single and multiple holes into a crystal. We show that the sidewall angles can be as small as 5 0 in (bulk) Si and SOI when applying a larger dose. Finally, we found that a relatively large dwell time of 1 ms and a small loop number is favourable for obtaining vertical sidewalls. By comparing the results with those obtained by others, we conclude that the number of loops at a fixed dose per hole is the parameter that determines the sidewall angle and not the dwell time by itself

Optimization of Nonlinear Figure-of-Merits of Integrated Power MOSFETs in Partial SOI Process

DEFF Research Database (Denmark)

Fan, Lin; Jørgensen, Ivan Harald Holger; Knott, Arnold

2016-01-01

State-of-the-art power semiconductor industry uses figure-of-merits (FOMs) for technology-to-technology and/or device-to-device comparisons. However, the existing FOMs are fundamentally nonlinear due to the nonlinearities of the parameters such as the gate charge and the output charge versus...

Wastewater stabilization ponds - an appropriate technology for sewage treatment and refuse

International Nuclear Information System (INIS)

Aziz, J.A.

1999-01-01

Treatment of wastewater is imperative to protect human health and environmental quality. To this effect, the chosen technology should be cost effective, simple and easy to operate and maintain. Wastewater stabilization ponds offer one such technology and their use should be promoted in countries with scarcity of water so as to reuse the treated effluents in irrigation. Long term, pilot scale investigations on the performance of wastewater stabilization ponds have been undertaken at the Institute of Environmental Engineering and Research, Lahore to develop design criteria for their local use. This paper discuss the types and operation of waste stabilization ponds and the extent of their application in Pakistan. The need for users' education for effective operation of this simple facility is also emphasized. (author)

Excel 2010 Made Simple

CERN Document Server

Katz, Abbott

2011-01-01

Get the most out of Excel 2010 with Excel 2010 Made Simple - learn the key features, understand what's new, and utilize dozens of time-saving tips and tricks to get your job done. Over 500 screen visuals and clear-cut instructions guide you through the features of Excel 2010, from formulas and charts to navigating around a worksheet and understanding Visual Basic for Applications (VBA) and macros. Excel 2010 Made Simple takes a practical and highly effective approach to using Excel 2010, showing you the best way to complete your most common spreadsheet tasks. You'll learn how to input, format,

Thermal stability of simple tetragonal and hexagonal diamond germanium

Science.gov (United States)

Huston, L. Q.; Johnson, B. C.; Haberl, B.; Wong, S.; Williams, J. S.; Bradby, J. E.

2017-11-01

Exotic phases of germanium, that form under high pressure but persist under ambient conditions, are of technological interest due to their unique optical and electrical properties. The thermal evolution and stability of two of these exotic Ge phases, the simple tetragonal (st12) and hexagonal diamond (hd) phases, are investigated in detail. These metastable phases, formed by high pressure decompression in either a diamond anvil cell or by nanoindentation, are annealed at temperatures ranging from 280 to 320 °C for st12-Ge and 200 to 550 °C for hd-Ge. In both cases, the exotic phases originated from entirely pure Ge precursor materials. Raman microspectroscopy is used to monitor the phase changes ex situ following annealing. Our results show that hd-Ge synthesized via a pure form of a-Ge first undergoes a subtle change in structure and then an irreversible phase transformation to dc-Ge with an activation energy of (4.3 ± 0.2) eV at higher temperatures. St12-Ge was found to transform to dc-Ge with an activation energy of (1.44 ± 0.08) eV. Taken together with results from previous studies, this study allows for intriguing comparisons with silicon and suggests promising technological applications.

Acceptance and introduction of disruptive technologies - simple steps to build a fully functional pulmonary valved stent.

Science.gov (United States)

Huber, Christoph H; Marty, Bettina; von Segesser, Ludwig K

2007-08-01

Valved stents are new land for cardiac surgeons even though they are being used more frequently by interventional disciplines. This paper presents simple steps to build a patient-specific pulmonary valved stent and its delivery device. The design concept was tested by random participants at a med-tech meeting. The valved stent is constructed by linking an endoprosthetic graft with a valved-jugular-vein. The delivery device is made from a modified 5-ml syringe. Of 72 participants, 66 (92%) built and 60 participants implanted the device successfully into the targeted pulmonary position via a trans-infundibular access.

A simple method for rapidly processing HEU from weapons returns

Energy Technology Data Exchange (ETDEWEB)

McLean, W. II; Miller, P.E.

1994-01-01

A method based on the use of a high temperature fluidized bed for rapidly oxidizing, homogenizing and down-blending Highly Enriched Uranium (HEU) from dismantled nuclear weapons is presented. This technology directly addresses many of the most important issues that inhibit progress in international commerce in HEU; viz., transaction verification, materials accountability, transportation and environmental safety. The equipment used to carry out the oxidation and blending is simple, inexpensive and highly portable. Mobile facilities to be used for point-of-sale blending and analysis of the product material are presented along with a phased implementation plan that addresses the conversion of HEU derived from domestic weapons and related waste streams as well as material from possible foreign sources such as South Africa or the former Soviet Union.