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Sample records for silicon monolithic integrated

  1. A monolithically integrated detector-preamplifier on high-resistivity silicon

    International Nuclear Information System (INIS)

    Holland, S.; Spieler, H.

    1990-02-01

    A monolithically integrated detector-preamplifier on high-resistivity silicon has been designed, fabricated and characterized. The detector is a fully depleted p-i-n diode and the preamplifier is implemented in a depletion-mode PMOS process which is compatible with detector processing. The amplifier is internally compensated and the measured gain-bandwidth product is 30 MHz with an input-referred noise of 15 nV/√Hz in the white noise regime. Measurements with an Am 241 radiation source yield an equivalent input noise charge of 800 electrons at 200 ns shaping time for a 1.4 mm 2 detector with on-chip amplifier in an experimental setup with substantial external pickup

  2. Monolithic nanoscale photonics-electronics integration in silicon and other group IV elements

    CERN Document Server

    Radamson, Henry

    2014-01-01

    Silicon technology is evolving rapidly, particularly in board-to-board or chip-to chip applications. Increasingly, the electronic parts of silicon technology will carry out the data processing, while the photonic parts take care of the data communication. For the first time, this book describes the merging of photonics and electronics in silicon and other group IV elements. It presents the challenges, the limitations, and the upcoming possibilities of these developments. The book describes the evolution of CMOS integrated electronics, status and development, and the fundamentals of silicon p

  3. A monolithic silicon detector telescope

    International Nuclear Information System (INIS)

    Cardella, G.; Amorini, F.; Cabibbo, M.; Di Pietro, A.; Fallica, G.; Franzo, G.; Figuera, P.; Papa, M.; Pappalardo, G.; Percolla, G.; Priolo, F.; Privitera, V.; Rizzo, F.; Tudisco, S.

    1996-01-01

    An ultrathin silicon detector (1 μm) thick implanted on a standard 400 μm Si-detector has been built to realize a monolithic telescope detector for simultaneous charge and energy determination of charged particles. The performances of the telescope have been tested using standard alpha sources and fragments emitted in nuclear reactions with different projectile-target colliding systems. An excellent charge resolution has been obtained for low energy (less than 5 MeV) light nuclei. A multi-array lay-out of such detectors is under construction to charge identify the particles emitted in reactions induced by low energy radioactive beams. (orig.)

  4. Imaging monolithic silicon detector telescopes

    International Nuclear Information System (INIS)

    Amorini, F.; Sipala, V.; Cardella, G.; Boiano, C.; Carbone, B.; Cosentino, L.; Costa, E.; Di Pietro, A.; Emanuele, U.; Fallica, G.; Figuera, P.; Finocchiaro, P.; La Guidara, E.; Marchetta, C.; Pappalardo, A.; Piazza, A.; Randazzo, N.; Rizzo, F.; Russo, G.V.; Russotto, P.

    2008-01-01

    We show the results of some test beams performed on a new monolithic strip silicon detector telescope developed in collaboration with the INFN and ST-microelectronics. Using an appropriate design, the induction on the ΔE stages, generated by the charge released in the E stage, was used to obtain the position of the detected particle. The position measurement, together with the low threshold for particle charge identification, allows the new detector to be used for a large variety of applications due to its sensitivity of only a few microns measured in both directions

  5. Large current MOSFET on photonic silicon-on-insulator wafers and its monolithic integration with a thermo-optic 2 × 2 Mach-Zehnder switch.

    Science.gov (United States)

    Cong, G W; Matsukawa, T; Chiba, T; Tadokoro, H; Yanagihara, M; Ohno, M; Kawashima, H; Kuwatsuka, H; Igarashi, Y; Masahara, M; Ishikawa, H

    2013-03-25

    n-channel body-tied partially depleted metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated for large current applications on a silicon-on-insulator wafer with photonics-oriented specifications. The MOSFET can drive an electrical current as large as 20 mA. We monolithically integrated this MOSFET with a 2 × 2 Mach-Zehnder interferometer optical switch having thermo-optic phase shifters. The static and dynamic performances of the integrated device are experimentally evaluated.

  6. Imaging and chemical surface analysis of biomolecular functionalization of monolithically integrated on silicon Mach-Zehnder interferometric immunosensors

    International Nuclear Information System (INIS)

    Gajos, Katarzyna; Angelopoulou, Michailia; Petrou, Panagiota; Awsiuk, Kamil; Kakabakos, Sotirios; Haasnoot, Willem; Bernasik, Andrzej; Rysz, Jakub; Marzec, Mateusz M.; Misiakos, Konstantinos; Raptis, Ioannis; Budkowski, Andrzej

    2016-01-01

    Highlights: • Optimization of probe immobilization with robotic spotter printing overlapping spots. • In-situ inspection of microstructured surfaces of biosensors integrated on silicon. • Imaging and chemical analysis of immobilization, surface blocking and immunoreaction. • Insight with molecular discrimination into step-by-step sensor surface modifications. • Optimized biofunctionalization improves sensor sensitivity and response repeatability. - Abstract: Time-of-flight secondary ion mass spectrometry (imaging, micro-analysis) has been employed to evaluate biofunctionalization of the sensing arm areas of Mach-Zehnder interferometers monolithically integrated on silicon chips for the immunochemical (competitive) detection of bovine κ-casein in goat milk. Biosensor surfaces are examined after: modification with (3-aminopropyl)triethoxysilane, application of multiple overlapping spots of κ-casein solutions, blocking with 100-times diluted goat milk, and reaction with monoclonal mouse anti-κ-casein antibodies in blocking solution. The areas spotted with κ-casein solutions of different concentrations are examined and optimum concentration providing homogeneous coverage is determined. Coverage of biosensor surfaces with biomolecules after each of the sequential steps employed in immunodetection is also evaluated with TOF-SIMS, supplemented by Atomic force microscopy and X-ray photoelectron spectroscopy. Uniform molecular distributions are observed on the sensing arm areas after spotting with optimum κ-casein concentration, blocking and immunoreaction. The corresponding biomolecular compositions are determined with a Principal Component Analysis that distinguished between protein amino acids and milk glycerides, as well as between amino acids characteristic for Mabs and κ-casein, respectively. Use of the optimum conditions (κ-casein concentration) for functionalization of chips with arrays of ten Mach-Zehnder interferometers provided on-chips assays

  7. Imaging and chemical surface analysis of biomolecular functionalization of monolithically integrated on silicon Mach-Zehnder interferometric immunosensors

    Energy Technology Data Exchange (ETDEWEB)

    Gajos, Katarzyna, E-mail: kasia.fornal@uj.edu.pl [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland); Angelopoulou, Michailia; Petrou, Panagiota [Institute of Nuclear & Radiological Sciences & Technology, Energy & Safety, NCSR Demokritos, P. Grigoriou & Neapoleos St, Aghia Paraksevi 15310, Athens (Greece); Awsiuk, Kamil [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland); Kakabakos, Sotirios [Institute of Nuclear & Radiological Sciences & Technology, Energy & Safety, NCSR Demokritos, P. Grigoriou & Neapoleos St, Aghia Paraksevi 15310, Athens (Greece); Haasnoot, Willem [RIKILT Wageningen UR, Akkermaalsbos 2, 6708 WB Wageningen (Netherlands); Bernasik, Andrzej [Faculty of Physics and Applied Computer Science, AGH University of Science and Technology, Mickiewicza 30, 30-059 Kraków (Poland); Academic Centre for Materials and Nanotechnology, AGH University of Science and Technology, Mickiewicza 30, 30-059 Kraków (Poland); Rysz, Jakub [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland); Marzec, Mateusz M. [Academic Centre for Materials and Nanotechnology, AGH University of Science and Technology, Mickiewicza 30, 30-059 Kraków (Poland); Misiakos, Konstantinos; Raptis, Ioannis [Department of Microelectronics, Institute of Nanoscience and Nanotechnology, NCSR Demokritos, P. Grigoriou & Neapoleos St, Aghia Paraksevi 15310, Athens (Greece); Budkowski, Andrzej [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland)

    2016-11-01

    Highlights: • Optimization of probe immobilization with robotic spotter printing overlapping spots. • In-situ inspection of microstructured surfaces of biosensors integrated on silicon. • Imaging and chemical analysis of immobilization, surface blocking and immunoreaction. • Insight with molecular discrimination into step-by-step sensor surface modifications. • Optimized biofunctionalization improves sensor sensitivity and response repeatability. - Abstract: Time-of-flight secondary ion mass spectrometry (imaging, micro-analysis) has been employed to evaluate biofunctionalization of the sensing arm areas of Mach-Zehnder interferometers monolithically integrated on silicon chips for the immunochemical (competitive) detection of bovine κ-casein in goat milk. Biosensor surfaces are examined after: modification with (3-aminopropyl)triethoxysilane, application of multiple overlapping spots of κ-casein solutions, blocking with 100-times diluted goat milk, and reaction with monoclonal mouse anti-κ-casein antibodies in blocking solution. The areas spotted with κ-casein solutions of different concentrations are examined and optimum concentration providing homogeneous coverage is determined. Coverage of biosensor surfaces with biomolecules after each of the sequential steps employed in immunodetection is also evaluated with TOF-SIMS, supplemented by Atomic force microscopy and X-ray photoelectron spectroscopy. Uniform molecular distributions are observed on the sensing arm areas after spotting with optimum κ-casein concentration, blocking and immunoreaction. The corresponding biomolecular compositions are determined with a Principal Component Analysis that distinguished between protein amino acids and milk glycerides, as well as between amino acids characteristic for Mabs and κ-casein, respectively. Use of the optimum conditions (κ-casein concentration) for functionalization of chips with arrays of ten Mach-Zehnder interferometers provided on-chips assays

  8. Monolithic integration of detectors and transistors on high-resistivity silicon

    International Nuclear Information System (INIS)

    Dalla Betta, Gian-Franco; Batignani, Giovanni; Boscardin, Maurizio; Bosisio, Luciano; Gregori, Paolo; Pancheri, Lucio; Piemonte, Claudio; Ratti, Lodovico; Verzellesi, Giovanni; Zorzi, Nicola

    2007-01-01

    We report on the most recent results from an R and D activity aimed at the development of silicon radiation detectors with embedded front-end electronics. The key features of the fabrication technology and the available active devices are described. Selected results from the characterization of transistors and test structures are presented and discussed, and the considered application fields are addressed

  9. Monolithic Chip-Integrated Absorption Spectrometer from 3-5 microns, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — A monolithically integrated indium phosphide (InP) to silicon-on-sapphire (SoS) platform is being proposed for a monolithic portable or handheld spectrometer between...

  10. Monolithic Integrated Ceramic Waveguide Filters

    OpenAIRE

    Hunter, IC; Sandhu, MY

    2014-01-01

    Design techniques for a new class of integrated monolithic high permittivity ceramic waveguide filters are presented. These filters enable a size reduction of 50% compared to air-filled TEM filters with the same unloaded Q-Factor. Designs for both chebyshev and asymmetric generalized chebyshev filter are presented, with experimental results for an 1800 MHz chebyshev filter showing excellent agreement with theory.

  11. Monolithic optoelectronic integrated broadband optical receiver with graphene photodetectors

    Directory of Open Access Journals (Sweden)

    Cheng Chuantong

    2017-07-01

    Full Text Available Optical receivers with potentially high operation bandwidth and low cost have received considerable interest due to rapidly growing data traffic and potential Tb/s optical interconnect requirements. Experimental realization of 65 GHz optical signal detection and 262 GHz intrinsic operation speed reveals the significance role of graphene photodetectors (PDs in optical interconnect domains. In this work, a novel complementary metal oxide semiconductor post-backend process has been developed for integrating graphene PDs onto silicon integrated circuit chips. A prototype monolithic optoelectronic integrated optical receiver has been successfully demonstrated for the first time. Moreover, this is a firstly reported broadband optical receiver benefiting from natural broadband light absorption features of graphene material. This work is a perfect exhibition of the concept of monolithic optoelectronic integration and will pave way to monolithically integrated graphene optoelectronic devices with silicon ICs for three-dimensional optoelectronic integrated circuit chips.

  12. Monolithic optoelectronic integrated broadband optical receiver with graphene photodetectors

    Science.gov (United States)

    Cheng, Chuantong; Huang, Beiju; Mao, Xurui; Zhang, Zanyun; Zhang, Zan; Geng, Zhaoxin; Xue, Ping; Chen, Hongda

    2017-07-01

    Optical receivers with potentially high operation bandwidth and low cost have received considerable interest due to rapidly growing data traffic and potential Tb/s optical interconnect requirements. Experimental realization of 65 GHz optical signal detection and 262 GHz intrinsic operation speed reveals the significance role of graphene photodetectors (PDs) in optical interconnect domains. In this work, a novel complementary metal oxide semiconductor post-backend process has been developed for integrating graphene PDs onto silicon integrated circuit chips. A prototype monolithic optoelectronic integrated optical receiver has been successfully demonstrated for the first time. Moreover, this is a firstly reported broadband optical receiver benefiting from natural broadband light absorption features of graphene material. This work is a perfect exhibition of the concept of monolithic optoelectronic integration and will pave way to monolithically integrated graphene optoelectronic devices with silicon ICs for three-dimensional optoelectronic integrated circuit chips.

  13. Monolithic Perovskite Silicon Tandem Solar Cells with Advanced Optics

    Energy Technology Data Exchange (ETDEWEB)

    Goldschmidt, Jan C.; Bett, Alexander J.; Bivour, Martin; Blasi, Benedikt; Eisenlohr, Johannes; Kohlstadt, Markus; Lee, Seunghun; Mastroianni, Simone; Mundt, Laura; Mundus, Markus; Ndione, Paul; Reichel, Christian; Schubert, Martin; Schulze, Patricia S.; Tucher, Nico; Veit, Clemens; Veurman, Welmoed; Wienands, Karl; Winkler, Kristina; Wurfel, Uli; Glunz, Stefan W.; Hermle, Martin

    2016-11-14

    For high efficiency monolithic perovskite silicon tandem solar cells, we develop low-temperature processes for the perovskite top cell, rear-side light trapping, optimized perovskite growth, transparent contacts and adapted characterization methods.

  14. Neutron spectrometry with a monolithic silicon telescope.

    Science.gov (United States)

    Agosteo, S; D'Angelo, G; Fazzi, A; Para, A Foglio; Pola, A; Zotto, P

    2007-01-01

    A neutron spectrometer was set-up by coupling a polyethylene converter with a monolithic silicon telescope, consisting of a DeltaE and an E stage-detector (about 2 and 500 microm thick, respectively). The detection system was irradiated with monoenergetic neutrons at INFN-Laboratori Nazionali di Legnaro (Legnaro, Italy). The maximum detectable energy, imposed by the thickness of the E stage, is about 8 MeV for the present detector. The scatter plots of the energy deposited in the two stages were acquired using two independent electronic chains. The distributions of the recoil-protons are well-discriminated from those due to secondary electrons for energies above 0.350 MeV. The experimental spectra of the recoil-protons were compared with the results of Monte Carlo simulations using the FLUKA code. An analytical model that takes into account the geometrical structure of the silicon telescope was developed, validated and implemented in an unfolding code. The capability of reproducing continuous neutron spectra was investigated by irradiating the detector with neutrons from a thick beryllium target bombarded with protons. The measured spectra were compared with data taken from the literature. Satisfactory agreement was found.

  15. 10Gbps monolithic silicon FTTH transceiver for PON

    Science.gov (United States)

    Zhang, J.; Liow, T. Y.; Lo, G. Q.; Kwong, D. L.

    2010-05-01

    We propose a new passive optical network (PON) configuration and a novel silicon photonic transceiver architecture for optical network unit (ONU), eliminating the need for an internal laser source in ONU. We adopt dual fiber network configuration. The internal light source in each of the ONUs is eliminated. Instead, an extra seed laser source in the optical line termination (OLT) operates in continuous wave mode to serve the ONUs in the PON as a shared and centralized laser source. λ1 from OLT Tx and λ2 from the seed laser are combined by using a WDM combiner and connected to serve the multiple ONUs through the downstream fibers. The ONUs receive the data in λ1. Meanwhile, the ONUs encode and transmit data in λ2, which are sent back to OLT. The monolithic ONU transceiver contains a wavelength-division-multiplexing (WDM) filter component, a silicon modulator and a Ge photo-detector. The WDM in ONU selectively guides λ1 to the Ge-PD where the data in λ1 are detected and converted to electrical signals, and λ2 to the transmitter where the light is modulated by upstream data. The modulated optical signals in λ2 from ONUs are connected back to OLT through upstream fibers. The monolithic ONU transceiver chip size is only 2mm by 4mm. The crosstalk between the Tx and Rx is measured to be less than -20dB. The transceiver chip is integrated on a SFP+ transceiver board. Both Tx and Rx demonstrated data rate capabilities of up to 10Gbps. By implementing this scheme, the ONU transceiver size can be significantly reduced and the assembly processes will be greatly simplified. The results demonstrate the feasibility of mass manufacturing monolithic silicon ONU transceivers via low cost

  16. Monolithically integrated 8-channel WDM reflective modulator

    NARCIS (Netherlands)

    Stopinski, S.T.; Malinowski, M.; Piramidowicz, R.; Smit, M.K.; Leijtens, X.J.M.

    2013-01-01

    In this work the design and characterization of a monolithically integrated photonic circuit acting as a reflective modulator for eight WDM channels is presented. The chip was designed and fabricated in a generic integration technology

  17. Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

    Science.gov (United States)

    Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

    2015-10-06

    We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

  18. Package Holds Five Monolithic Microwave Integrated Circuits

    Science.gov (United States)

    Mysoor, Narayan R.; Decker, D. Richard; Olson, Hilding M.

    1996-01-01

    Packages protect and hold monolithic microwave integrated circuit (MMIC) chips while providing dc and radio-frequency (RF) electrical connections for chips undergoing development. Required to be compact, lightweight, and rugged. Designed to minimize undesired resonances, reflections, losses, and impedance mismatches.

  19. A CMOS-compatible large-scale monolithic integration of heterogeneous multi-sensors on flexible silicon for IoT applications

    KAUST Repository

    Nassar, Joanna M.

    2017-02-07

    We report CMOS technology enabled fabrication and system level integration of flexible bulk silicon (100) based multi-sensors platform which can simultaneously sense pressure, temperature, strain and humidity under various physical deformations. We also show an advanced wearable version for body vital monitoring which can enable advanced healthcare for IoT applications.

  20. A CMOS-compatible large-scale monolithic integration of heterogeneous multi-sensors on flexible silicon for IoT applications

    KAUST Repository

    Nassar, Joanna M.; Sevilla, Galo T.; Velling, Seneca J.; Cordero, Marlon D.; Hussain, Muhammad Mustafa

    2017-01-01

    We report CMOS technology enabled fabrication and system level integration of flexible bulk silicon (100) based multi-sensors platform which can simultaneously sense pressure, temperature, strain and humidity under various physical deformations. We also show an advanced wearable version for body vital monitoring which can enable advanced healthcare for IoT applications.

  1. A monolithic integrated photonic microwave filter

    Science.gov (United States)

    Fandiño, Javier S.; Muñoz, Pascual; Doménech, David; Capmany, José

    2017-02-01

    Meeting the increasing demand for capacity in wireless networks requires the harnessing of higher regions in the radiofrequency spectrum, reducing cell size, as well as more compact, agile and power-efficient base stations that are capable of smoothly interfacing the radio and fibre segments. Fully functional microwave photonic chips are promising candidates in attempts to meet these goals. In recent years, many integrated microwave photonic chips have been reported in different technologies. To the best of our knowledge, none has monolithically integrated all the main active and passive optoelectronic components. Here, we report the first demonstration of a tunable microwave photonics filter that is monolithically integrated into an indium phosphide chip. The reconfigurable radiofrequency photonic filter includes all the necessary elements (for example, lasers, modulators and photodetectors), and its response can be tuned by means of control electric currents. This is an important step in demonstrating the feasibility of integrated and programmable microwave photonic processors.

  2. Environmentally Benign Production of Stretchable and Robust Superhydrophobic Silicone Monoliths.

    Science.gov (United States)

    Davis, Alexander; Surdo, Salvatore; Caputo, Gianvito; Bayer, Ilker S; Athanassiou, Athanassia

    2018-01-24

    Superhydrophobic materials hold an enormous potential in sectors as important as aerospace, food industries, or biomedicine. Despite this great promise, the lack of environmentally friendly production methods and limited robustness remain the two most pertinent barriers to the scalability, large-area production, and widespread use of superhydrophobic materials. In this work, highly robust superhydrophobic silicone monoliths are produced through a scalable and environmentally friendly emulsion technique. It is first found that stable and surfactantless water-in-polydimethylsiloxane (PDMS) emulsions can be formed through mechanical mixing. Increasing the internal phase fraction of the precursor emulsion is found to increase porosity and microtexture of the final monoliths, rendering them superhydrophobic. Silica nanoparticles can also be dispersed in the aqueous internal phase to create micro/nanotextured monoliths, giving further improvements in superhydrophobicity. Due to the elastomeric nature of PDMS, superhydrophobicity can be maintained even while the material is mechanically strained or compressed. In addition, because of their self-similarity, the monoliths show outstanding robustness to knife-scratch, tape-peel, and finger-wipe tests, as well as rigorous sandpaper abrasion. Superhydrophobicity was also unchanged when exposed to adverse environmental conditions including corrosive solutions, UV light, extreme temperatures, and high-energy droplet impact. Finally, important properties for eventual adoption in real-world applications including self-cleaning, stain-repellence, and blood-repellence are demonstrated.

  3. Improved Optics in Monolithic Perovskite/Silicon Tandem Solar Cells with a Nanocrystalline Silicon Recombination Junction

    KAUST Repository

    Sahli, Florent

    2017-10-09

    Perovskite/silicon tandem solar cells are increasingly recognized as promi­sing candidates for next-generation photovoltaics with performance beyond the single-junction limit at potentially low production costs. Current designs for monolithic tandems rely on transparent conductive oxides as an intermediate recombination layer, which lead to optical losses and reduced shunt resistance. An improved recombination junction based on nanocrystalline silicon layers to mitigate these losses is demonstrated. When employed in monolithic perovskite/silicon heterojunction tandem cells with a planar front side, this junction is found to increase the bottom cell photocurrent by more than 1 mA cm−2. In combination with a cesium-based perovskite top cell, this leads to tandem cell power-conversion efficiencies of up to 22.7% obtained from J–V measurements and steady-state efficiencies of up to 22.0% during maximum power point tracking. Thanks to its low lateral conductivity, the nanocrystalline silicon recombination junction enables upscaling of monolithic perovskite/silicon heterojunction tandem cells, resulting in a 12.96 cm2 monolithic tandem cell with a steady-state efficiency of 18%.

  4. Improved Optics in Monolithic Perovskite/Silicon Tandem Solar Cells with a Nanocrystalline Silicon Recombination Junction

    KAUST Repository

    Sahli, Florent; Kamino, Brett A.; Werner, Jé ré mie; Brä uninger, Matthias; Paviet-Salomon, Bertrand; Barraud, Loris; Monnard, Raphaë l; Seif, Johannes Peter; Tomasi, Andrea; Jeangros, Quentin; Hessler-Wyser, Aï cha; De Wolf, Stefaan; Despeisse, Matthieu; Nicolay, Sylvain; Niesen, Bjoern; Ballif, Christophe

    2017-01-01

    Perovskite/silicon tandem solar cells are increasingly recognized as promi­sing candidates for next-generation photovoltaics with performance beyond the single-junction limit at potentially low production costs. Current designs for monolithic tandems rely on transparent conductive oxides as an intermediate recombination layer, which lead to optical losses and reduced shunt resistance. An improved recombination junction based on nanocrystalline silicon layers to mitigate these losses is demonstrated. When employed in monolithic perovskite/silicon heterojunction tandem cells with a planar front side, this junction is found to increase the bottom cell photocurrent by more than 1 mA cm−2. In combination with a cesium-based perovskite top cell, this leads to tandem cell power-conversion efficiencies of up to 22.7% obtained from J–V measurements and steady-state efficiencies of up to 22.0% during maximum power point tracking. Thanks to its low lateral conductivity, the nanocrystalline silicon recombination junction enables upscaling of monolithic perovskite/silicon heterojunction tandem cells, resulting in a 12.96 cm2 monolithic tandem cell with a steady-state efficiency of 18%.

  5. Development of readout electronics for monolithic integration with diode strip detectors

    International Nuclear Information System (INIS)

    Hosticka, B.J.; Wrede, M.; Zimmer, G.; Kemmer, J.; Hofmann, R.; Lutz, G.

    1984-03-01

    Parallel in - serial out analog readout electronics integrated with silicon strip detectors will bring a reduction of two orders of magnitude in external electronics. The readout concept and the chosen CMOS technology solve the basic problem of low noise and low power requirements. A hybrid solution is an intermediate step towards the final goal of monolithic integration of detector and electronics. (orig.)

  6. Monolithic microwave integrated circuit with integral array antenna

    International Nuclear Information System (INIS)

    Stockton, R.J.; Munson, R.E.

    1984-01-01

    A monolithic microwave integrated circuit including an integral array antenna. The system includes radiating elements, feed network, phasing network, active and/or passive semiconductor devices, digital logic interface circuits and a microcomputer controller simultaneously incorporated on a single substrate by means of a controlled fabrication process sequence

  7. Monolithic integration of SOI waveguide photodetectors and transimpedance amplifiers

    Science.gov (United States)

    Li, Shuxia; Tarr, N. Garry; Ye, Winnie N.

    2018-02-01

    In the absence of commercial foundry technologies offering silicon-on-insulator (SOI) photonics combined with Complementary Metal Oxide Semiconductor (CMOS) transistors, monolithic integration of conventional electronics with SOI photonics is difficult. Here we explore the implementation of lateral bipolar junction transistors (LBJTs) and Junction Field Effect Transistors (JFETs) in a commercial SOI photonics technology lacking MOS devices but offering a variety of n- and p-type ion implants intended to provide waveguide modulators and photodetectors. The fabrication makes use of the commercial Institute of Microelectronics (IME) SOI photonics technology. Based on knowledge of device doping and geometry, simple compact LBJT and JFET device models are developed. These models are then used to design basic transimpedance amplifiers integrated with optical waveguides. The devices' experimental current-voltage characteristics results are reported.

  8. Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

    Science.gov (United States)

    Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

    1987-01-01

    Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

  9. Monolithic amorphous silicon modules on continuous polymer substrate

    Energy Technology Data Exchange (ETDEWEB)

    Grimmer, D.P. (Iowa Thin Film Technologies, Inc., Ames, IA (United States))

    1992-03-01

    This report examines manufacturing monolithic amorphous silicon modules on a continuous polymer substrate. Module production costs can be reduced by increasing module performance, expanding production, and improving and modifying production processes. Material costs can be reduced by developing processes that use a 1-mil polyimide substrate and multilayers of low-cost material for the front encapsulant. Research to speed up a-Si and ZnO deposition rates is needed to improve throughputs. To keep throughput rates compatible with depositions, multibeam fiber optic delivery systems for laser scribing can be used. However, mechanical scribing systems promise even higher throughputs. Tandem cells and production experience can increase device efficiency and stability. Two alternative manufacturing processes are described: (1) wet etching and sheet handling and (2) wet etching and roll-to-roll fabrication.

  10. Monolithic microwave integrated circuit water vapor radiometer

    Science.gov (United States)

    Sukamto, L. M.; Cooley, T. W.; Janssen, M. A.; Parks, G. S.

    1991-01-01

    A proof of concept Monolithic Microwave Integrated Circuit (MMIC) Water Vapor Radiometer (WVR) is under development at the Jet Propulsion Laboratory (JPL). WVR's are used to remotely sense water vapor and cloud liquid water in the atmosphere and are valuable for meteorological applications as well as for determination of signal path delays due to water vapor in the atmosphere. The high cost and large size of existing WVR instruments motivate the development of miniature MMIC WVR's, which have great potential for low cost mass production. The miniaturization of WVR components allows large scale deployment of WVR's for Earth environment and meteorological applications. Small WVR's can also result in improved thermal stability, resulting in improved calibration stability. Described here is the design and fabrication of a 31.4 GHz MMIC radiometer as one channel of a thermally stable WVR as a means of assessing MMIC technology feasibility.

  11. Monolithic integration of a micromachined piezoresistive flow sensor

    International Nuclear Information System (INIS)

    Li, Dan; Zhao, Tao; Yang, Zhenchuan; Zhang, Dacheng

    2010-01-01

    In this paper, a monolithic integrated piezoresistive flow sensor is presented, which was fabricated with an intermediate CMOS (complementary metal-oxide semiconductor) MEMS (micro electro mechanical system) process compatible with integrated pressure sensors. Four symmetrically arranged silicon diaphragms with piezoresistors on them were used to sense the drag force induced by the input gas flow. A signal conditioning CMOS circuit with a temperature compensation module was designed and fabricated simultaneously on the same chip with an increase of the total chip area by only 35%. An extra step of boron implantation and annealing was inserted into the standard CMOS process to form the piezoresistors. KOH anisotropic etching from the backside and deep reactive ion etching (DRIE) from the front side were combined to realize the silicon diaphragms. The integrated flow sensor was packaged and tested. The testing results indicated that the addition of piezoresistor formation and structure releasing did not significantly change any of the circuitry characteristics. The measured sensor output has a quadratic relation with the input flow rate of the fluid as predicted. The tested resolution of the sensor is less than 0.1 L min −1 with a measurement range of 0.1–5 L min −1 and the sensitivity is better than 40 mV per (L min −1 ) with a measurement range of 4–5 L min −1 . The measured noise floor of the sensor is 21.7 µV rtHz −1 .

  12. Integrated silicon optoelectronics

    CERN Document Server

    Zimmermann, Horst

    2000-01-01

    'Integrated Silicon Optoelectronics'assembles optoelectronics and microelectronics The book concentrates on silicon as the major basis of modern semiconductor devices and circuits Starting from the basics of optical emission and absorption and from the device physics of photodetectors, the aspects of the integration of photodetectors in modern bipolar, CMOS, and BiCMOS technologies are discussed Detailed descriptions of fabrication technologies and applications of optoelectronic integrated circuits are included The book, furthermore, contains a review of the state of research on eagerly expected silicon light emitters In order to cover the topic of the book comprehensively, integrated waveguides, gratings, and optoelectronic power devices are included in addition Numerous elaborate illustrations promote an easy comprehension 'Integrated Silicon Optoelectronics'will be of value to engineers, physicists, and scientists in industry and at universities The book is also recommendable for graduate students speciali...

  13. Microwaves integrated circuits: hybrids and monolithics - fabrication technology

    International Nuclear Information System (INIS)

    Cunha Pinto, J.K. da

    1983-01-01

    Several types of microwave integrated circuits are presented together with comments about technologies and fabrication processes; advantages and disadvantages in their utilization are analysed. Basic structures, propagation modes, materials used and major steps in the construction of hybrid thin film and monolithic microwave integrated circuits are described. Important technological applications are revised and main activities of the microelectronics lab. of the University of Sao Paulo (Brazil) in the field of hybrid and monolithic microwave integrated circuits are summarized. (C.L.B.) [pt

  14. Silicon integrated circuit process

    International Nuclear Information System (INIS)

    Lee, Jong Duck

    1985-12-01

    This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

  15. Silicon integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Jong Duck

    1985-12-15

    This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

  16. Silicon hybrid integration

    International Nuclear Information System (INIS)

    Li Xianyao; Yuan Taonu; Shao Shiqian; Shi Zujun; Wang Yi; Yu Yude; Yu Jinzhong

    2011-01-01

    Recently,much attention has concentrated on silicon based photonic integrated circuits (PICs), which provide a cost-effective solution for high speed, wide bandwidth optical interconnection and optical communication.To integrate III-V compounds and germanium semiconductors on silicon substrates,at present there are two kinds of manufacturing methods, i.e., heteroepitaxy and bonding. Low-temperature wafer bonding which can overcome the high growth temperature, lattice mismatch,and incompatibility of thermal expansion coefficients during heteroepitaxy, has offered the possibility for large-scale heterogeneous integration. In this paper, several commonly used bonding methods are reviewed, and the future trends of low temperature wafer bonding envisaged. (authors)

  17. Fully integrated monolithic opoelectronic transducer for real.time protein and DNA detection

    DEFF Research Database (Denmark)

    Misiakos, Konstatinos; S. Petrou, Panagiota; E. Kakabakos, Sotirios

    2010-01-01

    The development and testing of a portable bioanalytical device which was capable for real-time monitoring of binding assays was demonstrated. The device was based on arrays of nine optoelectronic transducers monolithically integrated on silicon chips. The optocouplers consisted of nine silicon av...... by exploiting wavelength filtering on photonic crystal engineered waveguides. The proposed miniaturized sensing device with proper packaging and accompanied by a portable instrument can find wide application as a platform for reliable and cost effective point-of-care diagnosis....

  18. Site-Controlled Growth of Monolithic InGaAs/InP Quantum Well Nanopillar Lasers on Silicon.

    Science.gov (United States)

    Schuster, Fabian; Kapraun, Jonas; Malheiros-Silveira, Gilliard N; Deshpande, Saniya; Chang-Hasnain, Connie J

    2017-04-12

    In this Letter, we report the site-controlled growth of InP nanolasers on a silicon substrate with patterned SiO 2 nanomasks by low-temperature metal-organic chemical vapor deposition, compatible with silicon complementary metal-oxide-semiconductor (CMOS) post-processing. A two-step growth procedure is presented to achieve smooth wurtzite faceting of vertical nanopillars. By incorporating InGaAs multiquantum wells, the nanopillar emission can be tuned over a wide spectral range. Enhanced quality factors of the intrinsic InP nanopillar cavities promote lasing at 0.87 and 1.21 μm, located within two important optical telecommunication bands. This is the first demonstration of a site-controlled III-V nanolaser monolithically integrated on silicon with a silicon-transparent emission wavelength, paving the way for energy-efficient on-chip optical links at typical telecommunication wavelengths.

  19. Design and characterization of ultra-stretchable monolithic silicon fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2014-10-13

    Stretchable electronic systems can play instrumental role for reconfigurable macro-electronics such as distributed sensor networks for wearable and bio-integrated electronics. Typically, polymer composite based materials and its deterministic design as interconnects are used to achieve such systems. Nonetheless, non-polymeric inorganic silicon is the predominant material for 90% of electronics. Therefore, we report the design and fabrication of an all silicon based network of hexagonal islands connected through spiral springs to form an ultra-stretchable arrangement for complete compliance to highly asymmetric shapes. Several design parameters are considered and their validation is carried out through finite element analysis. The fabrication process is based on conventional microfabrication techniques and the measured stretchability is more than 1000% for single spirals and area expansions as high as 30 folds in arrays. The reported method can provide ultra-stretchable and adaptable electronic systems for distributed network of high-performance macro-electronics especially useful for wearable electronics and bio-integrated devices.

  20. Design and characterization of ultra-stretchable monolithic silicon fabric

    KAUST Repository

    Rojas, Jhonathan Prieto; Carreno, Armando Arpys Arevalo; Foulds, I. G.; Hussain, Muhammad Mustafa

    2014-01-01

    Stretchable electronic systems can play instrumental role for reconfigurable macro-electronics such as distributed sensor networks for wearable and bio-integrated electronics. Typically, polymer composite based materials and its deterministic design as interconnects are used to achieve such systems. Nonetheless, non-polymeric inorganic silicon is the predominant material for 90% of electronics. Therefore, we report the design and fabrication of an all silicon based network of hexagonal islands connected through spiral springs to form an ultra-stretchable arrangement for complete compliance to highly asymmetric shapes. Several design parameters are considered and their validation is carried out through finite element analysis. The fabrication process is based on conventional microfabrication techniques and the measured stretchability is more than 1000% for single spirals and area expansions as high as 30 folds in arrays. The reported method can provide ultra-stretchable and adaptable electronic systems for distributed network of high-performance macro-electronics especially useful for wearable electronics and bio-integrated devices.

  1. Integration trends in monolithic power ICs: Application and technology challenges

    NARCIS (Netherlands)

    Rose, M.; Bergveld, H.J.

    2016-01-01

    This paper highlights the general trend towards further monolithic integration in power applications by enabling power management and interfacing solutions in advanced CMOS nodes. The need to combine high-density digital circuits, power-management circuits, and robust interfaces in a single

  2. Monolithically interconnected Silicon-Film{trademark} module technology: Annual technical report, 25 November 1997--24 November 1998

    Energy Technology Data Exchange (ETDEWEB)

    Hall, R.B.; Ford, D.H.; Rand, J.A.; Ingram, A.E.

    1999-11-11

    AstroPower continued its development of an advanced thin-silicon-based photovoltaic module product. This module combines the performance advantages of thin, light-trapped silicon layers with the capability of integration into a low-cost, monolithically interconnected array. This report summarizes the work carried out over the first year of a three-year, cost-shared contract, which has yielded the following results: Development of a low-cost, insulating, ceramic substrate that provides mechanical support at silicon growth temperatures, is matched to the thermal expansion of silicon, provides the optical properties required for light trapping through random texturing, and can be formed in large areas on a continuous basis. Different deposition techniques have been investigated, and AstroPower has developed deposition processes for the back conductive layer, the p-type silicon layer, and the mechanical/chemical barrier layer. Polycrystalline films of silicon have been grown on ceramics using AstroPower's Silicon-Film{trademark} process. These films are from 50 to 75 {micro}m thick, with columnar grains extending through the thickness of the film. Aspect ratios from 5:1 to 20:1 have been observed in these films.

  3. Tailoring the graphene/silicon carbide interface for monolithic wafer-scale electronics.

    Science.gov (United States)

    Hertel, S; Waldmann, D; Jobst, J; Albert, A; Albrecht, M; Reshanov, S; Schöner, A; Krieger, M; Weber, H B

    2012-07-17

    Graphene is an outstanding electronic material, predicted to have a role in post-silicon electronics. However, owing to the absence of an electronic bandgap, graphene switching devices with high on/off ratio are still lacking. Here in the search for a comprehensive concept for wafer-scale graphene electronics, we present a monolithic transistor that uses the entire material system epitaxial graphene on silicon carbide (0001). This system consists of the graphene layer with its vanishing energy gap, the underlying semiconductor and their common interface. The graphene/semiconductor interfaces are tailor-made for ohmic as well as for Schottky contacts side-by-side on the same chip. We demonstrate normally on and normally off operation of a single transistor with on/off ratios exceeding 10(4) and no damping at megahertz frequencies. In its simplest realization, the fabrication process requires only one lithography step to build transistors, diodes, resistors and eventually integrated circuits without the need of metallic interconnects.

  4. Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices.

    Science.gov (United States)

    Bi, Lei; Hu, Juejun; Jiang, Peng; Kim, Hyun Suk; Kim, Dong Hun; Onbasli, Mehmet Cengiz; Dionne, Gerald F; Ross, Caroline A

    2013-11-08

    Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO₂ -δ , Co- or Fe-substituted SrTiO 3- δ , as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti 0.2 Ga 0.4 Fe 0.4 )O 3- δ and polycrystalline (CeY₂)Fe₅O 12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY₂)Fe₅O 12 /silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates.

  5. Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices

    Directory of Open Access Journals (Sweden)

    Mehmet Cengiz Onbasli

    2013-11-01

    Full Text Available Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO2−δ, Co- or Fe-substituted SrTiO3−δ, as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti0.2Ga0.4Fe0.4O3−δ and polycrystalline (CeY2Fe5O12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY2Fe5O12/silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates.

  6. Silicon monolithic microchannel-cooled laser diode array

    International Nuclear Information System (INIS)

    Skidmore, J. A.; Freitas, B. L.; Crawford, J.; Satariano, J.; Utterback, E.; DiMercurio, L.; Cutter, K.; Sutton, S.

    2000-01-01

    A monolithic microchannel-cooled laser diode array is demonstrated that allows multiple diode-bar mounting with negligible thermal cross talk. The heat sink comprises two main components: a wet-etched Si layer that is anodically bonded to a machined glass block. The continuous wave (cw) thermal resistance of the 10 bar diode array is 0.032 degree sign C/W, which matches the performance of discrete microchannel-cooled arrays. Up to 1.5 kW/cm 2 is achieved cw at an emission wavelength of ∼808 nm. Collimation of a diode array using a monolithic lens frame produced a 7.5 mrad divergence angle by a single active alignment. This diode array offers high average power/brightness in a simple, rugged, scalable architecture that is suitable for large two-dimensional areas. (c) 2000 American Institute of Physics

  7. A Monolithically-Integrated μGC Chemical Sensor System

    Directory of Open Access Journals (Sweden)

    Davor Copic

    2011-06-01

    Full Text Available Gas chromatography (GC is used for organic and inorganic gas detection with a range of applications including screening for chemical warfare agents (CWA, breath analysis for diagnostics or law enforcement purposes, and air pollutants/indoor air quality monitoring of homes and commercial buildings. A field-portable, light weight, low power, rapid response, micro-gas chromatography (μGC system is essential for such applications. We describe the design, fabrication and packaging of mGC on monolithically-integrated Si dies, comprised of a preconcentrator (PC, μGC column, detector and coatings for each of these components. An important feature of our system is that the same mechanical micro resonator design is used for the PC and detector. We demonstrate system performance by detecting four different CWA simulants within 2 min. We present theoretical analyses for cost/power comparisons of monolithic versus hybrid μGC systems. We discuss thermal isolation in monolithic systems to improve overall performance. Our monolithically-integrated μGC, relative to its hybrid cousin, will afford equal or slightly lower cost, a footprint that is 1/2 to 1/3 the size and an improved resolution of 4 to 25%.

  8. Thermal measurement a requirement for monolithic microwave integrated circuit design

    OpenAIRE

    Hopper, Richard; Oxley, C. H.

    2008-01-01

    The thermal management of structures such as Monolithic Microwave Integrated Circuits (MMICs) is important, given increased circuit packing densities and RF output powers. The paper will describe the IR measurement technology necessary to obtain accurate temperature profiles on the surface of semiconductor devices. The measurement procedure will be explained, including the device mounting arrangement and emissivity correction technique. The paper will show how the measurement technique has be...

  9. Monolithic microwave integrated circuits: Interconnections and packaging considerations

    Science.gov (United States)

    Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

    1984-01-01

    Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

  10. Monolithic microwave integrated circuit technology for advanced space communication

    Science.gov (United States)

    Ponchak, George E.; Romanofsky, Robert R.

    1988-01-01

    Future Space Communications subsystems will utilize GaAs Monolithic Microwave Integrated Circuits (MMIC's) to reduce volume, weight, and cost and to enhance system reliability. Recent advances in GaAs MMIC technology have led to high-performance devices which show promise for insertion into these next generation systems. The status and development of a number of these devices operating from Ku through Ka band will be discussed along with anticipated potential applications.

  11. Monolithic microwave integrated circuits: Interconnections and packaging considerations

    Science.gov (United States)

    Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

    Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

  12. Monolithic integration of micromachined sensors and CMOS circuits based on SOI technologies

    International Nuclear Information System (INIS)

    Yu Xiaomei; Tang Yaquan; Zhang Haitao

    2008-01-01

    This note presents a novel way to monolithically integrate micro-cantilever sensors and signal conditioning circuits by combining SOI CMOS and SOI micromachining technologies. In order to improve the sensor performance and reduce the system volume, an integrated sensor system composed of a piezoresistive cantilever array, a temperature-compensation current reference, a digitally controlled multiplexer and an instrument amplifier is designed and finally fabricated. A post-SOI CMOS process is developed to realize the integrated sensor system which is based on a standard CMOS process with one more mask to define the cantilever structure at the end of the process. Measurements on the finished SOI CMOS devices and circuits show that the integration process has good compatibility both for the cantilever sensors and for the CMOS circuits, and the SOI CMOS integration process can decrease about 25% sequences compared with the bulk silicon CMOS process. (note)

  13. Development of the multiwavelength monolithic integrated fiber optics terminal

    Science.gov (United States)

    Chubb, C. R.; Bryan, D. A.; Powers, J. K.; Rice, R. R.; Nettle, V. H.; Dalke, E. A.; Reed, W. R.

    1982-01-01

    This paper describes the development of the Multiwavelength Monolithic Integrated Fiber Optic Terminal (MMIFOT) for the NASA Johnson Space Center. The program objective is to utilize guided wave optical technology to develop wavelength-multiplexing and -demultiplexing units, using a single mode optical fiber for transmission between terminals. Intensity modulated injection laser diodes, chirped diffraction gratings and thin film lenses are used to achieve the wavelength-multiplexing and -demultiplexing. The video and audio data transmission test of an integrated optical unit with a Luneburg collimation lens, waveguide diffraction grating and step index condensing lens is described.

  14. Monolithically Integrated Ge-on-Si Active Photonics

    Directory of Open Access Journals (Sweden)

    Jifeng Liu

    2014-07-01

    Full Text Available Monolithically integrated, active photonic devices on Si are key components in Si-based large-scale electronic-photonic integration for future generations of high-performance, low-power computation and communication systems. Ge has become an interesting candidate for active photonic devices in Si photonics due to its pseudo-direct gap behavior and compatibility with Si complementary metal oxide semiconductor (CMOS processing. In this paper, we present a review of the recent progress in Ge-on-Si active photonics materials and devices for photon detection, modulation, and generation. We first discuss the band engineering of Ge using tensile strain, n-type doping, Sn alloying, and separate confinement of Γ vs. L electrons in quantum well (QW structures to transform the material towards a direct band gap semiconductor for enhancing optoelectronic properties. We then give a brief overview of epitaxial Ge-on-Si materials growth, followed by a summary of recent investigations towards low-temperature, direct growth of high crystallinity Ge and GeSn alloys on dielectric layers for 3D photonic integration. Finally, we review the most recent studies on waveguide-integrated Ge-on-Si photodetectors (PDs, electroabsorption modulators (EAMs, and laser diodes (LDs, and suggest possible future research directions for large-scale monolithic electronic-photonic integrated circuits on a Si platform.

  15. Heterogeneous Monolithic Integration of Single-Crystal Organic Materials.

    Science.gov (United States)

    Park, Kyung Sun; Baek, Jangmi; Park, Yoonkyung; Lee, Lynn; Hyon, Jinho; Koo Lee, Yong-Eun; Shrestha, Nabeen K; Kang, Youngjong; Sung, Myung Mo

    2017-02-01

    Manufacturing high-performance organic electronic circuits requires the effective heterogeneous integration of different nanoscale organic materials with uniform morphology and high crystallinity in a desired arrangement. In particular, the development of high-performance organic electronic and optoelectronic devices relies on high-quality single crystals that show optimal intrinsic charge-transport properties and electrical performance. Moreover, the heterogeneous integration of organic materials on a single substrate in a monolithic way is highly demanded for the production of fundamental organic electronic components as well as complex integrated circuits. Many of the various methods that have been designed to pattern multiple heterogeneous organic materials on a substrate and the heterogeneous integration of organic single crystals with their crystal growth are described here. Critical issues that have been encountered in the development of high-performance organic integrated electronics are also addressed. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  16. Monolithic silicon photonics in a sub-100nm SOI CMOS microprocessor foundry: progress from devices to systems

    Science.gov (United States)

    Popović, Miloš A.; Wade, Mark T.; Orcutt, Jason S.; Shainline, Jeffrey M.; Sun, Chen; Georgas, Michael; Moss, Benjamin; Kumar, Rajesh; Alloatti, Luca; Pavanello, Fabio; Chen, Yu-Hsin; Nammari, Kareem; Notaros, Jelena; Atabaki, Amir; Leu, Jonathan; Stojanović, Vladimir; Ram, Rajeev J.

    2015-02-01

    We review recent progress of an effort led by the Stojanović (UC Berkeley), Ram (MIT) and Popović (CU Boulder) research groups to enable the design of photonic devices, and complete on-chip electro-optic systems and interfaces, directly in standard microelectronics CMOS processes in a microprocessor foundry, with no in-foundry process modifications. This approach allows tight and large-scale monolithic integration of silicon photonics with state-of-the-art (sub-100nm-node) microelectronics, here a 45nm SOI CMOS process. It enables natural scale-up to manufacturing, and rapid advances in device design due to process repeatability. The initial driver application was addressing the processor-to-memory communication energy bottleneck. Device results include 5Gbps modulators based on an interleaved junction that take advantage of the high resolution of the sub-100nm CMOS process. We demonstrate operation at 5fJ/bit with 1.5dB insertion loss and 8dB extinction ratio. We also demonstrate the first infrared detectors in a zero-change CMOS process, using absorption in transistor source/drain SiGe stressors. Subsystems described include the first monolithically integrated electronic-photonic transmitter on chip (modulator+driver) with 20-70fJ/bit wall plug energy/bit (2-3.5Gbps), to our knowledge the lowest transmitter energy demonstrated to date. We also demonstrate native-process infrared receivers at 220fJ/bit (5Gbps). These are encouraging signs for the prospects of monolithic electronics-photonics integration. Beyond processor-to-memory interconnects, our approach to photonics as a "More-than- Moore" technology inside advanced CMOS promises to enable VLSI electronic-photonic chip platforms tailored to a vast array of emerging applications, from optical and acoustic sensing, high-speed signal processing, RF and optical metrology and clocks, through to analog computation and quantum technology.

  17. Monolithic electrically injected nanowire array edge-emitting laser on (001) silicon

    KAUST Repository

    Frost, Thomas; Jahangir, Shafat; Stark, Ethan; Deshpande, Saniya; Hazari, Arnab Shashi; Zhao, Chao; Ooi, Boon S.; Bhattacharya, Pallab K.

    2014-01-01

    A silicon-based laser, preferably electrically pumped, has long been a scientific and engineering goal. We demonstrate here, for the first time, an edge-emitting InGaN/GaN disk-in-nanowire array electrically pumped laser emitting in the green (λ = 533 nm) on (001) silicon substrate. The devices display excellent dc and dynamic characteristics with values of threshold current density, differential gain, T0 and small signal modulation bandwidth equal to 1.76 kA/cm2, 3 × 10-17 cm2, 232 K, and 5.8 GHz respectively under continuous wave operation. Preliminary reliability measurements indicate a lifetime of 7000 h. The emission wavelength can be tuned by varying the alloy composition in the quantum disks. The monolithic nanowire laser on (001)Si can therefore address wide-ranging applications such as solid state lighting, displays, plastic fiber communication, medical diagnostics, and silicon photonics. © 2014 American Chemical Society.

  18. Monolithic electrically injected nanowire array edge-emitting laser on (001) silicon

    KAUST Repository

    Frost, Thomas

    2014-08-13

    A silicon-based laser, preferably electrically pumped, has long been a scientific and engineering goal. We demonstrate here, for the first time, an edge-emitting InGaN/GaN disk-in-nanowire array electrically pumped laser emitting in the green (λ = 533 nm) on (001) silicon substrate. The devices display excellent dc and dynamic characteristics with values of threshold current density, differential gain, T0 and small signal modulation bandwidth equal to 1.76 kA/cm2, 3 × 10-17 cm2, 232 K, and 5.8 GHz respectively under continuous wave operation. Preliminary reliability measurements indicate a lifetime of 7000 h. The emission wavelength can be tuned by varying the alloy composition in the quantum disks. The monolithic nanowire laser on (001)Si can therefore address wide-ranging applications such as solid state lighting, displays, plastic fiber communication, medical diagnostics, and silicon photonics. © 2014 American Chemical Society.

  19. Monolithic multinozzle emitters for nanoelectrospray mass spectrometry

    Science.gov (United States)

    Wang, Daojing [Daly City, CA; Yang, Peidong [Kensington, CA; Kim, Woong [Seoul, KR; Fan, Rong [Pasadena, CA

    2011-09-20

    Novel and significantly simplified procedures for fabrication of fully integrated nanoelectrospray emitters have been described. For nanofabricated monolithic multinozzle emitters (NM.sup.2 emitters), a bottom up approach using silicon nanowires on a silicon sliver is used. For microfabricated monolithic multinozzle emitters (M.sup.3 emitters), a top down approach using MEMS techniques on silicon wafers is used. The emitters have performance comparable to that of commercially-available silica capillary emitters for nanoelectrospray mass spectrometry.

  20. Temperature Characteristics of Monolithically Integrated Wavelength-Selectable Light Sources

    International Nuclear Information System (INIS)

    Han Liang-Shun; Zhu Hong-Liang; Zhang Can; Ma Li; Liang Song; Wang Wei

    2013-01-01

    The temperature characteristics of monolithically integrated wavelength-selectable light sources are experimentally investigated. The wavelength-selectable light sources consist of four distributed feedback (DFB) lasers, a multimode interferometer coupler, and a semiconductor optical amplifier. The oscillating wavelength of the DFB laser could be modulated by adjusting the device operating temperature. A wavelength range covering over 8.0nm is obtained with stable single-mode operation by selecting the appropriate laser and chip temperature. The thermal crosstalk caused by the lateral heat spreading between lasers operating simultaneously is evaluated by oscillating-wavelength shift. The thermal crosstalk approximately decreases exponentially as the increasing distance between lasers

  1. Monolithic micro-electro-thermal actuator integrated with a lateral displacement sensor

    International Nuclear Information System (INIS)

    Zhang, Yan; Choi, Young-Soo; Lee, Dong-Weon

    2010-01-01

    This paper presents monolithically fabricated horizontal thermal actuators integrated with piezoresistive sensors for in situ displacement sensing. The great advantage of a hybrid system is the use of closed feedback control for improving the transient response of a thermal actuator and positioning accuracy. It consists of two 'hot arms' made of doped silicon for Joule heating-induced thermal expansion when a current flow passes through them. The piezoresistor is embedded in the base of the 'cold arm' flexure for monitoring the tip deflection and for performance characterization. This 'cold arm' is not a part of the electrical circuit, which further improves the heat power efficiency and the measurement accuracy. Optimization is achieved mainly through modification of the geometry as well as the fabrication process. The fabricated micro-electro-thermal actuator with an integrated sensor is intended for use as a scanning cantilever in atomic force microscope or as a sample holder to drive the moving object through arrays configuration.

  2. Advances in gallium arsenide monolithic microwave integrated-circuit technology for space communications systems

    Science.gov (United States)

    Bhasin, K. B.; Connolly, D. J.

    1986-01-01

    Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. In this paper, current developments in GaAs MMIC technology are described, and the status and prospects of the technology are assessed.

  3. Monolithically integrated Helmholtz coils by 3-dimensional printing

    Energy Technology Data Exchange (ETDEWEB)

    Li, Longguang [Department of Electrical Engineering, University of Michigan–Shanghai Jiao Tong University Joint Institute, Shanghai Jiao Tong University, Shanghai 200240 (China); Abedini-Nassab, Roozbeh; Yellen, Benjamin B., E-mail: yellen@duke.edu [Department of Electrical Engineering, University of Michigan–Shanghai Jiao Tong University Joint Institute, Shanghai Jiao Tong University, Shanghai 200240 (China); Department of Mechanical Engineering and Materials Science, Duke University, P.O. Box 90300, Hudson Hall, Durham, North Carolina 27708 (United States)

    2014-06-23

    3D printing technology is of great interest for the monolithic fabrication of integrated systems; however, it is a challenge to introduce metallic components into 3D printed molds to enable broader device functionality. Here, we develop a technique for constructing a multi-axial Helmholtz coil by injecting a eutectic liquid metal Gallium Indium alloy (EGaIn) into helically shaped orthogonal cavities constructed in a 3D printed block. The tri-axial solenoids each carry up to 3.6 A of electrical current and produce magnetic field up to 70 G. Within the central section of the coil, the field variation is less than 1% and is in agreement with theory. The flow rates and critical pressures required to fill the 3D cavities with liquid metal also agree with theoretical predictions and provide scaling trends for filling the 3D printed parts. These monolithically integrated solenoids may find future applications in electronic cell culture platforms, atomic traps, and miniaturized chemical analysis systems based on nuclear magnetic resonance.

  4. Monolithically integrated Helmholtz coils by 3-dimensional printing

    International Nuclear Information System (INIS)

    Li, Longguang; Abedini-Nassab, Roozbeh; Yellen, Benjamin B.

    2014-01-01

    3D printing technology is of great interest for the monolithic fabrication of integrated systems; however, it is a challenge to introduce metallic components into 3D printed molds to enable broader device functionality. Here, we develop a technique for constructing a multi-axial Helmholtz coil by injecting a eutectic liquid metal Gallium Indium alloy (EGaIn) into helically shaped orthogonal cavities constructed in a 3D printed block. The tri-axial solenoids each carry up to 3.6 A of electrical current and produce magnetic field up to 70 G. Within the central section of the coil, the field variation is less than 1% and is in agreement with theory. The flow rates and critical pressures required to fill the 3D cavities with liquid metal also agree with theoretical predictions and provide scaling trends for filling the 3D printed parts. These monolithically integrated solenoids may find future applications in electronic cell culture platforms, atomic traps, and miniaturized chemical analysis systems based on nuclear magnetic resonance.

  5. Monolithically Integrated Flexible Black Phosphorus Complementary Inverter Circuits.

    Science.gov (United States)

    Liu, Yuanda; Ang, Kah-Wee

    2017-07-25

    Two-dimensional (2D) inverters are a fundamental building block for flexible logic circuits which have previously been realized by heterogeneously wiring transistors with two discrete channel materials. Here, we demonstrate a monolithically integrated complementary inverter made using a homogeneous black phosphorus (BP) nanosheet on flexible substrates. The digital logic inverter circuit is demonstrated via effective threshold voltage tuning within a single BP material, which offers both electron and hole dominated conducting channels with nearly symmetric pinch-off and current saturation. Controllable electron concentration is achieved by accurately modulating the aluminum (Al) donor doping, which realizes BP n-FET with a room-temperature on/off ratio >10 3 . Simultaneously, work function engineering is employed to obtain a low Schottky barrier contact electrode that facilities hole injection, thus enhancing the current density of the BP p-FET by 9.4 times. The flexible inverter circuit shows a clear digital logic voltage inversion operation along with a larger-than-unity direct current voltage gain, while exhibits alternating current dynamic signal switching at a record high frequency up to 100 kHz and remarkable electrical stability upon mechanical bending with a radii as small as 4 mm. Our study demonstrates a practical monolithic integration strategy for achieving functional logic circuits on one material platform, paving the way for future high-density flexible electronic applications.

  6. Monolithic integration of microfluidic channels and semiconductor lasers

    Science.gov (United States)

    Cran-McGreehin, Simon J.; Dholakia, Kishan; Krauss, Thomas F.

    2006-08-01

    We present a fabrication method for the monolithic integration of microfluidic channels into semiconductor laser material. Lasers are designed to couple directly into the microfluidic channel, allowing submerged particles pass through the output beams of the lasers. The interaction between particles in the channel and the lasers, operated in either forward or reverse bias, allows for particle detection, and the optical forces can be used to trap and move particles. Both interrogation and manipulation are made more amenable for lab-on-a-chip applications through monolithic integration. The devices are very small, they require no external optical components, have perfect intrinsic alignment, and can be created with virtually any planar configuration of lasers in order to perform a variety of tasks. Their operation requires no optical expertise and only low electrical power, thus making them suitable for computer interfacing and automation. Insulating the pn junctions from the fluid is the key challenge, which is overcome by using photo-definable SU8-2000 polymer.

  7. Monolithic Ge-on-Si lasers for large-scale electronic-photonic integration

    Science.gov (United States)

    Liu, Jifeng; Kimerling, Lionel C.; Michel, Jurgen

    2012-09-01

    A silicon-based monolithic laser source has long been envisioned as a key enabling component for large-scale electronic-photonic integration in future generations of high-performance computation and communication systems. In this paper we present a comprehensive review on the development of monolithic Ge-on-Si lasers for this application. Starting with a historical review of light emission from the direct gap transition of Ge dating back to the 1960s, we focus on the rapid progress in band-engineered Ge-on-Si lasers in the past five years after a nearly 30-year gap in this research field. Ge has become an interesting candidate for active devices in Si photonics in the past decade due to its pseudo-direct gap behavior and compatibility with Si complementary metal oxide semiconductor (CMOS) processing. In 2007, we proposed combing tensile strain with n-type doping to compensate the energy difference between the direct and indirect band gap of Ge, thereby achieving net optical gain for CMOS-compatible diode lasers. Here we systematically present theoretical modeling, material growth methods, spontaneous emission, optical gain, and lasing under optical and electrical pumping from band-engineered Ge-on-Si, culminated by recently demonstrated electrically pumped Ge-on-Si lasers with >1 mW output in the communication wavelength window of 1500-1700 nm. The broad gain spectrum enables on-chip wavelength division multiplexing. A unique feature of band-engineered pseudo-direct gap Ge light emitters is that the emission intensity increases with temperature, exactly opposite to conventional direct gap semiconductor light-emitting devices. This extraordinary thermal anti-quenching behavior greatly facilitates monolithic integration on Si microchips where temperatures can reach up to 80 °C during operation. The same band-engineering approach can be extended to other pseudo-direct gap semiconductors, allowing us to achieve efficient light emission at wavelengths previously

  8. Monolithic Ge-on-Si lasers for large-scale electronic–photonic integration

    International Nuclear Information System (INIS)

    Liu, Jifeng; Kimerling, Lionel C; Michel, Jurgen

    2012-01-01

    A silicon-based monolithic laser source has long been envisioned as a key enabling component for large-scale electronic–photonic integration in future generations of high-performance computation and communication systems. In this paper we present a comprehensive review on the development of monolithic Ge-on-Si lasers for this application. Starting with a historical review of light emission from the direct gap transition of Ge dating back to the 1960s, we focus on the rapid progress in band-engineered Ge-on-Si lasers in the past five years after a nearly 30-year gap in this research field. Ge has become an interesting candidate for active devices in Si photonics in the past decade due to its pseudo-direct gap behavior and compatibility with Si complementary metal oxide semiconductor (CMOS) processing. In 2007, we proposed combing tensile strain with n-type doping to compensate the energy difference between the direct and indirect band gap of Ge, thereby achieving net optical gain for CMOS-compatible diode lasers. Here we systematically present theoretical modeling, material growth methods, spontaneous emission, optical gain, and lasing under optical and electrical pumping from band-engineered Ge-on-Si, culminated by recently demonstrated electrically pumped Ge-on-Si lasers with >1 mW output in the communication wavelength window of 1500–1700 nm. The broad gain spectrum enables on-chip wavelength division multiplexing. A unique feature of band-engineered pseudo-direct gap Ge light emitters is that the emission intensity increases with temperature, exactly opposite to conventional direct gap semiconductor light-emitting devices. This extraordinary thermal anti-quenching behavior greatly facilitates monolithic integration on Si microchips where temperatures can reach up to 80 °C during operation. The same band-engineering approach can be extended to other pseudo-direct gap semiconductors, allowing us to achieve efficient light emission at wavelengths previously

  9. Monolithic microwave integrated circuit devices for active array antennas

    Science.gov (United States)

    Mittra, R.

    1984-01-01

    Two different aspects of active antenna array design were investigated. The transition between monolithic microwave integrated circuits and rectangular waveguides was studied along with crosstalk in multiconductor transmission lines. The boundary value problem associated with a discontinuity in a microstrip line is formulated. This entailed, as a first step, the derivation of the propagating as well as evanescent modes of a microstrip line. The solution is derived to a simple discontinuity problem: change in width of the center strip. As for the multiconductor transmission line problem. A computer algorithm was developed for computing the crosstalk noise from the signal to the sense lines. The computation is based on the assumption that these lines are terminated in passive loads.

  10. Vertically integrated monolithic pixel sensors for charged particle tracking and biomedical imaging

    International Nuclear Information System (INIS)

    Ratti, L.; Gaioni, L.; Manghisoni, M.; Re, V.; Traversi, G.

    2011-01-01

    Three-dimensional monolithic pixel sensors have been designed following the same approach that was exploited for the development of the so-called deep N-well (DNW) MAPS in planar CMOS process. The new 3D design relies upon stacking two homogeneous layers fabricated in a 130 nm CMOS technology. One of the two tiers, which are face-to-face bonded, has to be thinned down to about 12μm to expose the through silicon vias connecting the circuits to the back-metal bond pads. As a consequence of the way the two parts of each single chip are designed and fabricated, the prototypes of the 3D monolithic detector will include both samples with a thick substrate underneath the collecting DNW electrode, suitable for charged particle tracking, and samples with a very thin (about 6μm) sensitive volume, which may be used to detect low energy particles in biomedical imaging applications. Device physics simulations have been performed to evaluate the collection properties and detection efficiency of the proposed vertically integrated structures.

  11. Vertically integrated monolithic pixel sensors for charged particle tracking and biomedical imaging

    Energy Technology Data Exchange (ETDEWEB)

    Ratti, L., E-mail: lodovico.ratti@unipv.it [Universita di Pavia, Dipartimento di Elettronica, Via Ferrata 1, I-27100 Pavia (Italy); INFN, Sezione di Pavia, Via Bassi 6, I-27100 Pavia (Italy); Gaioni, L. [INFN, Sezione di Pavia, Via Bassi 6, I-27100 Pavia (Italy); Manghisoni, M.; Re, V.; Traversi, G. [Universita di Bergamo, Dipartimento di Ingegneria Industriale, Via Marconi 5, I-24044 Dalmine (Italy); INFN, Sezione di Pavia, Via Bassi 6, I-27100 Pavia (Italy)

    2011-10-01

    Three-dimensional monolithic pixel sensors have been designed following the same approach that was exploited for the development of the so-called deep N-well (DNW) MAPS in planar CMOS process. The new 3D design relies upon stacking two homogeneous layers fabricated in a 130 nm CMOS technology. One of the two tiers, which are face-to-face bonded, has to be thinned down to about 12{mu}m to expose the through silicon vias connecting the circuits to the back-metal bond pads. As a consequence of the way the two parts of each single chip are designed and fabricated, the prototypes of the 3D monolithic detector will include both samples with a thick substrate underneath the collecting DNW electrode, suitable for charged particle tracking, and samples with a very thin (about 6{mu}m) sensitive volume, which may be used to detect low energy particles in biomedical imaging applications. Device physics simulations have been performed to evaluate the collection properties and detection efficiency of the proposed vertically integrated structures.

  12. Zinc tin oxide as high-temperature stable recombination layer for mesoscopic perovskite/silicon monolithic tandem solar cells

    KAUST Repository

    Werner, Jérémie

    2016-12-05

    Perovskite/crystalline silicon tandem solar cells have the potential to reach efficiencies beyond those of silicon single-junction record devices. However, the high-temperature process of 500 °C needed for state-of-the-art mesoscopic perovskite cells has, so far, been limiting their implementation in monolithic tandem devices. Here, we demonstrate the applicability of zinc tin oxide as a recombination layer and show its electrical and optical stability at temperatures up to 500 °C. To prove the concept, we fabricate monolithic tandem cells with mesoscopic top cell with up to 16% efficiency. We then investigate the effect of zinc tin oxide layer thickness variation, showing a strong influence on the optical interference pattern within the tandem device. Finally, we discuss the perspective of mesoscopic perovskite cells for high-efficiency monolithic tandem solar cells. © 2016 Author(s)

  13. A Differential Monolithically Integrated Inductive Linear Displacement Measurement Microsystem

    Directory of Open Access Journals (Sweden)

    Matija Podhraški

    2016-03-01

    Full Text Available An inductive linear displacement measurement microsystem realized as a monolithic Application-Specific Integrated Circuit (ASIC is presented. The system comprises integrated microtransformers as sensing elements, and analog front-end electronics for signal processing and demodulation, both jointly fabricated in a conventional commercially available four-metal 350-nm CMOS process. The key novelty of the presented system is its full integration, straightforward fabrication, and ease of application, requiring no external light or magnetic field source. Such systems therefore have the possibility of substituting certain conventional position encoder types. The microtransformers are excited by an AC signal in MHz range. The displacement information is modulated into the AC signal by a metal grating scale placed over the microsystem, employing a differential measurement principle. Homodyne mixing is used for the demodulation of the scale displacement information, returned by the ASIC as a DC signal in two quadrature channels allowing the determination of linear position of the target scale. The microsystem design, simulations, and characterization are presented. Various system operating conditions such as frequency, phase, target scale material and distance have been experimentally evaluated. The best results have been achieved at 4 MHz, demonstrating a linear resolution of 20 µm with steel and copper scale, having respective sensitivities of 0.71 V/mm and 0.99 V/mm.

  14. Monolithic integration of a silica AWG and Ge photodiodes on Si photonic platform for one-chip WDM receiver.

    Science.gov (United States)

    Nishi, Hidetaka; Tsuchizawa, Tai; Kou, Rai; Shinojima, Hiroyuki; Yamada, Takashi; Kimura, Hideaki; Ishikawa, Yasuhiko; Wada, Kazumi; Yamada, Koji

    2012-04-09

    On the silicon (Si) photonic platform, we monolithically integrated a silica-based arrayed-waveguide grating (AWG) and germanium (Ge) photodiodes (PDs) using low-temperature fabrication technology. We confirmed demultiplexing by the AWG, optical-electrical signal conversion by Ge PDs, and high-speed signal detection at all channels. In addition, we mounted a multichannel transimpedance amplifier/limiting amplifier (TIA/LA) circuit on the fabricated AWG-PD device using flip-chip bonding technology. The results show the promising potential of our Si photonic platform as a photonics-electronics convergence.

  15. Elasticity and inelasticity of silicon nitride/boron nitride fibrous monoliths.

    Energy Technology Data Exchange (ETDEWEB)

    Smirnov, B. I.; Burenkov, Yu. A.; Kardashev, B. K.; Singh, D.; Goretta, K. C.; de Arellano-Lopez, A. R.; Energy Technology; Russian Academy of Sciences; Univer. de Sevilla

    2001-01-01

    A study is reported on the effect of temperature and elastic vibration amplitude on Young's modulus E and internal friction in Si{sub 3}N{sub 4} and BN ceramic samples and Si{sub 3}N{sub 4}/BN monoliths obtained by hot pressing of BN-coated Si{sub 3}N{sub 4} fibers. The fibers were arranged along, across, or both along and across the specimen axis. The E measurements were carried out under thermal cycling within the 20-600 C range. It was found that high-modulus silicon-nitride specimens possess a high thermal stability; the E(T) dependences obtained under heating and cooling coincide well with one another. The low-modulus BN ceramic exhibits a considerable hysteresis, thus indicating evolution of the defect structure under the action of thermoelastic (internal) stresses. Monoliths demonstrate a qualitatively similar behavior (with hysteresis). This behavior of the elastic modulus is possible under microplastic deformation initiated by internal stresses. The presence of microplastic shear in all the materials studied is supported by the character of the amplitude dependences of internal friction and the Young's modulus. The experimental data obtained are discussed in terms of a model in which the temperature dependences of the elastic modulus and their features are accounted for by both microplastic deformation and nonlinear lattice-atom vibrations, which depend on internal stresses.

  16. Integration of functional complex oxide nanomaterials on silicon

    Directory of Open Access Journals (Sweden)

    Jose Manuel eVila-Fungueiriño

    2015-06-01

    Full Text Available The combination of standard wafer-scale semiconductor processing with the properties of functional oxides opens up to innovative and more efficient devices with high value applications that can be produced at large scale. This review uncovers the main strategies that are successfully used to monolithically integrate functional complex oxide thin films and nanostructures on silicon: the chemical solution deposition approach (CSD and the advanced physical vapor deposition techniques such as oxide molecular beam epitaxy (MBE. Special emphasis will be placed on complex oxide nanostructures epitaxially grown on silicon using the combination of CSD and MBE. Several examples will be exposed, with a particular stress on the control of interfaces and crystallization mechanisms on epitaxial perovskite oxide thin films, nanostructured quartz thin films, and octahedral molecular sieve nanowires. This review enlightens on the potential of complex oxide nanostructures and the combination of both chemical and physical elaboration techniques for novel oxide-based integrated devices.

  17. Monolithic integration of nanoscale tensile specimens and MEMS structures

    International Nuclear Information System (INIS)

    Yilmaz, Mehmet; Kysar, Jeffrey W

    2013-01-01

    Nanoscale materials often have stochastic material properties due to a random distribution of material defects and an insufficient number of defects to ensure a consistent average mechanical response. Current methods to measure the mechanical properties employ MEMS-based actuators. The nanoscale specimens are typically mounted manually onto the load platform, so the boundary conditions have random variations, complicating the experimental measurement of the intrinsic stochasticity of the material properties. Here we show methods for monolithic integration of a nanoscale specimen co-fabricated with the loading platform. The nanoscale specimen is gold with dimensions of ∼40 nm thickness, 350 ± 50 nm width, and 7 μm length and the loading platform is an interdigitated electrode electrostatic actuator. The experiment is performed in a scanning electron microscope and digital image correlation is employed to measure displacements to determine stress and strain. The ultimate tensile strength of the nanocrystalline nanoscale specimen approaches 1 GPa, consistent with measurements made by other nanometer scale sample characterization methods on other material samples at the nanometer scale, as well as gold samples at the nanometer scale. The batch-compatible microfabrication method can be used to create nominally identical nanoscale specimens and boundary conditions for a broad range of materials. (paper)

  18. Hybrid Integrated Platforms for Silicon Photonics

    Science.gov (United States)

    Liang, Di; Roelkens, Gunther; Baets, Roel; Bowers, John E.

    2010-01-01

    A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

  19. Hybrid Integrated Platforms for Silicon Photonics

    Directory of Open Access Journals (Sweden)

    John E. Bowers

    2010-03-01

    Full Text Available A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

  20. High-speed detection at two micrometres with monolithic silicon photodiodes

    Science.gov (United States)

    Ackert, Jason J.; Thomson, David J.; Shen, Li; Peacock, Anna C.; Jessop, Paul E.; Reed, Graham T.; Mashanovich, Goran Z.; Knights, Andrew P.

    2015-06-01

    With continued steep growth in the volume of data transmitted over optical networks there is a widely recognized need for more sophisticated photonics technologies to forestall a ‘capacity crunch’. A promising solution is to open new spectral regions at wavelengths near 2 μm and to exploit the long-wavelength transmission and amplification capabilities of hollow-core photonic-bandgap fibres and the recently available thulium-doped fibre amplifiers. To date, photodetector devices for this window have largely relied on III-V materials or, where the benefits of integration with silicon photonics are sought, GeSn alloys, which have been demonstrated thus far with only limited utility. Here, we describe a silicon photodiode operating at 20 Gbit s-1 in this wavelength region. The detector is compatible with standard silicon processing and is integrated directly with silicon-on-insulator waveguides, which suggests future utility in silicon-based mid-infrared integrated optics for applications in communications.

  1. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit.

    Science.gov (United States)

    Chakrabarti, B; Lastras-Montaño, M A; Adam, G; Prezioso, M; Hoskins, B; Payvand, M; Madhavan, A; Ghofrani, A; Theogarajan, L; Cheng, K-T; Strukov, D B

    2017-02-14

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + "Molecular") architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

  2. Integration of lateral porous silicon membranes into planar microfluidics.

    Science.gov (United States)

    Leïchlé, Thierry; Bourrier, David

    2015-02-07

    In this work, we present a novel fabrication process that enables the monolithic integration of lateral porous silicon membranes into single-layer planar microchannels. This fabrication technique relies on the patterning of local electrodes to guide pore formation horizontally within the membrane and on the use of silicon-on-insulator substrates to spatially localize porous silicon within the channel depth. The feasibility of our approach is studied by current flow analysis using the finite element method and supported by creating 10 μm long mesoporous membranes within 20 μm deep microchannels. The fabricated membranes are demonstrated to be potentially useful for dead-end microfiltration by adequately retaining 300 nm diameter beads while macromolecules such as single-stranded DNA and immunoglobulin G permeate the membrane. The experimentally determined fluidic resistance is in accordance with the theoretical value expected from the estimated pore size and porosity. The work presented here is expected to greatly simplify the integration of membranes capable of size exclusion based separation into fluidic devices and opens doors to the use of porous silicon in planar lab on a chip devices.

  3. A monolithically fabricated gas chromatography separation column with an integrated high sensitivity thermal conductivity detector

    International Nuclear Information System (INIS)

    Kaanta, Bradley C; Zhang, Xin; Chen, Hua

    2010-01-01

    The monolithic integration of a high sensitivity detector with a gas chromatography (GC) separation column creates many potential advantages over the discrete components of a traditional chromatography system. In miniaturized high-speed GC systems, component interconnections can cause crucial errors and loss of fidelity during detection and analysis. A monolithically integrated device would eliminate the need to create helium-tight interconnections, which are bulky and labor intensive. Additionally, batch fabrication of integrated devices that no longer require expensive and fragile detectors can decrease the cost of micro GC systems through economies of scale. We present the design, fabrication and operation of a monolithic GC separation column and detector. Our device is able to separate nitrogen, methane and carbon dioxide within 30 s. This method of device integration could be applied to the existing wealth of column geometries and chemistries designed for specialized applications.

  4. Laser Soldering and Thermal Cycling Tests of Monolithic Silicon Pixel Chips

    CERN Document Server

    Strand, Frode Sneve

    2015-01-01

    An ALPIDE-1 monolithic silicon pixel sensor prototype has been laser soldered to a flex printed circuit using a novel interconnection technique using lasers. This technique is to be optimised to ensure stable, good quality connections between the sensor chips and the FPCs. To test the long-term stability of the connections, as well as study the effects on hit thresholds and noise in the sensor, it was thermally cycled in a climate chamber 1200 times. The soldered connections showed good qualities like even melting and good adhesion on pad/flex surfaces, and the chip remained in working condition for 1080 cycles. After this, a few connections failed, having cracks in the soldering tin, rendering the chip unusable. Threshold and noise characteristics seemed stable, except for the noise levels of sector 2 in the chip, for 1000 cycles in a temperature interval of "10^{\\circ}" and "50^{\\circ}" C. Still, further testing with wider temperature ranges and more cycles is needed to test the limitations of the chi...

  5. Design and application of multilayer monolithic microwave integrated circuit transformers

    Energy Technology Data Exchange (ETDEWEB)

    Economides, S.B

    1999-07-01

    The design and performance of planar spiral transformers, using multilayer GaAs and silicon MMIC technology, are presented. This multilayer technology gives new opportunities for improving the performance of planar transformers, couplers and baluns. Planar transformers have high parasitic resistance and capacitance and low levels of coupling. Using multilayer technology these problems are overcome by applying a multilayer structure of three metal layers separated by two polyimide dielectric layers. The improvements gained by placing the conductors on different metal layers, and using conductors raised on polyimide layers for low capacitance, have been investigated. The circuits were fabricated using a novel experimental fabrication process, which uses entirely standard materials and techniques and is compatible with BJT's and silicon-germanium HBT's. The transformers were all characterised up to 20 GHz using RF-on-wafer measurements. They demonstrated good performance, considering the experimental nature of in-house multilayer technology and the difficulties in simulating these three-dimensional new geometries. With high resistivity substrates, the silicon components achieved virtually the same performance as their gallium arsenide counterparts. The transformers were then used in simulations of transformer-coupled HBT amplifier circuits, to demonstrate their capabilities. It was shown that these circuits present good performance compared to standard off-the shelf component circuits and are very promising for use in most multilayer MMIC applications. The structures were further used in coupling configurations, and applied in balun circuits and pushpull amplifiers. The spiral transformer coupler can operate at low frequencies without using up much chip area. In a balun configuration, the balun can compensate for coupling and phase imbalance and operates over 5 to 15 GHz. The spiral coupler does not always need multilayer processing, so the balun may be

  6. Monolithic Microwave Integrated Circuit (MMIC) Phased Array Demonstrated With ACTS

    Science.gov (United States)

    1996-01-01

    Monolithic Microwave Integrated Circuit (MMIC) arrays developed by the NASA Lewis Research Center and the Air Force Rome Laboratory were demonstrated in aeronautical terminals and in mobile or fixed Earth terminals linked with NASA's Advanced Communications Technology Satellite (ACTS). Four K/Ka-band experimental arrays were demonstrated between May 1994 and May 1995. Each array had GaAs MMIC devices at each radiating element for electronic beam steering and distributed power amplification. The 30-GHz transmit array used in uplinks to ACTS was developed by Lewis and Texas Instruments. The three 20-GHz receive arrays used in downlinks from ACTS were developed in cooperation with the Air Force Rome Laboratory, taking advantage of existing Air Force integrated-circuit, active-phased-array development contracts with the Boeing Company and Lockheed Martin Corporation. Four demonstrations, each related to an application of high interest to both commercial and Department of Defense organizations, were conducted. The location, type of link, and the data rate achieved for each of the applications is shown. In one demonstration-- an aeronautical terminal experiment called AERO-X--a duplex voice link between an aeronautical terminal on the Lewis Learjet and ACTS was achieved. Two others demonstrated duplex voice links (and in one case, interactive video links as well) between ACTS and an Army high-mobility, multipurpose wheeled vehicle (HMMWV, or "humvee"). In the fourth demonstration, the array was on a fixed mount and was electronically steered toward ACTS. Lewis served as project manager for all demonstrations and as overall system integrator. Lewis engineers developed the array system including a controller for open-loop tracking of ACTS during flight and HMMWV motion, as well as a laptop data display and recording system used in all demonstrations. The Jet Propulsion Laboratory supported the AERO-X program, providing elements of the ACTS Mobile Terminal. The successful

  7. Ni-Cr thin film resistor fabrication for GaAs monolithic microwave integrated circuits

    International Nuclear Information System (INIS)

    Vinayak, Seema; Vyas, H.P.; Muraleedharan, K.; Vankar, V.D.

    2006-01-01

    Different Ni-Cr alloys were sputter-deposited on silicon nitride-coated GaAs substrates and covered with a spin-coated polyimide layer to develop thin film metal resistors for GaAs monolithic microwave integrated circuits (MMICs). The contact to the resistors was made through vias in the polyimide layer by sputter-deposited Ti/Au interconnect metal. The variation of contact resistance, sheet resistance (R S ) and temperature coefficient of resistance (TCR) of the Ni-Cr resistors with fabrication process parameters such as polyimide curing thermal cycles and surface treatment given to the wafer prior to interconnect metal deposition has been studied. The Ni-Cr thin film resistors exhibited lower R S and higher TCR compared to the as-deposited Ni-Cr film that was not subjected to thermal cycles involved in the MMIC fabrication process. The change in resistivity and TCR values of Ni-Cr films during the MMIC fabrication process was found to be dependent on the Ni-Cr alloy composition

  8. Fluorescence monitoring of capillary electrophoresis separation of biomolecules with monolithically integrated optical waveguides

    NARCIS (Netherlands)

    Dongre, C.; Dekker, R.; Hoekstra, Hugo; Martinez-Vazquez, R.; Osellame, R.; Ramponi, R.; Cerullo, G.; van Weeghel, R.; Besselink, G.A.J.; van den Vlekkert, H.H.; Pollnau, Markus

    2009-01-01

    Monolithic integration of optical waveguides in a commercial lab-on-a-chip by femtosecond-laser material processing enables arbitrary 3D geometries of optical sensing structures in combination with fluidic microchannels. Integrated fluorescence monitoring of molecular separation, as applicable in

  9. Emerging heterogeneous integrated photonic platforms on silicon

    Directory of Open Access Journals (Sweden)

    Fathpour Sasan

    2015-05-01

    Full Text Available Silicon photonics has been established as a mature and promising technology for optoelectronic integrated circuits, mostly based on the silicon-on-insulator (SOI waveguide platform. However, not all optical functionalities can be satisfactorily achieved merely based on silicon, in general, and on the SOI platform, in particular. Long-known shortcomings of silicon-based integrated photonics are optical absorption (in the telecommunication wavelengths and feasibility of electrically-injected lasers (at least at room temperature. More recently, high two-photon and free-carrier absorptions required at high optical intensities for third-order optical nonlinear effects, inherent lack of second-order optical nonlinearity, low extinction ratio of modulators based on the free-carrier plasma effect, and the loss of the buried oxide layer of the SOI waveguides at mid-infrared wavelengths have been recognized as other shortcomings. Accordingly, several novel waveguide platforms have been developing to address these shortcomings of the SOI platform. Most of these emerging platforms are based on heterogeneous integration of other material systems on silicon substrates, and in some cases silicon is integrated on other substrates. Germanium and its binary alloys with silicon, III–V compound semiconductors, silicon nitride, tantalum pentoxide and other high-index dielectric or glass materials, as well as lithium niobate are some of the materials heterogeneously integrated on silicon substrates. The materials are typically integrated by a variety of epitaxial growth, bonding, ion implantation and slicing, etch back, spin-on-glass or other techniques. These wide range of efforts are reviewed here holistically to stress that there is no pure silicon or even group IV photonics per se. Rather, the future of the field of integrated photonics appears to be one of heterogenization, where a variety of different materials and waveguide platforms will be used for

  10. Silicon photonic integration in telecommunications

    Directory of Open Access Journals (Sweden)

    Christopher Richard Doerr

    2015-08-01

    Full Text Available Silicon photonics is the guiding of light in a planar arrangement of silicon-based materials to perform various functions. We focus here on the use of silicon photonics to create transmitters and receivers for fiber-optic telecommunications. As the need to squeeze more transmission into a given bandwidth, a given footprint, and a given cost increases, silicon photonics makes more and more economic sense.

  11. Experimental Modeling of Monolithic Resistors for Silicon ICS with a Robust Optimizer-Driving Scheme

    Directory of Open Access Journals (Sweden)

    Philippe Leduc

    2002-06-01

    Full Text Available Today, an exhaustive library of models describing the electrical behavior of integrated passive components in the radio-frequency range is essential for the simulation and optimization of complex circuits. In this work, a preliminary study has been done on Tantalum Nitride (TaN resistors integrated on silicon, and this leads to a single p-type lumped-element circuit. An efficient extraction technique will be presented to provide a computer-driven optimizer with relevant initial model parameter values (the "guess-timate". The results show the unicity in most cases of the lumped element determination, which leads to a precise simulation of self-resonant frequencies.

  12. Silicon wafers for integrated circuit process

    OpenAIRE

    Leroy , B.

    1986-01-01

    Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by detailing the requirements that wafers must satisfy at the incoming inspection.

  13. The upgrade of the ALICE Inner Tracking System - Status of the R&D; on monolithic silicon pixel sensors

    OpenAIRE

    Van Hoorne, Jacobus Willem

    2014-01-01

    s a major part of its upgrade plans, the ALICE experiment schedules the installation of a novel Inner Tracking System (ITS) during the Long Shutdown 2 (LS2) of the LHC in 2018/19. It will replace the present silicon tracker with seven layers of Monolithic Active Pixel Sensors (MAPS) and significantly improve the detector performance in terms of tracking and rate capabilities. The choice of technology has been guided by the tight requirements on the material budget of 0 : 3 % X = X 0 /layer fo...

  14. Monolithic integration of a resonant tunneling diode and a quantum well semiconductor laser

    Science.gov (United States)

    Grave, I.; Kan, S. C.; Griffel, G.; Wu, S. W.; Sa'Ar, A.

    1991-01-01

    A monolithic integration of a double barrier AlAs/GaAs resonant tunneling diode and a GaAs/AlGaAs quantum well laser is reported. Negative differential resistance and negative differential optical response are observed at room temperature. The device displays bistable electrical and optical characteristics which are voltage controlled. Operation as a two-state optical memory is demonstrated.

  15. Wideband Monolithic Microwave Integrated Circuit Frequency Converters with GaAs mHEMT Technology

    DEFF Research Database (Denmark)

    Krozer, Viktor; Johansen, Tom Keinicke; Djurhuus, Torsten

    2005-01-01

    We present monolithic microwave integrated circuit (MMIC) frequency converter, which can be used for up and down conversion, due to the large RF and IF port bandwidth. The MMIC converters are based on commercially available GaAs mHEMT technology and are comprised of a Gilbert mixer cell core...

  16. Label swapper device for spectral amplitude coded optical packet networks monolithically integrated on InP

    NARCIS (Netherlands)

    Muñoz, P.; García-Olcina, R.; Habib, C.; Chen, L.R.; Leijtens, X.J.M.; Vries, de T.; Robbins, D.J.; Capmany, J.

    2011-01-01

    In this paper the design, fabrication and experimental characterization of an spectral amplitude coded (SAC) optical label swapper monolithically integrated on Indium Phosphide (InP) is presented. The device has a footprint of 4.8x1.5 mm2 and is able to perform label swapping operations required in

  17. Indium phosphide-based monolithically integrated PIN waveguide photodiode readout for resonant cantilever sensors

    Energy Technology Data Exchange (ETDEWEB)

    Siwak, N. P. [Department of Electrical and Computer Engineering, Institute for Systems Research, University of Maryland, College Park, Maryland 20742 (United States); Laboratory for the Physical Sciences, 8050 Greenmead Drive, College Park, Maryland 20740 (United States); Fan, X. Z.; Ghodssi, R. [Department of Electrical and Computer Engineering, Institute for Systems Research, University of Maryland, College Park, Maryland 20742 (United States); Kanakaraju, S.; Richardson, C. J. K. [Laboratory for the Physical Sciences, 8050 Greenmead Drive, College Park, Maryland 20740 (United States)

    2014-10-06

    An integrated photodiode displacement readout scheme for a microelectromechanical cantilever waveguide resonator sensing platform is presented. III-V semiconductors are used to enable the monolithic integration of passive waveguides with active optical components. This work builds upon previously demonstrated results by measuring the displacement of cantilever waveguide resonators with on-chip waveguide PIN photodiodes. The on-chip integration of the readout provides an additional 70% improvement in mass sensitivity compared to off-chip photodetector designs due to measurement stability and minimized coupling loss. In addition to increased measurement stability, reduced packaging complexity is achieved due to the simplicity of the readout design. We have fabricated cantilever waveguides with integrated photodetectors and experimentally characterized these cantilever sensors with monolithically integrated PIN photodiodes.

  18. Monolithic Microwave Integrated Circuits Based on GaAs Mesfet Technology

    Science.gov (United States)

    Bahl, Inder J.

    Advanced military microwave systems are demanding increased integration, reliability, radiation hardness, compact size and lower cost when produced in large volume, whereas the microwave commercial market, including wireless communications, mandates low cost circuits. Monolithic Microwave Integrated Circuit (MMIC) technology provides an economically viable approach to meeting these needs. In this paper the design considerations for several types of MMICs and their performance status are presented. Multifunction integrated circuits that advance the MMIC technology are described, including integrated microwave/digital functions and a highly integrated transceiver at C-band.

  19. Silicon integrated circuits part A : supplement 2

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Applied Solid State Science, Supplement 2: Silicon Integrated Circuits, Part A focuses on MOS device physics. This book is divided into three chapters-physics of the MOS transistor; nonvolatile memories; and properties of silicon-on-sapphire substrates devices, and integrated circuits. The topics covered include the short channel effects, MOSFET structures, floating gate devices, technology for nonvolatile semiconductor memories, sapphire substrates, and SOS integrated circuits and systems. The MOS capacitor, MIOS devices, and SOS process and device technology are also deliberated. This public

  20. Integrated double-sided silicon microstrip detectors

    Directory of Open Access Journals (Sweden)

    Perevertailo V. L.

    2011-11-01

    Full Text Available The problems of design, technology and manufacturing double-sided silicon microstrip detectors using standard equipment production line in mass production of silicon integrated circuits are considered. The design of prototype high-energy particles detector for experiment ALICE (CERN is presented. The parameters of fabricated detectors are comparable with those of similar foreign detectors, but they are distinguished by lesser cost.

  1. Monolithic integration of DUV-induced waveguides into plastic microfluidic chip for optical manipulation

    DEFF Research Database (Denmark)

    Khoury Arvelo, Maria; Vannahme, Christoph; Sørensen, Kristian Tølbøl

    2014-01-01

    A monolithic polymer optofluidic chip for manipulation of microbeads in flow is demonstrated. On this chip, polymer waveguides induced by Deep UV lithography are integrated with microfluidic channels. The optical propagation losses of the waveguides are measured to be 0.66±0.13 dB/mm at a wavelen......A monolithic polymer optofluidic chip for manipulation of microbeads in flow is demonstrated. On this chip, polymer waveguides induced by Deep UV lithography are integrated with microfluidic channels. The optical propagation losses of the waveguides are measured to be 0.66±0.13 d......B/mm at a wavelength of λ = 808 nm. An optimized bead tracking algorithm is implemented, allowing for determination of the optical forces acting on the particles. The algorithm features a spatio-temporal mapping of coordinates for uniting partial trajectories, without increased processing time. With an external laser...

  2. Continuous terahertz-wave generation using a monolithically integrated horn antenna

    Science.gov (United States)

    Peytavit, E.; Beck, A.; Akalin, T.; Lampin, J.-F.; Hindle, F.; Yang, C.; Mouret, G.

    2008-09-01

    A transverse electromagnetic horn antenna is monolithically integrated with a standard ultrafast interdigitated electrode photodetector on low-temperature-grown GaAs. Continuous-wave terahertz radiation is generated at frequencies up to 2 THz with a maximum power of approximately 1 μW at 780 GHz. Experimental variations in the terahertz power as function of the frequency are explained by means of electromagnetic simulations of the antenna and the photomixer vicinity.

  3. Optical displacement measurement with GaAs/AlGaAs-based monolithically integrated Michelson interferometers

    OpenAIRE

    Hofstetter, Daniel; Zappe, H. P.; Dändliker, René

    2008-01-01

    Two monolithically integrated optical displacement sensors fabricated in the GaAs/AlGaAs material system are reported. These single-chip microsystems are configured as Michelson interferometers and comprise a distributed Bragg reflector (DBR) laser, photodetectors, phase shifters, and waveguide couplers. While the use of a single Michelson interferometer allows measurement of displacement magnitude only, a double Michelson interferometer with two interferometer signals in phase quadrature als...

  4. Porous silicon technology for integrated microsystems

    Science.gov (United States)

    Wallner, Jin Zheng

    With the development of micro systems, there is an increasing demand for integrable porous materials. In addition to those conventional applications, such as filtration, wicking, and insulating, many new micro devices, including micro reactors, sensors, actuators, and optical components, can benefit from porous materials. Conventional porous materials, such as ceramics and polymers, however, cannot meet the challenges posed by micro systems, due to their incompatibility with standard micro-fabrication processes. In an effort to produce porous materials that can be used in micro systems, porous silicon (PS) generated by anodization of single crystalline silicon has been investigated. In this work, the PS formation process has been extensively studied and characterized as a function of substrate type, crystal orientation, doping concentration, current density and surfactant concentration and type. Anodization conditions have been optimized for producing very thick porous silicon layers with uniform pore size, and for obtaining ideal pore morphologies. Three different types of porous silicon materials: meso porous silicon, macro porous silicon with straight pores, and macro porous silicon with tortuous pores, have been successfully produced. Regular pore arrays with controllable pore size in the range of 2mum to 6mum have been demonstrated as well. Localized PS formation has been achieved by using oxide/nitride/polysilicon stack as masking materials, which can withstand anodization in hydrofluoric acid up to twenty hours. A special etching cell with electrolytic liquid backside contact along with two process flows has been developed to enable the fabrication of thick macro porous silicon membranes with though wafer pores. For device assembly, Si-Au and In-Au bonding technologies have been developed. Very low bonding temperature (˜200°C) and thick/soft bonding layers (˜6mum) have been achieved by In-Au bonding technology, which is able to compensate the potentially

  5. Monolithic amorphous silicon modules on continuous polymer substrate. Final subcontract report, 9 January 1991--14 April 1991

    Energy Technology Data Exchange (ETDEWEB)

    Grimmer, D.P. [Iowa Thin Film Technologies, Inc., Ames, IA (US)

    1992-03-01

    This report examines manufacturing monolithic amorphous silicon modules on a continuous polymer substrate. Module production costs can be reduced by increasing module performance, expanding production, and improving and modifying production processes. Material costs can be reduced by developing processes that use a 1-mil polyimide substrate and multilayers of low-cost material for the front encapsulant. Research to speed up a-Si and ZnO deposition rates is needed to improve throughputs. To keep throughput rates compatible with depositions, multibeam fiber optic delivery systems for laser scribing can be used. However, mechanical scribing systems promise even higher throughputs. Tandem cells and production experience can increase device efficiency and stability. Two alternative manufacturing processes are described: (1) wet etching and sheet handling and (2) wet etching and roll-to-roll fabrication.

  6. Test beam measurement of the first prototype of the fast silicon pixel monolithic detector for the TT-PET project

    Science.gov (United States)

    Paolozzi, L.; Bandi, Y.; Benoit, M.; Cardarelli, R.; Débieux, S.; Forshaw, D.; Hayakawa, D.; Iacobucci, G.; Kaynak, M.; Miucci, A.; Nessi, M.; Ratib, O.; Ripiccini, E.; Rücker, H.; Valerio, P.; Weber, M.

    2018-04-01

    The TT-PET collaboration is developing a PET scanner for small animals with 30 ps time-of-flight resolution and sub-millimetre 3D detection granularity. The sensitive element of the scanner is a monolithic silicon pixel detector based on state-of-the-art SiGe BiCMOS technology. The first ASIC prototype for the TT-PET was produced and tested in the laboratory and with minimum ionizing particles. The electronics exhibit an equivalent noise charge below 600 e‑ RMS and a pulse rise time of less than 2 ns , in accordance with the simulations. The pixels with a capacitance of 0.8 pF were measured to have a detection efficiency greater than 99% and, although in the absence of the post-processing, a time resolution of approximately 200 ps .

  7. Silicon Photonic Integrated Circuit Mode Multiplexer

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ou, Haiyan; Xu, Jing

    2013-01-01

    We propose and demonstrate a novel silicon photonic integrated circuit enabling multiplexing of orthogonal modes in a few-mode fiber (FMF). By selectively launching light to four vertical grating couplers, all six orthogonal spatial and polarization modes supported by the FMF are successfully...

  8. A 1.5 Gb/s monolithically integrated optical receiver in the standard CMOS process

    Energy Technology Data Exchange (ETDEWEB)

    Xiao Xindong; Mao Luhong; Yu Changliang; Zhang Shilin; Xie Sheng, E-mail: xxd@tju.edu.c [School of Electronic Information Engineering, Tianjin University, Tianjin 300072 (China)

    2009-12-15

    A monolithically integrated optical receiver, including the photodetector, has been realized in Chartered 0.35 {mu}m EEPROM CMOS technology for 850 nm optical communication. The optical receiver consists of a differential photodetector, a differential transimpedance amplifier, three limiting amplifiers and an output circuit. The experiment results show that the receiver achieves an 875 MHz 3 dB bandwidth, and a data rate of 1.5 Gb/s is achieved at a bit-error-rate of 10{sup -9}. The chip dissipates 60 mW under a single 3.3 V supply. (semiconductor integrated circuits)

  9. A 1.5 Gb/s monolithically integrated optical receiver in the standard CMOS process

    International Nuclear Information System (INIS)

    Xiao Xindong; Mao Luhong; Yu Changliang; Zhang Shilin; Xie Sheng

    2009-01-01

    A monolithically integrated optical receiver, including the photodetector, has been realized in Chartered 0.35 μm EEPROM CMOS technology for 850 nm optical communication. The optical receiver consists of a differential photodetector, a differential transimpedance amplifier, three limiting amplifiers and an output circuit. The experiment results show that the receiver achieves an 875 MHz 3 dB bandwidth, and a data rate of 1.5 Gb/s is achieved at a bit-error-rate of 10 -9 . The chip dissipates 60 mW under a single 3.3 V supply. (semiconductor integrated circuits)

  10. Label swapper device for spectral amplitude coded optical packet networks monolithically integrated on InP.

    Science.gov (United States)

    Muñoz, P; García-Olcina, R; Habib, C; Chen, L R; Leijtens, X J M; de Vries, T; Robbins, D; Capmany, J

    2011-07-04

    In this paper the design, fabrication and experimental characterization of an spectral amplitude coded (SAC) optical label swapper monolithically integrated on Indium Phosphide (InP) is presented. The device has a footprint of 4.8x1.5 mm2 and is able to perform label swapping operations required in SAC at a speed of 155 Mbps. The device was manufactured in InP using a multiple purpose generic integration scheme. Compared to previous SAC label swapper demonstrations, using discrete component assembly, this label swapper chip operates two order of magnitudes faster.

  11. Materials issues in silicon integrated circuit processing

    International Nuclear Information System (INIS)

    Wittmer, M.; Stimmell, J.; Strathman, M.

    1986-01-01

    The symposium on ''Materials Issues in Integrated Circuit Processing'' sought to bring together all of the materials issued pertinent to modern integrated circuit processing. The inherent properties of the materials are becoming an important concern in integrated circuit manufacturing and accordingly research in materials science is vital for the successful implementation of modern integrated circuit technology. The session on Silicon Materials Science revealed the advanced stage of knowledge which topics such as point defects, intrinsic and extrinsic gettering and diffusion kinetics have achieved. Adaption of this knowledge to specific integrated circuit processing technologies is beginning to be addressed. The session on Epitaxy included invited papers on epitaxial insulators and IR detectors. Heteroepitaxy on silicon is receiving great attention and the results presented in this session suggest that 3-d integrated structures are an increasingly realistic possibility. Progress in low temperature silicon epitaxy and epitaxy of thin films with abrupt interfaces was also reported. Diffusion and Ion Implantation were well presented. Regrowth of implant-damaged layers and the nature of the defects which remain after regrowth were discussed in no less than seven papers. Substantial progress was also reported in the understanding of amorphising boron implants and the use of gallium implants for the formation of shallow p/sup +/ -layers

  12. Silicon Photonics II Components and Integration

    CERN Document Server

    Lockwood, David J

    2011-01-01

    This book is volume II of a series of books on silicon photonics. It gives a fascinating picture of the state-of-the-art in silicon photonics from a component perspective. It presents a perspective on what can be expected in the near future. It is formed from a selected number of reviews authored by world leaders in the field, and is written from both academic and industrial viewpoints. An in-depth discussion of the route towards fully integrated silicon photonics is presented. This book will be useful not only to physicists, chemists, materials scientists, and engineers but also to graduate students who are interested in the fields of micro- and nanophotonics and optoelectronics.

  13. Integrated Silicon Carbide Power Electronic Block

    Energy Technology Data Exchange (ETDEWEB)

    Radhakrishnan, Rahul [Global Power Technologies Group, Inc., Lake Forest, CA (United States)

    2017-11-07

    Research involved in this project is aimed at monolithically integrating an anti-parallel diode to the SiC MOSFET switch, so as to avoid having to use an external anti-parallel diode in power circuit applications. SiC MOSFETs are replacing Si MOSFETs and IGBTs in many applications, yet the high bandgap of the body diode in SiC MOSFET and consequent need for an external anti-parallel diode increases costs and discourages circuit designers from adopting this technology. Successful demonstration and subsequent commercialization of this technology would reduce SiC MOSFET cost and additionally reduce component count as well as other costs at the power circuit level. In this Phase I project, we have created multiple device designs, set up a process for device fabrication at the 150mm SiC foundry XFAB Texas, demonstrated unit-processes for device fabrication in short loops and started full flow device fabrication. Key findings of the development activity were: The limits of coverage of photoresist over the topology of thick polysilicon structures covered with oxide, which required larger feature dimensions to overcome; and The insufficient process margin for removing oxide spacers from polysilicon field ring features which could result in loss of some features without further process development No fundamental obstacles were uncovered during the process development. Given sufficient time for additional development it is likely that processes could be tuned to realize the monolithically integrated SiC JBS diode and MOSFET. Sufficient funds were not available in this program to resolve processing difficulties and fabricate the devices.

  14. Basic opto-electronics on silicon for sensor applications

    NARCIS (Netherlands)

    Joppe, J.L.; Bekman, H.H.P.Th.; de Krijger, A.J.T.; Albers, H.; Chalmers, J.; Chalmers, J.D.; Holleman, J.; Ikkink, T.J.; Ikkink, T.; van Kranenburg, H.; Zhou, M.-J.; Zhou, Ming-Jiang; Lambeck, Paul

    1994-01-01

    A general platform for integrated opto-electronic sensor systems on silicon is proposed. The system is based on a hybridly integrated semiconductor laser, ZnO optical waveguides and monolithic photodiodes and electronic circuiry.

  15. Monolithically Integrated, Mechanically Resilient Carbon-Based Probes for Scanning Probe Microscopy

    Science.gov (United States)

    Kaul, Anupama B.; Megerian, Krikor G.; Jennings, Andrew T.; Greer, Julia R.

    2010-01-01

    Scanning probe microscopy (SPM) is an important tool for performing measurements at the nanoscale in imaging bacteria or proteins in biology, as well as in the electronics industry. An essential element of SPM is a sharp, stable tip that possesses a small radius of curvature to enhance spatial resolution. Existing techniques for forming such tips are not ideal. High-aspect-ratio, monolithically integrated, as-grown carbon nanofibers (CNFs) have been formed that show promise for SPM applications by overcoming the limitations present in wet chemical and separate substrate etching processes.

  16. A design concept for an MMIC (Monolithic Microwave Integrated Circuit) microstrip phased array

    Science.gov (United States)

    Lee, Richard Q.; Smetana, Jerry; Acosta, Roberto

    1987-01-01

    A conceptual design for a microstrip phased array with monolithic microwave integrated circuit (MMIC) amplitude and phase controls is described. The MMIC devices used are 20 GHz variable power amplifiers and variable phase shifters recently developed by NASA contractors for applications in future Ka proposed design, which concept is for a general NxN element array of rectangular lattice geometry. Subarray excitation is incorporated in the MMIC phased array design to reduce the complexity of the beam forming network and the number of MMIC components required.

  17. High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

    Science.gov (United States)

    Shalkhauser, K. A.; Li, K.; Shih, Y. C.

    1992-01-01

    Packaging schemes are developed that provide low-loss, hermetic enclosure for enhanced monolithic microwave and millimeter-wave integrated circuits. These package schemes are based on a fused quartz substrate material offering improved RF performance through 44 GHz. The small size and weight of the packages make them useful for a number of applications, including phased array antenna systems. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices.

  18. Optically controlled phased array antenna concepts using GaAs monolithic microwave integrated circuits

    Science.gov (United States)

    Kunath, R. R.; Bhasin, K. B.

    1986-01-01

    The desire for rapid beam reconfigurability and steering has led to the exploration of new techniques. Optical techniques have been suggested as potential candidates for implementing these needs. Candidates generally fall into one of two areas: those using fiber optic Beam Forming Networks (BFNs) and those using optically processed BFNs. Both techniques utilize GaAs Monolithic Microwave Integrated Circuits (MMICs) in the BFN, but the role of the MMIC for providing phase and amplitude variations is largely eliminated by some new optical processing techniques. This paper discusses these two types of optical BFN designs and provides conceptual designs of both systems.

  19. New Structure for a Six-Port Reflectometer in Monolithic Microwave Integrated-Circuit Technology

    OpenAIRE

    Wiedmann , Frank; Huyart , Bernard; Bergeault , Eric; Jallet , Louis

    1997-01-01

    International audience; This paper presents a new structure for a six-port reflectometer which due to its simplicity can be implemented very easily in monolithic microwave integrated-circuit (MMIC) technology. It uses nonmatched diode detectors with a high input impedance which are placed around a phase shifter in conjunction with a power divider for the reference detector. The circuit has been fabricated using the F20 GaAs process of the GEC–Marconi foundry and operates between 1.3 GHz and 3...

  20. Wideband Monolithic Microwave Integrated Circuit Frequency Converters with GaAs mHEMT Technology

    OpenAIRE

    Krozer, Viktor; Johansen, Tom Keinicke; Djurhuus, Torsten; Vidkjær, Jens

    2005-01-01

    We present monolithic microwave integrated circuit (MMIC) frequency converter, which can be used for up and down conversion, due to the large RF and IF port bandwidth. The MMIC converters are based on commercially available GaAs mHEMT technology and are comprised of a Gilbert mixer cell core, baluns and combiners. Single ended and balanced configurations DC and AC coupled have been investigated. The instantaneous 3 dB bandwidth at both the RF and the IF port of the frequency converters is ∼ 2...

  1. Vertical integration of high-Q silicon nitride microresonators into silicon-on-insulator platform.

    Science.gov (United States)

    Li, Qing; Eftekhar, Ali A; Sodagar, Majid; Xia, Zhixuan; Atabaki, Amir H; Adibi, Ali

    2013-07-29

    We demonstrate a vertical integration of high-Q silicon nitride microresonators into the silicon-on-insulator platform for applications at the telecommunication wavelengths. Low-loss silicon nitride films with a thickness of 400 nm are successfully grown, enabling compact silicon nitride microresonators with ultra-high intrinsic Qs (~ 6 × 10(6) for 60 μm radius and ~ 2 × 10(7) for 240 μm radius). The coupling between the silicon nitride microresonator and the underneath silicon waveguide is based on evanescent coupling with silicon dioxide as buffer. Selective coupling to a desired radial mode of the silicon nitride microresonator is also achievable using a pulley coupling scheme. In this work, a 60-μm-radius silicon nitride microresonator has been successfully integrated into the silicon-on-insulator platform, showing a single-mode operation with an intrinsic Q of 2 × 10(6).

  2. Probing Photocurrent Nonuniformities in the Subcells of Monolithic Perovskite/Silicon Tandem Solar Cells

    KAUST Repository

    Song, Zhaoning

    2016-11-23

    Perovskite/silicon tandem solar cells with high power conversion efficiencies have the potential to become a commercially viable photovoltaic option in the near future. However, device design and optimization is challenging because conventional characterization methods do not give clear feedback on the localized chemical and physical factors that limit performance within individual subcells, especially when stability and degradation is a concern. In this study, we use light beam induced current (LBIC) to probe photocurrent collection nonuniformities in the individual subcells of perovskite/silicon tandems. The choices of lasers and light biasing conditions allow efficiency-limiting effects relating to processing defects, optical interference within the individual cells, and the evolution of water-induced device degradation to be spatially resolved. The results reveal several types of microscopic defects and demonstrate that eliminating these and managing the optical properties within the multilayer structures will be important for future optimization of perovskite/silicon tandem solar cells.

  3. Silicon carbide MOSFET integrated circuit technology

    Energy Technology Data Exchange (ETDEWEB)

    Brown, D.M.; Downey, E.; Ghezzo, M.; Kretchmer, J.; Krishnamurthy, V.; Hennessy, W.; Michon, G. [General Electric Co., Schenectady, NY (United States). Corporate Research and Development Center

    1997-07-16

    The research and development activities carried out to demonstrate the status of MOS planar technology for the manufacture of high temperature SiC ICs will be described. These activities resulted in the design, fabrication and demonstration of the World`s first SiC analog IC - a monolithic MOSFET operational amplifier. Research tasks required for the development of a planar SiC MOSFET IC technology included characterization of the SiC/SiO{sub 2} interface using thermally grown oxides: high temperature (350 C) reliability studies of thermally grown oxides: ion implantation studies of donor (N) and acceptor (B) dopants to form junction diodes: epitaxial layer characterization: N channel inversion and depletion mode MOSFETs; device isolation methods and finally integrated circuit design, fabrication and testing of the World`s first monolithic SiC operational amplifier IC. These studies defined a SiC n-channel depletion mode MOSFET IC technology and outlined tasks required to improve all types of SiC devices. For instance, high temperature circuit drift instabilities at 350 C were discovered and characterized. This type of instability needs to be understood and resolved because it affects the high temperature reliability of other types of SiC devices. Improvements in SiC wafer surface quality and the use of deposited oxides instead of thermally grown SiO{sub 2} gate dielectrics will probably be required for enhanced reliability. The slow reverse recovery time exhibited by n{sup +}-p diodes formed by N ion implantation is a problem that needs to be resolved for all types of planar bipolar devices. The reproducibility of acceptor implants needs to be improved before CMOS ICs and many types of power device structures will be manufacturable. (orig.) 51 refs.

  4. Photonic integration and photonics-electronics convergence on silicon platform

    CERN Document Server

    Liu, Jifeng; Baba, Toshihiko; Vivien, Laurent; Xu, Dan-Xia

    2015-01-01

    Silicon photonics technology, which has the DNA of silicon electronics technology, promises to provide a compact photonic integration platform with high integration density, mass-producibility, and excellent cost performance. This technology has been used to develop and to integrate various photonic functions on silicon substrate. Moreover, photonics-electronics convergence based on silicon substrate is now being pursued. Thanks to these features, silicon photonics will have the potential to be a superior technology used in the construction of energy-efficient cost-effective apparatuses for various applications, such as communications, information processing, and sensing. Considering the material characteristics of silicon and difficulties in microfabrication technology, however, silicon by itself is not necessarily an ideal material. For example, silicon is not suitable for light emitting devices because it is an indirect transition material. The resolution and dynamic range of silicon-based interference de...

  5. InP membrane on silicon integration technology

    NARCIS (Netherlands)

    Smit, M.K.

    2013-01-01

    Integration of light sources in silicon photonics is usually done with an active InP-based layer stack on a silicon-based photonic circuit-layer. InP Membrane On Silicon (IMOS) technology integrates all functionality in a single InP-based layer.

  6. Hybrid integrated single-wavelength laser with silicon micro-ring reflector

    Science.gov (United States)

    Ren, Min; Pu, Jing; Krishnamurthy, Vivek; Xu, Zhengji; Lee, Chee-Wei; Li, Dongdong; Gonzaga, Leonard; Toh, Yeow T.; Tjiptoharsono, Febi; Wang, Qian

    2018-02-01

    A hybrid integrated single-wavelength laser with silicon micro-ring reflector is demonstrated theoretically and experimentally. It consists of a heterogeneously integrated III-V section for optical gain, an adiabatic taper for light coupling, and a silicon micro-ring reflector for both wavelength selection and light reflection. Heterogeneous integration processes for multiple III-V chips bonded to an 8-inch Si wafer have been developed, which is promising for massive production of hybrid lasers on Si. The III-V layer is introduced on top of a 220-nm thick SOI layer through low-temperature wafer-boning technology. The optical coupling efficiency of >85% between III-V and Si waveguide has been achieved. The silicon micro-ring reflector, as the key element of the hybrid laser, is studied, with its maximized reflectivity of 85.6% demonstrated experimentally. The compact single-wavelength laser enables fully monolithic integration on silicon wafer for optical communication and optical sensing application.

  7. Monolithic photonic integration technology platform and devices at wavelengths beyond 2 μm for gas spectroscopy applications

    NARCIS (Netherlands)

    Latkowski, S.; van Veldhoven, P.J.; Hänsel, A.; D'Agostino, D.; Rabbani-Haghighi, H.; Docter, B.; Bhattacharya, N.; Thijs, P.J.A.; Ambrosius, H.P.M.M.; Smit, M.K.; Williams, K.A.; Bente, E.A.J.M.

    2017-01-01

    In this paper a generic monolithic photonic integration technology platform and tunable laser devices for gas sensing applications at 2 μm will be presented. The basic set of long wavelength optical functions which is fundamental for a generic photonic integration approach is realized using planar,

  8. Multi-wavelength laser based on an arrayed waveguide grating and Sagnac loop reflectors monolithically integrated on InP

    NARCIS (Netherlands)

    Muñoz, P.; García-Olcina, R.; Doménech, J.D.; Rius, M.; Capmany, J.; Chen, L.R.; Habib, C.; Leijtens, X.J.M.; Vries, de T.; Heck, M.J.R.; Augustin, L.M.; Nötzel, R.; Robbins, D.J.

    2010-01-01

    In this paper, a multi-wavelength laser monolithically integrated on InP is presented. A linear laser cavity is built between two integrated Sagnac loop reflectors, with an Arrayed Waveguide Grating (AWG) as frequency selective device, and Semiconductor Optical Amplifiers (SOA) as gain sections. The

  9. Monolithically integrated quantum dot optical modulator with Semiconductor optical amplifier for short-range optical communications

    Science.gov (United States)

    Yamamoto, Naokatsu; Akahane, Kouichi; Umezawa, Toshimasa; Kawanishi, Tetsuya

    2015-04-01

    A monolithically integrated quantum dot (QD) optical gain modulator (OGM) with a QD semiconductor optical amplifier (SOA) was successfully developed. Broadband QD optical gain material was used to achieve Gbps-order high-speed optical data transmission, and an optical gain change as high as approximately 6-7 dB was obtained with a low OGM voltage of 2.0 V. Loss of optical power due to insertion of the device was also effectively compensated for by the SOA section. Furthermore, it was confirmed that the QD-OGM/SOA device helped achieve 6.0-Gbps error-free optical data transmission over a 2.0-km-long photonic crystal fiber. We also successfully demonstrated generation of Gbps-order, high-speed, and error-free optical signals in the >5.5-THz broadband optical frequency bandwidth larger than the C-band. These results suggest that the developed monolithically integrated QD-OGM/SOA device will be an advantageous and compact means of increasing the usable optical frequency channels for short-reach communications.

  10. Technology development for SOI monolithic pixel detectors

    International Nuclear Information System (INIS)

    Marczewski, J.; Domanski, K.; Grabiec, P.; Grodner, M.; Jaroszewicz, B.; Kociubinski, A.; Kucharski, K.; Tomaszewski, D.; Caccia, M.; Kucewicz, W.; Niemiec, H.

    2006-01-01

    A monolithic detector of ionizing radiation has been manufactured using silicon on insulator (SOI) wafers with a high-resistivity substrate. In our paper the integration of a standard 3 μm CMOS technology, originally designed for bulk devices, with fabrication of pixels in the bottom wafer of a SOI substrate is described. Both technological sequences have been merged minimizing thermal budget and providing suitable properties of all the technological layers. The achieved performance proves that fully depleted monolithic active pixel matrix might be a viable option for a wide spectrum of future applications

  11. The upgrade of the ALICE Inner Tracking System - Status of the R&D; on monolithic silicon pixel sensors

    CERN Document Server

    Van Hoorne, Jacobus Willem

    2014-01-01

    s a major part of its upgrade plans, the ALICE experiment schedules the installation of a novel Inner Tracking System (ITS) during the Long Shutdown 2 (LS2) of the LHC in 2018/19. It will replace the present silicon tracker with seven layers of Monolithic Active Pixel Sensors (MAPS) and significantly improve the detector performance in terms of tracking and rate capabilities. The choice of technology has been guided by the tight requirements on the material budget of 0 : 3 % X = X 0 /layer for the three innermost layers and backed by the significant progress in the field of MAPS in recent years. The pixel chips are manufactured in the TowerJazz 180 nm CMOS imaging sensor process on wafers with a high resistivity epitaxial layer. Within the ongoing R&D; phase, several sensor chip prototypes have been developed and produced on different epitaxial layer thicknesses and resistivities. These chips are being characterized for their performance before and after irradiation using source tests, test beam and measu...

  12. A bipolar monolithic preamplifier for high-capacitance SSC [Superconducting Super Collider] silicon calorimetry

    International Nuclear Information System (INIS)

    Britton, C.L. Jr.; Kennedy, E.J.; Bugg, W.M.

    1990-01-01

    This paper describes a preamplifier designed and fabricated specifically to address the requirements of silicon calorimetry for the Superconducting Super Collider (SSC). The topology and its features are discussed in addition to the design methodology employed. The simulated and measured results for noise, power consumption, and speed are presented. Simulated an measured data for radiation damage effects as well as data for post-damage annealing are also presented. 8 refs., 7 figs., 2 tabs

  13. All-optical SR flip-flop based on SOA-MZI switches monolithically integrated on a generic InP platform

    Science.gov (United States)

    Pitris, St.; Vagionas, Ch.; Kanellos, G. T.; Kisacik, R.; Tekin, T.; Broeke, R.; Pleros, N.

    2016-03-01

    At the dawning of the exaflop era, High Performance Computers are foreseen to exploit integrated all-optical elements, to overcome the speed limitations imposed by electronic counterparts. Drawing from the well-known Memory Wall limitation, imposing a performance gap between processor and memory speeds, research has focused on developing ultra-fast latching devices and all-optical memory elements capable of delivering buffering and switching functionalities at unprecedented bit-rates. Following the master-slave configuration of electronic Flip-Flops, coupled SOA-MZI based switches have been theoretically investigated to exceed 40 Gb/s operation, provided a short coupling waveguide. However, this flip-flop architecture has been only hybridly integrated with silica-on-silicon integration technology exhibiting a total footprint of 45x12 mm2 and intra-Flip-Flop coupling waveguide of 2.5cm, limited at 5 Gb/s operation. Monolithic integration offers the possibility to fabricate multiple active and passive photonic components on a single chip at a close proximity towards, bearing promises for fast all-optical memories. Here, we present for the first time a monolithically integrated all-optical SR Flip-Flop with coupled master-slave SOA-MZI switches. The photonic chip is integrated on a 6x2 mm2 die as a part of a multi-project wafer run using library based components of a generic InP platform, fiber-pigtailed and fully packaged on a temperature controlled ceramic submount module with electrical contacts. The intra Flip-Flop coupling waveguide is 5 mm long, reducing the total footprint by two orders of magnitude. Successful flip flop functionality is evaluated at 10 Gb/s with clear open eye diagram, achieving error free operation with a power penalty of 4dB.

  14. Hybrid graphene/silicon integrated optical isolators with photonic spin–orbit interaction

    International Nuclear Information System (INIS)

    Ma, Jingwen; Sun, Xiankai; Xi, Xiang; Yu, Zejie

    2016-01-01

    Optical isolators are an important building block in photonic computation and communication. In traditional optics, isolators are realized with magneto-optical garnets. However, it remains challenging to incorporate such materials on an integrated platform because of the difficulty in material growth and bulky device footprint. Here, we propose an ultracompact integrated isolator by exploiting graphene's magneto-optical property on a silicon-on-insulator platform. The photonic nonreciprocity is achieved because the cyclotrons in graphene experiencing different optical spins exhibit different responses to counterpropagating light. Taking advantage of cavity resonance effects, we have numerically optimized a device design, which shows excellent isolation performance with the extinction ratio over 45 dB and the insertion loss around 12 dB at a wavelength near 1.55 μm. Featuring graphene's CMOS compatibility and substantially reduced device footprint, our proposal sheds light on monolithic integration of nonreciprocal photonic devices.

  15. Monolithic integration of collimating Fresnel lens for beam quality enhancement in tapered high-power laser diode

    NARCIS (Netherlands)

    Lau, F.K.; Tee, C.W.; Zhao, Xin; Williams, K.A.; Penty, R.V.; White, I.H.; Calligaro, M.; Lecomte, M.; Parillaud, O.; Michel, N.; Krakowski, M.

    2006-01-01

    We demonstrate, for the first time, a monolithic integrated lens for wide aperture gain-guided tapered laser beam quality enhancement by compensating the quadratic phase curvature. The 3mm long tapered laser with an output aperture of 170µm adopted in this design consists of a gain-guided tapered

  16. Monolithically integrated biophotonic lab-on-a-chip for cell culture and simultaneous pH monitoring

    NARCIS (Netherlands)

    Munoz-Berbel, Xavier; Rodriguez-Rodriguez, Rosalia; Vigues, Nuria; Demming, Stefanie; Mas, Jordi; Buettgenbach, Stephanus; Verpoorte, Elisabeth; Ortiz, Pedro; Llobera, Andreu

    2013-01-01

    A poly(dimethylsiloxane) biophotonic lab-on-a-chip (bioPhLoC) containing two chambers, an incubation chamber and a monitoring chamber for cell retention/proliferation and pH monitoring, respectively, is presented. The bioPhLoC monolithically integrates a filter with 3 mu m high size-exclusion

  17. A bit-rate flexible and power efficient all-optical demultiplexer realised by monolithically integrated Michelson interferometer

    DEFF Research Database (Denmark)

    Vaa, Michael; Mikkelsen, Benny; Jepsen, Kim Stokholm

    1996-01-01

    A novel bit-rate flexible and very power efficient all-optical demultiplexer using differential optical control of a monolithically integrated Michelson interferometer with MQW SOAs is demonstrated at 40 to 10 Gbit/s. Gain switched DFB lasers provide ultra stable data and control signals....

  18. Telescope and mirrors development for the monolithic silicon carbide instrument of the osiris narrow angle camera

    Science.gov (United States)

    Calvel, Bertrand; Castel, Didier; Standarovski, Eric; Rousset, Gérard; Bougoin, Michel

    2017-11-01

    The international Rosetta mission, now planned by ESA to be launched in January 2003, will provide a unique opportunity to directly study the nucleus of comet 46P/Wirtanen and its activity in 2013. We describe here the design, the development and the performances of the telescope of the Narrow Angle Camera of the OSIRIS experiment et its Silicon Carbide telescope which will give high resolution images of the cometary nucleus in the visible spectrum. The development of the mirrors has been specifically detailed. The SiC parts have been manufactured by BOOSTEC, polished by STIGMA OPTIQUE and ion figured by IOM under the prime contractorship of ASTRIUM. ASTRIUM was also in charge of the alignment. The final optical quality of the aligned telescope is 30 nm rms wavefront error.

  19. Monolithic exploding foil initiator

    Science.gov (United States)

    Welle, Eric J; Vianco, Paul T; Headley, Paul S; Jarrell, Jason A; Garrity, J. Emmett; Shelton, Keegan P; Marley, Stephen K

    2012-10-23

    A monolithic exploding foil initiator (EFI) or slapper detonator and the method for making the monolithic EFI wherein the exploding bridge and the dielectric from which the flyer will be generated are integrated directly onto the header. In some embodiments, the barrel is directly integrated directly onto the header.

  20. Single-frequency, fully integrated, miniature DPSS laser based on monolithic resonator

    Science.gov (United States)

    Dudzik, G.; Sotor, J.; Krzempek, K.; Soboń, G.; Abramski, K. M.

    2014-02-01

    We present a single frequency, stable, narrow linewidth, miniature laser sources operating at 532 nm (or 1064 nm) based on a monolithic resonators. Such resonators utilize birefringent filters formed by YVO4 beam displacer and KTP or YVO4 crystals to force single frequency operation at 532 nm or 1064 nm, respectively. In both configurations Nd:YVO4 gain crystal is used. The resonators dimensions are 1x1x10.5 mm3 and 1x1x8.5 mm3 for green and infrared configurations, respectively. Presented laser devices, with total dimensions of 40x52x120 mm3, are fully equipped with driving electronics, pump diode, optical and mechanical components. The highly integrated (36x15x65 mm3) low noise driving electronics with implemented digital PID controller was designed. It provides pump current and resonator temperature stability of ±30 μA@650 mA and ±0,003ºC, respectively. The laser parameters can be set and monitored via the USB interface by external application. The developed laser construction is universal. Hence, the other wavelengths can be obtained only by replacing the monolithic resonator. The optical output powers in single frequency regime was at the level of 42 mW@532 nm and 0.5 W@1064 nm with the long-term fluctuations of ±0.85 %. The linewidth and the passive frequency stability under the free running conditions were Δν < 100 kHz and 3ṡ10-9@1 s integration time, respectively. The total electrical power supply consumption of laser module was only 4 W. Presented compact, single frequency laser operating at 532 nm and 1064 nm may be used as an excellent source for laser vibrometry, interferometry or seed laser for fiber amplifiers.

  1. Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

    2016-01-01

    -division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-oninsulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7x7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror......, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained...

  2. Long-wavelength III-V/silicon photonic integrated circuits

    NARCIS (Netherlands)

    Roelkens, G.C.; Kuyken, B.; Leo, F.; Hattasan, N.; Ryckeboer, E.M.P.; Muneeb, M.; Hu, C.L.; Malik, A.; Hens, Z.; Baets, R.G.F.; Shimura, Y.; Gencarelli, F.; Vincent, B.; Loo, van de R.; Verheyen, P.A.; Lepage, G.; Campenhout, van J.; Cerutti, L.; Rodriquez, J.B.; Tournie, E.; Chen, X; Nedeljkovic, G.; Mashanovich, G.; Liu, X.; Green, W.S.

    2013-01-01

    We review our work in the field of short-wave infrared and mid-infrared photonic integrated circuits for applications in spectroscopic sensing systems. Passive silicon waveguide circuits, GeSn photodetectors, the integration of III-V and IV-VI semiconductors on these circuits, and silicon nonlinear

  3. Monolithically integrated fiber-to-the-home diplexers and triplexers using a bilevel etched 2 x 2 optical coupler.

    Science.gov (United States)

    Zhang, Li; Wang, Lei; He, Jian-Jun

    2009-09-01

    A novel design of monolithically integrated diplexers and triplexers for fiber-to-the-home applications is presented. A bilevel etched asymmetrical 2 x 2 optical coupler is analyzed for efficient couplings of both upstream and downstream signals. The design of the diplexer is extended to a triplexer by adding an etched diffraction grating as an additional downstream demultiplexing element. The total size of the integrated diplexer and triplexer is smaller than 500 microm x 500 microm.

  4. Avalanche-mode silicon LEDs for monolithic optical coupling in CMOS technology

    NARCIS (Netherlands)

    Dutta, Satadal

    2017-01-01

    Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuit (IC) technology is the most commercially successful platform in modern electronic and control systems. So called "smart power" technologies such as Bipolar CMOS DMOS (BCD), combine the computational power of CMOS with high voltage

  5. Study of monolithic integrated solar blind GaN-based photodetectors

    Science.gov (United States)

    Wang, Ling; Zhang, Yan; Li, Xiaojuan; Xie, Jing; Wang, Jiqiang; Li, Xiangyang

    2018-02-01

    Monolithic integrated solar blind devices on the GaN-based epilayer, which can directly readout voltage signal, were fabricated and studied. Unlike conventional GaN-based photodiodes, the integrated devices can finish those steps: generation, accumulation of carriers and conversion of carriers to voltage. In the test process, the resetting voltage was square wave with the frequency of 15 and 110 Hz, its maximal voltage of ˜2.5 V. Under LEDs illumination, the maximum of voltage swing is about 2.5 V, and the rise time of voltage swing from 0 to 2.5 V is only about 1.6 ms. However, in dark condition, the node voltage between detector and capacitance nearly decline to zero with time when the resetting voltage was equal to zero. It is found that the leakage current in the circuit gives rise to discharge of the integrated charge. Storage mode operation can offer gain, which is advantage to detection of weak photo signal.

  6. Zinc tin oxide as high-temperature stable recombination layer for mesoscopic perovskite/silicon monolithic tandem solar cells

    KAUST Repository

    Werner, Jé ré mie; Walter, Arnaud; Rucavado, Esteban; Moon, Soo Jin; Sacchetto, Davide; Rienaecker, Michael; Peibst, Robby; Brendel, Rolf; Niquille, Xavier; De Wolf, Stefaan; Lö per, Philipp; Morales-Masis, Monica; Nicolay, Sylvain; Niesen, Bjoern; Ballif, Christophe

    2016-01-01

    the concept, we fabricate monolithic tandem cells with mesoscopic top cell with up to 16% efficiency. We then investigate the effect of zinc tin oxide layer thickness variation, showing a strong influence on the optical interference pattern within the tandem

  7. Amorphous silicon based particle detectors

    OpenAIRE

    Wyrsch, N.; Franco, A.; Riesen, Y.; Despeisse, M.; Dunand, S.; Powolny, F.; Jarron, P.; Ballif, C.

    2012-01-01

    Radiation hard monolithic particle sensors can be fabricated by a vertical integration of amorphous silicon particle sensors on top of CMOS readout chip. Two types of such particle sensors are presented here using either thick diodes or microchannel plates. The first type based on amorphous silicon diodes exhibits high spatial resolution due to the short lateral carrier collection. Combination of an amorphous silicon thick diode with microstrip detector geometries permits to achieve micromete...

  8. Study of a solid state micro-dosemeter based on a monolithic silicon telescope: Irradiations with low-energy neutrons and direct comparison with a cylindrical TEPC

    International Nuclear Information System (INIS)

    Agosteo, S.; Colautti, P.; Fanton, I.; Fazzi, A.; Introini, M. V.; Moro, D.; Pola, A.; Varoli, V.

    2011-01-01

    A silicon device based on the monolithic silicon telescope technology coupled to a tissue-equivalent converter was proposed and investigated for solid state microdosimetry. The detector is constituted by a DE stage about 2 μm in thickness geometrically segmented in a matrix of micrometric diodes and a residual-energy measurement stage E about 500 μm in thickness. Each thin diode has a cylindrical sensitive volume 9 μm in nominal diameter, similar to that of a cylindrical tissue-equivalent proportional counter (TEPC). The silicon device and a cylindrical TEPC were irradiated in the same experimental conditions with quasi-monoenergetic neutrons of energy between 0.64 and 2.3 MeV at the INFN-Legnaro National Laboratories (LNLINFN, Legnaro (Italy)). The aim was to study the capability of the silicon-based system of reproducing microdosimetric spectra similar to those measured by a reference micro-dosemeter. The TEPC was set in order to simulate a tissue site about 2 μm in diameter. The spectra of the energy imparted to the ΔE stage of the silicon telescope were corrected for tissue-equivalence through an optimized procedure that exploits the information from the residual energy measurement stage E. A geometrical correction based on parametric criteria for shape-equivalence was also applied. The agreement between the dose distributions of lineal energy and the corresponding mean values is satisfactory at each neutron energy considered. (authors)

  9. Monolithically integrated quantum dot optical modulator with semiconductor optical amplifier for thousand and original band optical communication

    Science.gov (United States)

    Yamamoto, Naokatsu; Akahane, Kouichi; Umezawa, Toshimasa; Matsumoto, Atsushi; Kawanishi, Tetsuya

    2016-04-01

    A monolithically integrated quantum dot (QD) optical gain modulator (OGM) with a QD semiconductor optical amplifier (SOA) was successfully developed with T-band (1.0 µm waveband) and O-band (1.3 µm waveband) QD optical gain materials for Gbps-order, high-speed optical data generation. The insertion loss due to coupling between the device and the optical fiber was effectively compensated for by the SOA section. It was also confirmed that the monolithic QD-OGM/SOA device enabled >4.8 Gbps optical data generation with a clear eye opening in the T-band. Furthermore, we successfully demonstrated error-free 4.8 Gbps optical data transmissions in each of the six wavelength channels over a 10-km-long photonic crystal fiber using the monolithic QD-OGM/SOA device in multiple O-band wavelength channels, which were generated by the single QD gain chip. These results suggest that the monolithic QD-OGM/SOA device will be advantageous in ultra-broadband optical frequency systems that utilize the T+O-band for short- and medium-range optical communications.

  10. Amorphous silicon rich silicon nitride optical waveguides for high density integrated optics

    DEFF Research Database (Denmark)

    Philipp, Hugh T.; Andersen, Karin Nordström; Svendsen, Winnie Edith

    2004-01-01

    Amorphous silicon rich silicon nitride optical waveguides clad in silica are presented as a high-index contrast platform for high density integrated optics. Performance of different cross-sectional geometries have been measured and are presented with regards to bending loss and insertion loss...

  11. Monolithic integration of optical waveguides for absorbance detection in microfabricated electrophoresis devices

    DEFF Research Database (Denmark)

    Mogensen, Klaus Bo; Petersen, Nickolaj Jacob; Hübner, Jörg

    2001-01-01

    . The waveguides on the device were connected to optical fibers, which enabled alignment free operation due to the absence of free-space optics. A 750 mum long U-shaped detection cell was used to facilitate longitudinal absorption detection. To minimize geometrically induced band broadening at the turn in the U......The fabrication and performance of an electrophoretic separation chip with integrated of optical waveguides for absorption detection is presented. The device was fabricated on a silicon substrate by standard microfabrication techniques with the use of two photolithographic mask steps...

  12. Field-effect piezoresistors for vibration detection of nanobeams by using monolithically integrated MOS capacitors

    International Nuclear Information System (INIS)

    Cheng, Haitao; Yang, Heng; Li, XinXin; Wang, Yuelin

    2013-01-01

    A novel piezoresistive sensing method is presented herein for the detection of nanobeam resonator based on a monolithically integrated MOS (metal–oxide–semiconductor) capacitor structure. The bottom layer of the nanobeam located beneath the MOS capacitor is utilized as a piezoresistor for the detection of internal stress resulting from nanobeam deformation, and therefore the challenging process of ultra-shallow junction doping is avoided. When a bias voltage applied on the MOS gate exceeds the threshold, the depletion layer width is built up to the maximum, and the piezoresistive cancellation effect beside the neutral plane is eliminated. Based on a conventional microelectromechanical (MEMS) process, an MOS capacitor is fabricated at the terminal of a double-clamped nanobeam with dimensions of 46 µm × 7 µm × 149 nm. The measured R–V curve of this MOS structure presents a 64.7 nm thick piezoresistor which closely agrees with the design. This double-clamped nanobeam is excited into mechanical resonance by mounting it on a piezoelectric ceramic, and the amplitude–frequency response is measured by a network analyzer. The measured resonant frequency is 3.97 MHz and the quality (Q)-factor is 82 in atmosphere environment. Besides, this piezoresistive sensing method is verified by a laser-Doppler vibrometry. (paper)

  13. A novel symmetrical microwave power sensor based on GaAs monolithic microwave integrated circuit technology

    International Nuclear Information System (INIS)

    Wang, De-bo; Liao, Xiao-ping

    2009-01-01

    A novel symmetrical microwave power sensor based on GaAs monolithic microwave integrated circuit (MMIC) technology is presented in this paper. In this power sensor, the left section inputs the microwave power, while the right section inputs the dc power. Because of the symmetrical structure, this power sensor is created to provide more accurate microwave power measurement capability without mismatch uncertainty and restrain temperature drift. The loss model is built and the loss voltage is 0.8 mV at 20 GHz when the input power is 100 mW. This power sensor is designed and fabricated using GaAs MMIC technology. And it is measured in the frequency range up to 20 GHz with the input power in the −20 dBm to 19 dBm range. Over the 19 dBm dynamic range, the sensitivity can achieve about 0.2 mV mW −1 . The difference between the input powers in the two sections is below 0.1% for equal output voltages. For an amplitude modulation measurement, the carrier frequency is the main factor to influence the measurement results. In short, the key aspect of this power sensor is that the microwave power measurement can be replaced by a dc power measurement with precise wideband

  14. An electro-magnetic micromachined actuator monolithically integrated with a vertical shutter for variable optical attenuation

    International Nuclear Information System (INIS)

    Hung, Shao Hsuan; Hsieh, Hsin-Ta; John Su, Guo-Dung

    2008-01-01

    The design, fabrication and test results of an electromagnetic-actuated micromachined variable optical attenuator (VOA) are reported in this paper. Optical attenuation is achieved by moving a shutter into the light path between a pair of single mode fiber collimators. The shutter, consisting of a 500 µm × 1200 µm vertical micromirror, is monolithically integrated with an actuation flap. The micromirror was made by tetra-methyl ammonium hydroxide (TMAH) anisotropic wet etching with a sharp edge and a smooth reflecting surface. By arranging fiber collimators in different configurations, the reported VOA can be used as either normally-on or normally-off modes due to its relatively large shutter surface. The insertion loss of the VOA is 0.2 dB and 0.4 dB for normally-on and normally-off modes, respectively. Both optical and mechanical simulation models of the device were discussed, and the theoretical calculations based on these models offered an efficient way to predict the performance of the shutter-type VOA. The controllable attenuation range is approximately 40 dB with a driving voltage less than 0.5 V, and the driving power is less than 2 mW. A response time of 5 ms is achieved by applying proper driving waveform

  15. Mid-infrared integrated photonics on silicon: a perspective

    Directory of Open Access Journals (Sweden)

    Lin Hongtao

    2017-12-01

    Full Text Available The emergence of silicon photonics over the past two decades has established silicon as a preferred substrate platform for photonic integration. While most silicon-based photonic components have so far been realized in the near-infrared (near-IR telecommunication bands, the mid-infrared (mid-IR, 2–20-μm wavelength band presents a significant growth opportunity for integrated photonics. In this review, we offer our perspective on the burgeoning field of mid-IR integrated photonics on silicon. A comprehensive survey on the state-of-the-art of key photonic devices such as waveguides, light sources, modulators, and detectors is presented. Furthermore, on-chip spectroscopic chemical sensing is quantitatively analyzed as an example of mid-IR photonic system integration based on these basic building blocks, and the constituent component choices are discussed and contrasted in the context of system performance and integration technologies.

  16. A 40-GBd QPSK/16-QAM integrated silicon coherent receiver

    NARCIS (Netherlands)

    Verbist, J.; Zhang, J.; Moeneclaey, B.; Soenen, W.; Van Weerdenburg, J.J.A.; Van Uden, R.; Okonkwo, C.M.; Bauwelinck, J.; Roelkens, G.; Yin, X.

    2016-01-01

    Through co-design of a dual SiGe transimpedance amplifier and an integrated silicon photonic circuit, we realized for the first time an ultra-compact and low-power silicon single-polarization coherent receiver operating at 40 GBd. A bit-error rate of <3.8× 10-3 was obtained for an optical

  17. Monolithic photonic integrated circuit with a GaN-based bent waveguide

    Science.gov (United States)

    Cai, Wei; Qin, Chuan; Zhang, Shuai; Yuan, Jialei; Zhang, Fenghua; Wang, Yongjin

    2018-06-01

    Integration of a transmitter, waveguide and receiver into a single chip can generate a multicomponent system with multiple functionalities. Here, we fabricate and characterize a GaN-based photonic integrated circuit (PIC) on a GaN-on-silicon platform. With removal of the silicon and back wafer thinning of the epitaxial film, ultrathin membrane-type devices and highly confined suspended GaN waveguides were formed. Two suspended-membrane InGaN/GaN multiple-quantum-well diodes (MQW-diodes) served as an MQW light-emitting diode (MQW-LED) to emit light and an MQW photodiode (MQW-PD) to sense light. The optical interconnects between the MQW-LED and MQW-PD were achieved using the GaN bent waveguide. The GaN-based PIC consisting of an MQW-LED, waveguides and an MQW-PD forms an in-plane light communication system with a data transmission rate of 70 Mbps.

  18. Flexible integration of free-standing nanowires into silicon photonics.

    Science.gov (United States)

    Chen, Bigeng; Wu, Hao; Xin, Chenguang; Dai, Daoxin; Tong, Limin

    2017-06-14

    Silicon photonics has been developed successfully with a top-down fabrication technique to enable large-scale photonic integrated circuits with high reproducibility, but is limited intrinsically by the material capability for active or nonlinear applications. On the other hand, free-standing nanowires synthesized via a bottom-up growth present great material diversity and structural uniformity, but precisely assembling free-standing nanowires for on-demand photonic functionality remains a great challenge. Here we report hybrid integration of free-standing nanowires into silicon photonics with high flexibility by coupling free-standing nanowires onto target silicon waveguides that are simultaneously used for precise positioning. Coupling efficiency between a free-standing nanowire and a silicon waveguide is up to ~97% in the telecommunication band. A hybrid nonlinear-free-standing nanowires-silicon waveguides Mach-Zehnder interferometer and a racetrack resonator for significantly enhanced optical modulation are experimentally demonstrated, as well as hybrid active-free-standing nanowires-silicon waveguides circuits for light generation. These results suggest an alternative approach to flexible multifunctional on-chip nanophotonic devices.Precisely assembling free-standing nanowires for on-demand photonic functionality remains a challenge. Here, Chen et al. integrate free-standing nanowires into silicon waveguides and show all-optical modulation and light generation on silicon photonic chips.

  19. Hydrogen-terminated mesoporous silicon monoliths with huge surface area as alternative Si-based visible light-active photocatalysts

    KAUST Repository

    Li, Ting; Li, Jun; Zhang, Qiang; Blazeby, Emma; Shang, Congxiao; Xu, Hualong; Zhang, Xixiang; Chao, Yimin

    2016-01-01

    Silicon-based nanostructures and their related composites have drawn tremendous research interest in solar energy storage and conversion. Mesoporous silicon with a huge surface area of 400-900 m2 g-1 developed by electrochemical etching exhibits

  20. High-performance hybrid complementary logic inverter through monolithic integration of a MEMS switch and an oxide TFT.

    Science.gov (United States)

    Song, Yong-Ha; Ahn, Sang-Joon Kenny; Kim, Min-Wu; Lee, Jeong-Oen; Hwang, Chi-Sun; Pi, Jae-Eun; Ko, Seung-Deok; Choi, Kwang-Wook; Park, Sang-Hee Ko; Yoon, Jun-Bo

    2015-03-25

    A hybrid complementary logic inverter consisting of a microelectromechanical system switch as a promising alternative for the p-type oxide thin film transistor (TFT) and an n-type oxide TFT is presented for ultralow power integrated circuits. These heterogeneous microdevices are monolithically integrated. The resulting logic device shows a distinctive voltage transfer characteristic curve, very low static leakage, zero-short circuit current, and exceedingly high voltage gain. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Test of the TRAPPISTe monolithic detector system

    Science.gov (United States)

    Soung Yee, L.; Álvarez, P.; Martin, E.; Cortina, E.; Ferrer, C.

    2013-12-01

    A monolithic pixel detector named TRAPPISTe-2 has been developed in Silicon-on-Insulator (SOI) technology. A p-n junction is implanted in the bottom handle wafer and connected to readout electronics integrated in the top active layer. The two parts are insulated from each other by a buried oxide layer resulting in a monolithic detector. Two small pixel matrices have been fabricated: one containing a 3-transistor readout and a second containing a charge sensitive amplifier readout. These two readout structures have been characterized and the pixel matrices were tested with an infrared laser source. The readout circuits are adversely affected by the backgate effect, which limits the voltage that can be applied to the metal back plane to deplete the sensor, thus narrowing the depletion width of the sensor. Despite the low depletion voltages, the integrated pixel matrices were able to respond to and track a laser source.

  2. arXiv Test beam measurement of the first prototype of the fast silicon pixel monolithic detector for the TT-PET project

    CERN Document Server

    Paolozzi, L.; Benoit, M.; Cardarelli, R.; Débieux, S.; Forshaw, D.; Hayakawa, D.; Iacobucci, G.; Kaynak, M.; Miucci, A.; Nessi, M.; Ratib, O.; Ripiccini, E.; Rücker, H.; Valerio, P.; Weber, M.

    2018-04-12

    The TT-PET collaboration is developing a PET scanner for small animals with  30 ps  time-of-flight resolution and sub-millimetre 3D detection granularity. The sensitive element of the scanner is a monolithic silicon pixel detector based on state-of-the-art SiGe BiCMOS technology. The first ASIC prototype for the TT-PET was produced and tested in the laboratory and with minimum ionizing particles. The electronics exhibit an equivalent noise charge below  600 e− RMS  and a pulse rise time of less than  2 ns , in accordance with the simulations. The pixels with a capacitance of  0.8 pF  were measured to have a detection efficiency greater than  99%  and, although in the absence of the post-processing, a time resolution of approximately  200 ps .

  3. Silicon Carbide Power Devices and Integrated Circuits

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan; Samsel, Isaak; LaBel, Ken; Chen, Yuan; Ikpe, Stanley; Wilcox, Ted; Phan, Anthony; Kim, Hak; Topper, Alyson

    2017-01-01

    An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

  4. Simplified Monolithic Flow Cytometer Chip With Three-Dimensional Hydrodyanmic Focusing And Integrated Fiber-Free Optics

    DEFF Research Database (Denmark)

    Motosuke, Masahiro; Jensen, Thomas Glasdam; Zhuang, Guisheng

    2011-01-01

    A miniaturized flow cytometry incorporating both fluidic and optical systems has a great possibility for portable biochemical sensing or point-of-care diagnostics. This paper presents a simple microfluidic flow cytometer combining reliable 3D hydrodynamic focusing and optical detection without...... optical fibers in a monolithic architecture fabricated by a single photolithographic process. The vertical flow focusing is achieved by the optimized inlet geometry in a PDMS lid onto the substrate with detection channel and integrated optics. The simplified approach indicates the possibility...

  5. Large microwave tunability of GaAs-based multiferroic heterostructure for applications in monolithic microwave integrated circuits

    International Nuclear Information System (INIS)

    Chen Yajie; Gao Jinsheng; Vittoria, C; Harris, V G; Heiman, D

    2010-01-01

    Microwave magnetoelectric coupling in a ferroelectric/ferromagnetic/semiconductor multiferroic (MF) heterostructure, consisting of a Co 2 MnAl epitaxial film grown on a GaAs substrate bonded to a lead magnesium niobate-lead titanate (PMN-PT) crystal, is reported. Ferromagnetic resonance measurements were carried out at X-band under the application of electric fields. Results indicate a frequency tuning of 125 MHz for electric field strength of 8 kV cm -1 resulting in a magnetoelectric coupling coefficient of 3.4 Oe cm kV -1 . This work explores the potential of electronically controlled MF devices for use in future monolithic microwave integrated circuits.

  6. InP-based monolithically integrated 1310/1550nm diplexer/triplexer

    Science.gov (United States)

    Silfvenius, C.; Swillo, M.; Claesson, J.; Forsberg, E.; Akram, N.; Chacinski, M.; Thylén, L.

    2008-11-01

    Multiple streams of high definition television (HDTV) and improved home-working infrastructure are currently driving forces for potential fiber to the home (FTTH) customers [1]. There is an interest to reduce the cost and physical size of the FTTH equipment. The current fabrication methods have reached a cost minimum. We have addressed the costchallenge by developing 1310/(1490)/1550nm bidirectional diplexers, by monolithic seamless integration of lasers, photodiodes and wavelength division multiplexing (WDM) couplers into one single InP-based device. A 250nm wide optical gain profile covers the spectrum from 1310 to 1550nm and is the principal building block. The device fabrication is basically based on the established configuration of using split-contacts on continuos waveguides. Optical and electrical cross-talks are further addressed by using a Y-configuration to physically separate the components from each other and avoid inline configurations such as when the incoming signal travels through the laser component or vice versa. By the eliminated butt-joint interfaces which can reflect light between components or be a current leakage path and by leaving optically absorbing (unpumped active) material to surround the components to absorb spontaneous emission and nonintentional reflections the devices are optically and electrically isolated from each other. Ridge waveguides (RWG) form the waveguides and which also maintain the absorbing material between them. The WDM functionality is designed for a large optical bandwidth complying with the wide spectral range in FTTH applications and also reducing the polarization dependence of the WDM-coupler. Lasing is achieved by forming facet-free, λ/4-shifted, DFB (distributed feedback laser) lasers emitting directly into the waveguide. The photodiodes are waveguide photo-diodes (WGPD). Our seamless technology is also able to array the single channel diplexers to 4 to 12 channel diplexer arrays with 250μm fiber port

  7. III-Vs on Si for photonic applications-A monolithic approach

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Zhechao, E-mail: Zhechao.Wang@intec.ugent.be [School of ICT, Royal Institute of Technology, Electrum 229, Isafjordsgatan 22, 164 40 Kista (Sweden); Junesand, Carl; Metaferia, Wondwosen; Hu, Chen; Wosinski, Lech [School of ICT, Royal Institute of Technology, Electrum 229, Isafjordsgatan 22, 164 40 Kista (Sweden); Lourdudoss, Sebastian, E-mail: slo@kth.se [School of ICT, Royal Institute of Technology, Electrum 229, Isafjordsgatan 22, 164 40 Kista (Sweden)

    2012-10-01

    Highlights: Black-Right-Pointing-Pointer Monolithic evanescently coupled silicon laser (MECSL) structure treated. Black-Right-Pointing-Pointer Optical mode profiles and thermal resistivity of MECSL optimized by simulation. Black-Right-Pointing-Pointer MECSL through epitaxial lateral overgrowth (ELOG) of InP on Si exemplified. Black-Right-Pointing-Pointer Passive waveguide in MECSL also acts as the defect filtering mask in ELOG. Black-Right-Pointing-Pointer Growth of dislocation free thin InP layer on Si by ELOG for MECSL demonstrated. - Abstract: Epitaxial lateral overgrowth (ELOG) technology is demonstrated as a viable technology to realize monolithic integration of III-Vs on silicon. As an alternative to wafer-to-wafer bonding and die-to-wafer bonding, ELOG provides an attractive platform for fabricating discrete and integrated components in high volume at low cost. A possible route for monolithic integration of III-Vs on silicon for silicon photonics is exemplified by the case of a monolithic evanescently coupled silicon laser (MECSL) by combining InP on Si/SiO{sub 2} through ELOG. Passive waveguide in MECSL also acts as the defect filtering mask in ELOG. The structural design of a monolithic evanescently coupled silicon laser (MECSL) and its thermal resistivity are established through simulations. Material studies to realize the above laser through ELOG are undertaken by studying appropriate ELOG pattern designs to achieve InP on narrow regions of silicon. We show that defect-free InP can be obtained on SiO{sub 2} as the first step which paves the way for realizing active photonic devices on Si/SiO{sub 2} waveguides, e.g. an MECSL.

  8. III–Vs on Si for photonic applications—A monolithic approach

    International Nuclear Information System (INIS)

    Wang, Zhechao; Junesand, Carl; Metaferia, Wondwosen; Hu, Chen; Wosinski, Lech; Lourdudoss, Sebastian

    2012-01-01

    Highlights: ► Monolithic evanescently coupled silicon laser (MECSL) structure treated. ► Optical mode profiles and thermal resistivity of MECSL optimized by simulation. ► MECSL through epitaxial lateral overgrowth (ELOG) of InP on Si exemplified. ► Passive waveguide in MECSL also acts as the defect filtering mask in ELOG. ► Growth of dislocation free thin InP layer on Si by ELOG for MECSL demonstrated. - Abstract: Epitaxial lateral overgrowth (ELOG) technology is demonstrated as a viable technology to realize monolithic integration of III-Vs on silicon. As an alternative to wafer-to-wafer bonding and die-to-wafer bonding, ELOG provides an attractive platform for fabricating discrete and integrated components in high volume at low cost. A possible route for monolithic integration of III–Vs on silicon for silicon photonics is exemplified by the case of a monolithic evanescently coupled silicon laser (MECSL) by combining InP on Si/SiO 2 through ELOG. Passive waveguide in MECSL also acts as the defect filtering mask in ELOG. The structural design of a monolithic evanescently coupled silicon laser (MECSL) and its thermal resistivity are established through simulations. Material studies to realize the above laser through ELOG are undertaken by studying appropriate ELOG pattern designs to achieve InP on narrow regions of silicon. We show that defect-free InP can be obtained on SiO 2 as the first step which paves the way for realizing active photonic devices on Si/SiO 2 waveguides, e.g. an MECSL.

  9. Gigascale Silicon Photonic Transmitters Integrating HBT-based Carrier-injection Electroabsorption Modulator Structures

    Science.gov (United States)

    Fu, Enjin

    Demand for more bandwidth is rapidly increasing, which is driven by data intensive applications such as high-definition (HD) video streaming, cloud storage, and terascale computing applications. Next-generation high-performance computing systems require power efficient chip-to-chip and intra-chip interconnect yielding densities on the order of 1Tbps/cm2. The performance requirements of such system are the driving force behind the development of silicon integrated optical interconnect, providing a cost-effective solution for fully integrated optical interconnect systems on a single substrate. Compared to conventional electrical interconnect, optical interconnects have several advantages, including frequency independent insertion loss resulting in ultra wide bandwidth and link latency reduction. For high-speed optical transmitter modules, the optical modulator is a key component of the optical I/O channel. This thesis presents a silicon integrated optical transmitter module design based on a novel silicon HBT-based carrier injection electroabsorption modulator (EAM), which has the merits of wide optical bandwidth, high speed, low power, low drive voltage, small footprint, and high modulation efficiency. The structure, mechanism, and fabrication of the modulator structure will be discussed which is followed by the electrical modeling of the post-processed modulator device. The design and realization of a 10Gbps monolithic optical transmitter module integrating the driver circuit architecture and the HBT-based EAM device in a 130nm BiCMOS process is discussed. For high power efficiency, a 6Gbps ultra-low power driver IC implemented in a 130nm BiCMOS process is presented. The driver IC incorporates an integrated 27-1 pseudo-random bit sequence (PRBS) generator for reliable high-speed testing, and a driver circuit featuring digitally-tuned pre-emphasis signal strength. With outstanding drive capability, the driver module can be applied to a wide range of carrier

  10. Silicon integrated circuits advances in materials and device research

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Silicon Integrated Circuits, Part B covers the special considerations needed to achieve high-power Si-integrated circuits. The book presents articles about the most important operations needed for the high-power circuitry, namely impurity diffusion and oxidation; crystal defects under thermal equilibrium in silicon and the development of high-power device physics; and associated technology. The text also describes the ever-evolving processing technology and the most promising approaches, along with the understanding of processing-related areas of physics and chemistry. Physicists, chemists, an

  11. Process Optimization for Monolithic Integration of Piezoresistive Pressure Sensor and MOSFET Amplifier with SOI Approach

    International Nuclear Information System (INIS)

    Kumar, V Vinoth; Dasgupta, A; Bhat, K N; KNatarajan

    2006-01-01

    In this paper we present the design and process optimization for fabricating piezoresitive pressure sensor and MOSFET Differential Amplifier simultaneously on the same chip. Silicon On Insulator approach has been used for realizing the membrane as well as the electronics on the same chip. The amplifier circuit has been configured in the common source connection and it has been designed with PSPICE simulation to achieve a voltage gain of about 5. In the initial set of experiments the Pressure sensor and the amplifier were fabricated on separate chips to optimize the process steps and tested in the hybrid mode. In the next set of experiments, SOI wafer having the SOI layer thickness of about 11 microns was used for realizing the membrane by anisotropic etching from the backside. The piezo-resistive pressure sensor was realized on this membrane by connecting the polysilicon resistors in the form of a Wheatstone bridge. The MOSFET source follower amplifier was also fabricated on the same SOI wafer by tailoring the process steps to suit the requirement of simultaneous fabrication of piezoresistors and the amplifier for achieving MOSFET Integrated Pressure Sensor. Reproducible results have been achieved on the SOI wafers, with the process steps developed in the laboratory. Sensitivity of 270 mV /Bar/10V, with the on chip amplifier gain of 4.5, has been achieved with this process

  12. Novel technique for reliability testing of silicon integrated circuits

    NARCIS (Netherlands)

    Le Minh, P.; Wallinga, Hans; Woerlee, P.H.; van den Berg, Albert; Holleman, J.

    2001-01-01

    We propose a simple, inexpensive technique with high resolution to identify the weak spots in integrated circuits by means of a non-destructive photochemical process in which photoresist is used as the photon detection tool. The experiment was done to localize the breakdown link of thin silicon

  13. Microwave monolithic integrated circuit development for future spaceborne phased array antennas

    Science.gov (United States)

    Anzic, G.; Kascak, T. J.; Downey, A. N.; Liu, D. C.; Connolly, D. J.

    1984-01-01

    The development of fully monolithic gallium arsenide (GaAs) receive and transmit modules suitable for phased array antenna applications in the 30/20 gigahertz bands is presented. Specifications and various design approaches to achieve the design goals are described. Initial design and performance of submodules and associated active and passive components are presented. A tradeoff study summary is presented, highlighting the advantages of a distributed amplifier approach compared to the conventional single power source designs. Previously announced in STAR as N84-13399

  14. Microwave monolithic integrated circuit development for future spaceborne phased array antennas

    Science.gov (United States)

    Anzic, G.; Kascak, T. J.; Downey, A. N.; Liu, D. C.; Connolly, D. J.

    The development of fully monolithic gallium arsenide (GaAs) receive and transmit modules suitable for phased array antenna applications in the 30/20 gigahertz bands is presented. Specifications and various design approaches to achieve the design goals are described. Initial design and performance of submodules and associated active and passive components are presented. A tradeoff study summary is presented, highlighting the advantages of a distributed amplifier approach compared to the conventional single power source designs. Previously announced in STAR as N84-13399

  15. Integration of mask and silicon metrology in DFM

    Science.gov (United States)

    Matsuoka, Ryoichi; Mito, Hiroaki; Sugiyama, Akiyuki; Toyoda, Yasutaka

    2009-03-01

    We have developed a highly integrated method of mask and silicon metrology. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used in mask CD-SEM and silicon CD-SEM. We have inspected the high accuracy, stability and reproducibility in the experiments of integration. The accuracy is comparable with that of the mask and silicon CD-SEM metrology. In this report, we introduce the experimental results and the application. As shrinkage of design rule for semiconductor device advances, OPC (Optical Proximity Correction) goes aggressively dense in RET (Resolution Enhancement Technology). However, from the view point of DFM (Design for Manufacturability), the cost of data process for advanced MDP (Mask Data Preparation) and mask producing is a problem. Such trade-off between RET and mask producing is a big issue in semiconductor market especially in mask business. Seeing silicon device production process, information sharing is not completely organized between design section and production section. Design data created with OPC and MDP should be linked to process control on production. But design data and process control data are optimized independently. Thus, we provided a solution of DFM: advanced integration of mask metrology and silicon metrology. The system we propose here is composed of followings. 1) Design based recipe creation: Specify patterns on the design data for metrology. This step is fully automated since they are interfaced with hot spot coordinate information detected by various verification methods. 2) Design based image acquisition: Acquire the images of mask and silicon automatically by a recipe based on the pattern design of CD-SEM.It is a robust automated step because a wide range of design data is used for the image acquisition. 3) Contour profiling and GDS data generation: An image profiling process is applied to the acquired image based

  16. A silicon integrated micro nano-positioning XY-stage for nano-manipulation

    International Nuclear Information System (INIS)

    Sun Lining; Wang Jiachou; Rong Weibin; Li Xinxin; Bao Haifei

    2008-01-01

    An integrated micro XY-stage with a 2 × 2 mm 2 movable table is designed and fabricated for application in nanometer-scale operation and nanometric positioning precision. The device integrates the functions of both actuating and sensing in a monolithic chip and is mainly composed of a silicon-based XY-stage, comb-drive actuator and a displacement sensor, which are developed by using double-sided bulk-micromachining technology. The high-aspect-ratio comb-driven XY-stage is achieved by deep reactive ion etching (DRIE) on both sides of the wafer. The displacement sensor is formed on four vertical sidewall surface piezoresistors with a full Wheatstone bridge circuit, where a novel fabrication process of a vertical sidewall surface piezoresistor is proposed. Comprehensive design and analysis of the comb actuator, the piezoresistive displacement sensor and the XY-stage are given in full detail, and the experimental results verify the design and fabrication of the device. The final realization of the device shows that the sensitivity of the fabricated piezoresistive sensors is better than 1.17 mV µm −1 without amplification, and the linearity is better than 0.814%. Under 28.5 V driving voltage, a ±10 µm single-axis displacement is measured without crosstalk and the resonant frequency is measured at 983 Hz in air

  17. Infrared transparent graphene heater for silicon photonic integrated circuits.

    Science.gov (United States)

    Schall, Daniel; Mohsin, Muhammad; Sagade, Abhay A; Otto, Martin; Chmielak, Bartos; Suckow, Stephan; Giesecke, Anna Lena; Neumaier, Daniel; Kurz, Heinrich

    2016-04-18

    Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

  18. Simultaneous all-optical add and drop multiplexing of 40-Gbit/s OTDM signals using monolithically integrated Mach-Zehnder interferometer

    DEFF Research Database (Denmark)

    Jepsen, Kim Stokholm; Mikkelsen, Benny; Vaa, Michael

    1998-01-01

    Simultaneous all-optical add and drop multiplexing of a 40-Gbit/s OTDM signal using a monolithically integrated semiconductor optical amplifier/Mach Zehnder interferometer (SOA-MZI) is demonstrated. While maintaining a penalty of 1.3 dB for the add operation the sensitivity for the demultiplexed ...... signal is -34.4 dBm...

  19. The use of a new PMOS monolithic integrated circuit for the electronic equipment of a large multiwire proportional chamber (MWPC) detection system

    International Nuclear Information System (INIS)

    Bareyre, P.; Borgeaud, P.; Poinsignon, J.; Billion, B.

    1975-01-01

    A new monolithic 8-channel PMOS integrated circuit has been developed for an experiment to be carried out on the CERN 300 GeV accelerator. The circuit, read-out electronics and tests performed on 12 large MWPCs (total of 48 000 channels) are described and the results are presented. (Auth.)

  20. Hydrogen-terminated mesoporous silicon monoliths with huge surface area as alternative Si-based visible light-active photocatalysts

    KAUST Repository

    Li, Ting

    2016-07-21

    Silicon-based nanostructures and their related composites have drawn tremendous research interest in solar energy storage and conversion. Mesoporous silicon with a huge surface area of 400-900 m2 g-1 developed by electrochemical etching exhibits excellent photocatalytic ability and stability after 10 cycles in degrading methyl orange under visible light irradiation, owing to its unique mesoporous network, abundant surface hydrides and efficient light harvesting. This work showcases the profound effects of surface area, crystallinity, pore topology on charge migration/recombination and mass transportation. Therein the ordered 1D channel array has outperformed the interconnected 3D porous network by greatly accelerating the mass diffusion and enhancing the accessibility of the active sites on the extensive surfaces. © 2016 The Royal Society of Chemistry.

  1. System-level integration of active silicon photonic biosensors

    Science.gov (United States)

    Laplatine, L.; Al'Mrayat, O.; Luan, E.; Fang, C.; Rezaiezadeh, S.; Ratner, D. M.; Cheung, K.; Dattner, Y.; Chrostowski, L.

    2017-02-01

    Biosensors based on silicon photonic integrated circuits have attracted a growing interest in recent years. The use of sub-micron silicon waveguides to propagate near-infrared light allows for the drastic reduction of the optical system size, while increasing its complexity and sensitivity. Using silicon as the propagating medium also leverages the fabrication capabilities of CMOS foundries, which offer low-cost mass production. Researchers have deeply investigated photonic sensor devices, such as ring resonators, interferometers and photonic crystals, but the practical integration of silicon photonic biochips as part of a complete system has received less attention. Herein, we present a practical system-level architecture which can be employed to integrate the aforementioned photonic biosensors. We describe a system based on 1 mm2 dies that integrate germanium photodetectors and a single light coupling device. The die are embedded into a 16x16 mm2 epoxy package to enable microfluidic and electrical integration. First, we demonstrate a simple process to mimic Fan-Out Wafer-level-Packaging, which enables low-cost mass production. We then characterize the photodetectors in the photovoltaic mode, which exhibit high sensitivity at low optical power. Finally, we present a new grating coupler concept to relax the lateral alignment tolerance down to +/- 50 μm at 1-dB (80%) power penalty, which should permit non-experts to use the biochips in a"plug-and-play" style. The system-level integration demonstrated in this study paves the way towards the mass production of low-cost and highly sensitive biosensors, and can facilitate their wide adoption for biomedical and agro-environmental applications.

  2. Heterogeneous integration of lithium niobate and silicon nitride waveguides for wafer-scale photonic integrated circuits on silicon.

    Science.gov (United States)

    Chang, Lin; Pfeiffer, Martin H P; Volet, Nicolas; Zervas, Michael; Peters, Jon D; Manganelli, Costanza L; Stanton, Eric J; Li, Yifei; Kippenberg, Tobias J; Bowers, John E

    2017-02-15

    An ideal photonic integrated circuit for nonlinear photonic applications requires high optical nonlinearities and low loss. This work demonstrates a heterogeneous platform by bonding lithium niobate (LN) thin films onto a silicon nitride (Si3N4) waveguide layer on silicon. It not only provides large second- and third-order nonlinear coefficients, but also shows low propagation loss in both the Si3N4 and the LN-Si3N4 waveguides. The tapers enable low-loss-mode transitions between these two waveguides. This platform is essential for various on-chip applications, e.g., modulators, frequency conversions, and quantum communications.

  3. Performance of a monolithic LaBr{sub 3}:Ce crystal coupled to an array of silicon photomultipliers

    Energy Technology Data Exchange (ETDEWEB)

    Ulyanov, Alexei, E-mail: alexey.uliyanov@ucd.ie [School of Physics, University College Dublin, Belfield, Dublin 4 (Ireland); Morris, Oran [School of Physics, University College Dublin, Belfield, Dublin 4 (Ireland); Department of Computer Science & Applied Physics, Galway-Mayo Institute of Technology, Galway (Ireland); Hanlon, Lorraine; McBreen, Sheila; Foley, Suzanne; Roberts, Oliver J.; Tobin, Isaac; Murphy, David; Wade, Colin [School of Physics, University College Dublin, Belfield, Dublin 4 (Ireland); Nelms, Nick; Shortt, Brian [European Space Agency, ESTEC, 2200 AG Noordwijk (Netherlands); Slavicek, Tomas; Granja, Carlos; Solar, Michael [Institute of Experimental and Applied Physics, Czech Technical University in Prague, 12800 Prague 2 (Czech Republic)

    2016-02-21

    A gamma-ray detector composed of a single 28×28×20 mm{sup 3} LaBr{sub 3}:Ce crystal coupled to a custom built 4×4 array of silicon photomultipliers was tested over an energy range of 30 keV to 9.3 MeV. The silicon photomultipliers were initially calibrated using 20 ns light pulses generated by a light emitting diode. The photodetector responses measured as a function of the number of incident photons were found to be non-linear and consistent with model predictions. Using corrections for the non-linearity of the silicon photomultipliers, the detector showed a linear response to gamma-rays with energies from 100 keV to the maximum available energy of 9.3 MeV. The energy resolution was found to be 4% FWHM at 662 keV. Despite the large thickness of the scintillator (20 mm) and a 5 mm thick optical window, the detector was capable of measuring the positions of the gamma-ray interaction points. The position resolution was measured at 356 keV and was found to be 8 mm FWHM in the detector plane and 11 mm FWHM for the depth of interaction. The detector can be used as a building block of a larger calorimeter system that is capable of measuring gamma-ray energies up to tens of MeV.

  4. Monolithic spectrometer

    Energy Technology Data Exchange (ETDEWEB)

    Rajic, Slobodan (Knoxville, TN); Egert, Charles M. (Oak Ridge, TN); Kahl, William K. (Knoxville, TN); Snyder, Jr., William B. (Knoxville, TN); Evans, III, Boyd M. (Oak Ridge, TN); Marlar, Troy A. (Knoxville, TN); Cunningham, Joseph P. (Oak Ridge, TN)

    1998-01-01

    A monolithic spectrometer is disclosed for use in spectroscopy. The spectrometer is a single body of translucent material with positioned surfaces for the transmission, reflection and spectral analysis of light rays.

  5. Hybrid integration of carbon nanotubes in silicon photonic structures

    Science.gov (United States)

    Durán-Valdeiglesias, E.; Zhang, W.; Alonso-Ramos, C.; Le Roux, X.; Serna, S.; Hoang, H. C.; Marris-Morini, D.; Cassan, E.; Intonti, F.; Sarti, F.; Caselli, N.; La China, F.; Gurioli, M.; Balestrieri, M.; Vivien, L.; Filoramo, A.

    2017-02-01

    Silicon photonics, due to its compatibility with the CMOS platform and unprecedented integration capability, has become the preferred solution for the implementation of next generation optical interconnects to accomplish high efficiency, low energy consumption, low cost and device miniaturization in one single chip. However, it is restricted by silicon itself. Silicon does not have efficient light emission or detection in the telecommunication wavelength range (1.3 μm-1.5 μm) or any electro-optic effect (i.e. Pockels effect). Hence, silicon photonic needs to be complemented with other materials for the realization of optically-active devices, including III-V for lasing and Ge for detection. The very different requirement of these materials results in complex fabrication processes that offset the cost-effectiveness of the Si photonics approach. For this purpose, carbon nanotubes (CNTs) have recently been proposed as an attractive one-dimensional light emitting material. Interestingly, semiconducting single walled CNTs (SWNTs) exhibit room-temperature photo- and electro-luminescence in the near-IR that could be exploited for the implementation of integrated nano-sources. They can also be considered for the realization of photo-detectors and optical modulators, since they rely on intrinsically fast non-linear effects, such as Stark and Kerr effect. All these properties make SWNTs ideal candidates in order to fabricate a large variety of optoelectronic devices, including near-IR sources, modulators and photodetectors on Si photonic platforms. In addition, solution processed SWNTs can be integrated on Si using spin-coating or drop-casting techniques, obviating the need of complex epitaxial growth or chip bonding approaches. Here, we report on our recent progress in the coupling of SWNTs light emission into optical resonators implemented on the silicon-on-insulator (SOI) platform. .

  6. Silicon-based optical integrated circuits for terabit communication networks

    International Nuclear Information System (INIS)

    Svidzinsky, K K

    2003-01-01

    A brief review is presented of the development of silicon-based optical integrated circuits used as components in modern all-optical communication networks with the terabit-per-second transmission capacity. The designs and technologies for manufacturing these circuits are described and the problems related to their development and application in WDM communication systems are considered. (special issue devoted to the memory of academician a m prokhorov)

  7. Monolithic photonic integration for visible and short near-infrared wavelengths: technologies and platforms for bio and life science applications

    Science.gov (United States)

    Porcel, Marco A. G.; Artundo, Iñigo; Domenech, J. David; Geuzebroek, Douwe; Sunarto, Rino; Hoofman, Romano

    2018-04-01

    This tutorial aims to provide a general overview on the state-of-the-art of photonic integrated circuits (PICs) in the visible and short near-infrared (NIR) wavelength ranges, mostly focusing in silicon nitride (SiN) substrates, and a guide to the necessary steps in the design toward the fabrication of such PICs. The focus is put on bio- and life sciences, given the adequacy and, thus, a large number of applications in this field.

  8. Monolithic integration of microfluidic channels and optical waveguides in silica on silicon

    DEFF Research Database (Denmark)

    Friis, Peter; Hoppe, Karsten; Leistiko, Otto

    2001-01-01

    -back technique are possible, but troublesome. We present a simple but efficient alternative: By means of changing the waveguide layout, bonding pads are formed along the microfluidic channels. With the same height as the waveguide, they effectively prevent leakage and hermetically seal the channels during...

  9. Monolithically integrated quantum dot optical gain modulator with semiconductor optical amplifier for 10-Gb/s photonic transmission

    Science.gov (United States)

    Yamamoto, Naokatsu; Akahane, Kouichi; Umezawa, Toshimasa; Kawanishi, Tetsuya

    2015-03-01

    Short-range interconnection and/or data center networks require high capacity and a large number of channels in order to support numerous connections. Solutions employed to meet these requirements involve the use of alternative wavebands to increase the usable optical frequency range. We recently proposed the use of the T- and O-bands (Thousand band: 1000-1260 nm, Original band: 1260-1360 nm) as alternative wavebands because large optical frequency resources (>60 THz) can be easily employed. In addition, a simple and compact Gb/s-order high-speed optical modulator is a critical photonic device for short-range communications. Therefore, to develop an optical modulator that acts as a highfunctional photonic device, we focused on the use of self-assembled quantum dots (QDs) as a three-dimensional (3D) confined structure because QD structures are highly suitable for realizing broadband optical gain media in the T+O bands. In this study, we use the high-quality broadband QD optical gain to develop a monolithically integrated QD optical gain modulator (QD-OGM) device that has a semiconductor optical amplifier (QD-SOA) for Gb/s-order highspeed optical data generation in the 1.3-μm waveband. The insertion loss of the device can be compensated through the SOA, and we obtained an optical gain change of up to ~7 dB in the OGM section. Further, we successfully demonstrate a 10-Gb/s clear eye opening using the QD-OGM/SOA device with a clock-data recovery sequence at the receiver end. These results suggest that the monolithic QD-EOM/SOA is suitable for increasing the number of wavelength channels for smart short-range communications.

  10. Feasibility studies of microelectrode silicon detectors with integrated electronics

    International Nuclear Information System (INIS)

    Dalla Betta, G.-F.; Batignani, G.; Bettarini, S.; Boscardin, M.; Bosisio, L.; Carpinelli, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Lusiani, A.; Manghisoni, M.; Pignatel, G.U.; Rama, M.; Ratti, L.; Re, V.; Sandrelli, F.; Speziali, V.; Svelto, F.; Zorzi, N.

    2002-01-01

    We describe our experience on design and fabrication, on high-resistivity silicon substrates, of microstrip detectors and integrated electronics, devoted to high-energy physics experiments and medical/industrial imaging applications. We report on the full program of our collaboration, with particular regards to the tuning of a new fabrication process, allowing for the production of good quality transistors, while keeping under control the basic detector parameters, such as leakage current. Experimental results on JFET and bipolar transistors are presented, and a microstrip detector with an integrated JFET in source-follower configuration is introduced

  11. A Novel Silicon Micromachined Integrated MCM Thermal Management System

    Science.gov (United States)

    Kazmierczak, M. J.; Henderson, H. T.; Gerner, F. M.

    1997-01-01

    "Micromachining" is a chemical means of etching three-dimensional structures, typically in single- crystalline silicon. These techniques are leading toward what is coming to be referred to as MEMS (Micro Electro Mechanical Systems), where in addition to the ordinary two-dimensional (planar) microelectronics, it is possible to build three-dimensional n-ticromotors, electrically- actuated raicrovalves, hydraulic systems and much more on the same microchip. These techniques become possible because of differential etching rates of various crystallographic planes and materials used for semiconductor n-ticrofabfication. The University of Cincinnati group in collaboration with Karl Baker at NASA Lewis were the first to form micro heat pipes in silicon by the above techniques. Current work now in progress using MEMS technology is now directed towards the development of the next generation in MCM (Multi Chip Module) packaging. Here we propose to develop a complete electronic thermal management system which will allow densifica6on in chip stacking by perhaps two orders of magnitude. Furthermore the proposed technique will allow ordinary conu-nercial integrated chips to be utilized. Basically, the new technique involves etching square holes into a silicon substrate and then inserting and bonding commercially available integrated chips into these holes. For example, over a 100 1/4 in. by 1 /4 in. integrated chips can be placed on a 4 in. by 4 in. silicon substrate to form a Multi-Chip Module (MCM). Placing these MCM's in-line within an integrated rack then allows for three-diniensional stacking. Increased miniaturization of microelectronic circuits will lead to very high local heat fluxes. A high performance thermal management system will be specifically designed to remove the generated energy. More specifically, a compact heat exchanger with milli / microchannels will be developed and tested to remove the heat through the back side of this MCM assembly for moderate and high

  12. Monolithic microwave integrated circuits for sensors, radar, and communications systems; Proceedings of the Meeting, Orlando, FL, Apr. 2-4, 1991

    Science.gov (United States)

    Leonard, Regis F. (Editor); Bhasin, Kul B. (Editor)

    1991-01-01

    Consideration is given to MMICs for airborne phased arrays, monolithic GaAs integrated circuit millimeter wave imaging sensors, accurate design of multiport low-noise MMICs up to 20 GHz, an ultralinear low-noise amplifier technology for space communications, variable-gain MMIC module for space applications, a high-efficiency dual-band power amplifier for radar applications, a high-density circuit approach for low-cost MMIC circuits, coplanar SIMMWIC circuits, recent advances in monolithic phased arrays, and system-level integrated circuit development for phased-array antenna applications. Consideration is also given to performance enhancement in future communications satellites with MMIC technology insertion, application of Ka-band MMIC technology for an Orbiter/ACTS communications experiment, a space-based millimeter wave debris tracking radar, low-noise high-yield octave-band feedback amplifiers to 20 GHz, quasi-optical MESFET VCOs, and a high-dynamic-range mixer using novel balun structure.

  13. Test beam results of a depleted monolithic active pixel sensor (DMAPS) prototype

    Energy Technology Data Exchange (ETDEWEB)

    Obermann, Theresa; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Bonn Univ. (Germany); Schwenker, Benjamin [Goettingen Univ. (Germany); Collaboration: ATLAS Pixel-Collaboration

    2016-07-01

    New monolithic detector concepts are currently being explored for future particle physics experiments, in particular for the upgrade of the ATLAS detector. Common to monolithic pixel detectors is the integration of the front-end circuitry and the sensor on the same silicon substrate. The DMAPS concept makes use of high resistive silicon as substrate. It enables the application of a high bias voltage to create a drift field for the charge collection in the sensor part as well as the full usage of CMOS logic in the same piece of silicon. DMAPS prototypes from several foundries are available since three years and have been extensively characterized in the lab. In this talk, results of test beam campaigns, with neutron irradiated prototypes implemented in the ESPROS process, are presented.

  14. Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

    Science.gov (United States)

    Shahrjerdi, Davood; Bedell, Stephen W

    2013-01-09

    In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

  15. A fully integrated, monolithic, cryogenic charge sensitive preamplifier using N-channel JFETs and polysilicon resistors

    International Nuclear Information System (INIS)

    Jung, T.S.; Guckel, H.; Seefeldt, J.; Ott, G.; Ahn, Y.C.

    1994-01-01

    In this paper, an integrated charge preamplifier to be used with small (10--30 mm 2 ) Si(Li) and Ge(Li) X-ray detectors is described. The preamplifier is designed to operate at cryogenic temperatures (∼100 K to 160 K) for the best performance. An N-channel JFET process technology for integrated charge sensitive preamplifiers has been developed. The process integrates multiple pinch-off voltage JFETs fabricated in an n-type epitaxial layer on a low resistivity p-type substrate. The process also incorporates polysilicon resistors integrated on the same die as the JFETs. The optimized polysilicon resistors exhibit 1/f noise nearly as good as metal film resistors at the same current. Results for integrated amplifier are discussed

  16. Cobalt micro-magnet integration on silicon MOS quantum dots

    Science.gov (United States)

    Camirand Lemyre, Julien; Rochette, Sophie; Anderson, John; Manginell, Ronald P.; Pluym, Tammy; Ward, Dan; Carroll, Malcom S.; Pioro-Ladrière, Michel

    Integration of cobalt micro-magnets on silicon metal-oxide-semiconductor (MOS) quantum dot devices has been investigated. The micro-magnets are fabricated in a lift-off process with e-beam lithography and deposited directly on top of an etched poly-silicon gate stack. Among the five resist stacks tested, one is found to be compatible with our MOS specific materials (Si and SiO2) . Moreover, devices with and without additional Al2O3 insulating layer show no additional gate leakage after processing. Preliminary transport data indicates electrostatic stability of our devices with integrated magnets. This work was performed, in part, at the Center for Integrated Nanotechnologies, an Office of Science User Facility operated for the U.S. Department of Energy (DOE) Office of Science. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a Lockheed-Martin Company, for the U. S. Department of Energy under Contract No. DE-AC04-94AL85000.

  17. A novel prototyping method for die-level monolithic integration of MEMS above-IC

    International Nuclear Information System (INIS)

    Cicek, Paul-Vahe; Zhang, Qing; Saha, Tanmoy; Mahdavi, Sareh; Allidina, Karim; Gamal, Mourad El; Nabki, Frederic

    2013-01-01

    This work presents a convenient and versatile prototyping method for integrating surface-micromachined microelectromechanical systems (MEMS) directly above IC electronics, at the die level. Such localized implementation helps reduce development costs associated with the acquisition of full-sized semiconductor wafers. To demonstrate the validity of this method, variants of an IC-compatible surface-micromachining MEMS process are used to build different MEMS devices above a commercial transimpedance amplifier chip. Subsequent functional assessments for both the electronics and the MEMS indicate that the integration is successful, validating the prototyping methodology presented in this work, as well as the suitability of the selected MEMS technology for above-IC integration. (paper)

  18. Localized synthesis, assembly and integration of silicon nanowires

    Science.gov (United States)

    Englander, Ongi

    Localized synthesis, assembly and integration of one-dimensional silicon nanowires with MEMS structures is demonstrated and characterized in terms of local synthesis processes, electric-field assisted self-assembly, and a proof-of-concept nanoelectromechanical system (HEMS) demonstration. Emphasis is placed on the ease of integration, process control strategies, characterization techniques and the pursuit of integrated devices. A top-down followed by a bottom-up integration approach is utilized. Simple MEMS heater structures are utilized as the microscale platforms for the localized, bottom-up synthesis of one-dimensional nanostructures. Localized heating confines the high temperature region permitting only localized nanostructure synthesis and allowing the surroundings to remain at room temperature thus enabling CMOS compatible post-processing. The vapor-liquid-solid (VLS) process in the presence of a catalytic nanoparticle, a vapor phase reactant, and a specific temperature environment is successfully employed locally. Experimentally, a 5nm thick gold-palladium layer is used as the catalyst while silane is the vapor phase reactant. The current-voltage behavior of the MEMS structures can be correlated to the approximate temperature range required for the VLS reaction to take place. Silicon nanowires averaging 45nm in diameter and up to 29mum in length synthesized at growth rates of up to 1.5mum/min result. By placing two MEMS structures in close proximity, 4--10mum apart, localized silicon nanowire growth can be used to link together MEMS structures to yield a two-terminal, self-assembled micro-to-nano system. Here, one MEMS structure is designated as the hot growth structure while a nearby structure is designated as the cold secondary structure, whose role is to provide a natural stopping point for the VLS reaction. The application of a localized electric-field, 5 to 13V/mum in strength, during the synthesis process, has been shown to improve nanowire

  19. The European BOOM project :silicon photonics for high-capacity optical packet routers

    NARCIS (Netherlands)

    Stampoulidis, L.; Vyrsokinos, K.; Voigt, K.; Zimmermann, L.; Gomez-Agis, F.; Dorren, H.J.S.; Sheng, Z.; Thourhout, Van D.; Moerl, L.; Kreissl, J.; Sedighi, B.; Scheytt, J.C.; Pagano, A.; Riccardi, E.

    2010-01-01

    During the past years, monolithic integration in InP has been the driving force for the realization of integrated photonic routing systems. The advent of silicon as a basis for cost-effective integration and its potential blend with III–V material is now opening exciting opportunities for the

  20. Strained silicon as a new electro-optic material

    DEFF Research Database (Denmark)

    Jacobsen, Rune Shim; Andersen, Karin Nordström; Borel, Peter Ingo

    2006-01-01

    For decades, silicon has been the material of choice for mass fabrication of electronics. This is in contrast to photonics, where passive optical components in silicon have only recently been realized1, 2. The slow progress within silicon optoelectronics, where electronic and optical...... functionalities can be integrated into monolithic components based on the versatile silicon platform, is due to the limited active optical properties of silicon3. Recently, however, a continuous-wave Raman silicon laser was demonstrated4; if an effective modulator could also be realized in silicon, data...... processing and transmission could potentially be performed by all-silicon electronic and optical components. Here we have discovered that a significant linear electro-optic effect is induced in silicon by breaking the crystal symmetry. The symmetry is broken by depositing a straining layer on top...

  1. Hybrid Integrated Silicon Microfluidic Platform for Fluorescence Based Biodetection

    Directory of Open Access Journals (Sweden)

    André Darveau

    2007-09-01

    Full Text Available The desideratum to develop a fully integrated Lab-on-a-chip device capable ofrapid specimen detection for high throughput in-situ biomedical diagnoses and Point-of-Care testing applications has called for the integration of some of the novel technologiessuch as the microfluidics, microphotonics, immunoproteomics and Micro ElectroMechanical Systems (MEMS. In the present work, a silicon based microfluidic device hasbeen developed for carrying out fluorescence based immunoassay. By hybrid attachment ofthe microfluidic device with a Spectrometer-on-chip, the feasibility of synthesizing anintegrated Lab-on-a-chip type device for fluorescence based biosensing has beendemonstrated. Biodetection using the microfluidic device has been carried out usingantigen sheep IgG and Alexafluor-647 tagged antibody particles and the experimentalresults prove that silicon is a compatible material for the present application given thevarious advantages it offers such as cost-effectiveness, ease of bulk microfabrication,superior surface affinity to biomolecules, ease of disposability of the device etc., and is thussuitable for fabricating Lab-on-a-chip type devices.

  2. Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

    Science.gov (United States)

    Zhang, Liping; Sawchuk, Alexander A.

    2001-12-01

    We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

  3. Monolithic integration of InGaAs/InP multiple quantum wells on SOI substrates for photonic devices

    Science.gov (United States)

    Li, Zhibo; Wang, Mengqi; Fang, Xin; Li, Yajie; Zhou, Xuliang; Yu, Hongyan; Wang, Pengfei; Wang, Wei; Pan, Jiaoqing

    2018-02-01

    A direct epitaxy of III-V nanowires with InGaAs/InP multiple quantum wells on v-shaped trenches patterned silicon on insulator (SOI) substrates was realized by combining the standard semiconductor fabrication process with the aspect ratio trapping growth technique. Silicon thickness as well as the width and gap of each nanowire were carefully designed to accommodate essential optical properties and appropriate growth conditions. The III-V element ingredient, crystalline quality, and surface topography of the grown nanowires were characterized by X-ray diffraction spectroscopy, photoluminescence, and scanning electron microscope. Geometrical details and chemical information of multiple quantum wells were revealed by transmission electron microscopy and energy dispersive spectroscopy. Numerical simulations confirmed that the optical guided mode supported by one single nanowire was able to propagate 50 μm with ˜30% optical loss. This proposed integration scheme opens up an alternative pathway for future photonic integrations of III-V devices on the SOI platform at nanoscale.

  4. Nanophotonic integrated circuits from nanoresonators grown on silicon.

    Science.gov (United States)

    Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

    2014-07-07

    Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

  5. Organic Optical Sensor Based on Monolithic Integration of Organic Electronic Devices

    Directory of Open Access Journals (Sweden)

    Hoi Lam Tam

    2015-09-01

    Full Text Available A novel organic optical sensor that integrates a front organic light-emitting diode (OLED and an organic photodiode (OPD is demonstrated. The stripe-shaped cathode is used in the OLED components to create light signals, while the space between the stripe-shaped cathodes serves as the detection window for integrated OPD units. A MoO3 (5 nm/Ag (15 nm bi-layer inter-electrode is interposed between the vertically stacked OLED and OPD units, serving simultaneously as the cathode for the front OLED and an anode for the upper OPD units in the sensor. In the integrated sensor, the emission of the OLED units is confined by the area of the opaque stripe-shaped cathodes, optimized to maximize the reflected light passing through the window space for detection by the OPD components. This can ensure high OLED emission output, increasing the signal/noise ratio. The design and fabrication flexibility of an integrated OLED/OPD device also has low cost benefits, and is light weight and ultra-thin, making it possible for application in wearable units, finger print identification, image sensors, smart light sources, and compact information systems.

  6. InP monolithically integrated label swapper device for spectral amplitude coded optical packet networks

    NARCIS (Netherlands)

    Muñoz, P.; García-Olcina, R.; Doménech, J.D.; Rius, M.; Sancho, J.C.; Capmany, J.; Chen, L.R.; Habib, C.; Leijtens, X.J.M.; Vries, de T.; Heck, M.J.R.; Augustin, L.M.; Nötzel, R.; Robbins, D.J.

    2010-01-01

    In this paper a label swapping device, for spectral amplitude coded optical packet networks, fully integrated using InP technology is presented. Compared to previous demonstrations using discrete component assembly, the device footprint is reduced by a factor of 105 and the operation speed is

  7. Optical Sensitivity of a Monolithic Integrated InP PIN-HEMT-HBT Transimpedance Amplifier

    OpenAIRE

    Matiss, A.; Janssen, G.; Bertenburg, R. M.; Brockerhoff, W.; Tegude, F.J.

    2004-01-01

    To improve sensitivity of optical receivers, a special integration concept is chosen that includes a pinphotodiode, high-electron mobility transistors (HEMT) and heterostructure bipolar transistors (HBT) on a single substrate. This work focuses on the optimization of the amplifier design to achieve lowest input noise currents of a transimpedance amplifier, and thus highest receiver sensitivity. The respective advantages of the components used are investigated with respect...

  8. Thermally-isolated silicon-based integrated circuits and related methods

    Science.gov (United States)

    Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

    2017-05-09

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  9. Method of making thermally-isolated silicon-based integrated circuits

    Science.gov (United States)

    Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.; Bauer, Todd

    2017-11-21

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  10. Monolithic beam steering in a mid-infrared, surface-emitting, photonic integrated circuit.

    Science.gov (United States)

    Slivken, Steven; Wu, Donghai; Razeghi, Manijeh

    2017-08-16

    The mid-infrared (2.5 < λ < 25 μm) spectral region is utilized for many purposes, such as chemical/biological sensing, free space communications, and illuminators/countermeasures. Compared to near-infrared optical systems, however, mid-infrared component technology is still rather crude, with isolated components exhibiting limited functionality. In this manuscript, we make a significant leap forward in mid-infrared technology by developing a platform which can combine functions of multiple mid-infrared optical elements, including an integrated light source. In a single device, we demonstrate wide wavelength tuning (240 nm) and beam steering (17.9 degrees) in the mid-infrared with a significantly reduced beam divergence (down to 0.5 degrees). The architecture is also set up to be manufacturable and testable on a wafer scale, requiring no cleaved facets or special mirror coating to function.

  11. MEMS capacitive pressure sensor monolithically integrated with CMOS readout circuit by using post CMOS processes

    Science.gov (United States)

    Jang, Munseon; Yun, Kwang-Seok

    2017-12-01

    In this paper, we presents a MEMS pressure sensor integrated with a readout circuit on a chip for an on-chip signal processing. The capacitive pressure sensor is formed on a CMOS chip by using a post-CMOS MEMS processes. The proposed device consists of a sensing capacitor that is square in shape, a reference capacitor and a readout circuitry based on a switched-capacitor scheme to detect capacitance change at various environmental pressures. The readout circuit was implemented by using a commercial 0.35 μm CMOS process with 2 polysilicon and 4 metal layers. Then, the pressure sensor was formed by wet etching of metal 2 layer through via hole structures. Experimental results show that the MEMS pressure sensor has a sensitivity of 11 mV/100 kPa at the pressure range of 100-400 kPa.

  12. Roadmap for integration of InP based photonics and silicon electronics

    NARCIS (Netherlands)

    Williams, K.A.

    2015-01-01

    We identify the synergies and a roadmap for the intimate integration of InP photonic integrated circuits and Silicon electronic ICs using wafer-scale processes. Advantages are foreseen in terms of bandwidth, energy savings and package simplification.

  13. Back End of Line Nanorelays for Ultra-low Power Monolithic Integrated NEMS-CMOS Circuits

    KAUST Repository

    Lechuga Aranda, Jesus Javier

    2016-05-01

    Since the introduction of Complementary-Metal-Oxide-Semiconductor (CMOS) technology, the chip industry has enjoyed many benefits of transistor feature size scaling, including higher speed and device density and improved energy efficiency. However, in the recent years, the IC designers have encountered a few roadblocks, namely reaching the physical limits of scaling and also increased device leakage which has resulted in a slow-down of supply voltage and power density scaling. Therefore, there has been an extensive hunt for alternative circuit architectures and switching devices that can alleviate or eliminate the current crisis in the semiconductor industry. The Nano-Electro-Mechanical (NEM) relay is a promising alternative switch that offers zero leakage and abrupt turn-on behaviour. Even though these devices are intrinsically slower than CMOS transistors, new circuit design techniques tailored for the electromechanical properties of such devices can be leveraged to design medium performance, ultra-low power integrated circuits. In this thesis, we deal with a new generation of such devices that is built in the back end of line (BEOL) CMOS process and is an ideal option for full integration with current CMOS transistor technology. Simulation and verification at the circuit and system level is a critical step in the design flow of microelectronic circuits, and this is especially important for new technologies that lack the standard design infrastructure and well-known verification platforms. Although most of the physical and electrical properties of NEM structures can be simulated using standard electronic automation software, there is no report of a reliable behavioural model for NEMS switches that enable large circuit simulations. In this work, we present an optimised model of a BEOL nano relay that encompasses all the electromechanical characteristics of the device and is robust and lightweight enough for VLSI applications that require simulation of thousands of

  14. Plasmonic nanofocusing of light in an integrated silicon photonics platform.

    Science.gov (United States)

    Desiatov, Boris; Goykhman, Ilya; Levy, Uriel

    2011-07-04

    The capability to focus electromagnetic energy at the nanoscale plays an important role in nanoscinece and nanotechnology. It allows enhancing light matter interactions at the nanoscale with applications related to nonlinear optics, light emission and light detection. It may also be used for enhancing resolution in microscopy, lithography and optical storage systems. Hereby we propose and experimentally demonstrate the nanoscale focusing of surface plasmons by constructing an integrated plasmonic/photonic on chip nanofocusing device in silicon platform. The device was tested directly by measuring the optical intensity along it using a near-field microscope. We found an order of magnitude enhancement of the intensity at the tip's apex. The spot size is estimated to be 50 nm. The demonstrated device may be used as a building block for "lab on a chip" systems and for enhancing light matter interactions at the apex of the tip.

  15. Strategies for doped nanocrystalline silicon integration in silicon heterojunction solar cells

    Czech Academy of Sciences Publication Activity Database

    Seif, J.; Descoeudres, A.; Nogay, G.; Hänni, S.; de Nicolas, S.M.; Holm, N.; Geissbühler, J.; Hessler-Wyser, A.; Duchamp, M.; Dunin-Borkowski, R.E.; Ledinský, Martin; De Wolf, S.; Ballif, C.

    2016-01-01

    Roč. 6, č. 5 (2016), s. 1132-1140 ISSN 2156-3381 R&D Projects: GA MŠk LM2015087 Institutional support: RVO:68378271 Keywords : microcrystalline silicon * nanocrystalline silicon * silicon heterojunctions (SHJs) * solar cells Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.712, year: 2016

  16. Transferrable monolithic III-nitride photonic circuit for multifunctional optoelectronics

    Science.gov (United States)

    Shi, Zheng; Gao, Xumin; Yuan, Jialei; Zhang, Shuai; Jiang, Yan; Zhang, Fenghua; Jiang, Yuan; Zhu, Hongbo; Wang, Yongjin

    2017-12-01

    A monolithic III-nitride photonic circuit with integrated functionalities was implemented by integrating multiple components with different functions into a single chip. In particular, the III-nitride-on-silicon platform is used as it integrates a transmitter, a waveguide, and a receiver into a suspended III-nitride membrane via a wafer-level procedure. Here, a 0.8-mm-diameter suspended device architecture is directly transferred from silicon to a foreign substrate by mechanically breaking the support beams. The transferred InGaN/GaN multiple-quantum-well diode (MQW-diode) exhibits a turn-on voltage of 2.8 V with a dominant electroluminescence peak at 453 nm. The transmitter and receiver share an identical InGaN/GaN MQW structure, and the integrated photonic circuit inherently works for on-chip power monitoring and in-plane visible light communication. The wire-bonded monolithic photonic circuit on glass experimentally demonstrates in-plane data transmission at 120 Mb/s, paving the way for diverse applications in intelligent displays, in-plane light communication, flexible optical sensors, and wearable III-nitride optoelectronics.

  17. Integrated Design Software Predicts the Creep Life of Monolithic Ceramic Components

    Science.gov (United States)

    1996-01-01

    Significant improvements in propulsion and power generation for the next century will require revolutionary advances in high-temperature materials and structural design. Advanced ceramics are candidate materials for these elevated-temperature applications. As design protocols emerge for these material systems, designers must be aware of several innate features, including the degrading ability of ceramics to carry sustained load. Usually, time-dependent failure in ceramics occurs because of two different, delayedfailure mechanisms: slow crack growth and creep rupture. Slow crack growth initiates at a preexisting flaw and continues until a critical crack length is reached, causing catastrophic failure. Creep rupture, on the other hand, occurs because of bulk damage in the material: void nucleation and coalescence that eventually leads to macrocracks which then propagate to failure. Successful application of advanced ceramics depends on proper characterization of material behavior and the use of an appropriate design methodology. The life of a ceramic component can be predicted with the NASA Lewis Research Center's Ceramics Analysis and Reliability Evaluation of Structures (CARES) integrated design programs. CARES/CREEP determines the expected life of a component under creep conditions, and CARES/LIFE predicts the component life due to fast fracture and subcritical crack growth. The previously developed CARES/LIFE program has been used in numerous industrial and Government applications.

  18. Monte: A compact and versatile multidetector system based on monolithic telescopes

    International Nuclear Information System (INIS)

    Amorini, F.; Bonanno, A.; Cardella, G.; Di Pietro, A.; Fallica, G.; Figuera, P.; Morea, A.; Musumarra, A.; Papa, M.; Pappalardo, G.; Pinto, A.; Rizzo, F.; Tian, W.; Tudisco, S.; Valvo, G.

    2005-01-01

    We present the characteristics of a new multidetector based on monolithic silicon telescopes: MONTE. By using high-energy ion implantation techniques, the ΔE and residual energy stages of such telescopes have been integrated on the same silicon chip, obtaining extremely thin ΔE stages of the order of 1μm. This allowed one to obtain a very low charge identification energy threshold and a very good β background suppression in reactions induced by radioactive ion beams. The multidetector has a modular structure and can be assembled in different geometrical configurations according to experimental needs

  19. A G-band terahertz monolithic integrated amplifier in 0.5-μm InP double heterojunction bipolar transistor technology

    International Nuclear Information System (INIS)

    Li Ou-Peng; Zhang Yong; Xu Rui-Min; Cheng Wei; Wang Yuan; Niu Bing; Lu Hai-Yan

    2016-01-01

    Design and characterization of a G-band (140–220 GHz) terahertz monolithic integrated circuit (TMIC) amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm InGaAs/InP double heterojunction bipolar transistor (DHBT). An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the InP substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140–190 GHz respectively. The saturation output powers are −2.688 dBm at 210 GHz and −2.88 dBm at 220 GHz, respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithic integrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications. (paper)

  20. InGaAsP Mach-Zehnder interferometer optical modulator monolithically integrated with InGaAs driver MOSFET on a III-V CMOS photonics platform.

    Science.gov (United States)

    Park, Jin-Kown; Takagi, Shinichi; Takenaka, Mitsuru

    2018-02-19

    We demonstrated the monolithic integration of a carrier-injection InGaAsP Mach-Zehnder interferometer (MZI) optical modulator and InGaAs metal-oxide-semiconductor field-effect transistor (MOSFET) on a III-V-on-insulator (III-V-OI) wafer. A low-resistivity lateral PIN junction was formed along an InGaAsP rib waveguide by Zn diffusion and Ni-InGaAsP alloy, enabling direct driving of the InGaAsP optical modulator by the InGaAs MOSFET. A π phase shift of the InGaAsP optical modulator was obtained through the injection of a drain current from the InGaAs MOSFET with a gate voltage of approximately 1 V. This proof-of-concept demonstration of the monolithic integration of the InGaAsP optical modulator and InGaAs driver MOSFET will enable us to develop high-performance and low-power electronic-photonic integrated circuits on a III-V CMOS photonics platform.

  1. Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

    Science.gov (United States)

    Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

    2015-04-06

    Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

  2. Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

    International Nuclear Information System (INIS)

    Lauermann, M.; Weimann, C.; Palmer, R.; Schindler, P. C.; Koeber, S.; Freude, W.; Koos, C.; Rembe, C.

    2014-01-01

    We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB

  3. Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

    Energy Technology Data Exchange (ETDEWEB)

    Lauermann, M.; Weimann, C.; Palmer, R.; Schindler, P. C. [Institute of Photonics and Quantum Electronics, Karlsruhe Institute of Technology, 76131 Karlsruhe (Germany); Koeber, S.; Freude, W., E-mail: christian.koos@kit.edu; Koos, C., E-mail: christian.koos@kit.edu [Institute of Photonics and Quantum Electronics, Karlsruhe Institute of Technology, 76131 Karlsruhe, Germany and Institute of Microstructure Technology, Karlsruhe Institute of Technology, 76344 Eggenstein-Leopoldshafen (Germany); Rembe, C. [Polytec GmbH, 76337 Waldbronn (Germany)

    2014-05-27

    We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB.

  4. Selective epitaxial growth of monolithically integrated GaN-based light emitting diodes with AlGaN/GaN driving transistors

    International Nuclear Information System (INIS)

    Liu, Zhaojun; Ma, Jun; Huang, Tongde; Liu, Chao; May Lau, Kei

    2014-01-01

    In this Letter, we report selective epitaxial growth of monolithically integrated GaN-based light emitting diodes (LEDs) with AlGaN/GaN high-electron-mobility transistor (HEMT) drivers. A comparison of two integration schemes, selective epitaxial removal (SER), and selective epitaxial growth (SEG) was made. We found the SER resulted in serious degradation of the underlying LEDs in a HEMT-on-LED structure due to damage of the p-GaN surface. The problem was circumvented using the SEG that avoided plasma etching and minimized device degradation. The integrated HEMT-LEDs by SEG exhibited comparable characteristics as unintegrated devices and emitted modulated blue light by gate biasing

  5. Crystalline Silicon Interconnected Strips (XIS). Introduction to a New, Integrated Device and Module Concept

    Energy Technology Data Exchange (ETDEWEB)

    Van Roosmalen, J.; Bronsveld, P.; Mewe, A.; Janssen, G.; Stodolny, M.; Cobussen-Pool, E.; Bennett, I.; Weeber, A.; Geerligs, B. [ECN Solar Energy, P.O. Box 1, NL-1755 ZG, Petten (Netherlands)

    2012-06-15

    A new device concept for high efficiency, low cost, wafer based silicon solar cells is introduced. To significantly lower the costs of Si photovoltaics, high efficiencies and large reductions of metals and silicon costs are required. To enable this, the device architecture was adapted into low current devices by applying thin silicon strips, to which a special high efficiency back-contact heterojunction cell design was applied. Standard industrial production processes can be used for our fully integrated cell and module design, with a cost reduction potential below 0.5 euro/Wp. First devices have been realized demonstrating the principle of a series connected back contact hybrid silicon heterojunction module concept.

  6. Monolithic microwave integrated circuits for sensors, radar, and communications systems; Proceedings of the Meeting, Orlando, FL, Apr. 2-4, 1991

    Science.gov (United States)

    Leonard, Regis F.; Bhasin, Kul B.

    Consideration is given to MMICs for airborne phased arrays, monolithic GaAs integrated circuit millimeter wave imaging sensors, accurate design of multiport low-noise MMICs up to 20 GHz, an ultralinear low-noise amplifier technology for space communications, variable-gain MMIC module for space applications, a high-efficiency dual-band power amplifier for radar applications, a high-density circuit approach for low-cost MMIC circuits, coplanar SIMMWIC circuits, recent advances in monolithic phased arrays, and system-level integrated circuit development for phased-array antenna applications. Consideration is also given to performance enhancement in future communications satellites with MMIC technology insertion, application of Ka-band MMIC technology for an Orbiter/ACTS communications experiment, a space-based millimeter wave debris tracking radar, low-noise high-yield octave-band feedback amplifiers to 20 GHz, quasi-optical MESFET VCOs, and a high-dynamic-range mixer using novel balun structure. (For individual items see A93-25777 to A93-25814)

  7. Graphene-on-silicon hybrid plasmonic-photonic integrated circuits.

    Science.gov (United States)

    Xiao, Ting-Hui; Cheng, Zhenzhou; Goda, Keisuke

    2017-06-16

    Graphene surface plasmons (GSPs) have shown great potential in biochemical sensing, thermal imaging, and optoelectronics. To excite GSPs, several methods based on the near-field optical microscope and graphene nanostructures have been developed in the past few years. However, these methods suffer from their bulky setups and low GSP-excitation efficiency due to the short interaction length between free-space vertical excitation light and the atomic layer of graphene. Here we present a CMOS-compatible design of graphene-on-silicon hybrid plasmonic-photonic integrated circuits that achieve the in-plane excitation of GSP polaritons as well as localized surface plasmon (SP) resonance. By employing a suspended membrane slot waveguide, our design is able to excite GSP polaritons on a chip. Moreover, by utilizing a graphene nanoribbon array, we engineer the transmission spectrum of the waveguide by excitation of localized SP resonance. Our theoretical and computational study paves a new avenue to enable, modulate, and monitor GSPs on a chip, potentially applicable for the development of on-chip electro-optic devices.

  8. Silicon Integrated Dual-Mode Interferometer with Differential Outputs

    Directory of Open Access Journals (Sweden)

    Niklas Hoppe

    2017-09-01

    Full Text Available The dual-mode interferometer (DMI is an attractive alternative to Mach-Zehnder interferometers for sensor purposes, achieving sensitivities to refractive index changes close to state-of-the-art. Modern designs on silicon-on-insulator (SOI platforms offer thermally stable and compact devices with insertion losses of less than 1 dB and high extinction ratios. Compact arrays of multiple DMIs in parallel are easy to fabricate due to the simple structure of the DMI. In this work, the principle of operation of an integrated DMI with differential outputs is presented which allows the unambiguous phase shift detection with a single wavelength measurement, rather than using a wavelength sweep and evaluating the optical output power spectrum. Fluctuating optical input power or varying attenuation due to different analyte concentrations can be compensated by observing the sum of the optical powers at the differential outputs. DMIs with two differential single-mode outputs are fabricated in a 250 nm SOI platform, and corresponding measurements are shown to explain the principle of operation in detail. A comparison of DMIs with the conventional Mach-Zehnder interferometer using the same technology concludes this work.

  9. Thermal performances of ETFE cushion roof integrated amorphous silicon photovoltaic

    International Nuclear Information System (INIS)

    Hu, Jianhui; Chen, Wujun; Qiu, Zhenyu; Zhao, Bing; Zhou, Jinyu; Qu, Yegao

    2015-01-01

    Highlights: • Thermal performances of a three layer ETFE cushion integrated a-Si PV is evaluated. • Temperature of a-Si PV obviously affects temperature field and temperature boundary. • The maximum temperature difference of 3.4 K between measured and numerical results. • Main transport mechanisms in upper and lower chambers are convection and conduction. • Heat transfer coefficients of this roof are less than those of other ETFE cushion roofs. - Abstract: Thermal performances of the ETFE cushion roof integrated amorphous silicon photovoltaic (a-Si PV) are essential to estimate building performances, such as temperature distribution and heat transfer coefficient. To investigate these thermal performances, an experimental mock-up composed of a-Si PV and a three-layer ETFE cushion roof was built and the experiment was carried out under summer sunny condition. Meanwhile, numerical model with real boundary conditions was performed in this paper. The experimental results show that the temperature sequence of the three layers was the middle, top and bottom layer and that the PV temperature caused by solar irradiance was 353.8 K. This gives evidence that the PV has a significant effect on the temperature distribution. The experimental temperature was in good agreement with the corresponding location of the numerical temperature since the maximum temperature difference was only 3.4 K. Therefore, the numerical results were justified and then used to analyze the airflow characteristics and calculate the thermal performances. For the airflow characteristics, it is found that the temperature distribution was not uniform and the main transport mechanisms in the upper and lower chambers formed by the three layers were the convection and conduction, respectively. For the thermal performances, the surface convective heat transfer coefficients were obtained, which have validated that thermal performances of the three-layer ETFE cushion integrated a-Si PV are better than

  10. Optoelectronic Device Integration in Silicon (OpSIS)

    Science.gov (United States)

    2015-10-26

    silicon-on-insulator," Opt. Express 22, 17872-17879 (2014) Y. Yang, C. Galland, Y. Liu, K. Tan , R. Ding, Q. Li, K. Bergman, T. Baehr-Jones, M...Jaeger, Nicolas AF; Chrostowski, Lukas; “Electrically tunable resonant filters in phase-shifted contra- directional couplers” IEEE Group IV Photonics... Nicolas AF; Chrostowski, Lukas; “Silicon photonic grating-assisted, contra-directional couplers” Optics express Vol. 21, No. 3; 3633-3650 (2013

  11. Monoliths in Bioprocess Technology

    Directory of Open Access Journals (Sweden)

    Vignesh Rajamanickam

    2015-04-01

    Full Text Available Monolithic columns are a special type of chromatography column, which can be used for the purification of different biomolecules. They have become popular due to their high mass transfer properties and short purification times. Several articles have already discussed monolith manufacturing, as well as monolith characteristics. In contrast, this review focuses on the applied aspect of monoliths and discusses the most relevant biomolecules that can be successfully purified by them. We describe success stories for viruses, nucleic acids and proteins and compare them to conventional purification methods. Furthermore, the advantages of monolithic columns over particle-based resins, as well as the limitations of monoliths are discussed. With a compilation of commercially available monolithic columns, this review aims at serving as a ‘yellow pages’ for bioprocess engineers who face the challenge of purifying a certain biomolecule using monoliths.

  12. Automatic and integrated micro-enzyme assay (AIμEA) platform for highly sensitive thrombin analysis via an engineered fluorescence protein-functionalized monolithic capillary column.

    Science.gov (United States)

    Lin, Lihua; Liu, Shengquan; Nie, Zhou; Chen, Yingzhuang; Lei, Chunyang; Wang, Zhen; Yin, Chao; Hu, Huiping; Huang, Yan; Yao, Shouzhuo

    2015-04-21

    Nowadays, large-scale screening for enzyme discovery, engineering, and drug discovery processes require simple, fast, and sensitive enzyme activity assay platforms with high integration and potential for high-throughput detection. Herein, a novel automatic and integrated micro-enzyme assay (AIμEA) platform was proposed based on a unique microreaction system fabricated by a engineered green fluorescence protein (GFP)-functionalized monolithic capillary column, with thrombin as an example. The recombinant GFP probe was rationally engineered to possess a His-tag and a substrate sequence of thrombin, which enable it to be immobilized on the monolith via metal affinity binding, and to be released after thrombin digestion. Combined with capillary electrophoresis-laser-induced fluorescence (CE-LIF), all the procedures, including thrombin injection, online enzymatic digestion in the microreaction system, and label-free detection of the released GFP, were integrated in a single electrophoretic process. By taking advantage of the ultrahigh loading capacity of the AIμEA platform and the CE automatic programming setup, one microreaction column was sufficient for many times digestion without replacement. The novel microreaction system showed significantly enhanced catalytic efficiency, about 30 fold higher than that of the equivalent bulk reaction. Accordingly, the AIμEA platform was highly sensitive with a limit of detection down to 1 pM of thrombin. Moreover, the AIμEA platform was robust and reliable to detect thrombin in human serum samples and its inhibition by hirudin. Hence, this AIμEA platform exhibits great potential for high-throughput analysis in future biological application, disease diagnostics, and drug screening.

  13. Integration of the End Cap TEC+ of the CMS Silicon Strip Tracker

    CERN Document Server

    Adler, Volker; Ageron, Michel; Agram, Jean-Laurent; Atz, Bernd; Barvich, Tobias; Baulieu, Guillaume; Beaumont, Willem; Beissel, Franz; Bergauer, Thomas; Berst, Jean-Daniel; Blüm, Peter; Bock, E; Bogelsbacher, F; de Boer, Wim; Bonnet, Jean-Luc; Bonnevaux, Alain; Boudoul, Gaelle; Bouhali, Othmane; Braunschweig, Wolfgang; Bremer, R; Brom, Jean-Marie; Butz, Erik; Chabanat, Eric; Chabert, Eric Christian; Clerbaux, Barbara; Contardo, Didier; De Callatay, Bernard; Dehm, Philip; Delaere, Christophe; Della Negra, Rodolphe; Dewulf, Jean-Paul; D'Hondt, Jorgen; Didierjean, Francois; Dierlamm, Alexander; Dirkes, Guido; Dragicevic, Marko; Drouhin, Frédéric; Ernenwein, Jean-Pierre; Esser, Hans; Estre, Nicolas; Fahrer, Manuel; Feld, Lutz; Fernández, J; Florins, Benoit; Flossdorf, Alexander; Flucke, Gero; Flügge, Günter; Fontaine, Jean-Charles; Freudenreich, Klaus; Frey, Martin; Friedl, Markus; Furgeri, Alexander; Giraud, Noël; Goerlach, Ulrich; Goorens, Robert; Graehling, Philippe; Grégoire, Ghislain; Gregoriev, E; Gross, Laurent; Hansel, S; Haroutunian, Roger; Hartmann, Frank; Heier, Stefan; Hermanns, Thomas; Heydhausen, Dirk; Heyninck, Jan; Hosselet, J; Hrubec, Josef; Jahn, Dieter; Juillot, Pierre; Kaminski, Jochen; Karpinski, Waclaw; Kaussen, Gordon; Keutgen, Thomas; Klanner, Robert; Klein, Katja; König, Stefan; Kosbow, M; Krammer, Manfred; Ledermann, Bernhard; Lemaître, Vincent; De Lentdecker, Gilles; Linn, Alexander; Lounis, Abdenour; Lübelsmeyer, Klaus; Lumb, Nicholas; Maazouzi, Chaker; Mahmoud, Tariq; Michotte, Daniel; Militaru, Otilia; Mirabito, Laurent; Müller, Thomas; Neukermans, Lionel; Ollivetto, C; Olzem, Jan; Ostapchuk, Andrey; Pandoulas, Demetrios; Pein, Uwe; Pernicka, Manfred; Perriès, Stephane; Piaseki, C; Pierschel, Gerhard; Piotrzkowski, Krzysztof; Poettgens, Michael; Pooth, Oliver; Rouby, Xavier; Sabellek, Andreas; Schael, Stefan; Schirm, Norbert; Schleper, Peter; Schmitz, Stefan Antonius; Schultz von Dratzig, Arndt; Siedling, Rolf; Simonis, Hans-Jürgen; Stahl, Achim; Steck, Pia; Steinbruck, G; Stoye, Markus; Strub, Roger; Tavernier, Stefaan; Teyssier, Daniel; Theel, Andreas; Trocmé, Benjamin; Udo, Fred; Van der Donckt, M; Van der Velde, C; Van Hove, Pierre; Vanlaer, Pascal; Van Lancker, Luc; Van Staa, Rolf; Vanzetto, Sylvain; Weber, Markus; Weiler, Thomas; Weseler, Siegfried; Wickens, John; Wittmer, Bruno; Wlochal, Michael; De Wolf, Eddi A; Zhukov, Valery; Zoeller, Marc Henning

    2009-01-01

    The silicon strip tracker of the CMS experiment has been completed and inserted into the CMS detector in late 2007. The largest sub-system of the tracker is its end cap system, comprising two large end caps (TEC) each containing 3200 silicon strip modules. To ease construction, the end caps feature a modular design: groups of about 20 silicon modules are placed on sub-assemblies called petals and these self-contained elements are then mounted into the TEC support structures. Each end cap consists of 144 petals, and the insertion of these petals into the end cap structure is referred to as TEC integration. The two end caps were integrated independently in Aachen (TEC+) and at CERN (TEC--). This note deals with the integration of TEC+, describing procedures for end cap integration and for quality control during testing of integrated sections of the end cap and presenting results from the testing.

  14. Al transmon qubits on silicon-on-insulator for quantum device integration

    Science.gov (United States)

    Keller, Andrew J.; Dieterle, Paul B.; Fang, Michael; Berger, Brett; Fink, Johannes M.; Painter, Oskar

    2017-07-01

    We present the fabrication and characterization of an aluminum transmon qubit on a silicon-on-insulator substrate. Key to the qubit fabrication is the use of an anhydrous hydrofluoric vapor process which selectively removes the lossy silicon oxide buried underneath the silicon device layer. For a 5.6 GHz qubit measured dispersively by a 7.1 GHz resonator, we find T1 = 3.5 μs and T2* = 2.2 μs. This process in principle permits the co-fabrication of silicon photonic and mechanical elements, providing a route towards chip-scale integration of electro-opto-mechanical transducers for quantum networking of superconducting microwave quantum circuits. The additional processing steps are compatible with established fabrication techniques for aluminum transmon qubits on silicon.

  15. Monolithic Integration of Sampled Grating DBR with Electroabsorption Modulator by Combining Selective-Area-Growth MOCVD and Quantum-Well Intermixing

    International Nuclear Information System (INIS)

    Hong-Bo, Liu; Ling-Juan, Zhao; Jiao-Qing, Pan; Hong-Liang, Zhu; Fan, Zhou; Bao-Jun, Wang; Wei, Wang

    2008-01-01

    We present the monolithic integration of a sampled-grating distributed Bragg reflector (SG-DBR) laser with a quantum-well electroabsorption modulator (QW-EAM) by combining ultra-low-pressure (55mbar) selective-area-growth (SAG) metal-organic chemical vapour deposition (MOCVD) and quantum-well intermixing (QWI) for the first time. The QW-EAM and the gain section can be grown simultaneously by using SAG MOCVD technology. Meanwhile, the QWI technology offers an abrupt band-gap change between two functional sections, which reduces internal absorption loss. The experimental results show that the threshold current Ith = 62 mA, and output power reaches 3.6mW. The wavelength tuning range covers 30nm, and all the corresponding side mode suppression ratios are over 30 dB. The extinction ratios at available wavelength channels can reach more than 14 dB with bias of -5 V

  16. Silicon fabric for multi-functional applications

    KAUST Repository

    Sevilla, Galo T.; Rojas, Jhonathan Prieto; Ahmed, Sally; Hussain, Aftab M.; Inayat, Salman Bin; Hussain, Muhammad Mustafa

    2013-01-01

    This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

  17. Silicon fabric for multi-functional applications

    KAUST Repository

    Sevilla, Galo T.

    2013-06-01

    This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

  18. Recent advance in high manufacturing readiness level and high temperature CMOS mixed-signal integrated circuits on silicon carbide

    Science.gov (United States)

    Weng, M. H.; Clark, D. T.; Wright, S. N.; Gordon, D. L.; Duncan, M. A.; Kirkham, S. J.; Idris, M. I.; Chan, H. K.; Young, R. A. R.; Ramsay, E. P.; Wright, N. G.; Horsfall, A. B.

    2017-05-01

    A high manufacturing readiness level silicon carbide (SiC) CMOS technology is presented. The unique process flow enables the monolithic integration of pMOS and nMOS transistors with passive circuit elements capable of operation at temperatures of 300 °C and beyond. Critical to this functionality is the behaviour of the gate dielectric and data for high temperature capacitance-voltage measurements are reported for SiO2/4H-SiC (n and p type) MOS structures. In addition, a summary of the long term reliability for a range of structures including contact chains to both n-type and p-type SiC, as well as simple logic circuits is presented, showing function after 2000 h at 300 °C. Circuit data is also presented for the performance of digital logic devices, a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. A high temperature micro-oven system has been utilised to enable the high temperature testing and stressing of units assembled in ceramic dual in line packages, including a high temperature small form-factor SiC based bridge leg power module prototype, operated for over 1000 h at 300 °C. The data presented show that SiC CMOS is a key enabling technology in high temperature integrated circuit design. In particular it provides the ability to realise sensor interface circuits capable of operating above 300 °C, accommodate shifts in key parameters enabling deployment in applications including automotive, aerospace and deep well drilling.

  19. The effect of irradiation on the stability and properties of monolithic silicon carbide and SiCf/SiC composites up to 25 dpa

    International Nuclear Information System (INIS)

    Hollenberg, G.W.; Henager, C.H. Jr.; Youngblood, G.E.; Trimble, D.J.; Simonson, S.A.; Newsome, G.A.; Lewis, E.

    1994-04-01

    Stability and properties of monolithic and SiC f /SiC composites were measured before and after irradiation in a fast neutron spectrum up to 25 dpa between 500 and 1500C. Dimensional changes were relatively consistent with previous investigations. Strength and modulus of SiC f /SiC composites decreased after irradiation as a result of fiber/matrix decoupling. For some composites, uniform elongation was not significantly degraded by irradiation. Thermal conductivity also decreased after irradiation at low temperatures because of the introduction of lattice defects as phonon scattering sites. Retention of properties under the severe conditions of 25 dpa and 800C suggests that a composite tailored for neutron damage resistance can be developed

  20. Methods and mechanisms of gettering of silicon structures in the production of integrated circuits

    Directory of Open Access Journals (Sweden)

    Pilipenko V. A.

    2013-05-01

    Full Text Available Increasing the degree of integration of hardware components imposes more stringent requirements for the reduction of the concentration of contaminants and oxidation stacking faults in the original silicon wafers with its preservation in the IC manufacturing process cycle. This causes high relevance of the application of gettering in modern microelectronic technology. The existing methods of silicon wafers gettering and the mechanisms of their occurrence are considered.

  1. Integrated GaN photonic circuits on silicon (100) for second harmonic generation

    OpenAIRE

    Xiong, Chi; Pernice, Wolfram; Ryu, Kevin K.; Schuck, Carsten; Fong, King Y.; Palacios, Tomas; Tang, Hong X.

    2014-01-01

    We demonstrate second order optical nonlinearity in a silicon architecture through heterogeneous integration of single-crystalline gallium nitride (GaN) on silicon (100) substrates. By engineering GaN microrings for dual resonance around 1560 nm and 780 nm, we achieve efficient, tunable second harmonic generation at 780 nm. The \\{chi}(2) nonlinear susceptibility is measured to be as high as 16 plus minus 7 pm/V. Because GaN has a wideband transparency window covering ultraviolet, visible and ...

  2. Ultrahigh-density trench cpacitors in silicon and their application to integrated DC-DC conversion

    NARCIS (Netherlands)

    Roozeboom, F.; Bergveld, H.J.; Nowak, K.; Le Cornec, F.; Guiraud, L.; Bunel, C.; Iochem, S.; Ferreira, J.; Ledain, S.; Pieraerts, E.; Pommier, M.

    2009-01-01

    This paper addresses silicon-based integration of passive components applied to 3D integration with dies of other technologies within one package. Particularly, the development of high-density trench capacitors has enabled the realization of small-formfactor DC-DC converters. As illustration, an

  3. Experimental Demonstration of 7 Tb/s Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

    2016-01-01

    We demonstrate BER performance <10^-9 for a 1 Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers.......We demonstrate BER performance integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers....

  4. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  5. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea; Svendsen, Winnie Edith; Dimaki, Maria

    2016-01-01

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  6. Characterization of porous silicon integrated in liquid chromatography chips

    NARCIS (Netherlands)

    Tiggelaar, Roald M.; Verdoold, Vincent; Eghbali, H.; Desmet, G.; Gardeniers, Johannes G.E.

    2009-01-01

    Properties of porous silicon which are relevant for use of the material as a stationary phase in liquid chromatography chips, like porosity, pore size and specific surface area, were determined with high-resolution SEM and N2 adsorption–desorption isotherms. For the anodization conditions

  7. Efficient Near-Infrared-Transparent Perovskite Solar Cells Enabling Direct Comparison of 4-Terminal and Monolithic Perovskite/Silicon Tandem Cells

    OpenAIRE

    Werner, Jérémie; Barraud, Loris; Walter, Arnaud; Bräuninger, Matthias; Sahli, Florent; Sacchetto, Davide; Tétreault, Nicolas; Paviet-Salomon, Bertrand; Moon, Soo-Jin; Allebé, Christophe; Despeisse, Matthieu; Nicolay, Sylvain; De Wolf, Stefaan; Niesen, Bjoern; Ballif, Christophe

    2016-01-01

    Combining market-proven silicon solar cell technology with an efficient wide band gap top cell into a tandem device is an attractive approach to reduce the cost of photovoltaic systems. For this, perovskite solar cells are promising high-efficiency top cell candidates, but their typical device size (

  8. A new semicustom integrated bipolar amplifier for silicon strip detectors

    International Nuclear Information System (INIS)

    Zimmerman, T.

    1989-01-01

    The QPA02 is a four channel DC coupled two stage transimpedance amplifier designed at Fermilab on a semicustom linear array (Quickchip 2S) manufactured by Tektronix. The chip was developed as a silicon strip amplifier but may have other applications as well. Each channel consists of a preamplifier and a second stage amplifier/sharper with differential output which can directly drive a transmission line (90 to 140 ohms). External bypass capacitors are the only discrete components required. QPA02 has been tested and demonstrated to be an effective silicon strip amplifier. Other applications may exist which can use this amplifier or a modified version of this amplifier. For example, another design is now in progress for a wire chamber amplifier, QPA03, to be reported later. Only a relatively small effort was required to modify the design and layout for this application. 11 figs

  9. Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV).

    Science.gov (United States)

    Shen, Wen-Wei; Chen, Kuan-Neng

    2017-12-01

    3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.

  10. Progress in complementary metal–oxide–semiconductor silicon photonics and optoelectronic integrated circuits

    International Nuclear Information System (INIS)

    Chen Hongda; Zhang Zan; Huang Beiju; Mao Luhong; Zhang Zanyun

    2015-01-01

    Silicon photonics is an emerging competitive solution for next-generation scalable data communications in different application areas as high-speed data communication is constrained by electrical interconnects. Optical interconnects based on silicon photonics can be used in intra/inter-chip interconnects, board-to-board interconnects, short-reach communications in datacenters, supercomputers and long-haul optical transmissions. In this paper, we present an overview of recent progress in silicon optoelectronic devices and optoelectronic integrated circuits (OEICs) based on a complementary metal–oxide–semiconductor-compatible process, and focus on our research contributions. The silicon optoelectronic devices and OEICs show good characteristics, which are expected to benefit several application domains, including communication, sensing, computing and nonlinear systems. (review)

  11. High-dimensional quantum key distribution based on multicore fiber using silicon photonic integrated circuits

    DEFF Research Database (Denmark)

    Ding, Yunhong; Bacco, Davide; Dalgaard, Kjeld

    2017-01-01

    is intrinsically limited to 1 bit/photon. Here we propose and experimentally demonstrate, for the first time, a high-dimensional quantum key distribution protocol based on space division multiplexing in multicore fiber using silicon photonic integrated lightwave circuits. We successfully realized three mutually......-dimensional quantum states, and enables breaking the information efficiency limit of traditional quantum key distribution protocols. In addition, the silicon photonic circuits used in our work integrate variable optical attenuators, highly efficient multicore fiber couplers, and Mach-Zehnder interferometers, enabling...

  12. Compact polarization beam splitter for silicon photonic integrated circuits with a 340-nm-thick silicon core layer.

    Science.gov (United States)

    Li, Chenlei; Dai, Daoxin

    2017-11-01

    A polarization beam splitter (PBS) is proposed and realized for silicon photonic integrated circuits with a 340-nm-thick silicon core layer by introducing an asymmetric directional coupler (ADC), which consists of a silicon-on-insulator (SOI) nanowire and a subwavelength grating (SWG) waveguide. The SWG is introduced to provide an optical waveguide which has much higher birefringence than a regular 340-nm-thick SOI nanowire, so that it is possible to make the phase-matching condition satisfied for TE polarization only in the present design when the waveguide dimensions are optimized. Meanwhile, there is a significant phase mismatching for TM polarization automatically. In this way, the present ADC enables strong polarization selectivity to realize a PBS that separates TE and TM polarizations to the cross and through ports, respectively. The realized PBS has a length of ∼2  μm for the coupling region. For the fabricated PBS, the extinction ratio (ER) is 15-30 dB and the excess loss is 0.2-2.6 dB for TE polarization while the ER is 20-27 dB and the excess loss is 0.3-2.8 dB for TM polarization when operating in the wavelength range of 1520-1580 nm.

  13. Robotic Tactile Sensors Fabricated from a Monolithic Silicon Integrated Circuit and a Piezoelectric Polyvinylidene Fluoride Thin Film

    Science.gov (United States)

    1991-12-01

    thi efecs could be accounted for. A high impedance switch network resulted in the aityto etally apply a fix&. ,zw the entire electrode array structure...sesrCmnipo-wil (if a I wo-itmetsitiial array of clusely spared : axels should be cajpable -it fundmental image seivsinm and thius. renile: iii ,fbIot Willh...is said to be piezoresistive. Piezoresistive tactile sensors incorporate this principle in tile design of tile sensor as the transducing material

  14. The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

    Science.gov (United States)

    Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

    2017-02-01

    The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

  15. Heterogeneously integrated silicon photonics for the mid-infrared and spectroscopic sensing.

    Science.gov (United States)

    Chen, Yu; Lin, Hongtao; Hu, Juejun; Li, Mo

    2014-07-22

    Besides being the foundational material for microelectronics, crystalline silicon has long been used for the production of infrared lenses and mirrors. More recently, silicon has become the key material to achieve large-scale integration of photonic devices for on-chip optical interconnect and signal processing. For optics, silicon has significant advantages: it offers a very high refractive index and is highly transparent in the spectral range from 1.2 to 8 μm. To fully exploit silicon’s superior performance in a remarkably broad range and to enable new optoelectronic functionalities, here we describe a general method to integrate silicon photonic devices on arbitrary foreign substrates. In particular, we apply the technique to integrate silicon microring resonators on mid-infrared compatible substrates for operation in the mid-infrared. These high-performance mid-infrared optical resonators are utilized to demonstrate, for the first time, on-chip cavity-enhanced mid-infrared spectroscopic analysis of organic chemicals with a limit of detection of less than 0.1 ng.

  16. Ultrafast triggered transient energy storage by atomic layer deposition into porous silicon for integrated transient electronics

    Science.gov (United States)

    Douglas, Anna; Muralidharan, Nitin; Carter, Rachel; Share, Keith; Pint, Cary L.

    2016-03-01

    Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics.Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics. Electronic supplementary information (ESI) available: (i) Experimental details for ALD and material fabrication, ellipsometry film thickness, preparation of gel electrolyte and separator, details for electrochemical measurements, HRTEM image of VOx coated porous silicon, Raman spectroscopy for VOx as-deposited as well as annealed in air for 1 hour at 450 °C, SEM and transient behavior dissolution tests of uniformly coated VOx on

  17. Hybrid Integration of Solid-State Quantum Emitters on a Silicon Photonic Chip.

    Science.gov (United States)

    Kim, Je-Hyung; Aghaeimeibodi, Shahriar; Richardson, Christopher J K; Leavitt, Richard P; Englund, Dirk; Waks, Edo

    2017-12-13

    Scalable quantum photonic systems require efficient single photon sources coupled to integrated photonic devices. Solid-state quantum emitters can generate single photons with high efficiency, while silicon photonic circuits can manipulate them in an integrated device structure. Combining these two material platforms could, therefore, significantly increase the complexity of integrated quantum photonic devices. Here, we demonstrate hybrid integration of solid-state quantum emitters to a silicon photonic device. We develop a pick-and-place technique that can position epitaxially grown InAs/InP quantum dots emitting at telecom wavelengths on a silicon photonic chip deterministically with nanoscale precision. We employ an adiabatic tapering approach to transfer the emission from the quantum dots to the waveguide with high efficiency. We also incorporate an on-chip silicon-photonic beamsplitter to perform a Hanbury-Brown and Twiss measurement. Our approach could enable integration of precharacterized III-V quantum photonic devices into large-scale photonic structures to enable complex devices composed of many emitters and photons.

  18. Integrated programmable photonic filter on the silicon -on- insulator platform

    DEFF Research Database (Denmark)

    Liao, Shasha; Ding, Yunhong; Peucheret, Christophe

    2014-01-01

    We propose and demonstrate a silicon - on - insulator (SOI) on - chip programmable filter based on a four - tap finite impulse response structure. The photonic filter is programmable thanks to amplitude and phase modulation of each tap controlled by thermal heater s. We further demonstrate...... the tunability of the filter central wavelength, bandwidth and variable passband shape. The tuning range of the central wavelength is at least 42% of the free spectral range. The bandwidth tuning range is at least half of the free spectral range. Our scheme has distinct advantages of compactness, capability...

  19. Silicon analog components device design, process integration, characterization, and reliability

    CERN Document Server

    El-Kareh, Badih

    2015-01-01

    This book covers modern analog components, their characteristics, and interactions with process parameters. It serves as a comprehensive guide, addressing both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. Based on the authors’ extensive experience in the development of analog devices, this book is intended for engineers and scientists in semiconductor research, development and manufacturing. The problems at the end of each chapter and the numerous charts, figures and tables also make it appropriate for use as a text in graduate and advanced undergraduate courses in electrical engineering and materials science.

  20. 125 GHz sine wave gating InGaAs/InP single-photon detector with a monolithically integrated readout circuit

    Science.gov (United States)

    Jiang, Wen-Hao; Liu, Jian-Hong; Liu, Yin; Jin, Ge; Zhang, Jun; Pan, Jian-Wei

    2017-12-01

    InGaAs/InP single-photon detectors (SPDs) are the key devices for applications requiring near-infrared single-photon detection. Gating mode is an effective approach to synchronous single-photon detection. Increasing gating frequency and reducing module size are important challenges for the design of such detector system. Here we present for the first time an InGaAs/InP SPD with 1.25 GHz sine wave gating using a monolithically integrated readout circuit (MIRC). The MIRC has a size of 15 mm * 15 mm and implements the miniaturization of avalanche extraction for high-frequency sine wave gating. In the MIRC, low-pass filters and a low-noise radio frequency amplifier are integrated based on the technique of low temperature co-fired ceramic, which can effectively reduce the parasitic capacitance and extract weak avalanche signals. We then characterize the InGaAs/InP SPD to verify the functionality and reliability of MIRC, and the SPD exhibits excellent performance with 27.5 % photon detection efficiency, 1.2 kcps dark count rate, and 9.1 % afterpulse probability at 223 K and 100 ns hold-off time. With this MIRC, one can further design miniaturized high-frequency SPD modules that are highly required for practical applications.

  1. 1.25  GHz sine wave gating InGaAs/InP single-photon detector with a monolithically integrated readout circuit.

    Science.gov (United States)

    Jiang, Wen-Hao; Liu, Jian-Hong; Liu, Yin; Jin, Ge; Zhang, Jun; Pan, Jian-Wei

    2017-12-15

    InGaAs/InP single-photon detectors (SPDs) are the key devices for applications requiring near-infrared single-photon detection. The gating mode is an effective approach to synchronous single-photon detection. Increasing gating frequency and reducing the module size are important challenges for the design of such a detector system. Here we present for the first time, to the best of our knowledge, an InGaAs/InP SPD with 1.25 GHz sine wave gating (SWG) using a monolithically integrated readout circuit (MIRC). The MIRC has a size of 15  mm×15  mm and implements the miniaturization of avalanche extraction for high-frequency SWG. In the MIRC, low-pass filters and a low-noise radio frequency amplifier are integrated based on the technique of low temperature co-fired ceramic, which can effectively reduce the parasitic capacitance and extract weak avalanche signals. We then characterize the InGaAs/InP SPD to verify the functionality and reliability of the MIRC, and the SPD exhibits excellent performance with 27.5% photon detection efficiency, a 1.2 kcps dark count rate, and 9.1% afterpulse probability at 223 K and 100 ns hold-off time. With this MIRC, one can further design miniaturized high-frequency SPD modules that are highly required for practical applications.

  2. An innovative large scale integration of silicon nanowire-based field effect transistors

    Science.gov (United States)

    Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

    2018-05-01

    Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

  3. Monolithic CMOS imaging x-ray spectrometers

    Science.gov (United States)

    Kenter, Almus; Kraft, Ralph; Gauron, Thomas; Murray, Stephen S.

    2014-07-01

    The Smithsonian Astrophysical Observatory (SAO) in collaboration with SRI/Sarnoff is developing monolithic CMOS detectors optimized for x-ray astronomy. The goal of this multi-year program is to produce CMOS x-ray imaging spectrometers that are Fano noise limited over the 0.1-10keV energy band while incorporating the many benefits of CMOS technology. These benefits include: low power consumption, radiation "hardness", high levels of integration, and very high read rates. Small format test devices from a previous wafer fabrication run (2011-2012) have recently been back-thinned and tested for response below 1keV. These devices perform as expected in regards to dark current, read noise, spectral response and Quantum Efficiency (QE). We demonstrate that running these devices at rates ~> 1Mpix/second eliminates the need for cooling as shot noise from any dark current is greatly mitigated. The test devices were fabricated on 15μm, high resistivity custom (~30kΩ-cm) epitaxial silicon and have a 16 by 192 pixel format. They incorporate 16μm pitch, 6 Transistor Pinned Photo Diode (6TPPD) pixels which have ~40μV/electron sensitivity and a highly parallel analog CDS signal chain. Newer, improved, lower noise detectors have just been fabricated (October 2013). These new detectors are fabricated on 9μm epitaxial silicon and have a 1k by 1k format. They incorporate similar 16μm pitch, 6TPPD pixels but have ~ 50% higher sensitivity and much (3×) lower read noise. These new detectors have undergone preliminary testing for functionality in Front Illuminated (FI) form and are presently being prepared for back thinning and packaging. Monolithic CMOS devices such as these, would be ideal candidate detectors for the focal planes of Solar, planetary and other space-borne x-ray astronomy missions. The high through-put, low noise and excellent low energy response, provide high dynamic range and good time resolution; bright, time varying x-ray features could be temporally and

  4. Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

    Science.gov (United States)

    Atabaki, Amir H; Moazeni, Sajjad; Pavanello, Fabio; Gevorgyan, Hayk; Notaros, Jelena; Alloatti, Luca; Wade, Mark T; Sun, Chen; Kruger, Seth A; Meng, Huaiyu; Al Qubaisi, Kenaish; Wang, Imbert; Zhang, Bohan; Khilo, Anatol; Baiocco, Christopher V; Popović, Miloš A; Stojanović, Vladimir M; Ram, Rajeev J

    2018-04-01

    Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions 1,2 . This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing 3,4 . By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip' 1,6-8 . As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge 10,11 , this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

  5. Miniaturized flow cytometer with 3D hydrodynamic particle focusing and integrated optical elements applying silicon photodiodes

    NARCIS (Netherlands)

    Rosenauer, M.; Buchegger, W.; Finoulst, I.; Verhaert, P.D.E.M.; Vellekoop, M.

    2010-01-01

    In this study, the design, realization and measurement results of a novel optofluidic system capable of performing absorbance-based flow cytometric analysis is presented. This miniaturized laboratory platform, fabricated using SU-8 on a silicon substrate, comprises integrated polymer-based

  6. Realization of an integrated VDF/TrFE copolymer-on-silicon pyroelectric sensor

    NARCIS (Netherlands)

    Setiadi, D.; Setiadi, D.; Regtien, Paulus P.L.; Sarro, P.M.

    1995-01-01

    An integrated pyroelectric sensor based on a vinylidene fluoride trifluoroethylene (VDF/TrFE) copolymer is presented. A silicon substrate that contains FET readout electronics is coated with the VDF/TrFE copolymer film using a spin-coating technique. On-chip poling of the copolymer has been applied

  7. Recent results from the development of silicon detectors with integrated electronics

    Energy Technology Data Exchange (ETDEWEB)

    Dalla Betta, G.-F. E-mail: dallabe@dit.unitn.it; Boscardin, M.; Batignani, G.; Bettarini, S.; Bisogni, M.G.; Bosisio, L.; Carpinelli, M.; Ciacchi, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Novelli, M.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Ronchin, S.; Sandrelli, F.; Simi, G.; Speziali, V.; Rosso, V.; Traversi, G.; Zorzi, N

    2004-02-01

    In the past few years we have developed a technological process allowing for the fabrication of radiation detectors with integrated electronics on high-resistivity silicon substrates. We report on some recent results relevant to the process optimisation and to device/circuit characterization.

  8. Recent results from the development of silicon detectors with integrated electronics

    International Nuclear Information System (INIS)

    Dalla Betta, G.-F.; Boscardin, M.; Batignani, G.; Bettarini, S.; Bisogni, M.G.; Bosisio, L.; Carpinelli, M.; Ciacchi, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Novelli, M.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Ronchin, S.; Sandrelli, F.; Simi, G.; Speziali, V.; Rosso, V.; Traversi, G.; Zorzi, N.

    2004-01-01

    In the past few years we have developed a technological process allowing for the fabrication of radiation detectors with integrated electronics on high-resistivity silicon substrates. We report on some recent results relevant to the process optimisation and to device/circuit characterization

  9. Towards a fully integrated indium-phosphide membrane on silicon photonics platform

    NARCIS (Netherlands)

    van Engelen, J.P.; Pogoretskiy, V.; Smit, M.K.; van der Tol, J.J.G.M.; Jiao, Y.

    2017-01-01

    Recently a uni-traveling-carrier photodetector with high speed (> 67GHz) and a high-gain optical amplifier (110/cm at 4 kA/cm2) have been demonstrated using the InP membrane-on-Silicon (IMOS) integration technology. Passives in IMOS have shown features comparable to SOI platforms due to the tight

  10. Transferrable monolithic multicomponent system for near-ultraviolet optoelectronics

    Science.gov (United States)

    Qin, Chuan; Gao, Xumin; Yuan, Jialei; Shi, Zheng; Jiang, Yuan; Liu, Yuhuai; Wang, Yongjin; Amano, Hiroshi

    2018-05-01

    A monolithic near-ultraviolet multicomponent system is implemented on a 0.8-mm-diameter suspended membrane by integrating a transmitter, waveguide, and receiver into a single chip. Two identical InGaN/Al0.10Ga0.90N multiple-quantum well (MQW) diodes are fabricated using the same process flow, which separately function as a transmitter and receiver. There is a spectral overlap between the emission and detection spectra of the MQW diodes. Therefore, the receiver can respond to changes in the emission of the transmitter. The multicomponent system is mechanically transferred from silicon, and the wire-bonded transmitter on glass experimentally demonstrates spatial light transmission at 200 Mbps using non-return-to-zero on–off keying modulation.

  11. Characterization of 13 and 30 mum thick hydrogenated amorphous silicon diodes deposited over CMOS integrated circuits for particle detection application

    CERN Document Server

    Despeisse, M; Commichau, S C; Dissertori, G; Garrigos, A; Jarron, P; Miazza, C; Moraes, D; Shah, A; Wyrsch, N; Viertel, Gert M; 10.1016/j.nima.2003.11.022

    2004-01-01

    We present the experimental results obtained with a novel monolithic silicon pixel detector which consists in depositing a n-i-p hydrogenated amorphous silicon (a-Si:H) diode straight above the readout ASIC (this technology is called Thin Film on ASIC, TFA). The characterization has been performed on 13 and 30mum thick a-Si:H films deposited on top of an ASIC containing a linear array of high- speed low-noise transimpedance amplifiers designed in a 0.25mum CMOS technology. Experimental results presented have been obtained with a 600nm pulsed laser. The results of charge collection efficiency and charge collection speed of these structures are discussed.

  12. Uricase-free on-demand colorimetric biosensing of uric acid enabled by integrated CoP nanosheet arrays as a monolithic peroxidase mimic.

    Science.gov (United States)

    He, Yanfang; Qi, Fei; Niu, Xiangheng; Zhang, Wenchi; Zhang, Xifeng; Pan, Jianming

    2018-08-27

    In clinical diagnosis, monitoring of uric acid (UA) is generally realized by combining uricase with natural peroxidase. The use of bio-enzymes, however, shadows some highlights of these methods due to their vulnerable activities against environments. Herein, we report a novel biosensor for the natural enzyme-free colorimetric detection of UA by using CoP nanosheet arrays grown on Ni foam (NF) as a monolithic peroxidase mimic. The integrated nanozyme can be put into and taken out from reaction systems conveniently with only tweezers, making it possible for on-demand analysis. As demonstrated, the obtained CoP/NF exhibits outstanding peroxidase-like activity to trigger the oxidation reaction of colorless 3,3'5,5'-tetramethylbenzidine (TMB) to a blue product (TMBox) mediated by H 2 O 2 . It is found that the blue TMBox can be reduced to colorless TMB again by UA selectively, thus the presence of UA in solutions will suppress the color reaction of TMB. Based on this principle, an uricase-free biosensor is developed for the photometric determination of UA, providing a wide detection range of 1-200 μM and a limit of detection down to 1.0 μM. In addition, the fabricated biosensor can be applied for measuring UA in clinical samples with merits of simple operation and good reliability, exhibiting its great promise in clinical diagnosis. Copyright © 2018 Elsevier B.V. All rights reserved.

  13. Fabrication of an electro-absorption transceiver with a monolithically integrated optical amplifier for fiber transmission of 40–60 GHz radio signals

    International Nuclear Information System (INIS)

    Zhang, Andy Zhenzhong; Wang, Qin; Fonjallaz, Pierre-Yves; Almqvist, Susanne; Karlsson, Stefan; Kjebon, Olle; Schatz, Richard; Chacinski, Marek; Thylén, Lars; Berggren, Jesper; Hammar, Mattias; Honecker, Jörg; Steffan, Andreas

    2011-01-01

    We report on the fabrication of a monolithically integrated semiconductor optical amplifier (SOA) and a reflective electro-absorption transceiver (EAT) for 40–60 GHz radio-over-fiber applications. The EAT can either function as a transmitter (reflective modulator) or as a receiver (photodetector) depending on operation mode. The SOA and the EAT sections are based on different InGaAsP multiple quantum-well active layers connected by a butt joint. Benzocyclobutene is used to reduce the capacitance beside the ridge mesa. Devices are designed to have a peaked response at the operating frequency through the design of microwave waveguides on top of the devices. The packaged device exhibits at 0.1 mW optical input power an amplified DC responsivity of 18.5 mA mW −1 and a modulation efficiency of 0.67 mW V −1 . The estimated radio frequency loss at 40 GHz of an optical link consisting of two SOA–EAT devices was 23 dB using an unmodulated optical input carrier to the transmitter of 0.94 mW

  14. Silicon Carbide Corrugated Mirrors for Space Telescopes, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Trex Enterprises Corporation (Trex) proposes technology development to manufacture monolithic, lightweight silicon carbide corrugated mirrors (SCCM) suitable for...

  15. CMOS monolithic active pixel sensors for high energy physics

    Energy Technology Data Exchange (ETDEWEB)

    Snoeys, W., E-mail: walter.snoeys@cern.ch

    2014-11-21

    Monolithic pixel detectors integrating sensor matrix and readout in one piece of silicon are only now starting to make their way into high energy physics. Two major requirements are radiation tolerance and low power consumption. For the most extreme radiation levels, signal charge has to be collected by drift from a depletion layer onto a designated collection electrode without losing the signal charge elsewhere in the in-pixel circuit. Low power consumption requires an optimization of Q/C, the ratio of the collected signal charge over the input capacitance [1]. Some solutions to combine sufficient Q/C and collection by drift require exotic fabrication steps. More conventional solutions up to now require a simple in-pixel readout circuit. Both high voltage CMOS technologies and Monolithic Active Pixel Sensors (MAPS) technologies with high resistivity epitaxial layers offer high voltage diodes. The choice between the two is not fundamental but more a question of how much depletion can be reached and also of availability and cost. This paper tries to give an overview.

  16. Integrating carbon nanotubes into silicon by means of vertical carbon nanotube field-effect transistors

    KAUST Repository

    Li, Jingqi; Wang, Qingxiao; Yue, Weisheng; Guo, Zaibing; LI, LIANG; Zhao, Chao; Wang, Xianbin; Abutaha, Anas I.; Alshareef, Husam N.; Zhang, Yafei; Zhang, Xixiang

    2014-01-01

    Single-walled carbon nanotubes have been integrated into silicon for use in vertical carbon nanotube field-effect transistors (CNTFETs). A unique feature of these devices is that a silicon substrate and a metal contact are used as the source and drain for the vertical transistors, respectively. These CNTFETs show very different characteristics from those fabricated with two metal contacts. Surprisingly, the transfer characteristics of the vertical CNTFETs can be either ambipolar or unipolar (p-type or n-type) depending on the sign of the drain voltage. Furthermore, the p-type/n-type character of the devices is defined by the doping type of the silicon substrate used in the fabrication process. A semiclassical model is used to simulate the performance of these CNTFETs by taking the conductance change of the Si contact under the gate voltage into consideration. The calculation results are consistent with the experimental observations. This journal is © the Partner Organisations 2014.

  17. Three-Dimensional Integration of Black Phosphorus Photodetector with Silicon Photonics and Nanoplasmonics.

    Science.gov (United States)

    Chen, Che; Youngblood, Nathan; Peng, Ruoming; Yoo, Daehan; Mohr, Daniel A; Johnson, Timothy W; Oh, Sang-Hyun; Li, Mo

    2017-02-08

    We demonstrate the integration of a black phosphorus photodetector in a hybrid, three-dimensional architecture of silicon photonics and metallic nanoplasmonics structures. This integration approach combines the advantages of the low propagation loss of silicon waveguides, high-field confinement of a plasmonic nanogap, and the narrow bandgap of black phosphorus to achieve high responsivity for detection of telecom-band, near-infrared light. Benefiting from an ultrashort channel (∼60 nm) and near-field enhancement enabled by the nanogap structure, the photodetector shows an intrinsic responsivity as high as 10 A/W afforded by internal gain mechanisms, and a 3 dB roll-off frequency of 150 MHz. This device demonstrates a promising approach for on-chip integration of three distinctive photonic systems, which, as a generic platform, may lead to future nanophotonic applications for biosensing, nonlinear optics, and optical signal processing.

  18. A CMOS microdisplay with integrated controller utilizing improved silicon hot carrier luminescent light sources

    Science.gov (United States)

    Venter, Petrus J.; Alberts, Antonie C.; du Plessis, Monuko; Joubert, Trudi-Heleen; Goosen, Marius E.; Janse van Rensburg, Christo; Rademeyer, Pieter; Fauré, Nicolaas M.

    2013-03-01

    Microdisplay technology, the miniaturization and integration of small displays for various applications, is predominantly based on OLED and LCoS technologies. Silicon light emission from hot carrier electroluminescence has been shown to emit light visibly perceptible without the aid of any additional intensification, although the electrical to optical conversion efficiency is not as high as the technologies mentioned above. For some applications, this drawback may be traded off against the major cost advantage and superior integration opportunities offered by CMOS microdisplays using integrated silicon light sources. This work introduces an improved version of our previously published microdisplay by making use of new efficiency enhanced CMOS light emitting structures and an increased display resolution. Silicon hot carrier luminescence is often created when reverse biased pn-junctions enter the breakdown regime where impact ionization results in carrier transport across the junction. Avalanche breakdown is typically unwanted in modern CMOS processes. Design rules and process design are generally tailored to prevent breakdown, while the voltages associated with breakdown are too high to directly interact with the rest of the CMOS standard library. This work shows that it is possible to lower the operating voltage of CMOS light sources without compromising the optical output power. This results in more efficient light sources with improved interaction with other standard library components. This work proves that it is possible to create a reasonably high resolution microdisplay while integrating the active matrix controller and drivers on the same integrated circuit die without additional modifications, in a standard CMOS process.

  19. Silicon photomultiplier readout of a monolithic 270 x 5 x 5 cm{sup 3} plastic scintillator bar for time of flight applications

    Energy Technology Data Exchange (ETDEWEB)

    Roeder, Marko; Bemmerer, Daniel; Heidel, Klaus; Stach, Daniel; Wagner, Andreas; Weinberger, David [Helmholtz-Zentrum Dresden-Rossendorf (HZDR), Dresden (Germany); Cowan, Thomas E.; Gohl, Stefan; Reinicke, Stefan [Helmholtz-Zentrum Dresden-Rossendorf (HZDR), Dresden (Germany); TU Dresden (Germany); Reinhardt, Tobias P.; Zuber, Kai [TU Dresden (Germany); Collaboration: R3B-Collaboration

    2016-07-01

    The detection of 200-1000 MeV neutrons requires large amounts of detector material because of the long nuclear interaction length of these particles. In the example of the NeuLAND neutron time-of-flight detector at FAIR, this is accomplished by using 3000 scintillator bars of 270 x 5 x 5 cm{sup 3} size made of the fast plastic polyvinyltoluene. In the present work, we investigated whether silicon photomultiplier (SiPM) photosensors can replace fast timing photomultiplier tubes. The response of the system consisting of scintillator, SiPM, and preamplifier was studied using 30 MeV single electrons provided by the ELBE superconducting electron linac. The results were interpreted by a simple Monte Carlo simulation, and the time resolution was found to obey an inverse-square-root scaling law with the number of fired pixels. In the electron beam tests, a time resolution of σ{sub t}=136 ps was reached with a pure SiPM readout, well within the design parameters for NeuLAND.

  20. Mode converter based on an inverse taper for multimode silicon nanophotonic integrated circuits.

    Science.gov (United States)

    Dai, Daoxin; Mao, Mao

    2015-11-02

    An inverse taper on silicon is proposed and designed to realize an efficient mode converter available for the connection between multimode silicon nanophotonic integrated circuits and few-mode fibers. The present mode converter has a silicon-on-insulator inverse taper buried in a 3 × 3μm(2) SiN strip waveguide to deal with not only for the fundamental mode but also for the higher-order modes. The designed inverse taper enables the conversion between the six modes (i.e., TE(11), TE(21), TE(31), TE(41), TM(11), TM(12)) in a 1.4 × 0.22μm(2) multimode SOI waveguide and the six modes (like the LP(01), LP(11a), LP(11b) modes in a few-mode fiber) in a 3 × 3μm(2) SiN strip waveguide. The conversion efficiency for any desired mode is higher than 95.6% while any undesired mode excitation ratio is lower than 0.5%. This is helpful to make multimode silicon nanophotonic integrated circuits (e.g., the on-chip mode (de)multiplexers developed well) available to work together with few-mode fibers in the future.

  1. Process-Based Cost Modeling of Photonics Manufacture: The Cost Competitiveness of Monolithic Integration of a 1550-nm DFB Laser and an Electroabsorptive Modulator on an InP Platform

    Science.gov (United States)

    Fuchs, Erica R. H.; Bruce, E. J.; Ram, R. J.; Kirchain, Randolph E.

    2006-08-01

    The monolithic integration of components holds promise to increase network functionality and reduce packaging expense. Integration also drives down yield due to manufacturing complexity and the compounding of failures across devices. Consensus is lacking on the economically preferred extent of integration. Previous studies on the cost feasibility of integration have used high-level estimation methods. This study instead focuses on accurate-to-industry detail, basing a process-based cost model of device manufacture on data collected from 20 firms across the optoelectronics supply chain. The model presented allows for the definition of process organization, including testing, as well as processing conditions, operational characteristics, and level of automation at each step. This study focuses on the cost implications of integration of a 1550-nm DFB laser with an electroabsorptive modulator on an InP platform. Results show the monolithically integrated design to be more cost competitive over discrete component options regardless of production scale. Dominant cost drivers are packaging, testing, and assembly. Leveraging the technical detail underlying model projections, component alignment, bonding, and metal-organic chemical vapor deposition (MOCVD) are identified as processes where technical improvements are most critical to lowering costs. Such results should encourage exploration of the cost advantages of further integration and focus cost-driven technology development.

  2. VCSEL Scaling, Laser Integration on Silicon, and Bit Energy

    Science.gov (United States)

    2017-03-01

    especially the laser. Highly compact directly modulated lasers ( DMLs ) have been researched to meet this goal. The most favored technology will likely be...question of which achieves lower bit energy, a DML or a continuous-wave (CW) laser coupled to an integrated modulator. Transceiver suppliers are also...development that can utilize high efficiency DMLs that reach very high modulation speed. Oxide-VCSELs [1] do not yet take full advantage of the

  3. Through-silicon-via crosstalk model and optimization design for three-dimensional integrated circuits

    International Nuclear Information System (INIS)

    Qian Li-Bo; Xia Yin-Shui; Zhu Zhang-Ming; Ding Rui-Xue; Yang Yin-Tang

    2014-01-01

    Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three-dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 mV and 379 mV reductions in the peak noise voltage, respectively

  4. EQUIPMENT FOR NONDESTRUCTIVE TESTING OF SILICON WAFERS SUBMICRON TOPOLOGY DURING THE FABRICATION OF INTEGRATED CIRCUITS

    Directory of Open Access Journals (Sweden)

    S. A. Chizhik

    2013-01-01

    Full Text Available The advantages of using an atomic force microscopy in manufacturing of submicron integrated circuits are described. The possibilities of characterizing the surface morphology and the etching profile for silicon substrate and bus lines, estimation of the periodicity and size of bus lines, geometrical stability for elementary bus line are shown. Methods of optical and atomic force microcopies are combined in one diagnostic unit. Scanning  probe  microscope  (SPM  200  is  designed  and  produced.  Complex  SPM  200  realizes  nondestructive control of microelectronics elements made on silicon wafers up to 200 mm in diameter and it is introduced by JSC «Integral» for the purpose of operational control, metrology and acceptance of the final product.

  5. Technology for the compatible integration of silicon detectors with readout electronics

    International Nuclear Information System (INIS)

    Zimmer, G.

    1984-01-01

    Compatible integration of detectors and readout electronics on the same silicon substrate is of growing interest. As the methods of microelectronics technology have already been adapted for detector fabrication, a common technology basis for detectors and readout electronics is available. CMOS technology exhibits most attractive features for the compatible realization of readout electronics when advanced LSI processing steps are combined with detector requirements. The essential requirements for compatible integration are the availability of high resistivity (100)-oriented single crystalline silicon substrate, the formation of suitably doped areas for MOS circuits and the isolation of the low voltage circuit from the detector operated at much higher supply voltage. Junction isolation as a first approach based on present production technology and dielectric isolation based on an advanced SOI-LSI technology are discussed as the most promising solutions for present and future applications, respectively. (orig.)

  6. A low cost and hybrid technology for integrating silicon sensors or actuators in polymer microfluidic systems

    International Nuclear Information System (INIS)

    Charlot, Samuel; Gué, Anne-Marie; Tasselli, Josiane; Marty, Antoine; Abgrall, Patrick; Estève, Daniel

    2008-01-01

    This paper describes a new technology permitting a hybrid integration of silicon chips in polymer (PDMS and SU8) microfluidic structures. This two-step technology starts with transferring the silicon device onto a rigid substrate (typically PCB) and planarizing it, and then it proceeds with stacking of the polymer-made fluidic network onto the device. The technology is low cost, based on screen printing and lamination, can be applied to treat large surface areas, and is compatible with standard photolithography and vacuum based approaches. We show, as an example, the integration of a thermal sensor inside channels made of PDMS or SU8. The developed structures had no fluid leaks at the Si/polymer interfaces and the electrical circuit was perfectly tightproof. (note)

  7. Studies and integration of Silicon-based light emitting systems

    OpenAIRE

    González Fernández, Alfredo A.

    2014-01-01

    [spa] Este proyecto aborda el estudio de dispositivos y materiales luminiscentes basados en silicio para su uso en la fabricación de un sistema óptico que integre emisor de luz, guía de ondas, y sensor en un solo chip obtenido mediante el uso de técnicas y materiales estándar para la fabricación CMOS. Las características atómicas y estructurales de los materiales son analizados y relacionados con su respuesta luminiscente. Considerando los resultados de la caracterización del material a...

  8. Integrated investigation approach for determining mechanical properties of poly-silicon membranes

    OpenAIRE

    Brueckner, J.; Dehe, A.; Auerswald, E.; Dudek, R.; Michel, B.; Rzepka, S.

    2014-01-01

    A methodology is presented for determining mechanical properties of free-standing thin films such as poly-silicon membranes. The integrated investigation approach comprises test structure development, mechanical testing, and numerical simulation. All membrane test structures developed and manufactured consist of the same material but have different stiffness due to variations in the geometric design. The mechanical tests apply microscopic loads utilizing a nanoindentation tool. Young's modulu...

  9. High-contrast gratings for long-wavelength laser integration on silicon

    Science.gov (United States)

    Sciancalepore, Corrado; Descos, Antoine; Bordel, Damien; Duprez, Hélène; Letartre, Xavier; Menezo, Sylvie; Ben Bakir, Badhise

    2014-02-01

    Silicon photonics is increasingly considered as the most promising way-out to the relentless growth of data traffic in today's telecommunications infrastructures, driving an increase in transmission rates and computing capabilities. This is in fact challenging the intrinsic limit of copper-based, short-reach interconnects and microelectronic circuits in data centers and server architectures to offer enough modulation bandwidth at reasonable power dissipation. In the context of the heterogeneous integration of III-V direct-bandgap materials on silicon, optics with high-contrast metastructures enables the efficient implementation of optical functions such as laser feedback, input/output (I/O) to active/passive components, and optical filtering, while heterogeneous integration of III-V layers provides sufficient optical gain, resulting in silicon-integrated laser sources. The latest ensure reduced packaging costs and reduced footprint for the optical transceivers, a key point for the short reach communications. The invited talk will introduce the audience to the latest breakthroughs concerning the use of high-contrast gratings (HCGs) for the integration of III-V-on-Si verticalcavity surface-emitting lasers (VCSELs) as well as Fabry-Perot edge-emitters (EELs) in the main telecom band around 1.55 μm. The strong near-field mode overlap within HCG mirrors can be exploited to implement unique optical functions such as dense wavelength division multiplexing (DWDM): a 16-λ100-GHz-spaced channels VCSEL array is demonstrated. On the other hand, high fabrication yields obtained via molecular wafer bonding of III-V alloys on silicon-on-insulator (SOI) conjugate excellent device performances with cost-effective high-throughput production, supporting industrial needs for a rapid research-to-market transfer.

  10. An improved PIN photodetector with integrated JFET on high-resistivity silicon

    International Nuclear Information System (INIS)

    Dalla Betta, Gian-Franco; Piemonte, Claudio; Boscardin, Maurizio; Gregori, Paolo; Zorzi, Nicola; Fazzi, Alberto; Pignatel, Giorgio U.

    2006-01-01

    We report on a PIN photodetector integrated with a Junction Field Effect Transistor (JFET) on a high-resistivity silicon substrate. Owing to a modified fabrication technology, the electrical and noise characteristics of the JFET transistor have been enhanced with respect to the previous versions of the device, allowing the performance to be significantly improved. In this paper, the main design and technological aspects relevant to the proposed structure are addressed and experimental results from the electrical characterization are discussed

  11. Integrated Circuit Interconnect Lines on Lossy Silicon Substrate with Finite Element Method

    OpenAIRE

    Sarhan M. Musa,; Matthew N. O. Sadiku

    2014-01-01

    The silicon substrate has a significant effect on the inductance parameter of a lossy interconnect line on integrated circuit. It is essential to take this into account in determining the transmission line electrical parameters. In this paper, a new quasi-TEM capacitance and inductance analysis of multiconductor multilayer interconnects is successfully demonstrated using finite element method (FEM). We specifically illustrate the electrostatic modeling of single and coupled in...

  12. Monolithic integration of AlGaInP laser diodes on SiGe/Si substrates by molecular beam epitaxy

    International Nuclear Information System (INIS)

    Kwon, O.; Boeckl, J. J.; Lee, M. L.; Pitera, A. J.; Fitzgerald, E. A.; Ringel, S. A.

    2006-01-01

    Room temperature operation of visible AlGaInP laser diodes epitaxially integrated on Si was demonstrated. Compressively strained laser heterostructures were grown by molecular beam epitaxy (MBE) on low dislocation density SiGe/Si substrates, where the threading dislocation density of the top relaxed Ge layers was measured in the range of 2x10 6 cm -2 . A threshold current density of J th ∼1.65 kA/cm 2 for the as-cleaved, gain-guided AlGaInP laser grown on SiGe/Si was obtained at the peak emission wavelength of 680 nm under pulsed mode current injection. These results show that not only can high quality AlGaInP materials grown by MBE be achieved on Si via relaxed SiGe interlayers, but the prototype demonstration of laser diode operation on Si illustrates that very defect sensitive optoelectronics in the III-P system can indeed be integrated with Si substrates by heteroepitaxial methods

  13. Single- and double- lumen silicone breast implant integrity: prospective evaluation of MR and US criteria.

    Science.gov (United States)

    Berg, W A; Caskey, C I; Hamper, U M; Kuhlman, J E; Anderson, N D; Chang, B W; Sheth, S; Zerhouni, E A

    1995-10-01

    To evaluate the accuracy of magnetic resonance (MR) and ultrasound (US) criteria for breast implant integrity. One hundred twenty-two single-lumen silicone breast implants and 22 bilumen implants were evaluated with surface coil MR imaging and US and surgically removed. MR criteria for implant failure were a collapsed implant shell ("linguine sign"), foci of silicone outside the shell ("noose sign"), and extracapsular gel, US criteria were collapsed shell, low-level echoes within the gel, and "snowstorm" echoes of extracapsular silicone. Among single-lumen implants, MR imaging depicted 39 of 40 ruptures, 14 of 28 with minimal leakage; 49 of 54 intact implants were correctly interpreted. US depicted 26 of 40 ruptured implants, four of 28 with minimal leakage, and 30 of 54 intact implants. Among bilumen implants, MR imaging depicted four of five implants with rupture of both lumina and nine of 10 as intact; US depicted one rupture and helped identify two of 10 as intact. Mammography accurately depicted the status of 29 of 30 bilumen implants with MR imaging correlation. MR imaging depicts implant integrity more accurately than US; neither method reliably depicts minimal leakage with shell collapse. Mammography is useful in screening bilumen implant integrity.

  14. Software-defined networking control plane for seamless integration of multiple silicon photonic switches in Datacom networks.

    Science.gov (United States)

    Shen, Yiwen; Hattink, Maarten H N; Samadi, Payman; Cheng, Qixiang; Hu, Ziyiz; Gazman, Alexander; Bergman, Keren

    2018-04-16

    Silicon photonics based switches offer an effective option for the delivery of dynamic bandwidth for future large-scale Datacom systems while maintaining scalable energy efficiency. The integration of a silicon photonics-based optical switching fabric within electronic Datacom architectures requires novel network topologies and arbitration strategies to effectively manage the active elements in the network. We present a scalable software-defined networking control plane to integrate silicon photonic based switches with conventional Ethernet or InfiniBand networks. Our software-defined control plane manages both electronic packet switches and multiple silicon photonic switches for simultaneous packet and circuit switching. We built an experimental Dragonfly network testbed with 16 electronic packet switches and 2 silicon photonic switches to evaluate our control plane. Observed latencies occupied by each step of the switching procedure demonstrate a total of 344 µs control plane latency for data-center and high performance computing platforms.

  15. Silicon Nanowires for All-Optical Signal Processing in Optical Communication

    DEFF Research Database (Denmark)

    Pu, Minhao; Hu, Hao; Ji, Hua

    2012-01-01

    Silicon (Si), the second most abundant element on earth, has dominated in microelectronics for many decades. It can also be used for photonic devices due to its transparency in the range of optical telecom wavelengths which will enable a platform for a monolithic integration of optics...... and microelectronics. Silicon photonic nanowire waveguides fabricated on silicon-on-insulator (SOI) substrates are crucial elements in nano-photonic integrated circuits. The strong light confinement in nanowires induced by high index contrast SOI material enhances the nonlinear effects in the silicon nanowire core...... such as four-wave mixing (FWM) which is an imperative process for optical signal processing. Since the current mature silicon fabrication technology enables a precise dimension control on nanowires, dispersion engineering can be performed by tailoring nanowire dimensions to realize an efficient nonlinear...

  16. A bipolar analog front-end integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1993-11-01

    A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker. The IC was designed and tested at LBL and was fabricated using AT ampersand T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16 nsec time-walk for 1.25 to 10fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a Φ=10 14 protons/cm 2 have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process

  17. Single-crystal silicon trench etching for fabrication of highly integrated circuits

    Science.gov (United States)

    Engelhardt, Manfred

    1991-03-01

    The development of single crystal silicon trench etching for fabrication of memory cells in 4 16 and 64Mbit DRAMs is reviewed in this paper. A variety of both etch tools and process gases used for the process development is discussed since both equipment and etch chemistry had to be improved and changed respectively to meet the increasing requirements for high fidelity pattern transfer with increasing degree of integration. In additon to DRAM cell structures etch results for deep trench isolation in advanced bipolar ICs and ASICs are presented for these applications grooves were etched into silicon through a highly doped buried layer and at the borderline of adjacent p- and n-well areas respectively. Shallow trench etching of large and small exposed areas with identical etch rates is presented as an approach to replace standard LOCOS isolation by an advanced isolation technique. The etch profiles were investigated with SEM TEM and AES to get information on contathination and damage levels and on the mechanism leading to anisotropy in the dry etch process. Thermal wave measurements were performed on processed single crystal silicon substrates for a fast evaluation of the process with respect to plasma-induced substrate degradation. This useful technique allows an optimization ofthe etch process regarding high electrical performance of the fully processed memory chip. The benefits of the use of magnetic fields for the development of innovative single crystal silicon dry

  18. Gallium Phosphide Integrated with Silicon Heterojunction Solar Cells

    Science.gov (United States)

    Zhang, Chaomin

    It has been a long-standing goal to epitaxially integrate III-V alloys with Si substrates which can enable low-cost microelectronic and optoelectronic systems. Among the III-V alloys, gallium phosphide (GaP) is a strong candidate, especially for solar cells applications. Gallium phosphide with small lattice mismatch ( 0.4%) to Si enables coherent/pseudomorphic epitaxial growth with little crystalline defect creation. The band offset between Si and GaP suggests that GaP can function as an electron-selective contact, and it has been theoretically shown that GaP/Si integrated solar cells have the potential to overcome the limitations of common a-Si based heterojunction (SHJ) solar cells. Despite the promising potential of GaP/Si heterojunction solar cells, there are two main obstacles to realize high performance photovoltaic devices from this structure. First, the growth of the polar material (GaP) on the non-polar material (Si) is a challenge in how to suppress the formation of structural defects, such as anti-phase domains (APD). Further, it is widely observed that the minority-carrier lifetime of the Si substrates is significantly decreased during epitaxially growth of GaP on Si. In this dissertation, two different GaP growth methods were compared and analyzed, including migration-enhanced epitaxy (MEE) and traditional molecular beam epitaxy (MBE). High quality GaP can be realized on precisely oriented (001) Si substrates by MBE growth, and the investigation of structural defect creation in the GaP/Si epitaxial structures was conducted using high resolution X-ray diffraction (HRXRD) and high resolution transmission electron microscopy (HRTEM). The mechanisms responsible for lifetime degradation were further investigated, and it was found that external fast diffusors are the origin for the degradation. Two practical approaches including the use of both a SiNx diffusion barrier layer and P-diffused layers, to suppress the Si minority-carrier lifetime degradation

  19. Silicon-Based Technology for Integrated Waveguides and mm-Wave Systems

    DEFF Research Database (Denmark)

    Jovanovic, Vladimir; Gentile, Gennaro; Dekker, Ronald

    2015-01-01

    IC processing is used to develop technology for silicon-filled millimeter-wave-integrated waveguides. The front-end process defines critical waveguide sections and enables integration of dedicated components, such as RF capacitors and resistors. Wafer gluing is used to strengthen the mechanical...... support and deep reactive-ion etching forms the waveguide bulk with smooth and nearly vertical sidewalls. Aluminum metallization covers the etched sidewalls, fully enclosing the waveguides in metal from all sides. Waveguides are fabricated with a rectangular cross section of 560 μm x 280 μm. The measured...

  20. An absorptive single-pole four-throw switch using multiple-contact MEMS switches and its application to a monolithic millimeter-wave beam-forming network

    International Nuclear Information System (INIS)

    Lee, Sanghyo; Kim, Jong-Man; Kim, Yong-Kweon; Kwon, Youngwoo

    2009-01-01

    In this paper, a new absorptive single-pole four-throw (SP4T) switch based on multiple-contact switching is proposed and integrated with a Butler matrix to demonstrate a monolithic beam-forming network at millimeter waves (mm waves). In order to simplify the switching driving circuit and reduce the number of unit switches in an absorptive SP4T switch, the individual switches were replaced with long-span multiple-contact switches using stress-free single-crystalline-silicon MEMS technology. This approach improves the mechanical stability as well as the manufacturing yield, thereby allowing successful integration into a monolithic beam former. The fabricated absorptive SP4T MEMS switch shows insertion loss less than 1.3 dB, return losses better than 11 dB at 30 GHz and wideband isolation performance higher than 39 dB from 20 to 40 GHz. The absorptive SP4T MEMS switch is integrated with a 4 × 4 Butler matrix on a single chip to implement a monolithic beam-forming network, directing beam into four distinct angles. Array factors from the measured data show that the proposed absorptive SPnT MEMS switch can be effectively used for high-performance mm-wave beam-switching systems. This work corresponds to the first demonstration of a monolithic beam-forming network using switched beams

  1. Monolithic JFET preamplifier for ionization chamber calorimeter

    International Nuclear Information System (INIS)

    Radeka, V.; Rescia, S.; Manfredi, P.F.; Speziali, V.

    1990-10-01

    A monolithic charge sensitive preamplifier using exclusively n-channel diffused JFETs has been designed and is now being fabricated by INTERFET Corp. by means of a dielectrically isolated process which allows preserving as much as possible the technology upon which discrete JFETs are based. A first prototype built by means of junction isolated process has been delivered. The characteristics of monolithically integrated JFETs compare favorably with discrete devices. First results of tests of a preamplifier which uses these devices are reported. 4 refs

  2. Integrated Amorphous Silicon p-i-n Temperature Sensor for CMOS Photonics

    Directory of Open Access Journals (Sweden)

    Sandro Rao

    2016-01-01

    Full Text Available Hydrogenated amorphous silicon (a-Si:H shows interesting optoelectronic and technological properties that make it suitable for the fabrication of passive and active micro-photonic devices, compatible moreover with standard microelectronic devices on a microchip. A temperature sensor based on a hydrogenated amorphous silicon p-i-n diode integrated in an optical waveguide for silicon photonics applications is presented here. The linear dependence of the voltage drop across the forward-biased diode on temperature, in a range from 30 °C up to 170 °C, has been used for thermal sensing. A high sensitivity of 11.9 mV/°C in the bias current range of 34–40 nA has been measured. The proposed device is particularly suitable for the continuous temperature monitoring of CMOS-compatible photonic integrated circuits, where the behavior of the on-chip active and passive devices are strongly dependent on their operating temperature.

  3. Effects of plasma-deposited silicon nitride passivation on the radiation hardness of CMOS integrated circuits

    International Nuclear Information System (INIS)

    Clement, J.J.

    1980-01-01

    The use of plasma-deposited silicon nitride as a final passivation over metal-gate CMOS integrated circuits degrades the radiation hardness of these devices. The hardness degradation is manifested by increased radiation-induced threshold voltage shifts caused principally by the charging of new interface states and, to a lesser extent, by the trapping of holes created upon exposure to ionizing radiation. The threshold voltage shifts are a strong function of the deposition temperature, and show very little dependence on thickness for films deposited at 300 0 C. There is some correlation between the threshold voltage shifts and the hydrogen content of the PECVD silicon nitride films used as the final passivation layer as a function of deposition temperature. The mechanism by which the hydrogen contained in these films may react with the Si/SiO 2 interface is not clear at this point

  4. Micro direct methanol fuel cell with perforated silicon-plate integrated ionomer membrane

    DEFF Research Database (Denmark)

    Larsen, Jackie Vincent; Dalslet, Bjarke Thomas; Johansson, Anne-Charlotte Elisabeth Birgitta

    2014-01-01

    This article describes the fabrication and characterization of a silicon based micro direct methanol fuel cell using a Nafion ionomer membrane integrated into a perforated silicon plate. The focus of this work is to provide a platform for micro- and nanostructuring of a combined current collector...... at a perforation ratio of 40.3%. The presented fuel cells also show a high volumetric peak power density of 2 mW cm−3 in light of the small system volume of 480 μL, while being fully self contained and passively feed....... and catalytic electrode. AC impedance spectroscopy is utilized alongside IV characterization to determine the influence of the plate perforation geometries on the cell performance. It is found that higher ratios of perforation increases peak power density, with the highest achieved being 2.5 mW cm−2...

  5. Synthesis of Porous Carbon Monoliths Using Hard Templates.

    Science.gov (United States)

    Klepel, Olaf; Danneberg, Nina; Dräger, Matti; Erlitz, Marcel; Taubert, Michael

    2016-03-21

    The preparation of porous carbon monoliths with a defined shape via template-assisted routes is reported. Monoliths made from porous concrete and zeolite were each used as the template. The porous concrete-derived carbon monoliths exhibited high gravimetric specific surface areas up to 2000 m²·g -1 . The pore system comprised macro-, meso-, and micropores. These pores were hierarchically arranged. The pore system was created by the complex interplay of the actions of both the template and the activating agent as well. On the other hand, zeolite-made template shapes allowed for the preparation of microporous carbon monoliths with a high volumetric specific surface area. This feature could be beneficial if carbon monoliths must be integrated into technical systems under space-limited conditions.

  6. Monolithic integrated photoreceiver for 1.3--1.55-μm wavelengths: Association of a Schottky photodiode and a field-effect transistor on GaInP-GaInAs heteroepitaxy

    International Nuclear Information System (INIS)

    Therani, A.H.; Decoster, D.; Vilcot, J.P.; Razeghi, M.

    1988-01-01

    We present a monolithic integrated circuit associating a Schottky photodiode and a field-effect transistor which has been fabricated, for the first time, on Ga/sub 0.49/In/sub 0.51/P/Ga/sub 0.47/In/sub 0.53/As strained heteroepitaxial material. Static, dynamic, and noise properties of the Schottky photodiode, the field-effect transistor, and the integrated circuit have been investigated and are reported. As an example, dynamic responsivity up to 50 A/W can be achieved at 1.3-μm wavelength for the integrated photoreceiver. The performance of the device is discussed, taking into account the integrated circuit design and the main characteristics of the material

  7. Analysis of bovine milk caseins on organic monolithic columns: an integrated capillary liquid chromatography-high resolution mass spectrometry approach for the study of time-dependent casein degradation.

    Science.gov (United States)

    Pierri, Giuseppe; Kotoni, Dorina; Simone, Patrizia; Villani, Claudio; Pepe, Giacomo; Campiglia, Pietro; Dugo, Paola; Gasparrini, Francesco

    2013-10-25

    Casein proteins constitute approximately 80% of the proteins present in bovine milk and account for many of its nutritional and technological properties. The analysis of the casein fraction in commercially available pasteurized milk and the study of its time-dependent degradation is of considerable interest in the agro-food industry. Here we present new analytical methods for the study of caseins in fresh and expired bovine milk, based on the use of lab-made capillary organic monolithic columns. An integrated capillary high performance liquid chromatography and high-resolution mass spectrometry (Cap-LC-HRMS) approach was developed, exploiting the excellent resolution, permeability and biocompatibility of organic monoliths, which is easily adaptable to the analysis of intact proteins. The resolution obtained on the lab-made Protein-Cap-RP-Lauryl-γ-Monolithic column (270 mm × 0.250 mm length × internal diameter, L × I.D.) in the analysis of commercial standard caseins (αS-CN, β-CN and κ-CN) through Cap-HPLC-UV was compared to the one observe using two packed capillary C4 columns, the ACE C4 (3 μm, 150 mm × 0.300 mm, L × I.D.) and the Jupiter C4 column (5 μm, 150 mm × 0.300 mm, L × I.D.). Thanks to the higher resolution observed, the monolithic capillary column was chosen for the successive degradation studies of casein fractions extracted from bovine milk 1-4 weeks after expiry date. The comparison of the UV chromatographic profiles of skim, semi-skim and whole milk showed a major stability of whole milk towards time-dependent degradation of caseins, which was further sustained by high-resolution analysis on a 50-cm long monolithic column using a 120-min time gradient. Contemporarily, the exact monoisotopic and average molecular masses of intact αS-CN and β-CN protein standards were obtained through high resolution mass spectrometry and used for casein identification in Cap-LC-HRMS analysis. Finally, the proteolytic degradation of β-CN in skim milk

  8. Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

    International Nuclear Information System (INIS)

    Yin, Lan; Harburg, Daniel V.; Rogers, John A.; Bozler, Carl; Omenetto, Fiorenzo

    2015-01-01

    Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems

  9. Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

    Energy Technology Data Exchange (ETDEWEB)

    Yin, Lan; Harburg, Daniel V.; Rogers, John A., E-mail: jrogers@illinois.edu [Department of Materials Science and Engineering, Beckman Institute for Advanced Science and Technology, and Frederick Seitz Materials Research Laboratory, University of Illinois at Urbana-Champaign, 104 S Goodwin Ave., Urbana, Illinois 61801 (United States); Bozler, Carl [Lincoln Laboratory, Massachusetts Institute of Technology, 244 Wood Street, Lexington, Massachusetts 02420 (United States); Omenetto, Fiorenzo [Department of Biomedical Engineering, Department of Physics, Tufts University, 4 Colby St., Medford, Massachusetts 02155 (United States)

    2015-01-05

    Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

  10. Integration of the end cap TEC+ of the CMS silicon strip tracker

    Energy Technology Data Exchange (ETDEWEB)

    Bremer, Richard

    2008-04-28

    CMS is the first large experiment of high-energy particle physics whose inner tracking system is exclusively instrumented with silicon detector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction point in 10-12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completion of the end caps of the tracking system. The institute played a leading role in the end cap design, produced virtually all support structures and several important electrical components, designed and built the laser alignment system of the tracker, performed system tests and finally integrated one of the two end caps in Aachen. This integration constitutes the central part of the present thesis work. The main focus was on the development of methods to recognise defects early in the integration process and to assert the detector's functionality. Characteristic quantities such as the detector noise or the optical gain of the readout chain were determined during integration as well as during a series of tests performed after transport of the end cap from Aachen to CERN. The procedures followed during the mechanical integration of the detector and during the commissioning of integrated sectors are explained, and the software packages developed for quality assurance are described. In addition, results of the detector readout are presented. During the integration phase, sub-structures of the end cap - named petals - were subjected to a reception test which has also been designed and operated as part of this thesis work. The test setup and software developed for the test are introduced and an account of the analysis of the recorded data is given. Before the end cap project entered the production phase, a final test beam experiment was performed in which the suitability of a system of two fully equipped petals for operation at the LHC was checked. The measured ratio of the signal induced in the silicon sensors by minimal ionising

  11. Integration of the end cap TEC+ of the CMS silicon strip tracker

    International Nuclear Information System (INIS)

    Bremer, Richard

    2008-01-01

    CMS is the first large experiment of high-energy particle physics whose inner tracking system is exclusively instrumented with silicon detector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction point in 10-12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completion of the end caps of the tracking system. The institute played a leading role in the end cap design, produced virtually all support structures and several important electrical components, designed and built the laser alignment system of the tracker, performed system tests and finally integrated one of the two end caps in Aachen. This integration constitutes the central part of the present thesis work. The main focus was on the development of methods to recognise defects early in the integration process and to assert the detector's functionality. Characteristic quantities such as the detector noise or the optical gain of the readout chain were determined during integration as well as during a series of tests performed after transport of the end cap from Aachen to CERN. The procedures followed during the mechanical integration of the detector and during the commissioning of integrated sectors are explained, and the software packages developed for quality assurance are described. In addition, results of the detector readout are presented. During the integration phase, sub-structures of the end cap - named petals - were subjected to a reception test which has also been designed and operated as part of this thesis work. The test setup and software developed for the test are introduced and an account of the analysis of the recorded data is given. Before the end cap project entered the production phase, a final test beam experiment was performed in which the suitability of a system of two fully equipped petals for operation at the LHC was checked. The measured ratio of the signal induced in the silicon sensors by minimal ionising particles

  12. Nanowire-integrated microporous silicon membrane for continuous fluid transport in micro cooling device

    International Nuclear Information System (INIS)

    So, Hongyun; Pisano, Albert P.; Cheng, Jim C.

    2013-01-01

    We report an efficient passive micro pump system combining the physical properties of nanowires and micropores. This nanowire-integrated microporous silicon membrane was created to feed coolant continuously onto the surface of the wick in a micro cooling device to ensure it remains hydrated and in case of dryout, allow for regeneration of the system. The membrane was fabricated by photoelectrochemical etching to form micropores followed by hydrothermal growth of nanowires. This study shows a promising approach to address thermal management challenges for next generation electronic devices with absence of external power

  13. Ultra-fast photon counting with a passive quenching silicon photomultiplier in the charge integration regime

    Science.gov (United States)

    Zhang, Guoqing; Lina, Liu

    2018-02-01

    An ultra-fast photon counting method is proposed based on the charge integration of output electrical pulses of passive quenching silicon photomultipliers (SiPMs). The results of the numerical analysis with actual parameters of SiPMs show that the maximum photon counting rate of a state-of-art passive quenching SiPM can reach ~THz levels which is much larger than that of the existing photon counting devices. The experimental procedure is proposed based on this method. This photon counting regime of SiPMs is promising in many fields such as large dynamic light power detection.

  14. The SuperB Silicon Vertex Tracker and 3D vertical integration

    CERN Document Server

    Re, Valerio

    2011-01-01

    The construction of the SuperB high luminosity collider was approved and funded by the Italian government in 2011. The performance specifications set by the target luminosity of this machine (> 10^36 cm^-2 s^-1) ask for the development of a Silicon Vertex Tracker with high resolution, high tolerance to radiation and excellent capability of handling high data rates. This paper reviews the R&D activity that is being carried out for the SuperB SVT. Special emphasis is given to the option of exploiting 3D vertical integration to build advanced pixel sensors and readout electronics that are able to comply with SuperB vertexing requirements.

  15. Building integration photovoltaic module with reference to Ghana: using triple junction amorphous silicon

    OpenAIRE

    Essah, Emmanuel Adu

    2010-01-01

    This paper assesses the potential for using building integrated photovoltaic (BIPV) \\ud roof shingles made from triple-junction amorphous silicon (3a-Si) for electrification \\ud and as a roofing material in tropical countries, such as Accra, Ghana. A model roof \\ud was constructed using triple-junction amorphous (3a-Si) PV on one section and \\ud conventional roofing tiles on the other. The performance of the PV module and tiles \\ud were measured, over a range of ambient temperatures and solar...

  16. Piezoresistive silicon nanowire resonators as embedded building blocks in thick SOI

    Science.gov (United States)

    Nasr Esfahani, Mohammad; Kilinc, Yasin; Çagatay Karakan, M.; Orhan, Ezgi; Hanay, M. Selim; Leblebici, Yusuf; Erdem Alaca, B.

    2018-04-01

    The use of silicon nanowire resonators in nanoelectromechanical systems for new-generation sensing and communication devices faces integration challenges with higher-order structures. Monolithic and deterministic integration of such nanowires with the surrounding microscale architecture within the same thick crystal is a critical aspect for the improvement of throughput, reliability and device functionality. A monolithic and IC-compatible technology based on a tuned combination of etching and protection processes was recently introduced yielding silicon nanowires within a 10 μ m-thick device layer. Motivated by its success, the implications of the technology regarding the electromechanical resonance are studied within a particular setting, where the resonator is co-fabricated with all terminals and tuning electrodes. Frequency response is measured via piezoresistive readout with frequency down-mixing. Measurements indicate mechanical resonance with frequencies as high as 100 MHz exhibiting a Lorentzian behavior with proper transition to nonlinearity, while Allan deviation on the order of 3-8 ppm is achieved. Enabling the fabrication of silicon nanowires in thick silicon crystals using conventional semiconductor manufacturing, the present study thus demonstrates an alternative pathway to bottom-up and thin silicon-on-insulator approaches for silicon nanowire resonators.

  17. An analog front-end bipolar-transistor integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1994-01-01

    Since 1989 the Solenoidal Detector Collaboration (SDC) has been developing a general purpose detector to be operated at the Superconducting Super Collider (SSC). A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDS silicon tracker. The IC was designed and tested at LBL and was fabricated using AT and T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a φ = 10 14 protons/cm 2 have been performed on the JC, demonstrating the radiation hardness of the complementary bipolar process

  18. Physical and electrical characterization of corundum substrates and epitaxial silicon layers in view of fabricating integrated circuits

    International Nuclear Information System (INIS)

    Trilhe, J.; Legal, H.; Rolland, G.

    1975-01-01

    The S.O.S. technology (silicon on insulating substrate) allows compact, radiation hard, fast integrated circuits to be fabricated. It is noticeable that complex integrated circuits on corundum substrates obtained with various fabrication processes have various electrical characteristics. Possible correlations between the macroscopic defects of the substrate and the electrical characteristics of the circuit were investigated [fr

  19. Fibrous monolithic ceramics

    International Nuclear Information System (INIS)

    Kovar, D.; King, B.H.; Trice, R.W.; Halloran, J.W.

    1997-01-01

    Fibrous monolithic ceramics are an example of a laminate in which a controlled, three-dimensional structure has been introduced on a submillimeter scale. This unique structure allows this all-ceramic material to fail in a nonbrittle manner. Materials have been fabricated and tested with a variety of architectures. The influence on mechanical properties at room temperature and at high temperature of the structure of the constituent phases and the architecture in which they are arranged are discussed. The elastic properties of these materials can be effectively predicted using existing models. These models also can be extended to predict the strength of fibrous monoliths with an arbitrary orientation and architecture. However, the mechanisms that govern the energy absorption capacity of fibrous monoliths are unique, and experimental results do not follow existing models. Energy dissipation occurs through two dominant mechanisms--delamination of the weak interphases and then frictional sliding after cracking occurs. The properties of the constituent phases that maximize energy absorption are discussed. In this article, the authors examine the structure of Si 3 N 4 -BN fibrous monoliths from the submillimeter scale of the crack-deflecting cell-cell boundary features to the nanometer scale of the BN cell boundaries

  20. A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits.

    Science.gov (United States)

    Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

    2017-12-01

    One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe 2 , a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

  1. A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits

    Science.gov (United States)

    Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M.; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K.; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

    2017-12-01

    One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe2, a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

  2. Characterization of SOI monolithic detector system

    Science.gov (United States)

    Álvarez-Rengifo, P. L.; Soung Yee, L.; Martin, E.; Cortina, E.; Ferrer, C.

    2013-12-01

    A monolithic active pixel sensor for charged particle tracking was developed. This research is performed within the framework of an R&D project called TRAPPISTe (Tracking Particles for Physics Instrumentation in SOI Technology) whose aim is to evaluate the feasibility of developing a Monolithic Active Pixel Sensor (MAPS) with Silicon-on-Insulator (SOI) technology. Two chips were fabricated: TRAPPISTe-1 and TRAPPISTe-2. TRAPPISTe-1 was produced at the WINFAB facility at the Université catholique de Louvain (UCL), Belgium, in a 2 μm fully depleted (FD-SOI) CMOS process. TRAPPISTe-2 was fabricated with the LAPIS 0.2 μm FD-SOI CMOS process. The electrical characterization on single transistor test structures and of the electronic readout for the TRAPPISTe series of monolithic pixel detectors was carried out. The behavior of the prototypes’ electronics as a function of the back voltage was studied. Results showed that both readout circuits exhibited sensitivity to the back voltage. Despite this unwanted secondary effect, the responses of TRAPPISTe-2 amplifiers can be improved by a variation in the circuit parameters.

  3. Metal oxide nanorod arrays on monolithic substrates

    Energy Technology Data Exchange (ETDEWEB)

    Gao, Pu-Xian; Guo, Yanbing; Ren, Zheng

    2018-01-02

    A metal oxide nanorod array structure according to embodiments disclosed herein includes a monolithic substrate having a surface and multiple channels, an interface layer bonded to the surface of the substrate, and a metal oxide nanorod array coupled to the substrate surface via the interface layer. The metal oxide can include ceria, zinc oxide, tin oxide, alumina, zirconia, cobalt oxide, and gallium oxide. The substrate can include a glass substrate, a plastic substrate, a silicon substrate, a ceramic monolith, and a stainless steel monolith. The ceramic can include cordierite, alumina, tin oxide, and titania. The nanorod array structure can include a perovskite shell, such as a lanthanum-based transition metal oxide, or a metal oxide shell, such as ceria, zinc oxide, tin oxide, alumina, zirconia, cobalt oxide, and gallium oxide, or a coating of metal particles, such as platinum, gold, palladium, rhodium, and ruthenium, over each metal oxide nanorod. Structures can be bonded to the surface of a substrate and resist erosion if exposed to high velocity flow rates.

  4. Integration Science and Technology of Silicon-Based Ceramics and Composites:Technical Challenges and Opportunities

    Science.gov (United States)

    Singh, M.

    2013-01-01

    Ceramic integration technologies enable hierarchical design and manufacturing of intricate ceramic and composite parts starting with geometrically simpler units that are subsequently joined to themselves and/or to metals to create components with progressively higher levels of complexity and functionality. However, for the development of robust and reliable integrated systems with optimum performance for high temperature applications, detailed understanding of various thermochemical and thermomechanical factors is critical. Different technical approaches are required for the integration of ceramic to ceramic and ceramic to metal systems. Active metal brazing, in particular, is a simple and cost-effective method to integrate ceramic to metallic components. Active braze alloys usually contain a reactive filler metal (e.g., Ti, Cr, V, Hf etc) that promotes wettability and spreading by inducing chemical reactions with the ceramics and composites. In this presentation, various examples of brazing of silicon nitride to themselves and to metallic systems are presented. Other examples of joining of ceramic composites (C/SiC and SiC/SiC) using ceramic interlayers and the resulting microstructures are also presented. Thermomechanical characterization of joints is presented for both types of systems. In addition, various challenges and opportunities in design, fabrication, and testing of integrated similar (ceramic-ceramic) and dissimilar (ceramic-metal) material systems will be discussed. Potential opportunities and need for the development of innovative design philosophies, approaches, and integrated system testing under simulated application conditions will also be presented.

  5. MIDAS: Automated Approach to Design Microwave Integrated Inductors and Transformers on Silicon

    Directory of Open Access Journals (Sweden)

    L. Aluigi

    2013-09-01

    Full Text Available The design of modern radiofrequency integrated circuits on silicon operating at microwave and millimeter-waves requires the integration of several spiral inductors and transformers that are not commonly available in the process design-kits of the technologies. In this work we present an auxiliary CAD tool for Microwave Inductor (and transformer Design Automation on Silicon (MIDAS that exploits commercial simulators and allows the implementation of an automatic design flow, including three-dimensional layout editing and electromagnetic simulations. In detail, MIDAS allows the designer to derive a preliminary sizing of the inductor (transformer on the bases of the design entries (specifications. It draws the inductor (transformer layers for the specific process design kit, including vias and underpasses, with or without patterned ground shield, and launches the electromagnetic simulations, achieving effective design automation with respect to the traditional design flow for RFICs. With the present software suite the complete design time is reduced significantly (typically 1 hour on a PC based on Intel® Pentium® Dual 1.80GHz CPU with 2-GB RAM. Afterwards both the device equivalent circuit and the layout are ready to be imported in the Cadence environment.

  6. Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

    Science.gov (United States)

    Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

    2016-09-19

    Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

  7. Vertical integration technologies for vertex detectors

    International Nuclear Information System (INIS)

    Ratti, L.

    2011-01-01

    This work is focused on the use of vertical integration (3D) technologies in the design of hybrid or monolithic pixel detectors in view of applications to silicon vertex trackers (SVTs) at the future high luminosity colliders. After a short introduction on the specifications of next-generation SVTs, the paper will discuss the general features of 3D microelectronic processes and the benefits they can provide to the design of pixel detectors for high energy physics experiments.

  8. Pseudo single crystal, direct-band-gap Ge{sub 0.89}Sn{sub 0.11} on amorphous dielectric layers towards monolithic 3D photonic integration

    Energy Technology Data Exchange (ETDEWEB)

    Li, Haofeng; Brouillet, Jeremy; Wang, Xiaoxin; Liu, Jifeng, E-mail: Jifeng.Liu@dartmouth.edu [Thayer School of Engineering, Dartmouth College, Hanover, New Hampshire 03755 (United States)

    2014-11-17

    We demonstrate pseudo single crystal, direct-band-gap Ge{sub 0.89}Sn{sub 0.11} crystallized on amorphous layers at <450 °C towards 3D Si photonic integration. We developed two approaches to seed the lateral single crystal growth: (1) utilize the Gibbs-Thomson eutectic temperature depression at the tip of an amorphous GeSn nanotaper for selective nucleation; (2) laser-induced nucleation at one end of a GeSn strip. Either way, the crystallized Ge{sub 0.89}Sn{sub 0.11} is dominated by a single grain >18 μm long that forms optoelectronically benign twin boundaries with others grains. These pseudo single crystal, direct-band-gap Ge{sub 0.89}Sn{sub 0.11} patterns are suitable for monolithic 3D integration of active photonic devices on Si.

  9. Thermally controlled coupling of a rolled-up microtube integrated with a waveguide on a silicon electronic-photonic integrated circuit.

    Science.gov (United States)

    Zhong, Qiuhang; Tian, Zhaobing; Veerasubramanian, Venkat; Dastjerdi, M Hadi Tavakoli; Mi, Zetian; Plant, David V

    2014-05-01

    We report on the first experimental demonstration of the thermal control of coupling strength between a rolled-up microtube and a waveguide on a silicon electronic-photonic integrated circuit. The microtubes are fabricated by selectively releasing a coherently strained GaAs/InGaAs heterostructure bilayer. The fabricated microtubes are then integrated with silicon waveguides using an abruptly tapered fiber probe. By tuning the gap between the microtube and the waveguide using localized heaters, the microtube-waveguide evanescent coupling is effectively controlled. With heating, the extinction ratio of a microtube whispering-gallery mode changes over an 18 dB range, while the resonant wavelength remains approximately unchanged. Utilizing this dynamic thermal tuning effect, we realize coupling modulation of the microtube integrated with the silicon waveguide at 2 kHz with a heater voltage swing of 0-6 V.

  10. Integrated Fabrication of a Microgripper

    Institute of Scientific and Technical Information of China (English)

    1999-01-01

    Successful implementation of simple mechanism on silicon chip is a prerequisite for monolithic microrobot-ic systems. This paper describes the integrated fabrication of polycrystalline silicon microgripper. Link, fixed andactive joint, and sliding flange structures with dimensions of micrometers have been fabricated on the substrate ofmonocrystalline silicon using silicon microfabrication technology. This microgripper, which may be applied to trans-ducers or sensors, can be batch-fabricated in IC-compatible process. The movable mechanical elements are built onlayers that are later removed, so that they are free for translation and rotation. Under external driving, a microgrip-per cut from substrate would be able to catch tiny filament or small particle with dimension of 10~ 200 micrometers.

  11. CH(3)NH(3)PbI(3) perovskite / silicon tandem solar cells: characterization based optical simulations.

    Science.gov (United States)

    Filipič, Miha; Löper, Philipp; Niesen, Bjoern; De Wolf, Stefaan; Krč, Janez; Ballif, Christophe; Topič, Marko

    2015-04-06

    In this study we analyze and discuss the optical properties of various tandem architectures: mechanically stacked (four-terminal) and monolithically integrated (two-terminal) tandem devices, consisting of a methyl ammonium lead triiodide (CH(3)NH(3)PbI(3)) perovskite top solar cell and a crystalline silicon bottom solar cell. We provide layer thickness optimization guidelines and give estimates of the maximum tandem efficiencies based on state-of-the-art sub cells. We use experimental complex refractive index spectra for all involved materials as input data for an in-house developed optical simulator CROWM. Our characterization based simulations forecast that with optimized layer thicknesses the four-terminal configuration enables efficiencies over 30%, well above the current single-junction crystalline silicon cell record of 25.6%. Efficiencies over 30% can also be achieved with a two-terminal monolithic integration of the sub-cells, combined with proper selection of layer thicknesses.

  12. MEMS-based silicon cantilevers with integrated electrothermal heaters for airborne ultrafine particle sensing

    Science.gov (United States)

    Wasisto, Hutomo Suryo; Merzsch, Stephan; Waag, Andreas; Peiner, Erwin

    2013-05-01

    The development of low-cost and low-power MEMS-based cantilever sensors for possible application in hand-held airborne ultrafine particle monitors is described in this work. The proposed resonant sensors are realized by silicon bulk micromachining technology with electrothermal excitation, piezoresistive frequency readout, and electrostatic particle collection elements integrated and constructed in the same sensor fabrication process step of boron diffusion. Built-in heating resistor and full Wheatstone bridge are set close to the cantilever clamp end for effective excitation and sensing, respectively, of beam deflection. Meanwhile, the particle collection electrode is located at the cantilever free end. A 300 μm-thick, phosphorus-doped silicon bulk wafer is used instead of silicon-on-insulator (SOI) as the starting material for the sensors to reduce the fabrication costs. To etch and release the cantilevers from the substrate, inductively coupled plasma (ICP) cryogenic dry etching is utilized. By controlling the etching parameters (e.g., temperature, oxygen content, and duration), cantilever structures with thicknesses down to 10 - 20 μm are yielded. In the sensor characterization, the heating resistor is heated and generating thermal waves which induce thermal expansion and further cause mechanical bending strain in the out-of-plane direction. A resonant frequency of 114.08 +/- 0.04 kHz and a quality factor of 1302 +/- 267 are measured in air for a fabricated rectangular cantilever (500x100x13.5 μm3). Owing to its low power consumption of a few milliwatts, this electrothermal cantilever is suitable for replacing the current external piezoelectric stack actuator in the next generation of the miniaturized cantilever-based nanoparticle detector (CANTOR).

  13. Monolith electroplating process

    Science.gov (United States)

    Agarrwal, Rajev R.

    2001-01-01

    An electroplating process for preparing a monolith metal layer over a polycrystalline base metal and the plated monolith product. A monolith layer has a variable thickness of one crystal. The process is typically carried in molten salts electrolytes, such as the halide salts under an inert atmosphere at an elevated temperature, and over deposition time periods and film thickness sufficient to sinter and recrystallize completely the nucleating metal particles into one single crystal or crystals having very large grains. In the process, a close-packed film of submicron particle (20) is formed on a suitable substrate at an elevated temperature. The temperature has the significance of annealing particles as they are formed, and substrates on which the particles can populate are desirable. As the packed bed thickens, the submicron particles develop necks (21) and as they merge into each other shrinkage (22) occurs. Then as micropores also close (23) by surface tension, metal density is reached and the film consists of unstable metal grain (24) that at high enough temperature recrystallize (25) and recrystallized grains grow into an annealed single crystal over the electroplating time span. While cadmium was used in the experimental work, other soft metals may be used.

  14. Heterogenous integration of a thin-film GaAs photodetector and a microfluidic device on a silicon substrate

    International Nuclear Information System (INIS)

    Song, Fuchuan; Xiao, Jing; Udawala, Fidaali; Seo, Sang-Woo

    2011-01-01

    In this paper, heterogeneous integration of a III–V semiconductor thin-film photodetector (PD) with a microfluidic device is demonstrated on a SiO 2 –Si substrate. Thin-film format of optical devices provides an intimate integration of optical functions with microfluidic devices. As a demonstration of a multi-material and functional system, the biphasic flow structure in the polymeric microfluidic channels was co-integrated with a III–V semiconductor thin-film PD. The fluorescent drops formed in the microfluidic device are successfully detected with an integrated thin-film PD on a silicon substrate. The proposed three-dimensional integration structure is an alternative approach to combine optical functions with microfluidic functions on silicon-based electronic functions.

  15. Silicon Hard-Stop Mesas for 3D Integration of Superconducting Qubits

    Science.gov (United States)

    Kim, David; Rosenberg, Danna; Osadchy, Brenda; Calusine, Greg; Das, Rabindra; Melville, Alexander; Yoder, Jonilyn; Yost, Donna-Ruth; Racz, Livia; Oliver, William

    As quantum computing with superconducting qubits advances past the few-qubit stage, implementing 3D packaging/integration to route readout/control lines will become increasingly important. One approach is to bond chips that perform different functions using indium bump bonds. Because indium is malleable, however, achieving the desired spacing and tilt between two chips can be challenging. We present an approach based on etching several microns into the silicon substrate to produce hard stop silicon posts. Since this process involves etching into a pristine substrate, it is essential to evaluate its impact on qubit performance. We report the etched surface's effect on the resonator quality factor and qubit coherence time, as well as the improvement in planarity and tilt. This research was funded in part by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA) and by the Assistant Secretary of Defense for Research & Engineering under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

  16. Mechanical integration of the detector components for the CBM silicon tracking system

    Energy Technology Data Exchange (ETDEWEB)

    Vasylyev, Oleg; Niebur, Wolfgang [GSI Helmholtzzentrum fuer Schwerionenforschung GmbH, Darmstadt (Germany); Collaboration: CBM-Collaboration

    2016-07-01

    The Compressed Baryonic Matter experiment (CBM) at FAIR is designed to explore the QCD phase diagram in the region of high net-baryon densities. The central detector component, the Silicon Tracking System (STS) is based on double-sided micro-strip sensors. In order to achieve the physics performance, the detector mechanical structures should be developed taking into account the requirements of the CBM experiments: low material budget, high radiation environment, interaction rates, aperture for the silicon tracking, detector segmentation and mounting precision. A functional plan of the STS and its surrounding structural components is being worked out from which the STS system shape is derived and the power and cooling needs, the connector space requirements, life span of components and installation/repair aspects are determined. The mechanical integration is at the point of finalizing the design stage and moving towards production readiness. This contribution shows the current processing state of the following engineering tasks: construction space definition, carbon ladder shape and manufacturability, beam-pipe feedthrough structure, prototype construction, cable routing and modeling of the electronic components.

  17. Three hydrogenated amorphous silicon photodiodes stacked for an above integrated circuit colour sensor

    Energy Technology Data Exchange (ETDEWEB)

    Gidon, Pierre; Giffard, Benoit; Moussy, Norbert; Parrein, Pascale; Poupinet, Ludovic [CEA-LETI, MINATEC, CEA-Grenoble, 17 rue des Martyrs, 38054 Grenoble Cedex 9 (France)

    2010-03-15

    We present theoretical simulation and experimental results of a new colour pixel structure. This pixel catches the light in three stacked amorphous silicon photodiodes encompassed between transparent electrodes. The optical structure has been simulated for signal optimisation. The thickness of each stacked layer is chosen in order to absorb the maximum of light and the three signals allow to linearly calculate the CIE colour coordinates 1 with minimum error and noise. The whole process is compatible with an above integrated circuit (IC) approach. Each photodiode is an n-i-p structure. For optical reason, the upper diode must be controlled down to 25 nm thickness. The first test pixel structure allows a good recovering of colour coordinates. The measured absorption spectrum of each photodiode is in good agreement with our simulations. This specific stack with three photodiodes per pixel totalises two times more signal than an above IC pixel under a standard Bayer pattern 2,3. In each square of this GretagMacbeth chart is the reference colour on the right and the experimentally measured colour on the left with three amorphous silicon photodiodes per pixel. (Abstract Copyright [2010], Wiley Periodicals, Inc.)

  18. Stretchable and foldable silicon-based electronics

    KAUST Repository

    Cavazos Sepulveda, Adrian Cesar

    2017-03-30

    Flexible and stretchable semiconducting substrates provide the foundation for novel electronic applications. Usually, ultra-thin, flexible but often fragile substrates are used in such applications. Here, we describe flexible, stretchable, and foldable 500-μm-thick bulk mono-crystalline silicon (100) “islands” that are interconnected via extremely compliant 30-μm-thick connectors made of silicon. The thick mono-crystalline segments create a stand-alone silicon array that is capable of bending to a radius of 130 μm. The bending radius of the array does not depend on the overall substrate thickness because the ultra-flexible silicon connectors are patterned. We use fracture propagation to release the islands. Because they allow for three-dimensional monolithic stacking of integrated circuits or other electronics without any through-silicon vias, our mono-crystalline islands can be used as a “more-than-Moore” strategy and to develop wearable electronics that are sufficiently robust to be compatible with flip-chip bonding.

  19. Stretchable and foldable silicon-based electronics

    KAUST Repository

    Cavazos Sepulveda, Adrian Cesar; Diaz Cordero, M. S.; Carreno, Armando Arpys Arevalo; Nassar, Joanna M.; Hussain, Muhammad Mustafa

    2017-01-01

    Flexible and stretchable semiconducting substrates provide the foundation for novel electronic applications. Usually, ultra-thin, flexible but often fragile substrates are used in such applications. Here, we describe flexible, stretchable, and foldable 500-μm-thick bulk mono-crystalline silicon (100) “islands” that are interconnected via extremely compliant 30-μm-thick connectors made of silicon. The thick mono-crystalline segments create a stand-alone silicon array that is capable of bending to a radius of 130 μm. The bending radius of the array does not depend on the overall substrate thickness because the ultra-flexible silicon connectors are patterned. We use fracture propagation to release the islands. Because they allow for three-dimensional monolithic stacking of integrated circuits or other electronics without any through-silicon vias, our mono-crystalline islands can be used as a “more-than-Moore” strategy and to develop wearable electronics that are sufficiently robust to be compatible with flip-chip bonding.

  20. III-V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2-4 μm Wavelength Range.

    Science.gov (United States)

    Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

    2017-08-04

    The availability of silicon photonic integrated circuits (ICs) in the 2-4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III-V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III-V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy.

  1. III–V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2–4 μm Wavelength Range

    Science.gov (United States)

    Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

    2017-01-01

    The availability of silicon photonic integrated circuits (ICs) in the 2–4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III–V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III–V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy. PMID:28777291

  2. Optimization and validation of highly selective microfluidic integrated silicon nanowire chemical sensor

    Science.gov (United States)

    Ehfaed, Nuri. A. K. H.; Bathmanathan, Shillan A. L.; Dhahi, Th S.; Adam, Tijjani; Hashim, Uda; Noriman, N. Z.

    2017-09-01

    The study proposed characterization and optimization of silicon nanosensor for specific detection of heavy metal. The sensor was fabricated in-house and conventional photolithography coupled with size reduction via dry etching process in an oxidation furnace. Prior to heavy metal heavy metal detection, the capability to aqueous sample was determined utilizing serial DI water at various. The sensor surface was surface modified with Organofunctional alkoxysilanes (3-aminopropyl) triethoxysilane (APTES) to create molecular binding chemistry. This has allowed interaction between heavy metals being measured and the sensor component resulting in increasing the current being measured. Due to its, excellent detection capabilities, this sensor was able to identify different group heavy metal species. The device was further integrated with sub-50 µm for chemical delivery.

  3. Impurity engineering of Czochralski silicon used for ultra large-scaled-integrated circuits

    Science.gov (United States)

    Yang, Deren; Chen, Jiahe; Ma, Xiangyang; Que, Duanlin

    2009-01-01

    Impurities in Czochralski silicon (Cz-Si) used for ultra large-scaled-integrated (ULSI) circuits have been believed to deteriorate the performance of devices. In this paper, a review of the recent processes from our investigation on internal gettering in Cz-Si wafers which were doped with nitrogen, germanium and/or high content of carbon is presented. It has been suggested that those impurities enhance oxygen precipitation, and create both denser bulk microdefects and enough denuded zone with the desirable width, which is benefit of the internal gettering of metal contamination. Based on the experimental facts, a potential mechanism of impurity doping on the internal gettering structure is interpreted and, a new concept of 'impurity engineering' for Cz-Si used for ULSI is proposed.

  4. Low-loss compact multilayer silicon nitride platform for 3D photonic integrated circuits.

    Science.gov (United States)

    Shang, Kuanping; Pathak, Shibnath; Guan, Binbin; Liu, Guangyao; Yoo, S J B

    2015-08-10

    We design, fabricate, and demonstrate a silicon nitride (Si(3)N(4)) multilayer platform optimized for low-loss and compact multilayer photonic integrated circuits. The designed platform, with 200 nm thick waveguide core and 700 nm interlayer gap, is compatible for active thermal tuning and applicable to realizing compact photonic devices such as arrayed waveguide gratings (AWGs). We achieve ultra-low loss vertical couplers with 0.01 dB coupling loss, multilayer crossing loss of 0.167 dB at 90° crossing angle, 50 μm bending radius, 100 × 2 μm(2) footprint, lateral misalignment tolerance up to 400 nm, and less than -52 dB interlayer crosstalk at 1550 nm wavelength. Based on the designed platform, we demonstrate a 27 × 32 × 2 multilayer star coupler.

  5. 3D silicon neural probe with integrated optical fibers for optogenetic modulation.

    Science.gov (United States)

    Kim, Eric G R; Tu, Hongen; Luo, Hao; Liu, Bin; Bao, Shaowen; Zhang, Jinsheng; Xu, Yong

    2015-07-21

    Optogenetics is a powerful modality for neural modulation that can be useful for a wide array of biomedical studies. Penetrating microelectrode arrays provide a means of recording neural signals with high spatial resolution. It is highly desirable to integrate optics with neural probes to allow for functional study of neural tissue by optogenetics. In this paper, we report the development of a novel 3D neural probe coupled simply and robustly to optical fibers using a hollow parylene tube structure. The device shanks are hollow tubes with rigid silicon tips, allowing the insertion and encasement of optical fibers within the shanks. The position of the fiber tip can be precisely controlled relative to the electrodes on the shank by inherent design features. Preliminary in vivo rat studies indicate that these devices are capable of optogenetic modulation simultaneously with 3D neural signal recording.

  6. Integrated reconfigurable microring based silicon WDM receiver for on-chip optical interconnect

    International Nuclear Information System (INIS)

    Shen, Ao; Yang, Long-Zhi; Dai, Ting-Ge; Hao, Yin-Lei; Jiang, Xiao-Qing; Yang, Jian-Yi; Qiu, Chen

    2015-01-01

    We demonstrate an integrated reconfigurable wavelength division multiplexing receiver on the silicon-on-insulator (SOI) platform. The receiver is composed of a 1 × 8 thermally tunable microring resonator filter and Ge–Si photodetectors. With low thermal tuning powers the channel allocation of the receiver can be reconfigured with high accuracy and flexibility. The thermal tuning efficiency is approximately 8 mW nm −1 . We show eight-channel configurations with channel spacing of 100 GHz and 50 GHz and a configuration in which all eight channels cover an entire free spectral range of the ring with uniform channel spacing of 1.2 nm. Each channel can receive high-quality signals with a data rate of up to 13.5 Gb s −1 ; thus an aggregate data rate higher than 100 Gb s −1 can be achieved. (paper)

  7. Efficient generation of single and entangled photons on a silicon photonic integrated chip

    International Nuclear Information System (INIS)

    Mower, Jacob; Englund, Dirk

    2011-01-01

    We present a protocol for generating on-demand, indistinguishable single photons on a silicon photonic integrated chip. The source is a time-multiplexed spontaneous parametric down-conversion element that allows optimization of single-photon versus multiphoton emission while realizing high output rate and indistinguishability. We minimize both the scaling of active elements and the scaling of active element loss with multiplexing. We then discuss detection strategies and data processing to further optimize the procedure. We simulate an improvement in single-photon-generation efficiency over previous time-multiplexing protocols, assuming existing fabrication capabilities. We then apply this system to generate heralded Bell states. The generation efficiency of both nonclassical states could be increased substantially with improved fabrication procedures.

  8. Silicon-Based Integration of Groups III, IV, V Chemical Vapor Depositions in High-Quality Photodiodes

    NARCIS (Netherlands)

    Sammak, A.

    2012-01-01

    Heterogeneous integration of III-V semiconductors with silicon (Si) technology is an interesting approach to utilize the advantages of both high-speed photonic and electronic properties. The work presented in this thesis is initiated by this major goal of merging III-V semiconductor technology with

  9. Structural Integration of Silicon Solar Cells and Lithium-ion Batteries Using Printed Electronics

    Science.gov (United States)

    Kang, Jin Sung

    Inkjet printing of electrode using copper nanoparticle ink is presented. Electrode was printed on a flexible glass epoxy composite substrate using drop on demand piezoelectric dispenser and was sintered at 200°C in N 2 gas condition. The printed electrodes were made with various widths and thicknesses. Surface morphology of electrode was analyzed using scanning electron microscope (SEM) and atomic force microscope (AFM). Reliable dimensions for printed electronics were found from this study. Single-crystalline silicon solar cells were tested under four-point bending to find the feasibility of directly integrating them onto a carbon fiber/epoxy composite laminate. These solar cells were not able to withstand 0.2% strain. On the other hand, thin-film amorphous silicon solar cells were subjected to flexural fatigue loadings. The current density-voltage curves were analyzed at different cycles, and there was no noticeable degradation on its performance up to 100 cycles. A multifunctional composite laminate which can harvest and store solar energy was fabricated using printed electrodes. The integrated printed circuit board (PCB) was co-cured with a carbon/epoxy composite laminate by the vacuum bag molding process in an autoclave; an amorphous silicon solar cell and a thin-film solid state lithium-ion (Li-ion) battery were adhesively joined and electrically connected to a thin flexible PCB; and then the passive components such as resistors and diodes were electrically connected to the printed circuit board by silver pasting. Since a thin-film solid state Li-ion battery was not able to withstand tensile strain above 0.4%, thin Li-ion polymer batteries were tested under various mechanical loadings and environmental conditions to find the feasibility of using the polymer batteries for our multifunctional purpose. It was found that the Li-ion polymer batteries were stable under pressure and tensile loading without any noticeable degradation on its charge and discharge

  10. Label-free silicon photonic biosensor system with integrated detector array

    Science.gov (United States)

    Yan, Rongjin; Mestas, Santano P.; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S.

    2010-01-01

    An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide’s upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip. PMID:19606292

  11. Label-free silicon photonic biosensor system with integrated detector array.

    Science.gov (United States)

    Yan, Rongjin; Mestas, Santano P; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S; Lear, Kevin L

    2009-08-07

    An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide's upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip.

  12. RF characterization and analytical modelling of through silicon vias and coplanar waveguides for 3D integration

    NARCIS (Netherlands)

    Lamy, Y.; Jinesh, K.B.; Roozeboom, F.; Gravesteijn, D.J.; Besling, W.F.A.

    2010-01-01

    High-aspect ratio (12.5) through silicon vias (TSV) made in a silicon interposer have been electrically characterized in the direct current (dc) and microwave regimes for 3D interconnect applications. The vias were micro-machined in silicon, insulated, and filled with copper employing a bottom-up

  13. Molecular beam epitaxy of InP single junction and InP/In0.53Ga0.47As monolithically integrated tandem solar cells using solid phosphorous source material

    International Nuclear Information System (INIS)

    Delaney, A.; Chin, K.; Street, S.; Newman, F.; Aguilar, L.; Ignatiev, A.; Monier, C.; Velela, M.; Freundlich, A.

    1998-01-01

    This work reports the first InP solar cells, InP/In 0.53 Ga 0.47 As tandem solar cells and InP tunnel junctions to be grown using a solid phosphorous source cracker cell in a molecular beam epitaxy system. High p-type doping achieved with this system allowed for the development of InP tunnel junctions. These junctions which allow for improved current matching in subsequent monolithically integrated tandem devices also do not absorb photons which can be utilized in the InGaAs structure. Photocurrent spectral responses compared favorably to devices previously grown in a chemical beam epitaxy system. High resolution x-ray scans demonstrated good lattice matching between constituent parts of the tandem cell. AM0 efficiencies of both InP and InP/InGaAs tandem cells are reported

  14. Characterization of 13 and 30 μm thick hydrogenated amorphous silicon diodes deposited over CMOS integrated circuits for particle detection application

    International Nuclear Information System (INIS)

    Despeisse, M.; Anelli, G.; Commichau, S.; Dissertori, G.; Garrigos, A.; Jarron, P.; Miazza, C.; Moraes, D.; Shah, A.; Wyrsch, N.; Viertel, G.

    2004-01-01

    We present the experimental results obtained with a novel monolithic silicon pixel detector which consists in depositing a n-i-p hydrogenated amorphous silicon (a-Si:H) diode straight above the readout ASIC (this technology is called Thin Film on ASIC, TFA). The characterization has been performed on 13 and 30 μm thick a-Si:H films deposited on top of an ASIC containing a linear array of high-speed low-noise transimpedance amplifiers designed in a 0.25 μm CMOS technology. Experimental results presented have been obtained with a 600 nm pulsed laser. The results of charge collection efficiency and charge collection speed of these structures are discussed

  15. Design of monolithic preamplifiers employing diffused n-JFETs for ionization chamber colorimeters

    International Nuclear Information System (INIS)

    Demicheli, M.; Manfredi, P.F.; Speziali, V.; Radeka, V.; Rescia, S.

    1990-01-01

    Silicon n-channel JFETs obtained by diffusing the gate into the epitaxial layer which contains the channel still feature unsurpassed noise performances in charge measurements with radiation detectors. Compared to implanted-gate junction field-effect devices, they have a better behaviour in the low-frequency noise, while the thermal noise in the channel more closely conforms to the expected g m -dependence. With respect to MOSFETs they feature, besides lower noise, superior radiation hardness and resistance to electrostatic discharges into the gate. The actual paper discusses the basic design considerations of a preamplifier for ionization chamber calorimeters, which is intended for monolithic integration based on a dielectrically isolated process. (orig.)

  16. Depleted Monolithic Pixels (DMAPS) in a 150 nm technology: lab and beam results

    International Nuclear Information System (INIS)

    Obermann, T.; Hemperek, T.; Hügging, F.; Krüger, H.; Pohl, D.-L.; Wermes, N.; Schwenker, B.

    2017-01-01

    The fully depleted monolithic active pixel sensor (DMAPS) is a new concept integrating full CMOS circuitry onto a fully depletable silicon substrate wafer. The realization of prototypes of the DMAPS concept relies on the availability of multiple well CMOS processes and high resistive substrates. The CMOS foundry ESPROS Photonics offers both and was chosen for prototyping. Two prototypes, EPCB01 and EPCB02, were developed in a 150 nm process on a high resistive n-type wafer of 50 μm thickness. The prototypes have 352 square pixels of 40 μm pitch and small n-well charge collection node with very low capacitance (n + -implantation size: 5 μm by 5 μm) and about 150 transistors per pixel (CSA and discriminator plus a small digital part).

  17. Monolithic approach for solid-state detector electronics: Design implications

    International Nuclear Information System (INIS)

    Vanstraelen, G.

    1990-01-01

    The monolithic integration is obtained using a p-well CMOS technology in which the p-channel devices are located in the high-resistivity silicon. The latter has enormous implications on their behavior, as compared to standard devices. In this paper it is shown for pMOS transistors on HR-Si that a real saturation operation is never reached, but that they keep operating in a quasi-linear mode, due to the 2-D nature of the potential profile. Based on an analytical current model for the quasi-linear mode, it is shown that if the p-channel length is not carefully chosen, the active operation of the device in analog circuits is lost completely due to the low output resistance. The second topic investigated is the p-channel noise behavior. Experiments lead to the conclusion that a low 1/f noise in on mode is only guaranteed if the surface current is much larger than the punch-through current. In off mode the device can be used as a low noise resistor. Furthermore it is found that the white noise is due to the substrate resistance, instead of the channel resistance

  18. 2 μm wavelength range InP-based type-II quantum well photodiodes heterogeneously integrated on silicon photonic integrated circuits.

    Science.gov (United States)

    Wang, Ruijun; Sprengel, Stephan; Muneeb, Muhammad; Boehm, Gerhard; Baets, Roel; Amann, Markus-Christian; Roelkens, Gunther

    2015-10-05

    The heterogeneous integration of InP-based type-II quantum well photodiodes on silicon photonic integrated circuits for the 2 µm wavelength range is presented. A responsivity of 1.2 A/W at a wavelength of 2.32 µm and 0.6 A/W at 2.4 µm wavelength is demonstrated. The photodiodes have a dark current of 12 nA at -0.5 V at room temperature. The absorbing active region of the integrated photodiodes consists of six periods of a "W"-shaped quantum well, also allowing for laser integration on the same platform.

  19. An integrated nonlinear optical loop mirror in silicon photonics for all-optical signal processing

    Directory of Open Access Journals (Sweden)

    Zifei Wang

    2018-02-01

    Full Text Available The nonlinear optical loop mirror (NOLM has been studied for several decades and has attracted considerable attention for applications in high data rate optical communications and all-optical signal processing. The majority of NOLM research has focused on silica fiber-based implementations. While various fiber designs have been considered to increase the nonlinearity and manage dispersion, several meters to hundreds of meters of fiber are still required. On the other hand, there is increasing interest in developing photonic integrated circuits for realizing signal processing functions. In this paper, we realize the first-ever passive integrated NOLM in silicon photonics and demonstrate its application for all-optical signal processing. In particular, we show wavelength conversion of 10 Gb/s return-to-zero on-off keying (RZ-OOK signals over a wavelength range of 30 nm with error-free operation and a power penalty of less than 2.5 dB, we achieve error-free nonreturn to zero (NRZ-to-RZ modulation format conversion at 10 Gb/s also with a power penalty of less than 2.8 dB, and we obtain error-free all-optical time-division demultiplexing of a 40 Gb/s RZ-OOK data signal into its 10 Gb/s tributary channels with a maximum power penalty of 3.5 dB.

  20. III-V/Active-Silicon Integration for Low-Cost High-Performance Concentrator Photovoltaics

    Energy Technology Data Exchange (ETDEWEB)

    Ringel, Steven [The Ohio State Univ., Columbus, OH (United States); Carlin, John A [The Ohio State Univ., Columbus, OH (United States); Grassman, Tyler [The Ohio State Univ., Columbus, OH (United States)

    2018-04-17

    This FPACE project was motivated by the need to establish the foundational pathway to achieve concentrator solar cell efficiencies greater than 50%. At such an efficiency, DOE modeling projected that a III-V CPV module cost of $0.50/W or better could be achieved. Therefore, the goal of this project was to investigate, develop and advance a III-V/Si mulitjunction (MJ) CPV technology that can simultaneously address the primary cost barrier for III-V MJ solar cells while enabling nearly ideal MJ bandgap profiles that can yield efficiencies in excess of 50% under concentrated sunlight. The proposed methodology was based on use of our recently developed GaAsP metamorphic graded buffer as a pathway to integrate unique GaAsP and Ga-rich GaInP middle and top junctions having bandgaps that are adjustable between 1.45 – 1.65 eV and 1.9 – 2.1 eV, respectively, with an underlying, 1.1 eV active Si subcell/substrate. With this design, the Si can be an active component sub-cell due to the semi-transparent nature of the GaAsP buffer with respect to Si as well as a low-cost alternative substrate that is amenable to scaling with existing Si foundry infrastructure, providing a reduction in materials cost and a low cost path to manufacturing at scale. By backside bonding of a SiGe, a path to exceed 50% efficiency is possible. Throughout the course of this effort, an expansive range of new understanding was achieved that has stimulated worldwide efforts in III-V/Si PV R&D that spanned materials development, metamorphic device optimization, and complete III-V/Si monolithic integration. Highlights include the demonstration of the first ideal GaP/Si interfaces grown by industry-standard MOCVD processes, the first high performance metamorphic tunnel junctions designed for III-V/Si integration, record performance of specific metamorphic sub-cell designs, the first fully integrated GaInP/GaAsP/Si double (1.7 eV/1.1 eV) and triple (1.95 eV/1.5 eV/1.1 eV) junction solar cells, the first

  1. Porous polymer monolithic col

    Directory of Open Access Journals (Sweden)

    Lydia Terborg

    2015-05-01

    Full Text Available A new approach has been developed for the preparation of mixed-mode stationary phases to separate proteins. The pore surface of monolithic poly(glycidyl methacrylate-co-ethylene dimethacrylate capillary columns was functionalized with thiols and coated with gold nanoparticles. The final mixed mode surface chemistry was formed by attaching, in a single step, alkanethiols, mercaptoalkanoic acids, and their mixtures on the free surface of attached gold nanoparticles. Use of these mixtures allowed fine tuning of the hydrophobic/hydrophilic balance. The amount of attached gold nanoparticles according to thermal gravimetric analysis was 44.8 wt.%. This value together with results of frontal elution enabled calculation of surface coverage with the alkanethiol and mercaptoalkanoic acid ligands. Interestingly, alkanethiols coverage in a range of 4.46–4.51 molecules/nm2 significantly exceeded that of mercaptoalkanoic acids with 2.39–2.45 molecules/nm2. The mixed mode character of these monolithic stationary phases was for the first time demonstrated in the separations of proteins that could be achieved in the same column using gradient elution conditions typical of reverse phase (using gradient of acetonitrile in water and ion exchange chromatographic modes (applying gradient of salt in water, respectively.

  2. Quantum Coherent States and Path Integral Method to Stochastically Determine the Anisotropic Volume Expansion in Lithiated Silicon Nanowires

    Directory of Open Access Journals (Sweden)

    Donald C. Boone

    2017-10-01

    Full Text Available This computational research study will analyze the multi-physics of lithium ion insertion into a silicon nanowire in an attempt to explain the electrochemical kinetics at the nanoscale and quantum level. The electron coherent states and a quantum field version of photon density waves will be the joining theories that will explain the electron-photon interaction within the lithium-silicon lattice structure. These two quantum particles will be responsible for the photon absorption rate of silicon atoms that are hypothesized to be the leading cause of breaking diatomic silicon covalent bonds that ultimately leads to volume expansion. It will be demonstrated through the combination of Maxwell stress tensor, optical amplification and path integrals that a stochastic analyze using a variety of Poisson distributions that the anisotropic expansion rates in the <110>, <111> and <112> orthogonal directions confirms the findings ascertained in previous works made by other research groups. The computational findings presented in this work are similar to those which were discovered experimentally using transmission electron microscopy (TEM and simulation models that used density functional theory (DFT and molecular dynamics (MD. The refractive index and electric susceptibility parameters of lithiated silicon are interwoven in the first principle theoretical equations and appears frequently throughout this research presentation, which should serve to demonstrate the importance of these parameters in the understanding of this component in lithium ion batteries.

  3. Extended Leach Testing of Simulated LAW Cast Stone Monoliths

    Energy Technology Data Exchange (ETDEWEB)

    Serne, R. Jeffrey [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Westsik, Joseph H. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Williams, Benjamin D. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Jung, H. B. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Wang, Guohui [Pacific Northwest National Lab. (PNNL), Richland, WA (United States)

    2015-07-09

    This report describes the results from long-term laboratory leach tests performed at Pacific Northwest National Laboratory (PNNL) for Washington River Protection Solutions (WRPS) to evaluate the release of key constituents from monoliths of Cast Stone prepared with four simulated low-activity waste (LAW) liquid waste streams. Specific objectives of the Cast Stone long-term leach tests described in this report focused on four activities: 1. Extending the leaching times for selected ongoing EPA-1315 tests on monoliths made with LAW simulants beyond the conventional 63-day time period up to 609 days reported herein (with some tests continuing that will be documented later) in an effort to evaluate long-term leaching properties of Cast Stone to support future performance assessment activities. 2. Starting new EPA-1315 leach tests on archived Cast Stone monoliths made with four LAW simulants using two leachants (deionized water [DIW] and simulated Hanford Integrated Disposal Facility (IDF) Site vadose zone pore water [VZP]). 3. Evaluating the impacts of varying the iodide loading (starting iodide concentrations) in one LAW simulant (7.8 M Na Hanford Tank Waste Operations Simulator (HTWOS) Average) by manufacturing new Cast Stone monoliths and repeating the EPA-1315 leach tests using DIW and the VZP leachants. 4. Evaluating the impacts of using a non-pertechnetate form of Tc that is present in some Hanford tanks. In this activity one LAW simulant (7.8 M Na HTWOS Average) was spiked with a Tc(I)-tricarbonyl gluconate species and then solidified into Cast Stone monoliths. Cured monoliths were leached using the EPA-1315 leach protocol with DIW and VZP. The leach results for the Tc-Gluconate Cast Stone monoliths were compared to Cast Stone monoliths pertechnetate.

  4. Integrated optical measurement system for fluorescence spectroscopy in microfluidic channels

    DEFF Research Database (Denmark)

    Hübner, Jörg; Mogensen, Klaus Bo; Jørgensen, Anders Michael

    2001-01-01

    A transportable miniaturized fiber-pigtailed measurement system is presented which allows quantitative fluorescence detection in microliquid handling systems. The microliquid handling chips are made in silica on silicon technology and the optical functionality is monolithically integrated with th...... with two dyes, fluorescein, and Bodipy 650/665 X, showed good linear behavior over a wide range of concentrations. Minimally detected concentrations were 250 pM for fluorescein and 100 nM for Bodipy....

  5. Development and miniaturization of a photoacoustic silicon integrated spectrometer for trace gas analysis; Etude et developpement d`un spectrometre photoacoustique integre sur silicium pour analyse de gaz

    Energy Technology Data Exchange (ETDEWEB)

    Jourdain, A.

    1998-10-29

    The study deals with the integration on silicon wafers of an infrared spectrometer for carbon dioxide measurements. Photoacoustic detection that measures a differential pressure in a cavity turns out to be the best spectroscopic technique for miniaturization and integration. The micro-system is composed of two main components: an infrared light source on a silicon nitride membrane and a component integrating a tunable optical filter, a microphone for detection and a micro-cavity. After a theoretical study of the different components, each element is realized with the microelectronic techniques such as photolithography, thin films deposits and dry and wet etching. A resin sealing of all the different elements realizes the final micro-spectrophotometer. A characterization of the components is done thanks to the realization of an electronic specific set-up. (author) 107 refs.

  6. A 12-bit SAR ADC integrated on a multichannel silicon drift detector readout IC

    Energy Technology Data Exchange (ETDEWEB)

    Schembari, F., E-mail: filippo.schembari@polimi.it [Politecnico di Milano, Dipartimento di Elettronica, Informazione e Bioingegneria, via Golgi 40, 20133 Milano (Italy); INFN, Sezione di Milano, via Celoria 16, 20133 Milano (Italy); Bellotti, G.; Fiorini, C. [Politecnico di Milano, Dipartimento di Elettronica, Informazione e Bioingegneria, via Golgi 40, 20133 Milano (Italy); INFN, Sezione di Milano, via Celoria 16, 20133 Milano (Italy)

    2016-07-11

    A 12-bit analog-to-digital converter (ADC) addressed to Silicon-Drift Detectors (SDDs) multichannel readout ASICs for X- and gamma-ray applications is presented. Aiming at digitizing output multiplexed data from the upstream analog filters banks, the converter must ensure 11-bit accuracy and a sampling frequency of about 5 MS/s. The ADC architecture is the charge-redistribution (CR) successive-approximation register (SAR). A fully differential topology has also been chosen for better rejection of common-mode noise and disturbances. The internal DAC is made of binary-scaled capacitors, whose bottom plates are switched by the SAR logic to perform the binary search of the analog input value by means of the monotonic switching scheme. The A/D converter is integrated on SFERA, a multichannel ASIC fabricated in a standard CMOS 0.35 μm 3.3 V technology and it occupies an area of 0.42 mm{sup 2}. Simulated static performance shows monotonicity over the whole input–output characteristic. The description of the circuit topology and of inner blocks architectures together with the experimental characterization is here presented. - Highlights: • X- and γ-ray spectroscopy front-ends need to readout a high number of detectors. • Design efforts are increasingly oriented to compact and low-power ASICs. • A possible solution is the on-chip integration of the analog-to-digital converter. • A 12-bit CR successive-approximation-register ADC has been developed. • It is a suitable candidate as the digitizer to be integrated in multichannel ASICs.

  7. Silicon Nitride Photonic Integration Platforms for Visible, Near-Infrared and Mid-Infrared Applications

    Science.gov (United States)

    Micó, Gloria; Pastor, Daniel; Pérez, Daniel; Doménech, José David; Fernández, Juan; Baños, Rocío; Alemany, Rubén; Sánchez, Ana M.; Cirera, Josep M.; Mas, Roser

    2017-01-01

    Silicon nitride photonics is on the rise owing to the broadband nature of the material, allowing applications of biophotonics, tele/datacom, optical signal processing and sensing, from visible, through near to mid-infrared wavelengths. In this paper, a review of the state of the art of silicon nitride strip waveguide platforms is provided, alongside the experimental results on the development of a versatile 300 nm guiding film height silicon nitride platform. PMID:28895906

  8. Silicon-Nitride-based Integrated Optofluidic Biochemical Sensors using a Coupled-Resonator Optical Waveguide

    Directory of Open Access Journals (Sweden)

    Jiawei eWANG

    2015-04-01

    Full Text Available Silicon nitride (SiN is a promising material platform for integrating photonic components and microfluidic channels on a chip for label-free, optical biochemical sensing applications in the visible to near-infrared wavelengths. The chip-scale SiN-based optofluidic sensors can be compact due to a relatively high refractive index contrast between SiN and the fluidic medium, and low-cost due to the complementary metal-oxide-semiconductor (CMOS-compatible fabrication process. Here, we demonstrate SiN-based integrated optofluidic biochemical sensors using a coupled-resonator optical waveguide (CROW in the visible wavelengths. The working principle is based on imaging in the far field the out-of-plane elastic-light-scattering patterns of the CROW sensor at a fixed probe wavelength. We correlate the imaged pattern with reference patterns at the CROW eigenstates. Our sensing algorithm maps the correlation coefficients of the imaged pattern with a library of calibrated correlation coefficients to extract a minute change in the cladding refractive index. Given a calibrated CROW, our sensing mechanism in the spatial domain only requires a fixed-wavelength laser in the visible wavelengths as a light source, with the probe wavelength located within the CROW transmission band, and a silicon digital charge-coupled device (CCD / CMOS camera for recording the light scattering patterns. This is in sharp contrast with the conventional optical microcavity-based sensing methods that impose a strict requirement of spectral alignment with a high-quality cavity resonance using a wavelength-tunable laser. Our experimental results using a SiN CROW sensor with eight coupled microrings in the 680nm wavelength reveal a cladding refractive index change of ~1.3 × 10^-4 refractive index unit (RIU, with an average sensitivity of ~281 ± 271 RIU-1 and a noise-equivalent detection limit (NEDL of 1.8 ×10^-8 RIU ~ 1.0 ×10^-4 RIU across the CROW bandwidth of ~1 nm.

  9. Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip.

    Science.gov (United States)

    Schuck, C; Guo, X; Fan, L; Ma, X; Poot, M; Tang, H X

    2016-01-21

    Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips.

  10. Implementation Challenges for Sintered Silicon Carbide Fiber Bonded Ceramic Materials for High Temperature Applications

    Science.gov (United States)

    Singh, M.

    2011-01-01

    During the last decades, a number of fiber reinforced ceramic composites have been developed and tested for various aerospace and ground based applications. However, a number of challenges still remain slowing the wide scale implementation of these materials. In addition to continuous fiber reinforced composites, other innovative materials have been developed including the fibrous monoliths and sintered fiber bonded ceramics. The sintered silicon carbide fiber bonded ceramics have been fabricated by the hot pressing and sintering of silicon carbide fibers. However, in this system reliable property database as well as various issues related to thermomechanical performance, integration, and fabrication of large and complex shape components has yet to be addressed. In this presentation, thermomechanical properties of sintered silicon carbide fiber bonded ceramics (as fabricated and joined) will be presented. In addition, critical need for manufacturing and integration technologies in successful implementation of these materials will be discussed.

  11. Temperature and color management of silicon solar cells for building integrated photovoltaic

    Science.gov (United States)

    Amara, Mohamed; Mandorlo, Fabien; Couderc, Romain; Gerenton, Félix; Lemiti, Mustapha

    2018-01-01

    Color management of integrated photovoltaics must meet two criteria of performance: provide maximum conversion efficiency and allow getting the chosen colors with an appropriate brightness, more particularly when using side by side solar cells of different colors. As the cooling conditions are not necessarily optimal, we need to take into account the influence of the heat transfer and temperature. In this article, we focus on the color space and brightness achieved by varying the antireflective properties of flat silicon solar cells. We demonstrate that taking into account the thermal effects allows freely choosing the color and adapting the brightness with a small impact on the conversion efficiency, except for dark blue solar cells. This behavior is especially true when heat exchange by convection is low. Our optical simulations show that the perceived color, for single layer ARC, is not varying with the position of the observer, whatever the chosen color. The use of a double layer ARC adds flexibility to tune the wanted color since the color space is greatly increased in the green and yellow directions. Last, choosing the accurate material allows both bright colors and high conversion efficiency at the same time.

  12. Joining and Integration of Silicon Nitride Ceramics for Aerospace and Energy Systems

    Science.gov (United States)

    Singh, M.; Asthana, R.

    2009-01-01

    Light-weight, creep-resistant silicon nitride ceramics possess excellent high-temperature strength and are projected to significantly raise engine efficiency and performance when used as turbine components in the next-generation turbo-shaft engines without the extensive cooling that is needed for metallic parts. One key aspect of Si3N4 utilization in such applications is its joining response to diverse materials. In an ongoing research program, the joining and integration of Si3N4 ceramics with metallic, ceramic, and composite materials using braze interlayers with the liquidus temperature in the range 750-1240C is being explored. In this paper, the self-joining behavior of Kyocera Si3N4 and St. Gobain Si3N4 using a ductile Cu-based active braze (Cu-ABA) containing Ti will be presented. Joint microstructure, composition, hardness, and strength as revealed by optical microscopy, scanning electron microscopy (SEM), energy dispersive spectroscopy (EDS), Knoop microhardness test, and offset compression shear test will be presented. Additionally, microstructure, composition, and joint strength of Si3N4/Inconel 625 joints made using Cu-ABA, will be presented. The results will be discussed with reference to the role of chemical reactions, wetting behavior, and residual stresses in joints.

  13. Prolonged silicon carbide integrated circuit operation in Venus surface atmospheric conditions

    Directory of Open Access Journals (Sweden)

    Philip G. Neudeck

    2016-12-01

    Full Text Available The prolonged operation of semiconductor integrated circuits (ICs needed for long-duration exploration of the surface of Venus has proven insurmountably challenging to date due to the ∼ 460 °C, ∼ 9.4 MPa caustic environment. Past and planned Venus landers have been limited to a few hours of surface operation, even when IC electronics needed for basic lander operation are protected with heavily cumbersome pressure vessels and cooling measures. Here we demonstrate vastly longer (weeks electrical operation of two silicon carbide (4H-SiC junction field effect transistor (JFET ring oscillator ICs tested with chips directly exposed (no cooling and no protective chip packaging to a high-fidelity physical and chemical reproduction of Venus’ surface atmosphere. This represents more than 100-fold extension of demonstrated Venus environment electronics durability. With further technology maturation, such SiC IC electronics could drastically improve Venus lander designs and mission concepts, fundamentally enabling long-duration enhanced missions to the surface of Venus.

  14. Neuron Stimulation Device Integrated with Silicon Nanowire-Based Photodetection Circuit on a Flexible Substrate

    Directory of Open Access Journals (Sweden)

    Suk Won Jung

    2016-12-01

    Full Text Available This paper proposes a neural stimulation device integrated with a silicon nanowire (SiNW-based photodetection circuit for the activation of neurons with light. The proposed device is comprised of a voltage divider and a current driver in which SiNWs are used as photodetector and field-effect transistors; it has the functions of detecting light, generating a stimulation signal in proportion to the light intensity, and transmitting the signal to a micro electrode. To show the applicability of the proposed neural stimulation device as a high-resolution retinal prosthesis system, a high-density neural stimulation device with a unit cell size of 110 × 110 μ m and a resolution of 32 × 32 was fabricated on a flexible film with a thickness of approximately 50 μm. Its effectiveness as a retinal stimulation device was then evaluated using a unit cell in an in vitro animal experiment involving the retinal tissue of retinal Degeneration 1 (rd1 mice. Experiments wherein stimulation pulses were applied to the retinal tissues successfully demonstrate that the number of spikes in neural response signals increases in proportion to light intensity.

  15. Hydrogenated Amorphous Silicon Sensor Deposited on Integrated Circuit for Radiation Detection

    CERN Document Server

    Despeisse, M; Jarron, P; Kaplon, J; Moraes, D; Nardulli, A; Powolny, F; Wyrsch, N

    2008-01-01

    Radiation detectors based on the deposition of a 10 to 30 mum thick hydrogenated amorphous silicon (a-Si:H) sensor directly on top of integrated circuits have been developed. The performance of this detector technology has been assessed for the first time in the context of particle detectors. Three different circuits were designed in a quarter micron CMOS technology for these studies. The so-called TFA (Thin-Film on ASIC) detectors obtained after deposition of a-Si:H sensors on the developed circuits are presented. High internal electric fields (104 to 105 V/cm) can be built in the a-Si:H sensor and overcome the low mobility of electrons and holes in this amorphous material. However, the deposited sensor's leakage current at such fields turns out to be an important parameter which limits the performance of a TFA detector. Its detailed study is presented as well as the detector's pixel segmentation. Signal induction by generated free carrier motion in the a-Si:H sensor has been characterized using a 660 nm pul...

  16. Temperature and color management of silicon solar cells for building integrated photovoltaic

    Directory of Open Access Journals (Sweden)

    Amara Mohamed

    2018-01-01

    Full Text Available Color management of integrated photovoltaics must meet two criteria of performance: provide maximum conversion efficiency and allow getting the chosen colors with an appropriate brightness, more particularly when using side by side solar cells of different colors. As the cooling conditions are not necessarily optimal, we need to take into account the influence of the heat transfer and temperature. In this article, we focus on the color space and brightness achieved by varying the antireflective properties of flat silicon solar cells. We demonstrate that taking into account the thermal effects allows freely choosing the color and adapting the brightness with a small impact on the conversion efficiency, except for dark blue solar cells. This behavior is especially true when heat exchange by convection is low. Our optical simulations show that the perceived color, for single layer ARC, is not varying with the position of the observer, whatever the chosen color. The use of a double layer ARC adds flexibility to tune the wanted color since the color space is greatly increased in the green and yellow directions. Last, choosing the accurate material allows both bright colors and high conversion efficiency at the same time.

  17. Study and characterization of an integrated circuit-deposited hydrogenated amorphous silicon sensor for the detection of particles and radiations

    International Nuclear Information System (INIS)

    Despeisse, M.

    2006-03-01

    Next generation experiments at the European laboratory of particle physics (CERN) require particle detector alternatives to actual silicon detectors. This thesis presents a novel detector technology, which is based on the deposition of a hydrogenated amorphous silicon sensor on top of an integrated circuit. Performance and limitations of this technology have been assessed for the first time in this thesis in the context of particle detectors. Specific integrated circuits have been designed and the detector segmentation, the interface sensor-chip and the sensor leakage current have been studied in details. The signal induced by the track of an ionizing particle in the sensor has been characterized and results on the signal speed, amplitude and on the sensor resistance to radiation are presented. The results are promising regarding the use of this novel technology for radiation detection, though limitations have been shown for particle physics application. (author)

  18. Analysis of silicon-based integrated photovoltaic-electrochemical hydrogen generation system under varying temperature and illumination

    Institute of Scientific and Technical Information of China (English)

    Vishwa Bhatt; Brijesh Tripathi; Pankaj Yadav; Manoj Kumar

    2017-01-01

    Last decade witnessed tremendous research and development in the area of photo-electrolytic hydrogen generation using chemically stable nanostructured photo-cathode/anode materials.Due to intimately coupled charge separation and photo-catalytic processes,it is very difficult to optimize individual components of such system leading to a very low demonstrated solar-to-fuel efficiency (SFE) of less than 1%.Recently there has been growing interest in an integrated photovoltaic-electrochemical (PV-EC) system based on GaAs solar cells with the demonstrated SFE of 24.5% under concentrated illumination condition.But a high cost of GaAs based solar cells and recent price drop of poly-crystalline silicon (pc-Si) solar cells motivated researchers to explore silicon based integrated PV-EC system.In this paper a theoretical framework is introduced to model silicon-based integrated PV-EC device.The theoretical framework is used to analyze the coupling and kinetic losses of a silicon solar cell based integrated PV-EC water splitting system under varying temperature and illumination.The kinetic loss occurs in the range of 19.1%-27.9% and coupling loss takes place in the range of 5.45%-6.74% with respect to varying illumination in the range of 20-100 mW/cm2.Similarly,the effect of varying temperature has severe impact on the performance of the system,wherein the coupling loss occurs in the range of 0.84%-21.51% for the temperature variation from 25 to 50 ℃.

  19. Effect of preliminary annealing of silicon substrates on the spectral sensitivity of photodetectors in bipolar integrated circuits

    International Nuclear Information System (INIS)

    Blynskij, V.I.; Bozhatkin, O.A.; Golub, E.S.; Lemeshevskaya, A.M.; Shvedov, S.V.

    2010-01-01

    We examine the results of an effect of preliminary annealing on the spectral sensitivity of photodetectors in bipolar integrated circuits, formed in silicon grown by the Czochralski method. We demonstrate the possibility of substantially improving the sensitivity of photodetectors in the infrared region of the spectrum with twostep annealing. The observed effect is explained by participation of oxidation in the gettering process, where oxidation precedes formation of a buried n + layer in the substrate. (authors)

  20. Integrated circuits of silicon on insulator S.O.I. technologies: State of the art and perspectives

    International Nuclear Information System (INIS)

    Leray, J.L.; Dupont-Nivet, E.; Raffaelli, M.; Coic, Y.M.; Musseau, O.; Pere, J.F.; Lalande, P.; Bredy, J.; Auberton-Herve, A.J.; Bruel, M.; Giffard, B.

    1989-01-01

    Silicon On Insulator technologies have been proposed to increase the integrated circuits performances in radiation operation. Active researches are conducted, in France and abroad. This paper reviews briefly radiation effects phenomenology in that particular type of structure S.O.I. New results are presented that show very good radiation behaviour in term of speed, dose (10 to 100 megarad (Si)), dose rate and S.E.U. performances [fr

  1. A thermal model for amorphous silicon photovoltaic integrated in ETFE cushion roofs

    International Nuclear Information System (INIS)

    Zhao, Bing; Chen, Wujun; Hu, Jianhui; Qiu, Zhenyu; Qu, Yegao; Ge, Binbin

    2015-01-01

    Highlights: • A thermal model is proposed to estimate temperature of a-Si PV integrated in ETFE cushion. • Nonlinear equation is solved by Runge–Kutta method integrated in a new program. • Temperature profiles varying with weather conditions are obtained and analyzed. • Numerical results are in good line with experimental results with coefficients of 0.821–0.985. • Reasons for temperature difference of 0.9–4.6 K are solar irradiance and varying parameters. - Abstract: Temperature characteristics of amorphous silicon photovoltaic (a-Si PV) integrated in building roofs (e.g. the ETFE cushions) are indispensible for evaluating the thermal performances of a-Si PV and buildings. To investigate the temperature characteristics and temperature value, field experiments and numerical modeling were performed and compared in this paper. An experimental mock-up composed of a-Si PV and a three-layer ETFE cushion structure was constructed and experiments were carried out under four typical weather conditions (winter sunny, winter cloudy, summer sunny and summer cloudy). The measured solar irradiance and air temperature were used as the real weather conditions for the thermal model. On the other side, a theoretical thermal model was developed based on energy balance equation which was expressed as that absorbed energy was equal to converted energy and energy loss. The corresponding differential equation of PV temperature varying with weather conditions was solved by the Runge–Kutta method. The comparisons between the experimental and numerical results were focusing on the temperature characteristics and temperature value. For the temperature characteristics, good agreement was obtained by correlation analysis with the coefficients of 0.821–0.985, which validated the feasibility of the thermal model. For the temperature value, the temperature difference between the experimental and numerical results was only 0.9–4.6 K and the reasons could be the dramatical

  2. The thermal neutron absorption cross-sections, resonance integrals and resonance parameters of silicon and its stable isotopes

    International Nuclear Information System (INIS)

    Story, J.S.

    1969-09-01

    The data available up to the end of November 1968 on the thermal neutron absorption cross-sections, resonance absorption integrals, and resonance parameters of silicon and its stable isotopes are collected and discussed. Estimates are given of the mean spacing of the energy levels of the compound nuclei near the neutron binding energy. It is concluded that the thermal neutron absorption cross-section and resonance absorption integral of natural silicon are not well established. The data on these two parameters are somewhat correlated, and three different assessments of the resonance integral are presented which differ over-all by a factor of 230. Many resonances have been detected by charged particle reactions which have not yet been observed in neutron cross-section measurements. One of these resonances of Si 2 8, at E n = 4 ± 5 keV might account for the large resonance integral which is derived, very uncertainly, from integral data. The principal source of the measured resonance integral of Si 3 0 has not yet been located. The thermal neutron absorption cross-section of Si 2 8 appears to result mainly from a negative energy resonance, possibly the resonance at E n = - 59 ± 5 keV detected by the Si 2 8 (d,p) reaction. (author)

  3. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    International Nuclear Information System (INIS)

    Alemi, M.; Campbell, M.; Gys, T.; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K.

    2000-01-01

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface

  4. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    Energy Technology Data Exchange (ETDEWEB)

    Alemi, M.; Campbell, M.; Gys, T. E-mail: thierry.gys@cern.ch; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K

    2000-07-11

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface.

  5. Development of deep silicon plasma etching for 3D integration technology

    Directory of Open Access Journals (Sweden)

    Golishnikov А. А.

    2014-02-01

    Full Text Available Plasma etch process for thought-silicon via (TSV formation is one of the most important technological operations in the field of metal connections creation between stacked circuits in 3D assemble technology. TSV formation strongly depends on parameters such as Si-wafer thickness, aspect ratio, type of metallization material, etc. The authors investigate deep silicon plasma etch process for formation of TSV with controllable profile. The influence of process parameters on plasma etch rate, silicon etch selectivity to photoresist and the structure profile are researched in this paper. Technology with etch and passivation steps alternation was used as a method of deep silicon plasma etching. Experimental tool «Platrane-100» with high-density plasma reactor based on high-frequency ion source with transformer coupled plasma was used for deep silicon plasma etching. As actuation gases for deep silicon etching were chosen the following gases: SF6 was used for the etch stage and CHF3 was applied on the polymerization stage. As a result of research, the deep plasma etch process has been developed with the following parameters: silicon etch rate 6 µm/min, selectivity to photoresist 60 and structure profile 90±2°. This process provides formation of TSV 370 µm deep and about 120 µm in diameter.

  6. The development report of an intelligent neutron fluence integration monitor

    International Nuclear Information System (INIS)

    Jiang Zongbing; Wei Ying

    1996-10-01

    An intelligent neutron fluence integration monitor is introduced. It is used to measure the received neutron fluence of the monocrystalline silicon in reactor radiation channel. The significance of study and specifications of the instrument are briefly described. The emphasis is on the working principle, structure and characteristics of the instrument is intelligent due to use of monolithic microcomputer. It has many advantages proved in the actual practice, such as powerful function, high accuracy, diversity of application, high level automatization, easy to operate, high reliability, etc. After using this instrument the monocrystalline silicon radiation technology is improved and the efficiency of production is raised. (1 fig.)

  7. Integration of a silicon-based microprobe into a gear measuring instrument for accurate measurement of micro gears

    International Nuclear Information System (INIS)

    Ferreira, N; Krah, T; Jeong, D C; Kniel, K; Härtig, F; Metz, D; Dietzel, A; Büttgenbach, S

    2014-01-01

    The integration of silicon micro probing systems into conventional gear measuring instruments (GMIs) allows fully automated measurements of external involute micro spur gears of normal modules smaller than 1 mm. This system, based on a silicon microprobe, has been developed and manufactured at the Institute for Microtechnology of the Technische Universität Braunschweig. The microprobe consists of a silicon sensor element and a stylus which is oriented perpendicularly to the sensor. The sensor is fabricated by means of silicon bulk micromachining. Its small dimensions of 6.5 mm × 6.5 mm allow compact mounting in a cartridge to facilitate the integration into a GMI. In this way, tactile measurements of 3D microstructures can be realized. To enable three-dimensional measurements with marginal forces, four Wheatstone bridges are built with diffused piezoresistors on the membrane of the sensor. On the reverse of the membrane, the stylus is glued perpendicularly to the sensor on a boss to transmit the probing forces to the sensor element during measurements. Sphere diameters smaller than 300 µm and shaft lengths of 5 mm as well as measurement forces from 10 µN enable the measurements of 3D microstructures. Such micro probing systems can be integrated into universal coordinate measuring machines and also into GMIs to extend their field of application. Practical measurements were carried out at the Physikalisch-Technische Bundesanstalt by qualifying the microprobes on a calibrated reference sphere to determine their sensitivity and their physical dimensions in volume. Following that, profile and helix measurements were carried out on a gear measurement standard with a module of 1 mm. The comparison of the measurements shows good agreement between the measurement values and the calibrated values. This result is a promising basis for the realization of smaller probe diameters for the tactile measurement of micro gears with smaller modules. (paper)

  8. High-performance RF coil inductors on silicon

    Energy Technology Data Exchange (ETDEWEB)

    Malba, V.; Young, D.; Ou, J.J.; Bernhardt, A.F.; Boser, B.E.

    1998-03-01

    Strong demand for wireless communication devices has motivated research directed toward monolithic integration of transceivers. The fundamental electronic component least compatible with silicon integrated circuits is the inductor, although a number of inductors are required to implement oscillators, filters and matching networks in cellular devices. Spiral inductors have been integrated into the silicon IC metallization sequence but have not performed adequately due to coupling to the silicon which results in parasitic capacitance and loss. We have, for the first time, fabricated three dimensional coil inductors on silicon which have significantly lower capacitive coupling and loss and which now exceed the requirements of potential applications. Quality factors of 30 at 1 GHz have been measured in single turn devices and Q > 16 in 2 and 4 turn devices. The reduced Q for multiturn devices appears to be related to eddy currents in outer turns generated by magnetic fields from current in neighboring turns. Higher Q values significantly in excess of 30 are anticipated using modified coil designs.

  9. A deep etching mechanism for trench-bridging silicon nanowires.

    Science.gov (United States)

    Tasdemir, Zuhal; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf; Alaca, B Erdem

    2016-03-04

    Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping.

  10. A deep etching mechanism for trench-bridging silicon nanowires

    International Nuclear Information System (INIS)

    Tasdemir, Zuhal; Alaca, B Erdem; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf

    2016-01-01

    Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping. (paper)

  11. A deep etching mechanism for trench-bridging silicon nanowires

    Science.gov (United States)

    Tasdemir, Zuhal; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf; Erdem Alaca, B.

    2016-03-01

    Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping.

  12. Impurity engineering for germanium-doped Czochralski silicon wafer used for ultra large scale integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Jiahe; Yang, Deren [State Key Laboratory of Silicon Materials, Department of Materials Science and Engineering, Zhejiang University, Hangzhou (China)

    2009-07-01

    Internal gettering (IG) technology has been challenged by both the reduction of thermal budget during device fabrication and the enlargement of wafer diameter. Improving the properties of Czochralski (Cz) silicon wafers by intentional impurity doping, the so-called 'impurity engineering (IE)', is defined. Germanium has been found to be one of the important impurities for improving the internal gettering effect in Cz silicon wafer. In this paper, the investigations on IE involved with the conventional furnace anneal based denudation processing for germanium-doped Cz silicon wafer are reviewed. Meanwhile, the potential mechanisms of germanium effects for the IE of Cz silicon wafer are also interpreted based on the experimental facts. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  13. Integrating Soil Silicon Amendment into Management Programs for Insect Pests of Drill-Seeded Rice.

    Science.gov (United States)

    Villegas, James M; Way, Michael O; Pearson, Rebecca A; Stout, Michael J

    2017-08-13

    Silicon soil amendment has been shown to enhance plant defenses against insect pests. Rice is a silicon-accumulating graminaceous plant. In the southern United States, the rice water weevil and stem borers are important pests of rice. Current management tactics for these pests rely heavily on the use of insecticides. This study evaluated the effects of silicon amendment when combined with current management tactics for these rice insect pests in the field. Field experiments were conducted from 2013 to 2015. Rice was drill-planted in plots subjected to factorial combinations of variety (conventional and hybrid), chlorantraniliprole seed treatment (treated and untreated), and silicon amendment (treated and untreated). Silicon amendment reduced densities of weevil larvae on a single sampling date in 2014, but did not affect densities of whiteheads caused by stem borers. In contrast, insecticidal seed treatment strongly reduced densities of both weevil larvae and whiteheads. Higher densities of weevil larvae were also observed in the hybrid variety in 2014, while higher incidences of whiteheads were observed in the conventional variety in 2014 and 2015. Silicon amendment improved rice yields, as did chlorantraniliprole seed treatment and use of the hybrid variety.

  14. A 60-GHz rectenna for monolithic wireless sensor tags

    NARCIS (Netherlands)

    Gao, H.; Johannsen, U.; Matters - Kammerer, M.; Milosevic, D.; Smolders, A.B.; Roermund, van A.H.M.; Baltus, P.G.M.

    2013-01-01

    This paper presents the design of a 60-GHz rectenna with an on-chip antenna and rectifier in 65nm CMOS technology. The rectenna is often the bottleneck in realizing a fully-integrated monolithic wireless sensor tag. In this paper, problems of the mm-wave rectifier are discussed, and the

  15. Monolitni katalizatori i reaktori: osnovne značajke, priprava i primjena (Monolith catalysts and reactors: preparation and applications

    Directory of Open Access Journals (Sweden)

    Tomašić, V.

    2004-12-01

    Full Text Available Monolithic (honeycomb catalysts are continuous unitary structures containing many narrow, parallel and usually straight channels (or passages. Catalytically active components are dispersed uniformly over the whole porous ceramic monolith structure (so-called incorporated monolithic catalysts or are in a layer of porous material that is deposited on the walls of channels in the monolith's structure (washcoated monolithic catalysts. The material of the main monolithic construction is not limited to ceramics but includes metals, as well. Monolithic catalysts are commonly used in gas phase catalytic processes, such as treatment of automotive exhaust gases, selective catalytic reduction of nitrogen oxides, catalytic removal of volatile organic compounds from industrial processes, etc. Monoliths continue to be the preferred support for environmental applications due to their high geometric surface area, different design options, low pressure drop, high temperature durability, mechanical strength, ease of orientation in a reactor and effectiveness as a support for a catalytic washcoat. As known, monolithic catalysts belong to the class of the structured catalysts and/or reactors (in some cases the distinction between "catalyst" and "reactor" has vanished. Structured catalysts can greatly intensify chemical processes, resulting in smaller, safer, cleaner and more energy efficient technologies. Monolith reactors can be considered as multifunctional reactors, in which chemical conversion is advantageously integrated with another unit operation, such as separation, heat exchange, a secondary reaction, etc. Finally, structured catalysts and/or reactors appear to be one of the most significant and promising developments in the field of heterogeneous catalysis and chemical engineering of the recent years. This paper gives a description of the background and perspectives for application and development of monolithic materials. Different methods and techniques

  16. Novel WSi/Au T-shaped gate GaAs metal-semiconductor field-effect-transistor fabrication process for super low-noise microwave monolithic integrated circuit amplifiers

    International Nuclear Information System (INIS)

    Takano, H.; Hosogi, K.; Kato, T.

    1995-01-01

    A fully ion-implanted self-aligned T-shaped gate Ga As metal-semiconductor field-effect transistor (MESFET) with high frequency and extremely low-noise performance has been successfully fabricated for super low-noise microwave monolithic integrated circuit (MMIC) amplifiers. A subhalf-micrometer gate structure composed of WSi/Ti/Mo/Au is employed to reduce gate resistance effectively. This multilayer gate structure is formed by newly developed dummy SiON self-alignment technology and a photoresist planarization process. At an operating frequency of 12 GHz, a minimum noise figure of 0.87 dB with an associated gain of 10.62 dB has been obtained. Based on the novel FET process, a low-noise single-stage MMIC amplifier with an excellent low-noise figure of 1.2 dB with an associated gain of 8 dB in the 14 GHz band has been realized. This is the lowest noise figure ever reported at this frequency for low-noise MMICs based on ion-implanted self-aligned gate MESFET technology. 14 refs., 9 figs

  17. Substrate and Passivation Techniques for Flexible Amorphous Silicon-Based X-ray Detectors.

    Science.gov (United States)

    Marrs, Michael A; Raupp, Gregory B

    2016-07-26

    Flexible active matrix display technology has been adapted to create new flexible photo-sensing electronic devices, including flexible X-ray detectors. Monolithic integration of amorphous silicon (a-Si) PIN photodiodes on a flexible substrate poses significant challenges associated with the intrinsic film stress of amorphous silicon. This paper examines how altering device structuring and diode passivation layers can greatly improve the electrical performance and the mechanical reliability of the device, thereby eliminating one of the major weaknesses of a-Si PIN diodes in comparison to alternative photodetector technology, such as organic bulk heterojunction photodiodes and amorphous selenium. A dark current of 0.5 pA/mm² and photodiode quantum efficiency of 74% are possible with a pixelated diode structure with a silicon nitride/SU-8 bilayer passivation structure on a 20 µm-thick polyimide substrate.

  18. Invited Article: Electrically tunable silicon-based on-chip microdisk resonator for integrated microwave photonic applications

    Directory of Open Access Journals (Sweden)

    Weifeng Zhang

    2016-11-01

    Full Text Available Silicon photonics with advantages of small footprint, compatibility with the mature CMOS fabrication technology, and its potential for seamless integration with electronics is making a significant difference in realizing on-chip integration of photonic systems. A microdisk resonator (MDR with a strong capacity in trapping and storing photons is a versatile element in photonic integrated circuits. Thanks to the large index contrast, a silicon-based MDR with an ultra-compact footprint has a great potential for large-scale and high-density integrations. However, the existence of multiple whispering gallery modes (WGMs and resonance splitting in an MDR imposes inherent limitations on its widespread applications. In addition, the waveguide structure of an MDR is incompatible with that of a lateral PN junction, which leads to the deprivation of its electrical tunability. To circumvent these limitations, in this paper we propose a novel design of a silicon-based MDR by introducing a specifically designed slab waveguide to surround the disk and the lateral sides of the bus waveguide to suppress higher-order WGMs and to support the incorporation of a lateral PN junction for electrical tunability. An MDR based on the proposed design is fabricated and its optical performance is evaluated. The fabricated MDR exhibits single-mode operation with a free spectral range of 28.85 nm. Its electrical tunability is also demonstrated and an electro-optic frequency response with a 3-dB modulation bandwidth of ∼30.5 GHz is measured. The use of the fabricated MDR for the implementation of an electrically tunable optical delay-line and a tunable fractional-order temporal photonic differentiator is demonstrated.

  19. GaN-on-Silicon - Present capabilities and future directions

    Science.gov (United States)

    Boles, Timothy

    2018-02-01

    Gallium Nitride, in the form of epitaxial HEMT transistors on various substrate materials, is the newest and most promising semiconductor technology for high performance devices in the RF, microwave, and mmW arenas. This is particularly true for GaN-on-Silicon based devices and MMIC's which enable both state-of-the-art high frequency functionality and the ability to scale production into large wafer diameter CMOS foundries. The design and development of GaN-on-Silicon structures and devices will be presented beginning with the basic material parameters, growth of the required epitaxial construction, and leading to the fundamental operational theory of high frequency, high power HEMTs. In this discussion comparisons will be made with alternative substrate materials with emphasis on contrasting the inherent advantages of a silicon based system. Theory of operation of microwave and mmW high power HEMT devices will be presented with special emphasis on fundamental limitations of device performance including inherent frequency limiting transit time analysis, required impedance transformations, internal and external parasitic reactance, thermal impedance optimization, and challenges improved by full integration into monolithic MMICs. Lastly, future directions for implementing GaN-on-Silicon into mainstream CMOS silicon semiconductor technologies will be discussed.

  20. Data quality objectives summary report for the 105-N monolith off-gas issue

    International Nuclear Information System (INIS)

    Pisarcik, D.J.

    1997-01-01

    The 105-N Basin hardware waste with radiation exposure rates high enough to make above-water handling and packaging impractical has been designated high exposure rate hardware (HERH) waste. This material, consisting primarily of irradiated reactor components, is packaged underwater for subsequent disposal as a grout-encapsulated solid monolith. The third HERH waste package that was created (Monolith No. 3) was not immediately removed from the basin because of administrative delays. During a routine facility walkdown, Monolith No. 3 was observed to be emitting bubbles. Mass spectroscopic analysis of a gas sample from Monolith No. 3 indicated that the gas was 85.2% hydrogen along with a trace of fission gases (stable isotopes of xenon). Gamma energy analysis of a gas sample from Monolith No. 3 also identified trace quantities of 85 Kr. The monolith off-gas Data Quality Objective (DQO) process concluded the following: Monolith No. 3 and similar monoliths can be safely transported following installation of spacers between the lids of the L3-181 transport cask to vent the hydrogen gas; The 85 Kr does not challenge personnel or environmental safety; Fumaroles in the surface of gassing monoliths renders them incompatible with Hanford Site Solid Waste Acceptance Criteria requirements unless placed in a qualified high integrity container overpack; and Gassing monoliths do meet Environmental Restoration Disposal Facility Waste Acceptance Criteria requirements. This DQO Summary Report is both an account of the Monolith Off-Gas DQO Process and a means of documenting the concurrence of each of the stakeholder organizations

  1. Safely re-integrating silicone breast implants into the plastic surgery practice.

    Science.gov (United States)

    Gladfelter, Joanne

    2006-01-01

    In the early 1990s, it was reported that silicone breast implants were possibly responsible for serious damage to women's health. In January 1992, the Food and Drug Administration issued a voluntary breast implant moratorium and, in April, issued a ban on the use of silicone gel-filled implants for cosmetic breast augmentation. Since that time, silicone gel-filled breast implants have been available to women only for select cases: women seeking breast reconstruction or revision of an existing breast implant, women who have had breast cancer surgery, a severe injury to the breast, a birth defect that affects the breast, or a medical condition causing a severe breast deformity. Since the ban on the use of silicone gel-filled breast implants for cosmetic breast augmentation, numerous scientific studies have been conducted. To ensure patient safety, the American Board of Plastic Surgery believes that these scientific studies and the Food and Drug Administration's scrutiny of silicone gel-filled breast implants have been appropriate and necessary.

  2. A monolithic 640 × 512 CMOS imager with high-NIR sensitivity

    Science.gov (United States)

    Lauxtermann, Stefan; Fisher, John; McDougal, Michael

    2014-06-01

    In this paper we present first results from a backside illuminated CMOS image sensor that we fabricated on high resistivity silicon. Compared to conventional CMOS imagers, a thicker photosensitive membrane can be depleted when using silicon with low background doping concentration while maintaining low dark current and good MTF performance. The benefits of such a fully depleted silicon sensor are high quantum efficiency over a wide spectral range and a fast photo detector response. Combining these characteristics with the circuit complexity and manufacturing maturity available from a modern, mixed signal CMOS technology leads to a new type of sensor, with an unprecedented performance spectrum in a monolithic device. Our fully depleted, backside illuminated CMOS sensor was designed to operate at integration times down to 100nsec and frame rates up to 1000Hz. Noise in Integrate While Read (IWR) snapshot shutter operation for these conditions was simulated to be below 10e- at room temperature. 2×2 binning with a 4× increase in sensitivity and a maximum frame rate of 4000 Hz is supported. For application in hyperspectral imaging systems the full well capacity in each row can individually be programmed between 10ke-, 60ke- and 500ke-. On test structures we measured a room temperature dark current of 360pA/cm2 at a reverse bias of 3.3V. A peak quantum efficiency of 80% was measured with a single layer AR coating on the backside. Test images captured with the 50μm thick VGA imager between 30Hz and 90Hz frame rate show a strong response at NIR wavelengths.

  3. Silicon Microspheres Photonics

    International Nuclear Information System (INIS)

    Serpenguzel, A.

    2008-01-01

    Electrophotonic integrated circuits (EPICs), or alternatively, optoelectronic integrated circuit (OEICs) are the natural evolution of the microelectronic integrated circuit (IC) with the addition of photonic capabilities. Traditionally, the IC industry has been based on group IV silicon, whereas the photonics industry on group III-V semiconductors. However, silicon based photonic microdevices have been making strands in siliconizing photonics. Silicon microspheres with their high quality factor whispering gallery modes (WGMs), are ideal candidates for wavelength division multiplexing (WDM) applications in the standard near-infrared communication bands. In this work, we will discuss the possibility of using silicon microspheres for photonics applications in the near-infrared

  4. Active and passive silica waveguide integration

    DEFF Research Database (Denmark)

    Hübner, Jörg; Guldberg-Kjær, Søren Andreas

    2001-01-01

    . The increasing complexity and functionality of optical networks prompts a demand for highly integrated optical circuits. On-board optical amplifiers, monolithically integrated with functionalities like switching or multiplexing/demultiplexing will allow flexible incorporation of optical integrated circuits...... in existing and future networks without affecting the power budget of the system. Silica on silicon technology offers a unique possibility to selectively dope sections of the integrated circuit with erbium where amplification is desired. Some techniques for active/passive integration are reviewed and a silica......Integrated optical amplifiers are currently regaining interest. Stand-alone single integrated amplifiers offer only limited advantage over current erbium doped fiber amplifiers, whereas arrays of integrated amplifiers are very attractive due to miniaturization and the possibility of mass production...

  5. Band structure properties of (BGa)P semiconductors for lattice matched integration on (001) silicon

    Energy Technology Data Exchange (ETDEWEB)

    Hossain, Nadir; Sweeney, Stephen [Advanced Technology Institute and Department of Physics, University of Surrey, Guildford, Surrey GU2 7XH (United Kingdom); Hosea, Jeff [Advanced Technology Institute and Department of Physics, University of Surrey, Guildford, Surrey GU2 7XH, UK and Ibnu Sina Institute for Fundamental Science Studies, Universiti Teknologi Malaysia, Johor Bahru 81310 (Malaysia); Liebich, Sven; Zimprich, Martin; Volz, Kerstin; Stolz, Wolfgang [Material Sciences Center and Faculty of Physics, Philipps-University, 35032 Marburg (Germany); Kunert, Bernerdette [NAsP III/V GmbH, Am Knechtacker 19, 35041 Marburg (Germany)

    2013-12-04

    We report the band structure properties of (BGa)P layers grown on silicon substrate using metal-organic vapour-phase epitaxy. Using surface photo-voltage spectroscopy we find that both the direct and indirect band gaps of (BGa)P alloys (strained and unstrained) decrease with Boron content. Our experimental results suggest that the band gap of (BGa)P layers up to 6% Boron is large and suitable to be used as cladding and contact layers in GaP-based quantum well heterostructures on silicon substrates.

  6. Silicon-integrated thin-film structure for electro-optic applications

    Science.gov (United States)

    McKee, Rodney A.; Walker, Frederick Joseph

    2000-01-01

    A crystalline thin-film structure suited for use in any of an number of electro-optic applications, such as a phase modulator or a component of an interferometer, includes a semiconductor substrate of silicon and a ferroelectric, optically-clear thin film of the perovskite BaTiO.sub.3 overlying the surface of the silicon substrate. The BaTiO.sub.3 thin film is characterized in that substantially all of the dipole moments associated with the ferroelectric film are arranged substantially parallel to the surface of the substrate to enhance the electro-optic qualities of the film.

  7. Performance of integrated retainer rings in silicon micro-turbines with thrust style micro-ball bearings

    International Nuclear Information System (INIS)

    Hergert, Robert J; Holmes, Andrew S; Hanrahan, Brendan; Ghodssi, Reza

    2013-01-01

    This work explores the performance of different silicon retainer ring designs when integrated into silicon micro-turbines (SMTs) incorporating thrust style bearings supported on 500 µm diameter steel balls. Experimental performance curves are presented for SMTs with rotor diameters of 5 mm and 10 mm, each with five different retainer designs varying in mechanical rigidity, ball pocket shape and ball complement. It was found that the different retainer designs yielded different performance curves, with the closed pocket designs consistently requiring lower input power for a given rotation speed, and the most rigid retainers giving the best performance overall. Both 5 mm and 10 mm diameter devices have shown repeatable performance at rotation speeds up to and exceeding 20 000 RPM with input power levels below 2 W, and devices were tested for over 2.5 million revolutions without failure. Retainer rings are commonly used in macro-scale bearings to ensure uniform spacing between the rolling elements. The integration of retainers into micro-bearings could lower costs by reducing the number of balls required for stable operation, and also open up the possibility of ‘smart’ bearings with integrated sensors to monitor the bearing status. (paper)

  8. Acoustic of monolithic dome structures

    Directory of Open Access Journals (Sweden)

    Mostafa Refat Ismail

    2018-03-01

    The interior of monolithic domes have perfect, concave shapes to ensure that sound travels through the dome and perfectly collected at different vocal points. These dome structures are utilized for domestic use because the scale allows the focal points to be positioned across daily life activities, thereby affecting the sonic comfort of the internal space. This study examines the various acoustic treatments and parametric configurations of monolithic dome sizes. A geometric relationship of acoustic treatment and dome radius is established to provide architects guidelines on the correct selection of absorption needed to maintain the acoustic comfort of these special spaces.

  9. Monolithically integrated enhancement/depletion-mode AlGaN/GaN HEMT D flip-flop using fluorine plasma treatment

    International Nuclear Information System (INIS)

    Xie Yuanbin; Quan Si; Ma Xiaohua; Zhang Jincheng; Li Qingmin; Hao Yue

    2011-01-01

    Depletion-mode and enhancement-mode AlGaN/GaN HEMTs using fluorine plasma treatment were integrated on one wafer. Direct-coupled FET logic circuits, such as an E/D HEMT inverter, NAND gate and D flip-flop, were fabricated on an AlGaN/GaN heterostructure. The D flip-flop and NAND gate are demonstrated in a GaN system for the first time. The dual-gate AlGaN/GaN E-HEMT substitutes two single-gate E-HEMTs for simplifying the NAND gate and shrinking the area, integrating with a conventional AlGaN/GaN D-HEMT and demonstrating a NAND gate. E/D-mode D flip-flop was fabricated by integrating the inverters and the NAND gate on the AlGaN/GaN heterostructure. At a supply voltage of 2 V, the E/D inverter shows an output logic swing of 1.7 V, a logic-low noise margin of 0.49 V and a logic-high noise margin of 0.83 V. The NAND gate and D flip-flop showed correct logic function demonstrating promising potential for GaN-based digital ICs. (semiconductor integrated circuits)

  10. Development and characterisation of silicon photomultipliers with bulk-integrated quench resistors for future applications in particle and astroparticle physics

    International Nuclear Information System (INIS)

    Jendrysik, Christian

    2014-01-01

    This thesis deals with the development and characterisation of a novel silicon photomultiplier concept with bulk-integrated quench resistors. The approach allows the realisation of a free entrance window and high fill factors, which leads to an improvement of the detection efficiency. With first prototype productions a proof of concept was possible. A full characterisation provided promising results, in particular with respect to the photon detection efficiency. By customising the simulation tools, a reliable description of the devices was achieved. In addition, conceptual studies of the next device generation demonstrated the possibility of single cell readout, expanding the application range of those detectors to particle tracking.

  11. Micromachined silicon cantilevers with integrated high-frequency magnetoimpedance sensors for simultaneous strain and magnetic field detection

    Science.gov (United States)

    Buettel, G.; Joppich, J.; Hartmann, U.

    2017-12-01

    Giant magnetoimpedance (GMI) measurements in the high-frequency regime utilizing a coplanar waveguide with an integrated Permalloy multilayer and micromachined on a silicon cantilever are reported. The fabrication process is described in detail. The aspect ratio of the magnetic multilayer in the magnetoresistive and magnetostrictive device was varied. Tensile strain and compressive strain were applied. Vector network analyzer measurements in the range from the skin effect to ferromagnetic resonance confirm the technological potential of GMI-based micro-electro-mechanical devices for strain and magnetic field sensing applications. The strain-impedance gauge factor was quantified by finite element strain calculations and reaches a maximum value of almost 200.

  12. Towards Cost-Effective Crystalline Silicon Based Flexible Solar Cells: Integration Strategy by Rational Design of Materials, Process, and Devices

    KAUST Repository

    Bahabry, Rabab R.

    2017-11-30

    The solar cells market has an annual growth of more than 30 percent over the past 15 years. At the same time, the cost of the solar modules diminished to meet both of the rapid global demand and the technological improvements. In particular for the crystalline silicon solar cells, the workhorse of this technology. The objective of this doctoral thesis is enhancing the efficiency of c-Si solar cells while exploring the cost reduction via innovative techniques. Contact metallization and ultra-flexible wafer based c-Si solar cells are the main areas under investigation. First, Silicon-based solar cells typically utilize screen printed Silver (Ag) metal contacts which affect the optimal electrical performance. To date, metal silicide-based ohmic contacts are occasionally used for the front contact grid lines. In this work, investigation of the microstructure and the electrical characteristics of nickel monosilicide (NiSi) ohmic contacts on the rear side of c-Si solar cells has been carried out. Significant enhancement in the fill factor leading to increasing the total power conversion efficiency is observed. Second, advanced classes of modern application require a new generation of versatile solar cells showcasing extreme mechanical resilience. However, silicon is a brittle material with a fracture strains <1%. Highly flexible Si-based solar cells are available in the form thin films which seem to be disadvantageous over thick Si solar cells due to the reduction of the optical absorption with less active Si material. Here, a complementary metal oxide semiconductor (CMOS) technology based integration strategy is designed where corrugation architecture to enable an ultra-flexible solar cell module from bulk mono-crystalline silicon solar wafer with 17% efficiency. This periodic corrugated array benefits from an interchangeable solar cell segmentation scheme which preserves the active silicon thickness and achieves flexibility via interdigitated back contacts. These cells

  13. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

    2015-01-01

    mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen

  14. A low power bipolar amplifier integrated circuit for the ZEUS silicon strip system

    Energy Technology Data Exchange (ETDEWEB)

    Barberis, E. (Inst. for Particle Physics, Univ. of California, Santa Cruz, CA (United States)); Cartiglia, N. (Inst. for Particle Physics, Univ. of California, Santa Cruz, CA (United States)); Dorfan, D.E. (Inst. for Particle Physics, Univ. of California, Santa Cruz, CA (United States)); Spencer, E. (Inst. for Particle Physics, Univ. of California, Santa Cruz, CA (United States))

    1993-05-01

    A fast low power bipolar chip consisting of 64 amplifier-comparators has been developed for use with silicon strip detectors for systems where high radiation levels and high occupancy considerations are important. The design is described and test results are presented. (orig.)

  15. Plasma enhanced chemical vapor deposition silicon oxynitride optimized for application in integrated optics

    NARCIS (Netherlands)

    Worhoff, Kerstin; Driessen, A.; Lambeck, Paul; Hilderink, L.T.H.; Linders, Petrus W.C.; Popma, T.J.A.

    1999-01-01

    Silicon Oxynitride layers are grown from SiH4/N2, NH3 and N2O by Plasma Enhanced Chemical Vapor Deposition. The process is optimized with respect to deposition of layers with excellent uniformity in the layer thickness, high homogeneity of the refractive index and good reproducibility of the layer

  16. Silicon diode for measurement of integral neutron dose and method of its production

    International Nuclear Information System (INIS)

    Frank, H.; Seda, J.; Trousil, J.

    1978-01-01

    The silicon diode consists of an N or P type silicon plate having a specific resistance exceeding 10 ohm.cm and minority carrier life exceeding 100μs. The plate thickness is a quintuple to a ten-tuple of the diffusion length and the plate consists of layers. Ions of, eg., boron, at a concentration exceeding 10 14 cm -2 are implanted into the P + type silicon layer and a layer of a metal, eg., nickel, is deposited onto it. Ions of eg., phosphorus, at a concentration exceeding 10 14 cm -2 are implanted in the N + type layer and a metal layer, eg., nickel is again depositeJ onto it. Implantation proceeds at an ion acceleration voltage of 10 to 200 kV. Metal layer deposition follows, and simultaneously with annealing of the P + and N + types of silicon layers, the metal layers are annealed at 600 to 900 degC for 1 to 60 minutes with subsequent temperature decrease at a rate less than 10 degC/min, down to a temperature of 300 degC. (J.P.)

  17. Monolithic fiber optic sensor assembly

    Science.gov (United States)

    Sanders, Scott

    2015-02-10

    A remote sensor element for spectrographic measurements employs a monolithic assembly of one or two fiber optics to two optical elements separated by a supporting structure to allow the flow of gases or particulates therebetween. In a preferred embodiment, the sensor element components are fused ceramic to resist high temperatures and failure from large temperature changes.

  18. Material synthesis for silicon integrated-circuit applications using ion implantation

    Science.gov (United States)

    Lu, Xiang

    As devices scale down into deep sub-microns, the investment cost and complexity to develop more sophisticated device technologies have increased substantially. There are some alternative potential technologies, such as silicon-on-insulator (SOI) and SiGe alloys, that can help sustain this staggering IC technology growth at a lower cost. Surface SiGe and SiGeC alloys with germanium peak composition up to 16 atomic percent are formed using high-dose ion implantation and subsequent solid phase epitaxial growth. RBS channeling spectra and cross-sectional TEM studies show that high quality SiGe and SiGeC crystals with 8 atomic percent germanium concentration are formed at the silicon surface. Extended defects are formed in SiGe and SiGeC with 16 atomic percent germanium concentration. X-ray diffraction experiments confirm that carbon reduces the lattice strain in SiGe alloys but without significant crystal quality improvement as detected by RBS channeling spectra and XTEM observations. Separation by plasma implantation of oxygen (SPIMOX) is an economical method for SOI wafer fabrication. This process employs plasma immersion ion implantation (PIII) for the implantation of oxygen ions. The implantation rate for Pm is considerably higher than that of conventional implantation. The feasibility of SPIMOX has been demonstrated with successful fabrication of SOI structures implementing this process. Secondary ion mass spectrometry (SIMS) analysis and cross-sectional transmission electron microscopy (XTEM) micrographs of the SPIMOX sample show continuous buried oxide under single crystal overlayer with sharp silicon/oxide interfaces. The operational phase space of implantation condition, oxygen dose and annealing requirement has been identified. Physical mechanisms of hydrogen induced silicon surface layer cleavage have been investigated using a combination of microscopy and hydrogen profiling techniques. The evolution of the silicon cleavage phenomenon is recorded by a series

  19. Protective Skins for Aerogel Monoliths

    Science.gov (United States)

    Leventis, Nicholas; Johnston, James C.; Kuczmarski, Maria A.; Meador, Ann B.

    2007-01-01

    A method of imparting relatively hard protective outer skins to aerogel monoliths has been developed. Even more than aerogel beads, aerogel monoliths are attractive as thermal-insulation materials, but the commercial utilization of aerogel monoliths in thermal-insulation panels has been inhibited by their fragility and the consequent difficulty of handling them. Therefore, there is a need to afford sufficient protection to aerogel monoliths to facilitate handling, without compromising the attractive bulk properties (low density, high porosity, low thermal conductivity, high surface area, and low permittivity) of aerogel materials. The present method was devised to satisfy this need. The essence of the present method is to coat an aerogel monolith with an outer polymeric skin, by painting or spraying. Apparently, the reason spraying and painting were not attempted until now is that it is well known in the aerogel industry that aerogels collapse in contact with liquids. In the present method, one prevents such collapse through the proper choice of coating liquid and process conditions: In particular, one uses a viscous polymer precursor liquid and (a) carefully controls the amount of liquid applied and/or (b) causes the liquid to become cured to the desired hard polymeric layer rapidly enough that there is not sufficient time for the liquid to percolate into the aerogel bulk. The method has been demonstrated by use of isocyanates, which, upon exposure to atmospheric moisture, become cured to polyurethane/polyurea-type coats. The method has also been demonstrated by use of commercial epoxy resins. The method could also be implemented by use of a variety of other resins, including polyimide precursors (for forming high-temperature-resistant protective skins) or perfluorinated monomers (for forming coats that impart hydrophobicity and some increase in strength).

  20. David Adler Lectureship Award Talk: III-V Semiconductor Nanowires on Silicon for Future Devices

    Science.gov (United States)

    Riel, Heike

    Bottom-up grown nanowires are very attractive materials for direct integration of III-V semiconductors on silicon thus opening up new possibilities for the design and fabrication of nanoscale devices for electronic, optoelectronic as well as quantum information applications. Template-Assisted Selective Epitaxy (TASE) allows the well-defined and monolithic integration of complex III-V nanostructures and devices on silicon. Achieving atomically abrupt heterointerfaces, high crystal quality and control of dimension down to 1D nanowires enabled the demonstration of FETs and tunnel devices based on In(Ga)As and GaSb. Furthermore, the strong influence of strain on nanowires as well as results on quantum transport studies of InAs nanowires with well-defined geometry will be presented.

  1. Integrating a dual-silicon photoelectrochemical cell into a redox flow battery for unassisted photocharging

    DEFF Research Database (Denmark)

    Liao, Shichao; Zong, Xu; Seger, Brian

    2016-01-01

    Solar rechargeable flow cells (SRFCs) provide an attractive approach for in situ capture and storage of intermittent solar energy via photoelectrochemical regeneration of discharged redox species for electricity generation. However, overall SFRC performance is restricted by inefficient photoelect......Solar rechargeable flow cells (SRFCs) provide an attractive approach for in situ capture and storage of intermittent solar energy via photoelectrochemical regeneration of discharged redox species for electricity generation. However, overall SFRC performance is restricted by inefficient...... photoelectrochemical reactions. Here we report an efficient SRFC based on a dual-silicon photoelectrochemical cell and a quinone/bromine redox flow battery for in situ solar energy conversion and storage. Using narrow bandgap silicon for efficient photon collection and fast redox couples for rapid interface charge...

  2. Integrating a dual-silicon photoelectrochemical cell into a redox flow battery for unassisted photocharging.

    Science.gov (United States)

    Liao, Shichao; Zong, Xu; Seger, Brian; Pedersen, Thomas; Yao, Tingting; Ding, Chunmei; Shi, Jingying; Chen, Jian; Li, Can

    2016-05-04

    Solar rechargeable flow cells (SRFCs) provide an attractive approach for in situ capture and storage of intermittent solar energy via photoelectrochemical regeneration of discharged redox species for electricity generation. However, overall SFRC performance is restricted by inefficient photoelectrochemical reactions. Here we report an efficient SRFC based on a dual-silicon photoelectrochemical cell and a quinone/bromine redox flow battery for in situ solar energy conversion and storage. Using narrow bandgap silicon for efficient photon collection and fast redox couples for rapid interface charge injection, our device shows an optimal solar-to-chemical conversion efficiency of ∼5.9% and an overall photon-chemical-electricity energy conversion efficiency of ∼3.2%, which, to our knowledge, outperforms previously reported SRFCs. The proposed SRFC can be self-photocharged to 0.8 V and delivers a discharge capacity of 730 mAh l(-1). Our work may guide future designs for highly efficient solar rechargeable devices.

  3. Design of Elastomer Structure to Facilitate Incorporation of Expanded Graphite in Silicones Without Compromising Electromechanical Integrity

    DEFF Research Database (Denmark)

    Hassouneh, Suzan Sager; Daugaard, Anders Egede; Skov, Anne Ladegaard

    2015-01-01

    The development of elastomer materials with a high dielectric permittivity has attracted increased interest over the past years due to their use in, for example, dielectric elastomers. For this particular use, both the electrically insulating properties - as well as the mechanical properties......-functional crosslinker, which allows for development of a suitable network matrix. The dielectric permittivity was increased by almost a factor of 4 compared to a benchmark silicone elastomer....

  4. Micro-fabricated silicon devices for advanced thermal management and integration of particle tracking detectors

    CERN Document Server

    Romagnoli, Giulia; Gambaro, Carla

    Since their first studies targeting the cooling of high-power computing chips, micro-channel devices are proven to provide a very efficient cooling system. In the last years micro-channel cooling has been successfully applied to the cooling of particle detectors at CERN. Thanks to their high thermal efficiency, they can guarantee a good heat sink for the cooling of silicon trackers, fundamental for the reduction of the radiation damage caused by the beam interactions. The radiation damage on the silicon detector is increasing with temperature and furthermore the detectors are producing heat that should be dissipated in the supporting structure. Micro-channels guarantee a distributed and uniform thermal exchange, thanks to the high flexibility of the micro-fabrication process that allows a large variety of channel designs. The thin nature of the micro-channels etched inside silicon wafers, is fulfilling the physics requirement of minimization of the material crossed by the particle beam. Furthermore micro-chan...

  5. Monolithic active pixel radiation detector with shielding techniques

    Energy Technology Data Exchange (ETDEWEB)

    Deptuch, Grzegorz W.

    2018-03-20

    A monolithic active pixel radiation detector including a method of fabricating thereof. The disclosed radiation detector can include a substrate comprising a silicon layer upon which electronics are configured. A plurality of channels can be formed on the silicon layer, wherein the plurality of channels are connected to sources of signals located in a bulk part of the substrate, and wherein the signals flow through electrically conducting vias established in an isolation oxide on the substrate. One or more nested wells can be configured from the substrate, wherein the nested wells assist in collecting charge carriers released in interaction with radiation and wherein the nested wells further separate the electronics from the sensing portion of the detector substrate. The detector can also be configured according to a thick SOA method of fabrication.

  6. MEMS based monolithic Phased array using 3-bit Switched-line Phase Shifter

    Directory of Open Access Journals (Sweden)

    A. Karmakr

    2017-10-01

    Full Text Available This article details the design of an electronically scanning phased array antenna with proposed fabrication process steps. Structure is based upon RF micro-electromechanical system (MEMS technology. Capacitive type shunt switches have been implemented here to cater high frequency operation. The architecture, which is deigned at 30 GHz, consists of 3-bit (11.25º, 22.5º and 45º integrated Switched-line phase shifter and a linearly polarized microstrip patch antenna. Detailed design tricks of the Ka-band phase shifter is outlined here. The whole design is targeted for future monolithic integration. So, the substrate of choice is High Resistive Silicon (ρ > 8kΩ-cm, tan δ =0.01 and ϵr =11.8. The overall circuit occupies an cross-sectional area of 20 × 5 mm2. The simulated results show that the phase shifter can provide nearly 11.25º/22.5º/45º phase shifts and their combinations at the expense of 1dB average insertion loss at 30 GHz for eight combinations. Practical fabrication process flow using surface micromachining is proposed here. Critical dimensions of the phased array structure is governed by the deign rules of the standard CMOS/MEMS foundry.

  7. Determining leach rates of monolithic waste forms

    International Nuclear Information System (INIS)

    Gilliam, T.M.; Dole, L.R.

    1986-01-01

    The ANS 16.1 Leach Procedure provides a conservative means of predicting long-term release from monolithic waste forms, offering a simple and relatively quick means of determining effective solid diffusion coefficients. As presented here, these coefficients can be used in a simple model to predict maximum release rates or be used in more complex site-specific models to predict actual site performance. For waste forms that pass the structural integrity test, this model also allows the prediction of EP-Tox leachate concentrations from these coefficients. Thus, the results of the ANS 16.1 Leach Procedure provide a powerful tool that can be used to predict the waste concentration limits in order to comply with the EP-Toxicity criteria for characteristically nonhazardous waste. 12 refs., 3 figs

  8. Monolithic fuel injector and related manufacturing method

    Science.gov (United States)

    Ziminsky, Willy Steve [Greenville, SC; Johnson, Thomas Edward [Greenville, SC; Lacy, Benjamin [Greenville, SC; York, William David [Greenville, SC; Stevenson, Christian Xavier [Greenville, SC

    2012-05-22

    A monolithic fuel injection head for a fuel nozzle includes a substantially hollow vesicle body formed with an upstream end face, a downstream end face and a peripheral wall extending therebetween, an internal baffle plate extending radially outwardly from a downstream end of the bore, terminating short of the peripheral wall, thereby defining upstream and downstream fuel plenums in the vesicle body, in fluid communication by way of a radial gap between the baffle plate and the peripheral wall. A plurality of integral pre-mix tubes extend axially through the upstream and downstream fuel plenums in the vesicle body and through the baffle plate, with at least one fuel injection hole extending between each of the pre-mix tubes and the upstream fuel plenum, thereby enabling fuel in the upstream plenum to be injected into the plurality of pre-mix tubes. The fuel injection head is formed by direct metal laser sintering.

  9. Integrated porous-silicon light-emitting diodes: A fabrication process using graded doping profiles

    International Nuclear Information System (INIS)

    Barillaro, G.; Diligenti, A.; Pieri, F.; Fuso, F.; Allegrini, M.

    2001-01-01

    A fabrication process, compatible with an industrial bipolar+complementary metal - oxide - semiconductor (MOS)+diffusion MOS technology, has been developed for the fabrication of efficient porous-silicon-based light-emitting diodes. The electrical contact is fabricated with a double n + /p doping, achieving a high current injection efficiency and thus lower biasing voltages. The anodization is performed as the last step of the process, thus reducing potential incompatibilities with industrial processes. The fabricated devices show yellow-orange electroluminescence, visible with the naked eye in room lighting. A spectral characterization of light emission is presented and briefly discussed. [copyright] 2001 American Institute of Physics

  10. A new soft dielectric silicone elastomer matrix with high mechanical integrity and low losses

    DEFF Research Database (Denmark)

    Madsen, Frederikke Bahrt; Yu, Liyun; Daugaard, Anders Egede

    2015-01-01

    Though dielectric elastomers (DEs) have many favourable properties, the issue of high driving voltages limits the commercial viability of the technology. Driving voltage can be lowered by decreasing the Young's modulus and increasing the dielectric permittivity of silicone elastomers. A decrease...... in Young's modulus, however, is often accompanied by the loss of mechanical stability and thereby the lifetime of the DE. A new soft elastomer matrix, with no loss of mechanical stability and high dielectric permittivity, was prepared through the use of alkyl chloride-functional siloxane copolymers...

  11. The SVX3D integrated circuit for dead-timeless silicon strip readout

    Energy Technology Data Exchange (ETDEWEB)

    Garcia-Sciveres, M. E-mail: mgs@lbl.gov; Milgrome, O.; Zimmerman, T.; Volobouev, I.; Ely, R.P.; Connolly, A.; Fish, D.; Affolder, T.; Sill, A

    1999-10-01

    The revision D of the SVX3 readout IC has been fabricated in the Honeywell radiation-hard 0.8 {mu}m bulk CMOS process, for instrumenting 712,704 silicon strips in the upgrade to the Collider Detector at Fermilab. This final revision incorporates new features and changes to the original architecture that were added to meet the goal of dead-timeless operation. This paper describes the features central to dead-timeless operation, and presents test data for un-irradiated and irradiated SVX3D chips. (author)

  12. Chemical silicon surface modification and bioreceptor attachment to develop competitive integrated photonic biosensors.

    Science.gov (United States)

    Escorihuela, Jorge; Bañuls, María José; García Castelló, Javier; Toccafondo, Veronica; García-Rupérez, Jaime; Puchades, Rosa; Maquieira, Ángel

    2012-12-01

    Methodology for the functionalization of silicon-based materials employed for the development of photonic label-free nanobiosensors is reported. The studied functionalization based on organosilane chemistry allowed the direct attachment of biomolecules in a single step, maintaining their bioavailability. Using this immobilization approach in probe microarrays, successful specific detection of bacterial DNA is achieved, reaching hybridization sensitivities of 10 pM. The utility of the immobilization approach for the functionalization of label-free nanobiosensors based on photonic crystals and ring resonators was demonstrated using bovine serum albumin (BSA)/anti-BSA as a model system.

  13. Investigation of Properties of Novel Silicon Pixel Assemblies Employing Thin n-in-p Sensors and 3D-Integration

    CERN Document Server

    Weigell, Philipp

    Until the end of the 2020 decade the LHC programme will be defining the high energy frontier of particle physics. During this time, three upgrade steps of the accelerator are currently planned to further increase the luminosity and energy reach. In the course of these upgrades the specifications of several parts of the current LHC detectors will be exceeded. Especially, the innermost tracking detectors are challenged by the increasing track densities and the radiation damage. This thesis focuses on the implications for the ATLAS experiment. Here, around 2021/2, after having collected an integrated luminosity of around 300/fb¹ , the silicon and gas detector components of the inner tracker will reach the end of their lifetime and will need to be replaced to ensure sufficient performance for continued running|especially if the luminosity is raised to about 5x10^35/(cm²s¹ ) as currently planned. An all silicon inner detector is foreseen to be installed. This upgrade demands cost-effective pixel assemblies with...

  14. Insertable B-Layer integration in the ATLAS experiment and development of future 3D silicon pixel sensors

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00371528; Røhne, Ole

    This work has two distinct objectives: the development of software for the integration of the Insertable B-Layer (IBL) in the ATLAS offline software framework and the study of the performance of 3D silicon sensors produced by SINTEF for future silicon pixel detectors. The former task consists in the implementation of the IBL byte stream converter. This offline tool performs the decoding of the binary-formatted data coming from the detector into information (e.g. hit position and Time over Threshold) that is stored in a format used in the reconstruction data flow. It also encodes the information extracted from simulations into a simulated IBL byte stream. The tool has been successfully used since the beginning of the LHC Run II data taking. The experimental work on SINTEF 3D sensors was performed in the framework of the development of pixel sensors for the next generation of tracking detectors. Preliminary tests on SINTEF 3D sensors showed that the majority of these devices suffers from high leakage currents, ...

  15. Integration of the End Cap TEC+ of the CMS Silicon Strip Tracker

    CERN Document Server

    Bremer, Richard; Feld, Lutz

    2008-01-01

    At the European Organization for Nuclear Research (CERN) ne ar Geneva the new proton-proton collider ring LHC and the experiments that will be operated a t this accelerator are currently being finalised. Among these experiments is the multi-purpose det ector CMS whose aim it is to discover and investigate new physical phenomena that might become ac cessible by virtue of the high center- of-mass energy and luminosity of the LHC. Two of the most inte nsively studied possibilities are the discovery of the Higgs Boson and of particles from the spectr um of supersymmetric extensions of the Standard Model. CMS is the first large experiment of high- energy particle physics whose inner tracking system is exclusively instrumented with silicon d etector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction poin t in 10–12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completi on of the end caps of the tracking system. The institute played a leading...

  16. Flip-chip bonded optoelectronic integration based on ultrathin silicon (UTSi) CMOS

    Science.gov (United States)

    Hong, Sunkwang; Ho, Tawei; Zhang, Liping; Sawchuk, Alexander A.

    2003-06-01

    We describe the design and test of flip-chip bonded optoelectronic CMOS devices based on Peregrine Semiconductor's 0.5 micron Ultra-Thin Silicon on sapphire (UTSi) technology. The UTSi process eliminates the substrate leakage that typically results in crosstalk and reduces parasitic capacitance to the substrate, providing many benefits compared to bulk silicon CMOS. The low-loss synthetic sapphire substrate is optically transparent and has a coefficient of thermal expansion suitable for flip-chip bonding of vertical cavity surface emitting lasers (VCSELs) and detectors. We have designed two different UTSi CMOS chips. One contains a flip-chip bonded 1 x 4 photodiode array, a receiver array, a double edge triggered D-flip flop-based 2047-pattern pseudo random bit stream (PRBS) generator and a quadrature-phase LC-voltage controlled oscillator (VCO). The other chip contains a flip-chip bonded 1 x 4 VCSEL array, a driver array based on high-speed low-voltage differential signals (LVDS) and a full-balanced differential LC-VCO. Each VCSEL driver and receiver has individual input and bias voltage adjustments. Each UTSi chip is mounted on different printed circuit boards (PCBs) which have holes with about 1 mm radius for optical output and input paths through the sapphire substrate. We discuss preliminary testing of these chips.

  17. Multimodal Electrothermal Silicon Microgrippers for Nanotube Manipulation

    DEFF Research Database (Denmark)

    Nordström Andersen, Karin; Petersen, Dirch Hjorth; Carlson, Kenneth

    2009-01-01

    Microgrippers that are able to manipulate nanoobjects reproducibly are key components in 3-D nanomanipulation systems. We present here a monolithic electrothermal microgripper prepared by silicon microfabrication, and demonstrate pick-and-place of an as-grown carbon nanotube from a 2-D array onto...

  18. Ion-implanted capacitively coupled silicon strip detectors with integrated polysilicon bias resistors processed on a 100 mm wafer

    International Nuclear Information System (INIS)

    Hietanen, I.; Lindgren, J.; Orava, R.; Tuuva, T.; Voutilainen, M.; Brenner, R.; Andersson, M.; Leinonen, K.; Ronkainen, H.

    1991-01-01

    Double-sided silicon strip detectors with integrated coupling capacitors and polysilicon resistors have been processed on a 100 mm wafer. A detector with an active area of 19x19 mm 2 was connected to LSI readout electronics and tested. The strip pitch of the detector is 25 μm on the p-side and 50 μm on the n-side. The readout pitch is 50 μm on both sides. The number of readout strips is 774 and the total number of strips is 1161. On the p-side a signal-to-noise of 35 has been measured using a 90 Sr β-source. The n-side has been studied using a laser. (orig.)

  19. 70 nm resolution in subsurface optical imaging of silicon integrated-circuits using pupil-function engineering

    Science.gov (United States)

    Serrels, K. A.; Ramsay, E.; Reid, D. T.

    2009-02-01

    We present experimental evidence for the resolution-enhancing effect of an annular pupil-plane aperture when performing nonlinear imaging in the vectorial-focusing regime through manipulation of the focal spot geometry. By acquiring two-photon optical beam-induced current images of a silicon integrated-circuit using solid-immersion-lens microscopy at 1550 nm we achieved 70 nm resolution. This result demonstrates a reduction in the minimum effective focal spot diameter of 36%. In addition, the annular-aperture-induced extension of the depth-of-focus causes an observable decrease in the depth contrast of the resulting image and we explain the origins of this using a simulation of the imaging process.

  20. Noise characterization of silicon strip detectors-comparison of sensors with and without integrated jfet source-follower.

    CERN Document Server

    Giacomini, Gabriele

    Noise is often the main factor limiting the performance of detector systems. In this work a detailed study of the noise contributions in different types of silicon microstrip sensors is carried on. We investigate three sensors with double-sided readout fabricated by different suppliers for the ALICE experiment at the CERN LHC, in addition to detectors including an integrated JFET Source-Follower as a first signal conditioning stage. The latter have been designed as an attempt at improving the performance when very long strips, obtained by gangling together several sensors, are required. After a description of the strip sensors and of their operation, the “static” characterization measurements performed on them (current and capacitance versus voltage and/or frequency) are illustrated and interpreted. Numerical device simulation has been employed as an aid in interpreting some of the measurement results. The commonly used models for expressing the noise of the detector-amplifier system in terms of its relev...

  1. Interface and integration of a silicon graphics UNIX computer with the Encore based SCE SONGS 2/3 simulator

    International Nuclear Information System (INIS)

    Olmos, J.; Lio, P.; Chan, K.S.

    1991-01-01

    The SONGS Unit 2/3 simulator was originally implemented in 1983 on a Master/Slave 32/7780 Encore MPX platform by the Singer-Link Company. In 1986, a 32/9780 MPX Encore computer was incorporated into the simulator computer system to provide the additional CPU processing needed to install the PACE plant monitoring system and to enable the upgrade of the NSSS Simulation to the advanced RETACT/STK models. Since the spring of 1990, the SCE SONGS Nuclear Training Division simulator technical staff, in cooperation with Micro Simulation Inc., has undertaken a project to integrate a Silicon Graphics UNIX based computer with the Encore MPX SONGS 2/3 simulation computer system. In this paper the authors review the objectives, advantages to be gained, software and hardware approaches utilized, and the results so far achieved by the authors' project

  2. Data Transmission and Thermo-Optic Tuning Performance of Dielectric-Loaded Plasmonic Structures Hetero-Integrated on a Silicon Chip

    DEFF Research Database (Denmark)

    Giannoulis, G.; Kalavrouziotis, D.; Apostolopoulos, D.

    2012-01-01

    We demonstrate experimental evidence of the data capture and the low-energy thermo-optic tuning credentials of dielectric-loaded plasmonic structures integrated on a silicon chip. We show 7-nm thermo-optical tuning of a plasmonic racetrack-resonator with less than 3.3 mW required electrical power...

  3. Silicon photonics fiber-to-the-home transceiver array based on transfer-printing-based integration of III-V photodetectors.

    Science.gov (United States)

    Zhang, Jing; De Groote, Andreas; Abbasi, Amin; Loi, Ruggero; O'Callaghan, James; Corbett, Brian; Trindade, António José; Bower, Christopher A; Roelkens, Gunther

    2017-06-26

    A 4-channel silicon photonics transceiver array for Point-to-Point (P2P) fiber-to-the-home (FTTH) optical networks at the central office (CO) side is demonstrated. A III-V O-band photodetector array was integrated onto the silicon photonic transmitter through transfer printing technology, showing a polarization-independent responsivity of 0.39 - 0.49 A/W in the O-band. The integrated PDs (30 × 40 μm 2 mesa) have a 3 dB bandwidth of 11.5 GHz at -3 V bias. Together with high-speed C-band silicon ring modulators whose bandwidth is up to 15 GHz, operation of the transceiver array at 10 Gbit/s is demonstrated. The use of transfer printing for the integration of the III-V photodetectors allows for an efficient use of III-V material and enables the scalable integration of III-V devices on silicon photonics wafers, thereby reducing their cost.

  4. Integrating a Silicon Solar Cell with a Triboelectric Nanogenerator via a Mutual Electrode for Harvesting Energy from Sunlight and Raindrops.

    Science.gov (United States)

    Liu, Yuqiang; Sun, Na; Liu, Jiawei; Wen, Zhen; Sun, Xuhui; Lee, Shuit-Tong; Sun, Baoquan

    2018-03-27

    Solar cells, as promising devices for converting light into electricity, have a dramatically reduced performance on rainy days. Here, an energy harvesting structure that integrates a solar cell and a triboelectric nanogenerator (TENG) device is built to realize power generation from both sunlight and raindrops. A heterojunction silicon (Si) solar cell is integrated with a TENG by a mutual electrode of a poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) film. Regarding the solar cell, imprinted PEDOT:PSS is used to reduce light reflection, which leads to an enhanced short-circuit current density. A single-electrode-mode water-drop TENG on the solar cell is built by combining imprinted polydimethylsiloxane (PDMS) as a triboelectric material combined with a PEDOT:PSS layer as an electrode. The increasing contact area between the imprinted PDMS and water drops greatly improves the output of the TENG with a peak short-circuit current of ∼33.0 nA and a peak open-circuit voltage of ∼2.14 V, respectively. The hybrid energy harvesting system integrated electrode configuration can combine the advantages of high current level of a solar cell and high voltage of a TENG device, promising an efficient approach to collect energy from the environment in different weather conditions.

  5. Low-power bacteriorhodopsin-silicon n-channel metal-oxide field-effect transistor photoreceiver.

    Science.gov (United States)

    Shin, Jonghyun; Bhattacharya, Pallab; Yuan, Hao-Chih; Ma, Zhenqiang; Váró, György

    2007-03-01

    A bacteriorhodopsin (bR)-silicon n-channel metal-oxide field-effect transistor (NMOSFET) monolithically integrated photoreceiver is demonstrated. The bR film is selectively formed on an external gate electrode of the transistor by electrophoretic deposition. A modified biasing circuit is incorporated, which helps to match the resistance of the bR film to the input impedance of the NMOSFET and to shift the operating point of the transistor to coincide with the maximum gain. The photoreceiver exhibits a responsivity of 4.7 mA/W.

  6. Roof-integrated amorphous silicon photovoltaic installation at the Institute for Micro-Technology; Installation photovoltaique IMT Neuchatel silicium amorphe integre dans toiture

    Energy Technology Data Exchange (ETDEWEB)

    Tscharner, R.; Shah, A.V.

    2003-07-01

    This final report for the Swiss Federal Office of Energy (SFOE) describes the 6.44 kW grid-connected photovoltaic (PV) power plant that has been in operation since 1996 at the Institute for Micro-Technology in Neuchatel, Switzerland. The PV plant, which features large-area, fully integrated modules using amorphous silicon cells was the first of its kind in Switzerland. Experience gained with the installation, which has been fully operational since its construction, as well as the power produced and efficiencies measured are presented and commented. The role of the installation as the forerunner of new, so-called 'micro-morph' thin-film solar cell technology developed at the institute is stressed. Technical details of the plant and its performance are given.

  7. New 'monolithic' templates and improved protocols for soft lithography and microchip fabrication

    International Nuclear Information System (INIS)

    Pallandre, Antoine; Pal, Debjani; Lambert, Bertrand de; Viovy, Jean-Louis; Fuetterer, Claus

    2006-01-01

    We report a new method for fast prototyping and fabrication of polydimethylsiloxane (PDMS) and plastic microfluidic chips. These methods share in common the preparation of monolithic masters which includes the fabrication of the planar support, the 'negative pattern' of the microchannels and the fluidic connectors. The monolithic templates are extremely robust compared to conventional ones made of silicon and SU-8, and easier to produce and cheaper than all-silicon or electroplated templates. In contrast to the above-mentioned methods, our process allows one to cast both micrometre- (e.g. the microchannel) and millimetre-sized structures (e.g. the fluidic connection to the outer world) in a single fabrication step. The 'monolithic template' strategy can be used to fabricate both elastomeric (e.g. poly(dimethyl siloxane (PDMS)) polyester thermoset masters and glassy polymeric (e.g. cyclic olefin copolymer (COC)) devices. In this study we also report on one step fabrication of elastomer chips and on surface modifications of the above mentioned monolithically fabricated masters in order to improve separation of the chip from the template

  8. Novel detectors for silicon based microdosimetry, their concepts and applications

    Science.gov (United States)

    Rosenfeld, Anatoly B.

    2016-02-01

    This paper presents an overview of the development of semiconductor microdosimetry and the most current (state-of-the-art) Silicon on Insulator (SOI) detectors for microdosimetry based mainly on research and development carried out at the Centre for Medical Radiation Physics (CMRP) at the University of Wollongong with collaborators over the last 18 years. In this paper every generation of CMRP SOI microdosimeters, including their fabrication, design, and electrical and charge collection characterisation are presented. A study of SOI microdosimeters in various radiation fields has demonstrated that under appropriate geometrical scaling, the response of SOI detectors with the well-known geometry of microscopically sensitive volumes will record the energy deposition spectra representative of tissue cells of an equivalent shape. This development of SOI detectors for microdosimetry with increased complexity has improved the definition of microscopic sensitive volume (SV), which is modelling the deposition of ionising energy in a biological cell, that are led from planar to 3D SOI detectors with an array of segmented microscopic 3D SVs. The monolithic ΔE-E silicon telescope, which is an alternative to the SOI silicon microdosimeter, is presented, and as an example, applications of SOI detectors and ΔE-E monolithic telescope for microdosimetery in proton therapy field and equivalent neutron dose measurements out of field are also presented. An SOI microdosimeter "bridge" with 3D SVs can derive the relative biological effectiveness (RBE) in 12C ion radiation therapy that matches the tissue equivalent proportional counter (TEPC) quite well, but with outstanding spatial resolution. The use of SOI technology in experimental microdosimetry offers simplicity (no gas system or HV supply), high spatial resolution, low cost, high count rates, and the possibility of integrating the system onto a single device with other types of detectors.

  9. Optical micro-cavities on silicon

    Science.gov (United States)

    Dai, Daoxin; Liu, Erhu; Tan, Ying

    2018-01-01

    Silicon-based optical microcavities are very popular for many applications because of the ultra-compact footprint, easy scalability, and functional versatility. In this paper we give a discussion about the challenges of the optical microcavities on silicon and also give a review of our recent work, including the following parts. First, a near-"perfect" high-order MRR optical filter with a box-like filtering response is realized by introducing bent directional couplers to have sufficient coupling between the access waveguide and the microrings. Second, an efficient thermally-tunable MRR-based optical filter with graphene transparent nano-heater is realized by introducing transparent graphene nanoheaters. Thirdly, a polarization-selective microring-based optical filter is realized to work with resonances for only one of TE and TM polarizations for the first time. Finally, a on-chip reconfigurable optical add-drop multiplexer for hybrid mode- /wavelength-division-multiplexing systems is realized for the first time by monolithically integrating a mode demultiplexer, four MRR optical switches, and a mode multiplexer.

  10. Radio frequency regenerative oscillations in monolithic high-Q/V heterostructured photonic crystal cavities

    International Nuclear Information System (INIS)

    Yang, Jinghui; Gu, Tingyi; Zheng, Jiangjun; Wei Wong, Chee; Yu, Mingbin; Lo, Guo-Qiang; Kwong, Dim-Lee

    2014-01-01

    We report temporal and spectral domain observation of regenerative oscillation in monolithic silicon heterostructured photonic crystals cavities with high quality factor to mode volume ratios (Q/V). The results are interpreted by nonlinear coupled mode theory (CMT) tracking the dynamics of photon, free carrier population, and temperature variations. We experimentally demonstrate effective tuning of the radio frequency tones by laser-cavity detuning and laser power levels, confirmed by the CMT simulations with sensitive input parameters

  11. On-chip photonic microsystem for optical signal processing based on silicon and silicon nitride platforms

    Science.gov (United States)

    Li, Yu; Li, Jiachen; Yu, Hongchen; Yu, Hai; Chen, Hongwei; Yang, Sigang; Chen, Minghua

    2018-04-01

    The explosive growth of data centers, cloud computing and various smart devices is limited by the current state of microelectronics, both in terms of speed and heat generation. Benefiting from the large bandwidth, promising low power consumption and passive calculation capability, experts believe that the integrated photonics-based signal processing and transmission technologies can break the bottleneck of microelectronics technology. In recent years, integrated photonics has become increasingly reliable and access to the advanced fabrication process has been offered by various foundries. In this paper, we review our recent works on the integrated optical signal processing system. We study three different kinds of on-chip signal processors and use these devices to build microsystems for the fields of microwave photonics, optical communications and spectrum sensing. The microwave photonics front receiver was demonstrated with a signal processing range of a full-band (L-band to W-band). A fully integrated microwave photonics transceiver without the on-chip laser was realized on silicon photonics covering the signal frequency of up 10 GHz. An all-optical orthogonal frequency division multiplexing (OFDM) de-multiplier was also demonstrated and used for an OFDM communication system with the rate of 64 Gbps. Finally, we show our work on the monolithic integrated spectrometer with a high resolution of about 20 pm at the central wavelength of 1550 nm. These proposed on-chip signal processing systems potential applications in the fields of radar, 5G wireless communication, wearable devices and optical access networks.

  12. High-Resolution Silicon-based Particle Sensor with Integrated Amplification, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — This SBIR Phase I project will deliver a breakthrough in particle-detection sensors, by integrating an amplifying junction as part of the detector topology. Focusing...

  13. Robust integration schemes for junction-based modulators in a 200mm CMOS compatible silicon photonic platform (Conference Presentation)

    Science.gov (United States)

    Szelag, Bertrand; Abraham, Alexis; Brision, Stéphane; Gindre, Paul; Blampey, Benjamin; Myko, André; Olivier, Segolene; Kopp, Christophe

    2017-05-01

    Silicon photonic is becoming a reality for next generation communication system addressing the increasing needs of HPC (High Performance Computing) systems and datacenters. CMOS compatible photonic platforms are developed in many foundries integrating passive and active devices. The use of existing and qualified microelectronics process guarantees cost efficient and mature photonic technologies. Meanwhile, photonic devices have their own fabrication constraints, not similar to those of cmos devices, which can affect their performances. In this paper, we are addressing the integration of PN junction Mach Zehnder modulator in a 200mm CMOS compatible photonic platform. Implantation based device characteristics are impacted by many process variations among which screening layer thickness, dopant diffusion, implantation mask overlay. CMOS devices are generally quite robust with respect to these processes thanks to dedicated design rules. For photonic devices, the situation is different since, most of the time, doped areas must be carefully located within waveguides and CMOS solutions like self-alignment to the gate cannot be applied. In this work, we present different robust integration solutions for junction-based modulators. A simulation setup has been built in order to optimize of the process conditions. It consist in a Mathlab interface coupling process and device electro-optic simulators in order to run many iterations. Illustrations of modulator characteristic variations with process parameters are done using this simulation setup. Parameters under study are, for instance, X and Y direction lithography shifts, screening oxide and slab thicknesses. A robust process and design approach leading to a pn junction Mach Zehnder modulator insensitive to lithography misalignment is then proposed. Simulation results are compared with experimental datas. Indeed, various modulators have been fabricated with different process conditions and integration schemes. Extensive

  14. Design of photonic phased array switches using nano electromechanical systems on silicon-on-insulator integration platform

    Science.gov (United States)

    Hussein, Ali Abdulsattar

    This thesis presents an introduction to the design and simulation of a novel class of integrated photonic phased array switch elements. The main objective is to use nano-electromechanical (NEMS) based phase shifters of cascaded under-etched slot nanowires that are compact in size and require a small amount of power to operate them. The structure of the switch elements is organized such that it brings the phase shifting elements to the exterior sides of the photonic circuits. The transition slot couplers, used to interconnect the phase shifters, are designed to enable biasing one of the silicon beams of each phase shifter from an electrode located at the side of the phase shifter. The other silicon beam of each phase shifter is biased through the rest of the silicon structure of the switch element, which is taken as a ground. Phased array switch elements ranging from 2x2 up to 8x8 multiple-inputs/multiple-outputs (MIMO) are conveniently designed within reasonable footprints native to the current fabrication technologies. Chapter one presents the general layout of the various designs of the switch elements and demonstrates their novel features. This demonstration will show how waveguide disturbances in the interconnecting network from conventional switch elements can be avoided by adopting an innovative design. Some possible applications for the designed switch elements of different sizes and topologies are indicated throughout the chapter. Chapter two presents the design of the multimode interference (MMI) couplers used in the switch elements as splitters, combiners and waveguide crossovers. Simulation data and design methodologies for the multimode couplers of interest are detailed in this chapter. Chapter three presents the design and analysis of the NEMS-operated phase shifters. Both simulations and numerical analysis are utilized in the design of a 0°-180° capable NEMS-operated phase shifter. Additionally, the response of some of the designed photonic phased

  15. Microspot-based ELISA in microfluidics: chemiluminescence and colorimetry detection using integrated thin-film hydrogenated amorphous silicon photodiodes.

    Science.gov (United States)

    Novo, Pedro; Prazeres, Duarte Miguel França; Chu, Virginia; Conde, João Pedro

    2011-12-07

    Microfluidic technology has the potential to decrease the time of analysis and the quantity of sample and reactants required in immunoassays, together with the potential of achieving high sensitivity, multiplexing, and portability. A lab-on-a-chip system was developed and optimized using optical and fluorescence microscopy. Primary antibodies are adsorbed onto the walls of a PDMS-based microchannel via microspotting. This probe antibody is then recognised using secondary FITC or HRP labelled antibodies responsible for providing fluorescence or chemiluminescent and colorimetric signals, respectively. The system incorporated a micron-sized thin-film hydrogenated amorphous silicon photodiode microfabricated on a glass substrate. The primary antibody spots in the PDMS-based microfluidic were precisely aligned with the photodiodes for the direct detection of the antibody-antigen molecular recognition reactions using chemiluminescence and colorimetry. The immunoassay takes ~30 min from assay to the integrated detection. The conditions for probe antibody microspotting and for the flow-through ELISA analysis in the microfluidic format with integrated detection were defined using antibody solutions with concentrations in the nM-μM range. Sequential colorimetric or chemiluminescence detection of specific antibody-antigen molecular recognition was quantitatively detected using the photodiode. Primary antibody surface densities down to 0.182 pmol cm(-2) were detected. Multiplex detection using different microspotted primary antibodies was demonstrated.

  16. A novel Silicon Photomultiplier with bulk integrated quench resistors: utilization in optical detection and tracking applications for particle physics

    Energy Technology Data Exchange (ETDEWEB)

    Petrovics, Stefan, E-mail: stp@hll.mpg.de [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Andricek, Ladislav [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Diehl, Inge; Hansen, Karsten [DESY, Notkestrasse 85, D-22607 Hamburg (Germany); Jendrysik, Christian [Infineon Technologies AG, Am Campeon 1-12, D-85579 Neubiberg (Germany); Krueger, Katja [DESY, Notkestrasse 85, D-22607 Hamburg (Germany); Lehmann, Raik; Ninkovic, Jelena [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Reckleben, Christian [DESY, Notkestrasse 85, D-22607 Hamburg (Germany); Richter, Rainer; Schaller, Gerhard; Schopper, Florian [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Sefkow, Felix [DESY, Notkestrasse 85, D-22607 Hamburg (Germany)

    2017-02-11

    Silicon Photomultipliers (SiPMs) are a promising candidate for replacing conventional photomultiplier tubes (PMTs) in many applications, thanks to ongoing developments and advances in their technology. Conventional SiPMs are generally an array of avalanche photo diodes, operated in Geiger mode and read out in parallel, thus leading to the necessity of a high ohmic quenching resistor. This resistor enables passive quenching and is usually located on top of the array, limiting the fill factor of the device. In this paper, a novel detector concept with a bulk integrated quenching resistor will be recapped. In addition, due to other advantages of this novel detector design, a new concept, in which these devices will be utilized as tracking detectors for particle physics applications will be introduced, as well as first simulation studies and experimental measurements of this new approach. - Highlights: • A novel SiPM concept with bulk integrated quenching resistor is shown. • First prototypes of these SiPMs as tracking detectors are proposed. • Simulations of the Geiger efficiency suggest feasible operations at low overbias. • First measurements of the electron detection efficiency show promising results. • Measurements are in good agreement with the simulations.

  17. Advancing the technology of monolithic CMOS detectors for use as x-ray imaging spectrometers

    Science.gov (United States)

    Kenter, Almus; Kraft, Ralph; Gauron, Thomas; Amato, Stephen

    2017-08-01

    The Smithsonian Astrophysical Observatory (SAO) in collaboration with SRI/Sarnoff has been engaged in a multi year effort to advance the technology of monolithic back-thinned CMOS detectors for use as X-ray imaging spectrometers. The long term goal of this campaign is to produce X-ray Active Pixel Sensor (APS) detectors with Fano limited performance over the 0.1-10keV band while incorporating the many benefits of CMOS technology. These benefits include: low power consumption, radiation "hardness", high levels of integration, and very high read rates. Such devices would be ideal for candidate post 2020 decadal missions such as LYNX and for smaller more immediate applications such as CubeX. Devices from a recent fabrication have been back-thinned, packaged and tested for soft X-ray response. These devices have 16μm pitch, 6 Transistor Pinned Photo Diode (6TPPD) pixels with ˜135μV/electron sensitivity and a highly parallel signal chain. These new detectors are fabricated on 10μm epitaxial silicon and have a 1k by 1k format. We present details of our camera design and device performance with particular emphasis on those aspects of interest to single photon counting X-ray astronomy. These features include read noise, X-ray spectral response and quantum efficiency.

  18. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    International Nuclear Information System (INIS)

    Ghoneim, M. T.; Hussain, M. M.

    2015-01-01

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures

  19. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    Science.gov (United States)

    Ghoneim, M. T.; Hussain, M. M.

    2015-08-01

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ˜260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  20. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    Energy Technology Data Exchange (ETDEWEB)

    Ghoneim, M. T.; Hussain, M. M., E-mail: muhammadmustafa.hussain@kaust.edu.sa [Integrated Nanotechnology Lab, Electrical Engineering, Computer Electrical Mathematical Science and Engineering Division, King Abdullah University of Science and Technology, Thuwal 23955-6900 (Saudi Arabia)

    2015-08-03

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  1. High-Responsivity Graphene-Boron Nitride Photodetector and Autocorrelator in a Silicon Photonic Integrated Circuit.

    Science.gov (United States)

    Shiue, Ren-Jye; Gao, Yuanda; Wang, Yifei; Peng, Cheng; Robertson, Alexander D; Efetov, Dmitri K; Assefa, Solomon; Koppens, Frank H L; Hone, James; Englund, Dirk

    2015-11-11

    Graphene and other two-dimensional (2D) materials have emerged as promising materials for broadband and ultrafast photodetection and optical modulation. These optoelectronic capabilities can augment complementary metal-oxide-semiconductor (CMOS) devices for high-speed and low-power optical interconnects. Here, we demonstrate an on-chip ultrafast photodetector based on a two-dimensional heterostructure consisting of high-quality graphene encapsulated in hexagonal boron nitride. Coupled to the optical mode of a silicon waveguide, this 2D heterostructure-based photodetector exhibits a maximum responsivity of 0.36 A/W and high-speed operation with a 3 dB cutoff at 42 GHz. From photocurrent measurements as a function of the top-gate and source-drain voltages, we conclude that the photoresponse is consistent with hot electron mediated effects. At moderate peak powers above 50 mW, we observe a saturating photocurrent consistent with the mechanisms of electron-phonon supercollision cooling. This nonlinear photoresponse enables optical on-chip autocorrelation measurements with picosecond-scale timing resolution and exceptionally low peak powers.

  2. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-08-05

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  3. Trends in heteroepitaxy of III-Vs on silicon for photonic and photovoltaic applications

    Science.gov (United States)

    Lourdudoss, Sebastian; Junesand, Carl; Kataria, Himanshu; Metaferia, Wondwosen; Omanakuttan, Giriprasanth; Sun, Yan-Ting; Wang, Zhechao; Olsson, Fredrik

    2017-02-01

    We present and compare the existing methods of heteroepitaxy of III-Vs on silicon and their trends. We focus on the epitaxial lateral overgrowth (ELOG) method as a means of achieving good quality III-Vs on silicon. Initially conducted primarily by near-equilibrium epitaxial methods such as liquid phase epitaxy and hydride vapour phase epitaxy, nowadays ELOG is being carried out even by non-equilibrium methods such as metal organic vapour phase epitaxy. In the ELOG method, the intermediate defective seed and the mask layers still exist between the laterally grown purer III-V layer and silicon. In a modified ELOG method called corrugated epitaxial lateral overgrowth (CELOG) method, it is possible to obtain direct interface between the III-V layer and silicon. In this presentation we exemplify some recent results obtained by these techniques. We assess the potentials of these methods along with the other existing methods for realizing truly monolithic photonic integration on silicon and III-V/Si heterojunction solar cells.

  4. A fast ADC system for silicon μstrips readout

    International Nuclear Information System (INIS)

    Inzani, P.; Pedrini, D.; Sala, S.

    1986-01-01

    A new fast ADC module has been designed. It is part of a large readout system for a high resolution vertex detector consisting of 12 silicon microstrip planes with more than 8000 channels. The module employs a set of monolithic gated integrators on input (LeCroy MIQ 401) multiplexed on a single 8 bit FADC (Thompson EFX8308). A built-in preprocessing, performed through look up tables, accomplishes equalization and reduction of the data and makes high level trigger feasible. As an additional feature, fast histogramming of all the channels in parallel has been made possible with an internal memory. Special care has been paid to realize a low cost and low power consumption system

  5. Silicon photonic dynamic optical channel leveler with external feedback loop.

    Science.gov (United States)

    Doylend, J K; Jessop, P E; Knights, A P

    2010-06-21

    We demonstrate a dynamic optical channel leveler composed of a variable optical attenuator (VOA) integrated monolithically with a defect-mediated photodiode in a silicon photonic waveguide device. An external feedback loop mimics an analog circuit such that the photodiode directly controls the VOA to provide blind channel leveling within +/-1 dB across a 7-10 dB dynamic range for wavelengths from 1530 nm to 1570 nm. The device consumes approximately 50 mW electrical power and occupies a 6 mm x 0.1 mm footprint per channel. Dynamic leveling is accomplished without tapping optical power from the output path to the photodiode and thus the loss penalty is minimized.

  6. Fabrication of an integrated ΔE-E-silicon detector by wafer bonding using cobalt disilicide

    International Nuclear Information System (INIS)

    Thungstroem, G.; Veldhuizen, E.J. van; Westerberg, L.; Norlin, L.-O.; Petersson, C.S.

    1997-01-01

    The problem concerning mechanical stability of thin self-supporting ΔE detector in a ΔE-E semiconductor detector telescope, has been solved by integrating both detectors into one unit. We show here a low-cost method to integrate the detectors by wafer bonding using cobalt disilicide. The ΔE-detector has a thickness of 6.5 μm and the E detector 290 μm with an area of 24.8 mm 2 . The system was characterized with secondary ion mass spectroscopy (SIMS), scanning electron microscopy (SEM), electrical measurement, particle measurement and two-dimensional electrical simulation. (orig.)

  7. Fabrication of an integrated {Delta}E-E-silicon detector by wafer bonding using cobalt disilicide

    Energy Technology Data Exchange (ETDEWEB)

    Thungstroem, G. [Mid-Sweden Univ., Sundsvall (Sweden). Dept. of Inf. Technol.]|[Royal Institute of Technology, Department of Electronics, Electrum 229, S-164 40 Kista (Sweden); Veldhuizen, E.J. van [Uppsala University, Department of Radiation Science, Box 535, S-751 21 Uppsala (Sweden); Westerberg, L. [Uppsala University, The Svedberg Laboratory, Box 533, S-751 21 Uppsala (Sweden); Norlin, L.-O. [Royal Institute of Technology, Department of Physics, Frescativaegen 24, S-104 05 Stockholm (Sweden); Petersson, C.S. [Royal Institute of Technology, Department of Electronics, Electrum 229, S-164 40 Kista (Sweden)

    1997-06-01

    The problem concerning mechanical stability of thin self-supporting {Delta}E detector in a {Delta}E-E semiconductor detector telescope, has been solved by integrating both detectors into one unit. We show here a low-cost method to integrate the detectors by wafer bonding using cobalt disilicide. The {Delta}E-detector has a thickness of 6.5 {mu}m and the E detector 290 {mu}m with an area of 24.8 mm{sup 2}. The system was characterized with secondary ion mass spectroscopy (SIMS), scanning electron microscopy (SEM), electrical measurement, particle measurement and two-dimensional electrical simulation. (orig.).

  8. Design and characterization of low-loss 2D grating couplers for silicon photonics integrated circuits

    Science.gov (United States)

    Lacava, C.; Carrol, L.; Bozzola, A.; Marchetti, R.; Minzioni, P.; Cristiani, I.; Fournier, M.; Bernabe, S.; Gerace, D.; Andreani, L. C.

    2016-03-01

    We present the characterization of Silicon-on-insulator (SOI) photonic-crystal based 2D grating-couplers (2D-GCs) fabricated by CEA-Leti in the frame of the FP7 Fabulous project, which is dedicated to the realization of devices and systems for low-cost and high-performance passives-optical-networks. On the analyzed samples different test structures are present, including 2D-GC connected to another 2D-GC by different waveguides (in a Mach-Zehnder like configuration), and 2D-GC connected to two separate 2D-GCs, so as to allow a complete assessment of different parameters. Measurements were carried out using a tunable laser source operating in the extended telecom bandwidth and a fiber-based polarization controlling system at the input of device-under-test. The measured data yielded an overall fiber-to-fiber loss of 7.5 dB for the structure composed by an input 2D-GC connected to two identical 2D-GCs. This value was obtained at the peak wavelength of the grating, and the 3-dB bandwidth of the 2D-GC was assessed to be 43 nm. Assuming that the waveguide losses are negligible, so as to make a worst-case analysis, the coupling efficiency of the single 2D-GC results to be equal to -3.75 dB, constituting, to the best of our knowledge, the lowest value ever reported for a fully CMOS compatible 2D-GC. It is worth noting that both the obtained values are in good agreement with those expected by the numerical simulations performed using full 3D analysis by Lumerical FDTD-solutions.

  9. Carbon nanotubes integrated in electrically insulated channels for lab-on-a-chip applications

    International Nuclear Information System (INIS)

    Mogensen, K B; Boggild, P; Kutter, J P; Gangloff, L; Teo, K B K; Milne, W I

    2009-01-01

    A fabrication process for monolithic integration of vertically aligned carbon nanotubes in electrically insulated microfluidic channels is presented. A 150 nm thick amorphous silicon layer could be used both for anodic bonding of a glass lid to hermetically seal the microfluidic glass channels and for de-charging of the wafer during plasma enhanced chemical vapor deposition of the carbon nanotubes. The possibility of operating the device with electroosmotic flow was shown by performing standard electrophoretic separations of 50 μM fluorescein and 50 μM 5-carboxyfluorescein in a 25 mm long column containing vertical aligned carbon nanotubes. This is the first demonstration of electroosmotic pumping and electrokinetic separations in microfluidic channels with a monolithically integrated carbon nanotube forest.

  10. Carbon nanotubes integrated in electrically insulated channels for lab-on-a-chip applications

    DEFF Research Database (Denmark)

    Mogensen, Klaus Bo; Gangloff, L.; Bøggild, Peter

    2009-01-01

    A fabrication process for monolithic integration of vertically aligned carbon nanotubes in electrically insulated microfluidic channels is presented. A 150 nm thick amorphous silicon layer could be used both for anodic bonding of a glass lid to hermetically seal the microfluidic glass channels...... and for de-charging of the wafer during plasma enhanced chemical vapor deposition of the carbon nanotubes. The possibility of operating the device with electroosmotic flow was shown by performing standard electrophoretic separations of 50 mu M fluorescein and 50 mu M 5-carboxyfluorescein in a 25 mm long...... column containing vertical aligned carbon nanotubes. This is the first demonstration of electroosmotic pumping and electrokinetic separations in microfluidic channels with a monolithically integrated carbon nanotube forest....

  11. Online analysis of oxygen inside silicon-glass microreactors with integrated optical sensors

    DEFF Research Database (Denmark)

    Ehgartner, Josef; Sulzer, Philipp; Burger, Tobias

    2016-01-01

    A powerful online analysis set-up for oxygen measurements within microfluidic devices is presented. It features integration of optical oxygen sensors into microreactors, which enables contactless, accurate and inexpensive readout using commercially available oxygen meters via luminescent lifetime...... monitoring of enzyme transformations, including d-alanine or d-phenylalanine oxidation by d-amino acid oxidase, and glucose oxidation by glucose oxidase....

  12. Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 6

    NARCIS (Netherlands)

    Roozeboom, F.; Narayanan, V.; Kakushima, K.; Timans, P.J.; Gusev, E.P.; Karim, Z.; Gendt, S. De

    2016-01-01

    The topics of this annual symposium continue to describe the evolution of traditional scaling in CMOS integrated circuit manufacturing (More Moore for short), combined with the opportunities from growing diversification and embedded functionality (More than Moore). Once again, the main objective was

  13. mm-Wave Wireless Communications based on Silicon Photonics Integrated Circuits

    DEFF Research Database (Denmark)

    Rommel, Simon; Heck, Martijn; Vegas Olmos, Juan José

    Hybrid photonic-wireless transmission schemes in the mm-wave frequency range are promising candidates to enable the multi-gigabit per second data communications required from wireless and mobile networks of the 5th and future generations. Photonic integration may pave the way to practical applica...

  14. The realization of an integrated Mach-Zehnder waveguide immunosensor in silicon technology

    NARCIS (Netherlands)

    Schipper, E.F.; Schipper, E.F.; Brugman, A.M.; Lechuga, L.M.; Lechuga, L.M.; Kooyman, R.P.H.; Greve, Jan; Dominguez, C.

    1997-01-01

    We describe the realization of a symmetric integrated channel waveguide Mach-Zehnder sensor which uses the evanescent field to detect small refractive-index changes (¿nmin ¿ 1 × 10¿4) near the guiding-layer surface. This guiding layer consists of ridge structures with a height of 3 nm and a width of

  15. Silicon Photonics Integrated Circuits for 5th Generation mm-Wave Wireless Communications

    DEFF Research Database (Denmark)

    Rommel, Simon; Vegas Olmos, Juan José; Tafur Monroy, Idelfonso

    Hybrid photonic-wireless transmission schemes in the mm-wave frequency are promising candidates to enable the multi-gigabit per second data communications required from wireless and mobile networks of the 5th and future generations. Photonic integration may pave the way to practical applicability...

  16. Integrated graphene based modulators enabled by interfacing plasmonic slot and silicon waveguides

    DEFF Research Database (Denmark)

    Xiao, Sanshui

    Graphene has offered a new paradigm for extremely fast and active optoelectronic devices due to its unique electronic and optical properties [1]. With the combination of high-index dielectric waveguides/resonators, several integrated graphene-based optical modulators have already been demonstrated...

  17. Recent progress in low-temperature-process monolithic three dimension technology

    Science.gov (United States)

    Yang, Chih-Chao; Hsieh, Tung-Ying; Huang, Wen-Hsien; Shen, Chang-Hong; Shieh, Jia-Min; Yeh, Wen-Kuan; Wu, Meng-Chyi

    2018-04-01

    Monolithic three-dimension (3D) integration is an ultimate alternative method of fabricating high density, high performance, and multi-functional integrated circuits. It offers the promise of being a new approach to increase system performance. How to manage the thermal impact of multi-tiered processes, such as dopant activation, source/drain silicidation, and channel formation, and to prevent the degradation of pre-existing devices/circuits become key challenges. In this paper, we provide updates on several important monolithic 3D works, particularly in sequentially stackable channels, and our recent achievements in monolithic 3D integrated circuit (3D-IC). These results indicate that the advanced 3D architecture with novel design tools enables ultrahigh-density stackable circuits to have superior performance and low power consumption for future artificial intelligence (AI) and internet of things (IoTs) application.

  18. Microfluidic devices and methods including porous polymer monoliths

    Science.gov (United States)

    Hatch, Anson V; Sommer, Gregory J; Singh, Anup K; Wang, Ying-Chih; Abhyankar, Vinay V

    2014-04-22

    Microfluidic devices and methods including porous polymer monoliths are described. Polymerization techniques may be used to generate porous polymer monoliths having pores defined by a liquid component of a fluid mixture. The fluid mixture may contain iniferters and the resulting porous polymer monolith may include surfaces terminated with iniferter species. Capture molecules may then be grafted to the monolith pores.

  19. Monolithic translucent BaMgAl10O17:Eu2+ phosphors for laser-driven solid state lighting

    Directory of Open Access Journals (Sweden)

    Clayton Cozzan

    2016-10-01

    Full Text Available With high power light emitting diodes and laser diodes being explored for white light generation and visible light communication, thermally robust encapsulation schemes for color-converting inorganic phosphors are essential. In the current work, the canonical blue-emitting phosphor, high purity Eu-doped BaMgAl10O17, has been prepared using microwave-assisted heating (25 min and densified into translucent ceramic phosphor monoliths using spark plasma sintering (30 min. The resulting translucent ceramic monoliths convert UV laser light to blue light with the same efficiency as the starting powder and provide superior thermal management in comparison with silicone encapsulation.

  20. Wide-band continuous-wave terahertz source with a vertically integrated photomixer

    Science.gov (United States)

    Peytavit, E.; Lampin, J.-F.; Hindle, F.; Yang, C.; Mouret, G.

    2009-10-01

    A transverse electromagnetic horn antenna is monolithically integrated with a low temperature grown GaAs vertical photodetector on a silicon substrate forming a vertically integrated photomixer. Continuous-wave terahertz radiation is generated at frequencies up to 3.5 THz with a power level reaching 20 nW around 3 THz. Microwave and material concepts allow both qualitative and quantitative explanations of the experimental results. The thin film microstrip line topology has been adapted for active devices by an Au-Au thermocompression layer transfer technique and seems to be a promising generic tool for a new generation of efficient terahertz devices.

  1. Detachable strong cation exchange monolith, integrated with capillary zone electrophoresis and coupled with pH gradient elution, produces improved sensitivity and numbers of peptide identifications during bottom-up analysis of complex proteomes.

    Science.gov (United States)

    Zhang, Zhenbin; Yan, Xiaojing; Sun, Liangliang; Zhu, Guijie; Dovichi, Norman J

    2015-04-21

    A detachable sulfonate-silica hybrid strong cation-exchange monolith was synthesized in a fused silica capillary, and used for solid phase extraction with online pH gradient elution during capillary zone electrophoresis-tandem mass spectrometry (CZE-MS/MS) proteomic analysis. Tryptic digests were prepared in 50 mM formic acid and loaded onto the strong cation-exchange monolith. Fractions were eluted using a series of buffers with lower concentration but higher pH values than the 50 mM formic acid background electrolyte. This combination of elution and background electrolytes results in both sample stacking and formation of a dynamic pH junction and allows use of relatively large elution buffer volumes while maintaining reasonable peak efficiency and resolution. A series of five pH bumps were applied to elute E. coli tryptic peptides from the monolith, followed by analysis using CZE coupled to an LTQ-Orbitrap Velos mass spectrometer; 799 protein groups and 3381 peptides were identified from 50 ng of the digest in a 2.5 h analysis, which approaches the identification rate for this organism that was obtained with an Orbitrap Fusion. We attribute the improved numbers of peptide and protein identifications to the efficient fractionation by the online pH gradient elution, which decreased the complexity of the sample in each elution step and improved the signal intensity of low abundance peptides. We also performed a comparative analysis using a nanoACQUITY UltraPerformance LCH system. Similar numbers of protein and peptide identifications were produced by the two methods. Protein identifications showed significant overlap between the two methods, whereas peptide identifications were complementary.

  2. Development of Hybrid and Monolithic Silicon Micropattern Detectors

    CERN Multimedia

    Beker, H; Snoeys, W; Campbell, M; Lemeilleur, F; Ropotar, I

    2002-01-01

    %RD-19 \\\\ \\\\ In a collaborative effort between particle physics institutes and microelectronics industry we are undertaking the development of true 2-dimensional semiconductor particle detectors with on-chip signal processing and information extraction: the so-called micropattern detector. This detector is able to cope in a robust way with high multiplicity events at high rates, while allowing for a longer detector lifetime under irradiation and a thinner sensitive depletion region. Therefore, it will be ideally suited for the complicated events in the LHC p-p collider experiments. Following a $^{\\prime}$stepping stone$^{\\prime}$ approach several telescopes of pixel planes, totalling now 600 cm$^{2}$ with \\(>\\)~1~M elements have been used in the WA97, NA50 and NA57 lead ion experiments. This new technology has facilitated the tracking considerably (see Fig.1). Not only Si but also GaAs and possibly diamond matrices can be connected to the readout matrix. Tests with GaAs pixel detectors with the RD-19 readout ...

  3. Monolithic Silicon Microbolometer Materials for Uncooled Infrared Detectors

    Science.gov (United States)

    2015-05-21

    2012 11/03/2012 2.00 3.00 Mingliang Zhang, D. Drabold. Comparison of the Kubo formula, the microscopic response method, and the Greenwood formula...structure with four layers.................................................. 37 Figure 2-12. (a) Cartoon and (b) graph of TLM pattern used to calculate ...film before and after annealing. This sample was used to calculate the average grain size and average stress. This film was prepared with 60 SCCM

  4. A Ferrite LTCC-Based Monolithic SIW Phased Antenna Array

    KAUST Repository

    Nafe, Ahmed

    2016-11-17

    In this work, we present a novel configuration for realizing monolithic SIW-based phased antenna arrays using Ferrite LTCC technology. Unlike the current common schemes for realizing SIW phased arrays that rely on surface-mount component (p-i-n diodes, etc) for controlling the phase of the individual antenna elements, here the phase is tuned by biasing of the ferrite filling of the SIW. This approach eliminates the need for mounting of any additional RF components and enables seamless monolithic integration of phase shifters and antennas in SIW technology. As a proof of concept, a two-element slotted SIW-based phased array is designed, fabricated and measured. The prototype exhibits a gain of 4.9 dBi at 13.2 GHz and a maximum E-plane beam-scanning of 28 degrees using external windings for biasing the phase shifters. Moreover, the array can achieve a maximum beam-scanning of 19 degrees when biased with small windings that are embedded in the package. This demonstration marks the first time a fully monolithic SIW-based phased array is realized in Ferrite LTCC technology and paves the way for future larger-size implementations.

  5. A Ferrite LTCC-Based Monolithic SIW Phased Antenna Array

    KAUST Repository

    Nafe, Ahmed A.; Ghaffar, Farhan A.; Farooqui, Muhammad Fahad; Shamim, Atif

    2016-01-01

    In this work, we present a novel configuration for realizing monolithic SIW-based phased antenna arrays using Ferrite LTCC technology. Unlike the current common schemes for realizing SIW phased arrays that rely on surface-mount component (p-i-n diodes, etc) for controlling the phase of the individual antenna elements, here the phase is tuned by biasing of the ferrite filling of the SIW. This approach eliminates the need for mounting of any additional RF components and enables seamless monolithic integration of phase shifters and antennas in SIW technology. As a proof of concept, a two-element slotted SIW-based phased array is designed, fabricated and measured. The prototype exhibits a gain of 4.9 dBi at 13.2 GHz and a maximum E-plane beam-scanning of 28 degrees using external windings for biasing the phase shifters. Moreover, the array can achieve a maximum beam-scanning of 19 degrees when biased with small windings that are embedded in the package. This demonstration marks the first time a fully monolithic SIW-based phased array is realized in Ferrite LTCC technology and paves the way for future larger-size implementations.

  6. Wafer-level integration of NiTi shape memory alloy on silicon using Au–Si eutectic bonding

    International Nuclear Information System (INIS)

    Gradin, Henrik; Bushra, Sobia; Braun, Stefan; Stemme, Göran; Van der Wijngaart, Wouter

    2013-01-01

    This paper reports on the wafer level integration of NiTi shape memory alloy (SMA) sheets with silicon substrates through Au–Si eutectic bonding. Different bond parameters, such as Au layer thicknesses and substrate surface treatments were evaluated. The amount of gold in the bond interface is the most important parameter to achieve a high bond yield; the amount can be determined by the barrier layers between the Au and Si or by the amount of Au deposition. Deposition of a gold layer of more than 1 μm thickness before bonding gives the most promising results. Through patterning of the SMA sheet and by limiting bonding to small areas, stresses created by the thermal mismatch between Si and NiTi are reduced. With a gold layer of 1 μm thickness and bond areas between 200 × 200 and 800 × 800 μm 2 a high bond strength and a yield above 90% is demonstrated. (paper)

  7. Design of a compact and integrated TM-rotated/TE-through polarization beam splitter for silicon-based slot waveguides.

    Science.gov (United States)

    Xu, Yin; Xiao, Jinbiao

    2016-01-20

    A compact and integrated TM-rotated/TE-through polarization beam splitter for silicon-based slot waveguides is proposed and characterized. For the input TM mode, it is first transferred into the cross strip waveguide using a tapered directional coupler (DC), and then efficiently rotated to the corresponding TE mode using an L-shaped bending polarization rotator (PR). Finally, the TE mode for slot waveguide at the output end is obtained with the help of a strip-to-slot mode converter. By contrast, for the input TE mode, it almost passes through the slot waveguide directly and outputs at the bar end with nearly neglected coupling due to a large mode mismatch. Moreover, an additional S-bend connecting the tapered DC and bending PR is used to enhance the performance. Results show that a total device length of 19.6 μm is achieved, where the crosstalk (CT) and polarization conversion loss are, respectively -26.09 and 0.54 dB, for the TM mode, and the CT and insertion loss are, respectively, -22.21 and 0.41 dB, for the TE mode, both at 1.55 μm. The optical bandwidth is approximately 50 nm with a CT<-20  dB. In addition, fabrication tolerances and field evolution are also presented.

  8. Gold nanostructure-integrated silica-on-silicon waveguide for the detection of antibiotics in milk and milk products

    Science.gov (United States)

    Ozhikandathil, Jayan; Badilescu, Simona; Packirisamy, Muthukumaran

    2012-10-01

    Antibiotics are extensively used in veterinary medicine for the treatment of infectious diseases. The use of antibiotics for the treatment of animals used for food production raised the concern of the public and a rapid screening method became necessary. A novel approach of detection of antibiotics in milk is reported in this work by using an immunoassay format and the Localized Surface Plasmon Resonance property of gold. An antibiotic from the penicillin family that is, ampicillin is used for testing. Gold nanostructures deposited on a glass substrate by a novel convective assembly method were heat-treated to form a nanoisland morphology. The Au nanostructures were functionalized and the corresponding antibody was absorbed from a solution. Solutions with known concentrations of antigen (antibiotics) were subsequently added and the spectral changes were monitored step by step. The Au LSPR band corresponding to the nano-island structure was found to be suitable for the detection of the antibody antigen interaction. The detection of the ampicillin was successfully demonstrated with the gold nano-islands deposited on glass substrate. This process was subsequently adapted for the integration of gold nanostructures on the silica-on-silicon waveguide for the purpose of detecting antibiotics.

  9. Integrated X-ray and charged particle active pixel CMOS sensor arrays using an epitaxial silicon sensitive region

    International Nuclear Information System (INIS)

    Kleinfelder, Stuart; Bichsel, Hans; Bieser, Fred; Matis, Howard S.; Rai, Gulshan; Retiere, Fabrice; Weiman, Howard; Yamamoto, Eugene

    2002-01-01

    Integrated CMOS Active Pixel Sensor (APS) arrays have been fabricated and tested using X-ray and electron sources. The 128 by 128 pixel arrays, designed in a standard 0.25 micron process, use a ∼10 micron epitaxial silicon layer as a deep detection region. The epitaxial layer has a much greater thickness than the surface features used by standard CMOS APS, leading to stronger signals and potentially better signal-to-noise ratio (SNR). On the other hand, minority carriers confined within the epitaxial region may diffuse to neighboring pixels, blur images and reduce peak signal intensity. But for low-rate, sparse-event images, centroid analysis of this diffusion may be used to increase position resolution. Careful trade-offs involving pixel size and sense-node area verses capacitance must be made to optimize overall performance. The prototype sensor arrays, therefore, include a range of different pixel designs, including different APS circuits and a range of different epitaxial layer contact structures. The fabricated arrays were tested with 1.5 GeV electrons and Fe-55 X-ray sources, yielding a measured noise of 13 electrons RMS and an SNR for single Fe-55 X-rays of greater than 38

  10. Microstructure factor and mechanical and electronic properties of hydrogenated amorphous and nanocrystalline silicon thin-films for microelectromechanical systems applications

    International Nuclear Information System (INIS)

    Mouro, J.; Gualdino, A.; Chu, V.; Conde, J. P.

    2013-01-01

    Thin-film silicon allows the fabrication of MEMS devices at low processing temperatures, compatible with monolithic integration in advanced electronic circuits, on large-area, low-cost, and flexible substrates. The most relevant thin-film properties for applications as MEMS structural layers are the deposition rate, electrical conductivity, and mechanical stress. In this work, n + -type doped hydrogenated amorphous and nanocrystalline silicon thin-films were deposited by RF-PECVD, and the influence of the hydrogen dilution in the reactive mixture, the RF-power coupled to the plasma, the substrate temperature, and the deposition pressure on the structural, electrical, and mechanical properties of the films was studied. Three different types of silicon films were identified, corresponding to three internal structures: (i) porous amorphous silicon, deposited at high rates and presenting tensile mechanical stress and low electrical conductivity, (ii) dense amorphous silicon, deposited at intermediate rates and presenting compressive mechanical stress and higher values of electrical conductivity, and (iii) nanocrystalline silicon, deposited at very low rates and presenting the highest compressive mechanical stress and electrical conductivity. These results show the combinations of electromechanical material properties available in silicon thin-films and thus allow the optimized selection of a thin silicon film for a given MEMS application. Four representative silicon thin-films were chosen to be used as structural material of electrostatically actuated MEMS microresonators fabricated by surface micromachining. The effect of the mechanical stress of the structural layer was observed to have a great impact on the device resonance frequency, quality factor, and actuation force

  11. Microstructure factor and mechanical and electronic properties of hydrogenated amorphous and nanocrystalline silicon thin-films for microelectromechanical systems applications

    Energy Technology Data Exchange (ETDEWEB)

    Mouro, J.; Gualdino, A.; Chu, V. [Instituto de Engenharia de Sistemas e Computadores – Microsistemas e Nanotecnologias (INESC-MN) and IN – Institute of Nanoscience and Nanotechnology, 1000-029 Lisbon (Portugal); Conde, J. P. [Instituto de Engenharia de Sistemas e Computadores – Microsistemas e Nanotecnologias (INESC-MN) and IN – Institute of Nanoscience and Nanotechnology, 1000-029 Lisbon (Portugal); Department of Bioengineering, Instituto Superior Técnico (IST), 1049-001 Lisbon (Portugal)

    2013-11-14

    Thin-film silicon allows the fabrication of MEMS devices at low processing temperatures, compatible with monolithic integration in advanced electronic circuits, on large-area, low-cost, and flexible substrates. The most relevant thin-film properties for applications as MEMS structural layers are the deposition rate, electrical conductivity, and mechanical stress. In this work, n{sup +}-type doped hydrogenated amorphous and nanocrystalline silicon thin-films were deposited by RF-PECVD, and the influence of the hydrogen dilution in the reactive mixture, the RF-power coupled to the plasma, the substrate temperature, and the deposition pressure on the structural, electrical, and mechanical properties of the films was studied. Three different types of silicon films were identified, corresponding to three internal structures: (i) porous amorphous silicon, deposited at high rates and presenting tensile mechanical stress and low electrical conductivity, (ii) dense amorphous silicon, deposited at intermediate rates and presenting compressive mechanical stress and higher values of electrical conductivity, and (iii) nanocrystalline silicon, deposited at very low rates and presenting the highest compressive mechanical stress and electrical conductivity. These results show the combinations of electromechanical material properties available in silicon thin-films and thus allow the optimized selection of a thin silicon film for a given MEMS application. Four representative silicon thin-films were chosen to be used as structural material of electrostatically actuated MEMS microresonators fabricated by surface micromachining. The effect of the mechanical stress of the structural layer was observed to have a great impact on the device resonance frequency, quality factor, and actuation force.

  12. Nonlinear silicon photonics

    Science.gov (United States)

    Borghi, M.; Castellan, C.; Signorini, S.; Trenti, A.; Pavesi, L.

    2017-09-01

    Silicon photonics is a technology based on fabricating integrated optical circuits by using the same paradigms as the dominant electronics industry. After twenty years of fervid development, silicon photonics is entering the market with low cost, high performance and mass-manufacturable optical devices. Until now, most silicon photonic devices have been based on linear optical effects, despite the many phenomenologies associated with nonlinear optics in both bulk materials and integrated waveguides. Silicon and silicon-based materials have strong optical nonlinearities which are enhanced in integrated devices by the small cross-section of the high-index contrast silicon waveguides or photonic crystals. Here the photons are made to strongly interact with the medium where they propagate. This is the central argument of nonlinear silicon photonics. It is the aim of this review to describe the state-of-the-art in the field. Starting from the basic nonlinearities in a silicon waveguide or in optical resonator geometries, many phenomena and applications are described—including frequency generation, frequency conversion, frequency-comb generation, supercontinuum generation, soliton formation, temporal imaging and time lensing, Raman lasing, and comb spectroscopy. Emerging quantum photonics applications, such as entangled photon sources, heralded single-photon sources and integrated quantum photonic circuits are also addressed at the end of this review.

  13. Silicon-based horizontal nanoplasmonic slot waveguides for on-chip integration.

    Science.gov (United States)

    Zhu, Shiyang; Liow, T Y; Lo, G Q; Kwong, D L

    2011-04-25

    Horizontal metal/insulator/Si/insulator/metal nanoplasmonic slot waveguide (PWG), which is inserted in a conventional Si wire waveguide, is fabricated using the standard Si-CMOS technology. A thin insulator between the metal and the Si core plays a key role: it not only increases the propagation distance as the theoretical prediction, but also prevents metal diffusion and/or metal-Si reaction. Cu-PWGs with the Si core width of ~134-21 nm and ~12-nm-thick SiO2 on each side exhibit a relatively low propagation loss of ~0.37-0.63 dB/µm around the telecommunication wavelength of 1550 nm, which is ~2.6 times smaller than the Al-counterparts. A simple tapered coupler can provide an effective coupling between the PWG and the conventional Si wire waveguide. The coupling efficiency as high as ~0.1-0.4 dB per facet is measured. The PWG allows a sharp bending. The pure bending loss of a Cu-PWG direct 90° bend is measured to be ~0.6-1.0 dB. These results indicate the potential for seamless integration of various functional nanoplasmonic devices in existing Si electronic photonic integrated circuits (Si-EPICs).

  14. Thin SiGe virtual substrates for Ge heterostructures integration on silicon

    International Nuclear Information System (INIS)

    Cecchi, S.; Chrastina, D.; Frigerio, J.; Isella, G.; Gatti, E.; Guzzi, M.; Müller Gubler, E.; Paul, D. J.

    2014-01-01

    The possibility to reduce the thickness of the SiGe virtual substrate, required for the integration of Ge heterostructures on Si, without heavily affecting the crystal quality is becoming fundamental in several applications. In this work, we present 1 μm thick Si 1−x Ge x buffers (with x > 0.7) having different designs which could be suitable for applications requiring a thin virtual substrate. The rationale is to reduce the lattice mismatch at the interface with the Si substrate by introducing composition steps and/or partial grading. The relatively low growth temperature (475 °C) makes this approach appealing for complementary metal-oxide-semiconductor integration. For all the investigated designs, a reduction of the threading dislocation density compared to constant composition Si 1−x Ge x layers was observed. The best buffer in terms of defects reduction was used as a virtual substrate for the deposition of a Ge/SiGe multiple quantum well structure. Room temperature optical absorption and photoluminescence analysis performed on nominally identical quantum wells grown on both a thick graded virtual substrate and the selected thin buffer demonstrates a comparable optical quality, confirming the effectiveness of the proposed approach

  15. Silicon based cryogenic platform for the integration of qubit and classical control chips

    Science.gov (United States)

    Leonhardt, T.; Hollmann, A.; Jirovec, D.; Neumann, R.; Klemt, B.; Kindel, S.; Kucharski, M.; Fischer, G.; Bougeard, D.; Bluhm, H.; Schreiber, L. R.

    Electrostatically confined electron-spin-qubits proved viable for quantum information processing. Yet their up-scaling not only demands improvement of physical qubits, but also the development and cryogenic integration of classical control hardware. Therefore, we created a platform to integrate quantum chips and classical electronics. These multilayer interposer chips incorporate passive circuit elements, high bandwidth coplanar wave guides and interconnects for electron spin resonant qubit control as well as low impedance DC microstrips reducing EM-crosstalk from AC to DC lines. We used the interposer for measurements of a Si/SiGe quantum dot at 30 mK. We also characterized a commercial voltage controlled oszillator (VCO) based on hetero-bipolar transistors. Tunable about 30 GHz it is ideal for electron spin resonant qubit control. Cooled from 300 to 4 K it exhibits a slightly increased output power and frequency, while the phase noise level is constant. The device remains functional up to magnetic fields of 6 T.

  16. Synthesis of highly integrated optical network based on microdisk-resonator add-drop filters in silicon-on-insulator technology

    Science.gov (United States)

    Kaźmierczak, Andrzej; Dortu, Fabian; Giannone, Domenico; Bogaerts, Wim; Drouard, Emmanuel; Rojo-Romeo, Pedro; Gaffiot, Frederic

    2009-10-01

    We analyze a highly compact optical add-drop filter topology based on a pair of microdisk resonators and a bus waveguide intersection. The filter is further assessed on an integrated optical 4×4 network for optical on-chip communication. The proposed network structure, as compact as 50×50 μm, is fabricated in a CMOS-compatible process on a silicon-on-insulator (SOI) substrate. Finally, the experimental results demonstrate the proper operation of the fabricated devices.

  17. Monitoring the performance of single and triple junction amorphous silicon modules in two building integrated photovoltaic (BIPV) installations

    International Nuclear Information System (INIS)

    Eke, Rustu; Senturk, Ali

    2013-01-01

    Highlights: • The first and the largest BIPV of Turkey were installed. • Single and triple junction amorphous module performances in BIPV applications are analyzed. • Total generated electricity of the BIPV system is measured as 103,702 kW h for 36 months of operation. • Annual energy rating is calculated as 856 kW h/kWp for a non-optimally oriented plant. • The PR of the system is found 0.74 and 0.81 for PV systems on towers and facade respectively. - Abstract: Mugla is located in south west Turkey at 37°13′N latitude and 28°36′E longitude with yearly sum of horizontal global irradiation exceeding 1700 kW h per square meter. Mugla has a Mediterranean Climate which is characterized by long, hot and dry summers with cool and wet winters. Mugla Sıtkı Kocman University is the largest “PV Park” in Turkey consisting of 100 kWp installed Photovoltaic Power Systems (PVPSs) with different PV applications. The 40 kWp building integrated photovoltaic (BIPV) system which is the first and largest in Turkey was installed on the façade and the two towers of the “Staff Block of the Education Faculty’s Building” of Mugla Sıtkı Kocman University in February 2008. Triple junction amorphous silicon photovoltaic modules are used on the façade and single junction amorphous silicon PV modules are used on the East and West towers of the building. In this paper, the 40 kWp BIPV system in Mugla, Turkey is presented, and its performance is evaluated. Energy rating (kW h/kWp energy yield), efficiencies and performance ratios of both applications are also evaluated for 36 months of operation. Daily, monthly and seasonal variations in performance parameters of the BIPV system in relation to solar data and meteorological parameters and outdoor performance of two reference modules (representing the modules on façade and towers) in a summer and a winter day are also investigated

  18. Mechanical integrity of a carbon nanotube/copper-based through-silicon via for 3D integrated circuits: a multi-scale modeling approach.

    Science.gov (United States)

    Awad, Ibrahim; Ladani, Leila

    2015-12-04

    Carbon nanotube (CNT)/copper (Cu) composite material is proposed to replace Cu-based through-silicon vias (TSVs) in micro-electronic packages. The proposed material is believed to offer extraordinary mechanical and electrical properties and the presence of CNTs in Cu is believed to overcome issues associated with miniaturization of Cu interconnects, such as electromigration. This study introduces a multi-scale modeling of the proposed TSV in order to evaluate its mechanical integrity under mechanical and thermo-mechanical loading conditions. Molecular dynamics (MD) simulation was used to determine CNT/Cu interface adhesion properties. A cohesive zone model (CZM) was found to be most appropriate to model the interface adhesion, and CZM parameters at the nanoscale were determined using MD simulation. CZM parameters were then used in the finite element analysis in order to understand the mechanical and thermo-mechanical behavior of composite TSV at micro-scale. From the results, CNT/Cu separation does not take place prior to plastic deformation of Cu in bending, and separation does not take place when standard thermal cycling is applied. Further investigation is recommended in order to alleviate the increased plastic deformation in Cu at the CNT/Cu interface in both loading conditions.

  19. Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

    Science.gov (United States)

    Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

    2017-01-01

    This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

  20. Investigation of properties of novel silicon pixel assemblies employing thin n-in-p sensors and 3D-integration

    International Nuclear Information System (INIS)

    Weigell, Philipp

    2013-01-01

    Until the end of the 2020 decade the LHC programme will be defining the high energy frontier of particle physics. During this time, three upgrade steps of the accelerator are currently planned to further increase the luminosity and energy reach. In the course of these upgrades the specifications of several parts of the current LHC detectors will be exceeded. Especially, the innermost tracking detectors are challenged by the increasing track densities and the radiation damage. This thesis focuses on the implications for the ATLAS experiment. Here, around 2021/2, after having collected an integrated luminosity of around 300 fb -1 , the silicon and gas detector components of the inner tracker will reach the end of their lifetime and will need to be replaced to ensure sufficient performance for continued running - especially if the luminosity is raised to about 5 x 10 35 cm -2 s -1 as currently planned. An all silicon inner detector is foreseen to be installed. This upgrade demands cost effective pixel assemblies with a minimal material budget, a larger active area fraction as compared to the current detectors, and a higher granularity. Furthermore, the assemblies must be able to withstand received fluences up to 2 . 10 16 n eq /cm 2 . A new pixel assembly concept answering the challenges posed by the high instantaneous luminosities is investigated in this thesis. It employs five novel technologies, namely n-in-p pixel sensors, thin pixel sensors, slim edges with or without implanted sensor sides, and 3D-integration incorporating a new interconnection technology, named Solid Liquid InterDiffusion (SLID) as well as Inter-Chip-Vias (ICVs). n-in-p sensors are cost-effective, since they only need patterned processing on one side. Their performance before and after irradiation is investigated and compared to results obtained with currently used n-in-n sensors. Reducing the thickness of the sensors lowers the amount of multiple scattering within the tracking system and leads