WorldWideScience

Sample records for silicon device fabrication

  1. Practical silicon Light emitting devices fabricated by standard IC technology

    International Nuclear Information System (INIS)

    Aharoni, H.; Monuko du Plessis; Snyman, L.W.

    2004-01-01

    Full Text:Research activities are described with regard to the development of a comprehensive approach for the practical realization of single crystal Silicon Light Emitting Devices (Si-LEDs). Several interesting suggestions for the fabrication of such devices were made in the literature but they were not adopted by the semiconductor industry because they involve non-standard fabrication schemes, requiring special production lines. Our work presents an alternative approach, proposed and realized in practice by us, permitting the fabrication of Si-LEDs using the standard conventional fully industrialized IC technology ''as is'' without any adaptation. It enables their fabrication in the same production lines of the presently existing IC industry. This means that Si-LEDs can now be fabricated simultaneously with other components, such as transistors, on the same silicon chip, using the same masks and processing procedures. The result is that the yield, reliability, and price of the above Si-LEDs are the same as the other Si devices integrated on the same chip. In this work some structural details of several practical Si-LED's designed by us, as well as experimental results describing their performance are presented. These Si-LED's were fabricated to our specifications utilizing standard CMOS/BiCMOS technology, a fact which comprises an achievement by itself. The structure of the Si-LED's, is designed according to specifications such as the required operating voltage, overall light output intensity, its dependence(linear, or non-linear) on the input signal (voltage or current), light generations location (bulk, or near-surface), the emission pattern and uniformity. Such structural design present a problem since the designer can not use any structural parameters (such as doping levels and junction depths for example) but only those which already exist in the production lines. Since the fabrication procedures in these lines are originally designed for processing of

  2. Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

    KAUST Repository

    Hussain, Muhammad Mustafa

    2013-05-30

    Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

  3. Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

    KAUST Repository

    Hussain, Muhammad Mustafa; Rojas, Jhonathan Prieto; Sevilla, Galo T.

    2013-01-01

    Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

  4. Design and Fabrication of Silicon-on-Silicon-Carbide Substrates and Power Devices for Space Applications

    Directory of Open Access Journals (Sweden)

    Gammon P.M.

    2017-01-01

    Full Text Available A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si wafer bonded to silicon carbide (SiC. This novel silicon-on-silicon-carbide (Si/SiC substrate solution promises to combine the benefits of silicon-on-insulator (SOI technology (i.e device confinement, radiation tolerance, high and low temperature performance with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance. Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.

  5. Flexible semi-transparent silicon (100) fabric with high-k/metal gate devices

    KAUST Repository

    Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

    2013-01-01

    (100) wafers and then released as continuous, mechanically flexible, optically semi-transparent and high thermal budget compatible silicon fabric with devices. This is the first ever demonstration with this set of materials which allows full degree

  6. Fabrication of a novel silicon single electron transistor for Si:P quantum computer devices

    International Nuclear Information System (INIS)

    Angus, S.J.; Smith, C.E.A.; Gauja, E.; Dzurak, A.S.; Clark, R.G.; Snider, G.L.

    2004-01-01

    Full text: Quantum computation relies on the successful measurement of quantum states. Single electron transistors (SETs) are known to be able to perform fast and sensitive charge measurements of solid state qubits. However, due to their sensitivity, SETs are also very susceptible to random charge fluctuations in a solid-state materials environment. In previous dc transport measurements, silicon-based SETs have demonstrated greater charge stability than A1/A1 2 O 3 SETs. We have designed and fabricated a novel silicon SET architecture for a comparison of the noise characteristics of silicon and aluminium based devices. The silicon SET described here is designed for controllable and reproducible low temperature operation. It is fabricated using a novel dual gate structure on a silicon-on-insulator substrate. A silicon quantum wire is formed in a 100nm thick high-resistivity superficial silicon layer using reactive ion etching. Carriers are induced in the silicon wire by a back gate in the silicon substrate. The tunnel barriers are created electrostatically, using lithographically defined metallic electrodes (∼40nm width). These tunnel barriers surround the surface of the quantum wire, thus producing excellent electrostatic confinement. This architecture provides independent control of tunnel barrier height and island occupancy, thus promising better control of Coulomb blockade oscillations than in previously investigated silicon SETs. The use of a near intrinsic silicon substrate offers compatibility with Si:P qubits in the longer term

  7. Thermal processing of strained silicon-on-insulator for atomically precise silicon device fabrication

    International Nuclear Information System (INIS)

    Lee, W.C.T.; Bishop, N.; Thompson, D.L.; Xue, K.; Scappucci, G.; Cederberg, J.G.; Gray, J.K.; Han, S.M.; Celler, G.K.; Carroll, M.S.; Simmons, M.Y.

    2013-01-01

    Highlights: ► Strained silicon-on-insulator (sSOI) samples were flash-annealed at high temperature under ultra-high vacuum conditions. ► The extend of surface strain relaxation depends on the annealing temperature with no strain relaxation observed below 1020 °C. ► A 2 × 1 reconstructed surface with low defect density can be achieved. ► The annealed sSOI surface shows enhanced step undulations due to the unique energetics caused by surface strain. - Abstract: We investigate the ability to reconstruct strained silicon-on-insulator (sSOI) substrates in ultra-high vacuum for use in atomic scale device fabrication. Characterisation of the starting sSOI substrate using μRaman shows an average tensile strain of 0.8%, with clear strain modulation in a crosshatch pattern across the surface. The surfaces were heated in ultra-high vacuum from temperatures of 900 °C to 1100 °C and subsequently imaged using scanning tunnelling microscopy (STM). The initial strain modulation on the surface is observed to promote silicon migration and the formation of crosshatched surface features whose height and pitch increases with increasing annealing temperature. STM images reveal alternating narrow straight S A steps and triangular wavy S B steps attributed to the spontaneous faceting of S B and preferential adatom attachment on S B under biaxial tensile strain. Raman spectroscopy shows that despite these high temperature anneals no strain relaxation of the substrate is observed up to temperatures of 1020 °C. Above 1100 °C, strain relaxation is evident but is confined to the surface.

  8. In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon

    Science.gov (United States)

    Tokel, Onur; Turnalı, Ahmet; Makey, Ghaith; Elahi, Parviz; ćolakoǧlu, Tahir; Ergeçen, Emre; Yavuz, Ã.-zgün; Hübner, René; Zolfaghari Borra, Mona; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F. Ã.-mer

    2017-10-01

    Silicon is an excellent material for microelectronics and integrated photonics1-3, with untapped potential for mid-infrared optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow the fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realized with techniques like reactive ion etching. Embedded optical elements7, electronic devices and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1-µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has an optical index different to that in unmodified parts, enabling the creation of numerous photonic devices. Optionally, these parts can be chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface—that is, `in-chip'—microstructures for microfluidic cooling of chips, vias, micro-electro-mechanical systems, photovoltaic applications and photonic devices that match or surpass corresponding state-of-the-art device performances.

  9. In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon.

    Science.gov (United States)

    Tokel, Onur; Turnali, Ahmet; Makey, Ghaith; Elahi, Parviz; Çolakoğlu, Tahir; Ergeçen, Emre; Yavuz, Özgün; Hübner, René; Borra, Mona Zolfaghari; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F Ömer

    2017-10-01

    Silicon is an excellent material for microelectronics and integrated photonics1-3 with untapped potential for mid-IR optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realised with techniques like reactive ion etching. Embedded optical elements, like in glass7, electronic devices, and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1 µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has a different optical index than unmodified parts, which enables numerous photonic devices. Optionally, these parts are chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface, i.e. , " in-chip" microstructures for microfluidic cooling of chips, vias, MEMS, photovoltaic applications and photonic devices that match or surpass the corresponding state-of-the-art device performances.

  10. Flexible semi-transparent silicon (100) fabric with high-k/metal gate devices

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-01-07

    Can we build a flexible and transparent truly high performance computer? High-k/metal gate stack based metal-oxide-semiconductor capacitor devices are monolithically fabricated on industry\\'s most widely used low-cost bulk single-crystalline silicon (100) wafers and then released as continuous, mechanically flexible, optically semi-transparent and high thermal budget compatible silicon fabric with devices. This is the first ever demonstration with this set of materials which allows full degree of freedom to fabricate nanoelectronics devices using state-of-the-art CMOS compatible processes and then to utilize them in an unprecedented way for wide deployment over nearly any kind of shape and architecture surfaces. Electrical characterization shows uncompromising performance of post release devices. Mechanical characterization shows extra-ordinary flexibility (minimum bending radius of 1 cm) making this generic process attractive to extend the horizon of flexible electronics for truly high performance computers. Schematic and photograph of flexible high-k/metal gate MOSCAPs showing high flexibility and C-V plot showing uncompromised performance. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Properties of CMOS devices and circuits fabricated on high-resistivity, detector-grade silicon

    International Nuclear Information System (INIS)

    Holland, S.

    1991-11-01

    A CMOS process that is compatible with silicon p-i-n radiation detectors has been developed and characterized. A total of twelve mask layers are used in the process. The NMOS device is formed in a retrograde well while the PMOS device is fabricated directly in the high-resistivity silicon. Isolation characteristics are similar to a standard foundary CMOS process. Circuit performance using 3 μm design rules has been evaluated. The measured propagation delay and power-delay product for a 51-stage ring oscillator was 1.5 ns and 43 fJ, respectively. Measurements on a simple cascode amplifier results in a gain-bandwidth product of 200 MHz at a bias current of 15 μA. The input-referred noise of the cascode amplifier is 20 nV/√Hz at 1 MHz

  12. Fabrication and optical characterization of light trapping silicon nanopore and nanoscrew devices

    International Nuclear Information System (INIS)

    Jin, Hyunjong; Logan Liu, G

    2012-01-01

    We have fabricated nanotextured Si substrates that exhibit controllable optical reflection intensities and colors. Si nanopore has a photon trapping nanostructure but has abrupt changes in the index of refraction displaying a darkened specular reflection. Nanoscrew Si shows graded refractive-index photon trapping structures that enable diffuse reflection to be as low as 2.2% over the visible wavelengths. By tuning the 3D nanoscale silicon structure, the optical reflection peak wavelength and intensity are changed in the wavelength range of 300–800 nm, making the surface have different reflectivity and apparent colors. The relation between the surface optical properties with the spatial features of the photon trapping nanostructures is examined. Integration of photon trapping structures with planar Si structure on the same substrate is also demonstrated. The tunable photon trapping silicon structures have potential applications in enhancing the performance of semiconductor photoelectric devices. (paper)

  13. Micro-fabricated silicon devices for advanced thermal management and integration of particle tracking detectors

    CERN Document Server

    Romagnoli, Giulia; Gambaro, Carla

    Since their first studies targeting the cooling of high-power computing chips, micro-channel devices are proven to provide a very efficient cooling system. In the last years micro-channel cooling has been successfully applied to the cooling of particle detectors at CERN. Thanks to their high thermal efficiency, they can guarantee a good heat sink for the cooling of silicon trackers, fundamental for the reduction of the radiation damage caused by the beam interactions. The radiation damage on the silicon detector is increasing with temperature and furthermore the detectors are producing heat that should be dissipated in the supporting structure. Micro-channels guarantee a distributed and uniform thermal exchange, thanks to the high flexibility of the micro-fabrication process that allows a large variety of channel designs. The thin nature of the micro-channels etched inside silicon wafers, is fulfilling the physics requirement of minimization of the material crossed by the particle beam. Furthermore micro-chan...

  14. Design Procedure and Fabrication of Reproducible Silicon Vernier Devices for High-Performance Refractive Index Sensing.

    Science.gov (United States)

    Troia, Benedetto; Khokhar, Ali Z; Nedeljkovic, Milos; Reynolds, Scott A; Hu, Youfang; Mashanovich, Goran Z; Passaro, Vittorio M N

    2015-06-10

    In this paper, we propose a generalized procedure for the design of integrated Vernier devices for high performance chemical and biochemical sensing. In particular, we demonstrate the accurate control of the most critical design and fabrication parameters of silicon-on-insulator cascade-coupled racetrack resonators operating in the second regime of the Vernier effect, around 1.55 μm. The experimental implementation of our design strategies has allowed a rigorous and reliable investigation of the influence of racetrack resonator and directional coupler dimensions as well as of waveguide process variability on the operation of Vernier devices. Figures of merit of our Vernier architectures have been measured experimentally, evidencing a high reproducibility and a very good agreement with the theoretical predictions, as also confirmed by relative errors even lower than 1%. Finally, a Vernier gain as high as 30.3, average insertion loss of 2.1 dB and extinction ratio up to 30 dB have been achieved.

  15. Device fabrication and transport measurements of FinFETs built with 28Si SOI wafers towards donor qubits in silicon

    Energy Technology Data Exchange (ETDEWEB)

    Lo, Cheuk Chi; Persaud, Arun; Dhuey, Scott; Olynick, Deirdre; Borondics, Ferenc; Martin, Michael C.; Bechtel, Hans A.; Bokor, Jeffrey; Schenkel, Thomas

    2009-06-10

    We report fabrication of transistors in a FinFET geometry using isotopically purified silicon-28 -on-insulator (28-SOI) substrates. Donor electron spin coherence in natural silicon is limited by spectral diffusion due to the residual 29Si nuclear spin bath, making isotopically enriched nuclear spin-free 28Si substrates a promising candidate for forming spin quantum bit devices. The FinFET architecture is fully compatible with single-ion implant detection for donor-based qubits, and the donor spin-state readout through electrical detection of spin resonance. We describe device processing steps and discuss results on electrical transport measurements at 0.3 K.

  16. All-silica nanofluidic devices for DNA-analysis fabricated by imprint of sol-gel silica with silicon stamp

    DEFF Research Database (Denmark)

    Mikkelsen, Morten Bo Lindholm; Letailleur, Alban A; Søndergård, Elin

    2011-01-01

    We present a simple and cheap method for fabrication of silica nanofluidic devices for single-molecule studies. By imprinting sol-gel materials with a multi-level stamp comprising micro- and nanofeatures, channels of different depth are produced in a single process step. Calcination of the imprin......We present a simple and cheap method for fabrication of silica nanofluidic devices for single-molecule studies. By imprinting sol-gel materials with a multi-level stamp comprising micro- and nanofeatures, channels of different depth are produced in a single process step. Calcination...... of the imprinted hybrid sol-gel material produces purely inorganic silica, which has very low autofluorescence and can be fusion bonded to a glass lid. Compared to top-down processing of fused silica or silicon substrates, imprint of sol-gel silica enables fabrication of high-quality nanofluidic devices without...

  17. Fabrication of wear-resistant silicon microprobe tips for high-speed surface roughness scanning devices

    Science.gov (United States)

    Wasisto, Hutomo Suryo; Yu, Feng; Doering, Lutz; Völlmeke, Stefan; Brand, Uwe; Bakin, Andrey; Waag, Andreas; Peiner, Erwin

    2015-05-01

    Silicon microprobe tips are fabricated and integrated with piezoresistive cantilever sensors for high-speed surface roughness scanning systems. The fabrication steps of the high-aspect-ratio silicon microprobe tips were started with photolithography and wet etching of potassium hydroxide (KOH) resulting in crystal-dependent micropyramids. Subsequently, thin conformal wear-resistant layer coating of aluminum oxide (Al2O3) was demonstrated on the backside of the piezoresistive cantilever free end using atomic layer deposition (ALD) method in a binary reaction sequence with a low thermal process and precursors of trimethyl aluminum and water. The deposited Al2O3 layer had a thickness of 14 nm. The captured atomic force microscopy (AFM) image exhibits a root mean square deviation of 0.65 nm confirming the deposited Al2O3 surface quality. Furthermore, vacuum-evaporated 30-nm/200-nm-thick Au/Cr layers were patterned by lift-off and served as an etch mask for Al2O3 wet etching and in ICP cryogenic dry etching. By using SF6/O2 plasma during inductively coupled plasma (ICP) cryogenic dry etching, micropillar tips were obtained. From the preliminary friction and wear data, the developed silicon cantilever sensor has been successfully used in 100 fast measurements of 5- mm-long standard artifact surface with a speed of 15 mm/s and forces of 60-100 μN. Moreover, the results yielded by the fabricated silicon cantilever sensor are in very good agreement with those of calibrated profilometer. These tactile sensors are targeted for use in high-aspect-ratio microform metrology.

  18. Silicon photonics fundamentals and devices

    CERN Document Server

    Deen, M Jamal

    2012-01-01

    The creation of affordable high speed optical communications using standard semiconductor manufacturing technology is a principal aim of silicon photonics research. This would involve replacing copper connections with optical fibres or waveguides, and electrons with photons. With applications such as telecommunications and information processing, light detection, spectroscopy, holography and robotics, silicon photonics has the potential to revolutionise electronic-only systems. Providing an overview of the physics, technology and device operation of photonic devices using exclusively silicon and related alloys, the book includes: * Basic Properties of Silicon * Quantum Wells, Wires, Dots and Superlattices * Absorption Processes in Semiconductors * Light Emitters in Silicon * Photodetectors , Photodiodes and Phototransistors * Raman Lasers including Raman Scattering * Guided Lightwaves * Planar Waveguide Devices * Fabrication Techniques and Material Systems Silicon Photonics: Fundamentals and Devices outlines ...

  19. Silicon fabric for multi-functional applications

    KAUST Repository

    Sevilla, Galo T.; Rojas, Jhonathan Prieto; Ahmed, Sally; Hussain, Aftab M.; Inayat, Salman Bin; Hussain, Muhammad Mustafa

    2013-01-01

    This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

  20. Silicon fabric for multi-functional applications

    KAUST Repository

    Sevilla, Galo T.

    2013-06-01

    This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

  1. Implantation damage in silicon devices

    International Nuclear Information System (INIS)

    Nicholas, K.H.

    1977-01-01

    Ion implantation, is an attractive technique for producing doped layers in silicon devices but the implantation process involves disruption of the lattice and defects are formed, which can degrade device properties. Methods of minimizing such damage are discussed and direct comparisons made between implantation and diffusion techniques in terms of defects in the final devices and the electrical performance of the devices. Defects are produced in the silicon lattice during implantation but they are annealed to form secondary defects even at room temperature. The annealing can be at a low temperature ( 0 C) when migration of defects in silicon in generally small, or at high temperature when they can grow well beyond the implanted region. The defect structures can be complicated by impurity atoms knocked into the silicon from surface layers by the implantation. Defects can also be produced within layers on top of the silicon and these can be very important in device fabrication. In addition to affecting the electrical properties of the final device, defects produced during fabrication may influence the chemical properties of the materials. The use of these properties to improve devices are discussed as well as the degradation they can cause. (author)

  2. Fabrication of amorphous silicon nanoribbons by atomic force microscope tip-induced local oxidation for thin film device applications

    International Nuclear Information System (INIS)

    Pichon, L; Rogel, R; Demami, F

    2010-01-01

    We demonstrate the feasibility of induced local oxidation of amorphous silicon by atomic force microscopy. The resulting local oxide is used as a mask for the elaboration of a thin film silicon resistor. A thin amorphous silicon layer deposited on a glass substrate is locally oxidized following narrow continuous lines. The corresponding oxide line is then used as a mask during plasma etching of the amorphous layer leading to the formation of a nanoribbon. Such an amorphous silicon nanoribbon is used for the fabrication of the resistor

  3. Transistors using crystalline silicon devices on glass

    Science.gov (United States)

    McCarthy, Anthony M.

    1995-01-01

    A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

  4. All-in-polymer injection molded device for single cell capture using multilevel silicon master fabrication

    DEFF Research Database (Denmark)

    Tanzi, S.; Larsen, S.T.; Matteucci, M.

    2012-01-01

    This work demonstrates a novel all-in-polymer device for single cell capture applicable for biological recordings. The chip is injection molded and comprises a "cornered" (non planar) aperture. It has been demonstrated how cornered apertures are straightforward to mold in PDMS [1,2]. In this stud...

  5. Silicone nanocomposite coatings for fabrics

    Science.gov (United States)

    Eberts, Kenneth (Inventor); Lee, Stein S. (Inventor); Singhal, Amit (Inventor); Ou, Runqing (Inventor)

    2011-01-01

    A silicone based coating for fabrics utilizing dual nanocomposite fillers providing enhanced mechanical and thermal properties to the silicone base. The first filler includes nanoclusters of polydimethylsiloxane (PDMS) and a metal oxide and a second filler of exfoliated clay nanoparticles. The coating is particularly suitable for inflatable fabrics used in several space, military, and consumer applications, including airbags, parachutes, rafts, boat sails, and inflatable shelters.

  6. Porous silicon carbide (SIC) semiconductor device

    Science.gov (United States)

    Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

    1996-01-01

    Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

  7. Movable MEMS Devices on Flexible Silicon

    KAUST Repository

    Ahmed, Sally

    2013-05-05

    Flexible electronics have gained great attention recently. Applications such as flexible displays, artificial skin and health monitoring devices are a few examples of this technology. Looking closely at the components of these devices, although MEMS actuators and sensors can play critical role to extend the application areas of flexible electronics, fabricating movable MEMS devices on flexible substrates is highly challenging. Therefore, this thesis reports a process for fabricating free standing and movable MEMS devices on flexible silicon substrates; MEMS flexure thermal actuators have been fabricated to illustrate the viability of the process. Flexure thermal actuators consist of two arms: a thin hot arm and a wide cold arm separated by a small air gap; the arms are anchored to the substrate from one end and connected to each other from the other end. The actuator design has been modified by adding etch holes in the anchors to suit the process of releasing a thin layer of silicon from the bulk silicon substrate. Selecting materials that are compatible with the release process was challenging. Moreover, difficulties were faced in the fabrication process development; for example, the structural layer of the devices was partially etched during silicon release although it was protected by aluminum oxide which is not attacked by the releasing gas . Furthermore, the thin arm of the thermal actuator was thinned during the fabrication process but optimizing the patterning and etching steps of the structural layer successfully solved this problem. Simulation was carried out to compare the performance of the original and the modified designs for the thermal actuators and to study stress and temperature distribution across a device. A fabricated thermal actuator with a 250 μm long hot arm and a 225 μm long cold arm separated by a 3 μm gap produced a deflection of 3 μm before silicon release, however, the fabrication process must be optimized to obtain fully functioning

  8. Fabrication, structural and electrical properties of (1 1 0) localized silicon-on-insulator devices

    International Nuclear Information System (INIS)

    Destefanis, V; Huguenin, J L; Samson, M P; Morand, Y; Arvet, C; Monfray, S; Skotnicki, T; Hartmann, J M; Delaye, V; Boulitreau, P; Brianceau, P; Gautier, P

    2010-01-01

    The aim being to fabricate (1 1 0) localized silicon-on-insulator (L-SOI) devices, we have first of all completed the Semicond. Sci. Technol. 23 105018 (2008) study of the differences between (1 1 0) and (1 0 0) surfaces in terms of (i) HCl etch kinetics and (ii) SiGe growth kinetics (with a chlorinated chemistry). The core layers of a L-SOI device are indeed obtained thanks to the in situ HCl etching (on patterned wafers) of the Si active areas followed by the selective epitaxial growth of a Si 0.7 Ge 0.3 /Si stack. Given that SiGe(1 1 0) layers grown at 650 °C in windows of patterned wafers are rough, we have first of all studied the 600 °C growth kinetics of SiGe(1 1 0). As expected, the SiGe growth rate decreases as the growth temperature decreases from 650 °C down to 600 °C (irrespective of the surface orientation). The SiGe(1 0 0) growth rate increases linearly with the germane mass flow. Meanwhile, the SiGe(1 1 0) growth rate increases in a sub-linear fashion and then saturates at much lower values than on (1 0 0). The Ge concentration x dependence on the F(GeH 4 )/F(SiH 2 Cl 2 ) mass flow ratio is parabolic on (1 0 0) and linear on (1 1 0), with lower values on the latter than on the former. We have then used those data to fabricate (1 0 0) and (1 1 0) L-SOI structures. The high HCl partial pressure recessing of the Si(1 1 0) and Si(1 0 0) active areas was performed at 675 °C and 725 °C, respectively. An increase of both the Si(1 1 0) HCl etch rate and the SiGe growth rate (be it at 650 °C on (1 0 0) or at 600 °C on (1 1 0)) was noticed when switching from blanket to patterned wafers (factors of 2.5–3 for HCI and 1.5 for SiGe). Finally, Si(1 1 0) growth times were multiplied by 4/3 compared to the Si(1 0 0) growth time in order to obtain similar thickness Si caps. Subsequent process steps were very similar on (1 0 0) and (1 1 0). Almost the same etch rates were

  9. Fabrication of detectors and transistors on high-resistivity silicon

    International Nuclear Information System (INIS)

    Holland, S.

    1988-06-01

    A new process for the fabrication of silicon p-i-n diode radiation detectors is described. The utilization of backside gettering in the fabrication process results in the actual physical removal of detrimental impurities from critical device regions. This reduces the sensitivity of detector properties to processing variables while yielding low diode reverse-leakage currents. In addition, gettering permits the use of processing temperatures compatible with integrated-circuit fabrication. P-channel MOSFETs and silicon p-i-n diodes have been fabricated simultaneously on 10 kΩ/centerreverse arrowdot/cm silicon using conventional integrated-circuit processing techniques. 25 refs., 5 figs

  10. Method of fabricating porous silicon carbide (SiC)

    Science.gov (United States)

    Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

    1995-01-01

    Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

  11. Flexible Thermoelectric Generators on Silicon Fabric

    KAUST Repository

    Sevilla, Galo T.

    2012-01-01

    In this work, the development of a Thermoelectric Generator on Flexible Silicon Fabric is explored to extend silicon electronics for flexible platforms. Low cost, easily deployable plastic based flexible electronics are of great interest for smart

  12. Towards neuromorphic electronics: Memristors on foldable silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-11-01

    The advantages associated with neuromorphic computation are rich areas of complex research. We address the fabrication challenge of building neuromorphic devices on structurally foldable platform with high integration density. We present a CMOS compatible fabrication process to demonstrate for the first time memristive devices fabricated on bulk monocrystalline silicon (100) which is next transformed into a flexible thin sheet of silicon fabric with all the pre-fabricated devices. This process preserves the ultra-high integration density advantage unachievable on other flexible substrates. In addition, the memristive devices are of the size of a motor neuron and the flexible/folded architectural form factor is critical to match brain cortex\\'s folded pattern for ultra-compact design.

  13. CMOS MEMS Fabrication Technologies and Devices

    Directory of Open Access Journals (Sweden)

    Hongwei Qu

    2016-01-01

    Full Text Available This paper reviews CMOS (complementary metal-oxide-semiconductor MEMS (micro-electro-mechanical systems fabrication technologies and enabled micro devices of various sensors and actuators. The technologies are classified based on the sequence of the fabrication of CMOS circuitry and MEMS elements, while SOI (silicon-on-insulator CMOS MEMS are introduced separately. Introduction of associated devices follows the description of the respective CMOS MEMS technologies. Due to the vast array of CMOS MEMS devices, this review focuses only on the most typical MEMS sensors and actuators including pressure sensors, inertial sensors, frequency reference devices and actuators utilizing different physics effects and the fabrication processes introduced. Moreover, the incorporation of MEMS and CMOS is limited to monolithic integration, meaning wafer-bonding-based stacking and other integration approaches, despite their advantages, are excluded from the discussion. Both competitive industrial products and state-of-the-art research results on CMOS MEMS are covered.

  14. Flexible Thermoelectric Generators on Silicon Fabric

    KAUST Repository

    Sevilla, Galo T.

    2012-11-01

    In this work, the development of a Thermoelectric Generator on Flexible Silicon Fabric is explored to extend silicon electronics for flexible platforms. Low cost, easily deployable plastic based flexible electronics are of great interest for smart textile, wearable electronics and many other exciting applications. However, low thermal budget processing and fundamentally limited electron mobility hinders its potential to be competitive with well established and highly developed silicon technology. The use of silicon in flexible electronics involve expensive and abrasive materials and processes. In this work, high performance flexible thermoelectric energy harvesters are demonstrated from low cost bulk silicon (100) wafers. The fabrication of the micro- harvesters was done using existing silicon processes on silicon (100) and then peeled them off from the original substrate leaving it for reuse. Peeled off silicon has 3.6% thickness of bulk silicon reducing the thermal loss significantly and generating nearly 30% more output power than unpeeled harvesters. The demonstrated generic batch processing shows a pragmatic way of peeling off a whole silicon circuitry after conventional fabrication on bulk silicon wafers for extremely deformable high performance integrated electronics. In summary, by using a novel, low cost process, this work has successfully integrated existing and highly developed fabrication techniques to introduce a flexible energy harvester for sustainable applications.

  15. Proton irradiation effects in silicon devices

    Energy Technology Data Exchange (ETDEWEB)

    Simoen, E; Vanhellemont, J; Alaerts, A [IMEC, Leuven (Belgium); and others

    1997-03-01

    Proton irradiation effects in silicon devices are studied for components fabricated in various substrates in order to reveal possible hardening effects. The degradation of p-n junction diodes increases in first order proportionally with the fluence, when submitted to 10 MeV proton irradiations in the range 5x10{sup 9} cm{sup -2} to 5x10{sup 11} cm{sup -2}. The damage coefficients for both p- and n-type Czochralski, Float-Zone and epitaxial wafers are reported. Charge-Coupled Devices fabricated in a 1.2 {mu}m CCD-CMOS technology are shown to be quite resistant to 59 MeV H{sup +} irradiations, irrespective of the substrate type. (author)

  16. Synthesis and properties of silicon nanowire devices

    Science.gov (United States)

    Byon, Kumhyo

    Silicon nanowire (SiNW) is a very attractive one-dimensional material for future nanoelectronic applications. Reliable control of key field effect transistor (FET) parameters such as conductance, mobility, threshold voltage and on/off ratio is crucial to the applications of SiNW to working logic devices and integrated circuits. In this thesis, we fabricated silicon nanowire field effect transistors (SiNW FETs) and studied the dependence of their electrical transport properties upon various parameters including SiNW growth conditions, post-growth doping, and contact annealing. From these studies, we found how different processes control important FET characteristics. Key accomplishments of this thesis include p-channel enhancement mode FETs, n-channel FETs by post-growth vapor doping and high performance ambipolar devices. In the first part of this work, single crystalline SiNWs were synthesized by thermal evaporation without gold catalysts. FETs were fabricated using both as-grown SiNWs and post-growth n-doped SiNWs. FET from p-type source materials behaves as a p-channel enhancement mode FET which is predominant in logic devices due to its fast operation and low power consumption. Using bismuth vapor, the as-grown SiNWs were doped into n-type materials. The majority carriers in SiNWs can therefore be controlled by proper choice of the vapor phase dopant species. Post-growth doping using vapor phase is applicable to other nanowire systems. In the second part, high performance ambipolar FETs were fabricated. A two step annealing process was used to control the Schottky barrier between SiNW and metal contacts in order to enhance device performance. Initial p-channel SiNW FETs were converted into ambipolar SiNW FETs after contact annealing. Furthermore, significant increases in both on/off ratio and channel mobilities were achieved after contact annealing. Promising device structures to implement ambipolar devices into large scale integrated circuits were proposed

  17. Fabrication of integrated metallic MEMS devices

    DEFF Research Database (Denmark)

    Yalcinkaya, Arda Deniz; Ravnkilde, Jan Tue; Hansen, Ole

    2002-01-01

    A simple and complementary metal oxide semiconductor (CMOS) compatible fabrication technique for microelectromechanical (MEMS) devices is presented. The fabrication technology makes use of electroplated metal layers. Among the fabricated devices, high quality factor microresonators are characteri......A simple and complementary metal oxide semiconductor (CMOS) compatible fabrication technique for microelectromechanical (MEMS) devices is presented. The fabrication technology makes use of electroplated metal layers. Among the fabricated devices, high quality factor microresonators...

  18. Fabrication of 3D Silicon Sensors

    Energy Technology Data Exchange (ETDEWEB)

    Kok, A.; Hansen, T.E.; Hansen, T.A.; Lietaer, N.; Summanwar, A.; /SINTEF, Oslo; Kenney, C.; Hasi, J.; /SLAC; Da Via, C.; /Manchester U.; Parker, S.I.; /Hawaii U.

    2012-06-06

    Silicon sensors with a three-dimensional (3-D) architecture, in which the n and p electrodes penetrate through the entire substrate, have many advantages over planar silicon sensors including radiation hardness, fast time response, active edge and dual readout capabilities. The fabrication of 3D sensors is however rather complex. In recent years, there have been worldwide activities on 3D fabrication. SINTEF in collaboration with Stanford Nanofabrication Facility have successfully fabricated the original (single sided double column type) 3D detectors in two prototype runs and the third run is now on-going. This paper reports the status of this fabrication work and the resulted yield. The work of other groups such as the development of double sided 3D detectors is also briefly reported.

  19. Fabrication of silicon molds for polymer optics

    DEFF Research Database (Denmark)

    Nilsson, Daniel; Jensen, Søren; Menon, Aric Kumaran

    2003-01-01

    A silicon mold used for structuring polymer microcavities for optical applications is fabricated, using a combination of DRIE (deep reactive ion etching) and anisotropic chemical wet etching with KOH + IPA. For polymer optical microcavities, low surface roughness and vertical sidewalls are often ...... and KOH + IPA etch have been optimized. To reduce stiction between the silicon mold and the polymers used for molding, the mold is coated with a teflon-like material using the DRIE system. Released polymer microstructures characterized with AFM and SEM are also presented....

  20. Symmetrical waveguide devices fabricated by direct UV writing

    DEFF Research Database (Denmark)

    Færch, Kjartan Ullitz; Svalgaard, Mikael

    2002-01-01

    Power splitters and directional couplers fabricated by direct UV writing in index matched silica-on-silicon samples can suffer from an asymmetrical device performance, even though the UV writing is carried out in a symmetrical fashion. This effect originates from a reduced photosensitivity...

  1. A radiation detector fabricated from silicon photodiode.

    Science.gov (United States)

    Yamamoto, H; Hatakeyama, S; Norimura, T; Tsuchiya, T

    1984-12-01

    A silicon photodiode is converted to a low energy charged particle radiation detector. The window thickness of the fabricated detector is evaluated to be 50 micrograms/cm2. The area of the depletion region is 13.2 mm2 and the depth of it is estimated to be about 100 microns. The energy resolution (FWHM) is 14.5 ke V for alpha-particles from 241Am and 2.5 ke V for conversion electrons from 109Cd, respectively.

  2. Silicon solid state devices and radiation detection

    CERN Document Server

    Leroy, Claude

    2012-01-01

    This book addresses the fundamental principles of interaction between radiation and matter, the principles of working and the operation of particle detectors based on silicon solid state devices. It covers a broad scope with respect to the fields of application of radiation detectors based on silicon solid state devices from low to high energy physics experiments including in outer space and in the medical environment. This book covers stateof- the-art detection techniques in the use of radiation detectors based on silicon solid state devices and their readout electronics, including the latest developments on pixelated silicon radiation detector and their application.

  3. Fabrication and Modification of Nanoporous Silicon Particles

    Science.gov (United States)

    Ferrari, Mauro; Liu, Xuewu

    2010-01-01

    Silicon-based nanoporous particles as biodegradable drug carriers are advantageous in permeation, controlled release, and targeting. The use of biodegradable nanoporous silicon and silicon dioxide, with proper surface treatments, allows sustained drug release within the target site over a period of days, or even weeks, due to selective surface coating. A variety of surface treatment protocols are available for silicon-based particles to be stabilized, functionalized, or modified as required. Coated polyethylene glycol (PEG) chains showed the effective depression of both plasma protein adsorption and cell attachment to the modified surfaces, as well as the advantage of long circulating. Porous silicon particles are micromachined by lithography. Compared to the synthesis route of the nanomaterials, the advantages include: (1) the capability to make different shapes, not only spherical particles but also square, rectangular, or ellipse cross sections, etc.; (2) the capability for very precise dimension control; (3) the capacity for porosity and pore profile control; and (4) allowance of complex surface modification. The particle patterns as small as 60 nm can be fabricated using the state-of-the-art photolithography. The pores in silicon can be fabricated by exposing the silicon in an HF/ethanol solution and then subjecting the pores to an electrical current. The size and shape of the pores inside silicon can be adjusted by the doping of the silicon, electrical current application, the composition of the electrolyte solution, and etching time. The surface of the silicon particles can be modified by many means to provide targeted delivery and on-site permanence for extended release. Multiple active agents can be co-loaded into the particles. Because the surface modification of particles can be done on wafers before the mechanical release, asymmetrical surface modification is feasible. Starting from silicon wafers, a treatment, such as KOH dipping or reactive ion

  4. From silicon to organic nanoparticle memory devices.

    Science.gov (United States)

    Tsoukalas, D

    2009-10-28

    After introducing the operational principle of nanoparticle memory devices, their current status in silicon technology is briefly presented in this work. The discussion then focuses on hybrid technologies, where silicon and organic materials have been combined together in a nanoparticle memory device, and finally concludes with the recent development of organic nanoparticle memories. The review is focused on the nanoparticle memory concept as an extension of the current flash memory device. Organic nanoparticle memories are at a very early stage of research and have not yet found applications. When this happens, it is expected that they will not directly compete with mature silicon technology but will find their own areas of application.

  5. CMOS compatible fabrication of flexible and semi-transparent FeRAM on ultra-thin bulk monocrystalline silicon (100) fabric

    KAUST Repository

    Ghoneim, Mohamed T.; Hanna, Amir; Hussain, Muhammad Mustafa

    2014-01-01

    Commercialization of flexible electronics requires reliable, high performance, ultra-compact and low power devices. To achieve them, we fabricate traditional electronics on bulk mono-crystalline silicon (100) and transform the top portion into an ultra-thin flexible silicon fabric with prefabricated devices, preserving ultra-large-scale-integration density and same device performance. This can be done in a cost effective manner due to its full compatibility with standard CMOS processes. In this paper, using the same approach, for the first time we demonstrate a ferroelectric random access memory (FeRAM) cell on flexible silicon fabric platform and assess its functionality and practical potential.

  6. CMOS compatible fabrication of flexible and semi-transparent FeRAM on ultra-thin bulk monocrystalline silicon (100) fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-08-01

    Commercialization of flexible electronics requires reliable, high performance, ultra-compact and low power devices. To achieve them, we fabricate traditional electronics on bulk mono-crystalline silicon (100) and transform the top portion into an ultra-thin flexible silicon fabric with prefabricated devices, preserving ultra-large-scale-integration density and same device performance. This can be done in a cost effective manner due to its full compatibility with standard CMOS processes. In this paper, using the same approach, for the first time we demonstrate a ferroelectric random access memory (FeRAM) cell on flexible silicon fabric platform and assess its functionality and practical potential.

  7. Silicon spintronics with ferromagnetic tunnel devices

    International Nuclear Information System (INIS)

    Jansen, R; Sharma, S; Dash, S P; Min, B C

    2012-01-01

    In silicon spintronics, the unique qualities of ferromagnetic materials are combined with those of silicon, aiming at creating an alternative, energy-efficient information technology in which digital data are represented by the orientation of the electron spin. Here we review the cornerstones of silicon spintronics, namely the creation, detection and manipulation of spin polarization in silicon. Ferromagnetic tunnel contacts are the key elements and provide a robust and viable approach to induce and probe spins in silicon, at room temperature. We describe the basic physics of spin tunneling into silicon, the spin-transport devices, the materials aspects and engineering of the magnetic tunnel contacts, and discuss important quantities such as the magnitude of the spin accumulation and the spin lifetime in the silicon. We highlight key experimental achievements and recent progress in the development of a spin-based information technology. (topical review)

  8. Nano-ridge fabrication by local oxidation of silicon edges with silicon nitride as a mask

    NARCIS (Netherlands)

    Haneveld, J.; Berenschot, Johan W.; Maury, P.A.; Jansen, Henricus V.

    2005-01-01

    A method to fabricate nano-ridges over a full wafer is presented. The fabrication method uses local oxidation of silicon, with silicon nitride as a mask, and wet anisotropic etching of silicon. The realized structures are 7-20 nm wide, 40-100 nm high and centimeters long. All dimensions are easily

  9. Silicon oxide nanoimprint stamp fabrication by edge lithography reinforced with silicon nitride

    NARCIS (Netherlands)

    Zhao, Yiping; Berenschot, Johan W.; de Boer, Meint J.; Jansen, Henricus V.; Tas, Niels Roelof; Huskens, Jurriaan; Elwenspoek, Michael Curt

    2007-01-01

    The fabrication of silicon oxide nanoimprint stamp employing edge lithography in combination with silicon nitride deposition is presented. The fabrication process is based on conventional photolithography an weg etching methods. Nanoridges with width dimension of sub-20 nm were fabricated by edge

  10. Fabrication of functional structures on thin silicon nitride membranes

    NARCIS (Netherlands)

    Ekkels, P.; Tjerkstra, R.W.; Krijnen, Gijsbertus J.M.; Berenschot, Johan W.; Brugger, J.P.; Elwenspoek, Michael Curt

    A process to fabricate functional polysilicon structures above large (4×4 mm2) thin (200 nm), very flat LPCVD silicon rich nitride membranes was developed. Key features of this fabrication process are the use of low-stress LPCVD silicon nitride, sacrificial layer etching, and minimization of

  11. Piezoresistive effect in top-down fabricated silicon nanowires

    DEFF Research Database (Denmark)

    Reck, Kasper; Richter, Jacob; Hansen, Ole

    2008-01-01

    We have designed and fabricated silicon test chips to investigate the piezoresistive properties of both crystalline and polycrystalline nanowires using a top-down approach, in order to comply with conventional fabrication techniques. The test chip consists of 5 silicon nanowires and a reference...

  12. Silicon Carbide Power Devices and Integrated Circuits

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan; Samsel, Isaak; LaBel, Ken; Chen, Yuan; Ikpe, Stanley; Wilcox, Ted; Phan, Anthony; Kim, Hak; Topper, Alyson

    2017-01-01

    An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

  13. Self-assembled peptide nanotubes as an etching material for the rapid fabrication of silicon wires

    DEFF Research Database (Denmark)

    Larsen, Martin Benjamin Barbour Spanget; Andersen, Karsten Brandt; Svendsen, Winnie Edith

    2011-01-01

    This study has evaluated self-assembled peptide nanotubes (PNTS) and nanowires (PNWS) as etching mask materials for the rapid and low-cost fabrication of silicon wires using reactive ion etching (RIE). The self-assembled peptide structures were fabricated under mild conditions and positioned on c...... characterization by SEM and I-V measurements. Additionally, the fabricated silicon structures were functionalized with fluorescent molecules via a biotin-streptavidin interaction in order to probe their potential in the development of biosensing devices....

  14. Neuron-inspired flexible memristive device on silicon (100)

    KAUST Repository

    Ghoneim, Mohamed T.

    2017-06-18

    Comprehensive understanding of the world\\'s most energy efficient powerful computer, the human brain, is an elusive scientific issue. Still, already gained knowledge indicates memristors can be used as a building block to model the brain. At the same time, brain cortex is folded allowing trillions of neurons to be integrated in a compact volume. Therefore, we report flexible aluminium oxide based memristive devices fabricated and then derived from widely used bulk mono-crystalline silicon (100). We use complementary metal oxide semiconductor based processes to layout the foundation for ultra large scale integration (ULSI) of such memory devices to advance the task of comprehending a physical model of human brain.

  15. Composite silicon nanostructure arrays fabricated on optical fibre by chemical etching of multicrystal silicon film

    International Nuclear Information System (INIS)

    Zuo, Zewen; Zhu, Kai; Ning, Lixin; Cui, Guanglei; Qu, Jun; Huang, Wanxia; Shi, Yi; Liu, Hong

    2015-01-01

    Integrating nanostructures onto optical fibers presents a promising strategy for developing new-fashioned devices and extending the scope of nanodevices’ applications. Here we report the first fabrication of a composite silicon nanostructure on an optical fiber. Through direct chemical etching using an H 2 O 2 /HF solution, multicrystal silicon films with columnar microstructures are etched into a vertically aligned, inverted-cone-like nanorod array embedded in a nanocone array. A faster dissolution rate of the silicon at the void-rich boundary regions between the columns is found to be responsible for the separation of the columns, and thus the formation of the nanostructure array. The morphology of the nanorods primarily depends on the microstructure of the columns in the film. Through controlling the microstructure of the as-grown film and the etching parameters, the structural control of the nanostructure is promising. This fabrication method can be extended to a larger length scale, and it even allows roll-to-roll processing. (paper)

  16. Composite silicon nanostructure arrays fabricated on optical fibre by chemical etching of multicrystal silicon film.

    Science.gov (United States)

    Zuo, Zewen; Zhu, Kai; Ning, Lixin; Cui, Guanglei; Qu, Jun; Huang, Wanxia; Shi, Yi; Liu, Hong

    2015-04-17

    Integrating nanostructures onto optical fibers presents a promising strategy for developing new-fashioned devices and extending the scope of nanodevices' applications. Here we report the first fabrication of a composite silicon nanostructure on an optical fiber. Through direct chemical etching using an H2O2/HF solution, multicrystal silicon films with columnar microstructures are etched into a vertically aligned, inverted-cone-like nanorod array embedded in a nanocone array. A faster dissolution rate of the silicon at the void-rich boundary regions between the columns is found to be responsible for the separation of the columns, and thus the formation of the nanostructure array. The morphology of the nanorods primarily depends on the microstructure of the columns in the film. Through controlling the microstructure of the as-grown film and the etching parameters, the structural control of the nanostructure is promising. This fabrication method can be extended to a larger length scale, and it even allows roll-to-roll processing.

  17. Design and characterization of ultra-stretchable monolithic silicon fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2014-10-13

    Stretchable electronic systems can play instrumental role for reconfigurable macro-electronics such as distributed sensor networks for wearable and bio-integrated electronics. Typically, polymer composite based materials and its deterministic design as interconnects are used to achieve such systems. Nonetheless, non-polymeric inorganic silicon is the predominant material for 90% of electronics. Therefore, we report the design and fabrication of an all silicon based network of hexagonal islands connected through spiral springs to form an ultra-stretchable arrangement for complete compliance to highly asymmetric shapes. Several design parameters are considered and their validation is carried out through finite element analysis. The fabrication process is based on conventional microfabrication techniques and the measured stretchability is more than 1000% for single spirals and area expansions as high as 30 folds in arrays. The reported method can provide ultra-stretchable and adaptable electronic systems for distributed network of high-performance macro-electronics especially useful for wearable electronics and bio-integrated devices.

  18. Design and characterization of ultra-stretchable monolithic silicon fabric

    KAUST Repository

    Rojas, Jhonathan Prieto; Carreno, Armando Arpys Arevalo; Foulds, I. G.; Hussain, Muhammad Mustafa

    2014-01-01

    Stretchable electronic systems can play instrumental role for reconfigurable macro-electronics such as distributed sensor networks for wearable and bio-integrated electronics. Typically, polymer composite based materials and its deterministic design as interconnects are used to achieve such systems. Nonetheless, non-polymeric inorganic silicon is the predominant material for 90% of electronics. Therefore, we report the design and fabrication of an all silicon based network of hexagonal islands connected through spiral springs to form an ultra-stretchable arrangement for complete compliance to highly asymmetric shapes. Several design parameters are considered and their validation is carried out through finite element analysis. The fabrication process is based on conventional microfabrication techniques and the measured stretchability is more than 1000% for single spirals and area expansions as high as 30 folds in arrays. The reported method can provide ultra-stretchable and adaptable electronic systems for distributed network of high-performance macro-electronics especially useful for wearable electronics and bio-integrated devices.

  19. Fabrication of a silicon oxide stamp by edge lithography reinforced with silicon nitride for nanoimprint lithography

    NARCIS (Netherlands)

    Zhao, Yiping; Berenschot, Johan W.; de Boer, M.; de Boer, Meint J.; Jansen, Henricus V.; Tas, Niels Roelof; Huskens, Jurriaan; Elwenspoek, Michael Curt

    2008-01-01

    The fabrication of a stamp reinforced with silicon nitride is presented for its use in nanoimprint lithography. The fabrication process is based on edge lithography using conventional optical lithography and wet anisotropic etching of 110 silicon wafers. SiO2 nano-ridges of 20 nm in width were

  20. Silicon Nano-Photonic Devices

    DEFF Research Database (Denmark)

    Pu, Minhao

    with the couplers, a silicon ridge waveguide is utilized in nonlinear all-optical signal processing for optical time division multiplexing (OTDM) systems. Record ultra-highspeed error-free optical demultiplexing and waveform sampling are realized and demonstrated for the rst time. Microwave phase shifters and notch...... lters based on tunable microring resonators are proposed and analyzed. Based on a single microring resonator, a maximum radio frequency (RF) phase shift of 336degrees is obtained, but with large power variation. By utilizing a dual-microring resonator, a RF phase shifting range larger than 2pi...

  1. Al transmon qubits on silicon-on-insulator for quantum device integration

    Science.gov (United States)

    Keller, Andrew J.; Dieterle, Paul B.; Fang, Michael; Berger, Brett; Fink, Johannes M.; Painter, Oskar

    2017-07-01

    We present the fabrication and characterization of an aluminum transmon qubit on a silicon-on-insulator substrate. Key to the qubit fabrication is the use of an anhydrous hydrofluoric vapor process which selectively removes the lossy silicon oxide buried underneath the silicon device layer. For a 5.6 GHz qubit measured dispersively by a 7.1 GHz resonator, we find T1 = 3.5 μs and T2* = 2.2 μs. This process in principle permits the co-fabrication of silicon photonic and mechanical elements, providing a route towards chip-scale integration of electro-opto-mechanical transducers for quantum networking of superconducting microwave quantum circuits. The additional processing steps are compatible with established fabrication techniques for aluminum transmon qubits on silicon.

  2. Noise and degradation of amorphous silicon devices

    NARCIS (Netherlands)

    Bakker, J.P.R.

    2003-01-01

    Electrical noise measurements are reported on two devices of the disordered semiconductor hydrogenated amorphous silicon (a-Si:H). The material is applied in sandwich structures and in thin-film transistors (TFTs). In a sandwich configuration of an intrinsic layer and two thin doped layers, the

  3. Silicon photonics design from devices to systems

    CERN Document Server

    Chrostowski, Lukas

    2015-01-01

    From design and simulation through to testing and fabrication, this hands-on introduction to silicon photonics engineering equips students with everything they need to begin creating foundry-ready designs. In-depth discussion of real-world issues and fabrication challenges ensures that students are fully equipped for careers in industry. Step-by-step tutorials, straightforward examples, and illustrative source code fragments guide students through every aspect of the design process, providing a practical framework for developing and refining key skills. Offering industry-ready expertise, the text supports existing PDKs for CMOS UV-lithography foundry services (OpSIS, ePIXfab, imec, LETI, IME and CMC) and the development of new kits for proprietary processes and clean-room based research. Accompanied by additional online resources to support students, this is the perfect learning package for senior undergraduate and graduate students studying silicon photonics design, and academic and industrial researchers in...

  4. Porous Microfluidic Devices - Fabrication adn Applications

    NARCIS (Netherlands)

    de Jong, J.; Geerken, M.J.; Lammertink, Rob G.H.; Wessling, Matthias

    2007-01-01

    The major part of microfluidic devices nowadays consists of a dense material that defines the fluidic structure. A generic fabrication method enabling the production of completely porous micro devices with user-defined channel networks is developed. The channel walls can be used as a (selective)

  5. Nanoscale phosphorus atom arrays created using STM for the fabrication of a silicon based quantum computer.

    Energy Technology Data Exchange (ETDEWEB)

    O' Brien, J. L. (Jeremy L.); Schofield, S. R. (Steven R.); Simmons, M. Y. (Michelle Y.); Clark, R. G. (Robert G.); Dzurak, A. S. (Andrew S.); Curson, N. J. (Neil J.); Kane, B. E. (Bruce E.); McAlpine, N. S. (Neal S.); Hawley, M. E. (Marilyn E.); Brown, G. W. (Geoffrey W.)

    2001-01-01

    Quantum computers offer the promise of formidable computational power for certain tasks. Of the various possible physical implementations of such a device, silicon based architectures are attractive for their scalability and ease of integration with existing silicon technology. These designs use either the electron or nuclear spin state of single donor atoms to store quantum information. Here we describe a strategy to fabricate an array of single phosphorus atoms in silicon for the construction of such a silicon based quantum computer. We demonstrate the controlled placement of single phosphorus bearing molecules on a silicon surface. This has been achieved by patterning a hydrogen mono-layer 'resist' with a scanning tunneling microscope (STM) tip and exposing the patterned surface to phosphine (PH3) molecules. We also describe preliminary studies into a process to incorporate these surface phosphorus atoms into the silicon crystal at the array sites. Keywords: Quantum computing, nanotechriology scanning turincling microscopy, hydrogen lithography

  6. Device fabrication by plasma etching

    International Nuclear Information System (INIS)

    Mogab, C.J.

    1980-01-01

    Plasma etching as applied to many of the materials encountered in the fabrication of LSI's is complicated by loading effect-the dependence of etch rate on the integrated surface area to be etched. This problem is alleviated by appropriate choice of etchant and etching conditions. Appropriate choice of system parameters, generally most concerned with the inherent lifetime of etchant species, may also result in improvement of etch rate uniformity on a wafer-by-wafer basis

  7. Fabrication of Optical Fiber Devices

    Science.gov (United States)

    Andres, Miguel V.

    In this paper we present the main research activities of the Laboratorio de Fibras Opticas del Instituto de Ciencia de los Materiales de la Universidad de Valencia. We show some of the main results obtained for devices based on tapered fibers, fiber Bragg gratings, acousto-optic effects and photonic crystal fibers.

  8. Dopant atoms as quantum components in silicon nanoscale devices

    Science.gov (United States)

    Zhao, Xiaosong; Han, Weihua; Wang, Hao; Ma, Liuhong; Li, Xiaoming; Zhang, Wang; Yan, Wei; Yang, Fuhua

    2018-06-01

    Recent progress in nanoscale fabrication allows many fundamental studies of the few dopant atoms in various semiconductor nanostructures. Since the size of nanoscale devices has touched the limit of the nature, a single dopant atom may dominate the performance of the device. Besides, the quantum computing considered as a future choice beyond Moore's law also utilizes dopant atoms as functional units. Therefore, the dopant atoms will play a significant role in the future novel nanoscale devices. This review focuses on the study of few dopant atoms as quantum components in silicon nanoscale device. The control of the number of dopant atoms and unique quantum transport characteristics induced by dopant atoms are presented. It can be predicted that the development of nanoelectronics based on dopant atoms will pave the way for new possibilities in quantum electronics. Project supported by National Key R&D Program of China (No. 2016YFA0200503).

  9. Integrated porous-silicon light-emitting diodes: A fabrication process using graded doping profiles

    International Nuclear Information System (INIS)

    Barillaro, G.; Diligenti, A.; Pieri, F.; Fuso, F.; Allegrini, M.

    2001-01-01

    A fabrication process, compatible with an industrial bipolar+complementary metal - oxide - semiconductor (MOS)+diffusion MOS technology, has been developed for the fabrication of efficient porous-silicon-based light-emitting diodes. The electrical contact is fabricated with a double n + /p doping, achieving a high current injection efficiency and thus lower biasing voltages. The anodization is performed as the last step of the process, thus reducing potential incompatibilities with industrial processes. The fabricated devices show yellow-orange electroluminescence, visible with the naked eye in room lighting. A spectral characterization of light emission is presented and briefly discussed. [copyright] 2001 American Institute of Physics

  10. Comparison of silicon pin diode detector fabrication processes using ion implantation and thermal doping

    International Nuclear Information System (INIS)

    Zhou, C.Z.; Warburton, W.K.

    1996-01-01

    Two processes for the fabrication of silicon p-i-n diode radiation detectors are described and compared. Both processes are compatible with conventional integrated-circuit fabrication techniques and yield very low leakage currents. Devices made from the process using boron thermal doping have about a factor of 2 lower leakage current than those using boron ion implantation. However, the boron thermal doping process requires additional process steps to remove boron skins. (orig.)

  11. Conformal coating of amorphous silicon and germanium by high pressure chemical vapor deposition for photovoltaic fabrics

    Science.gov (United States)

    Ji, Xiaoyu; Cheng, Hiu Yan; Grede, Alex J.; Molina, Alex; Talreja, Disha; Mohney, Suzanne E.; Giebink, Noel C.; Badding, John V.; Gopalan, Venkatraman

    2018-04-01

    Conformally coating textured, high surface area substrates with high quality semiconductors is challenging. Here, we show that a high pressure chemical vapor deposition process can be employed to conformally coat the individual fibers of several types of flexible fabrics (cotton, carbon, steel) with electronically or optoelectronically active materials. The high pressure (˜30 MPa) significantly increases the deposition rate at low temperatures. As a result, it becomes possible to deposit technologically important hydrogenated amorphous silicon (a-Si:H) from silane by a simple and very practical pyrolysis process without the use of plasma, photochemical, hot-wire, or other forms of activation. By confining gas phase reactions in microscale reactors, we show that the formation of undesired particles is inhibited within the microscale spaces between the individual wires in the fabric structures. Such a conformal coating approach enables the direct fabrication of hydrogenated amorphous silicon-based Schottky junction devices on a stainless steel fabric functioning as a solar fabric.

  12. Silicon nitride-fabrication, forming and properties

    International Nuclear Information System (INIS)

    Yehezkel, O.

    1983-01-01

    This article, which is a literature survey of the recent years, includes description of several methods for the formation of silicone nitride, and five methods of forming: Reaction-bonded silicon nitride, sintering, hot pressing, hot isostatic pressing and chemical vapour deposition. Herein are also included data about mechanical and physical properties of silicon nitride and the relationship between the forming method and the properties. (author)

  13. Fabrication of silicon based glass fibres for optical communication

    Indian Academy of Sciences (India)

    Silicon based glass fibres are fabricated by conventional fibre drawing process. First, preform fabrication is carried out by means of conventional MCVD technique by using various dopants such as SiCl4, GeCl4, POCl3, and FeCl3. The chemicals are used in such a way that step index single mode fibre can be drawn.

  14. Single-Event Effects in Silicon and Silicon Carbide Power Devices

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan C.; LaBel, Kenneth A.; Topper, Alyson D.; Wilcox, Edward P.; Kim, Hak; Phan, Anthony M.

    2014-01-01

    NASA Electronics Parts and Packaging program-funded activities over the past year on single-event effects in silicon and silicon carbide power devices are presented, with focus on SiC device failure signatures.

  15. A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

    Science.gov (United States)

    Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

    2016-06-01

    The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

  16. Fabricating solar cells with silicon nanoparticles

    Science.gov (United States)

    Loscutoff, Paul; Molesa, Steve; Kim, Taeseok

    2014-09-02

    A laser contact process is employed to form contact holes to emitters of a solar cell. Doped silicon nanoparticles are formed over a substrate of the solar cell. The surface of individual or clusters of silicon nanoparticles is coated with a nanoparticle passivation film. Contact holes to emitters of the solar cell are formed by impinging a laser beam on the passivated silicon nanoparticles. For example, the laser contact process may be a laser ablation process. In that case, the emitters may be formed by diffusing dopants from the silicon nanoparticles prior to forming the contact holes to the emitters. As another example, the laser contact process may be a laser melting process whereby portions of the silicon nanoparticles are melted to form the emitters and contact holes to the emitters.

  17. Silicon based nanogap device for investigating electronic transport through 12 nm long oligomers

    DEFF Research Database (Denmark)

    Strobel, S.; Albert, E.; Csaba, G.

    2009-01-01

    We have fabricated vertical nanogap electrode devices based on Silicon-on-Insulator (SOI) substrates for investigating the electronic transport properties of long, conjugated molecular wires. Our nanogap electrode devices comprise smooth metallic contact pairs situated at the sidewall of an SOI s...

  18. Silicon based light-emitting materials and devices

    International Nuclear Information System (INIS)

    Chen Weide

    1999-01-01

    Silicon based light-emitting materials and devices are the key to optoelectronic integration. Recently, there has been significant progress in materials engineering methods. The author reviews the latest developments in this area including erbium doped silicon, porous silicon, nanocrystalline silicon and Si/SiO 2 superlattice structures. The incorporation of these different materials into devices is described and future device prospects are assessed

  19. A Mechanochemical Approach to Porous Silicon Nanoparticles Fabrication

    Directory of Open Access Journals (Sweden)

    Luca De Stefano

    2011-06-01

    Full Text Available Porous silicon samples have been reduced in nanometric particles by a well known industrial mechanical process, the ball grinding in a planetary mill; the process has been extended to crystalline silicon for comparison purposes. The silicon nanoparticles have been studied by X-ray diffraction, infrared spectroscopy, gas porosimetry and transmission electron microscopy. We have estimated crystallites size from about 50 nm for silicon to 12 nm for porous silicon. The specific surface area of the powders analyzed ranges between 100 m2/g to 29 m2/g depending on the milling time, ranging from 1 to 20 h. Electron microscopy confirms the nanometric size of the particles and reveals a porous structure in the powders obtained by porous silicon samples which has been preserved by the fabrication conditions. Chemical functionalization during the milling process by a siloxane compound has also been demonstrated.

  20. Electroluminescence color tuning between green and red from metal-oxide-semiconductor devices fabricated by spin-coating of rare-earth (terbium + europium) organic compounds on silicon

    Science.gov (United States)

    Matsuda, Toshihiro; Hattori, Fumihiro; Iwata, Hideyuki; Ohzone, Takashi

    2018-04-01

    Color tunable electroluminescence (EL) from metal-oxide-semiconductor devices with the rare-earth elements Tb and Eu is reported. Organic compound liquid sources of (Tb + Ba) and Eu with various Eu/Tb ratios from 0.001 to 0.4 were spin-coated on an n+-Si substrate and annealed to form an oxide insulator layer. The EL spectra had only peaks corresponding to the intrashell Tb3+/Eu3+ transitions in the spectral range from green to red, and the intensity ratio of the peaks was appropriately tuned using the appropriate Eu/Tb ratios in liquid sources. Consequently, the EL emission colors linearly changed from yellowish green to yellowish orange and eventually to reddish orange on the CIE chromaticity diagram. The gate current +I G current also affected the EL colors for the medium-Eu/Tb-ratio device. The structure of the surface insulator films analyzed by cross-sectional transmission electron microscopy (TEM), X-ray diffraction (XRD) analysis, and X-ray photoelectron spectroscopy (XPS) has four layers, namely, (Tb4O7 + Eu2O3), [Tb4O7 + Eu2O3 + (Tb/Eu/Ba)SiO x ], (Tb/Eu/Ba)SiO x , and SiO x -rich oxide. The EL mechanism proposed is that electrons injected from the Si substrate into the SiO x -rich oxide and Tb/Eu/Ba-silicate layers become hot electrons accelerated in a high electric field, and then these hot electrons excite Tb3+ and Eu3+ ions in the Tb4O7/Eu2O3 layers resulting in EL emission from Tb3+ and Eu3+ intrashell transitions.

  1. Solid state MEMS devices on flexible and semi-transparent silicon (100) platform

    KAUST Repository

    Ahmed, Sally; Hussain, Aftab M.; Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

    2014-01-01

    We report fabrication of MEMS thermal actuators on flexible and semi-transparent silicon fabric released from bulk silicon (100). We fabricated the devices first and then released the top portion of the silicon (≈ 19 μm) which is flexible and semi-transparent. We also performed chemical mechanical polishing to reuse the remaining wafer. A tested thermal actuator with 3 μm wide 240 μm hot arm and 10 μm wide 185 μm long cold arm deflected by 1.7 μm at 1 V. The fabricated thermal actuators exhibit similar performance before and after bending. We believe the demonstrated process will expand the horizon of flexible electronics into MEMS world devices. © 2014 IEEE.

  2. Silicon nano crystal-based non-volatile memory devices

    International Nuclear Information System (INIS)

    Ng, C.Y.; Chen, T.P.; Sreeduth, D.; Chen, Q.; Ding, L.; Du, A.

    2006-01-01

    In this work, we have investigated the performance and reliability of a Flash memory based on silicon nanocrystal synthesized with very-low energy ion beams. The devices are fabricated with a conventional CMOS process and the size of the nanocrystal is ∼ 4 nm as determined from TEM measurement. Electrical properties of the devices with a tunnel oxide of either 3 nm or 7 nm are evaluated. The devices exhibit good endurance up to 10 5 W/E cycles even at the high operation temperature of 85 deg. C for both the tunnel oxide thicknesses. For the thicker tunnel oxide (i.e., the 7-nm tunnel oxide), a good retention performance with an extrapolated 10-year memory window of ∼ 0.3 V (or ∼ 20% of charge lose after 10 years) is achieved. However, ∼ 70% of charge loss after 10 years is expected for the thinner tunnel oxide (i.e., the 3-nm tunnel oxide)

  3. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-02-12

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry\\'s most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  4. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa; Sevilla, Galo T.

    2013-01-01

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry's most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  5. Athermal Photonic Devices and Circuits on a Silicon Platform

    Science.gov (United States)

    Raghunathan, Vivek

    In recent years, silicon based optical interconnects has been pursued as an effective solution that can offer cost, energy, distance and bandwidth density improvements over copper. Monolithic integration of optics and electronics has been enabled by silicon photonic devices that can be fabricated using CMOS technology. However, high levels of device integration result in significant local and global temperature fluctuations that prove problematic for silicon based photonic devices. In particular, high temperature dependence of Si refractive index (thermo-optic (TO) coefficient) shifts the filter response of resonant devices that limit wavelength resolution in various applications. Active thermal compensation using heaters and thermo-electric coolers are the legacy solution for low density integration. However, the required electrical power, device foot print and number of input/output (I/O) lines limit the integration density. We present a passive approach to an athermal design that involves compensation of positive TO effects from a silicon core by negative TO effects of the polymer cladding. In addition, the design rule involves engineering the waveguide core geometry depending on the resonance wavelength under consideration to ensure desired amount of light in the polymer. We develop exact design requirements for a TO peak stability of 0 pm/K and present prototype performance of 0.5 pm/K. We explore the material design space through initiated chemical vapor deposition (iCVD) of 2 polymer cladding choices. We study the effect of cross-linking on the optical properties of a polymer and establish the superior performance of the co-polymer cladding compared to the homo-polymer. Integration of polymer clad devices in an electronic-photonic architecture requires the possibility of multi-layer stacking capability. We use a low temperature, high density plasma chemical vapor deposition of SiO2/SiN x to hermetically seal the athermal. Further, we employ visible light for

  6. Fabrication and characterization of porous silicon for photonic applications

    Directory of Open Access Journals (Sweden)

    Arvin I. Mabilangan

    2013-06-01

    Full Text Available Porous silicon (PSi thin films from p-type silicon (100 substrates were fabricated using a simple table top electrochemical etching setup with a 1:1 HF:EtOh electrolyte solution. Porous silicon f ilms with different morphologies and optical properties were achieved by varying the etching parameters, such as HF concentration, etching time andanodization current. It was observed that the f ilm thickness of the fabricated PSi increased with etch time and HF concentration. The etch rate increased with the applied anodization current. Reflection spectroscopy at normal incidence was used to determine the refractive indices of the fabricated f ilms. Using the Sellmeier equation, the chromatic dispersion of the f ilms was obtained for different HF concentrations and anodization currents.

  7. Fabrication of coplanar HF analog devices

    International Nuclear Information System (INIS)

    Schulz, G.; Kratz, H.

    1993-01-01

    A thin film technology has to be built up, which allows the reliable and reproducible production of such devices. This technology has to fulfill some general requirements and many specific ones due to the difference of the devices. The general requirements concern the suitability of the technology for industrial production. That means, that the production processes should be reliable, they should allow a high trough-put, and up-scaling should be possible. Processes as passivation or cryo-packaging of the devices belong to this group of requirements as well. The technology for fabrication of the devices splits up into three well distinguishable techniques: deposition of thin films, control of the quality of the deposited layers and patterning of the device structures and contacts. (orig.)

  8. Strain-Induced Spin-Resonance Shifts in Silicon Devices

    Science.gov (United States)

    Pla, J. J.; Bienfait, A.; Pica, G.; Mansir, J.; Mohiyaddin, F. A.; Zeng, Z.; Niquet, Y. M.; Morello, A.; Schenkel, T.; Morton, J. J. L.; Bertet, P.

    2018-04-01

    In spin-based quantum-information-processing devices, the presence of control and detection circuitry can change the local environment of a spin by introducing strain and electric fields, altering its resonant frequencies. These resonance shifts can be large compared to intrinsic spin linewidths, and it is therefore important to study, understand, and model such effects in order to better predict device performance. We investigate a sample of bismuth donor spins implanted in a silicon chip, on top of which a superconducting aluminum microresonator is fabricated. The on-chip resonator provides two functions: it produces local strain in the silicon due to the larger thermal contraction of the aluminum, and it enables sensitive electron spin-resonance spectroscopy of donors close to the surface that experience this strain. Through finite-element strain simulations, we are able to reconstruct key features of our experiments, including the electron spin-resonance spectra. Our results are consistent with a recently observed mechanism for producing shifts of the hyperfine interaction for donors in silicon, which is linear with the hydrostatic component of an applied strain.

  9. Design, fabrication and transportation of Si rotating device

    International Nuclear Information System (INIS)

    Kimura, Nobuaki; Imaizumi, Tomomi; Takemoto, Noriyuki; Tanimoto, Masataka; Saito, Takashi; Hori, Naohiko; Tsuchiya, Kunihiko; Romanova, Nataliya; Gizatulin, Shamil; Martyushov, Alexandr; Nakipov, Darkhan; Chakrov, Petr; Tanaka, Futoshi; Nakajima, Takeshi

    2012-06-01

    Si semiconductor production by Neutron Transmutation Doping (NTD) method using the Japan Materials Testing Reactor (JMTR) has been investigated in Neutron Irradiation and Testing Reactor Center, Japan Atomic Energy Agency (JAEA) in order to expand industry use. As a part of investigations, irradiation test of silicon ingot for development of NTD-Si with high quality was planned using WWR-K in Institute of Nuclear Physics (INP), National Nuclear Center of Republic of Kazakhstan (NNC-RK) based on one of specific topics of cooperation (STC), Irradiation Technology for NTD-Si (STC No.II-4), on the implementing arrangement between NNC-RK and the JAEA for 'Nuclear Technology on Testing/Research Reactors' in cooperation in research and development in nuclear energy and technology. As for the irradiation test, Si rotating device was fabricated in JAEA, and the fabricated device was transported with irradiation specimens from JAEA to INP-NNC-RK. This report described the design, the fabrication, the performance test of the Si rotating device and transportation procedures. (author)

  10. Fabrication of porous silicon based tunable distributed Bragg reflectors by anodic etching of irradiated silicon

    International Nuclear Information System (INIS)

    Vendamani, V.S.; Dang, Z.Y.; Ramana, P.; Pathak, A.P.; Ravi Kanth Kumar, V.V.; Breese, M.B.H.; Nageswara Rao, S.V.S.

    2015-01-01

    Highlights: • Fabrication of tunable distributed Bragg reflectors (DBRs) by gamma/ion irradiation of Si and subsequent formation of porous silicon multilayers has been described. • The central wavelength and the width of the stop band are found to decrease with increase in irradiation fluence. • The Si samples irradiated with highest fluence of 2 × 10 13 ions/cm 2 (100 MeV Ag ions) and 60 kGy (gamma) showed a central reflection at λ = 476 nm and 544 nm respectively, in contrast to un-irradiated sample, where λ = 635 nm. • The observed changes in the central wavelengths are attributed to the density of defects generated by gamma and ion irradiation in c-Si. • This study is expected to provide useful information for fabricating tunable wave reflectors for optical communication and other device applications. - Abstract: We report a study on the fabrication of tunable distributed Bragg reflectors (DBRs) by gamma/ion irradiation of Si and subsequent formation of porous silicon multilayers. Porous Si multilayers with 50 bilayers were designed to achieve high intensity of reflection. The reflection spectra appear to have a broad continuous band between 400 and 800 nm with a distinct central wavelength corresponding to different wave reflectors. The central wavelength and the width of the stop band are found to decrease with increase in irradiation fluence. The Si samples irradiated with highest fluence of 2 × 10 13 ions/cm 2 (100 MeV Ag ions) and 60 kGy (gamma) showed a central reflection at λ = 476 nm and 544 nm respectively, in contrast to un-irradiated sample, where λ = 635 nm. The observed changes are attributed to the density of defects generated by gamma and ion irradiation in c-Si. These results suggest that the gamma irradiation is a convenient and alternative method to tune the central wavelength of reflection without creating high density of defects by high energy ion implantation. This study is expected to provide useful information for

  11. Silicon Web Process Development. [for solar cell fabrication

    Science.gov (United States)

    Duncan, C. S.; Seidensticker, R. G.; Hopkins, R. H.; Mchugh, J. P.; Hill, F. E.; Heimlich, M. E.; Driggers, J. M.

    1979-01-01

    Silicon dendritic web, ribbon form of silicon and capable of fabrication into solar cells with greater than 15% AMl conversion efficiency, was produced from the melt without die shaping. Improvements were made both in the width of the web ribbons grown and in the techniques to replenish the liquid silicon as it is transformed to web. Through means of improved thermal shielding stress was reduced sufficiently so that web crystals nearly 4.5 cm wide were grown. The development of two subsystems, a silicon feeder and a melt level sensor, necessary to achieve an operational melt replenishment system, is described. A gas flow management technique is discussed and a laser reflection method to sense and control the melt level as silicon is replenished is examined.

  12. Fabrication of the GLAST Silicon Tracker Readout Electronics

    Energy Technology Data Exchange (ETDEWEB)

    Baldini, Luca; Brez, Alessandro; Himel, Thomas; Johnson, R.P.; Latronico, Luca; Minuti, Massimo; Nelson, David; Sadrozinski, H.F.-W.; Sgro, Carmelo; Spandre, Gloria; Sugizaki, Mutsumi; Tajima, Hiro; Cohen Tanugi, Johann; Young, Charles; Ziegler, Marcus; /Pisa U. /INFN, Pisa /SLAC /UC, Santa Cruz

    2006-03-03

    A unique electronics system has been built and tested for reading signals from the silicon-strip detectors of the Gamma-ray Large Area Space Telescope mission. The system amplifies and processes signals from 884,736 36-cm long silicon strips in a 4 x 4 array of tower modules. An aggressive mechanical design fits the readout electronics in narrow spaces between the tower modules, to minimize dead area. This design and the resulting departures from conventional electronics packaging led to several fabrication challenges and lessons learned. This paper describes the fabrication processes and how the problems peculiar to this design were overcome.

  13. Fabrication and Characterization of Nanopillars for Silicon-Based Thermoelectrics

    Science.gov (United States)

    Stranz, A.; Sökmen, Ü.; Wehmann, H.-H.; Waag, A.; Peiner, E.

    2010-09-01

    Si-based nanopillars of various sizes were fabricated by lateral structuring using anisotropic etching and thermal oxidation. We obtained pillars of diameter <500 nm, about 25 μm in height, with an aspect ratio of more than 50. The distance between pillars was varied from 500 nm to 10 μm. Besides the fabrication and structural characterization of silicon nanopillars, implementation of adequate metrology for measuring single pillars is described. Commercial tungsten probes, self-made gold probes, and piezoresistive silicon cantilever probes were used for measurements of nanopillars in a scanning electron microscope (SEM) equipped with nanomanipulators.

  14. Surface wave photonic device based on porous silicon multilayers

    International Nuclear Information System (INIS)

    Guillermain, E.; Lysenko, V.; Benyattou, T.

    2006-01-01

    Porous silicon is widely studied in the field of photonics due to its interesting optical properties. In this work, we present theoretical and first experimental studies of a new kind of porous silicon photonic device based on optical surface wave. A theoretical analysis of the device is presented using plane-wave approximation. The porous silicon multilayered structures are realized using electrochemical etching of p + -type silicon. Morphological and optical characterizations of the realized structures are reported

  15. Lithography requirements in complex VLSI device fabrication

    International Nuclear Information System (INIS)

    Wilson, A.D.

    1985-01-01

    Fabrication of complex very large scale integration (VLSI) circuits requires continual advances in lithography to satisfy: decreasing minimum linewidths, larger chip sizes, tighter linewidth and overlay control, increasing topography to linewidth ratios, higher yield demands, increased throughput, harsher device processing, lower lithography cost, and a larger part number set with quick turn-around time. Where optical, electron beam, x-ray, and ion beam lithography can be applied to judiciously satisfy the complex VLSI circuit fabrication requirements is discussed and those areas that are in need of major further advances are addressed. Emphasis will be placed on advanced electron beam and storage ring x-ray lithography

  16. SILICON COMPATIBLE ACOUSTIC WAVE RESONATORS: DESIGN, FABRICATION AND PERFORMANCE

    Directory of Open Access Journals (Sweden)

    Aliza Aini Md Ralib

    2014-12-01

    Full Text Available ABSTRACT: Continuous advancement in wireless technology and silicon microfabrication has fueled exciting growth in wireless products. The bulky size of discrete vibrating mechanical devices such as quartz crystals and surface acoustic wave resonators impedes the ultimate miniaturization of single-chip transceivers. Fabrication of acoustic wave resonators on silicon allows complete integration of a resonator with its accompanying circuitry.  Integration leads to enhanced performance, better functionality with reduced cost at large volume production. This paper compiles the state-of-the-art technology of silicon compatible acoustic resonators, which can be integrated with interface circuitry. Typical acoustic wave resonators are surface acoustic wave (SAW and bulk acoustic wave (BAW resonators.  Performance of the resonator is measured in terms of quality factor, resonance frequency and insertion loss. Selection of appropriate piezoelectric material is significant to ensure sufficient electromechanical coupling coefficient is produced to reduce the insertion loss. The insulating passive SiO2 layer acts as a low loss material and aims to increase the quality factor and temperature stability of the design. The integration technique also is influenced by the fabrication process and packaging.  Packageless structure using AlN as the additional isolation layer is proposed to protect the SAW device from the environment for high reliability. Advancement in miniaturization technology of silicon compatible acoustic wave resonators to realize a single chip transceiver system is still needed. ABSTRAK: Kemajuan yang berterusan dalam teknologi tanpa wayar dan silikon telah menguatkan pertumbuhan yang menarik dalam produk tanpa wayar. Saiz yang besar bagi peralatan mekanikal bergetar seperti kristal kuarza menghalang pengecilan untuk merealisasikan peranti cip. Silikon serasi  gelombang akustik resonator mempunyai potensi yang besar untuk menggantikan unsur

  17. Light Absorption Enhancement of Silicon-Based Photovoltaic Devices with Multiple Bandgap Structures of Porous Silicon

    Directory of Open Access Journals (Sweden)

    Kuen-Hsien Wu

    2015-09-01

    Full Text Available Porous-silicon (PS multi-layered structures with three stacked PS layers of different porosity were prepared on silicon (Si substrates by successively tuning the electrochemical-etching parameters in an anodization process. The three PS layers have different optical bandgap energy and construct a triple-layered PS (TLPS structure with multiple bandgap energy. Photovoltaic devices were fabricated by depositing aluminum electrodes of Schottky contacts on the surfaces of the developed TLPS structures. The TLPS-based devices exhibit broadband photoresponses within the spectrum of the solar irradiation and get high photocurrent for the incident light of a tungsten lamp. The improved spectral responses of devices are owing to the multi-bandgap structures of TLPS, which are designed with a layered configuration analog to a tandem cell for absorbing a wider energy range of the incidental sun light. The large photocurrent is mainly ascribed to an enhanced light-absorption ability as a result of applying nanoporous-Si thin films as the surface layers to absorb the short-wavelength light and to improve the Schottky contacts of devices. Experimental results reveal that the multi-bandgap PS structures produced from electrochemical-etching of Si wafers are potentially promising for development of highly efficient Si-based solar cells.

  18. Solvent Bonding for Fabrication of PMMA and COP Microfluidic Devices.

    Science.gov (United States)

    Wan, Alwin M D; Moore, Thomas A; Young, Edmond W K

    2017-01-17

    Thermoplastic microfluidic devices offer many advantages over those made from silicone elastomers, but bonding procedures must be developed for each thermoplastic of interest. Solvent bonding is a simple and versatile method that can be used to fabricate devices from a variety of plastics. An appropriate solvent is added between two device layers to be bonded, and heat and pressure are applied to the device to facilitate the bonding. By using an appropriate combination of solvent, plastic, heat, and pressure, the device can be sealed with a high quality bond, characterized as having high bond coverage, bond strength, optical clarity, durability over time, and low deformation or damage to microfeature geometry. We describe the procedure for bonding devices made from two popular thermoplastics, poly(methyl-methacrylate) (PMMA), and cyclo-olefin polymer (COP), as well as a variety of methods to characterize the quality of the resulting bonds, and strategies to troubleshoot low quality bonds. These methods can be used to develop new solvent bonding protocols for other plastic-solvent systems.

  19. Silicon Nanowire Fabrication Using Edge and Corner Lithography

    NARCIS (Netherlands)

    Yagubizade, H.; Berenschot, Johan W.; Jansen, Henricus V.; Elwenspoek, Michael Curt; Tas, Niels Roelof

    2010-01-01

    This paper presents a wafer scale fabrication method of single-crystalline silicon nanowires (SiNWs) bound by <111> planes using a combination of edge and corner lithography. These are methods of unconventional nanolithography for wafer scale nano-patterning which determine the size of nano-features

  20. Fabrication of silicon condenser microphones using single wafer technology

    NARCIS (Netherlands)

    Scheeper, P.R.; van der Donk, A.G.H.; Olthuis, Wouter; Bergveld, Piet

    1992-01-01

    A condenser microphone design that can be fabricated using the sacrificial layer technique is proposed and tested. The microphone backplate is a 1-¿m plasma-enhanced chemical-vapor-deposited (PECVD) silicon nitride film with a high density of acoustic holes (120-525 holes/mm2), covered with a thin

  1. A fabrication guide for planar silicon quantum dot heterostructures

    Science.gov (United States)

    Spruijtenburg, Paul C.; Amitonov, Sergey V.; van der Wiel, Wilfred G.; Zwanenburg, Floris A.

    2018-04-01

    We describe important considerations to create top-down fabricated planar quantum dots in silicon, often not discussed in detail in literature. The subtle interplay between intrinsic material properties, interfaces and fabrication processes plays a crucial role in the formation of electrostatically defined quantum dots. Processes such as oxidation, physical vapor deposition and atomic-layer deposition must be tailored in order to prevent unwanted side effects such as defects, disorder and dewetting. In two directly related manuscripts written in parallel we use techniques described in this work to create depletion-mode quantum dots in intrinsic silicon, and low-disorder silicon quantum dots defined with palladium gates. While we discuss three different planar gate structures, the general principles also apply to 0D and 1D systems, such as self-assembled islands and nanowires.

  2. Flexible high-κ/Metal gate metal/insulator/metal capacitors on silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-10-01

    Implementation of memory on bendable substrates is an important step toward a complete and fully developed notion of mechanically flexible computational systems. In this paper, we have demonstrated a simple fabrication flow to build metal-insulator-metal capacitors, key components of dynamic random access memory, on a mechanically flexible silicon (100) fabric. We rely on standard microfabrication processes to release a thin sheet of bendable silicon (area: 18 {\\ m cm}2 and thickness: 25 \\\\mu{\\ m m}) in an inexpensive and reliable way. On such platform, we fabricated and characterized the devices showing mechanical robustness (minimum bending radius of 10 mm at an applied strain of 83.33% and nominal strain of 0.125%) and consistent electrical behavior regardless of the applied mechanical stress. Furthermore, and for the first time, we performed a reliability study suggesting no significant difference in performance and showing an improvement in lifetime projections. © 1963-2012 IEEE.

  3. Hemispherical cavities on silicon substrates: an overview of micro fabrication techniques

    Science.gov (United States)

    Poncelet, O.; Rasson, J.; Tuyaerts, R.; Coulombier, M.; Kotipalli, R.; Raskin, J.-P.; Francis, L. A.

    2018-04-01

    Hemispherical photonic crystals found in species like Papilio blumei and Cicendella chinensis have inspired new applications like anti-counterfeiting devices and gas sensors. In this work, we investigate and compare four different ways to micro fabricate such hemispherical cavities: using colloids as template, by wet (HNA) or dry (XeF2) isotropic etching of silicon and by electrochemical etching of silicon. The shape and the roughness of the obtained cavities have been discussed and the pros/cons for each method are highlighted.

  4. Silicon Solar Cell Process Development, Fabrication and Analysis, Phase 1

    Science.gov (United States)

    Yoo, H. I.; Iles, P. A.; Tanner, D. P.

    1979-01-01

    Solar cells from RTR ribbons, EFG (RF and RH) ribbons, dendritic webs, Silso wafers, cast silicon by HEM, silicon on ceramic, and continuous Czochralski ingots were fabricated using a standard process typical of those used currently in the silicon solar cell industry. Back surface field (BSF) processing and other process modifications were included to give preliminary indications of possible improved performance. The parameters measured included open circuit voltage, short circuit current, curve fill factor, and conversion efficiency (all taken under AM0 illumination). Also measured for typical cells were spectral response, dark I-V characteristics, minority carrier diffusion length, and photoresponse by fine light spot scanning. the results were compared to the properties of cells made from conventional single crystalline Czochralski silicon with an emphasis on statistical evaluation. Limited efforts were made to identify growth defects which will influence solar cell performance.

  5. Solar cell fabricated on welded thin flexible silicon

    Directory of Open Access Journals (Sweden)

    Hessmann Maik Thomas

    2015-01-01

    Full Text Available We present a thin-film crystalline silicon solar cell with an AM1.5 efficiency of 11.5% fabricated on welded 50 μm thin silicon foils. The aperture area of the cell is 1.00 cm2. The cell has an open-circuit voltage of 570 mV, a short-circuit current density of 29.9 mA cm-2 and a fill factor of 67.6%. These are the first results ever presented for solar cells on welded silicon foils. The foils were welded together in order to create the first thin flexible monocrystalline band substrate. A flexible band substrate offers the possibility to overcome the area restriction of ingot-based monocrystalline silicon wafers and the feasibility of a roll-to-roll manufacturing. In combination with an epitaxial and layer transfer process a decrease in production costs can be achieved.

  6. RFID and Memory Devices Fabricated Integrally on Substrates

    Science.gov (United States)

    Schramm, Harry F.

    2004-01-01

    Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for

  7. Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-06-09

    We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect to breakdown voltage and leakage current of the devices. We also report the effect of continuous mechanical stress on the breakdown voltage over extended periods of times.

  8. Integrating nanosphere lithography in device fabrication

    Science.gov (United States)

    Laurvick, Tod V.; Coutu, Ronald A.; Lake, Robert A.

    2016-03-01

    This paper discusses the integration of nanosphere lithography (NSL) with other fabrication techniques, allowing for nano-scaled features to be realized within larger microelectromechanical system (MEMS) based devices. Nanosphere self-patterning methods have been researched for over three decades, but typically not for use as a lithography process. Only recently has progress been made towards integrating many of the best practices from these publications and determining a process that yields large areas of coverage, with repeatability and enabled a process for precise placement of nanospheres relative to other features. Discussed are two of the more common self-patterning methods used in NSL (i.e. spin-coating and dip coating) as well as a more recently conceived variation of dip coating. Recent work has suggested the repeatability of any method depends on a number of variables, so to better understand how these variables affect the process a series of test vessels were developed and fabricated. Commercially available 3-D printing technology was used to incrementally alter the test vessels allowing for each variable to be investigated individually. With these deposition vessels, NSL can now be used in conjunction with other fabrication steps to integrate features otherwise unattainable through current methods, within the overall fabrication process of larger MEMS devices. Patterned regions in 1800 series photoresist with a thickness of ~700nm are used to capture regions of self-assembled nanospheres. These regions are roughly 2-5 microns in width, and are able to control the placement of 500nm polystyrene spheres by controlling where monolayer self-assembly occurs. The resulting combination of photoresist and nanospheres can then be used with traditional deposition or etch methods to utilize these fine scale features in the overall design.

  9. Electrical effects of transient neutron irradiation of silicon devices

    International Nuclear Information System (INIS)

    Hjalmarson, H.P.; Pease, R.L.; Van Ginhoven, R.M.; Schultz, P.A.; Modine, N.A.

    2007-01-01

    The key effects of combined transient neutron and ionizing radiation on silicon diodes and bipolar junctions transistors are described. The results show that interstitial defect reactions dominate the annealing effects in the first stage of annealing for certain devices. Furthermore, the results show that oxide trapped charge can influence the effects of bulk silicon displacement damage for particular devices

  10. The fabrication of nitrogen detector porous silicon nanostructures

    Science.gov (United States)

    Husairi, F. S.; Othman, N.; Eswar, K. A.; Guliling, Muliyadi; Khusaimi, Z.; Rusop, M.; Abdullah, S.

    2018-05-01

    In this study the porous silicon nanostructure used as a the nitrogen detector was fabricated by using anodization method because of simple and easy to handle. This method using 20 mA/ cm2 of current density and the etching time is from 10 - 40 minutes. The properties of the porous silicon nanostructure analyzed using I-V testing (electrical properties) and photoluminescence spectroscopy. From the I-V testing, sample PsiE40 where the sensitivity is 25.4% is a sensitivity of PSiE40 at 10 seconds exposure time.

  11. Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

    Energy Technology Data Exchange (ETDEWEB)

    Balpande, Suresh S., E-mail: balpandes@rknec.edu [Ph.D.. Scholar, Department of Electronics Engineering Shri Ramdeobaba College of Engineering & Management, Nagpur-13, (M.S.) (India); Pande, Rajesh S. [Professor, Department of Electronics Engineering Shri Ramdeobaba College of Engineering & Management, Nagpur-13, (M.S.) (India)

    2016-04-13

    Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition to this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of

  12. Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

    Science.gov (United States)

    Balpande, Suresh S.; Pande, Rajesh S.

    2016-04-01

    Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition to this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of harvester and

  13. Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

    International Nuclear Information System (INIS)

    Balpande, Suresh S.; Pande, Rajesh S.

    2016-01-01

    Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition to this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of

  14. Flexible Bragg reflection waveguide devices fabricated on a plastic substrate

    Science.gov (United States)

    Kim, Kyung-Jo; Yi, Jeong-Ah; Oh, Min-Cheol; Noh, Young-Ouk; Lee, Hyung-Jong

    2007-09-01

    Bragg reflecting waveguide devices are fabricated on a flexible substrate by using a post lift-off process in order to provide highly uniform grating patterns on a wide range. In this process, the flexible substrate spin-coated on silicon wafer is released after the final fabrication process of chip dicing. The fabricated flexible Bragg reflector shows very sharp transmission spectrum with 3-dB bandwidth of 0.1 nm and 10-dB bandwidth of 0.4 nm, which proves the Bragg reflector has excellent uniformity. To achieve athermal operation of the flexible Bragg reflector, thermal expansion property of the plastic substrate is controlled by the thickness of two polymer materials constructing the plastic substrate. The flexible substrate with 0.7-μm SU-8 layers sandwiching 100-μm NOA61 layer provides an optimized thermal expansion property to compensate the thermo-optic effect of the waveguide made of ZPU polymer. The temperature dependence of the Bragg reflector is decreased to -0.011 nm/°C through the incorporation of the plastic substrate.

  15. Technology of fabrication of silicon-lithium detector with superficial junction

    International Nuclear Information System (INIS)

    Cabal Rodriguez, A.E.; Diaz Garcia, A.; Noriega Scull, C.

    1997-01-01

    The Silicon nuclear radiation detectors transform the charge produced within the semiconductor crystal, product of the impinges of particles and X rays, in pulses of voltage at the output of the preamplifier. The planar Silicon-Lithium (Si(Li)) detector with superficial junction is basically a Pin structure diode. By mean of the diffusion and drift of Lithium in the Silicon a compensated or depletion region was created. There the incident radiation interacts with the Silicon, producing an electric signal proportional to the detector's energy deposited in the semiconductor. The technological process of fabrication this kind of detectors comprises several stages, some of them complex and of long duration. They also demand a systematic control. The technological process of Si(Li) detector's fabrication was carried out. The detector's fabrication electric characteristics were measured in some steps. An obtained device was mounted in the holder within a cryostat, in order to work to temperature of the liquid nitrogen. The energy resolution of the detector was measured and the value was 180 eV for the line of 5.9 KeV of an Fe-55 source. This value has allowed to work with the detector in energy disperse X-rays fluorescence. (author) [es

  16. Key Processes of Silicon-On-Glass MEMS Fabrication Technology for Gyroscope Application.

    Science.gov (United States)

    Ma, Zhibo; Wang, Yinan; Shen, Qiang; Zhang, Han; Guo, Xuetao

    2018-04-17

    MEMS fabrication that is based on the silicon-on-glass (SOG) process requires many steps, including patterning, anodic bonding, deep reactive ion etching (DRIE), and chemical mechanical polishing (CMP). The effects of the process parameters of CMP and DRIE are investigated in this study. The process parameters of CMP, such as abrasive size, load pressure, and pH value of SF1 solution are examined to optimize the total thickness variation in the structure and the surface quality. The ratio of etching and passivation cycle time and the process pressure are also adjusted to achieve satisfactory performance during DRIE. The process is optimized to avoid neither the notching nor lag effects on the fabricated silicon structures. For demonstrating the capability of the modified CMP and DRIE processes, a z-axis micro gyroscope is fabricated that is based on the SOG process. Initial test results show that the average surface roughness of silicon is below 1.13 nm and the thickness of the silicon is measured to be 50 μm. All of the structures are well defined without the footing effect by the use of the modified DRIE process. The initial performance test results of the resonant frequency for the drive and sense modes are 4.048 and 4.076 kHz, respectively. The demands for this kind of SOG MEMS device can be fulfilled using the optimized process.

  17. Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

    Science.gov (United States)

    Blewer, Robert S.; Gullinger, Terry R.; Kelly, Michael J.; Tsao, Sylvia S.

    1991-01-01

    A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.

  18. 3D printing for health & wealth: Fabrication of custom-made medical devices through additive manufacturing

    Science.gov (United States)

    Colpani, Alessandro; Fiorentino, Antonio; Ceretti, Elisabetta

    2018-05-01

    Additive Manufacturing (AM) differs from traditional manufacturing technologies by its ability to handle complex shapes with great design flexibility. These features make the technique suitable to fabricate customized components, particularly answering specific custom needs. Although AM mainly referred to prototyping, nowadays the interest in direct manufacturing of actual parts is growing. This article shows the application of AM within the project 3DP-4H&W (3D Printing for Health & Wealth) which involves engineers and physicians for developing pediatric custom-made medical devices to enhance the fulfilling of the patients specific needs. In the project, two types of devices made of a two-component biocompatible silicone are considered. The first application (dental field) consists in a device for cleft lip and palate. The second one (audiological field) consists in an acoustic prosthesis. The geometries of the devices are based on the anatomy of the patient that is obtained through a 3D body scan process. For both devices, two different approaches were planned, namely direct AM and indirect Rapid Tooling (RT). In particular, direct AM consists in the FDM processing of silicone, while RT consists in molds FDM fabrication followed by silicone casting. This paper presents the results of the RT method that is articulated in different phases: the acquisition of the geometry to be realized, the design of the molds taking into account the casting feasibility (as casting channel, vents, part extraction), the realization of molds produced through AM, molds surface chemical finishing, pouring and curing of the silicone. The fabricated devices were evaluated by the physicians team that confirmed the effectiveness of the proposed procedure in fabricating the desired devices. Moreover, the procedure can be used as a general method to extend the range of applications to any custom-made device for anatomic districts, especially where complex shapes are present (as tracheal or

  19. Enhanced Electroluminescence from Silicon Quantum Dots Embedded in Silicon Nitride Thin Films Coupled with Gold Nanoparticles in Light Emitting Devices

    Directory of Open Access Journals (Sweden)

    Ana Luz Muñoz-Rosas

    2018-03-01

    Full Text Available Nowadays, the use of plasmonic metal layers to improve the photonic emission characteristics of several semiconductor quantum dots is a booming tool. In this work, we report the use of silicon quantum dots (SiQDs embedded in a silicon nitride thin film coupled with an ultra-thin gold film (AuNPs to fabricate light emitting devices. We used the remote plasma enhanced chemical vapor deposition technique (RPECVD in order to grow two types of silicon nitride thin films. One with an almost stoichiometric composition, acting as non-radiative spacer; the other one, with a silicon excess in its chemical composition, which causes the formation of silicon quantum dots imbibed in the silicon nitride thin film. The ultra-thin gold film was deposited by the direct current (DC-sputtering technique, and an aluminum doped zinc oxide thin film (AZO which was deposited by means of ultrasonic spray pyrolysis, plays the role of the ohmic metal-like electrode. We found that there is a maximum electroluminescence (EL enhancement when the appropriate AuNPs-spacer-SiQDs configuration is used. This EL is achieved at a moderate turn-on voltage of 11 V, and the EL enhancement is around four times bigger than the photoluminescence (PL enhancement of the same AuNPs-spacer-SiQDs configuration. From our experimental results, we surmise that EL enhancement may indeed be due to a plasmonic coupling. This kind of silicon-based LEDs has the potential for technology transfer.

  20. Simple fabrication of closed-packed IR microlens arrays on silicon by femtosecond laser wet etching

    Science.gov (United States)

    Meng, Xiangwei; Chen, Feng; Yang, Qing; Bian, Hao; Du, Guangqing; Hou, Xun

    2015-10-01

    We demonstrate a simple route to fabricate closed-packed infrared (IR) silicon microlens arrays (MLAs) based on femtosecond laser irradiation assisted by wet etching method. The fabricated MLAs show high fill factor, smooth surface and good uniformity. They can be used as optical devices for IR applications. The exposure and etching parameters are optimized to obtain reproducible microlens with hexagonal and rectangular arrangements. The surface roughness of the concave MLAs is only 56 nm. This presented method is a maskless process and can flexibly change the size, shape and the fill factor of the MLAs by controlling the experimental parameters. The concave MLAs on silicon can work in IR region and can be used for IR sensors and imaging applications.

  1. Single-Event Effects in Silicon Carbide Power Devices

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan C.; LaBel, Kenneth A.; Ikpe, Stanley; Topper, Alyson D.; Wilcox, Edward P.; Kim, Hak; Phan, Anthony M.

    2015-01-01

    This report summarizes the NASA Electronic Parts and Packaging Program Silicon Carbide Power Device Subtask efforts in FY15. Benefits of SiC are described and example NASA Programs and Projects desiring this technology are given. The current status of the radiation tolerance of silicon carbide power devices is given and paths forward in the effort to develop heavy-ion single-event effect hardened devices indicated.

  2. Fabrication of Ge nanocrystals doped silica-on-silicon waveguides and observation of their strong quantum confinement effect

    DEFF Research Database (Denmark)

    Ou, Haiyan; Rottwitt, Karsten

    2009-01-01

    Germanium (Ge) nanocrystals embedded in silica matrix is an interesting material for new optoelectronic devices. In this paper, standard silica-on-silicon waveguides with a core doped by Ge nanocrystals were fabricated using plasma enhanced chemical vapour deposition and reactive ion etching...

  3. Improving Mechanical Properties of Molded Silicone Rubber for Soft Robotics Through Fabric Compositing.

    Science.gov (United States)

    Wang, Yue; Gregory, Cherry; Minor, Mark A

    2018-06-01

    Molded silicone rubbers are common in manufacturing of soft robotic parts, but they are often prone to tears, punctures, and tensile failures when strained. In this article, we present a fabric compositing method for improving the mechanical properties of soft robotic parts by creating a fabric/rubber composite that increases the strength and durability of the molded rubber. Comprehensive ASTM material tests evaluating the strength, tear resistance, and puncture resistance are conducted on multiple composites embedded with different fabrics, including polyester, nylon, silk, cotton, rayon, and several blended fabrics. Results show that strong fabrics increase the strength and durability of the composite, valuable in pneumatic soft robotic applications, while elastic fabrics maintain elasticity and enhance tear strength, suitable for robotic skins or soft strain sensors. Two case studies then validate the proposed benefits of the fabric compositing for soft robotic pressure vessel applications and soft strain sensor applications. Evaluations of the fabric/rubber composite samples and devices indicate that such methods are effective for improving mechanical properties of soft robotic parts, resulting in parts that can have customized stiffness, strength, and vastly improved durability.

  4. Effects of radiation on MOS structures and silicon devices

    International Nuclear Information System (INIS)

    Braeunig, D.; Fahrner, W.

    1983-02-01

    A comprehensive view of radiation effects on MOS structures and silicon devices is given. In the introduction, the interaction of radiation with semiconductor material is presented. In the next section, the electrical degradation of semiconductor devices due to this interaction is discussed. The commonly used hardening techniques are shown. The last section deals with testing of radiation hardness of devices. (orig.) [de

  5. MOS structures containing silicon nanoparticles for memory device applications

    International Nuclear Information System (INIS)

    Nedev, N; Zlatev, R; Nesheva, D; Manolov, E; Levi, Z; Brueggemann, R; Meier, S

    2008-01-01

    Metal-oxide-silicon structures containing layers with amorphous or crystalline silicon nanoparticles in a silicon oxide matrix are fabricated by sequential physical vapour deposition of SiO x (x = 1.15) and RF sputtering of SiO 2 on n-type crystalline silicon, followed by high temperature annealing in an inert gas ambient. Depending on the annealing temperature, 700 deg. C or 1000 deg. C, amorphous or crystalline silicon nanoparticles are formed in the silicon oxide matrix. The annealing process is used not only for growing nanoparticles but also to form a dielectric layer with tunnelling thickness at the silicon/insulator interface. High frequency C-V measurements demonstrate that both types of structures can be charged negatively or positively by applying a positive or negative voltage on the gate. The structures with amorphous silicon nanoparticles show several important advantages compared to the nanocrystal ones, such as lower defect density at the interface between the crystalline silicon wafer and the tunnel silicon oxide, better retention characteristics and better reliability

  6. Advanced Silicone-based Coatings for Flexible Fabric Applications, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — High performance silicone coatings are desired for flexible fabrics used in several space and consumer applications. For instance, the total weight of silicone...

  7. Device Fabrication and Probing of Discrete Carbon Nanostructures

    KAUST Repository

    Batra, Nitin M

    2015-01-01

    Device fabrication on multi walled carbon nanotubes (MWCNTs) using electrical beam lithography (EBL), electron beam induced deposition (EBID), ion beam induced deposition (IBID) methods was carried out, followed by device electrical characterization

  8. Systems and methods for scalable perovskite device fabrication

    Science.gov (United States)

    Huang, Jinsong; Dong, Qingfeng; Sao, Yuchuan

    2017-02-28

    Continuous processes for fabricating a perovskite device are described that include using a doctor blade for continuously forming a perovskite layer and using a conductive tape lamination process to form an anode or a cathode layer on the perovskite device.

  9. Fabrication and Analysis of Tapered Tip Silicon Microneedles for MEMS based Drug Delivery System

    Directory of Open Access Journals (Sweden)

    Muhammad Waseem Ashraf

    2010-11-01

    Full Text Available In this paper, a novel design of transdermal drug delivery (TDD system is presented. The proposed system consists of controlled electronic circuit and microelectromechanical system (MEMS based devices like microneedles, micropump, flow sensor, and blood pressure sensor. The aim of this project is to develop a system that can eliminate the limitations associated with oral therapy. In this phase tapered tip silicon microneedles have been fabricated using inductively coupled plasma (ICP etching technology. Using ANSYS, simulation of microneedles has been conducted before the fabrication process to test the design suitability for TDD. More over multifield analysis of reservoir integrated with microneedle array using piezoelectric actuator has also been performed. The effects of frequency and voltage on actuator and fluid flow rate through 6×6 microneedle array have been investigated. This work provides envisage data to design suitable devices for TDD.

  10. Novel fabrication of silicon carbide based ceramics for nuclear applications

    Science.gov (United States)

    Singh, Abhishek Kumar

    Advances in nuclear reactor technology and the use of gas-cooled fast reactors require the development of new materials that can operate at the higher temperatures expected in these systems. These materials include refractory alloys based on Nb, Zr, Ta, Mo, W, and Re; ceramics and composites such as SiC--SiCf; carbon--carbon composites; and advanced coatings. Besides the ability to handle higher expected temperatures, effective heat transfer between reactor components is necessary for improved efficiency. Improving thermal conductivity of the fuel can lower the center-line temperature and, thereby, enhance power production capabilities and reduce the risk of premature fuel pellet failure. Crystalline silicon carbide has superior characteristics as a structural material from the viewpoint of its thermal and mechanical properties, thermal shock resistance, chemical stability, and low radioactivation. Therefore, there have been many efforts to develop SiC based composites in various forms for use in advanced energy systems. In recent years, with the development of high yield preceramic precursors, the polymer infiltration and pyrolysis (PIP) method has aroused interest for the fabrication of ceramic based materials, for various applications ranging from disc brakes to nuclear reactor fuels. The pyrolysis of preceramic polymers allow new types of ceramic materials to be processed at relatively low temperatures. The raw materials are element-organic polymers whose composition and architecture can be tailored and varied. The primary focus of this study is to use a pyrolysis based process to fabricate a host of novel silicon carbide-metal carbide or oxide composites, and to synthesize new materials based on mixed-metal silicocarbides that cannot be processed using conventional techniques. Allylhydridopolycarbosilane (AHPCS), which is an organometal polymer, was used as the precursor for silicon carbide. Inert gas pyrolysis of AHPCS produces near-stoichiometric amorphous

  11. Multi-Step Deep Reactive Ion Etching Fabrication Process for Silicon-Based Terahertz Components

    Science.gov (United States)

    Jung-Kubiak, Cecile (Inventor); Reck, Theodore (Inventor); Chattopadhyay, Goutam (Inventor); Perez, Jose Vicente Siles (Inventor); Lin, Robert H. (Inventor); Mehdi, Imran (Inventor); Lee, Choonsup (Inventor); Cooper, Ken B. (Inventor); Peralta, Alejandro (Inventor)

    2016-01-01

    A multi-step silicon etching process has been developed to fabricate silicon-based terahertz (THz) waveguide components. This technique provides precise dimensional control across multiple etch depths with batch processing capabilities. Nonlinear and passive components such as mixers and multipliers waveguides, hybrids, OMTs and twists have been fabricated and integrated into a small silicon package. This fabrication technique enables a wafer-stacking architecture to provide ultra-compact multi-pixel receiver front-ends in the THz range.

  12. Multichannel silicon WDM ring filters fabricated with DUV lithography

    Science.gov (United States)

    Lee, Jong-Moo; Park, Sahnggi; Kim, Gyungock

    2008-09-01

    We have fabricated 9-channel silicon wavelength-division-multiplexing (WDM) ring filters using 193 nm deep-ultraviolet (DUV) lithography and investigated the spectral properties of the ring filters by comparing the transmission spectra with and without an upper cladding. The average channel-spacing of the 9-channel WDM ring filter with a polymeric upper cladding is measured about 1.86 nm with the standard deviation of the channel-spacing about 0.34 nm. The channel crosstalk is about -30 dB, and the minimal drop loss is about 2 dB.

  13. Ordered silicon nanostructures for silicon-based photonics devices

    Czech Academy of Sciences Publication Activity Database

    Fojtík, A.; Valenta, J.; Pelant, Ivan; Kálal, M.; Fiala, P.

    2007-01-01

    Roč. 5, Suppl. (2007), S250-S253 ISSN 1671-7694 R&D Projects: GA AV ČR IAA1010316 Grant - others:GA MŠk(CZ) ME 933 Institutional research plan: CEZ:AV0Z10100521 Keywords : nanocrystals * silicon * self-assembled monolayers Subject RIV: BM - Solid Matter Physics ; Magnetism

  14. Advanced Silicone-based Coatings for Flexible Fabric Applications, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — Silicone coatings are the system of choice for inflatable fabrics used in several space, military, and consumer applications, including airbags, parachutes, rafts,...

  15. All silicon waveguide spherical microcavity coupler device.

    Science.gov (United States)

    Xifré-Pérez, E; Domenech, J D; Fenollosa, R; Muñoz, P; Capmany, J; Meseguer, F

    2011-02-14

    A coupler based on silicon spherical microcavities coupled to silicon waveguides for telecom wavelengths is presented. The light scattered by the microcavity is detected and analyzed as a function of the wavelength. The transmittance signal through the waveguide is strongly attenuated (up to 25 dB) at wavelengths corresponding to the Mie resonances of the microcavity. The coupling between the microcavity and the waveguide is experimentally demonstrated and theoretically modeled with the help of FDTD calculations.

  16. Memory characteristics of silicon nitride with silicon nanocrystals as a charge trapping layer of nonvolatile memory devices

    International Nuclear Information System (INIS)

    Choi, Sangmoo; Yang, Hyundeok; Chang, Man; Baek, Sungkweon; Hwang, Hyunsang; Jeon, Sanghun; Kim, Juhyung; Kim, Chungwoo

    2005-01-01

    Silicon nitride with silicon nanocrystals formed by low-energy silicon plasma immersion ion implantation has been investigated as a charge trapping layer of a polycrystalline silicon-oxide-nitride-oxide-silicon-type nonvolatile memory device. Compared with the control sample without silicon nanocrystals, silicon nitride with silicon nanocrystals provides excellent memory characteristics, such as larger width of capacitance-voltage hysteresis, higher program/erase speed, and lower charge loss rate at elevated temperature. These improved memory characteristics are derived by incorporation of silicon nanocrystals into the charge trapping layer as additional accessible charge traps with a deeper effective trap energy level

  17. Epitaxial III-V nanowires on silicon for vertical devices

    NARCIS (Netherlands)

    Bakkers, E.P.A.M.; Borgström, M.T.; Einden, Van Den W.; Weert, van M.H.M.; Helman, A.; Verheijen, M.A.

    2006-01-01

    We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the Vapor-Liquid-Solid (VLS) mechanism with laser ablation as well as metal organic vapor phase epitaxy. The VLS growth enables the fabrication of complex axial and radial

  18. The design and investigation of hybrid ferromagnetic/silicon spin electronic devices

    International Nuclear Information System (INIS)

    Pugh, D.I.

    2001-01-01

    The focus of this study concerns the design and investigation of ferromagnetic/silicon hybrid spin electronic devices as part of a wider project to design a novel spin valve transistor. The key issue to obtain a room temperature spin electronic device is the electrical injection of a spin polarised current from a ferromagnetic contact into a semiconductor. Despite many attempts concentrating on GaAs and InAs only small (< 1%) effects have been observed, making it difficult to confirm spin injection. Lateral devices were designed and fabricated using standard device fabrication procedures to produce arrays of Co/Si/So junctions. Subsequent designs aimed to reduce the number of junctions and improve device isolation. Evidence for spin dependent MR of up to 0.56% was observed in Co/p-Si/Co junctions with silicon gaps up to 16 μm in length. The maximum MR was observed when the first Co/Si Schottky barrier was reverse biased forming a high resistance interface. Vertical devices were designed in an attempt to eliminate any alternative current paths by using a well defined, 1 μm thick silicon membrane. Despite attempts to include oxide barriers, no spin dependent MR was observed in these devices. However, a novel vertical silicon based design has been made which should facilitate further advanced studies of spin injection and transport. The spin diffusion length in n-type silicon has been calculated as a function of doping concentration and temperature by considering the spin relaxation mechanisms in the semiconductor. Discussion has been made concerning p-type silicon and comparisons made with GaAs, indicating that n-Si should show longer spin diffusion lengths. The key design criteria for designing room temperature spin electronic devices have been highlighted. These include the use of a high leakage Schottky barrier or tunnel barrier between the ferromagnet and p-Si and a contact to the silicon to enable appropriate biasing to each FM/Si interface. (author)

  19. Fabrication and Mechanical Properties of Silicon Carbide Micropillars

    International Nuclear Information System (INIS)

    Shin, Chan Sun; Jin, Hyung Ha; Kwon, Jun Hyun; Kim, Don Jin

    2011-01-01

    Silicon carbide (SiC) has outstanding thermal and mechanical properties under high temperature and high neutron irradiation. SiC and SiC/SiC composites have been proposed as a promising candidate material for structural components in fusion reactors. Characterization of the mechanical properties such as fracture strength is important in ensuring the reliability of these ceramic structures. This study demonstrates a micro-compression test of SiC micropillars which are fabricated by mask and dryetching technique. Our fabrication method involves lithographic pattering of spun and baked photoresist on chemically vapor-deposited (CVD) polycrystalline beta-SiC substrates, followed by lift-off process of electroplated metal into the prescribed photoresist template. This metal works as an etch cap for inductively coupled plasma (ICP) etching. Our fabrication method enables the production of more than a few hundred micropillars under an identical fabrication condition, which is a great benefit for the statistical analysis of the fracture properties of brittle ceramic materials. The diameters of fabricated SiC micropillars range from 6 down to 0.5 μm. The ratio of micropillar diameter to height is set to 1:3 ∼ 1:4. Uniaxial compression tests have been conducted using flat punch nanoindentation at room temperature. We observed the specimen size effect on the measured fracture stress of SiC micropillars. In this paper we present the results of the micro-compression tests of SiC micropillars with the diameters of 0.8 and 2.6 μm

  20. Nonlinear Silicon Photonic Signal Processing Devices for Future Optical Networks

    Directory of Open Access Journals (Sweden)

    Cosimo Lacava

    2017-01-01

    Full Text Available In this paper, we present a review on silicon-based nonlinear devices for all optical nonlinear processing of complex telecommunication signals. We discuss some recent developments achieved by our research group, through extensive collaborations with academic partners across Europe, on optical signal processing using silicon-germanium and amorphous silicon based waveguides as well as novel materials such as silicon rich silicon nitride and tantalum pentoxide. We review the performance of four wave mixing wavelength conversion applied on complex signals such as Differential Phase Shift Keying (DPSK, Quadrature Phase Shift Keying (QPSK, 16-Quadrature Amplitude Modulation (QAM and 64-QAM that dramatically enhance the telecom signal spectral efficiency, paving the way to next generation terabit all-optical networks.

  1. Micro knife-edge optical measurement device in a silicon-on-insulator substrate.

    Science.gov (United States)

    Chiu, Yi; Pan, Jiun-Hung

    2007-05-14

    The knife-edge method is a commonly used technique to characterize the optical profiles of laser beams or focused spots. In this paper, we present a micro knife-edge scanner fabricated in a silicon-on-insulator substrate using the micro-electromechanical-system technology. A photo detector can be fabricated in the device to allow further integration with on-chip signal conditioning circuitry. A novel backside deep reactive ion etching process is proposed to solve the residual stress effect due to the buried oxide layer. Focused optical spot profile measurement is demonstrated.

  2. Fabrication of Porous Silicon Based Humidity Sensing Elements on Paper

    Directory of Open Access Journals (Sweden)

    Tero Jalkanen

    2015-01-01

    Full Text Available A roll-to-roll compatible fabrication process of porous silicon (pSi based sensing elements for a real-time humidity monitoring is described. The sensing elements, consisting of printed interdigitated silver electrodes and a spray-coated pSi layer, were fabricated on a coated paper substrate by a two-step process. Capacitive and resistive responses of the sensing elements were examined under different concentrations of humidity. More than a three orders of magnitude reproducible decrease in resistance was measured when the relative humidity (RH was increased from 0% to 90%. A relatively fast recovery without the need of any refreshing methods was observed with a change in RH. Humidity background signal and hysteresis arising from the paper substrate were dependent on the thickness of sensing pSi layer. Hysteresis in most optimal sensing element setup (a thick pSi layer was still noticeable but not detrimental for the sensing. In addition to electrical characterization of sensing elements, thermal degradation and moisture adsorption properties of the paper substrate were examined in connection to the fabrication process of the silver electrodes and the moisture sensitivity of the paper. The results pave the way towards the development of low-cost humidity sensors which could be utilized, for example, in smart packaging applications or in smart cities to monitor the environment.

  3. Movable MEMS Devices on Flexible Silicon

    KAUST Repository

    Ahmed, Sally

    2013-01-01

    Flexible electronics have gained great attention recently. Applications such as flexible displays, artificial skin and health monitoring devices are a few examples of this technology. Looking closely at the components of these devices, although MEMS

  4. The first results of siliconization on SWIP-RFP device

    International Nuclear Information System (INIS)

    Zhang Peng; Li Qiang; Luo Cuiwen; Li Jieping; Qian Shangjie; Fang Shuiquan; Yi Ping; Xue Jun; Li Kehua; Luo Junlin; Hong Wenyu; Cao Zeng; Zhang Nianman; Wang Quanming; Li Jie; Huang Ming; Zhong Yunze; Zhang Qingchun; Luo Cuixian

    1997-01-01

    The first results of reversed field pinch (RFP) and ultra low safety factor (ULQ) plasma experiments with siliconization on SWIP-RFP device are presented in this paper. The siliconization decreases the impurity concentrations in the plasma and increases the configuration sustainment time. Ion temperature has been estimated with the CV line of the visible light spectra and the broadening of CIII lines in vacuum ultraviolet (VUV) region. The anomalous ion heating as well as the anomalous resistance were observed. (orig.)

  5. David Adler Lectureship Award Talk: III-V Semiconductor Nanowires on Silicon for Future Devices

    Science.gov (United States)

    Riel, Heike

    Bottom-up grown nanowires are very attractive materials for direct integration of III-V semiconductors on silicon thus opening up new possibilities for the design and fabrication of nanoscale devices for electronic, optoelectronic as well as quantum information applications. Template-Assisted Selective Epitaxy (TASE) allows the well-defined and monolithic integration of complex III-V nanostructures and devices on silicon. Achieving atomically abrupt heterointerfaces, high crystal quality and control of dimension down to 1D nanowires enabled the demonstration of FETs and tunnel devices based on In(Ga)As and GaSb. Furthermore, the strong influence of strain on nanowires as well as results on quantum transport studies of InAs nanowires with well-defined geometry will be presented.

  6. Dual-side and three-dimensional microelectrode arrays fabricated from ultra-thin silicon substrates

    International Nuclear Information System (INIS)

    Du, Jiangang; Masmanidis, Sotiris C; Roukes, Michael L

    2009-01-01

    A method for fabricating planar implantable microelectrode arrays was demonstrated using a process that relied on ultra-thin silicon substrates, which ranged in thickness from 25 to 50 µm. The challenge of handling these fragile materials was met via a temporary substrate support mechanism. In order to compensate for putative electrical shielding of extracellular neuronal fields, separately addressable electrode arrays were defined on each side of the silicon device. Deep reactive ion etching was employed to create sharp implantable shafts with lengths of up to 5 mm. The devices were flip-chip bonded onto printed circuit boards (PCBs) by means of an anisotropic conductive adhesive film. This scalable assembly technique enabled three-dimensional (3D) integration through formation of stacks of multiple silicon and PCB layers. Simulations and measurements of microelectrode noise appear to suggest that low impedance surfaces, which could be formed by electrodeposition of gold or other materials, are required to ensure an optimal signal-to-noise ratio as well a low level of interchannel crosstalk

  7. Electrical device fabrication from nanotube formations

    Science.gov (United States)

    Nicholas, Nolan Walker; Kittrell, W. Carter; Kim, Myung Jong; Schmidt, Howard K.

    2013-03-12

    A method for forming nanotube electrical devices, arrays of nanotube electrical devices, and device structures and arrays of device structures formed by the methods. Various methods of the present invention allow creation of semiconducting and/or conducting devices from readily grown SWNT carpets rather than requiring the preparation of a patterned growth channel and takes advantage of the self-controlling nature of these carpet heights to ensure a known and controlled channel length for reliable electronic properties as compared to the prior methods.

  8. Nanowire-integrated microporous silicon membrane for continuous fluid transport in micro cooling device

    International Nuclear Information System (INIS)

    So, Hongyun; Pisano, Albert P.; Cheng, Jim C.

    2013-01-01

    We report an efficient passive micro pump system combining the physical properties of nanowires and micropores. This nanowire-integrated microporous silicon membrane was created to feed coolant continuously onto the surface of the wick in a micro cooling device to ensure it remains hydrated and in case of dryout, allow for regeneration of the system. The membrane was fabricated by photoelectrochemical etching to form micropores followed by hydrothermal growth of nanowires. This study shows a promising approach to address thermal management challenges for next generation electronic devices with absence of external power

  9. Electronic spectrum of a deterministic single-donor device in silicon

    International Nuclear Information System (INIS)

    Fuechsle, Martin; Miwa, Jill A.; Mahapatra, Suddhasatta; Simmons, Michelle Y.; Hollenberg, Lloyd C. L.

    2013-01-01

    We report the fabrication of a single-electron transistor (SET) based on an individual phosphorus dopant that is deterministically positioned between the dopant-based electrodes of a transport device in silicon. Electronic characterization at mK-temperatures reveals a charging energy that is very similar to the value expected for isolated P donors in a bulk Si environment. Furthermore, we find indications for bulk-like one-electron excited states in the co-tunneling spectrum of the device, in sharp contrast to previous reports on transport through single dopants

  10. Fabrication and evaluation of series-triple quantum dots by thermal oxidation of silicon nanowire

    International Nuclear Information System (INIS)

    Uchida, Takafumi; Jo, Mingyu; Tsurumaki-Fukuchi, Atsushi; Arita, Masashi; Takahashi, Yasuo; Fujiwara, Akira

    2015-01-01

    Series-connected triple quantum dots were fabricated by a simple two-step oxidation technique using the pattern-dependent oxidation of a silicon nanowire and an additional oxidation of the nanowire through the gap of the fine gates attached to the nanowire. The characteristics of multi-dot single-electron devices are obtained. The formation of each quantum dot beneath an attached gate is confirmed by analyzing the electrical characteristics and by evaluating the gate capacitances between all pairings of gates and quantum dots. Because the gate electrode is automatically attached to each dot, the device structure benefits from scalability. This technique promises integrability of multiple quantum dots with individual control gates

  11. Clear Castable Polyurethane Elastomer for Fabrication of Microfluidic Devices

    Science.gov (United States)

    Domansky, Karel; Leslie, Daniel C.; McKinney, James; Fraser, Jacob P.; Sliz, Josiah D.; Hamkins-Indik, Tiama; Hamilton, Geraldine A.; Bahinski, Anthony; Ingber, Donald E.

    2013-01-01

    Polydimethylsiloxane (PDMS) has numerous desirable properties for fabricating microfluidic devices, including optical transparency, flexibility, biocompatibility, and fabrication by casting; however, partitioning of small hydrophobic molecules into the bulk of PDMS hinders industrial acceptance of PDMS microfluidic devices for chemical processing and drug development applications. Here we describe an attractive alternative material that is similar to PDMS in terms of optical transparency, flexibility and castability, but that is also resistant to absorption of small hydrophobic molecules. PMID:23954953

  12. Magneto-optical non-reciprocal devices in silicon photonics

    Directory of Open Access Journals (Sweden)

    Yuya Shoji

    2014-01-01

    Full Text Available Silicon waveguide optical non-reciprocal devices based on the magneto-optical effect are reviewed. The non-reciprocal phase shift caused by the first-order magneto-optical effect is effective in realizing optical non-reciprocal devices in silicon waveguide platforms. In a silicon-on-insulator waveguide, the low refractive index of the buried oxide layer enhances the magneto-optical phase shift, which reduces the device footprints. A surface activated direct bonding technique was developed to integrate a magneto-optical garnet crystal on the silicon waveguides. A silicon waveguide optical isolator based on the magneto-optical phase shift was demonstrated with an optical isolation of 30 dB and insertion loss of 13 dB at a wavelength of 1548 nm. Furthermore, a four port optical circulator was demonstrated with maximum isolations of 15.3 and 9.3 dB in cross and bar ports, respectively, at a wavelength of 1531 nm.

  13. Electron beam fabrication of a microfluidic device for studying submicron-scale bacteria

    Science.gov (United States)

    2013-01-01

    Background Controlled restriction of cellular movement using microfluidics allows one to study individual cells to gain insight into aspects of their physiology and behaviour. For example, the use of micron-sized growth channels that confine individual Escherichia coli has yielded novel insights into cell growth and death. To extend this approach to other species of bacteria, many of whom have dimensions in the sub-micron range, or to a larger range of growth conditions, a readily-fabricated device containing sub-micron features is required. Results Here we detail the fabrication of a versatile device with growth channels whose widths range from 0.3 μm to 0.8 μm. The device is fabricated using electron beam lithography, which provides excellent control over the shape and size of different growth channels and facilitates the rapid-prototyping of new designs. Features are successfully transferred first into silicon, and subsequently into the polydimethylsiloxane that forms the basis of the working microfluidic device. We demonstrate that the growth of sub-micron scale bacteria such as Lactococcus lactis or Escherichia coli cultured in minimal medium can be followed in such a device over several generations. Conclusions We have presented a detailed protocol based on electron beam fabrication together with specific dry etching procedures for the fabrication of a microfluidic device suited to study submicron-sized bacteria. We have demonstrated that both Gram-positive and Gram-negative bacteria can be successfully loaded and imaged over a number of generations in this device. Similar devices could potentially be used to study other submicron-sized organisms under conditions in which the height and shape of the growth channels are crucial to the experimental design. PMID:23575419

  14. Fabrication of a Silicon Nanowire on a Bulk Substrate by Use of a Plasma Etching and Total Ionizing Dose Effects on a Gate-All-Around Field-Effect Transistor

    Science.gov (United States)

    Moon, Dong-Il; Han, Jin-Woo; Meyyappan, Meyya

    2016-01-01

    The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.

  15. Selective laser etching or ablation for fabrication of devices

    KAUST Repository

    Buttner, Ulrich

    2017-01-12

    Methods of fabricating devices vial selective laser etching are provided. The methods can include selective laser etching of a portion of a metal layer, e.g. using a laser light source having a wavelength of 1,000 nm to 1,500 nm. The methods can be used to fabricate a variety of features, including an electrode, an interconnect, a channel, a reservoir, a contact hole, a trench, a pad, or a combination thereof. A variety of devices fabricated according to the methods are also provided. In some aspects, capacitive humidity sensors are provided that can be fabricated according to the provided methods. The capacitive humidity sensors can be fabricated with intricate electrodes, e.g. having a fractal pattern such as a Peano curve, a Hilbert curve, a Moore curve, or a combination thereof.

  16. Silicon-based photonic crystals fabricated using proton beam writing combined with electrochemical etching method.

    Science.gov (United States)

    Dang, Zhiya; Breese, Mark Bh; Recio-Sánchez, Gonzalo; Azimi, Sara; Song, Jiao; Liang, Haidong; Banas, Agnieszka; Torres-Costa, Vicente; Martín-Palma, Raúl José

    2012-07-23

    A method for fabrication of three-dimensional (3D) silicon nanostructures based on selective formation of porous silicon using ion beam irradiation of bulk p-type silicon followed by electrochemical etching is shown. It opens a route towards the fabrication of two-dimensional (2D) and 3D silicon-based photonic crystals with high flexibility and industrial compatibility. In this work, we present the fabrication of 2D photonic lattice and photonic slab structures and propose a process for the fabrication of 3D woodpile photonic crystals based on this approach. Simulated results of photonic band structures for the fabricated 2D photonic crystals show the presence of TE or TM gap in mid-infrared range.

  17. Customizable in situ TEM devices fabricated in freestanding membranes by focused ion beam milling

    International Nuclear Information System (INIS)

    Lei, Anders; Petersen, Dirch Hjorth; Booth, Timothy John; Homann, Lasse Vinther; Kallesoe, Christian; Sukas, Ozlem Sardan; Molhave, Kristian; Boggild, Peter; Gyrsting, Yvonne

    2010-01-01

    Nano- and microelectromechanical structures for in situ operation in a transmission electron microscope (TEM) were fabricated with a turnaround time of 20 min and a resolution better than 100 nm. The structures are defined by focused ion beam (FIB) milling in 135 nm thin membranes of single crystalline silicon extending over the edge of a pre-fabricated silicon microchip. Four-terminal resistance measurements of FIB-defined nanowires showed at least two orders of magnitude increase in resistivity compared to bulk. We show that the initial high resistance is due to amorphization of silicon, and that current annealing recrystallizes the structure, causing the electrical properties to partly recover to the pristine bulk resistivity. In situ imaging of the annealing process revealed both continuous and abrupt changes in the crystal structure, accompanied by instant changes of the electrical conductivity. The membrane structures provide a simple way to design electron-transparent nanodevices with high local temperature gradients within the field of view of the TEM, allowing detailed studies of surface diffusion processes. We show two examples of heat-induced coarsening of gold on a narrow freestanding bridge, where local temperature gradients are controlled via the electrical current paths. The separation of device processing into a one-time batch-level fabrication of identical, generic membrane templates, and subsequent device-specific customization by FIB milling, provides unparalleled freedom in device layout combined with very short effective fabrication time. This approach significantly speeds up prototyping of nanodevices such as resonators, actuators, sensors and scanning probes with state-of-art resolution.

  18. Customizable in situ TEM devices fabricated in freestanding membranes by focused ion beam milling

    Energy Technology Data Exchange (ETDEWEB)

    Lei, Anders; Petersen, Dirch Hjorth; Booth, Timothy John; Homann, Lasse Vinther; Kallesoe, Christian; Sukas, Ozlem Sardan; Molhave, Kristian; Boggild, Peter [DTU Nanotech, Department of Nano- and Microtechnology, Technical University of Denmark, DK-2800 Kongens Lyngby (Denmark); Gyrsting, Yvonne, E-mail: Anders.Lei@nanotech.dtu.dk [DTU Danchip, National Center for Micro- and Nanofabrication, Technical University of Denmark, DK-2800 Kongens Lyngby (Denmark)

    2010-10-08

    Nano- and microelectromechanical structures for in situ operation in a transmission electron microscope (TEM) were fabricated with a turnaround time of 20 min and a resolution better than 100 nm. The structures are defined by focused ion beam (FIB) milling in 135 nm thin membranes of single crystalline silicon extending over the edge of a pre-fabricated silicon microchip. Four-terminal resistance measurements of FIB-defined nanowires showed at least two orders of magnitude increase in resistivity compared to bulk. We show that the initial high resistance is due to amorphization of silicon, and that current annealing recrystallizes the structure, causing the electrical properties to partly recover to the pristine bulk resistivity. In situ imaging of the annealing process revealed both continuous and abrupt changes in the crystal structure, accompanied by instant changes of the electrical conductivity. The membrane structures provide a simple way to design electron-transparent nanodevices with high local temperature gradients within the field of view of the TEM, allowing detailed studies of surface diffusion processes. We show two examples of heat-induced coarsening of gold on a narrow freestanding bridge, where local temperature gradients are controlled via the electrical current paths. The separation of device processing into a one-time batch-level fabrication of identical, generic membrane templates, and subsequent device-specific customization by FIB milling, provides unparalleled freedom in device layout combined with very short effective fabrication time. This approach significantly speeds up prototyping of nanodevices such as resonators, actuators, sensors and scanning probes with state-of-art resolution.

  19. Fabrication of heterojunction solar cells by using microcrystalline hydrogenated silicon oxide film as an emitter

    International Nuclear Information System (INIS)

    Banerjee, Chandan; Sritharathikhun, Jaran; Konagai, Makoto; Yamada, Akira

    2008-01-01

    Wide gap, highly conducting n-type hydrogenated microcrystalline silicon oxide (μc-SiO : H) films were prepared by very high frequency plasma enhanced chemical vapour deposition at a very low substrate temperature (170 deg. C) as an alternative to amorphous silicon (a-Si : H) for use as an emitter layer of heterojunction solar cells. The optoelectronic properties of n-μc-SiO : H films prepared for the emitter layer are dark conductivity = 0.51 S cm -1 at 20 nm thin film, activation energy = 23 meV and E 04 = 2.3 eV. Czochralski-grown 380 μm thick p-type (1 0 0) oriented polished silicon wafers with a resistivity of 1-10 Ω cm were used for the fabrication of heterojunction solar cells. Photovoltaic parameters of the device were found to be V oc = 620 mV, J sc = 32.1 mA cm -2 , FF = 0.77, η = 15.32% (active area efficiency)

  20. Fabrication of Up-Conversion Phosphor Films on Flexible Substrates Using a Nanostructured Organo-Silicon.

    Science.gov (United States)

    Jeon, Young-Sun; Kim, Tae-Un; Kim, Seon-Hoon; Lee, Young-Hwan; Choi, Pil-Son; Hwang, Kyu-Seog

    2018-03-01

    Up-conversion phosphors have attracted considerable attention because of their applications in solid-state lasers, optical communications, flat-panel displays, photovoltaic cells, and biological labels. Among them, NaYF4 is reported as one of the most efficient hosts for infrared to visible photon up-conversion of Yb3+ and Er3+ ions. However, a low-temperature method is required for industrial scale fabrication of photonic and optoelectronic devices on flexible organic substrates. In this study, hexagonal β-NaYF4: 3 mol% Yb3+, 3 mol% Er3+ up-conversion phosphor using Ca2+ was prepared by chemical solution method. Then, we synthesized a nanostructured organo-silicon compound from methyl tri-methoxysilane and 3-glycidoxy-propyl-trimethoxy-silane. The transmittance of the organo-silicon compound was found to be over 90% in the wavelength range of 400~1500 nm. Then we prepared a fluoride-based phosphor paste by mixing the organo-silicon compound with Na(Ca)YF4:Yb3+, Er3+. Subsequently, this paste was coated on polyethylene terephthalate, followed by heat-treatment at 120 °C. The visible emission of the infrared detection card was found to be at 655 nm and 661 nm an excitation wavelength of 980 nm.

  1. Optical Biosensors: A Revolution Towards Quantum Nanoscale Electronics Device Fabrication

    Directory of Open Access Journals (Sweden)

    D. Dey

    2011-01-01

    Full Text Available The dimension of biomolecules is of few nanometers, so the biomolecular devices ought to be of that range so a better understanding about the performance of the electronic biomolecular devices can be obtained at nanoscale. Development of optical biomolecular device is a new move towards revolution of nano-bioelectronics. Optical biosensor is one of such nano-biomolecular devices that has a potential to pave a new dimension of research and device fabrication in the field of optical and biomedical fields. This paper is a very small report about optical biosensor and its development and importance in various fields.

  2. Thin film silicon by a microwave plasma deposition technique: Growth and devices, and, interface effects in amorphous silicon/crystalline silicon solar cells

    Science.gov (United States)

    Jagannathan, Basanth

    Thin film silicon (Si) was deposited by a microwave plasma CVD technique, employing double dilution of silane, for the growth of low hydrogen content Si films with a controllable microstructure on amorphous substrates at low temperatures (prepared by this technique. Such films showed a dark conductivity ˜10sp{-6} S/cm, with a conduction activation energy of 0.49 eV. Film growth and properties have been compared for deposition in Ar and He carrier systems and growth models have been proposed. Low temperature junction formation by undoped thin film silicon was examined through a thin film silicon/p-type crystalline silicon heterojunctions. The thin film silicon layers were deposited by rf glow discharge, dc magnetron sputtering and microwave plasma CVD. The hetero-interface was identified by current transport analysis and high frequency capacitance methods as the key parameter controlling the photovoltaic (PV) response. The effect of the interface on the device properties (PV, junction, and carrier transport) was examined with respect to modifications created by chemical treatment, type of plasma species, their energy and film microstructure interacting with the substrate. Thermally stimulated capacitance was used to determine the interfacial trap parameters. Plasma deposition of thin film silicon on chemically clean c-Si created electron trapping sites while hole traps were seen when a thin oxide was present at the interface. Under optimized conditions, a 10.6% efficient cell (11.5% with SiOsb2 A/R) with an open circuit voltage of 0.55 volts and a short circuit current density of 30 mA/cmsp2 was fabricated.

  3. A silicon-on-insulator vertical nanogap device for electrical transport measurements in aqueous electrolyte solution

    Energy Technology Data Exchange (ETDEWEB)

    Strobel, Sebastian [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany); Arinaga, Kenji [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany); Hansen, Allan [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany); Tornow, Marc [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany)

    2007-07-25

    A novel concept for metal electrodes with few 10 nm separation for electrical conductance measurements in an aqueous electrolyte environment is presented. Silicon-on-insulator (SOI) material with 10 nm buried silicon dioxide serves as a base substrate for the formation of SOI plateau structures which, after recess-etching the thin oxide layer, thermal oxidation and subsequent metal thin film evaporation, feature vertically oriented nanogap electrodes at their exposed sidewalls. During fabrication only standard silicon process technology without any high-resolution nanolithographic techniques is employed. The vertical concept allows an array-like parallel processing of many individual devices on the same substrate chip. As analysed by cross-sectional TEM analysis the devices exhibit a well-defined material layer architecture, determined by the chosen material thicknesses and process parameters. To investigate the device in aqueous solution, we passivated the sample surface by a polymer layer, leaving a micrometre-size fluid access window to the nanogap region only. First current-voltage characteristics of a 65 nm gap device measured in 60 mM buffer solution reveal excellent electrical isolation behaviour which suggests applications in the field of biomolecular electronics in a natural environment.

  4. Silicon integrated circuits advances in materials and device research

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Silicon Integrated Circuits, Part B covers the special considerations needed to achieve high-power Si-integrated circuits. The book presents articles about the most important operations needed for the high-power circuitry, namely impurity diffusion and oxidation; crystal defects under thermal equilibrium in silicon and the development of high-power device physics; and associated technology. The text also describes the ever-evolving processing technology and the most promising approaches, along with the understanding of processing-related areas of physics and chemistry. Physicists, chemists, an

  5. Fabrication and Characterization of Silicon Carbide Epoxy Composites

    Science.gov (United States)

    Townsend, James

    Nanoscale fillers can significantly enhance the performance of composites by increasing the extent of filler-to-matrix interaction. Thus far, the embedding of nanomaterials into composites has been achieved, but the directional arrangement has proved to be a challenging task. Even with advances in in-situ and shear stress induced orientation, these methods are both difficult to control and unreliable. Therefore, the fabrication of nanomaterials with an ability to orient along a magnetic field is a promising pathway to create highly controllable composite systems with precisely designed characteristics. To this end, the goal of this dissertation is to develop magnetically active nanoscale whiskers and study the effect of the whiskers orientation in a polymer matrix on the nanocomposite's behavior. Namely, we report the surface modification of silicon carbide whiskers (SiCWs) with magnetic nanoparticles and fabrication of SiC/epoxy composite materials. The magnetic nanoparticles attachment to the SiCWs was accomplished using polyelectrolyte polymer-to-polymer complexation. The "grafting to" and adsorption techniques were used to attach the polyelectrolytes to the surface of the SiCWs and magnetic nanoparticles. The anchored polyelectrolytes were polyacrylic acid (PAA) and poly(2-vinylpyridine) (P2VP). Next, the SiC/epoxy composites incorporating randomly oriented and magnetically oriented whiskers were fabricated. The formation of the composite was studied to determine the influence of the whiskers' surface composition on the epoxy curing reaction. After curing, the composites' thermal and thermo-mechanical properties were studied. These properties were related to the dispersion and orientation of the fillers in the composite samples. The obtained results indicated that the thermal and thermo-mechanical properties could be improved by orienting magnetically-active SiCWs inside the matrix. Silanization, "grafting to", adsorption, and complexation were used to modify

  6. CMOS-compatible fabrication of top-gated field-effect transistor silicon nanowire-based biosensors

    International Nuclear Information System (INIS)

    Ginet, Patrick; Akiyama, Sho; Takama, Nobuyuki; Fujita, Hiroyuki; Kim, Beomjoon

    2011-01-01

    Field-effect transistor (FET) nanowire-based biosensors are very promising tools for medical diagnosis. In this paper, we introduce a simple method to fabricate FET silicon nanowires using only standard microelectromechanical system (MEMS) processes. The key steps of our fabrication process were a local oxidation of silicon (LOCOS) and anisotropic KOH etchings that enabled us to reduce the width of the initial silicon structures from 10 µm to 170 nm. To turn the nanowires into a FET, a top-gate electrode was patterned in gold next to them in order to apply the gate voltage directly through the investigated liquid environment. An electrical characterization demonstrated the p-type behaviour of the nanowires. Preliminary chemical sensing tested the sensitivity to pH of our device. The effect of the binding of streptavidin on biotinylated nanowires was monitored in order to evaluate their biosensing ability. In this way, streptavidin was detected down to a 100 ng mL −1 concentration in phosphate buffered saline by applying a gate voltage less than 1.2 V. The use of a top-gate electrode enabled the detection of biological species with only very low voltages that were compatible with future handheld-requiring applications. We thus demonstrated the potential of our devices and their fabrication as a solution for the mass production of efficient and reliable FET nanowire-based biological sensors

  7. Device Fabrication and Probing of Discrete Carbon Nanostructures

    KAUST Repository

    Batra, Nitin M

    2015-05-06

    Device fabrication on multi walled carbon nanotubes (MWCNTs) using electrical beam lithography (EBL), electron beam induced deposition (EBID), ion beam induced deposition (IBID) methods was carried out, followed by device electrical characterization using a conventional probe station. A four-probe configuration was utilized to measure accurately the electrical resistivity of MWCNTs with similar results obtained from devices fabricated by different methods. In order to reduce the contact resistance of the beam deposited platinum electrodes, single step vacuum thermal annealing was performed. Microscopy and spectroscopy were carried out on the beam deposited electrodes to follow the structural and chemical changes occurring during the vacuum thermal annealing. For the first time, a core-shell type structure was identified on EBID Pt and IBID Pt annealed electrodes and analogous free standing nanorods previously exposed to high temperature. We believe this observation has important implications for transport properties studies of carbon materials. Apart from that, contamination of carbon nanostructure, originating from the device fabrication methods, was also studied. Finally, based on the observations of faster processing time together with higher yield and flexibility for device preparation, we investigated EBID to fabricate devices for other discrete carbon nanostructures.

  8. Self-consistent modeling of amorphous silicon devices

    International Nuclear Information System (INIS)

    Hack, M.

    1987-01-01

    The authors developed a computer model to describe the steady-state behaviour of a range of amorphous silicon devices. It is based on the complete set of transport equations and takes into account the important role played by the continuous distribution of localized states in the mobility gap of amorphous silicon. Using one set of parameters they have been able to self-consistently simulate the current-voltage characteristics of p-i-n (or n-i-p) solar cells under illumination, the dark behaviour of field-effect transistors, p-i-n diodes and n-i-n diodes in both the ohmic and space charge limited regimes. This model also describes the steady-state photoconductivity of amorphous silicon, in particular, its dependence on temperature, doping and illumination intensity

  9. Low-Cost, Silicon Carbide Replication Technique for LWIR Mirror Fabrication, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — SSG proposes an innovative optical manufacturing approach that will enable the low-cost fabrication of lightweighted, Long Wave Infrared (LWIR) Silicon Carbide (SiC)...

  10. Fabricating a silicon nanowire by using the proximity effect in electron beam lithography for investigation of the Coulomb blockade effect

    International Nuclear Information System (INIS)

    Zhang Xiangao; Fang Zhonghui; Chen Kunji; Xu Jun; Huang Xinfan

    2011-01-01

    We present an approach to fabricate a silicon nanowire relying on the proximity effect in electron beam lithography with a low acceleration voltage system by designing the exposure patterns with a rhombus sandwiched between two symmetric wedges. The reproducibility is investigated by changing the number of rhombuses. A device with a silicon nanowire is constructed on a highly doped silicon-on-insulator wafer to measure the electronic transport characteristics. Significant nonlinear behavior of current-voltage curves is observed at up to 150 K. The dependence of current on the drain voltage and back-gate voltage shows Coulomb blockade oscillations at 5.4 K, revealing a Coulomb island naturally formed in the nanowire. The mechanism of formation of the Coulomb island is discussed.

  11. Aligned carbon nanotubes. Physics, concepts, fabrication and devices

    Energy Technology Data Exchange (ETDEWEB)

    Ren, Zhifeng; Lan, Yucheng [Boston College, Chestnut Hill, MA (United States). Dept. of Physics; Wang, Yang [South China Normal Univ. Guangzhou (China). Inst. for Advanced Materials

    2013-07-01

    This book gives a survey of the physics and fabrication of carbon nanotubes and their applications in optics, electronics, chemistry and biotechnology. It focuses on the structural characterization of various carbon nanotubes, fabrication of vertically or parallel aligned carbon nanotubes on substrates or in composites, physical properties for their alignment, and applications of aligned carbon nanotubes in field emission, optical antennas, light transmission, solar cells, chemical devices, bio-devices, and many others. Major fabrication methods are illustrated in detail, particularly the most widely used PECVD growth technique on which various device integration schemes are based, followed by applications such as electrical interconnects, nanodiodes, optical antennas, and nanocoax solar cells, whereas current limitations and challenges are also be discussed to lay the foundation for future developments.

  12. Fabrication of High-Frequency pMUT Arrays on Silicon Substrates

    DEFF Research Database (Denmark)

    Pedersen, Thomas; Zawada, Tomasz; Hansen, Karsten

    2010-01-01

    A novel technique based on silicon micromachining for fabrication of linear arrays of high-frequency piezoelectric micromachined ultrasound transducers (pMUT) is presented. Piezoelectric elements are formed by deposition of lead zirconia titanate into etched features of a silicon substrate...

  13. Fabrication of the similar porous alumina silicon template for soft UV nanoimprint lithography

    Energy Technology Data Exchange (ETDEWEB)

    Sun, Tangyou [Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074 (China); Xu, Zhimou, E-mail: xuzhimou@mail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074 (China); Zhao, Wenning; Wu, Xinghui; Liu, Sisi; Zhang, Zheng; Wang, Shuangbao; Liu, Wen [Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074 (China); Liu, Shiyuan [State Key Laboratory of Digital Manufacturing Equipment and Technology, Huazhong University of Science and Technology, Wuhan 430074 (China); Peng, Jing [College of Sciences, Wuhan University of Science and Technology, Wuhan 430081 (China)

    2013-07-01

    High density honeycombed nanostructures of porous alumina template (PAT) have been widely used to the fabrication of various electronic, optoelectronic, magnetic, and energy storage devices. However, patterning structures at sub-100 nm feature size with large area and low cost is of great importance and hardness on which semiconductor manufacture technology depends. In this paper, soft UV nanoimprint lithography (SUNIL) by using PAT as the initial mold is studied in detail. The results reveal a significant incompatibility between these two candidates. The native nonflatness of the PAT surface is about 100 nm in the range of 2–5 μm. Resist detaches from the substrate because of the mold deformation in the nonflat SUNIL. A two-inch similar porous alumina silicon (Si) template with nanopore size of 50–100 nm is fabricated. I–t curve conducted anodization and subsequent inductive coupled plasma (ICP) dry etching are applied to ensure the uniformity of the fabricated template. The surface flatness of the similar porous alumina Si template is the same as the polished Si wafer, which perfectly matches NIL.

  14. Fabrication Method for LOBSTER-Eye Optics in Silicon

    Science.gov (United States)

    Chervenak, James; Collier, Michael; Mateo, Jennette

    2013-01-01

    Soft x-ray optics can use narrow slots to direct x-rays into a desirable pattern on a focal plane. While square-pack, square-pore, slumped optics exist for this purpose, they are costly. Silicon (Si) is being examined as a possible low-cost replacement. A fabrication method was developed for narrow slots in Si demonstrating the feasibility of stacked slot optics to replace micropores. Current micropore optics exist that have 20-micron-square pores on 26-micron pitch in glass with a depth of 1 mm and an extent of several square centimeters. Among several proposals to emulate the square pore optics are stacked slot chips with etched vertical slots. When the slots in the stack are positioned orthogonally to each other, the component will approach the soft x-ray focusing observed in the micropore optics. A specific improvement Si provides is that it can have narrower sidewalls between slots to permit greater throughput of x-rays through the optics. In general, Si can have more variation in slot geometry (width, length). Further, the sidewalls can be coated with high-Z materials to enhance reflection and potentially reduce the surface roughness of the reflecting surface. Narrow, close-packed deep slots in Si have been produced using potassium hydroxide (KOH) etching and a patterned silicon nitride (SiN) mask. The achieved slot geometries have sufficient wall smoothness, as observed through scanning electron microscope (SEM) imaging, to enable evaluation of these slot plates as an optical element for soft x-rays. Etches of different angles to the crystal plane of Si were evaluated to identify a specific range of etch angles that will enable low undercut slots in the Si material. These slots with the narrow sidewalls are demonstrated to several hundred microns in depth, and a technical path to 500-micron deep slots in a precision geometry of narrow, closepacked slots is feasible. Although intrinsic stress in ultrathin wall Si is observed, slots with walls approaching 1

  15. Numerical study of self-heating effects of small-size MOSFETs fabricated on silicon-on-aluminum nitride substrate

    International Nuclear Information System (INIS)

    Ding Yanfang; Zhu Ziqiang; Zhu Ming; Lin Chenglu

    2006-01-01

    Compared with bulk-silicon technology, silicon-on-insulator (SOI) technology possesses many advantages but it is inevitable that the buried silicon dioxide layer also thermally insulates the metal-oxide-silicon field-effect transistors (MOSFETs) from the bulk due to the low thermal conductivity. One of the alternative insulator to replace the buried oxide layer is aluminum nitride (MN), which has a thermal conductivity that is about 200 times higher than that of SiO 2 (320 W·m -1 ·K -1 versus 1.4 W·m -1 ·K -l ). To investigate the self-heating effects of small-size MOSFETs fabricated on silicon-on-aluminum nitride (SOAN) substrate, a two-dimensional numerical analysis is performed by using a device simulator called MEDICI run on a Solaris workstation to simulate the electrical characteristics and temperature distribution by comparing with those of bulk and standard SOI MOSFETs. Our study suggests that AIN is a suitable alternative to silicon dioxide as a buried dielectric in SOI and expands the applications of SOI to high temperature conditions. (authors)

  16. Mass production compatible fabrication techniques of single-crystalline silver metamaterials and plasmonics devices

    Science.gov (United States)

    Rodionov, Ilya A.; Baburin, Alexander S.; Zverev, Alexander V.; Philippov, Ivan A.; Gabidulin, Aidar R.; Dobronosova, Alina A.; Ryzhova, Elena V.; Vinogradov, Alexey P.; Ivanov, Anton I.; Maklakov, Sergey S.; Baryshev, Alexander V.; Trofimov, Igor V.; Merzlikin, Alexander M.; Orlikovsky, Nikolay A.; Rizhikov, Ilya A.

    2017-08-01

    During last 20 years, great results in metamaterials and plasmonic nanostructures fabrication were obtained. However, large ohmic losses in metals and mass production compatibility still represent the most serious challenge that obstruct progress in the fields of metamaterials and plasmonics. Many recent research are primarily focused on developing low-loss alternative materials, such as nitrides, II-VI semiconductor oxides, high-doped semiconductors, or two-dimensional materials. In this work, we demonstrate that our perfectly fabricated silver films can be an effective low-loss material system, as theoretically well-known. We present a fabrication technology of plasmonic and metamaterial nanodevices on transparent (quartz, mica) and non-transparent (silicon) substrates by means of e-beam lithography and ICP dry etch instead of a commonly-used focused ion beam (FIB) technology. We eliminate negative influence of litho-etch steps on silver films quality and fabricate square millimeter area devices with different topologies and perfect sub-100 nm dimensions reproducibility. Our silver non-damage fabrication scheme is tested on trial manufacture of spasers, plasmonic sensors and waveguides, metasurfaces, etc. These results can be used as a flexible device manufacture platform for a broad range of practical applications in optoelectronics, communications, photovoltaics and biotechnology.

  17. A capillary pumping device utilizing super-hydrophobic silicon grass

    International Nuclear Information System (INIS)

    Kung, Chun-Fei; Chang, Chien-Cheng; Chu, Chin-Chou

    2011-01-01

    In this study, we show that a compact silicon grass surface can be generated by utilizing the induced coupled plasma method with suitably chosen fabrication parameters. This super-hydrophobic structure suspends deionized water on top of the grass and keeps the contact angle at around 153°. The silicon grass is used to improve the driving efficiency of a capillary pumping micro-duct (without sidewalls), which is completely defined by a bottom hydrophilic stripe (adjacent to a Teflon substrate) and a fully top-covered hydrophobic Teflon surface which is coated on a glass substrate. The channel has a height of 3 µm and a width of 100 µm. In this work, the Teflon substrate is replaced with the silicon grass surface. When the fluid is flowing through the micro-duct on the stripe, the interface between the silicon grass and the hydrophilic stripe forms a stable air cushion barrier to the fluid, thus effectively reducing the frictional force. By changing only the interface with this replacement, we demonstrate that the average measured velocities of the new design show improvements of 21% and 17% in the driving efficiency over the original design for transporting deionized water and human blood, respectively. It is also shown that the measured data of the present design are closer to the values predicted by a theoretical analysis which relates the flow velocity to the contact angles, surface tension and fluid viscosity

  18. Optimized optical devices for edge-coupling-enabled silicon photonics platform

    Science.gov (United States)

    Png, Ching Eng; Ang, Thomas Y. L.; Ong, Jun Rong; Lim, Soon Thor; Sahin, Ezgi; Chen, G. F. R.; Tan, D. T. H.; Guo, Tina X.; Wang, Hong

    2018-02-01

    We present a library of high-performance passive and active silicon photonic devices at the C-band that is specifically designed and optimized for edge-coupling-enabled silicon photonics platform. These devices meet the broadband (100 nm), low-loss (= 25 Gb/s), and polarization diversity requirements (TE and TM polarization extinction ratio beam splitters (PBSs), and high-speed modulators are some of the devices within our library. In particular, we have designed and fabricated inverse taper fiber-to-waveguide edge couplers of tip widths ranging from 120 nm to 200 nm, and we obtained a low coupling loss of 1.80+/-0.28 dB for 160 nm tip width. To achieve polarization diversity operation for inverse tapers, we have experimentally realized different designs of polarization beam splitters (PBS). Our optimized PBS has a measured extinction ratio of <= 25 dB for both the quasiTE modes, and quasi-TM modes. Additionally, a broadband (100 nm) directional coupler with a 50/50 power splitting ratio was experimentally realized on a small footprint of 20×3 μm2 . Last but not least, high-speed silicon modulators with a range of carrier doping concentrations and offset of the PN junction can be used to optimise the modulation efficiency, and insertion losses for operation at 25 GHz.

  19. Fabrication of novel AFM probe with high-aspect-ratio ultra-sharp three-face silicon nitride tips

    NARCIS (Netherlands)

    Vermeer, Rolf; Berenschot, Johan W.; Sarajlic, Edin; Tas, Niels Roelof; Jansen, Henricus V.

    In this paper we present the wafer-scale fabrication of molded AFM probes with high aspect ratio ultra-sharp three-plane silicon nitride tips. Using $\\langle$111$\\rangle$ silicon wafers a dedicated process is developed to fabricate molds in the silicon wafer that have a flat triangular bottom

  20. Fabrication of quantum-dot devices in graphene

    Directory of Open Access Journals (Sweden)

    Satoshi Moriyama, Yoshifumi Morita, Eiichiro Watanabe, Daiju Tsuya, Shinya Uji, Maki Shimizu and Koji Ishibashi

    2010-01-01

    Full Text Available We describe our recent experimental results on the fabrication of quantum-dot devices in a graphene-based two-dimensional system. Graphene samples were prepared by micromechanical cleavage of graphite crystals on a SiO2/Si substrate. We performed micro-Raman spectroscopy measurements to determine the number of layers of graphene flakes during the device fabrication process. By applying a nanofabrication process to the identified graphene flakes, we prepared a double-quantum-dot device structure comprising two lateral quantum dots coupled in series. Measurements of low-temperature electrical transport show the device to be a series-coupled double-dot system with varied interdot tunnel coupling, the strength of which changes continuously and non-monotonically as a function of gate voltage.

  1. Carbon material based microelectromechanical system (MEMS): Fabrication and devices

    Science.gov (United States)

    Xu, Wenjun

    silicon and metal based microsystems. In this thesis, this mature technique was exploited to generate a variety of microelectrode structures to facilitate the micropatterning and manipulation of the CNTs. Selective deposition of electrically charged CNTs onto desired locations was realized in an EPD process through patterning of electric field lines created by the microelectrodes fabricated through MEMS techniques. A variety of 2-D and 3-D micropatterns of CNTs with waferscale areas have been successfully achieved in both rigid and elastic systems. The thickness and morphology of the generated CNT patterns was found to be readily controllable through the parameters of the fabrication process. Studies also showed that for this technique, high surface hydrophobicity of the non-conductive regions in microstructures was critical to accomplish well-defined selective micropatterning of CNTs. Upon clearing the hurdles of the CNT manipulation, a patterned PDMS/CNT nanocomposite was fabricated through the aforementioned approach and was incorporated, investigated and validated in elastic force/strain microsensors. The gauge factor of the sensor exhibited a strong dependence on both the initial resistance of the device and the applied strain. Detailed analysis of the data suggests that the piezoresistive effect of this specially constructed bi-layer composite could be due to three mechanisms, and the sensing mechanism may vary when physical properties of the CNT network embedded in the polymer matrix alter. The feasibility of the PDSM/CNT composite being utilized as an elastic electret was further explored. The nanocomposite composed of these two non-traditional electret materials exhibited electret characteristics with reasonable charge storage stability when charged using a corona discharge. The power generation capacity of the corona-charged composite has been characterized and successfully demonstrated in both a ball drop experiment and cyclic mechanical load experiments

  2. Silicon analog components device design, process integration, characterization, and reliability

    CERN Document Server

    El-Kareh, Badih

    2015-01-01

    This book covers modern analog components, their characteristics, and interactions with process parameters. It serves as a comprehensive guide, addressing both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. Based on the authors’ extensive experience in the development of analog devices, this book is intended for engineers and scientists in semiconductor research, development and manufacturing. The problems at the end of each chapter and the numerous charts, figures and tables also make it appropriate for use as a text in graduate and advanced undergraduate courses in electrical engineering and materials science.

  3. Fabrication and electrical characterization of polyaniline-silicon heterojunction for gamma radiation dosimetry application

    International Nuclear Information System (INIS)

    Laranjeira, Jane Maria Goncalves

    2004-08-01

    In this work a technique has been developed to fabricate high quality polyaniline-silicon heterojunction diodes for use as gas and/or ionizing radiation sensors. Polyaniline thin films (40 nm thick) produced by spin-coating on silicon substrates, were the active part of the junction structure. The devices presented excellent reproducibility of their electrical characteristics with high rectification ratio, 60,000 at ±1.0 V, and typical reverse current at - 1.0 V of 3 nA at 295 K. A G/I x G plot has been used to analyze the current-voltage characteristics, yielding typical series resistance of 4 kΩ ± 5% and ideality factor in a range of 1,9 ± 0.5%. The heterojunction diode presents high sensitivity to gamma radiation in the dose range of 3 x 10 -2 to 7 kGy with a linear response in the forward and reverse bias. The excellent electrical characteristics together with the linear response with the dose, strongly suggest the application of this device for spectrometry or dosimetry of high doses of gamma radiation. These devices presented high sensitivity to gas moistures such as ammonia, nitric acid and trichloroethylene. In both cases the sensitivity was observed through shifts of the current-voltage curves, which can be easily monitored to provide a calibration curve of the sensor either as a radiation dosimeter or as a gas sensor for use in applications for gas monitoring or radiation dosimetry. Several aspects of the reliability physics of silicon-polyaniline heterojunction, such as degradation effects induced by local heating, charge trapping and temperature changes, have been discussed. These results further confirm the quality of the devices electrical characteristics and their suitability for radiation and gas sensors applications. Another interesting results presented in this work was the use of polyemeraldine nanofilms (thickness in the range 30-50 nm) deposited by 'spin coating' on glass substrates as an optical dosimeter for gamma radiation based on the

  4. Selective laser etching or ablation for fabrication of devices

    KAUST Repository

    Buttner, Ulrich; Salama, Khaled N.; Sapsanis, Christos

    2017-01-01

    Methods of fabricating devices vial selective laser etching are provided. The methods can include selective laser etching of a portion of a metal layer, e.g. using a laser light source having a wavelength of 1,000 nm to 1,500 nm. The methods can

  5. Study of Periodic Fabrication Error of Optical Splitter Device Performance

    OpenAIRE

    Ab-Rahman, Mohammad Syuhaimi; Ater, Foze Saleh; Jumari, Kasmiran; Mohammad, Rahmah

    2012-01-01

    In this paper, the effect of fabrication errors (FEs) on the performance of 1×4 optical power splitter is investigated in details. The FE, which is assumed to take regular shape, is considered in each section of the device. Simulation result show that FE has a significant effect on the output power especially when it occurs in coupling regions.

  6. Additive advantage in characteristics of MIMCAPs on flexible silicon (100) fabric with release-first process

    KAUST Repository

    Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Hussain, Aftab M.; Hussain, Muhammad Mustafa

    2013-01-01

    We report the inherent increase in capacitance per unit planar area of state-of-the art high-κ integrated metal/insulator/metal capacitors (MIMCAPs) fabricated on flexible silicon fabric with release-first process. We methodically study and show

  7. Additive advantage in characteristics of MIMCAPs on flexible silicon (100) fabric with release-first process

    KAUST Repository

    Ghoneim, Mohamed T.

    2013-11-20

    We report the inherent increase in capacitance per unit planar area of state-of-the art high-κ integrated metal/insulator/metal capacitors (MIMCAPs) fabricated on flexible silicon fabric with release-first process. We methodically study and show that our approach to transform bulk silicon (100) into a flexible fabric adds an inherent advantage of enabling higher integration density dynamic random access memory (DRAM) on the same chip area. Our approach is to release an ultra-thin silicon (100) fabric (25 μm thick) from the bulk silicon wafer, then build MIMCAPs using sputtered aluminium electrodes and successive atomic layer depositions (ALD) without break-ing the vacuum of a high-κ aluminium oxide sandwiched between two tantalum nitride layers. This result shows that we can obtain flexible electronics on silicon without sacrificing the high density integration aspects and also utilize the non-planar geometry associated with fabrication process to obtain a higher integration density compared to bulk silicon integration due to an increased normalized capacitance per unit planar area. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  8. Design, fabrication and characterization of a two-step released silicon dioxide piezoresistive microcantilever immunosensor

    International Nuclear Information System (INIS)

    Zhou, Youzheng; Wang, Zheyao; Wang, Chaonan; Ruan, Wenzhou; Liu, Litian

    2009-01-01

    This paper presents the design, fabrication and characterization of a silicon dioxide piezoresistive microcantilever immunosensor fabricated on silicon-on-insulator (SOI) wafers. The microcantilever consists of two strips of single crystalline silicon piezoresistors sandwiched in between two silicon dioxide layers. A theoretical model for the laminated microcantilever with a discontinuous layer is deduced using classic laminated beam theory. A two-step release method combining anisotropic and isotropic etching is developed to suspend the microcantilever, and the fabrication results show an excellent yield. The residual stress-induced free bending of the microcantilever and the stress caused by self-heating of the piezoresistors are discussed. The microcantilever sensor is characterized as an immunosensor using specific binding of antigen and antibody. These methods and some conclusions are also applicable to the development of other piezoresistive sensors that use laminated structures

  9. Methods and devices for fabricating three-dimensional nanoscale structures

    Science.gov (United States)

    Rogers, John A.; Jeon, Seokwoo; Park, Jangung

    2010-04-27

    The present invention provides methods and devices for fabricating 3D structures and patterns of 3D structures on substrate surfaces, including symmetrical and asymmetrical patterns of 3D structures. Methods of the present invention provide a means of fabricating 3D structures having accurately selected physical dimensions, including lateral and vertical dimensions ranging from 10s of nanometers to 1000s of nanometers. In one aspect, methods are provided using a mask element comprising a conformable, elastomeric phase mask capable of establishing conformal contact with a radiation sensitive material undergoing photoprocessing. In another aspect, the temporal and/or spatial coherence of electromagnetic radiation using for photoprocessing is selected to fabricate complex structures having nanoscale features that do not extend entirely through the thickness of the structure fabricated.

  10. Photovoltaic device using single wall carbon nanotubes and method of fabricating the same

    Science.gov (United States)

    Biris, Alexandru S.; Li, Zhongrui

    2012-11-06

    A photovoltaic device and methods for forming the same. In one embodiment, the photovoltaic device has a silicon substrate, and a film comprising a plurality of single wall carbon nanotubes disposed on the silicon substrate, wherein the plurality of single wall carbon nanotubes forms a plurality of heterojunctions with the silicon in the substrate.

  11. Fabrication and Doping Methods for Silicon Nano- and Micropillar Arrays for Solar-Cell Applications: A Review.

    Science.gov (United States)

    Elbersen, Rick; Vijselaar, Wouter; Tiggelaar, Roald M; Gardeniers, Han; Huskens, Jurriaan

    2015-11-18

    Silicon is one of the main components of commercial solar cells and is used in many other solar-light-harvesting devices. The overall efficiency of these devices can be increased by the use of structured surfaces that contain nanometer- to micrometer-sized pillars with radial p/n junctions. High densities of such structures greatly enhance the light-absorbing properties of the device, whereas the 3D p/n junction geometry shortens the diffusion length of minority carriers and diminishes recombination. Due to the vast silicon nano- and microfabrication toolbox that exists nowadays, many versatile methods for the preparation of such highly structured samples are available. Furthermore, the formation of p/n junctions on structured surfaces is possible by a variety of doping techniques, in large part transferred from microelectronic circuit technology. The right choice of doping method, to achieve good control of junction depth and doping level, can contribute to an improvement of the overall efficiency that can be obtained in devices for energy applications. A review of the state-of-the-art of the fabrication and doping of silicon micro and nanopillars is presented here, as well as of the analysis of the properties and geometry of thus-formed 3D-structured p/n junctions. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  12. Compact Quantum Random Number Generator with Silicon Nanocrystals Light Emitting Device Coupled to a Silicon Photomultiplier

    Science.gov (United States)

    Bisadi, Zahra; Acerbi, Fabio; Fontana, Giorgio; Zorzi, Nicola; Piemonte, Claudio; Pucker, Georg; Pavesi, Lorenzo

    2018-02-01

    A small-sized photonic quantum random number generator, easy to be implemented in small electronic devices for secure data encryption and other applications, is highly demanding nowadays. Here, we propose a compact configuration with Silicon nanocrystals large area light emitting device (LED) coupled to a Silicon photomultiplier to generate random numbers. The random number generation methodology is based on the photon arrival time and is robust against the non-idealities of the detector and the source of quantum entropy. The raw data show high quality of randomness and pass all the statistical tests in national institute of standards and technology tests (NIST) suite without a post-processing algorithm. The highest bit rate is 0.5 Mbps with the efficiency of 4 bits per detected photon.

  13. Compact Quantum Random Number Generator with Silicon Nanocrystals Light Emitting Device Coupled to a Silicon Photomultiplier

    Directory of Open Access Journals (Sweden)

    Zahra Bisadi

    2018-02-01

    Full Text Available A small-sized photonic quantum random number generator, easy to be implemented in small electronic devices for secure data encryption and other applications, is highly demanding nowadays. Here, we propose a compact configuration with Silicon nanocrystals large area light emitting device (LED coupled to a Silicon photomultiplier to generate random numbers. The random number generation methodology is based on the photon arrival time and is robust against the non-idealities of the detector and the source of quantum entropy. The raw data show high quality of randomness and pass all the statistical tests in national institute of standards and technology tests (NIST suite without a post-processing algorithm. The highest bit rate is 0.5 Mbps with the efficiency of 4 bits per detected photon.

  14. Fabrication of coupled graphene–nanotube quantum devices

    International Nuclear Information System (INIS)

    Engels, S; Weber, P; Terrés, B; Dauber, J; Volk, C; Wichmann, U; Stampfer, C; Meyer, C; Trellenkamp, S

    2013-01-01

    We report on the fabrication and characterization of all-carbon hybrid quantum devices based on graphene and single-walled carbon nanotubes. We discuss both carbon nanotube quantum dot devices with graphene charge detectors and nanotube quantum dots with graphene leads. The devices are fabricated by chemical vapor deposition growth of carbon nanotubes and subsequent structuring of mechanically exfoliated graphene. We study the detection of individual charging events in the carbon nanotube quantum dot by a nearby graphene nanoribbon and show that they lead to changes of up to 20% of the conductance maxima in the graphene nanoribbon, acting as a well performing charge detector. Moreover, we discuss an electrically coupled graphene–nanotube junction, which exhibits a tunneling barrier with tunneling rates in the low GHz regime. This allows us to observe Coulomb blockade on a carbon nanotube quantum dot with graphene source and drain leads. (paper)

  15. Porous silicon photonic devices using pulsed anodic etching of lightly doped silicon

    International Nuclear Information System (INIS)

    Escorcia-Garcia, J; Sarracino MartInez, O; Agarwal, V; Gracia-Jimenez, J M

    2009-01-01

    The fabrication of porous silicon photonic structures using lightly doped, p-type, silicon wafers (resistivity: 14-22 Ω cm) by pulsed anodic etching is reported. The optical properties have been found to be strongly dependent on the duty cycle and frequency of the applied current. All the interfaces of the single layered samples were digitally analysed by calculating the mean interface roughness (R m ). The interface roughness was found to be maximum for the sample with direct current. The use of a duty cycle above 50%, in a certain range of frequencies, is found to reduce the interface roughness. The optical properties of some microcavities and rugate filters are investigated from the optimized parameters of the duty cycle and frequency, using the current densities of 10, 90 and 150 mA cm -2 .

  16. Customizable in situ TEM devices fabricated in freestanding membranes by focused ion beam milling

    DEFF Research Database (Denmark)

    Lei, Anders; Petersen, Dirch Hjorth; Booth, Tim

    2010-01-01

    crystalline silicon extending over the edge of a pre-fabricated silicon microchip. Four-terminal resistance measurements of FIB-defined nanowires showed at least two orders of magnitude increase in resistivity compared to bulk. We show that the initial high resistance is due to amorphization of silicon...

  17. Silicon based nanogap device for studying electrical transport phenomena in molecule-nanoparticle hybrids

    International Nuclear Information System (INIS)

    Strobel, Sebastian; Hernandez, Rocio Murcia; Hansen, Allan G; Tornow, Marc

    2008-01-01

    We report the fabrication and characterization of vertical nanogap electrode devices using silicon-on-insulator substrates. Using only standard silicon microelectronic process technology, nanogaps down to 26 nm electrode separation were prepared. Transmission electron microscopy cross-sectional analysis revealed the well defined material architecture of the nanogap, comprising two electrodes of dissimilar geometrical shape. This asymmetry is directly reflected in transport measurements on molecule-nanoparticle hybrid systems formed by self-assembling a monolayer of mercaptohexanol on the electrode surface and the subsequent dielectrophoretic trapping of 30 nm diameter Au nanoparticles. The observed Coulomb staircase I-V characteristic measured at T = 4.2 K is in excellent agreement with theoretical modelling, whereby junction capacitances of the order of a few 10 -18 farad and asymmetric resistances of 30 and 300 MΩ, respectively, are also supported well by our independent estimates for the formed double barrier tunnelling system. We propose our nanoelectrode system for integrating novel functional electronic devices such as molecular junctions or nanoparticle hybrids into existing silicon microelectronic process technology

  18. Silicon based nanogap device for studying electrical transport phenomena in molecule-nanoparticle hybrids

    Energy Technology Data Exchange (ETDEWEB)

    Strobel, Sebastian; Hernandez, Rocio Murcia [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall 3, 85748 Garching (Germany); Hansen, Allan G; Tornow, Marc [Institut fuer Halbleitertechnik, Technische Universitaet Braunschweig, Hans-Sommer-Strasse 66, 38106 Braunschweig (Germany)], E-mail: m.tornow@tu-bs.de

    2008-09-17

    We report the fabrication and characterization of vertical nanogap electrode devices using silicon-on-insulator substrates. Using only standard silicon microelectronic process technology, nanogaps down to 26 nm electrode separation were prepared. Transmission electron microscopy cross-sectional analysis revealed the well defined material architecture of the nanogap, comprising two electrodes of dissimilar geometrical shape. This asymmetry is directly reflected in transport measurements on molecule-nanoparticle hybrid systems formed by self-assembling a monolayer of mercaptohexanol on the electrode surface and the subsequent dielectrophoretic trapping of 30 nm diameter Au nanoparticles. The observed Coulomb staircase I-V characteristic measured at T = 4.2 K is in excellent agreement with theoretical modelling, whereby junction capacitances of the order of a few 10{sup -18} farad and asymmetric resistances of 30 and 300 M{omega}, respectively, are also supported well by our independent estimates for the formed double barrier tunnelling system. We propose our nanoelectrode system for integrating novel functional electronic devices such as molecular junctions or nanoparticle hybrids into existing silicon microelectronic process technology.

  19. Silicon based nanogap device for studying electrical transport phenomena in molecule-nanoparticle hybrids.

    Science.gov (United States)

    Strobel, Sebastian; Hernández, Rocío Murcia; Hansen, Allan G; Tornow, Marc

    2008-09-17

    We report the fabrication and characterization of vertical nanogap electrode devices using silicon-on-insulator substrates. Using only standard silicon microelectronic process technology, nanogaps down to 26 nm electrode separation were prepared. Transmission electron microscopy cross-sectional analysis revealed the well defined material architecture of the nanogap, comprising two electrodes of dissimilar geometrical shape. This asymmetry is directly reflected in transport measurements on molecule-nanoparticle hybrid systems formed by self-assembling a monolayer of mercaptohexanol on the electrode surface and the subsequent dielectrophoretic trapping of 30 nm diameter Au nanoparticles. The observed Coulomb staircase I-V characteristic measured at T = 4.2 K is in excellent agreement with theoretical modelling, whereby junction capacitances of the order of a few 10(-18) farad and asymmetric resistances of 30 and 300 MΩ, respectively, are also supported well by our independent estimates for the formed double barrier tunnelling system. We propose our nanoelectrode system for integrating novel functional electronic devices such as molecular junctions or nanoparticle hybrids into existing silicon microelectronic process technology.

  20. Fabrication of micromirrors with pyramidal shape using anisotropic etching of silicon

    OpenAIRE

    Moktadir, Z.; Vijaya Prakash, G.; Trupke, M.; Koukharenko, E.; Kraft, M.; Baumberg, J.J.; Eriksson, S.; Hinds, E.A.

    2005-01-01

    Gold micro-mirrors have been formed in silicon in an inverted pyramidal shape. The pyramidal structures are created in the (100) surface of a silicon wafer by anisotropic etching in potassium hydroxide. High quality micro-mirrors are then formed by sputtering gold onto the smooth silicon (111) faces of the pyramids. These mirrors show great promise as high quality optical devices suitable for integration into MOEMS systems.

  1. Electroless porous silicon formation applied to fabrication of boron-silica-glass cantilevers

    DEFF Research Database (Denmark)

    Teva, Jordi; Davis, Zachary James; Hansen, Ole

    2010-01-01

    This work describes the characterization and optimization of anisotropic formation of porous silicon in large volumes (0.5-1 mm3) of silicon by an electroless wet etching technique. The main goal is to use porous silicon as a sacrificial volume for bulk micromachining processes, especially in cases...... where etching of the full wafer thickness is needed. The porous silicon volume is formed by a metal-assisted etching in a wet chemical solution composed of hydrogen peroxide (30%), hydrofluoric acid (40%) and ethanol. This paper focuses on optimizing the etching conditions in terms of maximizing...... for bio-chemical sensors. The porous silicon volume is formed in an early step of the fabrication process, allowing easy handling of the wafer during all of the micromachining processes in the process flow. In the final process step, the porous silicon is quickly etched by immersing the wafer in a KOH...

  2. Fabrication of polyimide based microfluidic channels for biosensor devices

    Science.gov (United States)

    Zulfiqar, Azeem; Pfreundt, Andrea; Svendsen, Winnie Edith; Dimaki, Maria

    2015-03-01

    The ever-increasing complexity of the fabrication process of Point-of-care (POC) devices, due to high demand of functional versatility, compact size and ease-of-use, emphasizes the need of multifunctional materials that can be used to simplify this process. Polymers, currently in use for the fabrication of the often needed microfluidic channels, have limitations in terms of their physicochemical properties. Therefore, the use of a multipurpose biocompatible material with better resistance to the chemical, thermal and electrical environment, along with capability of forming closed channel microfluidics is inevitable. This paper demonstrates a novel technique of fabricating microfluidic devices using polyimide (PI) which fulfills the aforementioned properties criteria. A fabrication process to pattern microfluidic channels, using partially cured PI, has been developed by using a dry etching method. The etching parameters are optimized and compared to those used for fully cured PI. Moreover, the formation of closed microfluidic channel on wafer level by bonding two partially cured PI layers or a partially cured PI to glass with high bond strength has been demonstrated. The reproducibility in uniformity of PI is also compared to the most commonly used SU8 polymer, which is a near UV sensitive epoxy resin. The potential applications of PI processing are POC and biosensor devices integrated with microelectronics.

  3. Three-dimensional stacked structured ASIC devices and methods of fabrication thereof

    Science.gov (United States)

    Shinde, Subhash L.; Teifel, John; Flores, Richard S.; Jarecki Jr., Robert L.; Bauer, Todd

    2015-11-19

    A 3D stacked sASIC is provided that includes a plurality of 2D reconfigurable structured structured ASIC (sASIC) levels interconnected through hard-wired arrays of 3D vias. The 2D sASIC levels may contain logic, memory, analog functions, and device input/output pad circuitry. During fabrication, these 2D sASIC levels are stacked on top of each other and fused together with 3D metal vias. Such 3D vias may be fabricated as through-silicon vias (TSVs). They may connect to the back-side of the 2D sASIC level, or they may be connected to top metal pads on the front-side of the 2D sASIC level.

  4. Germanium photodetectors fabricated on 300 mm silicon wafers for near-infrared focal plane arrays

    Science.gov (United States)

    Zeller, John W.; Rouse, Caitlin; Efstathiadis, Harry; Dhar, Nibir K.; Wijewarnasuriya, Priyalal; Sood, Ashok K.

    2017-09-01

    SiGe p-i-n photodetectors have been fabricated on 300 mm (12") diameter silicon (Si) wafers utilizing high throughput, large-area complementary metal-oxide semiconductor (CMOS) technologies. These Ge photodetectors are designed to operate in room temperature environments without cooling, and thus have potential size and cost advantages over conventional cooled infrared detectors. The two-step fabrication process for the p-i-n photodetector devices, designed to minimize the formation of defects and threading dislocations, involves low temperature epitaxial growth of a thin p+ (boron) Ge seed/buffer layer, followed by higher temperature deposition of a thicker Ge intrinsic layer. Scanning electron microscopy (SEM) and transmission electron microscopy (TEM) demonstrated uniform layer compositions with well defined layer interfaces and reduced dislocation density. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS) was likewise employed to analyze the doping levels of the p+ and n+ layers. Current-voltage (I-V) measurements demonstrated that these SiGe photodetectors, when exposed to incident visible-NIR radiation, exhibited dark currents down below 1 μA and significant enhancement in photocurrent at -1 V. The zero-bias photocurrent was also relatively high, showing a minimal drop compared to that at -1 V bias.

  5. Silicon light-emitting diodes and lasers photon breeding devices using dressed photons

    CERN Document Server

    Ohtsu, Motoichi

    2016-01-01

    This book focuses on a novel phenomenon named photon breeding. It is applied to realizing light-emitting diodes and lasers made of indirect-transition-type silicon bulk crystals in which the light-emission principle is based on dressed photons. After presenting physical pictures of dressed photons and dressed-photon phonons, the principle of light emission by using dressed-photon phonons is reviewed. A novel phenomenon named photon breeding is also reviewed. Next, the fabrication and operation of light emitting diodes and lasers are described The role of coherent phonons in these devices is discussed. Finally, light-emitting diodes using other relevant crystals are described and other relevant devices are also reviewed.

  6. Fabrication of fine imaging devices using an external proton microbeam

    Energy Technology Data Exchange (ETDEWEB)

    Sakai, T., E-mail: sakai.takuro@jaea.go.jp [Quantum Beam Science Directorate, Japan Atomic Energy Agency (JAEA), Tokai, Ibaraki 319-1195 (Japan); Yasuda, R.; Iikura, H.; Nojima, T. [Quantum Beam Science Directorate, Japan Atomic Energy Agency (JAEA), Tokai, Ibaraki 319-1195 (Japan); Koka, M.; Satoh, T.; Ishii, Y. [Takasaki Advanced Radiation Research Institute, Japan Atomic Energy Agency (JAEA), Takasaki, Gunma 370-1292 (Japan); Oshima, A. [Institute of Scientific and Industrial Research, Osaka University, Ibaraki, Osaka 567-0047 (Japan)

    2014-08-01

    We have successfully fabricated novel microscopic imaging devices made from UV/EB curable resin using an external scanning proton microbeam. The devices are micro-structured fluorescent plates that consist of an array of micro-pillars that align periodically. The base material used in the pillars is UV/EB curable resin and each pillar contains phosphor grains. The pattern exposures were performed using a proton beam writing technique. The height of the pillars depends on the range of the proton beam. Optical microscopy and scanning electron microscopy have been used to characterize the samples. The results show that the fabricated fluorescent plates are expected to be compatible with both spatial resolution and detection efficiency.

  7. Fabrication of polyimide based microfluidic channels for biosensor devices

    DEFF Research Database (Denmark)

    Zulfiqar, Azeem; Pfreundt, Andrea; Svendsen, Winnie Edith

    2015-01-01

    The ever-increasing complexity of the fabrication process of Point-of-care (POC) devices, due to high demand of functional versatility, compact size and ease-of-use, emphasizes the need of multifunctional materials that can be used to simplify this process. Polymers, currently in use for the fabr...... in uniformity of PI is also compared to the most commonly used SU8 polymer, which is a near UV sensitive epoxy resin. The potential applications of PI processing are POC and biosensor devices integrated with microelectronics....

  8. Flux based modeling and simulation of dry etching for fabrication of silicon deep trench structures

    Energy Technology Data Exchange (ETDEWEB)

    Malik Rizwan [State Key Laboratory of Digital Manufacturing Equipment and technology, Huazhong University of Science and Technology, 1037 Luoyu road, Wuhan, China 43007 (China); Shi Tielin; Tang Zirong; Liu Shiyuan, E-mail: zirong@mail.hust.edu.cn, E-mail: rizwanmalik@smail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, 1037 Luoyu road Wuhan, 430074 (China)

    2011-02-01

    Deep reactive ion etching (DRIE) process is a key growth for fabrication of micro-electromechanical system (MEMS) devices. Due to complexity of this process, including interaction of the process steps, full analytical modeling is complex. Plasma process holds deficiency of understanding because it is very easy to measure the results empirically. However, as device parameters shrink, this issue is more critical. In this paper, our process was modeled qualitatively based on 'High Density Plasma Etch Model'. Deep trench solutions of etch rate based on continuity equation were successfully generated first time through mathematical analysis. It was also proved that the product of fluorine and gas phase concentration in SF{sub 6} remains identical during both deposition and etching stages. The etching process was treated as a combination of isotropic, directional and angle-dependent component parts. It exploited a synergistic balance of chemical as well as physical etching for promoting silicon trenches and high aspect ratio structures. Simulations were performed for comprehensive analysis of fluxes coming towards the surface during chemical reaction of gas. It is observed that near the surface, the distribution of the arrival flux follows a cosine distribution. Our model is feasible to analyze various parameters like gas delivery, reactor volume and temperature that help to assert large scale effects and to optimize equipment design.

  9. Process and device for fabricating nuclear fuel assembly grids

    International Nuclear Information System (INIS)

    Thiebaut, B.; Duthoo, D.; Germanaz, J.J.; Angilbert, B.

    1991-01-01

    The method for fabricating PWR fuel assembly grids consists to place the grid of which the constituent parts are held firmly in place within a frame into a sealed chamber full of inert gas. This chamber can rotate about an axis. The welding on one face at a time is carried out with a laser beam orthogonal to the axis orientation of the device. The laser source is outside of the chamber and the beam penetrates via a transparent view port

  10. Micro fabrication of biodegradable polymer drug delivery devices

    DEFF Research Database (Denmark)

    Nagstrup, Johan

    The pharmaceutical industry is presently facing several obstacles in developing oral drug delivery systems. This is primarily due to the nature of the discovered drug candidates. The discovered drugs often have poor solubility and low permeability across the gastro intestinal epithelium. Furtherm......The pharmaceutical industry is presently facing several obstacles in developing oral drug delivery systems. This is primarily due to the nature of the discovered drug candidates. The discovered drugs often have poor solubility and low permeability across the gastro intestinal epithelium...... permeability and degradation. These systems are for the majority based on traditional materials used in micro technology, such as SU-8, silicon, poly(methyl methacrylate). The next step in developing these new drug delivery systems is to replace classical micro fabrication materials with biodegradable polymers....... In order to successfully do this, methods for fabricating micro structures in biodegradable polymers need to be developed. The goal of this project has been to develop methods for micro fabrication in biodegradable polymers and to use these methods to produce micro systems for oral drug delivery. This has...

  11. Fabrication and characterization of novel gate-all-around polycrystalline silicon junctionless field-effect transistors with ultrathin horizontal tube-shape channel

    Science.gov (United States)

    Chang, You-Tai; Peng, Kang-Ping; Li, Pei-Wen; Lin, Horng-Chih

    2018-04-01

    In this paper, we report on a novel fabrication process for the production of junctionless field-effect transistors with an ultrathin polycrystalline silicon (poly-Si) tube channel in a gate-all-around (GAA) configuration. The core of the poly-Si tube channel is filled with either a silicon nitride or a silicon oxide layer, and the effects of the core layers on the device characteristics are evaluated. The devices show excellent switching performance, thanks to the combination of the ultrathin tube channel and the GAA structure. Hysteresis loops in the transfer characteristics of the nitride-core devices are observed, owing to the dynamic trapping of electrons in the nitride core.

  12. Flow-through polymerase chain reaction inside a seamless 3D helical microreactor fabricated utilizing a silicone tube and a paraffin mold.

    Science.gov (United States)

    Wu, Wenming; Trinh, Kieu The Loan; Lee, Nae Yoon

    2015-03-07

    We introduce a new strategy for fabricating a seamless three-dimensional (3D) helical microreactor utilizing a silicone tube and a paraffin mold. With this method, various shapes and sizes of 3D helical microreactors were fabricated, and a complicated and laborious photolithographic process, or 3D printing, was eliminated. With dramatically enhanced portability at a significantly reduced fabrication cost, such a device can be considered to be the simplest microreactor, developed to date, for performing the flow-through polymerase chain reaction (PCR).

  13. Emerging Trends in Phosphorene Fabrication towards Next Generation Devices.

    Science.gov (United States)

    Dhanabalan, Sathish Chander; Ponraj, Joice Sophia; Guo, Zhinan; Li, Shaojuan; Bao, Qiaoliang; Zhang, Han

    2017-06-01

    The challenge of science and technology is to design and make materials that will dominate the future of our society. In this context, black phosphorus has emerged as a new, intriguing two-dimensional (2D) material, together with its monolayer, which is referred to as phosphorene. The exploration of this new 2D material demands various fabrication methods to achieve potential applications- this demand motivated this review. This article is aimed at supplementing the concrete understanding of existing phosphorene fabrication techniques, which forms the foundation for a variety of applications. Here, the major issue of the degradation encountered in realizing devices based on few-layered black phosphorus and phosphorene is reviewed. The prospects of phosphorene in future research are also described by discussing its significance and explaining ways to advance state-of-art of phosphorene-based devices. In addition, a detailed presentation on the demand for future studies to promote well-systemized fabrication methods towards large-area, high-yield and perfectly protected phosphorene for the development of reliable devices in optoelectronic applications and other areas is offered.

  14. Digital signal processor for silicon audio playback devices; Silicon audio saisei kikiyo digital signal processor

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2000-03-01

    The digital audio signal processor (DSP) TC9446F series has been developed silicon audio playback devices with a memory medium of, e.g., flash memory, DVD players, and AV devices, e.g., TV sets. It corresponds to AAC (advanced audio coding) (2ch) and MP3 (MPEG1 Layer3), as the audio compressing techniques being used for transmitting music through an internet. It also corresponds to compressed types, e.g., Dolby Digital, DTS (digital theater system) and MPEG2 audio, being adopted for, e.g., DVDs. It can carry a built-in audio signal processing program, e.g., Dolby ProLogic, equalizer, sound field controlling, and 3D sound. TC9446XB has been lined up anew. It adopts an FBGA (fine pitch ball grid array) package for portable audio devices. (translated by NEDO)

  15. Fabrication and Characterization of High-Sensitivity Underwater Acoustic Multimedia Communication Devices with Thick Composite PZT Films

    Directory of Open Access Journals (Sweden)

    Jeng-Cheng Liu

    2017-01-01

    Full Text Available This paper presents a high-sensitivity hydrophone fabricated with a Microelectromechanical Systems (MEMS process using epitaxial thin films grown on silicon wafers. The evaluated resonant frequency was calculated through finite-element analysis (FEA. The hydrophone was designed, fabricated, and characterized by different measurements performed in a water tank, by using a pulsed sound technique with a sensitivity of −190 dB ± 2 dB for frequencies in the range 50–500 Hz. These results indicate the high-performance miniaturized acoustic devices, which can impact a variety of technological applications.

  16. Crystalline Silicon Interconnected Strips (XIS). Introduction to a New, Integrated Device and Module Concept

    Energy Technology Data Exchange (ETDEWEB)

    Van Roosmalen, J.; Bronsveld, P.; Mewe, A.; Janssen, G.; Stodolny, M.; Cobussen-Pool, E.; Bennett, I.; Weeber, A.; Geerligs, B. [ECN Solar Energy, P.O. Box 1, NL-1755 ZG, Petten (Netherlands)

    2012-06-15

    A new device concept for high efficiency, low cost, wafer based silicon solar cells is introduced. To significantly lower the costs of Si photovoltaics, high efficiencies and large reductions of metals and silicon costs are required. To enable this, the device architecture was adapted into low current devices by applying thin silicon strips, to which a special high efficiency back-contact heterojunction cell design was applied. Standard industrial production processes can be used for our fully integrated cell and module design, with a cost reduction potential below 0.5 euro/Wp. First devices have been realized demonstrating the principle of a series connected back contact hybrid silicon heterojunction module concept.

  17. Performance of current-in-plane pseudo-spin-valve devices on CMOS silicon-on-insulator underlayers

    Science.gov (United States)

    Katti, R. R.; Zou, D.; Reed, D.; Schipper, D.; Hynes, O.; Shaw, G.; Kaakani, H.

    2003-05-01

    Prior work has shown that current-in-plane (CIP) giant magnetoresistive (GMR) pseudo-spin-valve (PSV) devices grown on bulk Si wafers and bulk complementary metal-oxide semiconductor (CMOS) underlayers exhibit write and read characteristics that are suitable for application as nonvolatile memory devices. In this work, CIP GMR PSV devices fabricated on silicon-on-insulator CMOS underlayers are shown to support write and read performance. Reading and writing fields for selected devices are shown to be approximately 25%-50% that of unselected devices, which provides a margin for reading and writing specific bits in a memory without overwriting bits and without disturbing other bits. The switching characteristics of experimental devices were compared to and found to be similar with Landau-Lifschitz-Gilbert micromagnetic modeling results, which allowed inferring regions of reversible and irreversible rotations in magnetic reversal processes.

  18. Silicon Nano fabrication by Atomic Force Microscopy-Based Mechanical Processing

    International Nuclear Information System (INIS)

    Miyake, Sh.; Wang, M.; Kim, J.

    2014-01-01

    This paper reviews silicon nano fabrication processes using atomic force microscopy (AFM). In particular, it summarizes recent results obtained in our research group regarding AFM-based silicon nano fabrication through mechanochemical local oxidation by diamond tip sliding, as well as mechanical, electrical, and electromechanical processing using an electrically conductive diamond tip. Microscopic three-dimensional manufacturing mainly relies on etching, deposition, and lithography. Therefore, a special emphasis was placed on nano mechanical processes, mechanochemical reaction by potassium hydroxide solution etching, and mechanical and electrical approaches. Several important surface characterization techniques consisting of scanning tunneling microscopy and related techniques, such as scanning probe microscopy and AFM, were also discussed.

  19. Effect of fabrication parameters on morphological and optical properties of highly doped p-porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Zare, Maryam, E-mail: mar.zare@gmail.com [Young Researchers Club, Khomeinishahr Branch, Islamic Azad University, Khomeinishahr (Iran, Islamic Republic of); Shokrollahi, Abbas [Young Researchers Club, Khomeinishahr Branch, Islamic Azad University, Khomeinishahr (Iran, Islamic Republic of); Seraji, Faramarz E. [Optical Communication Group, Iran Telecom Research Center, Tehran (Iran, Islamic Republic of)

    2011-09-01

    Porous silicon (PS) layers were fabricated by anodization of low resistive (highly doped) p-type silicon in HF/ethanol solution, by varying current density, etching time and HF concentration. Atomic force microscopy (AFM) and field emission scanning electron microscope (FESEM) analyses were used to investigate the physical properties and reflection spectrum was used to investigate the optical behavior of PS layers in different fabrication conditions. Vertically aligned mesoporous morphology is observed in fabricated films and with HF concentration higher than 20%. The dependence of porosity, layer thickness and rms roughness of the PS layer on current density, etching time and composition of electrolyte is also observed in obtained results. Correlation between reflectivity and fabrication parameters was also explored. Thermal oxidation was performed on some mesoporous layers that resulted in changes of surface roughness, mean height and reflectivity of the layers.

  20. Development and applications of monocrystalline silicon radiation sensors fabricated at Comision Nacional de Energia Atomica (CNEA)

    International Nuclear Information System (INIS)

    Bolzi, C; Bruno, C; Duran, J; Godfrin, E; Martinez Bogado, M; Pla, J; Tamasi, M

    2005-01-01

    The development of silicon photovoltaic sensors at CNEA has begun in 1998.These sensors, fabricated in the Photovoltaic Laboratory of the Solar Energy Group at Constituyentes Atomic Center, have been used to build low cost radiometers as well as solar angular position sensors on board of artificial satellites.The design, fabrication and calibration of these sensors have been made in different prototypes in order to analyze its performance and to evaluate its limitations.Nowadays, several commercial prototypes have been distributed in different laboratories of our country in order to evaluate them in real work conditions.Particularly, the first experiment of argentine solar cells on space performed on board of SAC-A satellite, included the fabrication of position sensors of this satellite as part of the alignment system of the solar array respect to the sun.In this article, the state of the art of monocrystalline silicon photovoltaic sensors fabricated at CNEA for terrestrial and space applications is presented

  1. CuO-Functionalized Silicon Photoanodes for Photoelectrochemical Water Splitting Devices.

    Science.gov (United States)

    Shi, Yuanyuan; Gimbert-Suriñach, Carolina; Han, Tingting; Berardi, Serena; Lanza, Mario; Llobet, Antoni

    2016-01-13

    One main difficulty for the technological development of photoelectrochemical (PEC) water splitting (WS) devices is the fabrication of active, stable and cost-effective photoelectrodes that ensure high performance. Here, we report the development of a CuO/Silicon based photoanode, which shows an onset potential for the water oxidation of 0.53 V vs SCE at pH 9, that is, an overpotential of 75 mV, and high stability above 10 h. These values account for a photovoltage of 420 mV due to the absorbed photons by silicon, as proven by comparing with analogous CuO/FTO electrodes that are not photoactive. The photoanodes have been fabricated by sputtering a thin film of Cu(0) on commercially available n-type Si wafers, followed by a photoelectrochemical treatment in basic pH conditions. The resulting CuO/Cu layer acts as (1) protective layer to avoid the corrosion of nSi, (2) p-type hole conducting layer for efficient charge separation and transportation, and (3) electrocatalyst to reduce the overpotential of the water oxidation reaction. The low cost, low toxicity, and good performance of CuO-based coatings can be an attractive solution to functionalize unstable materials for solar energy conversion.

  2. GaN Nanowire Devices: Fabrication and Characterization

    Science.gov (United States)

    Scott, Reum

    The development of microelectronics in the last 25 years has been characterized by an exponential increase of the bit density in integrated circuits (ICs) with time. Scaling solid-state devices improves cost, performance, and power; as such, it is of particular interest for companies, who gain a market advantage with the latest technology. As a result, the microelectronics industry has driven transistor feature size scaling from 10 μm to ~30 nm during the past 40 years. This trend has persisted for 40 years due to optimization, new processing techniques, device structures, and materials. But when noting processor speeds from the 1970's to 2009 and then again in 2010, the implication would be that the trend has ceased. To address the challenge of shrinking the integrated circuit (IC), current research is centered on identifying new materials and devices that can supplement and/or potentially supplant it. Bottom-up methods tailor nanoscale building blocks---atoms, molecules, quantum dots, and nanowires (NWs)---to be used to overcome these limitations. The Group IIIA nitrides (InN, AlN, and GaN) possess appealing properties such as a direct band gap spanning the whole solar spectrum, high saturation velocity, and high breakdown electric field. As a result nanostructures and nanodevices made from GaN and related nitrides are suitable candidates for efficient nanoscale UV/ visible light emitters, detectors, and gas sensors. To produce devices with such small structures new fabrication methods must be implemented. Devices composed of GaN nanowires were fabricated using photolithography and electron beam lithography. The IV characteristics of these devices were noted under different illuminations and the current tripled from 4.8*10-7 A to 1.59*10 -6 A under UV light which persisted for at least 5hrs.

  3. Desktop aligner for fabrication of multilayer microfluidic devices.

    Science.gov (United States)

    Li, Xiang; Yu, Zeta Tak For; Geraldo, Dalton; Weng, Shinuo; Alve, Nitesh; Dun, Wu; Kini, Akshay; Patel, Karan; Shu, Roberto; Zhang, Feng; Li, Gang; Jin, Qinghui; Fu, Jianping

    2015-07-01

    Multilayer assembly is a commonly used technique to construct multilayer polydimethylsiloxane (PDMS)-based microfluidic devices with complex 3D architecture and connectivity for large-scale microfluidic integration. Accurate alignment of structure features on different PDMS layers before their permanent bonding is critical in determining the yield and quality of assembled multilayer microfluidic devices. Herein, we report a custom-built desktop aligner capable of both local and global alignments of PDMS layers covering a broad size range. Two digital microscopes were incorporated into the aligner design to allow accurate global alignment of PDMS structures up to 4 in. in diameter. Both local and global alignment accuracies of the desktop aligner were determined to be about 20 μm cm(-1). To demonstrate its utility for fabrication of integrated multilayer PDMS microfluidic devices, we applied the desktop aligner to achieve accurate alignment of different functional PDMS layers in multilayer microfluidics including an organs-on-chips device as well as a microfluidic device integrated with vertical passages connecting channels located in different PDMS layers. Owing to its convenient operation, high accuracy, low cost, light weight, and portability, the desktop aligner is useful for microfluidic researchers to achieve rapid and accurate alignment for generating multilayer PDMS microfluidic devices.

  4. Neuron Stimulation Device Integrated with Silicon Nanowire-Based Photodetection Circuit on a Flexible Substrate

    Directory of Open Access Journals (Sweden)

    Suk Won Jung

    2016-12-01

    Full Text Available This paper proposes a neural stimulation device integrated with a silicon nanowire (SiNW-based photodetection circuit for the activation of neurons with light. The proposed device is comprised of a voltage divider and a current driver in which SiNWs are used as photodetector and field-effect transistors; it has the functions of detecting light, generating a stimulation signal in proportion to the light intensity, and transmitting the signal to a micro electrode. To show the applicability of the proposed neural stimulation device as a high-resolution retinal prosthesis system, a high-density neural stimulation device with a unit cell size of 110 × 110 μ m and a resolution of 32 × 32 was fabricated on a flexible film with a thickness of approximately 50 μm. Its effectiveness as a retinal stimulation device was then evaluated using a unit cell in an in vitro animal experiment involving the retinal tissue of retinal Degeneration 1 (rd1 mice. Experiments wherein stimulation pulses were applied to the retinal tissues successfully demonstrate that the number of spikes in neural response signals increases in proportion to light intensity.

  5. Fabrication and doping methods for silicon nano- and micropillar arrays for solar cell applications: a review

    NARCIS (Netherlands)

    Elbersen, R.; Vijselaar, Wouter Jan, Cornelis; Tiggelaar, Roald M.; Gardeniers, Johannes G.E.; Huskens, Jurriaan

    2015-01-01

    Silicon is one of the main components of commercial solar cells and is used in many other solar-light-harvesting devices. The overall efficiency of these devices can be increased by the use of structured surfaces that contain nanometer- to micrometer-sized pillars with radial p/n junctions. High

  6. Durable Superomniphobic Surface on Cotton Fabrics via Coating of Silicone Rubber and Fluoropolymers

    Directory of Open Access Journals (Sweden)

    Arsheen Moiz

    2018-03-01

    Full Text Available Performance textiles that protect human from different threats and dangers from environment are in high demand, and the advancement in functionalization technology together with employing advanced materials have made this an area of research focus. In this work, silicone rubber and environmentally friendly fluoropolymers have been employed to explore superomniphobic surface on cotton fabrics without compromising comfort much. It has been found that a cross-linked network between the rubber membrane and the fluoropolymers has been formed. The surface appearance, morphology, handle, thickness and chemical components of the surface of cotton fabrics have been changed. The coated fabrics showed resistance to water, aqueous liquid, oil, chemicals and soil. The comfort of the coated fabrics is different to uncoated cotton fabrics due to the existence of coated layers on the surface of cotton fabrics. This work would benefit the development and design of the next generation of performance textiles with balanced performance and comfort.

  7. Device physics underlying silicon heterojunction and passivating-contact solar cells: A topical review

    KAUST Repository

    Chavali, Raghu V. K.; De Wolf, Stefaan; Alam, Muhammad A.

    2018-01-01

    The device physics of commercially dominant diffused-junction silicon solar cells is well understood, allowing sophisticated optimization of this class of devices. Recently, so-called passivating-contact solar cell technologies have become prominent

  8. Processing and characterization of multilayers for energy device fabrication (invited)

    DEFF Research Database (Denmark)

    Kaiser, Andreas; Kiebach, Wolff-Ragnar; Gurauskis, Jonas

    SOFC and tubular OTM, we present selected challenges in ceramic processing such asymmetric multilayer structures. By optimizing different steps in the ceramic processing, we improved the mechanical properties and gas permeability of porous supports and the (electrochemical) performance of electrodes......The performance of asymmetric multilayer structures in solid oxide fuel cells (SOFC)/solid oxide electrolysis cells (SOEC), tubular oxygen transport membranes (OTM) and similar high temperature energy devices is often determined by the ceramic fabrication (for given materials and design). A good...... understanding and control of different processing steps (from powder/materials selection, through shaping and sintering) is of crucial importance to achieve a defect-free multilayer microstructure with the desired properties and performance. Based on the experiences at DTU Energy with the fabrication of planar...

  9. A repeatable and scalable fabrication method for sharp, hollow silicon microneedles

    Science.gov (United States)

    Kim, H.; Theogarajan, L. S.; Pennathur, S.

    2018-03-01

    Scalability and manufacturability are impeding the mass commercialization of microneedles in the medical field. Specifically, microneedle geometries need to be sharp, beveled, and completely controllable, difficult to achieve with microelectromechanical fabrication techniques. In this work, we performed a parametric study using silicon etch chemistries to optimize the fabrication of scalable and manufacturable beveled silicon hollow microneedles. We theoretically verified our parametric results with diffusion reaction equations and created a design guideline for a various set of miconeedles (80-160 µm needle base width, 100-1000 µm pitch, 40-50 µm inner bore diameter, and 150-350 µm height) to show the repeatability, scalability, and manufacturability of our process. As a result, hollow silicon microneedles with any dimensions can be fabricated with less than 2% non-uniformity across a wafer and 5% deviation between different processes. The key to achieving such high uniformity and consistency is a non-agitated HF-HNO3 bath, silicon nitride masks, and surrounding silicon filler materials with well-defined dimensions. Our proposed method is non-labor intensive, well defined by theory, and straightforward for wafer scale mass production, opening doors to a plethora of potential medical and biosensing applications.

  10. Fundamentals of silicon carbide technology growth, characterization, devices and applications

    CERN Document Server

    Kimoto, Tsunenobu

    2014-01-01

    A comprehensive introduction and up-to-date reference to SiC power semiconductor devices covering topics from material properties to applicationsBased on a number of breakthroughs in SiC material science and fabrication technology in the 1980s and 1990s, the first SiC Schottky barrier diodes (SBDs) were released as commercial products in 2001.  The SiC SBD market has grown significantly since that time, and SBDs are now used in a variety of power systems, particularly switch-mode power supplies and motor controls.  SiC power MOSFETs entered commercial production in 2011, providing rugged, hig

  11. Electroless porous silicon formation applied to fabrication of boron–silica–glass cantilevers

    International Nuclear Information System (INIS)

    Teva, J; Davis, Z J; Hansen, O

    2010-01-01

    This work describes the characterization and optimization of anisotropic formation of porous silicon in large volumes (0.5–1 mm 3 ) of silicon by an electroless wet etching technique. The main goal is to use porous silicon as a sacrificial volume for bulk micromachining processes, especially in cases where etching of the full wafer thickness is needed. The porous silicon volume is formed by a metal-assisted etching in a wet chemical solution composed of hydrogen peroxide (30%), hydrofluoric acid (40%) and ethanol. This paper focuses on optimizing the etching conditions in terms of maximizing the etching rate and reproducibility of the etching. In addition to that, a study of the morphology of the pore that is obtained by this technique is presented. The results from the characterization of the process are applied to the fabrication of boron–silica–glass cantilevers that serve as a platform for bio-chemical sensors. The porous silicon volume is formed in an early step of the fabrication process, allowing easy handling of the wafer during all of the micromachining processes in the process flow. In the final process step, the porous silicon is quickly etched by immersing the wafer in a KOH solution

  12. Development of a fabrication technology for double-sided AC-coupled silicon microstrip detectors

    International Nuclear Information System (INIS)

    Dalla Betta, G.-F.; Boscardin, M.; Bosisio, L.; Rachevskaia, I.; Zen, M.; Zorzi, N.

    2001-01-01

    We report on the development of a fabrication technology for double-sided, AC-coupled silicon microstrip detectors for tracking applications. Two batches of detectors with good electrical figures and a low defect rate were successfully manufactured at IRST Laboratory. The processing techniques and the experimental results obtained from these detector prototypes are presented and discussed

  13. Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.; Kutbee, Arwa T.; Ghodsi Nasseri, Seyed Faizelldin; Bersuker, G.; Hussain, Muhammad Mustafa

    2014-01-01

    We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect

  14. A miniaturized silicon based device for nucleic acids electrochemical detection

    Directory of Open Access Journals (Sweden)

    Salvatore Petralia

    2015-12-01

    Full Text Available In this paper we describe a novel portable system for nucleic acids electrochemical detection. The core of the system is a miniaturized silicon chip composed by planar microelectrodes. The chip is embedded on PCB board for the electrical driving and reading. The counter, reference and work microelectrodes are manufactured using the VLSI technology, the material is gold for reference and counter electrodes and platinum for working electrode. The device contains also a resistor to control and measuring the temperature for PCR thermal cycling. The reaction chamber has a total volume of 20 μL. It is made in hybrid silicon–plastic technology. Each device contains four independent electrochemical cells.Results show HBV Hepatitis-B virus detection using an unspecific DNA intercalating redox probe based on metal–organic compounds. The recognition event is sensitively detected by square wave voltammetry monitoring the redox signals of the intercalator that strongly binds to the double-stranded DNA. Two approaches were here evaluated: (a intercalation of electrochemical unspecific probe on ds-DNA on homogeneous solution (homogeneous phase; (b grafting of DNA probes on electrode surface (solid phase.The system and the method here reported offer better advantages in term of analytical performances compared to the standard commercial optical-based real-time PCR systems, with the additional incomes of being potentially cheaper and easier to integrate in a miniaturized device. Keywords: Electrochemical detection, Real time PCR, Unspecific DNA intercalator

  15. Fabricating Zr-Based Bulk Metallic Glass Microcomponent by Suction Casting Using Silicon Micromold

    Directory of Open Access Journals (Sweden)

    Zhijing Zhu

    2014-08-01

    Full Text Available A suction casting process for fabricating Zr55Cu30Al10Ni5 bulk metallic glass microcomponent using silicon micromold has been studied. A complicated BMG microgear with 50 μm in module has been cast successfully. Observed by scanning electron microscopy and laser scanning confocal microscopy, we find that the cast microgear duplicates the silicon micromold including the microstructure on the surface. The amorphous state of the microgear is confirmed by transmission election microscopy. The nanoindentation hardness and elasticity modulus of the microgear reach 6.5 GPa and 94.5 GPa. The simulation and experimental results prove that the suction casting process with the silicon micromold is a promising one-step method to fabricate bulk metallic glass microcomponents with high performance for applications in microelectromechanical system.

  16. Epitaxy - a new technology for fabrication of advanced silicon radiation detectors

    International Nuclear Information System (INIS)

    Kemmer, J.; Wiest, F.; Pahlke, A.; Boslau, O.; Goldstrass, P.; Eggert, T.; Schindler, M.; Eisele, I.

    2005-01-01

    Twenty five years after the introduction of the planar process to the fabrication of silicon radiation detectors a new technology, which replaces the ion implantation doping by silicon epitaxy is presented. The power of this new technique is demonstrated by fabrication of silicon drift detectors (SDDs), whereby both the n-type and p-type implants are replaced by n-type and p-type epi-layers. The very first SDDs ever produced with this technique show energy resolutions of 150 eV for 55 Fe at -35 deg C. The area of the detectors is 10 mm 2 and the thickness 300 μm. The high potential of epitaxy for future detectors with integrated complex electronics is described

  17. Fabrication of a Silicon MOSFET Device with Bipolar Transistor Source,

    Science.gov (United States)

    1980-07-01

    NEGATIVE PHOTORESIST PROCEDURE ’•J n •:• fi >. 3 u i fc- Process Coat wafer Air dry Pre bake the resist coating Expose Develop Method Time...Orange (rather broad for orange) 0.82 Salmon 0.85 Dull, light red-violet 0.86 Violet £ 0.87 Blue-violet 0.89 Blue ::’ 0.92 V Blue-green •I 0.95

  18. Fabrication of an Open Microfluidic Device for Immunoblotting.

    Science.gov (United States)

    Abdel-Sayed, Philippe; Yamauchi, Kevin A; Gerver, Rachel E; Herr, Amy E

    2017-09-19

    Given the wide adoption of polydimethylsiloxane (PDMS) for the rapid fabrication of microfluidic networks and the utility of polyacrylamide gel electrophoresis (PAGE), we develop a technique for fabrication of PAGE molecular sieving gels in PDMS microchannel networks. In developing the fabrication protocol, we trade-off constraints on materials properties of these two polymer materials: PDMS is permeable to O 2 and the presence of O 2 inhibits the polymerization of polyacrylamide. We present a fabrication method compatible with performing PAGE protein separations in a composite PDMS-glass microdevice, that toggles from an "enclosed" microchannel for PAGE and blotting to an "open" PA gel lane for immunoprobing and readout. To overcome the inhibitory effects of O 2 , we coat the PDMS channel with a 10% benzophenone solution, which quenches the inhibiting effect of O 2 when exposed to UV, resulting in a PAGE-in-PDMS device. We then characterize the PAGE separation performance. Using a ladder of small-to-mid mass proteins (Trypsin Inhibitor (TI); Ovalbumin (OVA); Bovine Serum Albumin (BSA)), we observe resolution of the markers in TI, with comparable reproducibility to glass microdevice PAGE. We show that benzophenone groups incorporated into the gel through methacrylamide can be UV-activated multiple times to photocapture protein. PDMS microchannel network is reversibly bonded to a glass slide allowing direct access to separated proteins and subsequent in situ diffusion-driven immunoprobing and total protein Sypro red staining. We see this PAGE-in-PDMS fabrication technique as expanding the application and use of microfluidic PAGE without the need for a glass microfabrication infrastructure.

  19. Fabrication of amorphous silica nanowires via oxygen plasma treatment of polymers on silicon

    Science.gov (United States)

    Chen, Zhuojie; She, Didi; Chen, Qinghua; Li, Yanmei; Wu, Wengang

    2018-02-01

    We demonstrate a facile non-catalytic method of fabricating silica nanowires at room temperature. Different polymers including photoresists, parylene C and polystyrene are patterned into pedestals on the silicon substrates. The silica nanowires are obtained via the oxygen plasma treatment on those pedestals. Compared to traditional strategies of silica nanowire fabrication, this method is much simpler and low-cost. Through designing the proper initial patterns and plasma process parameters, the method can be used to fabricate various regiment nano-scale silica structure arrays in any laboratory with a regular oxygen-plasma-based cleaner or reactive-ion-etching equipment.

  20. Fabrication of Hybrid Organic Photovoltaic Devices Using Electrostatic Spray Method

    Directory of Open Access Journals (Sweden)

    Zhe-Wei Chiu

    2014-01-01

    Full Text Available Hybrid organic photovoltaic devices (OPVDs are fabricated using the electrostatic spray (e-spray method and their optical and electrical properties are investigated. E-spray is used to deposit a hybrid film (P3HT: PCBM/nanodiamond with morphology and optical characteristics onto OPVDs. The root-mean-square roughness and optical absorption increase with increasing nanodiamond content. The performance of e-spray is comparable to that of the spin-coating method under uniform conditions. The device takes advantage of the high current density, power conversion efficiency, and low cost. Nanodiamond improves the short-circuit current density and power conversion efficiency. The best performance was obtained with 1.5 wt% nanodiamond content, with a current density of 7.28 mA/cm2 and a power conversion efficiency of 2.25%.

  1. Role of the inversion layer on the charge injection in silicon nanocrystal multilayered light emitting devices

    Energy Technology Data Exchange (ETDEWEB)

    Tondini, S. [Nanoscience Laboratory, Department of Physics, University of Trento, Via Sommarive 14, 38123 Trento (Italy); Dipartimento di Fisica, Informatica e Matematica, Università di Modena e Reggio Emilia, Via Campi 213/a, 41125 Modena (Italy); Pucker, G. [Advanced Photonics and Photovoltaics Group, Bruno Kessler Foundation, Via Sommarive 18, 38123 Trento (Italy); Pavesi, L. [Nanoscience Laboratory, Department of Physics, University of Trento, Via Sommarive 14, 38123 Trento (Italy)

    2016-09-07

    The role of the inversion layer on injection and recombination phenomena in light emitting diodes (LEDs) is here studied on a multilayer (ML) structure of silicon nanocrystals (Si-NCs) embedded in SiO{sub 2}. Two Si-NC LEDs, which are similar for the active material but different in the fabrication process, elucidate the role of the non-radiative recombination rates at the ML/substrate interface. By studying current- and capacitance-voltage characteristics as well as electroluminescence spectra and time-resolved electroluminescence under pulsed and alternating bias pumping scheme in both the devices, we are able to ascribe the different experimental results to an efficient or inefficient minority carrier (electron) supply by the p-type substrate in the metal oxide semiconductor LEDs.

  2. Design, Fabrication, and Characterization of Carbon Nanotube Field Emission Devices for Advanced Applications

    Science.gov (United States)

    Radauscher, Erich Justin

    Carbon nanotubes (CNTs) have recently emerged as promising candidates for electron field emission (FE) cathodes in integrated FE devices. These nanostructured carbon materials possess exceptional properties and their synthesis can be thoroughly controlled. Their integration into advanced electronic devices, including not only FE cathodes, but sensors, energy storage devices, and circuit components, has seen rapid growth in recent years. The results of the studies presented here demonstrate that the CNT field emitter is an excellent candidate for next generation vacuum microelectronics and related electron emission devices in several advanced applications. The work presented in this study addresses determining factors that currently confine the performance and application of CNT-FE devices. Characterization studies and improvements to the FE properties of CNTs, along with Micro-Electro-Mechanical Systems (MEMS) design and fabrication, were utilized in achieving these goals. Important performance limiting parameters, including emitter lifetime and failure from poor substrate adhesion, are examined. The compatibility and integration of CNT emitters with the governing MEMS substrate (i.e., polycrystalline silicon), and its impact on these performance limiting parameters, are reported. CNT growth mechanisms and kinetics were investigated and compared to silicon (100) to improve the design of CNT emitter integrated MEMS based electronic devices, specifically in vacuum microelectronic device (VMD) applications. Improved growth allowed for design and development of novel cold-cathode FE devices utilizing CNT field emitters. A chemical ionization (CI) source based on a CNT-FE electron source was developed and evaluated in a commercial desktop mass spectrometer for explosives trace detection. This work demonstrated the first reported use of a CNT-based ion source capable of collecting CI mass spectra. The CNT-FE source demonstrated low power requirements, pulsing

  3. Ultra-thin alumina and silicon nitride MEMS fabricated membranes for the electron multiplication

    Science.gov (United States)

    Prodanović, V.; Chan, H. W.; Graaf, H. V. D.; Sarro, P. M.

    2018-04-01

    In this paper we demonstrate the fabrication of large arrays of ultrathin freestanding membranes (tynodes) for application in a timed photon counter (TiPC), a novel photomultiplier for single electron detection. Low pressure chemical vapour deposited silicon nitride (Si x N y ) and atomic layer deposited alumina (Al2O3) with thicknesses down to only 5 nm are employed for the membrane fabrication. Detailed characterization of structural, mechanical and chemical properties of the utilized films is carried out for different process conditions and thicknesses. Furthermore, the performance of the tynodes is investigated in terms of secondary electron emission, a fundamental attribute that determines their applicability in TiPC. Studied features and presented fabrication methods may be of interest for other MEMS application of alumina and silicon nitride as well, in particular where strong ultra-thin membranes are required.

  4. Fabrication of multi-functional silicon surface by direct laser writing

    Science.gov (United States)

    Verma, Ashwani Kumar; Soni, R. K.

    2018-05-01

    We present a simple, quick and one-step methodology based on nano-second laser direct writing for the fabrication of micro-nanostructures on silicon surface. The fabricated surfaces suppress the optical reflection by multiple reflection due to light trapping effect to a much lower value than polished silicon surface. These textured surfaces offer high enhancement ability after gold nanoparticle deposition and then explored for Surface Enhanced Raman Scattering (SERS) for specific molecular detection. The effect of laser scanning line interval on optical reflection and SERS signal enhancement ability was also investigated. Our results indicate that low optical reflection substrates exhibit uniform SERS enhancement with enhancement factor of the order of 106. Furthermore, this methodology provide an alternative approach for cost-effective large area fabrication with good control over feature size.

  5. Space and military radiation effects in silicon-on-insulator devices

    International Nuclear Information System (INIS)

    Schwank, J.R.

    1996-09-01

    Advantages in transient ionizing and single-event upset (SEU) radiation hardness of silicon-on-insulator (SOI) technology spurred much of its early development. Both of these advantages are a direct result of the reduced charge collection volume inherent to SOI technology. The fact that SOI transistor structures do not include parasitic n-p-n-p paths makes them immune to latchup. Even though considerable improvement in transient and single-event radiation hardness can be obtained by using SOI technology, there are some attributes of SOI devices and circuits that tend to limit their overall hardness. These attributes include the bipolar effect that can ultimately reduce the hardness of SOI ICs to SEU and transient ionizing radiation, and charge buildup in buried and sidewall oxides that can degrade the total-dose hardness of SOI devices. Nevertheless, high-performance SOI circuits can be fabricated that are hardened to both space and nuclear radiation environments, and radiation-hardened systems remain an active market for SOI devices. The effects of radiation on SOI MOS devices are reviewed

  6. SEM and HRTEM study of porous silicon--relationship between fabrication, morphology and optical properties

    International Nuclear Information System (INIS)

    Dian, J.; Macek, A.; Niznansky, D.; Nemec, I.; Vrkoslav, V.; Chvojka, T.; Jelinek, I.

    2004-01-01

    We studied the dependence of porous silicon (PS) morphology on fabrication conditions and the link between morphology, porosity and optical properties. P-type (1 0 0) silicon wafers with resistivity of 10 Ω cm were electrochemically etched in a HF:ethanol:water mixture at various HF concentrations and current densities. Porosity and thickness of the samples were determined gravimetrically. Detailed information about evolution of porous silicon layer morphology with variation of preparation conditions was obtained by scanning electron microscope (SEM), the presence of silicon nanoparticles was confirmed by high resolution transmission electron microscopy. Decrease of the mean size of silicon nanoparticles with increasing porous silicon porosity was revealed in a monotonous blue shift of photoluminescence (PL) maximum in room temperature photoluminescence spectra of studied samples. This blue shift is consistent with quantum confinement model of photoluminescence mechanism. We observed that total porosity of porous films cannot fully explain observed photoluminescence behavior and correct interpretation of the blue shift of photoluminescence spectra requires detailed knowledge of porous silicon morphology

  7. Towards neuromorphic electronics: Memristors on foldable silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.; Zidan, Mohammed A.; Salama, Khaled N.; Hussain, Muhammad Mustafa

    2014-01-01

    preserves the ultra-high integration density advantage unachievable on other flexible substrates. In addition, the memristive devices are of the size of a motor neuron and the flexible/folded architectural form factor is critical to match brain cortex

  8. Inorganic photovoltaic devices fabricated using nanocrystal spray deposition.

    Science.gov (United States)

    Foos, Edward E; Yoon, Woojun; Lumb, Matthew P; Tischler, Joseph G; Townsend, Troy K

    2013-09-25

    Soluble inorganic nanocrystals offer a potential route to the fabrication of all-inorganic devices using solution deposition techniques. Spray processing offers several advantages over the more common spin- and dip-coating procedures, including reduced material loss during fabrication, higher sample throughput, and deposition over a larger area. The primary difference observed, however, is an overall increase in the film roughness. In an attempt to quantify the impact of this morphology change on the devices, we compare the overall performance of spray-deposited versus spin-coated CdTe-based Schottky junction solar cells and model their dark current-voltage characteristics. Spray deposition of the active layer results in a power conversion efficiency of 2.3 ± 0.3% with a fill factor of 45.7 ± 3.4%, Voc of 0.39 ± 0.06 V, and Jsc of 13.3 ± 3.0 mA/cm(2) under one sun illumination.

  9. Fabricating 40 µm-thin silicon solar cells with different orientations by using SLiM-cut method

    Science.gov (United States)

    Wang, Teng-Yu; Chen, Chien-Hsun; Shiao, Jui-Chung; Chen, Sung-Yu; Du, Chen-Hsun

    2017-10-01

    Thin silicon foils with different crystal orientations were fabricated using the stress induced lift-off (SLiM-cut) method. The thickness of the silicon foils was approximately 40 µm. The ≤ft foil had a smoother surface than the ≤ft foil. With surface passivation, the minority carrier lifetimes of the ≤ft and ≤ft silicon foil were 1.0 µs and 1.6 µs, respectively. In this study, 4 cm2-thin silicon solar cells with heterojunction structures were fabricated. The energy conversion efficiencies were determined to be 10.74% and 14.74% for the ≤ft and ≤ft solar cells, respectively. The surface quality of the silicon foils was determined to affect the solar cell character. This study demonstrated that fabricating the solar cell by using silicon foil obtained from the SLiM-cut method is feasible.

  10. Zinc Alloys for the Fabrication of Semiconductor Devices

    Science.gov (United States)

    Ryu, Yungryel; Lee, Tae S.

    2009-01-01

    ZnBeO and ZnCdSeO alloys have been disclosed as materials for the improvement in performance, function, and capability of semiconductor devices. The alloys can be used alone or in combination to form active photonic layers that can emit over a range of wavelength values. Materials with both larger and smaller band gaps would allow for the fabrication of semiconductor heterostructures that have increased function in the ultraviolet (UV) region of the spectrum. ZnO is a wide band-gap material possessing good radiation-resistance properties. It is desirable to modify the energy band gap of ZnO to smaller values than that for ZnO and to larger values than that for ZnO for use in semiconductor devices. A material with band gap energy larger than that of ZnO would allow for the emission at shorter wavelengths for LED (light emitting diode) and LD (laser diode) devices, while a material with band gap energy smaller than that of ZnO would allow for emission at longer wavelengths for LED and LD devices. The amount of Be in the ZnBeO alloy system can be varied to increase the energy bandgap of ZnO to values larger than that of ZnO. The amount of Cd and Se in the ZnCdSeO alloy system can be varied to decrease the energy band gap of ZnO to values smaller than that of ZnO. Each alloy formed can be undoped or can be p-type doped using selected dopant elements, or can be n-type doped using selected dopant elements. The layers and structures formed with both the ZnBeO and ZnCdSeO semiconductor alloys - including undoped, p-type-doped, and n-type-doped types - can be used for fabricating photonic and electronic semiconductor devices for use in photonic and electronic applications. These devices can be used in LEDs, LDs, FETs (field effect transistors), PN junctions, PIN junctions, Schottky barrier diodes, UV detectors and transmitters, and transistors and transparent transistors. They also can be used in applications for lightemitting display, backlighting for displays, UV and

  11. MicroElectroMechanical devices and fabrication technologies for radio-frequency analog signal processing

    Science.gov (United States)

    Young, Darrin Jun

    The proliferation of wireless services creates a pressing need for compact and low cost RF transceivers. Modern sub-micron technologies provide the active components needed for miniaturization but fail to deliver high quality passives needed in oscillators and filters. This dissertation demonstrates procedures for adding high quality inductors and tunable capacitors to a standard silicon integrated circuits. Several voltage-controlled oscillators operating in the low Giga-Hertz range demonstrate the suitability of these components for high performance RF building blocks. Two low-temperature processes are described to add inductors and capacitors to silicon ICs. A 3-D coil geometry is used for the inductors rather than the conventional planar spiral to substantially reduce substrate loss and hence improve the quality factor and self-resonant frequency. Measured Q-factors at 1 GHz are 30 for a 4.8 nH device, 16 for 8.2 nH and 13.8 nH inductors. Several enhancements are proposed that are expected to result in a further improvement of the achievable Q-factor. This research investigates the design and fabrication of silicon-based IC-compatible high-Q tunable capacitors and inductors. The goal of this investigation is to develop a monolithic low phase noise radio-frequency voltage-controlled oscillator using these high-performance passive components for wireless communication applications. Monolithic VCOs will help the miniaturization of current radio transceivers, which offers a potential solution to achieve a single hand-held wireless phone with multistandard capabilities. IC-compatible micromachining fabrication technologies have been developed to realize on-chip high-Q RF tunable capacitors and 3-D coil inductors. The capacitors achieve a nominal capacitance value of 2 pF and can be tuned over 15% with 3 V. A quality factor over 60 has been measured at 1 GHz. 3-D coil inductors obtain values of 4.8 nH, 8.2 nH and 13.8 nH. At 1 GHz a Q factor of 30 has been achieved

  12. One-step Maskless Fabrication and Optical Characterization of Silicon Surfaces with Antireflective Properties and a White Color Appearance

    DEFF Research Database (Denmark)

    Sun, Ling; Feidenhans'l, Nikolaj Agentoft; Telecka, Agnieszka

    2016-01-01

    We report a simple one-step maskless fabrication of inverted pyramids on silicon wafers by reactive ion etching. The fabricated surface structures exhibit excellent anti-reflective properties: The total reflectance of the nano inverted pyramids fabricated by our method can be as low as 12% withou...... milky white color....

  13. Transfer-last suspended graphene fabrication on gold, graphite and silicon nanostructures

    OpenAIRE

    Reynolds, J.; Boodhoo, L.; Huang, C.C.; Hewak, D.W.; Saito, S.; Tsuchiya, Y.; Mizuta, H.

    2015-01-01

    While most graphene devices fabricated so far have been by transferring graphene onto flat substrates first, an interesting approach would be to transfer graphene onto patterned substrates to suspend graphene for future graphene nanoelectromechanical device applications. This novel "transfer-last" fabrication is beneficial for reducing possible damage of the suspended graphene caused by subsequent undercutting processes and typical substrate interactions. On the other hand, reduction of conta...

  14. Fabrication of disposable topographic silicon oxide from sawtoothed patterns: control of arrays of gold nanoparticles.

    Science.gov (United States)

    Cho, Heesook; Yoo, Hana; Park, Soojin

    2010-05-18

    Disposable topographic silicon oxide patterns were fabricated from polymeric replicas of sawtoothed glass surfaces, spin-coating of poly(dimethylsiloxane) (PDMS) thin films, and thermal annealing at certain temperature and followed by oxygen plasma treatment of the thin PDMS layer. A simple imprinting process was used to fabricate the replicated PDMS and PS patterns from sawtoothed glass surfaces. Next, thin layers of PDMS films having different thicknesses were spin-coated onto the sawtoothed PS surfaces and annealed at 60 degrees C to be drawn the PDMS into the valley of the sawtoothed PS surfaces, followed by oxygen plasma treatment to fabricate topographic silicon oxide patterns. By control of the thickness of PDMS layers, silicon oxide patterns having various line widths were fabricated. The silicon oxide topographic patterns were used to direct the self-assembly of polystyrene-block-poly(2-vinylpyridine) (PS-b-P2VP) block copolymer thin films via solvent annealing process. A highly ordered PS-b-P2VP micellar structure was used to let gold precursor complex with P2VP chains, and followed by oxygen plasma treatment. When the PS-b-P2VP thin films containing gold salts were exposed to oxygen plasma environments, gold salts were reduced to pure gold nanoparticles without changing high degree of lateral order, while polymers were completely degraded. As the width of trough and crest in topographic patterns increases, the number of gold arrays and size of gold nanoparticles are tuned. In the final step, the silicon oxide topographic patterns were selectively removed by wet etching process without changing the arrays of gold nanoparticles.

  15. Embedded nonvolatile memory devices with various silicon nitride energy band gaps on glass used for flat panel display applications

    International Nuclear Information System (INIS)

    Son, Dang Ngoc; Van Duy, Nguyen; Jung, Sungwook; Yi, Junsin

    2010-01-01

    Nonvolatile memory (NVM) devices with a nitride–nitride–oxynitride stack structure on a rough poly-silicon (poly-Si) surface were fabricated using a low-temperature poly-Si (LTPS) thin film transistor technology on glass substrates for application of flat panel display (FPD). The plasma-assisted oxidation/nitridation method is used to form a uniform oxynitride with an ultrathin tunneling layer on a rough LTPS surface. The NVMs, using a Si-rich silicon nitride film as a charge-trapping layer, were proposed as one of the solutions for the improvement of device performance such as the program/erase speed, the memory window and the charge retention characteristics. To further improve the vertical scaling and charge retention characteristics of NVM devices, the high-κ high-density N-rich SiN x films are used as a blocking layer. The fabricated NVM devices have outstanding electrical properties, such as a low threshold voltage, a high ON/OFF current ratio, a low subthreshold swing, a low operating voltage of less than ±9 V and a large memory window of 3.7 V, which remained about 1.9 V over a period of 10 years. These characteristics are suitable for electrical switching and data storage with in FPD application

  16. Battery, especially for portable devices, has an anode containing silicon

    NARCIS (Netherlands)

    Kan, S.Y.

    2002-01-01

    The anode (2) contains silicon. A battery with a silicon-containing anode is claimed. An Independent claim is also included for a method used to make the battery, comprising the doping of a silicon substrate (1) with charge capacity-increasing material (preferably boron, phosphorous or arsenic),

  17. The silicon sensor for the compact muon solenoid tracker. Control of the fabrication process

    International Nuclear Information System (INIS)

    Manolescu, Florentina; Mihul, Alexandru; Macchiolo, Anna

    2005-01-01

    The Compact Muon Solenoid (CMS) is one of the experiments at the Large Hadron Collider (LHC) under construction at CERN. The inner tracking system of this experiment consists of the world largest Silicon Strip Tracker (SST). In total, 24,244 silicon sensors are implemented covering an area of 206 m 2 . To construct this large system and to ensure its functionality for the full lifetime of ten years under the hard LHC condition, a detailed quality assurance program has been developed. This paper describes the strategy of the Process Qualification Control to monitor the stability of the fabrication process throughout the production phase and the results obtained are shown. (authors)

  18. Fabrication and Characterization of MWCNT-Based Bridge Devices

    KAUST Repository

    Chappanda, Karumbaiah N.; Batra, Nitin M; Holguin, Jorge; Da Costa, Pedro M. F. J.; Younis, Mohammad I.

    2017-01-01

    Carbon nanotubes (CNTs) are one of the most actively researched structural materials due to their interesting electrical, mechanical, and chemical properties. Unlike single walled carbon nanotubes (SWCNTs), little work has been focused on multi-walled carbon nanotubes (MWCNTs) and their potential for practical devices. Here, we have fabricated bridge-shape devices integrating MWCNTs (> 50 nm in outer diameter) using three processes: optical lithography, electron beam-induced platinum deposition, and surface micromachining. Each device consists of a doubly-clamped nanotube suspended over gold electrodes on a highly conductive Si substrate. The suspended nanotubes are characterized individually using Raman spectroscopy and semiconductor parameters analysis and, overall, show, high crystallinity and low electrical resistance. The spring constants of doubly-clamped nanotubes were characterized using atomic force microscopy force-displacement measurements, with values as high as 70 N/m observed. Highly stiff MWCNTs are promising for a variety of applications, such as resonators and electrical interconnects. Through simulations, we estimate the resonance frequencies and pull-in voltages of these suspended nano-structures. The dependence of key parameters, such as the nanotube's length, Young's modulus, axial stress, and wall thickness is also discussed.

  19. Fabrication and Characterization of MWCNT-Based Bridge Devices

    KAUST Repository

    Chappanda, Karumbaiah N.

    2017-08-21

    Carbon nanotubes (CNTs) are one of the most actively researched structural materials due to their interesting electrical, mechanical, and chemical properties. Unlike single walled carbon nanotubes (SWCNTs), little work has been focused on multi-walled carbon nanotubes (MWCNTs) and their potential for practical devices. Here, we have fabricated bridge-shape devices integrating MWCNTs (> 50 nm in outer diameter) using three processes: optical lithography, electron beam-induced platinum deposition, and surface micromachining. Each device consists of a doubly-clamped nanotube suspended over gold electrodes on a highly conductive Si substrate. The suspended nanotubes are characterized individually using Raman spectroscopy and semiconductor parameters analysis and, overall, show, high crystallinity and low electrical resistance. The spring constants of doubly-clamped nanotubes were characterized using atomic force microscopy force-displacement measurements, with values as high as 70 N/m observed. Highly stiff MWCNTs are promising for a variety of applications, such as resonators and electrical interconnects. Through simulations, we estimate the resonance frequencies and pull-in voltages of these suspended nano-structures. The dependence of key parameters, such as the nanotube\\'s length, Young\\'s modulus, axial stress, and wall thickness is also discussed.

  20. Fabrication of three-dimensional MIS nano-capacitor based on nano-imprinted single crystal silicon nanowire arrays

    KAUST Repository

    Zhai, Yujia; Palard, Marylene; Mathew, Leo; Hussain, Muhammad Mustafa; Willson, Grant Grant; Tutuc, Emanuel; Banerjee, Sanjay Kumar

    2012-01-01

    We report fabrication of single crystalline silicon nanowire based-three-dimensional MIS nano-capacitors for potential analog and mixed signal applications. The array of nanowires is patterned by Step and Flash Imprint Lithography (S-FIL). Deep silicon etching (DSE) is used to form the nanowires with high aspect ratio, increase the electrode area and thus significantly enhance the capacitance. High-! dielectric is deposited by highly conformal atomic layer deposition (ALD) Al2O3 over the Si nanowires, and sputtered metal TaN serves as the electrode. Electrical measurements of fabricated capacitors show the expected increase of capacitance with greater nanowire height and decreasing dielectric thickness, consistent with calculations. Leakage current and time-dependent dielectric breakdown (TDDB) are also measured and compared with planar MIS capacitors. In view of greater interest in 3D transistor architectures, such as FinFETs, 3D high density MIS capacitors offer an attractive device technology for analog and mixed signal applications. - See more at: http://www.eurekaselect.com/105099/article#sthash.EzeJxk6j.dpuf

  1. Fabrication of three-dimensional MIS nano-capacitor based on nano-imprinted single crystal silicon nanowire arrays

    KAUST Repository

    Zhai, Yujia

    2012-11-26

    We report fabrication of single crystalline silicon nanowire based-three-dimensional MIS nano-capacitors for potential analog and mixed signal applications. The array of nanowires is patterned by Step and Flash Imprint Lithography (S-FIL). Deep silicon etching (DSE) is used to form the nanowires with high aspect ratio, increase the electrode area and thus significantly enhance the capacitance. High-! dielectric is deposited by highly conformal atomic layer deposition (ALD) Al2O3 over the Si nanowires, and sputtered metal TaN serves as the electrode. Electrical measurements of fabricated capacitors show the expected increase of capacitance with greater nanowire height and decreasing dielectric thickness, consistent with calculations. Leakage current and time-dependent dielectric breakdown (TDDB) are also measured and compared with planar MIS capacitors. In view of greater interest in 3D transistor architectures, such as FinFETs, 3D high density MIS capacitors offer an attractive device technology for analog and mixed signal applications. - See more at: http://www.eurekaselect.com/105099/article#sthash.EzeJxk6j.dpuf

  2. Fabrication, characterization and testing of silicon photomultipliers for the Muon Portal Project

    International Nuclear Information System (INIS)

    La Rocca, P.; Billotta, S.; Blancato, A.A.; Bonanno, D.; Bonanno, G.; Fallica, G.; Garozzo, S.; Lo Presti, D.; Marano, D.; Pugliatti, C.; Riggi, F.; Romeo, G.; Santagati, G.; Valvo, G.

    2015-01-01

    The Muon Portal is a recently started Project aiming at the construction of a large area tracking detector that exploits the muon tomography technique to inspect the contents of traveling cargo containers. The detection planes will be made of plastic scintillator strips with embedded wavelength-shifting fibres. Special designed silicon photomultipliers will read the scintillation light transported by the fibres along the strips and a dedicated electronics will combine signals from different strips to reduce the overall number of channels, without loss of information. Different silicon photomultiplier prototypes, both with the p-on-n and n-on-p technologies, have been produced by STMicroelectronics during the last years. In this paper we present the main characteristics of the silicon photomultipliers designed for the Muon Portal Project and describe the setup and the procedure implemented for the characterization of these devices, giving some statistical results obtained from the test of a first batch of silicon photomultipliers

  3. Fabrication, characterization and testing of silicon photomultipliers for the Muon Portal Project

    Energy Technology Data Exchange (ETDEWEB)

    La Rocca, P., E-mail: paola.larocca@ct.infn.it [Dipartimento di Fisica e Astronomia - Catania (Italy); INFN - Sezione di Catania (Italy); Billotta, S. [INAF - Osservatorio Astrofisico di Catania (Italy); Blancato, A.A.; Bonanno, D. [Dipartimento di Fisica e Astronomia - Catania (Italy); Bonanno, G. [INAF - Osservatorio Astrofisico di Catania (Italy); Fallica, G. [STMicroelectronics - Catania (Italy); Garozzo, S. [INAF - Osservatorio Astrofisico di Catania (Italy); Lo Presti, D. [Dipartimento di Fisica e Astronomia - Catania (Italy); INFN - Sezione di Catania (Italy); Marano, D. [INAF - Osservatorio Astrofisico di Catania (Italy); Pugliatti, C.; Riggi, F. [Dipartimento di Fisica e Astronomia - Catania (Italy); INFN - Sezione di Catania (Italy); Romeo, G. [INAF - Osservatorio Astrofisico di Catania (Italy); Santagati, G. [Dipartimento di Fisica e Astronomia - Catania (Italy); INFN - Sezione di Catania (Italy); Valvo, G. [STMicroelectronics - Catania (Italy)

    2015-07-01

    The Muon Portal is a recently started Project aiming at the construction of a large area tracking detector that exploits the muon tomography technique to inspect the contents of traveling cargo containers. The detection planes will be made of plastic scintillator strips with embedded wavelength-shifting fibres. Special designed silicon photomultipliers will read the scintillation light transported by the fibres along the strips and a dedicated electronics will combine signals from different strips to reduce the overall number of channels, without loss of information. Different silicon photomultiplier prototypes, both with the p-on-n and n-on-p technologies, have been produced by STMicroelectronics during the last years. In this paper we present the main characteristics of the silicon photomultipliers designed for the Muon Portal Project and describe the setup and the procedure implemented for the characterization of these devices, giving some statistical results obtained from the test of a first batch of silicon photomultipliers.

  4. Fabrication and properties of graphene reinforced silicon nitride composite materials

    Energy Technology Data Exchange (ETDEWEB)

    Yang, Yaping; Li, Bin, E-mail: libin@nudt.edu.cn; Zhang, Changrui; Wang, Siqing; Liu, Kun; Yang, Bei

    2015-09-17

    Silicon nitride (Si{sub 3}N{sub 4}) ceramic composites reinforced with graphene platelets (GPLs) were prepared by hot pressed sintering and pressureless sintering respectively. Adequate intermixing of the GPLs and the ceramic powders was achieved in nmethyl-pyrrolidone (NMP) under ultrasonic vibration followed by ball-milling. The microstructure and phases of the Si{sub 3}N{sub 4} ceramic composites were investigated by Field Emission Scanning Electron Microscopy (SEM) and X-ray diffraction (XRD). The effects of GPLs on the composites' mechanical properties were analyzed. The results showed that GPLs were well dispersed in the Si{sub 3}N{sub 4} ceramic matrix. β-Si{sub 3}N{sub 4,} O′-sialon and GPLs were present in the hot-pressed composites while pressureless sintered composites contain β-Si{sub 3}N{sub 4}, Si, SiC and GPLs. Graphene has the potential to improve the mechanical properties of both the hot pressed and pressureless sintered composites. Toughening effect of GPLs on the pressureless sintered composites appeared more effective than that on the hot pressed composites. Toughening mechanisms, such as pull-out, crack bridging and crack deflection induced by GPLs were observed in the composites prepared by the two methods.

  5. Fabrication and properties of graphene reinforced silicon nitride composite materials

    International Nuclear Information System (INIS)

    Yang, Yaping; Li, Bin; Zhang, Changrui; Wang, Siqing; Liu, Kun; Yang, Bei

    2015-01-01

    Silicon nitride (Si 3 N 4 ) ceramic composites reinforced with graphene platelets (GPLs) were prepared by hot pressed sintering and pressureless sintering respectively. Adequate intermixing of the GPLs and the ceramic powders was achieved in nmethyl-pyrrolidone (NMP) under ultrasonic vibration followed by ball-milling. The microstructure and phases of the Si 3 N 4 ceramic composites were investigated by Field Emission Scanning Electron Microscopy (SEM) and X-ray diffraction (XRD). The effects of GPLs on the composites' mechanical properties were analyzed. The results showed that GPLs were well dispersed in the Si 3 N 4 ceramic matrix. β-Si 3 N 4, O′-sialon and GPLs were present in the hot-pressed composites while pressureless sintered composites contain β-Si 3 N 4 , Si, SiC and GPLs. Graphene has the potential to improve the mechanical properties of both the hot pressed and pressureless sintered composites. Toughening effect of GPLs on the pressureless sintered composites appeared more effective than that on the hot pressed composites. Toughening mechanisms, such as pull-out, crack bridging and crack deflection induced by GPLs were observed in the composites prepared by the two methods

  6. An experimental study of solid source diffusion by spin on dopants and its application for minimal silicon-on-insulator CMOS fabrication

    Science.gov (United States)

    Liu, Yongxun; Koga, Kazuhiro; Khumpuang, Sommawan; Nagao, Masayoshi; Matsukawa, Takashi; Hara, Shiro

    2017-06-01

    Solid source diffusions of phosphorus (P) and boron (B) into the half-inch (12.5 mm) minimal silicon (Si) wafers by spin on dopants (SOD) have been systematically investigated and the physical-vapor-deposited (PVD) titanium nitride (TiN) metal gate minimal silicon-on-insulator (SOI) complementary metal-oxide-semiconductor (CMOS) field-effect transistors (FETs) have successfully been fabricated using the developed SOD thermal diffusion technique. It was experimentally confirmed that a low temperature oxidation (LTO) process which depresses a boron silicide layer formation is effective way to remove boron-glass in a diluted hydrofluoric acid (DHF) solution. It was also found that top Si layer thickness of SOI wafers is reduced in the SOD thermal diffusion process because of its consumption by thermal oxidation owing to the oxygen atoms included in SOD films, which should be carefully considered in the ultrathin SOI device fabrication. Moreover, normal operations of the fabricated minimal PVD-TiN metal gate SOI-CMOS inverters, static random access memory (SRAM) cells and ring oscillators have been demonstrated. These circuit level results indicate that no remarkable particles and interface traps were introduced onto the minimal wafers during the device fabrication, and the developed solid source diffusion by SOD is useful for the fabrication of functional logic gate minimal SOI-CMOS integrated circuits.

  7. Novel silicon stripixel detector: concept, simulation, design, and fabrication

    International Nuclear Information System (INIS)

    Li, Z.

    2004-01-01

    A novel detector concept has been developed in this work that has the necessary properties to provide two-dimensional (2-D) position sensitivity with a moderate number of readout electronic channels and single-sided detector fabrication process. The concept is based on interleaved pixel electrodes arranged in a projective X-Y readout, which makes possible position encoding with minimum number of channels. In further discussions, we refer to this concept as 'stripixel' detector, as it combines the 2-D position resolution of a pixel electrode geometry with the simplicity of the projective readout of a double-sided strip detector. For DC coupled detectors with large pitches (>20 μm), individual pixels are divided into X- and Y-cell that can be interleaved by many different schemes that ensure the charge sharing between them. This type of stripixel detectors is called interleaved stripixel detectors. When the detector pitch goes down (<20 μm), the X and Y-pixel may not have to be interleaved, and they can be connected in an alternating way to X-Y strip readout. This type of stripixel detectors is called alternating stripixel detectors (ASD). For ASD, a position resolution better than 1 μm in two dimensions can be achieved by determining the centroid of the charge collected on pixel electrodes with a granularity in the range of 5-6 μm. For AC coupled detectors, no interleaving scheme may be needed, and there may be no limit on the pitch size, i.e. it may go from pitches in the order of microns, to hundreds of microns or even mm's. This electrode granularity does not pose difficult demands on the lithography and the fabrication technology. This novel detector concept can be applied to any semiconductor detectors/sensors, such as Si, Ge, GaAs, SiC, diamond, etc

  8. Tritium Systems Test Assembly: design for major device fabrication review

    International Nuclear Information System (INIS)

    Anderson, J.L.; Sherman, R.H.

    1977-06-01

    This document has been prepared for the Major Device Fabrication Review for the Tritium Systems Test Assembly (TSTA). The TSTA is dedicated to the development, demonstration, and interfacing of technologies related to the deuterium-tritium fuel cycle for fusion reactor systems. The principal objectives for TSTA are: (a) demonstrate the fuel cycle for fusion reactor systems; (b) develop test and qualify equipment for tritium service in the fusion program; (c) develop and test environmental and personnel protective systems; (d) evaluate long-term reliability of components; (e) demonstrate long-term safe handling of tritium with no major releases or incidents; and (f) investigate and evaluate the response of the fuel cycle and environmental packages to normal, off-normal, and emergency situations. This document presents the current status of a conceptual design and cost estimate for TSTA. The total cost to design, construct, and operate TSTA through FY-1981 is estimated to be approximately $12.2 M

  9. Biaxial testing for fabrics and foils optimizing devices and procedures

    CERN Document Server

    Beccarelli, Paolo

    2015-01-01

    This book offers a well-structured, critical review of current design practice for tensioned membrane structures, including a detailed analysis of the experimental data required and critical issues relating to the lack of a set of design codes and testing procedures. The technical requirements for biaxial testing equipment are analyzed in detail, and aspects that need to be considered when developing biaxial testing procedures are emphasized. The analysis is supported by the results of a round-robin exercise comparing biaxial testing machines that involved four of the main research laboratories in the field. The biaxial testing devices and procedures presently used in Europe are extensively discussed, and information is provided on the design and implementation of a biaxial testing rig for architectural fabrics at Politecnico di Milano, which represents a benchmark in the field. The significance of the most recent developments in biaxial testing is also explored.

  10. Defects in silicon effect on device performance and relationship to crystal growth conditions

    Science.gov (United States)

    Jastrzebski, L.

    1985-01-01

    A relationship between material defects in silicon and the performance of electronic devices will be described. A role which oxygen and carbon in silicon play during the defects generation process will be discussed. The electronic properties of silicon are a strong function of the oxygen state in the silicon. This state controls mechanical properties of silicon efficiency for internal gettering and formation of defects in the device's active area. In addition, to temperature, time, ambience, and the cooling/heating rates of high temperature treatments, the oxygen state is a function of the crystal growth process. The incorporation of carbon and oxygen into silicon crystal is controlled by geometry and rotation rates applied to crystal and crucible during crystal growths. Also, formation of nucleation centers for oxygen precipitation is influenced by the growth process, although there is still a controversy which parameters play a major role. All these factors will be reviewed with special emphasis on areas which are still ambiguous and controversial.

  11. Luneburg lens in silicon photonics.

    Science.gov (United States)

    Di Falco, Andrea; Kehr, Susanne C; Leonhardt, Ulf

    2011-03-14

    The Luneburg lens is an aberration-free lens that focuses light from all directions equally well. We fabricated and tested a Luneburg lens in silicon photonics. Such fully-integrated lenses may become the building blocks of compact Fourier optics on chips. Furthermore, our fabrication technique is sufficiently versatile for making perfect imaging devices on silicon platforms.

  12. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

    2015-01-01

    mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen

  13. IC Compatible Wafer Level Fabrication of Silicon Nanowire Field Effect Transistors for Biosensing Applications

    NARCIS (Netherlands)

    Moh, T.S.Y.

    2013-01-01

    In biosensing, nano-devices such as Silicon Nanowire Field Effect Transistors (SiNW FETs) are promising components/sensors for ultra-high sensitive detection, especially when samples are low in concentration or a limited volume is available. Current processing of SiNW FETs often relies on expensive

  14. Fabrication of double-dot single-electron transistor in silicon nanowire

    International Nuclear Information System (INIS)

    Jo, Mingyu; Kaizawa, Takuya; Arita, Masashi; Fujiwara, Akira; Ono, Yukinori; Inokawa, Hiroshi; Choi, Jung-Bum; Takahashi, Yasuo

    2010-01-01

    We propose a simple method for fabricating Si single-electron transistors (SET) with coupled dots by means of a pattern-dependent-oxidation (PADOX) method. The PADOX method is known to convert a small one-dimensional Si wire formed on a silicon-on-insulator (SOI) substrate into a SET automatically. We fabricated a double-dot Si SET when we oxidized specially designed Si nanowires formed on SOI substrates. We analyzed the measured electrical characteristics by fitting the measurement and simulation results and confirmed the double-dot formation and the position of the two dots in the Si wire.

  15. Scanning tunnelling microscope fabrication of phosphorus array in silicon for a nuclear spin quantum computer

    International Nuclear Information System (INIS)

    O'Brien, J.L.; Schofield, S.R.; Simmons, M.Y.; Clark, R.G.; Dzurak, A.S.; Prawer, S.; Adrienko, I.; Cimino, A.

    2000-01-01

    Full text: In the vigorous worldwide effort to experimentally build a quantum computer, recent intense interest has focussed on solid state approaches for their promise of scalability. Particular attention has been given to silicon-based proposals that can readily be integrated into conventional computing technology. For example the Kane design uses the well isolated nuclear spin of phosphorous donor nuclei (I=1/2) as the qubits embedded in isotopically pure 28 Si (I=0). We demonstrate the ability to fabricate a precise array of P atoms on a clean Si surface with atomic-scale resolution compatible with the fabrication of the Kane quantum computer

  16. Fabrication and Photovoltaic Characteristics of Coaxial Silicon Nanowire Solar Cells Prepared by Wet Chemical Etching

    Directory of Open Access Journals (Sweden)

    Chien-Wei Liu

    2012-01-01

    Full Text Available Nanostructured solar cells with coaxial p-n junction structures have strong potential to enhance the performances of the silicon-based solar cells. This study demonstrates a radial junction silicon nanowire (RJSNW solar cell that was fabricated simply and at low cost using wet chemical etching. Experimental results reveal that the reflectance of the silicon nanowires (SNWs declines as their length increases. The excellent light trapping was mainly associated with high aspect ratio of the SNW arrays. A conversion efficiency of ∼7.1% and an external quantum efficiency of ∼64.6% at 700 nm were demonstrated. Control of etching time and diffusion conditions holds great promise for the development of future RJSNW solar cells. Improving the electrode/RJSNW contact will promote the collection of carries in coaxial core-shell SNW array solar cells.

  17. Sub-micron silicon nitride waveguide fabrication using conventional optical lithography.

    Science.gov (United States)

    Huang, Yuewang; Zhao, Qiancheng; Kamyab, Lobna; Rostami, Ali; Capolino, Filippo; Boyraz, Ozdal

    2015-03-09

    We demonstrate a novel technique to fabricate sub-micron silicon nitride waveguides using conventional contact lithography with MEMS-grade photomasks. Potassium hydroxide anisotropic etching of silicon facilitates line reduction and roughness smoothing and is key to the technique. The fabricated waveguides is measured to have a propagation loss of 0.8dB/cm and nonlinear coefficient of γ = 0.3/W/m. A low anomalous dispersion of <100ps/nm/km is also predicted. This type of waveguide is highly suitable for nonlinear optics. The channels naturally formed on top of the waveguide also make it promising for plasmonics and quantum efficiency enhancement in sensing applications.

  18. Breakdown study of dc silicon micro-discharge devices

    International Nuclear Information System (INIS)

    Schwaederlé, L; Kulsreshath, M K; Lefaucheux, P; Tillocher, T; Dussart, R; Overzet, L J

    2012-01-01

    The influence of geometrical and operating parameters on the electrical characteristics of dc microcavity discharges provides insight into their controlling physics. We present here results of such a study on silicon-based microcavity discharge devices carried out in helium at pressure ranging from 100 to 1000 Torr. Different micro-reactor configurations were measured. The differences include isolated single cavities versus arrays of closely spaced cavities, various cavity geometries (un-etched as well as isotropically and anisotropically etched), various dimensions (100 or 150 µm cavity diameter and 0-150 µm depth). The electrode gap was kept constant in all cases at approximately 6 µm. The applied electric field reaches 5 × 10 7 V m -1 which results in current and power densities up to 2 A cm -2 and 200 kW cm -3 , respectively. The number of microcavities and the microcavity depth are shown to be the most important geometrical parameters for predicting breakdown and operation of microcavity devices. The probability of initiatory electron generation which is volume dependent and the electric field strength which is depth dependent are, respectively, considered to be responsible. The cavity shape (isotropic/anisotropic) and diameter had no significant influence. The number of micro-discharges that could be ignited depends on the rate of voltage rise and pressure. Larger numbers ignite at lower frequency and pressure. In addition, the voltage polarity has the largest influence on the electrical characteristics of the micro-discharge of all parameters, which is due to both the asymmetric role of electrodes as electron emitter and the non-uniformity of the electric field resulting in different ionization efficiencies. The qualitative shape of all breakdown voltage versus pressure curves can be explained in terms of the distance over which the discharge breakdown effectively occurs as long as one understand that this distance can depend on pressure. (paper)

  19. Design, fabrication and characterization of the first AC-coupled silicon microstrip sensors in India

    International Nuclear Information System (INIS)

    Aziz, T; Chendvankar, S R; Mohanty, G B; Patil, M R; Rao, K K; Rani, Y R; Rao, Y P P; Behnamian, H; Mersi, S; Naseri, M

    2014-01-01

    This paper reports the design, fabrication and characterization of single-sided silicon microstrip sensors with integrated biasing resistors and coupling capacitors, produced for the first time in India. We have first developed a prototype sensor on a four-inch wafer. After finding suitable test procedures for characterizing these AC coupled sensors, we fine-tuned various process parameters in order to produce sensors of the desired specifications

  20. Glass-embedded two-dimensional silicon photonic crystal devices with a broad bandwidth waveguide and a high quality nanocavity.

    Science.gov (United States)

    Jeon, Seung-Woo; Han, Jin-Kyu; Song, Bong-Shik; Noda, Susumu

    2010-08-30

    To enhance the mechanical stability of a two-dimensional photonic crystal slab structure and maintain its excellent performance, we designed a glass-embedded silicon photonic crystal device consisting of a broad bandwidth waveguide and a nanocavity with a high quality (Q) factor, and then fabricated the structure using spin-on glass (SOG). Furthermore, we showed that the refractive index of the SOG could be tuned from 1.37 to 1.57 by varying the curing temperature of the SOG. Finally, we demonstrated a glass-embedded heterostructured cavity with an ultrahigh Q factor of 160,000 by adjusting the refractive index of the SOG.

  1. Progress in high-efficient solution process organic photovoltaic devices fundamentals, materials, devices and fabrication

    CERN Document Server

    Li, Gang

    2015-01-01

    This book presents an important technique to process organic photovoltaic devices. The basics, materials aspects and manufacturing of photovoltaic devices with solution processing are explained. Solution processable organic solar cells - polymer or solution processable small molecules - have the potential to significantly reduce the costs for solar electricity and energy payback time due to the low material costs for the cells, low cost and fast fabrication processes (ambient, roll-to-roll), high material utilization etc. In addition, organic photovoltaics (OPV) also provides attractive properties like flexibility, colorful displays and transparency which could open new market opportunities. The material and device innovations lead to improved efficiency by 8% for organic photovoltaic solar cells, compared to 4% in 2005. Both academic and industry research have significant interest in the development of this technology. This book gives an overview of the booming technology, focusing on the solution process fo...

  2. A novel fabrication method of silicon nano-needles using MEMS TMAH etching techniques

    International Nuclear Information System (INIS)

    Yan Sheping; Xu Yang; Yang Junyi; Wang Huiquan; Jin Zhonghe; Wang Yuelin

    2011-01-01

    Nano-needles play important roles in nanoscale operations. However, current nano-needle fabrication is usually expensive and controling the sizes and angles is complicated. We have developed a simple and low cost silicon nano-needle fabrication method using traditional microelectromechanical system (MEMS) tetramethyl ammonium hydroxide (TMAH) etching techniques. We take advantage of the fact that the decrease of the silicon etch rate in TMAH solutions exhibits an inverse fourth power dependence on the boron doping concentration in our nano-needle fabrication. Silicon nano-needles, with high aspect ratio and sharp angles θ as small as 2.9 deg., are obtained, which could be used for bio-sensors and nano-handling procedures, such as penetrating living cells. An analytic model is proposed to explain the etching evolution of the experimental results, which is used to predict the needle angle, length, and etching time. Based on our method, nano-needles with small acute angle θ can be obtained.

  3. Electrical and optical characteristics of heterojunction devices composed of silicon nanowires and mercury selenide nanoparticle films on flexible plastics.

    Science.gov (United States)

    Yeo, Minje; Yun, Junggwon; Kim, Sangsig

    2013-09-01

    A pn heterojunction device based on p-type silicon (Si) nanowires (NWs) prepared by top-down method and n-type mercury selenide (HgSe) nanoparticles (NPs) synthesized by the colloidal method have been fabricated on a flexible plastic substrate. The synthesized HgSe NPs were analyzed through the effective mass approximation. The characteristics of the heterojunction device were examined and studied with the energy band diagram. The device showed typical diode characteristics with a turn-on voltage of 1.5 V and exhibited a high rectification ratio of 10(3) under relatively low forward bias. Under illumination of 633-nm-wavelength light, the device presented photocurrent efficiency of 117.5 and 20.1 nA/W under forward bias and reverse bias conditions, respectively. Moreover, the photocurrent characteristics of the device have been determined by bending of the plastic substrate upward and downward with strain of 0.8%. Even though the photocurrent efficiency has fluctuations during the bending cycles, the values are roughly maintained for 10(4) bending cycles. This result indicates that the fabricated heterojunction device has the potential to be applied as fundamental elements of flexible nanoelectronics.

  4. Molecular monolayers for electrical passivation and functionalization of silicon-based solar energy devices

    NARCIS (Netherlands)

    Veerbeek, Janneke; Firet, Nienke J.; Vijselaar, Wouter; Elbersen, R.; Gardeniers, Han; Huskens, Jurriaan

    2017-01-01

    Silicon-based solar fuel devices require passivation for optimal performance yet at the same time need functionalization with (photo)catalysts for efficient solar fuel production. Here, we use molecular monolayers to enable electrical passivation and simultaneous functionalization of silicon-based

  5. Friction and dynamically dissipated energy dependence on temperature in polycrystalline silicon MEMS devices

    NARCIS (Netherlands)

    Gkouzou, A.; Kokorian, J.; Janssen, G.C.A.M.; van Spengen, W.M.

    2017-01-01

    In this paper, we report on the influence of capillary condensation on the sliding friction of sidewall surfaces in polycrystalline silicon micro-electromechanical
    systems (MEMS). We developed a polycrystalline silicon MEMS tribometer, which is a microscale test device with two components

  6. Fabrication and characterization of an integrated ionic device from suspended polypyrrole and alamethicin-reconstituted lipid bilayer membranes

    International Nuclear Information System (INIS)

    Northcutt, Robert; Sundaresan, Vishnu-Baba

    2012-01-01

    Conducting polymers are electroactive materials that undergo conformal relaxation of the polymer backbone in the presence of an electrical field through ion exchange with solid or aqueous electrolytes. This conformal relaxation and the associated morphological changes make conducting polymers highly suitable for actuation and sensing applications. Among smart materials, bioderived active materials also use ion transport for sensing and actuation functions via selective ion transport. The transporter proteins extracted from biological cell membranes and reconstituted into a bilayer lipid membrane in bioderived active materials regulate ion transport for engineering functions. The protein transporter reconstituted in the bilayer lipid membrane is referred to as the bioderived membrane and serves as the active component in bioderived active materials. Inspired by the similarities in the physics of transduction in conducting polymers and bioderived active materials, an integrated ionic device is formed from the bioderived membrane and the conducting polymer membrane. This ionic device is fabricated into a laminated thin-film membrane and a common ion that can be processed by the bioderived and the conducting polymer membranes couple the ionic function of these two membranes. An integrated ionic device, fabricated from polypyrrole (PPy) doped with sodium dodecylbenzenesulfonate (NaDBS) and an alamethicin-reconstituted DPhPC bilayer lipid membrane, is presented in this paper. A voltage-gated sodium current regulates the electrochemical response in the PPy(DBS) layer. The integrated device is fabricated on silicon-based substrates through microfabrication, electropolymerization, and vesicle fusion, and ionic activity is characterized through electrochemical measurements. (paper)

  7. An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

    Science.gov (United States)

    Teo, Adrian J. T.; Li, Holden; Tan, Say Hwa; Yoon, Yong-Jin

    2017-06-01

    Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G-1, and a highest recorded sensitivity of 44.1 mV G-1. A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices.

  8. An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

    International Nuclear Information System (INIS)

    Teo, Adrian J T; Li, Holden; Yoon, Yong-Jin; Tan, Say Hwa

    2017-01-01

    Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G −1 , and a highest recorded sensitivity of 44.1 mV G −1 . A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices. (technical note)

  9. Nitride-based Quantum-Confined Structures for Ultraviolet-Visible Optical Devices on Silicon Substrates

    KAUST Repository

    Janjua, Bilal

    2017-04-01

    III–V nitride quantum-confined structures embedded in nanowires (NWs), also known as quantum-disks-in-nanowires (Qdisks-in-NWs), have recently emerged as a new class of nanoscale materials exhibiting outstanding properties for optoelectronic devices and systems. It is promising for circumventing the technology limitation of existing planar epitaxy devices, which are bounded by the lattice-, crystal-structure-, and thermal- matching conditions. This work presents significant advances in the growth of good quality GaN, InGaN and AlGaN Qdisks-in-NWs based on careful optimization of the growth parameters, coupled with a meticulous layer structure and active region design. The NWs were grown, catalyst-free, using plasma assisted molecular beam epitaxy (PAMBE) on silicon (Si) substrates. A 2-step growth scheme was developed to achieve high areal density, dislocation free and vertically aligned NWs on Ti/Si substrates. Numerical modeling of the NWs structures, using the nextnano3 software, showed reduced polarization fields, and, in the presence of Qdisks, exhibited improved quantum-confinement; thus contributing to high carrier radiative-recombination rates. As a result, based on the growth and device structure optimization, the technologically challenging orange and yellow NWs light emitting devices (LEDs) targeting the ‘green-yellow’ gap were demonstrated on scalable, foundry compatible, and low-cost Ti coated Si substrates. The NWs work was also extended to LEDs emitting in the ultraviolet (UV) range with niche applications in environmental cleaning, UV-curing, medicine, and lighting. In this work, we used a Ti (100 nm) interlayer and Qdisks to achieve good quality AlGaN based UV-A (320 - 400 nm) device. To address the issue of UV-absorbing polymer, used in the planarization process, we developed a pendeo-epitaxy technique, for achieving an ultra-thin coalescence of the top p-GaN contact layer, for a self-planarized Qdisks-in-NWs UV-B (280 – 320 nm) LED grown

  10. Fabrication of optical devices in poly(dimethylsiloxane) by proton microbeam

    International Nuclear Information System (INIS)

    Huszank, R.; Szilasi, S.Z.; Rajta, I.; Csik, A.

    2009-01-01

    Complete text of publication follows. Optical diffraction grating and micro Fresnel zone plate type structures were fabricated in relatively thin poly(dimethylsiloxane) (PDMS) layers using proton beam writing technique and the performance of these optical devices was tested. Micro-optics is a key technology in many fields of common applications like, for example, data communication, lighting technology, industrial automation, display technology, sensing applications and data storage. It enables new functionalities and applications previously inaccessible and improves performance of the already available products with reduced cost, volume and weight. There are a few different fabrication techniques to produce refractive or diffractive micro-optical devices such as X-ray lithography, UV-lithography, e-beam lithography, laser writing, plasma etching, proton beam writing. In general, three different kinds of materials are used for micro-optics, such as glass, polymers and crystal. PDMS is a commonly used silicon-based organic polymer, optically clear, generally considered to be inert, non-toxic and biocompatible and it has been used as a resist material for direct write techniques only in very few cases. In this work, PDMS was used as a resist material; the structures were irradiated directly into the polymer. We were looking for a biocompatible, micropatternable polymer in which the chemical structure changes significantly due to proton beam exposure making the polymer capable of proton beam writing. We demonstrated that the change in the structure of the polymer is so significant that there is no need to perform any development processes. The proton irradiation causes refractive index change in the polymer, so diffraction gratings and other optical devices like Fresnel zone plates can be fabricated in this way. The observed high order diffraction patterns prove the high quality of the created optical devices [1]. This technique may be a useful tool for designing

  11. Dielectrophoretic trapping of DNA-coated gold nanoparticles on silicon based vertical nanogap devices.

    Science.gov (United States)

    Strobel, Sebastian; Sperling, Ralph A; Fenk, Bernhard; Parak, Wolfgang J; Tornow, Marc

    2011-06-07

    We report on the successful dielectrophoretic trapping and electrical characterization of DNA-coated gold nanoparticles on vertical nanogap devices (VNDs). The nanogap devices with an electrode distance of 13 nm were fabricated from Silicon-on-Insulator (SOI) material using a combination of anisotropic reactive ion etching (RIE), selective wet chemical etching and metal thin-film deposition. Au nanoparticles (diameter 40 nm) coated with a monolayer of dithiolated 8 base pairs double stranded DNA were dielectrophoretically trapped into the nanogap from electrolyte buffer solution at MHz frequencies as verified by scanning and transmission electron microscopy (SEM/TEM) analysis. First electrical transport measurements through the formed DNA-Au-DNA junctions partially revealed an approximately linear current-voltage characteristic with resistance in the range of 2-4 GΩ when measured in solution. Our findings point to the importance of strong covalent bonding to the electrodes in order to observe DNA conductance, both in solution and in the dry state. We propose our setup for novel applications in biosensing, addressing the direct interaction of biomolecular species with DNA in aqueous electrolyte media.

  12. Travelling wave resonators fabricated with low-loss hydrogenated amorphous silicon

    Science.gov (United States)

    Lipka, Timo; Amthor, Julia; Trieu, Hoc Khiem; Müller, Jörg

    2013-05-01

    Low-loss hydrogenated amorphous silicon is employed for the fabrication of various planar integrated travelling wave resonators. Microring, racetrack, and disk resonators of different dimensions were fabricated with CMOS-compatible processes and systematically investigated. The key properties of notch filter ring resonators as extinction ratio, Q-factor, free spectral range, and the group refractive index were determined for resonators of varying radius, thereby achieving critically coupled photonic systems with high extinction ratios of about 20 dB for both polarizations. Racetrack resonators that are arranged in add/drop configuration and high quality factor microdisk resonators were optically characterized, with the microdisks exhibiting Q-factors of greater than 100000. Four-channel add/drop wavelength-division multiplexing filters that are based on cascaded racetrack resonators are studied. The design, the fabrication, and the optical characterization are presented.

  13. Advanced single-wafer sequential multiprocessing techniques for semiconductor device fabrication

    International Nuclear Information System (INIS)

    Moslehi, M.M.; Davis, C.

    1989-01-01

    Single-wafer integrated in-situ multiprocessing (SWIM) is recognized as the future trend for advanced microelectronics production in flexible fast turn- around computer-integrated semiconductor manufacturing environments. The SWIM equipment technology and processing methodology offer enhanced equipment utilization, improved process reproducibility and yield, and reduced chip manufacturing cost. They also provide significant capabilities for fabrication of new and improved device structures. This paper describes the SWIM techniques and presents a novel single-wafer advanced vacuum multiprocessing technology developed based on the use of multiple process energy/activation sources (lamp heating and remote microwave plasma) for multilayer epitaxial and polycrystalline semiconductor as well as dielectric film processing. Based on this technology, multilayer in-situ-doped homoepitaxial silicon and heteroepitaxial strained layer Si/Ge x Si 1 - x /Si structures have been grown and characterized. The process control and the ultimate interfacial abruptness of the layer-to-layer transition widths in the device structures prepared by this technology will challenge the MBE techniques in multilayer epitaxial growth applications

  14. Comparison of Six Different Silicones In Vitro for Application as Glaucoma Drainage Device

    Directory of Open Access Journals (Sweden)

    Claudia Windhövel

    2018-02-01

    Full Text Available Silicones are widely used in medical applications. In ophthalmology, glaucoma drainage devices are utilized if conservative therapies are not applicable or have failed. Long-term success of these devices is limited by failure to control intraocular pressure due to fibrous encapsulation. Therefore, different medical approved silicones were tested in vitro for cell adhesion, cell proliferation and viability of human Sclera (hSF and human Tenon fibroblasts (hTF. The silicones were analysed also depending on the sample preparation according to the manufacturer’s instructions. The surface quality was characterized with environmental scanning electron microscope (ESEM and water contact angle measurements. All silicones showed homogeneous smooth and hydrophobic surfaces. Cell adhesion was significantly reduced on all silicones compared to the negative control. Proliferation index and cell viability were not influenced much. For development of a new glaucoma drainage device, the silicones Silbione LSR 4330 and Silbione LSR 4350, in this study, with low cell counts for hTF and low proliferation indices for hSF, and silicone Silastic MDX4-4210, with low cell counts for hSF and low proliferation indices for hTF, have shown the best results in vitro. Due to the high cell adhesion shown on Silicone LSR 40, 40,026, this material is unsuitable.

  15. Nanostructured silicon for photonics from materials to devices

    CERN Document Server

    Gaburro, Z; Daldosso, N

    2006-01-01

    The use of light to channel signals around electronic chips could solve several current problems in microelectronic evolution including: power dissipation, interconnect bottlenecks, input/output from/to optical communication channels, poor signal bandwidth, etc. It is unfortunate that silicon is not a good photonic material: it has a poor light-emission efficiency and exhibits a negligible electro-optical effect. Silicon photonics is a field having the objective of improving the physical properties of silicon; thus turning it into a photonic material and permitting the full convergence of elec

  16. Structural and optical properties of silicon rich oxide films in graded-stoichiometric multilayers for optoelectronic devices

    Energy Technology Data Exchange (ETDEWEB)

    Palacios-Huerta, L.; Aceves-Mijares, M. [Electronics Department, INAOE, Apdo. 51, Puebla, Pue. 72000, México (Mexico); Cabañas-Tay, S. A.; Cardona-Castro, M. A.; Morales-Sánchez, A., E-mail: alfredo.morales@cimav.edu.mx [Centro de Investigación en Materiales Avanzados S.C., Unidad Monterrey-PIIT, Apodaca, NL 66628, México (Mexico); Domínguez-Horna, C. [Instituto de Microelectrónica de Barcelona, IMB-CNM (CSIC), Bellaterra 08193, Barcelona (Spain)

    2016-07-18

    Silicon nanocrystals (Si-ncs) are excellent candidates for the development of optoelectronic devices. Nevertheless, different strategies are still necessary to enhance their photo and electroluminescent properties by controlling their structural and compositional properties. In this work, the effect of the stoichiometry and structure on the optical properties of silicon rich oxide (SRO) films in a multilayered (ML) structure is studied. SRO MLs with silicon excess gradually increased towards the top and bottom and towards the center of the ML produced through the variation of the stoichiometry in each SRO layer were fabricated and confirmed by X-ray photoelectron spectroscopy. Si-ncs with three main sizes were observed by a transmission electron microscope, in agreement with the stoichiometric profile of each SRO layer. The presence of the three sized Si-ncs and some oxygen related defects enhances intense violet/blue and red photoluminescence (PL) bands. The SRO MLs were super-enriched with additional excess silicon by Si{sup +} implantation, which enhanced the PL intensity. Oxygen-related defects and small Si-ncs (<2 nm) are mostly generated during ion implantation enhancing the violet/blue band to become comparable to the red band. The structural, compositional, and luminescent characteristics of the multilayers are the result of the contribution of the individual characteristics of each layer.

  17. Physical and electrical characterization of corundum substrates and epitaxial silicon layers in view of fabricating integrated circuits

    International Nuclear Information System (INIS)

    Trilhe, J.; Legal, H.; Rolland, G.

    1975-01-01

    The S.O.S. technology (silicon on insulating substrate) allows compact, radiation hard, fast integrated circuits to be fabricated. It is noticeable that complex integrated circuits on corundum substrates obtained with various fabrication processes have various electrical characteristics. Possible correlations between the macroscopic defects of the substrate and the electrical characteristics of the circuit were investigated [fr

  18. Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils

    Science.gov (United States)

    Syed Mohammed, Zishan Ali; Puiu, Poenar Daniel; Aditya, Sheel

    2018-01-01

    Low resistance is an important requirement for microcoils which act as a signal receiver to ensure low thermal noise during signal detection. High-aspect ratio (HAR) planar microcoils entrenched in blind silicon trenches have features that make them more attractive than their traditional counterparts employing electroplating through a patterned thick polymer or achieved through silicon vias. However, challenges met in fabrication of such coils have not been discussed in detail until now. This paper reports the realization of such HAR microcoils embedded in Si blind trenches, fabricated with a single lithography step by first etching blind trenches in the silicon substrate with an aspect ratio of almost 3∶1 and then filling them up using copper electroplating. The electroplating was followed by chemical wet etching as a faster way of removing excess copper than traditional chemical mechanical polishing. Electrical resistance was further reduced by annealing the microcoils. The process steps and challenges faced in the realization of such structures are reported here followed by their electrical characterization. The obtained electrical resistances are then compared with those of other similar microcoils embedded in blind vias.

  19. Design and fabrication of a foldable 3D silicon based package for solid state lighting applications

    International Nuclear Information System (INIS)

    Sokolovskij, R; Liu, P; Van Zeijl, H W; Mimoun, B; Zhang, G Q

    2015-01-01

    Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and assembly costs are of prime interest for the SSL lighting industry. A novel silicon based LED package for lighting applications is presented in this paper. The proposed design consists of 5 rigid Si tiles connected by flexible polyimide hinges with embedded interconnects (ICs). Electrical, optical and thermal characteristics were taken into consideration during design. The fabrication process involved polyimide (PI) application and patterning, aluminium interconnect integration in the flexible hinge, LED reflector cavity formation and metalization followed by through wafer DRIE etching for chip formation and release. A method to connect chip front to backside without TSVs was also integrated into the process. Post-fabrication wafer level assembly included LED mounting and wirebond, phosphor-based colour conversion and silicone encapsulation. The package formation was finalized by vacuum assisted wrapping around an assembly structure to form a 3D geometry, which is beneficial for omnidirectional lighting. Bending tests were performed on the flexible ICs and optical performance at different temperatures was evaluated. It is suggested that 3D packages can be expanded to platforms for miniaturized luminaire applications by combining monolithic silicon integration and system-in-package (SiP) technologies. (paper)

  20. Silicon-based sleeve devices for chemical reactions

    Science.gov (United States)

    Northrup, M. Allen; Mariella, Jr., Raymond P.; Carrano, Anthony V.; Balch, Joseph W.

    1996-01-01

    A silicon-based sleeve type chemical reaction chamber that combines heaters, such as doped polysilicon for heating, and bulk silicon for convection cooling. The reaction chamber combines a critical ratio of silicon and silicon nitride to the volume of material to be heated (e.g., a liquid) in order to provide uniform heating, yet low power requirements. The reaction chamber will also allow the introduction of a secondary tube (e.g., plastic) into the reaction sleeve that contains the reaction mixture thereby alleviating any potential materials incompatibility issues. The reaction chamber may be utilized in any chemical reaction system for synthesis or processing of organic, inorganic, or biochemical reactions, such as the polymerase chain reaction (PCR) and/or other DNA reactions, such as the ligase chain reaction, which are examples of a synthetic, thermal-cycling-based reaction. The reaction chamber may also be used in synthesis instruments, particularly those for DNA amplification and synthesis.

  1. Fabrication and study of sol-gel ZnO films for use in Si-based heterojunction photovoltaic devices

    Directory of Open Access Journals (Sweden)

    Daniya Mukhamedshina

    2017-12-01

    Full Text Available This paper considers the use of zinc oxide thin films prepared via the sol-gel route as an n-type layer in heterojunction ZnO/Si solar cells. The ZnO films were prepared via a simple spin-coating technique using zinc acetate dihydrate as a zinc precursor, isopropanol as a solvent and monoethanolamine as a stabilizing agent. Optical, structural and morphological properties of ZnO were investigated for thin films grown from sol-gel solutions with different concentrations both on glass and silicon substrates. As such, a distribution of crystallite sizes and surface topology parameters corresponding to various zinc acetate dihydrate concentrations were obtained to elucidate optimal film deposition conditions. Correlation between thin film morphology and structural characteristics of ZnO thin films was made based on atomic-force microscopy studies. Finally, our results on fabrication, characterization and simulation of ZnO/Si heterojunctions for use as photovoltaic devices are presented. Although noticeable rectifying and photovoltaic properties were observed for Al/Si/ZnO/Ti/Au devices, there appears to exist a considerable room for device improvement with simulation studies suggesting that efficiencies of the order of 24% may be obtained for devices with optimal silicon wafer passivation, i.e. with lifetimes of the order of 1000 μs.

  2. Optoelectronic Device Integration in Silicon (OpSIS)

    Science.gov (United States)

    2015-10-26

    silicon-on-insulator," Opt. Express 22, 17872-17879 (2014) Y. Yang, C. Galland, Y. Liu, K. Tan , R. Ding, Q. Li, K. Bergman, T. Baehr-Jones, M...Jaeger, Nicolas AF; Chrostowski, Lukas; “Electrically tunable resonant filters in phase-shifted contra- directional couplers” IEEE Group IV Photonics... Nicolas AF; Chrostowski, Lukas; “Silicon photonic grating-assisted, contra-directional couplers” Optics express Vol. 21, No. 3; 3633-3650 (2013

  3. Highly Flexible and Efficient Fabric-Based Organic Light-Emitting Devices for Clothing-Shaped Wearable Displays.

    Science.gov (United States)

    Choi, Seungyeop; Kwon, Seonil; Kim, Hyuncheol; Kim, Woohyun; Kwon, Jung Hyun; Lim, Myung Sub; Lee, Ho Seung; Choi, Kyung Cheol

    2017-07-25

    Recently, the role of clothing has evolved from merely body protection, maintaining the body temperature, and fashion, to advanced functions such as various types of information delivery, communication, and even augmented reality. With a wireless internet connection, the integration of circuits and sensors, and a portable power supply, clothes become a novel electronic device. Currently, the information display is the most intuitive interface using visualized communication methods and the simultaneous concurrent processing of inputs and outputs between a wearer and functional clothes. The important aspect in this case is to maintain the characteristic softness of the fabrics even when electronic devices are added to the flexible clothes. Silicone-based light-emitting diode (LED) jackets, shirts, and stage costumes have started to appear, but the intrinsic stiffness of inorganic semiconductors causes wearers to feel discomfort; thus, it is difficult to use such devices for everyday purposes. To address this problem, a method of fabricating a thin and flexible emitting fabric utilizing organic light-emitting diodes (OLEDs) was developed in this work. Its flexibility was evaluated, and an analysis of its mechanical bending characteristics and tests of its long-term reliability were carried out.

  4. Single-crystal silicon trench etching for fabrication of highly integrated circuits

    Science.gov (United States)

    Engelhardt, Manfred

    1991-03-01

    The development of single crystal silicon trench etching for fabrication of memory cells in 4 16 and 64Mbit DRAMs is reviewed in this paper. A variety of both etch tools and process gases used for the process development is discussed since both equipment and etch chemistry had to be improved and changed respectively to meet the increasing requirements for high fidelity pattern transfer with increasing degree of integration. In additon to DRAM cell structures etch results for deep trench isolation in advanced bipolar ICs and ASICs are presented for these applications grooves were etched into silicon through a highly doped buried layer and at the borderline of adjacent p- and n-well areas respectively. Shallow trench etching of large and small exposed areas with identical etch rates is presented as an approach to replace standard LOCOS isolation by an advanced isolation technique. The etch profiles were investigated with SEM TEM and AES to get information on contathination and damage levels and on the mechanism leading to anisotropy in the dry etch process. Thermal wave measurements were performed on processed single crystal silicon substrates for a fast evaluation of the process with respect to plasma-induced substrate degradation. This useful technique allows an optimization ofthe etch process regarding high electrical performance of the fully processed memory chip. The benefits of the use of magnetic fields for the development of innovative single crystal silicon dry

  5. Bio-inspired silicon nanospikes fabricated by metal-assisted chemical etching for antibacterial surfaces

    Science.gov (United States)

    Hu, Huan; Siu, Vince S.; Gifford, Stacey M.; Kim, Sungcheol; Lu, Minhua; Meyer, Pablo; Stolovitzky, Gustavo A.

    2017-12-01

    The recently discovered bactericidal properties of nanostructures on wings of insects such as cicadas and dragonflies have inspired the development of similar nanostructured surfaces for antibacterial applications. Since most antibacterial applications require nanostructures covering a considerable amount of area, a practical fabrication method needs to be cost-effective and scalable. However, most reported nanofabrication methods require either expensive equipment or a high temperature process, limiting cost efficiency and scalability. Here, we report a simple, fast, low-cost, and scalable antibacterial surface nanofabrication methodology. Our method is based on metal-assisted chemical etching that only requires etching a single crystal silicon substrate in a mixture of silver nitrate and hydrofluoric acid for several minutes. We experimentally studied the effects of etching time on the morphology of the silicon nanospikes and the bactericidal properties of the resulting surface. We discovered that 6 minutes of etching results in a surface containing silicon nanospikes with optimal geometry. The bactericidal properties of the silicon nanospikes were supported by bacterial plating results, fluorescence images, and scanning electron microscopy images.

  6. Al and Cu Implantation into Silicon Substrate for Ohmic Contact in Solar Cell Fabrication

    International Nuclear Information System (INIS)

    Sri Sulamdari; Sudjatmoko; Wirjoadi; Yunanto; Bambang Siswanto

    2002-01-01

    Research on the implantation of Al and Cu ions into silicon substrate for ohmic contact in solar cell fabrication has been carried using ion accelerator machine. Al and Cu ions are from 98% Al and 99.9% Cu powder ionized in ion source system. provided in ion implantor machine. Before implantation process, (0.5 x 1) cm 2 N type and P type silicon were washed in water and then etched in Cp-4A solution. After that, P type silicon were implanted with Al ions and N type silicon were implanted with Cu ions with the ions dose from 10 13 ion/cm 2 - 10 16 ion/cm 2 and energy 20 keV - 80 keV. Implanted samples were then annealed at temperature 400 o C - 850 o C. Implanted and annealed samples were characterized their resistivities using four point probe FPP-5000. It was found that at full electrically active conditions the ρ s for N type was 1.30 x 10 8 Ω/sq, this was achieved at ion dose 10 13 ion/cm 2 and annealing temperature 500 o C. While for P type, the ρ s was 1.13 x 10 2 Ω/sq, this was achieved at ion dose 10 13 ion/cm 2 and energy 40 keV, and annealing temperature 500 o C. (author)

  7. A Novel Silicon-based Wideband RF Nano Switch Matrix Cell and the Fabrication of RF Nano Switch Structures

    Directory of Open Access Journals (Sweden)

    Yi Xiu YANG

    2011-12-01

    Full Text Available This paper presents the concept of RF nano switch matrix cell and the fabrication of RF nano switch. The nano switch matrix cell can be implemented into complex switch matrix for signal routing. RF nano switch is the decision unit for the matrix cell; in this research, it is fabricated on a tri-layer high-resistivity-silicon substrate using surface micromachining approach. Electron beam lithography is introduced to define the pattern and IC compatible deposition process is used to construct the metal layers. Silicon-based nano switch fabricated by IC compatible process can lead to a high potential of system integration to perform a cost effective system-on-a-chip solution. In this paper, simulation results of the designed matrix cell are presented; followed by the details of the nano structure fabrication and fabrication challenges optimizations; finally, measurements of the fabricated nano structure along with analytical discussions are also discussed.

  8. Measurement of Electromagnetic Shielding Effectiveness of Woven Fabrics Containing Metallic Yarns by Mobile Devices

    Directory of Open Access Journals (Sweden)

    Erhan Kenan ÇEVEN

    2016-10-01

    Full Text Available In this study, we introduce an alternative method to evaluate the electromagnetic shielding effectiveness (EMSE of woven fabrics containing metal wires. For experimental measurements, hybrid silk viscose yarns containing metal wires were first produced. Conductive test fabrics were then produced using the hybrid weft yarns and polyester warp yarns. The produced fabrics were separated in two parts and laminated together after rotating one fabric by 90 degrees to create a grid structure. The laminated fabrics were then folded by several times to create multiple layers such as 2,4,8,12,16. The EMSE of the multiple layered fabrics was measured over GSM signals received by a mobile device. For EMSE evaluation, the mobile device was placed between the laminated fabrics. The EMSE values of the fabrics were then calculated in accordance with the power variations of GSM signals.

  9. Site-controlled fabrication of silicon nanotips by indentation-induced selective etching

    Science.gov (United States)

    Jin, Chenning; Yu, Bingjun; Liu, Xiaoxiao; Xiao, Chen; Wang, Hongbo; Jiang, Shulan; Wu, Jiang; Liu, Huiyun; Qian, Linmao

    2017-12-01

    In the present study, the indentation-induced selective etching approach is proposed to fabricate site-controlled pyramidal nanotips on Si(100) surface. Without any masks, the site-controlled nanofabrication can be realized by nanoindentation and post etching in potassium hydroxide (KOH) solution. The effect of indentation force and etching time on the formation of pyramidal nanotips was investigated. It is found that the height and radius of the pyramidal nanotips increase with the indentation force or etching time, while long-time etching can lead to the collapse of the tips. The formation of pyramidal tips is ascribed to the anisotropic etching of silicon and etching stop of (111) crystal planes in KOH aqueous solution. The capability of this fabrication method was further demonstrated by producing various tip arrays on silicon surface by selective etching of the site-controlled indent patterns, and the maximum height difference of these tips is less than 10 nm. The indentation-induced selective etching provides a new strategy to fabricate well site-controlled tip arrays for multi-probe SPM system, Si nanostructure-based sensors and high-quality information storage.

  10. Fabrication and characterization of reaction bonded silicon carbide/carbon nanotube composites

    International Nuclear Information System (INIS)

    Thostenson, Erik T; Karandikar, Prashant G; Chou, T.-W.

    2005-01-01

    Carbon nanotubes have generated considerable excitement in the scientific and engineering communities because of their exceptional mechanical and physical properties observed at the nanoscale. Carbon nanotubes possess exceptionally high stiffness and strength combined with high electrical and thermal conductivities. These novel material properties have stimulated considerable research in the development of nanotube-reinforced composites (Thostenson et al 2001 Compos. Sci. Technol. 61 1899, Thostenson et al 2005 Compos. Sci. Technol. 65 491). In this research, novel reaction bonded silicon carbide nanocomposites were fabricated using melt infiltration of silicon. A series of multi-walled carbon nanotube-reinforced ceramic matrix composites (NT-CMCs) were fabricated and the structure and properties were characterized. Here we show that carbon nanotubes are present in the as-fabricated NT-CMCs after reaction bonding at temperatures above 1400 deg. C. Characterization results reveal that a very small volume content of carbon nanotubes, as low as 0.3 volume %, results in a 75% reduction in electrical resistivity of the ceramic composites. A 96% decrease in electrical resistivity was observed for the ceramics with the highest nanotube volume fraction of 2.1%

  11. Quantum confinement effect in cheese like silicon nano structure fabricated by metal induced etching

    Energy Technology Data Exchange (ETDEWEB)

    Saxena, Shailendra K., E-mail: phd1211512@iiti.ac.in; Sahu, Gayatri; Sagdeo, Pankaj R.; Kumar, Rajesh [Material Research Laboratory, Discipline of Physics & MSEG, Indian Institute of Technology Indore, Madhya Pradesh-452017 (India)

    2015-08-28

    Quantum confinement effect has been studied in cheese like silicon nano-structures (Ch-SiNS) fabricated by metal induced chemical etching using different etching times. Scanning electron microscopy is used for the morphological study of these Ch-SiNS. A visible photoluminescence (PL) emission is observed from the samples under UV excitation at room temperature due to quantum confinement effect. The average size of Silicon Nanostructures (SiNS) present in the samples has been estimated by bond polarizability model using Raman Spectroscopy from the red-shift observed from SiNSs as compared to its bulk counterpart. The sizes of SiNS present in the samples decreases as etching time increase from 45 to 75 mintunes.

  12. Fabrication of silicon strip detectors using a step-and-repeat lithography system

    International Nuclear Information System (INIS)

    Holland, S.

    1991-11-01

    In this work we describe the use of a step-and-repeat lithography system (stepper) for the fabrication of silicon strip detectors. Although the field size of the stepper is only 20 mm in diameter, we have fabricated much larger detectors by printing a repetitive strip detector pattern in a step-and-repeat fashion. The basic unit cell is 7 mm in length. The stepper employs a laser interferometer for stage placement, and the resulting high precision allows one to accurately place the repetitive patterns on the wafer. A small overlap between the patterns ensures a continuous strip. A detector consisting of 512 strips on a 50 μm pitch has been fabricated using this technique. The dimensions of the detector are 6.3 cm by 2.56 cm. Yields of over 99% have been achieved, where yield is defined as the percentage of strips with reverse leakage current below 1 nA. In addition to the inherent advantages of a step-and-repeat system, this technique offers great flexibility in the fabrication of large-area strip detectors since the length and width of the detector can be changed by simply reprogramming the stepper computer. Hence various geometry strip detectors can be fabricated with only one set of masks, as opposed to a separate set of masks for each geometry as would be required with a contact or proximity aligner

  13. Fabrication of antireflective nanostructures for crystalline silicon solar cells by reactive ion etching

    International Nuclear Information System (INIS)

    Lin, Hsin-Han; Chen, Wen-Hua; Wang, Chi-Jen; Hong, Franklin Chau-Nan

    2013-01-01

    In this study we have fabricated large-area (15 × 15 cm 2 ) subwavelength antireflection structure on poly-Si substrates to reduce their solar reflectivity. A reactive ion etching system was used to fabricate nanostructures on the poly-silicon surface. Reactive gases, composed of chlorine (Cl 2 ), sulfur hexafluoride (SF 6 ) and oxygen (O 2 ), were activated to fabricate nanoscale pyramids by RF plasma. The poly-Si substrates were etched in various gas compositions for 6–10 min to form nano-pyramids. The sizes of pyramids were about 200–300 nm in heights and about 100 nm in width. Besides the nanoscale features, the high pyramid density on the poly-Si surface is another important factor to reduce the reflectivity. Low-reflectivity surface was fabricated with reflectivity significantly reduced down to < 2% for photons in a wavelength range of 500–900 nm. - Highlights: ► Large-area (15 × 15 cm 2 ) antireflection structures fabricated on poly-Si substrates ► Si nano-pyramids produced by utilizing self-masked reactive ion etching process ► High density of nanoscale pyramids was formed on the entire substrate surface. ► Surface reflectivity below 2% was achieved in the wavelength range of 500–900 nm

  14. Imprinted silicon-based nanophotonics

    DEFF Research Database (Denmark)

    Borel, Peter Ingo; Olsen, Brian Bilenberg; Frandsen, Lars Hagedorn

    2007-01-01

    We demonstrate and optically characterize silicon-on-insulator based nanophotonic devices fabricated by nanoimprint lithography. In our demonstration, we have realized ordinary and topology-optimized photonic crystal waveguide structures. The topology-optimized structures require lateral pattern ...

  15. Particle interaction and displacement damage in silicon devices operated in radiation environments

    International Nuclear Information System (INIS)

    Leroy, Claude; Rancoita, Pier-Giorgio

    2007-01-01

    Silicon is used in radiation detectors and electronic devices. Nowadays, these devices achieving submicron technology are parts of integrated circuits of large to very large scale integration (VLSI). Silicon and silicon-based devices are commonly operated in many fields including particle physics experiments, nuclear medicine and space. Some of these fields present adverse radiation environments that may affect the operation of the devices. The particle energy deposition mechanisms by ionization and non-ionization processes are reviewed as well as the radiation-induced damage and its effect on device parameters evolution, depending on particle type, energy and fluence. The temporary or permanent damage inflicted by a single particle (single event effect) to electronic devices or integrated circuits is treated separately from the total ionizing dose (TID) effect for which the accumulated fluence causes degradation and from the displacement damage induced by the non-ionizing energy-loss (NIEL) deposition. Understanding of radiation effects on silicon devices has an impact on their design and allows the prediction of a specific device behaviour when exposed to a radiation field of interest

  16. Advanced Packaging Technology Used in Fabricating a High-Temperature Silicon Carbide Pressure Sensor

    Science.gov (United States)

    Beheim, Glenn M.

    2003-01-01

    The development of new aircraft engines requires the measurement of pressures in hot areas such as the combustor and the final stages of the compressor. The needs of the aircraft engine industry are not fully met by commercially available high-temperature pressure sensors, which are fabricated using silicon. Kulite Semiconductor Products and the NASA Glenn Research Center have been working together to develop silicon carbide (SiC) pressure sensors for use at high temperatures. At temperatures above 850 F, silicon begins to lose its nearly ideal elastic properties, so the output of a silicon pressure sensor will drift. SiC, however, maintains its nearly ideal mechanical properties to extremely high temperatures. Given a suitable sensor material, a key to the development of a practical high-temperature pressure sensor is the package. A SiC pressure sensor capable of operating at 930 F was fabricated using a newly developed package. The durability of this sensor was demonstrated in an on-engine test. The SiC pressure sensor uses a SiC diaphragm, which is fabricated using deep reactive ion etching. SiC strain gauges on the surface of the diaphragm sense the pressure difference across the diaphragm. Conventionally, the SiC chip is mounted to the package with the strain gauges outward, which exposes the sensitive metal contacts on the chip to the hostile measurement environment. In the new Kulite leadless package, the SiC chip is flipped over so that the metal contacts are protected from oxidation by a hermetic seal around the perimeter of the chip. In the leadless package, a conductive glass provides the electrical connection between the pins of the package and the chip, which eliminates the fragile gold wires used previously. The durability of the leadless SiC pressure sensor was demonstrated when two 930 F sensors were tested in the combustor of a Pratt & Whitney PW4000 series engine. Since the gas temperatures in these locations reach 1200 to 1300 F, the sensors were

  17. Design, fabrication and characterization of the first AC-coupled silicon microstrip sensors in India

    CERN Document Server

    Aziz, T; Mohanty, G.B.; Patil, M.R.; Rao, K.K.; Rani, Y.R.; Rao, Y.P.P.; Behnamian, H.; Mersi, S.; Naseri, M.

    2014-01-01

    This paper reports the design, fabrication and characterization of single-sided silicon microstrip sensors with integrated biasing resistors and coupling capacitors, produced for the first time in India. We have first developed a prototype sensor with different width and pitch combinations on a single 4-inch wafer. After finding test procedures for characterizing these AC coupled sensors, we have chosen an optimal width-pitch combination and also fine-tuned various process parameters in order to produce sensors with the desired specifications.

  18. Solar thermoelectric generators fabricated on a silicon-on-insulator substrate

    International Nuclear Information System (INIS)

    De Leon, Maria Theresa; Chong, Harold; Kraft, Michael

    2014-01-01

    Solar thermal power generation is an attractive electricity generation technology as it is environment-friendly, has the potential for increased efficiency, and has high reliability. The design, modelling, and evaluation of solar thermoelectric generators (STEGs) fabricated on a silicon-on-insulator substrate are presented in this paper. Solar concentration is achieved by using a focusing lens to concentrate solar input onto the membrane of the STEG. A thermal model is developed based on energy balance and heat transfer equations using lumped thermal conductances. This thermal model is shown to be in good agreement with actual measurement results. For a 1 W laser input with a spot size of 1 mm, a maximum open-circuit voltage of 3.06 V is obtained, which translates to a temperature difference of 226 °C across the thermoelements and delivers 25 µW of output power under matched load conditions. Based on solar simulator measurements, a maximum TEG voltage of 803 mV was achieved by using a 50.8 mm diameter plano-convex lens to focus solar input to a TEG with a length of 1000 µm, width of 15 µm, membrane diameter of 3 mm, and 114 thermocouples. This translates to a temperature difference of 18 °C across the thermoelements and an output power under matched load conditions of 431 nW. This paper demonstrates that by utilizing a solar concentrator to focus solar radiation onto the hot junction of a TEG, the temperature difference across the device is increased; subsequently improving the TEG’s efficiency. By using materials that are compatible with standard CMOS and MEMS processes, integration of solar-driven TEGs with on-chip electronics is seen to be a viable way of solar energy harvesting where the resulting microscale system is envisioned to have promising applications in on-board power sources, sensor networks, and autonomous microsystems. (paper)

  19. Nanocrystalline Silicon Carrier Collectors for Silicon Heterojunction Solar Cells and Impact on Low-Temperature Device Characteristics

    KAUST Repository

    Nogay, Gizem

    2016-09-26

    Silicon heterojunction solar cells typically use stacks of hydrogenated intrinsic/doped amorphous silicon layers as carrier selective contacts. However, the use of these layers may cause parasitic optical absorption losses and moderate fill factor (FF) values due to a high contact resistivity. In this study, we show that the replacement of doped amorphous silicon with nanocrystalline silicon is beneficial for device performance. Optically, we observe an improved short-circuit current density when these layers are applied to the front side of the device. Electrically, we observe a lower contact resistivity, as well as higher FF. Importantly, our cell parameter analysis, performed in a temperature range from -100 to +80 °C, reveals that the use of hole-collecting p-type nanocrystalline layer suppresses the carrier transport barrier, maintaining FF s in the range of 70% at -100 °C, whereas it drops to 40% for standard amorphous doped layers. The same analysis also reveals a saturation onset of the open-circuit voltage at -100 °C using doped nanocrystalline layers, compared with saturation onset at -60 °C for doped amorphous layers. These findings hint at a reduced importance of the parasitic Schottky barrier at the interface between the transparent electrodes and the selective contact in the case of nanocrystalline layer implementation. © 2011-2012 IEEE.

  20. Nanocrystalline Silicon Carrier Collectors for Silicon Heterojunction Solar Cells and Impact on Low-Temperature Device Characteristics

    KAUST Repository

    Nogay, Gizem; Seif, Johannes Peter; Riesen, Yannick; Tomasi, Andrea; Jeangros, Quentin; Wyrsch, Nicolas; Haug, Franz-Josef; De Wolf, Stefaan; Ballif, Christophe

    2016-01-01

    Silicon heterojunction solar cells typically use stacks of hydrogenated intrinsic/doped amorphous silicon layers as carrier selective contacts. However, the use of these layers may cause parasitic optical absorption losses and moderate fill factor (FF) values due to a high contact resistivity. In this study, we show that the replacement of doped amorphous silicon with nanocrystalline silicon is beneficial for device performance. Optically, we observe an improved short-circuit current density when these layers are applied to the front side of the device. Electrically, we observe a lower contact resistivity, as well as higher FF. Importantly, our cell parameter analysis, performed in a temperature range from -100 to +80 °C, reveals that the use of hole-collecting p-type nanocrystalline layer suppresses the carrier transport barrier, maintaining FF s in the range of 70% at -100 °C, whereas it drops to 40% for standard amorphous doped layers. The same analysis also reveals a saturation onset of the open-circuit voltage at -100 °C using doped nanocrystalline layers, compared with saturation onset at -60 °C for doped amorphous layers. These findings hint at a reduced importance of the parasitic Schottky barrier at the interface between the transparent electrodes and the selective contact in the case of nanocrystalline layer implementation. © 2011-2012 IEEE.

  1. Influence of amino-functional macro and micro silicone softeners on the properties of cotton fabric

    International Nuclear Information System (INIS)

    Jatoi, A.W.; Khatri, Z.

    2015-01-01

    Amino-functional silicone softeners are most widely used type of soft finishes owing to their outstanding permanent softness, smoothness and handle characteristics. These soft finishes are prepared in different emulsion droplet sizes such as macro and micro emulsions providing varying characteristics on the textile on which they are applied. The macroemulsions due to their larger droplet sizes lubricate fabric and yarn surfaces, while the micro-emulsion, thanks to their smaller sizes penetrate inside fiber pores. In this research amino-functional macro and micro emulsions have been applied on dyed cotton fabric in 1:1 combination and compared against their influence on physical properties such as bending length, abrasion resistance, tensile strength, crease resistance and water repellency. These emulsions have also been compared for their influence on colorimetric properties; color difference and color strength (K/S values). The results reveal that the softener application in combination improves the properties deteriorated by each softener when applied separately. (author)

  2. Nanopore arrays in a silicon membrane for parallel single-molecule detection: fabrication

    Science.gov (United States)

    Schmidt, Torsten; Zhang, Miao; Sychugov, Ilya; Roxhed, Niclas; Linnros, Jan

    2015-08-01

    Solid state nanopores enable translocation and detection of single bio-molecules such as DNA in buffer solutions. Here, sub-10 nm nanopore arrays in silicon membranes were fabricated by using electron-beam lithography to define etch pits and by using a subsequent electrochemical etching step. This approach effectively decouples positioning of the pores and the control of their size, where the pore size essentially results from the anodizing current and time in the etching cell. Nanopores with diameters as small as 7 nm, fully penetrating 300 nm thick membranes, were obtained. The presented fabrication scheme to form large arrays of nanopores is attractive for parallel bio-molecule sensing and DNA sequencing using optical techniques. In particular the signal-to-noise ratio is improved compared to other alternatives such as nitride membranes suffering from a high-luminescence background.

  3. Printing-based fabrication method using sacrificial paper substrates for flexible and wearable microfluidic devices

    Science.gov (United States)

    Chung, Daehan; Gray, Bonnie L.

    2017-11-01

    We present a simple, fast, and inexpensive new printing-based fabrication process for flexible and wearable microfluidic channels and devices. Microfluidic devices are fabricated on textiles (fabric) for applications in clothing-based wearable microfluidic sensors and systems. The wearable and flexible microfluidic devices are comprised of water-insoluable screen-printable plastisol polymer. Sheets of paper are used as sacrificial substrates for multiple layers of polymer on the fabric’s surface. Microfluidic devices can be made within a short time using simple processes and inexpensive equipment that includes a laser cutter and a thermal laminator. The fabrication process is characterized to demonstrate control of microfluidic channel thickness and width. Film thickness smaller than 100 micrometers and lateral dimensions smaller than 150 micrometers are demonstrated. A flexible microfluidic mixer is also developed on fabric and successfully tested on both flat and curved surfaces at volumetric flow rates ranging from 5.5-46 ml min-1.

  4. CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-12-01

    Today\\'s mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

  5. CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

    KAUST Repository

    Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Kutbee, Arwa T.; Hanna, Amir; Hussain, Muhammad Mustafa

    2014-01-01

    Today's mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

  6. The bipolar silicon microstrip detector: A proposal for a novel precision tracking device

    International Nuclear Information System (INIS)

    Horisberger, R.

    1990-01-01

    It is proposed to combine the technology of fully depleted microstrip detectors fabricated on n doped high resistivity silicon with the concept of the bipolar transistor. This is done by adding a n ++ doped region inside the normal p + implanted region of the reverse biased p + n diode. The resulting structure has amplifying properties and is referred to as bipaolar pixel transistor. The simplest readout scheme of a bipolar pixel array by an aluminium strip bus leads to the bipolar microstrip detector. The bipolar pixel structure is expected to give a better signal-to-noise performance for the detection of minimum ionizing charged particle tracks than the normal silicon diode strip detector and therefore should allow in future the fabrication of thinner silicon detectors for precision tracking. (orig.)

  7. Transformational silicon electronics

    KAUST Repository

    Rojas, Jhonathan Prieto

    2014-02-25

    In today\\'s traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100) wafers. Ninety percent of global electronics are made up of silicon. Therefore, we have developed a generic low-cost regenerative batch fabrication process to transform such wafers full of devices into thin (5 μm), mechanically flexible, optically semitransparent silicon fabric with devices, then recycling the remaining wafer to generate multiple silicon fabric with chips and devices, ensuring low-cost and optimal utilization of the whole substrate. We show monocrystalline, amorphous, and polycrystalline silicon and silicon dioxide fabric, all from low-cost bulk silicon (100) wafers with the semiconductor industry\\'s most advanced high-κ/metal gate stack based high-performance, ultra-low-power capacitors, field effect transistors, energy harvesters, and storage to emphasize the effectiveness and versatility of this process to transform traditional electronics into flexible and semitransparent ones for multipurpose applications. © 2014 American Chemical Society.

  8. Molecular Monolayers for Electrical Passivation and Functionalization of Silicon-Based Solar Energy Devices.

    Science.gov (United States)

    Veerbeek, Janneke; Firet, Nienke J; Vijselaar, Wouter; Elbersen, Rick; Gardeniers, Han; Huskens, Jurriaan

    2017-01-11

    Silicon-based solar fuel devices require passivation for optimal performance yet at the same time need functionalization with (photo)catalysts for efficient solar fuel production. Here, we use molecular monolayers to enable electrical passivation and simultaneous functionalization of silicon-based solar cells. Organic monolayers were coupled to silicon surfaces by hydrosilylation in order to avoid an insulating silicon oxide layer at the surface. Monolayers of 1-tetradecyne were shown to passivate silicon micropillar-based solar cells with radial junctions, by which the efficiency increased from 8.7% to 9.9% for n + /p junctions and from 7.8% to 8.8% for p + /n junctions. This electrical passivation of the surface, most likely by removal of dangling bonds, is reflected in a higher shunt resistance in the J-V measurements. Monolayers of 1,8-nonadiyne were still reactive for click chemistry with a model catalyst, thus enabling simultaneous passivation and future catalyst coupling.

  9. Nanowire decorated, ultra-thin, single crystalline silicon for photovoltaic devices.

    Science.gov (United States)

    Aurang, Pantea; Turan, Rasit; Unalan, Husnu Emrah

    2017-10-06

    Reducing silicon (Si) wafer thickness in the photovoltaic industry has always been demanded for lowering the overall cost. Further benefits such as short collection lengths and improved open circuit voltages can also be achieved by Si thickness reduction. However, the problem with thin films is poor light absorption. One way to decrease optical losses in photovoltaic devices is to minimize the front side reflection. This approach can be applied to front contacted ultra-thin crystalline Si solar cells to increase the light absorption. In this work, homojunction solar cells were fabricated using ultra-thin and flexible single crystal Si wafers. A metal assisted chemical etching method was used for the nanowire (NW) texturization of ultra-thin Si wafers to compensate weak light absorption. A relative improvement of 56% in the reflectivity was observed for ultra-thin Si wafers with the thickness of 20 ± 0.2 μm upon NW texturization. NW length and top contact optimization resulted in a relative enhancement of 23% ± 5% in photovoltaic conversion efficiency.

  10. Study Trapped Charge Distribution in P-Channel Silicon-Oxide-Nitride-Oxide-Silicon Memory Device Using Dynamic Programming Scheme

    Science.gov (United States)

    Li, Fu-Hai; Chiu, Yung-Yueh; Lee, Yen-Hui; Chang, Ru-Wei; Yang, Bo-Jun; Sun, Wein-Town; Lee, Eric; Kuo, Chao-Wei; Shirota, Riichiro

    2013-04-01

    In this study, we precisely investigate the charge distribution in SiN layer by dynamic programming of channel hot hole induced hot electron injection (CHHIHE) in p-channel silicon-oxide-nitride-oxide-silicon (SONOS) memory device. In the dynamic programming scheme, gate voltage is increased as a staircase with fixed step amplitude, which can prohibits the injection of holes in SiN layer. Three-dimensional device simulation is calibrated and is compared with the measured programming characteristics. It is found, for the first time, that the hot electron injection point quickly traverses from drain to source side synchronizing to the expansion of charged area in SiN layer. As a result, the injected charges quickly spread over on the almost whole channel area uniformly during a short programming period, which will afford large tolerance against lateral trapped charge diffusion by baking.

  11. All-Optical Signal Processing using Silicon Devices

    DEFF Research Database (Denmark)

    Oxenløwe, Leif Katsuo; Pu, Minhao; Ding, Yunhong

    2014-01-01

    This paper presents an overview of recent wo rk on the use of silicon waveguides for processing optical data signals. We will describe ultra-fast, ultra-broadband, polarisation-insensitive and phase-sensitive applications including processing of spectrally-efficient data formats and optical phase...

  12. Novel fabrication techniques for low-mass composite structures in silicon particle detectors

    Energy Technology Data Exchange (ETDEWEB)

    Hartman, Neal, E-mail: neal.hartman@cern.ch; Silber, Joseph; Anderssen, Eric; Garcia-Sciveres, Maurice; Gilchriese, Murdock; Johnson, Thomas; Cepeda, Mario

    2013-12-21

    The structural design of silicon-based particle detectors is governed by competing demands of reducing mass while maximizing stability and accuracy. These demands can only be met by fiber reinforced composite laminates (CFRP). As detecting sensors and electronics become lower mass, the motivation to reduce structure as a proportion of overall mass pushes modern detector structures to the lower limits of composite ply thickness, while demanding maximum stiffness. However, classical approaches to composite laminate design require symmetric laminates and flat structures, in order to minimize warping during fabrication. This constraint of symmetry in laminate design, and a “flat plate” approach to fabrication, results in more massive structures. This study presents an approach to fabricating stable and accurate, geometrically complex composite structures by bonding warped, asymmetric, but ultra-thin component laminates together in an accurate tool, achieving final overall precision normally associated with planar structures. This technique has been used to fabricate a prototype “I-beam” that supports two layers of detecting elements, while being up to 20 times stiffer and up to 30% lower mass than comparable, independent planar structures (typically known as “staves”)

  13. Fifth workshop on the role of impurities and defects in silicon device processing. Extended abstracts

    Energy Technology Data Exchange (ETDEWEB)

    Sopori, B.L.; Luque, A.; Sopori, B.; Swanson, D.; Gee, J.; Kalejs, J.; Jastrzebski, L.; Tan, T.

    1995-08-01

    This workshop dealt with engineering aspects and material properties of silicon electronic devices. Crystalline silicon growth, modeling, and properties are discussed in general and as applied to solar cells. Topics considered in discussions of silicon growth include: casting, string ribbons, Al backside contacts, ion implantation, gettering, passivation, and ultrasound treatments. Properties studies include: Electronic properties of defects and impurities, dopant and carrier concentrations, structure and bonding, nitrogen effects, degradation of bulk diffusion length, and recombination parameters. Individual papers from the workshop are indexed separately on the Energy Data Bases.

  14. Assessing the potential roles of silicon and germanium phthalocyanines in planar heterojunction organic photovoltaic devices and how pentafluoro phenoxylation can enhance π-π interactions and device performance.

    Science.gov (United States)

    Lessard, Benoît H; White, Robin T; Al-Amar, Mohammad; Plint, Trevor; Castrucci, Jeffrey S; Josey, David S; Lu, Zheng-Hong; Bender, Timothy P

    2015-03-11

    In this study, we have assessed the potential application of dichloro silicon phthalocyanine (Cl2-SiPc) and dichloro germanium phthalocyanine (Cl2-GePc) in modern planar heterojunction organic photovoltaic (PHJ OPV) devices. We have determined that Cl2-SiPc can act as an electron donating material when paired with C60 and that Cl2-SiPc or Cl2-GePc can also act as an electron acceptor material when paired with pentacene. These two materials enabled the harvesting of triplet energy resulting from the singlet fission process in pentacene. However, contributions to the generation of photocurrent were observed for Cl2-SiPc with no evidence of photocurrent contribution from Cl2-GePc. The result of our initial assessment established the potential for the application of SiPc and GePc in PHJ OPV devices. Thereafter, bis(pentafluoro phenoxy) silicon phthalocyanine (F10-SiPc) and bis(pentafluoro phenoxy) germanium phthalocyanine (F10-GePc) were synthesized and characterized. During thermal processing, it was discovered that F10-SiPc and F10-GePc underwent a reaction forming small amounts of difluoro SiPc (F2-SiPc) and difluoro GePc (F2-GePc). This undesirable reaction could be circumvented for F10-SiPc but not for F10-GePc. Using single crystal X-ray diffraction, it was determined that F10-SiPc has significantly enhanced π-π interactions compared with that of Cl2-SiPc, which had little to none. Unoptimized PHJ OPV devices based on F10-SiPc were fabricated and directly compared to those constructed from Cl2-SiPc, and in all cases, PHJ OPV devices based on F10-SiPc had significantly improved device characteristics compared to Cl2-SiPc.

  15. Selective etching of n-type silicon in pn junction structure in hydrofluoric acid and its application in silicon nanowire fabrication

    International Nuclear Information System (INIS)

    Wang Huiquan; Jin Zhonghe; Zheng Yangming; Ma Huilian; Wang Yuelin; Li Tie

    2008-01-01

    Boron is selectively implanted on the surface of an n-type silicon wafer to form a p-type area surrounded by an n-type area. The wafer is then put into a buffered oxide etch solution. It is found that the n-type area can be selectively etched without illumination, with an etching rate lower than 1 nm min -1 , while the p-type area can be selectively etched under illumination with a much higher etching rate. The possible mechanism of the etching phenomenon is discussed. A simple fabrication process of silicon nanowires is proposed according to the above phenomenon. In this process only traditional micro-electromechanical system technology is used. Dimensions of the fabricated nanowire can be controlled well. A 50 nm wide and 50 nm thick silicon nanowire has been formed using this method

  16. FABRICATION, MORPHOLOGICAL AND OPTOELECTRONIC PROPERTIES OF ANTIMONY ON POROUS SILICON AS MSM PHOTODETECTOR

    Directory of Open Access Journals (Sweden)

    H. A. Hadi

    2015-07-01

    Full Text Available We report on the fabrication and characterization of MSM photodetector. We investigated the surface morphological and the structural properties of the porous silicon by optical microscopy, atomic force microscope (AFM and X-ray diffraction. The metal–semiconductor–metal photodetector were fabricated by using Sb as Schottky contact metal.The junction exhibits good rectification ratio of 105 at bias of 2V. A large photocurrent to dark-current contrast ratio higher than 55 orders of magnitude and low dark currents below 0.89 nA .High   responsivity of 0.225A/W at 400 nm and 0.15 A/W at 400 and 700nm were observed at an operating bias of less than -2 V, corresponding quantum efficiency of 70% and 26% respectively. The lifetimes are evaluated using OCVD method and the carrier life time is 100 μs. The results show that Sb on porous silicon (PS structures will act as good candidates for making highly efficient photodiodes.

  17. Influence of fabrication parameter on the nanostructure and photoluminescence of highly doped p-porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Li, Shaoyuan [National Engineering Laboratory for Vacuum Metallurgy, Kunming University of Science and Technology, Kunming 650093 (China); Faculty of Metallurgical and energy engineering, Kunming University of Science and Technology, Kunming 650093 (China); Ma, Wenhui, E-mail: mwhsilicon@163.com [National Engineering Laboratory for Vacuum Metallurgy, Kunming University of Science and Technology, Kunming 650093 (China); Faculty of Metallurgical and energy engineering, Kunming University of Science and Technology, Kunming 650093 (China); Zhou, Yang, E-mail: zhouyangnano@163.com [National Engineering Laboratory for Vacuum Metallurgy, Kunming University of Science and Technology, Kunming 650093 (China); Faculty of Metallurgical and energy engineering, Kunming University of Science and Technology, Kunming 650093 (China); Chen, Xiuhua [Faculty of Physical Science and Technology, Yunnan University, Kunming 650091 (China); Ma, Mingyu [National Engineering Laboratory for Vacuum Metallurgy, Kunming University of Science and Technology, Kunming 650093 (China); Faculty of Metallurgical and energy engineering, Kunming University of Science and Technology, Kunming 650093 (China); Xiao, Yongyin [Faculty of Physical Science and Technology, Yunnan University, Kunming 650091 (China); Xu, Yaohui [National Engineering Laboratory for Vacuum Metallurgy, Kunming University of Science and Technology, Kunming 650093 (China); Faculty of Metallurgical and energy engineering, Kunming University of Science and Technology, Kunming 650093 (China)

    2014-02-15

    Porous silicon (PS) was prepared by anodizing highly doped p-type silicon in the solution of H{sub 2}O/ethanol/HF. The effects of key fabrication parameters (HF concentration, etching time and current density) on the nanostructure of PS were carefully investigated by AFM, SEM and TEM characterization. According to the experimental results, a more full-fledged model was developed to explain the crack behaviors on PS surface. The photoluminescence (PL) of resulting PS was studied by a fluorescence spectrophotometer and the results show that PL peak positions shift to shorter wavelength with the increasing current density, anodisation time and dilution of electrolyte. The PL spectra blue shift of the sample with higher porosity is confirmed by HRTEM results that the higher porosity results in smaller Si nanocrystals. A linear model (λ{sub PL/nm}=620.3–0.595P, R=0.905) was established to describe the correlation between PL peak positions and porosity of PS. -- Highlights: • The effect of fabrication parameter on the nanostructure of PS is investigated. • The influence of nanostructure on the photoluminescence behaviors is studied • A full-fledged model for expounding the crack behaviors of PS is presented. • The correlation between the porosity and PL peak blue shift is described by a linear model.

  18. FABRICATION, MORPHOLOGICAL AND OPTOELECTRONIC PROPERTIES OF ANTIMONY ON POROUS SILICON AS MSM PHOTODETECTOR

    Directory of Open Access Journals (Sweden)

    H. A. Hadi

    2014-12-01

    Full Text Available We report on the fabrication and characterization of MSM photodetector. We investigated the surface morphological and the structural properties of the porous silicon by optical microscopy, atomic force microscope (AFM and X-ray diffraction. The metal–semiconductor–metal photodetector were fabricated by using Sb as Schottky contact metal.The junction exhibits good rectification ratio of 105 at bias of 2V. A large photocurrent to dark-current contrast ratio higher than 55 orders of magnitude and low dark currents below 0.89 nA .High responsivity of 0.225A/W at 400 nm and 0.15 A/W at 400 and 700nm were observed at an operating bias of less than -2 V, corresponding quantum efficiency of 70% and 26% respectively. The lifetimes are evaluated using OCVD method and the carrier life time is 100 μs. The results show that Sb on porous silicon (PS structures will act as good candidates for making highly efficient photodiodes.

  19. Study of hydrogenated amorphous silicon devices under intense electric field: application to nuclear detection

    International Nuclear Information System (INIS)

    Ilie, A.

    1996-01-01

    The goal of this work was the study, development and optimization of hydrogenated amorphous silicon (a-Si:H) devices for use in detection of ionizing radiation in applications connected to the nuclear industry. Thick p-i-n devices, capable of withstanding large electric fields (up to 10 6 V/cm) with small currents (nA/cm 2 ), were proposed and developed. In order to decrease fabrication time, films were made using the 'He diluted' PECVD process and compared to standard a-Si:H films. Aspects connected to specific detector applications as well as to the fundamental physics of a-Si:H were considered: the internal electric field technique, in which the depletion charge was measured as a function of the applied bias voltage; study of the leakage current of p-i-n devices permitted us to demonstrate different regimes: depletion, field-enhanced thermal generation and electronic injection across the p layer. The effect of the electric field on the thermal generation of the carriers was studied considering the Poole-Frenkel and tunneling mechanisms. A model was developed taking under consideration the statistics of the correlated states and electron-phonon coupling. The results suggest that mechanisms not included in the 'standard model' of a Si:h need to be considered, such as defect relaxation, a filed-dependent mobility edge etc...; a new metastable phenomenon, called 'forming', induced by prolonged exposure to a strong electric field, was observed and studied. It is characterized by marked decrease of the leakage current and the detector noise, and increase in the breakdown voltage, as well as an improvement of carrier collection efficiency. This forming process appears to be principally due to an activation of the dopants in the p layer; finally, the capacity of thick p-i-n a Si:H devices to detect ionizing radiation has been evaluated. We show that it is possible, with 20-50 micron thick p-i-n devices, to detect the full spectrum of alpha and beta particles. With an

  20. From physics to devices light emissions in silicon from physics to devices

    CERN Document Server

    Lockwood, David J; Weber, Eicke R; Lockwood, David J

    1997-01-01

    Since its inception in 1966, the series of numbered volumes known as Semiconductors and Semimetals has distinguished itself through the careful selection of well-known authors, editors, and contributors.The"Willardson and Beer"Series, as it is widely known, has succeeded in publishing numerous landmark volumes and chapters. Not only did many of these volumes make an impact at the time of their publication, but they continue to be well-cited years after their original release. Recently, Professor Eicke R. Weber of the University of California at Berkeley joined as a co-editor of the series. Professor Weber, a well-known expert in the field of semiconductor materials, will further contribute to continuing the series' tradition of publishing timely, highly relevant, and long-impacting volumes. Some of the recent volumes, such as Hydrogen in Semiconductors, Imperfections in III/V Materials, Epitaxial Microstructures, High-Speed Heterostructure Devices,Oxygen in Silicon, and others promise indeed that this traditi...

  1. Large-Scale Fabrication of Silicon Nanowires for Solar Energy Applications.

    Science.gov (United States)

    Zhang, Bingchang; Jie, Jiansheng; Zhang, Xiujuan; Ou, Xuemei; Zhang, Xiaohong

    2017-10-11

    The development of silicon (Si) materials during past decades has boosted up the prosperity of the modern semiconductor industry. In comparison with the bulk-Si materials, Si nanowires (SiNWs) possess superior structural, optical, and electrical properties and have attracted increasing attention in solar energy applications. To achieve the practical applications of SiNWs, both large-scale synthesis of SiNWs at low cost and rational design of energy conversion devices with high efficiency are the prerequisite. This review focuses on the recent progresses in large-scale production of SiNWs, as well as the construction of high-efficiency SiNW-based solar energy conversion devices, including photovoltaic devices and photo-electrochemical cells. Finally, the outlook and challenges in this emerging field are presented.

  2. Magnet-assisted device-level alignment for the fabrication of membrane-sandwiched polydimethylsiloxane microfluidic devices

    International Nuclear Information System (INIS)

    Lu, J-C; Liao, W-H; Tung, Y-C

    2012-01-01

    Polydimethylsiloxane (PDMS) microfluidic device is one of the most essential techniques that advance microfluidics research in recent decades. PDMS is broadly exploited to construct microfluidic devices due to its unique and advantageous material properties. To realize more functionalities, PDMS microfluidic devices with multi-layer architectures, especially those with sandwiched membranes, have been developed for various applications. However, existing alignment methods for device fabrication are mainly based on manual observations, which are time consuming, inaccurate and inconsistent. This paper develops a magnet-assisted alignment method to enhance device-level alignment accuracy and precision without complicated fabrication processes. In the developed alignment method, magnets are embedded into PDMS layers at the corners of the device. The paired magnets are arranged in symmetric positions at each PDMS layer, and the magnetic attraction force automatically pulls the PDMS layers into the aligned position during assembly. This paper also applies the method to construct a practical microfluidic device, a tunable chaotic micromixer. The results demonstrate the successful operation of the device without failure, which suggests the accurate alignment and reliable bonding achieved by the method. Consequently, the fabrication method developed in this paper is promising to be exploited to construct various membrane-sandwiched PDMS microfluidic devices with more integrated functionalities to advance microfluidics research. (paper)

  3. Fabrication and electrical characterization of a MOS memory device containing self-assembled metallic nanoparticles

    Science.gov (United States)

    Sargentis, Ch.; Giannakopoulos, K.; Travlos, A.; Tsamakis, D.

    2007-04-01

    Floating gate devices with nanoparticles embedded in dielectrics have recently attracted much attention due to the fact that these devices operate as non-volatile memories with high speed, high density and low power consumption. In this paper, memory devices containing gold (Au) nanoparticles have been fabricated using e-gun evaporation. The Au nanoparticles are deposited on a very thin SiO 2 layer and are then fully covered by a HfO 2 layer. The HfO 2 is a high- k dielectric and gives good scalability to the fabricated devices. We studied the effect of the deposition parameters to the size and the shape of the Au nanoparticles using capacitance-voltage and conductance-voltage measurements, we demonstrated that the fabricated device can indeed operate as a low-voltage memory device.

  4. Fabrication of a Microfluidic Device with Boron-doped Diamond Electrodes for Electrochemical Analysis

    International Nuclear Information System (INIS)

    Watanabe, Takeshi; Shibano, Shuhei; Maeda, Hideto; Sugitani, Ai; Katayama, Michinobu; Matsumoto, Yoshinori; Einaga, Yasuaki

    2016-01-01

    A prototype microfluidic device using boron-doped diamond (BDD) electrodes patterned on an alumina chip was designed and fabricated. Electrochemical microfluidic devices have advantages in that the amount of sample required is small, the measurement throughput is high, different functions can be integrated on a single device, and they are highly durable. In using the device for the flow injection analysis of oxalic acid, the application of a brief conditioning step ensured that the reproducibility of the current signal was excellent. Furthermore, the fabricated system also performed as a prototype of “elimination-detection flow system”, in which interfering species are eliminated using “elimination electrodes” prior to the species reaching the “detection electrode”. The fabricated device reduced the current due to interfering species by 78%. Designs of devices to improve this efficiency are also discussed.

  5. The fabrication of highly ordered block copolymer micellar arrays: control of the separation distances of silicon oxide dots

    Science.gov (United States)

    Yoo, Hana; Park, Soojin

    2010-06-01

    We demonstrate the fabrication of highly ordered silicon oxide dotted arrays prepared from polydimethylsiloxane (PDMS) filled nanoporous block copolymer (BCP) films and the preparation of nanoporous, flexible Teflon or polyimide films. Polystyrene-block-poly(2-vinylpyridine) (PS-b-P2VP) films were annealed in toluene vapor to enhance the lateral order of micellar arrays and were subsequently immersed in alcohol to produce nano-sized pores, which can be used as templates for filling a thin layer of PDMS. When a thin layer of PDMS was spin-coated onto nanoporous BCP films and thermally annealed at a certain temperature, the PDMS was drawn into the pores by capillary action. PDMS filled BCP templates were exposed to oxygen plasma environments in order to fabricate silicon oxide dotted arrays. By addition of PS homopolymer to PS-b-P2VP copolymer, the separation distances of micellar arrays were tuned. As-prepared silicon oxide dotted arrays were used as a hard master for fabricating nanoporous Teflon or polyimide films by spin-coating polymer precursor solutions onto silicon patterns and peeling off. This simple process enables us to fabricate highly ordered nanoporous BCP templates, silicon oxide dots, and flexible nanoporous polymer patterns with feature size of sub-20 nm over 5 cm × 5 cm.

  6. The fabrication of highly ordered block copolymer micellar arrays: control of the separation distances of silicon oxide dots

    Energy Technology Data Exchange (ETDEWEB)

    Yoo, Hana; Park, Soojin, E-mail: spark@unist.ac.kr [Interdisciplinary School of Green Energy, Ulsan National Institute of Science and Technology, Banyeon-ri 100, Ulsan 689-798 (Korea, Republic of)

    2010-06-18

    We demonstrate the fabrication of highly ordered silicon oxide dotted arrays prepared from polydimethylsiloxane (PDMS) filled nanoporous block copolymer (BCP) films and the preparation of nanoporous, flexible Teflon or polyimide films. Polystyrene-block-poly(2-vinylpyridine) (PS-b-P2VP) films were annealed in toluene vapor to enhance the lateral order of micellar arrays and were subsequently immersed in alcohol to produce nano-sized pores, which can be used as templates for filling a thin layer of PDMS. When a thin layer of PDMS was spin-coated onto nanoporous BCP films and thermally annealed at a certain temperature, the PDMS was drawn into the pores by capillary action. PDMS filled BCP templates were exposed to oxygen plasma environments in order to fabricate silicon oxide dotted arrays. By addition of PS homopolymer to PS-b-P2VP copolymer, the separation distances of micellar arrays were tuned. As-prepared silicon oxide dotted arrays were used as a hard master for fabricating nanoporous Teflon or polyimide films by spin-coating polymer precursor solutions onto silicon patterns and peeling off. This simple process enables us to fabricate highly ordered nanoporous BCP templates, silicon oxide dots, and flexible nanoporous polymer patterns with feature size of sub-20 nm over 5 cm x 5 cm.

  7. THz generation from a nanocrystalline silicon-based photoconductive device

    International Nuclear Information System (INIS)

    Daghestani, N S; Persheyev, S; Cataluna, M A; Rose, M J; Ross, G

    2011-01-01

    Terahertz generation has been achieved from a photoconductive switch based on hydrogenated nanocrystalline silicon (nc-Si:H), gated by a femtosecond laser. The nc-Si:H samples were produced by a hot wire chemical vapour deposition process, a process with low production costs owing to its higher growth rate and manufacturing simplicity. Although promising ultrafast carrier dynamics of nc-Si have been previously demonstrated, this is the first report on THz generation from a nc-Si:H material

  8. Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

    International Nuclear Information System (INIS)

    Yin, Lan; Harburg, Daniel V.; Rogers, John A.; Bozler, Carl; Omenetto, Fiorenzo

    2015-01-01

    Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems

  9. Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

    Energy Technology Data Exchange (ETDEWEB)

    Yin, Lan; Harburg, Daniel V.; Rogers, John A., E-mail: jrogers@illinois.edu [Department of Materials Science and Engineering, Beckman Institute for Advanced Science and Technology, and Frederick Seitz Materials Research Laboratory, University of Illinois at Urbana-Champaign, 104 S Goodwin Ave., Urbana, Illinois 61801 (United States); Bozler, Carl [Lincoln Laboratory, Massachusetts Institute of Technology, 244 Wood Street, Lexington, Massachusetts 02420 (United States); Omenetto, Fiorenzo [Department of Biomedical Engineering, Department of Physics, Tufts University, 4 Colby St., Medford, Massachusetts 02155 (United States)

    2015-01-05

    Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

  10. Flash μ-fluidics: a rapid prototyping method for fabricating microfluidic devices

    KAUST Repository

    Buttner, Ulrich

    2016-08-01

    Microfluidics has advanced in terms of design and structures; however, fabrication methods are time-consuming or expensive relative to facility costs and equipment needed. This work demonstrates a fast and economically viable 2D/3D maskless digital light-projection method based on a stereolithography process. Unlike other fabrication methods, one exposure step is used to form the whole device. Flash microfluidics is achieved by incorporating bonding and channel fabrication of complex structures in just 2.5 s to 4 s and by fabricating channel heights between 25 μm and 150 μm with photopolymer resin. The features of this fabrication technique, such as time and cost saving and easy fabrication, are used to build devices that are mostly needed in microfluidic/lab-on-chip systems. Due to the fast production method and low initial setup costs, the process could be used for point of care applications. © 2016 The Royal Society of Chemistry.

  11. Flash μ-fluidics: a rapid prototyping method for fabricating microfluidic devices

    KAUST Repository

    Buttner, Ulrich; Sivashankar, Shilpa; Agambayev, Sumeyra; Mashraei, Yousof; Salama, Khaled N.

    2016-01-01

    Microfluidics has advanced in terms of design and structures; however, fabrication methods are time-consuming or expensive relative to facility costs and equipment needed. This work demonstrates a fast and economically viable 2D/3D maskless digital light-projection method based on a stereolithography process. Unlike other fabrication methods, one exposure step is used to form the whole device. Flash microfluidics is achieved by incorporating bonding and channel fabrication of complex structures in just 2.5 s to 4 s and by fabricating channel heights between 25 μm and 150 μm with photopolymer resin. The features of this fabrication technique, such as time and cost saving and easy fabrication, are used to build devices that are mostly needed in microfluidic/lab-on-chip systems. Due to the fast production method and low initial setup costs, the process could be used for point of care applications. © 2016 The Royal Society of Chemistry.

  12. Photosensitive N channel MOSFET device on silicon on sapphire substrate

    International Nuclear Information System (INIS)

    Le Goascoz, V.; Borel, J.

    1975-01-01

    An anomalous behavior of the N channel output current characteristic in a SOS MOSFET with a floating bulk is described. Such a phenomenon can be used in a photosensitive device with internal gain. Such devices can be used on SOS substrates to achieve integrated circuits with high insulating voltages and data transmission by optical means [fr

  13. Fabrication of fluidic devices with 30 nm nanochannels by direct imprinting

    DEFF Research Database (Denmark)

    Cuesta, Irene Fernandez; Palmarelli, Anna Laura; Liang, Xiaogan

    2011-01-01

    In this work, we propose an innovative approach to the fabrication of a complete micro/nano fluidic system, based on direct nanoimprint lithography. The fabricated device consists of nanochannels connected to U-shaped microchannels by triangular tapered inlets, and has four large reservoirs for l...

  14. Fabrication of CVD graphene-based devices via laser ablation for wafer-scale characterization

    DEFF Research Database (Denmark)

    Mackenzie, David; Buron, Jonas Christian Due; Whelan, Patrick Rebsdorf

    2015-01-01

    Selective laser ablation of a wafer-scale graphene film is shown to provide flexible, high speed (1 wafer/hour) device fabrication while avoiding the degradation of electrical properties associated with traditional lithographic methods. Picosecond laser pulses with single pulse peak fluences of 140......-effect mobility, doping level, on–off ratio, and conductance minimum before and after laser ablation fabrication....

  15. Fabrication of polystyrene microfluidic devices using a pulsed CO2 laser system

    KAUST Repository

    Li, Huawei

    2013-10-10

    In this article, we described a simple and rapid method for fabrication of droplet microfluidic devices on polystyrene substrate using a CO2 laser system. The effects of the laser power and the cutting speed on the depth, width and aspect ratio of the microchannels fabricated on polystyrene were investigated. The polystyrene microfluidic channels were encapsulated using a hot press bonding technique. The experimental results showed that both discrete droplets and laminar flows could be obtained in the device.

  16. Fabrication of polystyrene microfluidic devices using a pulsed CO2 laser system

    KAUST Repository

    Li, Huawei; Fan, Yiqiang; Foulds, Ian G.; Kodzius, Rimantas

    2013-01-01

    In this article, we described a simple and rapid method for fabrication of droplet microfluidic devices on polystyrene substrate using a CO2 laser system. The effects of the laser power and the cutting speed on the depth, width and aspect ratio of the microchannels fabricated on polystyrene were investigated. The polystyrene microfluidic channels were encapsulated using a hot press bonding technique. The experimental results showed that both discrete droplets and laminar flows could be obtained in the device.

  17. Passive Temperature Stabilization of Silicon Photonic Devices Using Liquid Crystals

    Directory of Open Access Journals (Sweden)

    Joanna Ptasinski

    2014-03-01

    Full Text Available In this work we explore the negative thermo-optic properties of liquid crystal claddings for passive temperature stabilization of silicon photonic integrated circuits. Photonic circuits are playing an increasing role in communications and computing, but they suffer from temperature dependent performance variation. Most existing techniques aimed at compensation of thermal effects rely on power hungry Joule heating. We show that integrating a liquid crystal cladding helps to minimize the effects of a temperature dependent drift. The advantage of liquid crystals lies in their high negative thermo-optic coefficients in addition to low absorption at the infrared wavelengths.

  18. Radio frequency siliconization: An approach to the coating for the future large superconducting fusion devices

    International Nuclear Information System (INIS)

    Li, J.; Zhao, Y.P.; Wan, B.N.; Gong, X.Z.; Zhen, M.; Gu, X.M.; Zhang, X.D.; Luo, J.R.; Wan, Y.X.; Xie, J.K.; Li, C.F.; Chen, J.L.; Toi, K.; Noda, N.; Watari, T.

    2001-01-01

    Radio frequency (rf) siliconization has been carried out on the HT-7 superconducting tokamak in the presence of a high magnetic field, which is a try on superconducting tokamaks. Three different procedures of rf siliconization have been tested and a very promising method to produce high quality silicon films was found after comparing the film properties and plasma performance produced by these three different procedures. The Si/C films are amorphous, semitransparent, and homogeneous throughout the layer and adhere firmly to all the substrates. The advantages of silicon atoms as a powerful radiator and a good oxygen getter have been proved. An outstanding merit of rf siliconization to superconducting devices is its fast recovery after a serious degradation of the condition due to the leakage of air to good wall conditions. A wider stable operation region has been obtained and plasma performance is improved immediately after each siliconization due to significant reduction of impurities. Energy confinement time increases more than 50% and particle confinement time increases by a factor of 2. The lifetime of the silicon film is more than 400 standard ohmic heated plasma discharges. Simulation shows that the confinement improvement is due to the reduction of the electron thermal diffusivity in the outer region of the plasma

  19. Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

    Science.gov (United States)

    Es-Sakhi, Azzedin D.

    Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the

  20. Mechanical engineering and design of silicon-based particle tracking devices

    International Nuclear Information System (INIS)

    Miller, W.O.; Thompson, T.C.; Gamble, M.T.; Reid, R.S.; Woloshun, K.A.; Dransfield, G.D.; Ziock, H.J.

    1990-01-01

    The Mechanical Engineering and Electronics Division of the Los Alamos National Laboratory has been investigating silicon-based particle tracking device technology as part of the Superconducting Super Collider-sponsored silicon subsystem collaboration. Structural, thermal, and materials issues have been addressed. This paper discussed detector structural integrity and stability, including detailed finite element models of the silicon chip support and predictive methods used in designing with advanced composite materials. Electronic thermal loading and efficient dissipation of such energy using heat pipe technology has been investigated. The use of materials whose coefficients of thermal expansion are engineered to match silicon or to be near zero, as appropriate, have been explored. Material analysis and test results from radiation, chemical, and static loading are compared with analytical predictions and discussed. 1 ref., 2 figs., 1 tab

  1. Off-axis electron holography for the measurement of active dopants in silicon semiconductor devices

    International Nuclear Information System (INIS)

    Cooper, David

    2016-01-01

    There is a need in the semiconductor industry for a dopant profiling technique with nm-scale resolution. Here we demonstrate that off-axis electron holography can be used to provide maps of the electrostatic potential in semiconductor devices with nm-scale resolution. In this paper we will discuss issues regarding the spatial resolution and precision of the technique. Then we will discuss problems with specimen preparation and how this affects the accuracy of the measurements of the potentials. Finally we show results from experimental off-axis electron holography applied to nMOS and pMOS CMOS devices grown on bulk silicon and silicon- on-insulator type devices and present solutions to common problems that are encountered when examining these types of devices. (paper)

  2. Silicon Carbide Power Device Performance Under Heavy-Ion Irradiation

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan; Topper, Alyson; Wilcox, Edward; Phan, Anthony; Ikpe, Stanley; LaBel, Ken

    2015-01-01

    Heavy-ion induced degradation and catastrophic failure data for SiC power MOSFETs and Schottky diodes are examined to provide insight into the challenge of single-event effect hardening of SiC power devices.

  3. Nanoscale fabrication and characterization of chemically modified silicon surfaces using conductive atomic force microscopy in liquids

    Science.gov (United States)

    Kinser, Christopher Reagan

    This dissertation examines the modification and characterization of hydrogen-terminated silicon surfaces in organic liquids. Conductive atomic force microscope (cAFM) lithography is used to fabricate structures with sub-100 nm line width on H:Si(111) in n-alkanes, 1-alkenes, and 1-alkanes. Nanopatterning is accomplished by applying a positive (n-alkanes and 1-alkenes) or a negative (1-alkanes) voltage pulse to the silicon substrate with the cAFM tip connected to ground. The chemical and kinetic behavior of the patterned features is characterized using AFM, lateral force microscopy, time-of-flight secondary ion mass spectroscopy (TOF SIMS), and chemical etching. Features patterned in hexadecane, 1-octadecene, and undecylenic acid methyl ester exhibited chemical and kinetic behavior consistent with AFM field induced oxidation. The oxide features are formed due to capillary condensation of a water meniscus at the AFM tip-sample junction. A space-charge limited growth model is proposed to explain the observed growth kinetics. Surface modifications produced in the presence of neat 1-dodecyne and 1-octadecyne exhibited a reduced lateral force compared to the background H:Si(111) substrate and were resistant to a hydrofluoric acid etch, characteristics which indicate that the patterned features are not due to field induced oxidation and which are consistent with the presence of the methyl-terminated 1-alkyne bound directly to the silicon surface through silicon-carbon bonds. In addition to the cAFM patterned surfaces, full monolayers of undecylenic acid methyl ester (SAM-1) and undec-10-enoic acid 2-bromoethyl ester (SAM-2) were grown on H:Si(111) substrates using ultraviolet light. The structure and chemistry of the monolayers were characterized using AFM, TOF SIMS, X-ray photoelectron spectroscopy (XPS), X-ray reflectivity (XRR), X-ray standing waves (XSW), and X-ray fluorescence (XRF). These combined analyses provide evidence that SAM-1 and SAM-2 form dense monolayers

  4. Silicide/Silicon Heterointerfaces, Reaction Kinetics and Ultra-short Channel Devices

    Science.gov (United States)

    Tang, Wei

    Nickel silicide is one of the electrical contact materials widely used on very large scale integration (VLSI) of Si devices in microelectronic industry. This is because the silicide/silicon interface can be formed in a highly controlled manner to ensure reproducibility of optimal structural and electrical properties of the metal-Si contacts. These advantages can be inherited to Si nanowire (NW) field-effect transistors (FET) device. Due to the technological importance of nickel silicides, fundamental materials science of nickel silicides formation (Ni-Si reaction), especially in nanoscale, has raised wide interest and stimulate new insights and understandings. In this dissertation, in-situ transmission electron microscopy (TEM) in combination with FET device characterization will be demonstrated as useful tools in nano-device fabrication as well as in gaining insights into the process of nickel silicide formation. The shortest transistor channel length (17 nm) fabricated on a vapor-liquid-solid (VLS) grown silicon nanowire (NW) has been demonstrated by controlled reaction with Ni leads on an in-situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 ºC. NiSi2 is the leading phase, and the silicide-silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (microA/microm) and a maximum transconductance of 430 (microS/microm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of (17 nm -- 3.6 microm). Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs

  5. The use of silicon devices (diodes, RAMs, etc.) for alpha particle detection

    International Nuclear Information System (INIS)

    Agosteo, S.; Foglio Para, A.

    1993-01-01

    Silicon electronic devices (diodes, random access memories (RAMs), etc.) can be employed in alpha particle detection and spectroscopy with a good energy resolution. The detection mechanisms are first discussed; the performances of these devices operating in the pulse and in the current mode are then described starting from the pioneering works of the last decade. Some peculiar applications of RAMs are finally reported. (author). 7 refs, 5 figs, 1 tab

  6. Fabrication and optical characteristics of silicon-based two-dimensional wavelength division multiplexing splitter with photonic crystal directional waveguide couplers

    International Nuclear Information System (INIS)

    Liu, Cheng-Yang

    2011-01-01

    Photonic crystals have many potential applications because of their ability to control lightwave propagation. We report on the fabrication and optical properties of quasi-two-dimensional photonic crystals with triangular lattice of dielectric rods in air. Rod-type photonic crystal structures were fabricated in silicon by electron beam lithography and dry-etching techniques. Wavelength division multiplexing splitters were fabricated from two-dimensional photonic crystal directional waveguide couplers. Transmission spectra were measured and device operation was shown to be in agreement with theoretical calculations. The splitters can be used in visible light region. Such an approach to photonic element systems should enable new applications for designing components in photonic integrated circuits. -- Highlights: → We report the fabrication and optical properties of rod-type photonic crystal. → The splitter was fabricated by electron beam lithography and dry-etching techniques. → The splitter was composed of directional waveguide couplers. → Measured transmission spectra are in agreement with theoretical calculations. → The splitters can be used in visible light region.

  7. Directing polyallylamine adsorption on microlens array patterned silicon for microarray fabrication.

    Science.gov (United States)

    Saini, Gaurav; Gates, Richard; Asplund, Matthew C; Blair, Steve; Attavar, Sachin; Linford, Matthew R

    2009-06-21

    The selective adsorption of reagents is often essential for bioarray and lab-on-a-chip type devices. As the starting point for a bioarray, alkyl monolayer terminated silicon shards were photopatterned in a few nanoseconds with thousands of wells (spots) using an optical element, a microlens array. Polyallylamine (PAAm), a primary amine containing polymer, adsorbed with little selectivity to the spots, i.e., silicon oxide, over the hydrophobic background. However, at appropriate concentrations, addition of a cationic surfactant to the PAAm deposition solution, cetyltrimethylammonium chloride, prevented the nonspecific adsorption of PAAm onto the hydrophobic monolayer, while directing it effectively to the active spots on the device. A nonionic surfactant was less effective in preventing the nonspecific adsorption of PAAm onto the hydrophobic monolayer. The localized reactions/interactions of adsorbed PAAm with four species that are useful for bioconjugate chemistry: glutaric anhydride, phenylenediisothiocyanate, biotin NHS ester, and an oligonucleotide (DNA) were shown in the spots of an array. The reactivity of PAAm was further demonstrated with an isocyanate. Time-of-flight secondary ion mass spectrometry (ToF-SIMS) played an important role in confirming selective surface reactivity and adsorption. X-ray photoelectron spectroscopy (XPS), spectroscopic ellipsometry, and wetting confirmed PAAm reactivity on planar substrates.

  8. All-(111) surface silicon nanowire field effect transistor devices: Effects of surface preparations

    NARCIS (Netherlands)

    Masood, M.N.; Carlen, Edwin; van den Berg, Albert

    2014-01-01

    Etching/hydrogen termination of All-(111) surface silicon nanowire field effect (SiNW-FET) devices developed by conventional photolithography and plane dependent wet etchings is studied with X-ray photoelectron spectroscopy (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM) and

  9. MEMS monocrystalline-silicon based thermal devices for chemical and microfluidic applications

    NARCIS (Netherlands)

    Mihailovic, M.

    2011-01-01

    This thesis explores the employment of monocrystalline silicon in microsystems as an active material for different thermal functions, such as heat generation and heat transfer by conduction. In chapter 1 applications that need thermal micro devices, micro heaters and micro heat exchangers, are

  10. Device physics underlying silicon heterojunction and passivating-contact solar cells: A topical review

    KAUST Repository

    Chavali, Raghu V. K.

    2018-01-15

    The device physics of commercially dominant diffused-junction silicon solar cells is well understood, allowing sophisticated optimization of this class of devices. Recently, so-called passivating-contact solar cell technologies have become prominent, with Kaneka setting the world\\'s silicon solar cell efficiency record of 26.63% using silicon heterojunction contacts in an interdigitated configuration. Although passivating-contact solar cells are remarkably efficient, their underlying device physics is not yet completely understood, not in the least because they are constructed from diverse materials that may introduce electronic barriers in the current flow. To bridge this gap in understanding, we explore the device physics of passivating contact silicon heterojunction (SHJ) solar cells. Here, we identify the key properties of heterojunctions that affect cell efficiency, analyze the dependence of key heterojunction properties on carrier transport under light and dark conditions, provide a self-consistent multiprobe approach to extract heterojunction parameters using several characterization techniques (including dark J-V, light J-V, C-V, admittance spectroscopy, and Suns-Voc), propose design guidelines to address bottlenecks in energy production in SHJ cells, and develop a process-to-module modeling framework to establish the module\\'s performance limits. We expect that our proposed guidelines resulting from this multiscale and self-consistent framework will improve the performance of future SHJ cells as well as other passivating contact-based solar cells.

  11. First fabrication of a silicon vertical JFET for power distribution in high energy physics applications

    Science.gov (United States)

    Fernández-Martínez, Pablo; Flores, D.; Hidalgo, S.; Quirion, D.; Durà, R.; Ullán, M.

    2018-01-01

    A new vertical JFET transistor has been recently developed at the IMB-CNM, taking advantage of a deep-trenched 3D technology to achieve vertical conduction and low switch-off voltage. The silicon V-JFET transistors were mainly conceived to work as rad-hard protection switches for the renewed HV powering scheme (HV-MUX) of the ATLAS upgraded tracker. This work presents the features of the first batch of V-JFETs produced at the IMB-CNM clean room, together with the results of a full pre-irradiation characterization of the fabricated prototypes. Details of the technological process are provided and the outcome quality is also evaluated with the aid of reverse engineering techniques. Concerning the electrical performance of the prototypes, promising results were obtained, already meeting most of the HV-MUX specifications, both at room and below-zerotemperatures.

  12. Fabrication of Si-based planar type patch clamp biosensor using silicon on insulator substrate

    International Nuclear Information System (INIS)

    Zhang, Z.L.; Asano, T.; Uno, H.; Tero, R.; Suzui, M.; Nakao, S.; Kaito, T.; Shibasaki, K.; Tominaga, M.; Utsumi, Y.; Gao, Y.L.; Urisu, T.

    2008-01-01

    The aim of this paper is to fabricate the planar type patch clamp ion-channel biosensor, which is suitable for the high throughput screening, using silicon-on-insulator (SOI) substrate. The micropore with 1.2 μm diameter is formed through the top Si layer and the SiO 2 box layer of the SOI substrate by focused ion beam (FIB). Then the substrate is assembled into the microfluidic circuit. The human embryonic kidney 293 (HEK-293) cell transfected with transient receptor potential vanilloid type 1 (TRPV1) is positioned on the micropore and the whole-cell configuration is formed by the suction. Capsaicin is added to the extracellular solution as a ligand molecule, and the channel current showing the desensitization unique to TRPV1 is measured successfully

  13. An Antireflective Nanostructure Array Fabricated by Nanosilver Colloidal Lithography on a Silicon Substrate

    Directory of Open Access Journals (Sweden)

    Park Seong-Je

    2010-01-01

    Full Text Available Abstract An alternative method is presented for fabricating an antireflective nanostructure array using nanosilver colloidal lithography. Spin coating was used to produce the multilayered silver nanoparticles, which grew by self-assembly and were transformed into randomly distributed nanosilver islands through the thermodynamic action of dewetting and Oswald ripening. The average size and coverage rate of the islands increased with concentration in the range of 50–90 nm and 40–65%, respectively. The nanosilver islands were critically affected by concentration and spin speed. The effects of these two parameters were investigated, after etching and wet removal of nanosilver residues. The reflection nearly disappeared in the ultraviolet wavelength range and was 17% of the reflection of a bare silicon wafer in the visible range.

  14. Surface potential on gold nanodisc arrays fabricated on silicon under light irradiation

    Science.gov (United States)

    Ezaki, Tomotarou; Matsutani, Akihiro; Nishioka, Kunio; Shoji, Dai; Sato, Mina; Okamoto, Takayuki; Isobe, Toshihiro; Nakajima, Akira; Matsushita, Sachiko

    2018-06-01

    This paper proposes Kelvin probe force microscopy (KFM) as a new measurement method of plasmon phenomenon. The surface potential of two arrays, namely, a monomeric array and a tetrameric array, of gold nanodiscs (600 nm diameter) on a silicon substrate fabricated by electron beam lithography was investigated by KFM with the view point of irradiation light wavelength change. In terms of the value of the surface potential, contrasting behaviour, a negative shift in the monomeric disc array and a positive shift in the tetrameric disc array, was observed by light irradiation. This interesting behaviour is thought to be related to a difference in localised plasmons caused by the disc arrangement and was investigated from various viewpoints, including Rayleigh anomalies. Finally, this paper reveals that KFM is powerful not only to investigate the plasmonic behaviour but also to predict the electron transportation.

  15. Fabrication of triangular nanobeam waveguide networks in bulk diamond using single-crystal silicon hard masks

    International Nuclear Information System (INIS)

    Bayn, I.; Mouradian, S.; Li, L.; Goldstein, J. A.; Schröder, T.; Zheng, J.; Chen, E. H.; Gaathon, O.; Englund, Dirk; Lu, M.; Stein, A.; Ruggiero, C. A.; Salzman, J.; Kalish, R.

    2014-01-01

    A scalable approach for integrated photonic networks in single-crystal diamond using triangular etching of bulk samples is presented. We describe designs of high quality factor (Q = 2.51 × 10 6 ) photonic crystal cavities with low mode volume (V m  = 1.062 × (λ/n) 3 ), which are connected via waveguides supported by suspension structures with predicted transmission loss of only 0.05 dB. We demonstrate the fabrication of these structures using transferred single-crystal silicon hard masks and angular dry etching, yielding photonic crystal cavities in the visible spectrum with measured quality factors in excess of Q = 3 × 10 3

  16. Fabrication And Determination Of Coefficient Absorption Of Hydrogenated Amorphous Silicon By Direct Evaporation Method

    International Nuclear Information System (INIS)

    Santoso, Agus; Darsono; Sujitno, Tjipto; Suprapto

    1996-01-01

    Fabrication and characterization of hydrogenated amorphous silicon produced by direct evaporation method have been done. The experiment was carried out at pressure conditions of 2 x 10-5 torr, RF frequency of 13.56 MHz, hydrogen gas flow of 0,8 1/minute, electrode distance of 2.48 cm. voltage electrode of 700 volt and evaporation time 1.45 minute. Using UV-VIS spectrophotometer, it is found that at wavelength of 359 nm, the absorbance degree of material that was by direct hydrogenated method was 0,886. This means that more hydrogen are absorbed by direct method While, if the hydrogenation is carried out by means of indirect method, the degree of absorbance at the wavelength of 359 nm is 0,103. From this result, it can be concluded that the direct methods is better than indirect method

  17. Fabrication of Si-based planar type patch clamp biosensor using silicon on insulator substrate

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Z.L.; Asano, T. [Graduate University for Advanced Studies, Myodaiji, Okazaki, 444-8585 (Japan); Uno, H. [Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan); Tero, R. [Graduate University for Advanced Studies, Myodaiji, Okazaki, 444-8585 (Japan); Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan); Suzui, M.; Nakao, S. [Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan); Kaito, T. [SII NanoTechnology Inc., 36-1, Takenoshita, Oyama-cho, Sunto-gun, Shizuoka, 410-1393 (Japan); Shibasaki, K.; Tominaga, M. [Okazaki Institute for Integrative Bioscience, 5-1, Higashiyama, Myodaiji, Okazaki, 444-8787 (Japan); Utsumi, Y. [Laboratory of Advanced Science and Technology for Industry, University of Hyogo, 3-1-2, Koto, Kamigori, Ako-gun, Hyogo, 678-1205 (Japan); Gao, Y.L. [Department of Physics and Astronomy, Rochester University, Rochester, New York 14627 (United States); Urisu, T. [Graduate University for Advanced Studies, Myodaiji, Okazaki, 444-8585 (Japan); Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan)], E-mail: urisu@ims.ac.jp

    2008-03-03

    The aim of this paper is to fabricate the planar type patch clamp ion-channel biosensor, which is suitable for the high throughput screening, using silicon-on-insulator (SOI) substrate. The micropore with 1.2 {mu}m diameter is formed through the top Si layer and the SiO{sub 2} box layer of the SOI substrate by focused ion beam (FIB). Then the substrate is assembled into the microfluidic circuit. The human embryonic kidney 293 (HEK-293) cell transfected with transient receptor potential vanilloid type 1 (TRPV1) is positioned on the micropore and the whole-cell configuration is formed by the suction. Capsaicin is added to the extracellular solution as a ligand molecule, and the channel current showing the desensitization unique to TRPV1 is measured successfully.

  18. Nucleate pool boiling investigation on a silicon test section with micro-fabricated cavities

    International Nuclear Information System (INIS)

    Sanna, A.; Kenning, D.B.R.; Karayiannis, T.G.; Hutter, C.; Sefiane, K.; Nelson, R.A.

    2009-01-01

    The basic mechanisms of nucleate boiling are still not completely understood, in spite of the many numerical and experimental studies dedicated to the topic. The use of a hybrid code allows reasonable computational times for simulations of a solid plate with a large population of artificial micro-cavities with fixed distribution. This paper analyses the guidelines for the design, through numerical simulations, of the location and sizes of micro-fabricated cavities on a new silicon test section immersed in FC-72 at the saturation temperature for different pressures with an imposed heat flux applied at the back of the plate. Particular focus is on variations of wall temperature around nucleation sites. (author)

  19. The fabrication of silicon nanostructures by local gallium implantation and cryogenic deep reactive ion etching

    International Nuclear Information System (INIS)

    Chekurov, N; Grigoras, K; Franssila, S; Tittonen, I; Peltonen, A

    2009-01-01

    We show that gallium-ion-implanted silicon serves as an etch mask for fabrication of high aspect ratio nanostructures by cryogenic plasma etching (deep reactive ion etching). The speed of focused ion beam (FIB) patterning is greatly enhanced by the fact that only a thin approx. 30 nm surface layer needs to be modified to create a mask for the etching step. Etch selectivity between gallium-doped and undoped material is at least 1000:1, greatly decreasing the mask erosion problems. The resolution of the combined FIB-DRIE process is 20 lines μm -1 with the smallest masked feature size of 40 nm. The maximum achieved aspect ratio is 15:1 (e.g. 600 nm high pillars 40 nm in diameter).

  20. Fabrication of 2 × 8 power splitters in silica-on-silicon by the direct UV writing technique

    DEFF Research Database (Denmark)

    Olivero, Massimo; Svalgaard, Mikael

    2006-01-01

    In this letter, we present the first demonstration of 2 × 8 power splitters made in silica-on-silicon by direct ultraviolet (UV) writing. The fabricated components are compact and exhibit good performance in terms of loss, uniformity, and bandwidth, showing that direct UV writing can become...

  1. Nanopillars: Large Area Fabrication of Leaning Silicon Nanopillars for Surface Enhanced Raman Spectroscopy (Adv. Mater. 10/2012)

    DEFF Research Database (Denmark)

    Schmidt, Michael Stenbæk; Hübner, Jörg; Boisen, Anja

    2012-01-01

    M. S. Schmidt et al. describe on page OP11 a simple, two-step fabrication process to as-semble flexible, freestanding nanopillars into large-area substrates. These substrates can be made using readily available silicon-processing equipment and are suitable for SERS, having a large, uniform Raman ...

  2. Simple fabrication of antireflective silicon subwavelength structure with self-cleaning properties.

    Science.gov (United States)

    Kim, Bo-Soon; Ju, Won-Ki; Lee, Min-Woo; Lee, Cheon; Lee, Seung-Gol; Beom-Hoan, O

    2013-05-01

    A subwavelength structure (SWS) was formed via a simple chemical wet etching using a gold (Au) catalyst. Single nano-sized Au particles were fabricated by metallic self-aggregation. The deposition and thermal annealing of the thin metallic film were carried out. Thermal annealing of a thin metallic film enables the creation of metal nano particles by isolating them from each other by means of the self-aggregation of the metal. After annealing, the samples were soaked in an aqueous etching solution of hydrofluoric acid and hydrogen peroxide. When silicon (Si) was etched for 2 minutes using the Au nano particles, the reflectance was decreased almost 0% over the entire wavelength range from 300 to 1300 nm due to its deep and steeply double tapered structure. When given varying incident angle degrees from 30 degrees to 60 degrees, the reflectance was also maintained at less than 3%. Following this, the etched silicon was treated with a plasma-polymerized fluorocarbon (PPFC) film of about 5 nm using an ICP reactor for surface modification. The result of this surface treatment, the contact angle increased significantly from 27.5 degrees to 139.3 degrees. The surface modification was successful and maintained almost 0% reflectance because of the thin film deposition.

  3. Selective deposition contact patterning using atomic layer deposition for the fabrication of crystalline silicon solar cells

    International Nuclear Information System (INIS)

    Cho, Young Joon; Shin, Woong-Chul; Chang, Hyo Sik

    2014-01-01

    Selective deposition contact (SDC) patterning was applied to fabricate the rear side passivation of crystalline silicon (Si) solar cells. By this method, using screen printing for contact patterning and atomic layer deposition for the passivation of Si solar cells with Al 2 O 3 , we produced local contacts without photolithography or any laser-based processes. Passivated emitter and rear-contact solar cells passivated with ozone-based Al 2 O 3 showed, for the SDC process, an up-to-0.7% absolute conversion-efficiency improvement. The results of this experiment indicate that the proposed method is feasible for conversion-efficiency improvement of industrial crystalline Si solar cells. - Highlights: • We propose a local contact formation process. • Local contact forms a screen print and an atomic layer deposited-Al 2 O 3 film. • Ozone-based Al 2 O 3 thin film was selectively deposited onto patterned silicon. • Selective deposition contact patterning method can increase cell-efficiency by 0.7%

  4. Co-deposition methods for the fabrication of organic optoelectronic devices

    Science.gov (United States)

    Thompson, Mark E.; Liu, Zhiwei; Wu, Chao

    2016-09-06

    A method for fabricating an OLED by preparing phosphorescent metal complexes in situ is provided. In particular, the method simultaneously synthesizes and deposits copper (I) complexes in an organic light emitting device. Devices comprising such complexes may provide improved photoluminescent and electroluminescent properties.

  5. Fabrication and bonding of thiol-ene-based microfluidic devices

    DEFF Research Database (Denmark)

    Sikanen, Tiina M; Lafleur, Josiane P.; Moilanen, Maria-Elisa

    2013-01-01

    In this work, the bonding strength of microchips fabricated by thiol-ene free-radical polymerization was characterized in detail by varying the monomeric thiol/allyl composition from the stoichiometric ratio (1:1) up to 100% excess of thiol (2:1) or allyl (1:2) functional groups. Four different...... properties for each application. Here, a capillary electrophoresis separation is performed to demonstrate the attractive properties of stoichiometric thiol-ene microchips....

  6. Silicon-based visible and near-infrared optoelectric devices

    Energy Technology Data Exchange (ETDEWEB)

    Mazur, Eric; Carey, James Edward

    2017-10-17

    In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.

  7. A simple and cost-effective method for fabrication of integrated electronic-microfluidic devices using a laser-patterned PDMS layer

    KAUST Repository

    Li, Ming

    2011-12-03

    We report a simple and cost-effective method for fabricating integrated electronic-microfluidic devices with multilayer configurations. A CO 2 laser plotter was employed to directly write patterns on a transferred polydimethylsiloxane (PDMS) layer, which served as both a bonding and a working layer. The integration of electronics in microfluidic devices was achieved by an alignment bonding of top and bottom electrode-patterned substrates fabricated with conventional lithography, sputtering and lift-off techniques. Processes of the developed fabrication method were illustrated. Major issues associated with this method as PDMS surface treatment and characterization, thickness-control of the transferred PDMS layer, and laser parameters optimization were discussed, along with the examination and testing of bonding with two representative materials (glass and silicon). The capability of this method was further demonstrated by fabricating a microfluidic chip with sputter-coated electrodes on the top and bottom substrates. The device functioning as a microparticle focusing and trapping chip was experimentally verified. It is confirmed that the proposed method has many advantages, including simple and fast fabrication process, low cost, easy integration of electronics, strong bonding strength, chemical and biological compatibility, etc. © Springer-Verlag 2011.

  8. Room-temperature operation of a 2.25 μm electrically pumped laser fabricated on a silicon substrate

    International Nuclear Information System (INIS)

    Rodriguez, J. B.; Cerutti, L.; Grech, P.; Tournie, E.

    2009-01-01

    We report on a GaSb-based type-I laser structure grown by molecular beam epitaxy on a (001) silicon substrate. A thin AlSb nucleation layer followed by a 1 μm thick GaSb buffer layer was used to accommodate the very large lattice mismatch existing with the silicon substrate. Processed devices with mesa geometry exhibited laser operation in pulsed mode with a duty cycle up to 10% at room temperature

  9. Asymmetric band offsets in silicon heterojunction solar cells: Impact on device performance

    Energy Technology Data Exchange (ETDEWEB)

    Seif, Johannes Peter, E-mail: johannes.seif@alumni.epfl.ch; Ballif, Christophe; De Wolf, Stefaan [Photovoltaics and Thin-Film Electronics Laboratory, Institute of Microengineering (IMT), Ecole Polytechnique Fédérale de Lausanne (EPFL), Rue de la Maladière 71b, CH-2002 Neuchâtel (Switzerland); Menda, Deneb; Özdemir, Orhan [Department of Physics, Yıldız Technical University, Davutpasa Campus, TR-34210 Esenler, Istanbul (Turkey); Descoeudres, Antoine; Barraud, Loris [CSEM, PV-Center, Jaquet-Droz 1, CH-2002 Neuchâtel (Switzerland)

    2016-08-07

    Amorphous/crystalline silicon interfaces feature considerably larger valence than conduction band offsets. In this article, we analyze the impact of such band offset asymmetry on the performance of silicon heterojunction solar cells. To this end, we use silicon suboxides as passivation layers—inserted between substrate and (front or rear) contacts—since such layers enable intentionally exacerbated band-offset asymmetry. Investigating all topologically possible passivation layer permutations and focussing on light and dark current-voltage characteristics, we confirm that to avoid fill factor losses, wider-bandgap silicon oxide films (of at least several nanometer thin) should be avoided in hole-collecting contacts. As a consequence, device implementation of such films as window layers—without degraded carrier collection—demands electron collection at the front and hole collection at the rear. Furthermore, at elevated operating temperatures, once possible carrier transport barriers are overcome by thermionic (field) emission, the device performance is mainly dictated by the passivation of its surfaces. In this context, compared to the standard amorphous silicon layers, the wide-bandgap oxide layers applied here passivate remarkably better at these temperatures, which may represent an additional benefit under practical operation conditions.

  10. Synthesis of silicon nanocomposite for printable photovoltaic devices on flexible substrate

    Science.gov (United States)

    Odo, E. A.; Faremi, A. A.

    2017-06-01

    Renewed interest has been established in the preparation of silicon nanoparticles for electronic device applications. In this work, we report on the production of silicon powders using a simple ball mill and of silicon nanocomposite ink for screen-printable photovoltaic device on a flexible substrate. Bulk single crystalline silicon was milled for 25 h in the ball mill. The structural properties of the produced silicon nanoparticles were investigated using X-ray diffraction (XRD) and transmission electron microscopy. The results show that the particles remained highly crystalline, though transformed from their original single crystalline state to polycrystalline. The elemental composition using energy dispersive X-ray florescence spectroscopy (EDXRF) revealed that contamination from iron (Fe) and chromium (Cr) of the milling media and oxygen from the atmosphere were insignificant. The size distribution of the nanoparticles follows a lognormal pattern that ranges from 60 nm to about 1.2 μm and a mean particle size of about 103 nm. Electrical characterization of screen-printed PN structures of the nanocomposite formed by embedding the powder into a suitable water-soluble polymer on Kapton sheet reveals an enhanced photocurrent transport resulting from photo-induced carrier generation in the depletion region with energy greater that the Schottky barrier height at the metal-composite interface.

  11. Copper oxide/N-silicon heterojunction photovoltaic device

    Science.gov (United States)

    Feng, Tom; Ghosh, Amal K.

    1982-01-01

    A photovoltaic device having characteristics of a high efficiency solar cell comprising a Cu.sub.x O/n-Si heterojunction. The Cu.sub.x O layer is formed by heating a deposited copper layer in an oxygen containing ambient.

  12. Few-electron Qubits in Silicon Quantum Electronic Devices

    Science.gov (United States)

    2014-09-01

    Calculation of the charge relaxation time T1 . . . . . . . . . . . . . . 63 5.1 The absence of spin blockade in dual-gated DQD devices . . . . . . . 70...2013. 98 115 [102] M. Pioro-Ladrière, T. Obata, Y. Tokura, Y.-S. Shin, T. Kubo , K. Yoshida, T. Taniyama, and S. Tarucha. Nat. Phys., 4:776–779

  13. Electronic polymer memory devices-Easy to fabricate, difficult to understand

    International Nuclear Information System (INIS)

    Paul, Shashi; Salaoru, Iulia

    2010-01-01

    There has been a number reports on polymer memory devices for the last one decade. Polymer memory devices are fabricated by depositing a blend (an admixture of organic polymer, small organic molecules and nanoparticles) between two metal electrodes. These devices show two electrical conductance states ('1' and '0') when voltage is applied, thus rendering the structures suitable for data retention. These two states can be viewed as the realisation of memory devices. However, polymer memory devices reported so far suffer from multiple drawbacks that render their industrial implementation premature. There is a large discrepancy in the results reported by different groups. This article attempts to answer some of the questions.

  14. Synthesis of silicon nanocrystals in silane plasmas for nanoelectronics and large area electronic devices

    International Nuclear Information System (INIS)

    Roca i Cabarrocas, P; Nguyen-Tran, Th; Djeridane, Y; Abramov, A; Johnson, E; Patriarche, G

    2007-01-01

    The synthesis of silicon nanocrystals in standard radio-frequency glow discharge systems is studied with respect to two main objectives: (i) the production of devices based on quantum size effects associated with the small dimensions of silicon nanocrystals and (ii) the synthesis of polymorphous and polycrystalline silicon films in which silicon nanocrystals are the elementary building blocks. In particular we discuss results on the mechanisms of nanocrystal formation and their transport towards the substrate. We found that silicon nanocrystals can contribute to a significant fraction of deposition (50-70%) and that they can be positively charged. This has a strong influence on their deposition because positively charged nanocrystals will be accelerated towards the substrate with energy of the order of the plasma potential. However, the important parameter with respect to the deposition of charged nanocrystals is not the accelerating voltage but the energy per atom and thus a doubling of the diameter will result in a decrease in the energy per atom by a factor of 8. To leverage this geometrical advantage we propose the use of more electronegative gases, which may have a strong effect on the size and charge distribution of the nanocrystals. This is illustrated in the case of deposition from silicon tetrafluoride plasmas in which we observe low-frequency plasma fluctuations, associated with successive generations of nanocrystals. The contribution of larger nanocrystals to deposition results in a lower energy per deposited atom and thus polycrystalline films

  15. Fabrication of 20.19% Efficient Single-Crystalline Silicon Solar Cell with Inverted Pyramid Microstructure.

    Science.gov (United States)

    Zhang, Chunyang; Chen, Lingzhi; Zhu, Yingjie; Guan, Zisheng

    2018-04-03

    This paper reports inverted pyramid microstructure-based single-crystalline silicon (sc-Si) solar cell with a conversion efficiency up to 20.19% in standard size of 156.75 × 156.75 mm 2 . The inverted pyramid microstructures were fabricated jointly by metal-assisted chemical etching process (MACE) with ultra-low concentration of silver ions and optimized alkaline anisotropic texturing process. And the inverted pyramid sizes were controlled by changing the parameters in both MACE and alkaline anisotropic texturing. Regarding passivation efficiency, the textured sc-Si with normal reflectivity of 9.2% and inverted pyramid size of 1 μm was used to fabricate solar cells. The best batch of solar cells showed a 0.19% higher of conversion efficiency and a 0.22 mA cm -2 improvement in short-circuit current density, and the excellent photoelectric property surpasses that of the same structure solar cell reported before. This technology shows great potential to be an alternative for large-scale production of high efficient sc-Si solar cells in the future.

  16. Strained Silicon Photonics

    Directory of Open Access Journals (Sweden)

    Ralf B. Wehrspohn

    2012-05-01

    Full Text Available A review of recent progress in the field of strained silicon photonics is presented. The application of strain to waveguide and photonic crystal structures can be used to alter the linear and nonlinear optical properties of these devices. Here, methods for the fabrication of strained devices are summarized and recent examples of linear and nonlinear optical devices are discussed. Furthermore, the relation between strain and the enhancement of the second order nonlinear susceptibility is investigated, which may enable the construction of optically active photonic devices made of silicon.

  17. Gamma non-ionizing energy loss: Comparison with the damage factor in silicon devices

    Science.gov (United States)

    El Allam, E.; Inguimbert, C.; Meulenberg, A.; Jorio, A.; Zorkani, I.

    2018-03-01

    The concept of non-ionizing energy loss (NIEL) has been demonstrated to be a successful approach to describe the displacement damage effects in silicon materials and devices. However, some discrepancies exist in the literature between experimental damage factors and theoretical NIELs. 60Co gamma rays having a low NIEL are an interesting particle source that can be used to validate the NIEL scaling approach. This paper presents different 60Co gamma ray NIEL values for silicon targets. They are compared with the radiation-induced increase in the thermal generation rate of carriers per unit fluence. The differences between the different models, including one using molecular dynamics, are discussed.

  18. Fabrication of three-dimensional scaffolds using precision extrusion deposition with an assisted cooling device.

    Science.gov (United States)

    Hamid, Q; Snyder, J; Wang, C; Timmer, M; Hammer, J; Guceri, S; Sun, W

    2011-09-01

    In the field of biofabrication, tissue engineering and regenerative medicine, there are many methodologies to fabricate a building block (scaffold) which is unique to the target tissue or organ that facilitates cell growth, attachment, proliferation and/or differentiation. Currently, there are many techniques that fabricate three-dimensional scaffolds; however, there are advantages, limitations and specific tissue focuses of each fabrication technique. The focus of this initiative is to utilize an existing technique and expand the library of biomaterials which can be utilized to fabricate three-dimensional scaffolds rather than focusing on a new fabrication technique. An expanded library of biomaterials will enable the precision extrusion deposition (PED) device to construct three-dimensional scaffolds with enhanced biological, chemical and mechanical cues that will benefit tissue generation. Computer-aided motion and extrusion drive the PED to precisely fabricate micro-scaled scaffolds with biologically inspired, porosity, interconnectivity and internal and external architectures. The high printing resolution, precision and controllability of the PED allow for closer mimicry of tissues and organs. The PED expands its library of biopolymers by introducing an assisting cooling (AC) device which increases the working extrusion temperature from 120 to 250 °C. This paper investigates the PED with the integrated AC's capabilities to fabricate three-dimensional scaffolds that support cell growth, attachment and proliferation. Studies carried out in this paper utilized a biopolymer whose melting point is established to be 200 °C. This polymer was selected to illustrate the newly developed device's ability to fabricate three-dimensional scaffolds from a new library of biopolymers. Three-dimensional scaffolds fabricated with the integrated AC device should illustrate structural integrity and ability to support cell attachment and proliferation.

  19. Fabrication of three-dimensional scaffolds using precision extrusion deposition with an assisted cooling device

    Energy Technology Data Exchange (ETDEWEB)

    Hamid, Q; Snyder, J; Wang, C; Guceri, S; Sun, W [Department of Mechanical Engineering and Mechanics, Drexel University, Philadelphia, PA (United States); Timmer, M; Hammer, J, E-mail: sunwei@drexel.edu [Advanced Technologies and Regenerative Medicine, Somerville, NJ (United States)

    2011-09-15

    In the field of biofabrication, tissue engineering and regenerative medicine, there are many methodologies to fabricate a building block (scaffold) which is unique to the target tissue or organ that facilitates cell growth, attachment, proliferation and/or differentiation. Currently, there are many techniques that fabricate three-dimensional scaffolds; however, there are advantages, limitations and specific tissue focuses of each fabrication technique. The focus of this initiative is to utilize an existing technique and expand the library of biomaterials which can be utilized to fabricate three-dimensional scaffolds rather than focusing on a new fabrication technique. An expanded library of biomaterials will enable the precision extrusion deposition (PED) device to construct three-dimensional scaffolds with enhanced biological, chemical and mechanical cues that will benefit tissue generation. Computer-aided motion and extrusion drive the PED to precisely fabricate micro-scaled scaffolds with biologically inspired, porosity, interconnectivity and internal and external architectures. The high printing resolution, precision and controllability of the PED allow for closer mimicry of tissues and organs. The PED expands its library of biopolymers by introducing an assisting cooling (AC) device which increases the working extrusion temperature from 120 to 250 deg. C. This paper investigates the PED with the integrated AC's capabilities to fabricate three-dimensional scaffolds that support cell growth, attachment and proliferation. Studies carried out in this paper utilized a biopolymer whose melting point is established to be 200 deg. C. This polymer was selected to illustrate the newly developed device's ability to fabricate three-dimensional scaffolds from a new library of biopolymers. Three-dimensional scaffolds fabricated with the integrated AC device should illustrate structural integrity and ability to support cell attachment and proliferation.

  20. Fabrication of three-dimensional scaffolds using precision extrusion deposition with an assisted cooling device

    International Nuclear Information System (INIS)

    Hamid, Q; Snyder, J; Wang, C; Guceri, S; Sun, W; Timmer, M; Hammer, J

    2011-01-01

    In the field of biofabrication, tissue engineering and regenerative medicine, there are many methodologies to fabricate a building block (scaffold) which is unique to the target tissue or organ that facilitates cell growth, attachment, proliferation and/or differentiation. Currently, there are many techniques that fabricate three-dimensional scaffolds; however, there are advantages, limitations and specific tissue focuses of each fabrication technique. The focus of this initiative is to utilize an existing technique and expand the library of biomaterials which can be utilized to fabricate three-dimensional scaffolds rather than focusing on a new fabrication technique. An expanded library of biomaterials will enable the precision extrusion deposition (PED) device to construct three-dimensional scaffolds with enhanced biological, chemical and mechanical cues that will benefit tissue generation. Computer-aided motion and extrusion drive the PED to precisely fabricate micro-scaled scaffolds with biologically inspired, porosity, interconnectivity and internal and external architectures. The high printing resolution, precision and controllability of the PED allow for closer mimicry of tissues and organs. The PED expands its library of biopolymers by introducing an assisting cooling (AC) device which increases the working extrusion temperature from 120 to 250 deg. C. This paper investigates the PED with the integrated AC's capabilities to fabricate three-dimensional scaffolds that support cell growth, attachment and proliferation. Studies carried out in this paper utilized a biopolymer whose melting point is established to be 200 deg. C. This polymer was selected to illustrate the newly developed device's ability to fabricate three-dimensional scaffolds from a new library of biopolymers. Three-dimensional scaffolds fabricated with the integrated AC device should illustrate structural integrity and ability to support cell attachment and proliferation.

  1. Silicon microelectronic field-emissive devices for advanced display technology

    Science.gov (United States)

    Morse, J. D.

    1993-03-01

    Field-emission displays (FED's) offer the potential advantages of high luminous efficiency, low power consumption, and low cost compared to AMLCD or CRT technologies. An LLNL team has developed silicon-point field emitters for vacuum triode structures and has also used thin-film processing techniques to demonstrate planar edge-emitter configurations. LLNL is interested in contributing its experience in this and other FED-related technologies to collaborations for commercial FED development. At LLNL, FED development is supported by computational capabilities in charge transport and surface/interface modeling in order to develop smaller, low-work-function field emitters using a variety of materials and coatings. Thin-film processing, microfabrication, and diagnostic/test labs permit experimental exploration of emitter and resistor structures. High field standoff technology is an area of long-standing expertise that guides development of low-cost spacers for FEDS. Vacuum sealing facilities are available to complete the FED production engineering process. Drivers constitute a significant fraction of the cost of any flat-panel display. LLNL has an advanced packaging group that can provide chip-on-glass technologies and three-dimensional interconnect generation permitting driver placement on either the front or the back of the display substrate.

  2. Spin Coherence in Silicon-based Quantum Structures and Devices

    Science.gov (United States)

    2017-08-31

    Using electron spin resonance (ESR) to measure the den- sity of shallow traps, we find that the two sets of devices are nearly identical , indicating...experiments which cannot utilize a clock transition or a field-cancelling decoherence-free subspace. Our approach was to lock the microwave source driving...the electron spins to a strong nuclear spin signal. In our initial experiments we locked to the proton signal in a water cell. However, the noise in

  3. Spike-Timing Dependent Plasticity in Unipolar Silicon Oxide RRAM Devices.

    Science.gov (United States)

    Zarudnyi, Konstantin; Mehonic, Adnan; Montesi, Luca; Buckwell, Mark; Hudziak, Stephen; Kenyon, Anthony J

    2018-01-01

    Resistance switching, or Resistive RAM (RRAM) devices show considerable potential for application in hardware spiking neural networks (neuro-inspired computing) by mimicking some of the behavior of biological synapses, and hence enabling non-von Neumann computer architectures. Spike-timing dependent plasticity (STDP) is one such behavior, and one example of several classes of plasticity that are being examined with the aim of finding suitable algorithms for application in many computing tasks such as coincidence detection, classification and image recognition. In previous work we have demonstrated that the neuromorphic capabilities of silicon-rich silicon oxide (SiO x ) resistance switching devices extend beyond plasticity to include thresholding, spiking, and integration. We previously demonstrated such behaviors in devices operated in the unipolar mode, opening up the question of whether we could add plasticity to the list of features exhibited by our devices. Here we demonstrate clear STDP in unipolar devices. Significantly, we show that the response of our devices is broadly similar to that of biological synapses. This work further reinforces the potential of simple two-terminal RRAM devices to mimic neuronal functionality in hardware spiking neural networks.

  4. Materials preparation and fabrication of pyroelectric polymer/silicon MOSFET detector arrays. Final report

    International Nuclear Information System (INIS)

    Bloomfield, P.

    1992-01-01

    The authors have delivered several 64-element linear arrays of pyroelectric elements fully integrated on silicon wafers with MOS readout devices. They have delivered detailed drawings of the linear arrays to LANL. They have processed a series of two inch wafers per submitted design. Each two inch wafer contains two 64 element arrays. After spin-coating copolymer onto the arrays, vacuum depositing the top electrodes, and polarizing the copolymer films so as to make them pyroelectrically active, each wafer was split in half. The authors developed a thicker oxide coating separating the extended gate electrode (beneath the polymer detector) from the silicon. This should reduce its parasitic capacitance and hence improve the S/N. They provided LANL three processed 64 element sensor arrays. Each array was affixed to a connector panel and selected solder pads of the common ground, the common source voltage supply connections, the 64 individual drain connections, and the 64 drain connections (for direct pyroelectric sensing response rather than the MOSFET action) were wire bonded to the connector panel solder pads. This entails (64 + 64 + 1 + 1) = 130 possible bond connections per 64 element array. This report now details the processing steps and the progress of the individual wafers as they were carried through from beginning to end

  5. Fabrication of palladium-based microelectronic devices by microcontact printing

    International Nuclear Information System (INIS)

    Wolfe, Daniel B.; Love, J. Christopher; Paul, Kateri E.; Chabinyc, Michael L.; Whitesides, George M.

    2002-01-01

    This letter demonstrates the patterning of thin films of metallic palladium by microcontact printing (μCP) of octadecanethiol, and the use of the patterned films in the fabrication of a functional sensor. This technique was also used to prepare templates of palladium for the electroless deposition of copper. The resistivity of the palladium and copper microstructures was 13.8 and 2.8 μΩ cm, respectively; these values are approximately 40% larger than the values for the pure bulk metals. Palladium patterned into serpentine wires using μCP functioned as a hydrogen sensor with sensitivity of 0.03 vol % H 2 in N 2 , and a response time of ∼10 s (at room temperature)

  6. Fabrication of Extrinsically Conductive Silicone Rubbers with High Elasticity and Analysis of Their Mechanical and Electrical Characteristics

    Directory of Open Access Journals (Sweden)

    Anjum Saleem

    2010-08-01

    Full Text Available Conductive plastics are attracting more and more interest in electronics due to their light weight and inability to rust, which are common problems associated with metals. The field of conducting plastics is not new. Much work has been done to impart electrical conductivity to mechanically strong polymers such as polypropylene, polycarbonate and epoxies, etc. However there is a need to fabricate more flexible and elastic conductive polymers such as conducting silicone rubbers for use in various applications. In this work silicone rubbers reinforced with conductive fillers have been fabricated for use as sensors in textiles to detect the resistance change produced by stretching or relaxing. The variations of electrical resistance have been investigated by stretching and releasing the strands of conductive rubbers as a function of time. Two types of silicone rubbers—addition cured and condensation cured—were compounded with different electrically conductive fillers, among which carbon fibers have shown the best results. The carbon fibers improved the electrical conductance of the rubbers, even in very low weight percentages. The increasing concentration of fillers decreases the elasticity of the rubber. In order to keep the original properties of silicones, the filler concentration was kept as low as possible to produce a significantly detectable signal. The fabricated compounds were analyzed for their mechanical properties by stress strain curves. Such materials find their applications in electronics, antistatic applications, sports and the automotive industry where they can be used as deformation sensors.

  7. Design and fabrication process of silicon micro-calorimeters on simple SOI technology for X-ray spectral imaging

    International Nuclear Information System (INIS)

    Aliane, A.; Agnese, P.; Pigot, C.; Sauvageot, J.-L.; Moro, F. de; Ribot, H.; Gasse, A.; Szeflinski, V.; Gobil, Y.

    2008-01-01

    Several successful development programs have been conducted on infra-red bolometer arrays at the 'Commissariat a l'Energie Atomique' (CEA-LETI Grenoble) in collaboration with the CEA-SAp (Saclay); taking advantage of this background, we are now developing an X-ray spectro-imaging camera for next generation space astronomy missions, using silicon only technology. We have developed monolithic silicon micro-calorimeters based on implanted thermistors in an improved array that could be used for future space missions. The 8x8 array consists of a grid of 64 suspended pixels fabricated on a silicon on insulator (SOI) wafer. Each pixel of this detector array is made of a tantalum (Ta) absorber, which is bound by means of indium bump hybridization, to a silicon thermistor. The absorber array is bound to the thermistor array in a collective process. The fabrication process of our detector involves a combination of standard technologies and silicon bulk micro-machining techniques, based on deposition, photolithography and plasma etching steps. Finally, we present the results of measurements performed on these four primary building blocks that are required to create a detector array up to 32x32 pixels in size

  8. Electrical parameters of silicon on sapphire; influence on aluminium gate MOS devices performances

    International Nuclear Information System (INIS)

    Suat, J.P.; Borel, J.

    1976-01-01

    The question is the quality level of the substrate obtained with MOS technologies on silicon on an insulating substrate. Experimental results are presented on the main electrical parameters of MOS transistors made on silicon on sapphire, e.g. mean values and spreads of: threhold voltage and surface mobilities of transistors, breakdown voltages, and leakage currents of diodes. These devices have been made in three different technologies: enhancement P. channel technology, depletion-enhancement P. channel technology, and complementary MOS technology. These technologies are all aluminium gate processes with standard design rules and 5μm channel length. Measurements show that presently available silicon on sapphire can be considered as a very suitable substrate for many MOS digital applications (but not for dynamic circuits) [fr

  9. Zinc oxide nano-rods based glucose biosensor devices fabrication

    Science.gov (United States)

    Wahab, H. A.; Salama, A. A.; El Saeid, A. A.; Willander, M.; Nur, O.; Battisha, I. K.

    2018-06-01

    ZnO is distinguished multifunctional material that has wide applications in biochemical sensor devices. For extracellular measurements, Zinc oxide nano-rods will be deposited on conducting plastic substrate with annealing temperature 150 °C (ZNRP150) and silver wire with annealing temperature 250 °C (ZNRW250), for the extracellular glucose concentration determination with functionalized ZNR-coated biosensors. It was performed in phosphate buffer saline (PBS) over the range from 1 μM to 10 mM and on human blood plasma. The prepared samples crystal structure and surface morphologies were characterized by XRD and field emission scanning electron microscope FESEM respectively.

  10. Device physics of hydrogenated amorphous silicon solar cells

    Science.gov (United States)

    Liang, Jianjun

    This dissertation reports measurements on and modeling of hydrogenated amorphous silicon (a-Si:H) nip solar cells. Cells with thicknesses from 200-900 nm were prepared at United Solar Ovonic LLC. The current density-voltage (J-V) relations were measured under laser illumination (685 nm wavelength, up to 200 mW/cm2) over the temperature range 240 K--350 K. The changes in the cells' open-circuit voltage during extended laser illumination (light-soaking) were measured, as were the cell properties in several light-soaked states. The J-V properties of cells in their as-deposited and light-soaked states converge at low-temperatures. Electromodulation spectra for the cells were also measured over the range 240 K--350 K to determine the temperature-dependent bandgap. These experimental results were compared to computer calculations of J-V relations using the AMPS ((c)Pennsylvania State University) computer code. Bandtail parameters (for electron and hole mobility and recombination) were consistent with published drift-mobility and transient photocurrent measurements on a-Si:H. The open-circuit voltage and power density measurements on as-deposited cells, as a function of temperature and thickness, were predicted well. The calculations support a general "hole mobility limited" approach to analyzing a-Si:H solar cells, and indicate that the doped electrode layers, the as-deposited density of dangling bonds, and the electron mobility are of secondary importance to as-deposited cells. For light-soaked a-Si:H solar cells, incorporation of a density of dangling bonds in the computer calculations accounted satisfactorily for the power and open-circuit voltage measurements, including the low-temperature convergence effect. The calculations indicate that, in the light-soaked state at room-temperature, electron recombination is split nearly evenly between holes trapped in the valence bandtail and holes trapped on dangling bonds. The result supports Stutzmann, Jackson, and Tsai

  11. Simple, Fast, and Cost-Effective Fabrication of Wafer-Scale Nanohole Arrays on Silicon for Antireflection

    Directory of Open Access Journals (Sweden)

    Di Di

    2014-01-01

    Full Text Available A simple, fast, and cost-effective method was developed in this paper for the high-throughput fabrication of nanohole arrays on silicon (Si, which is utilized for antireflection. Wafer-scale polystyrene (PS monolayer colloidal crystal was developed as templates by spin-coating method. Metallic shadow mask was prepared by lifting off the oxygen etched PS beads from the deposited chromium film. Nanohole arrays were fabricated by Si dry etching. A series of nanohole arrays were fabricated with the similar diameter but with different depth. It is found that the maximum depth of the Si-hole was determined by the diameter of the Cr-mask. The antireflection ability of these Si-hole arrays was investigated. The results show that the reflection decreases with the depth of the Si-hole. The deepest Si-hole arrays show the best antireflection ability (reflection 600 nm, which was about 28 percent of the nonpatterned silicon wafer’s reflection. The proposed method has the potential for high-throughput fabrication of patterned Si wafer, and the low reflectivity allows the application of these wafers in crystalline silicon solar cells.

  12. Enhancement of Light Absorption in Silicon Nanowire Photovoltaic Devices with Dielectric and Metallic Grating Structures.

    Science.gov (United States)

    Park, Jin-Sung; Kim, Kyoung-Ho; Hwang, Min-Soo; Zhang, Xing; Lee, Jung Min; Kim, Jungkil; Song, Kyung-Deok; No, You-Shin; Jeong, Kwang-Yong; Cahoon, James F; Kim, Sun-Kyung; Park, Hong-Gyu

    2017-12-13

    We report the enhancement of light absorption in Si nanowire photovoltaic devices with one-dimensional dielectric or metallic gratings that are fabricated by a damage-free, precisely aligning, polymer-assisted transfer method. Incorporation of a Si 3 N 4 grating with a Si nanowire effectively enhances the photocurrents for transverse-electric polarized light. The wavelength at which a maximum photocurrent is generated is readily tuned by adjusting the grating pitch. Moreover, the electrical properties of the nanowire devices are preserved before and after transferring the Si 3 N 4 gratings onto Si nanowires, ensuring that the quality of pristine nanowires is not degraded during the transfer. Furthermore, we demonstrate Si nanowire photovoltaic devices with Ag gratings using the same transfer method. Measurements on the fabricated devices reveal approximately 27.1% enhancement in light absorption compared to that of the same devices without the Ag gratings without any degradation of electrical properties. We believe that our polymer-assisted transfer method is not limited to the fabrication of grating-incorporated nanowire photovoltaic devices but can also be generically applied for the implementation of complex nanoscale structures toward the development of multifunctional optoelectronic devices.

  13. Fabricating a multi-level barrier-integrated microfluidic device using grey-scale photolithography

    International Nuclear Information System (INIS)

    Nam, Yoonkwang; Kim, Minseok; Kim, Taesung

    2013-01-01

    Most polymer-replica-based microfluidic devices are mainly fabricated by using standard soft-lithography technology so that multi-level masters (MLMs) require multiple spin-coatings, mask alignments, exposures, developments, and bakings. In this paper, we describe a simple method for fabricating MLMs for planar microfluidic channels with multi-level barriers (MLBs). A single photomask is necessary for standard photolithography technology to create a polydimethylsiloxane grey-scale photomask (PGSP), which adjusts the total amount of UV absorption in a negative-tone photoresist via a wide range of dye concentrations. Since the PGSP in turn adjusts the degree of cross-linking of the photoresist, this method enables the fabrication of MLMs for an MLB-integrated microfluidic device. Since the PGSP-based soft-lithography technology provides a simple but powerful fabrication method for MLBs in a microfluidic device, we believe that the fabrication method can be widely used for micro total analysis systems that benefit from MLBs. We demonstrate an MLB-integrated microfluidic device that can separate microparticles. (paper)

  14. Printing-based fabrication method using sacrificial paper substrates for flexible and wearable microfluidic devices

    International Nuclear Information System (INIS)

    Chung, Daehan; Gray, Bonnie L

    2017-01-01

    We present a simple, fast, and inexpensive new printing-based fabrication process for flexible and wearable microfluidic channels and devices. Microfluidic devices are fabricated on textiles (fabric) for applications in clothing-based wearable microfluidic sensors and systems. The wearable and flexible microfluidic devices are comprised of water-insoluable screen-printable plastisol polymer. Sheets of paper are used as sacrificial substrates for multiple layers of polymer on the fabric’s surface. Microfluidic devices can be made within a short time using simple processes and inexpensive equipment that includes a laser cutter and a thermal laminator. The fabrication process is characterized to demonstrate control of microfluidic channel thickness and width. Film thickness smaller than 100 micrometers and lateral dimensions smaller than 150 micrometers are demonstrated. A flexible microfluidic mixer is also developed on fabric and successfully tested on both flat and curved surfaces at volumetric flow rates ranging from 5.5–46 ml min −1 . (paper)

  15. Direct current microhollow cathode discharges on silicon devices operating in argon and helium

    Science.gov (United States)

    Michaud, R.; Felix, V.; Stolz, A.; Aubry, O.; Lefaucheux, P.; Dzikowski, S.; Schulz-von der Gathen, V.; Overzet, L. J.; Dussart, R.

    2018-02-01

    Microhollow cathode discharges have been produced on silicon platforms using processes usually used for MEMS fabrication. Microreactors consist of 100 or 150 μm-diameter cavities made from Ni and SiO2 film layers deposited on a silicon substrate. They were studied in the direct current operating mode in two different geometries: planar and cavity configuration. Currents in the order of 1 mA could be injected in microdischarges operating in different gases such as argon and helium at a working pressure between 130 and 1000 mbar. When silicon was used as a cathode, the microdischarge operation was very unstable in both geometry configurations. Strong current spikes were produced and the microreactor lifetime was quite short. We evidenced the fast formation of blisters at the silicon surface which are responsible for the production of these high current pulses. EDX analysis showed that these blisters are filled with argon and indicate that an implantation mechanism is at the origin of this surface modification. Reversing the polarity of the microdischarge makes the discharge operate stably without current spikes, but the discharge appearance is quite different from the one obtained in direct polarity with the silicon cathode. By coating the silicon cathode with a 500 nm-thick nickel layer, the microdischarge becomes very stable with a much longer lifetime. No current spikes are observed and the cathode surface remains quite smooth compared to the one obtained without coating. Finally, arrays of 76 and 576 microdischarges were successfully ignited and studied in argon. At a working pressure of 130 mbar, all microdischarges are simultaneously ignited whereas they ignite one by one at higher pressure.

  16. Promising silicones modified with cationic biocides for the development of antimicrobial medical devices.

    Science.gov (United States)

    Ghamrawi, Sarah; Bouchara, Jean-Philippe; Tarasyuk, Oksana; Rogalsky, Sergiy; Lyoshina, Lyudmila; Bulko, Olga; Bardeau, Jean-François

    2017-06-01

    We have tested silicones containing 2% or 5% of the cationic biocides polyhexamethylene guanidine dodecylbenzenesulfonate (PHMG-DBS), 1-octyl-3-methylimidazolium tetrafluoroborate (OMIM-BF 4 ) or 1-dodecyl-3-methylimidazolium tetrafluoroborate (DMIM-BF 4 ) against the major relevant bacterial and yeast species in health care-associated infections (HCAI). Study conducted according to the international standard ISO 22196 revealed that silicones containing 2% or 5% DMIM-BF 4 or 5% PHMG-DBS presented the highest antimicrobial activity, leading to a logarithmic growth reduction of 3.03 to 6.46 and 3.65 to 4.85 depending on the bacterial or fungal species. Heat-pretreated silicones containing 2% DMIM-BF 4 kept a high activity, with at least a 3-log reduction in bacterial growth, except against P. aeruginosa where there was only a 1.1-log reduction. After 33days, the release ratio of cationic biocide from silicone films containing 5% of DMIM-BF 4 was found to be 5.6% in pure water and 1.9% in physiological saline solution, respectively. No leaching of PHMG-DBS polymeric biocide was detected under the same conditions. These results demonstrate unambiguously that silicones containing 2% DMIM-BF 4 or 5% PHMG-DBS present high antimicrobial activity, as well as high leaching resistance and therefore may be good candidates for the development of safer medical devices. Copyright © 2017 Elsevier B.V. All rights reserved.

  17. A study of luminescence from silicon-rich silica fabricated by plasma enhanced chemical vapour deposition

    International Nuclear Information System (INIS)

    Trwoga, P.F.

    1998-01-01

    Silicon is the most studied electronic material known to man and dominates the electronics industry in its use as a semiconductors for nearly all integrated electronics. However, optoelectronics is almost entirely based on III-V materials. This technology is used because silicon is a very inefficient light source, whereas the III-V band structure can lend itself to efficient light emission by electron injection. However, due to the overwhelming dominance of silicon based electronics it is still a highly desirable goal to generate light efficiently from silicon based materials. Recently, studies have demonstrated that efficient visible luminescence can be obtained from certain novel forms of silicon. These materials include porous silicon, hydrogenated amorphous silicon, and silicon-rich silica (SiO x x x is studied in detail; in addition, electroluminescence and rare-earth doping of silicon-rich silica is also addressed. (author)

  18. Contactless graphene conductance measurements: the effect of device fabrication on terahertz time-domain spectroscopy

    DEFF Research Database (Denmark)

    Mackenzie, David; Buron, Jonas Christian Due; Bøggild, Peter

    2016-01-01

    We perform contactless full-wafer maps of the electrical conductance of a 4-inch wafer of single-layer CVD graphene using terahertz time-domain spectroscopy both before and after deposition of metal contacts and fabrication of devices via laser ablation. We find that there is no significant change...... in the measured conductance of graphene before and after device fabrication. We also show that precise terahertz time-domain spectroscopy can be performed when the beam spot is at sufficient distance (>1.2 mm) from metal contacts....

  19. High-performance green semiconductor devices: materials, designs, and fabrication

    Science.gov (United States)

    Jung, Yei Hwan; Zhang, Huilong; Gong, Shaoqin; Ma, Zhenqiang

    2017-06-01

    From large industrial computers to non-portable home appliances and finally to light-weight portable gadgets, the rapid evolution of electronics has facilitated our daily pursuits and increased our life comforts. However, these rapid advances have led to a significant decrease in the lifetime of consumer electronics. The serious environmental threat that comes from electronic waste not only involves materials like plastics and heavy metals, but also includes toxic materials like mercury, cadmium, arsenic, and lead, which can leak into the ground and contaminate the water we drink, the food we eat, and the animals that live around us. Furthermore, most electronics are comprised of non-renewable, non-biodegradable, and potentially toxic materials. Difficulties in recycling the increasing amount of electronic waste could eventually lead to permanent environmental pollution. As such, discarded electronics that can naturally degrade over time would reduce recycling challenges and minimize their threat to the environment. This review provides a snapshot of the current developments and challenges of green electronics at the semiconductor device level. It looks at the developments that have been made in an effort to help reduce the accumulation of electronic waste by utilizing unconventional, biodegradable materials as components. While many semiconductors are classified as non-biodegradable, a few biodegradable semiconducting materials exist and are used as electrical components. This review begins with a discussion of biodegradable materials for electronics, followed by designs and processes for the manufacturing of green electronics using different techniques and designs. In the later sections of the review, various examples of biodegradable electrical components, such as sensors, circuits, and batteries, that together can form a functional electronic device, are discussed and new applications using green electronics are reviewed.

  20. High-efficiency power transfer for silicon-based photonic devices

    Science.gov (United States)

    Son, Gyeongho; Yu, Kyoungsik

    2018-02-01

    We demonstrate an efficient coupling of guided light of 1550 nm from a standard single-mode optical fiber to a silicon waveguide using the finite-difference time-domain method and propose a fabrication method of tapered optical fibers for efficient power transfer to silicon-based photonic integrated circuits. Adiabatically-varying fiber core diameters with a small tapering angle can be obtained using the tube etching method with hydrofluoric acid and standard single-mode fibers covered by plastic jackets. The optical power transmission of the fundamental HE11 and TE-like modes between the fiber tapers and the inversely-tapered silicon waveguides was calculated with the finite-difference time-domain method to be more than 99% at a wavelength of 1550 nm. The proposed method for adiabatic fiber tapering can be applied in quantum optics, silicon-based photonic integrated circuits, and nanophotonics. Furthermore, efficient coupling within the telecommunication C-band is a promising approach for quantum networks in the future.

  1. Fabrication and bonding of thiol-ene-based microfluidic devices

    International Nuclear Information System (INIS)

    Sikanen, Tiina M; Moilanen, Maria-Elisa; Lafleur, Josiane P; Zhuang, Guisheng; Jensen, Thomas G; Kutter, Jörg P

    2013-01-01

    In this work, the bonding strength of microchips fabricated by thiol-ene free-radical polymerization was characterized in detail by varying the monomeric thiol/allyl composition from the stoichiometric ratio (1:1) up to 100% excess of thiol (2:1) or allyl (1:2) functional groups. Four different thiol-ene to thiol-ene bonding combinations were tested by bonding: (i) two stoichiometric layers, (ii) two layers bearing complementary excess of thiols and allyls, (iii) two layers both bearing excess of thiols, or (iv) two layers both bearing excess of allyls. The results showed that the stiffness of the cross-linked polymer plays the most crucial role regarding the bonding strength. The most rigid polymer layers were obtained by using the stoichiometric composition or an excess of allyls, and thus, the bonding combinations (i) and (iv) withstood the highest pressures (up to the cut-off value of 6 bar). On the other hand, excess of thiol monomers yielded more elastic polymer layers and thus decreased the pressure tolerance for bonding combinations (ii) and (iii). By using monomers with more thiol groups (e.g. tetrathiol versus trithiol), a higher cross-linking ratio, and thus, greater stiffness was obtained. Surface characterization by infrared spectroscopy confirmed that the changes in the monomeric thiol/allyl composition were also reflected in the surface chemistry. The flexibility of being able to bond different types of thiol-enes together allows for tuning of the surface chemistry to yield the desired properties for each application. Here, a capillary electrophoresis separation is performed to demonstrate the attractive properties of stoichiometric thiol-ene microchips. (technical note)

  2. Design of experiment characterization of microneedle fabrication processes based on dry silicon etching

    Science.gov (United States)

    Held, J.; Gaspar, J.; Ruther, P.; Hagner, M.; Cismak, A.; Heilmann, A.; Paul, O.

    2010-02-01

    This paper reports on the characterization of dry etching-based processes for the fabrication of silicon microneedles using a design of experiment (DoE) approach. The possibility of using such microneedles as protruding microelectrodes able to electroporate adherently growing cells and record intracellular potentials motivates the systematic analysis of the influence of etching parameters on the needle shape. Two processes are characterized: a fully isotropic etch process and a three-step etching approach. In the first case, the shape of the microneedles is defined by a single etch step. For the stepped method, the structures are realized using the following sequence: a first, isotropic step defines the tip; this is followed by anisotropic etching that increases the height of the needle; a final isotropic procedure thins the microneedle and sharpens its tip. From the various process parameters tested, it is concluded that the isotropic fabrication is influenced mostly by four process parameters, whereas six parameters dominantly govern the outcome of the stepped etching technique. The dependence of the needle shape on the etch mask diameter is also investigated. Microneedles with diameters down to the sub-micrometer range and heights below 10 µm are obtained. The experimental design is performed using the D-optimal method. The resulting geometry, i.e. heights, diameters and radii of curvature measured at different positions, is extracted from scanning electron micrographs of needle cross-sections obtained from cuts by focused ion beam. The process parameters are used as inputs and the geometry features of the microneedles as outputs for the analysis of the process.

  3. Design of experiment characterization of microneedle fabrication processes based on dry silicon etching

    International Nuclear Information System (INIS)

    Held, J; Gaspar, J; Ruther, P; Paul, O; Hagner, M; Cismak, A; Heilmann, A

    2010-01-01

    This paper reports on the characterization of dry etching-based processes for the fabrication of silicon microneedles using a design of experiment (DoE) approach. The possibility of using such microneedles as protruding microelectrodes able to electroporate adherently growing cells and record intracellular potentials motivates the systematic analysis of the influence of etching parameters on the needle shape. Two processes are characterized: a fully isotropic etch process and a three-step etching approach. In the first case, the shape of the microneedles is defined by a single etch step. For the stepped method, the structures are realized using the following sequence: a first, isotropic step defines the tip; this is followed by anisotropic etching that increases the height of the needle; a final isotropic procedure thins the microneedle and sharpens its tip. From the various process parameters tested, it is concluded that the isotropic fabrication is influenced mostly by four process parameters, whereas six parameters dominantly govern the outcome of the stepped etching technique. The dependence of the needle shape on the etch mask diameter is also investigated. Microneedles with diameters down to the sub-micrometer range and heights below 10 µm are obtained. The experimental design is performed using the D-optimal method. The resulting geometry, i.e. heights, diameters and radii of curvature measured at different positions, is extracted from scanning electron micrographs of needle cross-sections obtained from cuts by focused ion beam. The process parameters are used as inputs and the geometry features of the microneedles as outputs for the analysis of the process.

  4. The Effects of Thermal Cycling on Gallium Nitride and Silicon Carbide Semiconductor Devices for Aerospace Use

    Science.gov (United States)

    Patterson, Richard L.; Hammoud, Ahmad

    2012-01-01

    Electronics designed for use in NASA space missions are required to work efficiently and reliably under harsh environment conditions. These Include radiation, extreme temperatures, thermal cycling, to name a few. Preliminary data obtained on new Gallium Nitride and Silicon Carbide power devices under exposure to radiation followed by long term thermal cycling are presented. This work was done in collaboration with GSFC and JPL in support of the NASA Electronic Parts and Packaging (NEPP) Program

  5. Highly efficient tandem organic light-emitting devices employing an easily fabricated charge generation unit

    Science.gov (United States)

    Yang, Huishan; Yu, Yaoyao; Wu, Lishuang; Qu, Biao; Lin, Wenyan; Yu, Ye; Wu, Zhijun; Xie, Wenfa

    2018-02-01

    We have realized highly efficient tandem organic light-emitting devices (OLEDs) employing an easily fabricated charge generation unit (CGU) combining 1,4,5,8,9,11-hexaazatriphenylene-hexacarbonitrile with ultrathin bilayers of CsN3 and Al. The charge generation and separation processes of the CGU have been demonstrated by studying the differences in the current density-voltage characteristics of external-carrier-excluding devices. At high luminances of 1000 and 10000 cd/m2, the current efficiencies of the phosphorescent tandem device are about 2.2- and 2.3-fold those of the corresponding single-unit device, respectively. Simultaneously, an efficient tandem white OLED exhibiting high color stability and warm white emission has also been fabricated.

  6. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    International Nuclear Information System (INIS)

    Ghoneim, M. T.; Hussain, M. M.

    2015-01-01

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures

  7. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    Science.gov (United States)

    Ghoneim, M. T.; Hussain, M. M.

    2015-08-01

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ˜260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  8. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    Energy Technology Data Exchange (ETDEWEB)

    Ghoneim, M. T.; Hussain, M. M., E-mail: muhammadmustafa.hussain@kaust.edu.sa [Integrated Nanotechnology Lab, Electrical Engineering, Computer Electrical Mathematical Science and Engineering Division, King Abdullah University of Science and Technology, Thuwal 23955-6900 (Saudi Arabia)

    2015-08-03

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  9. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-08-05

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  10. Impact of the layout on the electrical characteristics of double-sided silicon 3D sensors fabricated at FBK

    Energy Technology Data Exchange (ETDEWEB)

    Povoli, M., E-mail: povoli@disi.unitn.it [Dipartimento di Ingegneria e Scienza dell' Informazione, Università di Trento, Via Sommarive, 14, I-38123 Povo di Trento (Italy); INFN, Sezione di Padova (Gruppo Collegato di Trento) (Italy); Bagolini, A.; Boscardin, M. [Fondazione Bruno Kessler, Centro per i Materiali e i Microsistemi (FBK-CMM), Via Sommarive, 18, I-38123 Povo di Trento, TN (Italy); Dalla Betta, G.-F. [Dipartimento di Ingegneria e Scienza dell' Informazione, Università di Trento, Via Sommarive, 14, I-38123 Povo di Trento (Italy); INFN, Sezione di Padova (Gruppo Collegato di Trento) (Italy); Giacomini, G.; Mattedi, F.; Vianello, E.; Zorzi, N. [Fondazione Bruno Kessler, Centro per i Materiali e i Microsistemi (FBK-CMM), Via Sommarive, 18, I-38123 Povo di Trento, TN (Italy)

    2013-01-21

    We report on experimental results and TCAD simulations addressing the impact of layout on the electrical characteristics of double-sided 3D diodes fabricated at Fondazione Bruno Kessler (FBK), Trento, Italy. Simulations are found to accurately reproduce the device characteristics, thus explaining the basic mechanisms governing the breakdown behavior and capacitance of different devices and providing useful hints for layout optimization.

  11. Impact of the layout on the electrical characteristics of double-sided silicon 3D sensors fabricated at FBK

    International Nuclear Information System (INIS)

    Povoli, M.; Bagolini, A.; Boscardin, M.; Dalla Betta, G.-F.; Giacomini, G.; Mattedi, F.; Vianello, E.; Zorzi, N.

    2013-01-01

    We report on experimental results and TCAD simulations addressing the impact of layout on the electrical characteristics of double-sided 3D diodes fabricated at Fondazione Bruno Kessler (FBK), Trento, Italy. Simulations are found to accurately reproduce the device characteristics, thus explaining the basic mechanisms governing the breakdown behavior and capacitance of different devices and providing useful hints for layout optimization.

  12. Frequency and Temperature Dependence of Fabrication Parameters in Polymer Dispersed Liquid Crystal Devices

    Science.gov (United States)

    Torres, Juan C.; Vergaz, Ricardo; Barrios, David; Sánchez-Pena, José Manuel; Viñuales, Ana; Grande, Hans Jürgen; Cabañero, Germán

    2014-01-01

    A series of polymer dispersed liquid crystal devices using glass substrates have been fabricated and investigated focusing on their electrical properties. The devices have been studied in terms of impedance as a function of frequency. An electric equivalent circuit has been proposed, including the influence of the temperature on the elements into it. In addition, a relevant effect of temperature on electrical measurements has been observed. PMID:28788632

  13. Frequency and Temperature Dependence of Fabrication Parameters in Polymer Dispersed Liquid Crystal Devices

    Directory of Open Access Journals (Sweden)

    Juan C. Torres

    2014-05-01

    Full Text Available A series of polymer dispersed liquid crystal devices using glass substrates have been fabricated and investigated focusing on their electrical properties. The devices have been studied in terms of impedance as a function of frequency. An electric equivalent circuit has been proposed, including the influence of the temperature on the elements into it. In addition, a relevant effect of temperature on electrical measurements has been observed.

  14. A multi-level capacitor-less memory cell fabricated on a nano-scale strained silicon-on-insulator

    International Nuclear Information System (INIS)

    Park, Jea-Gun; Kim, Seong-Je; Shin, Mi-Hee; Song, Seung-Hyun; Shim, Tae-Hun; Chung, Sung-Woong; Enomoto, Hirofumi

    2011-01-01

    A multi-level capacitor-less memory cell was fabricated with a fully depleted n-metal-oxide-semiconductor field-effect transistor on a nano-scale strained silicon channel on insulator (FD sSOI n-MOSFET). The 0.73% biaxial tensile strain in the silicon channel of the FD sSOI n-MOSFET enhanced the effective electron mobility to ∼ 1.7 times that with an unstrained silicon channel. This thereby enables both front- and back-gate cell operations, demonstrating eight-level volatile memory-cell operation with a 1 ms retention time and 12 μA memory margin. This is a step toward achieving a terabit volatile memory cell.

  15. Characteristics of MOSFETs fabricated in silicon-on-insulator material formed by high-dose oxygen ion implantation

    International Nuclear Information System (INIS)

    Lam, H.W.; Pinizzotto, R.F.; Yuan, H.T.; Bellavance, D.W.

    1981-01-01

    By implanting a dose of 6 x 10 17 cm -2 of 32 O 2 + at 300 keV into a silicon wafer, a buried oxide layer is formed. Crystallinity of the silicon layer above the buried oxide layer is maintained by applying a high (>200 0 C) substrate temperature during the ion implantation process. A two-step anneal cycle is found to be adequate to form the insulating buried oxide layer and to repair the implantation damage in the silicon layer on top of the buried oxide. A surface electron mobility as high as 710 cm 2 /Vs has been measured in n-channel MOSFETs fabricated in a 0.5 μm-thick epitaxial layer grown on the buried oxide wafer. A minimum subthreshold current of about 10 pA per micron of channel width at Vsub(DS)=2 V has been measured. (author)

  16. Fabrication and Optical Characterization of Silicon Nanostructure Arrays by Laser Interference Lithography and Metal-Assisted Chemical Etching

    Directory of Open Access Journals (Sweden)

    P. Heydari

    2014-10-01

    Full Text Available In this paper metal-assisted chemical etching has been applied to pattern porous silicon regions and silicon nanohole arrays in submicron period simply by using positive photoresist as a mask layer. In order to define silicon nanostructures, Metal-assisted chemical etching (MaCE was carried out with silver catalyst. Provided solution (or materiel in combination with laser interference lithography (LIL fabricated different reproducible pillars, holes and rhomboidal structures. As a result, Submicron patterning of porous areas and nanohole arrays on Si substrate with a minimum feature size of 600nm was achieved. Measured reflection spectra of the samples present different optical characteristics which is dependent on the shape, thickness of metal catalyst and periodicity of the structure. These structures can be designed to reach a photonic bandgap in special range or antireflection layer in energy harvesting applications. The resulted reflection spectra of applied method are comparable to conventional expensive and complicated dry etching techniques.

  17. Mesoporous silicon particles as intravascular drug delivery vectors: fabrication, in-vitro, and in-vivo assessments

    International Nuclear Information System (INIS)

    Chiappini, Ciro; Tasciotti, Ennio; Serda, Rita E.; Brousseau, Lou; Liu, Xuewu; Ferrari, M.

    2011-01-01

    Porous silicon is an attractive biomaterial for drug delivery thanks to its biocompatibility, biodegradability, ease of fabrication, tunable nanostructure, and porous network. Herein we briefly present the development of a multi-stage delivery vector that leverages these advantages to enhance delivery of systemically administered therapeutic agents. We illustrate the rational design, objective-oriented fabrication and geometric control of first stage porous silicon microparticles. We describe how geometry affects the biodistribution of first stage vectors and how their porous structure affects the loading and release of second stage theranostic payloads. We describe the mechanism of cellular internalization and intracellular trafficking of particles. Finally we present two multi-stage vector prototypes for the delivery of magnetic resonance imaging contrast agents and small interfering RNA (copyright 2011 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  18. Mesoporous silicon particles as intravascular drug delivery vectors: fabrication, in-vitro, and in-vivo assessments

    Energy Technology Data Exchange (ETDEWEB)

    Chiappini, Ciro [Department of Biomedical Engineering, University of Texas at Austin, 1 University Station, Austin, TX, 78712 (United States); Tasciotti, Ennio; Serda, Rita E.; Brousseau, Lou; Liu, Xuewu [Department of Nanomedicine and Biomedical Engineering, Mehtodist Hospital Research Institute, 6565 Fannin Street, Houston, TX, 77030 (United States); Ferrari, M. [Department of Biomedical Engineering, University of Texas at Austin, 1 University Station, Austin, TX, 78712 (United States); Department of Nanomedicine and Biomedical Engineering, Mehtodist Hospital Research Institute, 6565 Fannin Street, Houston, TX, 77030 (United States); Department of Experimental Therapeutics, University of Texas MD Anderson Cancer Center, Houston, TX (United States); Department of Bioengineering, Rice University, Houston, TX (United States)

    2011-06-15

    Porous silicon is an attractive biomaterial for drug delivery thanks to its biocompatibility, biodegradability, ease of fabrication, tunable nanostructure, and porous network. Herein we briefly present the development of a multi-stage delivery vector that leverages these advantages to enhance delivery of systemically administered therapeutic agents. We illustrate the rational design, objective-oriented fabrication and geometric control of first stage porous silicon microparticles. We describe how geometry affects the biodistribution of first stage vectors and how their porous structure affects the loading and release of second stage theranostic payloads. We describe the mechanism of cellular internalization and intracellular trafficking of particles. Finally we present two multi-stage vector prototypes for the delivery of magnetic resonance imaging contrast agents and small interfering RNA (copyright 2011 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  19. Origin of blue photoluminescence from colloidal silicon nanocrystals fabricated by femtosecond laser ablation in solution.

    Science.gov (United States)

    Hao, H L; Wu, W S; Zhang, Y; Wu, L K; Shen, W Z

    2016-08-12

    We present a detailed investigation into the origin of blue emission from colloidal silicon (Si) nanocrystals (NCs) fabricated by femtosecond laser ablation of Si powder in 1-hexene. High resolution transmission electron microscopy and Raman spectroscopy observations confirm that Si NCs with average size 2.7 nm are produced and well dispersed in 1-hexene. Fourier transform infrared spectrum and x-ray photoelectron spectra have been employed to reveal the passivation of Si NCs surfaces with organic molecules. On the basis of the structural characterization, UV-visible absorption, temperature-dependent photoluminescence (PL), time-resolved PL, and PL excitation spectra investigations, we deduce that room-temperature blue luminescence from colloidal Si NCs originates from the following two processes: (i) under illumination, excitons first form within colloidal Si NCs by direct transition at the X or Γ (Γ25 → Γ'2) point; (ii) and then some trapped excitons migrate to the surfaces of colloidal Si NCs and further recombine via the surface states associated with the Si-C or Si-C-H2 bonds.

  20. Fabrication and tribological properties of super-hydrophobic surfaces based on porous silicon

    International Nuclear Information System (INIS)

    Liu, Y.H.; Wang, X.K.; Luo, J.B.; Lu, X.C.

    2009-01-01

    In the present work, super-hydrophobic surfaces based on porous silicon (PS) were constructed by the self-assembled molecular films and their tribological properties were investigated. A simple chemical etching approach was developed to fabricate PS with the certain rough microstructure surface, which can be observed by the environmental scanning electron microscopy (ESEM). The hydrocarbon and fluorocarbon alkylsilane molecular films were self-assembled on PS, which was confirmed by the X-ray photoelectron spectroscopy (XPS) measurement. In contrast to PS, the alkylsilane molecular films modified PS (mPS) were super-hydrophobic since the apparent water contact angle (CA) exceeded 160 deg. The tribological properties of PS and the mPS were investigated by a ball-on-disk tribometer during the processes of different sliding velocities and normal loads. The experimental results showed that the alkylsilane molecular films could decrease the friction coefficient. Due to the difference of chain structure and functional groups, the fluorinated alkylsilane films are better candidates for improving the hydrophobicity and lubricating characteristics of PS comparing to the non-fluorinated ones. The carbon chain length of alkylsilane molecules self-assembling on the Si or PS substrates could have little effects on the hydrophobic properties and the tribology performances.

  1. Automotive assessment of carbon-silicon composite anodes and methods of fabrication

    Science.gov (United States)

    Karulkar, Mohan; Blaser, Rachel; Kudla, Bob

    2015-01-01

    To assess the potential of carbon silicon composite anodes for automotive applications, C-Si anodes were fabricated and certain improvements employed. The use of a PVDF buffer layer is demonstrated for the first time with a C-Si composite material. The buffer layer increases adhesion by 89%, and increases capacity by 50-80%. Also, a limited capacity range is employed to improve cycle life by up to 200%, and enable currents as high as 2 mA cm-1. The combined use of a buffer layer and limited capacity range has not been reported before. A model is also presented for comparing C-Si performance with real-world automotive targets from USABC, including energy density, power density, specific energy, and specific power. The analysis reveals a capacity penalty that arises from pairing C-Si with a traditional cathode (NCA), and which prevents the cell from meeting all targets. Scenarios are presented in which a higher-capacity cathode (250 mAh g-1) allows all targets to be hypothetically met.

  2. Fabrication and characterization of joined silicon carbide cylindrical components for nuclear applications

    Science.gov (United States)

    Khalifa, H. E.; Deck, C. P.; Gutierrez, O.; Jacobsen, G. M.; Back, C. A.

    2015-02-01

    The use of silicon carbide (SiC) composites as structural materials in nuclear applications necessitates the development of a viable joining method. One critical application for nuclear-grade joining is the sealing of fuel within a cylindrical cladding. This paper demonstrates cylindrical joint feasibility using a low activation nuclear-grade joint material comprised entirely of β-SiC. While many papers have considered joining material, this paper takes into consideration the joint geometry and component form factor, as well as the material performance. Work focused specifically on characterizing the strength and permeability performance of joints between cylindrical SiC-SiC composites and monolithic SiC endplugs. The effects of environment and neutron irradiation were not evaluated in this study. Joint test specimens of different geometries were evaluated in their as-fabricated state, as well as after being subjected to thermal cycling and partial mechanical loading. A butted scarf geometry supplied the best combination of high strength and low permeability. A leak rate performance of 2 × 10-9 mbar l s-1 was maintained after thermal cycling and partial mechanical loading and sustained applied force of 3.4 kN, or an apparent strength of 77 MPa. This work shows that a cylindrical SiC-SiC composite tube sealed with a butted scarf endplug provides out-of-pile strength and permeability performance that meets light water reactor design requirements.

  3. Influences of Device and Circuit Mismatches on Paralleling Silicon Carbide MOSFETs

    DEFF Research Database (Denmark)

    Li, Helong; Munk-Nielsen, Stig; Wang, Xiongfei

    2016-01-01

    This paper addresses the influences of device and circuit mismatches on paralleling the Silicon Carbide (SiC) MOSFETs. Comprehensive theoretical analysis and experimental validation from paralleled discrete devices to paralleled dies in multichip power modules are first presented. Then, the influ......This paper addresses the influences of device and circuit mismatches on paralleling the Silicon Carbide (SiC) MOSFETs. Comprehensive theoretical analysis and experimental validation from paralleled discrete devices to paralleled dies in multichip power modules are first presented. Then......, the influence of circuit mismatch on paralleling SiC MOSFETs is investigated and experimentally evaluated for the first time. It is found that the mismatch of the switching loop stray inductance can also lead to on-state current unbalance with inductive output current, in addition to the on-state resistance...... of the device. It further reveals that circuit mismatches and a current coupling among the paralleled dies exist in a SiC MOSFET multichip power module, which is critical for the transient current distribution in the power module. Thus, a power module layout with an auxiliary source connection is developed...

  4. High Growth Rate Deposition of Hydrogenated Amorphous Silicon-Germanium Films and Devices Using ECR-PECVD

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Yong [Iowa State Univ., Ames, IA (United States)

    2002-01-01

    Hydrogenated amorphous silicon germanium films (a-SiGe:H) and devices have been extensively studied because of the tunable band gap for matching the solar spectrum and mature the fabrication techniques. a-SiGe:H thin film solar cells have great potential for commercial manufacture because of very low cost and adaptability to large-scale manufacturing. Although it has been demonstrated that a-SiGe:H thin films and devices with good quality can be produced successfully, some issues regarding growth chemistry have remained yet unexplored, such as the hydrogen and inert-gas dilution, bombardment effect, and chemical annealing, to name a few. The alloying of the SiGe introduces above an order-of-magnitude higher defect density, which degrades the performance of the a-SiGe:H thin film solar cells. This degradation becomes worse when high growth-rate deposition is required. Preferential attachment of hydrogen to silicon, clustering of Ge and Si, and columnar structure and buried dihydride radicals make the film intolerably bad. The work presented here uses the Electron-Cyclotron-Resonance Plasma-Enhanced Chemical Vapor Deposition (ECR-PECVD) technique to fabricate a-SiGe:H films and devices with high growth rates. Helium gas, together with a small amount of H2, was used as the plasma species. Thickness, optical band gap, conductivity, Urbach energy, mobility-lifetime product, I-V curve, and quantum efficiency were characterized during the process of pursuing good materials. The microstructure of the a-(Si,Ge):H material was probed by Fourier-Transform Infrared spectroscopy. They found that the advantages of using helium as the main plasma species are: (1) high growth rate--the energetic helium ions break the reactive gas more efficiently than hydrogen ions; (2) homogeneous growth--heavy helium ions impinging on the surface promote the surface mobility of the reactive radicals, so that heteroepitaxy growth as clustering of Ge and Si, columnar structure are

  5. Fabrication and performance of pressure-sensing device consisting of electret film and organic semiconductor

    Science.gov (United States)

    Kodzasa, Takehito; Nobeshima, Daiki; Kuribara, Kazunori; Uemura, Sei; Yoshida, Manabu

    2017-04-01

    We propose a new concept of a pressure-sensitive device that consists of an organic electret film and an organic semiconductor. This device exhibits high sensitivity and selectivity against various types of pressure. The sensing mechanism of this device originates from a modulation of the electric conductivity of the organic semiconductor film induced by the interaction between the semiconductor film and the charged electret film placed face to face. It is expected that a complicated sensor array will be fabricated by using a roll-to-roll manufacturing system, because this device can be prepared by an all-printing and simple lamination process without high-level positional adjustment for printing processes. This also shows that this device with a simple structure is suitable for application to a highly flexible device array sheet for an Internet of Things (IoT) or wearable sensing system.

  6. Effect of layer thickness on device response of silicon heavily supersaturated with sulfur

    Energy Technology Data Exchange (ETDEWEB)

    Hutchinson, David [Department of Physics, Applied Physics, and Astronomy, Rensselaer Polytechnic Institute, Troy NY 12180 (United States); Department of Physics and Nuclear Engineering, United States Military Academy, West Point NY 10996 (United States); Mathews, Jay [US Army ARDEC – Benét Laboratories, Watervliet NY 12189 (United States); Department of Physics, University of Dayton, Dayton, OH 45469 (United States); Sullivan, Joseph T.; Buonassisi, Tonio [School of Engineering, Massachusetts Institute of Technology, Cambridge MA 02139 (United States); Akey, Austin [School of Engineering, Massachusetts Institute of Technology, Cambridge MA 02139 (United States); Harvard John A. Paulson School of Engineering and Applied Sciences, Cambridge MA 02138 (United States); Aziz, Michael J. [Harvard John A. Paulson School of Engineering and Applied Sciences, Cambridge MA 02138 (United States); Persans, Peter [Department of Physics, Applied Physics, and Astronomy, Rensselaer Polytechnic Institute, Troy NY 12180 (United States); Warrender, Jeffrey M., E-mail: jwarrend@post.harvard.edu [US Army ARDEC – Benét Laboratories, Watervliet NY 12189 (United States)

    2016-05-15

    We report on a simple experiment in which the thickness of a hyperdoped silicon layer, supersaturated with sulfur by ion implantation followed by pulsed laser melting and rapid solidification, is systematically varied at constant average sulfur concentration, by varying the implantation energy, dose, and laser fluence. Contacts are deposited and the external quantum efficiency (EQE) is measured for visible wavelengths. We posit that the sulfur layer primarily absorbs light but contributes negligible photocurrent, and we seek to support this by analyzing the EQE data for the different layer thicknesses in two interlocking ways. In the first, we use the measured concentration depth profiles to obtain the approximate layer thicknesses, and, for each wavelength, fit the EQE vs. layer thickness curve to obtain the absorption coefficient of hyperdoped silicon for that wavelength. Comparison to literature values for the hyperdoped silicon absorption coefficients [S.H. Pan et al. Applied Physics Letters 98, 121913 (2011)] shows good agreement. Next, we essentially run this process in reverse; we fit with Beer’s law the curves of EQE vs. hyperdoped silicon absorption coefficient for those wavelengths that are primarily absorbed in the hyperdoped silicon layer, and find that the layer thicknesses obtained from the fit are in good agreement with the original values obtained from the depth profiles. We conclude that the data support our interpretation of the hyperdoped silicon layer as providing negligible photocurrent at high S concentrations. This work validates the absorption data of Pan et al. [Applied Physics Letters 98, 121913 (2011)], and is consistent with reports of short mobility-lifetime products in hyperdoped layers. It suggests that for optoelectronic devices containing hyperdoped layers, the most important contribution to the above band gap photoresponse may be due to photons absorbed below the hyperdoped layer.

  7. Effect of layer thickness on device response of silicon heavily supersaturated with sulfur

    Directory of Open Access Journals (Sweden)

    David Hutchinson

    2016-05-01

    Full Text Available We report on a simple experiment in which the thickness of a hyperdoped silicon layer, supersaturated with sulfur by ion implantation followed by pulsed laser melting and rapid solidification, is systematically varied at constant average sulfur concentration, by varying the implantation energy, dose, and laser fluence. Contacts are deposited and the external quantum efficiency (EQE is measured for visible wavelengths. We posit that the sulfur layer primarily absorbs light but contributes negligible photocurrent, and we seek to support this by analyzing the EQE data for the different layer thicknesses in two interlocking ways. In the first, we use the measured concentration depth profiles to obtain the approximate layer thicknesses, and, for each wavelength, fit the EQE vs. layer thickness curve to obtain the absorption coefficient of hyperdoped silicon for that wavelength. Comparison to literature values for the hyperdoped silicon absorption coefficients [S.H. Pan et al. Applied Physics Letters 98, 121913 (2011] shows good agreement. Next, we essentially run this process in reverse; we fit with Beer’s law the curves of EQE vs. hyperdoped silicon absorption coefficient for those wavelengths that are primarily absorbed in the hyperdoped silicon layer, and find that the layer thicknesses obtained from the fit are in good agreement with the original values obtained from the depth profiles. We conclude that the data support our interpretation of the hyperdoped silicon layer as providing negligible photocurrent at high S concentrations. This work validates the absorption data of Pan et al. [Applied Physics Letters 98, 121913 (2011], and is consistent with reports of short mobility-lifetime products in hyperdoped layers. It suggests that for optoelectronic devices containing hyperdoped layers, the most important contribution to the above band gap photoresponse may be due to photons absorbed below the hyperdoped layer.

  8. Fabrication and Characterization of Silicon Micro-Funnels and Tapered Micro-Channels for Stochastic Sensing Applications

    Directory of Open Access Journals (Sweden)

    Frances S. Ligler

    2008-06-01

    Full Text Available We present a simplified, highly reproducible process to fabricate arrays of tapered silicon micro-funnels and micro-channels using a single lithographic step with a silicon oxide (SiO2 hard mask on at a wafer scale. Two approaches were used for the fabrication. The first one involves a single wet anisotropic etch step in concentrated potassium hydroxide (KOH and the second one is a combined approach comprising Deep Reactive Ion Etch (DRIE followed by wet anisotropic etching. The etching is performed through a 500 mm thick silicon wafer, and the resulting structures are characterized by sharp tapered ends with a sub-micron cross-sectional area at the tip. We discuss the influence of various parameters involved in the fabrication such as the size and thickness variability of the substrate, dry and wet anisotropic etching conditions, the etchant composition, temperature, diffusion and micro-masking effects, the quality of the hard mask in the uniformity and reproducibility of the structures, and the importance of a complete removal of debris and precipitates. The presence of apertures at the tip of the structures is corroborated through current voltage measurements and by the translocation of DNA through the apertures. The relevance of the results obtained in this report is discussed in terms of the potential use of these structures for stochastic sensing.

  9. Large scale metal-free synthesis of graphene on sapphire and transfer-free device fabrication.

    Science.gov (United States)

    Song, Hyun Jae; Son, Minhyeok; Park, Chibeom; Lim, Hyunseob; Levendorf, Mark P; Tsen, Adam W; Park, Jiwoong; Choi, Hee Cheul

    2012-05-21

    Metal catalyst-free growth of large scale single layer graphene film on a sapphire substrate by a chemical vapor deposition (CVD) process at 950 °C is demonstrated. A top-gated graphene field effect transistor (FET) device is successfully fabricated without any transfer process. The detailed growth process is investigated by the atomic force microscopy (AFM) studies.

  10. Electronic interconnects and devices with topological surface states and methods for fabricating same

    Science.gov (United States)

    Yazdani, Ali; Ong, N. Phuan; Cava, Robert J.

    2016-05-03

    An interconnect is disclosed with enhanced immunity of electrical conductivity to defects. The interconnect includes a material with charge carriers having topological surface states. Also disclosed is a method for fabricating such interconnects. Also disclosed is an integrated circuit including such interconnects. Also disclosed is a gated electronic device including a material with charge carriers having topological surface states.

  11. Surface micromachined fabrication of piezoelectric ain unimorph suspension devices for rf resonator applications

    NARCIS (Netherlands)

    Saravanan, S.; Saravanan, S.; Berenschot, Johan W.; Krijnen, Gijsbertus J.M.; Elwenspoek, Michael Curt

    We report a surface micromachining process for aluminum nitride (AlN) thin films to fabricate piezoelectric unimorph suspension devices for actuator applications. Polysilicon is used as a structural layer. Highly c-axis oriented AlN thin films 1 /spl mu/m thick are deposited by rf reactive

  12. Wafer-scale fabrication of glass-FEP-glass microfluidic devices for lipid bilayer experiments

    NARCIS (Netherlands)

    Bomer, Johan G.; Prokofyev, A.V.; van den Berg, Albert; le Gac, Severine

    2014-01-01

    We report a wafer-scale fabrication process for the production of glass-FEP-glass microdevices using UV-curable adhesive (NOA81) as gluing material, which is applied using a novel "spin & roll" approach. Devices are characterized for the uniformity of the gluing layer, presence of glue in the

  13. Fused Deposition Modeling 3D Printing for (Bio)analytical Device Fabrication : Procedures, Materials, and Applications

    NARCIS (Netherlands)

    Salentijn, Gert Ij; Oomen, Pieter E; Grajewski, Maciej; Verpoorte, Elisabeth

    2017-01-01

    In this work, the use of fused deposition modeling (FDM) in a (bio)analytical/lab-on-a-chip research laboratory is described. First, the specifications of this 3D printing method that are important for the fabrication of (micro)devices were characterized for a benchtop FDM 3D printer. These include

  14. Roll-to-plate fabrication of microfluidic devices with rheology-modified thiol-ene resins

    DEFF Research Database (Denmark)

    Senkbeil, Silja; Aho, Johanna; Yde, Leif

    2016-01-01

    of 2:1 and a maximal channel depth of 90 μm as well as the sealing of the finished devices with patterning and sealing speeds of up to 19 m min-1. By adding fumed silica nanoparticles to the uncured resins, it was possible to alter the rheological behavior of the resin system to fabricate shallow...

  15. Electronic interconnects and devices with topological surface states and methods for fabricating same

    Energy Technology Data Exchange (ETDEWEB)

    Yazdani, Ali; Ong, N. Phuan; Cava, Robert J.

    2017-04-04

    An interconnect is disclosed with enhanced immunity of electrical conductivity to defects. The interconnect includes a material with charge carriers having topological surface states. Also disclosed is a method for fabricating such interconnects. Also disclosed is an integrated circuit including such interconnects. Also disclosed is a gated electronic device including a material with charge carriers having topological surface states.

  16. Conductance switching in Ag(2)S devices fabricated by in situ sulfurization.

    Science.gov (United States)

    Morales-Masis, M; van der Molen, S J; Fu, W T; Hesselberth, M B; van Ruitenbeek, J M

    2009-03-04

    We report a simple and reproducible method to fabricate switchable Ag(2)S devices. The alpha-Ag(2)S thin films are produced by a sulfurization process after silver deposition on an Si substrate. Structure and composition of the Ag(2)S are characterized using XRD and RBS. Our samples show semiconductor behaviour at low bias voltages, whereas they exhibit reproducible bipolar resistance switching at higher bias voltages. The transition between both types of behaviour is observed by hysteresis in the I-V curves, indicating decomposition of the Ag(2)S, increasing the Ag(+) ion mobility. The as-fabricated Ag(2)S samples are a good candidate for future solid state memory devices, as they show reproducible memory resistive properties and they are fabricated by an accessible and reliable method.

  17. Conductance switching in Ag2S devices fabricated by in situ sulfurization

    International Nuclear Information System (INIS)

    Morales-Masis, M; Molen, S J van der; Hesselberth, M B; Ruitenbeek, J M van; Fu, W T

    2009-01-01

    We report a simple and reproducible method to fabricate switchable Ag 2 S devices. The α-Ag 2 S thin films are produced by a sulfurization process after silver deposition on an Si substrate. Structure and composition of the Ag 2 S are characterized using XRD and RBS. Our samples show semiconductor behaviour at low bias voltages, whereas they exhibit reproducible bipolar resistance switching at higher bias voltages. The transition between both types of behaviour is observed by hysteresis in the I-V curves, indicating decomposition of the Ag 2 S, increasing the Ag + ion mobility. The as-fabricated Ag 2 S samples are a good candidate for future solid state memory devices, as they show reproducible memory resistive properties and they are fabricated by an accessible and reliable method.

  18. Conductance switching in Ag{sub 2}S devices fabricated by in situ sulfurization

    Energy Technology Data Exchange (ETDEWEB)

    Morales-Masis, M; Molen, S J van der; Hesselberth, M B; Ruitenbeek, J M van [Kamerlingh Onnes Laboratorium, Universiteit Leiden, PO Box 9504, 2300 RA Leiden (Netherlands); Fu, W T [Leiden Institute of Chemistry, Gorlaeus Laboratorium, Universiteit Leiden, PO Box 9502, 2300 RA Leiden (Netherlands)], E-mail: ruitenbeek@physics.leidenuniv.nl

    2009-03-04

    We report a simple and reproducible method to fabricate switchable Ag{sub 2}S devices. The {alpha}-Ag{sub 2}S thin films are produced by a sulfurization process after silver deposition on an Si substrate. Structure and composition of the Ag{sub 2}S are characterized using XRD and RBS. Our samples show semiconductor behaviour at low bias voltages, whereas they exhibit reproducible bipolar resistance switching at higher bias voltages. The transition between both types of behaviour is observed by hysteresis in the I-V curves, indicating decomposition of the Ag{sub 2}S, increasing the Ag{sup +} ion mobility. The as-fabricated Ag{sub 2}S samples are a good candidate for future solid state memory devices, as they show reproducible memory resistive properties and they are fabricated by an accessible and reliable method.

  19. Fabrication of magnetic tunnel junctions connected through a continuous free layer to enable spin logic devices

    Science.gov (United States)

    Wan, Danny; Manfrini, Mauricio; Vaysset, Adrien; Souriau, Laurent; Wouters, Lennaert; Thiam, Arame; Raymenants, Eline; Sayan, Safak; Jussot, Julien; Swerts, Johan; Couet, Sebastien; Rassoul, Nouredine; Babaei Gavan, Khashayar; Paredis, Kristof; Huyghebaert, Cedric; Ercken, Monique; Wilson, Christopher J.; Mocuta, Dan; Radu, Iuliana P.

    2018-04-01

    Magnetic tunnel junctions (MTJs) interconnected via a continuous ferromagnetic free layer were fabricated for spin torque majority gate (STMG) logic. The MTJs are biased independently and show magnetoelectric response under spin transfer torque. The electrical control of these devices paves the way to future spin logic devices based on domain wall (DW) motion. In particular, it is a significant step towards the realization of a majority gate. To our knowledge, this is the first fabrication of a cross-shaped free layer shared by several perpendicular MTJs. The fabrication process can be generalized to any geometry and any number of MTJs. Thus, this framework can be applied to other spin logic concepts based on magnetic interconnect. Moreover, it allows exploration of spin dynamics for logic applications.

  20. Fabrication and Characterization of All-Polystyrene Microfluidic Devices with Integrated Electrodes and Tubing.

    Science.gov (United States)

    Pentecost, Amber M; Martin, R Scott

    2015-01-01

    A new method of fabricating all-polystyrene devices with integrated electrodes and fluidic tubing is described. As opposed to expensive polystyrene (PS) fabrication techniques that use hot embossing and bonding with a heated lab press, this approach involves solvent-based etching of channels and lamination-based bonding of a PS cover, all of which do not need to occur in a clean room. PS has been studied as an alternative microchip substrate to PDMS, as it is more hydrophilic, biologically compatible in terms of cell adhesion, and less prone to absorption of hydrophobic molecules. The etching/lamination-based method described here results in a variety of all-PS devices, with or without electrodes and tubing. To characterize the devices, micrographs of etched channels (straight and intersected channels) were taken using confocal and scanning electron microscopy. Microchip-based electrophoresis with repetitive injections of fluorescein was conducted using a three-sided PS (etched pinched, twin-tee channel) and one-sided PDMS device. Microchip-based flow injection analysis, with dopamine and NO as analytes, was used to characterize the performance of all-PS devices with embedded tubing and electrodes. Limits of detection for dopamine and NO were 130 nM and 1.8 μM, respectively. Cell immobilization studies were also conducted to assess all-PS devices for cellular analysis. This paper demonstrates that these easy to fabricate devices can be attractive alternative to other PS fabrication methods for a wide variety of analytical and cell culture applications.

  1. Study on the fabrication of silicon nanoparticles in an amorphous silicon light absorbing layer for solar cell applications

    International Nuclear Information System (INIS)

    Park, Joo Hyung; Song, Jin Soo; Lee, Jae Hee; Lee, Jeong Chul

    2012-01-01

    Hydrogenated amorphous-silicon (a-Si:H) thin-film solar cells have advantages of relatively simple technology, less material consumption, higher absorption ratio compared to crystalline silicon, and low cost due to the use of cheaper substrates rather than silicon wafers. However, together with those advantages, amorphous-silicon thin-film solar cells face several issues such as a relatively lower efficiency, a relatively wider bandgap, and the Staebler-Wronski effect (SWE) compared to other competing materials (i.e., crystalline silicon, CdTe, Cu(In x Ga (1-x) )Se 2 (CIGS), etc.). As a remedy for those drawbacks and a way to enhance the cell conversion efficiency at the same time, the employment of crystalline silicon nanoparticles (Si-NPs) in the a-Si matrix is proposed to organize the quantum-dot (QD) structure as the light-absorbing layer. This structure of the light absorbing layer consists of single-crystal Si-NPs in an a-Si:H thin-film matrix. The single-crystal Si-NPs are synthesized by using SiH 4 gas decomposition with CO 2 laser pyrolysis, and the sizes of Si-NPs are calibrated to control their bandgaps. The synthesized size-controlled Si-NPs are directly transferred to another chamber to form a QD structure by using co-deposition of the Si-NPs and the a-Si:H matrix. Transmission electron microscopy (TEM) analyses are employed to verify the sizes and the crystalline properties of the Si-NPs alone and of the Si-NPs in the a-Si:H matrix. The TEM results show successful co-deposition of size-controlled Si-NPs in the a-Si:H matrix, which is meaningful because it suggests the possibility of further enhancement of the a-Si:H solar-cell structure and of tandem structure applications by using a single element.

  2. Fabrication of planar optical waveguides by 6.0 MeV silicon ion implantation in Nd-doped phosphate glasses

    Science.gov (United States)

    Shen, Xiao-Liang; Dai, Han-Qing; Zhang, Liao-Lin; Wang, Yue; Zhu, Qi-Feng; Guo, Hai-Tao; Li, Wei-Nan; Liu, Chun-Xiao

    2018-04-01

    We report the fabrication of a planar optical waveguide by silicon ion implantation into Nd-doped phosphate glass at an energy of 6.0 MeV and a dose of 5.0 × 1014 ions/cm2. The change in the surface morphology of the glass after the implantation can be clearly observed by scanning electron microscopy. The measurement of the dark mode spectrum of the waveguide is conducted using a prism coupler at 632.8 nm. The refractive index distribution of the waveguide is reconstructed by the reflectivity calculation method. The near-field optical intensity profile of the waveguide is measured using an end-face coupling system. The waveguide with good optical properties on the glass matrix may be valuable for the application of the Nd-doped phosphate glass in integrated optical devices.

  3. Development of an In-Line Minority-Carrier Lifetime Monitoring Tool for Process Control during Fabrication of Crystalline Silicon Solar Cells: Annual Subcontract Report, June 2003 (Revised)

    Energy Technology Data Exchange (ETDEWEB)

    Sinton, R. A.

    2004-04-01

    Under the PV Manufacturing R&D subcontract''Development of an In-Line, Minority-Carrier Lifetime Monitoring Tool for Process Control during Fabrication of Crystalline Silicon Solar Cells'', Sinton Consulting developed prototypes for several new instruments for use in the manufacture of silicon solar cells. These instruments are based on two families of R&D instruments that were previously available, an illumination vs. open-circuit-voltage technique and the quasi-steady state RF photoconductance technique for measuring minority-carrier lifetime. Compared to the previous instruments, the new prototypes are about 20 times faster per measurement, and have automated data analysis that does not require user intervention even when confronted by challenging cases. For example, un-passivated multi-crystalline wafers with large variations in lifetime and trapping behavior can be measured sequentially without error. Five instruments have been prototyped in this project to date, including a block tester for evaluating cast or HEM silicon blocks, a CZ ingot tester, an FZ boule tester for use with long-lifetime silicon, and an in-line sample head for measuring wafers. The CZ ingot tester and the FZ boule tester are already being used within industry and there is interest in the other prototypes. For each instrument, substantial R&D work was required in developing the device physics and analysis as well as for the hardware. This work has been documented in a series of application notes and conference publications, and will result in significant improvements for both the R&D and the industrial types of instruments.

  4. Fabrication of contacts for silicon solar cells including printing burn through layers

    Science.gov (United States)

    Ginley, David S; Kaydanova, Tatiana; Miedaner, Alexander; Curtis, Calvin J; Van Hest, Marinus Franciscus Antonius Maria

    2014-06-24

    A method for fabricating a contact (240) for a solar cell (200). The method includes providing a solar cell substrate (210) with a surface that is covered or includes an antireflective coating (220). For example, the substrate (210) may be positioned adjacent or proximate to an outlet of an inkjet printer (712) or other deposition device. The method continues with forming a burn through layer (230) on the coating (220) by depositing a metal oxide precursor (e.g., using an inkjet or other non-contact printing method to print or apply a volume of liquid or solution containing the precursor). The method includes forming a contact layer (240) comprising silver over or on the burn through layer (230), and then annealing is performed to electrically connect the contact layer (240) to the surface of the solar cell substrate (210) through a portion of the burn through layer (230) and the coating (220).

  5. Integrated silicon optoelectronics

    CERN Document Server

    Zimmermann, Horst

    2000-01-01

    'Integrated Silicon Optoelectronics'assembles optoelectronics and microelectronics The book concentrates on silicon as the major basis of modern semiconductor devices and circuits Starting from the basics of optical emission and absorption and from the device physics of photodetectors, the aspects of the integration of photodetectors in modern bipolar, CMOS, and BiCMOS technologies are discussed Detailed descriptions of fabrication technologies and applications of optoelectronic integrated circuits are included The book, furthermore, contains a review of the state of research on eagerly expected silicon light emitters In order to cover the topic of the book comprehensively, integrated waveguides, gratings, and optoelectronic power devices are included in addition Numerous elaborate illustrations promote an easy comprehension 'Integrated Silicon Optoelectronics'will be of value to engineers, physicists, and scientists in industry and at universities The book is also recommendable for graduate students speciali...

  6. Facile fabrication of a silicon nanowire sensor by two size reduction steps for detection of alpha-fetoprotein biomarker of liver cancer

    International Nuclear Information System (INIS)

    Pham, Van Binh; Pham, Xuan ThanhTung; Phan, Thanh Nhat Khoa; Le, Thi Thanh Tuyen; Dang, Mau Chien

    2015-01-01

    We present a facile technique that only uses conventional micro-techniques and two size-reduction steps to fabricate wafer-scale silicon nanowire (SiNW) with widths of 200 nm. Initially, conventional lithography was used to pattern SiNW with 2 μm width. Then the nanowire width was decreased to 200 nm by two size-reduction steps with isotropic wet etching. The fabricated SiNW was further investigated when used with nanowire field-effect sensors. The electrical characteristics of the fabricated SiNW devices were characterized and pH sensitivity was investigated. Then a simple and effective surface modification process was carried out to modify SiNW for subsequent binding of a desired receptor. The complete SiNW-based biosensor was then used to detect alpha-fetoprotein (AFP), one of the medically approved biomarkers for liver cancer diagnosis. Electrical measurements showed that the developed SiNW biosensor could detect AFP with concentrations of about 100 ng mL"−"1. This concentration is lower than the necessary AFP concentration for liver cancer diagnosis. (paper)

  7. Facile fabrication of a silicon nanowire sensor by two size reduction steps for detection of alpha-fetoprotein biomarker of liver cancer

    Science.gov (United States)

    Binh Pham, Van; ThanhTung Pham, Xuan; Nhat Khoa Phan, Thanh; Thanh Tuyen Le, Thi; Chien Dang, Mau

    2015-12-01

    We present a facile technique that only uses conventional micro-techniques and two size-reduction steps to fabricate wafer-scale silicon nanowire (SiNW) with widths of 200 nm. Initially, conventional lithography was used to pattern SiNW with 2 μm width. Then the nanowire width was decreased to 200 nm by two size-reduction steps with isotropic wet etching. The fabricated SiNW was further investigated when used with nanowire field-effect sensors. The electrical characteristics of the fabricated SiNW devices were characterized and pH sensitivity was investigated. Then a simple and effective surface modification process was carried out to modify SiNW for subsequent binding of a desired receptor. The complete SiNW-based biosensor was then used to detect alpha-fetoprotein (AFP), one of the medically approved biomarkers for liver cancer diagnosis. Electrical measurements showed that the developed SiNW biosensor could detect AFP with concentrations of about 100 ng mL-1. This concentration is lower than the necessary AFP concentration for liver cancer diagnosis.

  8. Fabrication of tunnel junction-based molecular electronics and spintronics devices

    International Nuclear Information System (INIS)

    Tyagi, Pawan

    2012-01-01

    Tunnel junction-based molecular devices (TJMDs) are highly promising for realizing futuristic electronics and spintronics devices for advanced logic and memory operations. Under this approach, ∼2.5 nm molecular device elements bridge across the ∼2-nm thick insulator of a tunnel junction along the exposed side edge(s). This paper details the efforts and insights for producing a variety of TJMDs by resolving multiple device fabrication and characterization issues. This study specifically discusses (i) compatibility between tunnel junction test bed and molecular solutions, (ii) optimization of the exposed side edge profile and insulator thickness for enhancing the probability of molecular bridging, (iii) effect of fabrication process-induced mechanical stresses, and (iv) minimizing electrical bias-induced instability after the device fabrication. This research will benefit other researchers interested in producing TJMDs efficiently. TJMD approach offers an open platform to test virtually any combination of magnetic and nonmagnetic electrodes, and promising molecules such as single molecular magnets, porphyrin, DNA, and molecular complexes.

  9. Design and fabrication of a magnetically actuated non-invasive reusable drug delivery device.

    Science.gov (United States)

    Dsa, Joyline; Goswami, Manish; Singh, B R; Bhatt, Nidhi; Sharma, Pankaj; Chauhan, Meenakshi K

    2018-07-01

    We present a novel approach of designing and fabricating a noninvasive drug delivery device which is capable of delivering the drug to the target site in a controlled manner. The device utilizes a reservoir which can be reused once the drug has completely diffused from it. This micro-reservoir based fabricated device has been successfully tested using niosomes of insulin drug filled in, which was then sealed with a magnetic membrane of 20 µm thick and was actuated by applying magnetic field. The deflection of the membrane on application of magnetic field results in the drug release from the reservoir. The discharge of the drug solution and the release rates was controlled by external magnetic field. The simulation of the membrane deflection using COMSOL software was carried out to optimize the concentration of the ferrous nanopowder in PDMS matrix. The characterization of the devices was implemented in-vitro on water and in-vivo on Wistar rats. It was also validated using high-performance liquid chromatography (HPLC) by observing characteristic peak of insulin. The blood samples showed the retention time of 2.79 min at λ max of 280 nm which further authenticated the effectiveness of the proposed work. This noninvasive fabricated device provides reusability, precise control and can enable the patient or a physician to actively administrate the drug when required.

  10. Fabrication of hybrid molecular devices using multi-layer graphene break junctions

    Science.gov (United States)

    Island, J. O.; Holovchenko, A.; Koole, M.; Alkemade, P. F. A.; Menelaou, M.; Aliaga-Alcalde, N.; Burzurí, E.; van der Zant, H. S. J.

    2014-11-01

    We report on the fabrication of hybrid molecular devices employing multi-layer graphene (MLG) flakes which are patterned with a constriction using a helium ion microscope or an oxygen plasma etch. The patterning step allows for the localization of a few-nanometer gap, created by electroburning, that can host single molecules or molecular ensembles. By controlling the width of the sculpted constriction, we regulate the critical power at which the electroburning process begins. We estimate the flake temperature given the critical power and find that at low powers it is possible to electroburn MLG with superconducting contacts in close proximity. Finally, we demonstrate the fabrication of hybrid devices with superconducting contacts and anthracene-functionalized copper curcuminoid molecules. This method is extendable to spintronic devices with ferromagnetic contacts and a first step towards molecular integrated circuits.

  11. Design and fabrication of directional diffractive device on glass substrate for multiview holographic 3D display

    Science.gov (United States)

    Su, Yanfeng; Cai, Zhijian; Liu, Quan; Zou, Wenlong; Guo, Peiliang; Wu, Jianhong

    2018-01-01

    Multiview holographic 3D display based on the nano-grating patterned directional diffractive device can provide 3D images with high resolution and wide viewing angle, which has attracted considerable attention. However, the current directional diffractive device fabricated on the photoresist is vulnerable to damage, which will lead to the short service life of the device. In this paper, we propose a directional diffractive device on glass substrate to increase its service life. In the design process, the period and the orientation of the nano-grating at each pixel are carefully calculated accordingly by the predefined position of the viewing zone, and the groove parameters are designed by analyzing the diffraction efficiency of the nano-grating pixel on glass substrate. In the experiment, a 4-view photoresist directional diffractive device with a full coverage of pixelated nano-grating arrays is efficiently fabricated by using an ultraviolet continuously variable spatial frequency lithography system, and then the nano-grating patterns on the photoresist are transferred to the glass substrate by combining the ion beam etching and the reactive ion beam etching for controlling the groove parameters precisely. The properties of the etched glass device are measured under the illumination of a collimated laser beam with a wavelength of 532nm. The experimental results demonstrate that the light utilization efficiency is improved and optimized in comparison with the photoresist device. Furthermore, the fabricated device on glass substrate is easier to be replicated and of better durability and practicability, which shows great potential in the commercial applications of 3D display terminal.

  12. Fabrication of graphene and ZnO nanocones hybrid structure for transparent field emission device

    Energy Technology Data Exchange (ETDEWEB)

    Zulkifli, Zurita [Department of Frontier Materials, Graduate School of Engineering, Nagoya Institute of Technology (Japan); Faculty of Electrical Engineering, Universiti Teknologi Mara (Malaysia); Shinde, Sachin M.; Suguira, Takatoshi [Department of Frontier Materials, Graduate School of Engineering, Nagoya Institute of Technology (Japan); Kalita, Golap, E-mail: kalita.golap@nitech.ac.jp [Department of Frontier Materials, Graduate School of Engineering, Nagoya Institute of Technology (Japan); Center for Fostering Young and Innovative Researchers, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466-8555 (Japan); Tanemura, Masaki [Department of Frontier Materials, Graduate School of Engineering, Nagoya Institute of Technology (Japan)

    2015-11-30

    Graphical abstract: Fabrication of a transparent field emission device with chemical vapor deposited graphene and zinc oxide nanocones showing low turn-on field due to locally enhance electric field. - Highlights: • Demonstrated transparent field emission device with CVD graphene and ZnO nanocones. • Graphene film was coated on carbon doped ZnO nanocone prepared by ion irradiation. • Low turn-on field for the graphene/C:ZnO nanocones hybrid structure is achieved. • Graphene/C:ZnO heterostructure is promising for transparent field emission devices. - Abstract: Fabrication of a transparent and high performance electron emission device is the key challenge for suitable display applications. Here, we demonstrate fabrication of a transparent and efficient field emission device integrating large-area chemical vapor deposited graphene and carbon doped zinc oxide (C:ZnO) nanocones. The ZnO nanocones were obtained with ion irradiation process at room temperature, over which the graphene film was transferred without destroying nanocone tips. Significant enhancement in field emission properties were observed with the transferred graphene film on C:ZnO nanocones. The threshold field for hybrid and pristine C:ZnO nanocones film at current density of 1 μA/cm{sup 2} was obtained as 4.3 V/μm and 6.5 V/μm, respectively. The enhanced field emission properties with low turn-on field for the graphene/C:ZnO nanocones can be attributed to locally enhance electric field. Our finding shows that a graphene/C:ZnO hybridized structure is very promising to fabricate field emission devices without compromising with high transparency.

  13. A novel 2D silicon nano-mold fabrication technique for linear nanochannels over a 4 inch diameter substrate

    Science.gov (United States)

    Yin, Zhifu; Qi, Liping; Zou, Helin; Sun, Lei

    2016-01-01

    A novel low-cost 2D silicon nano-mold fabrication technique was developed based on Cu inclined-deposition and Ar+ (argon ion) etching. With this technique, sub-100 nm 2D (two dimensional) nano-channels can be etched economically over the whole area of a 4 inch n-type  silicon wafer. The fabricating process consists of only 4 steps, UV (Ultraviolet) lithography, inclined Cu deposition, Ar+ sputter etching, and photoresist & Cu removing. During this nano-mold fabrication process, we investigated the influence of the deposition angle on the width of the nano-channels and the effect of Ar+ etching time on their depth. Post-etching measurements showed the accuracy of the nanochannels over the whole area: the variation in width is 10%, in depth it is 11%. However, post-etching measurements also showed the accuracy of the nanochannels between chips: the variation in width is 2%, in depth it is 5%. With this newly developed technology, low-cost and large scale 2D nano-molds can be fabricated, which allows commercial manufacturing of nano-components over large areas. PMID:26752559

  14. Device fabrication, characterization, and thermal neutron detection response of LiZnP and LiZnAs semiconductor devices

    Energy Technology Data Exchange (ETDEWEB)

    Montag, Benjamin W., E-mail: bmontag@ksu.edu; Ugorowski, Philip B.; Nelson, Kyle A.; Edwards, Nathaniel S.; McGregor, Douglas S.

    2016-11-11

    Nowotny-Juza compounds continue to be explored as candidates for solid-state neutron detectors. Such a device would have greater efficiency, in a compact form, than present day gas-filled {sup 3}He and {sup 10}BF{sub 3} detectors. The {sup 6}Li(n,t){sup 4}He reaction yields a total Q-value of 4.78 MeV, larger than {sup 10}B, an energy easily identified above background radiations. Hence, devices fabricated from semiconductor compounds having either natural Li (nominally 7.5% {sup 6}Li) or enriched {sup 6}Li (usually 95% {sup 6}Li) as constituent atoms may provide a material for compact high efficiency neutron detectors. Starting material was synthesized by preparing equimolar portions of Li, Zn, and As sealed under vacuum (10{sup −6} Torr) in quartz ampoules lined with boron nitride and subsequently reacted in a compounding furnace [1]. The raw synthesized material indicated the presence high impurity levels (material and electrical property characterizations). A static vacuum sublimation in quartz was performed to help purify the synthesized material [2,3]. Bulk crystalline samples were grown from the purified material [4,5]. Samples were cut using a diamond wire saw, and processed into devices. Bulk resistivity was determined from I–V curve measurements, ranging from 10{sup 6}–10{sup 11} Ω cm. Devices were characterized for sensitivity to 5.48 MeV alpha particles, 337 nm laser light, and neutron sensitivity in a thermal neutron diffracted beam at the Kansas State University TRIGA Mark II nuclear reactor. Thermal neutron reaction product charge induction was measured with a LiZnP device, and the reaction product spectral response was observed. - Highlights: • Devices were fabricated from in-house synthesized and purified LiZnAs and LiZnP. • Devices ranged in bulk resistivity from 10{sup 6}–10{sup 11} Ω cm. • Devices showed sensitivity to 5.48 MeV alpha particles. • Devices were characterized with a 337 nm laser light. • Devices were evaluated

  15. PopupCAD: a tool for automated design, fabrication, and analysis of laminate devices

    Science.gov (United States)

    Aukes, Daniel M.; Wood, Robert J.

    2015-05-01

    Recent advances in laminate manufacturing techniques have driven the development of new classes of millimeter-scale sensorized medical devices, robots capable of terrestrial locomotion and sustained flight, and new techniques for sensing and actuation. Recently, the analysis of laminate micro-devices has focused more manufacturability concerns and not on mechanics. Considering the nature of such devices, we draw from existing research in composites, origami kinematics, and finite element methods in order to identify issues related to sequential assembly and self-folding prior to fabrication as well as the stiffness of composite folded systems during operation. These techniques can be useful for understanding how such devices will bend and flex under normal operating conditions, and when added to new design tools like popupCAD, will give designers another means to develop better devices throughout the design process.

  16. Silicone metalization

    Energy Technology Data Exchange (ETDEWEB)

    Maghribi, Mariam N. (Livermore, CA); Krulevitch, Peter (Pleasanton, CA); Hamilton, Julie (Tracy, CA)

    2008-12-09

    A system for providing metal features on silicone comprising providing a silicone layer on a matrix and providing a metal layer on the silicone layer. An electronic apparatus can be produced by the system. The electronic apparatus comprises a silicone body and metal features on the silicone body that provide an electronic device.

  17. Microstructure and properties of sintered silicon carbides fabricated by different methods

    International Nuclear Information System (INIS)

    Maruyama, Tadashi; Kitamura, Hideya; Iseki, Takayoshi

    1986-01-01

    Studies were made of effects of fabrication methods on the properties and microstructure of sintered silicon carbides. The specimens used in this investigation were three kinds of commercially available SiC bodies which were fabricated by reaction bonding, pressureless sintering and hot-pressing. The hot-pressed SiC contained a small amount of BeO. Measurements were carried out on density, the polytype by X-ray diffraction method and 4-point bend strength. Microstructural observation was also carried out using an optical microscope, a scanning electron microscope (SEM) and a transmission electron microscope (TEM). The results of density measurement showed that the open porosities of three specimens were negligibly small and that the density of the hot pressed SiC had nearly the theoretical density. The measurement of 4-point bend strength indicated that the reaction bonded SiC had the highest value and the hot-pressed SiC the lowest. The analysis of the polytype indicated that all the specimens consisted mainly of α-SiC of 6 H type. In the reaction bonded SiC, about 11 % of 3 C type (β-SiC) and 9 % of free Si were recognized. The average grain diameter and fracture mode of each specimen were determined from observation with an optical microscope and SEM. In the hot-pressed SiC, the fracture occurred mainly at grain boundaries, whereas it occurred mostly in grains in the reaction bonded and pressureless sintered SiC. A lot of stacking faults were observed in all the specimens with a TEM. In addition, small closed pores were often recognized in the pressureless sintered SiC. In the hot-pressed SiC, a contrast originated from strain field within grains was observed, and dislocations near grain boundaries were a characteristic feature of this material. Small short partial dislocations accompanied by stacking fault were often observed in the reaction bonded SiC. (author)

  18. Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Zorzi, N. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy)]. E-mail: zorzi@itc.it; Bisogni, M.G. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Boscardin, M. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Dalla Betta, G.-F. [Dipartimento di Informatica e Telecomunicazioni, Universita di Trento, Via Sommarive 14, I-38050 Povo (Trento) (Italy); Gregori, P. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Novelli, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Piemonte, C. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Quattrocchi, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Ronchin, S. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Rosso, V. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy)

    2005-07-01

    Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 {mu}m thick silicon wafers adopting a double side n{sup +}-on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n{sup +}-pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances.

  19. Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

    International Nuclear Information System (INIS)

    Zorzi, N.; Bisogni, M.G.; Boscardin, M.; Dalla Betta, G.-F.; Gregori, P.; Novelli, M.; Piemonte, C.; Quattrocchi, M.; Ronchin, S.; Rosso, V.

    2005-01-01

    Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 μm thick silicon wafers adopting a double side n + -on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n + -pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances

  20. Direct spraying method for fabrication of paper-based microfluidic devices

    International Nuclear Information System (INIS)

    Liu, Ning; An, Hong-Jie; Lew, Wen Siang; Xu, Jing; Phan, Dinh-Tuan; Hashimoto, Michinao

    2017-01-01

    Direct spraying of hydrophobic materials is an affordable, easy-to-use and equipment-free method for fabrication of flexible microsensors, albeit not yet widely adopted. To explore its application potential, in this paper, we propose and demonstrate two novel hybrid methods to fabricate paper-based components. Firstly, through combing direct spraying with Parafilm embedding, a leak-free paper-based sample preconcentrator for fluorescence sensing was fabricated. The leak-free device worked on the principle of ion concentration polarization (ICP) effect, and achieved enhancement of fluorescent tracer by 220 folds on a paper substrate. Secondly, by using the sprayed hydrophobic patterns, paper-based microsized supercapacitors (mSCs) were fabricated. Vacuum filtration was used to deposit multi-wall carbon nanotubes (MWCNT)-dispersed solution on a porous substrate to form electrodes. A volumetric capacitance of 42.5 mF cm −3 at a current density of 2 mA cm −3 was obtained on the paper-based mSC. Our demonstrations have shown the versatility of direct spraying for the fabrication of integrative paper-based microfluidic devices. (paper)

  1. Fabrication of 3D Microfluidic Devices by Thermal Bonding of Thin Poly(methyl methacrylate) Films

    KAUST Repository

    Perez, Paul

    2012-07-01

    The use of thin-film techniques for the fabrication of microfluidic devices has gained attention over the last decade, particularly for three-dimensional channel structures. The reasons for this include effective use of chip volume, mechanical flexibility, dead volume reduction, enhanced design capabilities, integration of passive elements, and scalability. Several fabrication techniques have been adapted for use on thin films: laser ablation and hot embossing are popular for channel fabrication, and lamination is widely used for channel enclosure. However, none of the previous studies have been able to achieve a strong bond that is reliable under moderate positive pressures. The present work aims to develop a thin-film process that provides design versatility, speed, channel profile homogeneity, and the reliability that others fail to achieve. The three building blocks of the proposed baseline were fifty-micron poly(methyl methacrylate) thin films as substrates, channel patterning by laser ablation, and device assembly by thermal-fusion bonding. Channel fabrication was characterized and tuned to produce the desired dimensions and surface roughness. Thermal bonding was performed using an adapted mechanical testing device and optimized to produce the maximum bonding strength without significant channel deformation. Bonding multilayered devices, incorporating conduction lines, and integrating various types of membranes as passive elements demonstrated the versatility of the process. Finally, this baseline was used to fabricate a droplet generator and a DNA detection chip based on micro-bead agglomeration. It was found that a combination of low laser power and scanning speed produced channel surfaces with better uniformity than those obtained with higher values. In addition, the implemented bonding technique provided the process with the most reliable bond strength reported, so far, for thin-film microfluidics. Overall, the present work proved to be versatile

  2. Design, fabrication, and characterization of electroless Ni–P alloy films for micro heating devices

    International Nuclear Information System (INIS)

    Liu, Bernard Haochih; Liao, Fang-Yi; Chen, Jian-Hong

    2013-01-01

    In this work electroless nickel–phosphorous coatings were used as the micro heaters for scanning thermal microscopy. The deposition of Ni–P alloys not only simplified the microelectromechanical system fabrication steps but also provided flexibility in the tuning of the resistance of the heating elements. Ni–P films were plated on patterned silicon substrates and silicon with a silicon nitride film. The pre-deposition reactive ion etch (RIE) treatment caused a change in surface roughness that enhanced the adhesion of Ni–P coatings. Optimization of RIE parameters and pH values could achieve selective deposition of Ni–P, thus helped the lift-off of a serpentine circuit pattern. The chemical composition and microstructure of Ni–P films affect the electrical properties of micro heaters. Energy-dispersive X-ray spectroscopy identified the Ni–P composition and confirmed its insignificant level of oxidation. The high-temperature X-ray diffraction indicated that the as-deposited film was crystalline Ni, which later transformed into Ni 3 P at higher temperature. The resistivity of Ni–P films was tailored between 10 −5 and 10 −7 Ω m via a post-deposition annealing, which also obtained a stable temperature coefficient of resistance. Consequently, the performance of micro heaters could be designed with a high degree of flexibility. - Highlights: • We developed a process to fabricate micro heater by Ni–P electroless plating. • Reactive ion etch caused oscillating surface roughness and affected Ni–P adhesion. • Ni 3 P phase precipitates during annealing and reduces resistivity of Ni–P alloys. • Resistivity of Ni–P is tunable from 10 −5 to 10 −7 Ω m by plating and annealing

  3. Design, fabrication, and characterization of electroless Ni–P alloy films for micro heating devices

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Bernard Haochih, E-mail: hcliu@mail.ncku.edu.tw [Department of Materials Science and Engineering, National Cheng Kung University, Taiwan (China); Promotion Center for Global Materials Research, National Cheng Kung University, Taiwan (China); Research Center for Energy Technology and Strategy, National Cheng Kung University, Taiwan (China); Liao, Fang-Yi; Chen, Jian-Hong [Department of Materials Science and Engineering, National Cheng Kung University, Taiwan (China)

    2013-06-30

    In this work electroless nickel–phosphorous coatings were used as the micro heaters for scanning thermal microscopy. The deposition of Ni–P alloys not only simplified the microelectromechanical system fabrication steps but also provided flexibility in the tuning of the resistance of the heating elements. Ni–P films were plated on patterned silicon substrates and silicon with a silicon nitride film. The pre-deposition reactive ion etch (RIE) treatment caused a change in surface roughness that enhanced the adhesion of Ni–P coatings. Optimization of RIE parameters and pH values could achieve selective deposition of Ni–P, thus helped the lift-off of a serpentine circuit pattern. The chemical composition and microstructure of Ni–P films affect the electrical properties of micro heaters. Energy-dispersive X-ray spectroscopy identified the Ni–P composition and confirmed its insignificant level of oxidation. The high-temperature X-ray diffraction indicated that the as-deposited film was crystalline Ni, which later transformed into Ni{sub 3}P at higher temperature. The resistivity of Ni–P films was tailored between 10{sup −5} and 10{sup −7} Ω m via a post-deposition annealing, which also obtained a stable temperature coefficient of resistance. Consequently, the performance of micro heaters could be designed with a high degree of flexibility. - Highlights: • We developed a process to fabricate micro heater by Ni–P electroless plating. • Reactive ion etch caused oscillating surface roughness and affected Ni–P adhesion. • Ni{sub 3}P phase precipitates during annealing and reduces resistivity of Ni–P alloys. • Resistivity of Ni–P is tunable from 10{sup −5} to 10{sup −7} Ω m by plating and annealing.

  4. Fabrication and Characterisation of Silicon Waveguides for High-Speed Optical Signal Processing

    DEFF Research Database (Denmark)

    Jensen, Asger Sellerup

    This Ph.D. thesis treats various aspects of silicon photonics. From the limitations of silicon as a linear and nonlinear waveguide medium to its synergy with other waveguide materials. Various methods for reducing sidewall roughness and line edge roughness of silicon waveguides are attempted...... was too high for any practical applications. It is speculated that the attempt at creating a material with low density of dangling bonds was unsuccessful. Nevertheless, linear losses of 2.4dB/cm at 1550nm wavelength in the silicon waveguides remained sufficiently low that high speed nonlinear optical...

  5. Nonlinear silicon photonics

    Science.gov (United States)

    Borghi, M.; Castellan, C.; Signorini, S.; Trenti, A.; Pavesi, L.

    2017-09-01

    Silicon photonics is a technology based on fabricating integrated optical circuits by using the same paradigms as the dominant electronics industry. After twenty years of fervid development, silicon photonics is entering the market with low cost, high performance and mass-manufacturable optical devices. Until now, most silicon photonic devices have been based on linear optical effects, despite the many phenomenologies associated with nonlinear optics in both bulk materials and integrated waveguides. Silicon and silicon-based materials have strong optical nonlinearities which are enhanced in integrated devices by the small cross-section of the high-index contrast silicon waveguides or photonic crystals. Here the photons are made to strongly interact with the medium where they propagate. This is the central argument of nonlinear silicon photonics. It is the aim of this review to describe the state-of-the-art in the field. Starting from the basic nonlinearities in a silicon waveguide or in optical resonator geometries, many phenomena and applications are described—including frequency generation, frequency conversion, frequency-comb generation, supercontinuum generation, soliton formation, temporal imaging and time lensing, Raman lasing, and comb spectroscopy. Emerging quantum photonics applications, such as entangled photon sources, heralded single-photon sources and integrated quantum photonic circuits are also addressed at the end of this review.

  6. The fabrication of quantum wires in silicon utilising the characteristics of solid phase epitaxial regrowth of crystalline silicon

    International Nuclear Information System (INIS)

    Liu, A.C.Y.; McCallum, J.C.

    1998-01-01

    The process of solid phase epitaxy (SPE) in semiconductor materials is one which has been intensively researched due to possible applications in the semiconductor industry. SPE is a solid phase transformation, in which an amorphous layer can be recrystallized either through heating or a combination of heating and ion bombardment. The transformation is believed to occur exclusively at the interface between the amorphous and crystalline layers, with individual atoms from the amorphous phase being incorporated into the crystalline phase by some point defect mechanism. The process has been observed to follow an Arrhenius temperature dependence. A wafer silicon was subjected to a multi-energy silicon implant through a fine nickel grid to amorphise region to a depth of 5μm creating an array of amorphous wells. Metal impurity atoms were then implanted in this region at energy of 500 keV. Samples were examined using an optical microscope and the Alphastep profiler at RMIT. It was confirmed that burgeoning wells were about 2 μm wide and rose about 0.01 μm above the silicon substrate

  7. Tin (Sn) for enhancing performance in silicon CMOS

    KAUST Repository

    Hussain, Aftab M.; Fahad, Hossain M.; Singh, Nirpendra; Sevilla, Galo T.; Schwingenschlö gl, Udo; Hussain, Muhammad Mustafa

    2013-01-01

    We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

  8. Tin (Sn) for enhancing performance in silicon CMOS

    KAUST Repository

    Hussain, Aftab M.

    2013-10-01

    We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

  9. High aspect ratio silicon nanomoulds for UV embossing fabricated by directional thermal oxidation using an oxidation mask

    International Nuclear Information System (INIS)

    Chen, L Q; Chan-Park, Mary B; Yan, Y H; Zhang Qing; Li, C M; Zhang Jun

    2007-01-01

    Nanomoulding is simple and economical but moulds with nanoscale features are usually prohibitively expensive to fabricate because nanolithographic techniques are mostly serial and time-consuming for large-area patterning. This paper describes a novel, simple and inexpensive parallel technique for fabricating nanoscale pattern moulds by silicon etching followed by thermal oxidation. The mask pattern can be made by direct photolithography or photolithography followed by metal overetching for submicron- and nanoscale features, respectively. To successfully make nanoscale channels having a post-oxidation cross-sectional shape similar to that of the original channel, an oxidation mask to promote unidirectional (specifically horizontal) oxide growth is found to be essential. A silicon nitride or metal mask layer prevents vertical oxidation of the Si directly beneath it. Without this mask, rectangular channels become smaller but are V-shaped after oxidation. By controlling the silicon etch depth and oxidation time, moulds with high aspect ratio channels having widths ranging from 500 to 50 nm and smaller can be obtained. The nanomould, when passivated with a Teflon-like layer, can be used for first-generation replication using ultraviolet (UV) nanoembossing and second-generation replication in other materials, such as polydimethylsiloxane (PDMS). The PDMS stamp, which was subsequently coated with Au, was used for transfer printing of Au electrodes with a 600 nm gap which will find applications in plastics nanoelectronics

  10. Silicon microfluidic flow focusing devices for the production of size-controlled PLGA based drug loaded microparticles.

    Science.gov (United States)

    Keohane, Kieran; Brennan, Des; Galvin, Paul; Griffin, Brendan T

    2014-06-05

    The increasing realisation of the impact of size and surface properties on the bio-distribution of drug loaded colloidal particles has driven the application of micro fabrication technologies for the precise engineering of drug loaded microparticles. This paper demonstrates an alternative approach for producing size controlled drug loaded PLGA based microparticles using silicon Microfluidic Flow Focusing Devices (MFFDs). Based on the precise geometry and dimensions of the flow focusing channel, microparticle size was successfully optimised by modifying the polymer type, disperse phase (Qd) flow rate, and continuous phase (Qc) flow rate. The microparticles produced ranged in sizes from 5 to 50 μm and were highly monodisperse (coefficient of variation <5%). A comparison of Ciclosporin (CsA) loaded PLGA microparticles produced by MFFDs vs conventional production techniques was also performed. MFFDs produced microparticles with a narrower size distribution profile, relative to the conventional approaches. In-vitro release kinetics of CsA was found to be influenced by the production technique, with the MFFD approach demonstrating the slowest rate of release over 7 days (4.99 ± 0.26%). Finally, MFFDs were utilised to produce pegylated microparticles using the block co-polymer, PEG-PLGA. In contrast to the smooth microparticles produced using PLGA, PEG-PLGA microparticles displayed a highly porous surface morphology and rapid CsA release, with 85 ± 6.68% CsA released after 24h. The findings from this study demonstrate the utility of silicon MFFDs for the precise control of size and surface morphology of PLGA based microparticles with potential drug delivery applications. Copyright © 2014 Elsevier B.V. All rights reserved.

  11. Fabrication of Polymerase Chain Reaction Plastic Lab-on-a-Chip Device for Rapid Molecular Diagnoses

    Directory of Open Access Journals (Sweden)

    Kieu The Loan Trinh

    2016-05-01

    Full Text Available Purpose: We aim to fabricate a thermoplastic poly(methylmethacrylate (PMMA Lab-on-a-Chip device to perform continuous- flow polymerase chain reactions (PCRs for rapid molecular detection of foodborne pathogen bacteria. Methods: A miniaturized plastic device was fabricated by utilizing PMMA substrates mediated by poly(dimethylsiloxane interfacial coating, enabling bonding under mild conditions, and thus avoiding the deformation or collapse of microchannels. Surface characterizations were carried out and bond strength was measured. The feasibility of the Lab-on-a-Chip device for performing on-chip PCR utilizing a lab-made, portable dual heater was evaluated. The results were compared with those obtained using a commercially available thermal cycler. Results: A PMMA Lab-on-a-Chip device was designed and fabricated for conducting PCR using foodborne pathogens as sample targets. A robust bond was established between the PMMA substrates, which is essential for performing miniaturized PCR on plastic. The feasibility of on-chip PCR was evaluated using Escherichia coli O157:H7 and Cronobacter condimenti, two worldwide foodborne pathogens, and the target amplicons were successfully amplified within 25 minutes. Conclusions: In this study, we present a novel design of a low-cost and high-throughput thermoplastic PMMA Lab-on-a-Chip device for conducting microscale PCR, and we enable rapid molecular diagnoses of two important foodborne pathogens in minute resolution using this device. In this regard, the introduced highly portable system design has the potential to enable PCR investigations of many diseases quickly and accurately.

  12. Electrochemical fabrication and electronic behavior of polypyrrole nano-fiber array devices

    International Nuclear Information System (INIS)

    Liu Ling; Zhao Yaomin; Jia Nengqin; Zhou Qin; Zhao Chongjun; Yan Manming; Jiang Zhiyu

    2006-01-01

    Electrochemically active Polypyrrole (PPy) nano-fiber array device was fabricated via electrochemical deposition method using aluminum anodic oxide (AAO) membrane as template. After alkaline treatment electrochemically active PPy nano-fiber lost electrochemical activity, and became electrochemically inactive PPy. The electronic properties of PPy nano-fiber array devices were measured by means of a simple method. It was found that for an indium-tin oxide/electrochemically inactive PPy nano-fiber device, the conductivity of nano-fiber increased with the increase of voltage applied on the two terminals of nano-fiber. The electrochemical inactive PPy nano-fiber might be used as a nano-fiber switching diode. Both Au/electrochemically active PPy and Au/electrochemically inactive PPy nano-fiber devices demonstrate rectifying behavior, and might have been used for further application as nano-rectifiers

  13. Electrochemical fabrication and electronic behavior of polypyrrole nano-fiber array devices

    Energy Technology Data Exchange (ETDEWEB)

    Ling, Liu [Department of Chemistry, and Shanghai Key Laboratory of Molecular Catalysis and Innovative Materials, Fudan University, Shanghai 200433 (China); Yaomin, Zhao [Department of Chemistry, and Shanghai Key Laboratory of Molecular Catalysis and Innovative Materials, Fudan University, Shanghai 200433 (China); Nengqin, Jia [Department of Chemistry, and Shanghai Key Laboratory of Molecular Catalysis and Innovative Materials, Fudan University, Shanghai 200433 (China); Qin, Zhou [Department of Chemistry, and Shanghai Key Laboratory of Molecular Catalysis and Innovative Materials, Fudan University, Shanghai 200433 (China); Chongjun, Zhao [Photon Craft Project, Shanghai Institute of Optics and Fine Mechanics, Chinese Academy of Sciences and Japan Science and Technology Agency, Shanghai 201800 (China); Manming, Yan [Department of Chemistry, and Shanghai Key Laboratory of Molecular Catalysis and Innovative Materials, Fudan University, Shanghai 200433 (China); Zhiyu, Jiang [Department of Chemistry, and Shanghai Key Laboratory of Molecular Catalysis and Innovative Materials, Fudan University, Shanghai 200433 (China)

    2006-05-01

    Electrochemically active Polypyrrole (PPy) nano-fiber array device was fabricated via electrochemical deposition method using aluminum anodic oxide (AAO) membrane as template. After alkaline treatment electrochemically active PPy nano-fiber lost electrochemical activity, and became electrochemically inactive PPy. The electronic properties of PPy nano-fiber array devices were measured by means of a simple method. It was found that for an indium-tin oxide/electrochemically inactive PPy nano-fiber device, the conductivity of nano-fiber increased with the increase of voltage applied on the two terminals of nano-fiber. The electrochemical inactive PPy nano-fiber might be used as a nano-fiber switching diode. Both Au/electrochemically active PPy and Au/electrochemically inactive PPy nano-fiber devices demonstrate rectifying behavior, and might have been used for further application as nano-rectifiers.

  14. Research on ion implantation in MEMS device fabrication by theory, simulation and experiments

    Science.gov (United States)

    Bai, Minyu; Zhao, Yulong; Jiao, Binbin; Zhu, Lingjian; Zhang, Guodong; Wang, Lei

    2018-06-01

    Ion implantation is widely utilized in microelectromechanical systems (MEMS), applied for embedded lead, resistors, conductivity modifications and so forth. In order to achieve an expected device, the principle of ion implantation must be carefully examined. The elementary theory of ion implantation including implantation mechanism, projectile range and implantation-caused damage in the target were studied, which can be regarded as the guidance of ion implantation in MEMS device design and fabrication. Critical factors including implantations dose, energy and annealing conditions are examined by simulations and experiments. The implantation dose mainly determines the dopant concentration in the target substrate. The implantation energy is the key factor of the depth of the dopant elements. The annealing time mainly affects the repair degree of lattice damage and thus the activated elements’ ratio. These factors all together contribute to ions’ behavior in the substrates and characters of the devices. The results can be referred to in the MEMS design, especially piezoresistive devices.

  15. A simple method of fabricating mask-free microfluidic devices for biological analysis.

    KAUST Repository

    Yi, Xin

    2010-09-07

    We report a simple, low-cost, rapid, and mask-free method to fabricate two-dimensional (2D) and three-dimensional (3D) microfluidic chip for biological analysis researches. In this fabrication process, a laser system is used to cut through paper to form intricate patterns and differently configured channels for specific purposes. Bonded with cyanoacrylate-based resin, the prepared paper sheet is sandwiched between glass slides (hydrophilic) or polymer-based plates (hydrophobic) to obtain a multilayer structure. In order to examine the chip\\'s biocompatibility and applicability, protein concentration was measured while DNA capillary electrophoresis was carried out, and both of them show positive results. With the utilization of direct laser cutting and one-step gas-sacrificing techniques, the whole fabrication processes for complicated 2D and 3D microfluidic devices are shorten into several minutes which make it a good alternative of poly(dimethylsiloxane) microfluidic chips used in biological analysis researches.

  16. Fabrication of dissimilar metal electrodes with nanometer interelectrode distance for molecular electronic device characterization

    International Nuclear Information System (INIS)

    Guillorn, Michael A.; Carr, Dustin W.; Tiberio, Richard C.; Greenbaum, Elias; Simpson, Michael L.

    2000-01-01

    We report a versatile process for the fabrication of dissimilar metal electrodes with a minimum interelectrode distance of less than 6 nm using electron beam lithography and liftoff pattern transfer. This technique provides a controllable and reproducible method for creating structures suited for the electrical characterization of asymmetric molecules for molecular electronics applications. Electrode structures employing pairs of Au electrodes and non-Au electrodes were fabricated in three different patterns. Parallel electrode structures 300 μm long with interelectrode distances as low as 10 nm, 75 nm wide electrode pairs with interelectrode distances less than 6 nm, and a multiterminal electrode structure with reproducible interelectrode distances of 8 nm were realized using this technique. The processing issues associated with the fabrication of these structures are discussed along with the intended application of these devices. (c) 2000 American Vacuum Society

  17. A miniature rigid/flex salinity measurement device fabricated using printed circuit processing techniques

    International Nuclear Information System (INIS)

    Broadbent, H A; Ketterl, T P; Reid, C S

    2010-01-01

    The design, fabrication and initial performance of a single substrate, miniature, low-cost conductivity, temperature, depth (CTD) sensor board with interconnects are presented. In combination these sensors measure ocean salinity. The miniature CTD device board was designed and fabricated as the main component of a 50 mm × 25 mm × 25 mm animal-attached biologger. The board was fabricated using printed circuit processes and consists of two distinct regions on a continuous single liquid crystal polymer substrate: an 18 mm × 28 mm rigid multi-metal sensor section and a 72 mm long flexible interconnect section. The 95% confidence intervals for the conductivity, temperature and pressure sensors were demonstrated to be ±0.083 mS cm −1 , 0.01 °C, and ±0.135 dbar, respectively.

  18. White-light emission from porous-silicon-aluminium Schottky junctions

    International Nuclear Information System (INIS)

    Masini, G.; La Monica, S.; Maiello, G.

    1996-01-01

    Porous-silicon-based white-light-emitting devices are presented. The fabrication process on different substrates is described. The peculiarities of technological steps for device fabrication (porous-silicon formation and aluminium treatment) are underlined. Doping profile of the porous layer, current-voltage characteristics, time response, lifetime tests and electroluminescence emission spectrum of the device are presented. A model for electrical behaviour of Al/porous silicon Schottky junction is presented. Electroluminescence spectrum of the presented devices showed strong similarities with white emission from crystalline silicon junctions in the breakdown region

  19. Fabrication of digital microfluidic devices on flexible paper-based and rigid substrates via screen printing

    Science.gov (United States)

    Yafia, Mohamed; Shukla, Saurabh; Najjaran, Homayoun

    2015-05-01

    In this work, a new fabrication method is presented for digital microfluidic (DMF) devices in which the electrodes are generated using the screen printing technique. This method is applicable to both rigid and flexible substrates. The proposed screen printing approach, as a batch printing technique, is advantageous to the widely reported DMF fabrication methods in terms of fabrication time, cost and capability of mass production. Screen printing provides an effective means for printing different types of conductive materials on a variety of substrates. Specifically, screen printing of conductive silver and carbon based inks is performed on paper, glass and wax paper. As a result, the fabricated DMF devices are characterized by being flexible, disposable and incinerable. Hence, the main advantage of screen printing carbon based inks on paper substrates is more pronounced for point-of-care applications that require a large number of low cost DMF chips, and laboratory setups that lack sophisticated microfabrication facilities. The resolution of the printed DMF electrodes generated by this technique is examined for proof of concept using manual screen printing, but higher resolution screens and automated machines are available off-the-shelf, if needed. Another contribution of this research is the improved actuation techniques that facilitate droplet transport in electrode configurations with relatively large electrode spacing to alleviate the disadvantage of lower resolution screens. Thus, we were able to reduce the cost of fabrication significantly without compromising the DMF performance. The paper-based devices have already shown to be effective in continuous microfluidics domain, so the investigation of their applicability in DMF systems is worthwhile. With this in mind, successful integration of a paper-based microchannel with paper-based digital microfluidic chip is demonstrated in this work.

  20. Fabrication of digital microfluidic devices on flexible paper-based and rigid substrates via screen printing

    International Nuclear Information System (INIS)

    Yafia, Mohamed; Shukla, Saurabh; Najjaran, Homayoun

    2015-01-01

    In this work, a new fabrication method is presented for digital microfluidic (DMF) devices in which the electrodes are generated using the screen printing technique. This method is applicable to both rigid and flexible substrates. The proposed screen printing approach, as a batch printing technique, is advantageous to the widely reported DMF fabrication methods in terms of fabrication time, cost and capability of mass production. Screen printing provides an effective means for printing different types of conductive materials on a variety of substrates. Specifically, screen printing of conductive silver and carbon based inks is performed on paper, glass and wax paper. As a result, the fabricated DMF devices are characterized by being flexible, disposable and incinerable. Hence, the main advantage of screen printing carbon based inks on paper substrates is more pronounced for point-of-care applications that require a large number of low cost DMF chips, and laboratory setups that lack sophisticated microfabrication facilities. The resolution of the printed DMF electrodes generated by this technique is examined for proof of concept using manual screen printing, but higher resolution screens and automated machines are available off-the-shelf, if needed. Another contribution of this research is the improved actuation techniques that facilitate droplet transport in electrode configurations with relatively large electrode spacing to alleviate the disadvantage of lower resolution screens. Thus, we were able to reduce the cost of fabrication significantly without compromising the DMF performance. The paper-based devices have already shown to be effective in continuous microfluidics domain, so the investigation of their applicability in DMF systems is worthwhile. With this in mind, successful integration of a paper-based microchannel with paper-based digital microfluidic chip is demonstrated in this work. (note)