Reversible logic gates on Physarum Polycephalum
Energy Technology Data Exchange (ETDEWEB)
Schumann, Andrew [University of Information Technology and Management, Sucharskiego 2, Rzeszow, 35-225 (Poland)
2015-03-10
In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum.
Reversible logic gate using adiabatic superconducting devices
National Research Council Canada - National Science Library
Takeuchi, N; Yamanashi, Y; Yoshikawa, N
2014-01-01
.... However, until now, no practical reversible logic gates have been demonstrated. One of the problems is that reversible logic gates must be built by using extremely energy-efficient logic devices...
Reversible logic gate using adiabatic superconducting devices
Takeuchi, N.; Yamanashi, Y.; Yoshikawa, N.
2014-09-01
Reversible computing has been studied since Rolf Landauer advanced the argument that has come to be known as Landauer's principle. This principle states that there is no minimum energy dissipation for logic operations in reversible computing, because it is not accompanied by reductions in information entropy. However, until now, no practical reversible logic gates have been demonstrated. One of the problems is that reversible logic gates must be built by using extremely energy-efficient logic devices. Another difficulty is that reversible logic gates must be both logically and physically reversible. Here we propose the first practical reversible logic gate using adiabatic superconducting devices and experimentally demonstrate the logical and physical reversibility of the gate. Additionally, we estimate the energy dissipation of the gate, and discuss the minimum energy dissipation required for reversible logic operations. It is expected that the results of this study will enable reversible computing to move from the theoretical stage into practical usage.
AN IMPROVED DESIGN OF A MULTIPLIER USING REVERSIBLE LOGIC GATES
Directory of Open Access Journals (Sweden)
H.R.BHAGYALAKSHMI
2010-08-01
Full Text Available Reversible logic gates are very much in demand for the future computing technologies as they are known to produce zero power dissipation under ideal conditions. This paper proposes an improved design of a multiplier using reversible logic gates. Multipliers are very essential for the construction of various computational units of a quantum computer. The quantum cost of a reversible logic circuit can be minimized by reducing the number of reversible logic gates. For this two 4*4 reversible logic gates called a DPG gate and a BVF gate are used.
NOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATES
National Research Council Canada - National Science Library
M. Saravanan; K. Suresh Manic
2014-01-01
.... In this study a reversible logic gate based design of variable precision multiplier is proposed which have the greater efficiency in power consumption and speed since the partial products received...
NOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATES
M. Saravanan; K. Suresh Manic
2014-01-01
Multipliers play a vital role in digital systems especially in digital processors. There are many algorithms and designs were proposed in the earlier works, but still there is a need and a greater interest in designing a less complex, low power consuming, fastest multipliers. Reversible logic design became the promising technologies gaining greater interest due to less dissipation of heat and low power consumption. In this study a reversible logic gate based design of variable precision multi...
Optimized reversible BCD adder using new reversible logic gates
Bhagyalakshmi, H R
2010-01-01
Reversible logic has received great attention in the recent years due to their ability to reduce the power dissipation which is the main requirement in low power digital design. It has wide applications advanced computing, low power CMOS design, Optical information processing, DNA computing, bio information, quantum computation and nanotechnology. This paper presents an optimized reversible BCD adder using a new reversible gate. A comparative result is presented which shows that the proposed design is more optimized in terms of number of gates, number of garbage outputs and quantum cost than the existing designs.
Basic Reversible Logic Gates and It’s Qca Implementation
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Papiya Biswas,
2014-06-01
Full Text Available Reversible logic has various applications in various field like in Nanotechnology, quantum computing, Low power CMOS, Optical computing and DNA computing, etc. Quantum computation is One of the most important applications of the reversible logic.Basically reversible circuits do not lose information & reversible computation is performed only when system comprises of reversible gates. The reversible logic is design,main purposes are - decrease quantum cost, depth of the circuits & the number of garbage output. This paper provides the basic‘s of reversible logic gates & its implementation in qca.
Design of Asynchronous Sequential Circuits using Reversible Logic Gates
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Bahram Dehghan
2012-09-01
Full Text Available In recent literature, Reversible logic has become one of the promising arena in low power dissipating circuit design in the past few years and has found its applications in low power CMOS circuits ,optical information processing and nanotechnology. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. This paper presents asynchronoussequential circuits and circuits without hazard effect using reversible logic gates. I illustrate that we can produce AND, OR, NAND, NOR, EXOR and EXNOR outputs in one design using reversible logic gates. Also, I will evaluate the proposed circuits. The results show that reversible logic can be used to design these circuits. In this paper, the number of gates and garbage outputs is considered.
All-optical reversible logic gates with microresonators
Sethi, Purnima; Roy, Sukhdev; Topolancik, Juraj; Vollmer, Frank
2011-08-01
We present designs of all-optical reversible logic gates, namely, Feynman, Toffoli, Peres and Feynman Double gates, based on switching of a near-IR (1310/1550 nm) signal by low-power control signals at 532 nm and 405 nm, in optically controlled bacteriorhodopsin protein-coated silica microcavities coupled between two tapered single-mode fibers.
Implementation of Effective Code Converters using Reversible Logic Gates
Directory of Open Access Journals (Sweden)
Ponnuru Koteswara Rao
2016-05-01
Full Text Available aThe development in the field of nanometer technology leads to minimize the power consumption of logic circuits. Reversible logic design has been one of the promising technologies gaining greater interest due to less dissipation of heat and low power consumption. In the digital design, the code converters are widely used process. So, the reversible logic gates and reversible circuits for realizing code converters like as Binary to Gray code, Gray to Binary code, BCD to Excess 3 code, Excess 3 to BCD codes using reversible logic gates is proposed. Designing of reversible logic circuit is challenging task, since not enough number of gates are available for design. Reversible processor design needs its building blocks should be reversible in this view the designing of reversible code converters became essential one. In the digital domain, data or information is represented by a combination of 0’s and 1’s. A code is basically the pattern of these 0’s and 1’s used to represent the data. Code converters are a class of combinational digital circuits that are used to convert one type of code in to another. The proposed design leads to the reduction of power consumption compared with conventional logic circuits
Novel Low Power Comparator Design using Reversible Logic Gates
Directory of Open Access Journals (Sweden)
Nagamani A N
2011-09-01
Full Text Available Reversible logic has received great attention in the recent years due to its ability to reduce the power dissipation which is the main requirement in low power digital design. It has wide applications inadvanced computing, low power CMOS design, Optical information processing, DNA computing, bio information, quantum computation and nanotechnology. This paper presents a novel design of reversiblecomparator using the existing reversible gates and proposed new Reversible BJN gate. All the comparators have been modeled and verified using VHDL and ModelSim. A comparative result is presented in terms of number of gates, number of garbage outputs, number of constant inputs and Quantum cost.
Designing novel reversible BCD adder and parallel adder/subtraction using new reversible logic gates
Zhou, Rigui; Zhang, Manqun; Wu, Qian; Shi, Yang
2012-10-01
Reversible logic has received much attention in recent years when calculation with minimum energy consumption is considered. Especially, interest is sparked in reversible logic by its applications in some technologies, such as quantum computing, low-power CMOS design, optical information processing and nanotechnology. This article proposes two new reversible logic gates, ZRQ and NC. The first gate ZRQ not only implements all Boolean functions but also can be used to design optimised adder/subtraction architectures. One of the prominent functionalities of the proposed ZRQ gate is that it can work by itself as a reversible full adder/subtraction unit. The second gate NC can complete overflow detection logic of Binary Coded Decimal (BCD) adder. This article proposes two approaches to design novel reversible BCD adder using new reversible gates. A comparative result which is presented shows that the proposed designs are more optimised in terms of number of gates, garbage outputs, quantum costs and unit delays than the existing designs.
Orbach, Ron; Remacle, Françoise; Levine, R D; Willner, Itamar
2012-12-26
The Toffoli and Fredkin gates were suggested as a means to exhibit logic reversibility and thereby reduce energy dissipation associated with logic operations in dense computing circuits. We present a construction of the logically reversible Toffoli and Fredkin gates by implementing a library of predesigned Mg(2+)-dependent DNAzymes and their respective substrates. Although the logical reversibility, for which each set of inputs uniquely correlates to a set of outputs, is demonstrated, the systems manifest thermodynamic irreversibility originating from two quite distinct and nonrelated phenomena. (i) The physical readout of the gates is by fluorescence that depletes the population of the final state of the machine. This irreversible, heat-releasing process is needed for the generation of the output. (ii) The DNAzyme-powered logic gates are made to operate at a finite rate by invoking downhill energy-releasing processes. Even though the three bits of Toffoli's and Fredkin's logically reversible gates manifest thermodynamic irreversibility, we suggest that these gates could have important practical implication in future nanomedicine.
An enzyme-free and DNA-based Feynman gate for logically reversible operation.
Zhou, Chunyang; Wang, Kun; Fan, Daoqing; Wu, Changtong; Liu, Dali; Liu, Yaqing; Wang, Erkang
2015-06-28
A logically reversible Feynman gate was successfully realized under enzyme-free conditions by integrating graphene oxide and DNA for the first time. The gate has a one-to-one mapping function to identify inputs from the corresponding outputs. This type of reversible logic gate may have great potential applications in information processing and biosensing systems.
Variable Block Carry Skip Logic using Reversible Gates
Islam, Md. Rafiqul; Islam, Md. Saiful; Karim, Muhammad Rezaul; Mahmud, Abdullah Al; Babu, Hafiz Md. Hasan
2010-01-01
Reversible circuits have applications in digital signal processing, computer graphics, quantum computation and cryptography. In this paper, a generalized k*k reversible gate family is proposed and a 3*3 gate of the family is discussed. Inverter, AND, OR, NAND, NOR, and EXOR gates can be realized by this gate. Implementation of a full-adder circuit using two such 3*3 gates is given. This full-adder circuit contains only two reversible gates and produces no extra garbage outputs. The proposed f...
Fredkin Gates for Finite-valued Reversible and Conservative Logics
Cattaneo, G; Leporini, R; Cattaneo, Gianpiero; Leporati, Alberto; Leporini, Roberto
2002-01-01
The basic principles and results of Conservative Logic introduced by Fredkin and Toffoli on the basis of a seminal paper of Landauer are extended to d-valued logics, with a special attention to three-valued logics. Different approaches to d-valued logics are examined in order to determine some possible universal sets of logic primitives. In particular, we consider the typical connectives of Lukasiewicz and Godel logics, as well as Chang's MV-algebras. As a result, some possible three-valued and d-valued universal gates are described which realize a functionally complete set of fundamental connectives.
Variable Block Carry Skip Logic using Reversible Gates
Islam, Md Rafiqul; Karim, Muhammad Rezaul; Mahmud, Abdullah Al; Babu, Hafiz Md Hasan
2010-01-01
Reversible circuits have applications in digital signal processing, computer graphics, quantum computation and cryptography. In this paper, a generalized k*k reversible gate family is proposed and a 3*3 gate of the family is discussed. Inverter, AND, OR, NAND, NOR, and EXOR gates can be realized by this gate. Implementation of a full-adder circuit using two such 3*3 gates is given. This full-adder circuit contains only two reversible gates and produces no extra garbage outputs. The proposed full-adder circuit is efficient in terms of gate count, garbage outputs and quantum cost. A 4-bit carry skip adder is designed using this full-adder circuit and a variable block carry skip adder is discussed. Necessary equations required to evaluate these adder are presented.
Fredkin gates for finite-valued reversible and conservative logics
Energy Technology Data Exchange (ETDEWEB)
Cattaneo, G; Leporati, A; Leporini, R [Dipartimento di Informatica, Sistemistica e Comunicazione, Universita degli Studi di Milano - Bicocca, via Bicocca degli Arcimboldi 8, 20126 Milan (Italy)
2002-11-22
The basic principles and results of conservative logic introduced by Fredkin and Toffoli in 1982, on the basis of a seminal paper of Landauer, are extended to d-valued logics, with a special attention to three-valued logics. Different approaches to d-valued logics are examined in order to determine some possible universal sets of logic primitives. In particular, we consider the typical connectives of Lukasiewicz and Goedel logics, as well as Chang's MV-algebras. As a result, some possible three-valued and d-valued universal gates are described which realize a functionally complete set of fundamental connectives. Two no-go theorems are also proved.
Enhanced architectures for room-temperature reversible logic gates in graphene
Dragoman, Daniela; Dragoman, Mircea
2014-09-01
We show that reversible two- and three-input logic gates, such as the universal Toffoli gate, can be implemented with three tilted gate electrodes patterned on a monolayer graphene flake. These reversible gates are based on the unique properties of ballistic charge carriers in graphene, which induce bandgaps in transmission for properly chosen potential barriers. The enhanced architectures for reversible logic gate implementation proposed in this paper offer a remarkable design simplification compared to standard approaches based on field-effect transistor circuits, as well as potential high-frequency operation.
Directory of Open Access Journals (Sweden)
Shefali Mamataj
2016-07-01
Full Text Available In today‟s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. Reversible computation is a research area characterized by having only computational models that is both forward and backward deterministic. Reversible Logic is gaining significant consideration as the potential logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on physical entropy. It has become very popular over the last few years since reversible logic circuits dramatically reduce energy loss. It consumes less power by recovering bit loss from its unique input-output mapping. This paper represents the implementation of conventional Boolean functions for basic digital gate by using COG reversible gate. This paper also represents a multi logic function generator circuit for generating multiple logical function simultaneously using COG gates. And also represents a controlled multi logic function generator circuit for generating any specified output in a controlled way.
Design of 4:16 decoder using reversible logic gates
Directory of Open Access Journals (Sweden)
Santhi Chebiyyam
2016-04-01
Full Text Available Reversible logic has received great importance in the recent years because of its feature of reduction in power dissipation. It finds application in low power digital designs, quantum computing, nanotechnology, DNA computing etc. Large number of researches are currently ongoing on sequential and combinational circuits using reversible logic. Decoders are one of the most important circuits used in combinational logic. Different approaches have been proposed for their design. In this article, we have proposed a novel design of 4:16.
Singla, Pradeep
2012-01-01
This paper present the research work directed towards the design of reversible programmable logic array using very high speed integrated circuit hardware description language (VHDL). Reversible logic circuits have significant importance in bioinformatics, optical information processing, CMOS design etc. In this paper the authors propose the design of new RPLA using Feynman & MUX gate.VHDL based codes of reversible gates with simulating results are shown .This proposed RPLA may be further used to design any reversible logic function or Boolean function (Adder, subtractor etc.) which dissipate very low or ideally no heat.
Bioelectronic Interface Connecting Reversible Logic Gates Based on Enzyme and DNA Reactions.
Guz, Nataliia; Fedotova, Tatiana A; Fratto, Brian E; Schlesinger, Orr; Alfonta, Lital; Kolpashchikov, Dmitry M; Katz, Evgeny
2016-07-18
It is believed that connecting biomolecular computation elements in complex networks of communicating molecules may eventually lead to a biocomputer that can be used for diagnostics and/or the cure of physiological and genetic disorders. Here, a bioelectronic interface based on biomolecule-modified electrodes has been designed to bridge reversible enzymatic logic gates with reversible DNA-based logic gates. The enzyme-based Fredkin gate with three input and three output signals was connected to the DNA-based Feynman gate with two input and two output signals-both representing logically reversible computing elements. In the reversible Fredkin gate, the routing of two data signals between two output channels was controlled by the control signal (third channel). The two data output signals generated by the Fredkin gate were directed toward two electrochemical flow cells, responding to the output signals by releasing DNA molecules that serve as the input signals for the next Feynman logic gate based on the DNA reacting cascade, producing, in turn, two final output signals. The Feynman gate operated as the controlled NOT gate (CNOT), where one of the input channels controlled a NOT operation on another channel. Both logic gates represented a highly sophisticated combination of input-controlled signal-routing logic operations, resulting in redirecting chemical signals in different channels and performing orchestrated computing processes. The biomolecular reaction cascade responsible for the signal processing was realized by moving the solution from one reacting cell to another, including the reacting flow cells and electrochemical flow cells, which were organized in a specific network mimicking electronic computing circuitries. The designed system represents the first example of high complexity biocomputing processes integrating enzyme and DNA reactions and performing logically reversible signal processing. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata.
Bahar, Ali Newaz; Rahman, Mohammad Maksudur; Nahid, Nur Mohammad; Hassan, Md Kamrul
2017-02-01
This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T=2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed.
Design of High Speed Low Power Reversible Logic Adder Using HNG Gate
Directory of Open Access Journals (Sweden)
Manjeet Singh Sankhwar,
2014-01-01
Full Text Available Reversibility plays a fundamental role when computations with minimal energy dissipation are considered. In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, optical information processing, quantum computing and nanotechnology. This research proposes a new implementation of adder in reversible logic. The design reduces the number of gate operations compared to the existing adder reversible logic implementations. So, this design gives rise to an implementation with a reduced area and delay. We can use it to construct more complex systems in nanotechnology.
Optimized design of BCD adder and Carry skip BCD adder using reversible logic gates
H.R.Bhagyalakshmi,; M K Venkatesha
2011-01-01
Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nano technology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit BCD adder and an optimized one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
DESIGN OF OPTIMAL CARRY SKIP ADDER AND CARRY SKIP BCD ADDER USING REVERSIBLE LOGIC GATES
Praveena Murugesan; Thanushkodi Keppanagounder
2014-01-01
Reversible logic circuits have the ability to produce zero power dissipation which has found its importance in quantum computing, optical computing and low power digital circuits. The study presents improved and efficient reversible logic circuits for carry skip adder and carry skip BCD adder. The performance of the proposed architecture is better than the existing works in terms of gate count, garbage outputs and constant inputs. This design forms the basis for different quantum ALU and embe...
Optimized design of Carry Skip BCD adder using new FHNG reversible logic gates
Directory of Open Access Journals (Sweden)
Md.Belayet Ali
2012-07-01
Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nanotechnology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
Optimized design of BCD adder and Carry skip BCD adder using reversible logic gates
Directory of Open Access Journals (Sweden)
H.R.Bhagyalakshmi,
2011-04-01
Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nano technology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit BCD adder and an optimized one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
Hassan, Md Kamrul; Nahid, Nur Mohammad; Bahar, Ali Newaz; Bhuiyan, Mohammad Maksudur Rahman; Abdullah-Al-Shafi, Md; Ahmed, Kawsar
2017-08-01
Quantum-dot cellular automata (QCA) is a developing nanotechnology, which seems to be a good candidate to replace the conventional complementary metal-oxide-semiconductor (CMOS) technology. In this article, we present the dataset of average output polarization (AOP) for basic reversible logic gates presented in Ali Newaz et al. (2016) [1]. QCADesigner 2.0.3 has been employed to analysis the AOP of reversible gates at different temperature levels in Kelvin (K) unit.
Directory of Open Access Journals (Sweden)
Md. Kamrul Hassan
2017-08-01
Full Text Available Quantum-dot cellular automata (QCA is a developing nanotechnology, which seems to be a good candidate to replace the conventional complementary metal-oxide-semiconductor (CMOS technology. In this article, we present the dataset of average output polarization (AOP for basic reversible logic gates presented in Ali Newaz et al. (2016 [1]. QCADesigner 2.0.3 has been employed to analysis the AOP of reversible gates at different temperature levels in Kelvin (K unit.
Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata
Directory of Open Access Journals (Sweden)
Ali Newaz Bahar
2017-02-01
Full Text Available This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T=2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed.
Chauhan, Chanderkanta; Bedi, Amna; Kumar, Santosh
2017-02-01
In this ultra fast computing era power optimization is a major technological challenge that requires new computing paradigms. Conservative and reversible logic opens up the possibility of ultralow power computing. In this paper, basic reversible logic gate (double Feynman gate) using the lithium-niobate based Mach-Zehnder interferometer is proposed. The results are verified using beam propagation method and MATLAB simulations.
VLSI Implementation of Fault Tolerance Multiplier based on Reversible Logic Gate
Ahmad, Nabihah; Hakimi Mokhtar, Ahmad; Othman, Nurmiza binti; Fhong Soon, Chin; Rahman, Ab Al Hadi Ab
2017-08-01
Multiplier is one of the essential component in the digital world such as in digital signal processing, microprocessor, quantum computing and widely used in arithmetic unit. Due to the complexity of the multiplier, tendency of errors are very high. This paper aimed to design a 2×2 bit Fault Tolerance Multiplier based on Reversible logic gate with low power consumption and high performance. This design have been implemented using 90nm Complemetary Metal Oxide Semiconductor (CMOS) technology in Synopsys Electronic Design Automation (EDA) Tools. Implementation of the multiplier architecture is by using the reversible logic gates. The fault tolerance multiplier used the combination of three reversible logic gate which are Double Feynman gate (F2G), New Fault Tolerance (NFT) gate and Islam Gate (IG) with the area of 160μm x 420.3μm (67.25 mm2). This design achieved a low power consumption of 122.85μW and propagation delay of 16.99ns. The fault tolerance multiplier proposed achieved a low power consumption and high performance which suitable for application of modern computing as it has a fault tolerance capabilities.
Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates
Islam, Md Saiful; Begum, Zerina; Hafiz, Mohd Zulfiquar
2010-01-01
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient design approaches of fault tolerant carry skip adders (FTCSAs) and compares those designs with the existing ones. Variable block carry skip logic (VBCSL) using the fault tolerant full adders (FTFAs) has also been developed. The designs are minimized in terms of hardware complexity, gate count, constant inputs and garbage outputs. Besides of it, technology independent evaluation of the proposed designs clearly demonstrates its superiority with the existing counterparts.
National Research Council Canada - National Science Library
Shefali Mamataj; Biswajit Das
2016-01-01
.... Reversible Logic is gaining significant consideration as the potential logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on physical entropy...
Forsati, Rana; Valipour Ebrahimi, Sara; Navi, Keivan; Mohajerani, Ezeddin; Jashnsaz, Hossein
2013-02-01
Increasing demand for power reduction in computer systems has led to new trends in computations and computer design including reversible computing. Its main aim is to eliminate power dissipation in logical elements but can have some other advantages such as data security and error prevention. Because of interesting properties of reversible computing, implementing computing devices with reversible manner is the only way to make the reversible computing a reality. In recent years, reversible logic has turned out to be a promising computing paradigm having application in CMOS, nanotechnology, quantum computing and optical computing. In this paper, we propose and realize a novel implementation of Toffoli gate in all-optical domain. We have explained its principle of operations and described an actual experimental implementation. The all-optical reversible gate presented in this paper will be useful in different applications such as arithmetic and logical operations in the domain of reversible logic-based computing.
Fratto, Brian E; Katz, Evgeny
2015-05-18
Reversible logic gates, such as the double Feynman gate, Toffoli gate and Peres gate, with 3-input/3-output channels are realized using reactions biocatalyzed with enzymes and performed in flow systems. The flow devices are constructed using a modular approach, where each flow cell is modified with one enzyme that biocatalyzes one chemical reaction. The multi-step processes mimicking the reversible logic gates are organized by combining the biocatalytic cells in different networks. This work emphasizes logical but not physical reversibility of the constructed systems. Their advantages and disadvantages are discussed and potential use in biosensing systems, rather than in computing devices, is suggested. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Directory of Open Access Journals (Sweden)
Sukhdev Roy
2012-01-01
Full Text Available We present designs of all-optical reversible gates, namely, Feynman, Toffoli, Peres, and Feynman double gates, with optically controlled microresonators. To demonstrate the applicability, a bacteriorhodopsin protein-coated silica microcavity in contact between two tapered single-mode fibers has been used as an all-optical switch. Low-power control signals (<200 μW at 532 nm and at 405 nm control the conformational states of the protein to switch a near infrared signal laser beam at 1310 or 1550 nm. This configuration has been used as a template to design four-port tunable resonant coupler logic gates. The proposed designs are general and can be implemented in both fiber-optic and integrated-optic formats and with any other coated photosensitive material. Advantages of directed logic, high Q-factor, tunability, compactness, low-power control signals, high fan-out, and flexibility of cascading switches in 2D/3D architectures to form circuits make the designs promising for practical applications.
Amplifying genetic logic gates.
Bonnet, Jerome; Yin, Peter; Ortiz, Monica E; Subsoontorn, Pakpoom; Endy, Drew
2013-05-03
Organisms must process information encoded via developmental and environmental signals to survive and reproduce. Researchers have also engineered synthetic genetic logic to realize simpler, independent control of biological processes. We developed a three-terminal device architecture, termed the transcriptor, that uses bacteriophage serine integrases to control the flow of RNA polymerase along DNA. Integrase-mediated inversion or deletion of DNA encoding transcription terminators or a promoter modulates transcription rates. We realized permanent amplifying AND, NAND, OR, XOR, NOR, and XNOR gates actuated across common control signal ranges and sequential logic supporting autonomous cell-cell communication of DNA encoding distinct logic-gate states. The single-layer digital logic architecture developed here enables engineering of amplifying logic gates to control transcription rates within and across diverse organisms.
Xia, Hongyan; Xu, Yangyang; Yang, Guang; Jiang, Hao; Zou, Gang; Zhang, Qijin
2014-02-01
Here, a novel multi-stimuli-responsive fluorescence probe is developed by incorporating spiropyran group into the coumarin-substituted polydiacetylene (PDA) vesicles. The fluorescence of PDA can be turned on upon heating, and can be quenched upon exposure to UV light irradiation or pH stimuli owing to the fluorescene resonance energy transfer (FRET) between the red-phase PDA and the open merocyanine (MC) form of spiropyran. Moreover, we have designed and experimentally realized a set of logic gate operations for the first time based on the fluorescence modulation of the designed system upon thermal, photo, and pH stimuli. This novel type of resettable logic gates augur well for practical applications in information storage, optical recording, and sensing in complicated microenvironments. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Castagnoli, G C
1999-01-01
In former work, quantum computation has been shown to be a problem solving process essentially affected by both the reversible dynamics leading to the state before measurement, and the logical-mathematical constraints introduced by quantum measurement (in particular, the constraint that there is only one measurement outcome). This dual influence, originated by independent initial and final conditions, justifies the quantum computation speed-up and is not representable inside dynamics, namely as a one-way propagation. In this work, we reformulate von Neumann's model of quantum measurement at the light of above findings. We embed it in a broader representation based on the quantum logic gate formalism and capable of describing the interplay between dynamical and non-dynamical constraints. The two steps of the original model, namely (1) dynamically reaching a complete entanglement between pointer and quantum object and (2) enforcing the one-outcome-constraint, are unified and reversed. By representing step (2) r...
A Reversible DNA Logic Gate Platform Operated by One- and Two-Photon Excitations.
Tam, Dick Yan; Dai, Ziwen; Chan, Miu Shan; Liu, Ling Sum; Cheung, Man Ching; Bolze, Frederic; Tin, Chung; Lo, Pik Kwan
2016-01-04
We demonstrate the use of two different wavelength ranges of excitation light as inputs to remotely trigger the responses of the self-assembled DNA devices (D-OR). As an important feature of this device, the dependence of the readout fluorescent signals on the two external inputs, UV excitation for 1 min and/or near infrared irradiation (NIR) at 800 nm fs laser pulses, can mimic function of signal communication in OR logic gates. Their operations could be reset easily to its initial state. Furthermore, these DNA devices exhibit efficient cellular uptake, low cytotoxicity, and high bio-stability in different cell lines. They are considered as the first example of a photo-responsive DNA logic gate system, as well as a biocompatible, multi-wavelength excited system in response to UV and NIR. This is an important step to explore the concept of photo-responsive DNA-based systems as versatile tools in DNA computing, display devices, optical communication, and biology. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Online Testable Decoder using Reversible Logic
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Hemalatha. K. N. Manjula B. B. Girija. S
2012-02-01
Full Text Available The project proposes to design and test 2 to 4 reversible Decoder circuit with arbitrary number of gates to an online testable reversible one and is independent of the type of reversible gate used. The constructed circuit can detect any single bit errors and to convert a decoder circuit that is designed by reversible gates to an online testable reversible decoder circuit. Conventional digital circuits dissipate a significant amount of energy because bits of information are erased during the logic operations. Thus if logic gates are designed such that the information bits are not destroyed, the power consumption can be reduced. The information bits are not lost in case of a reversible computation. Reversible logic can be used to implement any Boolean logic function.
Huang, Zhenzhen; Ren, Jinsong; Qu, Xiaogang
2012-03-01
Molecule-like silver nanoclusters (AgNCs) with few to tens of atoms are highly sensitive to the sequence and structure of DNA stabilizers. In this paper, a novel pH-triggered reversible molecular fluorescence switch is developed by taking advantage of the DNA-dependent fluorescence pH response of AgNCs. The DNA-AgNCs fluorescence switch simultaneously addresses concerns of simple construction strategy, efficient design and organic-solvent-free operation. Moreover, the excellent photostability and biocompatibility of AgNCs provide great potential for application of the DNA-AgNCs fluorescence switch in the development of functional molecular devices. Specifically, we apply the DNA-AgNCs fluorescence switch combined with the DNA sequence-dependent pH response pattern of AgNCs for construction of molecular logic gates.
Reversible Logic Circuit Synthesis
Shende, V V; Markov, I L; Prasad, A K; Hayes, John P.; Markov, Igor L.; Prasad, Aditya K.; Shende, Vivek V.
2002-01-01
Reversible, or information-lossless, circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement for quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line-pairs (temporary storage channels). We propose new constructions for reversible circuits composed of NOT, Controlled-NOT, and TOFFOLI gates (the CNT gate library) based on permutation theory. A new algorithm is given to synthesize optimal reversible circuits using an arbitrary gate library. We also describe much faster heuristic algorithms. We also pursue applications of the proposed techniques to the synthesis of quantum circuits.
Logic Gates with Ion Transistors
Grebel, Haim
2016-01-01
Electronic logic gates are the basic building blocks of every computing and micro controlling system. Logic gates are made of switches, such as diodes and transistors. Ion-selective, ionic switches may emulate electronic switches [1-8]. If we ever want to create artificial bio-chemical circuitry, then we need to move a step further towards ion-logic circuitry. Here we demonstrate ion XOR and OR gates with electrochemical cells, and specifically, with two wet-cell batteries. In parallel to vacuum tubes, the batteries were modified to include a third, permeable and conductive mid electrode (the gate), which was placed between the anode and cathode in order to affect the ion flow through it. The key is to control the cell output with a much smaller biasing power, as demonstrated here. A successful demonstration points to self-powered ion logic gates.
Synthesis of Fault Tolerant Reversible Logic Circuits
Islam, Md Saiful; Begum, Zerina; Hafiz, Mohd Zulfiquar; Mahmud, Abdullah Al; 10.1109/CAS-ICTD.2009.4960883
2010-01-01
Reversible logic is emerging as an important research area having its application in diverse fields such as low power CMOS design, digital signal processing, cryptography, quantum computing and optical information processing. This paper presents a new 4*4 universal reversible logic gate, IG. It is a parity preserving reversible logic gate, that is, the parity of the inputs matches the parity of the outputs. The proposed parity preserving reversible gate can be used to synthesize any arbitrary Boolean function. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. Finally, it is shown how a fault tolerant reversible full adder circuit can be realized using only two IGs. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts.
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
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Md. Belayet Ali
2011-12-01
Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application,those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular auto meta, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designed RS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
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Md. Mosharof Hossin
2012-01-01
Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application, those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular automata, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designedRS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.
Optimized Multiplier Using Reversible Multicontrol Input Toffoli Gates
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H R Bhagyalakshmi
2013-01-01
Full Text Available Reversible logic is an important area to carry the computation into the world of quantum computing. In thispaper a 4-bit multiplier using a new reversible logic gate called BVPPG gate is presented. BVPPG gate isa 5 x 5 reversible gate which is designed to generate partial products required to perform multiplicationand also duplication of operand bits is obtained. This reduces the total cost of the circuit. Toffoli gate isthe universal and also most flexible reversible logic gate. So we have used the Toffoli gates to construct thedesigned multiplier.
Partial Reversible Gates(PRG) for Reversible BCD Arithmetic
Thapliyal, Himanshu; Bajpai, Rajnish; Sharma, Kamal K
2007-01-01
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. Furthermore, in the recent years reversible logic has emerged as a promising computing paradigm having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The major goal in reversible logic is to minimize the number of reversible gates and garbage outputs. Thus, this paper proposes the novel concept of partial reversible gates that will satisfy the reversibility criteria for specific cases in BCD arithmetic. The partial reversible gate is proposed to minimize the number of reversible gates and garbage outputs, while designing the reversible BCD arithmetic circuits.
Sorting Network for Reversible Logic Synthesis
Islam, Md Saiful; Mahmud, Abdullah Al; karim, Muhammad Rezaul
2010-01-01
In this paper, we have introduced an algorithm to implement a sorting network for reversible logic synthesis based on swapping bit strings. The algorithm first constructs a network in terms of n*n Toffoli gates read from left to right. The number of gates in the circuit produced by our algorithm is then reduced by template matching and removing useless gates from the network. We have also compared the efficiency of the proposed method with the existing ones.
Design of Digital Adder Using Reversible Logic
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Gowthami P
2016-02-01
Full Text Available Reversible logic circuits have promising applications in Quantum computing, Low power VLSI design, Nanotechnology, optical computing, DNA computing and Quantum dot cellular automata. In spite of them another main prominent application of reversible logic is Quantum computers where the quantum devices are essential which are ideally operated at ultra high speed with less power dissipation must be built from reversible logic components. This makes the reversible logic as a one of the most promising research areas in the past few decades. In VLSI design the delay is the one of the major issue along with area and power. This paper presents the implementation of Ripple Carry Adder (RCA circuits using reversible logic gates are discussed.
Parallel optical logic operations on reversible networks
Shamir, Joseph
2013-03-01
A generic optical network architecture is proposed for the implementation of programmable logic operations. Based on reversible optical gate elements the processor is highly energy efficient and intrinsically fast. In this architecture the whole logic operation is executed by light propagating through the system with no energy dissipation. Energy must be spent only at the input interface and at discrete locations where the logic operation results are to be detected. As a consequence, the theoretical lower limit for energy dissipation in logic operations must be reconsidered. The strength of this approach is demonstrated by examples showing the implementation of various lossless logic operations, including Half Adder and Full Adder.
Reversibility and energy dissipation in adiabatic superconductor logic.
Takeuchi, Naoki; Yamanashi, Yuki; Yoshikawa, Nobuyuki
2017-03-06
Reversible computing is considered to be a key technology to achieve an extremely high energy efficiency in future computers. In this study, we investigated the relationship between reversibility and energy dissipation in adiabatic superconductor logic. We analyzed the evolution of phase differences of Josephson junctions in the reversible quantum-flux-parametron (RQFP) gate and confirmed that the phase differences can change time reversibly, which indicates that the RQFP gate is physically, as well as logically, reversible. We calculated energy dissipation required for the RQFP gate to perform a logic operation and numerically demonstrated that the energy dissipation can fall below the thermal limit, or the Landauer bound, by lowering operation frequencies. We also investigated the 1-bit-erasure gate as a logically irreversible gate and the quasi-RQFP gate as a physically irreversible gate. We calculated the energy dissipation of these irreversible gates and showed that the energy dissipation of these gate is dominated by non-adiabatic state changes, which are induced by unwanted interactions between gates due to logical or physical irreversibility. Our results show that, in reversible computing using adiabatic superconductor logic, logical and physical reversibility are required to achieve energy dissipation smaller than the Landauer bound without non-adiabatic processes caused by gate interactions.
Roy, Sukhdev; Yadav, Chandresh
2013-12-01
A detailed theoretical analysis of ultrafast transition from saturable absorption (SA) to reverse saturable absorption (RSA) has been presented in graphene-oxide thin films with femtosecond laser pulses at 800 nm. Increase in pulse intensity leads to switching from SA to RSA with increased contrast due to two-photon absorption induced excited-state absorption. Theoretical results are in good agreement with reported experimental results. Interestingly, it is also shown that increase in concentration results in RSA to SA transition. The switching has been optimized to design parallel all-optical femtosecond NOT, AND, OR, XOR, and the universal NAND and NOR logic gates.
Roy, Sukhdev; Yadav, Chandresh
2011-09-01
A detailed theoretical analysis of femtosecond transition from saturable (SA) to reverse saturable absorption (RSA) has been carried out in Copper-Phthalocyanine (CuPc)-doped polymethylmethacrylate (PMMA) thin films. The transition due to fifth-order effect of excited-state absorption induced two-photon process has been optimized with respect to intensity, concentration and nonlinear coefficients to design various all-optical logic gates, namely, OR and AND at lower intensities (SA region), XOR at the transition intensity, and the universal NAND and NOR at higher intensities (RSA region). The advantages of ultrafast operation, simplicity, tunability, high contrast, stability of CuPc-doped PMMA thin film, and the possibility to control and realize various logic operations in the same film at the same wavelength by only controlling the pulse intensity, instead of a pump-probe configuration, make them attractive for practical implementation.
Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit
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Rakshith Saligram1
2013-06-01
Full Text Available Reversible Logic is gaining significant consideration as the potential logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on physical entropy .Fault Tolerant reversible logic is one class of reversible logic that maintain the parity of the input and the outputs. Significant contributions have been made in the literature towards the design of fault tolerant reversible logic gate structures and arithmetic units, however, there are not many efforts directed towards the design of fault tolerant reversible ALUs. Arithmetic Logic Unit (ALU is the prime performing unit in any computing device and it has to be made fault tolerant. In this paper we aim to design one such fault tolerant reversible ALU that is constructed using parity preserving reversible logic gates. The designed ALU can generate up to seven Arithmetic operations and four logical operations
Szilard engine reversibility as quantum gate function
Mihelic, F. Matthew
2012-06-01
A quantum gate is a logically and thermodynamically reversible situation that effects a unitary transformation of qubits of superimposed information, and essentially constitutes a situation for a reversible quantum decision. A quantum decision is a symmetry break, and the effect of the function of a Szilard engine is a symmetry break. A quantum gate is a situation in which a reversible quantum decision can be made, and so if a logically and thermodynamically reversible Szilard engine can be theoretically constructed then it would function as a quantum gate. While the traditionally theorized Szilard engine is not thermodynamically reversible, if one of the bounding walls of a Szilard engine were to be constructed out of the physical information by which it functions in such a manner as to make that information available to both sides of the wall simultaneously, then such a Szilard engine would be both logically and thermodynamically reversible, and thus capable of function as a quantum gate. A theoretical model of the special case of a reversible Szilard engine functioning as a quantum gate is presented and discussed, and since a quantum decision is made when the shutter of a Szilard engine closes, the coherence of linked reversible Szilard engines should be considered as a state during which all of the shutters of linked Szilard engines are open simultaneously.
Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit
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Rakshith Saligram
2013-07-01
Full Text Available Reversible Logic is gaining significant consideration as the potential logic design style for implementationin modern nanotechnology and quantum computing with minimal impact on physical entropy .FaultTolerant reversible logic is one class of reversible logic that maintain the parity of the input and theoutputs. Significant contributions have been made in the literature towards the design of fault tolerantreversible logic gate structures and arithmetic units, however, there are not many efforts directed towardsthe design of fault tolerant reversible ALUs. Arithmetic Logic Unit (ALU is the prime performing unit inany computing device and it has to be made fault tolerant. In this paper we aim to design one such faulttolerant reversible ALU that is constructed using parity preserving reversible logic gates. The designedALU can generate up to seven Arithmetic operations and four logical operations.
Mukherjee, Soma; Talukder, Shrabani
2016-05-01
A new Schiff-base, HL luminescent chemosensor of 1-amino pyrene and 8-hydroxy quinoline-2-carboxaldehyde was synthesized which demonstrates selective fluorimetric detection of Fe(3+) in aqueous medium with detection limit of 2.52 × 10(-8) M. The receptor shows selective 'turn-on' response towards Fe(3+) over other metal ions. This gradual 'turn-on' fluorescence response for Fe(3+) may be induced via CHEF (chelation-enhanced fluorescence) through close proximity of pyrene rings. The stoichiometry and binding property of HL with Fe(3+) was examined by emission studies. In presence of Fe(3+), HL also exhibits reversible change in emission pattern with EDTA and thus offers an interesting property of molecular 'INHIBIT' logic gate with Fe(3+) and EDTA as chemical inputs.
Synthesizing biomolecule-based Boolean logic gates.
Miyamoto, Takafumi; Razavi, Shiva; DeRose, Robert; Inoue, Takanari
2013-02-15
One fascinating recent avenue of study in the field of synthetic biology is the creation of biomolecule-based computers. The main components of a computing device consist of an arithmetic logic unit, the control unit, memory, and the input and output devices. Boolean logic gates are at the core of the operational machinery of these parts, and hence to make biocomputers a reality, biomolecular logic gates become a necessity. Indeed, with the advent of more sophisticated biological tools, both nucleic acid- and protein-based logic systems have been generated. These devices function in the context of either test tubes or living cells and yield highly specific outputs given a set of inputs. In this review, we discuss various types of biomolecular logic gates that have been synthesized, with particular emphasis on recent developments that promise increased complexity of logic gate circuitry, improved computational speed, and potential clinical applications.
An Approach to Simplify Reversible Logic Circuits
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Pabitra Roy
2012-09-01
Full Text Available Energy loss is one of the major problems in traditional irreversible circuits. For every bit of information loss kTln2 joules of heat is lost. In order to reduce the energy loss the concept of reversible logic circuits are introduced. Here we have described an algorithm for simplifying the reversible logic circuit and hence reduction of circuit cost and energy. The algorithm considers sub_circuit with respect to their number of lines and contiguous gates. The resulting sub_circuits are re-synthesized with smaller equivalent implementation. The process continues until circuit cost reaches good enough for Application or until a given computation budget has been exhausted. The circuit is constructed by NOT, CNOT and Toffoli gates only. By applying the algorithm and using the equivalent implementation we will get significant reduction of circuit cost and hence energy.
BSSSN: Bit String Swapping Sorting Network for Reversible Logic Synthesis
Islam, Md Saiful
2010-01-01
In this paper, we have introduced the notion of UselessGate and ReverseOperation. We have also given an algorithm to implement a sorting network for reversible logic synthesis based on swapping bit strings. The network is constructed in terms of n*n Toffoli Gates read from left to right and it has shown that there will be no more gates than the number of swappings the algorithm requires. The gate complexity of the network is O(n2). The number of gates in the network can be further reduced by template reduction technique and removing UselessGate from the network.
TRANSISTOR IMPLEMENTATION OF REVERSIBLE PRT GATES
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RASHMI S.B,
2011-03-01
Full Text Available Reversible logic has emerged as one of the most important approaches for power optimization with its application in low power VLSI design. Reversible or information lossless circuits have applications in nanotechnology, digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computing. In this paper, two newoptimized universal gates are proposed. One of them has an ability to operate as a reversible half adder and half subtractor imultaneously. Another one acts only as half adder with minimum transistor count. The reversible gates are evaluated in terms of number of transistor count, critical path, garbage outputs and one to one mapping. Here transistor implementation of the proposed gates is done by using Virtuoso tool of cadence. Based on the results of the analysis, some of the trade-offs are made in the design to improve the efficiency.
Chaplin, J C; Russell, N A; Krasnogor, N
2012-07-01
In this paper we detail experimental methods to implement registers, logic gates and logic circuits using populations of photochromic molecules exposed to sequences of light pulses. Photochromic molecules are molecules with two or more stable states that can be switched reversibly between states by illuminating with appropriate wavelengths of radiation. Registers are implemented by using the concentration of molecules in each state in a given sample to represent an integer value. The register's value can then be read using the intensity of a fluorescence signal from the sample. Logic gates have been implemented using a register with inputs in the form of light pulses to implement 1-input/1-output and 2-input/1-output logic gates. A proof of concept logic circuit is also demonstrated; coupled with the software workflow describe the transition from a circuit design to the corresponding sequence of light pulses. Copyright © 2012 Elsevier Ireland Ltd. All rights reserved.
Cascaded logic gates in nanophotonic plasmon networks.
Wei, Hong; Wang, Zhuoxian; Tian, Xiaorui; Käll, Mikael; Xu, Hongxing
2011-07-12
Optical computing has been pursued for decades as a potential strategy for advancing beyond the fundamental performance limitations of semiconductor-based electronic devices, but feasible on-chip integrated logic units and cascade devices have not been reported. Here we demonstrate that a plasmonic binary NOR gate, a 'universal logic gate', can be realized through cascaded OR and NOT gates in four-terminal plasmonic nanowire networks. This finding provides a path for the development of novel nanophotonic on-chip processor architectures for future optical computing technologies.
Heuristic Synthesis of Reversible Logic – A Comparative Study
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Chua Shin Cheng
2014-01-01
Full Text Available Reversible logic circuits have been historically motivated by theoretical research in low-power, and recently attracted interest as components of the quantum algorithm, optical computing and nanotechnology. However due to the intrinsic property of reversible logic, traditional irreversible logic design and synthesis methods cannot be carried out. Thus a new set of algorithms are developed correctly to synthesize reversible logic circuit. This paper presents a comprehensive literature review with comparative study on heuristic based reversible logic synthesis. It reviews a range of heuristic based reversible logic synthesis techniques reported by researchers (BDD-based, cycle-based, search-based, non-search-based, rule-based, transformation-based, and ESOP-based. All techniques are described in detail and summarized in a table based on their features, limitation, library used and their consideration metric. Benchmark comparison of gate count and quantum cost are analysed for each synthesis technique. Comparing the synthesis algorithm outputs over the years, it can be observed that different approach has been used for the synthesis of reversible circuit. However, the improvements are not significant. Quantum cost and gate count has improved over the years, but arguments and debates are still on certain issues such as the issue of garbage outputs that remain the same. This paper provides the information of all heuristic based synthesis of reversible logic method proposed over the years. All techniques are explained in detail and thus informative for new reversible logic researchers and bridging the knowledge gap in this area.
Logic gates based on ion transistors.
Tybrandt, Klas; Forchheimer, Robert; Berggren, Magnus
2012-05-29
Precise control over processing, transport and delivery of ionic and molecular signals is of great importance in numerous fields of life sciences. Integrated circuits based on ion transistors would be one approach to route and dispense complex chemical signal patterns to achieve such control. To date several types of ion transistors have been reported; however, only individual devices have so far been presented and most of them are not functional at physiological salt concentrations. Here we report integrated chemical logic gates based on ion bipolar junction transistors. Inverters and NAND gates of both npn type and complementary type are demonstrated. We find that complementary ion gates have higher gain and lower power consumption, as compared with the single transistor-type gates, which imitates the advantages of complementary logics found in conventional electronics. Ion inverters and NAND gates lay the groundwork for further development of solid-state chemical delivery circuits.
IMPLEMENTATION OF VEDIC MULTIPLIER USING REVERSIBLE GATES
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P. Koti Lakshmi
2015-07-01
Full Text Available With DSP applications evolving continuously, there is continuous need for improved multipliers which are faster and power efficient. Reversible logic is a new and promising field which addresses the problem of power dissipation. It has been shown to consume zero power theoretically. Vedic mathematics techniques have always proven to be fast and efficient for solving various problems. Therefore, in this paper we implement Urdhva Tiryagbhyam algorithm using reversible logic thereby addressing two important issues – speed and power consumption of implementation of multipliers. In this work, the design of 4x4 Vedic multiplier is optimized by reducing the number of logic gates, constant inputs, and garbage outputs. This multiplier can find its application in various fields like convolution, filter applications, cryptography, and communication.
Reversible Logic Synthesis of Fault Tolerant Carry Skip BCD Adder
Islam, Md Saiful; 10.3329/jbas.v32i2.2431
2010-01-01
Reversible logic is emerging as an important research area having its application in diverse fields such as low power CMOS design, digital signal processing, cryptography, quantum computing and optical information processing. This paper presents a new 4*4 parity preserving reversible logic gate, IG. The proposed parity preserving reversible gate can be used to synthesize any arbitrary Boolean function. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. It is shown that a fault tolerant reversible full adder circuit can be realized using only two IGs. The proposed fault tolerant full adder (FTFA) is used to design other arithmetic logic circuits for which it is used as the fundamental building block. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts.
A Cost- Effective Design of Reversible Programmable Logic Array
Singla, Pradeep; 10.5120/5619-7911
2012-01-01
In the recent era, Reversible computing is a growing field having applications in nanotechnology, optical information processing, quantum networks etc. In this paper, the authors show the design of a cost effective reversible programmable logic array using VHDL. It is simulated on xilinx ISE 8.2i and results are shown. The proposed reversible Programming logic array called RPLA is designed by MUX gate [10] & Feynman gate for 3- inputs, which is able to perform any reversible 3- input logic function or Boolean function. Furthermore the quantized analysis with camparitive finding is shown for the realized RPLA against the existing one. The result shows improvement in the quantum cost and total logical caculation in proposed RPLA.
Fratto, Brian E; Katz, Evgeny
2016-04-04
Controlled logic gates, where the logic operations on the Data inputs are performed in the way determined by the Control signal, were designed in a chemical fashion. Specifically, the systems where the Data output signals directed to various output channels depending on the logic value of the Control input signal have been designed based on enzyme biocatalyzed reactions performed in a multi-cell flow system. In the Switch gate one Data signal was directed to one of two possible output channels depending on the logic value of the Control input signal. In the reversible Fredkin gate the routing of two Data signals between two output channels is controlled by the third Control signal. The flow devices were created using a network of flow cells, each modified with one enzyme that biocatalyzed one chemical reaction. The enzymatic cascade was realized by moving the solution from one reacting cell to another which were organized in a specific network. The modular design of the enzyme-based systems realized in the flow device allowed easy reconfiguration of the logic system, thus allowing simple extension of the logic operation from the 2-input/3-output channels in the Switch gate to the 3-input/3-output channels in the Fredkin gate. Further increase of the system complexity for realization of various logic processes is feasible with the use of the flow cell modular design. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Optimized 4-bit Quantum Reversible Arithmetic Logic Unit
Ayyoub, Slimani; Achour, Benslama
2017-08-01
Reversible logic has received a great attention in the recent years due to its ability to reduce the power dissipation. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. The arithmetic logic unit (ALU) is an important part of central processing unit (CPU) as the execution unit. This paper presents a complete design of a new reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The proposed ALU based on a reversible low power control unit and small performance parameters full adder named double Peres gates. The presented ALU can produce the largest number (28) of arithmetic and logic functions and have the smallest number of quantum cost and delay compared with existing designs.
Slime mould logical gates: exploring ballistic approach
Adamatzky, Andrew
2010-01-01
Plasmodium of \\emph{Physarum polycephalum} is a single cell visible by unaided eye. On a non-nutrient substrate the plasmodium propagates as a traveling localization, as a compact wave-fragment of protoplasm. The plasmodium-localization travels in its originally predetermined direction for a substantial period of time even when no gradient of chemo-attractants is present. We utilize this property of \\emph{Physarum} localizations to design a two-input two-output Boolean logic gates $ \\to $ and $ \\to $. We verify the designs in laboratory experiments and computer simulations. We cascade the logical gates into one-bit half-adder and simulate its functionality.
All-Optical Reversible Hybrid New Gate using TOAD
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Goutam Kumar Maity
2014-03-01
Full Text Available Reversible logic is emerged as a promising computing paradigm with applications in low-power CMOS, quantum computing, optical computing and nanotechnology. Optical logic gates become potential component to work at macroscopic (light pulses carry information, or quantum (single photon carries information levels with high efficiency. In this paper, we propose a novel scheme of Hybrid new gate realization in all-optical domain. Simulation results verify the functionality of the gate as well as reversibility. Approximate insertion power loss in dB is also reported for the Gaussian incident and control pulse.
Efficient Algorithms for Optimal 4-Bit Reversible Logic System Synthesis
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Zhiqiang Li
2013-01-01
Full Text Available Owing to the exponential nature of the memory and run-time complexity, many methods can only synthesize 3-bit reversible circuits and cannot synthesize 4-bit reversible circuits well. We mainly absorb the ideas of our 3-bit synthesis algorithms based on hash table and present the efficient algorithms which can construct almost all optimal 4-bit reversible logic circuits with many types of gates and at mini-length cost based on constructing the shortest coding and the specific topological compression; thus, the lossless compression ratio of the space of n-bit circuits reaches near 2×n!. This paper presents the first work to create all 3120218828 optimal 4-bit reversible circuits with up to 8 gates for the CNT (Controlled-NOT gate, NOT gate, and Toffoli gate library, and it can quickly achieve 16 steps through specific cascading created circuits.
Classical Boolean logic gates with quantum systems
Energy Technology Data Exchange (ETDEWEB)
Renaud, N; Joachim, C, E-mail: n-renaud@northwestern.edu [Nanoscience Group and MANA Satellite CEMES/CNRS, 29 rue J Marvig, BP 94347, 31055 Toulouse Cedex (France)
2011-04-15
An analytical method is proposed to implement any classical Boolean function in a small quantum system by taking the advantage of its electronic transport properties. The logical input, {alpha} = {l_brace}{alpha}{sub 1}, ..., {alpha}{sub N}{r_brace}, is used to control well-identified parameters of the Hamiltonian of the system noted H{sub 0}({alpha}). The logical output is encoded in the tunneling current intensity passing through the quantum system when connected to conducting electrodes. It is demonstrated how to implement the six symmetric two-input/one-output Boolean functions in a quantum system. This system can be switched from one logic function to another by changing its structural parameters. The stability of the logic gates is discussed, perturbing the Hamiltonian with noise sources and studying the effect of decoherence.
Single spin universal Boolean logic gate
Energy Technology Data Exchange (ETDEWEB)
Agarwal, H; Pramanik, S; Bandyopadhyay, S [Department of Electrical and Computer Engineering, Virginia Commonwealth University, Richmond, VA 23284 (United States)
2008-01-15
Recent advances in manipulating single electron spins in quantum dots have brought us close to the realization of classical logic gates, where binary bits are encoded in spin polarizations of single electrons. Here, we show that a linear array of three quantum dots, each containing a single spin polarized electron, and with nearest neighbor exchange coupling, acts as a NAND gate. The energy dissipated during switching this gate is the Landauer-Shannon limit of kTln(1/p{sub i} ) (T = ambient temperature and p{sub i}= intrinsic gate error probability). With present day technology, p{sub i} = 10{sup -9} is achievable above 1 K temperature. Even with this small intrinsic error probability, the energy dissipated during switching is only {approx}21kT, while today's nanoscale transistors dissipate about 40 000-50 000kT when they switch.
Universal programmable logic gate and routing method
Fijany, Amir (Inventor); Vatan, Farrokh (Inventor); Akarvardar, Kerem (Inventor); Blalock, Benjamin (Inventor); Chen, Suheng (Inventor); Cristoloveanu, Sorin (Inventor); Kolawa, Elzbieta (Inventor); Mojarradi, Mohammad M. (Inventor); Toomarian, Nikzad (Inventor)
2009-01-01
An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.
Cyclic groups and quantum logic gates
Pourkia, Arash; Batle, J.; Raymond Ooi, C. H.
2016-10-01
We present a formula for an infinite number of universal quantum logic gates, which are 4 by 4 unitary solutions to the Yang-Baxter (Y-B) equation. We obtain this family from a certain representation of the cyclic group of order n. We then show that this discrete family, parametrized by integers n, is in fact, a small sub-class of a larger continuous family, parametrized by real numbers θ, of universal quantum gates. We discuss the corresponding Yang-Baxterization and related symmetries in the concomitant Hamiltonian.
Bimetal switches in an AND logic gate
Lubrica, Joel V.; Lubrica, Quantum Yuri B.
2016-09-01
In this frontline, we use bimetal switches to provide inputs in an electrical AND logic gate. These switches can be obtained from the pre-heat starters of fluorescent lamps, by safely removing the glass enclosure. They may be activated by small open flames. This frontline has a historical aspect because fluorescent lamps, together with pre-heat starters, are now being replaced by compact fluorescent, halogen, and LED lamps.
Orthogonally modulated molecular transport junctions for resettable electronic logic gates
Meng, Fanben; Hervault, Yves-Marie; Shao, Qi; Hu, Benhui; Norel, Lucie; Rigaut, Stéphane; Chen, Xiaodong
2014-01-01
Individual molecules have been demonstrated to exhibit promising applications as functional components in the fabrication of computing nanocircuits. Based on their advantage in chemical tailorability, many molecular devices with advanced electronic functions have been developed, which can be further modulated by the introduction of external stimuli. Here, orthogonally modulated molecular transport junctions are achieved via chemically fabricated nanogaps functionalized with dithienylethene units bearing organometallic ruthenium fragments. The addressable and stepwise control of molecular isomerization can be repeatedly and reversibly completed with a judicious use of the orthogonal optical and electrochemical stimuli to reach the controllable switching of conductivity between two distinct states. These photo-/electro-cooperative nanodevices can be applied as resettable electronic logic gates for Boolean computing, such as a two-input OR and a three-input AND-OR. The proof-of-concept of such logic gates demonstrates the possibility to develop multifunctional molecular devices by rational chemical design.
A Novel Design of Half Subtractor using Reversible Feynman Gate in Quantum Dot cellular Automata
Directory of Open Access Journals (Sweden)
Rubina Akter
2014-12-01
Full Text Available Quantum Dot cellular Automata (QCA is an emerging, promising alternative to CMOS technology that performs its task by encoding binary information on electronic charge configuration of a cell. All circuit based on QCA has an advantages of high speed, high parallel processing, high integrityand low power consumption. Reversible logic gates are the leading part in Quantum Dot cellular Automata. Reversible logic gates have an extensive feature that does not lose information. In this paper, we present a novel architecture of half subtractor gate design by reversible Feynman gate. This circuit is designedbased on QCA logic gates such as QCA majority voter gate, majority AND gate, majority OR gate and inverter gate. This circuit will provide an effective working efficiency on computational units of the digital circuit system.
Implementation and Comparison of Efficient 16-Bit SQRT CSLA Using Parity Preserving Reversible Gate
Directory of Open Access Journals (Sweden)
Rupali Patel
2016-10-01
Full Text Available In Very Large Scale Integration (VLSI outlines, Carry Select Adder (CSLA is one of the quickest adder utilized as a part of numerous data processing processors to perform quick number crunching capacities. In this paper we proposed the design of SQRT CSLA using parity preserving reversible gate (P2RG. Reversible logic is emerging field in today VLSI design. In conventional circuits, the logic gates such as AND gate, OR gate is irreversible in nature and computing with irreversible logic results in energy dissipation. This problem can be circumvented by using reversible logic. In ideal condition, the reversible logic gate produces zero power dissipation. The proposed design is efficient in terms of delay as compare to irreversible SQRT CSLA. The simulation is done using Xilinx.
Optimization Approaches for Designing Quantum Reversible Arithmetic Logic Unit
Haghparast, Majid; Bolhassani, Ali
2016-03-01
Reversible logic is emerging as a promising alternative for applications in low-power design and quantum computation in recent years due to its ability to reduce power dissipation, which is an important research area in low power VLSI and ULSI designs. Many important contributions have been made in the literatures towards the reversible implementations of arithmetic and logical structures; however, there have not been many efforts directed towards efficient approaches for designing reversible Arithmetic Logic Unit (ALU). In this study, three efficient approaches are presented and their implementations in the design of reversible ALUs are demonstrated. Three new designs of reversible one-digit arithmetic logic unit for quantum arithmetic has been presented in this article. This paper provides explicit construction of reversible ALU effecting basic arithmetic operations with respect to the minimization of cost metrics. The architectures of the designs have been proposed in which each block is realized using elementary quantum logic gates. Then, reversible implementations of the proposed designs are analyzed and evaluated. The results demonstrate that the proposed designs are cost-effective compared with the existing counterparts. All the scales are in the NANO-metric area.
Second Quantization Representation of Quantum Logic Gate Transformations
Institute of Scientific and Technical Information of China (English)
MA Lei; ZHANG Yong-De
2001-01-01
By using the theory of multimode linear transformation in Fock space, we offer an effective method to study the quantum logic gates based on fermion states. The forms of some basic quantum logic operations are also obtained.
Excitonic AND Logic Gates on DNA Brick Nanobreadboards
2015-01-01
A promising application of DNA self-assembly is the fabrication of chromophore-based excitonic devices. DNA brick assembly is a compelling method for creating programmable nanobreadboards on which chromophores may be rapidly and easily repositioned to prototype new excitonic devices, optimize device operation, and induce reversible switching. Using DNA nanobreadboards, we have demonstrated each of these functions through the construction and operation of two different excitonic AND logic gates. The modularity and high chromophore density achievable via this brick-based approach provide a viable path toward developing information processing and storage systems. PMID:25839049
Excitonic AND Logic Gates on DNA Brick Nanobreadboards.
Cannon, Brittany L; Kellis, Donald L; Davis, Paul H; Lee, Jeunghoon; Kuang, Wan; Hughes, William L; Graugnard, Elton; Yurke, Bernard; Knowlton, William B
2015-03-18
A promising application of DNA self-assembly is the fabrication of chromophore-based excitonic devices. DNA brick assembly is a compelling method for creating programmable nanobreadboards on which chromophores may be rapidly and easily repositioned to prototype new excitonic devices, optimize device operation, and induce reversible switching. Using DNA nanobreadboards, we have demonstrated each of these functions through the construction and operation of two different excitonic AND logic gates. The modularity and high chromophore density achievable via this brick-based approach provide a viable path toward developing information processing and storage systems.
Testing of Bridging Faults in AND-EXOR based Reversible Logic Circuits
Chakraborty, Avik
2010-01-01
Reversible circuits find applications in many areas of Computer Science including Quantum Computation. This paper examines the testability of an important subclass of reversible logic circuits that are composed of k-wire controlled NOT (k-CNOT with k >/- 1) gates. A reversible k-CNOT gate can be implemented using an irreversible k-input AND gate and an EXOR gate. A reversible k-CNOT circuit where each k-CNOT gate is realized using irreversible k-input AND and EXOR gate, has been considered. One of the most commonly used Single Bridging Fault model (both wired-AND and wired-OR) has been assumed to be type of fault for such circuits. It has been shown that an (n+p)-input AND-EXOR based reversible logic circuit with p observable outputs, can be tested for single bridging faults (SBF) using (3n + \\lefthalfcap log2p \\righthalfcap + 2) tests.
Rapidly Reconfigurable All-Optical Universal Logic Gates
Energy Technology Data Exchange (ETDEWEB)
Goddard, L L; Kallman, J S; Bond, T C
2006-06-21
We present designs and simulations for a highly cascadable, rapidly reconfigurable, all-optical, universal logic gate. We will discuss the gate's expected performance, e.g. speed, fanout, and contrast ratio, as a function of the device layout and biasing conditions. The gate is a three terminal on-chip device that consists of: (1) the input optical port, (2) the gate selection port, and (3) the output optical port. The device can be built monolithically using a standard multiple quantum well graded index separate confinement heterostructure laser configuration. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog electrical or optical signal at the gate selection port. Specifically, the same gate can be selected to execute one of the 2 basic unary operations (NOT or COPY), or one of the 6 binary operations (OR, XOR, AND, NOR, XNOR, or NAND), or one of the many logic operations involving more than two inputs. The speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal modulation speed of a laser, which can be on the order of tens of GHz. The reprogrammable nature of the universal gate offers maximum flexibility and interchangeability for the end user since the entire application of a photonic integrated circuit built from cascaded universal logic gates can be changed simply by adjusting the gate selection port signals.
A functional language for describing reversible logic
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal
2012-01-01
. Reversibility of descriptions is guaranteed with a type system based on linear types. The language is applied to three examples of reversible computations (ALU, linear cosine transformation, and binary adder). The paper also outlines a design flow that ensures garbage- free translation to reversible logic...
Development of a DNA sensor using molecular logic gate
Bhattacharjee, D; Chakraborty, S; Hussain, Syed Arshad
2014-01-01
This communication reports the increase in fluorescence resonance energy transfer (FRET) efficiency between two laser dyes in presence of Deoxyribonucleic acid (DNA). Two types of molecular logic gates have been designed where DNA acts as input signal and fluorescence intensity of different bands are taken as output signal. Use of these logic gates as DNA sensor has been demonstrated
Describing and optimizing reversible logic using a functional language
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal
2012-01-01
This paper presents the design of a language for the description and optimisation of reversible logic circuits. The language is a combinator-style functional language designed to be close to the reversible logical gate-level. The combinators include high-level constructs such as ripples, but also...... the recognisable inversion combinator f^(-1), which defines the inverse function of f using an efficient semantics. It is important to ensure that all circuits descriptions are reversible, and furthermore we must require this to be done statically. This is en- sured by the type system, which also allows...... the description of arbitrary sized circuits. The combination of the functional language and the restricted reversible model results in many arithmetic laws, which provide more possibilities for term rewriting and, thus, the opportunity for good optimisation....
Digital systems from logic gates to processors
Deschamps, Jean-Pierre; Terés, Lluís
2017-01-01
This textbook for a one-semester course in Digital Systems Design describes the basic methods used to develop “traditional” Digital Systems, based on the use of logic gates and flip flops, as well as more advanced techniques that enable the design of very large circuits, based on Hardware Description Languages and Synthesis tools. It was originally designed to accompany a MOOC (Massive Open Online Course) created at the Autonomous University of Barcelona (UAB), currently available on the Coursera platform. Readers will learn what a digital system is and how it can be developed, preparing them for steps toward other technical disciplines, such as Computer Architecture, Robotics, Bionics, Avionics and others. In particular, students will learn to design digital systems of medium complexity, describe digital systems using high level hardware description languages, and understand the operation of computers at their most basic level. All concepts introduced are reinforced by plentiful illustrations, examples, ...
Synthesis of Reversible Functions Beyond Gate Count and Quantum Cost
Wille, Robert; Drechsler, Rolf
2010-01-01
Many synthesis approaches for reversible and quantum logic have been proposed so far. However, most of them generate circuits with respect to simple metrics, i.e. gate count or quantum cost. On the other hand, to physically realize reversible and quantum hardware, additional constraints exist. In this paper, we describe cost metrics beyond gate count and quantum cost that should be considered while synthesizing reversible and quantum logic for the respective target technologies. We show that the evaluation of a synthesis approach may differ if additional costs are applied. In addition, a new cost metric, namely Nearest Neighbor Cost (NNC) which is imposed by realistic physical quantum architectures, is considered in detail. We discuss how existing synthesis flows can be extended to generate optimal circuits with respect to NNC while still keeping the quantum cost small.
Zhai, Wei; Du, Chunyan; Li, Xiaohong
2014-02-28
Direct reduction of Pb(2+) in self-assembled G-quadruplex on the gold electrode was first observed, which was applied in constructing a series of simple and reversible logic gates, such as one-input, two-input and three-input logic gates. Importantly, the largest scale of reversibility among two-input logic gates was achieved based on the reciprocal transformations of DNA.
Implementation of Quantum Logic Gates by Nuclear Magnetic Resonance Spectroscopy
Institute of Scientific and Technical Information of China (English)
DU Jiang-Feng; WU Ji-Hui; SHI Ming-Jun; HAN Liang; ZHOU Xian-Yi; YE Bang-Jiao; WENG Hui-Ming; HAN Rong-Dian
2000-01-01
Using nuclear magnetic resonance techniques with a solution of cytosine molecules, we show an implementation of certain quantum logic gates (including NOT gate, square-root of NOT gate and controlled-NOT gate), which have central importance in quantum computing. In addition, experimental results show that nuclear magnetic resonance spectroscopy can efficiently measure the result of quantum computing without attendant wave-function collapse.
Quantum Circuit Synthesis using a New Quantum Logic Gate Library of NCV Quantum Gates
Li, Zhiqiang; Chen, Sai; Song, Xiaoyu; Perkowski, Marek; Chen, Hanwu; Zhu, Wei
2017-04-01
Since Controlled-Square-Root-of-NOT (CV, CV‡) gates are not permutative quantum gates, many existing methods cannot effectively synthesize optimal 3-qubit circuits directly using the NOT, CNOT, Controlled-Square-Root-of-NOT quantum gate library (NCV), and the key of effective methods is the mapping of NCV gates to four-valued quantum gates. Firstly, we use NCV gates to create the new quantum logic gate library, which can be directly used to get the solutions with smaller quantum costs efficiently. Further, we present a novel generic method which quickly and directly constructs this new optimal quantum logic gate library using CNOT and Controlled-Square-Root-of-NOT gates. Finally, we present several encouraging experiments using these new permutative gates, and give a careful analysis of the method, which introduces a new idea to quantum circuit synthesis.
Quantum Circuit Synthesis using a New Quantum Logic Gate Library of NCV Quantum Gates
Li, Zhiqiang; Chen, Sai; Song, Xiaoyu; Perkowski, Marek; Chen, Hanwu; Zhu, Wei
2016-12-01
Since Controlled-Square-Root-of-NOT (CV, CV‡) gates are not permutative quantum gates, many existing methods cannot effectively synthesize optimal 3-qubit circuits directly using the NOT, CNOT, Controlled-Square-Root-of-NOT quantum gate library (NCV), and the key of effective methods is the mapping of NCV gates to four-valued quantum gates. Firstly, we use NCV gates to create the new quantum logic gate library, which can be directly used to get the solutions with smaller quantum costs efficiently. Further, we present a novel generic method which quickly and directly constructs this new optimal quantum logic gate library using CNOT and Controlled-Square-Root-of-NOT gates. Finally, we present several encouraging experiments using these new permutative gates, and give a careful analysis of the method, which introduces a new idea to quantum circuit synthesis.
Efficient carry skip Adder design using full adder and carry skip block based on reversible Logic
Varun Pratap Singh; Shiv Dayal; Manish Rai
2015-01-01
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Quantum Computing, Nanotechnology, and Optical Computing. Reversibility plays an important role when energy efficient computations are considered. In this paper, binary full Adder with Design I and Design II are proposed. The performance analysis is verified using number of reversible gates, Garbage input/outputs, delay, number of logical calculations and Quantum Cost. According t...
Quantum logic gates from Dirac quasiparticles
Marino, E. C.; Brozeguini, J. C.
2015-03-01
We show that one of the fundamental operations of topological quantum computation, namely the non-Abelian braiding of identical particles, can be physically realized in a general system of Dirac quasiparticles in 1 + 1D. Our method is based on the study of the analytic structure of the different Euclidean correlation functions of Dirac fields, which are conveniently expressed as functions of a complex variable. When the Dirac field is an (Abelian) anyon with statistics parameter s (2s not an integer), we show that the associated Majorana states of such a field present non-Abelian statistics. The explicit form of the unitary, non-commuting (monodromy) matrices generated upon braiding is derived as a function of s and is shown to satisfy the Yang-Baxter algebra. For the special case of s = 1/4, we show that the braiding matrices become the logic gates NOT, CNOT,… required in the algorithms of universal quantum computation. We suggest that maybe polyacetylene, alternately doped with alkali and halogen atoms, is a potential candidate for a physical material realization of the system studied here.
All-optical design for inherently energy-conserving reversible gates and circuits
Cohen, Eyal; Dolev, Shlomi; Rosenblit, Michael
2016-04-01
As energy efficiency becomes a paramount issue in this day and age, reversible computing may serve as a critical step towards energy conservation in information technology. The inputs of reversible computing elements define the outputs and vice versa. Some reversible gates such as the Fredkin gate are also universal; that is, they may be used to produce any logic operation. It is possible to find physical representations for the information, so that when processed with reversible logic, the energy of the output is equal to the energy of the input. It is suggested that there may be devices that will do that without applying any additional power. Here, we present a formalism that may be used to produce any reversible logic gate. We implement this method over an optical design of the Fredkin gate, which utilizes only optical elements that inherently conserve energy.
Complete all-optical processing polarization-based binary logic gates and optical processors.
Zaghloul, Y A; Zaghloul, A R M
2006-10-16
-input gates, and sequential and non-sequential Boolean expressions are presented and discussed. The operation of each design is simply understood by a bullet train traveling at the speed of light on a railroad system preconditioned by the crossover states predetermined by the control inputs. The presented designs allow for optical processing of the information eliminating the need to convert it, back and forth, to an electronic signal for processing purposes. All gates with a truth table, including for example Fredkin, Toffoli, testable reversible logic, and threshold logic gates, can be designed and implemented using the railroad architecture. That includes any future gates not known today. Those designs and the quantum gates are not discussed in this paper.
A biomolecular implementation of logically reversible computation with minimal energy dissipation.
Klein, J P; Leete, T H; Rubin, H
1999-10-01
Energy dissipation associated with logic operations imposes a fundamental physical limit on computation and is generated by the entropic cost of information erasure, which is a consequence of irreversible logic elements. We show how to encode information in DNA and use DNA amplification to implement a logically reversible gate that comprises a complete set of operators capable of universal computation. We also propose a method using this design to connect, or 'wire', these gates together in a biochemical fashion to create a logic network, allowing complex parallel computations to be executed. The architecture of the system permits highly parallel operations and has properties that resemble well known genetic regulatory systems.
Kazemi, Mehdi Mohammad; Mazaheri Tehrani, Alireza; Zeb Khan, Tahir; Namboodiri, Mahesh; Materny, Arnulf
2015-12-01
A Toffoli logic gate (CCNOT gate) is a universal reversible logic gate from which all other reversible gates can be constructed. It has a three-bit input and output. The goal of our work was to realize a Toffoli gate where all inputs and outputs are realized optically, which allows for ultrafast switching processes. We demonstrate experimentally that a Toffoli logic gate can be created based on nonlinear multi-wave interactions of light with matter. Using femtosecond laser pulses, the all-optical Toffoli gate is based on the coherence of the optical signals produced via the nonlinear optical processes. Sum frequency (SF) and second harmonic (SH) generations are combined in such a way so as to yield the complete truth table of the universal reversible logic gate.
Antibody activation using DNA-based logic gates.
Janssen, Brian M G; van Rosmalen, Martijn; van Beek, Lotte; Merkx, Maarten
2015-02-16
Oligonucleotide-based molecular circuits offer the exciting possibility to introduce autonomous signal processing in biomedicine, synthetic biology, and molecular diagnostics. Here we introduce bivalent peptide-DNA conjugates as generic, noncovalent, and easily applicable molecular locks that allow the control of antibody activity using toehold-mediated strand displacement reactions. Employing yeast as a cellular model system, reversible control of antibody targeting is demonstrated with low nM concentrations of peptide-DNA locks and oligonucleotide displacer strands. Introduction of two different toehold strands on the peptide-DNA lock allowed signal integration of two different inputs, yielding logic OR- and AND-gates. The range of molecular inputs could be further extended to protein-based triggers by using protein-binding aptamers. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Study of Reversible Logic Synthesis with Application in SOC: A Review
Sharma, Chinmay; Pahuja, Hitesh; Dadhwal, Mandeep; Singh, Balwinder
2017-08-01
The prime concern in today’s SOC designs is the power dissipation which increases with technology scaling. The reversible logic possesses very high potential in reducing power dissipation in these designs. It finds its application in latest research fields such as DNA computing, quantum computing, ultra-low power CMOS design and nanotechnology. The reversible circuits can be easily designed using the conventional CMOS technology at a cost of a garbage output which maintains the reversibility. The purpose of this paper is to provide an overview of the developments that have occurred till date in this concept and how the new reversible logic gates are used to design the logic functions.
Interlocked DNA nanostructures controlled by a reversible logic circuit.
Li, Tao; Lohmann, Finn; Famulok, Michael
2014-09-17
DNA nanostructures constitute attractive devices for logic computing and nanomechanics. An emerging interest is to integrate these two fields and devise intelligent DNA nanorobots. Here we report a reversible logic circuit built on the programmable assembly of a double-stranded (ds) DNA [3]pseudocatenane that serves as a rigid scaffold to position two separate branched-out head-motifs, a bimolecular i-motif and a G-quadruplex. The G-quadruplex only forms when preceded by the assembly of the i-motif. The formation of the latter, in turn, requires acidic pH and unhindered mobility of the head-motif containing dsDNA nanorings with respect to the central ring to which they are interlocked, triggered by release oligodeoxynucleotides. We employ these features to convert the structural changes into Boolean operations with fluorescence labelling. The nanostructure behaves as a reversible logic circuit consisting of tandem YES and AND gates. Such reversible logic circuits integrated into functional nanodevices may guide future intelligent DNA nanorobots to manipulate cascade reactions in biological systems.
nLukac, Maarti; Kameyama, Michitaka
2011-01-01
It has been experimentally proven that realizing universal quantum gates using higher-radices logic is practically and technologically possible. We developed a Parallel Genetic Algorithm that synthesizes Boolean reversible circuits realized with a variety of quantum gates on qudits with various radices. In order to allow synthesizing circuits of medium sizes in the higher radix quantum space we performed the experiments using a GPU accelerated Genetic Algorithm. Using the accelerated GA we compare heuristic improvements to the mutation process based on cost minimization, on the adaptive cost of the primitives and improvements due to Baldwinian vs. Lamarckian GA. We also describe various fitness function formulations that allowed for various realizations of well known universal Boolean reversible or quantum-probabilistic circuits.
Design of CMOS logic gates for TID radiation
Attia, John Okyere; Sasabo, Maria L.
1993-01-01
The rise time, fall time and propagation delay of the logic gates were derived. The effects of total ionizing dose (TID) radiation on the fall and rise times of CMOS logic gates were obtained using C program calculations and PSPICE simulations. The variations of mobility and threshold voltage on MOSFET transistors when subjected to TID radiation were used to determine the dependence of switching times on TID. The results of this work indicate that by increasing the size of P-channel transistor with respect to the N-channel transistors of the CMOS gates, the propagation delay of CMOS logic gate can be made to decrease with, or be independent of an increase in TID radiation.
A Reversible Processor Architecture and its Reversible Logic Design
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Axelsen, Holger Bock; Glück, Robert
2012-01-01
We describe the design of a purely reversible computing architecture, Bob, and its instruction set, BobISA. The special features of the design include a simple, yet expressive, locally-invertible instruction set, and fully reversible control logic and address calculation. We have designed...... an architecture with an ISA that is expressive enough to serve as the target for a compiler from a high-level structured reversible programming language. All-in-all, this paper demonstrates that the design of a complete reversible computing architecture is possible and can serve as the core of a programmable...
Fratto, Brian E; Roby, Lucas J; Guz, Nataliia; Katz, Evgeny
2014-10-18
The enzyme-based system performing a biocatalytic cascade reaction was realized in a flow device and was used to mimic Boolean logic operations. Chemical inputs applied to the system resulted in the activation of additional reaction steps, allowing the reversible switch of the logic operations between OR, NXOR and NAND gates for processing of two other biomolecular inputs.
Reversible logic synthesis methodologies with application to quantum computing
Taha, Saleem Mohammed Ridha
2016-01-01
This book opens the door to a new interesting and ambitious world of reversible and quantum computing research. It presents the state of the art required to travel around that world safely. Top world universities, companies and government institutions are in a race of developing new methodologies, algorithms and circuits on reversible logic, quantum logic, reversible and quantum computing and nano-technologies. In this book, twelve reversible logic synthesis methodologies are presented for the first time in a single literature with some new proposals. Also, the sequential reversible logic circuitries are discussed for the first time in a book. Reversible logic plays an important role in quantum computing. Any progress in the domain of reversible logic can be directly applied to quantum logic. One of the goals of this book is to show the application of reversible logic in quantum computing. A new implementation of wavelet and multiwavelet transforms using quantum computing is performed for this purpose. Rese...
Directory of Open Access Journals (Sweden)
D. V. Zakablukov
2014-01-01
Full Text Available The subject of study of this paper is reversible logic circuits. The irreversibility of computation can lead in the future to significant energy loss during the calculation process. Reversible circuits can be widely used in devices operating under conditions of limited computational resources.Presently, the problem of reversible logic synthesis is widely studied. The task a synthesis algorithm can face with is to reduce the gate complexity of synthesized circuit. One way to solve this problem is to use equivalent replacement tables for the gate compositions. The disadvantage of this approach is that it is necessary to build replacement tables, it takes a long time to find the replacement in the table, and there is no way to build an appropriate universal replacement table for arbitrary reversible circuit. The aim of this paper is to develop the solution for the problem of gate complexity reduction for the reversible circuits without using equivalent replacement tables for the gate compositions.This paper makes a generalization of the k-CNOT gate for the case of zero value at some of the gate control inputs. To describe such gates it suggests using a set of direct control inputs and a set of inverted ones. A definition of the independence of two reversible gates is introduced. Two independent gates standing next to each other in the circuit can be swapped without changing the circuit result transformation. Various conditions of the independence of two reversible gates are considered including conditions imposed to the set of direct control inputs and the set of inverted ones. It is proved that two gates are independent if there is, at least, one common control input, which differs only by the type (direct or inverted.Various equivalent replacements of two k-CNOT gates compositions and its conditions imposed to the set of direct control inputs and to the set of inverted ones are considered. The proof of correctness for such replacements is
Reversible circuit synthesis by genetic programming using dynamic gate libraries
Abubakar, Mustapha Y.; Jung, Low Tang; Zakaria, Nordin; Younes, Ahmed; Abdel-Aty, Abdel-Haleem
2017-06-01
We have defined a new method for automatic construction of reversible logic circuits by using the genetic programming approach. The choice of the gate library is 100% dynamic. The algorithm is capable of accepting all possible combinations of the following gate types: NOT TOFFOLI, NOT PERES, NOT CNOT TOFFOLI, NOT CNOT SWAP FREDKIN, NOT CNOT TOFFOLI SWAP FREDKIN, NOT CNOT PERES, NOT CNOT SWAP FREDKIN PERES, NOT CNOT TOFFOLI PERES and NOT CNOT TOFFOLI SWAP FREDKIN PERES. Our method produced near optimum circuits in some cases when a particular subset of gate types was used in the library. Meanwhile, in some cases, optimal circuits were produced due to the heuristic nature of the algorithm. We compared the outcomes of our method with several existing synthesis methods, and it was shown that our algorithm performed relatively well compared to the previous synthesis methods in terms of the output efficiency of the algorithm and execution time as well.
Scope of Reversible Engineering at Gate-Level : Fault - Tolerant Combinational Adders
Directory of Open Access Journals (Sweden)
M.Bharathi
2012-05-01
Full Text Available Reversible engineering has been one of the thrust areas ensuring that continual process of the innovation trends that explore and sustain the resources of the nature. This reversible engineering is used in many fields like quantum computing, low power CMOS design, nanotechnology, optical information processing, digital signal processing, cryptography, etc. These are the digital domain implementations of Reversible and Fault-Tolerant logic gates. Any arbitrary Boolean function can be synthesized by using the proposed parity preserving reversible gates. Not only the possibility of detecting errors is induced inherently in the proposed high speed adders at their output side but also it allows any fault that affects no more than a single signal that is detectable. The fault tolerant reversible full adder circuits are realized by using two IG gates only. The derived fault tolerant full adder is used for designing other arithmetic- logic circuit by using it as fundamental building block. The proposed reversible gate is designed to have less hardwarecomplexity and efficiecyt in terms of gate count, garbage outputs and constant input. In this paper, we design BCD adder using carry select logic, Carry-select and Bypass adders using FG gates, and newly designed TG gates.
Scope of Reversible Engineering at Gate-Level : Fault - Tolerant Combinational Adders
Directory of Open Access Journals (Sweden)
M.Bharathi
2012-04-01
Full Text Available Reversible engineering has been one of the thrust areas ensuring that continual process of the innovation trends that explore and sustain the resources of the nature. This reversible engineering is used in many fields like quantum computing, low power CMOS design, nanotechnology, optical information processing, digital signal processing, cryptography, etc. These are the digital domain implementations of Reversible and Fault-Tolerant logic gates. Any arbitrary Boolean function can be synthesized by using the proposed parity preserving reversible gates. Not only the possibility of detecting errors is induced inherently in the proposed high speed adders at their output side but also it allows any fault that affects no more than a single signal that is detectable. The fault tolerant reversible full adder circuits are realized by using two IG gates only. The derived fault tolerant full adder is used for designing other arithmetic- logic circuit by using it as fundamental building block. The proposed reversible gate is designed to have less hardware complexity and efficiecyt in terms of gate count, garbage outputs and constant input. In this paper, we design BCD adder using carry select logic, Carry-select and Bypass adders using FG gates, and newly designed TG gates.
Two-Qubit Quantum Logic Gate in Molecular Magnets
Institute of Scientific and Technical Information of China (English)
HOU Jing-Min; TIAN Li-Jun; GE Mo-Lin
2005-01-01
@@ We propose a scheme to realize a controlled-NOT quantum logic gate in a dimer of exchange coupled singlemolecule magnets, [Mn4]2. We chosen the ground state and the three low-lying excited states of a dimer in a finite longitudinal magnetic field as the quantum computing bases and introduced a pulsed transverse magnetic field with a special frequency. The pulsed transverse magnetic field induces the transitions between the quantum computing bases so as to realize a controlled-NOT quantum logic gate. The transition rates between a pair of the four quantum computing bases and between the quantum computing bases and excited states are evaluated and analysed.
A single nano cantilever as a reprogrammable universal logic gate
Chappanda, K. N.; Ilyas, S.; Kazmi, S. N. R.; Holguin-Lerma, J.; Batra, N. M.; Costa, P. M. F. J.; Younis, M. I.
2017-04-01
The current transistor-based computing circuits use multiple interconnected transistors to realize a single Boolean logic gate. This leads to higher power requirements and delayed computing. Transistors are not suitable for applications in harsh environments and require complicated thermal management systems due to excessive heat dissipation. Also, transistor circuits lack the ability to dynamically reconfigure their functionality in real time, which is desirable for enhanced computing capability. Further, the miniaturization of transistors to improve computational power is reaching its ultimate physical limits. As a step towards overcoming the limitations of transistor-based computing, here we demonstrate a reprogrammable universal Boolean logic gate based on a nanoelectromechanical cantilever (NC) oscillator. The fundamental XOR, AND, NOR, OR and NOT logic gates are condensed in a single NC, thereby reducing electrical interconnects between devices. The device is dynamically switchable between any logic gates at the same drive frequency without the need for any change in the circuit. It is demonstrated to operate at elevated temperatures minimizing the need for thermal management systems. It has a tunable bandwidth of 5 MHz enabling parallel and dynamically reconfigurable logic device for enhanced computing.
A single nano cantilever as a reprogrammable universal logic gate
Chappanda, K. N.
2017-02-24
The current transistor-based computing circuits use multiple interconnected transistors to realize a single Boolean logic gate. This leads to higher power requirements and delayed computing. Transistors are not suitable for applications in harsh environments and require complicated thermal management systems due to excessive heat dissipation. Also, transistor circuits lack the ability to dynamically reconfigure their functionality in real time, which is desirable for enhanced computing capability. Further, the miniaturization of transistors to improve computational power is reaching its ultimate physical limits. As a step towards overcoming the limitations of transistor-based computing, here we demonstrate a reprogrammable universal Boolean logic gate based on a nanoelectromechanical cantilever (NC) oscillator. The fundamental XOR, AND, NOR, OR and NOT logic gates are condensed in a single NC, thereby reducing electrical interconnects between devices. The device is dynamically switchable between any logic gates at the same drive frequency without the need for any change in the circuit. It is demonstrated to operate at elevated temperatures minimizing the need for thermal management systems. It has a tunable bandwidth of 5 MHz enabling parallel and dynamically reconfigurable logic device for enhanced computing.
A Novel Quantum Cost Efficient Reversible Full Adder Gate in Nanotechnology
Islam, Md Saiful
2010-01-01
Reversible logic has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its applications in low power CMOS design, cryptography, optical information processing and nanotechnology. This paper presents a novel and quantum cost efficient reversible full adder gate in nanotechnology. This gate can work singly as a reversible full adder unit and requires only one clock cycle. The proposed gate is a universal gate in the sense that it can be used to synthesize any arbitrary Boolean functions. It has been demonstrated that the hardware complexity offered by the proposed gate is less than the existing counterparts. The proposed reversible full adder gate also adheres to the theoretical minimum established by the researchers.
A gate controlled conjugated single molecule diode: Its rectification could be reversed
Zhang, Qun
2014-10-01
A gate controlled Au/diphenyldipyrimidinyl/Au single molecule diode is simulated by a tight-binding Hamiltonian combined with Green's Function and transport methods. After calculating a number of electronic transport characteristics under various gate voltages, a clear modulation by gate is got and when the positive voltage is high enough, the rectification could be reversed. This is advisable for the designing and building future molecular logic devices and integrated circuits.
A smart gelator as a chemosensor: application to integrated logic gates in solution, gel, and film.
Xue, Pengchong; Lu, Ran; Jia, Junhui; Takafuji, Makoto; Ihara, Hirotaka
2012-03-19
A gelator that consisted of one benzimidazole moiety and four amide units was used as a chemosensor. We found that its absorption and emission spectra in solution were sensitive to two complementary chemical stimuli: protons and anions. Thus, YES and INH logic gates were obtained when absorbance was defined as an output. A combination gate of XNOR and AND with an emission output was also obtained. Moreover, wet gels in two solvents were used to construct two more-complicated three-input-three-output gates, owing to the existence of the gel phase as an additional output. Finally, in xerogel films that were formed from two kinds of wet gels, reversible changes in their emission spectra were observed when they were sequentially exposed to volatile acid and NH(3). Another combination two-output logic gate was obtained for xerogel films. Finally, three states of the gelator were used to construct not only basic logic gate, but also some combination gates because of their response to multiple chemical stimuli and their multiple output signals, in which one chemical input could erase the effect of another chemical input. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Fan, Kaiqi; Yang, Jun; Wang, Xiaobo; Song, Jian
2014-11-07
A gelator containing a sorbitol moiety and a naphthalene-based salicylideneaniline group exhibits macroscopic gel-sol behavior in response to four complementary input stimuli: temperature, UV light, OH(-), and Cu(2+). On the basis of its multiple-stimuli responsive properties, we constructed a rational gel-based supramolecular logic gate that performed OR and INH types of reversible stimulus responsive gel-sol transition in the presence of various combinations of the four stimuli when the gel state was defined as an output. Moreover, a combination two-output logic gate was obtained, owing to the existence of the naked eye as an additional output. Hence, gelator 1 could construct not only a basic logic gate, but also a two-input-two-output logic gate because of its response to multiple chemical stimuli and multiple output signals, in which one input could erase the effect of another input.
A reconfigurable NAND/NOR genetic logic gate.
Goñi-Moreno, Angel; Amos, Martyn
2012-09-18
Engineering genetic Boolean logic circuits is a major research theme of synthetic biology. By altering or introducing connections between genetic components, novel regulatory networks are built in order to mimic the behaviour of electronic devices such as logic gates. While electronics is a highly standardized science, genetic logic is still in its infancy, with few agreed standards. In this paper we focus on the interpretation of logical values in terms of molecular concentrations. We describe the results of computational investigations of a novel circuit that is able to trigger specific differential responses depending on the input standard used. The circuit can therefore be dynamically reconfigured (without modification) to serve as both a NAND/NOR logic gate. This multi-functional behaviour is achieved by a) varying the meanings of inputs, and b) using branch predictions (as in computer science) to display a constrained output. A thorough computational study is performed, which provides valuable insights for the future laboratory validation. The simulations focus on both single-cell and population behaviours. The latter give particular insights into the spatial behaviour of our engineered cells on a surface with a non-homogeneous distribution of inputs. We present a dynamically-reconfigurable NAND/NOR genetic logic circuit that can be switched between modes of operation via a simple shift in input signal concentration. The circuit addresses important issues in genetic logic that will have significance for more complex synthetic biology applications.
Building Toffoli Network for Reversible Logic Synthesis Based on Swapping Bit Strings
Babu, Hafiz Md Hasaan; Islam, Md Rafiqul; Jamal, Lafifa; Ferdaus, Abu Ahmed; Karim, Muhammad Rezaul; Mahmud, Abdullah Al
2010-01-01
In this paper, we have implemented and designed a sorting network for reversible logic circuits synthesis in terms of n*n Toffoli gates. The algorithm presented in this paper constructs a Toffoli Network based on swapping bit strings. Reduction rules are then applied by simple template matching and removing useless gates from the network. Random selection of bit strings and reduction of control inputs are used to minimize both the number of gates and gate width. The method produces near optimal results for up to 3-input 3-output circuits.
Parallel transport quantum logic gates with trapped ions
de Clercq, Ludwig; Marinelli, Matteo; Nadlinger, David; Oswald, Robin; Negnevitsky, Vlad; Kienzler, Daniel; Keitch, Ben; Home, Jonathan P
2015-01-01
Quantum information processing will require combinations of gate operations and communication, with each applied in parallel to large numbers of quantum systems. These tasks are often performed sequentially, with gates implemented by pulsed fields and information transported either by moving the physical qubits or using photonic links. For trapped ions, an alternative approach is to implement quantum logic gates by transporting the ions through static laser beams, combining qubit operations with transport. This has significant advantages for scalability since the voltage waveforms required for transport can potentially be generated using micro-electronics integrated into the trap structure itself, while both optical and microwave control elements are significantly more bulky. Using a multi-zone ion trap, we demonstrate transport gates on a qubit encoded in the hyperfine structure of a beryllium ion. We show the ability to perform sequences of operations, and to perform parallel gates on two ions transported t...
Molecular AND logic gate based on bacterial anaerobic respiration.
Arugula, Mary Anitha; Shroff, Namita; Katz, Evgeny; He, Zhen
2012-10-21
Enzyme coding genes that integrate information for anaerobic respiration in Shewanella oneidensis MR-1 were used as input for constructing an AND logic gate. The absence of one or both genes inhibited electrochemically-controlled anaerobic respiration, while wild type bacteria were capable of accepting electrons from an electrode for DMSO reduction.
Microdroplet-based universal logic gates by electrorheological fluid
Zhang, Mengying
2011-01-01
We demonstrate a uniquely designed microfluid logic gate with universal functionality, which is capable of conducting all 16 logic operations in one chip, with different input voltage combinations. A kind of smart colloid, giant electrorheological (GER) fluid, functions as the translation media among fluidic, electronic and mechanic information, providing us with the capability of performing large integrations either on-chip or off-chip, while the on-chip hybrid circuit is formed by the interconnection of the electric components and fluidic channels, where the individual microdroplets travelling in a channel represents a bit. The universal logic gate reveals the possibilities of achieving a large-scale microfluidic processor with more complexity for on-chip processing for biological, chemical as well as computational experiments. © 2011 The Royal Society of Chemistry.
Divide and control: split design of multi-input DNA logic gates.
Gerasimova, Yulia V; Kolpashchikov, Dmitry M
2015-01-18
Logic gates made of DNA have received significant attention as biocompatible building blocks for molecular circuits. The majority of DNA logic gates, however, are controlled by the minimum number of inputs: one, two or three. Here we report a strategy to design a multi-input logic gate by splitting a DNA construct.
Wang, Baojun; Buck, Martin
2014-10-11
We designed and constructed versatile modular genetic logic gates in bacterial cells. These function as digital logic 1-input Buffer gate, 2-input and 3-input AND gates with one inverted input and integrate multiple chemical input signals in customised logic manners. Such rapidly engineered devices serve to achieve increased sensing signal selectivity.
Construction of DNA logic gates utilizing a H+/Ag+ induced i-motif structure.
Shi, Yunhua; Sun, Hongxia; Xiang, Junfeng; Chen, Hongbo; Yang, Qianfan; Guan, Aijiao; Li, Qian; Yu, Lijia; Tang, Yalin
2014-12-18
A simple technology to construct diverse DNA logic gates (OR and INHIBIT) has been designed utilizing a H(+) and/or Ag(+) induced i-motif structure. The logic gates are easily controlled and also show a real time response towards inputs. The research provides a new insight for designing DNA logic gates using an i-motif DNA structure.
Rapidly reconfigurable all-optical universal logic gate
Goddard, Lynford L.; Bond, Tiziana C.; Kallman, Jeffrey S.
2010-09-07
A new reconfigurable cascadable all-optical on-chip device is presented. The gate operates by combining the Vernier effect with a novel effect, the gain-index lever, to help shift the dominant lasing mode from a mode where the laser light is output at one facet to a mode where it is output at the other facet. Since the laser remains above threshold, the speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal optical modulation speed of the laser, which can be on the order of up to about tens of GHz. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog optical or electrical signal at the gate selection port. Other all-optical functionality includes wavelength conversion, signal duplication, threshold switching, analog to digital conversion, digital to analog conversion, signal routing, and environment sensing. Since each gate can perform different operations, the functionality of such a cascaded circuit grows exponentially.
MoS2 based dual input logic AND gate
Martinez, Luis M.; Pinto, Nicholas J.; Naylor, Carl H.; Johnson, A. T. Charlie
2016-12-01
Crystalline monolayers of CVD MoS2 are used as the active semiconducting channel in a split-gate field effect transistor. The device demonstrates logic AND functionality that is controlled by independently addressing each gate terminal with ±10V. When +10V was simultaneously applied to both gates, the device was conductive (ON), while any other combination of gate voltages rendered the device resistive (OFF). The ON/OFF ratio of the device was ˜ 35 and the charge mobility using silicon nitride as the gate dielectric was 1.2cm2/V-s and 0.1cm2/V-s in the ON and OFF states respectively. Clear discrimination between the two states was observed when a simple circuit containing a load resistor was used to test the device logic AND functionality at 10Hz. One advantage is that split gate technology can reduce the number of devices required in complex circuits, leading to compact electronics and large scale integration based on intrinsic 2-D semiconducting materials.
Wu, Shing-Trong; Fuh, Andy Ying-Guey; Ho, Shau-Jung; Li, Ming-Shian
2015-03-01
This study investigates the bichromatic tuning of cholesteric liquid crystal (CLC) reflection bands from reflectors containing chiral azo dopants. Because the chiral azo molecules change their helical twist power in reversible photoisomerization, the reflection bands of the CLCs are modulated using purple and green laser beams. The CLC reflectors are integrated into an optical gate that can be used to modulate output spectra. We also apply the integrated system in optical switching and logic.
Budyka, Mikhail F; Li, Vitalii M
2017-01-18
Using molecular logic gates (MLGs) for information processing attracts attention due to perspectives of creating molecular computers. Biphotochromic dyads are suitable models of photonic MLGs. However, they suffer from one weakness: the activity of one of the photochromes is often quenched because of Förster resonance energy transfer (FRET). Herein, we designed a dyad with reduced FRET, in which both photochromes keep their photoactivity thanks to spectral and spatial separation, allowing MLG switching between different states. This novel dyad reproduces the functionality of the full set of 16 two-input gates, as well a reversible gate-dual inverter, all gates are photonic. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
S. M. Afanador-Delgado; R. Jaimes-Reátegui; Sevilla-Escoboza, R.; G. Huerta-Cuéllar; J. H. García-López; D. López Mancilla; L. A. Camacho-Castillo; C. E. Castañeda-Hernández
2013-01-01
We implement an algorithm to reproduce the behavior of a dynamic logic gate which consists of three elements: a fiber laser in chaotic regime, a threshold controller and the output of the logic gate. The output signal of the fiber laser is sent to the logic gate input as to the threshold controller; threshold controller output signal is sent at the entrance of the logic gate and also fed back to the fiber laser which changes their dynamic behavior. The output of the logic gate consists of a d...
Fault Model for Testable Reversible Toffoli Gates
Directory of Open Access Journals (Sweden)
Yu Pang
2012-09-01
Full Text Available Techniques of reversible circuits can be used in low-power microchips and quantum communications. Current most works focuses on synthesis of reversible circuits but seldom for fault testing which is sure to be an important step in any robust implementation. In this study, we propose a Universal Toffoli Gate (UTG with four inputs which can realize all basic Boolean functions. The all single stuck-at faults are analyzed and a test-set with minimum test vectors is given. Using the proposed UTG, it is easy to implement a complex reversible circuit and test all stuck-at faults of the circuit. The experiments show that reversible circuits constructed by the UTGs have less quantum cost and test vectors compared to other works.
Construction of a fuzzy and all Boolean logic gates based on DNA
DEFF Research Database (Denmark)
M. Zadegan, Reza; Jepsen, Mette D E; Hildebrandt, Lasse
2015-01-01
computing and biosensing. The ideal logic gate system should provide a wide selection of logical operations, and be integrable in multiple copies into more complex structures. Here we show the successful construction of a small DNA-based logic gate complex that produces fluorescent outputs corresponding......Logic gates are devices that can perform logical operations by transforming a set of inputs into a predictable single detectable output. The hybridization properties, structure, and function of nucleic acids can be used to make DNA-based logic gates. These devices are important modules in molecular...... to the operation of the six Boolean logic gates AND, NAND, OR, NOR, XOR, and XNOR. The logic gate complex is shown to work also when implemented in a three-dimensional DNA origami box structure, where it controlled the position of the lid in a closed or open position. Implementation of multiple microRNA sensitive...
Universal logic gates via liquid-electronic hybrid divider
Zhou, Bingpu
2012-01-01
We demonstrated two-input microdroplet-based universal logic gates using a liquid-electronic hybrid divider. All 16 Boolean logic functions have been realized by manipulating the applied voltages. The novel platform consists of a microfluidic chip with integrated microdroplet detectors and external electronic components. The microdroplet detectors act as the communication media for fluidic and electronic information exchange. The presence or absence of microdroplets at the detector translates into the binary signal 1 or 0. The embedded micro-mechanical pneumatically actuated valve (PAV), fabricated using the well-developed multilayer soft lithography technique, offers biocompatibility, flexibility and accuracy for the on-chip realization of different logic functions. The microfluidic chip can be scaled up to construct large-scale microfluidic logic computation. On the other hand, the microfluidic chip with a specific logic function can be applied to droplet-based chemical reactions for on-demand bio or chemical analysis. Our experimental results have presented an autonomously driven, precision-controlled microfluidic chip for chemical reactions based on the IF logic function. © 2012 The Royal Society of Chemistry.
Fault tolerant reversible logic synthesis: Carry look-ahead and carry-skip adders
Islam, Md Saiful; Begum, Zerina; Hafiz, Mohd Zulfiquar; 10.1109/ACTEA.2009.5227871
2010-01-01
Irreversible logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its corresponding output vector. Reversible logic circuit naturally takes care of heating because it implements only the functions that have one-to-one mapping between its input and output vectors. Therefore reversible logic design becomes one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient approaches for designing reversible fast adders that implement carry look-ahead and carry-skip logic. The proposed 16-bit high speed reversible adder will include IG gates for the realization of its basic building block. The IG gate is universal in the sense that it can be used to synthesize any arbitrary Boolean-functions. The IG gate is parity preserving, that is, the parity of the input...
Pyrene-based dual-mode fluorescence switches and logic gates that function in solution and film.
Zhou, Weidong; Li, Yongjun; Li, Yuliang; Liu, Huibiao; Wang, Shu; Li, Cuihong; Yuan, Mingjian; Liu, Xiaofeng; Zhu, Daoben
2006-07-17
A dual-mode fluorescence switch controlled by external inputs such as protons and metal ions is described, and each state corresponds to a specific fluorescent emission peak. Based on the reversible changes of the fluorescence emission of the switch responding to different external stimuli, the corresponding integrated logic gates and communication networks have been constructed in solid film or in solution.
Delay Optimization of Low Power Reversible Gate using MOS Transistor Level design
Directory of Open Access Journals (Sweden)
Mukesh Kumar Kushwaha
2015-10-01
Full Text Available In Semiconductor industry has witnessed and explosive growth of integration of sophisticated multimedia base application onto mobile electronic gadget since the last decade. The critical concern in this aspect is to reduce the power consumption beyond a certain range of operating frequency. An important factor in the design of VLSI circuits is the choices of reversible logic. Basically conventionally digital circuits have been implemented using the logic gates, which were irreversible in nature only NOT gate are reversible. These irreversible gates produce energy loss due to the information bits lost during the operation information loss occurs because the total number of output signals generated is less than total number of input signals applied. In reversible if the input vector can be uniquely recovered from the output vector and if there is a one to one correspondence between its input and output logic. This paper present a new representation of existing reversible gate in MOS transistor. The MOS transistor designing using a gate diffusion input. Those new representation of MOS transistor has a hoping future in design of low power consumption circuits and high speed application
Design of Low Power Vedic Multiplier Based on Reversible Logic
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Sagar
2017-03-01
Full Text Available Reversible logic is a new technique to reduce the power dissipation. There is no loss of information in reversible logic and produces unique output for specified inputs and vice-versa. There is no loss of bits so the power dissipation is reduced. In this paper new design for high speed, low power and area efficient 8-bit Vedic multiplier using Urdhva Tiryakbhyam Sutra (ancient methodology of Indian mathematics is introduced and implemented using Reversible logic to generate products with low power dissipation. UT Sutra generates partial product and sum in single step with less number of adders unit when compare to conventional booth and array multipliers which will reduce the delay and area utilized, Reversible logic will reduce the power dissipation. An 8-bit Vedic multiplier is realized using a 4-bit Vedic multiplier and modified ripple carry adders. The proposed logic blocks are implemented using Verilog HDL programming language, simulation using Xilinx ISE software.
Designing reversible arithmetic, logic circuit to implement micro-operation in quantum computation
Kalita, Gunajit; Saikia, Navajit
2016-10-01
The futuristic computing is desired to be more power full with low-power consumption. That is why quantum computing has been a key area of research for quite some time and is getting more and more attention. Quantum logic being reversible, a significant amount of contributions has been reported on reversible logic in recent times. Reversible circuits are essential parts of quantum computers, and hence their designs are of great importance. In this paper, designs of reversible circuits are proposed using a recently proposed reversible gate for arithmetic and logic operations to implement various micro-operations (simple add and subtract, add with carry, subtract with borrow, transfer, incrementing, decrementing etc., and logic operations like XOR, XNOR, complementing etc.) in a reversible computer like quantum computer. The two new reversible designs proposed here for half adder and full adders are also used in the presented reversible circuits to implement various microoperations. The quantum costs of these designs are comparable. Many of the implemented micro-operations are not seen in previous literatures. The performances of the proposed circuits are compared with existing designs wherever available.
DNA Sequential Logic Gate Using Two-Ring DNA.
Zhang, Cheng; Shen, Linjing; Liang, Chao; Dong, Yafei; Yang, Jing; Xu, Jin
2016-04-13
Sequential DNA detection is a fundamental issue for elucidating the interactive relationships among complex gene systems. Here, a sequential logic DNA gate was achieved by utilizing the two-ring DNA structure, with the ability to recognize "before" and "after" triggering sequences of DNA signals. By taking advantage of a "loop-open" mechanism, separations of two-ring DNAs were controlled. Three triggering pathways with different sequential DNA treatments were distinguished by comparing fluorescent outputs. Programmed nanoparticle arrangement guided by "interlocked" two-ring DNA was also constructed to demonstrate the achievement of designed nanostrucutres. Such sequential logic DNA operation may guide future molecular sensors to monitor more complex gene network in biological systems.
Reversible Logic Based Concurrent Error Detection Methodology For Emerging Nanocircuits
Thapliyal, Himanshu
2011-01-01
Reversible logic has promising applications in emerging nanotechnologies, such as quantum computing, quantum dot cellular automata and optical computing, etc. Faults in reversible logic circuits that result in multi-bit error at the outputs are very tough to detect, and thus in literature, researchers have only addressed the problem of online testing of faults that result single-bit error at the outputs based on parity preserving logic. In this work, we propose a methodology for the concurrent error detection in reversible logic circuits to detect faults that can result in multi-bit error at the outputs. The methodology is based on the inverse property of reversible logic and is termed as 'inverse and compare' method. By using the inverse property of reversible logic, all the inputs can be regenerated at the outputs. Thus, by comparing the original inputs with the regenerated inputs, the faults in reversible circuits can be detected. Minimizing the garbage outputs is one of the main goals in reversible logic ...
A New DNA-based Logical Gate Comes into Being
Institute of Scientific and Technical Information of China (English)
无
2006-01-01
@@ Across-disciplinary research team, headed by Prof. FAN Chunhai from the CAS Shanghai Institute of Applied Physics, Prof. HE Lin, a CAS Member, and Prof. ZHANG Zhizhou at the Bio-X Research Center under Shanghai Jiao Tong University (SJTU), succeeded in developing a new type of logical gates by applying the deoxyribozyme (DNAzyme), adding a new brick to the groundwork of a DNA-based computation. The related research results have been reported on the German journal Angew. Chem. Int.Ed., 2006, 45, 1759.
Three-Function Logic Gate Controlled by Analog Voltage
Zebulum, Ricardo; Stoica, Adrian
2006-01-01
The figure is a schematic diagram of a complementary metal oxide/semiconductor (CMOS) electronic circuit that performs one of three different logic functions, depending on the level of an externally applied control voltage, V(sub sel). Specifically, the circuit acts as A NAND gate at V(sub sel) = 0.0 V, A wire (the output equals one of the inputs) at V(sub sel) = 1.0 V, or An AND gate at V(sub sel) = -1.8 V. [The nominal power-supply potential (VDD) and logic "1" potential of this circuit is 1.8 V.] Like other multifunctional circuits described in several prior NASA Tech Briefs articles, this circuit was synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. An evolved circuit can be tested by computational simulation and/or tested in real hardware, and the results of the test can provide guidance for refining the design through further iteration. The evolutionary synthesis of electronic circuits can now be implemented by means of a software package Genetic Algorithms for Circuit Synthesis (GACS) that was developed specifically for this purpose. GACS was used to synthesize the present trifunctional circuit. As in the cases of other multifunctional circuits described in several prior NASA Tech Briefs articles, the multiple functionality of this circuit, the use of a single control voltage to select the function, and the automated evolutionary approach to synthesis all contribute synergistically to a combination of features that are potentially advantageous for the further development of robust, multiple-function logic circuits, including, especially, field-programmable gate arrays (FPGAs). These advantages include the following: This circuit contains only 9 transistors about half the number of transistors that would be needed to obtain equivalent NAND/wire/AND functionality by use of components from a standard digital design library. If
Aptamer-Binding Directed DNA Origami Pattern for Logic Gates.
Yang, Jing; Jiang, Shuoxing; Liu, Xiangrong; Pan, Linqiang; Zhang, Cheng
2016-12-14
In this study, an aptamer-substrate strategy is introduced to control programmable DNA origami pattern. Combined with DNA aptamer-substrate binding and DNAzyme-cutting, small DNA tiles were specifically controlled to fill into the predesigned DNA origami frame. Here, a set of DNA logic gates (OR, YES, and AND) are performed in response to the stimuli of adenosine triphosphate (ATP) and cocaine. The experimental results are confirmed by AFM imaging and time-dependent fluorescence changes, demonstrating that the geometric patterns are regulated in a controllable and programmable manner. Our approach provides a new platform for engineering programmable origami nanopatterns and constructing complex DNA nanodevices.
Goswami, Shyamaprosad; Manna, Abhishek; Paul, Sima; Aich, Krishnendu; Das, Avijit K; Chakraborty, Shampa
2013-06-14
In this study, we have synthesized a simple Schiff base type isophthaloyl salicylaldehyde hydrazone (ISH) moiety which selectively detects Al(III) and PPi with a fluorescence enhancement at two different wavelengths in aqueous solution. The sensing phenomenon is also reversible and thus the sensor beautifully mimics logic gates (INHIBIT and EXOR gates).
Entanglement of Formation for Werner States and Isotropic States via Logical Gates
Bertini, Cesarino; Chiara, Maria Luisa Dalla; Leporini, Roberto
To what extent is a logical characterization of entanglement possible? We investigate some correlations that hold between the concept of entanglement of formation for Werner states and for isotropic states and the probabilistic behavior of some quantum logical gates.
Rational Design of a Fusion Protein to Exhibit Disulfide-Mediated Logic Gate Behavior
2015-01-01
Synthetic cellular logic gates are primarily built from gene circuits owing to their inherent modularity. Single proteins can also possess logic gate functions and offer the potential to be simpler, quicker, and less dependent on cellular resources than gene circuits. However, the design of protein logic gates that are modular and integrate with other cellular components is a considerable challenge. As a step toward addressing this challenge, we describe the design, construction, and characterization of AND, ORN, and YES logic gates built by introducing disulfide bonds into RG13, a fusion of maltose binding protein and TEM-1 β-lactamase for which maltose is an allosteric activator of enzyme activity. We rationally designed these disulfide bonds to manipulate RG13’s allosteric regulation mechanism such that the gating had maltose and reducing agents as input signals, and the gates could be toggled between different gating functions using redox agents, although some gates performed suboptimally. PMID:25144732
Parallel logic gates in synthetic gene networks induced by non-Gaussian noise.
Xu, Yong; Jin, Xiaoqin; Zhang, Huiqing
2013-11-01
The recent idea of logical stochastic resonance is verified in synthetic gene networks induced by non-Gaussian noise. We realize the switching between two kinds of logic gates under optimal moderate noise intensity by varying two different tunable parameters in a single gene network. Furthermore, in order to obtain more logic operations, thus providing additional information processing capacity, we obtain in a two-dimensional toggle switch model two complementary logic gates and realize the transformation between two logic gates via the methods of changing different parameters. These simulated results contribute to improve the computational power and functionality of the networks.
Orthogonal Ambipolar Semiconductor Nanostructures for Complementary Logic Gates.
Huang, Weiguo; Markwart, Jens C; Briseno, Alejandro L; Hayward, Ryan C
2016-09-27
We report orthogonal ambipolar semiconductors that exhibit hole and electron transport in perpendicular directions based on aligned films of nanocrystalline "shish-kebabs" containing poly(3-hexylthiophene) (P3HT) and N,N'-di-n-octyl-3,4,9,10-perylenetetracarboxylic diimide (PDI) as p- and n-type components, respectively. Polarized optical microscopy, scanning electron microscopy, and X-ray diffraction measurements reveal a high degree of in-plane alignment. Relying on the orientation of interdigitated electrodes to enable efficient charge transport from either the respective p- or n-channel materials, we demonstrate semiconductor films with high anisotropy in the sign of charge carriers. Films of these aligned crystalline semiconductors were used to fabricate complementary inverter devices, which exhibited good switching behavior and a high noise margin of 80% of 1/2 Vdd. Moreover, complementary "NAND" and "NOR" logic gates were fabricated and found to exhibit excellent voltage transfer characteristics and low static power consumption. The ability to optimize the performance of these devices, simply by adjusting the solution concentrations of P3HT and PDI, makes this a simple and versatile method for preparing ambipolar organic semiconductor devices and high-performance logic gates. Further, we demonstrate that this method can also be applied to mixtures of PDI with another conjugated polymer, poly[2,5-bis(3-tetradecylthiophen-2-yl)thieno[3,2-b]thiophene]) (PBTTT), with better hole transport characteristics than P3HT, opening the door to orthogonal ambipolar semiconductors with higher performance.
A New Design Technique of Reversible BCD Adder Based on NMOS With Pass Transistor Gates
Hossain, Md Sazzad; Rahman, Md Motiur; Hossain, A S M Delowar; Hasan, Md Minul
2012-01-01
In this paper, we have proposed a new design technique of BCD Adder using newly constructed reversible gates are based on NMOS with pass transistor gates, where the conventional reversible gates are based on CMOS with transmission gates. We also compare the proposed reversible gates with the conventional CMOS reversible gates which show that the required number of Transistors is significantly reduced.
An Area Efficient and High Speed Reversible Multiplier Using NS Gate
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Venkateswarlu
2017-01-01
Full Text Available In digital computer system a major problem has been found that the Power dissipation which leads to bring some research on the methods to decrease this Area efficient, high speed. This is the main cause to give birth to reversible computing systems for digital computers and designs. Reversible computing is the path to future computing technologies, which all happen to use reversible logic. In addition, reversible computing will become mandatory because of the necessity to decrease power consumption. Reversible logic circuits have the same number of inputs and outputs, and have one-to-one mapping between vectors of inputs and outputs; thus the vector of input states can be always reconstructed from the vector of output states. Consequently, a computation is reversible, if it is always possible to uniquely recover the input, given the output. Each gate can be made reversible by adding some additional input and output wires if necessary. The main aim of this reversible computing is to lower the power dissipation, area efficient and high speed and some other advantages like security of data and prevention of errors etc... Reversible logic has so many applications low power CMOS, nanotechnology, DNA computing and quantum computing. There are two primary design implementations in this study which are the major spotlights. The first one is reversible design gate and the second one is multiplier design using reversible gates. In this manuscript we have implemented a 8 * 8 reversible design called “NSG(Non linear Sign Flip”. The total project is implemented in Xilinx 14.7 ISE with Spartan 3E family
Efficient carry skip Adder design using full adder and carry skip block based on reversible Logic
Directory of Open Access Journals (Sweden)
Varun Pratap Singh
2015-12-01
Full Text Available In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Quantum Computing, Nanotechnology, and Optical Computing. Reversibility plays an important role when energy efficient computations are considered. In this paper, binary full Adder with Design I and Design II are proposed. The performance analysis is verified using number of reversible gates, Garbage input/outputs, delay, number of logical calculations and Quantum Cost. According to the suitability of full adder design I and design II carry skip adder block is also constructed with some improvement in terms of delay in block carry generation. It is observed that Reversible carry skip Binary Adder with Design II is efficient compared to Design I
Construction of a fuzzy and Boolean logic gates based on DNA.
Zadegan, Reza M; Jepsen, Mette D E; Hildebrandt, Lasse L; Birkedal, Victoria; Kjems, Jørgen
2015-04-17
Logic gates are devices that can perform logical operations by transforming a set of inputs into a predictable single detectable output. The hybridization properties, structure, and function of nucleic acids can be used to make DNA-based logic gates. These devices are important modules in molecular computing and biosensing. The ideal logic gate system should provide a wide selection of logical operations, and be integrable in multiple copies into more complex structures. Here we show the successful construction of a small DNA-based logic gate complex that produces fluorescent outputs corresponding to the operation of the six Boolean logic gates AND, NAND, OR, NOR, XOR, and XNOR. The logic gate complex is shown to work also when implemented in a three-dimensional DNA origami box structure, where it controlled the position of the lid in a closed or open position. Implementation of multiple microRNA sensitive DNA locks on one DNA origami box structure enabled fuzzy logical operation that allows biosensing of complex molecular signals. Integrating logic gates with DNA origami systems opens a vast avenue to applications in the fields of nanomedicine for diagnostics and therapeutics.
MOSFET-like CNFET based logic gate library for low-power application: a comparative study
Gowri Sankar, P. A.; Udhayakumar, K.
2014-07-01
The next generation of logic gate devices are expected to depend upon radically new technologies mainly due to the increasing difficulties and limitations of existing CMOS technology. MOSFET like CNFETs should ideally be the best devices to work with for high-performance VLSI. This paper presents results of a comprehensive comparative study of MOSFET-like carbon nanotube field effect transistors (CNFETs) technology based logic gate library for high-speed, low-power operation than conventional bulk CMOS libraries. It focuses on comparing four promising logic families namely: complementary-CMOS (C-CMOS), transmission gate (TG), complementary pass logic (CPL) and Domino logic (DL) styles are presented. Based on these logic styles, the proposed library of static and dynamic NAND-NOR logic gates, XOR, multiplexer and full adder functions are implemented efficiently and carefully analyzed with a test bench to measure propagation delay and power dissipation as a function of supply voltage. This analysis provides the right choice of logic style for low-power, high-speed applications. Proposed logic gates libraries are simulated using Synopsys HSPICE based on the standard 32 nm CNFET model. The simulation results demonstrate that, it is best to use C-CMOS logic style gates that are implemented in CNFET technology which are superior in performance compared to other logic styles, because of their low average power-delay-product (PDP). The analysis also demonstrates how the optimum supply voltage varies with logic styles in ultra-low power systems. The robustness of the proposed logic gate library is also compared with conventional and state-art of CMOS logic gate libraries.
Design and Performance Analysis of Reversible Logic Four Quadrant Multiplier Using CSLA and CLAA
Directory of Open Access Journals (Sweden)
Mr. P. Dileep Kumar Reddy
2014-03-01
Full Text Available Multiplication is a fundamental operation in most signal processing algorithms. Multipliers have large area, long latency and consume considerable power. Therefore low-power multiplier design has been an important part in low- power VLSI system design. There has been extensive work on low-power multipliers at technology, physical, circuit and logic levels. A system’s performance is generally determined by the performance of the multiplier because the multiplier is generally the slowest element in the system. Furthermore, it is generally the most area consuming. Hence, optimizing the speed and area of the multiplier is a major design issue. However, area and speed are usually conflicting constraints so that improving speed results mostly in larger areas. As a result, a whole spectrum of multipliers with different area- speed constraints has been designed with reversible logic gates. The reversible logic has the promising applications in emerging computing paradigm such as quantum computing, quantum dot cellular automata, optical computing, etc. In reversible logic gates there is a unique one-to-one mapping between the inputs and outputs.
Enzymatic AND logic gates operated under conditions characteristic of biomedical applications.
Melnikov, Dmitriy; Strack, Guinevere; Zhou, Jian; Windmiller, Joshua Ray; Halámek, Jan; Bocharova, Vera; Chuang, Min-Chieh; Santhosh, Padmanabhan; Privman, Vladimir; Wang, Joseph; Katz, Evgeny
2010-09-23
Experimental and theoretical analyses of the lactate dehydrogenase and glutathione reductase based enzymatic AND logic gates in which the enzymes and their substrates serve as logic inputs are performed. These two systems are examples of the novel, previously unexplored class of biochemical logic gates that illustrate potential biomedical applications of biochemical logic. They are characterized by input concentrations at logic 0 and 1 states corresponding to normal and pathophysiological conditions. Our analysis shows that the logic gates under investigation have similar noise characteristics. Both significantly amplify random noise present in inputs; however, we establish that for realistic widths of the input noise distributions, it is still possible to differentiate between the logic 0 and 1 states of the output. This indicates that reliable detection of pathophysiological conditions is indeed possible with such enzyme logic systems.
SynBioLGDB: a resource for experimentally validated logic gates in synthetic biology
Wang, Liqiang; Qian, Kun; Huang, Yan; Jin, Nana; Lai, Hongyan; Zhang, Ting; Li, Chunhua; Zhang, Chunrui; Bi, Xiaoman; Wu, Deng; Wang, Changliang; Wu, Hao; Tan, Puwen; Lu, Jianping; Chen, Liqun; Li, Kongning; Li, Xia; Wang, Dong
2015-01-01
Synthetic biologists have developed DNA/molecular modules that perform genetic logic operations in living cells to track key moments in a cell's life or change the fate of a cell. Increasing evidence has also revealed that diverse genetic logic gates capable of generating a Boolean function play critically important roles in synthetic biology. Basic genetic logic gates have been designed to combine biological science with digital logic. SynBioLGDB (http://bioinformatics.ac.cn/synbiolgdb/) aims to provide the synthetic biology community with a useful resource for efficient browsing and visualization of genetic logic gates. The current version of SynBioLGDB documents more than 189 genetic logic gates with experimental evidence involving 80 AND gates and 16 NOR gates, etc. in three species (Human, Escherichia coli and Bacillus clausii). SynBioLGDB provides a user-friendly interface through which conveniently to query and browse detailed information about these genetic logic gates. SynBioLGDB will enable more comprehensive understanding of the connection of genetic logic gates to execute complex cellular functions in living cells.
Two all-optical logic gates in a single photonic interferometer
Araújo, Antônio; Oliveira, Antônio; Martins, Francisco; Coelho, Amarílio; Fraga, Wilton; Nascimento, José
2015-11-01
In this paper is presented the all-optical AND and OR gates with high contrast ratio in a single interferometric configuration, i.e., when two logic signals are modulated in the input of the interferometer, so we have the OR gate in the first output and the AND gate in the second output. These logic gates were obtained by numerical investigation of the Mach-Zehnder interferometer constituted of dual-core nonlinear photonic crystal fiber operating with ultrashort fundamental solitons of 100 fs. To represent the logic information, pulse amplitude modulation by amplitude shift-keying was used.
Switchable electrode controlled by Boolean logic gates using enzymes as input signals.
Wang, Xuemei; Zhou, Jian; Tam, Tsz Kin; Katz, Evgeny; Pita, Marcos
2009-11-01
Application of Boolean logic operations performed by enzymes to control electrochemical systems is presented. Indium-tin oxide (ITO) electrodes with the surface modified with poly-4-vinyl pyridine (P4VP) brush were synthesized and used as switchable electrochemical systems. The switch ON and OFF of the electrode activity were achieved by pH changes generated in situ by biocatalytic reactions in the presence of enzymes used as input signals. Two logic gates operating as AND/OR Boolean functions were designed using invertase and glucose oxidase or esterase and glucose oxidase as input signals, respectively. The electrode surface coated with a shrunk P4VP polymer at neutral pH values was not electrochemically active because of the blocking effect of the polymer film. The positive outputs of the logic operations yielded a pH drop to acidic conditions, resulting in the protonation and swelling of the P4VP polymer allowing penetration of a soluble redox probe to the conducting support, thus switching the electrode activity ON. The electrode interface was reset to the initial OFF state, with the inhibited electrochemical reaction, upon in situ pH increase generated by another enzymatic reaction in the presence of urease. Logically processed biochemical inputs of various enzymes allowed reversible activation-inactivation of the electrochemical reaction.
Misalignment-free signal propagation in nanomagnet arrays and logic gates with 45°-clocking field
Energy Technology Data Exchange (ETDEWEB)
Li, Zheng; Kwon, Byung Seok; Krishnan, Kannan M., E-mail: kannanmk@uw.edu [Department of Materials Science and Engineering University of Washington, Box 352120, Seattle, Washington 98195 (United States)
2014-05-07
A key obstacle for the application of Magnetic Quantum-dot Cellular Automata (MQCA) is the misalignment of clocking field, which results in low stability for both signal propagations within nanomagnet array and logic operation in majority gates. Here, we demonstrate that a reversal clocking field applied at 45° off the hard axis, with progressively reduced amplitude, applied to a shape-tuned nanomagnet array fabricated by e-beam lithography, helps intrinsically eliminate the misalignment sensitivity of the elements and results in correct signal propagation. Further, least reversal steps and reduced field amplitude was required owing to the 45°-clocking field. This clocking field was also tested for majority gates (OR function) and characterized by Magnetic Force Microscopy demonstrating correct output. This novel design provides high stability for signal propagation and logic operation of MQCA and potentially paves way for its application.
Misalignment-free signal propagation in nanomagnet arrays and logic gates with 45Â°-clocking field
Li, Zheng; Kwon, Byung Seok; Krishnan, Kannan M.
2014-05-01
A key obstacle for the application of Magnetic Quantum-dot Cellular Automata (MQCA) is the misalignment of clocking field, which results in low stability for both signal propagations within nanomagnet array and logic operation in majority gates. Here, we demonstrate that a reversal clocking field applied at 45° off the hard axis, with progressively reduced amplitude, applied to a shape-tuned nanomagnet array fabricated by e-beam lithography, helps intrinsically eliminate the misalignment sensitivity of the elements and results in correct signal propagation. Further, least reversal steps and reduced field amplitude was required owing to the 45°-clocking field. This clocking field was also tested for majority gates (OR function) and characterized by Magnetic Force Microscopy demonstrating correct output. This novel design provides high stability for signal propagation and logic operation of MQCA and potentially paves way for its application.
Reversible arithmetic logic unit for quantum arithmetic
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Glück, Robert; Axelsen, Holger Bock
2010-01-01
-bit operands and does not use ancillae. This remarkable low resource consumption was achieved by generalizing the V-shape design first introduced for quantum ripple-carry adders and nesting multiple V-shapes in a novel integrated design. This communication shows that the realization of an efficient reversible...
Electrochemically controlled assembly and logic gates operations of gold nanoparticle arrays.
Frasconi, Marco; Mazzei, Franco
2012-02-14
The reversible assembly of β-cyclodextrin-functionalized gold NPs (β-CD Au NPs) is studied on mixed self-assembled monolayer (SAM), formed by coadsorption of redox-active ferrocenylalkylthiols and n-alkanethiols on gold surfaces. The surface coverage and spatial distribution of the β-CD Au NPs monolayer on the gold substrate are tuned by the self-assembled monolayer composition. The binding and release of β-CD Au NPs to and from the SAMs modified surface are followed by surface plasmon resonance (SPR) spectroscopy. The redox state of the tethered ferrocene in binary SAMs controls the formation of the supramolecular interaction between ferrocene moieties and β-CD-capped Au NPs. As a result, the potential-induced uptake and release of β-CD Au NPs to and from the surface is accomplished. The competitive binding of β-CD Au NPs with guest molecules in solution shifted the equilibrium of the complexation-decomplexation process involving the supramolecular interaction with the Fc-functionalized surface. The dual controlled assembly of β-CD Au NPs on the surface enabled to use two stimuli as inputs for logic gate activation; the coupling between the localized surface plasmon, associated with the Au NP, and the surface plasmon wave, associated with the thin metal surface, is implemented as readout signal for "AND" logic gate operations.
A New Design Technique of Reversible BCD Adder Based on NMOS with Pass Transistor Gates
Directory of Open Access Journals (Sweden)
Md. Sazzad Hossain
2011-12-01
Full Text Available In this paper, we have proposed a new design technique of BCD Adder using newly constructed reversible gates are based on NMOS with pass transistor gates, where the conventional reversible gates are based on CMOS with transmission gates. We also compare the proposed reversible gates with the conventional CMOS reversible gates which show that the required number of Transistors is significantly reduced.
Acoustic logic gates and Boolean operation based on self-collimating acoustic beams
Zhang, Ting; Cheng, Ying; Guo, Jian-zhong; Xu, Jian-yi; Liu, Xiao-jun
2015-03-01
The reveal of self-collimation effect in two-dimensional (2D) photonic or acoustic crystals has opened up possibilities for signal manipulation. In this paper, we have proposed acoustic logic gates based on the linear interference of self-collimated beams in 2D sonic crystals (SCs) with line-defects. The line defects on the diagonal of the 2D square SCs are actually functioning as a 3 dB splitter. By adjusting the phase difference between two input signals, the basic Boolean logic functions such as XOR, OR, AND, and NOT are achieved both theoretically and experimentally. Due to the non-diffracting property of self-collimation beams, more complex Boolean logic and algorithms such as NAND, NOR, and XNOR can be realized by cascading the basic logic gates. The achievement of acoustic logic gates and Boolean operation provides a promising approach for acoustic signal computing and manipulations.
Acoustic logic gates and Boolean operation based on self-collimating acoustic beams
Energy Technology Data Exchange (ETDEWEB)
Zhang, Ting; Xu, Jian-yi [Key Laboratory of Modern Acoustics, Department of Physics and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093 (China); Cheng, Ying, E-mail: chengying@nju.edu.cn; Liu, Xiao-jun, E-mail: liuxiaojun@nju.edu.cn [Key Laboratory of Modern Acoustics, Department of Physics and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093 (China); State Key Laboratory of Acoustics, Chinese Academy of Sciences, Beijing 100190 (China); Guo, Jian-zhong [School of Physics and Information Technology, Shaanxi Normal University, Xian 710119 (China)
2015-03-16
The reveal of self-collimation effect in two-dimensional (2D) photonic or acoustic crystals has opened up possibilities for signal manipulation. In this paper, we have proposed acoustic logic gates based on the linear interference of self-collimated beams in 2D sonic crystals (SCs) with line-defects. The line defects on the diagonal of the 2D square SCs are actually functioning as a 3 dB splitter. By adjusting the phase difference between two input signals, the basic Boolean logic functions such as XOR, OR, AND, and NOT are achieved both theoretically and experimentally. Due to the non-diffracting property of self-collimation beams, more complex Boolean logic and algorithms such as NAND, NOR, and XNOR can be realized by cascading the basic logic gates. The achievement of acoustic logic gates and Boolean operation provides a promising approach for acoustic signal computing and manipulations.
Reversible Logic Elements with Memory and Their Universality
Directory of Open Access Journals (Sweden)
Kenichi Morita
2013-09-01
Full Text Available Reversible computing is a paradigm of computation that reflects physical reversibility, one of the fundamental microscopic laws of Nature. In this survey, we discuss topics on reversible logic elements with memory (RLEM, which can be used to build reversible computing systems, and their universality. An RLEM is called universal, if any reversible sequential machine (RSM can be realized as a circuit composed only of it. Since a finite-state control and a tape cell of a reversible Turing machine (RTM are formalized as RSMs, any RTM can be constructed from a universal RLEM. Here, we investigate 2-state RLEMs, and show that infinitely many kinds of non-degenerate RLEMs are all universal besides only four exceptions. Non-universality of these exceptional RLEMs is also argued.
Design of a novel RTD-based three-variable universal logic gate
Institute of Scientific and Technical Information of China (English)
Mao-qun YAO; Kai YANG; Cong-yuan XU; Ji-zhong SHEN
2015-01-01
Traditional CMOS technology faces some fundamental physical limitations. Therefore, it has become very important for the integrated circuit industry to continue to develop modern devices and new design methods. The threshold logic gate has attracted much attention because of its powerful logic function. The resonant tunneling diode (RTD) is well suited for imple-menting the threshold logic gate because of its high-speed switching capability, negative differential resistance (NDR) charac-teristic, and functional versatility. In this paper, based on the Reed-Muller (RM) algebraic system, a novel method is proposed to convert three-variable non-threshold functions to the XOR of multiple threshold functions, which is simple and has a program-mable implementation. With this approach, all three-variable non-threshold functions can be presented by the XOR of two threshold functions, except for two special functions. On this basis, a novel three-variable universal logic gate (ULG3) is proposed, composed of two RTD-based universal threshold logic gates (UTLG) and an RTD-based three-variable XOR gate (XOR3). The ULG3 has a simple structure, and a simple method is presented to implement all three-variable functions using one ULG3. Thus, the proposed ULG3 provides a new efficient universal logic gate to implement RTD-based arbitrary n-variable functions.
Indian Academy of Sciences (India)
VENKATESH P R; VENKATESAN A; LAKSHMANAN M
2016-06-01
The idea of synchronization can be explicitly demonstrated by both numerical and analytical means on a nonlinear electronic circuit. Also, we introduce a scheme to obtain various logic gate structures, using synchronization of chaotic systems. By a small change in the response parameter of unidirectionally coupled nonlinear systems, one is able to construct various logic behaviours by both numerical and analytical methods.
Logic gates scheme based on Coulomb blockade in metallic nanoclusters with organic ligands
Energy Technology Data Exchange (ETDEWEB)
Cervera, Javier [Facultat de Fisica, Universitat de Valencia, E-46100 Burjassot (Spain); Ramirez, Patricio [Depto. de Fisica Aplicada, Universidad Politecnica de Valencia, E-46022 Valencia (Spain); Mafe, Salvador, E-mail: smafe@uv.e [Facultat de Fisica, Universitat de Valencia, E-46100 Burjassot (Spain)
2010-01-11
We propose a logic gates scheme based on the electron transfer through metallic nanoclusters linked to organic ligands and discuss theoretically the characteristics needed for practical implementation. As a proof-of-the-concept, we demonstrate the OR, AND and NOT gates and study the performance in terms of temperature, applied voltage, and noise.
Directory of Open Access Journals (Sweden)
DARKO STEFANOVIC
2003-05-01
Full Text Available We recently reported the first complete set of molecular-scale logic gates based on deoxyribozymes. Here we report how we tile these logic gates and construct new logic elements: OR, NAND, and the first element with four inputs (i1^i5Ú(i2^i6. Tiling of logic gates was achieved through a common substrate used for core deoxyribozyme; degradation of this substrate defines the output. This kind of connection between logic gates is an implicit-OR tiling, because it suffices that one componenet of the network is active for the whole network to give an output of 1.
Yu, Ruomeng; Wu, Wenzhuo; Pan, Caofeng; Wang, Zhaona; Ding, Yong; Wang, Zhong Lin
2015-02-04
Using polarization charges created at the metal-cadmium sulfide interface under strain to gate/modulate electrical transport and optoelectronic processes of charge carriers, the piezo-phototronic effect is applied to process mechanical and optical stimuli into electronic controlling signals. The cascade nanowire networks are demonstrated for achieving logic gates, binary computations, and gated D latches to store information carried by these stimuli.
The mathematics of a quantum Hamiltonian computing half adder Boolean logic gate.
Dridi, G; Julien, R; Hliwa, M; Joachim, C
2015-08-28
The mathematics behind the quantum Hamiltonian computing (QHC) approach of designing Boolean logic gates with a quantum system are given. Using the quantum eigenvalue repulsion effect, the QHC AND, NAND, OR, NOR, XOR, and NXOR Hamiltonian Boolean matrices are constructed. This is applied to the construction of a QHC half adder Hamiltonian matrix requiring only six quantum states to fullfil a half Boolean logical truth table. The QHC design rules open a nano-architectronic way of constructing Boolean logic gates inside a single molecule or atom by atom at the surface of a passivated semi-conductor.
Six-Correction Logic (SCL Gates in Quantum-dot Cellular Automata (QCA
Directory of Open Access Journals (Sweden)
Md. Anisur Rahman
2015-11-01
Full Text Available Quantum Dot Cellular Automata (QCA is a promising nanotechnology in Quantum electronics for its ultra low power consumption, faster speed and small size features. It has significant advantages over the Complementary Metal–Oxide–Semiconductor (CMOS technology. This paper present, a novel QCA representation of Six-Correction Logic (SCL gate based on QCA logic gates: the Maj3, Maj AND gate and Maj OR. In order to design and verify the functionality of the proposed layout, QCADesigner a familiar QCA simulator has been employed. The simulation results confirm correctness of the claims and its usefulness in designing a digital circuits.
All-optical logic-gates based on bacteriorhodopsin film
Institute of Scientific and Technical Information of China (English)
Chen Gui-Ying; Zhang Chun-Ping; Guo Zong-Xia; Tian Jian-Guo; Zhang Guang-Yin; Song Qi-Wang
2005-01-01
Based on self-diffraction in bacteriorhodopsin (bR) film, we propose all-optical NOT, XOR, half adder and XNOR logic operations. Using the relation between diffraction light and the polarization states of recording beams, we demonstrate NOT and XNOR logic operations. Studying the relation of polarization states among the diffracting, recording and reading beams, we implement XOR logic and half adder operations with three inputs. The methods are simple and practicable.
Di Vincenzo, D P
1997-01-01
A historical review is given of the emergence of the idea of the quantum logic gate from the theory of reversible Boolean gates. I highlight the quantum XOR or controlled NOT as the fundamental two-bit gate for quantum computation. This gate plays a central role in networks for quantum error correction.
Realization of morphing logic gates in a repressilator with quorum sensing feedback
Agrawal, Vidit; Kang, Shivpal Singh; Sinha, Sudeshna
2014-03-01
We demonstrate how a genetic ring oscillator network with quorum sensing feedback can operate as a robust logic gate. Specifically we show how a range of logic functions, namely AND/NAND, OR/NOR and XOR/XNOR, can be realized by the system, thus yielding a versatile unit that can morph between different logic operations. We further demonstrate the capacity of this system to yield complementary logic operations in parallel. Our results then indicate the computing potential of this biological system, and may lead to bio-inspired computing devices.
Fluorescent nanoparticle beacon for logic gate operation regulated by strand displacement.
Yang, Jing; Shen, Lingjing; Ma, Jingjing; Schlaberg, H Inaki; Liu, Shi; Xu, Jin; Zhang, Cheng
2013-06-26
A mechanism is developed to construct a logic system by employing DNA/gold nanoparticle (AuNP) conjugates as a basic work unit, utilizing a fluorescent beacon probe to detect output signals. To implement the logic circuit, a self-assembly DNA structure is attached onto nanoparticles to form the fluorescent beacon. Moreover, assisted by regulation of multilevel strand displacement, cascaded logic gates are achieved. The computing results are detected by methods using fluorescent signals, gel electrophoresis and transmission electron microscope (TEM). This work is expected to demonstrate the feasibility of the cascaded logic system based on fluorescent nanoparticle beacons, suggesting applications in DNA computation and biotechnology.
Realization of Morphing Logic Gates in a Repressilator with Quorum Sensing Feedback
Agrawal, Vidit; Sinha, Sudeshna
2013-01-01
We demonstrate how a genetic ring oscillator network with quorum sensing feedback can operate as a robust logic gate. Specifically we show how a range of logic functions, namely AND/NAND, OR/NOR and XOR/XNOR, can be realized by the system, thus yielding a versatile unit that can morph between different logic operations. We further demonstrate the capacity of this system to yield complementary logic operations in parallel. Our results then indicate the computing potential of this biological system, and may lead to bio-inspired computing devices.
Fiszer, Robert Adrian
As quantum computers edge closer to viability, it becomes necessary to create logic synthesis and minimization algorithms that take into account the particular aspects of quantum computers that differentiate them from classical computers. Since quantum computers can be functionally described as reversible computers with superposition and entanglement, both advances in reversible synthesis and increased utilization of superposition and entanglement in quantum algorithms will increase the power of quantum computing. One necessary component of any practical quantum computer is the computation of irreversible functions. However, very little work has been done on algorithms that synthesize and minimize irreversible functions into a reversible form. In this thesis, we present and implement a pair of algorithms that extend the best published solution to these problems by taking advantage of Product-Sum EXOR (PSE) gates, the reversible generalization of inhibition gates, which we have introduced in previous work [1,2]. We show that these gates, combined with our novel synthesis algorithms, result in much lower quantum costs over a wide variety of functions as compared to our competitors, especially on incompletely specified functions. Furthermore, this solution has applications for milti-valued and multi-output functions.
Mandal, Amal Kumar; Das, Priyadip; Mahato, Prasenjit; Acharya, Suhash; Das, Amitava
2012-08-17
As learned from natural systems, self-assembly and self-sorting help in interconnecting different molecular logic gates and thus achieve high-level logic functions. In this context, demonstration of important logic operations using changes in optical responses due to the formation of molecular assemblies is even more desirable for the construction of a molecular computer. Synthesis of an appropriate divalent as well as a luminescent crown ether based host 1 and paraquat derivatives, 2(PF(6))(2) and 3(PF(6))(2), as guests helped in demonstrating a reversible [3](taco complex) (1·{2(PF(6))(2)}(2) or 1·{3(PF(6))(2)}(2)) formation in nonpolar solvent. Detailed (1)H NMR studies revealed that two paraquat units were bound cooperatively by the two crown units in 1. Because of preorganization, the flexible host molecule 1 adopts a folded conformation, where each of two paraquat units remain sandwiched between the two aromatic units of each folded crown ether moiety in 1. Disassembly of the "taco" complex in the presence of KPF(6) and reassembly on subsequent addition of DB18C6 was initially demonstrated by (1)H NMR spectral studies, which were subsequently corroborated through luminescence spectral studies. Further, luminescence spectral responses as output signals with appropriate and two independent molecular inputs could be correlated to demonstrate basic logic operation like OR and YES gates, while the results of the three molecular inputs could be utilized to demonstrate important logic operation like an INHIBIT gate.
Time reversal and exchange symmetries of unitary gate capacities
Harrow, A W; Harrow, Aram W.; Shor, Peter W.
2005-01-01
Unitary gates are an interesting resource for quantum communication in part because they are always invertible and are intrinsically bidirectional. This paper explores these two symmetries: time-reversal and exchange of Alice and Bob. We will present examples of unitary gates that exhibit dramatic separations between forward and backward capacities (even when the back communication is assisted by free entanglement) and between entanglement-assisted and unassisted capacities, among many others. Along the way, we will give a general time-reversal rule for relating the capacities of a unitary gate and its inverse that will explain why previous attempts at finding asymmetric capacities failed. Finally, we will see how the ability to erase quantum information and destroy entanglement can be a valuable resource for quantum communication.
Gated Clock Implementation of Arithmetic Logic Unit (ALU
Directory of Open Access Journals (Sweden)
Dr. Neelam R. Prakash
2013-05-01
Full Text Available Low power design has emerged as one of the challenging area in today’s ASIC (Application specific integrated circuit design. With continuous decrease in transistor size, power density is increasing and there is an urgent need for reduction in total power consumption. Clock gating is one most effective technique for low power synchronous circuit design. Clock gating technique in low power design is used to reduce the dynamic power consumption. Clock signal in a synchronous circuit is used for synchronization only and hence does not carry any important information. Since clock is applied to each block of a synchronous circuit, and clock switches for every cycle, clock power is the major part of dynamic power consumption in synchronous circuits. Clock gating is a well known technique to reduce clock power. In clock gating clock to an idle block is disabled. Thus significant amount of power consumption is reduced by employing clock gating. In this paper an ALU design is proposed employing Gated clock for its operation. Design simulation has been performed on Xilinx ISE design suite, and power calculation is done by Xilinx Xpower analyzer. Results show that approximately 17% of total clock power consumption is reduced by gated clock implementation.
Terahertz all-optical NOR and AND logic gates based on 2D photonic crystals
Parandin, Fariborz; Karkhanehchi, Mohammad Mehdi
2017-01-01
Usually, photonic crystals are used in designing optical logic gates. This study focuses on the design and simulation of an all optical NOR and AND logic gates based on two dimensional photonic crystals. The simplicity of the proposed structure is a characteristic feature of this designation. Finite Difference Time Domain (FDTD) as well as Plane Wave Expansion (PWE) methods have been used for this structural analysis. The simulation results revealed an increase in the interval between "zero" and "one" logic levels. Also, the simple structure and its small size demonstrate the usefulness of this structure in optical integrated circuits. The proposed optical gates can operate with a bit rate of about 1.54 Tbit/s.
Alternative approach of conducting phase-modulated all-optical logic gates
Chakraborty, Bikash; Mukhopadhyay, Sourangshu
2009-03-01
It is well established that optical devices and components are more advantageous than their electronic counterparts because of inherent parallelism in optics. Basically electronics are found to be very unsuitable in high speed (above gigahertz) data processing systems whereas tremendous operational speed (in the range of terahertz) can be achieved with the help of optics. The parallelism of optics and the properties of low loss transmission make optics a powerful technology for digital computing and processing and in long-range communications. Again it is well established that logic gates are the basic building blocks of any computing or data processing system. Therefore, any optical data processor needs suitable optically run logic gates. A method of conducting phase-modulated all-optical logic gates is proposed. Here we will exploit the advantages of phase modulation not only in processing but also in encoding as well decoding also.
High-order noise filtering in nontrivial quantum logic gates
CSIR Research Space (South Africa)
Green, T
2012-07-01
Full Text Available Treating the effects of a time-dependent classical dephasing environment during quantum logic operations poses a theoretical challenge, as the application of noncommuting control operations gives rise to both dephasing and depolarization errors...
Reconfigurable Optical Directed-Logic Circuits
2015-11-20
and their switching delays do not accumulate. This is in contrast to conventional logic circuits where gate delays are cascaded, resulting in a...transistor logic circuits wherein gate delays are cascaded resulting in increased latencies with increased logic elements. Thus directed- logic ... reverse biased at -5 V ( logic ‘1’) and the transmission is high when the bias voltage is zero ( logic ‘0’). So the switch works in the block/pass mode
Multiplexing of injury codes for the parallel operation of enzyme logic gates.
Halámek, Jan; Windmiller, Joshua Ray; Zhou, Jian; Chuang, Min-Chieh; Santhosh, Padmanabhan; Strack, Guinevere; Arugula, Mary A; Chinnapareddy, Soujanya; Bocharova, Vera; Wang, Joseph; Katz, Evgeny
2010-09-01
The development of a highly parallel enzyme logic sensing concept employing a novel encoding scheme for the determination of multiple pathophysiological conditions is reported. The new concept multiplexes a contingent of enzyme-based logic gates to yield a distinct 'injury code' corresponding to a unique pathophysiological state as prescribed by a truth table. The new concept is illustrated using an array of NAND and AND gates to assess the biomedical significance of numerous biomarker inputs including creatine kinase, lactate dehydrogenase, norepinephrine, glutamate, alanine transaminase, lactate, glucose, glutathione disulfide, and glutathione reductase to assess soft-tissue injury, traumatic brain injury, liver injury, abdominal trauma, hemorrhagic shock, and oxidative stress. Under the optimal conditions, physiological and pathological levels of these biomarkers were detected through either optical or electrochemical techniques by monitoring the level of the outputs generated by each of the six logic gates. By establishing a pathologically meaningful threshold for each logic gate, the absorbance and amperometric assays tendered the diagnosis in a digitally encoded 6-bit word, defined as an 'injury code'. This binary 'injury code' enabled the effective discrimination of 64 unique pathological conditions to offer a comprehensive high-fidelity diagnosis of multiple injury conditions. Such processing of relevant biomarker inputs and the subsequent multiplexing of the logic gate outputs to yield a comprehensive 'injury code' offer significant potential for the rapid and reliable assessment of varied and complex forms of injury in circumstances where access to a clinical laboratory is not viable. While the new concept of parallel and multiplexed enzyme logic gates is illustrated here in connection to multi-injury diagnosis, it could be readily extended to a wide range of practical medical, industrial, security and environmental applications.
Molecular logic gates and luminescent sensors based on photoinduced electron transfer.
de Silva, A Prasanna; Uchiyama, Seiichi
2011-01-01
The competition between Photoinduced electron transfer (PET) and other de-excitation pathways such as fluorescence and phosphorescence can be controlled within designed molecular structures. Depending on the particular design, the resulting optical output is thus a function of various inputs such as ion concentration and excitation light dose. Once digitized into binary code, these input-output patterns can be interpreted according to Boolean logic. The single-input logic types of YES and NOT cover simple sensors and the double- (or higher-) input logic types represent other gates such as AND and OR. The logic-based arithmetic processors such as half-adders and half-subtractors are also featured. Naturally, a principal application of the more complex gates is in multi-sensing contexts.
DESIGN OF TWO-PHASE SINUSOIDAL POWER CLOCK AND CLOCKED TRANSMISSION GATE ADIABATIC LOGIC CIRCUIT
Institute of Scientific and Technical Information of China (English)
Wang Pengjun; Yu Junjun
2007-01-01
First the research is conducted on the design of the two-phase sinusoidal power clock generator in this paper. Then the design of the new adiabatic logic circuit adopting the two-phase sinusoidal power clocks-Clocked Transmission Gate Adiabatic Logic (CTGAL) circuit is presented. This circuit makes use of the clocked transmission gates to sample the input signals, then the output loads are charged and discharged in a fully adiabatic manner by using bootstrapped N-Channel Metal Oxide Semiconductor (NMOS) and Complementary Metal Oxide Semiconductor (CMOS) latch structure.Finally, with the parameters of Taiwan Semiconductor Manufacturing Company (TSMC) 0.25 μm CMOS device, the transient energy consumption of CTGAL, Bootstrap Charge-Recovery Logic (BCRL)and Pass-transistor Adiabatic Logic (PAL) including their clock generators is simulated. The simulation result indicates that CTGAL circuit has the characteristic of remarkably low energy consumption.
Passive all-optical polarization switch, binary logic gates, and digital processor.
Zaghloul, Y A; Zaghloul, A R M; Adibi, A
2011-10-10
We introduce the passive all-optical polarization switch, which modulates light with light. That switch is used to construct all the binary logic gates of two or more inputs. We discuss the design concepts and the operation of the AND, OR, NAND, and NOR gates as examples. The rest of the 16 logic gates are similarly designed. Cascading of such gates is straightforward as we show and discuss. Cascading in itself does not require a power source, but feedback at this stage of development does. The design and operation of an SR Latch is presented as one of the popular basic sequential devices used for memory cells. That completes the essential components of an all-optical polarization digital processor. The speed of such devices is well above 10 GHz for bulk implementations and is much higher for chip-size implementations. In addition, the presented devices do have the four essential characteristics previously thought unique to the microelectronic ones.
Serial DNA relay in DNA logic gates by electrical fusion and mechanical splitting of droplets
Kawano, Ryuji; Takinoue, Masahiro; Osaki, Toshihisa; Kamiya, Koki; Miki, Norihisa
2017-01-01
DNA logic circuits utilizing DNA hybridization and/or enzymatic reactions have drawn increasing attention for their potential applications in the diagnosis and treatment of cellular diseases. The compartmentalization of such a system into a microdroplet considerably helps to precisely regulate local interactions and reactions between molecules. In this study, we introduced a relay approach for enabling the transfer of DNA from one droplet to another to implement multi-step sequential logic operations. We proposed electrical fusion and mechanical splitting of droplets to facilitate the DNA flow at the inputs, logic operation, output, and serial connection between two logic gates. We developed Negative-OR operations integrated by a serial connection of the OR gate and NOT gate incorporated in a series of droplets. The four types of input defined by the presence/absence of DNA in the input droplet pair were correctly reflected in the readout at the Negative-OR gate. The proposed approach potentially allows for serial and parallel logic operations that could be used for complex diagnostic applications. PMID:28700641
Privman, Vladimir; Fratto, Brian E.; Zavalov, Oleksandr; Halamek, Jan; Katz, Evgeny
2013-01-01
We report a study of a system which involves an enzymatic cascade realizing an AND logic gate, with an added photochemical processing of the output allowing to make the gate's response sigmoid in both inputs. New functional forms are developed for quantifying the kinetics of such systems, specifically designed to model their response in terms of signal and information processing. These theoretical expressions are tested for the studied system, which also allows us to consider aspects of bioch...
Investigation of a simultaneous multifunctional photonic logic gate based on bidirectional FWM
Li, Lanlan; Lv, Tingting; Wu, Jian
2013-11-01
We demonstrate a multi-functional photonic logic gate for RZ-PolSK signals based on four wave mixing (FWM) in highly nonlinear fiber (HNLF). Bidirectional operation with one spool of HNLF is implemented numerically at 40 Gb/s. The basic logic arithmetics, such as XOR, AB¯,A¯B, XNOR, AND, NOR, and complex logic functions such as half-subtracter, half-adder, comparator and decoder are simultaneously realized by adjusting the polarization controllers. This novel structure is low-cost and rather flexible. Proper logic results, clear waveforms and high Q factors of eye diagrams are presented. Simulation analysis shows that bit error-free operation for the logic gate can be obtained when the wavelength separation is from -7 to 6 nm for two input signals. The impact of the input power on the Q factor is also investigated. Due to the femoto-second response time of Kerr-effect in HNLF we used in the scheme, the logic gate has great potential in future ultra-high speed optical transmission systems.
Hur, Seung-Hyun; Yoon, Myung-Han; Gaur, Anshu; Shim, Moonsub; Facchetti, Antonio; Marks, Tobin J; Rogers, John A
2005-10-12
We report the implementation of three dimensionally cross-linked, organic nanodielectric multilayers as ultrathin gate dielectrics for a type of thin film transistor device that uses networks of single-walled carbon nanotubes as effective semiconductor thin films. Unipolar n- and p-channel devices are demonstrated by use of polymer coatings to control the behavior of the networks. Monolithically integrating these devices yields complementary logic gates. The organic multilayers provide exceptionally good gate dielectrics for these systems and allow for low voltage, low hysteresis operation. The excellent performance characteristics suggest that organic dielectrics of this general type could provide a promising path to SWNT-based thin film electronics.
Notes on stochastic (bio)-logic gates: computing with allosteric cooperativity.
Agliari, Elena; Altavilla, Matteo; Barra, Adriano; Dello Schiavo, Lorenzo; Katz, Evgeny
2015-05-15
Recent experimental breakthroughs have finally allowed to implement in-vitro reaction kinetics (the so called enzyme based logic) which code for two-inputs logic gates and mimic the stochastic AND (and NAND) as well as the stochastic OR (and NOR). This accomplishment, together with the already-known single-input gates (performing as YES and NOT), provides a logic base and paves the way to the development of powerful biotechnological devices. However, as biochemical systems are always affected by the presence of noise (e.g. thermal), standard logic is not the correct theoretical reference framework, rather we show that statistical mechanics can work for this scope: here we formulate a complete statistical mechanical description of the Monod-Wyman-Changeaux allosteric model for both single and double ligand systems, with the purpose of exploring their practical capabilities to express noisy logical operators and/or perform stochastic logical operations. Mixing statistical mechanics with logics, and testing quantitatively the resulting findings on the available biochemical data, we successfully revise the concept of cooperativity (and anti-cooperativity) for allosteric systems, with particular emphasis on its computational capabilities, the related ranges and scaling of the involved parameters and its differences with classical cooperativity (and anti-cooperativity).
Flip-Flops for accurate multiphase clocking: transmission gate versus current mode logic
Dutta, R.; Klumperink, Eric A.M.; Gao, X.; Ru, Z.; van der Zee, Ronan A.R.; Nauta, Bram
2013-01-01
Dynamic transmission gate (DTG) flip-flops (FFs) (DTG-FFs) and current mode logic (CML) FFs (CML-FFs) are compared targeting power efficient multiphase clock generation with low phase error. The effect of component mismatches on multiphase clock timing inaccuracies is modeled and compared, using the
Passive linear-optics 640 Gbit/s logic NOT gate
DEFF Research Database (Denmark)
Maram, Reza; Kong, Deming; Galili, Michael;
2015-01-01
We experimentally demonstrate a 640 Gbit/s all-optical NOT gate for high-speed telecommunication on-off-keying (OOK) data signals. We employ linear optical signal processing based on spectral phase-only (all-pass) optical filtering to perform the target logic NOT operation....
A DNAzyme-mediated logic gate for programming molecular capture and release on DNA origami.
Li, Feiran; Chen, Haorong; Pan, Jing; Cha, Tae-Gon; Medintz, Igor L; Choi, Jong Hyun
2016-06-28
Here we design a DNA origami-based site-specific molecular capture and release platform operated by a DNAzyme-mediated logic gate process. We show the programmability and versatility of this platform with small molecules, proteins, and nanoparticles, which may also be controlled by external light signals.
Flip-Flops for accurate multiphase clocking: transmission gate versus current mode logic
Dutta, R.; Klumperink, E.A.M.; Gao, X.; Ru, Z.; Zee, van der R.A.R.; Nauta, B.
2013-01-01
Dynamic transmission gate (DTG) flip-flops (FFs) (DTG-FFs) and current mode logic (CML) FFs (CML-FFs) are compared targeting power efficient multiphase clock generation with low phase error. The effect of component mismatches on multiphase clock timing inaccuracies is modeled and compared, using the
Del Duce, A; Bayvel, P
2009-01-01
We analyse the design and optimisation of quantum logic circuits suitable for the experimental demonstration of a three-qubit quantum computation prototype based on optically-controlled, solid-state quantum logic gates. In these gates, the interaction between two qubits carried by the electron-spin of donors is mediated by the optical excitation of a control particle placed in their proximity. First, we use a geometrical approach for analysing the entangling characteristics of these quantum gates. Then, using a genetic programming algorithm, we develop circuits for the refined Deutsch-Jozsa algorithm investigating different strategies for obtaining short total computational times. We test two separate approaches based on using different sets of entangling gates with the shortest possible gate computation time which, however, does not introduce leakage of quantum information to the control particles. The first set exploits fast approximations of controlled-phase gates as entangling gates, while the other one a...
Logic Gate Operation by DNA Translocation through Biological Nanopores.
Directory of Open Access Journals (Sweden)
Hiroki Yasuga
Full Text Available Logical operations using biological molecules, such as DNA computing or programmable diagnosis using DNA, have recently received attention. Challenges remain with respect to the development of such systems, including label-free output detection and the rapidity of operation. Here, we propose integration of biological nanopores with DNA molecules for development of a logical operating system. We configured outputs "1" and "0" as single-stranded DNA (ssDNA that is or is not translocated through a nanopore; unlabeled DNA was detected electrically. A negative-AND (NAND operation was successfully conducted within approximately 10 min, which is rapid compared with previous studies using unlabeled DNA. In addition, this operation was executed in a four-droplet network. DNA molecules and associated information were transferred among droplets via biological nanopores. This system would facilitate linking of molecules and electronic interfaces. Thus, it could be applied to molecular robotics, genetic engineering, and even medical diagnosis and treatment.
A Cu2+-selective fluorescent chemosensor based on BODIPY with two pyridine ligands and logic gate
Huang, Liuqian; Zhang, Jing; Yu, Xiaoxiu; Ma, Yifan; Huang, Tianjiao; Shen, Xi; Qiu, Huayu; He, Xingxing; Yin, Shouchun
2015-06-01
A novel near-infrared fluorescent chemosensor based on BODIPY (Py-1) has been synthesized and characterized. Py-1 displays high selectivity and sensitivity for sensing Cu2+ over other metal ions in acetonitrile. Upon addition of Cu2+ ions, the maximum absorption band of Py-1 in CH3CN displays a red shift from 603 to 608 nm, which results in a visual color change from pink to blue. When Py-1 is excited at 600 nm in the presence of Cu2+, the fluorescent emission intensity of Py-1 at 617 nm is quenched over 86%. Notably, the complex of Py-1-Cu2+ can be restored with the introduction of EDTA or S2-. Consequently, an IMPLICATION logic gate at molecular level operating in fluorescence mode with Cu2+ and S2- as chemical inputs can be constructed. Finally, based on the reversible and reproducible system, a nanoscale sequential memory unit displaying "Writing-Reading-Erasing-Reading" functions can be integrated.
Kim, Hoon-Sik; Won, Sang Min; Ha, Young-Geun; Ahn, Jong-Hyun; Facchetti, Antonio; Marks, Tobin J.; Rogers, John A.
2009-11-01
This letter reports the fabrication and electrical characterization of mechanically flexible and low operating voltage transistors and logic gates (NOT, NAND, and NOR gates) using printed silicon nanomembranes and self-assembled nanodielectrics on thin plastic substrates. The transistors exhibit effective linear mobilities of ˜680 cm2/V s, on/off ratios >107, gate leakage current densities <2.8×10-7 A/cm2, and subthreshold slopes ˜120 mV/decade. The inverters show voltage gains as high as 4.8. Simple digital logic gates (NAND and NOR gates) demonstrate the possible application of this materials combination in digital integrated circuits.
Wavelet analisys and HHG in nanorings Their applications in logic gates and memory mass devices
Cricchio, Dario
2015-01-01
We study the application of one nanoring driven by a laser field in different states of polarization in logic circuits. In particular we show that assigning boolean values to different state of the incident laser field and to the emitted signals, we can create logic gates such as OR, XOR and AND. We also show the possibility to make logic circuits such as half-adder and full-adder using one and two nanoring respectively. Using two nanorings we made the Toffoli gate. Finally we use the final angular momentum acquired by the electron to store information and hence show the possibility to use an array of nanorings as a mass memory device.
Accurate dynamic power estimation for CMOS combinational logic circuits with real gate delay model
Directory of Open Access Journals (Sweden)
Omnia S. Fadl
2016-01-01
Full Text Available Dynamic power estimation is essential in designing VLSI circuits where many parameters are involved but the only circuit parameter that is related to the circuit operation is the nodes’ toggle rate. This paper discusses a deterministic and fast method to estimate the dynamic power consumption for CMOS combinational logic circuits using gate-level descriptions based on the Logic Pictures concept to obtain the circuit nodes’ toggle rate. The delay model for the logic gates is the real-delay model. To validate the results, the method is applied to several circuits and compared against exhaustive, as well as Monte Carlo, simulations. The proposed technique was shown to save up to 96% processing time compared to exhaustive simulation.
A Survey Analysis on CMOS Integrated Circuits with Clock-Gated Logic Structure
Directory of Open Access Journals (Sweden)
PADMA KHARE
2014-09-01
Full Text Available Various circuit design techniques has been presented to improve noise tolerance of the proposed CGS logic families. Noise in deep submicron technology limits the reliability and performance of ICs. The ANTE (Average Noise Threshold Energy metric is used for the analysis of noise tolerance of proposed CGS. A 2- input NAND and NOR gate is designed by the proposed technique. Simulation results for a 2-input NAND gate at clock gated logic show that the proposed noise tolerant circuit achieves 1.79X ANTE improvement along with the reduction in leakage power. Continuous scaling of technology towards the manometer range significantly increases leakage current level and the effect of noise. This research can be further extended for performance optimization in terms of power, speed, area and noise immunity.
Genomic mining of prokaryotic repressors for orthogonal logic gates.
Stanton, Brynne C; Nielsen, Alec A K; Tamsir, Alvin; Clancy, Kevin; Peterson, Todd; Voigt, Christopher A
2014-02-01
Genetic circuits perform computational operations based on interactions between freely diffusing molecules within a cell. When transcription factors are combined to build a circuit, unintended interactions can disrupt its function. Here, we apply 'part mining' to build a library of 73 TetR-family repressors gleaned from prokaryotic genomes. The operators of a subset were determined using an in vitro method, and this information was used to build synthetic promoters. The promoters and repressors were screened for cross-reactions. Of these, 16 were identified that both strongly repress their cognate promoter (5- to 207-fold) and exhibit minimal interactions with other promoters. Each repressor-promoter pair was converted to a NOT gate and characterized. Used as a set of 16 NOT/NOR gates, there are >10(54) circuits that could be built by changing the pattern of input and output promoters. This represents a large set of compatible gates that can be used to construct user-defined circuits.
New low power adders in Self Resetting Logic with Gate Diffusion Input Technique
Directory of Open Access Journals (Sweden)
R. Uma
2017-04-01
Full Text Available The objective vividly defines a new low-power and high-speed logic family; named Self Resetting Logic with Gate Diffusion Input (SRLGDI. This logic family resolves the issues in dynamic circuits like charge sharing, charge leakage, short circuit power dissipation, monotonicity requirement and low output voltage. In the proposed design structure of SRLGDI, the pull down tree is implemented with Gate Diffusion Input (GDI with level restoration which apparently eliminated the conductance overlap between nMOS and pMOS devices, thereby reducing the short circuit power dissipation and providing High Output Voltage VoH. The output stage of SRLGDI has been incorporated with an inverter to produce both true and complementary output function. The Resistance Capacitance (RC delay model has been proposed to obtain the total delay of the circuit during precharge and evaluation phases. Using SRLGDI, the primitive cells and 3 different full adder circuits were designed and simulated in a 0.250 μm Complementary Metal Oxide Semiconductor (CMOS process technology. The simulated result demonstrates that the proposed SRLGDI logic family is superior in terms of speed and power consumption with respect to other logic families like Dynamic logic (DY, CMOS, Self Resetting CMOS (SRCMOS and GDI.
Enzyme-Based Logic Gates and Networks with Output Signals Analyzed by Various Methods.
Katz, Evgeny
2017-07-05
The paper overviews various methods that are used for the analysis of output signals generated by enzyme-based logic systems. The considered methods include optical techniques (optical absorbance, fluorescence spectroscopy, surface plasmon resonance), electrochemical techniques (cyclic voltammetry, potentiometry, impedance spectroscopy, conductivity measurements, use of field effect transistor devices, pH measurements), and various mechanoelectronic methods (using atomic force microscope, quartz crystal microbalance). Although each of the methods is well known for various bioanalytical applications, their use in combination with the biomolecular logic systems is rather new and sometimes not trivial. Many of the discussed methods have been combined with the use of signal-responsive materials to transduce and amplify biomolecular signals generated by the logic operations. Interfacing of biocomputing logic systems with electronics and "smart" signal-responsive materials allows logic operations be extended to actuation functions; for example, stimulating molecular release and switchable features of bioelectronic devices, such as biofuel cells. The purpose of this review article is to emphasize the broad variability of the bioanalytical systems applied for signal transduction in biocomputing processes. All bioanalytical systems discussed in the article are exemplified with specific logic gates and multi-gate networks realized with enzyme-based biocatalytic cascades. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
Implementation of quantum logic gates using coupled Bose-Einstein condensates
Energy Technology Data Exchange (ETDEWEB)
Luiz, F.S. [Universidade Federal de Sao Carlos (UFSCar), Sao Carlos, SP (Brazil). Departamento de Fisica; Duzzioni, E.I. [Universidade Federal de Santa Catarina (UFSC), Florianopolis, SC (Brazil). Departamento de Fisica; Sanz, L., E-mail: lsanz@infis.ufu.br [Universidade Federal de Uberlandia (UFU), MG (Brazil). Instituto de Fisica
2015-10-15
In this work, we are interested in the implementation of single-qubit gates on coupled Bose-Einstein condensates (BECs). The system, a feasible candidate for a qubit, consists of condensed atoms in different hyperfine levels coupled by a two-photon transition. It is well established that the dynamics of coupled BECs can be described by the two-mode Hamiltonian that takes into account the confinement potential of the trap and the effects of collisions associated with each condensate. Other effects, such as collisions between atoms belonging to different BECs and detuning, are included in this approach. We demonstrate how to implement two types of quantum logic gates: population-transfer gates (NOT, Ŷ, and Hadamard), which require a population inversion between hyperfine levels, and phase gates (Z{sup ^}, Ŝ and T{sup ^}), which require self-trapping. We also discuss the experimental feasibility by evaluating the robustness of quantum gates against variations of physical parameters outside of the ideal conditions for the implementation of each quantum logic gate. (author)
Marmon, Jason K; Wang, Kai; Zhou, Weilie; Zhang, Yong
2016-01-01
Modern electronics are developing electronic-optical integrated circuits, while their electronic backbone, e.g. field-effect transistors (FETs), remains the same. However, further FET down scaling is facing physical and technical challenges. A light-effect transistor (LET) offers electronic-optical hybridization at the component level, which can continue Moore's law to the quantum region without requiring a FET's fabrication complexity, e.g. a physical gate and doping, by employing optical gating and photoconductivity. Multiple independent gates are therefore readily realized to achieve unique functionalities without increasing chip space. Here we report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs show output and transfer characteristics resembling advanced FETs, e.g. on/off ratios up to ~1.0x10^6 with a source-drain voltage of ~1.43 V, gate-power of ~260 nW, and subthreshold swing of ~0.3 nW/de...
Quantum logic gates using coherent population trapping states
Indian Academy of Sciences (India)
Ashok Vudayagiri
2011-12-01
A scheme is proposed for achieving a controlled phase gate using interaction between atomic spin dipoles. Further, the spin states are prepared in coherent population trap states (CPTs), which are robust against perturbations, laser ﬂuctuations etc. We show that one-qubit and two-qubit operations can easily be obtained in this scheme. The scheme is also robust against decoherences due to spontaneous emissions as the CPT states used are dressed states formed out of Zeeman sublevels of ground states of the bare atom. However, certain practical issues are of concern in actually obtaining the scheme, which are also discussed at the end of this paper.
Exact Quantum Logic Gates with a Single Trapped Cold Ion
Institute of Scientific and Technical Information of China (English)
韦联福; 刘世勇; 雷啸霖
2001-01-01
We present an alternative scheme to exactly implement one-qubit and two-qubit quantum gates with a single trapped cold ion driven by a travelling laser field. The internal degree of freedom of the ion acts as the target qubit and the control qubit is encoded by two Fock states of the external vibration of the ion. The conditions to realize these operations, including the duration of each applied laser pulse and Lamb-Dicke parameter, are derived. In our scheme neither the auxiliary atomic level nor the Lamb-Dicke approximation is required. The multiquantum transition between the internal and external degrees of freedom of the ion is considered.
N Channel JFET Based Digital Logic Gate Structure
Krasowski, Michael J (Inventor)
2013-01-01
An apparatus is provided that includes a first field effect transistor with a source tied to zero volts and a drain tied to voltage drain drain (Vdd) through a first resistor. The apparatus also includes a first node configured to tie a second resistor to a third resistor and connect to an input of a gate of the first field effect transistor in order for the first field effect transistor to receive a signal. The apparatus also includes a second field effect transistor configured as a unity gain buffer having a drain tied to Vdd and an uncommitted source.
Orbach, Ron; Willner, Bilha; Willner, Itamar
2015-03-11
This feature article addresses the implementation of catalytic nucleic acids as functional units for the construction of logic gates and computing circuits, and discusses the future applications of these systems. The assembly of computational modules composed of DNAzymes has led to the operation of a universal set of logic gates, to field programmable logic gates and computing circuits, to the development of multiplexers/demultiplexers, and to full-adder systems. Also, DNAzyme cascades operating as logic gates and computing circuits were demonstrated. DNAzyme logic systems find important practical applications. These include the use of DNAzyme-based systems for sensing and multiplexed analyses, for the development of controlled release and drug delivery systems, for regulating intracellular biosynthetic pathways, and for the programmed synthesis and operation of cascades.
Efficient quantum computation in a network with probabilistic gates and logical encoding
DEFF Research Database (Denmark)
Borregaard, J.; Sørensen, A. S.; Cirac, J. I.
2017-01-01
An approach to efficient quantum computation with probabilistic gates is proposed and analyzed in both a local and nonlocal setting. It combines heralded gates previously studied for atom or atomlike qubits with logical encoding from linear optical quantum computation in order to perform high......-fidelity quantum gates across a quantum network. The error-detecting properties of the heralded operations ensure high fidelity while the encoding makes it possible to correct for failed attempts such that deterministic and high-quality gates can be achieved. Importantly, this is robust to photon loss, which...... is typically the main obstacle to photonic-based quantum information processing. Overall this approach opens a path toward quantum networks with atomic nodes and photonic links....
Gate contact resistive random access memory in nano scaled FinFET logic technologies
Hsu, Meng-Yin; Shih, Yi-Hong; Chih, Yue-Der; Lin, Chrong Jung; King, Ya-Chin
2017-04-01
A full logic-compatible embedded gate contact resistive random access memory (GC-RRAM) cell in the CMOS FinFET logic process without extra mask or processing steps has been successfully demonstrated for high-density and low-cost logic nonvolatile memory (NVM) applications. This novel GC-RRAM cell is composed of a transition metal oxide from the gate contact plug and interlayer dielectric (ILD) in the middle, and a gate contact and an n-type epitaxial drain terminal as the top and bottom electrodes, respectively. It features low-voltage operation and reset current, compact cell size, and a stable read window. As a promising embedded NVM solution, the compact one transistor and one resistor (1T1R) cell is highly scalable as the technology node progresses. Excellent data retention and cycling capability have also been demonstrated by the reliability testing results. These superior characteristics make GC-RRAM one of a few viable candidates for logic NVM for future FinFET circuits.
Yang, Guowu; Song, Xiaoyu; Perkowski, Marek
2011-01-01
We propose an approach to optimally synthesize quantum circuits from non-permutative quantum gates such as Controlled-Square-Root-of-Not (i.e. Controlled-V). Our approach reduces the synthesis problem to multiple-valued optimization and uses group theory. We devise a novel technique that transforms the quantum logic synthesis problem from a multi-valued constrained optimization problem to a group permutation problem. The transformation enables us to utilize group theory to exploit the properties of the synthesis problem. Assuming a cost of one for each two-qubit gate, we found all reversible circuits with quantum costs of 4, 5, 6, etc, and give another algorithm to realize these reversible circuits with quantum gates.
Rani, Preeti; Kalra, Yogita; Sinha, R. K.
2016-09-01
In this paper, we have reported design and analysis of polarization independent all optical logic gates in silicon-on-insulator photonic crystal consisting of two dimensional honeycomb lattices with two different air holes exhibiting photonic band gap for both TE and TM mode in the optical communication window. The proposed structures perform as an AND optical logic gate and all the optical logic gates based on the phenomenon of interference. The response period and bit rate for TE and TM polarizations at a wavelength of 1.55 μm show improved results as reported earlier.
Enzyme-based NAND and NOR logic gates with modular design.
Zhou, Jian; Arugula, Mary A; Halámek, Jan; Pita, Marcos; Katz, Evgeny
2009-12-10
The logic gates NAND/NOR were mimicked by enzyme biocatalyzed reactions activated by sucrose, maltose and phosphate. The subunits performing AND/OR Boolean logic operations were designed using maltose phosphorylase and cooperative work of invertase/amyloglucosidase, respectively. Glucose produced as the output signal from the AND/OR subunits was applied as the input signal for the INVERTER gate composed of alcohol dehydrogenase, glucose oxidase, microperoxidase-11, ethanol and NAD(+), which generated the final output in the form of NADH inverting the logic signal from 0 to 1 or from 1 to 0. The final output signal was amplified by a self-promoting biocatalytic system. In order to fulfill the Boolean properties of associativity and commutativity in logic networks, the final NADH output signal was converted to the initial signals of maltose and phosphate, thus allowing assembling of the same standard units in concatenated sequences. The designed modular approach, signal amplification and conversion processes open the way toward complex logic networks composed of standard elements resembling electronic integrated circuitries.
All-optical 10 Gb/s AND logic gate in a silicon microring resonator
DEFF Research Database (Denmark)
Xiong, Meng; Lei, Lei; Ding, Yunhong
2013-01-01
An all-optical AND logic gate in a single silicon microring resonator is experimentally demonstrated at 10 Gb/s with 50% RZ-OOK signals. By setting the wavelengths of two intensity-modulated input pumps on the resonances of the microring resonator, field-enhanced four-wave mixing with a total inp...... power of only 8.5 dBm takes place in the ring, resulting in the generation of an idler whose intensity follows the logic operation between the pumps. Clear and open eye diagrams with a bit-error- ratio below 10−9 are achieved....
Privman, Vladimir; Fratto, Brian E; Zavalov, Oleksandr; Halámek, Jan; Katz, Evgeny
2013-06-27
We report a study of a system which involves an enzymatic cascade realizing an AND logic gate, with an added photochemical processing of the output, allowing the gate's response to be made sigmoid in both inputs. New functional forms are developed for quantifying the kinetics of such systems, specifically designed to model their response in terms of signal and information processing. These theoretical expressions are tested for the studied system, which also allows us to consider aspects of biochemical information processing such as noise transmission properties and control of timing of the chemical and physical steps.
Ternary Reversible Logic Synthesis Algorithm with Minimum Chaos Degree%基于最小混乱度的三值可逆逻辑综合算法
Institute of Scientific and Technical Information of China (English)
徐明强; 管致锦; 张海豹
2013-01-01
Ternary reversible logic synthesis is the extension and expansion of reversible logic synthesis .In order to simplify the reversible network and improve the generality of ternary reversible logic gate ,the effective value of controlling bits of the exist-ing ternary reversible controlled gates can be extended to any of 0 ,1 and 2 .And on the basis of that ,a ternary reversible logic syn-thesis algorithm with minimum chaos degree is proposed .The algorithm is used to compute the relative chaos degree and absolute chaos degree of each variable in truth table under ternary logic system ,according to the reversible function .As one reversible logic gate is selected ,the principle of minimal chaos degree in ternary reversible logic synthesis should be followed until the relative chaos degree and absolute chaos degree of each variable in truth table decrease to 0 ,which means the synthesis has been finished ,and the reversible network can be derived .The time complexity for the algorithm is O ( n2 × 3 n ) ,and its space complexity is O ( n × 3 n ) . The experimental results show that the average number of gates is less than the existing algorithms as known .%三值可逆逻辑综合是可逆逻辑综合的延伸和扩展．为了简化可逆网络，提高三值可逆逻辑门的通用性，对现有三值可逆控制门控制位的生效值扩展为0、1和2．在此基础上提出了基于最小混乱度原则的三值可逆逻辑综合算法．该算法根据三值可逆函数计算其对应真值表中每个变量的相对混乱度和绝对混乱度，以最小混乱度原则选取三值可逆逻辑门，直至真值表中的每个变量的混乱度为零，得到三值可逆网络．该算法的时间复杂度为 O（n2×3n ），空间复杂度为 O（n ×3n）．实验结果表明，与现有已知算法对比，平均门数更少．
Generation of logic gates based on a photonic crystal fiber Michelson interferometer
Sousa, J. R. R.; Filho, A. F. G. F.; Ferreira, A. C.; Batista, G. S.; Sobrinho, C. S.; Bastos, A. M.; Lyra, M. L.; Sombra, A. S. B.
2014-07-01
We present a numerical investigation of all-optical logical gates based in a Michelson interferometer (MI) of micro structured fibers, also known as photonic crystal fibers (PCF). We considered an ultra-short pulse propagating along the system in three distinct regimes of pump power. We determine several relevant quantities to characterize the system performance such as transmission, extinction ratio and crosstalk as a function of the dephasing added to one of the Bragg gratings of the Michelson interferometer (MI). High-order effects, such as third-order dispersion, intrapulse Raman scattering and self-steepening were included in the nonlinear generalized Schrödinger equation governing the pulse propagation. Our results show that the proposed device can be used to obtain all-optical XOR, OR and NOT logic gates.
Quantum gate between logical qubits in decoherence-free subspace implemented with trapped ions
Ivanov, Peter A; Singer, Kilian; Schmidt-Kaler, Ferdinand
2009-01-01
We propose an efficient technique for the implementation of a geometric phase gate in a decoherence-free subspace with trapped ions. In this scheme, the quantum information is encoded in the Zeeman sublevels of the ground state and two physical qubits are used to make up one logical qubit with ultra long coherence time. The physical realization of a geometric phase gate between two logic qubits is performed with four ions in a linear crystal simultaneously interacting with single laser beam. We investigate in detail the robustness of the scheme with respect to the right choice of the trap frequency and provide a detailed analysis of error sources, taking into account the experimental conditions. Furthermore, possible applications for the generation of cluster states for larger numbers of ions within the decoherence-free subspace are presented.
A logic-gated nanorobot for targeted transport of molecular payloads.
Douglas, Shawn M; Bachelet, Ido; Church, George M
2012-02-17
We describe an autonomous DNA nanorobot capable of transporting molecular payloads to cells, sensing cell surface inputs for conditional, triggered activation, and reconfiguring its structure for payload delivery. The device can be loaded with a variety of materials in a highly organized fashion and is controlled by an aptamer-encoded logic gate, enabling it to respond to a wide array of cues. We implemented several different logical AND gates and demonstrate their efficacy in selective regulation of nanorobot function. As a proof of principle, nanorobots loaded with combinations of antibody fragments were used in two different types of cell-signaling stimulation in tissue culture. Our prototype could inspire new designs with different selectivities and biologically active payloads for cell-targeting tasks.
Reduction of Power Dissipation in Dynamic BiCMOS Logic Gates by Transistor Reordering
S. M. Rezaul Hasan; Yufridin Wahab
2002-01-01
This paper explores the deterministic transistor reordering in low-voltage dynamic BiCMOS logic gates, for reducing the dynamic power dissipation. The constraints of load driving (discharging) capability and NPN turn-on delay for MOSFET reordered structures has been carefully considered. Simulations shows significant reduction in the dynamic power dissipation for the transistor reordered BiCMOS structures. The power-delay product figure-of-merit is found to be significantly enhanced without a...
An organic jelly made fractal logic gate with an infinite truth table
Ghosh, Subrata; Fujita, Daisuke; Bandyopadhyay, Anirban
2015-06-01
Widely varying logic gates invented over a century are all finite. As data deluge problem looms large on the information processing and communication industry, the thrust to explore radical concepts is increasing rapidly. Here, we design and synthesis a molecule, wherein, the input energy transmits in a cycle inside the molecular system, just like an oscillator, then, we use the molecule to make a jelly that acts as chain of oscillators with a fractal like resonance band. Hence, with the increasing detection resolution, in the vacant space between two energy levels of a given resonance band, a new band appears, due to fractal nature, generation of newer energy levels never stops. This is natural property of a linear chain oscillator. As we correlate each energy level of the resonance band of organic jelly, as a function of pH and density of the jelly, we realize a logic gate, whose truth table is finite, but if we zoom any small part, a new truth table appears. In principle, zooming of truth table would continue forever. Thus, we invent a new class of infinite logic gate for the first time.
Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations
Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki
2016-01-01
Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.
Zhang, Ting; Cheng, Ying; Yuan, Bao-Guo; Guo, Jian-Zhong; Liu, Xiao-Jun
2016-05-01
The extraordinary transmission in density-near-zero (DNZ) acoustic metamaterials (AMs) provides possibilities to manipulate acoustic signals with extremely large effective phase velocity and wavelength. Here, we report compact transformable acoustic logic gates with a subwavelength size as small as 0.82λ based on DNZ AMs. The basic acoustic logic gates, composed of a tri-port structure filled with space-coiling DNZ AMs, enable precise direct linear interference of input signals with considerably small phase lag and wavefront distortion. We demonstrate both theoretically and experimentally the basic Boolean logic operations such as OR, AND, XOR, and NOT with wide operational frequency ranges and controllability, by adjusting the phase difference between two input signals. More complex logic calculus, such as "I1 + I2 × I3," are also realized by cascading of the basic logic gates. Our proposal provides diverse routes to construct devices for acoustic signal computing and manipulations.
Pu, Fang; Ren, Jinsong; Qu, Xiaogang
2014-06-25
Molecular logic gates in response to chemical, biological, or optical input signals at a molecular level have received much interest over the past decade. Herein, we construct "plug and play" logic systems based on the fluorescence switching of guest molecules confined in coordination polymer nanoparticles generated from nucleotide and lanthanide ions. In the system, the addition of new modules directly enables new logic functions. PASS 0, YES, PASS 1, NOT, IMP, OR, and AND gates are successfully constructed in sequence. Moreover, different logic gates (AND, INH, and IMP) can be constructed using different guest molecules and the same input combinations. The work will be beneficial to the future logic design and expand the applications of coordination polymers.
Possibility designing XNOR and NAND molecular logic gates by using single benzene ring
Abbas, Mohammed A.; Hanoon, Falah H.; Al-Badry, Lafy F.
2017-09-01
This study focused on examining electronic transport through single benzene ring and suggested how such ring can be employed to design XNOR and NAND molecular logic gates. The single benzene ring was threaded by a magnetic flux. The magnetic flux and applied gate voltages were considered as the key tuning parameter in the XNOR and NAND gates operation. All the calculations are achieved by using steady-state theoretical model, which is based on the time-dependent Hamiltonian model. The transmission probability and the electric current are calculated as functions of electron energy and bias voltage, respectively. The application of the anticipated results can be a base for the progress of molecular electronics.
Quantum logic gates with two-level trapped ions beyond Lamb-Dicke limit
Institute of Scientific and Technical Information of China (English)
Zheng Xiao-Juan; Luo Yi-Min; Cai Jian-Wu
2009-01-01
In the system with two two-level ions confined in a linear trap,this paper presents a simple scheme to realize the quantum phase gate(QPG)and the swap gate beyond the Lamb-Dicke(LD)limit.These two-qubit quantum logic gates only involve the internal states of two trapped ions.The scheme does not use the vibrational mode as the data bus and only requires a single resonant interaction of the ions with the lasers.Neither the LD approximation nor the auxiliary atomic level is needed in the proposed scheme.Thus the scheme is simple and the interaction time is very short,which is important in view of decoherence.The experimental feasibility for achieving this scheme is also discussed.
Energy-Efficient and Secure S-Box circuit using Symmetric Pass Gate Adiabatic Logic
Energy Technology Data Exchange (ETDEWEB)
Kumar, Dinesh [University of Kentucky, Lexington; Thapliyal, Himanshu [ORNL; Mohammad, Azhar [University of Kentucky, Lexington; Singh, Vijay [University of Kentucky, Lexington; Perumalla, Kalyan S [ORNL
2016-01-01
Differential Power Analysis (DPA) attack is considered to be a main threat while designing cryptographic processors. In cryptographic algorithms like DES and AES, S-Box is used to indeterminate the relationship between the keys and the cipher texts. However, S-box is prone to DPA attack due to its high power consumption. In this paper, we are implementing an energy-efficient 8-bit S-Box circuit using our proposed Symmetric Pass Gate Adiabatic Logic (SPGAL). SPGAL is energy-efficient as compared to the existing DPAresistant adiabatic and non-adiabatic logic families. SPGAL is energy-efficient due to reduction of non-adiabatic loss during the evaluate phase of the outputs. Further, the S-Box circuit implemented using SPGAL is resistant to DPA attacks. The results are verified through SPICE simulations in 180nm technology. SPICE simulations show that the SPGAL based S-Box circuit saves upto 92% and 67% of energy as compared to the conventional CMOS and Secured Quasi-Adiabatic Logic (SQAL) based S-Box circuit. From the simulation results, it is evident that the SPGAL based circuits are energy-efficient as compared to the existing DPAresistant adiabatic and non-adiabatic logic families. In nutshell, SPGAL based gates can be used to build secure hardware for lowpower portable electronic devices and Internet-of-Things (IoT) based electronic devices.
Design of High-Performance Asynchronous Pipeline Using Synchronizing Logic Gates
Xia, Zhengfan; Ishihara, Shota; Hariyama, Masanori; Kameyama, Michitaka
This paper introduces a novel design method of an asynchronous pipeline based on dual-rail dynamic logic. The overhead of handshake control logic is greatly reduced by constructing a reliable critical datapath, which offers the pipeline high throughput as well as low power consumption. Synchronizing Logic Gates (SLGs), which have no data dependency problem, are used in the design to construct the reliable critical datapath. The design targets latch-free and extremely fine-grain or gate-level pipeline, where the depth of every pipeline stage is only one dual-rail dynamic logic. HSPICE simulation results, in a 65nm design technology, indicate that the proposed design increases the throughput by 120% and decreases the power consumption by 54% compared with PS0, a classic dual-rail asynchronous pipeline implementation style, in 4-bit wide FIFOs. Moreover, this method is applied to design an array style multiplier. It shows that the proposed design reduces power by 37.9% compared to classic synchronous design when the workloads are 55%. A chip has been fabricated with a 4×4 multiplier function, which works well at 2.16G data-set/s (Post-layout simulation).
A quantum logic gate between a solid-state quantum bit and a photon
Kim, Hyochul; Shen, Thomas C; Solomon, Glenn S; Waks, Edo; 10.1038/nphoton.2013.48
2013-01-01
Integrated quantum photonics provides a promising route towards scalable solid-state implementations of quantum networks, quantum computers, and ultra-low power opto-electronic devices. A key component for many of these applications is the photonic quantum logic gate, where the quantum state of a solid-state quantum bit (qubit) conditionally controls the state of a photonic qubit. These gates are crucial for development of robust quantum networks, non-destructive quantum measurements, and strong photon-photon interactions. Here we experimentally realize a quantum logic gate between an optical photon and a solid-state qubit. The qubit is composed of a quantum dot (QD) strongly coupled to a nano-cavity, which acts as a coherently controllable qubit system that conditionally flips the polarization of a photon on picosecond timescales, implementing a controlled-NOT (cNOT) gate. Our results represent an important step towards solid-state quantum networks and provide a versatile approach for probing QD-photon inter...
新型BCD加法器及其可逆逻辑实现%New BCD Adders and Their Reversible Logic Implementation
Institute of Scientific and Technical Information of China (English)
周日贵; 张满群; 吴茜; 施洋
2011-01-01
Reversible logic is a new research area that has developed rapidly in recent years. It has received great attention in all aspects due to their ability to reduce the power dissipation. This paper proposes a new reversible logic gate-NC gate. This gate can independently complete Binary Coded Decimal (BCD) adder overflow detection logic. Meanwhile, with 4×4 reversible adder circuits-ZS gate which was designed by the author, a new reversible BCD adder is designed in this paper. The proposed reversible BCD adder is optimized in terms of number of reversible gates and garbage outputs compared to the previous counterparts.%可逆逻辑是最近几年迅速发展起来的新兴研究领域,由于它在传递信息时能减少能量损耗而引起各方面越来越多的关注.该文设计了一种新型的4×4可逆逻辑门—NC门,该门能够独立实现可逆BCD溢出检测逻辑电路.同时,借助作者曾经设计的4×4可逆加法电路—ZS门,设计出一种新型可逆BCD加法电路.设计的电路与以往的相比,无论是在门的数量上还是在垃圾输出的数量上都达到最优的效果.
Larom, Bar; Nazarathy, Moshe; Rudnitsky, Arkady; Nevet, Amir; Zalevsky, Zeev
2010-06-21
Feasibility of cascading and reconfiguring a pair of linear-nonlinear all-optical logic gate structures is experimentally demonstrated using RF photonics. Progress in highly integrated O/E/O repeaters over Si/InP hybrid platforms enables large-scale reconfigurable gate arrays.
2014-09-01
implementation of XOR/XNOR, making for a more modular nature to implement the common logic gates. The library is used to implement 1-bit full adders and a CIC...implementations. We validate such techniques through the design and simulation of inverters, full adders , and a five-stage cascaded integrator-comb (CIC...filter (inverter, XOR, NAND, flip flop, full adder , ripple carry adder , 26 bits). 2. Circuit Topology/Gate Design/Inverter and Gate Design Trade-Offs
Area efficient digital logic NOT gate using single electron box (SEB
Directory of Open Access Journals (Sweden)
Bahrepour Davoud
2017-01-01
Full Text Available The continuing scaling down of complementary metal oxide semiconductor (CMOS has led researchers to build new devices with nano dimensions, whose behavior will be interpreted based on quantum mechanics. Single-electron devices (SEDs are promising candidates for future VLSI applications, due to their ultra small dimensions and lower power consumption. In most SED based digital logic designs, a single gate is introduced and its performance discussed. While in the SED based circuits the fan out of designed gate circuit should be considered and measured. In the other words, cascaded SED based designs must work properly so that the next stage(s should be driven by the previous stage. In this paper, previously NOT gate based on single electron box (SEB which is an important structure in SED technology, is reviewed in order to obtain correct operation in series connections. The correct operation of the NOT gate is investigated in a buffer circuit which uses two connected NOT gate in series. Then, for achieving better performance the designed buffer circuit is improved by the use of scaling process.
Reversible Gating of Plasmonic Coupling for Optical Signal Amplification.
Khoury, Christopher G; Fales, Andrew M; Vo-Dinh, Tuan
2016-07-20
Amplification of optical signals is useful for a wide variety of applications, ranging from data signal transmission to chemical sensing and biomedical diagnostics. One such application in chemical sensing is surface-enhanced Raman scattering (SERS), an important technique for increasing the Raman signal using the plasmonic effect of enhanced electromagnetic fields associated with metallic nanostructures. One of the most important limitations of SERS-based amplification is the difficulty to reproducibly control the SERS signal. Here, we describe the design and implementation of a unique hybrid system capable of producing reversible gating of plasmonic coupling for Raman signal amplification. The hybrid system is composed of two subsystems: (1) colloidal magneto-plasmonic nanoparticles for SERS enhancement and (2) a micromagnet substrate with an externally applied magnetic field to modulate the colloidal nanoparticles. For this proof of concept demonstration, the nanoparticles were labeled with a Raman-active dye, and it was shown that the detected SERS signal could be reproducibly modulated by controlling the externally applied magnetic field. The developed system provides a simple, robust, inexpensive, and reusable device for SERS signal modulation. These properties will open up new possibilities for optical signal amplification and gating as well for high-throughput, reproducible SERS detection.
Logic Gates Made of N-Channel JFETs and Epitaxial Resistors
Krasowski, Michael J.
2008-01-01
Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform
Lize, Yannick K; Christen, Louis; Nazarathy, Moshe; Nuccio, Scott; Wu, Xiaoxia; Willner, Alan E; Kashyap, Raman
2007-05-28
We present an optical multipath error correction technique for differentially encoded modulation formats such as differential-phase-shift-keying (DPSK) and differential polarization shift keying (DPolSK) for fiber-based and free-space communication. This multipath error correction method combines optical and electronic logic gates. The scheme can easily be implemented using commercially available interferometers and high speed logic gates and does not require any data overhead therefore does not affect the effective bandwidth of the transmitted data. It is not merely compatible but also complementary to error correction codes commonly used in optical transmission systems such as forward-error-correction (FEC). The technique consists of separating the demodulation at the receiver in multiple paths. Each path consists of a Mach-Zehnder interferometer with a different integer bit delay used in each path. Some basic logic operations follow and the three paths are compared using a simple majority vote algorithm. Experimental results show that the scheme improves receiver sensitivity by 1.5 dB at BER of 10(-3),in back-to-back configuration. Numerical results indicate a 1.6 dB improvement in the presence of Chromatic Dispersion for a 25% increase in tolerance for a 3dB penalty from +/-1220 ps/nm to +/-1520 ps/nm. and a 0.35 dB improvement for back-to-back operation.
Skyrmion domain wall collision and domain wall-gated skyrmion logic
Xing, Xiangjun; Pong, Philip W. T.; Zhou, Yan
2016-08-01
Skyrmions and domain walls are significant spin textures of great technological relevance to magnetic memory and logic applications, where they can be used as carriers of information. The unique topology of skyrmions makes them display emergent dynamical properties as compared with domain walls. Some studies have demonstrated that the two topologically inequivalent magnetic objects could be interconverted by using cleverly designed geometric structures. Here, we numerically address the skyrmion domain wall collision in a magnetic racetrack by introducing relative motion between the two objects based on a specially designed junction. An electric current serves as the driving force that moves a skyrmion toward a trapped domain wall pair. We see different types of collision dynamics depending on the driving parameters. Most importantly, the modulation of skyrmion transport using domain walls is realized in this system, allowing a set of domain wall-gated logical NOT, NAND, and NOR gates to be constructed. This work provides a skyrmion-based spin-logic architecture that is fully compatible with racetrack memories.
Shen, Jianxin; Shang, Dashan; Chai, Yisheng; Wang, Yue; Cong, Junzhuang; Shen, Shipeng; Yan, Liqin; Wang, Wenhong; Sun, Young
2016-12-01
Memtranstor that correlates charge and magnetic flux via nonlinear magnetoelectric effects has a great potential in developing next-generation nonvolatile devices. In addition to multilevel nonvolatile memory, we demonstrate here that nonvolatile logic gates such as nor and nand can be implemented in a single memtranstor made of the Ni /PMN -PT /Ni heterostructure. After applying two sequent voltage pulses (X1 , X2 ) as the logic inputs on the memtranstor, the output magnetoelectric voltage can be positive high (logic 1), positive low (logic 0), or negative (logic 0), depending on the levels of X1 and X2 . The underlying physical mechanism is related to the complete or partial reversal of ferroelectric polarization controlled by inputting selective voltage pulses, which determines the magnitude and sign of the magnetoelectric voltage coefficient. The combined functions of both memory and logic could enable the memtranstor as a promising candidate for future computing systems beyond von Neumann architecture.
Ho, Kum-Song; Han, Yong-Ha; Ri, Chol-Song; Im, Song-Jin
2016-08-15
The development of nanoscale optical logic gates has attracted immense attention due to increasing demand for ultrahigh-speed and energy-efficient optical computing and data processing, however, suffers from the difficulty in precise control of phase difference of the two optical signals. We propose a novel conception of nanoscale optical logic gates based on actively phase-controlled coupling between two plasmonic waveguides via an in-between gain-assisted nanoresonator. Precise control of phase difference between the two plasmonic signals can be performed by manipulating pumping rate at an appropriate frequency detuning, enabling a high contrast between the output logic states "1" and "0." Without modification of the structural parameters, different logic functions can be provided. This active nanoscale optical logic device is expected to be quite energy-efficient with ideally low energy consumption on the order of 0.1 fJ/bit. Analytical calculations and numerical experiments demonstrate the validity of the proposed concept.
Son, Donghee; Koo, Ja Hoon; Song, Jun-Kyul; Kim, Jaemin; Lee, Mincheol; Shim, Hyung Joon; Park, Minjoon; Lee, Minbaek; Kim, Ji Hoon; Kim, Dae-Hyeong
2015-05-26
Electronics for wearable applications require soft, flexible, and stretchable materials and designs to overcome the mechanical mismatch between the human body and devices. A key requirement for such wearable electronics is reliable operation with high performance and robustness during various deformations induced by motions. Here, we present materials and device design strategies for the core elements of wearable electronics, such as transistors, charge-trap floating-gate memory units, and various logic gates, with stretchable form factors. The use of semiconducting carbon nanotube networks designed for integration with charge traps and ultrathin dielectric layers meets the performance requirements as well as reliability, proven by detailed material and electrical characterizations using statistics. Serpentine interconnections and neutral mechanical plane layouts further enhance the deformability required for skin-based systems. Repetitive stretching tests and studies in mechanics corroborate the validity of the current approaches.
Implementation of Quantum Logic Gates Using Polar Molecules in Pendular States
Zhu, Jing; Wei, Qi; Herschbach, Dudley; Friedrich, Bretislav
2012-01-01
We present a systematic approach to implementation of basic quantum logic gates operating on polar molecules in pendular states as qubits for a quantum computer. A static electric field prevents quenching of the dipole moments by rotation, thereby creating the pendular states; also, the field gradient enables distinguishing among qubit sites. Multi-Target Optimal Control Theory (MTOCT) is used as a means of optimizing the initial-to-target transition probability via a laser field. We give detailed calculations for the SrO molecule, a favorite candidate for proposed quantum computers. Our simulation results indicate that NOT, Hadamard and CNOT gates can be realized with high fidelity for such pendular qubit states.
Dynamically Arranging Gold Nanoparticles on DNA Origami for Molecular Logic Gates.
Yang, Jing; Song, Zhichao; Liu, Shi; Zhang, Qiang; Zhang, Cheng
2016-08-31
In molecular engineering, DNA molecules have been extensively studied owing to their capacity for accurate structural control and complex programmability. Recent studies have shown that the versatility and predictability of DNA origami make it an excellent platform for constructing nanodevices. In this study, we developed a strand-displacing strategy to selectively and dynamically release specific gold nanoparticles (AuNPs) on a rectangular DNA origami. A set of DNA logic gates ("OR", "AND", and "three-input majority gate") were established based on this strategy, in which computing results were identified by disassembly between the AuNPs and DNA origami. The computing results were detected using experimental approaches such as gel electrophoresis and transmission electron microscopy (TEM). This method can be used to assemble more complex nanosystems and may have potential applications for molecular engineering.
Logic Gates and Ring Oscillators Based on Ambipolar Nanocrystalline-Silicon TFTs
Directory of Open Access Journals (Sweden)
Anand Subramaniam
2013-01-01
Full Text Available Nanocrystalline silicon (nc-Si thin film transistors (TFTs are well suited for circuit applications that require moderate device performance and low-temperature CMOS-compatible processing below 250°C. Basic logic gate circuits fabricated using ambipolar nc-Si TFTs alone are presented and shown to operate with correct outputs at frequencies of up to 100 kHz. Ring oscillators consisting of nc-Si TFT-based inverters are also shown to operate at above 20 kHz with a supply voltage of 5 V, corresponding to a propagation delay of 5 V for several hours.
Guo, Jun-Hong; Kong, De-Ming; Shen, Han-Xi
2010-10-15
This paper describes the construction of a DNA IMPLICATION logic gate based on triphenylmethane (TPM) dye/G-quadruplex complexes, using Ag+ and cysteine (Cys) as the two inputs, and fluorescence intensity of the TPM dye as the output signal. Free triphenylmethane (TPM) dyes emit inherently low fluorescence signal, the formation of TPM dye/G-quadruplex complexes yielded greatly enhanced fluorescence signals from the dye, and the output signal of the gate was 1. The addition of Cys had no effect on the fluorescence signal, again yielding an output of 1. However, the addition of Ag+ instead of Cys greatly disrupted the G-quadruplex structure, causing a decrease in the fluorescence of the dye, and yielding an output signal of 0. The addition of Cys into the Ag+-quenched fluorescence system led to the release of Ag+ from G-quadruplex-forming DNAs, resulting in the reformation of G-quadruplex structures and the recovery of TMP dye fluorescence, the output signal of 1 was obtained again. Compared with previously published DNA logic gates, the gate operation described here was rapid and reversible, with a reliable, nondestructive readout and excellent digital behavior. In addition, the modulation of TPM dye/G-quadruplex complex fluorescence by Ag+ and Cys could be used to develop a simple, fast, label-free and highly specific homogenous sensing methods for Ag+ and Cys. Copyright © 2010 Elsevier B.V. All rights reserved.
High-speed all-optical NAND/AND logic gates using four-wave mixing Bragg scattering.
Li, Kangmei; Ting, Hong-Fu; Foster, Mark A; Foster, Amy C
2016-07-15
A high-speed all-optical NAND logic gate is proposed and experimentally demonstrated using four-wave mixing Bragg scattering in highly nonlinear fiber. NAND/AND logic functions are implemented at two wavelengths by encoding logic inputs on two pumps via on-off keying. A 15.2-dB depletion of the signal is obtained for NAND operation, and time domain measurements show 10-Gb/s NAND/AND logic operations with open eye diagrams. The approach can be readily extended to higher data rates and transferred to on-chip waveguide platforms.
Chen, Qi; Yoo, Si-Youl; Chung, Yong-Ho; Lee, Ji-Young; Min, Junhong; Choi, Jeong-Woo
2016-10-01
Various bio-logic gates have been studied intensively to overcome the rigidity of single-function silicon-based logic devices arising from combinations of various gates. Here, a simple control tool using electrochemical signals from quantum dots (QDs) was constructed using DNA and organic materials for multiple logic functions. The electrochemical redox current generated from QDs was controlled by the DNA structure. DNA structure, in turn, was dependent on the components (organic materials) and the input signal (pH). Independent electrochemical signals from two different logic units containing QDs were merged into a single analog-type logic gate, which was controlled by two inputs. We applied this electrochemical biodevice to a simple logic system and achieved various logic functions from the controlled pH input sets. This could be further improved by choosing QDs, ionic conditions, or DNA sequences. This research provides a feasible method for fabricating an artificial intelligence system. Copyright © 2016 Elsevier B.V. All rights reserved.
Ultracompact all-optical XOR logic gate in a slow-light silicon photonic crystal waveguide.
Husko, C; Vo, T D; Corcoran, B; Li, J; Krauss, T F; Eggleton, B J
2011-10-10
We demonstrate an ultracompact, chip-based, all-optical exclusive-OR (XOR) logic gate via slow-light enhanced four-wave mixing (FWM) in a silicon photonic crystal waveguide (PhCWG). We achieve error-free operation (<10⁻⁹) for 40 Gbit/s differential phase-shift keying (DPSK) signals with a 2.8 dB power penalty. Slowing the light to vg = c/32 enables a FWM conversion efficiency, η, of -30 dB for a 396 μm device. The nonlinear FWM process is enhanced by 20 dB compared to a relatively fast mode of vg = c/5. The XOR operation requires ≈ 41 mW, corresponding to a switching energy of 1 pJ/bit. We compare the slow-light PhCWG device performance with experimentally demonstrated XOR DPSK logic gates in other platforms and discuss scaling the device operation to higher bit-rates. The ultracompact structure suggests the potential for device integration.
Fast Rydberg antiblockade regime and its applications in quantum logic gates
Su, Shi-Lei; Gao, Ya; Liang, Erjun; Zhang, Shou
2017-02-01
Unlike the Rydberg blockade regime, the Rydberg antiblockade regime (RABR) allows more than one Rydberg atom to be excited, which can bring other interesting phenomena and applications. We propose an alternative scheme to quickly achieve the RABR. The proposed RABR can be implemented by adjusting the detuning of the classical driving field, which is, in turn, based on the former numbers of the excited Rydberg atoms. In contrast to the former schemes, the current one enables more than two atoms to be excited to Rydberg states in a short period of time and thus is useful for large-scale quantum information processing. The proposed RABR can be used to construct two- and multiqubit quantum logic gates. In addition, a Rydberg excitation superatom, which can decrease the blockade error and enlarge the blockade radius for Rydberg blockade-based schemes, is constructed based on the suggested RABR and used to realize a more robust quantum logic gate. The mechanical effect and the ionization are discussed, and the performance is investigated using the master-equation method. Finally, other possible applications of the present RABR are also given.
Source-Coupled, N-Channel, JFET-Based Digital Logic Gate Structure Using Resistive Level Shifters
Krasowski, Michael J.
2011-01-01
A circuit topography is used to create usable, digital logic gates using N (negatively doped) channel junction field effect transistors (JFETs), load resistors, level shifting resistors, and supply rails whose values are based on the DC parametric distributions of these JFETs. This method has direct application to the current state-of-the-art in high-temperature (300 to 500 C and higher) silicon carbide (SiC) device production, and defines an adaptation to the logic gate described in U.S. Patent 7,688,117 in that, by removing the level shifter from the output of the gate structure described in the patent (and applying it to the input of the same gate), a source-coupled gate topography is created. This structure allows for the construction AND/OR (sum of products) arrays that use far fewer transistors and resistors than the same array as constructed from the gates described in the aforementioned patent. This plays a central role when large multiplexer constructs are necessary; for example, as in the construction of memory. This innovation moves the resistive level shifter from the output of the basic gate structure to the front as if the input is now configured as what would be the output of the preceding gate, wherein the output is the two level shifting resistors. The output of this innovation can now be realized as the lone follower transistor with its source node as the gate output. Additionally, one may leave intact the resistive level shifter on the new gate topography. A source-coupled to direct-coupled logic translator will be the result.
Influence of non-resonant effects on the dynamics of quantum logic gates at room temperature
Berman, G. P.; Bishop, A. R.; Doolen, G. D.; López, G. V.; Tsifrinovich, V. I.
2001-01-01
We study numerically the influence of non-resonant effects on the dynamics of a single- π-pulse quantum CONTROL-NOT (CN) gate in a macroscopic ensemble of four-spin molecules at room temperature. The four nuclear spins in each molecule represent a four-qubit register. The qubits are “labeled” by the characteristic frequencies, ωk, ( k=0-3) due to the Zeeman interaction of the nuclear spins with the magnetic field. The qubits interact with each other through an Ising interaction of strength J. The paper examines the feasibility of implementing a single-pulse quantum CN gate in an ensemble of quantum molecules at room temperature. We determine a parameter region, ωk and J, in which a single-pulse quantum CN gate can be implemented at room temperature. We also show that there exist characteristic critical values of parameters, Δ ωcr≡| ωk‧ - ωk| cr and Jcr, such that for JJcr and Δ ωk≡| ωk‧ - ωk|<Δ ωcr, non-resonant effects are sufficient to destroy the dynamics required for quantum logic operations.
Jiang, Yanan; Liu, Nannan; Guo, Wei; Xia, Fan; Jiang, Lei
2012-09-19
Integrating biological components into artificial devices establishes an interface to understand and imitate the superior functionalities of the living systems. One challenge in developing biohybrid nanosystems mimicking the gating function of the biological ion channels is to enhance the gating efficiency of the man-made systems. Herein, we demonstrate a DNA supersandwich and ATP gated nanofluidic device that exhibits high ON-OFF ratios (up to 10(6)) and a perfect electric seal at its closed state (~GΩ). The ON-OFF ratio is distinctly higher than existing chemically modified nanofluidic gating systems. The gigaohm seal is comparable with that required in ion channel electrophysiological recording and some lipid bilayer-coated nanopore sensors. The gating function is implemented by self-assembling DNA supersandwich structures into solid-state nanochannels (open-to-closed) and their disassembly through ATP-DNA binding interactions (closed-to-open). On the basis of the reversible and all-or-none electrochemical switching properties, we further achieve the IMPLICATION logic operations within the nanofluidic structures. The present biohybrid nanofluidic device translates molecular events into electrical signals and indicates a built-in signal amplification mechanism for future nanofluidic biosensing and modular DNA computing on solid-state substrates.
Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory
Energy Technology Data Exchange (ETDEWEB)
Li, Y.; Zhong, Y. P.; Deng, Y. F.; Zhou, Y. X.; Xu, L.; Miao, X. S., E-mail: miaoxs@mail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics (WNLO), Huazhong University of Science and Technology (HUST), Wuhan 430074 (China); School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074 (China)
2013-12-21
Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.
Li, Lei; Qi, Zhipeng; Hu, Guohua; Yun, Binfeng; Zhong, Yuan; Cui, Yiping
2016-10-01
A compact electro-optical "NOR" logic gate device based on silicon-on-insulator (SOI) platform is proposed and investigated theoretically. By introducing a hook-type waveguide, the signal could be coupled between the bus and hook-type waveguide to form an optical circuit and realize NOR logic gate. We can easily realize the NOR logical function by the voltage applied on the coupling components. The numerical simulation shows that a high coupling efficiency of more than 99% is obtained at the wavelength of 1550 nm, and the footprint of our device is smaller than 90 μm2. In addition, the response time of the proposed NOR logic gate is 3 ns with a switching voltage of 1.8 V. Moreover, it is demonstrated that such NOR logic gate device could obtain an extinction ratio of 21.8 dB. Thus, it has great potential to achieve high speed response, low power consumption, and small footprint, which fulfill the demands of next-generation on-chip computer multiplex processors.
Cost Efficient Design Approach for Reversible Programmable Logic Arrays
Directory of Open Access Journals (Sweden)
Md. RiazurRahman
2016-06-01
Full Text Available Reversible programmable logicarrays (PLA are at the heart of designing of efficient low power computers. This paper presents anefficient approach to design Reversible PLAs that maximizes the usability of garbage outputs and also reduces the number of ancilla inputs generated. The designfor proposed essentialcomponents and the architecture of reversible grid network for designing AND and EX-OR planes are also presented. Several algorithms have been proposed and presented to describe the programming interfaces in context of Reversible PLAs construction. Lastly, recent result on the trade-off between cost factors of standard benchmarkcircuits shows that the proposed design clearly outperforms the existing ones in terms various cost factors.
Liu, Shuang; Wang, Lei; Lian, Wenjing; Liu, Hongyun; Li, Chen-Zhong
2015-01-01
A logic-gate system with three outputs and three inputs was developed based on the bioelectrocatalysis of glucose by glucose oxidase (GOx) entrapped in chitosan films on the electrode surface by means of ferrocenedicarboxylic acid (Fc(COOH)2 ). Cyclic voltammetric (CV) signals of Fc(COOH)2 exhibited pH-triggered on/off behavior owing to electrostatic interactions between the film and the probe at different pH levels. The addition of glucose greatly increased the oxidation peak current (Ipa ) through the electrocatalytic reaction. pH and glucose were selected as two inputs. As a reversible inhibitor of GOx, Cu(2+) was chosen as the third input. The combination of three inputs led to Ipa with different values according to different mechanisms, which were defined as three outputs with two thresholds. The logic gate with three outputs by using one type of enzyme provided a novel model to build logic circuits based on biomacromolecules, which might be applied to the intelligent medical diagnostics as smart biosensors in the future. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Design of a High Performance Reversible Multiplier
Directory of Open Access Journals (Sweden)
Md.Belayet Ali
2011-11-01
Full Text Available Reversible logic circuits are increasingly used in power minimization having applications such as low power CMOS design, optical information processing, DNA computing, bioinformatics, quantum computing and nanotechnology. The problem of minimizing the number of garbage outputs is an important issue in reversible logic design. In this paper we propose a new 44 universal reversible logic gate. The proposed reversible gate can be used to synthesize any given Boolean functions. The proposed reversible gate also can be used as a full adder circuit. In this paper we have used Peres gate and the proposed Modified HNG (MHNG gate to construct the reversible fault tolerant multiplier circuit. We show that the proposed 44 reversible multiplier circuit has lower hardware complexity and it is much better and optimized in terms of number of reversible gates and number of garbage outputs with compared to the existing counterparts.
A nanomechanical Fredkin gate.
Wenzler, Josef-Stefan; Dunn, Tyler; Toffoli, Tommaso; Mohanty, Pritiraj
2014-01-08
Irreversible logic operations inevitably discard information, setting fundamental limitations on the flexibility and the efficiency of modern computation. To circumvent the limit imposed by the von Neumann-Landauer (VNL) principle, an important objective is the development of reversible logic gates, as proposed by Fredkin, Toffoli, Wilczek, Feynman, and others. Here, we present a novel nanomechanical logic architecture for implementing a Fredkin gate, a universal logic gate from which any reversible computation can be built. In addition to verifying the truth table, we demonstrate operation of the device as an AND, OR, NOT, and FANOUT gate. Excluding losses due to resonator dissipation and transduction, which will require significant improvement in order to minimize the overall energy cost, our device requires an energy of order 10(4) kT per logic operation, similar in magnitude to state-of-the-art transistor-based technologies. Ultimately, reversible nanomechanical logic gates could play a crucial role in developing highly efficient reversible computers, with implications for efficient error correction and quantum computing.
Privman, Vladimir; Arugula, Mary A; Halámek, Jan; Pita, Marcos; Katz, Evgeny
2009-04-16
We develop an approach aimed at optimizing the parameters of a network of biochemical logic gates for reduction of the "analog" noise buildup. Experiments for three coupled enzymatic AND gates are reported, illustrating our procedure. Specifically, starch, one of the controlled network inputs, is converted to maltose by beta-amylase. With the use of phosphate (another controlled input), maltose phosphorylase then produces glucose. Finally, nicotinamide adenine dinucleotide (NAD(+)), the third controlled input, is reduced under the action of glucose dehydrogenase to yield the optically detected signal. Network functioning is analyzed by varying selective inputs and fitting standardized few-parameters "response-surface" functions assumed for each gate. This allows a certain probe of the individual gate quality, but primarily yields information on the relative contribution of the gates to noise amplification. The derived information is then used to modify our experimental system to put it in a regime of a less noisy operation.
Reduction of Power Dissipation in Dynamic BiCMOS Logic Gates by Transistor Reordering
Directory of Open Access Journals (Sweden)
S. M. Rezaul Hasan
2002-01-01
Full Text Available This paper explores the deterministic transistor reordering in low-voltage dynamic BiCMOS logic gates, for reducing the dynamic power dissipation. The constraints of load driving (discharging capability and NPN turn-on delay for MOSFET reordered structures has been carefully considered. Simulations shows significant reduction in the dynamic power dissipation for the transistor reordered BiCMOS structures. The power-delay product figure-of-merit is found to be significantly enhanced without any associated silicon-area penalty. In order to experimentally verify the reduction in power dissipation, original and reordered structures were fabricated using the MOSIS 2 μm N-well analog CMOS process which has a P-base layer for bipolar NPN option. Measured results shows a 20% reduction in the power dissipation for the transistor reordered structure, which is in close agreement with the simulation.
Analysis of Pocket Double Gate Tunnel FET for Low Stand by Power Logic Circuits
Directory of Open Access Journals (Sweden)
Kamal K. Jha
2013-12-01
Full Text Available For low power circuits downscaling of MOSFET has a major issue of scaling of voltage which has ceased after 1V. This paper highlights comparative study and analysis of pocket double gate tunnel FET (DGTFET with MOSFET for low standby power logic circuits. The leakage current of pocket DGTFET and MOSFET have been studied and the analysis results shows that the pocket DGTFET gives the lower leakage current than the MOSFET. Further a pocket DGTFET inverter circuit is design in 32 nm technology node at VDD =0.6 V. The pocket DGTFET inverter shows the significant improvement on the leakage power than multi-threshold CMOS (MTCMOS inverter. The leakage power of pocket DGFET and MTCMOS inverter are 0.116 pW and 1.83 pW respectively. It is found that, the pocket DGTFET can replace the MOSFET for low standby power circuits.
IST-LASAGNE: Towards all-optical label swapping employing optical logic gates and optical flip-flops
DEFF Research Database (Denmark)
Ramos, F.; Kehayas, E.; Martinez, J.M.
2005-01-01
The Information Society Technologies - all-optical LAbel SwApping employing optical logic Gates in NEtwork nodes (IST-LASAGNE) project aims at designing and implementing the first, modular, scalable, and truly all-optical photonic router capable of operating at 40 Gb/s. The results of the first...
IST-LASAGNE: Towards all-optical label swapping employing optical logic gates and optical flip-flops
DEFF Research Database (Denmark)
Ramos, F.; Kehayas, E.; Martinez, J.M.
2005-01-01
The Information Society Technologies - all-optical LAbel SwApping employing optical logic Gates in NEtwork nodes (IST-LASAGNE) project aims at designing and implementing the first, modular, scalable, and truly all-optical photonic router capable of operating at 40 Gb/s. The results of the first...
Genetic program based data mining to reverse engineer digital logic
Smith, James F., III; Nguyen, Thanh Vu H.
2006-04-01
A data mining based procedure for automated reverse engineering and defect discovery has been developed. The data mining algorithm for reverse engineering uses a genetic program (GP) as a data mining function. A genetic program is an algorithm based on the theory of evolution that automatically evolves populations of computer programs or mathematical expressions, eventually selecting one that is optimal in the sense it maximizes a measure of effectiveness, referred to as a fitness function. The system to be reverse engineered is typically a sensor. Design documents for the sensor are not available and conditions prevent the sensor from being taken apart. The sensor is used to create a database of input signals and output measurements. Rules about the likely design properties of the sensor are collected from experts. The rules are used to create a fitness function for the genetic program. Genetic program based data mining is then conducted. This procedure incorporates not only the experts' rules into the fitness function, but also the information in the database. The information extracted through this process is the internal design specifications of the sensor. Uncertainty related to the input-output database and the expert based rule set can significantly alter the reverse engineering results. Significant experimental and theoretical results related to GP based data mining for reverse engineering will be provided. Methods of quantifying uncertainty and its effects will be presented. Finally methods for reducing the uncertainty will be examined.
A Library-Based Synthesis Methodology for Reversible Logic
Saeedi, Mehdi; Zamani, Morteza Saheb; 10.1016/j.mejo.2010.02.002
2010-01-01
In this paper, a library-based synthesis methodology for reversible circuits is proposed where a reversible specification is considered as a permutation comprising a set of cycles. To this end, a pre-synthesis optimization step is introduced to construct a reversible specification from an irreversible function. In addition, a cycle-based representation model is presented to be used as an intermediate format in the proposed synthesis methodology. The selected intermediate format serves as a focal point for all potential representation models. In order to synthesize a given function, a library containing seven building blocks is used where each building block is a cycle of length less than 6. To synthesize large cycles, we also propose a decomposition algorithm which produces all possible minimal and inequivalent factorizations for a given cycle of length greater than 5. All decompositions contain the maximum number of disjoint cycles. The generated decompositions are used in conjunction with a novel cycle assi...
Ultracompact all-optical logic gates based on nonlinear plasmonic nanocavities
Yang, Xiaoyu; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang
2017-01-01
In this study, nanoscale integrated all-optical XNOR, XOR, and NAND logic gates were realized based on all-optical tunable on-chip plasmon-induced transparency in plasmonic circuits. A large nonlinear enhancement was achieved with an organic composite cover layer based on the resonant excitation-enhancing nonlinearity effect, slow light effect, and field confinement effect provided by the plasmonic nanocavity mode, which ensured a low excitation power of 200 μW that is three orders of magnitude lower than the values in previous reports. A feature size below 600 nm was achieved, which is a one order of magnitude lower compared to previous reports. The contrast ratio between the output logic states "1" and "0" reached 29 dB, which is among the highest values reported to date. Our results not only provide an on-chip platform for the study of nonlinear and quantum optics but also open up the possibility for the realization of nanophotonic processing chips based on nonlinear plasmonics.
A Cu²⁺-selective fluorescent chemosensor based on BODIPY with two pyridine ligands and logic gate.
Huang, Liuqian; Zhang, Jing; Yu, Xiaoxiu; Ma, Yifan; Huang, Tianjiao; Shen, Xi; Qiu, Huayu; He, Xingxing; Yin, Shouchun
2015-06-15
A novel near-infrared fluorescent chemosensor based on BODIPY (Py-1) has been synthesized and characterized. Py-1 displays high selectivity and sensitivity for sensing Cu(2+) over other metal ions in acetonitrile. Upon addition of Cu(2+) ions, the maximum absorption band of Py-1 in CH3CN displays a red shift from 603 to 608 nm, which results in a visual color change from pink to blue. When Py-1 is excited at 600 nm in the presence of Cu(2+), the fluorescent emission intensity of Py-1 at 617 nm is quenched over 86%. Notably, the complex of Py-1-Cu(2+) can be restored with the introduction of EDTA or S(2-). Consequently, an IMPLICATION logic gate at molecular level operating in fluorescence mode with Cu(2+) and S(2-) as chemical inputs can be constructed. Finally, based on the reversible and reproducible system, a nanoscale sequential memory unit displaying "Writing-Reading-Erasing-Reading" functions can be integrated. Copyright © 2015 Elsevier B.V. All rights reserved.
Roy, Sukhdev; Yadav, Chandresh
2014-12-01
We propose a model for the early sub-picosecond (sub-ps) transitions in the photochromic bacteriorhodopsin (BR) protein photocycle (B570 → H → I460 → J625 → B570) and present a detailed analysis of ultrafast all-optical switching for different pump-probe combinations. BR excitation with 120 fs pump pulses at 570 or 612 nm results in the switching of cw probe beams at 460 and 580 nm exhibiting reverse saturable absorption (RSA) and saturable absorption (SA) respectively. The effect of pump intensity, pump pulse width, lifetime of I460 state, thickness and concentration on switching has been studied in detail. It is shown that low intensity (MW cm-2), high contrast (100%), sub-ps all-optical switching can be achieved with BR-gold nanoparticle solutions. The validity of the proposed model is evident from the good agreement of theoretical simulations with reported experimental results. The switching characteristics have been optimized to design ultrafast all-optical parallel NOT, OR, AND and the universal NOR and NAND logic gates. High contrast, ultrafast switching at relatively lower pump intensities, compared to other organic molecules, opens up exciting prospects for ultrafast, all-optical information processing with BR and BR nano-biophotonic hybrid materials.
Li, Qiliang; Zhang, Zhen; Li, Dongqiang; Zhu, Mengyun; Tang, Xianghong; Li, Shuqin
2014-12-01
In this paper, we theoretically investigate all-optical logical gates based on the pump-induced resonant nonlinearity in an erbium-doped fiber coupler. The resonant nonlinearity yielded by the optical transitions between the (4)I(15/2) states and (4)I(13/2) states in Er(3+) induces the refractive index to change, which leads to switching between two output ports. First, we do a study on the switching performance, and calculate the extinction ratio (Xratio) of the device. Second, using the Xratio, we obtain the truth tables of the device. The results reveal that compared with other undoped nonlinear couplers, the erbium-doped fiber coupler can drop the switching threshold power. We also obtain different logic gates and logic operations in the cases of the same phase and different phase of two initial signals by changing the pump power.
Ferritin-templated quantum dots for quantum logic gates (Invited Paper)
Choi, Sang H.; Kim, Jae-Woo; Chu, Sang-Hyon; Park, Yeonjoon; King, Glen C.; Lillehei, Peter T.; Kim, Seon-Jeong; Elliott, James R.
2005-05-01
Quantum logic gates (QLGs) or other logic systems are based on quantum-dots (QD) with a stringent requirement of size uniformity. The QD are widely known building units for QLGs. The size control of QD is a critical issue in quantum-dot fabrication. The work presented here offers a new method to develop quantum-dots using a bio-template, called ferritin, that ensures QD production in uniform size of nano-scale proportion. This technology is essential for NASA, DoD, and industrial nanotechnology applications such as: ultra-high density data storage, quantum electronic devices, biomedical nanorobots, molecular tagging, terahertz radiation sources, nanoelectromechanical systems (NEMS), etc. The bio-template for uniform yield of QD is based on a ferritin protein that allows reconstitution of core material through the reduction and chelation processes. By either the magnetic or electrical property of reconstituted core materials, the QD can be used for logic gates which are fundamental building blocks for quantum computing. However, QLGs are in an incubation stage and still have many potential obstacles that need to be addressed, such as an error collection, a decoherence, and a hardware architecture. One of the biggest challenges for developing QLG is the requirement of ordered and uniform size of QD for arrays on a substrate with nanometer precision. The other methods known so far, such as self-assembled QD grown in the Stranski-Krastanov mode, are usually randomly organized. The QD development by bio-template includes the electrochemical/chemical reconstitution of ferritins with different core materials, such as iron, cobalt, manganese, platinum, and nickel. The other bio-template method used in our laboratory is dendrimers, precisely defined chemical structures. With ferritin-templated QD, we fabricated the heptagon-shaped patterned array via direct nano manipulation of the ferritin molecules with a tip of atomic force microscope (AFM). We also designed various
Zhong, Dongzhou; Luo, Wei; Xu, Geliang
2016-09-01
Using the dynamical properties of the polarization bistability that depends on the detuning of the injected light, we propose a novel approach to implement reliable all-optical stochastic logic gates in the cascaded vertical cavity surface emitting lasers (VCSELs) with optical-injection. Here, two logic inputs are encoded in the detuning of the injected light from a tunable CW laser. The logic outputs are decoded from the two orthogonal polarization lights emitted from the optically injected VCSELs. For the same logic inputs, under electro-optic modulation, we perform various digital signal processing (NOT, AND, NAND, XOR, XNOR, OR, NOR) in the all-optical domain by controlling the logic operation of the applied electric field. Also we explore their delay storages by using the mechanism of the generalized chaotic synchronization. To quantify the reliabilities of these logic gates, we further demonstrate their success probabilities. Project supported by the National Natural Science Foundation of China (Grant No. 61475120) and the Innovative Projects in Guangdong Colleges and Universities, China (Grant Nos. 2014KTSCX134 and 2015KTSCX146).
Institute of Scientific and Technical Information of China (English)
Lilin Yi; Weisheng Hu; Hao He; Yi Dong; Yaohui Jin; Weiqiang Sun
2011-01-01
We demonstrate an all-optical reconfigurable logic gate based on dominant nonlinear polarization rotation accompanied with cross-gain modulation effect in a singlc semiconductor optical amplifier (SOA). Five logic functions, including NOT, OR, NOR, AND, and NAND, are realized using 10-Gb/s on-off keying signals with flexible wavelength tunability. The operation principle is explained in detail. By adjusting polarization controllers, multiple logic functions corresponding to different input polarization states are separately achieved using a single SOA with high flexibility.%@@ We demonstrate an all-optical reconfigurable logic gate based on dominant nonlinear polarization rotation accompanied with cross-gain modulation effect in a single semiconductor optical amplifier (SOA).Five logic functions, including NOT, OR, NOR, AND, and NAND, are realized using 10-Gb/s on-off keying signals with flexible wavelength tunability.The operation principle is explained in detail.By adjusting polarization controllers, multiple logic functions corresponding to different input polarization states are separately achieved using a single SOA with high flexibility.
Bian, Yusheng; Gong, Qihuang
2014-02-01
The whole set of fundamental all-optical logic gates is realized theoretically using a multi-channel configuration based on one-dimensional (1D) metal-insulator-metal (MIM) structures by leveraging the linear interference between surface plasmon polariton modes. The working principle and conditions for different logic functions are analyzed and demonstrated numerically by means of the finite element method. In contrast to most of the previous studies that require more than one type of configuration to achieve different logic functions, a single geometry with fixed physical dimensions can realize all fundamental functions in our case studies. It is shown that by switching the optical signals to different input channels, the presented device can realize simple logic functions such as OR, AND and XOR. By adding signal in the control channel, more functions including NOT, XNOR, NAND and NOR can be implemented. For these considered logic functions, high intensity contrast ratios between Boolean logic states "1" and "0" can be achieved at the telecom wavelength. The presented all-optical logic device is simple, compact and efficient. Moreover, the proposed scheme can be applied to many other nano-photonic logic devices as well, thereby potentially offering useful guidelines for their designs and further applications in on-chip optical computing and optical interconnection networks.
Zhang, Li; Wang, Zhong-Xia; Liang, Ru-Ping; Qiu, Jian-Ding
2013-07-16
Utilizing the principles of metal-ion-mediated base pairs (C-Ag-C and T-Hg-T), the pH-sensitive conformational transition of C-rich DNA strand, and the ligand-exchange process triggered by DL-dithiothreitol (DTT), a system of colorimetric logic gates (YES, AND, INHIBIT, and XOR) can be rationally constructed based on the aggregation of the DNA-modified Au NPs. The proposed logic operation system is simple, which consists of only T-/C-rich DNA-modified Au NPs, and it is unnecessary to exquisitely design and alter the DNA sequence for different multiple molecular logic operations. The nonnatural base pairing combined with unique optical properties of Au NPs promises great potential in multiplexed ion sensing, molecular-scale computers, and other computational logic devices.
Wu, Cuichen; Wan, Shuo; Hou, Weijia; Zhang, Liqin; Xu, Jiehua; Cui, Cheng; Wang, Yanyue; Hu, Jun; Tan, Weihong
2015-03-04
Nucleic acid-based logic devices were first introduced in 1994. Since then, science has seen the emergence of new logic systems for mimicking mathematical functions, diagnosing disease and even imitating biological systems. The unique features of nucleic acids, such as facile and high-throughput synthesis, Watson-Crick complementary base pairing, and predictable structures, together with the aid of programming design, have led to the widespread applications of nucleic acids (NA) for logic gate and computing in biotechnology and biomedicine. In this feature article, the development of in vitro NA logic systems will be discussed, as well as the expansion of such systems using various input molecules for potential cellular, or even in vivo, applications.
Realization of the Fredkin gate using a series of one- and two-body operators
Chau, H F; Chau, Hoi Fung; Wilczek, F
1995-01-01
The Fredkin 3-bit gate is universal for computational logic, and is reversible. Classically, it is impossible to do universal computation using reversible 2-bit gates only. Here we construct the Fredkin gate using a combination of two one-body and seven two-body reversible (quantum) operators.
Dadgour, Hamed F.
2010-01-01
Nano-Electro-Mechanical Switches (NEMS) are among the most promising emerging devices due to their near-zero subthreshold-leakage currents. This paper reports device fabrication and modeling, as well as novel logic gate design using "laterally-actuated double-electrode NEMS" structures. The new device structure has several advantages over existing NEMS architectures such as being immune to impact bouncing and release vibrations (unlike a vertically-actuated NEMS) and offer higher flexibility to implement compact logic gates (unlike a single-electrode NEMS). A comprehensive analytical framework is developed to model different properties of these devices by solving the Euler-Bernoulli\\'s beam equation. The proposed model is validated using measurement data for the fabricated devices. It is shown that by ignoring the non-uniformity of the electrostatic force distribution, the existing models "underestimate" the actual value of Vpull-in and Vpull-out. Furthermore, novel energy efficient NEMS-based circuit topologies are introduced to implement compact inverter, NAND, NOR and XOR gates. For instance, the proposed XOR gate can be implemented by using only two NEMS devices compared to that of a static CMOS-based XOR gate that requires at least 10 transistors. © Copyright 2010 ACM.
Europium Luminescence Used for Logic Gate and Ions Sensing with Enoxacin As the Antenna.
Lu, Lixia; Chen, Chuanxia; Zhao, Dan; Sun, Jian; Yang, Xiurong
2016-01-19
Luminescent lanthanide ion complexes have received increasing attention because of their unique optical properties. Herein, we discovered that the luminescence of europium(III) (Eu(3+)) could be regulated by Ag(+) and SCN(-) in seconds with enoxacin (ENX) as the antenna. Under given conditions, only the simultaneous introduction of Ag(+) and SCN(-) could remarkably enhance the luminescence intensity of Eu(3+)-ENX complexes. This phenomenon has been exploited to design an "AND" logic gate and specific luminescence turn-on assays for sensitively sensing Ag(+) and SCN(-) for the first time. Furthermore, the addition of S(2-) resulted in efficient luminescence quenching of the Eu(3+)/ENX/Ag(+)/SCN(-) system due to the strong affinity between Ag(+) and S(2-). Thus, a new luminescent sensing platform for S(2-) was established, which exhibited excellent selectivity and high sensitivity. S(2-) could be detected within the concentration range of 100 nM to 12.5 μM with a detection limit of 60 nM. Such sensing system features simplicity, rapidity, and flexibility. Moreover, this proposed Eu(3+)-based luminescent assay could be successfully applied in the real environmental water sample analysis.
Pangannaya, Srikala; Purayil, Neethu Padinchare; Dabhi, Shweta; Mankad, Venu; Jha, Prafulla K; Shinde, Satyam
2017-01-01
New colorimetric receptors R1 and R2 with varied positional substitution of a cyano and nitro signaling unit having a hydroxy functionality as the hydrogen bond donor site have been designed, synthesized and characterized by FTIR, 1H NMR spectroscopy and mass spectrometry. The receptors R1 and R2 exhibit prominent visual response for F− and AcO– ions allowing the real time analysis of these ions in aqueous media. The formation of the receptor–anion complexes has been supported by UV–vis titration studies and confirmed through binding constant calculations. The anion binding process follows a first order rate equation and the calculated rate constants reveal a higher order of reactivity for AcO− ions. The 1H NMR titration and TDDFT studies provide full support of the binding mechanism. The Hg2+ and F− ion sensing property of receptor R1 has been utilized to arrive at “AND” and “INHIBIT” molecular logic gate applications.
Pan, Yi; Shi, Yupeng; Chen, Junying; Wong, Chap-Mo; Zhang, Heng; Li, Mei-Jin; Li, Cheuk-Wing; Yi, Changqing
2016-12-01
In this study, a highly sensitive and selective fluorescent Zn(2+) probe which exhibited excellent biocompatibility, water solubility, and cell-membrane permeability, was facilely synthesized in a single step by grafting polyethyleneimine (PEI) with quinoline derivatives. The primary amino groups in the branched PEI can increase water solubility and cell permeability of the probe PEIQ, while quinoline derivatives can specifically recognize Zn(2+) and reduce the potential cytotoxicity of PEI. Basing on fluorescence off-on mechanism, PEIQ demonstrated excellent sensing capability towards Zn(2+) in absolute aqueous solution, where a high sensitivity with a detection limit as low as 38.1nM, and a high selectivity over competing metal ions and potential interfering amino acids, were achieved. Inspired by these results, elementary logic operations (YES, NOT and INHIBIT) have been constructed by employing PEIQ as the gate while Zn(2+) and EDTA as chemical inputs. Together with the low cytotoxicity and good cell-permeability, the practical application of PEIQ in living cell imaging was satisfactorily demonstrated, emphasizing its wide application in fundamental biology research. Copyright © 2016. Published by Elsevier B.V.
Massey, M. K.; Kotsialos, A.; Qaiser, F.; Zeze, D. A.; Pearson, C.; Volpati, D.; Bowen, L.; Petty, M. C.
2015-04-01
This paper explores the use of single-walled carbon nanotube (SWCNT)/poly(butyl methacrylate) composites as a material for use in unconventional computing. The mechanical and electrical properties of the materials are investigated. The resulting data reveal a correlation between the SWCNT concentration/viscosity/conductivity and the computational capability of the composite. The viscosity increases significantly with the addition of SWCNTs to the polymer, mechanically reinforcing the host material and changing the electrical properties of the composite. The electrical conduction is found to depend strongly on the nanotube concentration; Poole-Frenkel conduction appears to dominate the conductivity at very low concentrations (0.11% by weight). The viscosity and conductivity both show a threshold point around 1% SWCNT concentration; this value is shown to be related to the computational performance of the material. A simple optimization of threshold logic gates shows that satisfactory computation is only achieved above a SWCNT concentration of 1%. In addition, there is some evidence that further above this threshold the computational efficiency begins to decrease.
Li, Dandan; Cheng, Wei; Li, Yujian; Xu, YongJie; Li, Xinmin; Yin, Yibing; Ju, Huangxian; Ding, Shijia
2016-08-02
A target-switched DNA nanotweezer is designed for AND logic gate operation and enzyme-free detection of microRNAs (miRNAs) by catalytic hairpin assembly (CHA) and proximity-dependent DNAzyme formation. The double crossover motif-based nanotweezer consists of an arched structure as the set strand for target inputs and two split G-rich DNAs at the termini of two arms for signal output. Upon a CHA, a small amount of binary target inputs can switch numerous open nanotweezers to a closed state, which leads to the formation of proximity-dependent DNAzyme in the presence of hemin to produce a highly sensitive biosensing system. The binary target inputs can be used for successful building of AND logic gate, which is validated by polyacrylamide gel electrophoresis, surface plasmon resonance and the biosensing signal. The developed biosensing system shows a linear response of the output chemiluminescence signal to input binary miRNAs with a detection limit of 30 fM. It can be used for miRNAs analysis in complex sample matrix. This system provides a simple and reusable platform for logic gate operation and enzyme-free, highly sensitive, and specific multianalysis of miRNAs.
A logic gate-based fluorogenic probe for Hg(2+) detection and its applications in cellular imaging.
Hu, Jiwen; Hu, Zhangjun; Chen, Zhiwen; Gao, Hong-Wen; Uvdal, Kajsa
2016-05-05
A new colorimetric and fluorogenic probe (RN3) based on rhodamine-B has been successfully designed and synthesized. It displays a selective response to Hg(2+) in the aqueous buffer solution over the other competing metals. Upon addition of Hg(2+), the solution of RN3 exhibits a 'naked eye' observable color change from colorless to red and an intensive fluorescence with about 105-fold enhancement. The changes in the color and fluorescence are ascribed to the ring-opening of spirolactam in rhodamine fluorophore, which is induced by a binding of the constructed receptor to Hg(2+) with the association and dissociation constants of 0.22 × 10(5) M(-1) and 25.2 μM, respectively. The Job's plot experiment determines a 1:1 binding stoichiometry between RN3 and Hg(2+). The resultant "turn-on" fluorescence in buffer solution, allows the application of a method to determine Hg(2+) levels in the range of 4.0-15.0 μM, with the limit of detection (LOD) calculated at 60.7 nM (3σ/slope). In addition, the fluorescence 'turn-off' and color 'fading-out' happen to the mixture of RN3-Hg(2+) by further addition of I(-) or S(2-). The reversible switching cycles of fluorescence intensity upon alternate additions of Hg(2+) and S(2-) demonstrate that RN3 can perform as an INHIBIT logic gate. Furthermore, the potential of RN3 as a fluorescent probe has been demonstrated for cellular imaging. Copyright © 2016 Elsevier B.V. All rights reserved.
基于关联选择的可逆逻辑综合算法%Algorithm Based on Related Selection for Reversible Logic Synthesis
Institute of Scientific and Technical Information of China (English)
徐明强; 管致锦; 倪丽惠
2012-01-01
可逆逻辑综合是可逆计算的重要内容,为了解决可逆逻辑综合中可逆电路构造和优化问题,提出一种基于关联选择的可逆逻辑综合算法及相应的优化算法.将可逆函数用真值表表示,按真值表从上往下的顺序综合,并若干相关联变量作为综合的目标位,分别计算相对混乱度和绝对混乱度,以最小混乱度原则选取可逆逻辑门.该算法及其优化算法的时间复杂度为O(n2×2n),空间复杂度为O(n×2n),优于最佳算法的空间复杂度O(2n!).通过C++语言实现对3变量全部函数及部分4变量函数的综合,并与其他可逆逻辑综合算法的结果及benchmark范例比较,结果表明平均门数均具有一定优势.%Reversible logic synthesis is an important part of reversible computing. To cope with the problem about how to cascade the reversible circuits and its optimization, this paper presents an algorithm based on related selection and its optimization algorithm for reversible logic synthesis. The reversible function, which is represented by truth table, is synthesized using several related target bits in order of truth table. The value of absolute chaos degree and relative chaos degree is calculated respectively, and selects the reversible logic gate with the principle of minimum chaos degree. The time complexity for the algorithm and its optimization algorithm is O(n2 ×2n) ,and its space complexity is O(n×2n) , which is superior to the optimal algorithm's O(2n !). By using C++ program language, the algorithm realizes the synthesis of the whole 3-variables functions and some part of 4-variables functions. In comparison with other algorithms for reversible logic synthesis, the results show some advantages in average gate number in the synthesis of the whole 3-variables functions and some examples in benchmark.
Logical Design and Control of Network in Local Mine Air-Reversing System
Institute of Scientific and Technical Information of China (English)
无
2001-01-01
This paper sets up a mathematical model of switching network and switching function by utilizing graphtheory to describe the logical function of different paths. The function varies with open and closed states of air doorsin a complex mine air sub-network, and the computer program for solving the switching function of complex net-works are offered. It gives the method for discriminating a reversible branch in a complex network by means of theswitching function, and the method of counter-inverted logical control of airflow inversion by means of open andshort circuit conversion of key branches. The research has solved the problem of the stablization of air flow for nor-mal ventination and reversing ventination in a diagonal network.
Implantable synthetic cytokine converter cells with AND-gate logic treat experimental psoriasis.
Schukur, Lina; Geering, Barbara; Charpin-El Hamri, Ghislaine; Fussenegger, Martin
2015-12-16
Psoriasis is a chronic inflammatory skin disease characterized by a relapsing-remitting disease course and correlated with increased expression of proinflammatory cytokines, such as tumor necrosis factor (TNF) and interleukin 22 (IL22). Psoriasis is hard to treat because of the unpredictable and asymptomatic flare-up, which limits handling of skin lesions to symptomatic treatment. Synthetic biology-based gene circuits are uniquely suited for the treatment of diseases with complex dynamics, such as psoriasis, because they can autonomously couple the detection of disease biomarkers with the production of therapeutic proteins. We designed a mammalian cell synthetic cytokine converter that quantifies psoriasis-associated TNF and IL22 levels using serially linked receptor-based synthetic signaling cascades, processes the levels of these proinflammatory cytokines with AND-gate logic, and triggers the corresponding expression of therapeutic levels of the anti-inflammatory/psoriatic cytokines IL4 and IL10, which have been shown to be immunomodulatory in patients. Implants of microencapsulated cytokine converter transgenic designer cells were insensitive to simulated bacterial and viral infections as well as psoriatic-unrelated inflammation. The designer cells specifically prevented the onset of psoriatic flares, stopped acute psoriasis, improved psoriatic skin lesions and restored normal skin-tissue morphology in mice. The antipsoriatic designer cells were equally responsive to blood samples from psoriasis patients, suggesting that the synthetic cytokine converter captures the clinically relevant cytokine range. Implanted designer cells that dynamically interface with the patient's metabolism by detecting specific disease metabolites or biomarkers, processing their blood levels with synthetic circuits in real time, and coordinating immediate production and systemic delivery of protein therapeutics may advance personalized gene- and cell-based therapies.
Systems chemistry: logic gates, arithmetic units, and network motifs in small networks.
Wagner, Nathaniel; Ashkenasy, Gonen
2009-01-01
A mixture of molecules can be regarded as a network if all the molecular components participate in some kind of interaction with other molecules--either physical or functional interactions. Template-assisted ligation reactions that direct replication processes can serve as the functional elements that connect two members of a chemical network. In such a process, the template does not necessarily catalyze its own formation, but rather the formation of another molecule, which in turn can operate as a template for reactions within the network medium. It was postulated that even networks made up of small numbers of molecules possess a wealth of molecular information sufficient to perform rather complex behavior. To probe this assumption, we have constructed virtual arrays consisting of three replicating molecules, in which dimer templates are capable of catalyzing reactants to form additional templates. By using realistic parameters from peptides or DNA replication experiments, we simulate the construction of various functional motifs within the networks. Specifically, we have designed and implemented each of the three-element Boolean logic gates, and show how these networks are assembled from four basic "building blocks". We also show how the catalytic pathways can be wired together to perform more complex arithmetic units and network motifs, such as the half adder and half subtractor computational modules, and the coherent feed-forward loop network motifs under different sets of parameters. As in previous studies of chemical networks, some of the systems described display behavior that would be difficult to predict without the numerical simulations. Furthermore, the simulations reveal trends and characteristics that should be useful as "recipes" for future design of experimental functional motifs and for potential integration into modular circuits and molecular computation devices.
Electrolyte-gated organic field-effect transistor for selective reversible ion detection.
Schmoltner, Kerstin; Kofler, Johannes; Klug, Andreas; List-Kratochvil, Emil J W
2013-12-17
An ion-sensitive electrolyte-gated organic field-effect transistor for selective and reversible detection of sodium (Na(+) ) down to 10(-6) M is presented. The inherent low voltage - high current operation of these transistors in combination with a state-of-the-art ion-selective membrane proves to be a novel, versatile modular sensor platform.
Mixed-Species Logic Gates and High-Fidelity Universal Gate Set for Trapped-Ion Qubits
Tan, Ting Rei
2016-05-01
Precision control over hybrid physical systems at the quantum level is important for the realization of many quantum-based technologies. For trapped-ions, a hybrid system formed of different species introduces extra degrees of freedom that can be exploited to expand and refine the control of the system. We demonstrate an entangling gate between two atomic ions of different elements that can serve as an important building block of quantum information processing (QIP), quantum networking, precision spectroscopy, metrology, and quantum simulation. An entangling geometric phase gate between a 9 Be+ ion and a 25 Mg+ ion is realized through an effective spin-spin interaction generated by state-dependent forces. A mixed-species Bell state is thereby created with a fidelity of 0 . 979(1) . We use the gate to construct a SWAP gate that interchanges the quantum states of the two dissimilar qubits. We also report a high-fidelity universal gate set for 9 Be+ ion qubits, achieved through a combination of improved laser beam quality and control, improved state preparation, and reduced electric potential noise on trap electrodes. Supported by Office of the Director of National Intelligence (ODNI) Intelligence Advanced Research Projects Activity (IARPA), ONR, and the NIST Quantum Information Program.
Wang, Cheng-Yu; Chen, Chun-Wei; Jau, Hung-Chang; Li, Cheng-Chang; Cheng, Chiao-Yu; Wang, Chun-Ta; Leng, Shi-Ee; Khoo, Iam-Choon; Lin, Tsung-Hsien
2016-08-05
In this paper, we show that anisotropic photosensitive nematic liquid crystals (PNLC) made by incorporating anisotropic absorbing dyes are promising candidates for constructing all-optical elements by virtue of the extraordinarily large optical nonlinearity of the nematic host. In particular, we have demonstrated several room-temperature 'prototype' PNLC-based all-optical devices such as optical diode, optical transistor and all primary logic gate operations (OR, AND, NOT) based on such optical transistor. Owing to the anisotropic absorption property and the optical activity of the twist alignment nematic cell, spatially non-reciprocal transmission response can be obtained within a sizeable optical isolation region of ~210 mW. Exploiting the same mechanisms, a tri-terminal configuration as an all-optical analogue of a bipolar junction transistor is fabricated. Its ability to be switched by an optical field enables us to realize an all-optical transistor and demonstrate cascadability, signal fan-out, logic restoration, and various logical gate operations such as OR, AND and NOT. Due to the possibility of synthesizing anisotropic dyes and wide ranging choice of liquid crystals nonlinear optical mechanisms, these all-optical operations can be optimized to have much lower thresholds and faster response speeds. The demonstrated capabilities of these devices have shown great potential in all-optical control system and photonic integrated circuits.
Yeom, Donghyuk; Keem, Kihyun; Kang, Jeongmin; Jeong, Dong-Young; Yoon, Changjoon; Kim, Dongseung; Kim, Sangsig
2008-07-02
Electrical characteristics of NOT and NAND logic circuits fabricated using top-gate ZnO nanowire field-effect transistors (FETs) with high-k Al(2)O(3) gate layers were investigated in this study. To form a NOT logic circuit, two identical FETs whose I(on)/I(off) ratios were as high as ∼10(8) were connected in series in a single ZnO nanowire channel, sharing a common source electrode. Its voltage transfer characteristics exhibited an inverting operation and its logic swing was 98%. In addition, the characteristics of a NAND logic circuit composed of three top-gate FETs connected in series in a single nanowire channel are discussed in this paper.
Quantum state transfer and logic gates with two 3-level atoms in cavity QED
Yang, Chui-Ping; Chu, Shih-I.
2004-08-01
We present a new way to implement quantum controlled phase-shift gate, quantum exchange gate (SWAP gate), and quantum state transfer with two 3-level atoms in cavity QED. The method does not involve real excitation of a cavity photon during the operation, thus decoherence induced due to the cavity-photon decay is minimized. In addition, it is remarkable that for all present purposes, no auxiliary atoms or any measurement is needed. Therefore, the operation is significantly simplified.
Institute of Scientific and Technical Information of China (English)
F. Djeffal; A. Ferdi; M. Chahdi
2012-01-01
The double gate (DG) silicon MOSFET with an extremely short-channel length has the appropriate features to constitute the devices for nanoscale circuit design.To develop a physical model for extremely scaled DG MOSFETs,the drain current in the channel must be accurately determined under the application of drain and gate voltages.However,modeling the transport mechanism for the nanoscale structures requires the use of overkill methods and models in terms of their complexity and computation time (self-consistent,quantum computations ).Therefore,new methods and techniques are required to overcome these constraints.In this paper,a new approach based on the fuzzy logic computation is proposed to investigate nanoscale DG MOSFETs.The proposed approach has been implemented in a device simulator to show the impact of the proposed approach on the nanoelectronic circuit design.The approach is general and thus is suitable for any type ofnanoscale structure investigation problems in the nanotechnology industry.
An Imidazole based probe for relay recognition of Cu2+ and OH− ions leading to AND logic gate
Indian Academy of Sciences (India)
Navneet Kaur; Priya Alreja
2015-07-01
2-(2-methoxyphenyl)-4,5-diphenyl-1H-imidazole 1, an imidazole-based compound, was found to sense Cu2+ ions via fluorescence and absorption spectroscopy over a number of other metal ions. During Cu2+ sensing, the chemosensor 1 followed a “switch-off” mechanism. Job’s plot supported 1:1 stoichiometry of 1-Cu2+ complex. The 1-Cu2+ complex formed in situ underwent different absorption changes with OH− ions. These differential absorption changes observed with the addition of Cu2+ and OH− ions were used to mimic AND logic gate using A274nm as output.
Kumar, Santosh; Chauhan, Chanderkanta; Bedi, Amna
2016-12-01
In recent years, it has been shown that reversible logic can play an important role in power optimization for computer design. The various reversible logic gates such as Feynman, Fredkin, Peres, and Toffoli gates have been discussed by researchers, but very little work has been done on reversible sequential circuits. Design of reversible sequential circuits using lithium-niobate-based Mach-Zehnder interferometers is proposed. Here, flip-flops are designed with the help of basic reversible logic gates such as Feynman, Fredkin, and Peres gates. Theoretical descriptions along with mathematical formulation of the devices are provided. The devices are also analyzed through finite difference-beam propagation method and MATLAB® simulation.
A parity checker circuit based on microelectromechanical resonator logic elements
Hafiz, Md Abdullah Al; Li, Ren; Younis, Mohammad I.; Fariborzi, Hossein
2017-03-01
Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro-resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized.
A parity checker circuit based on microelectromechanical resonator logic elements
Hafiz, Md Abdullah Al
2017-01-11
Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized.
Experimental Demonstration of a Quantum Circuit using Linear Optics Gates
Pittman, T B; Franson, J D
2004-01-01
Probabilistic quantum logic gates can be constructed using linear optical elements, ancilla photons, and post-selection based on the results of measurements. Here we describe an experimental demonstration of a simple quantum circuit that combines two exclusive-OR (XOR) logic gates of that kind. Although circuits using XOR gates are not reversible, they may still be useful in a variety of applications such as generating non-classical states of light.
A controllable gate effect in cobalt(II) organic frameworks by reversible structure transformations.
Chen, Qiang; Chang, Ze; Song, Wei-Chao; Song, Han; Song, Hai-Bin; Hu, Tong-Liang; Bu, Xian-He
2013-10-25
With H2 O or NH3 stimuli, the blue cobalt-based metal-organic framework (MOF) BP can reversibly transform to red RP. The removal/recovery of terephthalate ligands accompanied by the transformation leads to a gate effect, which allows the encapsulation and release of small solvent molecules under certain conditions. This is the first example of topology transformation from a self-penetrating to interpenetrating net in 3D MOFs.
All-photonic multifunctional molecular logic device.
Andréasson, Joakim; Pischel, Uwe; Straight, Stephen D; Moore, Thomas A; Moore, Ana L; Gust, Devens
2011-08-03
Photochromes are photoswitchable, bistable chromophores which, like transistors, can implement binary logic operations. When several photochromes are combined in one molecule, interactions between them such as energy and electron transfer allow design of simple Boolean logic gates and more complex logic devices with all-photonic inputs and outputs. Selective isomerization of individual photochromes can be achieved using light of different wavelengths, and logic outputs can employ absorption and emission properties at different wavelengths, thus allowing a single molecular species to perform several different functions, even simultaneously. Here, we report a molecule consisting of three linked photochromes that can be configured as AND, XOR, INH, half-adder, half-subtractor, multiplexer, demultiplexer, encoder, decoder, keypad lock, and logically reversible transfer gate logic devices, all with a common initial state. The system demonstrates the advantages of light-responsive molecules as multifunctional, reconfigurable nanoscale logic devices that represent an approach to true molecular information processing units.
Novel Parity-Preserving Designs of Reversible 4-Bit Comparator
Qi, Xue-mei; Chen, Fu-long; Wang, Hong-tao; Sun, Yun-xiang; Guo, Liang-min
2014-04-01
Reversible logic has attracted much attention in recent years especially when the calculation with minimum energy consumption is considered. This paper presents two novel approaches for designing reversible 4-bit comparator based on parity-preserving gates, which can detect any fault that affects no more than a single logic signal. In order to construct the comparator, three variable EX-OR gate (TVG), comparator gate (CPG), four variable EX-OR gate block (FVGB) and comparator gate block (CPGB) are designed, and they are parity-preserving and reversible. Their quantum equivalent implementations are also proposed. The design of two comparator circuits is completed by using existing reversible gates and the above new reversible circuits. All these comparators have been modeled and verified in Verilog hardware description language (Verilog HDL). The Quartus II simulation results indicate that their circuits' logic structures are correct. The comparative results are presented in terms of quantum cost, delay and garbage outputs.
Nugamesh Mutter, Kussay; Mat Jafri, Mohd Zubir; Abdul Aziz, Azlan
2010-05-01
Many researches are conducted to improve Hopfield Neural Network (HNN) performance especially for speed and memory capacity in different approaches. However, there is still a significant scope of developing HNN using Optical Logic Gates. We propose here a new model of HNN based on all-optical XNOR logic gates for real time color image recognition. Firstly, we improved HNN toward optimum learning and converging operations. We considered each unipolar image as a set of small blocks of 3-pixels as vectors for HNN. This enables to save large number of images in the net with best reaching into global minima, and because there are only eight fixed states of weights so that only single iteration performed to construct a vector with stable state at minimum energy. HNN is useless in dealing with data not in bipolar representation. Therefore, HNN failed to work with color images. In RGB bands each represents different values of brightness, for d-bit RGB image it is simply consists of d-layers of unipolar. Each layer is as a single unipolar image for HNN. In addition, the weight matrices with stability of unity at the diagonal perform clear converging in comparison with no self-connecting architecture. Synchronously, each matrix-matrix multiplication operation would run optically in the second part, since we propose an array of all-optical XOR gates, which uses Mach-Zehnder Interferometer (MZI) for neurons setup and a controlling system to distribute timely signals with inverting to achieve XNOR function. The primary operation and simulation of the proposal HNN is demonstrated.
Improved reversible logic synthesis algorithm based on weighted directed graph%基于带权有向图的可逆逻辑综合改进算法
Institute of Scientific and Technical Information of China (English)
程学云; 管致锦
2012-01-01
To reduce the number of reversible gates used in the reversible logic synthesis, by analyzing the reversible logic synthesis algorithm based on the weighted direction gragh (WDG) , the number of transitional gates in the process of function transformation is more and the optimization algorithm is simple, so the concept of efficient complexity-equal primitive output transformation (POT) is proposed, the moving and simplification rules for Toffoli gate sequence are expanded and proven, and the improved synthesis algorithm based on WDG is given. Experimental results show that the improved algorithm can not only reduce the number of reversible gates during circuit generation, but also optimize the generated circuit effectively, the number of gates and control bits is reduced greatly, and the circuit cost is decreased.%为减少可逆逻辑综合中使用的可逆门,通过对基于带权有向图的可逆逻辑综合算法的分析,针对函数转换过程中过渡门数较多及电路优化算法简单的问题,提出了有效的等复杂度基本输出变换的概念,扩充并证明了Toffoli门序列的移动和化简规则,给出了改进的基于带权有向图的可逆逻辑综合算法.实验结果表明,该算法不仅减少了可逆电路构成时所使用的可逆门,而且对构建的可逆电路实现了有效化简,大幅度减少了门数和控制位数,降低了可逆电路代价.
DEFF Research Database (Denmark)
Lindberg-Poulsen, Kristian; Petersen, Lars Press; Ouyang, Ziwei
2014-01-01
This work considers an alternative method of reducing the body diode reverse recovery by taking advantage of the MOSFET body effect, and applying a bias voltage to the gate before reverse recovery. A test method is presented, allowing the accurate measurement of voltage and current waveforms during...... reverse recovery at high di=dt. Different bias voltages and dead times are combined, giving a loss map which makes it possible to evaluate the practical efficacy of gate bias on reducing the MOSFET body diode reverse recovery, while comparing it to the well known methods of dead time optimization...
Design, Analysis, Implementation and Synthesis of 16 bit Reversible ALU by using Xilinx 12.2
Directory of Open Access Journals (Sweden)
S.Anusha
2014-04-01
Full Text Available In the modern world, Arithmetic Logic Unit (ALU is one of the most crucial components of any system and is used in many appliances like calculators, cell phones, and computers and so on. An arithmetic logic unit is a multi-functional circuit that conditionally performs one of several possible functions on two operands A and B depending on control inputs. This paper proposes the design of programmable reversible logic gate structures, targeted for the ALU implementation and their use in the realization of an efficient reversible ALU. Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. This ALU consists of thirteen operations, 5 arithmetic, 4 logical operations and 4 shifting operations. All the modules are being designed using the basic reversible gates. Using reversible logic gates instead of traditional logic AND/OR gates, a reversible ALU whose function is the same as traditional ALU is constructed. Comparing with the number of input bits and the discarded bits of the traditional ALU, the reversible ALU significantly reduce the use and loss of information bits. The proposed reversible 16-bit ALU reduces the information bits use and loss by reusing the logic information bits logically and realizes the goal of lowering power consumption of logic circuits. Programmable reversible logic gates are realized in Verilog by using XILINX 12.2. Key words:
Energy Technology Data Exchange (ETDEWEB)
Zheng Xiaojuan [College of Physics and Information Science, Hunan Normal University, Changsha, 410081 (China); Fang Maofa [College of Physics and Information Science, Hunan Normal University, Changsha, 410081 (China); Liao Xiangping [College of Physics and Information Science, Hunan Normal University, Changsha, 410081 (China); Cai Jianwu [College of Physics and Information Science, Hunan Normal University, Changsha, 410081 (China)
2007-02-14
In the system with a two-level ion confined both in a linear trap and in a high-Q single-mode cavity, we present a simple scheme to realize the basic two-qubit logic gates such as the quantum phase gate (QPG), the SWAP gate and the controlled-NOT (CNOT) gate beyond the Lamb-Dicke (LD) limit. We realize the three kinds of two-qubit quantum phase gates, i.e. QPG operation involving the cavity mode as well as the vibrational mode of the trapped ion, QPG operation involving the internal states as well as the vibrational mode of the trapped ion and QPG operation involving the internal states of the trapped ion as well as the cavity mode. The controlled-NOT gate can be implemented from a QPG operation through a rotation of the second qubit before and after the QPG operation. We can also perform the SWAP gate operation involving the ionic internal states of the trapped ion and the two-mode bosonic basis. The logic gates involving the cavity mode as well as the vibrational mode of the trapped ion are insensitive to spontaneous emission, and the logic gates involving the internal states as well as the vibrational mode of the trapped ion are insensitive to the decay of the cavity, which is an important feature for the practical implementation of quantum computing. Neither the LD approximation nor the auxiliary atomic level is needed in our scheme. Experimental feasibility for achieving our scheme is also discussed.
Application of bistable optical logic gate arrays to all-optical digital parallel processing
Walker, A. C.
1986-05-01
Arrays of bistable optical gates can form the basis of an all-optical digital parallel processor. Two classes of signal input geometry exist - on- and off-axis - and lead to distinctly different device characteristics. The optical implementation of multisignal fan-in to an array of intrinsically bistable optical gates using the more efficient off-axis option is discussed together with the construction of programmable read/write memories from optically bistable devices. Finally the design of a demonstration all-optical parallel processor incorporating these concepts is presented.
Chen, Yuqi; Song, Yanyan; Wu, Fan; Liu, Wenting; Fu, Boshi; Feng, Bingkun; Zhou, Xiang
2015-04-25
A conveniently amplified DNA AND logic gate platform was designed for the highly sensitive detection of low-abundance DNA fragment inputs based on strand displacement reaction and rolling circle amplification strategy. Compared with others, this system can detect miRNAs in biological samples. The success of this strategy demonstrates the potential of DNA logic gates in disease diagnosis.
Ultra-low-power carbon nanotube FET-based quaternary logic gates
Sharifi, Fazel; Moaiyeri, Mohammad Hossein; Navi, Keivan; Bagherzadeh, Nader
2016-09-01
This paper presents low-power carbon nanotube field-effect transistor (CNTFET)-based quaternary logic circuits. The proposed quaternary circuits are designed based on the CNTFET unique properties, such as the same carrier mobility for N- and P-type devices and also providing desirable threshold voltages by adopting proper diameters for the nanotubes. In addition, no paths exist between supply and ground rails in the steady states of the proposed designs, which eliminates the ON state static current and also the stacking technique is utilised in order to significantly reduce the leakage currents. The results of the simulations, conducted using Synopsys HSPICE with the standard 32 nm CNTFET technology, confirm the significantly lower power consumption, higher energy efficiency and lower sensitivity to process variation of the proposed designs compared to the state-of-the-art quaternary logic circuits. The proposed quaternary logic circuits have on average 92, 99 and 91% less total power, static power and PDP, respectively, compared with the most low-power and energy-efficient CNTFET-based quaternary logic circuits, recently presented in the literature.
Two-Input Enzymatic Logic Gates Made Sigmoid by Modifications of the Biocatalytic Reaction Cascades
Zavalov, Oleksandr; Halamek, Jan; Halamkova, Lenka; Korkmaz, Sevim; Arugula, Mary A; Chinnapareddy, Soujanya; Katz, Evgeny; Privman, Vladimir
2013-01-01
Computing based on biochemical processes is a newest rapidly developing field of unconventional information and signal processing. In this paper we present results of our research in the field of biochemical computing and summarize the obtained numerical and experimental data for implementations of the standard two-input OR and AND gates with double-sigmoid shape of the output signal. This form of response was obtained as a function of the two inputs in each of the realized biochemical systems. The enzymatic gate processes in the first system were activated with two chemical inputs and resulted in optically detected chromogen oxidation, which happens when either one or both of the inputs are present. In this case, the biochemical system is functioning as the OR gate. We demonstrate that the addition of a "filtering" biocatalytic process leads to a considerable reduction of the noise transmission factor and the resulting gate response has sigmoid shape in both inputs. The second system was developed for functi...
Simple and Fast Scheme for Realizing Quantum Logic Gates in an Ion Trap
Institute of Scientific and Technical Information of China (English)
ZHENG Shi-Biao
2004-01-01
We propose a simple and fast scheme to realize a controlled-NOT gate between two trapped ions using a resonant laser pulse. Our scheme allows the Rabi frequency of the laser field to be of the order of the vibrational frequency and thus the time required to complete the operation is greatly shortened, which is of importance in view of decoherence.
Lu, Bin; Cheng, Xiaomin; Feng, Jinlong; Guan, Xiawei; Miao, Xiangshui
2016-07-01
Nonvolatile memory devices or circuits that can implement both storage and calculation are a crucial requirement for the efficiency improvement of modern computer. In this work, we realize logic functions by using [GeTe/Sb2Te3]n super lattice phase change memory (PCM) cell in which higher threshold voltage is needed for phase change with a magnetic field applied. First, the [GeTe/Sb2Te3]n super lattice cells were fabricated and the R-V curve was measured. Then we designed the logic circuits with the super lattice PCM cell verified by HSPICE simulation and experiments. Seven basic logic functions are first demonstrated in this letter; then several multi-input logic gates are presented. The proposed logic devices offer the advantages of simple structures and low power consumption, indicating that the super lattice PCM has the potential in the future nonvolatile central processing unit design, facilitating the development of massive parallel computing architecture.
Energy Technology Data Exchange (ETDEWEB)
Park, Steve [Department of Materials Science and Engineering, Stanford University, Durand Building, 496 Lomita Mall, Stanford, California 94305-4034 (United States); Nam, Ji Hyun [Department of Electrical Engineering, Stanford University, David Packard Building, 350 Serra Mall, Mail Code: 9505, Stanford, California 94305-9505 (United States); Koo, Ja Hoon; Lei, Ting; Bao, Zhenan, E-mail: zbao@stanford.edu [Department of Chemical Engineering, Stanford University, Shriram Center, 443 Via Ortega, Room 307, Stanford, California 94305-4145 (United States)
2015-03-09
We demonstrate a technique to convert p-type single-walled carbon nanotube (SWNT) network transistor into ambipolar transistor by thermally evaporating C{sub 60} on top. The addition of C{sub 60} was observed to have two effects in enhancing ambipolar characteristics. First, C{sub 60} served as an encapsulating layer that enhanced the ambipolar characteristics of SWNTs. Second, C{sub 60} itself served as an electron transporting layer that contributed to the n-type conduction. Such a dual effect enables effective conversion of p-type into ambipolar characteristics. We have fabricated inverters using our SWNT/C{sub 60} ambipolar transistors with gain as high as 24, along with adaptive NAND and NOR logic gates.
Venkatesh, P. R.; Venkatesan, A.
2016-10-01
We report the occurrence of vibrational resonance in piecewise-linear non-autonomous system. Especially, we show that an optimal amplitude of the high frequency second harmonic driving enhances the response of a piece-wise linear non-autonomous Murali-Lakshmanan-Chua (MLC) system to a low frequency first harmonic signal. This phenomenon is illustrated with the analytical solutions of circuit equations characterising the system and finally compared with the numerical method. Further, it has been enunciated explicitly, the implementation of the fundamental NOR/NAND gate via vibrational resonance, both by numerical and analytical solutions. In addition, these logical behaviours (AND/NAND/OR/NOR) can be decided by the amplitude of the input square waves without altering the system parameters.
Ikeda, Masato; Tanida, Tatsuya; Yoshii, Tatsuyuki; Kurotani, Kazuya; Onogi, Shoji; Urayama, Kenji; Hamachi, Itaru
2014-06-01
Soft materials that exhibit stimuli-responsive behaviour under aqueous conditions (such as supramolecular hydrogels composed of self-assembled nanofibres) have many potential biological applications. However, designing a macroscopic response to structurally complex biochemical stimuli in these materials still remains a challenge. Here we show that redox-responsive peptide-based hydrogels have the ability to encapsulate enzymes and still retain their activities. Moreover, cooperative coupling of enzymatic reactions with the gel response enables us to construct unique stimuli-responsive soft materials capable of sensing a variety of disease-related biomarkers. The programmable gel-sol response (even to biological samples) is visible to the naked eye. Furthermore, we built Boolean logic gates (OR and AND) into the hydrogel-enzyme hybrid materials, which were able to sense simultaneously plural specific biochemicals and execute a controlled drug release in accordance with the logic operation. The intelligent soft materials that we have developed may prove valuable in future medical diagnostics or treatments.
Influence of the gate edge on the reverse leakage current of AlGaN/GaN HEMTs
Directory of Open Access Journals (Sweden)
YongHe Chen
2015-09-01
Full Text Available By comparing the Schottky diodes of different area and perimeter, reverse gate leakage current of AlGaN/GaN high mobility transistors (HEMT at gate bias beyond threshold voltage is studied. It is revealed that reverse current consists of area-related and perimeter-related current. An analytical model of electric field calculation is proposed to obtain the average electric field around the gate edge at high revers bias and estimate the effective range of edge leakage current. When the reverse bias increases, the increment of electric field is around the gate edge of a distance of ΔL, and perimeter-related gate edge current keeps increasing. By using the calculated electric field and the temperature-dependent current-voltage measurements, the edge gate leakage current mechanism is found to be Fowler-Nordheim tunneling at gate bias bellows -15V caused by the lateral extended depletion region induced barrier thinning. Effective range of edge current of Schottky diodes is about hundred to several hundred nano-meters, and is different in different shapes of Schottky diodes.
Alternating phase-shifted mask for logic gate levels, design, and mask manufacturing
Liebmann, Lars W.; Graur, Ioana C.; Leipold, William C.; Oberschmidt, James M.; O'Grady, David S.; Regaill, Denis
1999-07-01
While the benefits of alternating phase shifted masks in improving lithographic process windows at increased resolution are well known throughout the lithography community, broad implementation of this potentially powerful technique has been slow due to the inherent complexity of the layout design and mask manufacturing process. This paper will review a project undertaken at IBM's Semiconductor Research and Development Center and Mask Manufacturing and Development facility to understand the technical and logistical issues associated with the application of alternating phase shifted mask technology to the gate level of a full microprocessor chip. The work presented here depicts an important milestone toward integration of alternating phase shifted masks into the manufacturing process by demonstrating an automated design solution and yielding a functional alternating phase shifted mask. The design conversion of the microprocessor gate level to a conjugate twin shifter alternating phase shift layout was accomplished with IBM's internal design system that automatically scaled the design, added required phase regions, and resolved phase conflicts. The subsequent fabrication of a nearly defect free phase shifted mask, as verified by SEM based die to die inspection, highlights the maturity of the alternating phase shifted mask manufacturing process in IBM's internal mask facility. Well defined and recognized challenges in mask inspection and repair remain and the layout of alternating phase shifted masks present a design and data preparation overhead, but the data presented here demonstrate the feasibility of designing and building manufacturing quality alternating phase shifted masks for the gate level of a microprocessor.
Auto- and hetero-associative memory using a 2-D optical logic gate
Chao, Tien-Hsin
1989-01-01
An optical associative memory system suitable for both auto- and hetero-associative recall is demonstrated. This system utilizes Hamming distance as the similarity measure between a binary input and a memory image with the aid of a two-dimensional optical EXCLUSIVE OR (XOR) gate and a parallel electronics comparator module. Based on the Hamming distance measurement, this optical associative memory performs a nearest neighbor search and the result is displayed in the output plane in real-time. This optical associative memory is fast and noniterative and produces no output spurious states as compared with that of the Hopfield neural network model.
Optimized reversible binary-coded decimal adders
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Glück, Robert
2008-01-01
their design. The optimized 1-decimal BCD full-adder, a 13 × 13 reversible logic circuit, is faster, and has lower circuit cost and less garbage bits. It can be used to build a fast reversible m-decimal BCD full-adder that has a delay of only m + 17 low-power reversible CMOS gates. For a 32-decimal (128-bit...... in reversible logic design by drastically reducing the number of garbage bits. Specialized designs benefit from support by reversible logic synthesis. All circuit components required for optimizing the original design could also be synthesized successfully by an implementation of an existing synthesis algorithm...
Abbasian, Karim; Sadeghi, Parvin
2016-01-01
We have proposed optical tunable CNOT (XOR) and XNOR logic gates using two-dimensional photonic crystal (2DPhC) cavities. Where, air rods with square lattice array have been embedded in Ag-Polymer substrate with refractive index of 1.59. In this work, we have enhanced speed of logic gates by applying two input signals with a phase dif?ference at the same wavelength for 2DPhC cavities. Where, we have adjusted the phases of input and control signals equal with {\\pi}/3 and zero, respectively. The response time of the structure and quality factor of the cavities are in the range of femtosecond and 2000, respectively. Then, we have used electro-optic property of the substrate material to change the cavities resonance wavelengths. By this means, we could design the logic gates and demonstrate a tunable range of 23nm for their operation wavelength. The quality factor and the response times of cavities remain constant in the tunable range of wavelength, approximately. The evaluated least ON to OFF logic-level contras...
Programmable logic controller performance enhancement by field programmable gate array based design.
Patel, Dhruv; Bhatt, Jignesh; Trivedi, Sanjay
2015-01-01
PLC, the core element of modern automation systems, due to serial execution, exhibits limitations like slow speed and poor scan time. Improved PLC design using FPGA has been proposed based on parallel execution mechanism for enhancement of performance and flexibility. Modelsim as simulation platform and VHDL used to translate, integrate and implement the logic circuit in FPGA. Xilinx's Spartan kit for implementation-testing and VB has been used for GUI development. Salient merits of the design include cost-effectiveness, miniaturization, user-friendliness, simplicity, along with lower power consumption, smaller scan time and higher speed. Various functionalities and applications like typical PLC and industrial alarm annunciator have been developed and successfully tested. Results of simulation, design and implementation have been reported.
Demonstration of a quantum logic gate in a cryogenic surface-electrode ion trap
Wang, Shannon X; Ge, Yufei; Shewmon, Ruth; Chuang, Isaac L
2009-01-01
We demonstrate quantum control techniques for a single trapped ion in a cryogenic, surface-electrode trap. A narrow optical transition of Sr+ along with the ground and first excited motional states of the harmonic trapping potential form a two-qubit system. The optical qubit transition is susceptible to magnetic field fluctuations, which we stabilize with a simple and compact method using superconducting rings. Decoherence of the motional qubit is suppressed by the cryogenic environment. AC Stark shift correction is accomplished by controlling the laser phase in the pulse sequencer, eliminating the need for an additional laser. Quantum process tomography is implemented on atomic and motional states using conditional pulse sequences. With these techniques we demonstrate a Cirac-Zoller Controlled-NOT gate in a single ion with a mean fidelity of 91(1)%.
Cluster States from Quantum Logic Gates with Trapped Ions in Thermal Motion
Institute of Scientific and Technical Information of China (English)
YANG Wen-Xing; ZHAN Zhi-Ming; LI Jia-Hua
2006-01-01
Following the recent proposal by Briegel et al. [Phys. Rev. Lett. 86 (2001) 910], a procedure is proposed for one-step realizing quantum control phase gates with two trapped ions in thermal motion. It is shown that the scheme can also be used to create a new special type of entangled states, i.e., cluster states of many trapped ions. In the scheme the two-trapped ions are simultaneously excited by a single laser beam and the frequency of the laser beam is slightly off resonance with the first lower vibration sideband of the trapped ions. The distinct advantage of the scheme is that it does not use the vibrational mode as the data bus. Furthermore, our scheme is insensitive to both the initial motional state and heating (or decay) as long as the system remains in the Lamb-Dicke regime.
Quantum logic gates from time-dependent global magnetic field in a system with constant exchange
Energy Technology Data Exchange (ETDEWEB)
Nenashev, A. V., E-mail: nenashev@isp.nsc.ru; Dvurechenskii, A. V. [Rzhanov Institute of Semiconductor Physics SB RAS, 630090 Novosibirsk (Russian Federation); Novosibirsk State University, 630090 Novosibirsk (Russian Federation); Zinovieva, A. F. [Rzhanov Institute of Semiconductor Physics SB RAS, 630090 Novosibirsk (Russian Federation); Gornov, A. Yu.; Zarodnyuk, T. S. [Institute for System Dynamics and Control Theory SB RAS, 664033 Irkutsk (Russian Federation)
2015-03-21
We propose a method that implements a universal set of one- and two-quantum-bit gates for quantum computation in a system of coupled electron pairs with constant non-diagonal exchange interaction. In our proposal, suppression of the exchange interaction is performed by the continual repetition of single-spin rotations. A small g-factor difference between the electrons allows for addressing qubits and avoiding strong magnetic field pulses. Numerical experiments were performed to show that, to implement the one- and two-qubit operations, it is sufficient to change the strength of the magnetic field by a few Gauss. This introduces one and then the other electron in a resonance. To determine the evolution of the two-qubit system, we use the algorithms of optimal control theory.
Surface-confined assemblies and polymers for molecular logic.
de Ruiter, Graham; van der Boom, Milko E
2011-08-16
Stimuli responsive materials are capable of mimicking the operation characteristics of logic gates such as AND, OR, NOR, and even flip-flops. Since the development of molecular sensors and the introduction of the first AND gate in solution by de Silva in 1993, Molecular (Boolean) Logic and Computing (MBLC) has become increasingly popular. In this Account, we present recent research activities that focus on MBLC with electrochromic polymers and metal polypyridyl complexes on a solid support. Metal polypyridyl complexes act as useful sensors to a variety of analytes in solution (i.e., H(2)O, Fe(2+/3+), Cr(6+), NO(+)) and in the gas phase (NO(x) in air). This information transfer, whether the analyte is present, is based on the reversible redox chemistry of the metal complexes, which are stable up to 200 °C in air. The concurrent changes in the optical properties are nondestructive and fast. In such a setup, the input is directly related to the output and, therefore, can be represented by one-input logic gates. These input-output relationships are extendable for mimicking the diverse functions of essential molecular logic gates and circuits within a set of Boolean algebraic operations. Such a molecular approach towards Boolean logic has yielded a series of proof-of-concept devices: logic gates, multiplexers, half-adders, and flip-flop logic circuits. MBLC is a versatile and, potentially, a parallel approach to silicon circuits: assemblies of these molecular gates can perform a wide variety of logic tasks through reconfiguration of their inputs. Although these developments do not require a semiconductor blueprint, similar guidelines such as signal propagation, gate-to-gate communication, propagation delay, and combinatorial and sequential logic will play a critical role in allowing this field to mature. For instance, gate-to-gate communication by chemical wiring of the gates with metal ions as electron carriers results in the integration of stand-alone systems: the
Si-nanowire CMOS inverter logic fabricated using gate-all-around (GAA) devices and top-down approach
Buddharaju, K. D.; Singh, N.; Rustagi, S. C.; Teo, Selin H. G.; Lo, G. Q.; Balasubramanian, N.; Kwong, D. L.
2008-09-01
We present the monolithic integration of gate-all-around (GAA) Si-nanowire FETs into CMOS logic using top-down approach. Inverters are chosen as the test vehicles for demonstration. Empirically optimized designs show sharp ON-OFF transitions with high voltage-gains (e.g., ΔVOUT/ΔVIN up to ∼45) and symmetric pull-up and pull-down characteristics. The matching of the drive currents of n- and p-MOSFETs is achieved using different number of nanowire channels for N- and P-MOS transistors. The inverter maintains its good transfer characteristics and noise margins for wide range of VDD tested down to 0.2 V. The detailed experimental characterization is discussed along with the electrical characteristics of the individual transistors comprising the inverter. The performances of the inverters are discussed vis-à-vis those reported in the literature using advanced non-classical device architectures such as FinFETs. The integration potential of GAA Si-nanowire transistors to realize CMOS circuit functionality using top-down approach is thus demonstrated.
Papenfort, Kai; Espinosa, Elena; Casadesús, Josep; Vogel, Jörg
2015-08-25
Horizontal gene transfer via plasmid conjugation is a major driving force in microbial evolution but constitutes a complex process that requires synchronization with the physiological state of the host bacteria. Although several host transcription factors are known to regulate plasmid-borne transfer genes, RNA-based regulatory circuits for host-plasmid communication remain unknown. We describe a posttranscriptional mechanism whereby the Hfq-dependent small RNA, RprA, inhibits transfer of pSLT, the virulence plasmid of Salmonella enterica. RprA employs two separate seed-pairing domains to activate the mRNAs of both the sigma-factor σ(S) and the RicI protein, a previously uncharacterized membrane protein here shown to inhibit conjugation. Transcription of ricI requires σ(S) and, together, RprA and σ(S) orchestrate a coherent feedforward loop with AND-gate logic to tightly control the activation of RicI synthesis. RicI interacts with the conjugation apparatus protein TraV and limits plasmid transfer under membrane-damaging conditions. To our knowledge, this study reports the first small RNA-controlled feedforward loop relying on posttranscriptional activation of two independent targets and an unexpected role of the conserved RprA small RNA in controlling extrachromosomal DNA transfer.
Low voltage logic circuits exploiting gate level dynamic body biasing in 28 nm UTBB FD-SOI
Taco, Ramiro; Levi, Itamar; Lanuzza, Marco; Fish, Alexander
2016-03-01
In this paper, the recently proposed gate level body bias (GLBB) technique is evaluated for low voltage logic design in state-of-the-art 28 nm ultra-thin body and box (UTBB) fully-depleted silicon-on-insulator (FD-SOI) technology. The inherent benefits of the low-granularity body-bias control, provided by the GLBB approach, are emphasized by the efficiency of forward body bias (FBB) in the FD-SOI technology. In addition, the possibility to integrate PMOS and NMOS devices into a single common well configuration allows significant area reduction, as compared to an equivalent triple well implementation. Some arithmetic circuits were designed using GLBB approach and compared to their conventional CMOS and DTMOS counterparts under different running conditions at low voltage regime. Simulation results shows that, for 300 mV of supply voltage, a 4 × 4-bit GLBB Baugh Wooley multiplier allows performance improvement of about 30% and area reduction of about 35%, while maintaining low energy consumption as compared to the conventional CMOS ⧹ DTMOS solutions. Performance and energy benefits are maintained over a wide range of process-voltage-temperature (PVT) variations.
Saghaei, Hamed; Zahedi, Abdulhamid; Karimzadeh, Rouhollah; Parandin, Fariborz
2017-10-01
In this paper, a triangular two-dimensional photonic crystal (PhC) of silicon rods in air is presented and its photonic band diagram is calculated by plane wave method. In this structure, an optical waveguide is obtained by creating a line defect (eliminating rods) in diagonal direction of PhC. Numerical simulations based on finite difference time domain method show that when self-collimated beams undergo total internal reflection at the PhC-air interface, a total reflection of 90° occurs for the output beams. We also demonstrate that by decreasing the radius of silicon rods instead of eliminating a diagonal line, a two-channel optical splitter will be designed. In this case, incoming self-collimated beams can be divided into the reflected and transmitted beams with arbitrary power ratio by adjusting the value of their radii. Based on these results, we propose a four-channel optical splitter using four line defects. The power ratio among output channels can be controlled systematically by varying the radius of rods in the line defects. We also demonstrate that by launching two optical sources with the same intensity and 90° phase difference from both perpendicular faces of the PhC, two logic OR and XOR gates will be achieved at the output channels. These optical devices have some applications in photonic integrated circuits for controlling and steering (managing) the light as desired.
Zhang, Guanxin; Zhang, Deqing; Zhou, Yucheng; Zhu, Daoben
2006-05-12
In this Note, we describe a new TTF-anthracene dyad fusion with the crown ether unit. It is interesting to find that the fluorescence of this new dyad can be modulated with Na+ and C60, and its fluorescence intensity can be largely enhanced only in the presence of both Na+ and C60. Such fluorescence modulation behavior mimics the performance of a two-input "AND" logic gate.
Prakash, Manu; Gershenfeld, Neil
2007-02-09
We demonstrate universal computation in an all-fluidic two-phase microfluidic system. Nonlinearity is introduced into an otherwise linear, reversible, low-Reynolds number flow via bubble-to-bubble hydrodynamic interactions. A bubble traveling in a channel represents a bit, providing us with the capability to simultaneously transport materials and perform logical control operations. We demonstrate bubble logic AND/OR/NOT gates, a toggle flip-flop, a ripple counter, timing restoration, a ring oscillator, and an electro-bubble modulator. These show the nonlinearity, gain, bistability, synchronization, cascadability, feedback, and programmability required for scalable universal computation. With increasing complexity in large-scale microfluidic processors, bubble logic provides an on-chip process control mechanism integrating chemistry and computation.
Quantum reversible logic circuits synthesis based on genetic algorithm%基于遗传算法的量子可逆逻辑电路综合方法研究
Institute of Scientific and Technical Information of China (English)
吕洪君; 乐亮; 韩良顺; 解光军
2011-01-01
量子可逆逻辑电路综合主要是研究在给定的量子门和量子电路的约束条件及限制下,找到最小或较小的量子代价实现所需量子逻辑功能的电路.把量子逻辑门的功能用矩阵的数学模型表示,用遗传算法作全局搜索工具,将遗传算法应用于量子可逆逻辑电路综合,是一种全新的可逆逻辑电路综合方法,实现了合成、优化同步进行.四阶量子电路实验已取得了很好的效果,并进一步分析了此方法在高阶量子电路综合问题上的应用前景.%Reversible quantum logic synthesis is to study given quantum gates and quantum circuits of the constraints and limitations and find the smallest or smaller quantum cost to achieve the desired quantum logic circuits. The quantum logic gate functions of the matrix is indicated by the mathematical model. The synthesis and optimization are achieved simultaneously by the genetic algorithm as global search tool. Genetic algorithm is applied to quantum reversible logic synthesis. The fourth-order quantum circuit experiment has achieved good results, and further analysis of this method in high-level synthesis of quantum circuits and its application is completed.
Liu, Dan; Liu, Hongyun; Hu, Naifei
2012-02-09
Phenylboronic acid (PBA) moieties are grafted onto the backbone of poly(acrylic acid) (PAA), forming the PAA-PBA polyelectrolyte. The semi-interpenetrating polymer network (semi-IPN) films composed of PAA-PBA and poly(N,N-diethylacrylamide) (PDEA) were then synthesized on electrode surface with entrapped horseradish peroxidase (HRP), designated as PDEA-(PAA-PBA)-HRP. The films demonstrated reversible pH-, fructose-, and thermo-responsive on-off behavior toward electroactive probe K(3)Fe(CN)(6) in its cyclic voltammetric (CV) response. This multiswitchable CV behavior of the system could be further employed to control and modulate the electrochemical reduction of H(2)O(2) catalyzed by HRP immobilized in the films with K(3)Fe(CN)(6) as the mediator in solution. The responsive mechanism of the system was also explored and discussed. The pH-sensitive property was attributed to the electrostatic interaction between the PAA component of the films and the probe at different pH; the thermo-responsive behavior originated from the structure change of PDEA hydrogel component of the films with temperature; the fructose-sensitive property was ascribed to the structure change of the films induced by the complexation between the PBA constituent and the sugar. This smart system could be used as a 3-input logic network composed of enabled OR (EnOR) gates in chemical or biomolecular computing by combining the multiresponsive property of the films and the amplification effect of bioelectrocatalysis and demonstrated the potential perspective for fabricating novel multiswitchable electrochemical biosensors and bioelectronic devices. © 2012 American Chemical Society
Wang, Lei; Lian, Wenjing; Yao, Huiqin; Liu, Hongyun
2015-03-11
In the present work, reduced graphene oxide (rGO)/poly(N-isopropylacrylamide) (PNIPAA) composite films were electrodeposited onto the surface of Au electrodes in a fast and one-step manner from an aqueous mixture of a graphene oxide (GO) dispersion and N-isopropylacrylamide (NIPAA) monomer solutions. Reflection-absorption infrared (IR) and Raman spectroscopies were employed to characterize the successful construction of the rGO/PNIPAA composite films. The rGO/PNIPAA composite films exhibited reversible potential-, pH-, temperature-, and sulfate-sensitive cyclic voltammetric (CV) on-off behavior to the electroactive probe ferrocenedicarboxylic acid (Fc(COOH)2). For instance, after the composite films were treated at -0.7 V for 7 min, the CV responses of Fc(COOH)2 at the rGO/PNIPAA electrodes were quite large at pH 8.0, exhibiting the on state. However, after the films were treated at 0 V for 30 min, the CV peak currents became much smaller, demonstrating the off state. The mechanism of the multiple-stimuli switchable behaviors for the system was investigated not only by electrochemical methods but also by scanning electron microscopy and X-ray photoelectron spectroscopy. The potential-responsive behavior for this system was mainly attributed to the transformation between rGO and GO in the films at different potentials. The film system was further used to realize multiple-stimuli responsive bioelectrocatalysis of glucose catalyzed by the enzyme of glucose oxidase and mediated by the electroactive probe of Fc(COOH)2 in solution. On the basis of this, a four-input enabled OR (EnOR) logic gate network was established.
Cao, Jingjing; Ma, Xiang; Min, Mingri; Cao, Tiantian; Wu, Shuaifan; Tian, He
2014-03-25
INHIBIT logic gates based on light-driven β-cyclodextrin pseudo[1]rotaxane were conveniently fabricated in aqueous solution utilizing induced circular dichroism (ICD) and photocontrolled reversible room temperature phosphorescence (RTP) as output addresses respectively.
Novel designs for fault tolerant reversible binary coded decimal adders
Zhou, Ri-Gui; Li, Yan-Cheng; Zhang, Man-Qun
2014-10-01
Reversible logic circuits have received emerging attentions in recent years. Reversible logic is widely applied in some new technical fields, such as quantum computing, nanocomputing and optical computing and so on. In this paper, three fault tolerant gates are proposed, ZPL gate, ZQC gate and ZC gate. By using the proposed gates, fault tolerant quantum and reversible BCD adder and skip carry BCD adder are designed, which overcome the limitations of the existing methods. The proposed reversible BCD adders have also parity-preserving property. They are better than the existing counterparts, especially in the quantum cost. Proposed designs have been compared with existing designs with respect to the number of gates, number of garbage outputs and quantum cost.
Cheng, Nan; Zhu, Pengyu; Xu, Yuancong; Huang, Kunlun; Luo, Yunbo; Yang, Zhansen; Xu, Wentao
2016-10-15
The first example of droplet digital PCR logic gates ("YES", "OR" and "AND") for Hg (II) and Ag (I) ion detection has been constructed based on two amplification events triggered by a metal-ion-mediated base mispairing (T-Hg(II)-T and C-Ag(I)-C). In this work, Hg(II) and Ag(I) were used as the input, and the "true" hierarchical colors or "false" green were the output. Through accurate molecular recognition and high sensitivity amplification, positive droplets were generated by droplet digital PCR and viewed as the basis of hierarchical digital signals. Based on this principle, YES gate for Hg(II) (or Ag(I)) detection, OR gate for Hg(II) or Ag(I) detection and AND gate for Hg(II) and Ag(I) detection were developed, and their sensitively and selectivity were reported. The results indicate that the ddPCR logic system developed based on the different indicators for Hg(II) and Ag(I) ions provides a useful strategy for developing advanced detection methods, which are promising for multiplex metal ion analysis and intelligent DNA calculator design applications.
Comparison of the Cost Metrics for Reversible and Quantum Logic Synthesis
Miller, D M; Maslov, Dmitri
2005-01-01
A breadth-first search method for determining optimal 3-line circuits composed of quantum NOT, CNOT, controlled-V and controlled-V+ (NCV) gates is introduced. Results are presented for simple gate count and for technology motivated cost metrics. The optimal NCV circuits are also compared to NCV circuits derived from optimal NOT, CNOT and Toffoli (NCT) gate circuits. The work presented here provides basic results and motivation for continued study of the direct synthesis of NCV circuits, and establishes relations between function realizations in different circuit cost metrics.
Optimization of reversible sequential circuits
Sayem, Abu Sadat Md
2010-01-01
In recent years reversible logic has been considered as an important issue for designing low power digital circuits. It has voluminous applications in the present rising nanotechnology such as DNA computing, Quantum Computing, low power VLSI and quantum dot automata. In this paper we have proposed optimized design of reversible sequential circuits in terms of number of gates, delay and hardware complexity. We have designed the latches with a new reversible gate and reduced the required number of gates, garbage outputs, and delay and hardware complexity. As the number of gates and garbage outputs increase the complexity of reversible circuits, this design will significantly enhance the performance. We have proposed reversible D-latch and JK latch which are better than the existing designs available in literature.
Thermodynamic Study of Energy Dissipation in Adiabatic Superconductor Logic
Takeuchi, Naoki; Yamanashi, Yuki; Yoshikawa, Nobuyuki
2015-09-01
Because of its extremely high energy efficiency, adiabatic superconductor logic is one of the most promising candidates for the realization of a practical reversible computer. In a previous study, we proposed a logically and physically reversible logic gate using adiabatic superconductor logic, and numerically demonstrated reversible computing. In the numerical calculation, we assumed that the average energy dissipation at finite temperature corresponds to that at zero temperature. However, how the phase difference of a Josephson junction in adiabatic superconductor logic behaves at finite temperature is not yet well understood, and whether thermal noise can induce a nonadiabatic state change remains unclear. In the present study, we investigate energy dissipation in adiabatic superconductor logic at finite temperature through numerical analyses using the Monte Carlo method. We investigate the average and standard deviation of the energy dissipation through both numerical calculation and analytical estimation. Finally, we discuss the minimum energy dissipation required for adiabatic switching operations.
2013-03-21
Figure 18: An all-optical half- adder involving all-optical NAND, AND, XNOR, and XOR gates [44...XNOR gates, XOR gates, comparators, flip-flops, and half- adders can be achieved using multiple SMFP-LDs in a variety of configurations [47]. For...half- adder . Figure 18: An all-optical half- adder involving all-optical NAND, AND, XNOR, and XOR gates [47]. 55 The all-optical half- adder
A novel method of developing all optical frequency encoded Fredkin gates
Garai, Sisir Kumar
2014-02-01
All optical reversible logic gates have significant applications in the field of optics and optoelectronics for developing different sequential and combinational circuits of optical computing, optical signal processing and in multi-valued logic operations and quantum computing. Here the author proposes a method for developing all optical three-input-output Fredkin gate and modified Fredkin gate using frequency encoded data. For this purpose the author has exploited the properties of efficient frequency conversion and faster switching speed of semiconductor optical amplifiers. Simulation results of the three input-output Fredkin gate testifies to the feasibility of the proposed scheme. These Fredkin gates are universal logic gates, and can be used to develop different all-optical logic and data processors in communication network.
Bogdał, Marta N; Hat, Beata; Kochańczyk, Marek; Lipniacki, Tomasz
2013-07-24
Apoptosis is a tightly regulated process: cellular survive-or-die decisions cannot be accidental and must be unambiguous. Since the suicide program may be initiated in response to numerous stress stimuli, signals transmitted through a number of checkpoints have to be eventually integrated. In order to analyze possible mechanisms of the integration of multiple pro-apoptotic signals, we constructed a simple model of the Bcl-2 family regulatory module. The module collects upstream signals and processes them into life-or-death decisions by employing interactions between proteins from three subgroups of the Bcl-2 family: pro-apoptotic multidomain effectors, pro-survival multidomain restrainers, and pro-apoptotic single domain BH3-only proteins. Although the model is based on ordinary differential equations (ODEs), it demonstrates that the Bcl-2 family module behaves akin to a Boolean logic gate of the type dependent on levels of BH3-only proteins (represented by Bad) and restrainers (represented by Bcl-xL). A low level of pro-apoptotic Bad or a high level of pro-survival Bcl-xL implies gate AND, which allows for the initiation of apoptosis only when two stress stimuli are simultaneously present: the rise of the p53 killer level and dephosphorylation of kinase Akt. In turn, a high level of Bad or a low level of Bcl-xL implies gate OR, for which any of these stimuli suffices for apoptosis. Our study sheds light on possible signal integration mechanisms in cells, and spans a bridge between modeling approaches based on ODEs and on Boolean logic. In the proposed scheme, logic gates switching results from the change of relative abundances of interacting proteins in response to signals and involves system bistability. Consequently, the regulatory system may process two analogous inputs into a digital survive-or-die decision.
A Novel Nanometric Fault Tolerant Reversible Subtractor Circuit
Directory of Open Access Journals (Sweden)
Mozhgan Shiri
2012-11-01
Full Text Available Reversibility plays an important role when energy efficient computations are considered. Reversible logic circuits have received significant attention in quantum computing, low power CMOS design, optical information processing and nanotechnology in the recent years. This study proposes a new fault tolerant reversible half-subtractor and a new fault tolerant reversible full-subtractor circuit with nanometric scales. Also in this paper we demonstrate how the well-known and important, PERES gate and TR gate can be synthesized from parity preserving reversible gates. All the designs have nanometric scales.
Initial ideas for automatic design and verification of control logic in reversible HDLs
DEFF Research Database (Denmark)
Wille, Robert; Keszocze, Oliver; Othmer, Lars;
2016-01-01
not obvious. Moreover, implementations exist which may not be realized with a reversible control flow at all. In this work, we propose automatic methods for descriptions in the reversible HDL SyReC that can generate the required fi-conditions and check whether a reversible control flow indeed can be realized...
Decting Errors in Reversible Circuits With Invariant Relationships
Alves, Nuno
2008-01-01
Reversible logic is experience renewed interest as we are approach the limits of CMOS technologies. While physical implementations of reversible gates have yet to materialize, it is safe to assume that they will rely on faulty individual components. In this work we present a present a method to provide fault tolerance to a reversible circuit based on invariant relationships.
Design of the Efficient Nanometric Reversible Subtractor Circuit
Directory of Open Access Journals (Sweden)
Mozhgan Shiri
2012-11-01
Full Text Available Reversible logic has comprehensive applications in communications, quantum computing, low power VLSI design, computer graphics, cryptography, nanotechnology, and optical computing. It has received significant attention in low power dissipating circuit design in the past few years. While several researchers have inspected the design of reversible logic units, there is not much reported works on reversible subtractors. In this paper we proposed the quantum equivalent circuit for SRK gate and we have computed the quantum cost of SRK gate. We also showed that how SRK gate can work singly as a half-subtractor circuit. It is being tried to design the circuit optimal in terms of number of reversible gates, number of garbage outputs, number of constant inputs, and quantum cost with compared to the existing circuits. At last we proposed an implementation of the new full-subtractor circuit based on SRK gate. All the designs have nanometric scales.
Qin, Jun; Lu, Guo-Wei; Sakamoto, Takahide; Akahane, Kouichi; Yamamoto, Naokatsu; Wang, Danshi; Wang, Cheng; Wang, Hongxiang; Zhang, Min; Kawanishi, Tetsuya; Ji, Yuefeng
2014-12-01
In this paper, we experimentally demonstrate simultaneous multichannel wavelength multicasting (MWM) and exclusive-OR logic gate multicasting (XOR-LGM) for three 10Gbps non-return-to-zero differential phase-shift-keying (NRZ-DPSK) signals in quantum-dot semiconductor optical amplifier (QD-SOA) by exploiting the four-wave mixing (FWM) process. No additional pump is needed in the scheme. Through the interaction of the input three 10Gbps DPSK signal lights in QD-SOA, each channel is successfully multicasted to three wavelengths (1-to-3 for each), totally 3-to-9 MWM, and at the same time, three-output XOR-LGM is obtained at three different wavelengths. All the new generated channels are with a power penalty less than 1.2dB at a BER of 10(-9). Degenerate and non-degenerate FWM components are fully used in the experiment for data and logic multicasting.
Institute of Scientific and Technical Information of China (English)
ZHU Lin-Na; GONG Shao-Long; GONG Shu-Ling; YANG Chu-Luo; QIN Jin-Gui
2008-01-01
Two novel pyrene-armed calix[4]arenes by triazole connection were synthesized using "click" chemistry. Com-pound 1 with two pyrene subunits appended to the lower rims of the calix[4]arene shows ratiometric fluorescence response toward Zn2+, and selective fluorescence quenching toward heavy metal ions such as Cu2+, Hg2+ and pb2+; while compound 2 with one pyrene subunit exhibits significant fluorescence quenching toward Cu2+ and moderate quenching behaviour toward Hg2+. By utilizing the different fluorescence behavior of 1 toward Zn2+and Cu2+, inhi-bition (INH) and not or (NOR) logic gates were established.
Optimization Approaches for Designing a Novel 4-Bit Reversible Comparator
Zhou, Ri-gui; Zhang, Man-qun; Wu, Qian; Li, Yan-cheng
2013-02-01
Reversible logic is a new rapidly developed research field in recent years, which has been receiving much attention for calculating with minimizing the energy consumption. This paper constructs a 4×4 new reversible gate called ZRQ gate to build quantum adder and subtraction. Meanwhile, a novel 1-bit reversible comparator by using the proposed ZRQC module on the basis of ZRQ gate is proposed as the minimum number of reversible gates and quantum costs. In addition, this paper presents a novel 4-bit reversible comparator based on the 1-bit reversible comparator. One of the vital important for optimizing reversible logic is to design reversible logic circuits with the minimum number of parameters. The proposed reversible comparators in this paper can obtain superiority in terms of the number of reversible gates, input constants, garbage outputs, unit delays and quantum costs compared with the existed circuits. Finally, MATLAB simulation software is used to test and verify the correctness of the proposed 4-bit reversible comparator.
Implementation of Optimized Reversible Sequential and Combinational Circuits for VLSI Applications
Directory of Open Access Journals (Sweden)
P. Mohan Krishna
2014-04-01
Full Text Available Reversible logic has emerged as one of the most important approaches for the power optimization with its application in low power VLSI design. They are also the fundamental requirement for the emerging field of the Quantum computing having with applications in the domains like Nano-technology, Digital signal processing, Cryptography, Communications. Implementing the reversible logic has the advantages of reducing gate counts, garbage outputs as well as constant inputs. In this project we present sequential and combinational circuit with reversible logic gates which are simulated in Xilinx ISE and by writing the code in VHDL . we have proposed a new design technique of BCD Adder using newly constructed reversible gates are based on CMOS with pass transistor gates . Here the total reversible Adder is designed using EDA tools. We will analyze the VLSI limitations like power consumption and area of designed circuits.
Logic circuits from zero forcing
Burgarth, Daniel; Hogben, Leslie; Severini, Simone; Young, Michael
2011-01-01
We design logical circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity.
Organic field-effect transistor circuits with electrode interconnections using reverse stamping
Choi, Sangmoo; Fuentes-Hernandez, Canek; Yun, Minseong; Dindar, Amir; Khan, Talha M.; Wang, Cheng-Yin; Kippelen, Bernard
2014-10-01
We discuss a non-vacuum low-cost reverse stamping method for the realization of circuits based on top-gate organic field-effect transistors (OFETs) with a bi-layer gate dielectric. This method allows for patterning of high-k inorganic dielectric films produced by atomic layer deposition and consequently of the bilayer gate dielectric layers used in our top-gate OFETs. We demonstrate the fabrication and operation of logic inverters and ring oscillators following this approach.
Directory of Open Access Journals (Sweden)
Mitsue Takahashi
2010-11-01
Full Text Available We have investigated ferroelectric-gate field-effect transistors (FeFETs with Pt/SrBi2Ta2O9/(HfO2x(Al2O31−x (Hf-Al-O and Pt/SrBi2Ta2O9/HfO2 gate stacks. The fabricated FeFETs have excellent data retention characteristics: The drain current ratio between the on- and off-states of a FeFET was more than 2 × 106 after 12 days, and the decreasing rate of this ratio was so small that the extrapolated drain current ratio after 10 years is larger than 1 × 105. A fabricated self-aligned gate Pt/SrBi2Ta2O9/Hf-Al-O/Si FET revealed a sufficiently large drain current ratio of 2.4 × 105 after 33.5 day, which is 6.5 × 104 after 10 years by extrapolation. The developed FeFETs also revealed stable retention characteristics at an elevated temperature up to 120 °C and had small transistor threshold voltage (Vth distribution. The Vth can be adjusted by controlling channel impurity densities for both n-channel and p-channel FeFETs. These performances are now suitable to integrated circuit application with nonvolatile functions. Fundamental properties for the applications to ferroelectric-CMOS nonvolatile logic-circuits and to ferroelectric-NAND flash memories are demonstrated.
Lei, Ming; Tian, Qing; Wu, Kevin; Zhao, Yan
2016-03-01
Gate to source/drain (S/D) short is the most common and detrimental failure mechanism for advanced process technology development in Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET) device manufacturing. Especially for sub-1Xnm nodes, MOSFET device is more vulnerable to gate-S/D shorts due to the aggressive scaling. The detection of this kind of electrical short defect is always challenging for in-line electron beam inspection (EBI), especially new shorting mechanisms on atomic scale due to new material/process flow implementation. The second challenge comes from the characterization of the shorts including identification of the exact shorting location. In this paper, we demonstrate unique scan direction induced charging dynamics (SDCD) phenomenon which stems from the transistor level response from EBI scan at post metal contact chemical-mechanical planarization (CMP) layers. We found that SDCD effect is exceptionally useful for gate-S/D short induced voltage contrast (VC) defect detection, especially for identification of shorting locations. The unique SDCD effect signatures of gate-S/D shorts can be used as fingerprint for ground true shorting defect detection. Correlation with other characterization methods on the same defective location from EBI scan shows consistent results from various shorting mechanism. A practical work flow to implement the application of SDCD effect for in-line EBI monitor of critical gate-S/D short defects is also proposed, together with examples of successful application use cases which mostly focus on static random-access memory (SRAM) array regions. Although the capability of gate-S/D short detection as well as expected device response is limited to passing transistors and pull-down transistors due to the design restriction from standard 6-cell SRAM structure, SDCD effect is proven to be very effective for gate-S/D short induced VC defect detection as well as yield learning for advanced technology development.
Design of a novel quantum reversible ternary up-counter
Houshmand, Pouran; Haghparast, Majid
2015-08-01
Reversible logic has been recently considered as an interesting and important issue in designing combinational and sequential circuits. The combination of reversible logic and multi-valued logic can improve power dissipation, time and space utilization rate of designed circuits. Only few works have been reported about sequential reversible circuits and almost there are no paper exhibited about quantum ternary reversible counter. In this paper, first we designed 2-qutrit and 3-qutrit quantum reversible ternary up-counters using quantum ternary reversible T-flip-flop and quantum reversible ternary gates. Then we proposed generalized quantum reversible ternary n-qutrit up-counter. We also introduced a new approach for designing any type of n-qutrit ternary and reversible counter. According to the results, we can conclude that applying second approach quantum reversible ternary up-counter is better than the others.
Zhi, Lihua; Wang, Zhiyi; Liu, Jian; Liu, Weisheng; Zhang, Haoli; Chen, Fengjuan; Wang, Baodui
2015-07-01
Fluorescent chemosensors for detecting single anions have been largely synthesized. However, the simultaneous detection and degradation of multiple anions remain a major challenge. Herein we report the synthesis of a white emission nanoprobe on the basis of a Coumarin-Rhodamine CR1-Eu complex coordinated to dipicolinic acid (dpa)-PEG-Fe3O4 nanoparticles for the selective detection of ClO- and SCN- ions on controlling by a logic gate. The obtained nanoprobe exhibits three individual primary colors (blue, green, and red) as well as white emission at different excitation energies. Interestingly, this nanoprobe shows a marked rose red to violet emission color change in response to ClO-, a reversible violet to rose red emission color change in response to SCN-, and high ClO- and SCN- selectivity and sensitivity with a detection limit of 0.037 and 0.250 nM, respectively. Furthermore, the SCN- and ClO- can degrade simultaneously through the redox reaction between ClO- and SCN-.Fluorescent chemosensors for detecting single anions have been largely synthesized. However, the simultaneous detection and degradation of multiple anions remain a major challenge. Herein we report the synthesis of a white emission nanoprobe on the basis of a Coumarin-Rhodamine CR1-Eu complex coordinated to dipicolinic acid (dpa)-PEG-Fe3O4 nanoparticles for the selective detection of ClO- and SCN- ions on controlling by a logic gate. The obtained nanoprobe exhibits three individual primary colors (blue, green, and red) as well as white emission at different excitation energies. Interestingly, this nanoprobe shows a marked rose red to violet emission color change in response to ClO-, a reversible violet to rose red emission color change in response to SCN-, and high ClO- and SCN- selectivity and sensitivity with a detection limit of 0.037 and 0.250 nM, respectively. Furthermore, the SCN- and ClO- can degrade simultaneously through the redox reaction between ClO- and SCN-. Electronic supplementary
Reverse Gate Bias-Induced Degradation of AlGaN/GaN High Electron Mobility Transistors
2010-09-23
contributions from hot electrons and self-heating.13,19,20 In this article, we report on the degradation of AlGaN/ GaN HEMTs under step-stressing of...characteristic of the AlGaN/ GaN HEMTs before and after stress. FIG. 6. !Color online" PL spectra of stressed and unstressed devices. FIG. 7. EL images of stressed...high electric fields present under reverse bias stressing of AlGaN/ GaN HEMTs , the devices exhibit a five order of magnitude increase in gate current
Quantum half-adder Boolean logic gate with a nano-graphene molecule and graphene nano-electrodes
Srivastava, Saurabh; Kino, Hiori; Joachim, Christian
2017-01-01
A molecule Boolean 1 / 2 -adder is designed and the XOR and AND truth table calculated at +0.1 V using 4 graphene electrodes. It functions with level repulsion and destructive interferences effects using 4 molecule electronic states in a quantum Hamiltonian computing approach (QHC) with the abrupt change of the molecular orbital weight of those 4 calculating states as a function of the logical input configuration. The logical inputs enter rotating the two nitro groups of the central board. With QHC, a complex Boolean digital function can be implemented employing the same graphene material for interconnects and the molecule calculating parts.
Rule-Based Optimization of Reversible Circuits
Arabzadeh, Mona; Zamani, Morteza Saheb
2010-01-01
Reversible logic has applications in various research areas including low-power design and quantum computation. In this paper, a rule-based optimization approach for reversible circuits is proposed which uses both negative and positive control Toffoli gates during the optimization. To this end, a set of rules for removing NOT gates and optimizing sub-circuits with common-target gates are proposed. To evaluate the proposed approach, the best-reported synthesized circuits and the results of a recent synthesis algorithm which uses both negative and positive controls are used. Our experiments reveal the potential of the proposed approach in optimizing synthesized circuits.
Wu, Yun-Tse; Shanmugam, Chandirasekar; Tseng, Wei-Bin; Hiseh, Ming-Mu; Tseng, Wei-Lung
2016-05-01
Metal nanocluster-based nanomaterials for the simultaneous determination of temperature and pH variations in micro-environments are still a challenge. In this study, we develop a dual-emission fluorescent probe consisting of bovine serum albumin-stabilized gold nanoclusters (BSA-AuNCs) and fluorescein-5-isothiocyanate (FITC) as temperature- and pH-responsive fluorescence signals. Under single wavelength excitation the FITC/BSA-AuNCs exhibited well-separated dual emission bands at 525 and 670 nm. When FITC was used as a reference fluorophore, FITC/BSA-AuNCs showed a good linear response over the temperature range 1-71 °C and offered temperature-independent spectral shifts, temperature accuracy, activation energy, and reusability. The possible mechanism for high temperature-induced fluorescence quenching of FITC/BSA-AuNCs could be attributed to a weakening of the Au-S bond, thereby lowering the charge transfer from BSA to AuNCs. Additionally, the pH- and temperature-responsive properties of FITC/BSA-AuNCs allow simultaneous temperature sensing from 21 to 41 °C (at intervals of 5 °C) and pH from 6.0 to 8.0 (at intervals of 0.5 pH unit), facilitating the construction of two-input AND logic gates. Three-input AND logic gates were also designed using temperature, pH, and trypsin as inputs. The practicality of using FITC/BSA-AuNCs to determine the temperature and pH changes in HeLa cells is also validated.Metal nanocluster-based nanomaterials for the simultaneous determination of temperature and pH variations in micro-environments are still a challenge. In this study, we develop a dual-emission fluorescent probe consisting of bovine serum albumin-stabilized gold nanoclusters (BSA-AuNCs) and fluorescein-5-isothiocyanate (FITC) as temperature- and pH-responsive fluorescence signals. Under single wavelength excitation the FITC/BSA-AuNCs exhibited well-separated dual emission bands at 525 and 670 nm. When FITC was used as a reference fluorophore, FITC/BSA-AuNCs showed a
Indian Academy of Sciences (India)
M Lakshmanan; T Kanna
2001-11-01
Coupled nonlinear Schrödinger equations (CNLS) very often represent wave propagation in optical media such as multicore ﬁbers, photorefractive materials and so on. We consider speciﬁcally the pulse propagation in integrable CNLS equations (generalized Manakov systems). We point out that these systems possess novel exact soliton type pulses which are shape changing under collision leading to an intensity redistribution. The shape changes correspond to linear fractional transformations allowing for the possibility of construction of logic gates and Turing equivalent all optical computers in homogeneous bulk media as shown by Steiglitz recently. Special cases of such solitons correspond to the recently much discussed partially coherent stationary solitons (PCS). In this paper, we review critically the recent developments regarding the above properties with particular reference to 2-CNLS.
Hong, Lu; Zhou, Fu; Wang, Guangfeng; Zhang, Xiaojun
2016-12-15
A novel fluorescent label-free "turn-on" NAD(+) and adenosine triphosphate (ATP) biosensing strategy is proposed by fully exploiting ligation triggered Nanocluster Beacon (NCB). In the presence of the target, the split NCB was brought to intact, which brought the C-rich sequence and enhancer sequence in close proximity resulting in the lightening of dark DNA/AgNCs ("On" mode). Further application was presented for logic gate operation and aptasensor construction. The feasibility was investigated by Ultraviolet-visible spectroscopy (UV-vis), Fluorescence, lifetime and High Resolution Transmission Electron Microscopy (HRTEM) etc. The strategy displayed good performance in the detection of NAD(+) and ATP, with the detection limit of 0.002nM and 0.001mM, the linear range of 10-1000nM and 0.003-0.01mM, respectively. Due to the DNA/AgNCs as fluorescence reporter, the completely label-free fluorescent strategy boasts the features of simplicity and low cost, and showing little reliance on the sensing environment. Meanwhile, the regulation by overhang G-rich sequence not relying on Förster energy transfer quenching manifests the high signal-to-background ratios (S/B ratios). This method not only provided a simple, economical and reliable fluorescent NAD(+) assay but also explored a flexible G-rich sequence regulated NCB probe for the fluorescent biosensors. Furthermore, this sensing mode was expanded to the application of a logic gate design, which exhibited a high performance for not only versatile biosensors construction but also for molecular computing application. Copyright © 2016 Elsevier B.V. All rights reserved.
Directory of Open Access Journals (Sweden)
Ahmed Moustafa
2015-01-01
Full Text Available Quantum-dot cellular automata (QCA are nanoscale digital logic constructs that use electrons in arrays of quantum dots to carry out binary operations. In this paper, a basic building block for QCA will be proposed. The proposed basic building block can be customized to implement classical gates, such as XOR and XNOR gates, and reversible gates, such as CNOT and Toffoli gates, with less cell count and/or better latency than other proposed designs.
Moustafa, Ahmed; Younes, Ahmed; Hassan, Yasser F
2015-01-01
Quantum-dot cellular automata (QCA) are nanoscale digital logic constructs that use electrons in arrays of quantum dots to carry out binary operations. In this paper, a basic building block for QCA will be proposed. The proposed basic building block can be customized to implement classical gates, such as XOR and XNOR gates, and reversible gates, such as CNOT and Toffoli gates, with less cell count and/or better latency than other proposed designs.
Directory of Open Access Journals (Sweden)
R. M. Bommi
2014-01-01
Full Text Available In the recent years reversible logic design has promising applications in low power computing, optical computing, quantum computing. VLSI design mainly concentrates on low power logic circuit design. In the present scenario researchers have made implementations of reversible logic gates in optical domain for its low energy consumption and high speed. This study is all about designing a reversible Full adder using combination of all optical Toffoli and all optical TNOR and to compare it with the Full adder designed using all optical Toffoli gate in terms of optical cost. All optical TNOR gate can work as a replacement of existing NAND based All optical Toffoli Gate (TG. The gates are designed using Mach-Zehnder Interferometer (MZI based optical switch. The proposed system is developed with the basic of reversibility to design all optical full Adder implemented with CMOS transistors. The design is efficient in terms of both architecture and in power consumption.
Huang, Tao; Zhu, Yu-lian; Dai, Xue-qin; Zhang, Qi; Huang, Yan
2011-07-01
The Schiff base's reduced product N,N-bis(4-methoxybenzyl) ethane-1,2-diamine, which was used as a receptor L, was designed and synthesized for the first time in the present article. It was found that Cu2+ and Fe3+ could quench L in fluorescence observably and Zn2+ and Cd2+ could enhance L remarkably. So the two pair metal cation could set up "OR" logical gate relation with the receptor molecule L, then a logical recognition system be formed. The data of resolved ZnL's single crystal indicated that ZnL belonged to monoclinic (CCDC No. 747994). Integrated spectrum instrument was used to characterize the structure of its alike series of complex compound. According to ZnL's excellent fluorescence character and the ability to exchange with contiguous metal cation, ZnZ+/ZnL/Co2+, Zn2+/ZnL/Nit+ fluorescent molecule switch was designed. It is hoped that the work above could be positive for the development of molecule computer, bio-intellectualized inspection technology (therapy) and instrument.
Wang, Ya-Wen; Liu, Shun-Bang; Yang, Yan-Ling; Wang, Peng-Zhi; Zhang, Ai-Jiang; Peng, Yu
2015-02-25
A new Tb(III) complex based on a tripodal carboxylate ligand has been synthesized for the selective fluorescent recognition of phosphate anions, including inorganic phosphates and nucleoside phosphates (e.g., ATP), in Tris buffer solution. The resulting L · Tb complex shows the characteristic emission bands centered at about 495 and 550 nm from the Tb(III)-centered (5)D4 excited state to (7)FJ transitions with J = 6 and 5, where the chelating ligand acts only as an "antenna". Upon the addition of phosphate anions to the aqueous solution of Tb(III) complex, significant "on-off" fluorescence changes were observed, which were attributed to the inhibition of the "antenna" effect between the ligand and Tb(III) after the incorporation of phosphate anions. Furthermore, this unique Tb(III) complex has been successfully utilized to detect phosphate anions with filter papers and hydrogels. Notably, the Tb(III) complex also can be used for the construction of molecular logic gates with TRANSFER and INHIBIT logic functions by using the above fluorescence changes.
Energy Technology Data Exchange (ETDEWEB)
Singh, Gurjaspreet, E-mail: gjpsingh@pu.ac.in; Singh, Jandeep; Singh, Jasbhinder; Mangat, Satinderpal Singh
2015-09-15
This report describes an on–off module of a fluorescent probe for selectively sensing of Fe(II) and Fe(III) ions by a single chemosensor with unique output optical response and is being reported for the first time. The probe 8-methylquinolinyl-1,2,3-triazolyl silatrane (QTS) was efficiently developed using click silylation route, followed by transetherification of silane. Moreover, the color change in probe QTS by response of this colorimetric sensor can be visualized by naked eye. The anti-quenching response for quenched QTS–Fe{sup 3+} fluorescence spectra by addition of H{sub 2}PO{sub 4}{sup −} ions in the MeOH/H{sub 2}O solvent system results into reversion of fluorescence maximum. These fluctuations in spectral response, under electronic behavior, can be viewed to mimic as NOR and IMPLICATION logic gate. - Highlights: • The probe 8-methylquinolinyl-1,2,3-triazolyl silatrane (QTS) was efficiently developed by using click silylation route. • The fluorescence emission response of sensor QTS towards Fe{sup 3+} ions show 'turn-on' mode, with red shift of 79 nm. • UV–vis spectra illustrate increase in absorption maxima on sensing of both ionic species.
A Novel Reversible BCD Adder For Nanotechnology Based Systems
Directory of Open Access Journals (Sweden)
Majid Haghparast
2008-01-01
Full Text Available This paper proposes two reversible logic gates, HNFG and HNG. The first gate HNFG can be used as two Feynman Gates. It is suitable for a single copy of two bits with no garbage outputs. It can be used as Copying Circuit to increase fan-out because fan-out is not allowed in reversible circuits. The second gate HNG can implement all Boolean functions. It also can be used to design optimized adder architectures. This paper also proposes a novel reversible full adder. One of the prominent functionalities of the proposed HNG gate is that it can work singly as a reversible full adder unit. The proposed reversible full adder contains only one gate. We show that its hardware complexity is less than the existing reversible full adders. The proposed full adder is then applied to the design of a reversible 4-bit parallel adder. A reversible Binary Coded Decimal (BCD adder circuit is also proposed. The proposed circuit can add two 4-bit binary variables and it transforms the result into the appropriate BCD number using efficient error correction modules. We show that the proposed reversible BCD adder has lower hardware complexity and it is much better and optimized in terms of number of reversible gates and garbage outputs with compared to the existing counterparts.
Magnetic-field-controlled reconfigurable semiconductor logic.
Joo, Sungjung; Kim, Taeyueb; Shin, Sang Hoon; Lim, Ju Young; Hong, Jinki; Song, Jin Dong; Chang, Joonyeon; Lee, Hyun-Woo; Rhie, Kungwon; Han, Suk Hee; Shin, Kyung-Ho; Johnson, Mark
2013-02-07
Logic devices based on magnetism show promise for increasing computational efficiency while decreasing consumed power. They offer zero quiescent power and yet combine novel functions such as programmable logic operation and non-volatile built-in memory. However, practical efforts to adapt a magnetic device to logic suffer from a low signal-to-noise ratio and other performance attributes that are not adequate for logic gates. Rather than exploiting magnetoresistive effects that result from spin-dependent transport of carriers, we have approached the development of a magnetic logic device in a different way: we use the phenomenon of large magnetoresistance found in non-magnetic semiconductors in high electric fields. Here we report a device showing a strong diode characteristic that is highly sensitive to both the sign and the magnitude of an external magnetic field, offering a reversible change between two different characteristic states by the application of a magnetic field. This feature results from magnetic control of carrier generation and recombination in an InSb p-n bilayer channel. Simple circuits combining such elementary devices are fabricated and tested, and Boolean logic functions including AND, OR, NAND and NOR are performed. They are programmed dynamically by external electric or magnetic signals, demonstrating magnetic-field-controlled semiconductor reconfigurable logic at room temperature. This magnetic technology permits a new kind of spintronic device, characterized as a current switch rather than a voltage switch, and provides a simple and compact platform for non-volatile reconfigurable logic devices.
Kwon, Sun Sang; Yi, Jaeseok; Lee, Won Woo; Shin, Jae Hyeok; Kim, Su Han; Cho, Seunghee H; Nam, SungWoo; Park, Won Il
2016-01-13
We have studied the role of defects in electrolyte-gated graphene mesh (GM) field-effect transistors (FETs) by introducing engineered edge defects in graphene (Gr) channels. Compared with Gr-FETs, GM-FETs were characterized as having large increments of Dirac point shift (∼30-100 mV/pH) that even sometimes exceeded the Nernst limit (59 mV/pH) by means of electrostatic gating of H(+) ions. This feature was attributed to the defect-mediated chemisorptions of H(+) ions to the graphene edge, as supported by Raman measurements and observed cycling characteristics of the GM FETs. Although the H(+) ion binding to the defects increased the device response to pH change, this binding was found to be irreversible. However, the irreversible component showed relatively fast decay, almost disappearing after 5 cycles of exposure to solutions of decreasing pH value from 8.25 to 6.55. Similar behavior could be found in the Gr-FET, but the irreversible component of the response was much smaller. Finally, after complete passivation of the defects, both Gr-FETs and GM-FETs exhibited only reversible response to pH change, with similar magnitude in the range of 6-8 mV/pH.
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits
Mukhopadhyay, Saibal; Roy, Kaushik
2011-01-01
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-to-band-tunneling (BTBT) leakage, results in the large increase of total leakage power in a logic circuit. Leakage components interact with each other in device level (through device geometry, doping profile) and also in the circuit level (through node voltages). Due to the circuit level interaction of the different leakage components, the leakage of a logic gate strongly depends on the circuit topology i.e. number and nature of the other logic gates connected to its input and output. In this paper, for the first time, we have analyzed loading effect on leakage and proposed a method to accurately estimate the total leakage in a logic circuit, from its logic level description considering the impact of loading and transistor stacking.
Design Multipurpose Circuits with Minimum Garbage Outputs Using CMVMIN Gate
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Bahram Dehghan
2014-01-01
Full Text Available Quantum-dot cellular automata (QCA suggest an emerging computing paradigm for nanotechnology. The QCA offers novel approach in electronics for information processing and communication. QCA have recently become the focus of interest in the field of low power nanocomputing and nanotechnology. The fundamental logic elements of this technology are the majority voter (MV and the inverter (INV. This paper presents a novel design with less garbage output and minimum quantum cost in nanotechnology. In the paper we show how to create multipurpose reversible gates. By development of suitable gates in logic circuits as an example, we can combine MFA and HS in one design using CMVMIN gate. We offer CMVMIN gate implementations to be used in multipurpose circuit. We can produce concurrent half adder/subtractor and one bit comparator in one design using reversible logic gates and CMVMIN gates. Also, a 2×4 decoder from recent architecture has been shown independently. We investigate the result of the proposed design using truth table. A significant improvement in quality of the calculated parameters and variety of required outputs has been achieved.
Hayashi, Kazuo; Yamaguchi, Yutaro; Oishi, Toshiyuki; Otsuka, Hiroshi; Yamanaka, Koji; Nakayama, Masatoshi; Miyamoto, Yasuyuki
2013-04-01
Gate leakage current mechanism in GaN high electron mobility transistors (HEMTs) has been studied using a two-dimensional thin surface barrier (TSB) model to represent two unintentional donor thin layers that exit under and outside the gate electrode due to the existence of surface defects. The donor thin layer outside the gate affects the reverse gate current at the high gate voltage above the pinch-off voltage. Higher donor concentration of thin layer outside the gate results in larger ratio of lateral to vertical components of the electric field at the gate edge. On the other hand, the electric field at the center of the gate has only the vertical electric field component. As a result, the two-dimensional effects are only important for the reverse gate current above the pinch-off voltage. We have confirmed in this paper that the simulation results provided by our model correlate very well with the experimental reverse gate current characteristics of the device for a very wide range of reverse gate voltage from 0.1 to 90 V.
A novel reversible carry-selected adder with low latency
Li, Ming-Cui; Zhou, Ri-Gui
2016-07-01
Reversible logic is getting more and more attention in quantum computing, optical computing, nanotechnology and low-power complementary metal oxide semiconductor designs since reversible circuits do not loose information during computation and have only small energy dissipation. In this paper, a novel carry-selected reversible adder is proposed primarily optimised for low latency. A 4-bit reversible full adder with two kinds of outputs, minimum delay and optimal quantum cost is presented as the building block for ?-bit reversible adder. Three new reversible gates NPG (new Peres gate), TEPG (triple extension of Peres gate) and RMUX21 (reversible 2-to-1 multiplexer) are proposed and utilised to design efficient adder units. The secondary carry propagation chain is carefully designed to reduce the time consumption. The novelty of the proposed design is the consideration of low latency. The comparative study shows that the proposed adder achieves the improvement from 61.46% to 95.29% in delay over the existing designs.
Molecules with a sense of logic: a progress report.
Andréasson, Joakim; Pischel, Uwe
2015-03-07
In this tutorial review, the most recent developments in the field of molecular logic and information processing are discussed. Special emphasis is given to the report of progress in the concatenation of molecular logic devices and switches, the design of memory systems working according to the principles of sequential logic, the mimicking of transistors, and the research on photochromic platforms with an unprecedented degree of functional integration. Furthermore, a series of achievements that add up to the conceptual diversity of molecular logic is introduced, such as the realization of highly complex and logically reversible Toffoli and Fredkin gates by the action of DNAzymes or the use of a multifluorophoric platform as a viable approach towards keypad lock functions.
Institute of Scientific and Technical Information of China (English)
CHEN Yong-jun; HUANG Sheng-hua; WAN Shan-ming; WU Fang
2008-01-01
A high-performance digital servo system built on the platform of a field programmable gate array (FPGA), a fully digitized hardware design scheme of a direct torque control (DTC) and a low speed permanent magnet synchronous motor (PMSM) is proposed. The DTC strategy of PMSM is described with Verilog hardware description language and is employed on-chip FPGA in accordance with the electronic design automation design methodology. Due to large torque ripples in low speed PMSM, the hysteresis controller in a conventional PMSM DTC was replaced by a fuzzy controller. This FPGA scheme integrates the direct torque controller strategy, the time speed measurement algorithm, the fuzzy regulating technique and the space vector pulse width modulation principle. Experimental results indicate the fuzzy controller can provide a controllable speed at 20 r min-1 and torque at 330 N m with satisfactory dynamic and static performance. Furthermore, the results show that this new control strategy decreases the torque ripple drastically and enhances control performance.
Sun, Jian; Yang, Fan; Zhao, Dan; Chen, Chuanxia; Yang, Xiurong
2015-04-01
By means of employing 11-mercaptoundecanoic acid (11-MUA) as a reducing agent and protecting ligand, we present straightforward one-pot preparation of fluorescent Ag/Au bimetallic nanoclusters (namely AgAuNCs@11-MUA) from AgNO3 and HAuCl4 in alkaline aqueous solution at room temperature. It is found that the fluorescence of AgAuNCs@11-MUA has been selectively quenched by Cu(2+) ions, and the nonfluorescence off-state of the as-prepared AgAuNCs@11-MUA-Cu(2+) ensemble can be effectively switched on upon the addition of histidine and cysteine. By incorporating Ni(2+) ions and N-ethylmaleimide, this phenomenon is further exploited as an integrated logic gate and a specific fluorescence turn-on assay for selectively and sensitively sensing histidine and cysteine has been designed and established based on the original noncovalent AgAuNCs@11-MUA-Cu(2+) ensemble. Under the optimal conditions, histidine and cysteine can be detected in the concentration ranges of 0.25-9 and 0.25-7 μM; besides, the detection limits are found to be 87 and 111 nM (S/N = 3), respectively. Furthermore, we demonstrate that the proposed AgAuNCs@11-MUA-based fluorescent assay can be successfully utilized for biological fluids sample analysis.
Energy Technology Data Exchange (ETDEWEB)
Gao, Tianxi; Que, Wenxiu, E-mail: wxque@mail.xjtu.edu.cn; Shao, Jinyou [Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education, International Center for Dielectric Research, School of Electronic and Information Engineering, State Key Laboratory for Manufacturing Systems Engineering, Xi' an Jiaotong University, Xi' an 710049, Shaanxi (China); Wang, Yushu [School of Materials Science and Engineering, Georgia Institute of Technology, 500 Tenth Street NW, Atlanta, Georgia 30318 (United States)
2015-10-21
Azobenzene dyes have large refractive index near their main resonance, but the poor figure of merit (FOM) limits their potential for all-optical applications. To improve this situation, disperse red 1 (DR1) molecules were dispersed in a sol-gel germanium/Ormosil organic-inorganic hybrid matrix. Z-scan measurement results showed a good compatibility between the dopant and the matrix, and also, an improved FOM was obtained as compared to the DR1/polymer films reported previously. To demonstrate the all-optical signal processing effect, a cw Nd:YAG laser emitting at 532 nm and a He-Ne laser emitting at 632.8 nm were used as pump and probe beams, respectively. DR1 acts as an initiator of the photo-induced transient holographic grating, which is attributed to the trans-cis-trans photoisomerization. Thus, a three inputs AND all-optical logic gate was achieved by using choppers with different frequencies. The detailed mechanism of operation is discussed. These results indicate that the DR1 doped germanium/Ormosil organic-inorganic hybrid film with an improved FOM has a great potential in all-optical devices around its main resonance.
Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders
Islam, Md Saiful; begum, Zerina; Hafiz, Mohd Zulfiquar
2010-01-01
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its corresponding output vector. Reversible logic circuit implements only the functions having one-to-one mapping between its input and output vectors and therefore naturally takes care of heating. Reversible logic design becomes one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient approaches for designing fault tolerant reversible fast adders that implement carry look-ahead and carry-skip logic. The proposed high speed reversible adders include MIG gates for the realization of its basic building block. The MIG gate is universal and parity preserving. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs...
Novel designs of nanometric parity preserving reversible compressor
Shoaei, Soghra; Haghparast, Majid
2014-08-01
Reversible logic is a new field of study that has applications in optical information processing, low power CMOS design, DNA computing, bioinformatics, and nanotechnology. Low power consumption is a basic issue in VLSI circuits today. To prevent the distribution of errors in the quantum circuit, the reversible logic gates must be converted into fault-tolerant quantum operations. Parity preserving is used to realize fault tolerant in this circuits. This paper proposes a new parity preserving reversible gate. We named it NPPG gate. The most significant aspect of the NPPG gate is that it can be used to produce parity preserving reversible full adder circuit. The proposed parity preserving reversible full adder using NPPG gate is more efficient than the existing designs in term of quantum cost and it is optimized in terms of number of constant inputs and garbage outputs. Compressors are of importance in VLSI and digital signal processing applications. Effective VLSI compressors reduce the impact of carry propagation of arithmetic operations. They are built from the full adder blocks. We also proposed three new approaches of parity preservation reversible 4:2 compressor circuits. The third design is better than the previous two in terms of evaluation parameters. The important contributions have been made in the literature toward the design of reversible 4:2 compressor circuits; however, there are not efforts toward the design of parity preservation reversible 4:2 compressor circuits. All the scales are in the nanometric criteria.
Alternative approach of developing all-optical Fredkin and Toffoli gates
Mandal, Dhoumendra; Mandal, Sumana; Garai, Sisir Kumar
2015-09-01
Reversible logic gates show potential roles in communication technology, and it has a wide area of applicability such as in sequential and combinational circuit of optical computing, optical signal processing, multi-valued logic operations, etc. because of its advantageous aspects of data-recovering capabilities, low power consumption, least power dissipation, faster speed of processing, less hardware complexity, etc. In a reversible logic gate not only the outputs can be determined from the inputs, but also the inputs can be uniquely recovered from the outputs. In this article an alternative approach has been made to develop three-input-output Fredkin and Toffoli gates using the frequency conversion property of semiconductor optical amplifier (SOA) and frequency-based beam routing by optical multiplexers and demultiplexers. Simulation results show the feasibility of our proposed scheme.
Design of High speed Low Power Reversible Vedic multiplier and Reversible Divider
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Srikanth G Department of Electronics & Communication Engineerig, Indur Institute of Engineering & Technology, Siddipet, Medak, JNTUH University, Telangana, India.
2014-09-01
Full Text Available This paper bring out a 32X32 bit reversible Vedic multiplier using "Urdhva Tiryakabhayam" sutra meaning vertical and crosswise, is designed using reversible logic gates, which is the first of its kind. Also in this paper we propose a new reversible unsigned division circuit. This circuit is designed using reversible components like reversible parallel adder, reversible left-shift register, reversible multiplexer, reversible n-bit register with parallel load line. The reversible vedic multiplier and reversible divider modules have been written in Verilog HDL and then synthesized and simulated using Xilinx ISE 9.2i. This reversible vedic multiplier results shows less delay and less power consumption by comparing with array multiplier.
Dao, Toan Thanh; Sakai, Heisuke; Nguyen, Hai Thanh; Ohkubo, Kei; Fukuzumi, Shunichi; Murata, Hideyuki
2016-07-20
We present controllable and reliable complementary organic transistor circuits on a PET substrate using a photoactive dielectric layer of 6-[4'-(N,N-diphenylamino)phenyl]-3-ethoxycarbonylcoumarin (DPA-CM) doped into poly(methyl methacrylate) (PMMA) and an electron-trapping layer of poly(perfluoroalkenyl vinyl ether) (Cytop). Cu was used for a source/drain electrode in both the p-channel and n-channel transistors. The threshold voltage of the transistors and the inverting voltage of the circuits were reversibly controlled over a wide range under a program voltage of less than 10 V and under UV light irradiation. At a program voltage of -2 V, the inverting voltage of the circuits was tuned to be at nearly half of the supply voltage of the circuit. Consequently, an excellent balance between the high and low noise margins (NM) was produced (64% of NMH and 68% of NML), resulting in maximum noise immunity. Furthermore, the programmed circuits showed high stability, such as a retention time of over 10(5) s for the inverter switching voltage. Our findings bring about a flexible, simple way to obtain robust, high-performance organic circuits using a controllable complementary transistor inverter.
Institute of Scientific and Technical Information of China (English)
肖林荣; 陈偕雄; 应时彦
2011-01-01
为了减少纳米器件量子细胞自动机(QCA)电路的线交叉数和电路综合时采用的门电路类型,在介绍QCA细胞结构、逻辑器件、模块化设计技术以及最佳通用逻辑门ULG.2的基础上,提出基于模块化技术的最佳通用逻辑门ULG.2的QCA电路实现方案.利用最佳QCA通用逻辑门ULG.2设计了全加/减器、全比较器和4选1数据选择器.所设计的QCA电路均用QCADesigner软件进行模拟,结果表明:该电路不仅具有正确的逻辑功能,而且某些性能得到了很大的改善.特别地对于4选1数据选择器,与已有的多数门和反相器直接设计的电路相比,细胞数、QCA线交叉数分别减少了31.8％和62.5％.%In order to reduce the number of wire-crossings in quantum-dot cellular automata (QCA) circuits and the types of QCA logic gates in logic synthesis, based on the introduction of basic principles of QCA , QCA logic devices and modular design methodology, a novel QCA optimal universal logic gate ULG. 2 was designed. Three circuits of full adder/subtraction, full comparator and 4-to-l multiplexer were implemented with the optimal QCA universal logic gate ULG. 2. Simulation by using the QCADesigner tool for the proposed QCA circuits confirms that the proposed circuits have correct logic function and their performance was improved dramatically in comparison to the other previous designs. Especially, the proposed 4-to-l multiplexer was reduced 31. 8%QCA cells and 62. 5% number of wire-crossings compared with the traditional design based on majority gates and inverters.
Institute of Scientific and Technical Information of China (English)
ZHAO Yao; XU Ming-Zhen; TAN Chang-Hua
2005-01-01
@@ Degradation of ultra-thin gate-oxide n-channel metal-oxide-semiconductor field-effect transistors with the halo structure has been studied under different stress modes with a reverse substrate bias. The device degradation under the same stress mode with different reverse substrate voltages has been characterized by monitoring the substrate current in a stressing process, which follows a simple power law. When the gate voltage is less than the critical value, the device degradation will first decrease and then increase with the increasing reverse sub strate voltage, otherwise, the device degradation will increase continuously. The critical value can be obtained by measuring the substrate current variation with the increases of reverse substrate voltage and gate voltage. The experimental results indicate that the stress mode with enhanced injection efficiency and smaller device degradation can be obtained when the gate voltage is less than the critical value with a proper reverse substratevoltage chosen.
A testable parity conservative gate in quantum-dot cellular automata
Karkaj, Ehsan Taher; Heikalabad, Saeed Rasouli
2017-01-01
There are important challenges in current VLSI technology such as feature size. New technologies are emerging to overcome these challenges. One of these technologies is quantum-dot cellular automata (QCA) but it also has some disadvantages. One of the very important challenges in QCA is the occurrence of faults due to its very small area. There are different ways to overcome this challenge, one of which is the testable logic gate. There are two types of testable gate; reversible gate, and conservative gate. We propose a new testable parity conservative gate in this paper. This gate is simulated with QCADesigner and compared with previous structures. Power dissipation of proposed gate investigated using QCAPro simulator as an accurate power estimator tool.
Novel Designs of Quantum Reversible Counters
Qi, Xuemei; Zhu, Haihong; Chen, Fulong; Zhu, Junru; Zhang, Ziyang
2016-11-01
Reversible logic, as an interesting and important issue, has been widely used in designing combinational and sequential circuits for low-power and high-speed computation. Though a significant number of works have been done on reversible combinational logic, the realization of reversible sequential circuit is still at premature stage. Reversible counter is not only an important part of the sequential circuit but also an essential part of the quantum circuit system. In this paper, we designed two kinds of novel reversible counters. In order to construct counter, the innovative reversible T Flip-flop Gate (TFG), T Flip-flop block (T_FF) and JK flip-flop block (JK_FF) are proposed. Based on the above blocks and some existing reversible gates, the 4-bit binary-coded decimal (BCD) counter and controlled Up/Down synchronous counter are designed. With the help of Verilog hardware description language (Verilog HDL), these counters above have been modeled and confirmed. According to the simulation results, our circuits' logic structures are validated. Compared to the existing ones in terms of quantum cost (QC), delay (DL) and garbage outputs (GBO), it can be concluded that our designs perform better than the others. There is no doubt that they can be used as a kind of important storage components to be applied in future low-power computing systems.
All-optical four-bit Toffoli gate with possible implementation in solids
Grigoryan, G.; Chaltykyan, V.; Gazazyan, E.; Tikhova, O.
2013-05-01
We examine in detail the cyclic adiabatic population transfer methods for five-level diagrams in order to construct a four-bit universal reversible logic gate. We show that under certain conditions and sequence of turning on and off the laser pulses a five-level system may be reduced to an effective Λ-diagram.
Transistor Level Implementation of Digital Reversible Circuits
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K.Prudhvi Raj
2015-12-01
Full Text Available Now a days each and every electronic gadget is desi gning smartly and provides number of applications, so these designs dissipate high amount of power. Rever sible logic is becoming one of the best emerging de sign technologies having its applications in low power C MOS, Quantum computing and Nanotechnology. Reversible logic plays an important role in the des ign of energy efficient circuits. Adders and subtra ctors are the essential blocks of the computing systems. In this paper, reversible gates and circuits are de signed and implemented in CMOS and pass transistor logic u sing Mentor graphics backend tools. A four-bit ripp le carry adder/subtractor and an eight-bit reversible Carry Skip Adder are implemented and compared with the conventional circuits
The All Optical New Universal Gate Using TOAD
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Goutam Kumar Maity
2014-06-01
Full Text Available Since the seventies of the past century the reversible logic has originated as an unconventional form of computing. It is new relatively in the area of extensive applications in quantum computing, low power CMOS, DNA computing, digital signal processing (DSP, nanotechnology, communication, optical computing, computer graphics, bio information, etc .Here we present and configure a new TAND gate in all-optical domain and also in this paper we have explained their principle of operations and used a theoretical model to fulfil this task, finally supporting through numerical simulations. In the field of ultra-fast all-optical signal processing Terahertz Optical Asymmetric Demultiplexer (TOAD, semiconductor optical amplifier (SOA-based, has an important function. The different logical (composing of Boolean function operations can be executed by designed circuits with TAND gate in the domain of universal logic-based information processing.
Logic circuits from zero forcing.
Burgarth, Daniel; Giovannetti, Vittorio; Hogben, Leslie; Severini, Simone; Young, Michael
We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity. Moreover, in the light of applications of zero forcing in quantum mechanics, the link with Boolean functions may suggest a new directions in quantum control theory and in the study of engineered quantum spin systems. It is an open technical problem to verify whether there is a link between zero forcing and computation with contact circuits.
Institute of Scientific and Technical Information of China (English)
唐东峰; 张平; 龙志林; 胡仕刚; 吴笑峰
2013-01-01
With the scaling of MOS (metal-oxide-semiconductor) devices, gate tunneling current increases significantly due to thinner gate oxides, and static characteristics of devices and circuit are severely affected by the presence of gate tunneling currents, considering that, the direct tunneling current (DT) in MOSFET (metal-oxide-semiconductor field effect transistor) was studied based on reliability theory and simulation. Simultaneously, the static gate leakage current of two-input nor gate was studied and the impact of direct tunneling gate leakage current on CMOS (complementary metal oxide semiconductor) logic circuits was revealed. HSP1CE software was used as the simulation tool. MOS model parameter is BSIM4 and LEVEL 54. The thickness of the gate oxide is 1.4 nm. The results show that the edge direct tunneling is an important component of gate tunneling in a scaled MOS device. Drain bias and substrate bias can affect the gate current density by changing the surface potential. There are four common working states of MOS device in CMOS logic circuit, i.e. the linear region, saturation region, sub-threshold region and cut-off region. The gate leakage current of MOSFET in CMOS logic circuit is related to its working status. The simulation results agree well with theoretical analysis results, and the theory and simulation will contribute to integrated circuit design.%随着晶体管尺寸按比例缩小,越来越薄的氧化层厚度导致栅上的隧穿电流显著地增大,严重地影响器件和电路的静态特性,为此,基于可靠性理论和仿真,对小尺寸MOSFET (metal-oxide-semiconductor field effect transistor)的直接隧穿栅电流进行研究,并通过对二输入或非门静态栅泄漏电流的研究,揭示直接隧穿栅电流对CMOS(complementary metal oxide semiconductor)逻辑电路的影响.仿真工具为HSPICE软件,MOS器件模型参数采用的是BSIM4和LEVEL 54,栅氧化层厚度为1.4 nm.研究结果表明:边缘直接隧穿电流是
Quantum Cost Efficient Reversible BCD Adder for Nanotechnology Based Systems
Islam, Md Saiful; Begum, Zerina
2011-01-01
Reversible logic allows low power dissipating circuit design and founds its application in cryptography, digital signal processing, quantum and optical information processing. This paper presents a novel quantum cost efficient reversible BCD adder for nanotechnology based systems using PFAG gate. It has been demonstrated that the proposed design offers less hardware complexity and requires minimum number of garbage outputs than the existing counterparts. The remarkable property of the proposed designs is that its quantum realization is given in NMR technology.
Low Cost Reversible Signed Comparator
Directory of Open Access Journals (Sweden)
Farah Sharmin
2013-10-01
Full Text Available Nowadays exponential advancement in reversible comp utation has lead to better fabrication and integration process. It has become very popular ove r the last few years since reversible logic circuit s dramatically reduce energy loss. It consumes less p ower by recovering bit loss from its unique input-o utput mapping. This paper presents two new gates called RC-I and RC-II to design an n-bit signed binary comparator where simulation results show that the p roposed circuit works correctly and gives significa ntly better performance than the existing counterparts. An algorithm has been presented in this paper for constructing an optimized reversible n-bit signed c omparator circuit. Moreover some lower bounds have been proposed on the quantum cost, the numbers of g ates used and the number of garbage outputs generated for designing a low cost reversible sign ed comparator. The comparative study shows that the proposed design exhibits superior performance consi dering all the efficiency parameters of reversible logic design which includes number of gates used, quantum cost, garbage output and constant inputs. This proposed design has certainly outperformed all the other existing approaches.
Directory of Open Access Journals (Sweden)
Praveena Murugesan
2014-01-01
Full Text Available Reversible logic gates under ideal conditions produce zero power dissipation. This factor highlights the usage of these gates in optical computing, low power CMOS design, quantum optics and quantum computing. The growth of decimal arithmetic in various applications as stressed the need to propose the study on reversible binary to BCD converter which plays a greater role in decimal multiplication for providing faster results. The different parameters such as gate count,garbage output and constant input are more optimized in the proposed fixed bit binary to binary coded decimal converter than the existing design.
Fredkin and Toffoli Gates Implemented in Oregonator Model of Belousov-Zhabotinsky Medium
Adamatzky, Andrew
A thin-layer Belousov-Zhabotinsky (BZ) medium is a powerful computing device capable for implementing logical circuits, memory, image processors, robot controllers, and neuromorphic architectures. We design the reversible logical gates — Fredkin gate and Toffoli gate — in a BZ medium network of excitable channels with subexcitable junctions. Local control of the BZ medium excitability is an important feature of the gates’ design. An excitable thin-layer BZ medium responds to a localized perturbation with omnidirectional target or spiral excitation waves. A subexcitable BZ medium responds to an asymmetric perturbation by producing traveling localized excitation wave-fragments similar to dissipative solitons. We employ interactions between excitation wave-fragments to perform the computation. We interpret the wave-fragments as values of Boolean variables. The presence of a wave-fragment at a given site of a circuit represents the logical truth, absence of the wave-fragment — logically false. Fredkin gate consists of ten excitable channels intersecting at 11 junctions, eight of which are subexcitable. Toffoli gate consists of six excitable channels intersecting at six junctions, four of which are subexcitable. The designs of the gates are verified using numerical integration of two-variable Oregonator equations.
Henriques, David; Rocha, Miguel; Saez-Rodriguez, Julio; Banga, Julio R
2015-09-15
Systems biology models can be used to test new hypotheses formulated on the basis of previous knowledge or new experimental data, contradictory with a previously existing model. New hypotheses often come in the shape of a set of possible regulatory mechanisms. This search is usually not limited to finding a single regulation link, but rather a combination of links subject to great uncertainty or no information about the kinetic parameters. In this work, we combine a logic-based formalism, to describe all the possible regulatory structures for a given dynamic model of a pathway, with mixed-integer dynamic optimization (MIDO). This framework aims to simultaneously identify the regulatory structure (represented by binary parameters) and the real-valued parameters that are consistent with the available experimental data, resulting in a logic-based differential equation model. The alternative to this would be to perform real-valued parameter estimation for each possible model structure, which is not tractable for models of the size presented in this work. The performance of the method presented here is illustrated with several case studies: a synthetic pathway problem of signaling regulation, a two-component signal transduction pathway in bacterial homeostasis, and a signaling network in liver cancer cells. Supplementary data are available at Bioinformatics online. julio@iim.csic.es or saezrodriguez@ebi.ac.uk. © The Author 2015. Published by Oxford University Press.
Radix-independent, efficient arrays for multi-level n-qudit quantum and reversible computation
Mohammadi, Majid
2015-08-01
Multiple-valued quantum logic allows the designers to reduce the number of cells while obtaining more functionality in the quantum circuits. Large r-valued reversible or quantum gates ( r stands for radix and is more than 2) cannot be directly realized in the current quantum technology. Therefore, we are interested in designing the large reversible and quantum controlled gates using the arrays of one-quantum digit (qudit) or two-qudit gates. In our previous work, we proposed quantum arrays to implement the r-valued quantum circuits. In this paper, we propose novel efficient structures and arrays, for r-valued quantum logic gates. The quantum costs of the developed quantum arrays are independent of the radix of calculations in the quantum circuit.
Logic control of microfluidics with smart colloid
Wang, Limu
2010-01-01
We report the successful realization of a microfluidic chip with switching and corresponding inverting functionalities. The chips are identical logic control components incorporating a type of smart colloid, giant electrorheological fluid (GERF), which possesses reversible characteristics via a liquid-solid phase transition under external electric field. Two pairs of electrodes embedded on the sides of two microfluidic channels serve as signal input and output, respectively. One, located in the GERF micro-channel is used to control the flow status of GERF, while another one in the ither micro-fluidic channel is used to detect the signal generated with a passing-by droplet (defined as a signal droplet). Switching of the GERF from the suspended state (off-state) to the flowing state (on-state) or vice versa in the micro-channel is controlled by the appearance of signal droplets whenever they pass through the detection electrode. The output on-off signals can be easily demonstrated, clearly matching with GERF flow status. Our results show that such a logic switch is also a logic IF gate, while its inverter functions as a NOT gate. © The Royal Society of Chemistry 2010.
GATE TYPE SELECTION BASED ON FUZZY MAPPING
Institute of Scientific and Technical Information of China (English)
无
2002-01-01
Gate type selection is very important for mould design. Improper gate type may lead to poor product quality and low production efficiency. Although numerical simulation approach could be used to optimize gate location, the determination of gate type is still up to designers' experience. A novel method for selecting gate type based on fuzzy logic is proposed. The proposed methodology follows three steps:Design requirements for gate is extracted and generalized; Possible gate types (design schemes) are presented; The fuzzy mapping relationship between gate design requirements and gate design scheme is established based on fuzzy composition and fuzzy relation transition matrices that are assigned by domain experts.
DEFF Research Database (Denmark)
Nilsson, Jørgen Fischer
A Gentle introduction to logical languages, logical modeling, formal reasoning and computational logic for computer science and software engineering students......A Gentle introduction to logical languages, logical modeling, formal reasoning and computational logic for computer science and software engineering students...
Sasao, Tsutomu
2011-01-01
This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.
Construction of a reconfigurable dynamic logic cell
Indian Academy of Sciences (India)
K Murali; Sudeshna Sinha; William L Ditto
2005-03-01
We report the first experimental realization of all the fundamental logic gates, flexibly, using a chaotic circuit. In our scheme a simple threshold mechanism allows the chaotic unit to switch easily between behaviours emulating the different gates. We also demonstrate the combination of gates through a half-adder implementation.
An Improved Structure Of Reversible Adder And Subtractor
Directory of Open Access Journals (Sweden)
Aakash Gupta
2013-03-01
Full Text Available In today’s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. The increased number of transistors packed onto a chip of a conventional system results in increased power consumption that is why Reversible logic has drawn attention of Researchers due to its less heat dissipating characteristics. Reversible logic can be imposed over applications such as quantum computing, optical computing, quantum dot cellular automata, low power VLSI circuits, DNA computing. This paper presents the reversible combinational circuit of adder, subtractor and parity preserving subtractor. The suggested circuit in this paper are designed using Feynman, Double Feynman and MUX gates which are better than the existing one in literature in terms of Quantum cost, Garbage output and Total logical calculations.
Fegade, Umesh A; Sahoo, Suban K; Singh, Amanpreet; Singh, Narinder; Attarde, Sanjay B; Kuwar, Anil S
2015-05-04
A fluorescent based receptor (4Z)-4-(4-diethylamino)-2-hydroxybenzylidene amino)-1,2dihydro-1,5-dimethyl-2-phenylpyrazol-3-one (receptor 3) was developed for the highly selective and sensitive detection of Cu(2+) and Zn(2+) in semi-aqueous system. The fluorescence of receptor 3 was enhanced and quenched, respectively, with the addition of Zn(2+) and Cu(2+) ions over other surveyed cations. The receptor formed host-guest complexes in 1:1 stoichiometry with the detection limit of 5 nM and 15 nM for Cu(2+) and Zn(2+) ions, respectively. Further, we have effectively utilized the two metal ions (Cu(2+) and Zn(2+)) as chemical inputs for the manufacture of INHIBIT type logic gate at molecular level using the fluorescence responses of receptor 3 at 450 nm. Copyright © 2015 Elsevier B.V. All rights reserved.
Reintjes, Wesley; Romijn, Marloes D M; Hollander, Daan; Ter Bruggen, Jan P; van Marum, Rob J
2015-09-01
Voltage-gated potassium channel antibody-associated limbic encephalitis (VGKC-LE) is a rare disease that is a diagnostic and therapeutic challenge for medical practitioners. Two patients with VGKC-LE, both developing dementia are presented. Following treatment, both patients showed remarkable cognitive and functional improvement enabling them to leave the psychogeriatric nursing homes they both were admitted to. Patients with VGKC-LE can have a major cognitive and functional improvement even after a diagnostic delay of more than 1 year. Medical practitioners who treat patients with unexplained cognitive decline, epileptic seizures, or psychiatric symptoms should be aware of LE as an underlying rare cause.
Efficient Reversible Montgomery Multiplier and Its Application to Hardware Cryptography
Directory of Open Access Journals (Sweden)
Noor M. Nayeem
2009-01-01
Full Text Available Problem Statement: Arithmetic Logic Unit (ALU of a crypto-processor and microchips leak information through power consumption. Although the cryptographic protocols are secured against mathematical attacks, the attackers can break the encryption by measuring the energy consumption. Approach: To thwart attacks, this study proposed the use of reversible logic for designing the ALU of a crypto-processor. Ideally, reversible circuits do not dissipate any energy. If reversible circuits are used, then the attacker would not be able to analyze the power consumption. In order to design the reversible ALU of a crypto-processor, reversible Carry Save Adder (CSA using Modified TSG (MTSG gates and architecture of Montgomery multiplier were proposed. For reversible implementation of Montgomery multiplier, efficient reversible multiplexers and sequential circuits such as reversible registers and shift registers were presented. Results: This study showed that modified designs perform better than the existing ones in terms of number of gates, number of garbage outputs and quantum cost. Lower bounds of the proposed designs were established by providing relevant theorems and lemmas. Conclusion: The application of reversible circuit is suitable to the field of hardware cryptography.
MEMS Logic Using Mixed-Frequency Excitation
Ilyas, Saad
2017-06-22
We present multi-function microelectromechanical systems (MEMS) logic device that can perform the fundamental logic gate AND, OR, universal logic gates NAND, NOR, and a tristate logic gate using mixed-frequency excitation. The concept is based on exciting combination resonances due to the mixing of two or more input signals. The device vibrates at two steady states: a high state when the combination resonance is activated and a low state when no resonance is activated. These vibration states are assigned to logical value 1 or 0 to realize the logic gates. Using ac signals to drive the resonator and to execute the logic inputs unifies the input and output wave forms of the logic device, thereby opening the possibility for cascading among logic devices. We found that the energy consumption per cycle of the proposed logic resonator is higher than those of existing technologies. Hence, integration of such logic devices to build complex computational system needs to take into consideration lowering the total energy consumption. [2017-0041
Kondo, Atsushi; Suzuki, Takayuki; Kotani, Ryosuke; Maeda, Kazuyuki
2017-05-23
A new 3D metal-organic framework (MOF), in which 2D layers are interlaced to form a 3D architecture, was synthesized by a reaction of Cu(BF4)2 and 1,3-bis(4-pyridyl)propane (bpp) in a water/1-hexanol solvent system, and the crystal structure of the MOF was successfully solved. The MOF is reversibly transformed to a 1D chain MOF, which shows gate adsorption properties. The dynamic transformation gives crystal size reduction resulting in a slight change in CO2 adsorption isotherms. The 1D MOF shows selective adsorption/separation properties on benzene and its analogues with similar sizes and shapes (benzene, toluene, and cyclohexane).
Delay Reduction in Optimized Reversible Multiplier Circuit
Directory of Open Access Journals (Sweden)
Mohammad Assarian
2012-01-01
Full Text Available In this study a novel reversible multiplier is presented. Reversible logic can play a significant role in computer domain. This logic can be applied in quantum computing, optical computing processing, DNA computing, and nanotechnology. One condition for reversibility of a computable model is that the number of input equate with the output. Reversible multiplier circuits are the circuits used frequently in computer system. For this reason, optimization in one reversible multiplier circuit can reduce its volume of hardware on one hand and increases the speed in a reversible system on the other hand. One of the important parameters that optimize a reversible circuit is reduction of delays in performance of the circuit. This paper investigates the performance characteristics of the gates, the circuits and methods of optimizing the performance of reversible multiplier circuits. Results showed that reduction of the reversible circuit layers has lead to improved performance due to the reduction of the propagation delay between input and output period. All the designs are in the nanometric scales.
Yin, Z; Yin, Zhang-qi; Li, Fu-li
2007-01-01
A system consisting of two single-mode cavities spatially separated and connected by an optical fibre and multi two-level atoms trapped in the cavities is considered. If the atoms resonantly and collectively interact with the local cavity fields but there is no direct interaction between the atoms, we show that an ideal quantum state transfer, and highly reliable quantum swap, entangling and controlled-Z gates can be deterministically realized between the distant cavities. We find that the operation of the state-transfer, and swap, entangling and controlled-Z gates can be greatly speeded up as number of the atoms in the cavities increases. We also notice that the effects of spontaneous emission of atoms and photon leakage out of cavity on the quantum processes can also be greatly diminished in the multi-atom case.
Protected gates for topological quantum field theories
Energy Technology Data Exchange (ETDEWEB)
Beverland, Michael E.; Pastawski, Fernando; Preskill, John [Institute for Quantum Information and Matter, California Institute of Technology, Pasadena, California 91125 (United States); Buerschaper, Oliver [Dahlem Center for Complex Quantum Systems, Freie Universität Berlin, 14195 Berlin (Germany); Koenig, Robert [Institute for Advanced Study and Zentrum Mathematik, Technische Universität München, 85748 Garching (Germany); Sijher, Sumit [Institute for Quantum Computing and Department of Applied Mathematics, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada)
2016-02-15
We study restrictions on locality-preserving unitary logical gates for topological quantum codes in two spatial dimensions. A locality-preserving operation is one which maps local operators to local operators — for example, a constant-depth quantum circuit of geometrically local gates, or evolution for a constant time governed by a geometrically local bounded-strength Hamiltonian. Locality-preserving logical gates of topological codes are intrinsically fault tolerant because spatially localized errors remain localized, and hence sufficiently dilute errors remain correctable. By invoking general properties of two-dimensional topological field theories, we find that the locality-preserving logical gates are severely limited for codes which admit non-abelian anyons, in particular, there are no locality-preserving logical gates on the torus or the sphere with M punctures if the braiding of anyons is computationally universal. Furthermore, for Ising anyons on the M-punctured sphere, locality-preserving gates must be elements of the logical Pauli group. We derive these results by relating logical gates of a topological code to automorphisms of the Verlinde algebra of the corresponding anyon model, and by requiring the logical gates to be compatible with basis changes in the logical Hilbert space arising from local F-moves and the mapping class group.
Parallel Optimization of a Reversible (Quantum) Ripple-Carry Adder
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Axelsen, Holger Bock
2008-01-01
The design of fast arithmetic logic circuits is an important research topic for reversible and quantum computing. A special challenge in this setting is the computation of standard arithmetical functions without the generation of garbage. The CDKM-adder is a recent garbage-less reversible (quantum......(mk). We also show designs for garbage-less reversible set-less-than circuits. We compare the circuit costs of the CDKM and parallel adder in measures of circuit delay, width, gate and transistor count, and find that the parallelized adder offers significant speedups at realistic word sizes with modest...
Kang, YongHa; Kim, JongKyun; Lee, NamHyun; Oh, MinGeon; Hwang, YuChul; Moon, ByungMoo
2016-06-01
The effect of the reverse body bias V SB on the hot-electron-induced punch-through (HEIP) reliability of pMOSFETs with a thin gate dielectric at high temperatures was investigated for the first time. Experimental results indicate that the reverse V SB increased the HEIP degradation for a thin pMOSFET because of the increase in the maximum electric field E m due to the increase in the threshold voltage V th. The sensitivity of HEIP degradation to V SB increased with increasing body effect coefficient γ at a given oxide thickness T ox. However, a thin device (22 Å) showed a much stronger dependence of HEIP degradation on V SB due to the decrease in the velocity saturation length l, although it had a smaller γ than a thick device (60 Å). These new observations suggest that the body bias technique for improving circuit performance can cause a reliability problem of nanoscale pMOSFETs at high temperatures and impose a significant limitation on CMOS device scaling.
Gate complexity using Dynamic Programming
Sridharan, Srinivas; Gu, Mile; James, Matthew R.
2008-01-01
The relationship between efficient quantum gate synthesis and control theory has been a topic of interest in the quantum control literature. Motivated by this work, we describe in the present article how the dynamic programming technique from optimal control may be used for the optimal synthesis of quantum circuits. We demonstrate simulation results on an example system on SU(2), to obtain plots related to the gate complexity and sample paths for different logic gates.
Teslenko, Maxim
2008-01-01
This dissertation is in the area of Computer-Aided Design (CAD) of digital Integrated Circuits (ICs). Today's digital ICs, such as microprocessors, memories, digital signal processors (DSPs), etc., range from a few thousands to billions of logic gates, flip-flops, and other components, packed in a few millimeters of area. The creation of such highly complex systems would not be possible without the use of CAD tools. CAD tools play the key role in determining the area, speed and power consumpt...
Energy Technology Data Exchange (ETDEWEB)
Pluss Contino, J.; Simon Ruiz, J. L.; Hernandez, A.; Menendez Martinez, A.; Yaglian Steiner, E.; Menendez Fernandez, A.; Marcelo Cano, F.
2004-07-01
Frequently physical and chemical alteration that can suffer feed water composition and membranes behaviour of reverse osmosis desalination plants (RODP), define a vague nature system from the point of view of decision make process. In this work, we proposes the utilization of the approximate reasoning associated with the fuzzy logic, as an alternative to approach this problem and to make possible early corrective actions, that is, to do a proactive maintenance with Condition-based maintenance (CBM) technology. (Author) 21 refs.
Energy Technology Data Exchange (ETDEWEB)
Bulsara, Adi R., E-mail: bulsara@spawar.navy.mil [SPAWAR Systems Center Pacific, San Diego, CA 92152-5001 (United States); Dari, Anna, E-mail: adari@asu.edu [Ira A. Fulton School of Engineering, Arizona State University, Tempe, AZ 85287-9309 (United States); Ditto, William L., E-mail: william.ditto@asu.edu [Ira A. Fulton School of Engineering, Arizona State University, Tempe, AZ 85287-9309 (United States); Murali, K., E-mail: kmurali@annauniv.edu [Department of Physics, Anna University, Chennai 600 025 (India); Sinha, Sudeshna, E-mail: sudeshna@imsc.res.in [Institute of Mathematical Sciences, Taramani, Chennai 600 113 (India); Indian Institute of Science Education and Research, Mohali, Transit Campus: MGSIPAP Complex, Sector 26 Chandigarh (India)
2010-10-05
In a recent publication it was shown that, when one drives a two-state system with two square waves as input, the response of the system mirrors a logical output (NOR/OR). The probability of obtaining the correct logic response is controlled by the interplay between the noise-floor and the nonlinearity. As one increases the noise intensity, the probability of the output reflecting a NOR/OR operation increases to unity and then decreases. Varying the nonlinearity (or the thresholds) of the system allows one to morph the output into another logic operation (NAND/AND) whose probability displays analogous behavior. Thus, the outcome of the interplay of nonlinearity and noise is a flexible logic gate with enhanced performance. Here we review this concept of 'Logical Stochastic Resonance' (LSR) and provide details of an electronic circuit system demonstrating LSR. Our proof-of-principle experiment involves a particularly simple realization of a two-state system realized by two adjustable thresholds. We also review CMOS implementations of a simple LSR circuit, and the concatenation of these LSR modules to emulate combinational logic, such as data flip-flop and full adder operations.
Smullyan, Raymond
2008-01-01
This book features a unique approach to the teaching of mathematical logic by putting it in the context of the puzzles and paradoxes of common language and rational thought. It serves as a bridge from the author's puzzle books to his technical writing in the fascinating field of mathematical logic. Using the logic of lying and truth-telling, the author introduces the readers to informal reasoning preparing them for the formal study of symbolic logic, from propositional logic to first-order logic, a subject that has many important applications to philosophy, mathematics, and computer science. T
Design of a reversible single precision floating point subtractor.
Anantha Lakshmi, Av; Sudha, Gf
2014-01-04
In recent years, Reversible logic has emerged as a major area of research due to its ability to reduce the power dissipation which is the main requirement in the low power digital circuit design. It has wide applications like low power CMOS design, Nano-technology, Digital signal processing, Communication, DNA computing and Optical computing. Floating-point operations are needed very frequently in nearly all computing disciplines, and studies have shown floating-point addition/subtraction to be the most used floating-point operation. However, few designs exist on efficient reversible BCD subtractors but no work on reversible floating point subtractor. In this paper, it is proposed to present an efficient reversible single precision floating-point subtractor. The proposed design requires reversible designs of an 8-bit and a 24-bit comparator unit, an 8-bit and a 24-bit subtractor, and a normalization unit. For normalization, a 24-bit Reversible Leading Zero Detector and a 24-bit reversible shift register is implemented to shift the mantissas. To realize a reversible 1-bit comparator, in this paper, two new 3x3 reversible gates are proposed The proposed reversible 1-bit comparator is better and optimized in terms of the number of reversible gates used, the number of transistor count and the number of garbage outputs. The proposed work is analysed in terms of number of reversible gates, garbage outputs, constant inputs and quantum costs. Using these modules, an efficient design of a reversible single precision floating point subtractor is proposed. Proposed circuits have been simulated using Modelsim and synthesized using Xilinx Virtex5vlx30tff665-3. The total on-chip power consumed by the proposed 32-bit reversible floating point subtractor is 0.410 W.
Carrillo-Delgado, C.; García-Gil, C. I.; Trejo-Valdez, M.; Torres-Torres, C.; García-Merino, J. A.; Martínez-Gutiérrez, H.; Khomenko, A. V.; Torres-Martínez, R.
2016-01-01
Measurements of the third-order nonlinear optical properties exhibited by a ZnO thin solid film deposited on a SnO2 substrate are presented. The samples were prepared by a spray pyrolysis processing route. Scanning electron microscopy analysis and UV-Vis spectroscopy studies were carried out. The picosecond response at 1064 nm was explored by the z-scan technique. A large optical Kerr effect with two-photon absorption was obtained. The inhibition of the nonlinear optical absorption together with a noticeable enhancement in the optical Kerr effect in the sample was achieved by the incorporation of Au nanoparticles into the ZnO film. Additionally, a two-wave mixing configuration at 532 nm was performed and an optical Kerr effect was identified as the main cause of the nanosecond third-order optical nonlinearity. The relaxation time of the photothermal response of the sample was estimated to be about 1 s when the sample was excited by nanosecond single-shots. The rotation of the sample during the nanosecond two-wave mixing experiments was analyzed. It was stated that a non-monotonic relation between rotating frequency and pulse repetition rate governs the thermal contribution to the nonlinear refractive index exhibited by a rotating film. Potential applications for switching photothermal interactions in rotating samples can be contemplated. A rotary logic system dependent on Kerr transmittance in a two-wave mixing experiment was proposed.
Kleene, Stephen Cole
2002-01-01
Undergraduate students with no prior instruction in mathematical logic will benefit from this multi-part text. Part I offers an elementary but thorough overview of mathematical logic of 1st order. Part II introduces some of the newer ideas and the more profound results of logical research in the 20th century. 1967 edition.
Parthiban, C.; Elango, Kuppanagounder P.
2017-03-01
An amino-naphthoquione receptor (R1) has been rationally designed, synthesized and characterized using 1H and 13C NMR, LCMS and single crystal X-ray diffraction studies. The receptor exhibits an instantaneous colour change from yellow to blue selectively with Cu(II) ions in water-DMF (98:2% v/v) medium. The results of UV-Vis and fluorescence spectral studies indicates that the mechanism of sensing involves formation of a 1:1 complex between R1 and Cu(II) ion. The proposed mechanism has been confirmed through product analysis using FT-IR, UV-Vis, EPR and HRMS studies in addition to magnetic moment and elemental analysis measurements. The formed [Cu(R1)Cl2] possess a square planar geometry. The binding constant for the interaction of Cu(II) ion with the present unsubstituted quinone is found to be relatively higher than that with quinones containing electron withdrawing chlorine atom and electron releasing methyl group reported in literature. The detection limit of Cu(II) ion in aqueous solution by R1 is observed to be 8.7 nM. The detection of Cu(II) ion by R1 in aqueous solution produces remarkable changes in the electronic and fluorescence spectra, which is applied to construct logic gate at molecular level.
A Type of Low Power Adiabatic Logic Circuit with Cross-coupled Transmission Gate%一种交叉耦合低功耗传输门绝热逻辑电路
Institute of Scientific and Technical Information of China (English)
胡建平; 汪鹏君; 夏银水
2003-01-01
提出了一种新的能量恢复型电路--Transmission Gate Adiabatic Logic(TGAL).该电路由交叉耦合的CMOS传输门完成逻辑运算与能量恢复,对负载的驱动为全绝热过程.TGAL电路输出端始终处于箝位状态,在整个输出期不存在悬空现象并具有良好的信号传输效果.分析了TGAL反相器的能耗,并与静态CMOS电路及部分文献中绝热电路进行了比较.使用TGAL构成门电路与时序系统的实例被演示.应用MOSIS的0.25 μm CMOS工艺参数的模拟结果表明,与传统CMOS和2N-2N2P绝热电路相比,TGAL电路在100 MHz工作频率时分别节省80%与60%以上的功耗.
NAND GATE USING FINFET FOR NANOSCALE TECHNOLOGY
Directory of Open Access Journals (Sweden)
Nirmal,
2010-05-01
Full Text Available In this paper we propose Double gate transistors (FinFETs are the substitutes for bulk CMOS evolving from a single gate devices into three dimensional devices with multiple gates (double gate, triple gate or quadruple-gate devices. The main drawback of using CMOS transistors are high power consumption and high leakage current. Enormous progress has been made to scale transistors to even smaller dimensions to obtain fast switching transistors, as well as to reduce the power consumption. Even though the device characteristics are improved, high active leakage remain a problem. Leakage is found to contribute more amount of total power consumption in power-optimized FinFET logic circuits. This paper mainly deals with the various logic design styles to obtain the Leakage power savings through the judicious use of FinFET logic styles.
Novel Design of a Nano-metric Fast 4*4 Reversible unsigned Wallace Multiplier Circuit
Directory of Open Access Journals (Sweden)
Ehsan PourAliAkbar
2015-12-01
Full Text Available One of the most promising technologies in designing low-power circuits is reversible computing. It is used in nanotechnology, quantum computing, quantum dot cellular automata (QCA, DNA computing, optical computing and in CMOS low-power designs. Since reversible logic is subject to certain restrictions (e.g. fan-out and feedback are not allowed, traditional synthesis methods are not applicable and specific methods have been developed. In this paper, we offer a Wallace 4*4 reversible multiplier circuits which have faster speed and lower complexity in comparison with the other multiplier circuits. This circuit performs better, regarding to the number of gates, garbage outputs and constant inputs work better than the same circuits. In this paper, Peres gate is used as HA and HNG gate is used as FA. We offer the best method to multiply two 4 bit numbers. These Nano-metric circuits can be used in very complex systems.
Quaternary Galois field adder based all-optical multivalued logic circuits.
Chattopadhyay, Tanay; Taraphdar, Chinmoy; Roy, Jitendra Nath
2009-08-01
Galois field (GF) algebraic expressions have been found to be promising choices for reversible and quantum implementation of multivalued logic. For the first time to our knowledge, we developed GF(4) adder multivalued (four valued) logic circuits in an all-optical domain. The principle and possibilities of an all-optical GF(4) adder circuit are described. The theoretical model is presented and verified through numerical simulation. The quaternary inverter, successor, clockwise cycle, and counterclockwise cycle gates are proposed with the help of the all-optical GF(4) adder circuit. In this scheme different quaternary logical states are represented by different polarized light. A terahertz optical asymmetric demultiplexer interferometric switch plays an important role in this scheme.
Quaternary Logic and Applications Using Multiple Quantum Well Based SWSFETs
Directory of Open Access Journals (Sweden)
P. Gogna
2012-11-01
Full Text Available This paper presents Spatial Wavefunction-Switched Field-Effect Transistors (SWSFET to implement efficient quaternary logic and arithmetic functions. Various quaternary logic gates and digital building blocks are presented using SWSFETs. In addition, arithmetic operation with full adder using novel logic algebra is also presented. The SWSFET based implementation of digital logic, cache and arithmetic block results in up to 75% reduction in transistor count and up to 50% reduction in data interconnect densities. Simulations of quaternary logic gates using the BSIM equivalent models for SWSFET channels are also described.
Adiabatic quantum gates and Boolean functions
Energy Technology Data Exchange (ETDEWEB)
Andrecut, M; Ali, M K [Department of Physics, University of Lethbridge, Lethbridge, AB, T1K 3M4 (Canada)
2004-06-25
We discuss the logical implementation of quantum gates and Boolean functions in the framework of quantum adiabatic method, which uses the language of ground states, spectral gaps and Hamiltonians instead of the standard unitary transformation language. (letter to the editor)
Low Power Reversible Parallel Binary Adder/Subtractor
Directory of Open Access Journals (Sweden)
Rangaraju H G
2010-09-01
Full Text Available In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computing. Reversibility plays an important role when energy efficient computations are considered. In this paper, Reversible eight-bit Parallel Binary Adder/Subtractor with Design I, Design II and Design III are proposed. In all the three design approaches, the full Adder and Subtractors are realized in a single unit as compared to only full Subtractor in the existing design. The performance analysis is verified using number reversible gates, Garbage input/outputs and Quantum Cost. It is observed that Reversible eight-bit Parallel Binary Adder/Subtractor with Design III is efficient compared to Design I, Design II and existing design
Low Power Reversible Parallel Binary Adder/Subtractor
Rangaraju, H G; Muralidhara, K N; Raja, K B; 10.5121/vlsic.2010.1303
2010-01-01
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computing. Reversibility plays an important role when energy efficient computations are considered. In this paper, Reversible eight-bit Parallel Binary Adder/Subtractor with Design I, Design II and Design III are proposed. In all the three design approaches, the full Adder and Subtractors are realized in a single unit as compared to only full Subtractor in the existing design. The performance analysis is verified using number reversible gates, Garbage input/outputs and Quantum Cost. It is observed that Reversible eight-bit Parallel Binary Adder/Subtractor with Design III is efficient compared to Design I, Design II and existing design.
Low Power Reversible Parallel Binary Adder/Subtractor
Directory of Open Access Journals (Sweden)
Muralidhara K N
2010-09-01
Full Text Available In recent years, Reversible Logic is becoming more and more prominent technology having its applications inLow Power CMOS, Quantum Computing, Nanotechnology, and Optical Computing. Reversibility plays animportant role when energy efficient computations are considered. In this paper, Reversible eight-bit ParallelBinary Adder/Subtractor with Design I, Design II and Design III are proposed. In all the three designapproaches, the full Adder and Subtractors are realized in a single unit as compared to only full Subtractorin the existing design. The performance analysis is verified using number reversible gates, Garbageinput/outputs and Quantum Cost. It is observed that Reversible eight-bit Parallel Binary Adder/Subtractorwith Design III is efficient compared to Design I, Design II and existing design
Whitfield, J D; Biamonte, J D
2012-01-01
Designing and optimizing cost functions and energy landscapes is a problem encountered in many fields of science and engineering. These landscapes and cost functions can be embedded and annealed in experimentally controllable spin Hamiltonians. Using an approach based on group theory and symmetries, we examine the embedding of Boolean logic gates into the ground state subspace of such spin systems. We describe parameterized families of diagonal Hamiltonians and symmetry operations which preserve the ground state subspace encoding the truth tables of Boolean formulas. The ground state embeddings of adder circuits are used to illustrate how gates are combined and simplified using symmetry. Our work is relevant for experimental demonstrations of ground state embeddings found in both classical optimization as well as adiabatic quantum optimization.
Exact Synthesis of Reversible Circuits Using A* Algorithm
Datta, K.; Rathi, G. K.; Sengupta, I.; Rahaman, H.
2014-07-01
With the growing emphasis on low-power design methodologies, and the result that theoretical zero power dissipation is possible only if computations are information lossless, design and synthesis of reversible logic circuits have become very important in recent years. Reversible logic circuits are also important in the context of quantum computing, where the basic operations are reversible in nature. Several synthesis methodologies for reversible circuits have been reported. Some of these methods are termed as exact, where the motivation is to get the minimum-gate realization for a given reversible function. These methods are computationally very intensive, and are able to synthesize only very small functions. There are other methods based on function transformations or higher-level representation of functions like binary decision diagrams or exclusive-or sum-of-products, that are able to handle much larger circuits without any guarantee of optimality or near-optimality. Design of exact synthesis algorithms is interesting in this context, because they set some kind of benchmarks against which other methods can be compared. This paper proposes an exact synthesis approach based on an iterative deepening version of the A* algorithm using the multiple-control Toffoli gate library. Experimental results are presented with comparisons with other exact and some heuristic based synthesis approaches.
Superconductive combinational logic circuit using magnetically coupled SQUID array
Energy Technology Data Exchange (ETDEWEB)
Yamanashi, Y., E-mail: yamanasi@ynu.ac.j [Interdisciplinary Research Center, Yokohama National University, Tokiwadai 79-5, Hodogaya-ku, Yokohama 240-8501 (Japan); Umeda, K.; Sai, K. [Department of Electrical and Computer Engineering, Yokohama National University, Tokiwadai 79-5, Hodogaya-ku, Yokohama 240-8501 (Japan)
2010-11-01
In this paper, we propose the development of superconductive combinational logic circuits. One of the difficulties in designing superconductive single-flux-quantum (SFQ) digital circuits can be attributed to the fundamental nature of the SFQ circuits, in which all logic gates have latching functions and are based on sequential logic. The design of ultralow-power superconductive digital circuits can be facilitated by the development of superconductive combinational logic circuits in which the output is a function of only the present input. This is because superconductive combinational logic circuits do not require determination of the timing adjustment and clocking scheme. Moreover, semiconductor design tools can be used to design digital circuits because CMOS logic gates are based on combinational logic. The proposed superconductive combinational logic circuits comprise a magnetically coupled SQUID array. By adjusting the circuit parameters and coupling strengths between neighboring SQUIDs, fundamental combinational logic gates, including the AND, OR, and NOT gates, can be built. We have verified the accuracy of the operations of the fundamental logic gates by analog circuit simulations.
Tugué, Tosiyuki; Slaman, Theodore
1989-01-01
These proceedings include the papers presented at the logic meeting held at the Research Institute for Mathematical Sciences, Kyoto University, in the summer of 1987. The meeting mainly covered the current research in various areas of mathematical logic and its applications in Japan. Several lectures were also presented by logicians from other countries, who visited Japan in the summer of 1987.
Model of biological quantum logic in DNA.
Mihelic, F Matthew
2013-08-02
The DNA molecule has properties that allow it to act as a quantum logic processor. It has been demonstrated that there is coherent conduction of electrons longitudinally along the DNA molecule through pi stacking interactions of the aromatic nucleotide bases, and it has also been demonstrated that electrons moving longitudinally along the DNA molecule are subject to a very efficient electron spin filtering effect as the helicity of the DNA molecule interacts with the spin of the electron. This means that, in DNA, electrons are coherently conducted along a very efficient spin filter. Coherent electron spin is held in a logically and thermodynamically reversible chiral symmetry between the C2-endo and C3-endo enantiomers of the deoxyribose moiety in each nucleotide, which enables each nucleotide to function as a quantum gate. The symmetry break that provides for quantum decision in the system is determined by the spin direction of an electron that has an orbital angular momentum that is sufficient to overcome the energy barrier of the double well potential separating the C2-endo and C3-endo enantiomers, and that enantiomeric energy barrier is appropriate to the Landauer limit of the energy necessary to randomize one bit of information.
Model of Biological Quantum Logic in DNA
Directory of Open Access Journals (Sweden)
F. Matthew Mihelic
2013-08-01
Full Text Available The DNA molecule has properties that allow it to act as a quantum logic processor. It has been demonstrated that there is coherent conduction of electrons longitudinally along the DNA molecule through pi stacking interactions of the aromatic nucleotide bases, and it has also been demonstrated that electrons moving longitudinally along the DNA molecule are subject to a very efficient electron spin filtering effect as the helicity of the DNA molecule interacts with the spin of the electron. This means that, in DNA, electrons are coherently conducted along a very efficient spin filter. Coherent electron spin is held in a logically and thermodynamically reversible chiral symmetry between the C2-endo and C3-endo enantiomers of the deoxyribose moiety in each nucleotide, which enables each nucleotide to function as a quantum gate. The symmetry break that provides for quantum decision in the system is determined by the spin direction of an electron that has an orbital angular momentum that is sufficient to overcome the energy barrier of the double well potential separating the C2-endo and C3-endo enantiomers, and that enantiomeric energy barrier is appropriate to the Landauer limit of the energy necessary to randomize one bit of information.
Nanoeletromechanical switch and logic circuits formed therefrom
Nordquist, Christopher D [Albuquerque, NM; Czaplewski, David A [Albuquerque, NM
2010-05-18
A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.
Instantaneous, non-squeezed, noise-based logic
Peper, Ferdinand
2010-01-01
Noise-based logic, by utilizing its multidimensional logic hyperspace, has significant potential for low-power parallel operations in beyond-Moore-chips. However universal gates for Boolean logic thus far had to rely on either time averaging to distinguish signals from each other or, alternatively, on squeezed logic signals, where the logic-high was represented by a random process and the logic-low was a zero signal. A major setback is that squeezed logic variables are unable to work in the hyperspace, because the logic-low zero value sets the hyperspace product vector to zero. This paper proposes Boolean universal logic gates that alleviate such shortcomings. They are able to work with non-squeezed logic values where both the high and low values are encoded into nonzero, bipolar, independent random telegraph waves. Non-squeezed universal Boolean logic gates for spike-based brain logic are also shown. The advantages vs. disadvantages of the two logic types are compared.
Programmable Potentials: Approximate N-body potentials from coarse-level logic
Thakur, Gunjan S.; Mohr, Ryan; Mezić, Igor
2016-09-01
This paper gives a systematic method for constructing an N-body potential, approximating the true potential, that accurately captures meso-scale behavior of the chemical or biological system using pairwise potentials coming from experimental data or ab initio methods. The meso-scale behavior is translated into logic rules for the dynamics. Each pairwise potential has an associated logic function that is constructed using the logic rules, a class of elementary logic functions, and AND, OR, and NOT gates. The effect of each logic function is to turn its associated potential on and off. The N-body potential is constructed as linear combination of the pairwise potentials, where the “coefficients” of the potentials are smoothed versions of the associated logic functions. These potentials allow a potentially low-dimensional description of complex processes while still accurately capturing the relevant physics at the meso-scale. We present the proposed formalism to construct coarse-grained potential models for three examples: an inhibitor molecular system, bond breaking in chemical reactions, and DNA transcription from biology. The method can potentially be used in reverse for design of molecular processes by specifying properties of molecules that can carry them out.
2014-10-03
that must be woven into proofs of security statements. 03-10-2014 Memorandum Report Logic System-on-a-Chip Distributed systems 9888 ASDR&EAssistant...can be removed without damaging the logic. For all propositional letters p, E1. p ⊃ [r] p From now on, a distributed logic contains at least the...a ∈ x iff 〈h〉 ∈ x. These same definitions work for the canonical relation R for r : h y k where now a ∈ MA(k), [r] a, 〈r〉 a ∈ MA(h), x ∈ CF(h), and
Electrostatic control of polarity of α-MoTe2 transistors with dual top gates
Nakaharai, Shu; Yamamoto, Mahito; Ueno, Keiji; Lin, Yen-Fu; Li, Song-Lin; Tsukagoshi, Kazuhito
2015-03-01
Transition metal dichalcogenides have been expected for future applications in nanoelectronics due to their unique features of the atomically-thin structure. Using semiconducting α-molybdenum ditelluride (α-MoTe2) , we realized field effect transistors (FETs) in which the polarity (n- or p-type) can be electrostatically controlled without impurity doping. The fabricated device had a pair of top gates (aluminum electrode on silicon dioxide) attached in series with a gap length of 100 nm in between. We experimentally performed transistor operations in both n-FET and p-FET modes in a single device by changing the voltage applied to one of the two top gates, which determined the transistor polarity, and sweeping the bias of the other gate. The demonstrated reversibility of the transistor polarity will contribute to the renovated architecture of logic circuits with lower numbers of transistors and hence the lower power consumption than the conventional technology.
All-optical integrated logic operations based on chemical communication between molecular switches.
Silvi, Serena; Constable, Edwin C; Housecroft, Catherine E; Beves, Jonathon E; Dunphy, Emma L; Tomasulo, Massimiliano; Raymo, Françisco M; Credi, Alberto
2009-01-01
Molecular logic gates process physical or chemical "inputs" to generate "outputs" based on a set of logical operators. We report the design and operation of a chemical ensemble in solution that behaves as integrated AND, OR, and XNOR gates with optical input and output signals. The ensemble is composed of a reversible merocyanine-type photoacid and a ruthenium polypyridine complex that functions as a pH-controlled three-state luminescent switch. The light-triggered release of protons from the photoacid is used to control the state of the transition-metal complex. Therefore, the two molecular switching devices communicate with one another through the exchange of ionic signals. By means of such a double (optical-chemical-optical) signal-transduction mechanism, inputs of violet light modulate a luminescence output in the red/far-red region of the visible spectrum. Nondestructive reading is guaranteed because the green light used for excitation in the photoluminescence experiments does not affect the state of the gate. The reset is thermally driven and, thus, does not involve the addition of chemicals and accumulation of byproducts. Owing to its reversibility and stability, this molecular device can afford many cycles of digital operation.
Magnetic tunnel junction based spintronic logic devices
Lyle, Andrew Paul
The International Technology Roadmap for Semiconductors (ITRS) predicts that complimentary metal oxide semiconductor (CMOS) based technologies will hit their last generation on or near the 16 nm node, which we expect to reach by the year 2025. Thus future advances in computational power will not be realized from ever-shrinking device sizes, but rather by 'outside the box' designs and new physics, including molecular or DNA based computation, organics, magnonics, or spintronic. This dissertation investigates magnetic logic devices for post-CMOS computation. Three different architectures were studied, each relying on a different magnetic mechanism to compute logic functions. Each design has it benefits and challenges that must be overcome. This dissertation focuses on pushing each design from the drawing board to a realistic logic technology. The first logic architecture is based on electrically connected magnetic tunnel junctions (MTJs) that allow direct communication between elements without intermediate sensing amplifiers. Two and three input logic gates, which consist of two and three MTJs connected in parallel, respectively were fabricated and are compared. The direct communication is realized by electrically connecting the output in series with the input and applying voltage across the series connections. The logic gates rely on the fact that a change in resistance at the input modulates the voltage that is needed to supply the critical current for spin transfer torque switching the output. The change in resistance at the input resulted in a voltage margin of 50--200 mV and 250--300 mV for the closest input states for the three and two input designs, respectively. The two input logic gate realizes the AND, NAND, NOR, and OR logic functions. The three input logic function realizes the Majority, AND, NAND, NOR, and OR logic operations. The second logic architecture utilizes magnetostatically coupled nanomagnets to compute logic functions, which is the basis of
High Speed Boosted Cmos Differential Logic for Ripple Carry Adders
Directory of Open Access Journals (Sweden)
Meenu Roy,
2014-01-01
Full Text Available This paper describes a high speed boosted CMOS differential logic which is applicable in Ripple Carry Adders. The proposed logic operating with supply voltage approaching the MOS threshold voltage. The logic style improves switching speed by boosting the gate-source voltage of transistors along timing critical signal path. It allows a single boosting circuit to be shared by complementary outputs as a result the area overhead also minimizes. As compared to the conventional logic gates the EDP (energy delay product is improved. The test sets of logic gates and adders where designed in tsmc0.18μm of Mentor Graphics EDA tool. The experimental result for Ripple Carry Adders using the proposed logic style revealed that the addition time is reduced as compared with the conventional CMOS circuits.
Lengyel, Florian
2012-01-01
We define Denial Logic DL, a system of justification logic that models an agent whose justified beliefs are false, who cannot avow his own propositional attitudes and who can believe contradictions but not tautologies of classical propositional logic. Using Artemov's natural semantics for justification logic JL, in which justifications are interpreted as sets of formulas, we provide an inductive construction of models of DL, and prove soundness and completeness results for DL. Some logical notions developed for JL, such as constant specifications and the internalization property, are inconsistent with DL. This leads us to define negative constant specifications for DL, which can be used to model agents with justified false beliefs. Denial logic can therefore be relevant to philosophical skepticism. We use DL with what we call coherent negative constant specifications to model a Putnamian brain in a vat with the justified false belief that it is not a brain in a vat, and derive a model of JL in which "I am a b...
LOGIC DEVICES, *OPTICAL CIRCUITS, *OPTICAL SWITCHING, HETEROJUNCTIONS, PHOTOTRANSISTORS, ELECTROOPTICS, LASER CAVITIES, OPTICAL PROCESSING, PARALLEL PROCESSING, BISTABLE DEVICES, GATES(CIRCUITS), VOLTAGE, BINARY ARITHMETIC .
Exploring Quantum Dot Cellular Automata Based Reversible Circuit
Directory of Open Access Journals (Sweden)
Saroj Kumar Chandra
2012-03-01
Full Text Available Quantum-dot Cellular Automata (QCA is a new technology for development of logic circuits based on nanotechnology, and it is an one of the alternative for designing high performance computing over existing CMOS technology. The basic logic in QCA does not use voltage level for logic representation rather it represent binary state by polarization of electrons on the Quantum Cell which is basic building block of QCA. Extensive work is going on QCA for circuit design due to low power consumption and regularity in the circuit.. Clocking is used in QCA circuit to synchronize and control the information flow and to provide the power to run the circuit. Reversible logic design is a well-known paradigm in digital computation, and if circuit developed is reversible then it consumes very low power . Here, in this paper we are presenting a Reversible Universal Gate (RUG based on Quantum-dot Cellular Automata (QCA. The RUG implemented by QCA Designer tool and also its behavior is simulated by it.
Exploring Quantum Dot Cellular Automata Based Reversible Circuit
Directory of Open Access Journals (Sweden)
Saroj Kumar Chandra
2012-03-01
Full Text Available Quantum-dot Cellular Automata (QCA is a new technology for development of logic circuits based on nanotechnology, and it is an one of the alternative for designing high performance computing over existing CMOS technology. The basic logic in QCA does not use voltage level for logic representation rather it represent binary state by polarization of electrons on the Quantum Cell which is basic building block of QCA. Extensive work is going on QCA for circuit design due to low power consumption and regularity in the circuit.. Clocking is used in QCA circuit to synchronize and control the information flow and to provide the power to run the circuit. Reversible logic design is a well-known paradigm in digital computation, and if circuit developed is reversible then it consumes very low power. Here, in this paper we are presenting a Reversible Universal Gate (RUG based on Quantum-dot Cellular Automata (QCA. The RUG implemented by QCA Designer tool and also its behavior is simulated by it.
Realization of Two-Qutrit Quantum Gates with Control Pulses
Institute of Scientific and Technical Information of China (English)
ZHANG Jie; DI Yao-Min; WEI Hai-Rui
2009-01-01
We investigate the realization of 2-qutrit logic gate in a bipartite 3-level system with qusi-Ising interaction. On the basis of Caftan decomposition of matrices, the unitary matrices of 2-qutrit are factorized into products of a series of realizable matrices. It is equivalent to exerting a certain control field on the system, and the control goal is usually gained by a sequence of control pulses. The general discussion on the realization of 2-qutrit logic gate is made first, and then the realization of the ternary SWAP gate and the ternary gate are discussed specifically, and the sequences of control pulses and drift processes implementing these gates are given.
Experimental demonstration of an all-optical fiber-based Fredkin gate.
Kostinski, Natalie; Fok, Mable P; Prucnal, Paul R
2009-09-15
We propose and report on what we believe to be the first experimental demonstration of an all-optical fiber-based Fredkin gate for reversible digital logic. The simple 3-input/3-output fiber-based nonlinear optical loop mirror architecture requires only minor alignment for full operation. A short nonlinear element, heavily doped GeO(2) fiber (HDF), allows for a more compact design than typical nonlinear fiber gates. The HDF is ideal for studying reversibility, functioning as a noise-limited medium, as compared to the semiconductor optical amplifier, while allowing for cross-phase modulation, a nondissipative optical interaction. We suggest applications for secure communications, based on "cool" computing.
DEFF Research Database (Denmark)
Braüner, Torben
2011-01-01
Intuitionistic hybrid logic is hybrid modal logic over an intuitionistic logic basis instead of a classical logical basis. In this short paper we introduce intuitionistic hybrid logic and we give a survey of work in the area.......Intuitionistic hybrid logic is hybrid modal logic over an intuitionistic logic basis instead of a classical logical basis. In this short paper we introduce intuitionistic hybrid logic and we give a survey of work in the area....
Institute of Scientific and Technical Information of China (English)
Hongsheng QI; Daizhan CHENG
2008-01-01
This paper gives a matrix expression of logic. Under the matrix expression, a general description of the logical operators is proposed. Using the semi-tensor product of matrices, the proofs of logical equivalences, implications, etc., can be simplified a lot. Certain general properties are revealed. Then, based on matrix expression, the logical operators are extended to multi-valued logic, which provides a foundation for fuzzy logical inference. Finally, we propose a new type of logic, called mix-valued logic, and a new design technique, called logic-based fuzzy control. They provide a numerically computable framework for the application of fuzzy logic for the control of fuzzy systems.
Lambson, Brian; Carlton, David; Bokor, Jeffrey
2011-07-01
Nanomagnetic memory and logic circuits are attractive integrated platforms for studying the fundamental thermodynamic limits of computation. Using the stochastic Landau-Lifshitz-Gilbert equation, we show by direct calculation that the amount of energy dissipated during nanomagnet erasure approaches Landauer’s thermodynamic limit of kTln(2) with high precision when the external magnetic fields are applied slowly. In addition, we find that nanomagnet systems behave according to generalized formulations of Landauer’s principle that hold for small systems and generic logic operations. In all cases, the results are independent of the anisotropy energy of the nanomagnet. Lastly, we apply our computational approach to a nanomagnet majority logic gate, where we find that dissipationless, reversible computation can be achieved when the magnetic fields are applied in the appropriate order.
Tavallali, Hossein; Deilamy-Rad, Gohar; Parhami, Abolfath; Hasanli, Nahid
2015-03-15
In this paper we manifest a novel rhodamine B (RhB) based colorimetric chemosensor for molybdenum and citrate ions (Cit(3-)) in an absolutely aqueous media. It has been identified as highly sensitive probe for Mo(6+) which responds at 4.0 nmol L(-1) concentration levels. RhB while combined with Mo(6+) in aqueous solution displays a color changing from pink to purple which could be quickly dissociated by the addition of citrate in this system so that reversible color changes from purple to pink can be achieved. The comparison of this method with some other methods for citrate indicates that this is the only method which can detect citrate in aqueous solution by color changes. This chemosensor can be applied for quantification of citrate with a linear range covering from 1.67×10(-7) to 1.22×10(-5) M and a detection limit of 2.0×10(-8) M. Moreover, the response of the chemosensor toward Mo(6+) and citrate is fast. In addition, based on above sensing mechanism, an IMPLICATION logic operation can be achieved using Mo(6+) ion and Cit(3-) as the inputs, making RhB a promising candidate for further applications in molecular logic devices and also indicates that RhB is suitable for the detection of Mo(6+) and Cit(3-) ions in real samples. Copyright © 2014 Elsevier B.V. All rights reserved.
Patel, Raj B; Ho, Joseph; Ferreyrol, Franck; Ralph, Timothy C; Pryde, Geoff J
2016-03-01
Minimizing the resources required to build logic gates into useful processing circuits is key to realizing quantum computers. Although the salient features of a quantum computer have been shown in proof-of-principle experiments, difficulties in scaling quantum systems have made more complex operations intractable. This is exemplified in the classical Fredkin (controlled-SWAP) gate for which, despite theoretical proposals, no quantum analog has been realized. By adding control to the SWAP unitary, we use photonic qubit logic to demonstrate the first quantum Fredkin gate, which promises many applications in quantum information and measurement. We implement example algorithms and generate the highest-fidelity three-photon Greenberger-Horne-Zeilinger states to date. The technique we use allows one to add a control operation to a black-box unitary, something that is impossible in the standard circuit model. Our experiment represents the first use of this technique to control a two-qubit operation and paves the way for larger controlled circuits to be realized efficiently.
Zadeh, Lofti A.
1988-01-01
The author presents a condensed exposition of some basic ideas underlying fuzzy logic and describes some representative applications. The discussion covers basic principles; meaning representation and inference; basic rules of inference; and the linguistic variable and its application to fuzzy control.
Fault Analysis-based Logic Encryption (Preprint)
2013-11-01
design industry is making it easy for rogue elements in the supply chain to pirate ICs, overbuild ICs, and insert hardware trojans . Due to supply...TERMS Hardware Trojan , Reverse Engineering, Logic Reconfiguration, Logic Obfuscation, Logic Encryption 16. SECURITY CLASSIFICATION OF: 17...industry is making it easy for rogue elements in the supply chain to pirate ICs, overbuild ICs, and insert hardware trojans . Due to supply chain
Institute of Scientific and Technical Information of China (English)
王友仁; 沈先坤; 周影辉
2014-01-01
可逆逻辑作为量子计算，纳米技术，低功耗设计等新兴技术的基础，近年来得到了越来越多的关注和研究。然而，大多数可逆逻辑综合方法对函数真值表表达形式的依赖使得综合电路规模受到了限制。决策图作为一种更加简洁的布尔函数表示方法，其为可逆逻辑综合提供了另一种途径。本文基于Kronecker函数决策图（KFDD ）提出了一种适合于综合大规模电路的综合方法。该方法利用KFDD描述功能函数，以局部最优的方式从三种节点分解方法中寻找最优分解方法，并根据Kronecker函数决策图中不同类型的节点构建相应的可逆逻辑电路模块，最后将各节点替换电路模块实现级联得到结果电路。以可逆基准电路为例，对该方法进行了验证。实验结果表明，该方法能以较低的代价实现对较大规模函数的可逆逻辑电路综合。%Reversible logic has obtained more and more attention and research as the basis for several emerging technologies such as quantum computing ,nanotechnologies and low-power design .However ,currently most synthesis algorithms for reversible circuits suffer from being restricted to deal with relatively small functions only ,since they rely on a truth table representation of the function to be synthesized .Decision Diagram serving as a more compact Boolean function description provides anther way to synthe-sis of reversible logic .Here ,a synthesis approach based on Kronecker Functional Decision Diagram (KFDD) is proposed ,that gen-erates KFDD for a logic function by means of choosing the local optimal one from three alternative node decomposition types .Final-ly ,the result circuit can be produced by substituting all nodes of the KFDD with circuit modules and cascading them .Verified by re-versible benchmarks ,experiments show the adaption of the proposed approach to large functions with better results .
Evaluating logic functionality of cascaded fracturable LUTs
Institute of Scientific and Technical Information of China (English)
GUO Zhenhong; LIN Yu; LI Tianyi; JIA Rui; GAO Tongqiang; YANG Haigang
2016-01-01
Look Up Tables(LUTs) are the key components of Field-Programmable Gate Arrays(FPGAs). Many LUT architectures have been studied; nevertheless, it is difficult to quantificationally evaluate an LUT based architecture. Traditionally, dedicated efforts on specific modifications to the technology mapping tools are required for LUT architecture evaluation. A more feasible evaluation method for logic functionality is strongly required for the design of LUT architecture. In this paper, a mathematical method for logic functionality calculation is proposed and conventional and fracturable LUT architectures are analyzed. Furthermore, a cascaded fracturable LUT architecture is presented, which achieves twice logic functionality compared with the conventional LUTs and fracturable LUTs.
Application of fast-moving magnetic-flux-quanta in constructing an AND gate and an OR gate
Energy Technology Data Exchange (ETDEWEB)
Jung, K. R. [Korea Photonics Technology Institute, Gwangju (Korea, Republic of); Kang, J. H. [University of Incheon, Incheon (Korea, Republic of)
2004-08-15
In developing an arithmetic logic unit (ALU) with new electronic devices, constructing an OR gate and an AND gate is crucial. In this work, we have designed, fabricated, and tested an OR gate and an AND gate by using rapid single flux quantum (RSFQ) logic. We constructed an AND gate with two D flip-flops and an OR gate with the combination of a confluence buffer and a D flip-flop. The role of the D flip-flop in an OR gate is to output the data when clocked. DC/SFQ circuits were used to generate data and clock pulses in testing the gates. Outputs were read with RS flip-flop type readout circuits and displayed on an oscilloscope. Input frequencies of 10 kHz and 1 MHz were used in this work. We observed correct operations of the gates. The bandwidth of the oscilloscope limited the maximum frequency of our measurements. The logic gates themselves could operate at tens of GHz. We measured the bias margins of the D flip-flop and the confluence buffer of the OR gate, and their values were +-39% and +-23 %, respectively. We also measured the operation margin of the AND gate to be +-25 %. The circuit was measured at liquid-helium temperature.
CMAT non-volatile spintronic computing: complementary MTJ logic
Friedman, Joseph S.
2016-10-01
Magnetic tunnel junctions (MTJs) have thoroughly demonstrated their utility as a non-volatile memory storage element, inspiring their application to a memory-in-logic computer that would overcome the von Neumann bottleneck. However, MTJ logic gates must be able to cause other MTJs to switch, thus ensuring the cascading capability fundamental to efficient computing. Complementary MTJ logic (CMAT) provides a simple circuit structure through which MTJs can be cascaded directly to perform logic operations. In this novel logic family, charge pulses resulting from MTJ switching create magnetic fields that switch other MTJs, providing impetus for further development of MTJs for computing applications.
Institute of Scientific and Technical Information of China (English)
林作铨; 李未
1995-01-01
Parametric logic is introduced. The language, semantics and axiom system of parametric logic are defined. Completeness theorem of parametric logic is provided. Parametric logic has formal ability powerful enough to capture a wide class of logic as its special cases, and therefore can be viewed as a uniform basis for modern logics.
Buried injector logic, a vertical IIL using deep ion implantation
Mouthaan, A.J.
1987-01-01
A vertically integrated alternative for integrated injection logic has been realized, named buried injector logic (BIL). 1 MeV ion implantations are used to create buried layers. The vertical pnp and npn transistors have thin base regions and exhibit a limited charge accumulation if a gate is satura
Zhang, Jingfu; Laflamme, Raymond; Suter, Dieter
2012-09-07
Large-scale universal quantum computing requires the implementation of quantum error correction (QEC). While the implementation of QEC has already been demonstrated for quantum memories, reliable quantum computing requires also the application of nontrivial logical gate operations to the encoded qubits. Here, we present examples of such operations by implementing, in addition to the identity operation, the NOT and the Hadamard gate to a logical qubit encoded in a five qubit system that allows correction of arbitrary single-qubit errors. We perform quantum process tomography of the encoded gate operations, demonstrate the successful correction of all possible single-qubit errors, and measure the fidelity of the encoded logical gate operations.
Reprogammable universal logic device based on mems technology
Hafiz, Md Adbdullah Al
2017-06-15
Various examples of reprogrammable universal logic devices are provided. In one example, the device can include a tunable AC input (206) to an oscillator/resonator; a first logic input and a second logic input to the oscillator/resonator, the first and second logic inputs provided by separate DC voltage sources (VA, VB), each of the first and second logic inputs including an on/off switch (A, B); and the oscillator/resonator including an output terminal (215). The tunable oscillator/resonator can be a MEMS/NEMS resonator. Switching of one or both of the first or second logic inputs on or off in association with the tuning of the AC input (206) can provide logic gate operation. The device can easily be extended to a 3-bit or n-bit device by providing additional logic inputs. Binary comparators and encoders can be implemented using a plurality of oscillators/resonators.
Malcolm, Norman; Altuner, Ilyas
2015-01-01
The paper deals exclusively with the doctrine called ‘Logical Behaviorism’. Although this position does not vogue it enjoyed in the 1930s and 1940s, it will always possess a compelling attraction for anyone who is perplexed by the psychological concepts, who has become aware of worthlessness of an appeal to introspection as an account of how we learn those concepts, and he has no inclination to identify mind with brain. There, of course, are other forms of behaviorism, and of reductionism, wh...
Microscale Digital Vacuum Electronic Gates
Manohara, Harish (Inventor); Mojarradi, Mohammed M. (Inventor)
2014-01-01
Systems and methods in accordance with embodiments of the invention implement microscale digital vacuum electronic gates. In one embodiment, a microscale digital vacuum electronic gate includes: a microscale field emitter that can emit electrons and that is a microscale cathode; and a microscale anode; where the microscale field emitter and the microscale anode are disposed within at least a partial vacuum; where the microscale field emitter and the microscale anode are separated by a gap; and where the potential difference between the microscale field emitter and the microscale anode is controllable such that the flow of electrons between the microscale field emitter and the microscale anode is thereby controllable; where when the microscale anode receives a flow of electrons, a first logic state is defined; and where when the microscale anode does not receive a flow of electrons, a second logic state is defined.
Coherent spaces, Boolean rings and quantum gates
Vourdas, A.
2016-10-01
Coherent spaces spanned by a finite number of coherent states, are introduced. Their coherence properties are studied, using the Dirac contour representation. It is shown that the corresponding projectors resolve the identity, and that they transform into projectors of the same type, under displacement transformations, and also under time evolution. The set of these spaces, with the logical OR and AND operations is a distributive lattice, and with the logical XOR and AND operations is a Boolean ring (Stone's formalism). Applications of this Boolean ring into classical CNOT gates with n-ary variables, and also quantum CNOT gates with coherent states, are discussed.
Subnanowatt carbon nanotube complementary logic enabled by threshold voltage control.
Geier, Michael L; Prabhumirashi, Pradyumna L; McMorrow, Julian J; Xu, Weichao; Seo, Jung-Woo T; Everaerts, Ken; Kim, Chris H; Marks, Tobin J; Hersam, Mark C
2013-10-09
In this Letter, we demonstrate thin-film single-walled carbon nanotube (SWCNT) complementary metal-oxide-semiconductor (CMOS) logic devices with subnanowatt static power consumption and full rail-to-rail voltage transfer characteristics as is required for logic gate cascading. These results are enabled by a local metal gate structure that achieves enhancement-mode p-type and n-type SWCNT thin-film transistors (TFTs) with widely separated and symmetric threshold voltages. These complementary SWCNT TFTs are integrated to demonstrate CMOS inverter, NAND, and NOR logic gates at supply voltages as low as 0.8 V with ideal rail-to-rail operation, subnanowatt static power consumption, high gain, and excellent noise immunity. This work provides a direct pathway for solution processable, large area, power efficient SWCNT advanced logic circuits and systems.
Reconfigurable Boolean Logic Using Magnetic Single-Electron Transistors
Gonzalez-Zalba, M. Fernando; Ciccarelli, Chiara; Zarbo, Liviu P.; Irvine, Andrew C.; Campion, Richard C.; Gallagher, Bryan L.; Jungwirth, Tomas; Ferguson, Andrew J.; Wunderlich, Joerg
2015-01-01
We propose a novel hybrid single-electron device for reprogrammable low-power logic operations, the magnetic single-electron transistor (MSET). The device consists of an aluminium single-electron transistor with a GaMnAs magnetic back-gate. Changing between different logic gate functions is realized by reorienting the magnetic moments of the magnetic layer, which induces a voltage shift on the Coulomb blockade oscillations of the MSET. We show that we can arbitrarily reprogram the function of the device from an n-type SET for in-plane magnetization of the GaMnAs layer to p-type SET for out-of-plane magnetization orientation. Moreover, we demonstrate a set of reprogrammable Boolean gates and its logical complement at the single device level. Finally, we propose two sets of reconfigurable binary gates using combinations of two MSETs in a pull-down network. PMID:25923789
Biofuel cell controlled by enzyme logic network--approaching physiologically regulated devices.
Tam, Tsz Kin; Pita, Marcos; Ornatska, Maryna; Katz, Evgeny
2009-09-01
A "smart" biofuel cell switchable ON and OFF upon application of several chemical signals processed by an enzyme logic network was designed. The biocomputing system performing logic operations on the input signals was composed of four enzymes: alcohol dehydrogenase (ADH), amyloglucosidase (AGS), invertase (INV) and glucose dehydrogenase (GDH). These enzymes were activated by different combinations of chemical input signals: NADH, acetaldehyde, maltose and sucrose. The sequence of biochemical reactions catalyzed by the enzymes models a logic network composed of concatenated AND/OR gates. Upon application of specific "successful" patterns of the chemical input signals, the cascade of biochemical reactions resulted in the formation of gluconic acid, thus producing acidic pH in the solution. This resulted in the activation of a pH-sensitive redox-polymer-modified cathode in the biofuel cell, thus, switching ON the entire cell and dramatically increasing its power output. Application of another chemical signal (urea in the presence of urease) resulted in the return to the initial neutral pH value, when the O(2)-reducing cathode and the entire cell are in the mute state. The reversible activation-inactivation of the biofuel cell was controlled by the enzymatic reactions logically processing a number of chemical input signals applied in different combinations. The studied biofuel cell exemplifies a new kind of bioelectronic device where the bioelectronic function is controlled by a biocomputing system. Such devices will provide a new dimension in bioelectronics and biocomputing benefiting from the integration of both concepts.
DEFF Research Database (Denmark)
Modal logic is a subject with ancient roots in the western logical tradition. Up until the last few generations, it was pursued mainly as a branch of philosophy. But in recent years, the subject has taken new directions with connections to topics in computer science and mathematics. This volume...... is the proceedings of the conference of record in its fi eld, Advances in Modal Logic. Its contributions are state-of-the-art papers. The topics include decidability and complexity results for specifi c modal logics, proof theory of modal logic, logics for reasoning about time and space, provability logic, dynamic...... epistemic logic, and the logic of evidence....
Efficient G(sup 4)FET-Based Logic Circuits
Vatan, Farrokh
2008-01-01
A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.
Carlton, David Bryan
The exponential improvements in speed, energy efficiency, and cost that the computer industry has relied on for growth during the last 50 years are in danger of ending within the decade. These improvements all have relied on scaling the size of the silicon-based transistor that is at the heart of every modern CPU down to smaller and smaller length scales. However, as the size of the transistor reaches scales that are measured in the number of atoms that make it up, it is clear that this scaling cannot continue forever. As a result of this, there has been a great deal of research effort directed at the search for the next device that will continue to power the growth of the computer industry. However, due to the billions of dollars of investment that conventional silicon transistors have received over the years, it is unlikely that a technology will emerge that will be able to beat it outright in every performance category. More likely, different devices will possess advantages over conventional transistors for certain applications and uses. One of these emerging computing platforms is nanomagnetic logic (NML). NML-based circuits process information by manipulating the magnetization states of single-domain nanomagnets coupled to their nearest neighbors through magnetic dipole interactions. The state variable is magnetization direction and computations can take place without passing an electric current. This makes them extremely attractive as a replacement for conventional transistor-based computing architectures for certain ultra-low power applications. In most work to date, nanomagnetic logic circuits have used an external magnetic clocking field to reset the system between computations. The clocking field is then subsequently removed very slowly relative to the magnetization dynamics, guiding the nanomagnetic logic circuit adiabatically into its magnetic ground state. In this dissertation, I will discuss the dynamics behind this process and show that it is greatly
Institute of Scientific and Technical Information of China (English)
小雨
2006-01-01
A teacher was giving her pu- pils a lesson on logic(逻辑)．“Here is the situation(情景),”she said,“a man is stand- ing up in a boat in the middle of a river,fishing．He loses his bal- ance(平衡),falls in,and begins splashing(泼水)and yelling(叫喊)for help．His wife hears the commotion(喧闹),knows that he can’t swim,and runs down to the bank (河岸)．Why did she run to the bank?” A girl raised her hand and asked,“To draw out(提取)all of his savings(存款)．”
Institute of Scientific and Technical Information of China (English)
WANG Yi-Min; ZHOU Yan-Li; LIANG Lin-Mei; LI Cheng-Zu
2009-01-01
We propose a feasible scheme to achieve universal quantum gate operations in decoherence-free subspace with superconducting charge qubits placed in a microwave cavity.Single-logic-qubit gates can be realized with cavity assisted interaction, which possesses the advantages of unconventional geometric gate operation.The two-logic-qubit controlled-phase gate between subsystems can be constructed with the help of a variable electrostatic transformer, The collective decoherence can be successfully avoided in our well-designed system.Moreover, GHZ state for logical qubits can also be easily produced in this system.
Design of synthetic biological logic circuits based on evolutionary algorithm.
Chuang, Chia-Hua; Lin, Chun-Liang; Chang, Yen-Chang; Jennawasin, Tanagorn; Chen, Po-Kuei
2013-08-01
The construction of an artificial biological logic circuit using systematic strategy is recognised as one of the most important topics for the development of synthetic biology. In this study, a real-structured genetic algorithm (RSGA), which combines general advantages of the traditional real genetic algorithm with those of the structured genetic algorithm, is proposed to deal with the biological logic circuit design problem. A general model with the cis-regulatory input function and appropriate promoter activity functions is proposed to synthesise a wide variety of fundamental logic gates such as NOT, Buffer, AND, OR, NAND, NOR and XOR. The results obtained can be extended to synthesise advanced combinational and sequential logic circuits by topologically distinct connections. The resulting optimal design of these logic gates and circuits are established via the RSGA. The in silico computer-based modelling technology has been verified showing its great advantages in the purpose.
Technologies for faults diagnosis of FPGA logic blocks
Directory of Open Access Journals (Sweden)
C. U. Ngene
2012-08-01
Full Text Available The critical issues of testing field programmable gate arrays (FPGA with a view to diagnosing faults are an important step that ensures the reliability of FPGA designs. Correct diagnosis of faulty logic blocks of FPGAs guarantees restoration of functionality through replacement of faulty block with replacement units. This process can be done autonomously or without the intervention of an engineer depending on application area. This paper considers two methods for analysing test results of FPGA logic blocks with the purpose of localising and distinguishing faults. The algebraic logic and vector-logical methods are proposed for diagnosing faulty logic blocks in FPGA fabric. It is found that the algebraic logic method is more useful for processing of sparse faults tables when the number of coordinates with 1s values with respect to zero values is not more than 20%, whereas the vector-logical method facilitates the analysis of faults table with predominance of 1s values.
Paraconsistent Computational Logic
DEFF Research Database (Denmark)
Jensen, Andreas Schmidt; Villadsen, Jørgen
2012-01-01
In classical logic everything follows from inconsistency and this makes classical logic problematic in areas of computer science where contradictions seem unavoidable. We describe a many-valued paraconsistent logic, discuss the truth tables and include a small case study....
Doberkat, Ernst-Erich
2009-01-01
Combining coalgebraic reasoning, stochastic systems and logic, this volume presents the principles of coalgebraic logic from a categorical perspective. Modal logics are also discussed, including probabilistic interpretations and an analysis of Kripke models.